1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
11 #include <rte_common.h>
12 #include <rte_ether.h>
13 #include <ethdev_driver.h>
15 #include <rte_flow_driver.h>
16 #include <rte_malloc.h>
17 #include <rte_cycles.h>
18 #include <rte_bus_pci.h>
21 #include <rte_vxlan.h>
23 #include <rte_eal_paging.h>
26 #include <rte_mtr_driver.h>
27 #include <rte_tailq.h>
29 #include <mlx5_glue.h>
30 #include <mlx5_devx_cmds.h>
32 #include <mlx5_malloc.h>
34 #include "mlx5_defs.h"
36 #include "mlx5_common_os.h"
37 #include "mlx5_flow.h"
38 #include "mlx5_flow_os.h"
41 #include "rte_pmd_mlx5.h"
43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
49 #ifndef HAVE_MLX5DV_DR_ESWITCH
50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
55 #ifndef HAVE_MLX5DV_DR
56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
59 /* VLAN header definitions */
60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
80 struct mlx5_flow_tbl_resource *tbl);
83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
84 uint32_t encap_decap_idx);
87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
99 struct mlx5_priv *priv = dev->data->dev_private;
101 if (priv->pci_dev == NULL)
103 switch (priv->pci_dev->id.device_id) {
104 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
105 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
106 case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
107 return (int16_t)0xfffe;
114 * Initialize flow attributes structure according to flow items' types.
116 * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
117 * mode. For tunnel mode, the items to be modified are the outermost ones.
120 * Pointer to item specification.
122 * Pointer to flow attributes structure.
123 * @param[in] dev_flow
124 * Pointer to the sub flow.
125 * @param[in] tunnel_decap
126 * Whether action is after tunnel decapsulation.
129 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
130 struct mlx5_flow *dev_flow, bool tunnel_decap)
132 uint64_t layers = dev_flow->handle->layers;
135 * If layers is already initialized, it means this dev_flow is the
136 * suffix flow, the layers flags is set by the prefix flow. Need to
137 * use the layer flags from prefix flow as the suffix flow may not
138 * have the user defined items as the flow is split.
141 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
143 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
145 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
147 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
152 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
153 uint8_t next_protocol = 0xff;
154 switch (item->type) {
155 case RTE_FLOW_ITEM_TYPE_GRE:
156 case RTE_FLOW_ITEM_TYPE_NVGRE:
157 case RTE_FLOW_ITEM_TYPE_VXLAN:
158 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
159 case RTE_FLOW_ITEM_TYPE_GENEVE:
160 case RTE_FLOW_ITEM_TYPE_MPLS:
164 case RTE_FLOW_ITEM_TYPE_IPV4:
167 if (item->mask != NULL &&
168 ((const struct rte_flow_item_ipv4 *)
169 item->mask)->hdr.next_proto_id)
171 ((const struct rte_flow_item_ipv4 *)
172 (item->spec))->hdr.next_proto_id &
173 ((const struct rte_flow_item_ipv4 *)
174 (item->mask))->hdr.next_proto_id;
175 if ((next_protocol == IPPROTO_IPIP ||
176 next_protocol == IPPROTO_IPV6) && tunnel_decap)
179 case RTE_FLOW_ITEM_TYPE_IPV6:
182 if (item->mask != NULL &&
183 ((const struct rte_flow_item_ipv6 *)
184 item->mask)->hdr.proto)
186 ((const struct rte_flow_item_ipv6 *)
187 (item->spec))->hdr.proto &
188 ((const struct rte_flow_item_ipv6 *)
189 (item->mask))->hdr.proto;
190 if ((next_protocol == IPPROTO_IPIP ||
191 next_protocol == IPPROTO_IPV6) && tunnel_decap)
194 case RTE_FLOW_ITEM_TYPE_UDP:
198 case RTE_FLOW_ITEM_TYPE_TCP:
210 * Convert rte_mtr_color to mlx5 color.
219 rte_col_2_mlx5_col(enum rte_color rcol)
222 case RTE_COLOR_GREEN:
223 return MLX5_FLOW_COLOR_GREEN;
224 case RTE_COLOR_YELLOW:
225 return MLX5_FLOW_COLOR_YELLOW;
227 return MLX5_FLOW_COLOR_RED;
231 return MLX5_FLOW_COLOR_UNDEFINED;
234 struct field_modify_info {
235 uint32_t size; /* Size of field in protocol header, in bytes. */
236 uint32_t offset; /* Offset of field in protocol header, in bytes. */
237 enum mlx5_modification_field id;
240 struct field_modify_info modify_eth[] = {
241 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
242 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
243 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
244 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
248 struct field_modify_info modify_vlan_out_first_vid[] = {
249 /* Size in bits !!! */
250 {12, 0, MLX5_MODI_OUT_FIRST_VID},
254 struct field_modify_info modify_ipv4[] = {
255 {1, 1, MLX5_MODI_OUT_IP_DSCP},
256 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
257 {4, 12, MLX5_MODI_OUT_SIPV4},
258 {4, 16, MLX5_MODI_OUT_DIPV4},
262 struct field_modify_info modify_ipv6[] = {
263 {1, 0, MLX5_MODI_OUT_IP_DSCP},
264 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
265 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
266 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
267 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
268 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
269 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
270 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
271 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
272 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
276 struct field_modify_info modify_udp[] = {
277 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
278 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
282 struct field_modify_info modify_tcp[] = {
283 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
284 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
285 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
286 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
291 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
292 uint8_t next_protocol, uint64_t *item_flags,
295 MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
296 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
297 if (next_protocol == IPPROTO_IPIP) {
298 *item_flags |= MLX5_FLOW_LAYER_IPIP;
301 if (next_protocol == IPPROTO_IPV6) {
302 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
307 static inline struct mlx5_hlist *
308 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
309 const char *name, uint32_t size, bool direct_key,
310 bool lcores_share, void *ctx,
311 mlx5_list_create_cb cb_create,
312 mlx5_list_match_cb cb_match,
313 mlx5_list_remove_cb cb_remove,
314 mlx5_list_clone_cb cb_clone,
315 mlx5_list_clone_free_cb cb_clone_free)
317 struct mlx5_hlist *hl;
318 struct mlx5_hlist *expected = NULL;
319 char s[MLX5_NAME_SIZE];
321 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
324 snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
325 hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
326 ctx, cb_create, cb_match, cb_remove, cb_clone,
329 DRV_LOG(ERR, "%s hash creation failed", name);
333 if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
336 mlx5_hlist_destroy(hl);
337 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
342 /* Update VLAN's VID/PCP based on input rte_flow_action.
345 * Pointer to struct rte_flow_action.
347 * Pointer to struct rte_vlan_hdr.
350 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
351 struct rte_vlan_hdr *vlan)
354 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
356 ((const struct rte_flow_action_of_set_vlan_pcp *)
357 action->conf)->vlan_pcp;
358 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
359 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
360 vlan->vlan_tci |= vlan_tci;
361 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
362 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
363 vlan->vlan_tci |= rte_be_to_cpu_16
364 (((const struct rte_flow_action_of_set_vlan_vid *)
365 action->conf)->vlan_vid);
370 * Fetch 1, 2, 3 or 4 byte field from the byte array
371 * and return as unsigned integer in host-endian format.
374 * Pointer to data array.
376 * Size of field to extract.
379 * converted field in host endian format.
381 static inline uint32_t
382 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
391 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
394 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
395 ret = (ret << 8) | *(data + sizeof(uint16_t));
398 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
409 * Convert modify-header action to DV specification.
411 * Data length of each action is determined by provided field description
412 * and the item mask. Data bit offset and width of each action is determined
413 * by provided item mask.
416 * Pointer to item specification.
418 * Pointer to field modification information.
419 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
420 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
421 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
423 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
424 * Negative offset value sets the same offset as source offset.
425 * size field is ignored, value is taken from source field.
426 * @param[in,out] resource
427 * Pointer to the modify-header resource.
429 * Type of modification.
431 * Pointer to the error structure.
434 * 0 on success, a negative errno value otherwise and rte_errno is set.
437 flow_dv_convert_modify_action(struct rte_flow_item *item,
438 struct field_modify_info *field,
439 struct field_modify_info *dcopy,
440 struct mlx5_flow_dv_modify_hdr_resource *resource,
441 uint32_t type, struct rte_flow_error *error)
443 uint32_t i = resource->actions_num;
444 struct mlx5_modification_cmd *actions = resource->actions;
445 uint32_t carry_b = 0;
448 * The item and mask are provided in big-endian format.
449 * The fields should be presented as in big-endian format either.
450 * Mask must be always present, it defines the actual field width.
452 MLX5_ASSERT(item->mask);
453 MLX5_ASSERT(field->size);
459 bool next_field = true;
460 bool next_dcopy = true;
462 if (i >= MLX5_MAX_MODIFY_NUM)
463 return rte_flow_error_set(error, EINVAL,
464 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
465 "too many items to modify");
466 /* Fetch variable byte size mask from the array. */
467 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
468 field->offset, field->size);
473 /* Deduce actual data width in bits from mask value. */
474 off_b = rte_bsf32(mask) + carry_b;
475 size_b = sizeof(uint32_t) * CHAR_BIT -
476 off_b - __builtin_clz(mask);
478 actions[i] = (struct mlx5_modification_cmd) {
482 .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
485 if (type == MLX5_MODIFICATION_TYPE_COPY) {
487 actions[i].dst_field = dcopy->id;
488 actions[i].dst_offset =
489 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
490 /* Convert entire record to big-endian format. */
491 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
493 * Destination field overflow. Copy leftovers of
494 * a source field to the next destination field.
497 if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
500 dcopy->size * CHAR_BIT - dcopy->offset;
501 carry_b = actions[i].length;
505 * Not enough bits in a source filed to fill a
506 * destination field. Switch to the next source.
508 if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
509 (size_b == field->size * CHAR_BIT - off_b)) {
511 field->size * CHAR_BIT - off_b;
512 dcopy->offset += actions[i].length;
518 MLX5_ASSERT(item->spec);
519 data = flow_dv_fetch_field((const uint8_t *)item->spec +
520 field->offset, field->size);
521 /* Shift out the trailing masked bits from data. */
522 data = (data & mask) >> off_b;
523 actions[i].data1 = rte_cpu_to_be_32(data);
525 /* Convert entire record to expected big-endian format. */
526 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
530 } while (field->size);
531 if (resource->actions_num == i)
532 return rte_flow_error_set(error, EINVAL,
533 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
534 "invalid modification flow item");
535 resource->actions_num = i;
540 * Convert modify-header set IPv4 address action to DV specification.
542 * @param[in,out] resource
543 * Pointer to the modify-header resource.
545 * Pointer to action specification.
547 * Pointer to the error structure.
550 * 0 on success, a negative errno value otherwise and rte_errno is set.
553 flow_dv_convert_action_modify_ipv4
554 (struct mlx5_flow_dv_modify_hdr_resource *resource,
555 const struct rte_flow_action *action,
556 struct rte_flow_error *error)
558 const struct rte_flow_action_set_ipv4 *conf =
559 (const struct rte_flow_action_set_ipv4 *)(action->conf);
560 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
561 struct rte_flow_item_ipv4 ipv4;
562 struct rte_flow_item_ipv4 ipv4_mask;
564 memset(&ipv4, 0, sizeof(ipv4));
565 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
566 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
567 ipv4.hdr.src_addr = conf->ipv4_addr;
568 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
570 ipv4.hdr.dst_addr = conf->ipv4_addr;
571 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
574 item.mask = &ipv4_mask;
575 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
576 MLX5_MODIFICATION_TYPE_SET, error);
580 * Convert modify-header set IPv6 address action to DV specification.
582 * @param[in,out] resource
583 * Pointer to the modify-header resource.
585 * Pointer to action specification.
587 * Pointer to the error structure.
590 * 0 on success, a negative errno value otherwise and rte_errno is set.
593 flow_dv_convert_action_modify_ipv6
594 (struct mlx5_flow_dv_modify_hdr_resource *resource,
595 const struct rte_flow_action *action,
596 struct rte_flow_error *error)
598 const struct rte_flow_action_set_ipv6 *conf =
599 (const struct rte_flow_action_set_ipv6 *)(action->conf);
600 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
601 struct rte_flow_item_ipv6 ipv6;
602 struct rte_flow_item_ipv6 ipv6_mask;
604 memset(&ipv6, 0, sizeof(ipv6));
605 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
606 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
607 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
608 sizeof(ipv6.hdr.src_addr));
609 memcpy(&ipv6_mask.hdr.src_addr,
610 &rte_flow_item_ipv6_mask.hdr.src_addr,
611 sizeof(ipv6.hdr.src_addr));
613 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
614 sizeof(ipv6.hdr.dst_addr));
615 memcpy(&ipv6_mask.hdr.dst_addr,
616 &rte_flow_item_ipv6_mask.hdr.dst_addr,
617 sizeof(ipv6.hdr.dst_addr));
620 item.mask = &ipv6_mask;
621 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
622 MLX5_MODIFICATION_TYPE_SET, error);
626 * Convert modify-header set MAC address action to DV specification.
628 * @param[in,out] resource
629 * Pointer to the modify-header resource.
631 * Pointer to action specification.
633 * Pointer to the error structure.
636 * 0 on success, a negative errno value otherwise and rte_errno is set.
639 flow_dv_convert_action_modify_mac
640 (struct mlx5_flow_dv_modify_hdr_resource *resource,
641 const struct rte_flow_action *action,
642 struct rte_flow_error *error)
644 const struct rte_flow_action_set_mac *conf =
645 (const struct rte_flow_action_set_mac *)(action->conf);
646 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
647 struct rte_flow_item_eth eth;
648 struct rte_flow_item_eth eth_mask;
650 memset(ð, 0, sizeof(eth));
651 memset(ð_mask, 0, sizeof(eth_mask));
652 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
653 memcpy(ð.src.addr_bytes, &conf->mac_addr,
654 sizeof(eth.src.addr_bytes));
655 memcpy(ð_mask.src.addr_bytes,
656 &rte_flow_item_eth_mask.src.addr_bytes,
657 sizeof(eth_mask.src.addr_bytes));
659 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
660 sizeof(eth.dst.addr_bytes));
661 memcpy(ð_mask.dst.addr_bytes,
662 &rte_flow_item_eth_mask.dst.addr_bytes,
663 sizeof(eth_mask.dst.addr_bytes));
666 item.mask = ð_mask;
667 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
668 MLX5_MODIFICATION_TYPE_SET, error);
672 * Convert modify-header set VLAN VID action to DV specification.
674 * @param[in,out] resource
675 * Pointer to the modify-header resource.
677 * Pointer to action specification.
679 * Pointer to the error structure.
682 * 0 on success, a negative errno value otherwise and rte_errno is set.
685 flow_dv_convert_action_modify_vlan_vid
686 (struct mlx5_flow_dv_modify_hdr_resource *resource,
687 const struct rte_flow_action *action,
688 struct rte_flow_error *error)
690 const struct rte_flow_action_of_set_vlan_vid *conf =
691 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
692 int i = resource->actions_num;
693 struct mlx5_modification_cmd *actions = resource->actions;
694 struct field_modify_info *field = modify_vlan_out_first_vid;
696 if (i >= MLX5_MAX_MODIFY_NUM)
697 return rte_flow_error_set(error, EINVAL,
698 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
699 "too many items to modify");
700 actions[i] = (struct mlx5_modification_cmd) {
701 .action_type = MLX5_MODIFICATION_TYPE_SET,
703 .length = field->size,
704 .offset = field->offset,
706 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
707 actions[i].data1 = conf->vlan_vid;
708 actions[i].data1 = actions[i].data1 << 16;
709 resource->actions_num = ++i;
714 * Convert modify-header set TP action to DV specification.
716 * @param[in,out] resource
717 * Pointer to the modify-header resource.
719 * Pointer to action specification.
721 * Pointer to rte_flow_item objects list.
723 * Pointer to flow attributes structure.
724 * @param[in] dev_flow
725 * Pointer to the sub flow.
726 * @param[in] tunnel_decap
727 * Whether action is after tunnel decapsulation.
729 * Pointer to the error structure.
732 * 0 on success, a negative errno value otherwise and rte_errno is set.
735 flow_dv_convert_action_modify_tp
736 (struct mlx5_flow_dv_modify_hdr_resource *resource,
737 const struct rte_flow_action *action,
738 const struct rte_flow_item *items,
739 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
740 bool tunnel_decap, struct rte_flow_error *error)
742 const struct rte_flow_action_set_tp *conf =
743 (const struct rte_flow_action_set_tp *)(action->conf);
744 struct rte_flow_item item;
745 struct rte_flow_item_udp udp;
746 struct rte_flow_item_udp udp_mask;
747 struct rte_flow_item_tcp tcp;
748 struct rte_flow_item_tcp tcp_mask;
749 struct field_modify_info *field;
752 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
754 memset(&udp, 0, sizeof(udp));
755 memset(&udp_mask, 0, sizeof(udp_mask));
756 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
757 udp.hdr.src_port = conf->port;
758 udp_mask.hdr.src_port =
759 rte_flow_item_udp_mask.hdr.src_port;
761 udp.hdr.dst_port = conf->port;
762 udp_mask.hdr.dst_port =
763 rte_flow_item_udp_mask.hdr.dst_port;
765 item.type = RTE_FLOW_ITEM_TYPE_UDP;
767 item.mask = &udp_mask;
770 MLX5_ASSERT(attr->tcp);
771 memset(&tcp, 0, sizeof(tcp));
772 memset(&tcp_mask, 0, sizeof(tcp_mask));
773 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
774 tcp.hdr.src_port = conf->port;
775 tcp_mask.hdr.src_port =
776 rte_flow_item_tcp_mask.hdr.src_port;
778 tcp.hdr.dst_port = conf->port;
779 tcp_mask.hdr.dst_port =
780 rte_flow_item_tcp_mask.hdr.dst_port;
782 item.type = RTE_FLOW_ITEM_TYPE_TCP;
784 item.mask = &tcp_mask;
787 return flow_dv_convert_modify_action(&item, field, NULL, resource,
788 MLX5_MODIFICATION_TYPE_SET, error);
792 * Convert modify-header set TTL action to DV specification.
794 * @param[in,out] resource
795 * Pointer to the modify-header resource.
797 * Pointer to action specification.
799 * Pointer to rte_flow_item objects list.
801 * Pointer to flow attributes structure.
802 * @param[in] dev_flow
803 * Pointer to the sub flow.
804 * @param[in] tunnel_decap
805 * Whether action is after tunnel decapsulation.
807 * Pointer to the error structure.
810 * 0 on success, a negative errno value otherwise and rte_errno is set.
813 flow_dv_convert_action_modify_ttl
814 (struct mlx5_flow_dv_modify_hdr_resource *resource,
815 const struct rte_flow_action *action,
816 const struct rte_flow_item *items,
817 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
818 bool tunnel_decap, struct rte_flow_error *error)
820 const struct rte_flow_action_set_ttl *conf =
821 (const struct rte_flow_action_set_ttl *)(action->conf);
822 struct rte_flow_item item;
823 struct rte_flow_item_ipv4 ipv4;
824 struct rte_flow_item_ipv4 ipv4_mask;
825 struct rte_flow_item_ipv6 ipv6;
826 struct rte_flow_item_ipv6 ipv6_mask;
827 struct field_modify_info *field;
830 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
832 memset(&ipv4, 0, sizeof(ipv4));
833 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
834 ipv4.hdr.time_to_live = conf->ttl_value;
835 ipv4_mask.hdr.time_to_live = 0xFF;
836 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
838 item.mask = &ipv4_mask;
841 MLX5_ASSERT(attr->ipv6);
842 memset(&ipv6, 0, sizeof(ipv6));
843 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
844 ipv6.hdr.hop_limits = conf->ttl_value;
845 ipv6_mask.hdr.hop_limits = 0xFF;
846 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
848 item.mask = &ipv6_mask;
851 return flow_dv_convert_modify_action(&item, field, NULL, resource,
852 MLX5_MODIFICATION_TYPE_SET, error);
856 * Convert modify-header decrement TTL action to DV specification.
858 * @param[in,out] resource
859 * Pointer to the modify-header resource.
861 * Pointer to action specification.
863 * Pointer to rte_flow_item objects list.
865 * Pointer to flow attributes structure.
866 * @param[in] dev_flow
867 * Pointer to the sub flow.
868 * @param[in] tunnel_decap
869 * Whether action is after tunnel decapsulation.
871 * Pointer to the error structure.
874 * 0 on success, a negative errno value otherwise and rte_errno is set.
877 flow_dv_convert_action_modify_dec_ttl
878 (struct mlx5_flow_dv_modify_hdr_resource *resource,
879 const struct rte_flow_item *items,
880 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
881 bool tunnel_decap, struct rte_flow_error *error)
883 struct rte_flow_item item;
884 struct rte_flow_item_ipv4 ipv4;
885 struct rte_flow_item_ipv4 ipv4_mask;
886 struct rte_flow_item_ipv6 ipv6;
887 struct rte_flow_item_ipv6 ipv6_mask;
888 struct field_modify_info *field;
891 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
893 memset(&ipv4, 0, sizeof(ipv4));
894 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
895 ipv4.hdr.time_to_live = 0xFF;
896 ipv4_mask.hdr.time_to_live = 0xFF;
897 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
899 item.mask = &ipv4_mask;
902 MLX5_ASSERT(attr->ipv6);
903 memset(&ipv6, 0, sizeof(ipv6));
904 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
905 ipv6.hdr.hop_limits = 0xFF;
906 ipv6_mask.hdr.hop_limits = 0xFF;
907 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
909 item.mask = &ipv6_mask;
912 return flow_dv_convert_modify_action(&item, field, NULL, resource,
913 MLX5_MODIFICATION_TYPE_ADD, error);
917 * Convert modify-header increment/decrement TCP Sequence number
918 * to DV specification.
920 * @param[in,out] resource
921 * Pointer to the modify-header resource.
923 * Pointer to action specification.
925 * Pointer to the error structure.
928 * 0 on success, a negative errno value otherwise and rte_errno is set.
931 flow_dv_convert_action_modify_tcp_seq
932 (struct mlx5_flow_dv_modify_hdr_resource *resource,
933 const struct rte_flow_action *action,
934 struct rte_flow_error *error)
936 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
937 uint64_t value = rte_be_to_cpu_32(*conf);
938 struct rte_flow_item item;
939 struct rte_flow_item_tcp tcp;
940 struct rte_flow_item_tcp tcp_mask;
942 memset(&tcp, 0, sizeof(tcp));
943 memset(&tcp_mask, 0, sizeof(tcp_mask));
944 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
946 * The HW has no decrement operation, only increment operation.
947 * To simulate decrement X from Y using increment operation
948 * we need to add UINT32_MAX X times to Y.
949 * Each adding of UINT32_MAX decrements Y by 1.
952 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
953 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
954 item.type = RTE_FLOW_ITEM_TYPE_TCP;
956 item.mask = &tcp_mask;
957 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
958 MLX5_MODIFICATION_TYPE_ADD, error);
962 * Convert modify-header increment/decrement TCP Acknowledgment number
963 * to DV specification.
965 * @param[in,out] resource
966 * Pointer to the modify-header resource.
968 * Pointer to action specification.
970 * Pointer to the error structure.
973 * 0 on success, a negative errno value otherwise and rte_errno is set.
976 flow_dv_convert_action_modify_tcp_ack
977 (struct mlx5_flow_dv_modify_hdr_resource *resource,
978 const struct rte_flow_action *action,
979 struct rte_flow_error *error)
981 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
982 uint64_t value = rte_be_to_cpu_32(*conf);
983 struct rte_flow_item item;
984 struct rte_flow_item_tcp tcp;
985 struct rte_flow_item_tcp tcp_mask;
987 memset(&tcp, 0, sizeof(tcp));
988 memset(&tcp_mask, 0, sizeof(tcp_mask));
989 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
991 * The HW has no decrement operation, only increment operation.
992 * To simulate decrement X from Y using increment operation
993 * we need to add UINT32_MAX X times to Y.
994 * Each adding of UINT32_MAX decrements Y by 1.
997 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
998 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
999 item.type = RTE_FLOW_ITEM_TYPE_TCP;
1001 item.mask = &tcp_mask;
1002 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1003 MLX5_MODIFICATION_TYPE_ADD, error);
1006 static enum mlx5_modification_field reg_to_field[] = {
1007 [REG_NON] = MLX5_MODI_OUT_NONE,
1008 [REG_A] = MLX5_MODI_META_DATA_REG_A,
1009 [REG_B] = MLX5_MODI_META_DATA_REG_B,
1010 [REG_C_0] = MLX5_MODI_META_REG_C_0,
1011 [REG_C_1] = MLX5_MODI_META_REG_C_1,
1012 [REG_C_2] = MLX5_MODI_META_REG_C_2,
1013 [REG_C_3] = MLX5_MODI_META_REG_C_3,
1014 [REG_C_4] = MLX5_MODI_META_REG_C_4,
1015 [REG_C_5] = MLX5_MODI_META_REG_C_5,
1016 [REG_C_6] = MLX5_MODI_META_REG_C_6,
1017 [REG_C_7] = MLX5_MODI_META_REG_C_7,
1021 * Convert register set to DV specification.
1023 * @param[in,out] resource
1024 * Pointer to the modify-header resource.
1026 * Pointer to action specification.
1028 * Pointer to the error structure.
1031 * 0 on success, a negative errno value otherwise and rte_errno is set.
1034 flow_dv_convert_action_set_reg
1035 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1036 const struct rte_flow_action *action,
1037 struct rte_flow_error *error)
1039 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1040 struct mlx5_modification_cmd *actions = resource->actions;
1041 uint32_t i = resource->actions_num;
1043 if (i >= MLX5_MAX_MODIFY_NUM)
1044 return rte_flow_error_set(error, EINVAL,
1045 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1046 "too many items to modify");
1047 MLX5_ASSERT(conf->id != REG_NON);
1048 MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1049 actions[i] = (struct mlx5_modification_cmd) {
1050 .action_type = MLX5_MODIFICATION_TYPE_SET,
1051 .field = reg_to_field[conf->id],
1052 .offset = conf->offset,
1053 .length = conf->length,
1055 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1056 actions[i].data1 = rte_cpu_to_be_32(conf->data);
1058 resource->actions_num = i;
1063 * Convert SET_TAG action to DV specification.
1066 * Pointer to the rte_eth_dev structure.
1067 * @param[in,out] resource
1068 * Pointer to the modify-header resource.
1070 * Pointer to action specification.
1072 * Pointer to the error structure.
1075 * 0 on success, a negative errno value otherwise and rte_errno is set.
1078 flow_dv_convert_action_set_tag
1079 (struct rte_eth_dev *dev,
1080 struct mlx5_flow_dv_modify_hdr_resource *resource,
1081 const struct rte_flow_action_set_tag *conf,
1082 struct rte_flow_error *error)
1084 rte_be32_t data = rte_cpu_to_be_32(conf->data);
1085 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1086 struct rte_flow_item item = {
1090 struct field_modify_info reg_c_x[] = {
1093 enum mlx5_modification_field reg_type;
1096 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1099 MLX5_ASSERT(ret != REG_NON);
1100 MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1101 reg_type = reg_to_field[ret];
1102 MLX5_ASSERT(reg_type > 0);
1103 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1104 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1105 MLX5_MODIFICATION_TYPE_SET, error);
1109 * Convert internal COPY_REG action to DV specification.
1112 * Pointer to the rte_eth_dev structure.
1113 * @param[in,out] res
1114 * Pointer to the modify-header resource.
1116 * Pointer to action specification.
1118 * Pointer to the error structure.
1121 * 0 on success, a negative errno value otherwise and rte_errno is set.
1124 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1125 struct mlx5_flow_dv_modify_hdr_resource *res,
1126 const struct rte_flow_action *action,
1127 struct rte_flow_error *error)
1129 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1130 rte_be32_t mask = RTE_BE32(UINT32_MAX);
1131 struct rte_flow_item item = {
1135 struct field_modify_info reg_src[] = {
1136 {4, 0, reg_to_field[conf->src]},
1139 struct field_modify_info reg_dst = {
1141 .id = reg_to_field[conf->dst],
1143 /* Adjust reg_c[0] usage according to reported mask. */
1144 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1145 struct mlx5_priv *priv = dev->data->dev_private;
1146 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1148 MLX5_ASSERT(reg_c0);
1149 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1150 if (conf->dst == REG_C_0) {
1151 /* Copy to reg_c[0], within mask only. */
1152 reg_dst.offset = rte_bsf32(reg_c0);
1153 mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1156 mask = rte_cpu_to_be_32(reg_c0);
1159 return flow_dv_convert_modify_action(&item,
1160 reg_src, ®_dst, res,
1161 MLX5_MODIFICATION_TYPE_COPY,
1166 * Convert MARK action to DV specification. This routine is used
1167 * in extensive metadata only and requires metadata register to be
1168 * handled. In legacy mode hardware tag resource is engaged.
1171 * Pointer to the rte_eth_dev structure.
1173 * Pointer to MARK action specification.
1174 * @param[in,out] resource
1175 * Pointer to the modify-header resource.
1177 * Pointer to the error structure.
1180 * 0 on success, a negative errno value otherwise and rte_errno is set.
1183 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1184 const struct rte_flow_action_mark *conf,
1185 struct mlx5_flow_dv_modify_hdr_resource *resource,
1186 struct rte_flow_error *error)
1188 struct mlx5_priv *priv = dev->data->dev_private;
1189 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1190 priv->sh->dv_mark_mask);
1191 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1192 struct rte_flow_item item = {
1196 struct field_modify_info reg_c_x[] = {
1202 return rte_flow_error_set(error, EINVAL,
1203 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1204 NULL, "zero mark action mask");
1205 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1208 MLX5_ASSERT(reg > 0);
1209 if (reg == REG_C_0) {
1210 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1211 uint32_t shl_c0 = rte_bsf32(msk_c0);
1213 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1214 mask = rte_cpu_to_be_32(mask) & msk_c0;
1215 mask = rte_cpu_to_be_32(mask << shl_c0);
1217 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1218 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1219 MLX5_MODIFICATION_TYPE_SET, error);
1223 * Get metadata register index for specified steering domain.
1226 * Pointer to the rte_eth_dev structure.
1228 * Attributes of flow to determine steering domain.
1230 * Pointer to the error structure.
1233 * positive index on success, a negative errno value otherwise
1234 * and rte_errno is set.
1236 static enum modify_reg
1237 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1238 const struct rte_flow_attr *attr,
1239 struct rte_flow_error *error)
1242 mlx5_flow_get_reg_id(dev, attr->transfer ?
1246 MLX5_METADATA_RX, 0, error);
1248 return rte_flow_error_set(error,
1249 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1250 NULL, "unavailable "
1251 "metadata register");
1256 * Convert SET_META action to DV specification.
1259 * Pointer to the rte_eth_dev structure.
1260 * @param[in,out] resource
1261 * Pointer to the modify-header resource.
1263 * Attributes of flow that includes this item.
1265 * Pointer to action specification.
1267 * Pointer to the error structure.
1270 * 0 on success, a negative errno value otherwise and rte_errno is set.
1273 flow_dv_convert_action_set_meta
1274 (struct rte_eth_dev *dev,
1275 struct mlx5_flow_dv_modify_hdr_resource *resource,
1276 const struct rte_flow_attr *attr,
1277 const struct rte_flow_action_set_meta *conf,
1278 struct rte_flow_error *error)
1280 uint32_t mask = rte_cpu_to_be_32(conf->mask);
1281 uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1282 struct rte_flow_item item = {
1286 struct field_modify_info reg_c_x[] = {
1289 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1293 MLX5_ASSERT(reg != REG_NON);
1294 if (reg == REG_C_0) {
1295 struct mlx5_priv *priv = dev->data->dev_private;
1296 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1297 uint32_t shl_c0 = rte_bsf32(msk_c0);
1299 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1300 mask = rte_cpu_to_be_32(mask) & msk_c0;
1301 mask = rte_cpu_to_be_32(mask << shl_c0);
1303 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1304 /* The routine expects parameters in memory as big-endian ones. */
1305 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1306 MLX5_MODIFICATION_TYPE_SET, error);
1310 * Convert modify-header set IPv4 DSCP action to DV specification.
1312 * @param[in,out] resource
1313 * Pointer to the modify-header resource.
1315 * Pointer to action specification.
1317 * Pointer to the error structure.
1320 * 0 on success, a negative errno value otherwise and rte_errno is set.
1323 flow_dv_convert_action_modify_ipv4_dscp
1324 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1325 const struct rte_flow_action *action,
1326 struct rte_flow_error *error)
1328 const struct rte_flow_action_set_dscp *conf =
1329 (const struct rte_flow_action_set_dscp *)(action->conf);
1330 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1331 struct rte_flow_item_ipv4 ipv4;
1332 struct rte_flow_item_ipv4 ipv4_mask;
1334 memset(&ipv4, 0, sizeof(ipv4));
1335 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1336 ipv4.hdr.type_of_service = conf->dscp;
1337 ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1339 item.mask = &ipv4_mask;
1340 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1341 MLX5_MODIFICATION_TYPE_SET, error);
1345 * Convert modify-header set IPv6 DSCP action to DV specification.
1347 * @param[in,out] resource
1348 * Pointer to the modify-header resource.
1350 * Pointer to action specification.
1352 * Pointer to the error structure.
1355 * 0 on success, a negative errno value otherwise and rte_errno is set.
1358 flow_dv_convert_action_modify_ipv6_dscp
1359 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1360 const struct rte_flow_action *action,
1361 struct rte_flow_error *error)
1363 const struct rte_flow_action_set_dscp *conf =
1364 (const struct rte_flow_action_set_dscp *)(action->conf);
1365 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1366 struct rte_flow_item_ipv6 ipv6;
1367 struct rte_flow_item_ipv6 ipv6_mask;
1369 memset(&ipv6, 0, sizeof(ipv6));
1370 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1372 * Even though the DSCP bits offset of IPv6 is not byte aligned,
1373 * rdma-core only accept the DSCP bits byte aligned start from
1374 * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1375 * bits in IPv6 case as rdma-core requires byte aligned value.
1377 ipv6.hdr.vtc_flow = conf->dscp;
1378 ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1380 item.mask = &ipv6_mask;
1381 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1382 MLX5_MODIFICATION_TYPE_SET, error);
1386 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1387 enum rte_flow_field_id field, int inherit,
1388 const struct rte_flow_attr *attr,
1389 struct rte_flow_error *error)
1391 struct mlx5_priv *priv = dev->data->dev_private;
1394 case RTE_FLOW_FIELD_START:
1396 case RTE_FLOW_FIELD_MAC_DST:
1397 case RTE_FLOW_FIELD_MAC_SRC:
1399 case RTE_FLOW_FIELD_VLAN_TYPE:
1401 case RTE_FLOW_FIELD_VLAN_ID:
1403 case RTE_FLOW_FIELD_MAC_TYPE:
1405 case RTE_FLOW_FIELD_IPV4_DSCP:
1407 case RTE_FLOW_FIELD_IPV4_TTL:
1409 case RTE_FLOW_FIELD_IPV4_SRC:
1410 case RTE_FLOW_FIELD_IPV4_DST:
1412 case RTE_FLOW_FIELD_IPV6_DSCP:
1414 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1416 case RTE_FLOW_FIELD_IPV6_SRC:
1417 case RTE_FLOW_FIELD_IPV6_DST:
1419 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1420 case RTE_FLOW_FIELD_TCP_PORT_DST:
1422 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1423 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1425 case RTE_FLOW_FIELD_TCP_FLAGS:
1427 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1428 case RTE_FLOW_FIELD_UDP_PORT_DST:
1430 case RTE_FLOW_FIELD_VXLAN_VNI:
1431 case RTE_FLOW_FIELD_GENEVE_VNI:
1433 case RTE_FLOW_FIELD_GTP_TEID:
1434 case RTE_FLOW_FIELD_TAG:
1436 case RTE_FLOW_FIELD_MARK:
1437 return __builtin_popcount(priv->sh->dv_mark_mask);
1438 case RTE_FLOW_FIELD_META:
1439 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1440 __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1441 case RTE_FLOW_FIELD_POINTER:
1442 case RTE_FLOW_FIELD_VALUE:
1443 return inherit < 0 ? 0 : inherit;
1451 mlx5_flow_field_id_to_modify_info
1452 (const struct rte_flow_action_modify_data *data,
1453 struct field_modify_info *info, uint32_t *mask,
1454 uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
1455 const struct rte_flow_attr *attr, struct rte_flow_error *error)
1457 struct mlx5_priv *priv = dev->data->dev_private;
1461 switch (data->field) {
1462 case RTE_FLOW_FIELD_START:
1463 /* not supported yet */
1466 case RTE_FLOW_FIELD_MAC_DST:
1467 off = data->offset > 16 ? data->offset - 16 : 0;
1469 if (data->offset < 16) {
1470 info[idx] = (struct field_modify_info){2, 4,
1471 MLX5_MODI_OUT_DMAC_15_0};
1473 mask[idx] = rte_cpu_to_be_16(0xffff >>
1477 mask[idx] = RTE_BE16(0xffff);
1484 info[idx] = (struct field_modify_info){4, 0,
1485 MLX5_MODI_OUT_DMAC_47_16};
1486 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1487 (32 - width)) << off);
1489 if (data->offset < 16)
1490 info[idx++] = (struct field_modify_info){2, 4,
1491 MLX5_MODI_OUT_DMAC_15_0};
1492 info[idx] = (struct field_modify_info){4, 0,
1493 MLX5_MODI_OUT_DMAC_47_16};
1496 case RTE_FLOW_FIELD_MAC_SRC:
1497 off = data->offset > 16 ? data->offset - 16 : 0;
1499 if (data->offset < 16) {
1500 info[idx] = (struct field_modify_info){2, 4,
1501 MLX5_MODI_OUT_SMAC_15_0};
1503 mask[idx] = rte_cpu_to_be_16(0xffff >>
1507 mask[idx] = RTE_BE16(0xffff);
1514 info[idx] = (struct field_modify_info){4, 0,
1515 MLX5_MODI_OUT_SMAC_47_16};
1516 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1517 (32 - width)) << off);
1519 if (data->offset < 16)
1520 info[idx++] = (struct field_modify_info){2, 4,
1521 MLX5_MODI_OUT_SMAC_15_0};
1522 info[idx] = (struct field_modify_info){4, 0,
1523 MLX5_MODI_OUT_SMAC_47_16};
1526 case RTE_FLOW_FIELD_VLAN_TYPE:
1527 /* not supported yet */
1529 case RTE_FLOW_FIELD_VLAN_ID:
1530 info[idx] = (struct field_modify_info){2, 0,
1531 MLX5_MODI_OUT_FIRST_VID};
1533 mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1535 case RTE_FLOW_FIELD_MAC_TYPE:
1536 info[idx] = (struct field_modify_info){2, 0,
1537 MLX5_MODI_OUT_ETHERTYPE};
1539 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1541 case RTE_FLOW_FIELD_IPV4_DSCP:
1542 info[idx] = (struct field_modify_info){1, 0,
1543 MLX5_MODI_OUT_IP_DSCP};
1545 mask[idx] = 0x3f >> (6 - width);
1547 case RTE_FLOW_FIELD_IPV4_TTL:
1548 info[idx] = (struct field_modify_info){1, 0,
1549 MLX5_MODI_OUT_IPV4_TTL};
1551 mask[idx] = 0xff >> (8 - width);
1553 case RTE_FLOW_FIELD_IPV4_SRC:
1554 info[idx] = (struct field_modify_info){4, 0,
1555 MLX5_MODI_OUT_SIPV4};
1557 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1560 case RTE_FLOW_FIELD_IPV4_DST:
1561 info[idx] = (struct field_modify_info){4, 0,
1562 MLX5_MODI_OUT_DIPV4};
1564 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1567 case RTE_FLOW_FIELD_IPV6_DSCP:
1568 info[idx] = (struct field_modify_info){1, 0,
1569 MLX5_MODI_OUT_IP_DSCP};
1571 mask[idx] = 0x3f >> (6 - width);
1573 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1574 info[idx] = (struct field_modify_info){1, 0,
1575 MLX5_MODI_OUT_IPV6_HOPLIMIT};
1577 mask[idx] = 0xff >> (8 - width);
1579 case RTE_FLOW_FIELD_IPV6_SRC:
1581 if (data->offset < 32) {
1582 info[idx] = (struct field_modify_info){4, 12,
1583 MLX5_MODI_OUT_SIPV6_31_0};
1586 rte_cpu_to_be_32(0xffffffff >>
1590 mask[idx] = RTE_BE32(0xffffffff);
1597 if (data->offset < 64) {
1598 info[idx] = (struct field_modify_info){4, 8,
1599 MLX5_MODI_OUT_SIPV6_63_32};
1602 rte_cpu_to_be_32(0xffffffff >>
1606 mask[idx] = RTE_BE32(0xffffffff);
1613 if (data->offset < 96) {
1614 info[idx] = (struct field_modify_info){4, 4,
1615 MLX5_MODI_OUT_SIPV6_95_64};
1618 rte_cpu_to_be_32(0xffffffff >>
1622 mask[idx] = RTE_BE32(0xffffffff);
1629 info[idx] = (struct field_modify_info){4, 0,
1630 MLX5_MODI_OUT_SIPV6_127_96};
1631 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1634 if (data->offset < 32)
1635 info[idx++] = (struct field_modify_info){4, 12,
1636 MLX5_MODI_OUT_SIPV6_31_0};
1637 if (data->offset < 64)
1638 info[idx++] = (struct field_modify_info){4, 8,
1639 MLX5_MODI_OUT_SIPV6_63_32};
1640 if (data->offset < 96)
1641 info[idx++] = (struct field_modify_info){4, 4,
1642 MLX5_MODI_OUT_SIPV6_95_64};
1643 if (data->offset < 128)
1644 info[idx++] = (struct field_modify_info){4, 0,
1645 MLX5_MODI_OUT_SIPV6_127_96};
1648 case RTE_FLOW_FIELD_IPV6_DST:
1650 if (data->offset < 32) {
1651 info[idx] = (struct field_modify_info){4, 12,
1652 MLX5_MODI_OUT_DIPV6_31_0};
1655 rte_cpu_to_be_32(0xffffffff >>
1659 mask[idx] = RTE_BE32(0xffffffff);
1666 if (data->offset < 64) {
1667 info[idx] = (struct field_modify_info){4, 8,
1668 MLX5_MODI_OUT_DIPV6_63_32};
1671 rte_cpu_to_be_32(0xffffffff >>
1675 mask[idx] = RTE_BE32(0xffffffff);
1682 if (data->offset < 96) {
1683 info[idx] = (struct field_modify_info){4, 4,
1684 MLX5_MODI_OUT_DIPV6_95_64};
1687 rte_cpu_to_be_32(0xffffffff >>
1691 mask[idx] = RTE_BE32(0xffffffff);
1698 info[idx] = (struct field_modify_info){4, 0,
1699 MLX5_MODI_OUT_DIPV6_127_96};
1700 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1703 if (data->offset < 32)
1704 info[idx++] = (struct field_modify_info){4, 12,
1705 MLX5_MODI_OUT_DIPV6_31_0};
1706 if (data->offset < 64)
1707 info[idx++] = (struct field_modify_info){4, 8,
1708 MLX5_MODI_OUT_DIPV6_63_32};
1709 if (data->offset < 96)
1710 info[idx++] = (struct field_modify_info){4, 4,
1711 MLX5_MODI_OUT_DIPV6_95_64};
1712 if (data->offset < 128)
1713 info[idx++] = (struct field_modify_info){4, 0,
1714 MLX5_MODI_OUT_DIPV6_127_96};
1717 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1718 info[idx] = (struct field_modify_info){2, 0,
1719 MLX5_MODI_OUT_TCP_SPORT};
1721 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1723 case RTE_FLOW_FIELD_TCP_PORT_DST:
1724 info[idx] = (struct field_modify_info){2, 0,
1725 MLX5_MODI_OUT_TCP_DPORT};
1727 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1729 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1730 info[idx] = (struct field_modify_info){4, 0,
1731 MLX5_MODI_OUT_TCP_SEQ_NUM};
1733 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1736 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1737 info[idx] = (struct field_modify_info){4, 0,
1738 MLX5_MODI_OUT_TCP_ACK_NUM};
1740 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1743 case RTE_FLOW_FIELD_TCP_FLAGS:
1744 info[idx] = (struct field_modify_info){2, 0,
1745 MLX5_MODI_OUT_TCP_FLAGS};
1747 mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1749 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1750 info[idx] = (struct field_modify_info){2, 0,
1751 MLX5_MODI_OUT_UDP_SPORT};
1753 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1755 case RTE_FLOW_FIELD_UDP_PORT_DST:
1756 info[idx] = (struct field_modify_info){2, 0,
1757 MLX5_MODI_OUT_UDP_DPORT};
1759 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1761 case RTE_FLOW_FIELD_VXLAN_VNI:
1762 /* not supported yet */
1764 case RTE_FLOW_FIELD_GENEVE_VNI:
1765 /* not supported yet*/
1767 case RTE_FLOW_FIELD_GTP_TEID:
1768 info[idx] = (struct field_modify_info){4, 0,
1769 MLX5_MODI_GTP_TEID};
1771 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1774 case RTE_FLOW_FIELD_TAG:
1776 int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1777 data->level, error);
1780 MLX5_ASSERT(reg != REG_NON);
1781 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1782 info[idx] = (struct field_modify_info){4, 0,
1786 rte_cpu_to_be_32(0xffffffff >>
1790 case RTE_FLOW_FIELD_MARK:
1792 uint32_t mark_mask = priv->sh->dv_mark_mask;
1793 uint32_t mark_count = __builtin_popcount(mark_mask);
1794 int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1798 MLX5_ASSERT(reg != REG_NON);
1799 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1800 info[idx] = (struct field_modify_info){4, 0,
1803 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1804 (mark_count - width)) & mark_mask);
1807 case RTE_FLOW_FIELD_META:
1809 uint32_t meta_mask = priv->sh->dv_meta_mask;
1810 uint32_t meta_count = __builtin_popcount(meta_mask);
1812 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1813 uint32_t shl_c0 = rte_bsf32(msk_c0);
1814 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1817 MLX5_ASSERT(reg != REG_NON);
1818 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1821 info[idx] = (struct field_modify_info){4, 0,
1824 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1825 (meta_count - width)) & meta_mask);
1828 case RTE_FLOW_FIELD_POINTER:
1829 case RTE_FLOW_FIELD_VALUE:
1837 * Convert modify_field action to DV specification.
1840 * Pointer to the rte_eth_dev structure.
1841 * @param[in,out] resource
1842 * Pointer to the modify-header resource.
1844 * Pointer to action specification.
1846 * Attributes of flow that includes this item.
1848 * Pointer to the error structure.
1851 * 0 on success, a negative errno value otherwise and rte_errno is set.
1854 flow_dv_convert_action_modify_field
1855 (struct rte_eth_dev *dev,
1856 struct mlx5_flow_dv_modify_hdr_resource *resource,
1857 const struct rte_flow_action *action,
1858 const struct rte_flow_attr *attr,
1859 struct rte_flow_error *error)
1861 const struct rte_flow_action_modify_field *conf =
1862 (const struct rte_flow_action_modify_field *)(action->conf);
1863 struct rte_flow_item item = {
1867 struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1869 struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1871 uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1875 if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1876 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1877 type = MLX5_MODIFICATION_TYPE_SET;
1878 /** For SET fill the destination field (field) first. */
1879 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1880 conf->width, &shift, dev,
1882 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1883 (void *)(uintptr_t)conf->src.pvalue :
1884 (void *)(uintptr_t)&conf->src.value;
1886 type = MLX5_MODIFICATION_TYPE_COPY;
1887 /** For COPY fill the destination field (dcopy) without mask. */
1888 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1889 conf->width, &shift, dev,
1891 /** Then construct the source field (field) with mask. */
1892 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1893 conf->width, &shift,
1897 return flow_dv_convert_modify_action(&item,
1898 field, dcopy, resource, type, error);
1902 * Validate MARK item.
1905 * Pointer to the rte_eth_dev structure.
1907 * Item specification.
1909 * Attributes of flow that includes this item.
1911 * Pointer to error structure.
1914 * 0 on success, a negative errno value otherwise and rte_errno is set.
1917 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1918 const struct rte_flow_item *item,
1919 const struct rte_flow_attr *attr __rte_unused,
1920 struct rte_flow_error *error)
1922 struct mlx5_priv *priv = dev->data->dev_private;
1923 struct mlx5_dev_config *config = &priv->config;
1924 const struct rte_flow_item_mark *spec = item->spec;
1925 const struct rte_flow_item_mark *mask = item->mask;
1926 const struct rte_flow_item_mark nic_mask = {
1927 .id = priv->sh->dv_mark_mask,
1931 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1932 return rte_flow_error_set(error, ENOTSUP,
1933 RTE_FLOW_ERROR_TYPE_ITEM, item,
1934 "extended metadata feature"
1936 if (!mlx5_flow_ext_mreg_supported(dev))
1937 return rte_flow_error_set(error, ENOTSUP,
1938 RTE_FLOW_ERROR_TYPE_ITEM, item,
1939 "extended metadata register"
1940 " isn't supported");
1942 return rte_flow_error_set(error, ENOTSUP,
1943 RTE_FLOW_ERROR_TYPE_ITEM, item,
1944 "extended metadata register"
1945 " isn't available");
1946 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1950 return rte_flow_error_set(error, EINVAL,
1951 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1953 "data cannot be empty");
1954 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1955 return rte_flow_error_set(error, EINVAL,
1956 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1958 "mark id exceeds the limit");
1962 return rte_flow_error_set(error, EINVAL,
1963 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1964 "mask cannot be zero");
1966 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1967 (const uint8_t *)&nic_mask,
1968 sizeof(struct rte_flow_item_mark),
1969 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1976 * Validate META item.
1979 * Pointer to the rte_eth_dev structure.
1981 * Item specification.
1983 * Attributes of flow that includes this item.
1985 * Pointer to error structure.
1988 * 0 on success, a negative errno value otherwise and rte_errno is set.
1991 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1992 const struct rte_flow_item *item,
1993 const struct rte_flow_attr *attr,
1994 struct rte_flow_error *error)
1996 struct mlx5_priv *priv = dev->data->dev_private;
1997 struct mlx5_dev_config *config = &priv->config;
1998 const struct rte_flow_item_meta *spec = item->spec;
1999 const struct rte_flow_item_meta *mask = item->mask;
2000 struct rte_flow_item_meta nic_mask = {
2007 return rte_flow_error_set(error, EINVAL,
2008 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2010 "data cannot be empty");
2011 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2012 if (!mlx5_flow_ext_mreg_supported(dev))
2013 return rte_flow_error_set(error, ENOTSUP,
2014 RTE_FLOW_ERROR_TYPE_ITEM, item,
2015 "extended metadata register"
2016 " isn't supported");
2017 reg = flow_dv_get_metadata_reg(dev, attr, error);
2021 return rte_flow_error_set(error, ENOTSUP,
2022 RTE_FLOW_ERROR_TYPE_ITEM, item,
2023 "unavalable extended metadata register");
2025 return rte_flow_error_set(error, ENOTSUP,
2026 RTE_FLOW_ERROR_TYPE_ITEM, item,
2030 nic_mask.data = priv->sh->dv_meta_mask;
2033 return rte_flow_error_set(error, ENOTSUP,
2034 RTE_FLOW_ERROR_TYPE_ITEM, item,
2035 "extended metadata feature "
2036 "should be enabled when "
2037 "meta item is requested "
2038 "with e-switch mode ");
2040 return rte_flow_error_set(error, ENOTSUP,
2041 RTE_FLOW_ERROR_TYPE_ITEM, item,
2042 "match on metadata for ingress "
2043 "is not supported in legacy "
2047 mask = &rte_flow_item_meta_mask;
2049 return rte_flow_error_set(error, EINVAL,
2050 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2051 "mask cannot be zero");
2053 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2054 (const uint8_t *)&nic_mask,
2055 sizeof(struct rte_flow_item_meta),
2056 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2061 * Validate TAG item.
2064 * Pointer to the rte_eth_dev structure.
2066 * Item specification.
2068 * Attributes of flow that includes this item.
2070 * Pointer to error structure.
2073 * 0 on success, a negative errno value otherwise and rte_errno is set.
2076 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2077 const struct rte_flow_item *item,
2078 const struct rte_flow_attr *attr __rte_unused,
2079 struct rte_flow_error *error)
2081 const struct rte_flow_item_tag *spec = item->spec;
2082 const struct rte_flow_item_tag *mask = item->mask;
2083 const struct rte_flow_item_tag nic_mask = {
2084 .data = RTE_BE32(UINT32_MAX),
2089 if (!mlx5_flow_ext_mreg_supported(dev))
2090 return rte_flow_error_set(error, ENOTSUP,
2091 RTE_FLOW_ERROR_TYPE_ITEM, item,
2092 "extensive metadata register"
2093 " isn't supported");
2095 return rte_flow_error_set(error, EINVAL,
2096 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2098 "data cannot be empty");
2100 mask = &rte_flow_item_tag_mask;
2102 return rte_flow_error_set(error, EINVAL,
2103 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2104 "mask cannot be zero");
2106 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2107 (const uint8_t *)&nic_mask,
2108 sizeof(struct rte_flow_item_tag),
2109 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2112 if (mask->index != 0xff)
2113 return rte_flow_error_set(error, EINVAL,
2114 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2115 "partial mask for tag index"
2116 " is not supported");
2117 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2120 MLX5_ASSERT(ret != REG_NON);
2125 * Validate vport item.
2128 * Pointer to the rte_eth_dev structure.
2130 * Item specification.
2132 * Attributes of flow that includes this item.
2133 * @param[in] item_flags
2134 * Bit-fields that holds the items detected until now.
2136 * Pointer to error structure.
2139 * 0 on success, a negative errno value otherwise and rte_errno is set.
2142 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2143 const struct rte_flow_item *item,
2144 const struct rte_flow_attr *attr,
2145 uint64_t item_flags,
2146 struct rte_flow_error *error)
2148 const struct rte_flow_item_port_id *spec = item->spec;
2149 const struct rte_flow_item_port_id *mask = item->mask;
2150 const struct rte_flow_item_port_id switch_mask = {
2153 struct mlx5_priv *esw_priv;
2154 struct mlx5_priv *dev_priv;
2157 if (!attr->transfer)
2158 return rte_flow_error_set(error, EINVAL,
2159 RTE_FLOW_ERROR_TYPE_ITEM,
2161 "match on port id is valid only"
2162 " when transfer flag is enabled");
2163 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2164 return rte_flow_error_set(error, ENOTSUP,
2165 RTE_FLOW_ERROR_TYPE_ITEM, item,
2166 "multiple source ports are not"
2169 mask = &switch_mask;
2170 if (mask->id != 0xffffffff)
2171 return rte_flow_error_set(error, ENOTSUP,
2172 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2174 "no support for partial mask on"
2176 ret = mlx5_flow_item_acceptable
2177 (item, (const uint8_t *)mask,
2178 (const uint8_t *)&rte_flow_item_port_id_mask,
2179 sizeof(struct rte_flow_item_port_id),
2180 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2185 if (spec->id == MLX5_PORT_ESW_MGR)
2187 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2189 return rte_flow_error_set(error, rte_errno,
2190 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2191 "failed to obtain E-Switch info for"
2193 dev_priv = mlx5_dev_to_eswitch_info(dev);
2195 return rte_flow_error_set(error, rte_errno,
2196 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2198 "failed to obtain E-Switch info");
2199 if (esw_priv->domain_id != dev_priv->domain_id)
2200 return rte_flow_error_set(error, EINVAL,
2201 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2202 "cannot match on a port from a"
2203 " different E-Switch");
2208 * Validate VLAN item.
2211 * Item specification.
2212 * @param[in] item_flags
2213 * Bit-fields that holds the items detected until now.
2215 * Ethernet device flow is being created on.
2217 * Pointer to error structure.
2220 * 0 on success, a negative errno value otherwise and rte_errno is set.
2223 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2224 uint64_t item_flags,
2225 struct rte_eth_dev *dev,
2226 struct rte_flow_error *error)
2228 const struct rte_flow_item_vlan *mask = item->mask;
2229 const struct rte_flow_item_vlan nic_mask = {
2230 .tci = RTE_BE16(UINT16_MAX),
2231 .inner_type = RTE_BE16(UINT16_MAX),
2234 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2236 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2237 MLX5_FLOW_LAYER_INNER_L4) :
2238 (MLX5_FLOW_LAYER_OUTER_L3 |
2239 MLX5_FLOW_LAYER_OUTER_L4);
2240 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2241 MLX5_FLOW_LAYER_OUTER_VLAN;
2243 if (item_flags & vlanm)
2244 return rte_flow_error_set(error, EINVAL,
2245 RTE_FLOW_ERROR_TYPE_ITEM, item,
2246 "multiple VLAN layers not supported");
2247 else if ((item_flags & l34m) != 0)
2248 return rte_flow_error_set(error, EINVAL,
2249 RTE_FLOW_ERROR_TYPE_ITEM, item,
2250 "VLAN cannot follow L3/L4 layer");
2252 mask = &rte_flow_item_vlan_mask;
2253 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2254 (const uint8_t *)&nic_mask,
2255 sizeof(struct rte_flow_item_vlan),
2256 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2259 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2260 struct mlx5_priv *priv = dev->data->dev_private;
2262 if (priv->vmwa_context) {
2264 * Non-NULL context means we have a virtual machine
2265 * and SR-IOV enabled, we have to create VLAN interface
2266 * to make hypervisor to setup E-Switch vport
2267 * context correctly. We avoid creating the multiple
2268 * VLAN interfaces, so we cannot support VLAN tag mask.
2270 return rte_flow_error_set(error, EINVAL,
2271 RTE_FLOW_ERROR_TYPE_ITEM,
2273 "VLAN tag mask is not"
2274 " supported in virtual"
2282 * GTP flags are contained in 1 byte of the format:
2283 * -------------------------------------------
2284 * | bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
2285 * |-----------------------------------------|
2286 * | value | Version | PT | Res | E | S | PN |
2287 * -------------------------------------------
2289 * Matching is supported only for GTP flags E, S, PN.
2291 #define MLX5_GTP_FLAGS_MASK 0x07
2294 * Validate GTP item.
2297 * Pointer to the rte_eth_dev structure.
2299 * Item specification.
2300 * @param[in] item_flags
2301 * Bit-fields that holds the items detected until now.
2303 * Pointer to error structure.
2306 * 0 on success, a negative errno value otherwise and rte_errno is set.
2309 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2310 const struct rte_flow_item *item,
2311 uint64_t item_flags,
2312 struct rte_flow_error *error)
2314 struct mlx5_priv *priv = dev->data->dev_private;
2315 const struct rte_flow_item_gtp *spec = item->spec;
2316 const struct rte_flow_item_gtp *mask = item->mask;
2317 const struct rte_flow_item_gtp nic_mask = {
2318 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2320 .teid = RTE_BE32(0xffffffff),
2323 if (!priv->config.hca_attr.tunnel_stateless_gtp)
2324 return rte_flow_error_set(error, ENOTSUP,
2325 RTE_FLOW_ERROR_TYPE_ITEM, item,
2326 "GTP support is not enabled");
2327 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2328 return rte_flow_error_set(error, ENOTSUP,
2329 RTE_FLOW_ERROR_TYPE_ITEM, item,
2330 "multiple tunnel layers not"
2332 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2333 return rte_flow_error_set(error, EINVAL,
2334 RTE_FLOW_ERROR_TYPE_ITEM, item,
2335 "no outer UDP layer found");
2337 mask = &rte_flow_item_gtp_mask;
2338 if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2339 return rte_flow_error_set(error, ENOTSUP,
2340 RTE_FLOW_ERROR_TYPE_ITEM, item,
2341 "Match is supported for GTP"
2343 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2344 (const uint8_t *)&nic_mask,
2345 sizeof(struct rte_flow_item_gtp),
2346 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2350 * Validate GTP PSC item.
2353 * Item specification.
2354 * @param[in] last_item
2355 * Previous validated item in the pattern items.
2356 * @param[in] gtp_item
2357 * Previous GTP item specification.
2359 * Pointer to flow attributes.
2361 * Pointer to error structure.
2364 * 0 on success, a negative errno value otherwise and rte_errno is set.
2367 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2369 const struct rte_flow_item *gtp_item,
2370 const struct rte_flow_attr *attr,
2371 struct rte_flow_error *error)
2373 const struct rte_flow_item_gtp *gtp_spec;
2374 const struct rte_flow_item_gtp *gtp_mask;
2375 const struct rte_flow_item_gtp_psc *mask;
2376 const struct rte_flow_item_gtp_psc nic_mask = {
2381 if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2382 return rte_flow_error_set
2383 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2384 "GTP PSC item must be preceded with GTP item");
2385 gtp_spec = gtp_item->spec;
2386 gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2387 /* GTP spec and E flag is requested to match zero. */
2389 (gtp_mask->v_pt_rsv_flags &
2390 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2391 return rte_flow_error_set
2392 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2393 "GTP E flag must be 1 to match GTP PSC");
2394 /* Check the flow is not created in group zero. */
2395 if (!attr->transfer && !attr->group)
2396 return rte_flow_error_set
2397 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2398 "GTP PSC is not supported for group 0");
2399 /* GTP spec is here and E flag is requested to match zero. */
2402 mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2403 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2404 (const uint8_t *)&nic_mask,
2405 sizeof(struct rte_flow_item_gtp_psc),
2406 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2410 * Validate IPV4 item.
2411 * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2412 * add specific validation of fragment_offset field,
2415 * Item specification.
2416 * @param[in] item_flags
2417 * Bit-fields that holds the items detected until now.
2419 * Pointer to error structure.
2422 * 0 on success, a negative errno value otherwise and rte_errno is set.
2425 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2426 const struct rte_flow_item *item,
2427 uint64_t item_flags, uint64_t last_item,
2428 uint16_t ether_type, struct rte_flow_error *error)
2431 struct mlx5_priv *priv = dev->data->dev_private;
2432 const struct rte_flow_item_ipv4 *spec = item->spec;
2433 const struct rte_flow_item_ipv4 *last = item->last;
2434 const struct rte_flow_item_ipv4 *mask = item->mask;
2435 rte_be16_t fragment_offset_spec = 0;
2436 rte_be16_t fragment_offset_last = 0;
2437 struct rte_flow_item_ipv4 nic_ipv4_mask = {
2439 .src_addr = RTE_BE32(0xffffffff),
2440 .dst_addr = RTE_BE32(0xffffffff),
2441 .type_of_service = 0xff,
2442 .fragment_offset = RTE_BE16(0xffff),
2443 .next_proto_id = 0xff,
2444 .time_to_live = 0xff,
2448 if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2449 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2450 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2451 priv->config.hca_attr.inner_ipv4_ihl;
2453 return rte_flow_error_set(error, ENOTSUP,
2454 RTE_FLOW_ERROR_TYPE_ITEM,
2456 "IPV4 ihl offload not supported");
2457 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2459 ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2460 ether_type, &nic_ipv4_mask,
2461 MLX5_ITEM_RANGE_ACCEPTED, error);
2465 fragment_offset_spec = spec->hdr.fragment_offset &
2466 mask->hdr.fragment_offset;
2467 if (!fragment_offset_spec)
2470 * spec and mask are valid, enforce using full mask to make sure the
2471 * complete value is used correctly.
2473 if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2474 != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2475 return rte_flow_error_set(error, EINVAL,
2476 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2477 item, "must use full mask for"
2478 " fragment_offset");
2480 * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2481 * indicating this is 1st fragment of fragmented packet.
2482 * This is not yet supported in MLX5, return appropriate error message.
2484 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2485 return rte_flow_error_set(error, ENOTSUP,
2486 RTE_FLOW_ERROR_TYPE_ITEM, item,
2487 "match on first fragment not "
2489 if (fragment_offset_spec && !last)
2490 return rte_flow_error_set(error, ENOTSUP,
2491 RTE_FLOW_ERROR_TYPE_ITEM, item,
2492 "specified value not supported");
2493 /* spec and last are valid, validate the specified range. */
2494 fragment_offset_last = last->hdr.fragment_offset &
2495 mask->hdr.fragment_offset;
2497 * Match on fragment_offset spec 0x2001 and last 0x3fff
2498 * means MF is 1 and frag-offset is > 0.
2499 * This packet is fragment 2nd and onward, excluding last.
2500 * This is not yet supported in MLX5, return appropriate
2503 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2504 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2505 return rte_flow_error_set(error, ENOTSUP,
2506 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2507 last, "match on following "
2508 "fragments not supported");
2510 * Match on fragment_offset spec 0x0001 and last 0x1fff
2511 * means MF is 0 and frag-offset is > 0.
2512 * This packet is last fragment of fragmented packet.
2513 * This is not yet supported in MLX5, return appropriate
2516 if (fragment_offset_spec == RTE_BE16(1) &&
2517 fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2518 return rte_flow_error_set(error, ENOTSUP,
2519 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2520 last, "match on last "
2521 "fragment not supported");
2523 * Match on fragment_offset spec 0x0001 and last 0x3fff
2524 * means MF and/or frag-offset is not 0.
2525 * This is a fragmented packet.
2526 * Other range values are invalid and rejected.
2528 if (!(fragment_offset_spec == RTE_BE16(1) &&
2529 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2530 return rte_flow_error_set(error, ENOTSUP,
2531 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2532 "specified range not supported");
2537 * Validate IPV6 fragment extension item.
2540 * Item specification.
2541 * @param[in] item_flags
2542 * Bit-fields that holds the items detected until now.
2544 * Pointer to error structure.
2547 * 0 on success, a negative errno value otherwise and rte_errno is set.
2550 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2551 uint64_t item_flags,
2552 struct rte_flow_error *error)
2554 const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2555 const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2556 const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2557 rte_be16_t frag_data_spec = 0;
2558 rte_be16_t frag_data_last = 0;
2559 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2560 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2561 MLX5_FLOW_LAYER_OUTER_L4;
2563 struct rte_flow_item_ipv6_frag_ext nic_mask = {
2565 .next_header = 0xff,
2566 .frag_data = RTE_BE16(0xffff),
2570 if (item_flags & l4m)
2571 return rte_flow_error_set(error, EINVAL,
2572 RTE_FLOW_ERROR_TYPE_ITEM, item,
2573 "ipv6 fragment extension item cannot "
2575 if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2576 (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2577 return rte_flow_error_set(error, EINVAL,
2578 RTE_FLOW_ERROR_TYPE_ITEM, item,
2579 "ipv6 fragment extension item must "
2580 "follow ipv6 item");
2582 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2583 if (!frag_data_spec)
2586 * spec and mask are valid, enforce using full mask to make sure the
2587 * complete value is used correctly.
2589 if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2590 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2591 return rte_flow_error_set(error, EINVAL,
2592 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2593 item, "must use full mask for"
2596 * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2597 * This is 1st fragment of fragmented packet.
2599 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2600 return rte_flow_error_set(error, ENOTSUP,
2601 RTE_FLOW_ERROR_TYPE_ITEM, item,
2602 "match on first fragment not "
2604 if (frag_data_spec && !last)
2605 return rte_flow_error_set(error, EINVAL,
2606 RTE_FLOW_ERROR_TYPE_ITEM, item,
2607 "specified value not supported");
2608 ret = mlx5_flow_item_acceptable
2609 (item, (const uint8_t *)mask,
2610 (const uint8_t *)&nic_mask,
2611 sizeof(struct rte_flow_item_ipv6_frag_ext),
2612 MLX5_ITEM_RANGE_ACCEPTED, error);
2615 /* spec and last are valid, validate the specified range. */
2616 frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2618 * Match on frag_data spec 0x0009 and last 0xfff9
2619 * means M is 1 and frag-offset is > 0.
2620 * This packet is fragment 2nd and onward, excluding last.
2621 * This is not yet supported in MLX5, return appropriate
2624 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2625 RTE_IPV6_EHDR_MF_MASK) &&
2626 frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2627 return rte_flow_error_set(error, ENOTSUP,
2628 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2629 last, "match on following "
2630 "fragments not supported");
2632 * Match on frag_data spec 0x0008 and last 0xfff8
2633 * means M is 0 and frag-offset is > 0.
2634 * This packet is last fragment of fragmented packet.
2635 * This is not yet supported in MLX5, return appropriate
2638 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2639 frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2640 return rte_flow_error_set(error, ENOTSUP,
2641 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2642 last, "match on last "
2643 "fragment not supported");
2644 /* Other range values are invalid and rejected. */
2645 return rte_flow_error_set(error, EINVAL,
2646 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2647 "specified range not supported");
2651 * Validate ASO CT item.
2654 * Pointer to the rte_eth_dev structure.
2656 * Item specification.
2657 * @param[in] item_flags
2658 * Pointer to bit-fields that holds the items detected until now.
2660 * Pointer to error structure.
2663 * 0 on success, a negative errno value otherwise and rte_errno is set.
2666 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2667 const struct rte_flow_item *item,
2668 uint64_t *item_flags,
2669 struct rte_flow_error *error)
2671 const struct rte_flow_item_conntrack *spec = item->spec;
2672 const struct rte_flow_item_conntrack *mask = item->mask;
2676 if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2677 return rte_flow_error_set(error, EINVAL,
2678 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2679 "Only one CT is supported");
2681 mask = &rte_flow_item_conntrack_mask;
2682 flags = spec->flags & mask->flags;
2683 if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2684 ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2685 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2686 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2687 return rte_flow_error_set(error, EINVAL,
2688 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2689 "Conflict status bits");
2690 /* State change also needs to be considered. */
2691 *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2696 * Validate the pop VLAN action.
2699 * Pointer to the rte_eth_dev structure.
2700 * @param[in] action_flags
2701 * Holds the actions detected until now.
2703 * Pointer to the pop vlan action.
2704 * @param[in] item_flags
2705 * The items found in this flow rule.
2707 * Pointer to flow attributes.
2709 * Pointer to error structure.
2712 * 0 on success, a negative errno value otherwise and rte_errno is set.
2715 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2716 uint64_t action_flags,
2717 const struct rte_flow_action *action,
2718 uint64_t item_flags,
2719 const struct rte_flow_attr *attr,
2720 struct rte_flow_error *error)
2722 const struct mlx5_priv *priv = dev->data->dev_private;
2723 struct mlx5_dev_ctx_shared *sh = priv->sh;
2724 bool direction_error = false;
2726 if (!priv->sh->pop_vlan_action)
2727 return rte_flow_error_set(error, ENOTSUP,
2728 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2730 "pop vlan action is not supported");
2731 /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2732 if (attr->transfer) {
2733 bool fdb_tx = priv->representor_id != UINT16_MAX;
2734 bool is_cx5 = sh->steering_format_version ==
2735 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2737 if (fdb_tx && is_cx5)
2738 direction_error = true;
2739 } else if (attr->egress) {
2740 direction_error = true;
2742 if (direction_error)
2743 return rte_flow_error_set(error, ENOTSUP,
2744 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2746 "pop vlan action not supported for egress");
2747 if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2748 return rte_flow_error_set(error, ENOTSUP,
2749 RTE_FLOW_ERROR_TYPE_ACTION, action,
2750 "no support for multiple VLAN "
2752 /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2753 if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2754 !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2755 return rte_flow_error_set(error, ENOTSUP,
2756 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2758 "cannot pop vlan after decap without "
2759 "match on inner vlan in the flow");
2760 /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2761 if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2762 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2763 return rte_flow_error_set(error, ENOTSUP,
2764 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2766 "cannot pop vlan without a "
2767 "match on (outer) vlan in the flow");
2768 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2769 return rte_flow_error_set(error, EINVAL,
2770 RTE_FLOW_ERROR_TYPE_ACTION, action,
2771 "wrong action order, port_id should "
2772 "be after pop VLAN action");
2773 if (!attr->transfer && priv->representor)
2774 return rte_flow_error_set(error, ENOTSUP,
2775 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2776 "pop vlan action for VF representor "
2777 "not supported on NIC table");
2782 * Get VLAN default info from vlan match info.
2785 * the list of item specifications.
2787 * pointer VLAN info to fill to.
2790 * 0 on success, a negative errno value otherwise and rte_errno is set.
2793 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2794 struct rte_vlan_hdr *vlan)
2796 const struct rte_flow_item_vlan nic_mask = {
2797 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2798 MLX5DV_FLOW_VLAN_VID_MASK),
2799 .inner_type = RTE_BE16(0xffff),
2804 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2805 int type = items->type;
2807 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2808 type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2811 if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2812 const struct rte_flow_item_vlan *vlan_m = items->mask;
2813 const struct rte_flow_item_vlan *vlan_v = items->spec;
2815 /* If VLAN item in pattern doesn't contain data, return here. */
2820 /* Only full match values are accepted */
2821 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2822 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2823 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2825 rte_be_to_cpu_16(vlan_v->tci &
2826 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2828 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2829 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2830 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2832 rte_be_to_cpu_16(vlan_v->tci &
2833 MLX5DV_FLOW_VLAN_VID_MASK_BE);
2835 if (vlan_m->inner_type == nic_mask.inner_type)
2836 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2837 vlan_m->inner_type);
2842 * Validate the push VLAN action.
2845 * Pointer to the rte_eth_dev structure.
2846 * @param[in] action_flags
2847 * Holds the actions detected until now.
2848 * @param[in] item_flags
2849 * The items found in this flow rule.
2851 * Pointer to the action structure.
2853 * Pointer to flow attributes
2855 * Pointer to error structure.
2858 * 0 on success, a negative errno value otherwise and rte_errno is set.
2861 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2862 uint64_t action_flags,
2863 const struct rte_flow_item_vlan *vlan_m,
2864 const struct rte_flow_action *action,
2865 const struct rte_flow_attr *attr,
2866 struct rte_flow_error *error)
2868 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2869 const struct mlx5_priv *priv = dev->data->dev_private;
2870 struct mlx5_dev_ctx_shared *sh = priv->sh;
2871 bool direction_error = false;
2873 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2874 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2875 return rte_flow_error_set(error, EINVAL,
2876 RTE_FLOW_ERROR_TYPE_ACTION, action,
2877 "invalid vlan ethertype");
2878 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2879 return rte_flow_error_set(error, EINVAL,
2880 RTE_FLOW_ERROR_TYPE_ACTION, action,
2881 "wrong action order, port_id should "
2882 "be after push VLAN");
2883 /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2884 if (attr->transfer) {
2885 bool fdb_tx = priv->representor_id != UINT16_MAX;
2886 bool is_cx5 = sh->steering_format_version ==
2887 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2889 if (!fdb_tx && is_cx5)
2890 direction_error = true;
2891 } else if (attr->ingress) {
2892 direction_error = true;
2894 if (direction_error)
2895 return rte_flow_error_set(error, ENOTSUP,
2896 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2898 "push vlan action not supported for ingress");
2899 if (!attr->transfer && priv->representor)
2900 return rte_flow_error_set(error, ENOTSUP,
2901 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2902 "push vlan action for VF representor "
2903 "not supported on NIC table");
2905 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2906 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2907 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2908 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2909 !(mlx5_flow_find_action
2910 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2911 return rte_flow_error_set(error, EINVAL,
2912 RTE_FLOW_ERROR_TYPE_ACTION, action,
2913 "not full match mask on VLAN PCP and "
2914 "there is no of_set_vlan_pcp action, "
2915 "push VLAN action cannot figure out "
2918 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2919 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2920 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2921 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2922 !(mlx5_flow_find_action
2923 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2924 return rte_flow_error_set(error, EINVAL,
2925 RTE_FLOW_ERROR_TYPE_ACTION, action,
2926 "not full match mask on VLAN VID and "
2927 "there is no of_set_vlan_vid action, "
2928 "push VLAN action cannot figure out "
2935 * Validate the set VLAN PCP.
2937 * @param[in] action_flags
2938 * Holds the actions detected until now.
2939 * @param[in] actions
2940 * Pointer to the list of actions remaining in the flow rule.
2942 * Pointer to error structure.
2945 * 0 on success, a negative errno value otherwise and rte_errno is set.
2948 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2949 const struct rte_flow_action actions[],
2950 struct rte_flow_error *error)
2952 const struct rte_flow_action *action = actions;
2953 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2955 if (conf->vlan_pcp > 7)
2956 return rte_flow_error_set(error, EINVAL,
2957 RTE_FLOW_ERROR_TYPE_ACTION, action,
2958 "VLAN PCP value is too big");
2959 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2960 return rte_flow_error_set(error, ENOTSUP,
2961 RTE_FLOW_ERROR_TYPE_ACTION, action,
2962 "set VLAN PCP action must follow "
2963 "the push VLAN action");
2964 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2965 return rte_flow_error_set(error, ENOTSUP,
2966 RTE_FLOW_ERROR_TYPE_ACTION, action,
2967 "Multiple VLAN PCP modification are "
2969 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2970 return rte_flow_error_set(error, EINVAL,
2971 RTE_FLOW_ERROR_TYPE_ACTION, action,
2972 "wrong action order, port_id should "
2973 "be after set VLAN PCP");
2978 * Validate the set VLAN VID.
2980 * @param[in] item_flags
2981 * Holds the items detected in this rule.
2982 * @param[in] action_flags
2983 * Holds the actions detected until now.
2984 * @param[in] actions
2985 * Pointer to the list of actions remaining in the flow rule.
2987 * Pointer to error structure.
2990 * 0 on success, a negative errno value otherwise and rte_errno is set.
2993 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2994 uint64_t action_flags,
2995 const struct rte_flow_action actions[],
2996 struct rte_flow_error *error)
2998 const struct rte_flow_action *action = actions;
2999 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3001 if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3002 return rte_flow_error_set(error, EINVAL,
3003 RTE_FLOW_ERROR_TYPE_ACTION, action,
3004 "VLAN VID value is too big");
3005 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3006 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3007 return rte_flow_error_set(error, ENOTSUP,
3008 RTE_FLOW_ERROR_TYPE_ACTION, action,
3009 "set VLAN VID action must follow push"
3010 " VLAN action or match on VLAN item");
3011 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3012 return rte_flow_error_set(error, ENOTSUP,
3013 RTE_FLOW_ERROR_TYPE_ACTION, action,
3014 "Multiple VLAN VID modifications are "
3016 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3017 return rte_flow_error_set(error, EINVAL,
3018 RTE_FLOW_ERROR_TYPE_ACTION, action,
3019 "wrong action order, port_id should "
3020 "be after set VLAN VID");
3025 * Validate the FLAG action.
3028 * Pointer to the rte_eth_dev structure.
3029 * @param[in] action_flags
3030 * Holds the actions detected until now.
3032 * Pointer to flow attributes
3034 * Pointer to error structure.
3037 * 0 on success, a negative errno value otherwise and rte_errno is set.
3040 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3041 uint64_t action_flags,
3042 const struct rte_flow_attr *attr,
3043 struct rte_flow_error *error)
3045 struct mlx5_priv *priv = dev->data->dev_private;
3046 struct mlx5_dev_config *config = &priv->config;
3049 /* Fall back if no extended metadata register support. */
3050 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3051 return mlx5_flow_validate_action_flag(action_flags, attr,
3053 /* Extensive metadata mode requires registers. */
3054 if (!mlx5_flow_ext_mreg_supported(dev))
3055 return rte_flow_error_set(error, ENOTSUP,
3056 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3057 "no metadata registers "
3058 "to support flag action");
3059 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3060 return rte_flow_error_set(error, ENOTSUP,
3061 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3062 "extended metadata register"
3063 " isn't available");
3064 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3067 MLX5_ASSERT(ret > 0);
3068 if (action_flags & MLX5_FLOW_ACTION_MARK)
3069 return rte_flow_error_set(error, EINVAL,
3070 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3071 "can't mark and flag in same flow");
3072 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3073 return rte_flow_error_set(error, EINVAL,
3074 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3076 " actions in same flow");
3081 * Validate MARK action.
3084 * Pointer to the rte_eth_dev structure.
3086 * Pointer to action.
3087 * @param[in] action_flags
3088 * Holds the actions detected until now.
3090 * Pointer to flow attributes
3092 * Pointer to error structure.
3095 * 0 on success, a negative errno value otherwise and rte_errno is set.
3098 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3099 const struct rte_flow_action *action,
3100 uint64_t action_flags,
3101 const struct rte_flow_attr *attr,
3102 struct rte_flow_error *error)
3104 struct mlx5_priv *priv = dev->data->dev_private;
3105 struct mlx5_dev_config *config = &priv->config;
3106 const struct rte_flow_action_mark *mark = action->conf;
3109 if (is_tunnel_offload_active(dev))
3110 return rte_flow_error_set(error, ENOTSUP,
3111 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3113 "if tunnel offload active");
3114 /* Fall back if no extended metadata register support. */
3115 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3116 return mlx5_flow_validate_action_mark(action, action_flags,
3118 /* Extensive metadata mode requires registers. */
3119 if (!mlx5_flow_ext_mreg_supported(dev))
3120 return rte_flow_error_set(error, ENOTSUP,
3121 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3122 "no metadata registers "
3123 "to support mark action");
3124 if (!priv->sh->dv_mark_mask)
3125 return rte_flow_error_set(error, ENOTSUP,
3126 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3127 "extended metadata register"
3128 " isn't available");
3129 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3132 MLX5_ASSERT(ret > 0);
3134 return rte_flow_error_set(error, EINVAL,
3135 RTE_FLOW_ERROR_TYPE_ACTION, action,
3136 "configuration cannot be null");
3137 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3138 return rte_flow_error_set(error, EINVAL,
3139 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3141 "mark id exceeds the limit");
3142 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3143 return rte_flow_error_set(error, EINVAL,
3144 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3145 "can't flag and mark in same flow");
3146 if (action_flags & MLX5_FLOW_ACTION_MARK)
3147 return rte_flow_error_set(error, EINVAL,
3148 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3149 "can't have 2 mark actions in same"
3155 * Validate SET_META action.
3158 * Pointer to the rte_eth_dev structure.
3160 * Pointer to the action structure.
3161 * @param[in] action_flags
3162 * Holds the actions detected until now.
3164 * Pointer to flow attributes
3166 * Pointer to error structure.
3169 * 0 on success, a negative errno value otherwise and rte_errno is set.
3172 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3173 const struct rte_flow_action *action,
3174 uint64_t action_flags __rte_unused,
3175 const struct rte_flow_attr *attr,
3176 struct rte_flow_error *error)
3178 struct mlx5_priv *priv = dev->data->dev_private;
3179 struct mlx5_dev_config *config = &priv->config;
3180 const struct rte_flow_action_set_meta *conf;
3181 uint32_t nic_mask = UINT32_MAX;
3184 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3185 !mlx5_flow_ext_mreg_supported(dev))
3186 return rte_flow_error_set(error, ENOTSUP,
3187 RTE_FLOW_ERROR_TYPE_ACTION, action,
3188 "extended metadata register"
3189 " isn't supported");
3190 reg = flow_dv_get_metadata_reg(dev, attr, error);
3194 return rte_flow_error_set(error, ENOTSUP,
3195 RTE_FLOW_ERROR_TYPE_ACTION, action,
3196 "unavalable extended metadata register");
3197 if (reg != REG_A && reg != REG_B) {
3198 struct mlx5_priv *priv = dev->data->dev_private;
3200 nic_mask = priv->sh->dv_meta_mask;
3202 if (!(action->conf))
3203 return rte_flow_error_set(error, EINVAL,
3204 RTE_FLOW_ERROR_TYPE_ACTION, action,
3205 "configuration cannot be null");
3206 conf = (const struct rte_flow_action_set_meta *)action->conf;
3208 return rte_flow_error_set(error, EINVAL,
3209 RTE_FLOW_ERROR_TYPE_ACTION, action,
3210 "zero mask doesn't have any effect");
3211 if (conf->mask & ~nic_mask)
3212 return rte_flow_error_set(error, EINVAL,
3213 RTE_FLOW_ERROR_TYPE_ACTION, action,
3214 "meta data must be within reg C0");
3219 * Validate SET_TAG action.
3222 * Pointer to the rte_eth_dev structure.
3224 * Pointer to the action structure.
3225 * @param[in] action_flags
3226 * Holds the actions detected until now.
3228 * Pointer to flow attributes
3230 * Pointer to error structure.
3233 * 0 on success, a negative errno value otherwise and rte_errno is set.
3236 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3237 const struct rte_flow_action *action,
3238 uint64_t action_flags,
3239 const struct rte_flow_attr *attr,
3240 struct rte_flow_error *error)
3242 const struct rte_flow_action_set_tag *conf;
3243 const uint64_t terminal_action_flags =
3244 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3245 MLX5_FLOW_ACTION_RSS;
3248 if (!mlx5_flow_ext_mreg_supported(dev))
3249 return rte_flow_error_set(error, ENOTSUP,
3250 RTE_FLOW_ERROR_TYPE_ACTION, action,
3251 "extensive metadata register"
3252 " isn't supported");
3253 if (!(action->conf))
3254 return rte_flow_error_set(error, EINVAL,
3255 RTE_FLOW_ERROR_TYPE_ACTION, action,
3256 "configuration cannot be null");
3257 conf = (const struct rte_flow_action_set_tag *)action->conf;
3259 return rte_flow_error_set(error, EINVAL,
3260 RTE_FLOW_ERROR_TYPE_ACTION, action,
3261 "zero mask doesn't have any effect");
3262 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3265 if (!attr->transfer && attr->ingress &&
3266 (action_flags & terminal_action_flags))
3267 return rte_flow_error_set(error, EINVAL,
3268 RTE_FLOW_ERROR_TYPE_ACTION, action,
3269 "set_tag has no effect"
3270 " with terminal actions");
3275 * Validate count action.
3278 * Pointer to rte_eth_dev structure.
3280 * Indicator if action is shared.
3281 * @param[in] action_flags
3282 * Holds the actions detected until now.
3284 * Pointer to error structure.
3287 * 0 on success, a negative errno value otherwise and rte_errno is set.
3290 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3291 uint64_t action_flags,
3292 struct rte_flow_error *error)
3294 struct mlx5_priv *priv = dev->data->dev_private;
3296 if (!priv->sh->devx)
3298 if (action_flags & MLX5_FLOW_ACTION_COUNT)
3299 return rte_flow_error_set(error, EINVAL,
3300 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3301 "duplicate count actions set");
3302 if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3303 !priv->sh->flow_hit_aso_en)
3304 return rte_flow_error_set(error, EINVAL,
3305 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3306 "old age and shared count combination is not supported");
3307 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3311 return rte_flow_error_set
3313 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3315 "count action not supported");
3319 * Validate the L2 encap action.
3322 * Pointer to the rte_eth_dev structure.
3323 * @param[in] action_flags
3324 * Holds the actions detected until now.
3326 * Pointer to the action structure.
3328 * Pointer to flow attributes.
3330 * Pointer to error structure.
3333 * 0 on success, a negative errno value otherwise and rte_errno is set.
3336 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3337 uint64_t action_flags,
3338 const struct rte_flow_action *action,
3339 const struct rte_flow_attr *attr,
3340 struct rte_flow_error *error)
3342 const struct mlx5_priv *priv = dev->data->dev_private;
3344 if (!(action->conf))
3345 return rte_flow_error_set(error, EINVAL,
3346 RTE_FLOW_ERROR_TYPE_ACTION, action,
3347 "configuration cannot be null");
3348 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3349 return rte_flow_error_set(error, EINVAL,
3350 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3351 "can only have a single encap action "
3353 if (!attr->transfer && priv->representor)
3354 return rte_flow_error_set(error, ENOTSUP,
3355 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3356 "encap action for VF representor "
3357 "not supported on NIC table");
3362 * Validate a decap action.
3365 * Pointer to the rte_eth_dev structure.
3366 * @param[in] action_flags
3367 * Holds the actions detected until now.
3369 * Pointer to the action structure.
3370 * @param[in] item_flags
3371 * Holds the items detected.
3373 * Pointer to flow attributes
3375 * Pointer to error structure.
3378 * 0 on success, a negative errno value otherwise and rte_errno is set.
3381 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3382 uint64_t action_flags,
3383 const struct rte_flow_action *action,
3384 const uint64_t item_flags,
3385 const struct rte_flow_attr *attr,
3386 struct rte_flow_error *error)
3388 const struct mlx5_priv *priv = dev->data->dev_private;
3390 if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3391 !priv->config.decap_en)
3392 return rte_flow_error_set(error, ENOTSUP,
3393 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3394 "decap is not enabled");
3395 if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3396 return rte_flow_error_set(error, ENOTSUP,
3397 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3399 MLX5_FLOW_ACTION_DECAP ? "can only "
3400 "have a single decap action" : "decap "
3401 "after encap is not supported");
3402 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3403 return rte_flow_error_set(error, EINVAL,
3404 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3405 "can't have decap action after"
3408 return rte_flow_error_set(error, ENOTSUP,
3409 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3411 "decap action not supported for "
3413 if (!attr->transfer && priv->representor)
3414 return rte_flow_error_set(error, ENOTSUP,
3415 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3416 "decap action for VF representor "
3417 "not supported on NIC table");
3418 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3419 !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3420 return rte_flow_error_set(error, ENOTSUP,
3421 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3422 "VXLAN item should be present for VXLAN decap");
3426 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3429 * Validate the raw encap and decap actions.
3432 * Pointer to the rte_eth_dev structure.
3434 * Pointer to the decap action.
3436 * Pointer to the encap action.
3438 * Pointer to flow attributes
3439 * @param[in/out] action_flags
3440 * Holds the actions detected until now.
3441 * @param[out] actions_n
3442 * pointer to the number of actions counter.
3444 * Pointer to the action structure.
3445 * @param[in] item_flags
3446 * Holds the items detected.
3448 * Pointer to error structure.
3451 * 0 on success, a negative errno value otherwise and rte_errno is set.
3454 flow_dv_validate_action_raw_encap_decap
3455 (struct rte_eth_dev *dev,
3456 const struct rte_flow_action_raw_decap *decap,
3457 const struct rte_flow_action_raw_encap *encap,
3458 const struct rte_flow_attr *attr, uint64_t *action_flags,
3459 int *actions_n, const struct rte_flow_action *action,
3460 uint64_t item_flags, struct rte_flow_error *error)
3462 const struct mlx5_priv *priv = dev->data->dev_private;
3465 if (encap && (!encap->size || !encap->data))
3466 return rte_flow_error_set(error, EINVAL,
3467 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3468 "raw encap data cannot be empty");
3469 if (decap && encap) {
3470 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3471 encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3474 else if (encap->size <=
3475 MLX5_ENCAPSULATION_DECISION_SIZE &&
3477 MLX5_ENCAPSULATION_DECISION_SIZE)
3480 else if (encap->size >
3481 MLX5_ENCAPSULATION_DECISION_SIZE &&
3483 MLX5_ENCAPSULATION_DECISION_SIZE)
3484 /* 2 L2 actions: encap and decap. */
3487 return rte_flow_error_set(error,
3489 RTE_FLOW_ERROR_TYPE_ACTION,
3490 NULL, "unsupported too small "
3491 "raw decap and too small raw "
3492 "encap combination");
3495 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3496 item_flags, attr, error);
3499 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3503 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3504 return rte_flow_error_set(error, ENOTSUP,
3505 RTE_FLOW_ERROR_TYPE_ACTION,
3507 "small raw encap size");
3508 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3509 return rte_flow_error_set(error, EINVAL,
3510 RTE_FLOW_ERROR_TYPE_ACTION,
3512 "more than one encap action");
3513 if (!attr->transfer && priv->representor)
3514 return rte_flow_error_set
3516 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3517 "encap action for VF representor "
3518 "not supported on NIC table");
3519 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3526 * Validate the ASO CT action.
3529 * Pointer to the rte_eth_dev structure.
3530 * @param[in] action_flags
3531 * Holds the actions detected until now.
3532 * @param[in] item_flags
3533 * The items found in this flow rule.
3535 * Pointer to flow attributes.
3537 * Pointer to error structure.
3540 * 0 on success, a negative errno value otherwise and rte_errno is set.
3543 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3544 uint64_t action_flags,
3545 uint64_t item_flags,
3546 const struct rte_flow_attr *attr,
3547 struct rte_flow_error *error)
3551 if (attr->group == 0 && !attr->transfer)
3552 return rte_flow_error_set(error, ENOTSUP,
3553 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3555 "Only support non-root table");
3556 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3557 return rte_flow_error_set(error, ENOTSUP,
3558 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3559 "CT cannot follow a fate action");
3560 if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3561 (action_flags & MLX5_FLOW_ACTION_AGE))
3562 return rte_flow_error_set(error, EINVAL,
3563 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3564 "Only one ASO action is supported");
3565 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3566 return rte_flow_error_set(error, EINVAL,
3567 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3568 "Encap cannot exist before CT");
3569 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3570 return rte_flow_error_set(error, EINVAL,
3571 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3572 "Not a outer TCP packet");
3577 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3578 struct mlx5_list_entry *entry, void *cb_ctx)
3580 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3581 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3582 struct mlx5_flow_dv_encap_decap_resource *resource;
3584 resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3586 if (resource->reformat_type == ctx_resource->reformat_type &&
3587 resource->ft_type == ctx_resource->ft_type &&
3588 resource->flags == ctx_resource->flags &&
3589 resource->size == ctx_resource->size &&
3590 !memcmp((const void *)resource->buf,
3591 (const void *)ctx_resource->buf,
3597 struct mlx5_list_entry *
3598 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3600 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3601 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3602 struct mlx5dv_dr_domain *domain;
3603 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3604 struct mlx5_flow_dv_encap_decap_resource *resource;
3608 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3609 domain = sh->fdb_domain;
3610 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3611 domain = sh->rx_domain;
3613 domain = sh->tx_domain;
3614 /* Register new encap/decap resource. */
3615 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3617 rte_flow_error_set(ctx->error, ENOMEM,
3618 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3619 "cannot allocate resource memory");
3622 *resource = *ctx_resource;
3623 resource->idx = idx;
3624 ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3628 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3629 rte_flow_error_set(ctx->error, ENOMEM,
3630 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3631 NULL, "cannot create action");
3635 return &resource->entry;
3638 struct mlx5_list_entry *
3639 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3642 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3643 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3644 struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3647 cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3649 if (!cache_resource) {
3650 rte_flow_error_set(ctx->error, ENOMEM,
3651 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3652 "cannot allocate resource memory");
3655 memcpy(cache_resource, oentry, sizeof(*cache_resource));
3656 cache_resource->idx = idx;
3657 return &cache_resource->entry;
3661 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3663 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3664 struct mlx5_flow_dv_encap_decap_resource *res =
3665 container_of(entry, typeof(*res), entry);
3667 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3671 * Find existing encap/decap resource or create and register a new one.
3673 * @param[in, out] dev
3674 * Pointer to rte_eth_dev structure.
3675 * @param[in, out] resource
3676 * Pointer to encap/decap resource.
3677 * @parm[in, out] dev_flow
3678 * Pointer to the dev_flow.
3680 * pointer to error structure.
3683 * 0 on success otherwise -errno and errno is set.
3686 flow_dv_encap_decap_resource_register
3687 (struct rte_eth_dev *dev,
3688 struct mlx5_flow_dv_encap_decap_resource *resource,
3689 struct mlx5_flow *dev_flow,
3690 struct rte_flow_error *error)
3692 struct mlx5_priv *priv = dev->data->dev_private;
3693 struct mlx5_dev_ctx_shared *sh = priv->sh;
3694 struct mlx5_list_entry *entry;
3698 uint32_t refmt_type:8;
3700 * Header reformat actions can be shared between
3701 * non-root tables. One bit to indicate non-root
3705 uint32_t reserve:15;
3708 } encap_decap_key = {
3710 .ft_type = resource->ft_type,
3711 .refmt_type = resource->reformat_type,
3712 .is_root = !!dev_flow->dv.group,
3716 struct mlx5_flow_cb_ctx ctx = {
3720 struct mlx5_hlist *encaps_decaps;
3723 encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3725 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3727 flow_dv_encap_decap_create_cb,
3728 flow_dv_encap_decap_match_cb,
3729 flow_dv_encap_decap_remove_cb,
3730 flow_dv_encap_decap_clone_cb,
3731 flow_dv_encap_decap_clone_free_cb);
3732 if (unlikely(!encaps_decaps))
3734 resource->flags = dev_flow->dv.group ? 0 : 1;
3735 key64 = __rte_raw_cksum(&encap_decap_key.v32,
3736 sizeof(encap_decap_key.v32), 0);
3737 if (resource->reformat_type !=
3738 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3740 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3741 entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3744 resource = container_of(entry, typeof(*resource), entry);
3745 dev_flow->dv.encap_decap = resource;
3746 dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3751 * Find existing table jump resource or create and register a new one.
3753 * @param[in, out] dev
3754 * Pointer to rte_eth_dev structure.
3755 * @param[in, out] tbl
3756 * Pointer to flow table resource.
3757 * @parm[in, out] dev_flow
3758 * Pointer to the dev_flow.
3760 * pointer to error structure.
3763 * 0 on success otherwise -errno and errno is set.
3766 flow_dv_jump_tbl_resource_register
3767 (struct rte_eth_dev *dev __rte_unused,
3768 struct mlx5_flow_tbl_resource *tbl,
3769 struct mlx5_flow *dev_flow,
3770 struct rte_flow_error *error __rte_unused)
3772 struct mlx5_flow_tbl_data_entry *tbl_data =
3773 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3776 MLX5_ASSERT(tbl_data->jump.action);
3777 dev_flow->handle->rix_jump = tbl_data->idx;
3778 dev_flow->dv.jump = &tbl_data->jump;
3783 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3784 struct mlx5_list_entry *entry, void *cb_ctx)
3786 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3787 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3788 struct mlx5_flow_dv_port_id_action_resource *res =
3789 container_of(entry, typeof(*res), entry);
3791 return ref->port_id != res->port_id;
3794 struct mlx5_list_entry *
3795 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3797 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3798 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3799 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3800 struct mlx5_flow_dv_port_id_action_resource *resource;
3804 /* Register new port id action resource. */
3805 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3807 rte_flow_error_set(ctx->error, ENOMEM,
3808 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3809 "cannot allocate port_id action memory");
3813 ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3817 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3818 rte_flow_error_set(ctx->error, ENOMEM,
3819 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3820 "cannot create action");
3823 resource->idx = idx;
3824 return &resource->entry;
3827 struct mlx5_list_entry *
3828 flow_dv_port_id_clone_cb(void *tool_ctx,
3829 struct mlx5_list_entry *entry __rte_unused,
3832 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3833 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3834 struct mlx5_flow_dv_port_id_action_resource *resource;
3837 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3839 rte_flow_error_set(ctx->error, ENOMEM,
3840 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3841 "cannot allocate port_id action memory");
3844 memcpy(resource, entry, sizeof(*resource));
3845 resource->idx = idx;
3846 return &resource->entry;
3850 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3852 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3853 struct mlx5_flow_dv_port_id_action_resource *resource =
3854 container_of(entry, typeof(*resource), entry);
3856 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3860 * Find existing table port ID resource or create and register a new one.
3862 * @param[in, out] dev
3863 * Pointer to rte_eth_dev structure.
3864 * @param[in, out] ref
3865 * Pointer to port ID action resource reference.
3866 * @parm[in, out] dev_flow
3867 * Pointer to the dev_flow.
3869 * pointer to error structure.
3872 * 0 on success otherwise -errno and errno is set.
3875 flow_dv_port_id_action_resource_register
3876 (struct rte_eth_dev *dev,
3877 struct mlx5_flow_dv_port_id_action_resource *ref,
3878 struct mlx5_flow *dev_flow,
3879 struct rte_flow_error *error)
3881 struct mlx5_priv *priv = dev->data->dev_private;
3882 struct mlx5_list_entry *entry;
3883 struct mlx5_flow_dv_port_id_action_resource *resource;
3884 struct mlx5_flow_cb_ctx ctx = {
3889 entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3892 resource = container_of(entry, typeof(*resource), entry);
3893 dev_flow->dv.port_id_action = resource;
3894 dev_flow->handle->rix_port_id_action = resource->idx;
3899 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3900 struct mlx5_list_entry *entry, void *cb_ctx)
3902 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3903 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3904 struct mlx5_flow_dv_push_vlan_action_resource *res =
3905 container_of(entry, typeof(*res), entry);
3907 return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3910 struct mlx5_list_entry *
3911 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3913 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3914 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3915 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3916 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3917 struct mlx5dv_dr_domain *domain;
3921 /* Register new port id action resource. */
3922 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3924 rte_flow_error_set(ctx->error, ENOMEM,
3925 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3926 "cannot allocate push_vlan action memory");
3930 if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3931 domain = sh->fdb_domain;
3932 else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3933 domain = sh->rx_domain;
3935 domain = sh->tx_domain;
3936 ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3939 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3940 rte_flow_error_set(ctx->error, ENOMEM,
3941 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3942 "cannot create push vlan action");
3945 resource->idx = idx;
3946 return &resource->entry;
3949 struct mlx5_list_entry *
3950 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3951 struct mlx5_list_entry *entry __rte_unused,
3954 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3955 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3956 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3959 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3961 rte_flow_error_set(ctx->error, ENOMEM,
3962 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3963 "cannot allocate push_vlan action memory");
3966 memcpy(resource, entry, sizeof(*resource));
3967 resource->idx = idx;
3968 return &resource->entry;
3972 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3974 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3975 struct mlx5_flow_dv_push_vlan_action_resource *resource =
3976 container_of(entry, typeof(*resource), entry);
3978 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3982 * Find existing push vlan resource or create and register a new one.
3984 * @param [in, out] dev
3985 * Pointer to rte_eth_dev structure.
3986 * @param[in, out] ref
3987 * Pointer to port ID action resource reference.
3988 * @parm[in, out] dev_flow
3989 * Pointer to the dev_flow.
3991 * pointer to error structure.
3994 * 0 on success otherwise -errno and errno is set.
3997 flow_dv_push_vlan_action_resource_register
3998 (struct rte_eth_dev *dev,
3999 struct mlx5_flow_dv_push_vlan_action_resource *ref,
4000 struct mlx5_flow *dev_flow,
4001 struct rte_flow_error *error)
4003 struct mlx5_priv *priv = dev->data->dev_private;
4004 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4005 struct mlx5_list_entry *entry;
4006 struct mlx5_flow_cb_ctx ctx = {
4011 entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4014 resource = container_of(entry, typeof(*resource), entry);
4016 dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4017 dev_flow->dv.push_vlan_res = resource;
4022 * Get the size of specific rte_flow_item_type hdr size
4024 * @param[in] item_type
4025 * Tested rte_flow_item_type.
4028 * sizeof struct item_type, 0 if void or irrelevant.
4031 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4035 switch (item_type) {
4036 case RTE_FLOW_ITEM_TYPE_ETH:
4037 retval = sizeof(struct rte_ether_hdr);
4039 case RTE_FLOW_ITEM_TYPE_VLAN:
4040 retval = sizeof(struct rte_vlan_hdr);
4042 case RTE_FLOW_ITEM_TYPE_IPV4:
4043 retval = sizeof(struct rte_ipv4_hdr);
4045 case RTE_FLOW_ITEM_TYPE_IPV6:
4046 retval = sizeof(struct rte_ipv6_hdr);
4048 case RTE_FLOW_ITEM_TYPE_UDP:
4049 retval = sizeof(struct rte_udp_hdr);
4051 case RTE_FLOW_ITEM_TYPE_TCP:
4052 retval = sizeof(struct rte_tcp_hdr);
4054 case RTE_FLOW_ITEM_TYPE_VXLAN:
4055 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4056 retval = sizeof(struct rte_vxlan_hdr);
4058 case RTE_FLOW_ITEM_TYPE_GRE:
4059 case RTE_FLOW_ITEM_TYPE_NVGRE:
4060 retval = sizeof(struct rte_gre_hdr);
4062 case RTE_FLOW_ITEM_TYPE_MPLS:
4063 retval = sizeof(struct rte_mpls_hdr);
4065 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4073 #define MLX5_ENCAP_IPV4_VERSION 0x40
4074 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
4075 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
4076 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
4077 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
4078 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
4079 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
4082 * Convert the encap action data from list of rte_flow_item to raw buffer
4085 * Pointer to rte_flow_item objects list.
4087 * Pointer to the output buffer.
4089 * Pointer to the output buffer size.
4091 * Pointer to the error structure.
4094 * 0 on success, a negative errno value otherwise and rte_errno is set.
4097 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4098 size_t *size, struct rte_flow_error *error)
4100 struct rte_ether_hdr *eth = NULL;
4101 struct rte_vlan_hdr *vlan = NULL;
4102 struct rte_ipv4_hdr *ipv4 = NULL;
4103 struct rte_ipv6_hdr *ipv6 = NULL;
4104 struct rte_udp_hdr *udp = NULL;
4105 struct rte_vxlan_hdr *vxlan = NULL;
4106 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4107 struct rte_gre_hdr *gre = NULL;
4109 size_t temp_size = 0;
4112 return rte_flow_error_set(error, EINVAL,
4113 RTE_FLOW_ERROR_TYPE_ACTION,
4114 NULL, "invalid empty data");
4115 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4116 len = flow_dv_get_item_hdr_len(items->type);
4117 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4118 return rte_flow_error_set(error, EINVAL,
4119 RTE_FLOW_ERROR_TYPE_ACTION,
4120 (void *)items->type,
4121 "items total size is too big"
4122 " for encap action");
4123 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4124 switch (items->type) {
4125 case RTE_FLOW_ITEM_TYPE_ETH:
4126 eth = (struct rte_ether_hdr *)&buf[temp_size];
4128 case RTE_FLOW_ITEM_TYPE_VLAN:
4129 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4131 return rte_flow_error_set(error, EINVAL,
4132 RTE_FLOW_ERROR_TYPE_ACTION,
4133 (void *)items->type,
4134 "eth header not found");
4135 if (!eth->ether_type)
4136 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4138 case RTE_FLOW_ITEM_TYPE_IPV4:
4139 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4141 return rte_flow_error_set(error, EINVAL,
4142 RTE_FLOW_ERROR_TYPE_ACTION,
4143 (void *)items->type,
4144 "neither eth nor vlan"
4146 if (vlan && !vlan->eth_proto)
4147 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4148 else if (eth && !eth->ether_type)
4149 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4150 if (!ipv4->version_ihl)
4151 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4152 MLX5_ENCAP_IPV4_IHL_MIN;
4153 if (!ipv4->time_to_live)
4154 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4156 case RTE_FLOW_ITEM_TYPE_IPV6:
4157 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4159 return rte_flow_error_set(error, EINVAL,
4160 RTE_FLOW_ERROR_TYPE_ACTION,
4161 (void *)items->type,
4162 "neither eth nor vlan"
4164 if (vlan && !vlan->eth_proto)
4165 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4166 else if (eth && !eth->ether_type)
4167 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4168 if (!ipv6->vtc_flow)
4170 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4171 if (!ipv6->hop_limits)
4172 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4174 case RTE_FLOW_ITEM_TYPE_UDP:
4175 udp = (struct rte_udp_hdr *)&buf[temp_size];
4177 return rte_flow_error_set(error, EINVAL,
4178 RTE_FLOW_ERROR_TYPE_ACTION,
4179 (void *)items->type,
4180 "ip header not found");
4181 if (ipv4 && !ipv4->next_proto_id)
4182 ipv4->next_proto_id = IPPROTO_UDP;
4183 else if (ipv6 && !ipv6->proto)
4184 ipv6->proto = IPPROTO_UDP;
4186 case RTE_FLOW_ITEM_TYPE_VXLAN:
4187 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4189 return rte_flow_error_set(error, EINVAL,
4190 RTE_FLOW_ERROR_TYPE_ACTION,
4191 (void *)items->type,
4192 "udp header not found");
4194 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4195 if (!vxlan->vx_flags)
4197 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4199 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4200 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4202 return rte_flow_error_set(error, EINVAL,
4203 RTE_FLOW_ERROR_TYPE_ACTION,
4204 (void *)items->type,
4205 "udp header not found");
4206 if (!vxlan_gpe->proto)
4207 return rte_flow_error_set(error, EINVAL,
4208 RTE_FLOW_ERROR_TYPE_ACTION,
4209 (void *)items->type,
4210 "next protocol not found");
4213 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4214 if (!vxlan_gpe->vx_flags)
4215 vxlan_gpe->vx_flags =
4216 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4218 case RTE_FLOW_ITEM_TYPE_GRE:
4219 case RTE_FLOW_ITEM_TYPE_NVGRE:
4220 gre = (struct rte_gre_hdr *)&buf[temp_size];
4222 return rte_flow_error_set(error, EINVAL,
4223 RTE_FLOW_ERROR_TYPE_ACTION,
4224 (void *)items->type,
4225 "next protocol not found");
4227 return rte_flow_error_set(error, EINVAL,
4228 RTE_FLOW_ERROR_TYPE_ACTION,
4229 (void *)items->type,
4230 "ip header not found");
4231 if (ipv4 && !ipv4->next_proto_id)
4232 ipv4->next_proto_id = IPPROTO_GRE;
4233 else if (ipv6 && !ipv6->proto)
4234 ipv6->proto = IPPROTO_GRE;
4236 case RTE_FLOW_ITEM_TYPE_VOID:
4239 return rte_flow_error_set(error, EINVAL,
4240 RTE_FLOW_ERROR_TYPE_ACTION,
4241 (void *)items->type,
4242 "unsupported item type");
4252 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4254 struct rte_ether_hdr *eth = NULL;
4255 struct rte_vlan_hdr *vlan = NULL;
4256 struct rte_ipv6_hdr *ipv6 = NULL;
4257 struct rte_udp_hdr *udp = NULL;
4261 eth = (struct rte_ether_hdr *)data;
4262 next_hdr = (char *)(eth + 1);
4263 proto = RTE_BE16(eth->ether_type);
4266 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4267 vlan = (struct rte_vlan_hdr *)next_hdr;
4268 proto = RTE_BE16(vlan->eth_proto);
4269 next_hdr += sizeof(struct rte_vlan_hdr);
4272 /* HW calculates IPv4 csum. no need to proceed */
4273 if (proto == RTE_ETHER_TYPE_IPV4)
4276 /* non IPv4/IPv6 header. not supported */
4277 if (proto != RTE_ETHER_TYPE_IPV6) {
4278 return rte_flow_error_set(error, ENOTSUP,
4279 RTE_FLOW_ERROR_TYPE_ACTION,
4280 NULL, "Cannot offload non IPv4/IPv6");
4283 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4285 /* ignore non UDP */
4286 if (ipv6->proto != IPPROTO_UDP)
4289 udp = (struct rte_udp_hdr *)(ipv6 + 1);
4290 udp->dgram_cksum = 0;
4296 * Convert L2 encap action to DV specification.
4299 * Pointer to rte_eth_dev structure.
4301 * Pointer to action structure.
4302 * @param[in, out] dev_flow
4303 * Pointer to the mlx5_flow.
4304 * @param[in] transfer
4305 * Mark if the flow is E-Switch flow.
4307 * Pointer to the error structure.
4310 * 0 on success, a negative errno value otherwise and rte_errno is set.
4313 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4314 const struct rte_flow_action *action,
4315 struct mlx5_flow *dev_flow,
4317 struct rte_flow_error *error)
4319 const struct rte_flow_item *encap_data;
4320 const struct rte_flow_action_raw_encap *raw_encap_data;
4321 struct mlx5_flow_dv_encap_decap_resource res = {
4323 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4324 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4325 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4328 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4330 (const struct rte_flow_action_raw_encap *)action->conf;
4331 res.size = raw_encap_data->size;
4332 memcpy(res.buf, raw_encap_data->data, res.size);
4334 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4336 ((const struct rte_flow_action_vxlan_encap *)
4337 action->conf)->definition;
4340 ((const struct rte_flow_action_nvgre_encap *)
4341 action->conf)->definition;
4342 if (flow_dv_convert_encap_data(encap_data, res.buf,
4346 if (flow_dv_zero_encap_udp_csum(res.buf, error))
4348 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4349 return rte_flow_error_set(error, EINVAL,
4350 RTE_FLOW_ERROR_TYPE_ACTION,
4351 NULL, "can't create L2 encap action");
4356 * Convert L2 decap action to DV specification.
4359 * Pointer to rte_eth_dev structure.
4360 * @param[in, out] dev_flow
4361 * Pointer to the mlx5_flow.
4362 * @param[in] transfer
4363 * Mark if the flow is E-Switch flow.
4365 * Pointer to the error structure.
4368 * 0 on success, a negative errno value otherwise and rte_errno is set.
4371 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4372 struct mlx5_flow *dev_flow,
4374 struct rte_flow_error *error)
4376 struct mlx5_flow_dv_encap_decap_resource res = {
4379 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4380 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4381 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4384 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4385 return rte_flow_error_set(error, EINVAL,
4386 RTE_FLOW_ERROR_TYPE_ACTION,
4387 NULL, "can't create L2 decap action");
4392 * Convert raw decap/encap (L3 tunnel) action to DV specification.
4395 * Pointer to rte_eth_dev structure.
4397 * Pointer to action structure.
4398 * @param[in, out] dev_flow
4399 * Pointer to the mlx5_flow.
4401 * Pointer to the flow attributes.
4403 * Pointer to the error structure.
4406 * 0 on success, a negative errno value otherwise and rte_errno is set.
4409 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4410 const struct rte_flow_action *action,
4411 struct mlx5_flow *dev_flow,
4412 const struct rte_flow_attr *attr,
4413 struct rte_flow_error *error)
4415 const struct rte_flow_action_raw_encap *encap_data;
4416 struct mlx5_flow_dv_encap_decap_resource res;
4418 memset(&res, 0, sizeof(res));
4419 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4420 res.size = encap_data->size;
4421 memcpy(res.buf, encap_data->data, res.size);
4422 res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4423 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4424 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4426 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4428 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4429 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4430 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4431 return rte_flow_error_set(error, EINVAL,
4432 RTE_FLOW_ERROR_TYPE_ACTION,
4433 NULL, "can't create encap action");
4438 * Create action push VLAN.
4441 * Pointer to rte_eth_dev structure.
4443 * Pointer to the flow attributes.
4445 * Pointer to the vlan to push to the Ethernet header.
4446 * @param[in, out] dev_flow
4447 * Pointer to the mlx5_flow.
4449 * Pointer to the error structure.
4452 * 0 on success, a negative errno value otherwise and rte_errno is set.
4455 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4456 const struct rte_flow_attr *attr,
4457 const struct rte_vlan_hdr *vlan,
4458 struct mlx5_flow *dev_flow,
4459 struct rte_flow_error *error)
4461 struct mlx5_flow_dv_push_vlan_action_resource res;
4463 memset(&res, 0, sizeof(res));
4465 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4468 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4470 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4471 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4472 return flow_dv_push_vlan_action_resource_register
4473 (dev, &res, dev_flow, error);
4477 * Validate the modify-header actions.
4479 * @param[in] action_flags
4480 * Holds the actions detected until now.
4482 * Pointer to the modify action.
4484 * Pointer to error structure.
4487 * 0 on success, a negative errno value otherwise and rte_errno is set.
4490 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4491 const struct rte_flow_action *action,
4492 struct rte_flow_error *error)
4494 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4495 return rte_flow_error_set(error, EINVAL,
4496 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4497 NULL, "action configuration not set");
4498 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4499 return rte_flow_error_set(error, EINVAL,
4500 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4501 "can't have encap action before"
4507 * Validate the modify-header MAC address actions.
4509 * @param[in] action_flags
4510 * Holds the actions detected until now.
4512 * Pointer to the modify action.
4513 * @param[in] item_flags
4514 * Holds the items detected.
4516 * Pointer to error structure.
4519 * 0 on success, a negative errno value otherwise and rte_errno is set.
4522 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4523 const struct rte_flow_action *action,
4524 const uint64_t item_flags,
4525 struct rte_flow_error *error)
4529 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4531 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4532 return rte_flow_error_set(error, EINVAL,
4533 RTE_FLOW_ERROR_TYPE_ACTION,
4535 "no L2 item in pattern");
4541 * Validate the modify-header IPv4 address actions.
4543 * @param[in] action_flags
4544 * Holds the actions detected until now.
4546 * Pointer to the modify action.
4547 * @param[in] item_flags
4548 * Holds the items detected.
4550 * Pointer to error structure.
4553 * 0 on success, a negative errno value otherwise and rte_errno is set.
4556 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4557 const struct rte_flow_action *action,
4558 const uint64_t item_flags,
4559 struct rte_flow_error *error)
4564 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4566 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4567 MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4568 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4569 if (!(item_flags & layer))
4570 return rte_flow_error_set(error, EINVAL,
4571 RTE_FLOW_ERROR_TYPE_ACTION,
4573 "no ipv4 item in pattern");
4579 * Validate the modify-header IPv6 address actions.
4581 * @param[in] action_flags
4582 * Holds the actions detected until now.
4584 * Pointer to the modify action.
4585 * @param[in] item_flags
4586 * Holds the items detected.
4588 * Pointer to error structure.
4591 * 0 on success, a negative errno value otherwise and rte_errno is set.
4594 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4595 const struct rte_flow_action *action,
4596 const uint64_t item_flags,
4597 struct rte_flow_error *error)
4602 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4604 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4605 MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4606 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4607 if (!(item_flags & layer))
4608 return rte_flow_error_set(error, EINVAL,
4609 RTE_FLOW_ERROR_TYPE_ACTION,
4611 "no ipv6 item in pattern");
4617 * Validate the modify-header TP actions.
4619 * @param[in] action_flags
4620 * Holds the actions detected until now.
4622 * Pointer to the modify action.
4623 * @param[in] item_flags
4624 * Holds the items detected.
4626 * Pointer to error structure.
4629 * 0 on success, a negative errno value otherwise and rte_errno is set.
4632 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4633 const struct rte_flow_action *action,
4634 const uint64_t item_flags,
4635 struct rte_flow_error *error)
4640 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4642 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4643 MLX5_FLOW_LAYER_INNER_L4 :
4644 MLX5_FLOW_LAYER_OUTER_L4;
4645 if (!(item_flags & layer))
4646 return rte_flow_error_set(error, EINVAL,
4647 RTE_FLOW_ERROR_TYPE_ACTION,
4648 NULL, "no transport layer "
4655 * Validate the modify-header actions of increment/decrement
4656 * TCP Sequence-number.
4658 * @param[in] action_flags
4659 * Holds the actions detected until now.
4661 * Pointer to the modify action.
4662 * @param[in] item_flags
4663 * Holds the items detected.
4665 * Pointer to error structure.
4668 * 0 on success, a negative errno value otherwise and rte_errno is set.
4671 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4672 const struct rte_flow_action *action,
4673 const uint64_t item_flags,
4674 struct rte_flow_error *error)
4679 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4681 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4682 MLX5_FLOW_LAYER_INNER_L4_TCP :
4683 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4684 if (!(item_flags & layer))
4685 return rte_flow_error_set(error, EINVAL,
4686 RTE_FLOW_ERROR_TYPE_ACTION,
4687 NULL, "no TCP item in"
4689 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4690 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4691 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4692 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4693 return rte_flow_error_set(error, EINVAL,
4694 RTE_FLOW_ERROR_TYPE_ACTION,
4696 "cannot decrease and increase"
4697 " TCP sequence number"
4698 " at the same time");
4704 * Validate the modify-header actions of increment/decrement
4705 * TCP Acknowledgment number.
4707 * @param[in] action_flags
4708 * Holds the actions detected until now.
4710 * Pointer to the modify action.
4711 * @param[in] item_flags
4712 * Holds the items detected.
4714 * Pointer to error structure.
4717 * 0 on success, a negative errno value otherwise and rte_errno is set.
4720 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4721 const struct rte_flow_action *action,
4722 const uint64_t item_flags,
4723 struct rte_flow_error *error)
4728 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4730 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4731 MLX5_FLOW_LAYER_INNER_L4_TCP :
4732 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4733 if (!(item_flags & layer))
4734 return rte_flow_error_set(error, EINVAL,
4735 RTE_FLOW_ERROR_TYPE_ACTION,
4736 NULL, "no TCP item in"
4738 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4739 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4740 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4741 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4742 return rte_flow_error_set(error, EINVAL,
4743 RTE_FLOW_ERROR_TYPE_ACTION,
4745 "cannot decrease and increase"
4746 " TCP acknowledgment number"
4747 " at the same time");
4753 * Validate the modify-header TTL actions.
4755 * @param[in] action_flags
4756 * Holds the actions detected until now.
4758 * Pointer to the modify action.
4759 * @param[in] item_flags
4760 * Holds the items detected.
4762 * Pointer to error structure.
4765 * 0 on success, a negative errno value otherwise and rte_errno is set.
4768 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4769 const struct rte_flow_action *action,
4770 const uint64_t item_flags,
4771 struct rte_flow_error *error)
4776 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4778 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4779 MLX5_FLOW_LAYER_INNER_L3 :
4780 MLX5_FLOW_LAYER_OUTER_L3;
4781 if (!(item_flags & layer))
4782 return rte_flow_error_set(error, EINVAL,
4783 RTE_FLOW_ERROR_TYPE_ACTION,
4785 "no IP protocol in pattern");
4791 * Validate the generic modify field actions.
4793 * Pointer to the rte_eth_dev structure.
4794 * @param[in] action_flags
4795 * Holds the actions detected until now.
4797 * Pointer to the modify action.
4799 * Pointer to the flow attributes.
4801 * Pointer to error structure.
4804 * Number of header fields to modify (0 or more) on success,
4805 * a negative errno value otherwise and rte_errno is set.
4808 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4809 const uint64_t action_flags,
4810 const struct rte_flow_action *action,
4811 const struct rte_flow_attr *attr,
4812 struct rte_flow_error *error)
4815 struct mlx5_priv *priv = dev->data->dev_private;
4816 struct mlx5_dev_config *config = &priv->config;
4817 const struct rte_flow_action_modify_field *action_modify_field =
4819 uint32_t dst_width = mlx5_flow_item_field_width(dev,
4820 action_modify_field->dst.field,
4822 uint32_t src_width = mlx5_flow_item_field_width(dev,
4823 action_modify_field->src.field,
4824 dst_width, attr, error);
4826 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4830 if (action_modify_field->width == 0)
4831 return rte_flow_error_set(error, EINVAL,
4832 RTE_FLOW_ERROR_TYPE_ACTION, action,
4833 "no bits are requested to be modified");
4834 else if (action_modify_field->width > dst_width ||
4835 action_modify_field->width > src_width)
4836 return rte_flow_error_set(error, EINVAL,
4837 RTE_FLOW_ERROR_TYPE_ACTION, action,
4838 "cannot modify more bits than"
4839 " the width of a field");
4840 if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4841 action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4842 if ((action_modify_field->dst.offset +
4843 action_modify_field->width > dst_width) ||
4844 (action_modify_field->dst.offset % 32))
4845 return rte_flow_error_set(error, EINVAL,
4846 RTE_FLOW_ERROR_TYPE_ACTION, action,
4847 "destination offset is too big"
4848 " or not aligned to 4 bytes");
4849 if (action_modify_field->dst.level &&
4850 action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4851 return rte_flow_error_set(error, ENOTSUP,
4852 RTE_FLOW_ERROR_TYPE_ACTION, action,
4853 "inner header fields modification"
4854 " is not supported");
4856 if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4857 action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4858 if (!attr->transfer && !attr->group)
4859 return rte_flow_error_set(error, ENOTSUP,
4860 RTE_FLOW_ERROR_TYPE_ACTION, action,
4861 "modify field action is not"
4862 " supported for group 0");
4863 if ((action_modify_field->src.offset +
4864 action_modify_field->width > src_width) ||
4865 (action_modify_field->src.offset % 32))
4866 return rte_flow_error_set(error, EINVAL,
4867 RTE_FLOW_ERROR_TYPE_ACTION, action,
4868 "source offset is too big"
4869 " or not aligned to 4 bytes");
4870 if (action_modify_field->src.level &&
4871 action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4872 return rte_flow_error_set(error, ENOTSUP,
4873 RTE_FLOW_ERROR_TYPE_ACTION, action,
4874 "inner header fields modification"
4875 " is not supported");
4877 if ((action_modify_field->dst.field ==
4878 action_modify_field->src.field) &&
4879 (action_modify_field->dst.level ==
4880 action_modify_field->src.level))
4881 return rte_flow_error_set(error, EINVAL,
4882 RTE_FLOW_ERROR_TYPE_ACTION, action,
4883 "source and destination fields"
4884 " cannot be the same");
4885 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4886 action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4887 action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4888 return rte_flow_error_set(error, EINVAL,
4889 RTE_FLOW_ERROR_TYPE_ACTION, action,
4890 "mark, immediate value or a pointer to it"
4891 " cannot be used as a destination");
4892 if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4893 action_modify_field->src.field == RTE_FLOW_FIELD_START)
4894 return rte_flow_error_set(error, ENOTSUP,
4895 RTE_FLOW_ERROR_TYPE_ACTION, action,
4896 "modifications of an arbitrary"
4897 " place in a packet is not supported");
4898 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4899 action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4900 return rte_flow_error_set(error, ENOTSUP,
4901 RTE_FLOW_ERROR_TYPE_ACTION, action,
4902 "modifications of the 802.1Q Tag"
4903 " Identifier is not supported");
4904 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4905 action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4906 return rte_flow_error_set(error, ENOTSUP,
4907 RTE_FLOW_ERROR_TYPE_ACTION, action,
4908 "modifications of the VXLAN Network"
4909 " Identifier is not supported");
4910 if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4911 action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4912 return rte_flow_error_set(error, ENOTSUP,
4913 RTE_FLOW_ERROR_TYPE_ACTION, action,
4914 "modifications of the GENEVE Network"
4915 " Identifier is not supported");
4916 if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4917 action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4918 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4919 !mlx5_flow_ext_mreg_supported(dev))
4920 return rte_flow_error_set(error, ENOTSUP,
4921 RTE_FLOW_ERROR_TYPE_ACTION, action,
4922 "cannot modify mark in legacy mode"
4923 " or without extensive registers");
4924 if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4925 action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4926 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4927 !mlx5_flow_ext_mreg_supported(dev))
4928 return rte_flow_error_set(error, ENOTSUP,
4929 RTE_FLOW_ERROR_TYPE_ACTION, action,
4930 "cannot modify meta without"
4931 " extensive registers support");
4932 ret = flow_dv_get_metadata_reg(dev, attr, error);
4933 if (ret < 0 || ret == REG_NON)
4934 return rte_flow_error_set(error, ENOTSUP,
4935 RTE_FLOW_ERROR_TYPE_ACTION, action,
4936 "cannot modify meta without"
4937 " extensive registers available");
4939 if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4940 return rte_flow_error_set(error, ENOTSUP,
4941 RTE_FLOW_ERROR_TYPE_ACTION, action,
4942 "add and sub operations"
4943 " are not supported");
4944 return (action_modify_field->width / 32) +
4945 !!(action_modify_field->width % 32);
4949 * Validate jump action.
4952 * Pointer to the jump action.
4953 * @param[in] action_flags
4954 * Holds the actions detected until now.
4955 * @param[in] attributes
4956 * Pointer to flow attributes
4957 * @param[in] external
4958 * Action belongs to flow rule created by request external to PMD.
4960 * Pointer to error structure.
4963 * 0 on success, a negative errno value otherwise and rte_errno is set.
4966 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4967 const struct mlx5_flow_tunnel *tunnel,
4968 const struct rte_flow_action *action,
4969 uint64_t action_flags,
4970 const struct rte_flow_attr *attributes,
4971 bool external, struct rte_flow_error *error)
4973 uint32_t target_group, table;
4975 struct flow_grp_info grp_info = {
4976 .external = !!external,
4977 .transfer = !!attributes->transfer,
4981 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4982 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4983 return rte_flow_error_set(error, EINVAL,
4984 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4985 "can't have 2 fate actions in"
4988 return rte_flow_error_set(error, EINVAL,
4989 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4990 NULL, "action configuration not set");
4992 ((const struct rte_flow_action_jump *)action->conf)->group;
4993 ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4997 if (attributes->group == target_group &&
4998 !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4999 MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5000 return rte_flow_error_set(error, EINVAL,
5001 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5002 "target group must be other than"
5003 " the current flow group");
5008 * Validate action PORT_ID / REPRESENTED_PORT.
5011 * Pointer to rte_eth_dev structure.
5012 * @param[in] action_flags
5013 * Bit-fields that holds the actions detected until now.
5015 * PORT_ID / REPRESENTED_PORT action structure.
5017 * Attributes of flow that includes this action.
5019 * Pointer to error structure.
5022 * 0 on success, a negative errno value otherwise and rte_errno is set.
5025 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5026 uint64_t action_flags,
5027 const struct rte_flow_action *action,
5028 const struct rte_flow_attr *attr,
5029 struct rte_flow_error *error)
5031 const struct rte_flow_action_port_id *port_id;
5032 const struct rte_flow_action_ethdev *ethdev;
5033 struct mlx5_priv *act_priv;
5034 struct mlx5_priv *dev_priv;
5037 if (!attr->transfer)
5038 return rte_flow_error_set(error, ENOTSUP,
5039 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5041 "port action is valid in transfer"
5043 if (!action || !action->conf)
5044 return rte_flow_error_set(error, ENOTSUP,
5045 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5047 "port action parameters must be"
5049 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5050 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5051 return rte_flow_error_set(error, EINVAL,
5052 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5053 "can have only one fate actions in"
5055 dev_priv = mlx5_dev_to_eswitch_info(dev);
5057 return rte_flow_error_set(error, rte_errno,
5058 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5060 "failed to obtain E-Switch info");
5061 switch (action->type) {
5062 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5063 port_id = action->conf;
5064 port = port_id->original ? dev->data->port_id : port_id->id;
5066 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5067 ethdev = action->conf;
5068 port = ethdev->port_id;
5072 return rte_flow_error_set
5074 RTE_FLOW_ERROR_TYPE_ACTION, action,
5075 "unknown E-Switch action");
5077 act_priv = mlx5_port_to_eswitch_info(port, false);
5079 return rte_flow_error_set
5081 RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5082 "failed to obtain E-Switch port id for port");
5083 if (act_priv->domain_id != dev_priv->domain_id)
5084 return rte_flow_error_set
5086 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5087 "port does not belong to"
5088 " E-Switch being configured");
5093 * Get the maximum number of modify header actions.
5096 * Pointer to rte_eth_dev structure.
5098 * Whether action is on root table.
5101 * Max number of modify header actions device can support.
5103 static inline unsigned int
5104 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5108 * There's no way to directly query the max capacity from FW.
5109 * The maximal value on root table should be assumed to be supported.
5112 return MLX5_MAX_MODIFY_NUM;
5114 return MLX5_ROOT_TBL_MODIFY_NUM;
5118 * Validate the meter action.
5121 * Pointer to rte_eth_dev structure.
5122 * @param[in] action_flags
5123 * Bit-fields that holds the actions detected until now.
5125 * Pointer to the meter action.
5127 * Attributes of flow that includes this action.
5128 * @param[in] port_id_item
5129 * Pointer to item indicating port id.
5131 * Pointer to error structure.
5134 * 0 on success, a negative errno value otherwise and rte_ernno is set.
5137 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5138 uint64_t action_flags,
5139 const struct rte_flow_action *action,
5140 const struct rte_flow_attr *attr,
5141 const struct rte_flow_item *port_id_item,
5143 struct rte_flow_error *error)
5145 struct mlx5_priv *priv = dev->data->dev_private;
5146 const struct rte_flow_action_meter *am = action->conf;
5147 struct mlx5_flow_meter_info *fm;
5148 struct mlx5_flow_meter_policy *mtr_policy;
5149 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5152 return rte_flow_error_set(error, EINVAL,
5153 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5154 "meter action conf is NULL");
5156 if (action_flags & MLX5_FLOW_ACTION_METER)
5157 return rte_flow_error_set(error, ENOTSUP,
5158 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5159 "meter chaining not support");
5160 if (action_flags & MLX5_FLOW_ACTION_JUMP)
5161 return rte_flow_error_set(error, ENOTSUP,
5162 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5163 "meter with jump not support");
5165 return rte_flow_error_set(error, ENOTSUP,
5166 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5168 "meter action not supported");
5169 fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5171 return rte_flow_error_set(error, EINVAL,
5172 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5174 /* aso meter can always be shared by different domains */
5175 if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5176 !(fm->transfer == attr->transfer ||
5177 (!fm->ingress && !attr->ingress && attr->egress) ||
5178 (!fm->egress && !attr->egress && attr->ingress)))
5179 return rte_flow_error_set(error, EINVAL,
5180 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5181 "Flow attributes domain are either invalid "
5182 "or have a domain conflict with current "
5183 "meter attributes");
5184 if (fm->def_policy) {
5185 if (!((attr->transfer &&
5186 mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5188 mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5190 mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5191 return rte_flow_error_set(error, EINVAL,
5192 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5193 "Flow attributes domain "
5194 "have a conflict with current "
5195 "meter domain attributes");
5198 mtr_policy = mlx5_flow_meter_policy_find(dev,
5199 fm->policy_id, NULL);
5201 return rte_flow_error_set(error, EINVAL,
5202 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5203 "Invalid policy id for meter ");
5204 if (!((attr->transfer && mtr_policy->transfer) ||
5205 (attr->egress && mtr_policy->egress) ||
5206 (attr->ingress && mtr_policy->ingress)))
5207 return rte_flow_error_set(error, EINVAL,
5208 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5209 "Flow attributes domain "
5210 "have a conflict with current "
5211 "meter domain attributes");
5212 if (attr->transfer && mtr_policy->dev) {
5214 * When policy has fate action of port_id,
5215 * the flow should have the same src port as policy.
5217 struct mlx5_priv *policy_port_priv =
5218 mtr_policy->dev->data->dev_private;
5219 int32_t flow_src_port = priv->representor_id;
5222 const struct rte_flow_item_port_id *spec =
5224 struct mlx5_priv *port_priv =
5225 mlx5_port_to_eswitch_info(spec->id,
5228 return rte_flow_error_set(error,
5230 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5232 "Failed to get port info.");
5233 flow_src_port = port_priv->representor_id;
5235 if (flow_src_port != policy_port_priv->representor_id)
5236 return rte_flow_error_set(error,
5238 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5240 "Flow and meter policy "
5241 "have different src port.");
5243 *def_policy = false;
5249 * Validate the age action.
5251 * @param[in] action_flags
5252 * Holds the actions detected until now.
5254 * Pointer to the age action.
5256 * Pointer to the Ethernet device structure.
5258 * Pointer to error structure.
5261 * 0 on success, a negative errno value otherwise and rte_errno is set.
5264 flow_dv_validate_action_age(uint64_t action_flags,
5265 const struct rte_flow_action *action,
5266 struct rte_eth_dev *dev,
5267 struct rte_flow_error *error)
5269 struct mlx5_priv *priv = dev->data->dev_private;
5270 const struct rte_flow_action_age *age = action->conf;
5272 if (!priv->sh->devx || (priv->sh->cmng.counter_fallback &&
5273 !priv->sh->aso_age_mng))
5274 return rte_flow_error_set(error, ENOTSUP,
5275 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5277 "age action not supported");
5278 if (!(action->conf))
5279 return rte_flow_error_set(error, EINVAL,
5280 RTE_FLOW_ERROR_TYPE_ACTION, action,
5281 "configuration cannot be null");
5282 if (!(age->timeout))
5283 return rte_flow_error_set(error, EINVAL,
5284 RTE_FLOW_ERROR_TYPE_ACTION, action,
5285 "invalid timeout value 0");
5286 if (action_flags & MLX5_FLOW_ACTION_AGE)
5287 return rte_flow_error_set(error, EINVAL,
5288 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5289 "duplicate age actions set");
5294 * Validate the modify-header IPv4 DSCP actions.
5296 * @param[in] action_flags
5297 * Holds the actions detected until now.
5299 * Pointer to the modify action.
5300 * @param[in] item_flags
5301 * Holds the items detected.
5303 * Pointer to error structure.
5306 * 0 on success, a negative errno value otherwise and rte_errno is set.
5309 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5310 const struct rte_flow_action *action,
5311 const uint64_t item_flags,
5312 struct rte_flow_error *error)
5316 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5318 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5319 return rte_flow_error_set(error, EINVAL,
5320 RTE_FLOW_ERROR_TYPE_ACTION,
5322 "no ipv4 item in pattern");
5328 * Validate the modify-header IPv6 DSCP actions.
5330 * @param[in] action_flags
5331 * Holds the actions detected until now.
5333 * Pointer to the modify action.
5334 * @param[in] item_flags
5335 * Holds the items detected.
5337 * Pointer to error structure.
5340 * 0 on success, a negative errno value otherwise and rte_errno is set.
5343 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5344 const struct rte_flow_action *action,
5345 const uint64_t item_flags,
5346 struct rte_flow_error *error)
5350 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5352 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5353 return rte_flow_error_set(error, EINVAL,
5354 RTE_FLOW_ERROR_TYPE_ACTION,
5356 "no ipv6 item in pattern");
5362 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5363 struct mlx5_list_entry *entry, void *cb_ctx)
5365 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5366 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5367 struct mlx5_flow_dv_modify_hdr_resource *resource =
5368 container_of(entry, typeof(*resource), entry);
5369 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5371 key_len += ref->actions_num * sizeof(ref->actions[0]);
5372 return ref->actions_num != resource->actions_num ||
5373 memcmp(&ref->ft_type, &resource->ft_type, key_len);
5376 static struct mlx5_indexed_pool *
5377 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5379 struct mlx5_indexed_pool *ipool = __atomic_load_n
5380 (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5383 struct mlx5_indexed_pool *expected = NULL;
5384 struct mlx5_indexed_pool_config cfg =
5385 (struct mlx5_indexed_pool_config) {
5386 .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5388 sizeof(struct mlx5_modification_cmd),
5393 .release_mem_en = !!sh->reclaim_mode,
5394 .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5395 .malloc = mlx5_malloc,
5397 .type = "mlx5_modify_action_resource",
5400 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5401 ipool = mlx5_ipool_create(&cfg);
5404 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5405 &expected, ipool, false,
5407 __ATOMIC_SEQ_CST)) {
5408 mlx5_ipool_destroy(ipool);
5409 ipool = __atomic_load_n(&sh->mdh_ipools[index],
5416 struct mlx5_list_entry *
5417 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5419 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5420 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5421 struct mlx5dv_dr_domain *ns;
5422 struct mlx5_flow_dv_modify_hdr_resource *entry;
5423 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5424 struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5425 ref->actions_num - 1);
5427 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5428 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5431 if (unlikely(!ipool)) {
5432 rte_flow_error_set(ctx->error, ENOMEM,
5433 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5434 NULL, "cannot allocate modify ipool");
5437 entry = mlx5_ipool_zmalloc(ipool, &idx);
5439 rte_flow_error_set(ctx->error, ENOMEM,
5440 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5441 "cannot allocate resource memory");
5444 rte_memcpy(&entry->ft_type,
5445 RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5446 key_len + data_len);
5447 if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5448 ns = sh->fdb_domain;
5449 else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5453 ret = mlx5_flow_os_create_flow_action_modify_header
5454 (sh->cdev->ctx, ns, entry,
5455 data_len, &entry->action);
5457 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5458 rte_flow_error_set(ctx->error, ENOMEM,
5459 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5460 NULL, "cannot create modification action");
5464 return &entry->entry;
5467 struct mlx5_list_entry *
5468 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5471 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5472 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5473 struct mlx5_flow_dv_modify_hdr_resource *entry;
5474 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5475 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5478 entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5481 rte_flow_error_set(ctx->error, ENOMEM,
5482 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5483 "cannot allocate resource memory");
5486 memcpy(entry, oentry, sizeof(*entry) + data_len);
5488 return &entry->entry;
5492 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5494 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5495 struct mlx5_flow_dv_modify_hdr_resource *res =
5496 container_of(entry, typeof(*res), entry);
5498 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5502 * Validate the sample action.
5504 * @param[in, out] action_flags
5505 * Holds the actions detected until now.
5507 * Pointer to the sample action.
5509 * Pointer to the Ethernet device structure.
5511 * Attributes of flow that includes this action.
5512 * @param[in] item_flags
5513 * Holds the items detected.
5515 * Pointer to the RSS action.
5516 * @param[out] sample_rss
5517 * Pointer to the RSS action in sample action list.
5519 * Pointer to the COUNT action in sample action list.
5520 * @param[out] fdb_mirror_limit
5521 * Pointer to the FDB mirror limitation flag.
5523 * Pointer to error structure.
5526 * 0 on success, a negative errno value otherwise and rte_errno is set.
5529 flow_dv_validate_action_sample(uint64_t *action_flags,
5530 const struct rte_flow_action *action,
5531 struct rte_eth_dev *dev,
5532 const struct rte_flow_attr *attr,
5533 uint64_t item_flags,
5534 const struct rte_flow_action_rss *rss,
5535 const struct rte_flow_action_rss **sample_rss,
5536 const struct rte_flow_action_count **count,
5537 int *fdb_mirror_limit,
5538 struct rte_flow_error *error)
5540 struct mlx5_priv *priv = dev->data->dev_private;
5541 struct mlx5_dev_config *dev_conf = &priv->config;
5542 const struct rte_flow_action_sample *sample = action->conf;
5543 const struct rte_flow_action *act;
5544 uint64_t sub_action_flags = 0;
5545 uint16_t queue_index = 0xFFFF;
5550 return rte_flow_error_set(error, EINVAL,
5551 RTE_FLOW_ERROR_TYPE_ACTION, action,
5552 "configuration cannot be NULL");
5553 if (sample->ratio == 0)
5554 return rte_flow_error_set(error, EINVAL,
5555 RTE_FLOW_ERROR_TYPE_ACTION, action,
5556 "ratio value starts from 1");
5557 if (!priv->sh->devx || (sample->ratio > 0 && !priv->sampler_en))
5558 return rte_flow_error_set(error, ENOTSUP,
5559 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5561 "sample action not supported");
5562 if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5563 return rte_flow_error_set(error, EINVAL,
5564 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5565 "Multiple sample actions not "
5567 if (*action_flags & MLX5_FLOW_ACTION_METER)
5568 return rte_flow_error_set(error, EINVAL,
5569 RTE_FLOW_ERROR_TYPE_ACTION, action,
5570 "wrong action order, meter should "
5571 "be after sample action");
5572 if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5573 return rte_flow_error_set(error, EINVAL,
5574 RTE_FLOW_ERROR_TYPE_ACTION, action,
5575 "wrong action order, jump should "
5576 "be after sample action");
5577 act = sample->actions;
5578 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5579 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5580 return rte_flow_error_set(error, ENOTSUP,
5581 RTE_FLOW_ERROR_TYPE_ACTION,
5582 act, "too many actions");
5583 switch (act->type) {
5584 case RTE_FLOW_ACTION_TYPE_QUEUE:
5585 ret = mlx5_flow_validate_action_queue(act,
5591 queue_index = ((const struct rte_flow_action_queue *)
5592 (act->conf))->index;
5593 sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5596 case RTE_FLOW_ACTION_TYPE_RSS:
5597 *sample_rss = act->conf;
5598 ret = mlx5_flow_validate_action_rss(act,
5605 if (rss && *sample_rss &&
5606 ((*sample_rss)->level != rss->level ||
5607 (*sample_rss)->types != rss->types))
5608 return rte_flow_error_set(error, ENOTSUP,
5609 RTE_FLOW_ERROR_TYPE_ACTION,
5611 "Can't use the different RSS types "
5612 "or level in the same flow");
5613 if (*sample_rss != NULL && (*sample_rss)->queue_num)
5614 queue_index = (*sample_rss)->queue[0];
5615 sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5618 case RTE_FLOW_ACTION_TYPE_MARK:
5619 ret = flow_dv_validate_action_mark(dev, act,
5624 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5625 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5626 MLX5_FLOW_ACTION_MARK_EXT;
5628 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5631 case RTE_FLOW_ACTION_TYPE_COUNT:
5632 ret = flow_dv_validate_action_count
5633 (dev, false, *action_flags | sub_action_flags,
5638 sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5639 *action_flags |= MLX5_FLOW_ACTION_COUNT;
5642 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5643 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5644 ret = flow_dv_validate_action_port_id(dev,
5651 sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5654 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5655 ret = flow_dv_validate_action_raw_encap_decap
5656 (dev, NULL, act->conf, attr, &sub_action_flags,
5657 &actions_n, action, item_flags, error);
5662 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5663 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5664 ret = flow_dv_validate_action_l2_encap(dev,
5670 sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5674 return rte_flow_error_set(error, ENOTSUP,
5675 RTE_FLOW_ERROR_TYPE_ACTION,
5677 "Doesn't support optional "
5681 if (attr->ingress && !attr->transfer) {
5682 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5683 MLX5_FLOW_ACTION_RSS)))
5684 return rte_flow_error_set(error, EINVAL,
5685 RTE_FLOW_ERROR_TYPE_ACTION,
5687 "Ingress must has a dest "
5688 "QUEUE for Sample");
5689 } else if (attr->egress && !attr->transfer) {
5690 return rte_flow_error_set(error, ENOTSUP,
5691 RTE_FLOW_ERROR_TYPE_ACTION,
5693 "Sample Only support Ingress "
5695 } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5696 MLX5_ASSERT(attr->transfer);
5697 if (sample->ratio > 1)
5698 return rte_flow_error_set(error, ENOTSUP,
5699 RTE_FLOW_ERROR_TYPE_ACTION,
5701 "E-Switch doesn't support "
5702 "any optional action "
5704 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5705 return rte_flow_error_set(error, ENOTSUP,
5706 RTE_FLOW_ERROR_TYPE_ACTION,
5708 "unsupported action QUEUE");
5709 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5710 return rte_flow_error_set(error, ENOTSUP,
5711 RTE_FLOW_ERROR_TYPE_ACTION,
5713 "unsupported action QUEUE");
5714 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5715 return rte_flow_error_set(error, EINVAL,
5716 RTE_FLOW_ERROR_TYPE_ACTION,
5718 "E-Switch must has a dest "
5719 "port for mirroring");
5720 if (!priv->config.hca_attr.reg_c_preserve &&
5721 priv->representor_id != UINT16_MAX)
5722 *fdb_mirror_limit = 1;
5724 /* Continue validation for Xcap actions.*/
5725 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5726 (queue_index == 0xFFFF ||
5727 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5728 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5729 MLX5_FLOW_XCAP_ACTIONS)
5730 return rte_flow_error_set(error, ENOTSUP,
5731 RTE_FLOW_ERROR_TYPE_ACTION,
5732 NULL, "encap and decap "
5733 "combination aren't "
5735 if (!attr->transfer && attr->ingress && (sub_action_flags &
5736 MLX5_FLOW_ACTION_ENCAP))
5737 return rte_flow_error_set(error, ENOTSUP,
5738 RTE_FLOW_ERROR_TYPE_ACTION,
5739 NULL, "encap is not supported"
5740 " for ingress traffic");
5746 * Find existing modify-header resource or create and register a new one.
5748 * @param dev[in, out]
5749 * Pointer to rte_eth_dev structure.
5750 * @param[in, out] resource
5751 * Pointer to modify-header resource.
5752 * @parm[in, out] dev_flow
5753 * Pointer to the dev_flow.
5755 * pointer to error structure.
5758 * 0 on success otherwise -errno and errno is set.
5761 flow_dv_modify_hdr_resource_register
5762 (struct rte_eth_dev *dev,
5763 struct mlx5_flow_dv_modify_hdr_resource *resource,
5764 struct mlx5_flow *dev_flow,
5765 struct rte_flow_error *error)
5767 struct mlx5_priv *priv = dev->data->dev_private;
5768 struct mlx5_dev_ctx_shared *sh = priv->sh;
5769 uint32_t key_len = sizeof(*resource) -
5770 offsetof(typeof(*resource), ft_type) +
5771 resource->actions_num * sizeof(resource->actions[0]);
5772 struct mlx5_list_entry *entry;
5773 struct mlx5_flow_cb_ctx ctx = {
5777 struct mlx5_hlist *modify_cmds;
5780 modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5782 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5784 flow_dv_modify_create_cb,
5785 flow_dv_modify_match_cb,
5786 flow_dv_modify_remove_cb,
5787 flow_dv_modify_clone_cb,
5788 flow_dv_modify_clone_free_cb);
5789 if (unlikely(!modify_cmds))
5791 resource->root = !dev_flow->dv.group;
5792 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5794 return rte_flow_error_set(error, EOVERFLOW,
5795 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5796 "too many modify header items");
5797 key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5798 entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5801 resource = container_of(entry, typeof(*resource), entry);
5802 dev_flow->handle->dvh.modify_hdr = resource;
5807 * Get DV flow counter by index.
5810 * Pointer to the Ethernet device structure.
5812 * mlx5 flow counter index in the container.
5814 * mlx5 flow counter pool in the container.
5817 * Pointer to the counter, NULL otherwise.
5819 static struct mlx5_flow_counter *
5820 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5822 struct mlx5_flow_counter_pool **ppool)
5824 struct mlx5_priv *priv = dev->data->dev_private;
5825 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5826 struct mlx5_flow_counter_pool *pool;
5828 /* Decrease to original index and clear shared bit. */
5829 idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5830 MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5831 pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5835 return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5839 * Check the devx counter belongs to the pool.
5842 * Pointer to the counter pool.
5844 * The counter devx ID.
5847 * True if counter belongs to the pool, false otherwise.
5850 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5852 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5853 MLX5_COUNTERS_PER_POOL;
5855 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5861 * Get a pool by devx counter ID.
5864 * Pointer to the counter management.
5866 * The counter devx ID.
5869 * The counter pool pointer if exists, NULL otherwise,
5871 static struct mlx5_flow_counter_pool *
5872 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5875 struct mlx5_flow_counter_pool *pool = NULL;
5877 rte_spinlock_lock(&cmng->pool_update_sl);
5878 /* Check last used pool. */
5879 if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5880 flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5881 pool = cmng->pools[cmng->last_pool_idx];
5884 /* ID out of range means no suitable pool in the container. */
5885 if (id > cmng->max_id || id < cmng->min_id)
5888 * Find the pool from the end of the container, since mostly counter
5889 * ID is sequence increasing, and the last pool should be the needed
5894 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5896 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5902 rte_spinlock_unlock(&cmng->pool_update_sl);
5907 * Resize a counter container.
5910 * Pointer to the Ethernet device structure.
5913 * 0 on success, otherwise negative errno value and rte_errno is set.
5916 flow_dv_container_resize(struct rte_eth_dev *dev)
5918 struct mlx5_priv *priv = dev->data->dev_private;
5919 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5920 void *old_pools = cmng->pools;
5921 uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5922 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5923 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5930 memcpy(pools, old_pools, cmng->n *
5931 sizeof(struct mlx5_flow_counter_pool *));
5933 cmng->pools = pools;
5935 mlx5_free(old_pools);
5940 * Query a devx flow counter.
5943 * Pointer to the Ethernet device structure.
5944 * @param[in] counter
5945 * Index to the flow counter.
5947 * The statistics value of packets.
5949 * The statistics value of bytes.
5952 * 0 on success, otherwise a negative errno value and rte_errno is set.
5955 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5958 struct mlx5_priv *priv = dev->data->dev_private;
5959 struct mlx5_flow_counter_pool *pool = NULL;
5960 struct mlx5_flow_counter *cnt;
5963 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5965 if (priv->sh->cmng.counter_fallback)
5966 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5967 0, pkts, bytes, 0, NULL, NULL, 0);
5968 rte_spinlock_lock(&pool->sl);
5973 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5974 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5975 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5977 rte_spinlock_unlock(&pool->sl);
5982 * Create and initialize a new counter pool.
5985 * Pointer to the Ethernet device structure.
5987 * The devX counter handle.
5989 * Whether the pool is for counter that was allocated for aging.
5990 * @param[in/out] cont_cur
5991 * Pointer to the container pointer, it will be update in pool resize.
5994 * The pool container pointer on success, NULL otherwise and rte_errno is set.
5996 static struct mlx5_flow_counter_pool *
5997 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6000 struct mlx5_priv *priv = dev->data->dev_private;
6001 struct mlx5_flow_counter_pool *pool;
6002 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6003 bool fallback = priv->sh->cmng.counter_fallback;
6004 uint32_t size = sizeof(*pool);
6006 size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6007 size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6008 pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6014 pool->is_aged = !!age;
6015 pool->query_gen = 0;
6016 pool->min_dcs = dcs;
6017 rte_spinlock_init(&pool->sl);
6018 rte_spinlock_init(&pool->csl);
6019 TAILQ_INIT(&pool->counters[0]);
6020 TAILQ_INIT(&pool->counters[1]);
6021 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6022 rte_spinlock_lock(&cmng->pool_update_sl);
6023 pool->index = cmng->n_valid;
6024 if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6026 rte_spinlock_unlock(&cmng->pool_update_sl);
6029 cmng->pools[pool->index] = pool;
6031 if (unlikely(fallback)) {
6032 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6034 if (base < cmng->min_id)
6035 cmng->min_id = base;
6036 if (base > cmng->max_id)
6037 cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6038 cmng->last_pool_idx = pool->index;
6040 rte_spinlock_unlock(&cmng->pool_update_sl);
6045 * Prepare a new counter and/or a new counter pool.
6048 * Pointer to the Ethernet device structure.
6049 * @param[out] cnt_free
6050 * Where to put the pointer of a new counter.
6052 * Whether the pool is for counter that was allocated for aging.
6055 * The counter pool pointer and @p cnt_free is set on success,
6056 * NULL otherwise and rte_errno is set.
6058 static struct mlx5_flow_counter_pool *
6059 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6060 struct mlx5_flow_counter **cnt_free,
6063 struct mlx5_priv *priv = dev->data->dev_private;
6064 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6065 struct mlx5_flow_counter_pool *pool;
6066 struct mlx5_counters tmp_tq;
6067 struct mlx5_devx_obj *dcs = NULL;
6068 struct mlx5_flow_counter *cnt;
6069 enum mlx5_counter_type cnt_type =
6070 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6071 bool fallback = priv->sh->cmng.counter_fallback;
6075 /* bulk_bitmap must be 0 for single counter allocation. */
6076 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6079 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6081 pool = flow_dv_pool_create(dev, dcs, age);
6083 mlx5_devx_cmd_destroy(dcs);
6087 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6088 cnt = MLX5_POOL_GET_CNT(pool, i);
6090 cnt->dcs_when_free = dcs;
6094 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6096 rte_errno = ENODATA;
6099 pool = flow_dv_pool_create(dev, dcs, age);
6101 mlx5_devx_cmd_destroy(dcs);
6104 TAILQ_INIT(&tmp_tq);
6105 for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6106 cnt = MLX5_POOL_GET_CNT(pool, i);
6108 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6110 rte_spinlock_lock(&cmng->csl[cnt_type]);
6111 TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6112 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6113 *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6114 (*cnt_free)->pool = pool;
6119 * Allocate a flow counter.
6122 * Pointer to the Ethernet device structure.
6124 * Whether the counter was allocated for aging.
6127 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6130 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6132 struct mlx5_priv *priv = dev->data->dev_private;
6133 struct mlx5_flow_counter_pool *pool = NULL;
6134 struct mlx5_flow_counter *cnt_free = NULL;
6135 bool fallback = priv->sh->cmng.counter_fallback;
6136 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6137 enum mlx5_counter_type cnt_type =
6138 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6141 if (!priv->sh->devx) {
6142 rte_errno = ENOTSUP;
6145 /* Get free counters from container. */
6146 rte_spinlock_lock(&cmng->csl[cnt_type]);
6147 cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6149 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6150 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6151 if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6153 pool = cnt_free->pool;
6155 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6156 /* Create a DV counter action only in the first time usage. */
6157 if (!cnt_free->action) {
6159 struct mlx5_devx_obj *dcs;
6163 offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6164 dcs = pool->min_dcs;
6167 dcs = cnt_free->dcs_when_free;
6169 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6176 cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6177 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6178 /* Update the counter reset values. */
6179 if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6182 if (!fallback && !priv->sh->cmng.query_thread_on)
6183 /* Start the asynchronous batch query by the host thread. */
6184 mlx5_set_query_alarm(priv->sh);
6186 * When the count action isn't shared (by ID), shared_info field is
6187 * used for indirect action API's refcnt.
6188 * When the counter action is not shared neither by ID nor by indirect
6189 * action API, shared info must be 1.
6191 cnt_free->shared_info.refcnt = 1;
6195 cnt_free->pool = pool;
6197 cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6198 rte_spinlock_lock(&cmng->csl[cnt_type]);
6199 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6200 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6206 * Get age param from counter index.
6209 * Pointer to the Ethernet device structure.
6210 * @param[in] counter
6211 * Index to the counter handler.
6214 * The aging parameter specified for the counter index.
6216 static struct mlx5_age_param*
6217 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6220 struct mlx5_flow_counter *cnt;
6221 struct mlx5_flow_counter_pool *pool = NULL;
6223 flow_dv_counter_get_by_idx(dev, counter, &pool);
6224 counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6225 cnt = MLX5_POOL_GET_CNT(pool, counter);
6226 return MLX5_CNT_TO_AGE(cnt);
6230 * Remove a flow counter from aged counter list.
6233 * Pointer to the Ethernet device structure.
6234 * @param[in] counter
6235 * Index to the counter handler.
6237 * Pointer to the counter handler.
6240 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6241 uint32_t counter, struct mlx5_flow_counter *cnt)
6243 struct mlx5_age_info *age_info;
6244 struct mlx5_age_param *age_param;
6245 struct mlx5_priv *priv = dev->data->dev_private;
6246 uint16_t expected = AGE_CANDIDATE;
6248 age_info = GET_PORT_AGE_INFO(priv);
6249 age_param = flow_dv_counter_idx_get_age(dev, counter);
6250 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6251 AGE_FREE, false, __ATOMIC_RELAXED,
6252 __ATOMIC_RELAXED)) {
6254 * We need the lock even it is age timeout,
6255 * since counter may still in process.
6257 rte_spinlock_lock(&age_info->aged_sl);
6258 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6259 rte_spinlock_unlock(&age_info->aged_sl);
6260 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6265 * Release a flow counter.
6268 * Pointer to the Ethernet device structure.
6269 * @param[in] counter
6270 * Index to the counter handler.
6273 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6275 struct mlx5_priv *priv = dev->data->dev_private;
6276 struct mlx5_flow_counter_pool *pool = NULL;
6277 struct mlx5_flow_counter *cnt;
6278 enum mlx5_counter_type cnt_type;
6282 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6284 if (pool->is_aged) {
6285 flow_dv_counter_remove_from_age(dev, counter, cnt);
6288 * If the counter action is shared by indirect action API,
6289 * the atomic function reduces its references counter.
6290 * If after the reduction the action is still referenced, the
6291 * function returns here and does not release it.
6292 * When the counter action is not shared by
6293 * indirect action API, shared info is 1 before the reduction,
6294 * so this condition is failed and function doesn't return here.
6296 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6302 * Put the counter back to list to be updated in none fallback mode.
6303 * Currently, we are using two list alternately, while one is in query,
6304 * add the freed counter to the other list based on the pool query_gen
6305 * value. After query finishes, add counter the list to the global
6306 * container counter list. The list changes while query starts. In
6307 * this case, lock will not be needed as query callback and release
6308 * function both operate with the different list.
6310 if (!priv->sh->cmng.counter_fallback) {
6311 rte_spinlock_lock(&pool->csl);
6312 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6313 rte_spinlock_unlock(&pool->csl);
6315 cnt->dcs_when_free = cnt->dcs_when_active;
6316 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6317 MLX5_COUNTER_TYPE_ORIGIN;
6318 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6319 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6321 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6326 * Resize a meter id container.
6329 * Pointer to the Ethernet device structure.
6332 * 0 on success, otherwise negative errno value and rte_errno is set.
6335 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6337 struct mlx5_priv *priv = dev->data->dev_private;
6338 struct mlx5_aso_mtr_pools_mng *pools_mng =
6339 &priv->sh->mtrmng->pools_mng;
6340 void *old_pools = pools_mng->pools;
6341 uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6342 uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6343 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6350 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6355 memcpy(pools, old_pools, pools_mng->n *
6356 sizeof(struct mlx5_aso_mtr_pool *));
6357 pools_mng->n = resize;
6358 pools_mng->pools = pools;
6360 mlx5_free(old_pools);
6365 * Prepare a new meter and/or a new meter pool.
6368 * Pointer to the Ethernet device structure.
6369 * @param[out] mtr_free
6370 * Where to put the pointer of a new meter.g.
6373 * The meter pool pointer and @mtr_free is set on success,
6374 * NULL otherwise and rte_errno is set.
6376 static struct mlx5_aso_mtr_pool *
6377 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6379 struct mlx5_priv *priv = dev->data->dev_private;
6380 struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6381 struct mlx5_aso_mtr_pool *pool = NULL;
6382 struct mlx5_devx_obj *dcs = NULL;
6384 uint32_t log_obj_size;
6386 log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6387 dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6388 priv->sh->cdev->pdn,
6391 rte_errno = ENODATA;
6394 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6397 claim_zero(mlx5_devx_cmd_destroy(dcs));
6400 pool->devx_obj = dcs;
6401 rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6402 pool->index = pools_mng->n_valid;
6403 if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6405 claim_zero(mlx5_devx_cmd_destroy(dcs));
6406 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6409 pools_mng->pools[pool->index] = pool;
6410 pools_mng->n_valid++;
6411 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6412 for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6413 pool->mtrs[i].offset = i;
6414 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6416 pool->mtrs[0].offset = 0;
6417 *mtr_free = &pool->mtrs[0];
6422 * Release a flow meter into pool.
6425 * Pointer to the Ethernet device structure.
6426 * @param[in] mtr_idx
6427 * Index to aso flow meter.
6430 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6432 struct mlx5_priv *priv = dev->data->dev_private;
6433 struct mlx5_aso_mtr_pools_mng *pools_mng =
6434 &priv->sh->mtrmng->pools_mng;
6435 struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6437 MLX5_ASSERT(aso_mtr);
6438 rte_spinlock_lock(&pools_mng->mtrsl);
6439 memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6440 aso_mtr->state = ASO_METER_FREE;
6441 LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6442 rte_spinlock_unlock(&pools_mng->mtrsl);
6446 * Allocate a aso flow meter.
6449 * Pointer to the Ethernet device structure.
6452 * Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6455 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6457 struct mlx5_priv *priv = dev->data->dev_private;
6458 struct mlx5_aso_mtr *mtr_free = NULL;
6459 struct mlx5_aso_mtr_pools_mng *pools_mng =
6460 &priv->sh->mtrmng->pools_mng;
6461 struct mlx5_aso_mtr_pool *pool;
6462 uint32_t mtr_idx = 0;
6464 if (!priv->sh->devx) {
6465 rte_errno = ENOTSUP;
6468 /* Allocate the flow meter memory. */
6469 /* Get free meters from management. */
6470 rte_spinlock_lock(&pools_mng->mtrsl);
6471 mtr_free = LIST_FIRST(&pools_mng->meters);
6473 LIST_REMOVE(mtr_free, next);
6474 if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6475 rte_spinlock_unlock(&pools_mng->mtrsl);
6478 mtr_free->state = ASO_METER_WAIT;
6479 rte_spinlock_unlock(&pools_mng->mtrsl);
6480 pool = container_of(mtr_free,
6481 struct mlx5_aso_mtr_pool,
6482 mtrs[mtr_free->offset]);
6483 mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6484 if (!mtr_free->fm.meter_action) {
6485 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6486 struct rte_flow_error error;
6489 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6490 mtr_free->fm.meter_action =
6491 mlx5_glue->dv_create_flow_action_aso
6492 (priv->sh->rx_domain,
6493 pool->devx_obj->obj,
6495 (1 << MLX5_FLOW_COLOR_GREEN),
6497 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6498 if (!mtr_free->fm.meter_action) {
6499 flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6507 * Verify the @p attributes will be correctly understood by the NIC and store
6508 * them in the @p flow if everything is correct.
6511 * Pointer to dev struct.
6512 * @param[in] attributes
6513 * Pointer to flow attributes
6514 * @param[in] external
6515 * This flow rule is created by request external to PMD.
6517 * Pointer to error structure.
6520 * - 0 on success and non root table.
6521 * - 1 on success and root table.
6522 * - a negative errno value otherwise and rte_errno is set.
6525 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6526 const struct mlx5_flow_tunnel *tunnel,
6527 const struct rte_flow_attr *attributes,
6528 const struct flow_grp_info *grp_info,
6529 struct rte_flow_error *error)
6531 struct mlx5_priv *priv = dev->data->dev_private;
6532 uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6535 #ifndef HAVE_MLX5DV_DR
6536 RTE_SET_USED(tunnel);
6537 RTE_SET_USED(grp_info);
6538 if (attributes->group)
6539 return rte_flow_error_set(error, ENOTSUP,
6540 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6542 "groups are not supported");
6546 ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6551 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6553 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6554 attributes->priority > lowest_priority)
6555 return rte_flow_error_set(error, ENOTSUP,
6556 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6558 "priority out of range");
6559 if (attributes->transfer) {
6560 if (!priv->config.dv_esw_en)
6561 return rte_flow_error_set
6563 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6564 "E-Switch dr is not supported");
6565 if (!(priv->representor || priv->master))
6566 return rte_flow_error_set
6567 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6568 NULL, "E-Switch configuration can only be"
6569 " done by a master or a representor device");
6570 if (attributes->egress)
6571 return rte_flow_error_set
6573 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6574 "egress is not supported");
6576 if (!(attributes->egress ^ attributes->ingress))
6577 return rte_flow_error_set(error, ENOTSUP,
6578 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6579 "must specify exactly one of "
6580 "ingress or egress");
6585 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6586 int64_t pattern_flags, uint64_t l3_flags,
6587 uint64_t l4_flags, uint64_t ip4_flag,
6588 struct rte_flow_error *error)
6590 if (mask->l3_ok && !(pattern_flags & l3_flags))
6591 return rte_flow_error_set(error, EINVAL,
6592 RTE_FLOW_ERROR_TYPE_ITEM,
6593 NULL, "missing L3 protocol");
6595 if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6596 return rte_flow_error_set(error, EINVAL,
6597 RTE_FLOW_ERROR_TYPE_ITEM,
6598 NULL, "missing IPv4 protocol");
6600 if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6601 return rte_flow_error_set(error, EINVAL,
6602 RTE_FLOW_ERROR_TYPE_ITEM,
6603 NULL, "missing L4 protocol");
6609 flow_dv_validate_item_integrity_post(const struct
6610 rte_flow_item *integrity_items[2],
6611 int64_t pattern_flags,
6612 struct rte_flow_error *error)
6614 const struct rte_flow_item_integrity *mask;
6617 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6618 mask = (typeof(mask))integrity_items[0]->mask;
6619 ret = validate_integrity_bits(mask, pattern_flags,
6620 MLX5_FLOW_LAYER_OUTER_L3,
6621 MLX5_FLOW_LAYER_OUTER_L4,
6622 MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6627 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6628 mask = (typeof(mask))integrity_items[1]->mask;
6629 ret = validate_integrity_bits(mask, pattern_flags,
6630 MLX5_FLOW_LAYER_INNER_L3,
6631 MLX5_FLOW_LAYER_INNER_L4,
6632 MLX5_FLOW_LAYER_INNER_L3_IPV4,
6641 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6642 const struct rte_flow_item *integrity_item,
6643 uint64_t pattern_flags, uint64_t *last_item,
6644 const struct rte_flow_item *integrity_items[2],
6645 struct rte_flow_error *error)
6647 struct mlx5_priv *priv = dev->data->dev_private;
6648 const struct rte_flow_item_integrity *mask = (typeof(mask))
6649 integrity_item->mask;
6650 const struct rte_flow_item_integrity *spec = (typeof(spec))
6651 integrity_item->spec;
6653 if (!priv->config.hca_attr.pkt_integrity_match)
6654 return rte_flow_error_set(error, ENOTSUP,
6655 RTE_FLOW_ERROR_TYPE_ITEM,
6657 "packet integrity integrity_item not supported");
6659 return rte_flow_error_set(error, ENOTSUP,
6660 RTE_FLOW_ERROR_TYPE_ITEM,
6662 "no spec for integrity item");
6664 mask = &rte_flow_item_integrity_mask;
6665 if (!mlx5_validate_integrity_item(mask))
6666 return rte_flow_error_set(error, ENOTSUP,
6667 RTE_FLOW_ERROR_TYPE_ITEM,
6669 "unsupported integrity filter");
6670 if (spec->level > 1) {
6671 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6672 return rte_flow_error_set
6674 RTE_FLOW_ERROR_TYPE_ITEM,
6675 NULL, "multiple inner integrity items not supported");
6676 integrity_items[1] = integrity_item;
6677 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6679 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6680 return rte_flow_error_set
6682 RTE_FLOW_ERROR_TYPE_ITEM,
6683 NULL, "multiple outer integrity items not supported");
6684 integrity_items[0] = integrity_item;
6685 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6691 flow_dv_validate_item_flex(struct rte_eth_dev *dev,
6692 const struct rte_flow_item *item,
6693 uint64_t item_flags,
6694 uint64_t *last_item,
6696 struct rte_flow_error *error)
6698 const struct rte_flow_item_flex *flow_spec = item->spec;
6699 const struct rte_flow_item_flex *flow_mask = item->mask;
6700 struct mlx5_flex_item *flex;
6703 return rte_flow_error_set(error, EINVAL,
6704 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6705 "flex flow item spec cannot be NULL");
6707 return rte_flow_error_set(error, EINVAL,
6708 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6709 "flex flow item mask cannot be NULL");
6711 return rte_flow_error_set(error, ENOTSUP,
6712 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6713 "flex flow item last not supported");
6714 if (mlx5_flex_acquire_index(dev, flow_spec->handle, false) < 0)
6715 return rte_flow_error_set(error, EINVAL,
6716 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6717 "invalid flex flow item handle");
6718 flex = (struct mlx5_flex_item *)flow_spec->handle;
6719 switch (flex->tunnel_mode) {
6720 case FLEX_TUNNEL_MODE_SINGLE:
6722 (MLX5_FLOW_ITEM_OUTER_FLEX | MLX5_FLOW_ITEM_INNER_FLEX))
6723 rte_flow_error_set(error, EINVAL,
6724 RTE_FLOW_ERROR_TYPE_ITEM,
6725 NULL, "multiple flex items not supported");
6727 case FLEX_TUNNEL_MODE_OUTER:
6729 rte_flow_error_set(error, EINVAL,
6730 RTE_FLOW_ERROR_TYPE_ITEM,
6731 NULL, "inner flex item was not configured");
6732 if (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX)
6733 rte_flow_error_set(error, ENOTSUP,
6734 RTE_FLOW_ERROR_TYPE_ITEM,
6735 NULL, "multiple flex items not supported");
6737 case FLEX_TUNNEL_MODE_INNER:
6739 rte_flow_error_set(error, EINVAL,
6740 RTE_FLOW_ERROR_TYPE_ITEM,
6741 NULL, "outer flex item was not configured");
6742 if (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)
6743 rte_flow_error_set(error, EINVAL,
6744 RTE_FLOW_ERROR_TYPE_ITEM,
6745 NULL, "multiple flex items not supported");
6747 case FLEX_TUNNEL_MODE_MULTI:
6748 if ((is_inner && (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)) ||
6749 (!is_inner && (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX))) {
6750 rte_flow_error_set(error, EINVAL,
6751 RTE_FLOW_ERROR_TYPE_ITEM,
6752 NULL, "multiple flex items not supported");
6755 case FLEX_TUNNEL_MODE_TUNNEL:
6756 if (is_inner || (item_flags & MLX5_FLOW_ITEM_FLEX_TUNNEL))
6757 rte_flow_error_set(error, EINVAL,
6758 RTE_FLOW_ERROR_TYPE_ITEM,
6759 NULL, "multiple flex tunnel items not supported");
6762 rte_flow_error_set(error, EINVAL,
6763 RTE_FLOW_ERROR_TYPE_ITEM,
6764 NULL, "invalid flex item configuration");
6766 *last_item = flex->tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ?
6767 MLX5_FLOW_ITEM_FLEX_TUNNEL : is_inner ?
6768 MLX5_FLOW_ITEM_INNER_FLEX : MLX5_FLOW_ITEM_OUTER_FLEX;
6773 * Internal validation function. For validating both actions and items.
6776 * Pointer to the rte_eth_dev structure.
6778 * Pointer to the flow attributes.
6780 * Pointer to the list of items.
6781 * @param[in] actions
6782 * Pointer to the list of actions.
6783 * @param[in] external
6784 * This flow rule is created by request external to PMD.
6785 * @param[in] hairpin
6786 * Number of hairpin TX actions, 0 means classic flow.
6788 * Pointer to the error structure.
6791 * 0 on success, a negative errno value otherwise and rte_errno is set.
6794 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6795 const struct rte_flow_item items[],
6796 const struct rte_flow_action actions[],
6797 bool external, int hairpin, struct rte_flow_error *error)
6800 uint64_t action_flags = 0;
6801 uint64_t item_flags = 0;
6802 uint64_t last_item = 0;
6803 uint8_t next_protocol = 0xff;
6804 uint16_t ether_type = 0;
6806 uint8_t item_ipv6_proto = 0;
6807 int fdb_mirror_limit = 0;
6808 int modify_after_mirror = 0;
6809 const struct rte_flow_item *geneve_item = NULL;
6810 const struct rte_flow_item *gre_item = NULL;
6811 const struct rte_flow_item *gtp_item = NULL;
6812 const struct rte_flow_action_raw_decap *decap;
6813 const struct rte_flow_action_raw_encap *encap;
6814 const struct rte_flow_action_rss *rss = NULL;
6815 const struct rte_flow_action_rss *sample_rss = NULL;
6816 const struct rte_flow_action_count *sample_count = NULL;
6817 const struct rte_flow_item_tcp nic_tcp_mask = {
6820 .src_port = RTE_BE16(UINT16_MAX),
6821 .dst_port = RTE_BE16(UINT16_MAX),
6824 const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6827 "\xff\xff\xff\xff\xff\xff\xff\xff"
6828 "\xff\xff\xff\xff\xff\xff\xff\xff",
6830 "\xff\xff\xff\xff\xff\xff\xff\xff"
6831 "\xff\xff\xff\xff\xff\xff\xff\xff",
6832 .vtc_flow = RTE_BE32(0xffffffff),
6838 const struct rte_flow_item_ecpri nic_ecpri_mask = {
6842 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6846 .dummy[0] = 0xffffffff,
6849 struct mlx5_priv *priv = dev->data->dev_private;
6850 struct mlx5_dev_config *dev_conf = &priv->config;
6851 uint16_t queue_index = 0xFFFF;
6852 const struct rte_flow_item_vlan *vlan_m = NULL;
6853 uint32_t rw_act_num = 0;
6855 const struct mlx5_flow_tunnel *tunnel;
6856 enum mlx5_tof_rule_type tof_rule_type;
6857 struct flow_grp_info grp_info = {
6858 .external = !!external,
6859 .transfer = !!attr->transfer,
6860 .fdb_def_rule = !!priv->fdb_def_rule,
6861 .std_tbl_fix = true,
6863 const struct rte_eth_hairpin_conf *conf;
6864 const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6865 const struct rte_flow_item *port_id_item = NULL;
6866 bool def_policy = false;
6867 uint16_t udp_dport = 0;
6871 tunnel = is_tunnel_offload_active(dev) ?
6872 mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6874 if (priv->representor)
6875 return rte_flow_error_set
6877 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6878 NULL, "decap not supported for VF representor");
6879 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6880 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6881 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6882 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6883 MLX5_FLOW_ACTION_DECAP;
6884 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6885 (dev, attr, tunnel, tof_rule_type);
6887 ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6890 is_root = (uint64_t)ret;
6891 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6892 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6893 int type = items->type;
6895 if (!mlx5_flow_os_item_supported(type))
6896 return rte_flow_error_set(error, ENOTSUP,
6897 RTE_FLOW_ERROR_TYPE_ITEM,
6898 NULL, "item not supported");
6900 case RTE_FLOW_ITEM_TYPE_VOID:
6902 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6903 ret = flow_dv_validate_item_port_id
6904 (dev, items, attr, item_flags, error);
6907 last_item = MLX5_FLOW_ITEM_PORT_ID;
6908 port_id_item = items;
6910 case RTE_FLOW_ITEM_TYPE_ETH:
6911 ret = mlx5_flow_validate_item_eth(items, item_flags,
6915 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6916 MLX5_FLOW_LAYER_OUTER_L2;
6917 if (items->mask != NULL && items->spec != NULL) {
6919 ((const struct rte_flow_item_eth *)
6922 ((const struct rte_flow_item_eth *)
6924 ether_type = rte_be_to_cpu_16(ether_type);
6929 case RTE_FLOW_ITEM_TYPE_VLAN:
6930 ret = flow_dv_validate_item_vlan(items, item_flags,
6934 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6935 MLX5_FLOW_LAYER_OUTER_VLAN;
6936 if (items->mask != NULL && items->spec != NULL) {
6938 ((const struct rte_flow_item_vlan *)
6939 items->spec)->inner_type;
6941 ((const struct rte_flow_item_vlan *)
6942 items->mask)->inner_type;
6943 ether_type = rte_be_to_cpu_16(ether_type);
6947 /* Store outer VLAN mask for of_push_vlan action. */
6949 vlan_m = items->mask;
6951 case RTE_FLOW_ITEM_TYPE_IPV4:
6952 mlx5_flow_tunnel_ip_check(items, next_protocol,
6953 &item_flags, &tunnel);
6954 ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
6955 last_item, ether_type,
6959 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6960 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6961 if (items->mask != NULL &&
6962 ((const struct rte_flow_item_ipv4 *)
6963 items->mask)->hdr.next_proto_id) {
6965 ((const struct rte_flow_item_ipv4 *)
6966 (items->spec))->hdr.next_proto_id;
6968 ((const struct rte_flow_item_ipv4 *)
6969 (items->mask))->hdr.next_proto_id;
6971 /* Reset for inner layer. */
6972 next_protocol = 0xff;
6975 case RTE_FLOW_ITEM_TYPE_IPV6:
6976 mlx5_flow_tunnel_ip_check(items, next_protocol,
6977 &item_flags, &tunnel);
6978 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6985 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6986 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6987 if (items->mask != NULL &&
6988 ((const struct rte_flow_item_ipv6 *)
6989 items->mask)->hdr.proto) {
6991 ((const struct rte_flow_item_ipv6 *)
6992 items->spec)->hdr.proto;
6994 ((const struct rte_flow_item_ipv6 *)
6995 items->spec)->hdr.proto;
6997 ((const struct rte_flow_item_ipv6 *)
6998 items->mask)->hdr.proto;
7000 /* Reset for inner layer. */
7001 next_protocol = 0xff;
7004 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7005 ret = flow_dv_validate_item_ipv6_frag_ext(items,
7010 last_item = tunnel ?
7011 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7012 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7013 if (items->mask != NULL &&
7014 ((const struct rte_flow_item_ipv6_frag_ext *)
7015 items->mask)->hdr.next_header) {
7017 ((const struct rte_flow_item_ipv6_frag_ext *)
7018 items->spec)->hdr.next_header;
7020 ((const struct rte_flow_item_ipv6_frag_ext *)
7021 items->mask)->hdr.next_header;
7023 /* Reset for inner layer. */
7024 next_protocol = 0xff;
7027 case RTE_FLOW_ITEM_TYPE_TCP:
7028 ret = mlx5_flow_validate_item_tcp
7035 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7036 MLX5_FLOW_LAYER_OUTER_L4_TCP;
7038 case RTE_FLOW_ITEM_TYPE_UDP:
7039 ret = mlx5_flow_validate_item_udp(items, item_flags,
7042 const struct rte_flow_item_udp *spec = items->spec;
7043 const struct rte_flow_item_udp *mask = items->mask;
7045 mask = &rte_flow_item_udp_mask;
7047 udp_dport = rte_be_to_cpu_16
7048 (spec->hdr.dst_port &
7049 mask->hdr.dst_port);
7052 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7053 MLX5_FLOW_LAYER_OUTER_L4_UDP;
7055 case RTE_FLOW_ITEM_TYPE_GRE:
7056 ret = mlx5_flow_validate_item_gre(items, item_flags,
7057 next_protocol, error);
7061 last_item = MLX5_FLOW_LAYER_GRE;
7063 case RTE_FLOW_ITEM_TYPE_NVGRE:
7064 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7069 last_item = MLX5_FLOW_LAYER_NVGRE;
7071 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7072 ret = mlx5_flow_validate_item_gre_key
7073 (items, item_flags, gre_item, error);
7076 last_item = MLX5_FLOW_LAYER_GRE_KEY;
7078 case RTE_FLOW_ITEM_TYPE_VXLAN:
7079 ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7084 last_item = MLX5_FLOW_LAYER_VXLAN;
7086 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7087 ret = mlx5_flow_validate_item_vxlan_gpe(items,
7092 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7094 case RTE_FLOW_ITEM_TYPE_GENEVE:
7095 ret = mlx5_flow_validate_item_geneve(items,
7100 geneve_item = items;
7101 last_item = MLX5_FLOW_LAYER_GENEVE;
7103 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7104 ret = mlx5_flow_validate_item_geneve_opt(items,
7111 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7113 case RTE_FLOW_ITEM_TYPE_MPLS:
7114 ret = mlx5_flow_validate_item_mpls(dev, items,
7119 last_item = MLX5_FLOW_LAYER_MPLS;
7122 case RTE_FLOW_ITEM_TYPE_MARK:
7123 ret = flow_dv_validate_item_mark(dev, items, attr,
7127 last_item = MLX5_FLOW_ITEM_MARK;
7129 case RTE_FLOW_ITEM_TYPE_META:
7130 ret = flow_dv_validate_item_meta(dev, items, attr,
7134 last_item = MLX5_FLOW_ITEM_METADATA;
7136 case RTE_FLOW_ITEM_TYPE_ICMP:
7137 ret = mlx5_flow_validate_item_icmp(items, item_flags,
7142 last_item = MLX5_FLOW_LAYER_ICMP;
7144 case RTE_FLOW_ITEM_TYPE_ICMP6:
7145 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7150 item_ipv6_proto = IPPROTO_ICMPV6;
7151 last_item = MLX5_FLOW_LAYER_ICMP6;
7153 case RTE_FLOW_ITEM_TYPE_TAG:
7154 ret = flow_dv_validate_item_tag(dev, items,
7158 last_item = MLX5_FLOW_ITEM_TAG;
7160 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7161 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7163 case RTE_FLOW_ITEM_TYPE_GTP:
7164 ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7169 last_item = MLX5_FLOW_LAYER_GTP;
7171 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7172 ret = flow_dv_validate_item_gtp_psc(items, last_item,
7177 last_item = MLX5_FLOW_LAYER_GTP_PSC;
7179 case RTE_FLOW_ITEM_TYPE_ECPRI:
7180 /* Capacity will be checked in the translate stage. */
7181 ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7188 last_item = MLX5_FLOW_LAYER_ECPRI;
7190 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7191 ret = flow_dv_validate_item_integrity(dev, items,
7199 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7200 ret = flow_dv_validate_item_aso_ct(dev, items,
7201 &item_flags, error);
7205 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7206 /* tunnel offload item was processed before
7207 * list it here as a supported type
7210 case RTE_FLOW_ITEM_TYPE_FLEX:
7211 ret = flow_dv_validate_item_flex(dev, items, item_flags,
7213 tunnel != 0, error);
7218 return rte_flow_error_set(error, ENOTSUP,
7219 RTE_FLOW_ERROR_TYPE_ITEM,
7220 NULL, "item not supported");
7222 item_flags |= last_item;
7224 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7225 ret = flow_dv_validate_item_integrity_post(integrity_items,
7230 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7231 int type = actions->type;
7232 bool shared_count = false;
7234 if (!mlx5_flow_os_action_supported(type))
7235 return rte_flow_error_set(error, ENOTSUP,
7236 RTE_FLOW_ERROR_TYPE_ACTION,
7238 "action not supported");
7239 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7240 return rte_flow_error_set(error, ENOTSUP,
7241 RTE_FLOW_ERROR_TYPE_ACTION,
7242 actions, "too many actions");
7244 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7245 return rte_flow_error_set(error, ENOTSUP,
7246 RTE_FLOW_ERROR_TYPE_ACTION,
7247 NULL, "meter action with policy "
7248 "must be the last action");
7250 case RTE_FLOW_ACTION_TYPE_VOID:
7252 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7253 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7254 ret = flow_dv_validate_action_port_id(dev,
7261 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7264 case RTE_FLOW_ACTION_TYPE_FLAG:
7265 ret = flow_dv_validate_action_flag(dev, action_flags,
7269 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7270 /* Count all modify-header actions as one. */
7271 if (!(action_flags &
7272 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7274 action_flags |= MLX5_FLOW_ACTION_FLAG |
7275 MLX5_FLOW_ACTION_MARK_EXT;
7276 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7277 modify_after_mirror = 1;
7280 action_flags |= MLX5_FLOW_ACTION_FLAG;
7283 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7285 case RTE_FLOW_ACTION_TYPE_MARK:
7286 ret = flow_dv_validate_action_mark(dev, actions,
7291 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7292 /* Count all modify-header actions as one. */
7293 if (!(action_flags &
7294 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7296 action_flags |= MLX5_FLOW_ACTION_MARK |
7297 MLX5_FLOW_ACTION_MARK_EXT;
7298 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7299 modify_after_mirror = 1;
7301 action_flags |= MLX5_FLOW_ACTION_MARK;
7304 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7306 case RTE_FLOW_ACTION_TYPE_SET_META:
7307 ret = flow_dv_validate_action_set_meta(dev, actions,
7312 /* Count all modify-header actions as one action. */
7313 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7315 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7316 modify_after_mirror = 1;
7317 action_flags |= MLX5_FLOW_ACTION_SET_META;
7318 rw_act_num += MLX5_ACT_NUM_SET_META;
7320 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7321 ret = flow_dv_validate_action_set_tag(dev, actions,
7326 /* Count all modify-header actions as one action. */
7327 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7329 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7330 modify_after_mirror = 1;
7331 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7332 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7334 case RTE_FLOW_ACTION_TYPE_DROP:
7335 ret = mlx5_flow_validate_action_drop(action_flags,
7339 action_flags |= MLX5_FLOW_ACTION_DROP;
7342 case RTE_FLOW_ACTION_TYPE_QUEUE:
7343 ret = mlx5_flow_validate_action_queue(actions,
7348 queue_index = ((const struct rte_flow_action_queue *)
7349 (actions->conf))->index;
7350 action_flags |= MLX5_FLOW_ACTION_QUEUE;
7353 case RTE_FLOW_ACTION_TYPE_RSS:
7354 rss = actions->conf;
7355 ret = mlx5_flow_validate_action_rss(actions,
7361 if (rss && sample_rss &&
7362 (sample_rss->level != rss->level ||
7363 sample_rss->types != rss->types))
7364 return rte_flow_error_set(error, ENOTSUP,
7365 RTE_FLOW_ERROR_TYPE_ACTION,
7367 "Can't use the different RSS types "
7368 "or level in the same flow");
7369 if (rss != NULL && rss->queue_num)
7370 queue_index = rss->queue[0];
7371 action_flags |= MLX5_FLOW_ACTION_RSS;
7374 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7376 mlx5_flow_validate_action_default_miss(action_flags,
7380 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7383 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7384 shared_count = true;
7386 case RTE_FLOW_ACTION_TYPE_COUNT:
7387 ret = flow_dv_validate_action_count(dev, shared_count,
7392 action_flags |= MLX5_FLOW_ACTION_COUNT;
7395 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7396 if (flow_dv_validate_action_pop_vlan(dev,
7402 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7403 modify_after_mirror = 1;
7404 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7407 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7408 ret = flow_dv_validate_action_push_vlan(dev,
7415 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7416 modify_after_mirror = 1;
7417 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7420 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7421 ret = flow_dv_validate_action_set_vlan_pcp
7422 (action_flags, actions, error);
7425 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7426 modify_after_mirror = 1;
7427 /* Count PCP with push_vlan command. */
7428 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7430 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7431 ret = flow_dv_validate_action_set_vlan_vid
7432 (item_flags, action_flags,
7436 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7437 modify_after_mirror = 1;
7438 /* Count VID with push_vlan command. */
7439 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7440 rw_act_num += MLX5_ACT_NUM_MDF_VID;
7442 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7443 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7444 ret = flow_dv_validate_action_l2_encap(dev,
7450 action_flags |= MLX5_FLOW_ACTION_ENCAP;
7453 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7454 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7455 ret = flow_dv_validate_action_decap(dev, action_flags,
7456 actions, item_flags,
7460 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7461 modify_after_mirror = 1;
7462 action_flags |= MLX5_FLOW_ACTION_DECAP;
7465 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7466 ret = flow_dv_validate_action_raw_encap_decap
7467 (dev, NULL, actions->conf, attr, &action_flags,
7468 &actions_n, actions, item_flags, error);
7472 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7473 decap = actions->conf;
7474 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7476 if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7480 encap = actions->conf;
7482 ret = flow_dv_validate_action_raw_encap_decap
7484 decap ? decap : &empty_decap, encap,
7485 attr, &action_flags, &actions_n,
7486 actions, item_flags, error);
7489 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7490 (action_flags & MLX5_FLOW_ACTION_DECAP))
7491 modify_after_mirror = 1;
7493 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7494 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7495 ret = flow_dv_validate_action_modify_mac(action_flags,
7501 /* Count all modify-header actions as one action. */
7502 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7504 action_flags |= actions->type ==
7505 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7506 MLX5_FLOW_ACTION_SET_MAC_SRC :
7507 MLX5_FLOW_ACTION_SET_MAC_DST;
7508 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7509 modify_after_mirror = 1;
7511 * Even if the source and destination MAC addresses have
7512 * overlap in the header with 4B alignment, the convert
7513 * function will handle them separately and 4 SW actions
7514 * will be created. And 2 actions will be added each
7515 * time no matter how many bytes of address will be set.
7517 rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7519 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7520 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7521 ret = flow_dv_validate_action_modify_ipv4(action_flags,
7527 /* Count all modify-header actions as one action. */
7528 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7530 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7531 modify_after_mirror = 1;
7532 action_flags |= actions->type ==
7533 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7534 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7535 MLX5_FLOW_ACTION_SET_IPV4_DST;
7536 rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7538 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7539 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7540 ret = flow_dv_validate_action_modify_ipv6(action_flags,
7546 if (item_ipv6_proto == IPPROTO_ICMPV6)
7547 return rte_flow_error_set(error, ENOTSUP,
7548 RTE_FLOW_ERROR_TYPE_ACTION,
7550 "Can't change header "
7551 "with ICMPv6 proto");
7552 /* Count all modify-header actions as one action. */
7553 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7555 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7556 modify_after_mirror = 1;
7557 action_flags |= actions->type ==
7558 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7559 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7560 MLX5_FLOW_ACTION_SET_IPV6_DST;
7561 rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7563 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7564 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7565 ret = flow_dv_validate_action_modify_tp(action_flags,
7571 /* Count all modify-header actions as one action. */
7572 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7574 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7575 modify_after_mirror = 1;
7576 action_flags |= actions->type ==
7577 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7578 MLX5_FLOW_ACTION_SET_TP_SRC :
7579 MLX5_FLOW_ACTION_SET_TP_DST;
7580 rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7582 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7583 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7584 ret = flow_dv_validate_action_modify_ttl(action_flags,
7590 /* Count all modify-header actions as one action. */
7591 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7593 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7594 modify_after_mirror = 1;
7595 action_flags |= actions->type ==
7596 RTE_FLOW_ACTION_TYPE_SET_TTL ?
7597 MLX5_FLOW_ACTION_SET_TTL :
7598 MLX5_FLOW_ACTION_DEC_TTL;
7599 rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7601 case RTE_FLOW_ACTION_TYPE_JUMP:
7602 ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7608 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7610 return rte_flow_error_set(error, EINVAL,
7611 RTE_FLOW_ERROR_TYPE_ACTION,
7613 "sample and jump action combination is not supported");
7615 action_flags |= MLX5_FLOW_ACTION_JUMP;
7617 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7618 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7619 ret = flow_dv_validate_action_modify_tcp_seq
7626 /* Count all modify-header actions as one action. */
7627 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7629 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7630 modify_after_mirror = 1;
7631 action_flags |= actions->type ==
7632 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7633 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7634 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7635 rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7637 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7638 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7639 ret = flow_dv_validate_action_modify_tcp_ack
7646 /* Count all modify-header actions as one action. */
7647 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7649 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7650 modify_after_mirror = 1;
7651 action_flags |= actions->type ==
7652 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7653 MLX5_FLOW_ACTION_INC_TCP_ACK :
7654 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7655 rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7657 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7659 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7660 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7661 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7663 case RTE_FLOW_ACTION_TYPE_METER:
7664 ret = mlx5_flow_validate_action_meter(dev,
7672 action_flags |= MLX5_FLOW_ACTION_METER;
7675 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7677 /* Meter action will add one more TAG action. */
7678 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7680 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7681 if (!attr->transfer && !attr->group)
7682 return rte_flow_error_set(error, ENOTSUP,
7683 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7685 "Shared ASO age action is not supported for group 0");
7686 if (action_flags & MLX5_FLOW_ACTION_AGE)
7687 return rte_flow_error_set
7689 RTE_FLOW_ERROR_TYPE_ACTION,
7691 "duplicate age actions set");
7692 action_flags |= MLX5_FLOW_ACTION_AGE;
7695 case RTE_FLOW_ACTION_TYPE_AGE:
7696 ret = flow_dv_validate_action_age(action_flags,
7702 * Validate the regular AGE action (using counter)
7703 * mutual exclusion with share counter actions.
7705 if (!priv->sh->flow_hit_aso_en) {
7707 return rte_flow_error_set
7709 RTE_FLOW_ERROR_TYPE_ACTION,
7711 "old age and shared count combination is not supported");
7713 return rte_flow_error_set
7715 RTE_FLOW_ERROR_TYPE_ACTION,
7717 "old age action and count must be in the same sub flow");
7719 action_flags |= MLX5_FLOW_ACTION_AGE;
7722 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7723 ret = flow_dv_validate_action_modify_ipv4_dscp
7730 /* Count all modify-header actions as one action. */
7731 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7733 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7734 modify_after_mirror = 1;
7735 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7736 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7738 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7739 ret = flow_dv_validate_action_modify_ipv6_dscp
7746 /* Count all modify-header actions as one action. */
7747 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7749 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7750 modify_after_mirror = 1;
7751 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7752 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7754 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7755 ret = flow_dv_validate_action_sample(&action_flags,
7764 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7767 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7768 ret = flow_dv_validate_action_modify_field(dev,
7775 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7776 modify_after_mirror = 1;
7777 /* Count all modify-header actions as one action. */
7778 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7780 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7783 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7784 ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7789 action_flags |= MLX5_FLOW_ACTION_CT;
7791 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7792 /* tunnel offload action was processed before
7793 * list it here as a supported type
7797 return rte_flow_error_set(error, ENOTSUP,
7798 RTE_FLOW_ERROR_TYPE_ACTION,
7800 "action not supported");
7804 * Validate actions in flow rules
7805 * - Explicit decap action is prohibited by the tunnel offload API.
7806 * - Drop action in tunnel steer rule is prohibited by the API.
7807 * - Application cannot use MARK action because it's value can mask
7808 * tunnel default miss nitification.
7809 * - JUMP in tunnel match rule has no support in current PMD
7811 * - TAG & META are reserved for future uses.
7813 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7814 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP |
7815 MLX5_FLOW_ACTION_MARK |
7816 MLX5_FLOW_ACTION_SET_TAG |
7817 MLX5_FLOW_ACTION_SET_META |
7818 MLX5_FLOW_ACTION_DROP;
7820 if (action_flags & bad_actions_mask)
7821 return rte_flow_error_set
7823 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7824 "Invalid RTE action in tunnel "
7826 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7827 return rte_flow_error_set
7829 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7830 "tunnel set decap rule must terminate "
7833 return rte_flow_error_set
7835 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7836 "tunnel flows for ingress traffic only");
7838 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7839 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP |
7840 MLX5_FLOW_ACTION_MARK |
7841 MLX5_FLOW_ACTION_SET_TAG |
7842 MLX5_FLOW_ACTION_SET_META;
7844 if (action_flags & bad_actions_mask)
7845 return rte_flow_error_set
7847 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7848 "Invalid RTE action in tunnel "
7852 * Validate the drop action mutual exclusion with other actions.
7853 * Drop action is mutually-exclusive with any other action, except for
7855 * Drop action compatibility with tunnel offload was already validated.
7857 if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7858 MLX5_FLOW_ACTION_TUNNEL_MATCH));
7859 else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7860 (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7861 return rte_flow_error_set(error, EINVAL,
7862 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7863 "Drop action is mutually-exclusive "
7864 "with any other action, except for "
7866 /* Eswitch has few restrictions on using items and actions */
7867 if (attr->transfer) {
7868 if (!mlx5_flow_ext_mreg_supported(dev) &&
7869 action_flags & MLX5_FLOW_ACTION_FLAG)
7870 return rte_flow_error_set(error, ENOTSUP,
7871 RTE_FLOW_ERROR_TYPE_ACTION,
7873 "unsupported action FLAG");
7874 if (!mlx5_flow_ext_mreg_supported(dev) &&
7875 action_flags & MLX5_FLOW_ACTION_MARK)
7876 return rte_flow_error_set(error, ENOTSUP,
7877 RTE_FLOW_ERROR_TYPE_ACTION,
7879 "unsupported action MARK");
7880 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7881 return rte_flow_error_set(error, ENOTSUP,
7882 RTE_FLOW_ERROR_TYPE_ACTION,
7884 "unsupported action QUEUE");
7885 if (action_flags & MLX5_FLOW_ACTION_RSS)
7886 return rte_flow_error_set(error, ENOTSUP,
7887 RTE_FLOW_ERROR_TYPE_ACTION,
7889 "unsupported action RSS");
7890 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7891 return rte_flow_error_set(error, EINVAL,
7892 RTE_FLOW_ERROR_TYPE_ACTION,
7894 "no fate action is found");
7896 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7897 return rte_flow_error_set(error, EINVAL,
7898 RTE_FLOW_ERROR_TYPE_ACTION,
7900 "no fate action is found");
7903 * Continue validation for Xcap and VLAN actions.
7904 * If hairpin is working in explicit TX rule mode, there is no actions
7905 * splitting and the validation of hairpin ingress flow should be the
7906 * same as other standard flows.
7908 if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7909 MLX5_FLOW_VLAN_ACTIONS)) &&
7910 (queue_index == 0xFFFF ||
7911 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7912 ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7913 conf->tx_explicit != 0))) {
7914 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7915 MLX5_FLOW_XCAP_ACTIONS)
7916 return rte_flow_error_set(error, ENOTSUP,
7917 RTE_FLOW_ERROR_TYPE_ACTION,
7918 NULL, "encap and decap "
7919 "combination aren't supported");
7920 if (!attr->transfer && attr->ingress) {
7921 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7922 return rte_flow_error_set
7924 RTE_FLOW_ERROR_TYPE_ACTION,
7925 NULL, "encap is not supported"
7926 " for ingress traffic");
7927 else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7928 return rte_flow_error_set
7930 RTE_FLOW_ERROR_TYPE_ACTION,
7931 NULL, "push VLAN action not "
7932 "supported for ingress");
7933 else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7934 MLX5_FLOW_VLAN_ACTIONS)
7935 return rte_flow_error_set
7937 RTE_FLOW_ERROR_TYPE_ACTION,
7938 NULL, "no support for "
7939 "multiple VLAN actions");
7942 if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7943 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7944 ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7946 return rte_flow_error_set
7948 RTE_FLOW_ERROR_TYPE_ACTION,
7949 NULL, "fate action not supported for "
7950 "meter with policy");
7952 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7953 return rte_flow_error_set
7955 RTE_FLOW_ERROR_TYPE_ACTION,
7956 NULL, "modify header action in egress "
7957 "cannot be done before meter action");
7958 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7959 return rte_flow_error_set
7961 RTE_FLOW_ERROR_TYPE_ACTION,
7962 NULL, "encap action in egress "
7963 "cannot be done before meter action");
7964 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7965 return rte_flow_error_set
7967 RTE_FLOW_ERROR_TYPE_ACTION,
7968 NULL, "push vlan action in egress "
7969 "cannot be done before meter action");
7973 * Hairpin flow will add one more TAG action in TX implicit mode.
7974 * In TX explicit mode, there will be no hairpin flow ID.
7977 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7978 /* extra metadata enabled: one more TAG action will be add. */
7979 if (dev_conf->dv_flow_en &&
7980 dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7981 mlx5_flow_ext_mreg_supported(dev))
7982 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7984 flow_dv_modify_hdr_action_max(dev, is_root)) {
7985 return rte_flow_error_set(error, ENOTSUP,
7986 RTE_FLOW_ERROR_TYPE_ACTION,
7987 NULL, "too many header modify"
7988 " actions to support");
7990 /* Eswitch egress mirror and modify flow has limitation on CX5 */
7991 if (fdb_mirror_limit && modify_after_mirror)
7992 return rte_flow_error_set(error, EINVAL,
7993 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7994 "sample before modify action is not supported");
7999 * Internal preparation function. Allocates the DV flow size,
8000 * this size is constant.
8003 * Pointer to the rte_eth_dev structure.
8005 * Pointer to the flow attributes.
8007 * Pointer to the list of items.
8008 * @param[in] actions
8009 * Pointer to the list of actions.
8011 * Pointer to the error structure.
8014 * Pointer to mlx5_flow object on success,
8015 * otherwise NULL and rte_errno is set.
8017 static struct mlx5_flow *
8018 flow_dv_prepare(struct rte_eth_dev *dev,
8019 const struct rte_flow_attr *attr __rte_unused,
8020 const struct rte_flow_item items[] __rte_unused,
8021 const struct rte_flow_action actions[] __rte_unused,
8022 struct rte_flow_error *error)
8024 uint32_t handle_idx = 0;
8025 struct mlx5_flow *dev_flow;
8026 struct mlx5_flow_handle *dev_handle;
8027 struct mlx5_priv *priv = dev->data->dev_private;
8028 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8031 wks->skip_matcher_reg = 0;
8033 wks->final_policy = NULL;
8034 /* In case of corrupting the memory. */
8035 if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8036 rte_flow_error_set(error, ENOSPC,
8037 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8038 "not free temporary device flow");
8041 dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8044 rte_flow_error_set(error, ENOMEM,
8045 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8046 "not enough memory to create flow handle");
8049 MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8050 dev_flow = &wks->flows[wks->flow_idx++];
8051 memset(dev_flow, 0, sizeof(*dev_flow));
8052 dev_flow->handle = dev_handle;
8053 dev_flow->handle_idx = handle_idx;
8054 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8055 dev_flow->ingress = attr->ingress;
8056 dev_flow->dv.transfer = attr->transfer;
8060 #ifdef RTE_LIBRTE_MLX5_DEBUG
8062 * Sanity check for match mask and value. Similar to check_valid_spec() in
8063 * kernel driver. If unmasked bit is present in value, it returns failure.
8066 * pointer to match mask buffer.
8067 * @param match_value
8068 * pointer to match value buffer.
8071 * 0 if valid, -EINVAL otherwise.
8074 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8076 uint8_t *m = match_mask;
8077 uint8_t *v = match_value;
8080 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8083 "match_value differs from match_criteria"
8084 " %p[%u] != %p[%u]",
8085 match_value, i, match_mask, i);
8094 * Add match of ip_version.
8098 * @param[in] headers_v
8099 * Values header pointer.
8100 * @param[in] headers_m
8101 * Masks header pointer.
8102 * @param[in] ip_version
8103 * The IP version to set.
8106 flow_dv_set_match_ip_version(uint32_t group,
8112 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8114 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8116 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8117 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8118 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8122 * Add Ethernet item to matcher and to the value.
8124 * @param[in, out] matcher
8126 * @param[in, out] key
8127 * Flow matcher value.
8129 * Flow pattern to translate.
8131 * Item is inner pattern.
8134 flow_dv_translate_item_eth(void *matcher, void *key,
8135 const struct rte_flow_item *item, int inner,
8138 const struct rte_flow_item_eth *eth_m = item->mask;
8139 const struct rte_flow_item_eth *eth_v = item->spec;
8140 const struct rte_flow_item_eth nic_mask = {
8141 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8142 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8143 .type = RTE_BE16(0xffff),
8156 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8158 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8160 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8162 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8164 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8165 ð_m->dst, sizeof(eth_m->dst));
8166 /* The value must be in the range of the mask. */
8167 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8168 for (i = 0; i < sizeof(eth_m->dst); ++i)
8169 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8170 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8171 ð_m->src, sizeof(eth_m->src));
8172 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8173 /* The value must be in the range of the mask. */
8174 for (i = 0; i < sizeof(eth_m->dst); ++i)
8175 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8177 * HW supports match on one Ethertype, the Ethertype following the last
8178 * VLAN tag of the packet (see PRM).
8179 * Set match on ethertype only if ETH header is not followed by VLAN.
8180 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8181 * ethertype, and use ip_version field instead.
8182 * eCPRI over Ether layer will use type value 0xAEFE.
8184 if (eth_m->type == 0xFFFF) {
8185 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8186 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8187 switch (eth_v->type) {
8188 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8189 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8191 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8192 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8193 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8195 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8196 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8198 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8199 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8205 if (eth_m->has_vlan) {
8206 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8207 if (eth_v->has_vlan) {
8209 * Here, when also has_more_vlan field in VLAN item is
8210 * not set, only single-tagged packets will be matched.
8212 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8216 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8217 rte_be_to_cpu_16(eth_m->type));
8218 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8219 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8223 * Add VLAN item to matcher and to the value.
8225 * @param[in, out] dev_flow
8227 * @param[in, out] matcher
8229 * @param[in, out] key
8230 * Flow matcher value.
8232 * Flow pattern to translate.
8234 * Item is inner pattern.
8237 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8238 void *matcher, void *key,
8239 const struct rte_flow_item *item,
8240 int inner, uint32_t group)
8242 const struct rte_flow_item_vlan *vlan_m = item->mask;
8243 const struct rte_flow_item_vlan *vlan_v = item->spec;
8250 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8252 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8254 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8256 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8258 * This is workaround, masks are not supported,
8259 * and pre-validated.
8262 dev_flow->handle->vf_vlan.tag =
8263 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8266 * When VLAN item exists in flow, mark packet as tagged,
8267 * even if TCI is not specified.
8269 if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8270 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8271 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8276 vlan_m = &rte_flow_item_vlan_mask;
8277 tci_m = rte_be_to_cpu_16(vlan_m->tci);
8278 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8279 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8280 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8281 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8282 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8283 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8284 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8286 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8287 * ethertype, and use ip_version field instead.
8289 if (vlan_m->inner_type == 0xFFFF) {
8290 switch (vlan_v->inner_type) {
8291 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8292 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8293 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8294 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8296 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8297 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8299 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8300 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8306 if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8307 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8308 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8309 /* Only one vlan_tag bit can be set. */
8310 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8313 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8314 rte_be_to_cpu_16(vlan_m->inner_type));
8315 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8316 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8320 * Add IPV4 item to matcher and to the value.
8322 * @param[in, out] matcher
8324 * @param[in, out] key
8325 * Flow matcher value.
8327 * Flow pattern to translate.
8329 * Item is inner pattern.
8331 * The group to insert the rule.
8334 flow_dv_translate_item_ipv4(void *matcher, void *key,
8335 const struct rte_flow_item *item,
8336 int inner, uint32_t group)
8338 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8339 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8340 const struct rte_flow_item_ipv4 nic_mask = {
8342 .src_addr = RTE_BE32(0xffffffff),
8343 .dst_addr = RTE_BE32(0xffffffff),
8344 .type_of_service = 0xff,
8345 .next_proto_id = 0xff,
8346 .time_to_live = 0xff,
8353 uint8_t tos, ihl_m, ihl_v;
8356 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8358 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8360 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8362 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8364 flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8369 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8370 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8371 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8372 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8373 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8374 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8375 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8376 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8377 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8378 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8379 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8380 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8381 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8382 ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8383 ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8384 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8385 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8386 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8387 ipv4_m->hdr.type_of_service);
8388 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8389 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8390 ipv4_m->hdr.type_of_service >> 2);
8391 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8392 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8393 ipv4_m->hdr.next_proto_id);
8394 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8395 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8396 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8397 ipv4_m->hdr.time_to_live);
8398 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8399 ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8400 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8401 !!(ipv4_m->hdr.fragment_offset));
8402 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8403 !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8407 * Add IPV6 item to matcher and to the value.
8409 * @param[in, out] matcher
8411 * @param[in, out] key
8412 * Flow matcher value.
8414 * Flow pattern to translate.
8416 * Item is inner pattern.
8418 * The group to insert the rule.
8421 flow_dv_translate_item_ipv6(void *matcher, void *key,
8422 const struct rte_flow_item *item,
8423 int inner, uint32_t group)
8425 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8426 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8427 const struct rte_flow_item_ipv6 nic_mask = {
8430 "\xff\xff\xff\xff\xff\xff\xff\xff"
8431 "\xff\xff\xff\xff\xff\xff\xff\xff",
8433 "\xff\xff\xff\xff\xff\xff\xff\xff"
8434 "\xff\xff\xff\xff\xff\xff\xff\xff",
8435 .vtc_flow = RTE_BE32(0xffffffff),
8442 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8443 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8452 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8454 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8456 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8458 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8460 flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8465 size = sizeof(ipv6_m->hdr.dst_addr);
8466 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8467 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8468 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8469 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8470 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8471 for (i = 0; i < size; ++i)
8472 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8473 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8474 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8475 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8476 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8477 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8478 for (i = 0; i < size; ++i)
8479 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8481 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8482 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8483 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8484 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8485 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8486 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8489 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8491 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8494 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8496 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8500 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8502 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8503 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8505 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8506 ipv6_m->hdr.hop_limits);
8507 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8508 ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8509 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8510 !!(ipv6_m->has_frag_ext));
8511 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8512 !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8516 * Add IPV6 fragment extension item to matcher and to the value.
8518 * @param[in, out] matcher
8520 * @param[in, out] key
8521 * Flow matcher value.
8523 * Flow pattern to translate.
8525 * Item is inner pattern.
8528 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8529 const struct rte_flow_item *item,
8532 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8533 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8534 const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8536 .next_header = 0xff,
8537 .frag_data = RTE_BE16(0xffff),
8544 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8546 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8548 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8550 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8552 /* IPv6 fragment extension item exists, so packet is IP fragment. */
8553 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8554 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8555 if (!ipv6_frag_ext_v)
8557 if (!ipv6_frag_ext_m)
8558 ipv6_frag_ext_m = &nic_mask;
8559 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8560 ipv6_frag_ext_m->hdr.next_header);
8561 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8562 ipv6_frag_ext_v->hdr.next_header &
8563 ipv6_frag_ext_m->hdr.next_header);
8567 * Add TCP item to matcher and to the value.
8569 * @param[in, out] matcher
8571 * @param[in, out] key
8572 * Flow matcher value.
8574 * Flow pattern to translate.
8576 * Item is inner pattern.
8579 flow_dv_translate_item_tcp(void *matcher, void *key,
8580 const struct rte_flow_item *item,
8583 const struct rte_flow_item_tcp *tcp_m = item->mask;
8584 const struct rte_flow_item_tcp *tcp_v = item->spec;
8589 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8591 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8593 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8595 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8597 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8598 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8602 tcp_m = &rte_flow_item_tcp_mask;
8603 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8604 rte_be_to_cpu_16(tcp_m->hdr.src_port));
8605 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8606 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8607 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8608 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8609 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8610 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8611 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8612 tcp_m->hdr.tcp_flags);
8613 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8614 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8618 * Add UDP item to matcher and to the value.
8620 * @param[in, out] matcher
8622 * @param[in, out] key
8623 * Flow matcher value.
8625 * Flow pattern to translate.
8627 * Item is inner pattern.
8630 flow_dv_translate_item_udp(void *matcher, void *key,
8631 const struct rte_flow_item *item,
8634 const struct rte_flow_item_udp *udp_m = item->mask;
8635 const struct rte_flow_item_udp *udp_v = item->spec;
8640 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8642 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8644 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8646 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8648 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8649 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8653 udp_m = &rte_flow_item_udp_mask;
8654 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8655 rte_be_to_cpu_16(udp_m->hdr.src_port));
8656 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8657 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8658 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8659 rte_be_to_cpu_16(udp_m->hdr.dst_port));
8660 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8661 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8665 * Add GRE optional Key item to matcher and to the value.
8667 * @param[in, out] matcher
8669 * @param[in, out] key
8670 * Flow matcher value.
8672 * Flow pattern to translate.
8674 * Item is inner pattern.
8677 flow_dv_translate_item_gre_key(void *matcher, void *key,
8678 const struct rte_flow_item *item)
8680 const rte_be32_t *key_m = item->mask;
8681 const rte_be32_t *key_v = item->spec;
8682 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8683 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8684 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8686 /* GRE K bit must be on and should already be validated */
8687 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8688 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8692 key_m = &gre_key_default_mask;
8693 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8694 rte_be_to_cpu_32(*key_m) >> 8);
8695 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8696 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8697 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8698 rte_be_to_cpu_32(*key_m) & 0xFF);
8699 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8700 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8704 * Add GRE item to matcher and to the value.
8706 * @param[in, out] matcher
8708 * @param[in, out] key
8709 * Flow matcher value.
8711 * Flow pattern to translate.
8713 * Item is inner pattern.
8716 flow_dv_translate_item_gre(void *matcher, void *key,
8717 const struct rte_flow_item *item,
8720 const struct rte_flow_item_gre *gre_m = item->mask;
8721 const struct rte_flow_item_gre *gre_v = item->spec;
8724 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8725 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8732 uint16_t s_present:1;
8733 uint16_t k_present:1;
8734 uint16_t rsvd_bit1:1;
8735 uint16_t c_present:1;
8739 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8742 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8744 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8746 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8748 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8750 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8751 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8755 gre_m = &rte_flow_item_gre_mask;
8756 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8757 rte_be_to_cpu_16(gre_m->protocol));
8758 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8759 rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8760 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8761 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8762 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8763 gre_crks_rsvd0_ver_m.c_present);
8764 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8765 gre_crks_rsvd0_ver_v.c_present &
8766 gre_crks_rsvd0_ver_m.c_present);
8767 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8768 gre_crks_rsvd0_ver_m.k_present);
8769 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8770 gre_crks_rsvd0_ver_v.k_present &
8771 gre_crks_rsvd0_ver_m.k_present);
8772 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8773 gre_crks_rsvd0_ver_m.s_present);
8774 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8775 gre_crks_rsvd0_ver_v.s_present &
8776 gre_crks_rsvd0_ver_m.s_present);
8780 * Add NVGRE item to matcher and to the value.
8782 * @param[in, out] matcher
8784 * @param[in, out] key
8785 * Flow matcher value.
8787 * Flow pattern to translate.
8789 * Item is inner pattern.
8792 flow_dv_translate_item_nvgre(void *matcher, void *key,
8793 const struct rte_flow_item *item,
8796 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8797 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8798 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8799 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8800 const char *tni_flow_id_m;
8801 const char *tni_flow_id_v;
8807 /* For NVGRE, GRE header fields must be set with defined values. */
8808 const struct rte_flow_item_gre gre_spec = {
8809 .c_rsvd0_ver = RTE_BE16(0x2000),
8810 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8812 const struct rte_flow_item_gre gre_mask = {
8813 .c_rsvd0_ver = RTE_BE16(0xB000),
8814 .protocol = RTE_BE16(UINT16_MAX),
8816 const struct rte_flow_item gre_item = {
8821 flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8825 nvgre_m = &rte_flow_item_nvgre_mask;
8826 tni_flow_id_m = (const char *)nvgre_m->tni;
8827 tni_flow_id_v = (const char *)nvgre_v->tni;
8828 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8829 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8830 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8831 memcpy(gre_key_m, tni_flow_id_m, size);
8832 for (i = 0; i < size; ++i)
8833 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8837 * Add VXLAN item to matcher and to the value.
8840 * Pointer to the Ethernet device structure.
8842 * Flow rule attributes.
8843 * @param[in, out] matcher
8845 * @param[in, out] key
8846 * Flow matcher value.
8848 * Flow pattern to translate.
8850 * Item is inner pattern.
8853 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8854 const struct rte_flow_attr *attr,
8855 void *matcher, void *key,
8856 const struct rte_flow_item *item,
8859 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8860 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8865 uint32_t *tunnel_header_v;
8866 uint32_t *tunnel_header_m;
8868 struct mlx5_priv *priv = dev->data->dev_private;
8869 const struct rte_flow_item_vxlan nic_mask = {
8870 .vni = "\xff\xff\xff",
8875 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8877 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8879 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8881 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8883 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8884 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8885 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8886 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8887 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8889 dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8893 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8894 (attr->group && !priv->sh->misc5_cap))
8895 vxlan_m = &rte_flow_item_vxlan_mask;
8897 vxlan_m = &nic_mask;
8899 if ((priv->sh->steering_format_version ==
8900 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8901 dport != MLX5_UDP_PORT_VXLAN) ||
8902 (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8903 ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8910 misc_m = MLX5_ADDR_OF(fte_match_param,
8911 matcher, misc_parameters);
8912 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8913 size = sizeof(vxlan_m->vni);
8914 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8915 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8916 memcpy(vni_m, vxlan_m->vni, size);
8917 for (i = 0; i < size; ++i)
8918 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8921 misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8922 misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8923 tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8926 tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8929 *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8930 (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8931 (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8932 if (*tunnel_header_v)
8933 *tunnel_header_m = vxlan_m->vni[0] |
8934 vxlan_m->vni[1] << 8 |
8935 vxlan_m->vni[2] << 16;
8937 *tunnel_header_m = 0x0;
8938 *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8939 if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8940 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8944 * Add VXLAN-GPE item to matcher and to the value.
8946 * @param[in, out] matcher
8948 * @param[in, out] key
8949 * Flow matcher value.
8951 * Flow pattern to translate.
8953 * Item is inner pattern.
8957 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8958 const struct rte_flow_item *item, int inner)
8960 const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8961 const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8965 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8967 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8973 uint8_t flags_m = 0xff;
8974 uint8_t flags_v = 0xc;
8977 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8979 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8981 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8983 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8985 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8986 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8987 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8988 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8989 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8994 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8995 size = sizeof(vxlan_m->vni);
8996 vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8997 vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8998 memcpy(vni_m, vxlan_m->vni, size);
8999 for (i = 0; i < size; ++i)
9000 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9001 if (vxlan_m->flags) {
9002 flags_m = vxlan_m->flags;
9003 flags_v = vxlan_v->flags;
9005 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9006 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9007 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
9009 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
9014 * Add Geneve item to matcher and to the value.
9016 * @param[in, out] matcher
9018 * @param[in, out] key
9019 * Flow matcher value.
9021 * Flow pattern to translate.
9023 * Item is inner pattern.
9027 flow_dv_translate_item_geneve(void *matcher, void *key,
9028 const struct rte_flow_item *item, int inner)
9030 const struct rte_flow_item_geneve *geneve_m = item->mask;
9031 const struct rte_flow_item_geneve *geneve_v = item->spec;
9034 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9035 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9044 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9046 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9048 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9050 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9052 dport = MLX5_UDP_PORT_GENEVE;
9053 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9054 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9055 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9060 geneve_m = &rte_flow_item_geneve_mask;
9061 size = sizeof(geneve_m->vni);
9062 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9063 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9064 memcpy(vni_m, geneve_m->vni, size);
9065 for (i = 0; i < size; ++i)
9066 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9067 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
9068 rte_be_to_cpu_16(geneve_m->protocol));
9069 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9070 rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
9071 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9072 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9073 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9074 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9075 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9076 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9077 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9078 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9079 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9080 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9081 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9085 * Create Geneve TLV option resource.
9087 * @param dev[in, out]
9088 * Pointer to rte_eth_dev structure.
9089 * @param[in, out] tag_be24
9090 * Tag value in big endian then R-shift 8.
9091 * @parm[in, out] dev_flow
9092 * Pointer to the dev_flow.
9094 * pointer to error structure.
9097 * 0 on success otherwise -errno and errno is set.
9101 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9102 const struct rte_flow_item *item,
9103 struct rte_flow_error *error)
9105 struct mlx5_priv *priv = dev->data->dev_private;
9106 struct mlx5_dev_ctx_shared *sh = priv->sh;
9107 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9108 sh->geneve_tlv_option_resource;
9109 struct mlx5_devx_obj *obj;
9110 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9115 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9116 if (geneve_opt_resource != NULL) {
9117 if (geneve_opt_resource->option_class ==
9118 geneve_opt_v->option_class &&
9119 geneve_opt_resource->option_type ==
9120 geneve_opt_v->option_type &&
9121 geneve_opt_resource->length ==
9122 geneve_opt_v->option_len) {
9123 /* We already have GENVE TLV option obj allocated. */
9124 __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9127 ret = rte_flow_error_set(error, ENOMEM,
9128 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9129 "Only one GENEVE TLV option supported");
9133 /* Create a GENEVE TLV object and resource. */
9134 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9135 geneve_opt_v->option_class,
9136 geneve_opt_v->option_type,
9137 geneve_opt_v->option_len);
9139 ret = rte_flow_error_set(error, ENODATA,
9140 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9141 "Failed to create GENEVE TLV Devx object");
9144 sh->geneve_tlv_option_resource =
9145 mlx5_malloc(MLX5_MEM_ZERO,
9146 sizeof(*geneve_opt_resource),
9148 if (!sh->geneve_tlv_option_resource) {
9149 claim_zero(mlx5_devx_cmd_destroy(obj));
9150 ret = rte_flow_error_set(error, ENOMEM,
9151 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9152 "GENEVE TLV object memory allocation failed");
9155 geneve_opt_resource = sh->geneve_tlv_option_resource;
9156 geneve_opt_resource->obj = obj;
9157 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9158 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9159 geneve_opt_resource->length = geneve_opt_v->option_len;
9160 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9164 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9169 * Add Geneve TLV option item to matcher.
9171 * @param[in, out] dev
9172 * Pointer to rte_eth_dev structure.
9173 * @param[in, out] matcher
9175 * @param[in, out] key
9176 * Flow matcher value.
9178 * Flow pattern to translate.
9180 * Pointer to error structure.
9183 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9184 void *key, const struct rte_flow_item *item,
9185 struct rte_flow_error *error)
9187 const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9188 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9189 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9190 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9191 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9193 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9194 rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9200 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9201 ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9204 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9208 * Set the option length in GENEVE header if not requested.
9209 * The GENEVE TLV option length is expressed by the option length field
9210 * in the GENEVE header.
9211 * If the option length was not requested but the GENEVE TLV option item
9212 * is present we set the option length field implicitly.
9214 if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9215 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9216 MLX5_GENEVE_OPTLEN_MASK);
9217 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9218 geneve_opt_v->option_len + 1);
9220 MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9221 MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9223 if (geneve_opt_v->data) {
9224 memcpy(&opt_data_key, geneve_opt_v->data,
9225 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9226 sizeof(opt_data_key)));
9227 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9228 sizeof(opt_data_key));
9229 memcpy(&opt_data_mask, geneve_opt_m->data,
9230 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9231 sizeof(opt_data_mask)));
9232 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9233 sizeof(opt_data_mask));
9234 MLX5_SET(fte_match_set_misc3, misc3_m,
9235 geneve_tlv_option_0_data,
9236 rte_be_to_cpu_32(opt_data_mask));
9237 MLX5_SET(fte_match_set_misc3, misc3_v,
9238 geneve_tlv_option_0_data,
9239 rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9245 * Add MPLS item to matcher and to the value.
9247 * @param[in, out] matcher
9249 * @param[in, out] key
9250 * Flow matcher value.
9252 * Flow pattern to translate.
9253 * @param[in] prev_layer
9254 * The protocol layer indicated in previous item.
9256 * Item is inner pattern.
9259 flow_dv_translate_item_mpls(void *matcher, void *key,
9260 const struct rte_flow_item *item,
9261 uint64_t prev_layer,
9264 const uint32_t *in_mpls_m = item->mask;
9265 const uint32_t *in_mpls_v = item->spec;
9266 uint32_t *out_mpls_m = 0;
9267 uint32_t *out_mpls_v = 0;
9268 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9269 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9270 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9272 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9273 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9274 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9276 switch (prev_layer) {
9277 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9278 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9279 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9280 MLX5_UDP_PORT_MPLS);
9282 case MLX5_FLOW_LAYER_GRE:
9284 case MLX5_FLOW_LAYER_GRE_KEY:
9285 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9286 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9287 RTE_ETHER_TYPE_MPLS);
9295 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9296 switch (prev_layer) {
9297 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9299 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9300 outer_first_mpls_over_udp);
9302 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9303 outer_first_mpls_over_udp);
9305 case MLX5_FLOW_LAYER_GRE:
9307 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9308 outer_first_mpls_over_gre);
9310 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9311 outer_first_mpls_over_gre);
9314 /* Inner MPLS not over GRE is not supported. */
9317 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9321 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9327 if (out_mpls_m && out_mpls_v) {
9328 *out_mpls_m = *in_mpls_m;
9329 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9334 * Add metadata register item to matcher
9336 * @param[in, out] matcher
9338 * @param[in, out] key
9339 * Flow matcher value.
9340 * @param[in] reg_type
9341 * Type of device metadata register
9348 flow_dv_match_meta_reg(void *matcher, void *key,
9349 enum modify_reg reg_type,
9350 uint32_t data, uint32_t mask)
9353 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9355 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9361 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9362 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9365 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9366 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9370 * The metadata register C0 field might be divided into
9371 * source vport index and META item value, we should set
9372 * this field according to specified mask, not as whole one.
9374 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9376 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9377 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9380 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9383 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9384 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9387 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9388 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9391 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9392 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9395 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9396 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9399 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9400 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9403 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9404 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9407 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9408 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9417 * Add MARK item to matcher
9420 * The device to configure through.
9421 * @param[in, out] matcher
9423 * @param[in, out] key
9424 * Flow matcher value.
9426 * Flow pattern to translate.
9429 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9430 void *matcher, void *key,
9431 const struct rte_flow_item *item)
9433 struct mlx5_priv *priv = dev->data->dev_private;
9434 const struct rte_flow_item_mark *mark;
9438 mark = item->mask ? (const void *)item->mask :
9439 &rte_flow_item_mark_mask;
9440 mask = mark->id & priv->sh->dv_mark_mask;
9441 mark = (const void *)item->spec;
9443 value = mark->id & priv->sh->dv_mark_mask & mask;
9445 enum modify_reg reg;
9447 /* Get the metadata register index for the mark. */
9448 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9449 MLX5_ASSERT(reg > 0);
9450 if (reg == REG_C_0) {
9451 struct mlx5_priv *priv = dev->data->dev_private;
9452 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9453 uint32_t shl_c0 = rte_bsf32(msk_c0);
9459 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9464 * Add META item to matcher
9467 * The devich to configure through.
9468 * @param[in, out] matcher
9470 * @param[in, out] key
9471 * Flow matcher value.
9473 * Attributes of flow that includes this item.
9475 * Flow pattern to translate.
9478 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9479 void *matcher, void *key,
9480 const struct rte_flow_attr *attr,
9481 const struct rte_flow_item *item)
9483 const struct rte_flow_item_meta *meta_m;
9484 const struct rte_flow_item_meta *meta_v;
9486 meta_m = (const void *)item->mask;
9488 meta_m = &rte_flow_item_meta_mask;
9489 meta_v = (const void *)item->spec;
9492 uint32_t value = meta_v->data;
9493 uint32_t mask = meta_m->data;
9495 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9498 MLX5_ASSERT(reg != REG_NON);
9499 if (reg == REG_C_0) {
9500 struct mlx5_priv *priv = dev->data->dev_private;
9501 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9502 uint32_t shl_c0 = rte_bsf32(msk_c0);
9508 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9513 * Add vport metadata Reg C0 item to matcher
9515 * @param[in, out] matcher
9517 * @param[in, out] key
9518 * Flow matcher value.
9520 * Flow pattern to translate.
9523 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9524 uint32_t value, uint32_t mask)
9526 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9530 * Add tag item to matcher
9533 * The devich to configure through.
9534 * @param[in, out] matcher
9536 * @param[in, out] key
9537 * Flow matcher value.
9539 * Flow pattern to translate.
9542 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9543 void *matcher, void *key,
9544 const struct rte_flow_item *item)
9546 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9547 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9548 uint32_t mask, value;
9551 value = tag_v->data;
9552 mask = tag_m ? tag_m->data : UINT32_MAX;
9553 if (tag_v->id == REG_C_0) {
9554 struct mlx5_priv *priv = dev->data->dev_private;
9555 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9556 uint32_t shl_c0 = rte_bsf32(msk_c0);
9562 flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9566 * Add TAG item to matcher
9569 * The devich to configure through.
9570 * @param[in, out] matcher
9572 * @param[in, out] key
9573 * Flow matcher value.
9575 * Flow pattern to translate.
9578 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9579 void *matcher, void *key,
9580 const struct rte_flow_item *item)
9582 const struct rte_flow_item_tag *tag_v = item->spec;
9583 const struct rte_flow_item_tag *tag_m = item->mask;
9584 enum modify_reg reg;
9587 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9588 /* Get the metadata register index for the tag. */
9589 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9590 MLX5_ASSERT(reg > 0);
9591 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9595 * Add source vport match to the specified matcher.
9597 * @param[in, out] matcher
9599 * @param[in, out] key
9600 * Flow matcher value.
9602 * Source vport value to match
9607 flow_dv_translate_item_source_vport(void *matcher, void *key,
9608 int16_t port, uint16_t mask)
9610 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9611 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9613 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9614 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9618 * Translate port-id item to eswitch match on port-id.
9621 * The devich to configure through.
9622 * @param[in, out] matcher
9624 * @param[in, out] key
9625 * Flow matcher value.
9627 * Flow pattern to translate.
9632 * 0 on success, a negative errno value otherwise.
9635 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9636 void *key, const struct rte_flow_item *item,
9637 const struct rte_flow_attr *attr)
9639 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9640 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9641 struct mlx5_priv *priv;
9644 if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9645 flow_dv_translate_item_source_vport(matcher, key,
9646 flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9649 mask = pid_m ? pid_m->id : 0xffff;
9650 id = pid_v ? pid_v->id : dev->data->port_id;
9651 priv = mlx5_port_to_eswitch_info(id, item == NULL);
9655 * Translate to vport field or to metadata, depending on mode.
9656 * Kernel can use either misc.source_port or half of C0 metadata
9659 if (priv->vport_meta_mask) {
9661 * Provide the hint for SW steering library
9662 * to insert the flow into ingress domain and
9663 * save the extra vport match.
9665 if (mask == 0xffff && priv->vport_id == 0xffff &&
9666 priv->pf_bond < 0 && attr->transfer)
9667 flow_dv_translate_item_source_vport
9668 (matcher, key, priv->vport_id, mask);
9670 * We should always set the vport metadata register,
9671 * otherwise the SW steering library can drop
9672 * the rule if wire vport metadata value is not zero,
9673 * it depends on kernel configuration.
9675 flow_dv_translate_item_meta_vport(matcher, key,
9676 priv->vport_meta_tag,
9677 priv->vport_meta_mask);
9679 flow_dv_translate_item_source_vport(matcher, key,
9680 priv->vport_id, mask);
9686 * Add ICMP6 item to matcher and to the value.
9688 * @param[in, out] matcher
9690 * @param[in, out] key
9691 * Flow matcher value.
9693 * Flow pattern to translate.
9695 * Item is inner pattern.
9698 flow_dv_translate_item_icmp6(void *matcher, void *key,
9699 const struct rte_flow_item *item,
9702 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9703 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9706 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9708 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9710 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9712 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9714 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9716 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9718 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9719 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9723 icmp6_m = &rte_flow_item_icmp6_mask;
9724 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9725 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9726 icmp6_v->type & icmp6_m->type);
9727 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9728 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9729 icmp6_v->code & icmp6_m->code);
9733 * Add ICMP item to matcher and to the value.
9735 * @param[in, out] matcher
9737 * @param[in, out] key
9738 * Flow matcher value.
9740 * Flow pattern to translate.
9742 * Item is inner pattern.
9745 flow_dv_translate_item_icmp(void *matcher, void *key,
9746 const struct rte_flow_item *item,
9749 const struct rte_flow_item_icmp *icmp_m = item->mask;
9750 const struct rte_flow_item_icmp *icmp_v = item->spec;
9751 uint32_t icmp_header_data_m = 0;
9752 uint32_t icmp_header_data_v = 0;
9755 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9757 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9759 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9761 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9763 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9765 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9767 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9768 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9772 icmp_m = &rte_flow_item_icmp_mask;
9773 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9774 icmp_m->hdr.icmp_type);
9775 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9776 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9777 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9778 icmp_m->hdr.icmp_code);
9779 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9780 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9781 icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9782 icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9783 if (icmp_header_data_m) {
9784 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9785 icmp_header_data_v |=
9786 rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9787 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9788 icmp_header_data_m);
9789 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9790 icmp_header_data_v & icmp_header_data_m);
9795 * Add GTP item to matcher and to the value.
9797 * @param[in, out] matcher
9799 * @param[in, out] key
9800 * Flow matcher value.
9802 * Flow pattern to translate.
9804 * Item is inner pattern.
9807 flow_dv_translate_item_gtp(void *matcher, void *key,
9808 const struct rte_flow_item *item, int inner)
9810 const struct rte_flow_item_gtp *gtp_m = item->mask;
9811 const struct rte_flow_item_gtp *gtp_v = item->spec;
9814 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9816 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9817 uint16_t dport = RTE_GTPU_UDP_PORT;
9820 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9822 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9824 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9826 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9828 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9829 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9830 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9835 gtp_m = &rte_flow_item_gtp_mask;
9836 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9837 gtp_m->v_pt_rsv_flags);
9838 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9839 gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9840 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9841 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9842 gtp_v->msg_type & gtp_m->msg_type);
9843 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9844 rte_be_to_cpu_32(gtp_m->teid));
9845 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9846 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9850 * Add GTP PSC item to matcher.
9852 * @param[in, out] matcher
9854 * @param[in, out] key
9855 * Flow matcher value.
9857 * Flow pattern to translate.
9860 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9861 const struct rte_flow_item *item)
9863 const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9864 const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9865 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9867 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9873 uint8_t next_ext_header_type;
9878 /* Always set E-flag match on one, regardless of GTP item settings. */
9879 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9880 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9881 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9882 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9883 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9884 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9885 /*Set next extension header type. */
9888 dw_2.next_ext_header_type = 0xff;
9889 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9890 rte_cpu_to_be_32(dw_2.w32));
9893 dw_2.next_ext_header_type = 0x85;
9894 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9895 rte_cpu_to_be_32(dw_2.w32));
9907 /*Set extension header PDU type and Qos. */
9909 gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9911 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
9912 dw_0.qfi = gtp_psc_m->hdr.qfi;
9913 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9914 rte_cpu_to_be_32(dw_0.w32));
9916 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
9917 gtp_psc_m->hdr.type);
9918 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
9919 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9920 rte_cpu_to_be_32(dw_0.w32));
9926 * Add eCPRI item to matcher and to the value.
9929 * The devich to configure through.
9930 * @param[in, out] matcher
9932 * @param[in, out] key
9933 * Flow matcher value.
9935 * Flow pattern to translate.
9936 * @param[in] last_item
9940 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9941 void *key, const struct rte_flow_item *item,
9944 struct mlx5_priv *priv = dev->data->dev_private;
9945 const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9946 const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9947 struct rte_ecpri_common_hdr common;
9948 void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9950 void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9956 * In case of eCPRI over Ethernet, if EtherType is not specified,
9957 * match on eCPRI EtherType implicitly.
9959 if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
9960 void *hdrs_m, *hdrs_v, *l2m, *l2v;
9962 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9963 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9964 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
9965 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
9966 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
9967 *(uint16_t *)l2m = UINT16_MAX;
9968 *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
9974 ecpri_m = &rte_flow_item_ecpri_mask;
9976 * Maximal four DW samples are supported in a single matching now.
9977 * Two are used now for a eCPRI matching:
9978 * 1. Type: one byte, mask should be 0x00ff0000 in network order
9979 * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9982 if (!ecpri_m->hdr.common.u32)
9984 samples = priv->sh->ecpri_parser.ids;
9985 /* Need to take the whole DW as the mask to fill the entry. */
9986 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9987 prog_sample_field_value_0);
9988 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9989 prog_sample_field_value_0);
9990 /* Already big endian (network order) in the header. */
9991 *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9992 *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9993 /* Sample#0, used for matching type, offset 0. */
9994 MLX5_SET(fte_match_set_misc4, misc4_m,
9995 prog_sample_field_id_0, samples[0]);
9996 /* It makes no sense to set the sample ID in the mask field. */
9997 MLX5_SET(fte_match_set_misc4, misc4_v,
9998 prog_sample_field_id_0, samples[0]);
10000 * Checking if message body part needs to be matched.
10001 * Some wildcard rules only matching type field should be supported.
10003 if (ecpri_m->hdr.dummy[0]) {
10004 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10005 switch (common.type) {
10006 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10007 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10008 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10009 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10010 prog_sample_field_value_1);
10011 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10012 prog_sample_field_value_1);
10013 *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10014 *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10015 ecpri_m->hdr.dummy[0];
10016 /* Sample#1, to match message body, offset 4. */
10017 MLX5_SET(fte_match_set_misc4, misc4_m,
10018 prog_sample_field_id_1, samples[1]);
10019 MLX5_SET(fte_match_set_misc4, misc4_v,
10020 prog_sample_field_id_1, samples[1]);
10023 /* Others, do not match any sample ID. */
10030 * Add connection tracking status item to matcher
10033 * The devich to configure through.
10034 * @param[in, out] matcher
10036 * @param[in, out] key
10037 * Flow matcher value.
10039 * Flow pattern to translate.
10042 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10043 void *matcher, void *key,
10044 const struct rte_flow_item *item)
10046 uint32_t reg_value = 0;
10048 /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10049 uint32_t reg_mask = 0;
10050 const struct rte_flow_item_conntrack *spec = item->spec;
10051 const struct rte_flow_item_conntrack *mask = item->mask;
10053 struct rte_flow_error error;
10056 mask = &rte_flow_item_conntrack_mask;
10057 if (!spec || !mask->flags)
10059 flags = spec->flags & mask->flags;
10060 /* The conflict should be checked in the validation. */
10061 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10062 reg_value |= MLX5_CT_SYNDROME_VALID;
10063 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10064 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10065 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10066 reg_value |= MLX5_CT_SYNDROME_INVALID;
10067 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10068 reg_value |= MLX5_CT_SYNDROME_TRAP;
10069 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10070 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10071 if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10072 RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10073 RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10075 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10076 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10077 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10078 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10079 /* The REG_C_x value could be saved during startup. */
10080 reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10081 if (reg_id == REG_NON)
10083 flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10084 reg_value, reg_mask);
10088 flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,
10089 const struct rte_flow_item *item,
10090 struct mlx5_flow *dev_flow, bool is_inner)
10092 const struct rte_flow_item_flex *spec =
10093 (const struct rte_flow_item_flex *)item->spec;
10094 int index = mlx5_flex_acquire_index(dev, spec->handle, false);
10096 MLX5_ASSERT(index >= 0 && index <= (int)(sizeof(uint32_t) * CHAR_BIT));
10099 if (!(dev_flow->handle->flex_item & RTE_BIT32(index))) {
10100 /* Don't count both inner and outer flex items in one rule. */
10101 if (mlx5_flex_acquire_index(dev, spec->handle, true) != index)
10102 MLX5_ASSERT(false);
10103 dev_flow->handle->flex_item |= RTE_BIT32(index);
10105 mlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);
10108 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10110 #define HEADER_IS_ZERO(match_criteria, headers) \
10111 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
10112 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10115 * Calculate flow matcher enable bitmap.
10117 * @param match_criteria
10118 * Pointer to flow matcher criteria.
10121 * Bitmap of enabled fields.
10124 flow_dv_matcher_enable(uint32_t *match_criteria)
10126 uint8_t match_criteria_enable;
10128 match_criteria_enable =
10129 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10130 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10131 match_criteria_enable |=
10132 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10133 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10134 match_criteria_enable |=
10135 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10136 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10137 match_criteria_enable |=
10138 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10139 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10140 match_criteria_enable |=
10141 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10142 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10143 match_criteria_enable |=
10144 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10145 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10146 match_criteria_enable |=
10147 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10148 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10149 return match_criteria_enable;
10153 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10156 * Check flow matching criteria first, subtract misc5/4 length if flow
10157 * doesn't own misc5/4 parameters. In some old rdma-core releases,
10158 * misc5/4 are not supported, and matcher creation failure is expected
10159 * w/o subtration. If misc5 is provided, misc4 must be counted in since
10160 * misc5 is right after misc4.
10162 if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10163 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10164 MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10165 if (!(match_criteria & (1 <<
10166 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10167 *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10172 static struct mlx5_list_entry *
10173 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10174 struct mlx5_list_entry *entry, void *cb_ctx)
10176 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10177 struct mlx5_flow_dv_matcher *ref = ctx->data;
10178 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10179 typeof(*tbl), tbl);
10180 struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10185 rte_flow_error_set(ctx->error, ENOMEM,
10186 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10187 "cannot create matcher");
10190 memcpy(resource, entry, sizeof(*resource));
10191 resource->tbl = &tbl->tbl;
10192 return &resource->entry;
10196 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10197 struct mlx5_list_entry *entry)
10202 struct mlx5_list_entry *
10203 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10205 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10206 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10207 struct rte_eth_dev *dev = ctx->dev;
10208 struct mlx5_flow_tbl_data_entry *tbl_data;
10209 struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10210 struct rte_flow_error *error = ctx->error;
10211 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10212 struct mlx5_flow_tbl_resource *tbl;
10217 tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10219 rte_flow_error_set(error, ENOMEM,
10220 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10222 "cannot allocate flow table data entry");
10225 tbl_data->idx = idx;
10226 tbl_data->tunnel = tt_prm->tunnel;
10227 tbl_data->group_id = tt_prm->group_id;
10228 tbl_data->external = !!tt_prm->external;
10229 tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10230 tbl_data->is_egress = !!key.is_egress;
10231 tbl_data->is_transfer = !!key.is_fdb;
10232 tbl_data->dummy = !!key.dummy;
10233 tbl_data->level = key.level;
10234 tbl_data->id = key.id;
10235 tbl = &tbl_data->tbl;
10237 return &tbl_data->entry;
10239 domain = sh->fdb_domain;
10240 else if (key.is_egress)
10241 domain = sh->tx_domain;
10243 domain = sh->rx_domain;
10244 ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10246 rte_flow_error_set(error, ENOMEM,
10247 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10248 NULL, "cannot create flow table object");
10249 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10252 if (key.level != 0) {
10253 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10254 (tbl->obj, &tbl_data->jump.action);
10256 rte_flow_error_set(error, ENOMEM,
10257 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10259 "cannot create flow jump action");
10260 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10261 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10265 MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10266 key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10267 key.level, key.id);
10268 tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10269 flow_dv_matcher_create_cb,
10270 flow_dv_matcher_match_cb,
10271 flow_dv_matcher_remove_cb,
10272 flow_dv_matcher_clone_cb,
10273 flow_dv_matcher_clone_free_cb);
10274 if (!tbl_data->matchers) {
10275 rte_flow_error_set(error, ENOMEM,
10276 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10278 "cannot create tbl matcher list");
10279 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10280 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10281 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10284 return &tbl_data->entry;
10288 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10291 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10292 struct mlx5_flow_tbl_data_entry *tbl_data =
10293 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10294 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10296 return tbl_data->level != key.level ||
10297 tbl_data->id != key.id ||
10298 tbl_data->dummy != key.dummy ||
10299 tbl_data->is_transfer != !!key.is_fdb ||
10300 tbl_data->is_egress != !!key.is_egress;
10303 struct mlx5_list_entry *
10304 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10307 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10308 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10309 struct mlx5_flow_tbl_data_entry *tbl_data;
10310 struct rte_flow_error *error = ctx->error;
10313 tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10315 rte_flow_error_set(error, ENOMEM,
10316 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10318 "cannot allocate flow table data entry");
10321 memcpy(tbl_data, oentry, sizeof(*tbl_data));
10322 tbl_data->idx = idx;
10323 return &tbl_data->entry;
10327 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10329 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10330 struct mlx5_flow_tbl_data_entry *tbl_data =
10331 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10333 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10337 * Get a flow table.
10339 * @param[in, out] dev
10340 * Pointer to rte_eth_dev structure.
10341 * @param[in] table_level
10342 * Table level to use.
10343 * @param[in] egress
10344 * Direction of the table.
10345 * @param[in] transfer
10346 * E-Switch or NIC flow.
10348 * Dummy entry for dv API.
10349 * @param[in] table_id
10351 * @param[out] error
10352 * pointer to error structure.
10355 * Returns tables resource based on the index, NULL in case of failed.
10357 struct mlx5_flow_tbl_resource *
10358 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10359 uint32_t table_level, uint8_t egress,
10362 const struct mlx5_flow_tunnel *tunnel,
10363 uint32_t group_id, uint8_t dummy,
10365 struct rte_flow_error *error)
10367 struct mlx5_priv *priv = dev->data->dev_private;
10368 union mlx5_flow_tbl_key table_key = {
10370 .level = table_level,
10374 .is_fdb = !!transfer,
10375 .is_egress = !!egress,
10378 struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10380 .group_id = group_id,
10381 .external = external,
10383 struct mlx5_flow_cb_ctx ctx = {
10386 .data = &table_key.v64,
10389 struct mlx5_list_entry *entry;
10390 struct mlx5_flow_tbl_data_entry *tbl_data;
10392 entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10394 rte_flow_error_set(error, ENOMEM,
10395 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10396 "cannot get table");
10399 DRV_LOG(DEBUG, "table_level %u table_id %u "
10400 "tunnel %u group %u registered.",
10401 table_level, table_id,
10402 tunnel ? tunnel->tunnel_id : 0, group_id);
10403 tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10404 return &tbl_data->tbl;
10408 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10410 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10411 struct mlx5_flow_tbl_data_entry *tbl_data =
10412 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10414 MLX5_ASSERT(entry && sh);
10415 if (tbl_data->jump.action)
10416 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10417 if (tbl_data->tbl.obj)
10418 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10419 if (tbl_data->tunnel_offload && tbl_data->external) {
10420 struct mlx5_list_entry *he;
10421 struct mlx5_hlist *tunnel_grp_hash;
10422 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10423 union tunnel_tbl_key tunnel_key = {
10424 .tunnel_id = tbl_data->tunnel ?
10425 tbl_data->tunnel->tunnel_id : 0,
10426 .group = tbl_data->group_id
10428 uint32_t table_level = tbl_data->level;
10429 struct mlx5_flow_cb_ctx ctx = {
10430 .data = (void *)&tunnel_key.val,
10433 tunnel_grp_hash = tbl_data->tunnel ?
10434 tbl_data->tunnel->groups :
10436 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10438 mlx5_hlist_unregister(tunnel_grp_hash, he);
10440 "table_level %u id %u tunnel %u group %u released.",
10444 tbl_data->tunnel->tunnel_id : 0,
10445 tbl_data->group_id);
10447 mlx5_list_destroy(tbl_data->matchers);
10448 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10452 * Release a flow table.
10455 * Pointer to device shared structure.
10457 * Table resource to be released.
10460 * Returns 0 if table was released, else return 1;
10463 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10464 struct mlx5_flow_tbl_resource *tbl)
10466 struct mlx5_flow_tbl_data_entry *tbl_data =
10467 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10471 return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10475 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10476 struct mlx5_list_entry *entry, void *cb_ctx)
10478 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10479 struct mlx5_flow_dv_matcher *ref = ctx->data;
10480 struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10483 return cur->crc != ref->crc ||
10484 cur->priority != ref->priority ||
10485 memcmp((const void *)cur->mask.buf,
10486 (const void *)ref->mask.buf, ref->mask.size);
10489 struct mlx5_list_entry *
10490 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10492 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10493 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10494 struct mlx5_flow_dv_matcher *ref = ctx->data;
10495 struct mlx5_flow_dv_matcher *resource;
10496 struct mlx5dv_flow_matcher_attr dv_attr = {
10497 .type = IBV_FLOW_ATTR_NORMAL,
10498 .match_mask = (void *)&ref->mask,
10500 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10501 typeof(*tbl), tbl);
10504 resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10507 rte_flow_error_set(ctx->error, ENOMEM,
10508 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10509 "cannot create matcher");
10513 dv_attr.match_criteria_enable =
10514 flow_dv_matcher_enable(resource->mask.buf);
10515 __flow_dv_adjust_buf_size(&ref->mask.size,
10516 dv_attr.match_criteria_enable);
10517 dv_attr.priority = ref->priority;
10518 if (tbl->is_egress)
10519 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10520 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10522 &resource->matcher_object);
10524 mlx5_free(resource);
10525 rte_flow_error_set(ctx->error, ENOMEM,
10526 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10527 "cannot create matcher");
10530 return &resource->entry;
10534 * Register the flow matcher.
10536 * @param[in, out] dev
10537 * Pointer to rte_eth_dev structure.
10538 * @param[in, out] matcher
10539 * Pointer to flow matcher.
10540 * @param[in, out] key
10541 * Pointer to flow table key.
10542 * @parm[in, out] dev_flow
10543 * Pointer to the dev_flow.
10544 * @param[out] error
10545 * pointer to error structure.
10548 * 0 on success otherwise -errno and errno is set.
10551 flow_dv_matcher_register(struct rte_eth_dev *dev,
10552 struct mlx5_flow_dv_matcher *ref,
10553 union mlx5_flow_tbl_key *key,
10554 struct mlx5_flow *dev_flow,
10555 const struct mlx5_flow_tunnel *tunnel,
10557 struct rte_flow_error *error)
10559 struct mlx5_list_entry *entry;
10560 struct mlx5_flow_dv_matcher *resource;
10561 struct mlx5_flow_tbl_resource *tbl;
10562 struct mlx5_flow_tbl_data_entry *tbl_data;
10563 struct mlx5_flow_cb_ctx ctx = {
10568 * tunnel offload API requires this registration for cases when
10569 * tunnel match rule was inserted before tunnel set rule.
10571 tbl = flow_dv_tbl_resource_get(dev, key->level,
10572 key->is_egress, key->is_fdb,
10573 dev_flow->external, tunnel,
10574 group_id, 0, key->id, error);
10576 return -rte_errno; /* No need to refill the error info */
10577 tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10579 entry = mlx5_list_register(tbl_data->matchers, &ctx);
10581 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10582 return rte_flow_error_set(error, ENOMEM,
10583 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10584 "cannot allocate ref memory");
10586 resource = container_of(entry, typeof(*resource), entry);
10587 dev_flow->handle->dvh.matcher = resource;
10591 struct mlx5_list_entry *
10592 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10594 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10595 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10596 struct mlx5_flow_dv_tag_resource *entry;
10600 entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10602 rte_flow_error_set(ctx->error, ENOMEM,
10603 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10604 "cannot allocate resource memory");
10608 entry->tag_id = *(uint32_t *)(ctx->data);
10609 ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10612 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10613 rte_flow_error_set(ctx->error, ENOMEM,
10614 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10615 NULL, "cannot create action");
10618 return &entry->entry;
10622 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10625 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10626 struct mlx5_flow_dv_tag_resource *tag =
10627 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10629 return *(uint32_t *)(ctx->data) != tag->tag_id;
10632 struct mlx5_list_entry *
10633 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10636 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10637 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10638 struct mlx5_flow_dv_tag_resource *entry;
10641 entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10643 rte_flow_error_set(ctx->error, ENOMEM,
10644 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10645 "cannot allocate tag resource memory");
10648 memcpy(entry, oentry, sizeof(*entry));
10650 return &entry->entry;
10654 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10656 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10657 struct mlx5_flow_dv_tag_resource *tag =
10658 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10660 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10664 * Find existing tag resource or create and register a new one.
10666 * @param dev[in, out]
10667 * Pointer to rte_eth_dev structure.
10668 * @param[in, out] tag_be24
10669 * Tag value in big endian then R-shift 8.
10670 * @parm[in, out] dev_flow
10671 * Pointer to the dev_flow.
10672 * @param[out] error
10673 * pointer to error structure.
10676 * 0 on success otherwise -errno and errno is set.
10679 flow_dv_tag_resource_register
10680 (struct rte_eth_dev *dev,
10682 struct mlx5_flow *dev_flow,
10683 struct rte_flow_error *error)
10685 struct mlx5_priv *priv = dev->data->dev_private;
10686 struct mlx5_flow_dv_tag_resource *resource;
10687 struct mlx5_list_entry *entry;
10688 struct mlx5_flow_cb_ctx ctx = {
10692 struct mlx5_hlist *tag_table;
10694 tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10696 MLX5_TAGS_HLIST_ARRAY_SIZE,
10697 false, false, priv->sh,
10698 flow_dv_tag_create_cb,
10699 flow_dv_tag_match_cb,
10700 flow_dv_tag_remove_cb,
10701 flow_dv_tag_clone_cb,
10702 flow_dv_tag_clone_free_cb);
10703 if (unlikely(!tag_table))
10705 entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10707 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10709 dev_flow->handle->dvh.rix_tag = resource->idx;
10710 dev_flow->dv.tag_resource = resource;
10717 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10719 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10720 struct mlx5_flow_dv_tag_resource *tag =
10721 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10723 MLX5_ASSERT(tag && sh && tag->action);
10724 claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10725 DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10726 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10733 * Pointer to Ethernet device.
10738 * 1 while a reference on it exists, 0 when freed.
10741 flow_dv_tag_release(struct rte_eth_dev *dev,
10744 struct mlx5_priv *priv = dev->data->dev_private;
10745 struct mlx5_flow_dv_tag_resource *tag;
10747 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10750 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10751 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10752 return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10756 * Translate action PORT_ID / REPRESENTED_PORT to vport.
10759 * Pointer to rte_eth_dev structure.
10760 * @param[in] action
10761 * Pointer to action PORT_ID / REPRESENTED_PORT.
10762 * @param[out] dst_port_id
10763 * The target port ID.
10764 * @param[out] error
10765 * Pointer to the error structure.
10768 * 0 on success, a negative errno value otherwise and rte_errno is set.
10771 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10772 const struct rte_flow_action *action,
10773 uint32_t *dst_port_id,
10774 struct rte_flow_error *error)
10777 struct mlx5_priv *priv;
10779 switch (action->type) {
10780 case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10781 const struct rte_flow_action_port_id *conf;
10783 conf = (const struct rte_flow_action_port_id *)action->conf;
10784 port = conf->original ? dev->data->port_id : conf->id;
10787 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10788 const struct rte_flow_action_ethdev *ethdev;
10790 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10791 port = ethdev->port_id;
10795 MLX5_ASSERT(false);
10796 return rte_flow_error_set(error, EINVAL,
10797 RTE_FLOW_ERROR_TYPE_ACTION, action,
10798 "unknown E-Switch action");
10801 priv = mlx5_port_to_eswitch_info(port, false);
10803 return rte_flow_error_set(error, -rte_errno,
10804 RTE_FLOW_ERROR_TYPE_ACTION,
10806 "No eswitch info was found for port");
10807 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10809 * This parameter is transferred to
10810 * mlx5dv_dr_action_create_dest_ib_port().
10812 *dst_port_id = priv->dev_port;
10815 * Legacy mode, no LAG configurations is supported.
10816 * This parameter is transferred to
10817 * mlx5dv_dr_action_create_dest_vport().
10819 *dst_port_id = priv->vport_id;
10825 * Create a counter with aging configuration.
10828 * Pointer to rte_eth_dev structure.
10829 * @param[in] dev_flow
10830 * Pointer to the mlx5_flow.
10831 * @param[out] count
10832 * Pointer to the counter action configuration.
10834 * Pointer to the aging action configuration.
10837 * Index to flow counter on success, 0 otherwise.
10840 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10841 struct mlx5_flow *dev_flow,
10842 const struct rte_flow_action_count *count
10844 const struct rte_flow_action_age *age)
10847 struct mlx5_age_param *age_param;
10849 counter = flow_dv_counter_alloc(dev, !!age);
10850 if (!counter || age == NULL)
10852 age_param = flow_dv_counter_idx_get_age(dev, counter);
10853 age_param->context = age->context ? age->context :
10854 (void *)(uintptr_t)(dev_flow->flow_idx);
10855 age_param->timeout = age->timeout;
10856 age_param->port_id = dev->data->port_id;
10857 __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10858 __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10863 * Add Tx queue matcher
10866 * Pointer to the dev struct.
10867 * @param[in, out] matcher
10869 * @param[in, out] key
10870 * Flow matcher value.
10872 * Flow pattern to translate.
10874 * Item is inner pattern.
10877 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10878 void *matcher, void *key,
10879 const struct rte_flow_item *item)
10881 const struct mlx5_rte_flow_item_tx_queue *queue_m;
10882 const struct mlx5_rte_flow_item_tx_queue *queue_v;
10884 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10886 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10887 struct mlx5_txq_ctrl *txq;
10888 uint32_t queue, mask;
10890 queue_m = (const void *)item->mask;
10891 queue_v = (const void *)item->spec;
10894 txq = mlx5_txq_get(dev, queue_v->queue);
10897 if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
10898 queue = txq->obj->sq->id;
10900 queue = txq->obj->sq_obj.sq->id;
10901 mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
10902 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
10903 MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
10904 mlx5_txq_release(dev, queue_v->queue);
10908 * Set the hash fields according to the @p flow information.
10910 * @param[in] dev_flow
10911 * Pointer to the mlx5_flow.
10912 * @param[in] rss_desc
10913 * Pointer to the mlx5_flow_rss_desc.
10916 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10917 struct mlx5_flow_rss_desc *rss_desc)
10919 uint64_t items = dev_flow->handle->layers;
10921 uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10923 dev_flow->hash_fields = 0;
10924 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10925 if (rss_desc->level >= 2)
10928 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10929 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10930 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10931 if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10932 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10933 else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
10934 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10936 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10938 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10939 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10940 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10941 if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10942 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10943 else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
10944 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10946 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10949 if (dev_flow->hash_fields == 0)
10951 * There is no match between the RSS types and the
10952 * L3 protocol (IPv4/IPv6) defined in the flow rule.
10955 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10956 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10957 if (rss_types & RTE_ETH_RSS_UDP) {
10958 if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
10959 dev_flow->hash_fields |=
10960 IBV_RX_HASH_SRC_PORT_UDP;
10961 else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
10962 dev_flow->hash_fields |=
10963 IBV_RX_HASH_DST_PORT_UDP;
10965 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10967 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10968 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10969 if (rss_types & RTE_ETH_RSS_TCP) {
10970 if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
10971 dev_flow->hash_fields |=
10972 IBV_RX_HASH_SRC_PORT_TCP;
10973 else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
10974 dev_flow->hash_fields |=
10975 IBV_RX_HASH_DST_PORT_TCP;
10977 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10981 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10985 * Prepare an Rx Hash queue.
10988 * Pointer to Ethernet device.
10989 * @param[in] dev_flow
10990 * Pointer to the mlx5_flow.
10991 * @param[in] rss_desc
10992 * Pointer to the mlx5_flow_rss_desc.
10993 * @param[out] hrxq_idx
10994 * Hash Rx queue index.
10997 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10999 static struct mlx5_hrxq *
11000 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
11001 struct mlx5_flow *dev_flow,
11002 struct mlx5_flow_rss_desc *rss_desc,
11003 uint32_t *hrxq_idx)
11005 struct mlx5_priv *priv = dev->data->dev_private;
11006 struct mlx5_flow_handle *dh = dev_flow->handle;
11007 struct mlx5_hrxq *hrxq;
11009 MLX5_ASSERT(rss_desc->queue_num);
11010 rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
11011 rss_desc->hash_fields = dev_flow->hash_fields;
11012 rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11013 rss_desc->shared_rss = 0;
11014 if (rss_desc->hash_fields == 0)
11015 rss_desc->queue_num = 1;
11016 *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
11019 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
11025 * Release sample sub action resource.
11027 * @param[in, out] dev
11028 * Pointer to rte_eth_dev structure.
11029 * @param[in] act_res
11030 * Pointer to sample sub action resource.
11033 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11034 struct mlx5_flow_sub_actions_idx *act_res)
11036 if (act_res->rix_hrxq) {
11037 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11038 act_res->rix_hrxq = 0;
11040 if (act_res->rix_encap_decap) {
11041 flow_dv_encap_decap_resource_release(dev,
11042 act_res->rix_encap_decap);
11043 act_res->rix_encap_decap = 0;
11045 if (act_res->rix_port_id_action) {
11046 flow_dv_port_id_action_resource_release(dev,
11047 act_res->rix_port_id_action);
11048 act_res->rix_port_id_action = 0;
11050 if (act_res->rix_tag) {
11051 flow_dv_tag_release(dev, act_res->rix_tag);
11052 act_res->rix_tag = 0;
11054 if (act_res->rix_jump) {
11055 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11056 act_res->rix_jump = 0;
11061 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11062 struct mlx5_list_entry *entry, void *cb_ctx)
11064 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11065 struct rte_eth_dev *dev = ctx->dev;
11066 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11067 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11071 if (ctx_resource->ratio == resource->ratio &&
11072 ctx_resource->ft_type == resource->ft_type &&
11073 ctx_resource->ft_id == resource->ft_id &&
11074 ctx_resource->set_action == resource->set_action &&
11075 !memcmp((void *)&ctx_resource->sample_act,
11076 (void *)&resource->sample_act,
11077 sizeof(struct mlx5_flow_sub_actions_list))) {
11079 * Existing sample action should release the prepared
11080 * sub-actions reference counter.
11082 flow_dv_sample_sub_actions_release(dev,
11083 &ctx_resource->sample_idx);
11089 struct mlx5_list_entry *
11090 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11092 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11093 struct rte_eth_dev *dev = ctx->dev;
11094 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11095 void **sample_dv_actions = ctx_resource->sub_actions;
11096 struct mlx5_flow_dv_sample_resource *resource;
11097 struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11098 struct mlx5_priv *priv = dev->data->dev_private;
11099 struct mlx5_dev_ctx_shared *sh = priv->sh;
11100 struct mlx5_flow_tbl_resource *tbl;
11102 const uint32_t next_ft_step = 1;
11103 uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11104 uint8_t is_egress = 0;
11105 uint8_t is_transfer = 0;
11106 struct rte_flow_error *error = ctx->error;
11108 /* Register new sample resource. */
11109 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11111 rte_flow_error_set(error, ENOMEM,
11112 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11114 "cannot allocate resource memory");
11117 *resource = *ctx_resource;
11118 /* Create normal path table level */
11119 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11121 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11123 tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11124 is_egress, is_transfer,
11125 true, NULL, 0, 0, 0, error);
11127 rte_flow_error_set(error, ENOMEM,
11128 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11130 "fail to create normal path table "
11134 resource->normal_path_tbl = tbl;
11135 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11136 if (!sh->default_miss_action) {
11137 rte_flow_error_set(error, ENOMEM,
11138 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11140 "default miss action was not "
11144 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11145 sh->default_miss_action;
11147 /* Create a DR sample action */
11148 sampler_attr.sample_ratio = resource->ratio;
11149 sampler_attr.default_next_table = tbl->obj;
11150 sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11151 sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11152 &sample_dv_actions[0];
11153 sampler_attr.action = resource->set_action;
11154 if (mlx5_os_flow_dr_create_flow_action_sampler
11155 (&sampler_attr, &resource->verbs_action)) {
11156 rte_flow_error_set(error, ENOMEM,
11157 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11158 NULL, "cannot create sample action");
11161 resource->idx = idx;
11162 resource->dev = dev;
11163 return &resource->entry;
11165 if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11166 flow_dv_sample_sub_actions_release(dev,
11167 &resource->sample_idx);
11168 if (resource->normal_path_tbl)
11169 flow_dv_tbl_resource_release(MLX5_SH(dev),
11170 resource->normal_path_tbl);
11171 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11176 struct mlx5_list_entry *
11177 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11178 struct mlx5_list_entry *entry __rte_unused,
11181 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11182 struct rte_eth_dev *dev = ctx->dev;
11183 struct mlx5_flow_dv_sample_resource *resource;
11184 struct mlx5_priv *priv = dev->data->dev_private;
11185 struct mlx5_dev_ctx_shared *sh = priv->sh;
11188 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11190 rte_flow_error_set(ctx->error, ENOMEM,
11191 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11193 "cannot allocate resource memory");
11196 memcpy(resource, entry, sizeof(*resource));
11197 resource->idx = idx;
11198 resource->dev = dev;
11199 return &resource->entry;
11203 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11204 struct mlx5_list_entry *entry)
11206 struct mlx5_flow_dv_sample_resource *resource =
11207 container_of(entry, typeof(*resource), entry);
11208 struct rte_eth_dev *dev = resource->dev;
11209 struct mlx5_priv *priv = dev->data->dev_private;
11211 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11215 * Find existing sample resource or create and register a new one.
11217 * @param[in, out] dev
11218 * Pointer to rte_eth_dev structure.
11220 * Pointer to sample resource reference.
11221 * @parm[in, out] dev_flow
11222 * Pointer to the dev_flow.
11223 * @param[out] error
11224 * pointer to error structure.
11227 * 0 on success otherwise -errno and errno is set.
11230 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11231 struct mlx5_flow_dv_sample_resource *ref,
11232 struct mlx5_flow *dev_flow,
11233 struct rte_flow_error *error)
11235 struct mlx5_flow_dv_sample_resource *resource;
11236 struct mlx5_list_entry *entry;
11237 struct mlx5_priv *priv = dev->data->dev_private;
11238 struct mlx5_flow_cb_ctx ctx = {
11244 entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11247 resource = container_of(entry, typeof(*resource), entry);
11248 dev_flow->handle->dvh.rix_sample = resource->idx;
11249 dev_flow->dv.sample_res = resource;
11254 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11255 struct mlx5_list_entry *entry, void *cb_ctx)
11257 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11258 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11259 struct rte_eth_dev *dev = ctx->dev;
11260 struct mlx5_flow_dv_dest_array_resource *resource =
11261 container_of(entry, typeof(*resource), entry);
11264 if (ctx_resource->num_of_dest == resource->num_of_dest &&
11265 ctx_resource->ft_type == resource->ft_type &&
11266 !memcmp((void *)resource->sample_act,
11267 (void *)ctx_resource->sample_act,
11268 (ctx_resource->num_of_dest *
11269 sizeof(struct mlx5_flow_sub_actions_list)))) {
11271 * Existing sample action should release the prepared
11272 * sub-actions reference counter.
11274 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11275 flow_dv_sample_sub_actions_release(dev,
11276 &ctx_resource->sample_idx[idx]);
11282 struct mlx5_list_entry *
11283 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11285 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11286 struct rte_eth_dev *dev = ctx->dev;
11287 struct mlx5_flow_dv_dest_array_resource *resource;
11288 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11289 struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11290 struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11291 struct mlx5_priv *priv = dev->data->dev_private;
11292 struct mlx5_dev_ctx_shared *sh = priv->sh;
11293 struct mlx5_flow_sub_actions_list *sample_act;
11294 struct mlx5dv_dr_domain *domain;
11295 uint32_t idx = 0, res_idx = 0;
11296 struct rte_flow_error *error = ctx->error;
11297 uint64_t action_flags;
11300 /* Register new destination array resource. */
11301 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11304 rte_flow_error_set(error, ENOMEM,
11305 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11307 "cannot allocate resource memory");
11310 *resource = *ctx_resource;
11311 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11312 domain = sh->fdb_domain;
11313 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11314 domain = sh->rx_domain;
11316 domain = sh->tx_domain;
11317 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11318 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11319 mlx5_malloc(MLX5_MEM_ZERO,
11320 sizeof(struct mlx5dv_dr_action_dest_attr),
11322 if (!dest_attr[idx]) {
11323 rte_flow_error_set(error, ENOMEM,
11324 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11326 "cannot allocate resource memory");
11329 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11330 sample_act = &ctx_resource->sample_act[idx];
11331 action_flags = sample_act->action_flags;
11332 switch (action_flags) {
11333 case MLX5_FLOW_ACTION_QUEUE:
11334 dest_attr[idx]->dest = sample_act->dr_queue_action;
11336 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11337 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11338 dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11339 dest_attr[idx]->dest_reformat->reformat =
11340 sample_act->dr_encap_action;
11341 dest_attr[idx]->dest_reformat->dest =
11342 sample_act->dr_port_id_action;
11344 case MLX5_FLOW_ACTION_PORT_ID:
11345 dest_attr[idx]->dest = sample_act->dr_port_id_action;
11347 case MLX5_FLOW_ACTION_JUMP:
11348 dest_attr[idx]->dest = sample_act->dr_jump_action;
11351 rte_flow_error_set(error, EINVAL,
11352 RTE_FLOW_ERROR_TYPE_ACTION,
11354 "unsupported actions type");
11358 /* create a dest array actioin */
11359 ret = mlx5_os_flow_dr_create_flow_action_dest_array
11361 resource->num_of_dest,
11363 &resource->action);
11365 rte_flow_error_set(error, ENOMEM,
11366 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11368 "cannot create destination array action");
11371 resource->idx = res_idx;
11372 resource->dev = dev;
11373 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11374 mlx5_free(dest_attr[idx]);
11375 return &resource->entry;
11377 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11378 flow_dv_sample_sub_actions_release(dev,
11379 &resource->sample_idx[idx]);
11380 if (dest_attr[idx])
11381 mlx5_free(dest_attr[idx]);
11383 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11387 struct mlx5_list_entry *
11388 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11389 struct mlx5_list_entry *entry __rte_unused,
11392 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11393 struct rte_eth_dev *dev = ctx->dev;
11394 struct mlx5_flow_dv_dest_array_resource *resource;
11395 struct mlx5_priv *priv = dev->data->dev_private;
11396 struct mlx5_dev_ctx_shared *sh = priv->sh;
11397 uint32_t res_idx = 0;
11398 struct rte_flow_error *error = ctx->error;
11400 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11403 rte_flow_error_set(error, ENOMEM,
11404 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11406 "cannot allocate dest-array memory");
11409 memcpy(resource, entry, sizeof(*resource));
11410 resource->idx = res_idx;
11411 resource->dev = dev;
11412 return &resource->entry;
11416 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11417 struct mlx5_list_entry *entry)
11419 struct mlx5_flow_dv_dest_array_resource *resource =
11420 container_of(entry, typeof(*resource), entry);
11421 struct rte_eth_dev *dev = resource->dev;
11422 struct mlx5_priv *priv = dev->data->dev_private;
11424 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11428 * Find existing destination array resource or create and register a new one.
11430 * @param[in, out] dev
11431 * Pointer to rte_eth_dev structure.
11433 * Pointer to destination array resource reference.
11434 * @parm[in, out] dev_flow
11435 * Pointer to the dev_flow.
11436 * @param[out] error
11437 * pointer to error structure.
11440 * 0 on success otherwise -errno and errno is set.
11443 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11444 struct mlx5_flow_dv_dest_array_resource *ref,
11445 struct mlx5_flow *dev_flow,
11446 struct rte_flow_error *error)
11448 struct mlx5_flow_dv_dest_array_resource *resource;
11449 struct mlx5_priv *priv = dev->data->dev_private;
11450 struct mlx5_list_entry *entry;
11451 struct mlx5_flow_cb_ctx ctx = {
11457 entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11460 resource = container_of(entry, typeof(*resource), entry);
11461 dev_flow->handle->dvh.rix_dest_array = resource->idx;
11462 dev_flow->dv.dest_array_res = resource;
11467 * Convert Sample action to DV specification.
11470 * Pointer to rte_eth_dev structure.
11471 * @param[in] action
11472 * Pointer to sample action structure.
11473 * @param[in, out] dev_flow
11474 * Pointer to the mlx5_flow.
11476 * Pointer to the flow attributes.
11477 * @param[in, out] num_of_dest
11478 * Pointer to the num of destination.
11479 * @param[in, out] sample_actions
11480 * Pointer to sample actions list.
11481 * @param[in, out] res
11482 * Pointer to sample resource.
11483 * @param[out] error
11484 * Pointer to the error structure.
11487 * 0 on success, a negative errno value otherwise and rte_errno is set.
11490 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11491 const struct rte_flow_action_sample *action,
11492 struct mlx5_flow *dev_flow,
11493 const struct rte_flow_attr *attr,
11494 uint32_t *num_of_dest,
11495 void **sample_actions,
11496 struct mlx5_flow_dv_sample_resource *res,
11497 struct rte_flow_error *error)
11499 struct mlx5_priv *priv = dev->data->dev_private;
11500 const struct rte_flow_action *sub_actions;
11501 struct mlx5_flow_sub_actions_list *sample_act;
11502 struct mlx5_flow_sub_actions_idx *sample_idx;
11503 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11504 struct rte_flow *flow = dev_flow->flow;
11505 struct mlx5_flow_rss_desc *rss_desc;
11506 uint64_t action_flags = 0;
11509 rss_desc = &wks->rss_desc;
11510 sample_act = &res->sample_act;
11511 sample_idx = &res->sample_idx;
11512 res->ratio = action->ratio;
11513 sub_actions = action->actions;
11514 for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11515 int type = sub_actions->type;
11516 uint32_t pre_rix = 0;
11519 case RTE_FLOW_ACTION_TYPE_QUEUE:
11521 const struct rte_flow_action_queue *queue;
11522 struct mlx5_hrxq *hrxq;
11525 queue = sub_actions->conf;
11526 rss_desc->queue_num = 1;
11527 rss_desc->queue[0] = queue->index;
11528 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11529 rss_desc, &hrxq_idx);
11531 return rte_flow_error_set
11533 RTE_FLOW_ERROR_TYPE_ACTION,
11535 "cannot create fate queue");
11536 sample_act->dr_queue_action = hrxq->action;
11537 sample_idx->rix_hrxq = hrxq_idx;
11538 sample_actions[sample_act->actions_num++] =
11541 action_flags |= MLX5_FLOW_ACTION_QUEUE;
11542 if (action_flags & MLX5_FLOW_ACTION_MARK)
11543 dev_flow->handle->rix_hrxq = hrxq_idx;
11544 dev_flow->handle->fate_action =
11545 MLX5_FLOW_FATE_QUEUE;
11548 case RTE_FLOW_ACTION_TYPE_RSS:
11550 struct mlx5_hrxq *hrxq;
11552 const struct rte_flow_action_rss *rss;
11553 const uint8_t *rss_key;
11555 rss = sub_actions->conf;
11556 memcpy(rss_desc->queue, rss->queue,
11557 rss->queue_num * sizeof(uint16_t));
11558 rss_desc->queue_num = rss->queue_num;
11559 /* NULL RSS key indicates default RSS key. */
11560 rss_key = !rss->key ? rss_hash_default_key : rss->key;
11561 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11563 * rss->level and rss.types should be set in advance
11564 * when expanding items for RSS.
11566 flow_dv_hashfields_set(dev_flow, rss_desc);
11567 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11568 rss_desc, &hrxq_idx);
11570 return rte_flow_error_set
11572 RTE_FLOW_ERROR_TYPE_ACTION,
11574 "cannot create fate queue");
11575 sample_act->dr_queue_action = hrxq->action;
11576 sample_idx->rix_hrxq = hrxq_idx;
11577 sample_actions[sample_act->actions_num++] =
11580 action_flags |= MLX5_FLOW_ACTION_RSS;
11581 if (action_flags & MLX5_FLOW_ACTION_MARK)
11582 dev_flow->handle->rix_hrxq = hrxq_idx;
11583 dev_flow->handle->fate_action =
11584 MLX5_FLOW_FATE_QUEUE;
11587 case RTE_FLOW_ACTION_TYPE_MARK:
11589 uint32_t tag_be = mlx5_flow_mark_set
11590 (((const struct rte_flow_action_mark *)
11591 (sub_actions->conf))->id);
11593 dev_flow->handle->mark = 1;
11594 pre_rix = dev_flow->handle->dvh.rix_tag;
11595 /* Save the mark resource before sample */
11596 pre_r = dev_flow->dv.tag_resource;
11597 if (flow_dv_tag_resource_register(dev, tag_be,
11600 MLX5_ASSERT(dev_flow->dv.tag_resource);
11601 sample_act->dr_tag_action =
11602 dev_flow->dv.tag_resource->action;
11603 sample_idx->rix_tag =
11604 dev_flow->handle->dvh.rix_tag;
11605 sample_actions[sample_act->actions_num++] =
11606 sample_act->dr_tag_action;
11607 /* Recover the mark resource after sample */
11608 dev_flow->dv.tag_resource = pre_r;
11609 dev_flow->handle->dvh.rix_tag = pre_rix;
11610 action_flags |= MLX5_FLOW_ACTION_MARK;
11613 case RTE_FLOW_ACTION_TYPE_COUNT:
11615 if (!flow->counter) {
11617 flow_dv_translate_create_counter(dev,
11618 dev_flow, sub_actions->conf,
11620 if (!flow->counter)
11621 return rte_flow_error_set
11623 RTE_FLOW_ERROR_TYPE_ACTION,
11625 "cannot create counter"
11628 sample_act->dr_cnt_action =
11629 (flow_dv_counter_get_by_idx(dev,
11630 flow->counter, NULL))->action;
11631 sample_actions[sample_act->actions_num++] =
11632 sample_act->dr_cnt_action;
11633 action_flags |= MLX5_FLOW_ACTION_COUNT;
11636 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11637 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11639 struct mlx5_flow_dv_port_id_action_resource
11641 uint32_t port_id = 0;
11643 memset(&port_id_resource, 0, sizeof(port_id_resource));
11644 /* Save the port id resource before sample */
11645 pre_rix = dev_flow->handle->rix_port_id_action;
11646 pre_r = dev_flow->dv.port_id_action;
11647 if (flow_dv_translate_action_port_id(dev, sub_actions,
11650 port_id_resource.port_id = port_id;
11651 if (flow_dv_port_id_action_resource_register
11652 (dev, &port_id_resource, dev_flow, error))
11654 sample_act->dr_port_id_action =
11655 dev_flow->dv.port_id_action->action;
11656 sample_idx->rix_port_id_action =
11657 dev_flow->handle->rix_port_id_action;
11658 sample_actions[sample_act->actions_num++] =
11659 sample_act->dr_port_id_action;
11660 /* Recover the port id resource after sample */
11661 dev_flow->dv.port_id_action = pre_r;
11662 dev_flow->handle->rix_port_id_action = pre_rix;
11664 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11667 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11668 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11669 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11670 /* Save the encap resource before sample */
11671 pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11672 pre_r = dev_flow->dv.encap_decap;
11673 if (flow_dv_create_action_l2_encap(dev, sub_actions,
11678 sample_act->dr_encap_action =
11679 dev_flow->dv.encap_decap->action;
11680 sample_idx->rix_encap_decap =
11681 dev_flow->handle->dvh.rix_encap_decap;
11682 sample_actions[sample_act->actions_num++] =
11683 sample_act->dr_encap_action;
11684 /* Recover the encap resource after sample */
11685 dev_flow->dv.encap_decap = pre_r;
11686 dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11687 action_flags |= MLX5_FLOW_ACTION_ENCAP;
11690 return rte_flow_error_set(error, EINVAL,
11691 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11693 "Not support for sampler action");
11696 sample_act->action_flags = action_flags;
11697 res->ft_id = dev_flow->dv.group;
11698 if (attr->transfer) {
11700 uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11701 uint64_t set_action;
11702 } action_ctx = { .set_action = 0 };
11704 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11705 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11706 MLX5_MODIFICATION_TYPE_SET);
11707 MLX5_SET(set_action_in, action_ctx.action_in, field,
11708 MLX5_MODI_META_REG_C_0);
11709 MLX5_SET(set_action_in, action_ctx.action_in, data,
11710 priv->vport_meta_tag);
11711 res->set_action = action_ctx.set_action;
11712 } else if (attr->ingress) {
11713 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11715 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11721 * Convert Sample action to DV specification.
11724 * Pointer to rte_eth_dev structure.
11725 * @param[in, out] dev_flow
11726 * Pointer to the mlx5_flow.
11727 * @param[in] num_of_dest
11728 * The num of destination.
11729 * @param[in, out] res
11730 * Pointer to sample resource.
11731 * @param[in, out] mdest_res
11732 * Pointer to destination array resource.
11733 * @param[in] sample_actions
11734 * Pointer to sample path actions list.
11735 * @param[in] action_flags
11736 * Holds the actions detected until now.
11737 * @param[out] error
11738 * Pointer to the error structure.
11741 * 0 on success, a negative errno value otherwise and rte_errno is set.
11744 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11745 struct mlx5_flow *dev_flow,
11746 uint32_t num_of_dest,
11747 struct mlx5_flow_dv_sample_resource *res,
11748 struct mlx5_flow_dv_dest_array_resource *mdest_res,
11749 void **sample_actions,
11750 uint64_t action_flags,
11751 struct rte_flow_error *error)
11753 /* update normal path action resource into last index of array */
11754 uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11755 struct mlx5_flow_sub_actions_list *sample_act =
11756 &mdest_res->sample_act[dest_index];
11757 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11758 struct mlx5_flow_rss_desc *rss_desc;
11759 uint32_t normal_idx = 0;
11760 struct mlx5_hrxq *hrxq;
11764 rss_desc = &wks->rss_desc;
11765 if (num_of_dest > 1) {
11766 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11767 /* Handle QP action for mirroring */
11768 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11769 rss_desc, &hrxq_idx);
11771 return rte_flow_error_set
11773 RTE_FLOW_ERROR_TYPE_ACTION,
11775 "cannot create rx queue");
11777 mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11778 sample_act->dr_queue_action = hrxq->action;
11779 if (action_flags & MLX5_FLOW_ACTION_MARK)
11780 dev_flow->handle->rix_hrxq = hrxq_idx;
11781 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11783 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11785 mdest_res->sample_idx[dest_index].rix_encap_decap =
11786 dev_flow->handle->dvh.rix_encap_decap;
11787 sample_act->dr_encap_action =
11788 dev_flow->dv.encap_decap->action;
11789 dev_flow->handle->dvh.rix_encap_decap = 0;
11791 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11793 mdest_res->sample_idx[dest_index].rix_port_id_action =
11794 dev_flow->handle->rix_port_id_action;
11795 sample_act->dr_port_id_action =
11796 dev_flow->dv.port_id_action->action;
11797 dev_flow->handle->rix_port_id_action = 0;
11799 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11801 mdest_res->sample_idx[dest_index].rix_jump =
11802 dev_flow->handle->rix_jump;
11803 sample_act->dr_jump_action =
11804 dev_flow->dv.jump->action;
11805 dev_flow->handle->rix_jump = 0;
11807 sample_act->actions_num = normal_idx;
11808 /* update sample action resource into first index of array */
11809 mdest_res->ft_type = res->ft_type;
11810 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11811 sizeof(struct mlx5_flow_sub_actions_idx));
11812 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11813 sizeof(struct mlx5_flow_sub_actions_list));
11814 mdest_res->num_of_dest = num_of_dest;
11815 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11817 return rte_flow_error_set(error, EINVAL,
11818 RTE_FLOW_ERROR_TYPE_ACTION,
11819 NULL, "can't create sample "
11822 res->sub_actions = sample_actions;
11823 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11824 return rte_flow_error_set(error, EINVAL,
11825 RTE_FLOW_ERROR_TYPE_ACTION,
11827 "can't create sample action");
11833 * Remove an ASO age action from age actions list.
11836 * Pointer to the Ethernet device structure.
11838 * Pointer to the aso age action handler.
11841 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11842 struct mlx5_aso_age_action *age)
11844 struct mlx5_age_info *age_info;
11845 struct mlx5_age_param *age_param = &age->age_params;
11846 struct mlx5_priv *priv = dev->data->dev_private;
11847 uint16_t expected = AGE_CANDIDATE;
11849 age_info = GET_PORT_AGE_INFO(priv);
11850 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11851 AGE_FREE, false, __ATOMIC_RELAXED,
11852 __ATOMIC_RELAXED)) {
11854 * We need the lock even it is age timeout,
11855 * since age action may still in process.
11857 rte_spinlock_lock(&age_info->aged_sl);
11858 LIST_REMOVE(age, next);
11859 rte_spinlock_unlock(&age_info->aged_sl);
11860 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11865 * Release an ASO age action.
11868 * Pointer to the Ethernet device structure.
11869 * @param[in] age_idx
11870 * Index of ASO age action to release.
11872 * True if the release operation is during flow destroy operation.
11873 * False if the release operation is during action destroy operation.
11876 * 0 when age action was removed, otherwise the number of references.
11879 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11881 struct mlx5_priv *priv = dev->data->dev_private;
11882 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11883 struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11884 uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11887 flow_dv_aso_age_remove_from_age(dev, age);
11888 rte_spinlock_lock(&mng->free_sl);
11889 LIST_INSERT_HEAD(&mng->free, age, next);
11890 rte_spinlock_unlock(&mng->free_sl);
11896 * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11899 * Pointer to the Ethernet device structure.
11902 * 0 on success, otherwise negative errno value and rte_errno is set.
11905 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11907 struct mlx5_priv *priv = dev->data->dev_private;
11908 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11909 void *old_pools = mng->pools;
11910 uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11911 uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11912 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11915 rte_errno = ENOMEM;
11919 memcpy(pools, old_pools,
11920 mng->n * sizeof(struct mlx5_flow_counter_pool *));
11921 mlx5_free(old_pools);
11923 /* First ASO flow hit allocation - starting ASO data-path. */
11924 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11932 mng->pools = pools;
11937 * Create and initialize a new ASO aging pool.
11940 * Pointer to the Ethernet device structure.
11941 * @param[out] age_free
11942 * Where to put the pointer of a new age action.
11945 * The age actions pool pointer and @p age_free is set on success,
11946 * NULL otherwise and rte_errno is set.
11948 static struct mlx5_aso_age_pool *
11949 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11950 struct mlx5_aso_age_action **age_free)
11952 struct mlx5_priv *priv = dev->data->dev_private;
11953 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11954 struct mlx5_aso_age_pool *pool = NULL;
11955 struct mlx5_devx_obj *obj = NULL;
11958 obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
11959 priv->sh->cdev->pdn);
11961 rte_errno = ENODATA;
11962 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11965 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11967 claim_zero(mlx5_devx_cmd_destroy(obj));
11968 rte_errno = ENOMEM;
11971 pool->flow_hit_aso_obj = obj;
11972 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11973 rte_rwlock_write_lock(&mng->resize_rwl);
11974 pool->index = mng->next;
11975 /* Resize pools array if there is no room for the new pool in it. */
11976 if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11977 claim_zero(mlx5_devx_cmd_destroy(obj));
11979 rte_rwlock_write_unlock(&mng->resize_rwl);
11982 mng->pools[pool->index] = pool;
11984 rte_rwlock_write_unlock(&mng->resize_rwl);
11985 /* Assign the first action in the new pool, the rest go to free list. */
11986 *age_free = &pool->actions[0];
11987 for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11988 pool->actions[i].offset = i;
11989 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11995 * Allocate a ASO aging bit.
11998 * Pointer to the Ethernet device structure.
11999 * @param[out] error
12000 * Pointer to the error structure.
12003 * Index to ASO age action on success, 0 otherwise and rte_errno is set.
12006 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12008 struct mlx5_priv *priv = dev->data->dev_private;
12009 const struct mlx5_aso_age_pool *pool;
12010 struct mlx5_aso_age_action *age_free = NULL;
12011 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12014 /* Try to get the next free age action bit. */
12015 rte_spinlock_lock(&mng->free_sl);
12016 age_free = LIST_FIRST(&mng->free);
12018 LIST_REMOVE(age_free, next);
12019 } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12020 rte_spinlock_unlock(&mng->free_sl);
12021 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12022 NULL, "failed to create ASO age pool");
12023 return 0; /* 0 is an error. */
12025 rte_spinlock_unlock(&mng->free_sl);
12026 pool = container_of
12027 ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12028 (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12030 if (!age_free->dr_action) {
12031 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12035 rte_flow_error_set(error, rte_errno,
12036 RTE_FLOW_ERROR_TYPE_ACTION,
12037 NULL, "failed to get reg_c "
12038 "for ASO flow hit");
12039 return 0; /* 0 is an error. */
12041 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12042 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12043 (priv->sh->rx_domain,
12044 pool->flow_hit_aso_obj->obj, age_free->offset,
12045 MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12046 (reg_c - REG_C_0));
12047 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12048 if (!age_free->dr_action) {
12050 rte_spinlock_lock(&mng->free_sl);
12051 LIST_INSERT_HEAD(&mng->free, age_free, next);
12052 rte_spinlock_unlock(&mng->free_sl);
12053 rte_flow_error_set(error, rte_errno,
12054 RTE_FLOW_ERROR_TYPE_ACTION,
12055 NULL, "failed to create ASO "
12056 "flow hit action");
12057 return 0; /* 0 is an error. */
12060 __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12061 return pool->index | ((age_free->offset + 1) << 16);
12065 * Initialize flow ASO age parameters.
12068 * Pointer to rte_eth_dev structure.
12069 * @param[in] age_idx
12070 * Index of ASO age action.
12071 * @param[in] context
12072 * Pointer to flow counter age context.
12073 * @param[in] timeout
12074 * Aging timeout in seconds.
12078 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12083 struct mlx5_aso_age_action *aso_age;
12085 aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12086 MLX5_ASSERT(aso_age);
12087 aso_age->age_params.context = context;
12088 aso_age->age_params.timeout = timeout;
12089 aso_age->age_params.port_id = dev->data->port_id;
12090 __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12092 __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12097 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12098 const struct rte_flow_item_integrity *value,
12099 void *headers_m, void *headers_v)
12102 /* application l4_ok filter aggregates all hardware l4 filters
12103 * therefore hw l4_checksum_ok must be implicitly added here.
12105 struct rte_flow_item_integrity local_item;
12107 local_item.l4_csum_ok = 1;
12108 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12109 local_item.l4_csum_ok);
12110 if (value->l4_ok) {
12111 /* application l4_ok = 1 matches sets both hw flags
12112 * l4_ok and l4_checksum_ok flags to 1.
12114 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12115 l4_checksum_ok, local_item.l4_csum_ok);
12116 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12118 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12121 /* application l4_ok = 0 matches on hw flag
12122 * l4_checksum_ok = 0 only.
12124 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12125 l4_checksum_ok, 0);
12127 } else if (mask->l4_csum_ok) {
12128 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12130 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12131 value->l4_csum_ok);
12136 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12137 const struct rte_flow_item_integrity *value,
12138 void *headers_m, void *headers_v, bool is_ipv4)
12141 /* application l3_ok filter aggregates all hardware l3 filters
12142 * therefore hw ipv4_checksum_ok must be implicitly added here.
12144 struct rte_flow_item_integrity local_item;
12146 local_item.ipv4_csum_ok = !!is_ipv4;
12147 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12148 local_item.ipv4_csum_ok);
12149 if (value->l3_ok) {
12150 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12151 ipv4_checksum_ok, local_item.ipv4_csum_ok);
12152 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12154 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12157 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12158 ipv4_checksum_ok, 0);
12160 } else if (mask->ipv4_csum_ok) {
12161 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12162 mask->ipv4_csum_ok);
12163 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12164 value->ipv4_csum_ok);
12169 set_integrity_bits(void *headers_m, void *headers_v,
12170 const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12172 const struct rte_flow_item_integrity *spec = integrity_item->spec;
12173 const struct rte_flow_item_integrity *mask = integrity_item->mask;
12175 /* Integrity bits validation cleared spec pointer */
12176 MLX5_ASSERT(spec != NULL);
12178 mask = &rte_flow_item_integrity_mask;
12179 flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12181 flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12185 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12187 struct rte_flow_item *integrity_items[2],
12188 uint64_t pattern_flags)
12190 void *headers_m, *headers_v;
12193 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12194 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12196 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12197 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12199 set_integrity_bits(headers_m, headers_v,
12200 integrity_items[1], is_l3_ip4);
12202 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12203 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12205 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12206 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12208 set_integrity_bits(headers_m, headers_v,
12209 integrity_items[0], is_l3_ip4);
12214 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12215 const struct rte_flow_item *integrity_items[2],
12216 uint64_t *last_item)
12218 const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12220 /* integrity bits validation cleared spec pointer */
12221 MLX5_ASSERT(spec != NULL);
12222 if (spec->level > 1) {
12223 integrity_items[1] = item;
12224 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12226 integrity_items[0] = item;
12227 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12232 * Prepares DV flow counter with aging configuration.
12233 * Gets it by index when exists, creates a new one when doesn't.
12236 * Pointer to rte_eth_dev structure.
12237 * @param[in] dev_flow
12238 * Pointer to the mlx5_flow.
12239 * @param[in, out] flow
12240 * Pointer to the sub flow.
12242 * Pointer to the counter action configuration.
12244 * Pointer to the aging action configuration.
12245 * @param[out] error
12246 * Pointer to the error structure.
12249 * Pointer to the counter, NULL otherwise.
12251 static struct mlx5_flow_counter *
12252 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12253 struct mlx5_flow *dev_flow,
12254 struct rte_flow *flow,
12255 const struct rte_flow_action_count *count,
12256 const struct rte_flow_action_age *age,
12257 struct rte_flow_error *error)
12259 if (!flow->counter) {
12260 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12262 if (!flow->counter) {
12263 rte_flow_error_set(error, rte_errno,
12264 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12265 "cannot create counter object.");
12269 return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12273 * Release an ASO CT action by its own device.
12276 * Pointer to the Ethernet device structure.
12278 * Index of ASO CT action to release.
12281 * 0 when CT action was removed, otherwise the number of references.
12284 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12286 struct mlx5_priv *priv = dev->data->dev_private;
12287 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12289 struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12290 enum mlx5_aso_ct_state state =
12291 __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12293 /* Cannot release when CT is in the ASO SQ. */
12294 if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12296 ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12298 if (ct->dr_action_orig) {
12299 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12300 claim_zero(mlx5_glue->destroy_flow_action
12301 (ct->dr_action_orig));
12303 ct->dr_action_orig = NULL;
12305 if (ct->dr_action_rply) {
12306 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12307 claim_zero(mlx5_glue->destroy_flow_action
12308 (ct->dr_action_rply));
12310 ct->dr_action_rply = NULL;
12312 /* Clear the state to free, no need in 1st allocation. */
12313 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12314 rte_spinlock_lock(&mng->ct_sl);
12315 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12316 rte_spinlock_unlock(&mng->ct_sl);
12322 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12323 struct rte_flow_error *error)
12325 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12326 uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12327 struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12330 MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12331 if (dev->data->dev_started != 1)
12332 return rte_flow_error_set(error, EAGAIN,
12333 RTE_FLOW_ERROR_TYPE_ACTION,
12335 "Indirect CT action cannot be destroyed when the port is stopped");
12336 ret = flow_dv_aso_ct_dev_release(owndev, idx);
12338 return rte_flow_error_set(error, EAGAIN,
12339 RTE_FLOW_ERROR_TYPE_ACTION,
12341 "Current state prevents indirect CT action from being destroyed");
12346 * Resize the ASO CT pools array by 64 pools.
12349 * Pointer to the Ethernet device structure.
12352 * 0 on success, otherwise negative errno value and rte_errno is set.
12355 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12357 struct mlx5_priv *priv = dev->data->dev_private;
12358 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12359 void *old_pools = mng->pools;
12360 /* Magic number now, need a macro. */
12361 uint32_t resize = mng->n + 64;
12362 uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12363 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12366 rte_errno = ENOMEM;
12369 rte_rwlock_write_lock(&mng->resize_rwl);
12370 /* ASO SQ/QP was already initialized in the startup. */
12372 /* Realloc could be an alternative choice. */
12373 rte_memcpy(pools, old_pools,
12374 mng->n * sizeof(struct mlx5_aso_ct_pool *));
12375 mlx5_free(old_pools);
12378 mng->pools = pools;
12379 rte_rwlock_write_unlock(&mng->resize_rwl);
12384 * Create and initialize a new ASO CT pool.
12387 * Pointer to the Ethernet device structure.
12388 * @param[out] ct_free
12389 * Where to put the pointer of a new CT action.
12392 * The CT actions pool pointer and @p ct_free is set on success,
12393 * NULL otherwise and rte_errno is set.
12395 static struct mlx5_aso_ct_pool *
12396 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12397 struct mlx5_aso_ct_action **ct_free)
12399 struct mlx5_priv *priv = dev->data->dev_private;
12400 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12401 struct mlx5_aso_ct_pool *pool = NULL;
12402 struct mlx5_devx_obj *obj = NULL;
12404 uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12406 obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12407 priv->sh->cdev->pdn,
12410 rte_errno = ENODATA;
12411 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12414 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12416 rte_errno = ENOMEM;
12417 claim_zero(mlx5_devx_cmd_destroy(obj));
12420 pool->devx_obj = obj;
12421 pool->index = mng->next;
12422 /* Resize pools array if there is no room for the new pool in it. */
12423 if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12424 claim_zero(mlx5_devx_cmd_destroy(obj));
12428 mng->pools[pool->index] = pool;
12430 /* Assign the first action in the new pool, the rest go to free list. */
12431 *ct_free = &pool->actions[0];
12432 /* Lock outside, the list operation is safe here. */
12433 for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12434 /* refcnt is 0 when allocating the memory. */
12435 pool->actions[i].offset = i;
12436 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12442 * Allocate a ASO CT action from free list.
12445 * Pointer to the Ethernet device structure.
12446 * @param[out] error
12447 * Pointer to the error structure.
12450 * Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12453 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12455 struct mlx5_priv *priv = dev->data->dev_private;
12456 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12457 struct mlx5_aso_ct_action *ct = NULL;
12458 struct mlx5_aso_ct_pool *pool;
12463 if (!priv->sh->devx) {
12464 rte_errno = ENOTSUP;
12467 /* Get a free CT action, if no, a new pool will be created. */
12468 rte_spinlock_lock(&mng->ct_sl);
12469 ct = LIST_FIRST(&mng->free_cts);
12471 LIST_REMOVE(ct, next);
12472 } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12473 rte_spinlock_unlock(&mng->ct_sl);
12474 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12475 NULL, "failed to create ASO CT pool");
12478 rte_spinlock_unlock(&mng->ct_sl);
12479 pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12480 ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12481 /* 0: inactive, 1: created, 2+: used by flows. */
12482 __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12483 reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12484 if (!ct->dr_action_orig) {
12485 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12486 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12487 (priv->sh->rx_domain, pool->devx_obj->obj,
12489 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12492 RTE_SET_USED(reg_c);
12494 if (!ct->dr_action_orig) {
12495 flow_dv_aso_ct_dev_release(dev, ct_idx);
12496 rte_flow_error_set(error, rte_errno,
12497 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12498 "failed to create ASO CT action");
12502 if (!ct->dr_action_rply) {
12503 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12504 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12505 (priv->sh->rx_domain, pool->devx_obj->obj,
12507 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12510 if (!ct->dr_action_rply) {
12511 flow_dv_aso_ct_dev_release(dev, ct_idx);
12512 rte_flow_error_set(error, rte_errno,
12513 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12514 "failed to create ASO CT action");
12522 * Create a conntrack object with context and actions by using ASO mechanism.
12525 * Pointer to rte_eth_dev structure.
12527 * Pointer to conntrack information profile.
12528 * @param[out] error
12529 * Pointer to the error structure.
12532 * Index to conntrack object on success, 0 otherwise.
12535 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12536 const struct rte_flow_action_conntrack *pro,
12537 struct rte_flow_error *error)
12539 struct mlx5_priv *priv = dev->data->dev_private;
12540 struct mlx5_dev_ctx_shared *sh = priv->sh;
12541 struct mlx5_aso_ct_action *ct;
12544 if (!sh->ct_aso_en)
12545 return rte_flow_error_set(error, ENOTSUP,
12546 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12547 "Connection is not supported");
12548 idx = flow_dv_aso_ct_alloc(dev, error);
12550 return rte_flow_error_set(error, rte_errno,
12551 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12552 "Failed to allocate CT object");
12553 ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12554 if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12555 return rte_flow_error_set(error, EBUSY,
12556 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12557 "Failed to update CT");
12558 ct->is_original = !!pro->is_original_dir;
12559 ct->peer = pro->peer_port;
12564 * Fill the flow with DV spec, lock free
12565 * (mutex should be acquired by caller).
12568 * Pointer to rte_eth_dev structure.
12569 * @param[in, out] dev_flow
12570 * Pointer to the sub flow.
12572 * Pointer to the flow attributes.
12574 * Pointer to the list of items.
12575 * @param[in] actions
12576 * Pointer to the list of actions.
12577 * @param[out] error
12578 * Pointer to the error structure.
12581 * 0 on success, a negative errno value otherwise and rte_errno is set.
12584 flow_dv_translate(struct rte_eth_dev *dev,
12585 struct mlx5_flow *dev_flow,
12586 const struct rte_flow_attr *attr,
12587 const struct rte_flow_item items[],
12588 const struct rte_flow_action actions[],
12589 struct rte_flow_error *error)
12591 struct mlx5_priv *priv = dev->data->dev_private;
12592 struct mlx5_dev_config *dev_conf = &priv->config;
12593 struct rte_flow *flow = dev_flow->flow;
12594 struct mlx5_flow_handle *handle = dev_flow->handle;
12595 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12596 struct mlx5_flow_rss_desc *rss_desc;
12597 uint64_t item_flags = 0;
12598 uint64_t last_item = 0;
12599 uint64_t action_flags = 0;
12600 struct mlx5_flow_dv_matcher matcher = {
12602 .size = sizeof(matcher.mask.buf),
12606 bool actions_end = false;
12608 struct mlx5_flow_dv_modify_hdr_resource res;
12609 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12610 sizeof(struct mlx5_modification_cmd) *
12611 (MLX5_MAX_MODIFY_NUM + 1)];
12613 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12614 const struct rte_flow_action_count *count = NULL;
12615 const struct rte_flow_action_age *non_shared_age = NULL;
12616 union flow_dv_attr flow_attr = { .attr = 0 };
12618 union mlx5_flow_tbl_key tbl_key;
12619 uint32_t modify_action_position = UINT32_MAX;
12620 void *match_mask = matcher.mask.buf;
12621 void *match_value = dev_flow->dv.value.buf;
12622 uint8_t next_protocol = 0xff;
12623 struct rte_vlan_hdr vlan = { 0 };
12624 struct mlx5_flow_dv_dest_array_resource mdest_res;
12625 struct mlx5_flow_dv_sample_resource sample_res;
12626 void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12627 const struct rte_flow_action_sample *sample = NULL;
12628 struct mlx5_flow_sub_actions_list *sample_act;
12629 uint32_t sample_act_pos = UINT32_MAX;
12630 uint32_t age_act_pos = UINT32_MAX;
12631 uint32_t num_of_dest = 0;
12632 int tmp_actions_n = 0;
12635 const struct mlx5_flow_tunnel *tunnel = NULL;
12636 struct flow_grp_info grp_info = {
12637 .external = !!dev_flow->external,
12638 .transfer = !!attr->transfer,
12639 .fdb_def_rule = !!priv->fdb_def_rule,
12640 .skip_scale = dev_flow->skip_scale &
12641 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12642 .std_tbl_fix = true,
12644 const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12647 return rte_flow_error_set(error, ENOMEM,
12648 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12650 "failed to push flow workspace");
12651 rss_desc = &wks->rss_desc;
12652 memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12653 memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12654 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12655 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12656 /* update normal path action resource into last index of array */
12657 sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12658 if (is_tunnel_offload_active(dev)) {
12659 if (dev_flow->tunnel) {
12660 RTE_VERIFY(dev_flow->tof_type ==
12661 MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12662 tunnel = dev_flow->tunnel;
12664 tunnel = mlx5_get_tof(items, actions,
12665 &dev_flow->tof_type);
12666 dev_flow->tunnel = tunnel;
12668 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12669 (dev, attr, tunnel, dev_flow->tof_type);
12671 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12672 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12673 ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12677 dev_flow->dv.group = table;
12678 if (attr->transfer)
12679 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12680 /* number of actions must be set to 0 in case of dirty stack. */
12681 mhdr_res->actions_num = 0;
12682 if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12684 * do not add decap action if match rule drops packet
12685 * HW rejects rules with decap & drop
12687 * if tunnel match rule was inserted before matching tunnel set
12688 * rule flow table used in the match rule must be registered.
12689 * current implementation handles that in the
12690 * flow_dv_match_register() at the function end.
12692 bool add_decap = true;
12693 const struct rte_flow_action *ptr = actions;
12695 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12696 if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12702 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12706 dev_flow->dv.actions[actions_n++] =
12707 dev_flow->dv.encap_decap->action;
12708 action_flags |= MLX5_FLOW_ACTION_DECAP;
12711 for (; !actions_end ; actions++) {
12712 const struct rte_flow_action_queue *queue;
12713 const struct rte_flow_action_rss *rss;
12714 const struct rte_flow_action *action = actions;
12715 const uint8_t *rss_key;
12716 struct mlx5_flow_tbl_resource *tbl;
12717 struct mlx5_aso_age_action *age_act;
12718 struct mlx5_flow_counter *cnt_act;
12719 uint32_t port_id = 0;
12720 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12721 int action_type = actions->type;
12722 const struct rte_flow_action *found_action = NULL;
12723 uint32_t jump_group = 0;
12724 uint32_t owner_idx;
12725 struct mlx5_aso_ct_action *ct;
12727 if (!mlx5_flow_os_action_supported(action_type))
12728 return rte_flow_error_set(error, ENOTSUP,
12729 RTE_FLOW_ERROR_TYPE_ACTION,
12731 "action not supported");
12732 switch (action_type) {
12733 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12734 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12736 case RTE_FLOW_ACTION_TYPE_VOID:
12738 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12739 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12740 if (flow_dv_translate_action_port_id(dev, action,
12743 port_id_resource.port_id = port_id;
12744 MLX5_ASSERT(!handle->rix_port_id_action);
12745 if (flow_dv_port_id_action_resource_register
12746 (dev, &port_id_resource, dev_flow, error))
12748 dev_flow->dv.actions[actions_n++] =
12749 dev_flow->dv.port_id_action->action;
12750 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12751 dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12752 sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12755 case RTE_FLOW_ACTION_TYPE_FLAG:
12756 action_flags |= MLX5_FLOW_ACTION_FLAG;
12757 dev_flow->handle->mark = 1;
12758 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12759 struct rte_flow_action_mark mark = {
12760 .id = MLX5_FLOW_MARK_DEFAULT,
12763 if (flow_dv_convert_action_mark(dev, &mark,
12767 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12770 tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12772 * Only one FLAG or MARK is supported per device flow
12773 * right now. So the pointer to the tag resource must be
12774 * zero before the register process.
12776 MLX5_ASSERT(!handle->dvh.rix_tag);
12777 if (flow_dv_tag_resource_register(dev, tag_be,
12780 MLX5_ASSERT(dev_flow->dv.tag_resource);
12781 dev_flow->dv.actions[actions_n++] =
12782 dev_flow->dv.tag_resource->action;
12784 case RTE_FLOW_ACTION_TYPE_MARK:
12785 action_flags |= MLX5_FLOW_ACTION_MARK;
12786 dev_flow->handle->mark = 1;
12787 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12788 const struct rte_flow_action_mark *mark =
12789 (const struct rte_flow_action_mark *)
12792 if (flow_dv_convert_action_mark(dev, mark,
12796 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12800 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12801 /* Legacy (non-extensive) MARK action. */
12802 tag_be = mlx5_flow_mark_set
12803 (((const struct rte_flow_action_mark *)
12804 (actions->conf))->id);
12805 MLX5_ASSERT(!handle->dvh.rix_tag);
12806 if (flow_dv_tag_resource_register(dev, tag_be,
12809 MLX5_ASSERT(dev_flow->dv.tag_resource);
12810 dev_flow->dv.actions[actions_n++] =
12811 dev_flow->dv.tag_resource->action;
12813 case RTE_FLOW_ACTION_TYPE_SET_META:
12814 if (flow_dv_convert_action_set_meta
12815 (dev, mhdr_res, attr,
12816 (const struct rte_flow_action_set_meta *)
12817 actions->conf, error))
12819 action_flags |= MLX5_FLOW_ACTION_SET_META;
12821 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12822 if (flow_dv_convert_action_set_tag
12824 (const struct rte_flow_action_set_tag *)
12825 actions->conf, error))
12827 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12829 case RTE_FLOW_ACTION_TYPE_DROP:
12830 action_flags |= MLX5_FLOW_ACTION_DROP;
12831 dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12833 case RTE_FLOW_ACTION_TYPE_QUEUE:
12834 queue = actions->conf;
12835 rss_desc->queue_num = 1;
12836 rss_desc->queue[0] = queue->index;
12837 action_flags |= MLX5_FLOW_ACTION_QUEUE;
12838 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12839 sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12842 case RTE_FLOW_ACTION_TYPE_RSS:
12843 rss = actions->conf;
12844 memcpy(rss_desc->queue, rss->queue,
12845 rss->queue_num * sizeof(uint16_t));
12846 rss_desc->queue_num = rss->queue_num;
12847 /* NULL RSS key indicates default RSS key. */
12848 rss_key = !rss->key ? rss_hash_default_key : rss->key;
12849 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12851 * rss->level and rss.types should be set in advance
12852 * when expanding items for RSS.
12854 action_flags |= MLX5_FLOW_ACTION_RSS;
12855 dev_flow->handle->fate_action = rss_desc->shared_rss ?
12856 MLX5_FLOW_FATE_SHARED_RSS :
12857 MLX5_FLOW_FATE_QUEUE;
12859 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12860 owner_idx = (uint32_t)(uintptr_t)action->conf;
12861 age_act = flow_aso_age_get_by_idx(dev, owner_idx);
12862 if (flow->age == 0) {
12863 flow->age = owner_idx;
12864 __atomic_fetch_add(&age_act->refcnt, 1,
12867 age_act_pos = actions_n++;
12868 action_flags |= MLX5_FLOW_ACTION_AGE;
12870 case RTE_FLOW_ACTION_TYPE_AGE:
12871 non_shared_age = action->conf;
12872 age_act_pos = actions_n++;
12873 action_flags |= MLX5_FLOW_ACTION_AGE;
12875 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12876 owner_idx = (uint32_t)(uintptr_t)action->conf;
12877 cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
12879 MLX5_ASSERT(cnt_act != NULL);
12881 * When creating meter drop flow in drop table, the
12882 * counter should not overwrite the rte flow counter.
12884 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12885 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12886 dev_flow->dv.actions[actions_n++] =
12889 if (flow->counter == 0) {
12890 flow->counter = owner_idx;
12892 (&cnt_act->shared_info.refcnt,
12893 1, __ATOMIC_RELAXED);
12895 /* Save information first, will apply later. */
12896 action_flags |= MLX5_FLOW_ACTION_COUNT;
12899 case RTE_FLOW_ACTION_TYPE_COUNT:
12900 if (!priv->sh->devx) {
12901 return rte_flow_error_set
12903 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12905 "count action not supported");
12907 /* Save information first, will apply later. */
12908 count = action->conf;
12909 action_flags |= MLX5_FLOW_ACTION_COUNT;
12911 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12912 dev_flow->dv.actions[actions_n++] =
12913 priv->sh->pop_vlan_action;
12914 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12916 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12917 if (!(action_flags &
12918 MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12919 flow_dev_get_vlan_info_from_items(items, &vlan);
12920 vlan.eth_proto = rte_be_to_cpu_16
12921 ((((const struct rte_flow_action_of_push_vlan *)
12922 actions->conf)->ethertype));
12923 found_action = mlx5_flow_find_action
12925 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12927 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12928 found_action = mlx5_flow_find_action
12930 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12932 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12933 if (flow_dv_create_action_push_vlan
12934 (dev, attr, &vlan, dev_flow, error))
12936 dev_flow->dv.actions[actions_n++] =
12937 dev_flow->dv.push_vlan_res->action;
12938 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12940 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12941 /* of_vlan_push action handled this action */
12942 MLX5_ASSERT(action_flags &
12943 MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12945 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12946 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12948 flow_dev_get_vlan_info_from_items(items, &vlan);
12949 mlx5_update_vlan_vid_pcp(actions, &vlan);
12950 /* If no VLAN push - this is a modify header action */
12951 if (flow_dv_convert_action_modify_vlan_vid
12952 (mhdr_res, actions, error))
12954 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12956 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12957 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12958 if (flow_dv_create_action_l2_encap(dev, actions,
12963 dev_flow->dv.actions[actions_n++] =
12964 dev_flow->dv.encap_decap->action;
12965 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12966 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12967 sample_act->action_flags |=
12968 MLX5_FLOW_ACTION_ENCAP;
12970 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12971 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12972 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12976 dev_flow->dv.actions[actions_n++] =
12977 dev_flow->dv.encap_decap->action;
12978 action_flags |= MLX5_FLOW_ACTION_DECAP;
12980 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12981 /* Handle encap with preceding decap. */
12982 if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12983 if (flow_dv_create_action_raw_encap
12984 (dev, actions, dev_flow, attr, error))
12986 dev_flow->dv.actions[actions_n++] =
12987 dev_flow->dv.encap_decap->action;
12989 /* Handle encap without preceding decap. */
12990 if (flow_dv_create_action_l2_encap
12991 (dev, actions, dev_flow, attr->transfer,
12994 dev_flow->dv.actions[actions_n++] =
12995 dev_flow->dv.encap_decap->action;
12997 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12998 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12999 sample_act->action_flags |=
13000 MLX5_FLOW_ACTION_ENCAP;
13002 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
13003 while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
13005 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
13006 if (flow_dv_create_action_l2_decap
13007 (dev, dev_flow, attr->transfer, error))
13009 dev_flow->dv.actions[actions_n++] =
13010 dev_flow->dv.encap_decap->action;
13012 /* If decap is followed by encap, handle it at encap. */
13013 action_flags |= MLX5_FLOW_ACTION_DECAP;
13015 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
13016 dev_flow->dv.actions[actions_n++] =
13017 (void *)(uintptr_t)action->conf;
13018 action_flags |= MLX5_FLOW_ACTION_JUMP;
13020 case RTE_FLOW_ACTION_TYPE_JUMP:
13021 jump_group = ((const struct rte_flow_action_jump *)
13022 action->conf)->group;
13023 grp_info.std_tbl_fix = 0;
13024 if (dev_flow->skip_scale &
13025 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
13026 grp_info.skip_scale = 1;
13028 grp_info.skip_scale = 0;
13029 ret = mlx5_flow_group_to_table(dev, tunnel,
13035 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
13037 !!dev_flow->external,
13038 tunnel, jump_group, 0,
13041 return rte_flow_error_set
13043 RTE_FLOW_ERROR_TYPE_ACTION,
13045 "cannot create jump action.");
13046 if (flow_dv_jump_tbl_resource_register
13047 (dev, tbl, dev_flow, error)) {
13048 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
13049 return rte_flow_error_set
13051 RTE_FLOW_ERROR_TYPE_ACTION,
13053 "cannot create jump action.");
13055 dev_flow->dv.actions[actions_n++] =
13056 dev_flow->dv.jump->action;
13057 action_flags |= MLX5_FLOW_ACTION_JUMP;
13058 dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13059 sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13062 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13063 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13064 if (flow_dv_convert_action_modify_mac
13065 (mhdr_res, actions, error))
13067 action_flags |= actions->type ==
13068 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13069 MLX5_FLOW_ACTION_SET_MAC_SRC :
13070 MLX5_FLOW_ACTION_SET_MAC_DST;
13072 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13073 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13074 if (flow_dv_convert_action_modify_ipv4
13075 (mhdr_res, actions, error))
13077 action_flags |= actions->type ==
13078 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13079 MLX5_FLOW_ACTION_SET_IPV4_SRC :
13080 MLX5_FLOW_ACTION_SET_IPV4_DST;
13082 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13083 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13084 if (flow_dv_convert_action_modify_ipv6
13085 (mhdr_res, actions, error))
13087 action_flags |= actions->type ==
13088 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13089 MLX5_FLOW_ACTION_SET_IPV6_SRC :
13090 MLX5_FLOW_ACTION_SET_IPV6_DST;
13092 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13093 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13094 if (flow_dv_convert_action_modify_tp
13095 (mhdr_res, actions, items,
13096 &flow_attr, dev_flow, !!(action_flags &
13097 MLX5_FLOW_ACTION_DECAP), error))
13099 action_flags |= actions->type ==
13100 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13101 MLX5_FLOW_ACTION_SET_TP_SRC :
13102 MLX5_FLOW_ACTION_SET_TP_DST;
13104 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13105 if (flow_dv_convert_action_modify_dec_ttl
13106 (mhdr_res, items, &flow_attr, dev_flow,
13108 MLX5_FLOW_ACTION_DECAP), error))
13110 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13112 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13113 if (flow_dv_convert_action_modify_ttl
13114 (mhdr_res, actions, items, &flow_attr,
13115 dev_flow, !!(action_flags &
13116 MLX5_FLOW_ACTION_DECAP), error))
13118 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13120 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13121 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13122 if (flow_dv_convert_action_modify_tcp_seq
13123 (mhdr_res, actions, error))
13125 action_flags |= actions->type ==
13126 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13127 MLX5_FLOW_ACTION_INC_TCP_SEQ :
13128 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13131 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13132 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13133 if (flow_dv_convert_action_modify_tcp_ack
13134 (mhdr_res, actions, error))
13136 action_flags |= actions->type ==
13137 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13138 MLX5_FLOW_ACTION_INC_TCP_ACK :
13139 MLX5_FLOW_ACTION_DEC_TCP_ACK;
13141 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13142 if (flow_dv_convert_action_set_reg
13143 (mhdr_res, actions, error))
13145 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13147 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13148 if (flow_dv_convert_action_copy_mreg
13149 (dev, mhdr_res, actions, error))
13151 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13153 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13154 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13155 dev_flow->handle->fate_action =
13156 MLX5_FLOW_FATE_DEFAULT_MISS;
13158 case RTE_FLOW_ACTION_TYPE_METER:
13160 return rte_flow_error_set(error, rte_errno,
13161 RTE_FLOW_ERROR_TYPE_ACTION,
13162 NULL, "Failed to get meter in flow.");
13163 /* Set the meter action. */
13164 dev_flow->dv.actions[actions_n++] =
13165 wks->fm->meter_action;
13166 action_flags |= MLX5_FLOW_ACTION_METER;
13168 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13169 if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13172 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13174 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13175 if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13178 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13180 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13181 sample_act_pos = actions_n;
13182 sample = (const struct rte_flow_action_sample *)
13185 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13186 /* put encap action into group if work with port id */
13187 if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13188 (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13189 sample_act->action_flags |=
13190 MLX5_FLOW_ACTION_ENCAP;
13192 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13193 if (flow_dv_convert_action_modify_field
13194 (dev, mhdr_res, actions, attr, error))
13196 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13198 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13199 owner_idx = (uint32_t)(uintptr_t)action->conf;
13200 ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13202 return rte_flow_error_set(error, EINVAL,
13203 RTE_FLOW_ERROR_TYPE_ACTION,
13205 "Failed to get CT object.");
13206 if (mlx5_aso_ct_available(priv->sh, ct))
13207 return rte_flow_error_set(error, rte_errno,
13208 RTE_FLOW_ERROR_TYPE_ACTION,
13210 "CT is unavailable.");
13211 if (ct->is_original)
13212 dev_flow->dv.actions[actions_n] =
13213 ct->dr_action_orig;
13215 dev_flow->dv.actions[actions_n] =
13216 ct->dr_action_rply;
13217 if (flow->ct == 0) {
13218 flow->indirect_type =
13219 MLX5_INDIRECT_ACTION_TYPE_CT;
13220 flow->ct = owner_idx;
13221 __atomic_fetch_add(&ct->refcnt, 1,
13225 action_flags |= MLX5_FLOW_ACTION_CT;
13227 case RTE_FLOW_ACTION_TYPE_END:
13228 actions_end = true;
13229 if (mhdr_res->actions_num) {
13230 /* create modify action if needed. */
13231 if (flow_dv_modify_hdr_resource_register
13232 (dev, mhdr_res, dev_flow, error))
13234 dev_flow->dv.actions[modify_action_position] =
13235 handle->dvh.modify_hdr->action;
13238 * Handle AGE and COUNT action by single HW counter
13239 * when they are not shared.
13241 if (action_flags & MLX5_FLOW_ACTION_AGE) {
13242 if ((non_shared_age && count) ||
13243 !(priv->sh->flow_hit_aso_en &&
13244 (attr->group || attr->transfer))) {
13245 /* Creates age by counters. */
13246 cnt_act = flow_dv_prepare_counter
13253 dev_flow->dv.actions[age_act_pos] =
13257 if (!flow->age && non_shared_age) {
13258 flow->age = flow_dv_aso_age_alloc
13262 flow_dv_aso_age_params_init
13264 non_shared_age->context ?
13265 non_shared_age->context :
13266 (void *)(uintptr_t)
13267 (dev_flow->flow_idx),
13268 non_shared_age->timeout);
13270 age_act = flow_aso_age_get_by_idx(dev,
13272 dev_flow->dv.actions[age_act_pos] =
13273 age_act->dr_action;
13275 if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13277 * Create one count action, to be used
13278 * by all sub-flows.
13280 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13285 dev_flow->dv.actions[actions_n++] =
13291 if (mhdr_res->actions_num &&
13292 modify_action_position == UINT32_MAX)
13293 modify_action_position = actions_n++;
13295 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13296 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13297 int item_type = items->type;
13299 if (!mlx5_flow_os_item_supported(item_type))
13300 return rte_flow_error_set(error, ENOTSUP,
13301 RTE_FLOW_ERROR_TYPE_ITEM,
13302 NULL, "item not supported");
13303 switch (item_type) {
13304 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13305 flow_dv_translate_item_port_id
13306 (dev, match_mask, match_value, items, attr);
13307 last_item = MLX5_FLOW_ITEM_PORT_ID;
13309 case RTE_FLOW_ITEM_TYPE_ETH:
13310 flow_dv_translate_item_eth(match_mask, match_value,
13312 dev_flow->dv.group);
13313 matcher.priority = action_flags &
13314 MLX5_FLOW_ACTION_DEFAULT_MISS &&
13315 !dev_flow->external ?
13316 MLX5_PRIORITY_MAP_L3 :
13317 MLX5_PRIORITY_MAP_L2;
13318 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13319 MLX5_FLOW_LAYER_OUTER_L2;
13321 case RTE_FLOW_ITEM_TYPE_VLAN:
13322 flow_dv_translate_item_vlan(dev_flow,
13323 match_mask, match_value,
13325 dev_flow->dv.group);
13326 matcher.priority = MLX5_PRIORITY_MAP_L2;
13327 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13328 MLX5_FLOW_LAYER_INNER_VLAN) :
13329 (MLX5_FLOW_LAYER_OUTER_L2 |
13330 MLX5_FLOW_LAYER_OUTER_VLAN);
13332 case RTE_FLOW_ITEM_TYPE_IPV4:
13333 mlx5_flow_tunnel_ip_check(items, next_protocol,
13334 &item_flags, &tunnel);
13335 flow_dv_translate_item_ipv4(match_mask, match_value,
13337 dev_flow->dv.group);
13338 matcher.priority = MLX5_PRIORITY_MAP_L3;
13339 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13340 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13341 if (items->mask != NULL &&
13342 ((const struct rte_flow_item_ipv4 *)
13343 items->mask)->hdr.next_proto_id) {
13345 ((const struct rte_flow_item_ipv4 *)
13346 (items->spec))->hdr.next_proto_id;
13348 ((const struct rte_flow_item_ipv4 *)
13349 (items->mask))->hdr.next_proto_id;
13351 /* Reset for inner layer. */
13352 next_protocol = 0xff;
13355 case RTE_FLOW_ITEM_TYPE_IPV6:
13356 mlx5_flow_tunnel_ip_check(items, next_protocol,
13357 &item_flags, &tunnel);
13358 flow_dv_translate_item_ipv6(match_mask, match_value,
13360 dev_flow->dv.group);
13361 matcher.priority = MLX5_PRIORITY_MAP_L3;
13362 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13363 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13364 if (items->mask != NULL &&
13365 ((const struct rte_flow_item_ipv6 *)
13366 items->mask)->hdr.proto) {
13368 ((const struct rte_flow_item_ipv6 *)
13369 items->spec)->hdr.proto;
13371 ((const struct rte_flow_item_ipv6 *)
13372 items->mask)->hdr.proto;
13374 /* Reset for inner layer. */
13375 next_protocol = 0xff;
13378 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13379 flow_dv_translate_item_ipv6_frag_ext(match_mask,
13382 last_item = tunnel ?
13383 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13384 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13385 if (items->mask != NULL &&
13386 ((const struct rte_flow_item_ipv6_frag_ext *)
13387 items->mask)->hdr.next_header) {
13389 ((const struct rte_flow_item_ipv6_frag_ext *)
13390 items->spec)->hdr.next_header;
13392 ((const struct rte_flow_item_ipv6_frag_ext *)
13393 items->mask)->hdr.next_header;
13395 /* Reset for inner layer. */
13396 next_protocol = 0xff;
13399 case RTE_FLOW_ITEM_TYPE_TCP:
13400 flow_dv_translate_item_tcp(match_mask, match_value,
13402 matcher.priority = MLX5_PRIORITY_MAP_L4;
13403 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13404 MLX5_FLOW_LAYER_OUTER_L4_TCP;
13406 case RTE_FLOW_ITEM_TYPE_UDP:
13407 flow_dv_translate_item_udp(match_mask, match_value,
13409 matcher.priority = MLX5_PRIORITY_MAP_L4;
13410 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13411 MLX5_FLOW_LAYER_OUTER_L4_UDP;
13413 case RTE_FLOW_ITEM_TYPE_GRE:
13414 flow_dv_translate_item_gre(match_mask, match_value,
13416 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13417 last_item = MLX5_FLOW_LAYER_GRE;
13419 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13420 flow_dv_translate_item_gre_key(match_mask,
13421 match_value, items);
13422 last_item = MLX5_FLOW_LAYER_GRE_KEY;
13424 case RTE_FLOW_ITEM_TYPE_NVGRE:
13425 flow_dv_translate_item_nvgre(match_mask, match_value,
13427 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13428 last_item = MLX5_FLOW_LAYER_GRE;
13430 case RTE_FLOW_ITEM_TYPE_VXLAN:
13431 flow_dv_translate_item_vxlan(dev, attr,
13432 match_mask, match_value,
13434 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13435 last_item = MLX5_FLOW_LAYER_VXLAN;
13437 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13438 flow_dv_translate_item_vxlan_gpe(match_mask,
13439 match_value, items,
13441 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13442 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13444 case RTE_FLOW_ITEM_TYPE_GENEVE:
13445 flow_dv_translate_item_geneve(match_mask, match_value,
13447 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13448 last_item = MLX5_FLOW_LAYER_GENEVE;
13450 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13451 ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13455 return rte_flow_error_set(error, -ret,
13456 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13457 "cannot create GENEVE TLV option");
13458 flow->geneve_tlv_option = 1;
13459 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13461 case RTE_FLOW_ITEM_TYPE_MPLS:
13462 flow_dv_translate_item_mpls(match_mask, match_value,
13463 items, last_item, tunnel);
13464 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13465 last_item = MLX5_FLOW_LAYER_MPLS;
13467 case RTE_FLOW_ITEM_TYPE_MARK:
13468 flow_dv_translate_item_mark(dev, match_mask,
13469 match_value, items);
13470 last_item = MLX5_FLOW_ITEM_MARK;
13472 case RTE_FLOW_ITEM_TYPE_META:
13473 flow_dv_translate_item_meta(dev, match_mask,
13474 match_value, attr, items);
13475 last_item = MLX5_FLOW_ITEM_METADATA;
13477 case RTE_FLOW_ITEM_TYPE_ICMP:
13478 flow_dv_translate_item_icmp(match_mask, match_value,
13480 last_item = MLX5_FLOW_LAYER_ICMP;
13482 case RTE_FLOW_ITEM_TYPE_ICMP6:
13483 flow_dv_translate_item_icmp6(match_mask, match_value,
13485 last_item = MLX5_FLOW_LAYER_ICMP6;
13487 case RTE_FLOW_ITEM_TYPE_TAG:
13488 flow_dv_translate_item_tag(dev, match_mask,
13489 match_value, items);
13490 last_item = MLX5_FLOW_ITEM_TAG;
13492 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13493 flow_dv_translate_mlx5_item_tag(dev, match_mask,
13494 match_value, items);
13495 last_item = MLX5_FLOW_ITEM_TAG;
13497 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13498 flow_dv_translate_item_tx_queue(dev, match_mask,
13501 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13503 case RTE_FLOW_ITEM_TYPE_GTP:
13504 flow_dv_translate_item_gtp(match_mask, match_value,
13506 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13507 last_item = MLX5_FLOW_LAYER_GTP;
13509 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13510 ret = flow_dv_translate_item_gtp_psc(match_mask,
13514 return rte_flow_error_set(error, -ret,
13515 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13516 "cannot create GTP PSC item");
13517 last_item = MLX5_FLOW_LAYER_GTP_PSC;
13519 case RTE_FLOW_ITEM_TYPE_ECPRI:
13520 if (!mlx5_flex_parser_ecpri_exist(dev)) {
13521 /* Create it only the first time to be used. */
13522 ret = mlx5_flex_parser_ecpri_alloc(dev);
13524 return rte_flow_error_set
13526 RTE_FLOW_ERROR_TYPE_ITEM,
13528 "cannot create eCPRI parser");
13530 flow_dv_translate_item_ecpri(dev, match_mask,
13531 match_value, items,
13533 /* No other protocol should follow eCPRI layer. */
13534 last_item = MLX5_FLOW_LAYER_ECPRI;
13536 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13537 flow_dv_translate_item_integrity(items, integrity_items,
13540 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13541 flow_dv_translate_item_aso_ct(dev, match_mask,
13542 match_value, items);
13544 case RTE_FLOW_ITEM_TYPE_FLEX:
13545 flow_dv_translate_item_flex(dev, match_mask,
13546 match_value, items,
13547 dev_flow, tunnel != 0);
13548 last_item = tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
13549 MLX5_FLOW_ITEM_OUTER_FLEX;
13554 item_flags |= last_item;
13557 * When E-Switch mode is enabled, we have two cases where we need to
13558 * set the source port manually.
13559 * The first one, is in case of Nic steering rule, and the second is
13560 * E-Switch rule where no port_id item was found. In both cases
13561 * the source port is set according the current port in use.
13563 if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13564 (priv->representor || priv->master)) {
13565 if (flow_dv_translate_item_port_id(dev, match_mask,
13566 match_value, NULL, attr))
13569 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13570 flow_dv_translate_item_integrity_post(match_mask, match_value,
13574 #ifdef RTE_LIBRTE_MLX5_DEBUG
13575 MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13576 dev_flow->dv.value.buf));
13579 * Layers may be already initialized from prefix flow if this dev_flow
13580 * is the suffix flow.
13582 handle->layers |= item_flags;
13583 if (action_flags & MLX5_FLOW_ACTION_RSS)
13584 flow_dv_hashfields_set(dev_flow, rss_desc);
13585 /* If has RSS action in the sample action, the Sample/Mirror resource
13586 * should be registered after the hash filed be update.
13588 if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13589 ret = flow_dv_translate_action_sample(dev,
13598 ret = flow_dv_create_action_sample(dev,
13607 return rte_flow_error_set
13609 RTE_FLOW_ERROR_TYPE_ACTION,
13611 "cannot create sample action");
13612 if (num_of_dest > 1) {
13613 dev_flow->dv.actions[sample_act_pos] =
13614 dev_flow->dv.dest_array_res->action;
13616 dev_flow->dv.actions[sample_act_pos] =
13617 dev_flow->dv.sample_res->verbs_action;
13621 * For multiple destination (sample action with ratio=1), the encap
13622 * action and port id action will be combined into group action.
13623 * So need remove the original these actions in the flow and only
13624 * use the sample action instead of.
13626 if (num_of_dest > 1 &&
13627 (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13629 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13631 for (i = 0; i < actions_n; i++) {
13632 if ((sample_act->dr_encap_action &&
13633 sample_act->dr_encap_action ==
13634 dev_flow->dv.actions[i]) ||
13635 (sample_act->dr_port_id_action &&
13636 sample_act->dr_port_id_action ==
13637 dev_flow->dv.actions[i]) ||
13638 (sample_act->dr_jump_action &&
13639 sample_act->dr_jump_action ==
13640 dev_flow->dv.actions[i]))
13642 temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13644 memcpy((void *)dev_flow->dv.actions,
13645 (void *)temp_actions,
13646 tmp_actions_n * sizeof(void *));
13647 actions_n = tmp_actions_n;
13649 dev_flow->dv.actions_n = actions_n;
13650 dev_flow->act_flags = action_flags;
13651 if (wks->skip_matcher_reg)
13653 /* Register matcher. */
13654 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13655 matcher.mask.size);
13656 matcher.priority = mlx5_get_matcher_priority(dev, attr,
13658 dev_flow->external);
13660 * When creating meter drop flow in drop table, using original
13661 * 5-tuple match, the matcher priority should be lower than
13664 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13665 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13666 matcher.priority <= MLX5_REG_BITS)
13667 matcher.priority += MLX5_REG_BITS;
13668 /* reserved field no needs to be set to 0 here. */
13669 tbl_key.is_fdb = attr->transfer;
13670 tbl_key.is_egress = attr->egress;
13671 tbl_key.level = dev_flow->dv.group;
13672 tbl_key.id = dev_flow->dv.table_id;
13673 if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13674 tunnel, attr->group, error))
13680 * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13683 * @param[in, out] action
13684 * Shred RSS action holding hash RX queue objects.
13685 * @param[in] hash_fields
13686 * Defines combination of packet fields to participate in RX hash.
13687 * @param[in] tunnel
13689 * @param[in] hrxq_idx
13690 * Hash RX queue index to set.
13693 * 0 on success, otherwise negative errno value.
13696 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13697 const uint64_t hash_fields,
13700 uint32_t *hrxqs = action->hrxq;
13702 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13703 case MLX5_RSS_HASH_IPV4:
13704 /* fall-through. */
13705 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13706 /* fall-through. */
13707 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13708 hrxqs[0] = hrxq_idx;
13710 case MLX5_RSS_HASH_IPV4_TCP:
13711 /* fall-through. */
13712 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13713 /* fall-through. */
13714 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13715 hrxqs[1] = hrxq_idx;
13717 case MLX5_RSS_HASH_IPV4_UDP:
13718 /* fall-through. */
13719 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13720 /* fall-through. */
13721 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13722 hrxqs[2] = hrxq_idx;
13724 case MLX5_RSS_HASH_IPV6:
13725 /* fall-through. */
13726 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13727 /* fall-through. */
13728 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13729 hrxqs[3] = hrxq_idx;
13731 case MLX5_RSS_HASH_IPV6_TCP:
13732 /* fall-through. */
13733 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13734 /* fall-through. */
13735 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13736 hrxqs[4] = hrxq_idx;
13738 case MLX5_RSS_HASH_IPV6_UDP:
13739 /* fall-through. */
13740 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13741 /* fall-through. */
13742 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13743 hrxqs[5] = hrxq_idx;
13745 case MLX5_RSS_HASH_NONE:
13746 hrxqs[6] = hrxq_idx;
13754 * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13758 * Pointer to the Ethernet device structure.
13760 * Shared RSS action ID holding hash RX queue objects.
13761 * @param[in] hash_fields
13762 * Defines combination of packet fields to participate in RX hash.
13763 * @param[in] tunnel
13767 * Valid hash RX queue index, otherwise 0.
13770 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13771 const uint64_t hash_fields)
13773 struct mlx5_priv *priv = dev->data->dev_private;
13774 struct mlx5_shared_action_rss *shared_rss =
13775 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13776 const uint32_t *hrxqs = shared_rss->hrxq;
13778 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13779 case MLX5_RSS_HASH_IPV4:
13780 /* fall-through. */
13781 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13782 /* fall-through. */
13783 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13785 case MLX5_RSS_HASH_IPV4_TCP:
13786 /* fall-through. */
13787 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13788 /* fall-through. */
13789 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13791 case MLX5_RSS_HASH_IPV4_UDP:
13792 /* fall-through. */
13793 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13794 /* fall-through. */
13795 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13797 case MLX5_RSS_HASH_IPV6:
13798 /* fall-through. */
13799 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13800 /* fall-through. */
13801 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13803 case MLX5_RSS_HASH_IPV6_TCP:
13804 /* fall-through. */
13805 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13806 /* fall-through. */
13807 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13809 case MLX5_RSS_HASH_IPV6_UDP:
13810 /* fall-through. */
13811 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13812 /* fall-through. */
13813 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13815 case MLX5_RSS_HASH_NONE:
13824 * Apply the flow to the NIC, lock free,
13825 * (mutex should be acquired by caller).
13828 * Pointer to the Ethernet device structure.
13829 * @param[in, out] flow
13830 * Pointer to flow structure.
13831 * @param[out] error
13832 * Pointer to error structure.
13835 * 0 on success, a negative errno value otherwise and rte_errno is set.
13838 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13839 struct rte_flow_error *error)
13841 struct mlx5_flow_dv_workspace *dv;
13842 struct mlx5_flow_handle *dh;
13843 struct mlx5_flow_handle_dv *dv_h;
13844 struct mlx5_flow *dev_flow;
13845 struct mlx5_priv *priv = dev->data->dev_private;
13846 uint32_t handle_idx;
13850 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13851 struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13855 for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13856 dev_flow = &wks->flows[idx];
13857 dv = &dev_flow->dv;
13858 dh = dev_flow->handle;
13861 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13862 if (dv->transfer) {
13863 MLX5_ASSERT(priv->sh->dr_drop_action);
13864 dv->actions[n++] = priv->sh->dr_drop_action;
13866 #ifdef HAVE_MLX5DV_DR
13867 /* DR supports drop action placeholder. */
13868 MLX5_ASSERT(priv->sh->dr_drop_action);
13869 dv->actions[n++] = dv->group ?
13870 priv->sh->dr_drop_action :
13871 priv->root_drop_action;
13873 /* For DV we use the explicit drop queue. */
13874 MLX5_ASSERT(priv->drop_queue.hrxq);
13876 priv->drop_queue.hrxq->action;
13879 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13880 !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13881 struct mlx5_hrxq *hrxq;
13884 hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13889 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13890 "cannot get hash queue");
13893 dh->rix_hrxq = hrxq_idx;
13894 dv->actions[n++] = hrxq->action;
13895 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13896 struct mlx5_hrxq *hrxq = NULL;
13899 hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13900 rss_desc->shared_rss,
13901 dev_flow->hash_fields);
13903 hrxq = mlx5_ipool_get
13904 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13909 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13910 "cannot get hash queue");
13913 dh->rix_srss = rss_desc->shared_rss;
13914 dv->actions[n++] = hrxq->action;
13915 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13916 if (!priv->sh->default_miss_action) {
13919 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13920 "default miss action not be created.");
13923 dv->actions[n++] = priv->sh->default_miss_action;
13925 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13926 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13927 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13928 (void *)&dv->value, n,
13929 dv->actions, &dh->drv_flow);
13933 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13935 (!priv->config.allow_duplicate_pattern &&
13937 "duplicating pattern is not allowed" :
13938 "hardware refuses to create flow");
13941 if (priv->vmwa_context &&
13942 dh->vf_vlan.tag && !dh->vf_vlan.created) {
13944 * The rule contains the VLAN pattern.
13945 * For VF we are going to create VLAN
13946 * interface to make hypervisor set correct
13947 * e-Switch vport context.
13949 mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13954 err = rte_errno; /* Save rte_errno before cleanup. */
13955 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13956 handle_idx, dh, next) {
13957 /* hrxq is union, don't clear it if the flag is not set. */
13958 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13959 mlx5_hrxq_release(dev, dh->rix_hrxq);
13961 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13964 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13965 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13967 rte_errno = err; /* Restore rte_errno. */
13972 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13973 struct mlx5_list_entry *entry)
13975 struct mlx5_flow_dv_matcher *resource = container_of(entry,
13979 claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13980 mlx5_free(resource);
13984 * Release the flow matcher.
13987 * Pointer to Ethernet device.
13989 * Index to port ID action resource.
13992 * 1 while a reference on it exists, 0 when freed.
13995 flow_dv_matcher_release(struct rte_eth_dev *dev,
13996 struct mlx5_flow_handle *handle)
13998 struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13999 struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
14000 typeof(*tbl), tbl);
14003 MLX5_ASSERT(matcher->matcher_object);
14004 ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
14005 flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
14010 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14012 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14013 struct mlx5_flow_dv_encap_decap_resource *res =
14014 container_of(entry, typeof(*res), entry);
14016 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14017 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
14021 * Release an encap/decap resource.
14024 * Pointer to Ethernet device.
14025 * @param encap_decap_idx
14026 * Index of encap decap resource.
14029 * 1 while a reference on it exists, 0 when freed.
14032 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
14033 uint32_t encap_decap_idx)
14035 struct mlx5_priv *priv = dev->data->dev_private;
14036 struct mlx5_flow_dv_encap_decap_resource *resource;
14038 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
14042 MLX5_ASSERT(resource->action);
14043 return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
14047 * Release an jump to table action resource.
14050 * Pointer to Ethernet device.
14052 * Index to the jump action resource.
14055 * 1 while a reference on it exists, 0 when freed.
14058 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
14061 struct mlx5_priv *priv = dev->data->dev_private;
14062 struct mlx5_flow_tbl_data_entry *tbl_data;
14064 tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
14068 return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14072 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14074 struct mlx5_flow_dv_modify_hdr_resource *res =
14075 container_of(entry, typeof(*res), entry);
14076 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14078 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14079 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14083 * Release a modify-header resource.
14086 * Pointer to Ethernet device.
14088 * Pointer to mlx5_flow_handle.
14091 * 1 while a reference on it exists, 0 when freed.
14094 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14095 struct mlx5_flow_handle *handle)
14097 struct mlx5_priv *priv = dev->data->dev_private;
14098 struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14100 MLX5_ASSERT(entry->action);
14101 return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14105 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14107 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14108 struct mlx5_flow_dv_port_id_action_resource *resource =
14109 container_of(entry, typeof(*resource), entry);
14111 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14112 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14116 * Release port ID action resource.
14119 * Pointer to Ethernet device.
14121 * Pointer to mlx5_flow_handle.
14124 * 1 while a reference on it exists, 0 when freed.
14127 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14130 struct mlx5_priv *priv = dev->data->dev_private;
14131 struct mlx5_flow_dv_port_id_action_resource *resource;
14133 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14136 MLX5_ASSERT(resource->action);
14137 return mlx5_list_unregister(priv->sh->port_id_action_list,
14142 * Release shared RSS action resource.
14145 * Pointer to Ethernet device.
14147 * Shared RSS action index.
14150 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14152 struct mlx5_priv *priv = dev->data->dev_private;
14153 struct mlx5_shared_action_rss *shared_rss;
14155 shared_rss = mlx5_ipool_get
14156 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14157 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14161 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14163 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14164 struct mlx5_flow_dv_push_vlan_action_resource *resource =
14165 container_of(entry, typeof(*resource), entry);
14167 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14168 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14172 * Release push vlan action resource.
14175 * Pointer to Ethernet device.
14177 * Pointer to mlx5_flow_handle.
14180 * 1 while a reference on it exists, 0 when freed.
14183 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14184 struct mlx5_flow_handle *handle)
14186 struct mlx5_priv *priv = dev->data->dev_private;
14187 struct mlx5_flow_dv_push_vlan_action_resource *resource;
14188 uint32_t idx = handle->dvh.rix_push_vlan;
14190 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14193 MLX5_ASSERT(resource->action);
14194 return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14199 * Release the fate resource.
14202 * Pointer to Ethernet device.
14204 * Pointer to mlx5_flow_handle.
14207 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14208 struct mlx5_flow_handle *handle)
14210 if (!handle->rix_fate)
14212 switch (handle->fate_action) {
14213 case MLX5_FLOW_FATE_QUEUE:
14214 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14215 mlx5_hrxq_release(dev, handle->rix_hrxq);
14217 case MLX5_FLOW_FATE_JUMP:
14218 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14220 case MLX5_FLOW_FATE_PORT_ID:
14221 flow_dv_port_id_action_resource_release(dev,
14222 handle->rix_port_id_action);
14225 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14228 handle->rix_fate = 0;
14232 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14233 struct mlx5_list_entry *entry)
14235 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14238 struct rte_eth_dev *dev = resource->dev;
14239 struct mlx5_priv *priv = dev->data->dev_private;
14241 if (resource->verbs_action)
14242 claim_zero(mlx5_flow_os_destroy_flow_action
14243 (resource->verbs_action));
14244 if (resource->normal_path_tbl)
14245 flow_dv_tbl_resource_release(MLX5_SH(dev),
14246 resource->normal_path_tbl);
14247 flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14248 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14249 DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14253 * Release an sample resource.
14256 * Pointer to Ethernet device.
14258 * Pointer to mlx5_flow_handle.
14261 * 1 while a reference on it exists, 0 when freed.
14264 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14265 struct mlx5_flow_handle *handle)
14267 struct mlx5_priv *priv = dev->data->dev_private;
14268 struct mlx5_flow_dv_sample_resource *resource;
14270 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14271 handle->dvh.rix_sample);
14274 MLX5_ASSERT(resource->verbs_action);
14275 return mlx5_list_unregister(priv->sh->sample_action_list,
14280 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14281 struct mlx5_list_entry *entry)
14283 struct mlx5_flow_dv_dest_array_resource *resource =
14284 container_of(entry, typeof(*resource), entry);
14285 struct rte_eth_dev *dev = resource->dev;
14286 struct mlx5_priv *priv = dev->data->dev_private;
14289 MLX5_ASSERT(resource->action);
14290 if (resource->action)
14291 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14292 for (; i < resource->num_of_dest; i++)
14293 flow_dv_sample_sub_actions_release(dev,
14294 &resource->sample_idx[i]);
14295 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14296 DRV_LOG(DEBUG, "destination array resource %p: removed",
14301 * Release an destination array resource.
14304 * Pointer to Ethernet device.
14306 * Pointer to mlx5_flow_handle.
14309 * 1 while a reference on it exists, 0 when freed.
14312 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14313 struct mlx5_flow_handle *handle)
14315 struct mlx5_priv *priv = dev->data->dev_private;
14316 struct mlx5_flow_dv_dest_array_resource *resource;
14318 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14319 handle->dvh.rix_dest_array);
14322 MLX5_ASSERT(resource->action);
14323 return mlx5_list_unregister(priv->sh->dest_array_list,
14328 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14330 struct mlx5_priv *priv = dev->data->dev_private;
14331 struct mlx5_dev_ctx_shared *sh = priv->sh;
14332 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14333 sh->geneve_tlv_option_resource;
14334 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14335 if (geneve_opt_resource) {
14336 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14337 __ATOMIC_RELAXED))) {
14338 claim_zero(mlx5_devx_cmd_destroy
14339 (geneve_opt_resource->obj));
14340 mlx5_free(sh->geneve_tlv_option_resource);
14341 sh->geneve_tlv_option_resource = NULL;
14344 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14348 * Remove the flow from the NIC but keeps it in memory.
14349 * Lock free, (mutex should be acquired by caller).
14352 * Pointer to Ethernet device.
14353 * @param[in, out] flow
14354 * Pointer to flow structure.
14357 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14359 struct mlx5_flow_handle *dh;
14360 uint32_t handle_idx;
14361 struct mlx5_priv *priv = dev->data->dev_private;
14365 handle_idx = flow->dev_handles;
14366 while (handle_idx) {
14367 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14371 if (dh->drv_flow) {
14372 claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14373 dh->drv_flow = NULL;
14375 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14376 flow_dv_fate_resource_release(dev, dh);
14377 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14378 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14379 handle_idx = dh->next.next;
14384 * Remove the flow from the NIC and the memory.
14385 * Lock free, (mutex should be acquired by caller).
14388 * Pointer to the Ethernet device structure.
14389 * @param[in, out] flow
14390 * Pointer to flow structure.
14393 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14395 struct mlx5_flow_handle *dev_handle;
14396 struct mlx5_priv *priv = dev->data->dev_private;
14397 struct mlx5_flow_meter_info *fm = NULL;
14402 flow_dv_remove(dev, flow);
14403 if (flow->counter) {
14404 flow_dv_counter_free(dev, flow->counter);
14408 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14410 mlx5_flow_meter_detach(priv, fm);
14413 /* Keep the current age handling by default. */
14414 if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14415 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14416 else if (flow->age)
14417 flow_dv_aso_age_release(dev, flow->age);
14418 if (flow->geneve_tlv_option) {
14419 flow_dv_geneve_tlv_option_resource_release(dev);
14420 flow->geneve_tlv_option = 0;
14422 while (flow->dev_handles) {
14423 uint32_t tmp_idx = flow->dev_handles;
14425 dev_handle = mlx5_ipool_get(priv->sh->ipool
14426 [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14429 flow->dev_handles = dev_handle->next.next;
14430 while (dev_handle->flex_item) {
14431 int index = rte_bsf32(dev_handle->flex_item);
14433 mlx5_flex_release_index(dev, index);
14434 dev_handle->flex_item &= ~RTE_BIT32(index);
14436 if (dev_handle->dvh.matcher)
14437 flow_dv_matcher_release(dev, dev_handle);
14438 if (dev_handle->dvh.rix_sample)
14439 flow_dv_sample_resource_release(dev, dev_handle);
14440 if (dev_handle->dvh.rix_dest_array)
14441 flow_dv_dest_array_resource_release(dev, dev_handle);
14442 if (dev_handle->dvh.rix_encap_decap)
14443 flow_dv_encap_decap_resource_release(dev,
14444 dev_handle->dvh.rix_encap_decap);
14445 if (dev_handle->dvh.modify_hdr)
14446 flow_dv_modify_hdr_resource_release(dev, dev_handle);
14447 if (dev_handle->dvh.rix_push_vlan)
14448 flow_dv_push_vlan_action_resource_release(dev,
14450 if (dev_handle->dvh.rix_tag)
14451 flow_dv_tag_release(dev,
14452 dev_handle->dvh.rix_tag);
14453 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14454 flow_dv_fate_resource_release(dev, dev_handle);
14456 srss = dev_handle->rix_srss;
14457 if (fm && dev_handle->is_meter_flow_id &&
14458 dev_handle->split_flow_id)
14459 mlx5_ipool_free(fm->flow_ipool,
14460 dev_handle->split_flow_id);
14461 else if (dev_handle->split_flow_id &&
14462 !dev_handle->is_meter_flow_id)
14463 mlx5_ipool_free(priv->sh->ipool
14464 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14465 dev_handle->split_flow_id);
14466 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14470 flow_dv_shared_rss_action_release(dev, srss);
14474 * Release array of hash RX queue objects.
14478 * Pointer to the Ethernet device structure.
14479 * @param[in, out] hrxqs
14480 * Array of hash RX queue objects.
14483 * Total number of references to hash RX queue objects in *hrxqs* array
14484 * after this operation.
14487 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14488 uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14493 for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14494 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14504 * Release all hash RX queue objects representing shared RSS action.
14507 * Pointer to the Ethernet device structure.
14508 * @param[in, out] action
14509 * Shared RSS action to remove hash RX queue objects from.
14512 * Total number of references to hash RX queue objects stored in *action*
14513 * after this operation.
14514 * Expected to be 0 if no external references held.
14517 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14518 struct mlx5_shared_action_rss *shared_rss)
14520 return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14524 * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14527 * Only one hash value is available for one L3+L4 combination:
14529 * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14530 * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14531 * same slot in mlx5_rss_hash_fields.
14534 * Pointer to the shared action RSS conf.
14535 * @param[in, out] hash_field
14536 * hash_field variable needed to be adjusted.
14542 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14543 uint64_t *hash_field)
14545 uint64_t rss_types = rss->origin.types;
14547 switch (*hash_field & ~IBV_RX_HASH_INNER) {
14548 case MLX5_RSS_HASH_IPV4:
14549 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14550 *hash_field &= ~MLX5_RSS_HASH_IPV4;
14551 if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14552 *hash_field |= IBV_RX_HASH_DST_IPV4;
14553 else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14554 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14556 *hash_field |= MLX5_RSS_HASH_IPV4;
14559 case MLX5_RSS_HASH_IPV6:
14560 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14561 *hash_field &= ~MLX5_RSS_HASH_IPV6;
14562 if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14563 *hash_field |= IBV_RX_HASH_DST_IPV6;
14564 else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14565 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14567 *hash_field |= MLX5_RSS_HASH_IPV6;
14570 case MLX5_RSS_HASH_IPV4_UDP:
14571 /* fall-through. */
14572 case MLX5_RSS_HASH_IPV6_UDP:
14573 if (rss_types & RTE_ETH_RSS_UDP) {
14574 *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14575 if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14576 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14577 else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14578 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14580 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14583 case MLX5_RSS_HASH_IPV4_TCP:
14584 /* fall-through. */
14585 case MLX5_RSS_HASH_IPV6_TCP:
14586 if (rss_types & RTE_ETH_RSS_TCP) {
14587 *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14588 if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14589 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14590 else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14591 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14593 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14602 * Setup shared RSS action.
14603 * Prepare set of hash RX queue objects sufficient to handle all valid
14604 * hash_fields combinations (see enum ibv_rx_hash_fields).
14607 * Pointer to the Ethernet device structure.
14608 * @param[in] action_idx
14609 * Shared RSS action ipool index.
14610 * @param[in, out] action
14611 * Partially initialized shared RSS action.
14612 * @param[out] error
14613 * Perform verbose error reporting if not NULL. Initialized in case of
14617 * 0 on success, otherwise negative errno value.
14620 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14621 uint32_t action_idx,
14622 struct mlx5_shared_action_rss *shared_rss,
14623 struct rte_flow_error *error)
14625 struct mlx5_flow_rss_desc rss_desc = { 0 };
14629 if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14630 return rte_flow_error_set(error, rte_errno,
14631 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14632 "cannot setup indirection table");
14634 memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14635 rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14636 rss_desc.const_q = shared_rss->origin.queue;
14637 rss_desc.queue_num = shared_rss->origin.queue_num;
14638 /* Set non-zero value to indicate a shared RSS. */
14639 rss_desc.shared_rss = action_idx;
14640 rss_desc.ind_tbl = shared_rss->ind_tbl;
14641 for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14643 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14646 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14647 if (shared_rss->origin.level > 1) {
14648 hash_fields |= IBV_RX_HASH_INNER;
14651 rss_desc.tunnel = tunnel;
14652 rss_desc.hash_fields = hash_fields;
14653 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14657 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14658 "cannot get hash queue");
14659 goto error_hrxq_new;
14661 err = __flow_dv_action_rss_hrxq_set
14662 (shared_rss, hash_fields, hrxq_idx);
14668 __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14669 if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14670 shared_rss->ind_tbl = NULL;
14676 * Create shared RSS action.
14679 * Pointer to the Ethernet device structure.
14681 * Shared action configuration.
14683 * RSS action specification used to create shared action.
14684 * @param[out] error
14685 * Perform verbose error reporting if not NULL. Initialized in case of
14689 * A valid shared action ID in case of success, 0 otherwise and
14690 * rte_errno is set.
14693 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14694 const struct rte_flow_indir_action_conf *conf,
14695 const struct rte_flow_action_rss *rss,
14696 struct rte_flow_error *error)
14698 struct mlx5_priv *priv = dev->data->dev_private;
14699 struct mlx5_shared_action_rss *shared_rss = NULL;
14700 void *queue = NULL;
14701 struct rte_flow_action_rss *origin;
14702 const uint8_t *rss_key;
14703 uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14706 RTE_SET_USED(conf);
14707 queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14709 shared_rss = mlx5_ipool_zmalloc
14710 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14711 if (!shared_rss || !queue) {
14712 rte_flow_error_set(error, ENOMEM,
14713 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14714 "cannot allocate resource memory");
14715 goto error_rss_init;
14717 if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14718 rte_flow_error_set(error, E2BIG,
14719 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14720 "rss action number out of range");
14721 goto error_rss_init;
14723 shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14724 sizeof(*shared_rss->ind_tbl),
14726 if (!shared_rss->ind_tbl) {
14727 rte_flow_error_set(error, ENOMEM,
14728 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14729 "cannot allocate resource memory");
14730 goto error_rss_init;
14732 memcpy(queue, rss->queue, queue_size);
14733 shared_rss->ind_tbl->queues = queue;
14734 shared_rss->ind_tbl->queues_n = rss->queue_num;
14735 origin = &shared_rss->origin;
14736 origin->func = rss->func;
14737 origin->level = rss->level;
14738 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14739 origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14740 /* NULL RSS key indicates default RSS key. */
14741 rss_key = !rss->key ? rss_hash_default_key : rss->key;
14742 memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14743 origin->key = &shared_rss->key[0];
14744 origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14745 origin->queue = queue;
14746 origin->queue_num = rss->queue_num;
14747 if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14748 goto error_rss_init;
14749 rte_spinlock_init(&shared_rss->action_rss_sl);
14750 __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14751 rte_spinlock_lock(&priv->shared_act_sl);
14752 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14753 &priv->rss_shared_actions, idx, shared_rss, next);
14754 rte_spinlock_unlock(&priv->shared_act_sl);
14758 if (shared_rss->ind_tbl)
14759 mlx5_free(shared_rss->ind_tbl);
14760 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14769 * Destroy the shared RSS action.
14770 * Release related hash RX queue objects.
14773 * Pointer to the Ethernet device structure.
14775 * The shared RSS action object ID to be removed.
14776 * @param[out] error
14777 * Perform verbose error reporting if not NULL. Initialized in case of
14781 * 0 on success, otherwise negative errno value.
14784 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14785 struct rte_flow_error *error)
14787 struct mlx5_priv *priv = dev->data->dev_private;
14788 struct mlx5_shared_action_rss *shared_rss =
14789 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14790 uint32_t old_refcnt = 1;
14792 uint16_t *queue = NULL;
14795 return rte_flow_error_set(error, EINVAL,
14796 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14797 "invalid shared action");
14798 if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14799 0, 0, __ATOMIC_ACQUIRE,
14801 return rte_flow_error_set(error, EBUSY,
14802 RTE_FLOW_ERROR_TYPE_ACTION,
14804 "shared rss has references");
14805 remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14807 return rte_flow_error_set(error, EBUSY,
14808 RTE_FLOW_ERROR_TYPE_ACTION,
14810 "shared rss hrxq has references");
14811 queue = shared_rss->ind_tbl->queues;
14812 remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14814 return rte_flow_error_set(error, EBUSY,
14815 RTE_FLOW_ERROR_TYPE_ACTION,
14817 "shared rss indirection table has"
14820 rte_spinlock_lock(&priv->shared_act_sl);
14821 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14822 &priv->rss_shared_actions, idx, shared_rss, next);
14823 rte_spinlock_unlock(&priv->shared_act_sl);
14824 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14830 * Create indirect action, lock free,
14831 * (mutex should be acquired by caller).
14832 * Dispatcher for action type specific call.
14835 * Pointer to the Ethernet device structure.
14837 * Shared action configuration.
14838 * @param[in] action
14839 * Action specification used to create indirect action.
14840 * @param[out] error
14841 * Perform verbose error reporting if not NULL. Initialized in case of
14845 * A valid shared action handle in case of success, NULL otherwise and
14846 * rte_errno is set.
14848 static struct rte_flow_action_handle *
14849 flow_dv_action_create(struct rte_eth_dev *dev,
14850 const struct rte_flow_indir_action_conf *conf,
14851 const struct rte_flow_action *action,
14852 struct rte_flow_error *err)
14854 struct mlx5_priv *priv = dev->data->dev_private;
14855 uint32_t age_idx = 0;
14859 switch (action->type) {
14860 case RTE_FLOW_ACTION_TYPE_RSS:
14861 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14862 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14863 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14865 case RTE_FLOW_ACTION_TYPE_AGE:
14866 age_idx = flow_dv_aso_age_alloc(dev, err);
14871 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14872 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14873 flow_dv_aso_age_params_init(dev, age_idx,
14874 ((const struct rte_flow_action_age *)
14875 action->conf)->context ?
14876 ((const struct rte_flow_action_age *)
14877 action->conf)->context :
14878 (void *)(uintptr_t)idx,
14879 ((const struct rte_flow_action_age *)
14880 action->conf)->timeout);
14883 case RTE_FLOW_ACTION_TYPE_COUNT:
14884 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14885 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14886 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14888 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14889 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14891 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14894 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14895 NULL, "action type not supported");
14898 return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14902 * Destroy the indirect action.
14903 * Release action related resources on the NIC and the memory.
14904 * Lock free, (mutex should be acquired by caller).
14905 * Dispatcher for action type specific call.
14908 * Pointer to the Ethernet device structure.
14909 * @param[in] handle
14910 * The indirect action object handle to be removed.
14911 * @param[out] error
14912 * Perform verbose error reporting if not NULL. Initialized in case of
14916 * 0 on success, otherwise negative errno value.
14919 flow_dv_action_destroy(struct rte_eth_dev *dev,
14920 struct rte_flow_action_handle *handle,
14921 struct rte_flow_error *error)
14923 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14924 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14925 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14926 struct mlx5_flow_counter *cnt;
14927 uint32_t no_flow_refcnt = 1;
14931 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14932 return __flow_dv_action_rss_release(dev, idx, error);
14933 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14934 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14935 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14936 &no_flow_refcnt, 1, false,
14939 return rte_flow_error_set(error, EBUSY,
14940 RTE_FLOW_ERROR_TYPE_ACTION,
14942 "Indirect count action has references");
14943 flow_dv_counter_free(dev, idx);
14945 case MLX5_INDIRECT_ACTION_TYPE_AGE:
14946 ret = flow_dv_aso_age_release(dev, idx);
14949 * In this case, the last flow has a reference will
14950 * actually release the age action.
14952 DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14953 " released with references %d.", idx, ret);
14955 case MLX5_INDIRECT_ACTION_TYPE_CT:
14956 ret = flow_dv_aso_ct_release(dev, idx, error);
14960 DRV_LOG(DEBUG, "Connection tracking object %u still "
14961 "has references %d.", idx, ret);
14964 return rte_flow_error_set(error, ENOTSUP,
14965 RTE_FLOW_ERROR_TYPE_ACTION,
14967 "action type not supported");
14972 * Updates in place shared RSS action configuration.
14975 * Pointer to the Ethernet device structure.
14977 * The shared RSS action object ID to be updated.
14978 * @param[in] action_conf
14979 * RSS action specification used to modify *shared_rss*.
14980 * @param[out] error
14981 * Perform verbose error reporting if not NULL. Initialized in case of
14985 * 0 on success, otherwise negative errno value.
14986 * @note: currently only support update of RSS queues.
14989 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14990 const struct rte_flow_action_rss *action_conf,
14991 struct rte_flow_error *error)
14993 struct mlx5_priv *priv = dev->data->dev_private;
14994 struct mlx5_shared_action_rss *shared_rss =
14995 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14997 void *queue = NULL;
14998 uint16_t *queue_old = NULL;
14999 uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
15002 return rte_flow_error_set(error, EINVAL,
15003 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15004 "invalid shared action to update");
15005 if (priv->obj_ops.ind_table_modify == NULL)
15006 return rte_flow_error_set(error, ENOTSUP,
15007 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15008 "cannot modify indirection table");
15009 queue = mlx5_malloc(MLX5_MEM_ZERO,
15010 RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
15013 return rte_flow_error_set(error, ENOMEM,
15014 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15016 "cannot allocate resource memory");
15017 memcpy(queue, action_conf->queue, queue_size);
15018 MLX5_ASSERT(shared_rss->ind_tbl);
15019 rte_spinlock_lock(&shared_rss->action_rss_sl);
15020 queue_old = shared_rss->ind_tbl->queues;
15021 ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
15022 queue, action_conf->queue_num, true);
15025 ret = rte_flow_error_set(error, rte_errno,
15026 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15027 "cannot update indirection table");
15029 mlx5_free(queue_old);
15030 shared_rss->origin.queue = queue;
15031 shared_rss->origin.queue_num = action_conf->queue_num;
15033 rte_spinlock_unlock(&shared_rss->action_rss_sl);
15038 * Updates in place conntrack context or direction.
15039 * Context update should be synchronized.
15042 * Pointer to the Ethernet device structure.
15044 * The conntrack object ID to be updated.
15045 * @param[in] update
15046 * Pointer to the structure of information to update.
15047 * @param[out] error
15048 * Perform verbose error reporting if not NULL. Initialized in case of
15052 * 0 on success, otherwise negative errno value.
15055 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
15056 const struct rte_flow_modify_conntrack *update,
15057 struct rte_flow_error *error)
15059 struct mlx5_priv *priv = dev->data->dev_private;
15060 struct mlx5_aso_ct_action *ct;
15061 const struct rte_flow_action_conntrack *new_prf;
15063 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15066 if (PORT_ID(priv) != owner)
15067 return rte_flow_error_set(error, EACCES,
15068 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15070 "CT object owned by another port");
15071 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15072 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15074 return rte_flow_error_set(error, ENOMEM,
15075 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15077 "CT object is inactive");
15078 new_prf = &update->new_ct;
15079 if (update->direction)
15080 ct->is_original = !!new_prf->is_original_dir;
15081 if (update->state) {
15082 /* Only validate the profile when it needs to be updated. */
15083 ret = mlx5_validate_action_ct(dev, new_prf, error);
15086 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15088 return rte_flow_error_set(error, EIO,
15089 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15091 "Failed to send CT context update WQE");
15092 /* Block until ready or a failure. */
15093 ret = mlx5_aso_ct_available(priv->sh, ct);
15095 rte_flow_error_set(error, rte_errno,
15096 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15098 "Timeout to get the CT update");
15104 * Updates in place shared action configuration, lock free,
15105 * (mutex should be acquired by caller).
15108 * Pointer to the Ethernet device structure.
15109 * @param[in] handle
15110 * The indirect action object handle to be updated.
15111 * @param[in] update
15112 * Action specification used to modify the action pointed by *handle*.
15113 * *update* could be of same type with the action pointed by the *handle*
15114 * handle argument, or some other structures like a wrapper, depending on
15115 * the indirect action type.
15116 * @param[out] error
15117 * Perform verbose error reporting if not NULL. Initialized in case of
15121 * 0 on success, otherwise negative errno value.
15124 flow_dv_action_update(struct rte_eth_dev *dev,
15125 struct rte_flow_action_handle *handle,
15126 const void *update,
15127 struct rte_flow_error *err)
15129 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15130 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15131 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15132 const void *action_conf;
15135 case MLX5_INDIRECT_ACTION_TYPE_RSS:
15136 action_conf = ((const struct rte_flow_action *)update)->conf;
15137 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15138 case MLX5_INDIRECT_ACTION_TYPE_CT:
15139 return __flow_dv_action_ct_update(dev, idx, update, err);
15141 return rte_flow_error_set(err, ENOTSUP,
15142 RTE_FLOW_ERROR_TYPE_ACTION,
15144 "action type update not supported");
15149 * Destroy the meter sub policy table rules.
15150 * Lock free, (mutex should be acquired by caller).
15153 * Pointer to Ethernet device.
15154 * @param[in] sub_policy
15155 * Pointer to meter sub policy table.
15158 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15159 struct mlx5_flow_meter_sub_policy *sub_policy)
15161 struct mlx5_priv *priv = dev->data->dev_private;
15162 struct mlx5_flow_tbl_data_entry *tbl;
15163 struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15164 struct mlx5_flow_meter_info *next_fm;
15165 struct mlx5_sub_policy_color_rule *color_rule;
15169 for (i = 0; i < RTE_COLORS; i++) {
15171 if (i == RTE_COLOR_GREEN && policy &&
15172 policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15173 next_fm = mlx5_flow_meter_find(priv,
15174 policy->act_cnt[i].next_mtr_id, NULL);
15175 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15177 claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15178 tbl = container_of(color_rule->matcher->tbl,
15179 typeof(*tbl), tbl);
15180 mlx5_list_unregister(tbl->matchers,
15181 &color_rule->matcher->entry);
15182 TAILQ_REMOVE(&sub_policy->color_rules[i],
15183 color_rule, next_port);
15184 mlx5_free(color_rule);
15186 mlx5_flow_meter_detach(priv, next_fm);
15189 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15190 if (sub_policy->rix_hrxq[i]) {
15191 if (policy && !policy->is_hierarchy)
15192 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15193 sub_policy->rix_hrxq[i] = 0;
15195 if (sub_policy->jump_tbl[i]) {
15196 flow_dv_tbl_resource_release(MLX5_SH(dev),
15197 sub_policy->jump_tbl[i]);
15198 sub_policy->jump_tbl[i] = NULL;
15201 if (sub_policy->tbl_rsc) {
15202 flow_dv_tbl_resource_release(MLX5_SH(dev),
15203 sub_policy->tbl_rsc);
15204 sub_policy->tbl_rsc = NULL;
15209 * Destroy policy rules, lock free,
15210 * (mutex should be acquired by caller).
15211 * Dispatcher for action type specific call.
15214 * Pointer to the Ethernet device structure.
15215 * @param[in] mtr_policy
15216 * Meter policy struct.
15219 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15220 struct mlx5_flow_meter_policy *mtr_policy)
15223 struct mlx5_flow_meter_sub_policy *sub_policy;
15224 uint16_t sub_policy_num;
15226 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15227 sub_policy_num = (mtr_policy->sub_policy_num >>
15228 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15229 MLX5_MTR_SUB_POLICY_NUM_MASK;
15230 for (j = 0; j < sub_policy_num; j++) {
15231 sub_policy = mtr_policy->sub_policys[i][j];
15233 __flow_dv_destroy_sub_policy_rules(dev,
15240 * Destroy policy action, lock free,
15241 * (mutex should be acquired by caller).
15242 * Dispatcher for action type specific call.
15245 * Pointer to the Ethernet device structure.
15246 * @param[in] mtr_policy
15247 * Meter policy struct.
15250 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15251 struct mlx5_flow_meter_policy *mtr_policy)
15253 struct rte_flow_action *rss_action;
15254 struct mlx5_flow_handle dev_handle;
15257 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15258 if (mtr_policy->act_cnt[i].rix_mark) {
15259 flow_dv_tag_release(dev,
15260 mtr_policy->act_cnt[i].rix_mark);
15261 mtr_policy->act_cnt[i].rix_mark = 0;
15263 if (mtr_policy->act_cnt[i].modify_hdr) {
15264 dev_handle.dvh.modify_hdr =
15265 mtr_policy->act_cnt[i].modify_hdr;
15266 flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15268 switch (mtr_policy->act_cnt[i].fate_action) {
15269 case MLX5_FLOW_FATE_SHARED_RSS:
15270 rss_action = mtr_policy->act_cnt[i].rss;
15271 mlx5_free(rss_action);
15273 case MLX5_FLOW_FATE_PORT_ID:
15274 if (mtr_policy->act_cnt[i].rix_port_id_action) {
15275 flow_dv_port_id_action_resource_release(dev,
15276 mtr_policy->act_cnt[i].rix_port_id_action);
15277 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15280 case MLX5_FLOW_FATE_DROP:
15281 case MLX5_FLOW_FATE_JUMP:
15282 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15283 mtr_policy->act_cnt[i].dr_jump_action[j] =
15287 /*Queue action do nothing*/
15291 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15292 mtr_policy->dr_drop_action[j] = NULL;
15296 * Create policy action per domain, lock free,
15297 * (mutex should be acquired by caller).
15298 * Dispatcher for action type specific call.
15301 * Pointer to the Ethernet device structure.
15302 * @param[in] mtr_policy
15303 * Meter policy struct.
15304 * @param[in] action
15305 * Action specification used to create meter actions.
15306 * @param[out] error
15307 * Perform verbose error reporting if not NULL. Initialized in case of
15311 * 0 on success, otherwise negative errno value.
15314 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15315 struct mlx5_flow_meter_policy *mtr_policy,
15316 const struct rte_flow_action *actions[RTE_COLORS],
15317 enum mlx5_meter_domain domain,
15318 struct rte_mtr_error *error)
15320 struct mlx5_priv *priv = dev->data->dev_private;
15321 struct rte_flow_error flow_err;
15322 const struct rte_flow_action *act;
15323 uint64_t action_flags;
15324 struct mlx5_flow_handle dh;
15325 struct mlx5_flow dev_flow;
15326 struct mlx5_flow_dv_port_id_action_resource port_id_action;
15328 uint8_t egress, transfer;
15329 struct mlx5_meter_policy_action_container *act_cnt = NULL;
15331 struct mlx5_flow_dv_modify_hdr_resource res;
15332 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15333 sizeof(struct mlx5_modification_cmd) *
15334 (MLX5_MAX_MODIFY_NUM + 1)];
15336 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15338 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15339 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15340 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15341 memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15342 memset(&port_id_action, 0,
15343 sizeof(struct mlx5_flow_dv_port_id_action_resource));
15344 memset(mhdr_res, 0, sizeof(*mhdr_res));
15345 mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15346 (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15347 MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15348 dev_flow.handle = &dh;
15349 dev_flow.dv.port_id_action = &port_id_action;
15350 dev_flow.external = true;
15351 for (i = 0; i < RTE_COLORS; i++) {
15352 if (i < MLX5_MTR_RTE_COLORS)
15353 act_cnt = &mtr_policy->act_cnt[i];
15354 /* Skip the color policy actions creation. */
15355 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15356 (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15359 for (act = actions[i];
15360 act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15361 switch (act->type) {
15362 case RTE_FLOW_ACTION_TYPE_MARK:
15364 uint32_t tag_be = mlx5_flow_mark_set
15365 (((const struct rte_flow_action_mark *)
15368 if (i >= MLX5_MTR_RTE_COLORS)
15369 return -rte_mtr_error_set(error,
15371 RTE_MTR_ERROR_TYPE_METER_POLICY,
15373 "cannot create policy "
15374 "mark action for this color");
15375 dev_flow.handle->mark = 1;
15376 if (flow_dv_tag_resource_register(dev, tag_be,
15377 &dev_flow, &flow_err))
15378 return -rte_mtr_error_set(error,
15380 RTE_MTR_ERROR_TYPE_METER_POLICY,
15382 "cannot setup policy mark action");
15383 MLX5_ASSERT(dev_flow.dv.tag_resource);
15384 act_cnt->rix_mark =
15385 dev_flow.handle->dvh.rix_tag;
15386 action_flags |= MLX5_FLOW_ACTION_MARK;
15389 case RTE_FLOW_ACTION_TYPE_SET_TAG:
15390 if (i >= MLX5_MTR_RTE_COLORS)
15391 return -rte_mtr_error_set(error,
15393 RTE_MTR_ERROR_TYPE_METER_POLICY,
15395 "cannot create policy "
15396 "set tag action for this color");
15397 if (flow_dv_convert_action_set_tag
15399 (const struct rte_flow_action_set_tag *)
15400 act->conf, &flow_err))
15401 return -rte_mtr_error_set(error,
15403 RTE_MTR_ERROR_TYPE_METER_POLICY,
15404 NULL, "cannot convert policy "
15406 if (!mhdr_res->actions_num)
15407 return -rte_mtr_error_set(error,
15409 RTE_MTR_ERROR_TYPE_METER_POLICY,
15410 NULL, "cannot find policy "
15412 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15414 case RTE_FLOW_ACTION_TYPE_DROP:
15416 struct mlx5_flow_mtr_mng *mtrmng =
15418 struct mlx5_flow_tbl_data_entry *tbl_data;
15421 * Create the drop table with
15422 * METER DROP level.
15424 if (!mtrmng->drop_tbl[domain]) {
15425 mtrmng->drop_tbl[domain] =
15426 flow_dv_tbl_resource_get(dev,
15427 MLX5_FLOW_TABLE_LEVEL_METER,
15428 egress, transfer, false, NULL, 0,
15429 0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15430 if (!mtrmng->drop_tbl[domain])
15431 return -rte_mtr_error_set
15433 RTE_MTR_ERROR_TYPE_METER_POLICY,
15435 "Failed to create meter drop table");
15437 tbl_data = container_of
15438 (mtrmng->drop_tbl[domain],
15439 struct mlx5_flow_tbl_data_entry, tbl);
15440 if (i < MLX5_MTR_RTE_COLORS) {
15441 act_cnt->dr_jump_action[domain] =
15442 tbl_data->jump.action;
15443 act_cnt->fate_action =
15444 MLX5_FLOW_FATE_DROP;
15446 if (i == RTE_COLOR_RED)
15447 mtr_policy->dr_drop_action[domain] =
15448 tbl_data->jump.action;
15449 action_flags |= MLX5_FLOW_ACTION_DROP;
15452 case RTE_FLOW_ACTION_TYPE_QUEUE:
15454 if (i >= MLX5_MTR_RTE_COLORS)
15455 return -rte_mtr_error_set(error,
15457 RTE_MTR_ERROR_TYPE_METER_POLICY,
15458 NULL, "cannot create policy "
15459 "fate queue for this color");
15461 ((const struct rte_flow_action_queue *)
15462 (act->conf))->index;
15463 act_cnt->fate_action =
15464 MLX5_FLOW_FATE_QUEUE;
15465 dev_flow.handle->fate_action =
15466 MLX5_FLOW_FATE_QUEUE;
15467 mtr_policy->is_queue = 1;
15468 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15471 case RTE_FLOW_ACTION_TYPE_RSS:
15475 if (i >= MLX5_MTR_RTE_COLORS)
15476 return -rte_mtr_error_set(error,
15478 RTE_MTR_ERROR_TYPE_METER_POLICY,
15480 "cannot create policy "
15481 "rss action for this color");
15483 * Save RSS conf into policy struct
15484 * for translate stage.
15486 rss_size = (int)rte_flow_conv
15487 (RTE_FLOW_CONV_OP_ACTION,
15488 NULL, 0, act, &flow_err);
15490 return -rte_mtr_error_set(error,
15492 RTE_MTR_ERROR_TYPE_METER_POLICY,
15493 NULL, "Get the wrong "
15494 "rss action struct size");
15495 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15496 rss_size, 0, SOCKET_ID_ANY);
15498 return -rte_mtr_error_set(error,
15500 RTE_MTR_ERROR_TYPE_METER_POLICY,
15502 "Fail to malloc rss action memory");
15503 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15504 act_cnt->rss, rss_size,
15507 return -rte_mtr_error_set(error,
15509 RTE_MTR_ERROR_TYPE_METER_POLICY,
15510 NULL, "Fail to save "
15511 "rss action into policy struct");
15512 act_cnt->fate_action =
15513 MLX5_FLOW_FATE_SHARED_RSS;
15514 action_flags |= MLX5_FLOW_ACTION_RSS;
15517 case RTE_FLOW_ACTION_TYPE_PORT_ID:
15518 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15520 struct mlx5_flow_dv_port_id_action_resource
15522 uint32_t port_id = 0;
15524 if (i >= MLX5_MTR_RTE_COLORS)
15525 return -rte_mtr_error_set(error,
15527 RTE_MTR_ERROR_TYPE_METER_POLICY,
15528 NULL, "cannot create policy "
15529 "port action for this color");
15530 memset(&port_id_resource, 0,
15531 sizeof(port_id_resource));
15532 if (flow_dv_translate_action_port_id(dev, act,
15533 &port_id, &flow_err))
15534 return -rte_mtr_error_set(error,
15536 RTE_MTR_ERROR_TYPE_METER_POLICY,
15537 NULL, "cannot translate "
15538 "policy port action");
15539 port_id_resource.port_id = port_id;
15540 if (flow_dv_port_id_action_resource_register
15541 (dev, &port_id_resource,
15542 &dev_flow, &flow_err))
15543 return -rte_mtr_error_set(error,
15545 RTE_MTR_ERROR_TYPE_METER_POLICY,
15546 NULL, "cannot setup "
15547 "policy port action");
15548 act_cnt->rix_port_id_action =
15549 dev_flow.handle->rix_port_id_action;
15550 act_cnt->fate_action =
15551 MLX5_FLOW_FATE_PORT_ID;
15552 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15555 case RTE_FLOW_ACTION_TYPE_JUMP:
15557 uint32_t jump_group = 0;
15558 uint32_t table = 0;
15559 struct mlx5_flow_tbl_data_entry *tbl_data;
15560 struct flow_grp_info grp_info = {
15561 .external = !!dev_flow.external,
15562 .transfer = !!transfer,
15563 .fdb_def_rule = !!priv->fdb_def_rule,
15565 .skip_scale = dev_flow.skip_scale &
15566 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15568 struct mlx5_flow_meter_sub_policy *sub_policy =
15569 mtr_policy->sub_policys[domain][0];
15571 if (i >= MLX5_MTR_RTE_COLORS)
15572 return -rte_mtr_error_set(error,
15574 RTE_MTR_ERROR_TYPE_METER_POLICY,
15576 "cannot create policy "
15577 "jump action for this color");
15579 ((const struct rte_flow_action_jump *)
15581 if (mlx5_flow_group_to_table(dev, NULL,
15584 &grp_info, &flow_err))
15585 return -rte_mtr_error_set(error,
15587 RTE_MTR_ERROR_TYPE_METER_POLICY,
15588 NULL, "cannot setup "
15589 "policy jump action");
15590 sub_policy->jump_tbl[i] =
15591 flow_dv_tbl_resource_get(dev,
15594 !!dev_flow.external,
15595 NULL, jump_group, 0,
15598 (!sub_policy->jump_tbl[i])
15599 return -rte_mtr_error_set(error,
15601 RTE_MTR_ERROR_TYPE_METER_POLICY,
15602 NULL, "cannot create jump action.");
15603 tbl_data = container_of
15604 (sub_policy->jump_tbl[i],
15605 struct mlx5_flow_tbl_data_entry, tbl);
15606 act_cnt->dr_jump_action[domain] =
15607 tbl_data->jump.action;
15608 act_cnt->fate_action =
15609 MLX5_FLOW_FATE_JUMP;
15610 action_flags |= MLX5_FLOW_ACTION_JUMP;
15614 * No need to check meter hierarchy for Y or R colors
15615 * here since it is done in the validation stage.
15617 case RTE_FLOW_ACTION_TYPE_METER:
15619 const struct rte_flow_action_meter *mtr;
15620 struct mlx5_flow_meter_info *next_fm;
15621 struct mlx5_flow_meter_policy *next_policy;
15622 struct rte_flow_action tag_action;
15623 struct mlx5_rte_flow_action_set_tag set_tag;
15624 uint32_t next_mtr_idx = 0;
15627 next_fm = mlx5_flow_meter_find(priv,
15631 return -rte_mtr_error_set(error, EINVAL,
15632 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15633 "Fail to find next meter.");
15634 if (next_fm->def_policy)
15635 return -rte_mtr_error_set(error, EINVAL,
15636 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15637 "Hierarchy only supports termination meter.");
15638 next_policy = mlx5_flow_meter_policy_find(dev,
15639 next_fm->policy_id, NULL);
15640 MLX5_ASSERT(next_policy);
15641 if (next_fm->drop_cnt) {
15644 mlx5_flow_get_reg_id(dev,
15647 (struct rte_flow_error *)error);
15648 set_tag.offset = (priv->mtr_reg_share ?
15649 MLX5_MTR_COLOR_BITS : 0);
15650 set_tag.length = (priv->mtr_reg_share ?
15651 MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15653 set_tag.data = next_mtr_idx;
15655 (enum rte_flow_action_type)
15656 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15657 tag_action.conf = &set_tag;
15658 if (flow_dv_convert_action_set_reg
15659 (mhdr_res, &tag_action,
15660 (struct rte_flow_error *)error))
15663 MLX5_FLOW_ACTION_SET_TAG;
15665 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15666 act_cnt->next_mtr_id = next_fm->meter_id;
15667 act_cnt->next_sub_policy = NULL;
15668 mtr_policy->is_hierarchy = 1;
15669 mtr_policy->dev = next_policy->dev;
15671 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15675 return -rte_mtr_error_set(error, ENOTSUP,
15676 RTE_MTR_ERROR_TYPE_METER_POLICY,
15677 NULL, "action type not supported");
15679 if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15680 /* create modify action if needed. */
15681 dev_flow.dv.group = 1;
15682 if (flow_dv_modify_hdr_resource_register
15683 (dev, mhdr_res, &dev_flow, &flow_err))
15684 return -rte_mtr_error_set(error,
15686 RTE_MTR_ERROR_TYPE_METER_POLICY,
15687 NULL, "cannot register policy "
15689 act_cnt->modify_hdr =
15690 dev_flow.handle->dvh.modify_hdr;
15698 * Create policy action per domain, lock free,
15699 * (mutex should be acquired by caller).
15700 * Dispatcher for action type specific call.
15703 * Pointer to the Ethernet device structure.
15704 * @param[in] mtr_policy
15705 * Meter policy struct.
15706 * @param[in] action
15707 * Action specification used to create meter actions.
15708 * @param[out] error
15709 * Perform verbose error reporting if not NULL. Initialized in case of
15713 * 0 on success, otherwise negative errno value.
15716 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15717 struct mlx5_flow_meter_policy *mtr_policy,
15718 const struct rte_flow_action *actions[RTE_COLORS],
15719 struct rte_mtr_error *error)
15722 uint16_t sub_policy_num;
15724 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15725 sub_policy_num = (mtr_policy->sub_policy_num >>
15726 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15727 MLX5_MTR_SUB_POLICY_NUM_MASK;
15728 if (sub_policy_num) {
15729 ret = __flow_dv_create_domain_policy_acts(dev,
15730 mtr_policy, actions,
15731 (enum mlx5_meter_domain)i, error);
15732 /* Cleaning resource is done in the caller level. */
15741 * Query a DV flow rule for its statistics via DevX.
15744 * Pointer to Ethernet device.
15745 * @param[in] cnt_idx
15746 * Index to the flow counter.
15748 * Data retrieved by the query.
15749 * @param[out] error
15750 * Perform verbose error reporting if not NULL.
15753 * 0 on success, a negative errno value otherwise and rte_errno is set.
15756 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15757 struct rte_flow_error *error)
15759 struct mlx5_priv *priv = dev->data->dev_private;
15760 struct rte_flow_query_count *qc = data;
15762 if (!priv->sh->devx)
15763 return rte_flow_error_set(error, ENOTSUP,
15764 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15766 "counters are not supported");
15768 uint64_t pkts, bytes;
15769 struct mlx5_flow_counter *cnt;
15770 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15773 return rte_flow_error_set(error, -err,
15774 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15775 NULL, "cannot read counters");
15776 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15779 qc->hits = pkts - cnt->hits;
15780 qc->bytes = bytes - cnt->bytes;
15783 cnt->bytes = bytes;
15787 return rte_flow_error_set(error, EINVAL,
15788 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15790 "counters are not available");
15795 * Query counter's action pointer for a DV flow rule via DevX.
15798 * Pointer to Ethernet device.
15799 * @param[in] cnt_idx
15800 * Index to the flow counter.
15801 * @param[out] action_ptr
15802 * Action pointer for counter.
15803 * @param[out] error
15804 * Perform verbose error reporting if not NULL.
15807 * 0 on success, a negative errno value otherwise and rte_errno is set.
15810 flow_dv_query_count_ptr(struct rte_eth_dev *dev, uint32_t cnt_idx,
15811 void **action_ptr, struct rte_flow_error *error)
15813 struct mlx5_priv *priv = dev->data->dev_private;
15815 if (!priv->sh->devx || !action_ptr)
15816 return rte_flow_error_set(error, ENOTSUP,
15817 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15819 "counters are not supported");
15822 struct mlx5_flow_counter *cnt = NULL;
15823 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15825 *action_ptr = cnt->action;
15829 return rte_flow_error_set(error, EINVAL,
15830 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15832 "counters are not available");
15836 flow_dv_action_query(struct rte_eth_dev *dev,
15837 const struct rte_flow_action_handle *handle, void *data,
15838 struct rte_flow_error *error)
15840 struct mlx5_age_param *age_param;
15841 struct rte_flow_query_age *resp;
15842 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15843 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15844 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15845 struct mlx5_priv *priv = dev->data->dev_private;
15846 struct mlx5_aso_ct_action *ct;
15851 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15852 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15854 resp->aged = __atomic_load_n(&age_param->state,
15855 __ATOMIC_RELAXED) == AGE_TMOUT ?
15857 resp->sec_since_last_hit_valid = !resp->aged;
15858 if (resp->sec_since_last_hit_valid)
15859 resp->sec_since_last_hit = __atomic_load_n
15860 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15862 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15863 return flow_dv_query_count(dev, idx, data, error);
15864 case MLX5_INDIRECT_ACTION_TYPE_CT:
15865 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15866 if (owner != PORT_ID(priv))
15867 return rte_flow_error_set(error, EACCES,
15868 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15870 "CT object owned by another port");
15871 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15872 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15875 return rte_flow_error_set(error, EFAULT,
15876 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15878 "CT object is inactive");
15879 ((struct rte_flow_action_conntrack *)data)->peer_port =
15881 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15883 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15884 return rte_flow_error_set(error, EIO,
15885 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15887 "Failed to query CT context");
15890 return rte_flow_error_set(error, ENOTSUP,
15891 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15892 "action type query not supported");
15897 * Query a flow rule AGE action for aging information.
15900 * Pointer to Ethernet device.
15902 * Pointer to the sub flow.
15904 * data retrieved by the query.
15905 * @param[out] error
15906 * Perform verbose error reporting if not NULL.
15909 * 0 on success, a negative errno value otherwise and rte_errno is set.
15912 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15913 void *data, struct rte_flow_error *error)
15915 struct rte_flow_query_age *resp = data;
15916 struct mlx5_age_param *age_param;
15919 struct mlx5_aso_age_action *act =
15920 flow_aso_age_get_by_idx(dev, flow->age);
15922 age_param = &act->age_params;
15923 } else if (flow->counter) {
15924 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15926 if (!age_param || !age_param->timeout)
15927 return rte_flow_error_set
15929 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15930 NULL, "cannot read age data");
15932 return rte_flow_error_set(error, EINVAL,
15933 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15934 NULL, "age data not available");
15936 resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15938 resp->sec_since_last_hit_valid = !resp->aged;
15939 if (resp->sec_since_last_hit_valid)
15940 resp->sec_since_last_hit = __atomic_load_n
15941 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15948 * @see rte_flow_query()
15949 * @see rte_flow_ops
15952 flow_dv_query(struct rte_eth_dev *dev,
15953 struct rte_flow *flow __rte_unused,
15954 const struct rte_flow_action *actions __rte_unused,
15955 void *data __rte_unused,
15956 struct rte_flow_error *error __rte_unused)
15960 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15961 switch (actions->type) {
15962 case RTE_FLOW_ACTION_TYPE_VOID:
15964 case RTE_FLOW_ACTION_TYPE_COUNT:
15965 ret = flow_dv_query_count(dev, flow->counter, data,
15968 case RTE_FLOW_ACTION_TYPE_AGE:
15969 ret = flow_dv_query_age(dev, flow, data, error);
15972 return rte_flow_error_set(error, ENOTSUP,
15973 RTE_FLOW_ERROR_TYPE_ACTION,
15975 "action not supported");
15982 * Destroy the meter table set.
15983 * Lock free, (mutex should be acquired by caller).
15986 * Pointer to Ethernet device.
15988 * Meter information table.
15991 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15992 struct mlx5_flow_meter_info *fm)
15994 struct mlx5_priv *priv = dev->data->dev_private;
15997 if (!fm || !priv->config.dv_flow_en)
15999 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16000 if (fm->drop_rule[i]) {
16001 claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
16002 fm->drop_rule[i] = NULL;
16008 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
16010 struct mlx5_priv *priv = dev->data->dev_private;
16011 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16012 struct mlx5_flow_tbl_data_entry *tbl;
16015 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16016 if (mtrmng->def_rule[i]) {
16017 claim_zero(mlx5_flow_os_destroy_flow
16018 (mtrmng->def_rule[i]));
16019 mtrmng->def_rule[i] = NULL;
16021 if (mtrmng->def_matcher[i]) {
16022 tbl = container_of(mtrmng->def_matcher[i]->tbl,
16023 struct mlx5_flow_tbl_data_entry, tbl);
16024 mlx5_list_unregister(tbl->matchers,
16025 &mtrmng->def_matcher[i]->entry);
16026 mtrmng->def_matcher[i] = NULL;
16028 for (j = 0; j < MLX5_REG_BITS; j++) {
16029 if (mtrmng->drop_matcher[i][j]) {
16031 container_of(mtrmng->drop_matcher[i][j]->tbl,
16032 struct mlx5_flow_tbl_data_entry,
16034 mlx5_list_unregister(tbl->matchers,
16035 &mtrmng->drop_matcher[i][j]->entry);
16036 mtrmng->drop_matcher[i][j] = NULL;
16039 if (mtrmng->drop_tbl[i]) {
16040 flow_dv_tbl_resource_release(MLX5_SH(dev),
16041 mtrmng->drop_tbl[i]);
16042 mtrmng->drop_tbl[i] = NULL;
16047 /* Number of meter flow actions, count and jump or count and drop. */
16048 #define METER_ACTIONS 2
16051 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
16052 enum mlx5_meter_domain domain)
16054 struct mlx5_priv *priv = dev->data->dev_private;
16055 struct mlx5_flow_meter_def_policy *def_policy =
16056 priv->sh->mtrmng->def_policy[domain];
16058 __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
16059 mlx5_free(def_policy);
16060 priv->sh->mtrmng->def_policy[domain] = NULL;
16064 * Destroy the default policy table set.
16067 * Pointer to Ethernet device.
16070 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
16072 struct mlx5_priv *priv = dev->data->dev_private;
16075 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
16076 if (priv->sh->mtrmng->def_policy[i])
16077 __flow_dv_destroy_domain_def_policy(dev,
16078 (enum mlx5_meter_domain)i);
16079 priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
16083 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
16084 uint32_t color_reg_c_idx,
16085 enum rte_color color, void *matcher_object,
16086 int actions_n, void *actions,
16087 bool match_src_port, const struct rte_flow_item *item,
16088 void **rule, const struct rte_flow_attr *attr)
16091 struct mlx5_flow_dv_match_params value = {
16092 .size = sizeof(value.buf),
16094 struct mlx5_flow_dv_match_params matcher = {
16095 .size = sizeof(matcher.buf),
16097 struct mlx5_priv *priv = dev->data->dev_private;
16100 if (match_src_port && (priv->representor || priv->master)) {
16101 if (flow_dv_translate_item_port_id(dev, matcher.buf,
16102 value.buf, item, attr)) {
16103 DRV_LOG(ERR, "Failed to create meter policy%d flow's"
16104 " value with port.", color);
16108 flow_dv_match_meta_reg(matcher.buf, value.buf,
16109 (enum modify_reg)color_reg_c_idx,
16110 rte_col_2_mlx5_col(color), UINT32_MAX);
16111 misc_mask = flow_dv_matcher_enable(value.buf);
16112 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16113 ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
16114 actions_n, actions, rule);
16116 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16123 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16124 uint32_t color_reg_c_idx,
16126 struct mlx5_flow_meter_sub_policy *sub_policy,
16127 const struct rte_flow_attr *attr,
16128 bool match_src_port,
16129 const struct rte_flow_item *item,
16130 struct mlx5_flow_dv_matcher **policy_matcher,
16131 struct rte_flow_error *error)
16133 struct mlx5_list_entry *entry;
16134 struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16135 struct mlx5_flow_dv_matcher matcher = {
16137 .size = sizeof(matcher.mask.buf),
16141 struct mlx5_flow_dv_match_params value = {
16142 .size = sizeof(value.buf),
16144 struct mlx5_flow_cb_ctx ctx = {
16148 struct mlx5_flow_tbl_data_entry *tbl_data;
16149 struct mlx5_priv *priv = dev->data->dev_private;
16150 const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16152 if (match_src_port && (priv->representor || priv->master)) {
16153 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16154 value.buf, item, attr)) {
16155 DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16156 " with port.", priority);
16160 tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16161 if (priority < RTE_COLOR_RED)
16162 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16163 (enum modify_reg)color_reg_c_idx, 0, color_mask);
16164 matcher.priority = priority;
16165 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16166 matcher.mask.size);
16167 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16169 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16173 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16178 * Create the policy rules per domain.
16181 * Pointer to Ethernet device.
16182 * @param[in] sub_policy
16183 * Pointer to sub policy table..
16184 * @param[in] egress
16185 * Direction of the table.
16186 * @param[in] transfer
16187 * E-Switch or NIC flow.
16189 * Pointer to policy action list per color.
16192 * 0 on success, -1 otherwise.
16195 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16196 struct mlx5_flow_meter_sub_policy *sub_policy,
16197 uint8_t egress, uint8_t transfer, bool match_src_port,
16198 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16200 struct mlx5_priv *priv = dev->data->dev_private;
16201 struct rte_flow_error flow_err;
16202 uint32_t color_reg_c_idx;
16203 struct rte_flow_attr attr = {
16204 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16207 .egress = !!egress,
16208 .transfer = !!transfer,
16212 int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16213 struct mlx5_sub_policy_color_rule *color_rule;
16215 struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16219 /* Create policy table with POLICY level. */
16220 if (!sub_policy->tbl_rsc)
16221 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16222 MLX5_FLOW_TABLE_LEVEL_POLICY,
16223 egress, transfer, false, NULL, 0, 0,
16224 sub_policy->idx, &flow_err);
16225 if (!sub_policy->tbl_rsc) {
16227 "Failed to create meter sub policy table.");
16230 /* Prepare matchers. */
16231 color_reg_c_idx = ret;
16232 for (i = 0; i < RTE_COLORS; i++) {
16233 TAILQ_INIT(&sub_policy->color_rules[i]);
16234 if (!acts[i].actions_n)
16236 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16237 sizeof(struct mlx5_sub_policy_color_rule),
16240 DRV_LOG(ERR, "No memory to create color rule.");
16243 tmp_rules[i] = color_rule;
16244 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16245 color_rule, next_port);
16246 color_rule->src_port = priv->representor_id;
16249 /* Create matchers for colors. */
16250 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16251 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16252 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16253 &attr, svport_match, NULL,
16254 &color_rule->matcher, &flow_err)) {
16255 DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16258 /* Create flow, matching color. */
16259 if (__flow_dv_create_policy_flow(dev,
16260 color_reg_c_idx, (enum rte_color)i,
16261 color_rule->matcher->matcher_object,
16262 acts[i].actions_n, acts[i].dv_actions,
16263 svport_match, NULL, &color_rule->rule,
16265 DRV_LOG(ERR, "Failed to create color%u rule.", i);
16271 /* All the policy rules will be cleared. */
16273 color_rule = tmp_rules[i];
16275 if (color_rule->rule)
16276 mlx5_flow_os_destroy_flow(color_rule->rule);
16277 if (color_rule->matcher) {
16278 struct mlx5_flow_tbl_data_entry *tbl =
16279 container_of(color_rule->matcher->tbl,
16280 typeof(*tbl), tbl);
16281 mlx5_list_unregister(tbl->matchers,
16282 &color_rule->matcher->entry);
16284 TAILQ_REMOVE(&sub_policy->color_rules[i],
16285 color_rule, next_port);
16286 mlx5_free(color_rule);
16293 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16294 struct mlx5_flow_meter_policy *mtr_policy,
16295 struct mlx5_flow_meter_sub_policy *sub_policy,
16298 struct mlx5_priv *priv = dev->data->dev_private;
16299 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16300 struct mlx5_flow_dv_tag_resource *tag;
16301 struct mlx5_flow_dv_port_id_action_resource *port_action;
16302 struct mlx5_hrxq *hrxq;
16303 struct mlx5_flow_meter_info *next_fm = NULL;
16304 struct mlx5_flow_meter_policy *next_policy;
16305 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16306 struct mlx5_flow_tbl_data_entry *tbl_data;
16307 struct rte_flow_error error;
16308 uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16309 uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16310 bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16311 bool match_src_port = false;
16314 /* If RSS or Queue, no previous actions / rules is created. */
16315 for (i = 0; i < RTE_COLORS; i++) {
16316 acts[i].actions_n = 0;
16317 if (i == RTE_COLOR_RED) {
16318 /* Only support drop on red. */
16319 acts[i].dv_actions[0] =
16320 mtr_policy->dr_drop_action[domain];
16321 acts[i].actions_n = 1;
16324 if (i == RTE_COLOR_GREEN &&
16325 mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16326 struct rte_flow_attr attr = {
16327 .transfer = transfer
16330 next_fm = mlx5_flow_meter_find(priv,
16331 mtr_policy->act_cnt[i].next_mtr_id,
16335 "Failed to get next hierarchy meter.");
16338 if (mlx5_flow_meter_attach(priv, next_fm,
16340 DRV_LOG(ERR, "%s", error.message);
16344 /* Meter action must be the first for TX. */
16346 acts[i].dv_actions[acts[i].actions_n] =
16347 next_fm->meter_action;
16348 acts[i].actions_n++;
16351 if (mtr_policy->act_cnt[i].rix_mark) {
16352 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16353 mtr_policy->act_cnt[i].rix_mark);
16355 DRV_LOG(ERR, "Failed to find "
16356 "mark action for policy.");
16359 acts[i].dv_actions[acts[i].actions_n] = tag->action;
16360 acts[i].actions_n++;
16362 if (mtr_policy->act_cnt[i].modify_hdr) {
16363 acts[i].dv_actions[acts[i].actions_n] =
16364 mtr_policy->act_cnt[i].modify_hdr->action;
16365 acts[i].actions_n++;
16367 if (mtr_policy->act_cnt[i].fate_action) {
16368 switch (mtr_policy->act_cnt[i].fate_action) {
16369 case MLX5_FLOW_FATE_PORT_ID:
16370 port_action = mlx5_ipool_get
16371 (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16372 mtr_policy->act_cnt[i].rix_port_id_action);
16373 if (!port_action) {
16374 DRV_LOG(ERR, "Failed to find "
16375 "port action for policy.");
16378 acts[i].dv_actions[acts[i].actions_n] =
16379 port_action->action;
16380 acts[i].actions_n++;
16381 mtr_policy->dev = dev;
16382 match_src_port = true;
16384 case MLX5_FLOW_FATE_DROP:
16385 case MLX5_FLOW_FATE_JUMP:
16386 acts[i].dv_actions[acts[i].actions_n] =
16387 mtr_policy->act_cnt[i].dr_jump_action[domain];
16388 acts[i].actions_n++;
16390 case MLX5_FLOW_FATE_SHARED_RSS:
16391 case MLX5_FLOW_FATE_QUEUE:
16392 hrxq = mlx5_ipool_get
16393 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16394 sub_policy->rix_hrxq[i]);
16396 DRV_LOG(ERR, "Failed to find "
16397 "queue action for policy.");
16400 acts[i].dv_actions[acts[i].actions_n] =
16402 acts[i].actions_n++;
16404 case MLX5_FLOW_FATE_MTR:
16407 "No next hierarchy meter.");
16411 acts[i].dv_actions[acts[i].actions_n] =
16412 next_fm->meter_action;
16413 acts[i].actions_n++;
16415 if (mtr_policy->act_cnt[i].next_sub_policy) {
16417 mtr_policy->act_cnt[i].next_sub_policy;
16420 mlx5_flow_meter_policy_find(dev,
16421 next_fm->policy_id, NULL);
16422 MLX5_ASSERT(next_policy);
16424 next_policy->sub_policys[domain][0];
16427 container_of(next_sub_policy->tbl_rsc,
16428 struct mlx5_flow_tbl_data_entry, tbl);
16429 acts[i].dv_actions[acts[i].actions_n++] =
16430 tbl_data->jump.action;
16431 if (mtr_policy->act_cnt[i].modify_hdr)
16432 match_src_port = !!transfer;
16435 /*Queue action do nothing*/
16440 if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16441 egress, transfer, match_src_port, acts)) {
16443 "Failed to create policy rules per domain.");
16449 mlx5_flow_meter_detach(priv, next_fm);
16454 * Create the policy rules.
16457 * Pointer to Ethernet device.
16458 * @param[in,out] mtr_policy
16459 * Pointer to meter policy table.
16462 * 0 on success, -1 otherwise.
16465 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16466 struct mlx5_flow_meter_policy *mtr_policy)
16469 uint16_t sub_policy_num;
16471 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16472 sub_policy_num = (mtr_policy->sub_policy_num >>
16473 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16474 MLX5_MTR_SUB_POLICY_NUM_MASK;
16475 if (!sub_policy_num)
16477 /* Prepare actions list and create policy rules. */
16478 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16479 mtr_policy->sub_policys[i][0], i)) {
16480 DRV_LOG(ERR, "Failed to create policy action "
16481 "list per domain.");
16489 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16491 struct mlx5_priv *priv = dev->data->dev_private;
16492 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16493 struct mlx5_flow_meter_def_policy *def_policy;
16494 struct mlx5_flow_tbl_resource *jump_tbl;
16495 struct mlx5_flow_tbl_data_entry *tbl_data;
16496 uint8_t egress, transfer;
16497 struct rte_flow_error error;
16498 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16501 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16502 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16503 def_policy = mtrmng->def_policy[domain];
16505 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16506 sizeof(struct mlx5_flow_meter_def_policy),
16507 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16509 DRV_LOG(ERR, "Failed to alloc default policy table.");
16510 goto def_policy_error;
16512 mtrmng->def_policy[domain] = def_policy;
16513 /* Create the meter suffix table with SUFFIX level. */
16514 jump_tbl = flow_dv_tbl_resource_get(dev,
16515 MLX5_FLOW_TABLE_LEVEL_METER,
16516 egress, transfer, false, NULL, 0,
16517 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16520 "Failed to create meter suffix table.");
16521 goto def_policy_error;
16523 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16524 tbl_data = container_of(jump_tbl,
16525 struct mlx5_flow_tbl_data_entry, tbl);
16526 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16527 tbl_data->jump.action;
16528 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16529 acts[RTE_COLOR_GREEN].actions_n = 1;
16531 * YELLOW has the same default policy as GREEN does.
16532 * G & Y share the same table and action. The 2nd time of table
16533 * resource getting is just to update the reference count for
16534 * the releasing stage.
16536 jump_tbl = flow_dv_tbl_resource_get(dev,
16537 MLX5_FLOW_TABLE_LEVEL_METER,
16538 egress, transfer, false, NULL, 0,
16539 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16542 "Failed to get meter suffix table.");
16543 goto def_policy_error;
16545 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16546 tbl_data = container_of(jump_tbl,
16547 struct mlx5_flow_tbl_data_entry, tbl);
16548 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16549 tbl_data->jump.action;
16550 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16551 acts[RTE_COLOR_YELLOW].actions_n = 1;
16552 /* Create jump action to the drop table. */
16553 if (!mtrmng->drop_tbl[domain]) {
16554 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16555 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16556 egress, transfer, false, NULL, 0,
16557 0, MLX5_MTR_TABLE_ID_DROP, &error);
16558 if (!mtrmng->drop_tbl[domain]) {
16559 DRV_LOG(ERR, "Failed to create meter "
16560 "drop table for default policy.");
16561 goto def_policy_error;
16564 /* all RED: unique Drop table for jump action. */
16565 tbl_data = container_of(mtrmng->drop_tbl[domain],
16566 struct mlx5_flow_tbl_data_entry, tbl);
16567 def_policy->dr_jump_action[RTE_COLOR_RED] =
16568 tbl_data->jump.action;
16569 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16570 acts[RTE_COLOR_RED].actions_n = 1;
16571 /* Create default policy rules. */
16572 ret = __flow_dv_create_domain_policy_rules(dev,
16573 &def_policy->sub_policy,
16574 egress, transfer, false, acts);
16576 DRV_LOG(ERR, "Failed to create default policy rules.");
16577 goto def_policy_error;
16582 __flow_dv_destroy_domain_def_policy(dev,
16583 (enum mlx5_meter_domain)domain);
16588 * Create the default policy table set.
16591 * Pointer to Ethernet device.
16593 * 0 on success, -1 otherwise.
16596 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16598 struct mlx5_priv *priv = dev->data->dev_private;
16601 /* Non-termination policy table. */
16602 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16603 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16605 if (__flow_dv_create_domain_def_policy(dev, i)) {
16606 DRV_LOG(ERR, "Failed to create default policy");
16607 /* Rollback the created default policies for others. */
16608 flow_dv_destroy_def_policy(dev);
16616 * Create the needed meter tables.
16617 * Lock free, (mutex should be acquired by caller).
16620 * Pointer to Ethernet device.
16622 * Meter information table.
16623 * @param[in] mtr_idx
16625 * @param[in] domain_bitmap
16628 * 0 on success, -1 otherwise.
16631 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16632 struct mlx5_flow_meter_info *fm,
16634 uint8_t domain_bitmap)
16636 struct mlx5_priv *priv = dev->data->dev_private;
16637 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16638 struct rte_flow_error error;
16639 struct mlx5_flow_tbl_data_entry *tbl_data;
16640 uint8_t egress, transfer;
16641 void *actions[METER_ACTIONS];
16642 int domain, ret, i;
16643 struct mlx5_flow_counter *cnt;
16644 struct mlx5_flow_dv_match_params value = {
16645 .size = sizeof(value.buf),
16647 struct mlx5_flow_dv_match_params matcher_para = {
16648 .size = sizeof(matcher_para.buf),
16650 int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16652 uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16653 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16654 struct mlx5_list_entry *entry;
16655 struct mlx5_flow_dv_matcher matcher = {
16657 .size = sizeof(matcher.mask.buf),
16660 struct mlx5_flow_dv_matcher *drop_matcher;
16661 struct mlx5_flow_cb_ctx ctx = {
16667 if (!priv->mtr_en || mtr_id_reg_c < 0) {
16668 rte_errno = ENOTSUP;
16671 for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16672 if (!(domain_bitmap & (1 << domain)) ||
16673 (mtrmng->def_rule[domain] && !fm->drop_cnt))
16675 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16676 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16677 /* Create the drop table with METER DROP level. */
16678 if (!mtrmng->drop_tbl[domain]) {
16679 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16680 MLX5_FLOW_TABLE_LEVEL_METER,
16681 egress, transfer, false, NULL, 0,
16682 0, MLX5_MTR_TABLE_ID_DROP, &error);
16683 if (!mtrmng->drop_tbl[domain]) {
16684 DRV_LOG(ERR, "Failed to create meter drop table.");
16688 /* Create default matcher in drop table. */
16689 matcher.tbl = mtrmng->drop_tbl[domain],
16690 tbl_data = container_of(mtrmng->drop_tbl[domain],
16691 struct mlx5_flow_tbl_data_entry, tbl);
16692 if (!mtrmng->def_matcher[domain]) {
16693 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16694 (enum modify_reg)mtr_id_reg_c,
16696 matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16697 matcher.crc = rte_raw_cksum
16698 ((const void *)matcher.mask.buf,
16699 matcher.mask.size);
16700 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16702 DRV_LOG(ERR, "Failed to register meter "
16703 "drop default matcher.");
16706 mtrmng->def_matcher[domain] = container_of(entry,
16707 struct mlx5_flow_dv_matcher, entry);
16709 /* Create default rule in drop table. */
16710 if (!mtrmng->def_rule[domain]) {
16712 actions[i++] = priv->sh->dr_drop_action;
16713 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16714 (enum modify_reg)mtr_id_reg_c, 0, 0);
16715 misc_mask = flow_dv_matcher_enable(value.buf);
16716 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16717 ret = mlx5_flow_os_create_flow
16718 (mtrmng->def_matcher[domain]->matcher_object,
16719 (void *)&value, i, actions,
16720 &mtrmng->def_rule[domain]);
16722 DRV_LOG(ERR, "Failed to create meter "
16723 "default drop rule for drop table.");
16729 MLX5_ASSERT(mtrmng->max_mtr_bits);
16730 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16731 /* Create matchers for Drop. */
16732 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16733 (enum modify_reg)mtr_id_reg_c, 0,
16734 (mtr_id_mask << mtr_id_offset));
16735 matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16736 matcher.crc = rte_raw_cksum
16737 ((const void *)matcher.mask.buf,
16738 matcher.mask.size);
16739 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16742 "Failed to register meter drop matcher.");
16745 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16746 container_of(entry, struct mlx5_flow_dv_matcher,
16750 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16751 /* Create drop rule, matching meter_id only. */
16752 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16753 (enum modify_reg)mtr_id_reg_c,
16754 (mtr_idx << mtr_id_offset), UINT32_MAX);
16756 cnt = flow_dv_counter_get_by_idx(dev,
16757 fm->drop_cnt, NULL);
16758 actions[i++] = cnt->action;
16759 actions[i++] = priv->sh->dr_drop_action;
16760 misc_mask = flow_dv_matcher_enable(value.buf);
16761 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16762 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16763 (void *)&value, i, actions,
16764 &fm->drop_rule[domain]);
16766 DRV_LOG(ERR, "Failed to create meter "
16767 "drop rule for drop table.");
16773 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16774 if (fm->drop_rule[i]) {
16775 claim_zero(mlx5_flow_os_destroy_flow
16776 (fm->drop_rule[i]));
16777 fm->drop_rule[i] = NULL;
16783 static struct mlx5_flow_meter_sub_policy *
16784 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16785 struct mlx5_flow_meter_policy *mtr_policy,
16786 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16787 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16790 struct mlx5_priv *priv = dev->data->dev_private;
16791 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16792 uint32_t sub_policy_idx = 0;
16793 uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16795 struct mlx5_hrxq *hrxq;
16796 struct mlx5_flow_handle dh;
16797 struct mlx5_meter_policy_action_container *act_cnt;
16798 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16799 uint16_t sub_policy_num;
16801 rte_spinlock_lock(&mtr_policy->sl);
16802 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16805 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16806 if (!hrxq_idx[i]) {
16807 rte_spinlock_unlock(&mtr_policy->sl);
16811 sub_policy_num = (mtr_policy->sub_policy_num >>
16812 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16813 MLX5_MTR_SUB_POLICY_NUM_MASK;
16814 for (j = 0; j < sub_policy_num; j++) {
16815 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16818 mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16821 if (i >= MLX5_MTR_RTE_COLORS) {
16823 * Found the sub policy table with
16824 * the same queue per color.
16826 rte_spinlock_unlock(&mtr_policy->sl);
16827 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16828 mlx5_hrxq_release(dev, hrxq_idx[i]);
16830 return mtr_policy->sub_policys[domain][j];
16833 /* Create sub policy. */
16834 if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16835 /* Reuse the first pre-allocated sub_policy. */
16836 sub_policy = mtr_policy->sub_policys[domain][0];
16837 sub_policy_idx = sub_policy->idx;
16839 sub_policy = mlx5_ipool_zmalloc
16840 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16843 sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16844 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16845 mlx5_hrxq_release(dev, hrxq_idx[i]);
16846 goto rss_sub_policy_error;
16848 sub_policy->idx = sub_policy_idx;
16849 sub_policy->main_policy = mtr_policy;
16851 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16854 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16855 if (mtr_policy->is_hierarchy) {
16856 act_cnt = &mtr_policy->act_cnt[i];
16857 act_cnt->next_sub_policy = next_sub_policy;
16858 mlx5_hrxq_release(dev, hrxq_idx[i]);
16861 * Overwrite the last action from
16862 * RSS action to Queue action.
16864 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16867 DRV_LOG(ERR, "Failed to get policy hrxq");
16868 goto rss_sub_policy_error;
16870 act_cnt = &mtr_policy->act_cnt[i];
16871 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16872 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16873 if (act_cnt->rix_mark)
16875 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16876 dh.rix_hrxq = hrxq_idx[i];
16877 flow_drv_rxq_flags_set(dev, &dh);
16881 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16882 sub_policy, domain)) {
16883 DRV_LOG(ERR, "Failed to create policy "
16884 "rules for ingress domain.");
16885 goto rss_sub_policy_error;
16887 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16888 i = (mtr_policy->sub_policy_num >>
16889 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16890 MLX5_MTR_SUB_POLICY_NUM_MASK;
16891 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16892 DRV_LOG(ERR, "No free sub-policy slot.");
16893 goto rss_sub_policy_error;
16895 mtr_policy->sub_policys[domain][i] = sub_policy;
16897 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16898 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16899 mtr_policy->sub_policy_num |=
16900 (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16901 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16903 rte_spinlock_unlock(&mtr_policy->sl);
16906 rss_sub_policy_error:
16908 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16909 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16910 i = (mtr_policy->sub_policy_num >>
16911 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16912 MLX5_MTR_SUB_POLICY_NUM_MASK;
16913 mtr_policy->sub_policys[domain][i] = NULL;
16914 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16918 rte_spinlock_unlock(&mtr_policy->sl);
16923 * Find the policy table for prefix table with RSS.
16926 * Pointer to Ethernet device.
16927 * @param[in] mtr_policy
16928 * Pointer to meter policy table.
16929 * @param[in] rss_desc
16930 * Pointer to rss_desc
16932 * Pointer to table set on success, NULL otherwise and rte_errno is set.
16934 static struct mlx5_flow_meter_sub_policy *
16935 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16936 struct mlx5_flow_meter_policy *mtr_policy,
16937 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16939 struct mlx5_priv *priv = dev->data->dev_private;
16940 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16941 struct mlx5_flow_meter_info *next_fm;
16942 struct mlx5_flow_meter_policy *next_policy;
16943 struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16944 struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16945 struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16946 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16947 bool reuse_sub_policy;
16952 /* Iterate hierarchy to get all policies in this hierarchy. */
16953 policies[i++] = mtr_policy;
16954 if (!mtr_policy->is_hierarchy)
16956 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16957 DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16960 next_fm = mlx5_flow_meter_find(priv,
16961 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16963 DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16967 mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16969 MLX5_ASSERT(next_policy);
16970 mtr_policy = next_policy;
16974 * From last policy to the first one in hierarchy,
16975 * create / get the sub policy for each of them.
16977 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16981 &reuse_sub_policy);
16983 DRV_LOG(ERR, "Failed to get the sub policy.");
16986 if (!reuse_sub_policy)
16987 sub_policies[j++] = sub_policy;
16988 next_sub_policy = sub_policy;
16993 uint16_t sub_policy_num;
16995 sub_policy = sub_policies[--j];
16996 mtr_policy = sub_policy->main_policy;
16997 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16998 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16999 sub_policy_num = (mtr_policy->sub_policy_num >>
17000 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17001 MLX5_MTR_SUB_POLICY_NUM_MASK;
17002 mtr_policy->sub_policys[domain][sub_policy_num - 1] =
17005 mtr_policy->sub_policy_num &=
17006 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17007 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
17008 mtr_policy->sub_policy_num |=
17009 (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17010 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
17011 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17019 * Create the sub policy tag rule for all meters in hierarchy.
17022 * Pointer to Ethernet device.
17024 * Meter information table.
17025 * @param[in] src_port
17026 * The src port this extra rule should use.
17028 * The src port match item.
17029 * @param[out] error
17030 * Perform verbose error reporting if not NULL.
17032 * 0 on success, a negative errno value otherwise and rte_errno is set.
17035 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
17036 struct mlx5_flow_meter_info *fm,
17038 const struct rte_flow_item *item,
17039 struct rte_flow_error *error)
17041 struct mlx5_priv *priv = dev->data->dev_private;
17042 struct mlx5_flow_meter_policy *mtr_policy;
17043 struct mlx5_flow_meter_sub_policy *sub_policy;
17044 struct mlx5_flow_meter_info *next_fm = NULL;
17045 struct mlx5_flow_meter_policy *next_policy;
17046 struct mlx5_flow_meter_sub_policy *next_sub_policy;
17047 struct mlx5_flow_tbl_data_entry *tbl_data;
17048 struct mlx5_sub_policy_color_rule *color_rule;
17049 struct mlx5_meter_policy_acts acts;
17050 uint32_t color_reg_c_idx;
17051 bool mtr_first = (src_port != UINT16_MAX) ? true : false;
17052 struct rte_flow_attr attr = {
17053 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
17060 uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17063 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17064 MLX5_ASSERT(mtr_policy);
17065 if (!mtr_policy->is_hierarchy)
17067 next_fm = mlx5_flow_meter_find(priv,
17068 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17070 return rte_flow_error_set(error, EINVAL,
17071 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
17072 "Failed to find next meter in hierarchy.");
17074 if (!next_fm->drop_cnt)
17076 color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
17077 sub_policy = mtr_policy->sub_policys[domain][0];
17078 for (i = 0; i < RTE_COLORS; i++) {
17079 bool rule_exist = false;
17080 struct mlx5_meter_policy_action_container *act_cnt;
17082 if (i >= RTE_COLOR_YELLOW)
17084 TAILQ_FOREACH(color_rule,
17085 &sub_policy->color_rules[i], next_port)
17086 if (color_rule->src_port == src_port) {
17092 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
17093 sizeof(struct mlx5_sub_policy_color_rule),
17096 return rte_flow_error_set(error, ENOMEM,
17097 RTE_FLOW_ERROR_TYPE_ACTION,
17098 NULL, "No memory to create tag color rule.");
17099 color_rule->src_port = src_port;
17101 next_policy = mlx5_flow_meter_policy_find(dev,
17102 next_fm->policy_id, NULL);
17103 MLX5_ASSERT(next_policy);
17104 next_sub_policy = next_policy->sub_policys[domain][0];
17105 tbl_data = container_of(next_sub_policy->tbl_rsc,
17106 struct mlx5_flow_tbl_data_entry, tbl);
17107 act_cnt = &mtr_policy->act_cnt[i];
17109 acts.dv_actions[0] = next_fm->meter_action;
17110 acts.dv_actions[1] = act_cnt->modify_hdr->action;
17112 acts.dv_actions[0] = act_cnt->modify_hdr->action;
17113 acts.dv_actions[1] = next_fm->meter_action;
17115 acts.dv_actions[2] = tbl_data->jump.action;
17116 acts.actions_n = 3;
17117 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17121 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17122 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17124 &color_rule->matcher, error)) {
17125 rte_flow_error_set(error, errno,
17126 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17127 "Failed to create hierarchy meter matcher.");
17130 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17132 color_rule->matcher->matcher_object,
17133 acts.actions_n, acts.dv_actions,
17135 &color_rule->rule, &attr)) {
17136 rte_flow_error_set(error, errno,
17137 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17138 "Failed to create hierarchy meter rule.");
17141 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17142 color_rule, next_port);
17146 * Recursive call to iterate all meters in hierarchy and
17147 * create needed rules.
17149 return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17150 src_port, item, error);
17153 if (color_rule->rule)
17154 mlx5_flow_os_destroy_flow(color_rule->rule);
17155 if (color_rule->matcher) {
17156 struct mlx5_flow_tbl_data_entry *tbl =
17157 container_of(color_rule->matcher->tbl,
17158 typeof(*tbl), tbl);
17159 mlx5_list_unregister(tbl->matchers,
17160 &color_rule->matcher->entry);
17162 mlx5_free(color_rule);
17165 mlx5_flow_meter_detach(priv, next_fm);
17170 * Destroy the sub policy table with RX queue.
17173 * Pointer to Ethernet device.
17174 * @param[in] mtr_policy
17175 * Pointer to meter policy table.
17178 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17179 struct mlx5_flow_meter_policy *mtr_policy)
17181 struct mlx5_priv *priv = dev->data->dev_private;
17182 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17183 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17185 uint16_t sub_policy_num, new_policy_num;
17187 rte_spinlock_lock(&mtr_policy->sl);
17188 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17189 switch (mtr_policy->act_cnt[i].fate_action) {
17190 case MLX5_FLOW_FATE_SHARED_RSS:
17191 sub_policy_num = (mtr_policy->sub_policy_num >>
17192 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17193 MLX5_MTR_SUB_POLICY_NUM_MASK;
17194 new_policy_num = sub_policy_num;
17195 for (j = 0; j < sub_policy_num; j++) {
17197 mtr_policy->sub_policys[domain][j];
17199 __flow_dv_destroy_sub_policy_rules(dev,
17202 mtr_policy->sub_policys[domain][0]) {
17203 mtr_policy->sub_policys[domain][j] =
17206 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17212 if (new_policy_num != sub_policy_num) {
17213 mtr_policy->sub_policy_num &=
17214 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17215 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17216 mtr_policy->sub_policy_num |=
17218 MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17219 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17222 case MLX5_FLOW_FATE_QUEUE:
17223 sub_policy = mtr_policy->sub_policys[domain][0];
17224 __flow_dv_destroy_sub_policy_rules(dev,
17228 /*Other actions without queue and do nothing*/
17232 rte_spinlock_unlock(&mtr_policy->sl);
17235 * Check whether the DR drop action is supported on the root table or not.
17237 * Create a simple flow with DR drop action on root table to validate
17238 * if DR drop action on root table is supported or not.
17241 * Pointer to rte_eth_dev structure.
17244 * 0 on success, a negative errno value otherwise and rte_errno is set.
17247 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17249 struct mlx5_priv *priv = dev->data->dev_private;
17250 struct mlx5_dev_ctx_shared *sh = priv->sh;
17251 struct mlx5_flow_dv_match_params mask = {
17252 .size = sizeof(mask.buf),
17254 struct mlx5_flow_dv_match_params value = {
17255 .size = sizeof(value.buf),
17257 struct mlx5dv_flow_matcher_attr dv_attr = {
17258 .type = IBV_FLOW_ATTR_NORMAL,
17260 .match_criteria_enable = 0,
17261 .match_mask = (void *)&mask,
17263 struct mlx5_flow_tbl_resource *tbl = NULL;
17264 void *matcher = NULL;
17268 tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17272 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17273 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17274 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17275 tbl->obj, &matcher);
17278 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17279 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17280 &sh->dr_drop_action, &flow);
17283 * If DR drop action is not supported on root table, flow create will
17284 * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17288 (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17289 DRV_LOG(INFO, "DR drop action is not supported in root table.");
17291 DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17294 claim_zero(mlx5_flow_os_destroy_flow(flow));
17297 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17299 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17304 * Validate the batch counter support in root table.
17306 * Create a simple flow with invalid counter and drop action on root table to
17307 * validate if batch counter with offset on root table is supported or not.
17310 * Pointer to rte_eth_dev structure.
17313 * 0 on success, a negative errno value otherwise and rte_errno is set.
17316 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17318 struct mlx5_priv *priv = dev->data->dev_private;
17319 struct mlx5_dev_ctx_shared *sh = priv->sh;
17320 struct mlx5_flow_dv_match_params mask = {
17321 .size = sizeof(mask.buf),
17323 struct mlx5_flow_dv_match_params value = {
17324 .size = sizeof(value.buf),
17326 struct mlx5dv_flow_matcher_attr dv_attr = {
17327 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17329 .match_criteria_enable = 0,
17330 .match_mask = (void *)&mask,
17332 void *actions[2] = { 0 };
17333 struct mlx5_flow_tbl_resource *tbl = NULL;
17334 struct mlx5_devx_obj *dcs = NULL;
17335 void *matcher = NULL;
17339 tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17343 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17346 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17350 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17351 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17352 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17353 tbl->obj, &matcher);
17356 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17357 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17361 * If batch counter with offset is not supported, the driver will not
17362 * validate the invalid offset value, flow create should success.
17363 * In this case, it means batch counter is not supported in root table.
17365 * Otherwise, if flow create is failed, counter offset is supported.
17368 DRV_LOG(INFO, "Batch counter is not supported in root "
17369 "table. Switch to fallback mode.");
17370 rte_errno = ENOTSUP;
17372 claim_zero(mlx5_flow_os_destroy_flow(flow));
17374 /* Check matcher to make sure validate fail at flow create. */
17375 if (!matcher || (matcher && errno != EINVAL))
17376 DRV_LOG(ERR, "Unexpected error in counter offset "
17377 "support detection");
17381 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17383 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17385 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17387 claim_zero(mlx5_devx_cmd_destroy(dcs));
17392 * Query a devx counter.
17395 * Pointer to the Ethernet device structure.
17397 * Index to the flow counter.
17399 * Set to clear the counter statistics.
17401 * The statistics value of packets.
17402 * @param[out] bytes
17403 * The statistics value of bytes.
17406 * 0 on success, otherwise return -1.
17409 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17410 uint64_t *pkts, uint64_t *bytes)
17412 struct mlx5_priv *priv = dev->data->dev_private;
17413 struct mlx5_flow_counter *cnt;
17414 uint64_t inn_pkts, inn_bytes;
17417 if (!priv->sh->devx)
17420 ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17423 cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17424 *pkts = inn_pkts - cnt->hits;
17425 *bytes = inn_bytes - cnt->bytes;
17427 cnt->hits = inn_pkts;
17428 cnt->bytes = inn_bytes;
17434 * Get aged-out flows.
17437 * Pointer to the Ethernet device structure.
17438 * @param[in] context
17439 * The address of an array of pointers to the aged-out flows contexts.
17440 * @param[in] nb_contexts
17441 * The length of context array pointers.
17442 * @param[out] error
17443 * Perform verbose error reporting if not NULL. Initialized in case of
17447 * how many contexts get in success, otherwise negative errno value.
17448 * if nb_contexts is 0, return the amount of all aged contexts.
17449 * if nb_contexts is not 0 , return the amount of aged flows reported
17450 * in the context array.
17451 * @note: only stub for now
17454 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17456 uint32_t nb_contexts,
17457 struct rte_flow_error *error)
17459 struct mlx5_priv *priv = dev->data->dev_private;
17460 struct mlx5_age_info *age_info;
17461 struct mlx5_age_param *age_param;
17462 struct mlx5_flow_counter *counter;
17463 struct mlx5_aso_age_action *act;
17466 if (nb_contexts && !context)
17467 return rte_flow_error_set(error, EINVAL,
17468 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17469 NULL, "empty context");
17470 age_info = GET_PORT_AGE_INFO(priv);
17471 rte_spinlock_lock(&age_info->aged_sl);
17472 LIST_FOREACH(act, &age_info->aged_aso, next) {
17475 context[nb_flows - 1] =
17476 act->age_params.context;
17477 if (!(--nb_contexts))
17481 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17484 age_param = MLX5_CNT_TO_AGE(counter);
17485 context[nb_flows - 1] = age_param->context;
17486 if (!(--nb_contexts))
17490 rte_spinlock_unlock(&age_info->aged_sl);
17491 MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17496 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17499 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17501 return flow_dv_counter_alloc(dev, 0);
17505 * Validate indirect action.
17506 * Dispatcher for action type specific validation.
17509 * Pointer to the Ethernet device structure.
17511 * Indirect action configuration.
17512 * @param[in] action
17513 * The indirect action object to validate.
17514 * @param[out] error
17515 * Perform verbose error reporting if not NULL. Initialized in case of
17519 * 0 on success, otherwise negative errno value.
17522 flow_dv_action_validate(struct rte_eth_dev *dev,
17523 const struct rte_flow_indir_action_conf *conf,
17524 const struct rte_flow_action *action,
17525 struct rte_flow_error *err)
17527 struct mlx5_priv *priv = dev->data->dev_private;
17529 RTE_SET_USED(conf);
17530 switch (action->type) {
17531 case RTE_FLOW_ACTION_TYPE_RSS:
17533 * priv->obj_ops is set according to driver capabilities.
17534 * When DevX capabilities are
17535 * sufficient, it is set to devx_obj_ops.
17536 * Otherwise, it is set to ibv_obj_ops.
17537 * ibv_obj_ops doesn't support ind_table_modify operation.
17538 * In this case the indirect RSS action can't be used.
17540 if (priv->obj_ops.ind_table_modify == NULL)
17541 return rte_flow_error_set
17543 RTE_FLOW_ERROR_TYPE_ACTION,
17545 "Indirect RSS action not supported");
17546 return mlx5_validate_action_rss(dev, action, err);
17547 case RTE_FLOW_ACTION_TYPE_AGE:
17548 if (!priv->sh->aso_age_mng)
17549 return rte_flow_error_set(err, ENOTSUP,
17550 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17552 "Indirect age action not supported");
17553 return flow_dv_validate_action_age(0, action, dev, err);
17554 case RTE_FLOW_ACTION_TYPE_COUNT:
17555 return flow_dv_validate_action_count(dev, true, 0, err);
17556 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17557 if (!priv->sh->ct_aso_en)
17558 return rte_flow_error_set(err, ENOTSUP,
17559 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17560 "ASO CT is not supported");
17561 return mlx5_validate_action_ct(dev, action->conf, err);
17563 return rte_flow_error_set(err, ENOTSUP,
17564 RTE_FLOW_ERROR_TYPE_ACTION,
17566 "action type not supported");
17571 * Check if the RSS configurations for colors of a meter policy match
17572 * each other, except the queues.
17575 * Pointer to the first RSS flow action.
17577 * Pointer to the second RSS flow action.
17580 * 0 on match, 1 on conflict.
17583 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17584 const struct rte_flow_action_rss *r2)
17588 if (r1->func != r2->func || r1->level != r2->level ||
17589 r1->types != r2->types || r1->key_len != r2->key_len ||
17590 memcmp(r1->key, r2->key, r1->key_len))
17596 * Validate the meter hierarchy chain for meter policy.
17599 * Pointer to the Ethernet device structure.
17600 * @param[in] meter_id
17602 * @param[in] action_flags
17603 * Holds the actions detected until now.
17604 * @param[out] is_rss
17606 * @param[out] hierarchy_domain
17607 * The domain bitmap for hierarchy policy.
17608 * @param[out] error
17609 * Perform verbose error reporting if not NULL. Initialized in case of
17613 * 0 on success, otherwise negative errno value with error set.
17616 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17618 uint64_t action_flags,
17620 uint8_t *hierarchy_domain,
17621 struct rte_mtr_error *error)
17623 struct mlx5_priv *priv = dev->data->dev_private;
17624 struct mlx5_flow_meter_info *fm;
17625 struct mlx5_flow_meter_policy *policy;
17628 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17629 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17630 return -rte_mtr_error_set(error, EINVAL,
17631 RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17633 "Multiple fate actions not supported.");
17634 *hierarchy_domain = 0;
17636 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17638 return -rte_mtr_error_set(error, EINVAL,
17639 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17640 "Meter not found in meter hierarchy.");
17641 if (fm->def_policy)
17642 return -rte_mtr_error_set(error, EINVAL,
17643 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17644 "Non termination meter not supported in hierarchy.");
17645 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17646 MLX5_ASSERT(policy);
17648 * Only inherit the supported domains of the first meter in
17650 * One meter supports at least one domain.
17652 if (!*hierarchy_domain) {
17653 if (policy->transfer)
17654 *hierarchy_domain |=
17655 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17656 if (policy->ingress)
17657 *hierarchy_domain |=
17658 MLX5_MTR_DOMAIN_INGRESS_BIT;
17659 if (policy->egress)
17660 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17662 if (!policy->is_hierarchy) {
17663 *is_rss = policy->is_rss;
17666 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17667 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17668 return -rte_mtr_error_set(error, EINVAL,
17669 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17670 "Exceed max hierarchy meter number.");
17676 * Validate meter policy actions.
17677 * Dispatcher for action type specific validation.
17680 * Pointer to the Ethernet device structure.
17681 * @param[in] action
17682 * The meter policy action object to validate.
17684 * Attributes of flow to determine steering domain.
17685 * @param[out] error
17686 * Perform verbose error reporting if not NULL. Initialized in case of
17690 * 0 on success, otherwise negative errno value.
17693 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17694 const struct rte_flow_action *actions[RTE_COLORS],
17695 struct rte_flow_attr *attr,
17697 uint8_t *domain_bitmap,
17698 uint8_t *policy_mode,
17699 struct rte_mtr_error *error)
17701 struct mlx5_priv *priv = dev->data->dev_private;
17702 struct mlx5_dev_config *dev_conf = &priv->config;
17703 const struct rte_flow_action *act;
17704 uint64_t action_flags[RTE_COLORS] = {0};
17707 struct rte_flow_error flow_err;
17708 uint8_t domain_color[RTE_COLORS] = {0};
17709 uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17710 uint8_t hierarchy_domain = 0;
17711 const struct rte_flow_action_meter *mtr;
17712 bool def_green = false;
17713 bool def_yellow = false;
17714 const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17716 if (!priv->config.dv_esw_en)
17717 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17718 *domain_bitmap = def_domain;
17719 /* Red color could only support DROP action. */
17720 if (!actions[RTE_COLOR_RED] ||
17721 actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17722 return -rte_mtr_error_set(error, ENOTSUP,
17723 RTE_MTR_ERROR_TYPE_METER_POLICY,
17724 NULL, "Red color only supports drop action.");
17726 * Check default policy actions:
17727 * Green / Yellow: no action, Red: drop action
17728 * Either G or Y will trigger default policy actions to be created.
17730 if (!actions[RTE_COLOR_GREEN] ||
17731 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17733 if (!actions[RTE_COLOR_YELLOW] ||
17734 actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17736 if (def_green && def_yellow) {
17737 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17739 } else if (!def_green && def_yellow) {
17740 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17741 } else if (def_green && !def_yellow) {
17742 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17744 /* Set to empty string in case of NULL pointer access by user. */
17745 flow_err.message = "";
17746 for (i = 0; i < RTE_COLORS; i++) {
17748 for (action_flags[i] = 0, actions_n = 0;
17749 act && act->type != RTE_FLOW_ACTION_TYPE_END;
17751 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17752 return -rte_mtr_error_set(error, ENOTSUP,
17753 RTE_MTR_ERROR_TYPE_METER_POLICY,
17754 NULL, "too many actions");
17755 switch (act->type) {
17756 case RTE_FLOW_ACTION_TYPE_PORT_ID:
17757 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17758 if (!priv->config.dv_esw_en)
17759 return -rte_mtr_error_set(error,
17761 RTE_MTR_ERROR_TYPE_METER_POLICY,
17762 NULL, "PORT action validate check"
17763 " fail for ESW disable");
17764 ret = flow_dv_validate_action_port_id(dev,
17766 act, attr, &flow_err);
17768 return -rte_mtr_error_set(error,
17770 RTE_MTR_ERROR_TYPE_METER_POLICY,
17771 NULL, flow_err.message ?
17773 "PORT action validate check fail");
17775 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17777 case RTE_FLOW_ACTION_TYPE_MARK:
17778 ret = flow_dv_validate_action_mark(dev, act,
17782 return -rte_mtr_error_set(error,
17784 RTE_MTR_ERROR_TYPE_METER_POLICY,
17785 NULL, flow_err.message ?
17787 "Mark action validate check fail");
17788 if (dev_conf->dv_xmeta_en !=
17789 MLX5_XMETA_MODE_LEGACY)
17790 return -rte_mtr_error_set(error,
17792 RTE_MTR_ERROR_TYPE_METER_POLICY,
17793 NULL, "Extend MARK action is "
17794 "not supported. Please try use "
17795 "default policy for meter.");
17796 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17799 case RTE_FLOW_ACTION_TYPE_SET_TAG:
17800 ret = flow_dv_validate_action_set_tag(dev,
17801 act, action_flags[i],
17804 return -rte_mtr_error_set(error,
17806 RTE_MTR_ERROR_TYPE_METER_POLICY,
17807 NULL, flow_err.message ?
17809 "Set tag action validate check fail");
17810 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17813 case RTE_FLOW_ACTION_TYPE_DROP:
17814 ret = mlx5_flow_validate_action_drop
17815 (action_flags[i], attr, &flow_err);
17817 return -rte_mtr_error_set(error,
17819 RTE_MTR_ERROR_TYPE_METER_POLICY,
17820 NULL, flow_err.message ?
17822 "Drop action validate check fail");
17823 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17826 case RTE_FLOW_ACTION_TYPE_QUEUE:
17828 * Check whether extensive
17829 * metadata feature is engaged.
17831 if (dev_conf->dv_flow_en &&
17832 (dev_conf->dv_xmeta_en !=
17833 MLX5_XMETA_MODE_LEGACY) &&
17834 mlx5_flow_ext_mreg_supported(dev))
17835 return -rte_mtr_error_set(error,
17837 RTE_MTR_ERROR_TYPE_METER_POLICY,
17838 NULL, "Queue action with meta "
17839 "is not supported. Please try use "
17840 "default policy for meter.");
17841 ret = mlx5_flow_validate_action_queue(act,
17842 action_flags[i], dev,
17845 return -rte_mtr_error_set(error,
17847 RTE_MTR_ERROR_TYPE_METER_POLICY,
17848 NULL, flow_err.message ?
17850 "Queue action validate check fail");
17851 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17854 case RTE_FLOW_ACTION_TYPE_RSS:
17855 if (dev_conf->dv_flow_en &&
17856 (dev_conf->dv_xmeta_en !=
17857 MLX5_XMETA_MODE_LEGACY) &&
17858 mlx5_flow_ext_mreg_supported(dev))
17859 return -rte_mtr_error_set(error,
17861 RTE_MTR_ERROR_TYPE_METER_POLICY,
17862 NULL, "RSS action with meta "
17863 "is not supported. Please try use "
17864 "default policy for meter.");
17865 ret = mlx5_validate_action_rss(dev, act,
17868 return -rte_mtr_error_set(error,
17870 RTE_MTR_ERROR_TYPE_METER_POLICY,
17871 NULL, flow_err.message ?
17873 "RSS action validate check fail");
17874 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17876 /* Either G or Y will set the RSS. */
17877 rss_color[i] = act->conf;
17879 case RTE_FLOW_ACTION_TYPE_JUMP:
17880 ret = flow_dv_validate_action_jump(dev,
17881 NULL, act, action_flags[i],
17882 attr, true, &flow_err);
17884 return -rte_mtr_error_set(error,
17886 RTE_MTR_ERROR_TYPE_METER_POLICY,
17887 NULL, flow_err.message ?
17889 "Jump action validate check fail");
17891 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17894 * Only the last meter in the hierarchy will support
17895 * the YELLOW color steering. Then in the meter policy
17896 * actions list, there should be no other meter inside.
17898 case RTE_FLOW_ACTION_TYPE_METER:
17899 if (i != RTE_COLOR_GREEN)
17900 return -rte_mtr_error_set(error,
17902 RTE_MTR_ERROR_TYPE_METER_POLICY,
17904 "Meter hierarchy only supports GREEN color.");
17905 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17906 return -rte_mtr_error_set(error,
17908 RTE_MTR_ERROR_TYPE_METER_POLICY,
17910 "No yellow policy should be provided in meter hierarchy.");
17912 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17922 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17925 return -rte_mtr_error_set(error, ENOTSUP,
17926 RTE_MTR_ERROR_TYPE_METER_POLICY,
17928 "Doesn't support optional action");
17931 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
17932 domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17933 } else if ((action_flags[i] &
17934 (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17935 (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
17937 * Only support MLX5_XMETA_MODE_LEGACY
17938 * so MARK action is only in ingress domain.
17940 domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17942 domain_color[i] = def_domain;
17943 if (action_flags[i] &&
17944 !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17946 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17948 if (action_flags[i] &
17949 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17950 domain_color[i] &= hierarchy_domain;
17952 * Non-termination actions only support NIC Tx domain.
17953 * The adjustion should be skipped when there is no
17954 * action or only END is provided. The default domains
17955 * bit-mask is set to find the MIN intersection.
17956 * The action flags checking should also be skipped.
17958 if ((def_green && i == RTE_COLOR_GREEN) ||
17959 (def_yellow && i == RTE_COLOR_YELLOW))
17962 * Validate the drop action mutual exclusion
17963 * with other actions. Drop action is mutually-exclusive
17964 * with any other action, except for Count action.
17966 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17967 (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17968 return -rte_mtr_error_set(error, ENOTSUP,
17969 RTE_MTR_ERROR_TYPE_METER_POLICY,
17970 NULL, "Drop action is mutually-exclusive "
17971 "with any other action");
17973 /* Eswitch has few restrictions on using items and actions */
17974 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17975 if (!mlx5_flow_ext_mreg_supported(dev) &&
17976 action_flags[i] & MLX5_FLOW_ACTION_MARK)
17977 return -rte_mtr_error_set(error, ENOTSUP,
17978 RTE_MTR_ERROR_TYPE_METER_POLICY,
17979 NULL, "unsupported action MARK");
17980 if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17981 return -rte_mtr_error_set(error, ENOTSUP,
17982 RTE_MTR_ERROR_TYPE_METER_POLICY,
17983 NULL, "unsupported action QUEUE");
17984 if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17985 return -rte_mtr_error_set(error, ENOTSUP,
17986 RTE_MTR_ERROR_TYPE_METER_POLICY,
17987 NULL, "unsupported action RSS");
17988 if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17989 return -rte_mtr_error_set(error, ENOTSUP,
17990 RTE_MTR_ERROR_TYPE_METER_POLICY,
17991 NULL, "no fate action is found");
17993 if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17994 (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17995 if ((domain_color[i] &
17996 MLX5_MTR_DOMAIN_EGRESS_BIT))
17998 MLX5_MTR_DOMAIN_EGRESS_BIT;
18000 return -rte_mtr_error_set(error,
18002 RTE_MTR_ERROR_TYPE_METER_POLICY,
18004 "no fate action is found");
18008 /* If both colors have RSS, the attributes should be the same. */
18009 if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
18010 rss_color[RTE_COLOR_YELLOW]))
18011 return -rte_mtr_error_set(error, EINVAL,
18012 RTE_MTR_ERROR_TYPE_METER_POLICY,
18013 NULL, "policy RSS attr conflict");
18014 if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
18016 /* "domain_color[C]" is non-zero for each color, default is ALL. */
18017 if (!def_green && !def_yellow &&
18018 domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
18019 !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
18020 !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
18021 return -rte_mtr_error_set(error, EINVAL,
18022 RTE_MTR_ERROR_TYPE_METER_POLICY,
18023 NULL, "policy domains conflict");
18025 * At least one color policy is listed in the actions, the domains
18026 * to be supported should be the intersection.
18028 *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
18029 domain_color[RTE_COLOR_YELLOW];
18034 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
18036 struct mlx5_priv *priv = dev->data->dev_private;
18039 if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
18040 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
18045 if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
18046 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
18050 if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
18051 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
18059 * Discover the number of available flow priorities
18060 * by trying to create a flow with the highest priority value
18061 * for each possible number.
18066 * List of possible number of available priorities.
18067 * @param[in] vprio_n
18068 * Size of @p vprio array.
18070 * On success, number of available flow priorities.
18071 * On failure, a negative errno-style code and rte_errno is set.
18074 flow_dv_discover_priorities(struct rte_eth_dev *dev,
18075 const uint16_t *vprio, int vprio_n)
18077 struct mlx5_priv *priv = dev->data->dev_private;
18078 struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
18079 struct rte_flow_item_eth eth;
18080 struct rte_flow_item item = {
18081 .type = RTE_FLOW_ITEM_TYPE_ETH,
18085 struct mlx5_flow_dv_matcher matcher = {
18087 .size = sizeof(matcher.mask.buf),
18090 union mlx5_flow_tbl_key tbl_key;
18091 struct mlx5_flow flow;
18093 struct rte_flow_error error;
18095 int i, err, ret = -ENOTSUP;
18098 * Prepare a flow with a catch-all pattern and a drop action.
18099 * Use drop queue, because shared drop action may be unavailable.
18101 action = priv->drop_queue.hrxq->action;
18102 if (action == NULL) {
18103 DRV_LOG(ERR, "Priority discovery requires a drop action");
18104 rte_errno = ENOTSUP;
18107 memset(&flow, 0, sizeof(flow));
18108 flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
18109 if (flow.handle == NULL) {
18110 DRV_LOG(ERR, "Cannot create flow handle");
18111 rte_errno = ENOMEM;
18114 flow.ingress = true;
18115 flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
18116 flow.dv.actions[0] = action;
18117 flow.dv.actions_n = 1;
18118 memset(ð, 0, sizeof(eth));
18119 flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
18120 &item, /* inner */ false, /* group */ 0);
18121 matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
18122 for (i = 0; i < vprio_n; i++) {
18123 /* Configure the next proposed maximum priority. */
18124 matcher.priority = vprio[i] - 1;
18125 memset(&tbl_key, 0, sizeof(tbl_key));
18126 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18131 /* This action is pure SW and must always succeed. */
18132 DRV_LOG(ERR, "Cannot register matcher");
18136 /* Try to apply the flow to HW. */
18137 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18138 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18139 err = mlx5_flow_os_create_flow
18140 (flow.handle->dvh.matcher->matcher_object,
18141 (void *)&flow.dv.value, flow.dv.actions_n,
18142 flow.dv.actions, &flow.handle->drv_flow);
18144 claim_zero(mlx5_flow_os_destroy_flow
18145 (flow.handle->drv_flow));
18146 flow.handle->drv_flow = NULL;
18148 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18153 mlx5_ipool_free(pool, flow.handle_idx);
18154 /* Set rte_errno if no expected priority value matched. */
18160 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18161 .validate = flow_dv_validate,
18162 .prepare = flow_dv_prepare,
18163 .translate = flow_dv_translate,
18164 .apply = flow_dv_apply,
18165 .remove = flow_dv_remove,
18166 .destroy = flow_dv_destroy,
18167 .query = flow_dv_query,
18168 .create_mtr_tbls = flow_dv_create_mtr_tbls,
18169 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18170 .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18171 .create_meter = flow_dv_mtr_alloc,
18172 .free_meter = flow_dv_aso_mtr_release_to_pool,
18173 .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18174 .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18175 .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18176 .create_policy_rules = flow_dv_create_policy_rules,
18177 .destroy_policy_rules = flow_dv_destroy_policy_rules,
18178 .create_def_policy = flow_dv_create_def_policy,
18179 .destroy_def_policy = flow_dv_destroy_def_policy,
18180 .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18181 .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18182 .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18183 .counter_alloc = flow_dv_counter_allocate,
18184 .counter_free = flow_dv_counter_free,
18185 .counter_query = flow_dv_counter_query,
18186 .get_aged_flows = flow_dv_get_aged_flows,
18187 .action_validate = flow_dv_action_validate,
18188 .action_create = flow_dv_action_create,
18189 .action_destroy = flow_dv_action_destroy,
18190 .action_update = flow_dv_action_update,
18191 .action_query = flow_dv_action_query,
18192 .sync_domain = flow_dv_sync_domain,
18193 .discover_priorities = flow_dv_discover_priorities,
18194 .item_create = flow_dv_item_create,
18195 .item_release = flow_dv_item_release,
18198 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */