drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24 #include <rte_mtr.h>
  25 #include <rte_mtr_driver.h>
  26
  27 #include <mlx5_glue.h>
  28 #include <mlx5_devx_cmds.h>
  29 #include <mlx5_prm.h>
  30 #include <mlx5_malloc.h>
  31
  32 #include "mlx5_defs.h"
  33 #include "mlx5.h"
  34 #include "mlx5_common_os.h"
  35 #include "mlx5_flow.h"
  36 #include "mlx5_flow_os.h"
  37 #include "mlx5_rx.h"
  38 #include "mlx5_tx.h"
  39 #include "rte_pmd_mlx5.h"
  40
  41 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 static int
  77 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  78                              struct mlx5_flow_tbl_resource *tbl);
  79
  80 static int
  81 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  82                                      uint32_t encap_decap_idx);
  83
  84 static int
  85 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  86                                         uint32_t port_id);
  87 static void
  88 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  89
  90 static int
  91 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  92                                   uint32_t rix_jump);
  93
  94 /**
  95  * Initialize flow attributes structure according to flow items' types.
  96  *
  97  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  98  * mode. For tunnel mode, the items to be modified are the outermost ones.
  99  *
 100  * @param[in] item
 101  *   Pointer to item specification.
 102  * @param[out] attr
 103  *   Pointer to flow attributes structure.
 104  * @param[in] dev_flow
 105  *   Pointer to the sub flow.
 106  * @param[in] tunnel_decap
 107  *   Whether action is after tunnel decapsulation.
 108  */
 109 static void
 110 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 111                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 112 {
 113         uint64_t layers = dev_flow->handle->layers;
 114
 115         /*
 116          * If layers is already initialized, it means this dev_flow is the
 117          * suffix flow, the layers flags is set by the prefix flow. Need to
 118          * use the layer flags from prefix flow as the suffix flow may not
 119          * have the user defined items as the flow is split.
 120          */
 121         if (layers) {
 122                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 123                         attr->ipv4 = 1;
 124                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 125                         attr->ipv6 = 1;
 126                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 127                         attr->tcp = 1;
 128                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 129                         attr->udp = 1;
 130                 attr->valid = 1;
 131                 return;
 132         }
 133         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 134                 uint8_t next_protocol = 0xff;
 135                 switch (item->type) {
 136                 case RTE_FLOW_ITEM_TYPE_GRE:
 137                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 138                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 139                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 140                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 141                 case RTE_FLOW_ITEM_TYPE_MPLS:
 142                         if (tunnel_decap)
 143                                 attr->attr = 0;
 144                         break;
 145                 case RTE_FLOW_ITEM_TYPE_IPV4:
 146                         if (!attr->ipv6)
 147                                 attr->ipv4 = 1;
 148                         if (item->mask != NULL &&
 149                             ((const struct rte_flow_item_ipv4 *)
 150                             item->mask)->hdr.next_proto_id)
 151                                 next_protocol =
 152                                     ((const struct rte_flow_item_ipv4 *)
 153                                       (item->spec))->hdr.next_proto_id &
 154                                     ((const struct rte_flow_item_ipv4 *)
 155                                       (item->mask))->hdr.next_proto_id;
 156                         if ((next_protocol == IPPROTO_IPIP ||
 157                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 158                                 attr->attr = 0;
 159                         break;
 160                 case RTE_FLOW_ITEM_TYPE_IPV6:
 161                         if (!attr->ipv4)
 162                                 attr->ipv6 = 1;
 163                         if (item->mask != NULL &&
 164                             ((const struct rte_flow_item_ipv6 *)
 165                             item->mask)->hdr.proto)
 166                                 next_protocol =
 167                                     ((const struct rte_flow_item_ipv6 *)
 168                                       (item->spec))->hdr.proto &
 169                                     ((const struct rte_flow_item_ipv6 *)
 170                                       (item->mask))->hdr.proto;
 171                         if ((next_protocol == IPPROTO_IPIP ||
 172                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 173                                 attr->attr = 0;
 174                         break;
 175                 case RTE_FLOW_ITEM_TYPE_UDP:
 176                         if (!attr->tcp)
 177                                 attr->udp = 1;
 178                         break;
 179                 case RTE_FLOW_ITEM_TYPE_TCP:
 180                         if (!attr->udp)
 181                                 attr->tcp = 1;
 182                         break;
 183                 default:
 184                         break;
 185                 }
 186         }
 187         attr->valid = 1;
 188 }
 189
 190 /**
 191  * Convert rte_mtr_color to mlx5 color.
 192  *
 193  * @param[in] rcol
 194  *   rte_mtr_color.
 195  *
 196  * @return
 197  *   mlx5 color.
 198  */
 199 static int
 200 rte_col_2_mlx5_col(enum rte_color rcol)
 201 {
 202         switch (rcol) {
 203         case RTE_COLOR_GREEN:
 204                 return MLX5_FLOW_COLOR_GREEN;
 205         case RTE_COLOR_YELLOW:
 206                 return MLX5_FLOW_COLOR_YELLOW;
 207         case RTE_COLOR_RED:
 208                 return MLX5_FLOW_COLOR_RED;
 209         default:
 210                 break;
 211         }
 212         return MLX5_FLOW_COLOR_UNDEFINED;
 213 }
 214
 215 struct field_modify_info {
 216         uint32_t size; /* Size of field in protocol header, in bytes. */
 217         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 218         enum mlx5_modification_field id;
 219 };
 220
 221 struct field_modify_info modify_eth[] = {
 222         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 223         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 224         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 225         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 226         {0, 0, 0},
 227 };
 228
 229 struct field_modify_info modify_vlan_out_first_vid[] = {
 230         /* Size in bits !!! */
 231         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 232         {0, 0, 0},
 233 };
 234
 235 struct field_modify_info modify_ipv4[] = {
 236         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 237         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 238         {4, 12, MLX5_MODI_OUT_SIPV4},
 239         {4, 16, MLX5_MODI_OUT_DIPV4},
 240         {0, 0, 0},
 241 };
 242
 243 struct field_modify_info modify_ipv6[] = {
 244         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 245         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 246         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 247         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 248         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 249         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 250         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 251         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 252         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 253         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 254         {0, 0, 0},
 255 };
 256
 257 struct field_modify_info modify_udp[] = {
 258         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 259         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 260         {0, 0, 0},
 261 };
 262
 263 struct field_modify_info modify_tcp[] = {
 264         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 265         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 266         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 267         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 268         {0, 0, 0},
 269 };
 270
 271 static const struct rte_flow_item *
 272 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
 273 {
 274         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 275                 switch (item->type) {
 276                 default:
 277                         break;
 278                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 279                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 280                 case RTE_FLOW_ITEM_TYPE_GRE:
 281                 case RTE_FLOW_ITEM_TYPE_MPLS:
 282                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 283                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 284                         return item;
 285                 case RTE_FLOW_ITEM_TYPE_IPV4:
 286                 case RTE_FLOW_ITEM_TYPE_IPV6:
 287                         if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 288                             item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
 289                                 return item;
 290                         break;
 291                 }
 292         }
 293         return NULL;
 294 }
 295
 296 static void
 297 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 298                           uint8_t next_protocol, uint64_t *item_flags,
 299                           int *tunnel)
 300 {
 301         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 302                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 303         if (next_protocol == IPPROTO_IPIP) {
 304                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 305                 *tunnel = 1;
 306         }
 307         if (next_protocol == IPPROTO_IPV6) {
 308                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 309                 *tunnel = 1;
 310         }
 311 }
 312
 313 /* Update VLAN's VID/PCP based on input rte_flow_action.
 314  *
 315  * @param[in] action
 316  *   Pointer to struct rte_flow_action.
 317  * @param[out] vlan
 318  *   Pointer to struct rte_vlan_hdr.
 319  */
 320 static void
 321 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 322                          struct rte_vlan_hdr *vlan)
 323 {
 324         uint16_t vlan_tci;
 325         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 326                 vlan_tci =
 327                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 328                                                action->conf)->vlan_pcp;
 329                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 330                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 331                 vlan->vlan_tci |= vlan_tci;
 332         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 333                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 334                 vlan->vlan_tci |= rte_be_to_cpu_16
 335                     (((const struct rte_flow_action_of_set_vlan_vid *)
 336                                              action->conf)->vlan_vid);
 337         }
 338 }
 339
 340 /**
 341  * Fetch 1, 2, 3 or 4 byte field from the byte array
 342  * and return as unsigned integer in host-endian format.
 343  *
 344  * @param[in] data
 345  *   Pointer to data array.
 346  * @param[in] size
 347  *   Size of field to extract.
 348  *
 349  * @return
 350  *   converted field in host endian format.
 351  */
 352 static inline uint32_t
 353 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 354 {
 355         uint32_t ret;
 356
 357         switch (size) {
 358         case 1:
 359                 ret = *data;
 360                 break;
 361         case 2:
 362                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 363                 break;
 364         case 3:
 365                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 366                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 367                 break;
 368         case 4:
 369                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 370                 break;
 371         default:
 372                 MLX5_ASSERT(false);
 373                 ret = 0;
 374                 break;
 375         }
 376         return ret;
 377 }
 378
 379 /**
 380  * Convert modify-header action to DV specification.
 381  *
 382  * Data length of each action is determined by provided field description
 383  * and the item mask. Data bit offset and width of each action is determined
 384  * by provided item mask.
 385  *
 386  * @param[in] item
 387  *   Pointer to item specification.
 388  * @param[in] field
 389  *   Pointer to field modification information.
 390  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 391  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 392  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 393  * @param[in] dcopy
 394  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 395  *   Negative offset value sets the same offset as source offset.
 396  *   size field is ignored, value is taken from source field.
 397  * @param[in,out] resource
 398  *   Pointer to the modify-header resource.
 399  * @param[in] type
 400  *   Type of modification.
 401  * @param[out] error
 402  *   Pointer to the error structure.
 403  *
 404  * @return
 405  *   0 on success, a negative errno value otherwise and rte_errno is set.
 406  */
 407 static int
 408 flow_dv_convert_modify_action(struct rte_flow_item *item,
 409                               struct field_modify_info *field,
 410                               struct field_modify_info *dcopy,
 411                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 412                               uint32_t type, struct rte_flow_error *error)
 413 {
 414         uint32_t i = resource->actions_num;
 415         struct mlx5_modification_cmd *actions = resource->actions;
 416
 417         /*
 418          * The item and mask are provided in big-endian format.
 419          * The fields should be presented as in big-endian format either.
 420          * Mask must be always present, it defines the actual field width.
 421          */
 422         MLX5_ASSERT(item->mask);
 423         MLX5_ASSERT(field->size);
 424         do {
 425                 unsigned int size_b;
 426                 unsigned int off_b;
 427                 uint32_t mask;
 428                 uint32_t data;
 429
 430                 if (i >= MLX5_MAX_MODIFY_NUM)
 431                         return rte_flow_error_set(error, EINVAL,
 432                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 433                                  "too many items to modify");
 434                 /* Fetch variable byte size mask from the array. */
 435                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 436                                            field->offset, field->size);
 437                 if (!mask) {
 438                         ++field;
 439                         continue;
 440                 }
 441                 /* Deduce actual data width in bits from mask value. */
 442                 off_b = rte_bsf32(mask);
 443                 size_b = sizeof(uint32_t) * CHAR_BIT -
 444                          off_b - __builtin_clz(mask);
 445                 MLX5_ASSERT(size_b);
 446                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 447                 actions[i] = (struct mlx5_modification_cmd) {
 448                         .action_type = type,
 449                         .field = field->id,
 450                         .offset = off_b,
 451                         .length = size_b,
 452                 };
 453                 /* Convert entire record to expected big-endian format. */
 454                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 455                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 456                         MLX5_ASSERT(dcopy);
 457                         actions[i].dst_field = dcopy->id;
 458                         actions[i].dst_offset =
 459                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 460                         /* Convert entire record to big-endian format. */
 461                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 462                         ++dcopy;
 463                 } else {
 464                         MLX5_ASSERT(item->spec);
 465                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 466                                                    field->offset, field->size);
 467                         /* Shift out the trailing masked bits from data. */
 468                         data = (data & mask) >> off_b;
 469                         actions[i].data1 = rte_cpu_to_be_32(data);
 470                 }
 471                 ++i;
 472                 ++field;
 473         } while (field->size);
 474         if (resource->actions_num == i)
 475                 return rte_flow_error_set(error, EINVAL,
 476                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 477                                           "invalid modification flow item");
 478         resource->actions_num = i;
 479         return 0;
 480 }
 481
 482 /**
 483  * Convert modify-header set IPv4 address action to DV specification.
 484  *
 485  * @param[in,out] resource
 486  *   Pointer to the modify-header resource.
 487  * @param[in] action
 488  *   Pointer to action specification.
 489  * @param[out] error
 490  *   Pointer to the error structure.
 491  *
 492  * @return
 493  *   0 on success, a negative errno value otherwise and rte_errno is set.
 494  */
 495 static int
 496 flow_dv_convert_action_modify_ipv4
 497                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 498                          const struct rte_flow_action *action,
 499                          struct rte_flow_error *error)
 500 {
 501         const struct rte_flow_action_set_ipv4 *conf =
 502                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 503         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 504         struct rte_flow_item_ipv4 ipv4;
 505         struct rte_flow_item_ipv4 ipv4_mask;
 506
 507         memset(&ipv4, 0, sizeof(ipv4));
 508         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 509         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 510                 ipv4.hdr.src_addr = conf->ipv4_addr;
 511                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 512         } else {
 513                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 514                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 515         }
 516         item.spec = &ipv4;
 517         item.mask = &ipv4_mask;
 518         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 519                                              MLX5_MODIFICATION_TYPE_SET, error);
 520 }
 521
 522 /**
 523  * Convert modify-header set IPv6 address action to DV specification.
 524  *
 525  * @param[in,out] resource
 526  *   Pointer to the modify-header resource.
 527  * @param[in] action
 528  *   Pointer to action specification.
 529  * @param[out] error
 530  *   Pointer to the error structure.
 531  *
 532  * @return
 533  *   0 on success, a negative errno value otherwise and rte_errno is set.
 534  */
 535 static int
 536 flow_dv_convert_action_modify_ipv6
 537                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 538                          const struct rte_flow_action *action,
 539                          struct rte_flow_error *error)
 540 {
 541         const struct rte_flow_action_set_ipv6 *conf =
 542                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 543         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 544         struct rte_flow_item_ipv6 ipv6;
 545         struct rte_flow_item_ipv6 ipv6_mask;
 546
 547         memset(&ipv6, 0, sizeof(ipv6));
 548         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 549         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 550                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 551                        sizeof(ipv6.hdr.src_addr));
 552                 memcpy(&ipv6_mask.hdr.src_addr,
 553                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 554                        sizeof(ipv6.hdr.src_addr));
 555         } else {
 556                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 557                        sizeof(ipv6.hdr.dst_addr));
 558                 memcpy(&ipv6_mask.hdr.dst_addr,
 559                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 560                        sizeof(ipv6.hdr.dst_addr));
 561         }
 562         item.spec = &ipv6;
 563         item.mask = &ipv6_mask;
 564         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 565                                              MLX5_MODIFICATION_TYPE_SET, error);
 566 }
 567
 568 /**
 569  * Convert modify-header set MAC address action to DV specification.
 570  *
 571  * @param[in,out] resource
 572  *   Pointer to the modify-header resource.
 573  * @param[in] action
 574  *   Pointer to action specification.
 575  * @param[out] error
 576  *   Pointer to the error structure.
 577  *
 578  * @return
 579  *   0 on success, a negative errno value otherwise and rte_errno is set.
 580  */
 581 static int
 582 flow_dv_convert_action_modify_mac
 583                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 584                          const struct rte_flow_action *action,
 585                          struct rte_flow_error *error)
 586 {
 587         const struct rte_flow_action_set_mac *conf =
 588                 (const struct rte_flow_action_set_mac *)(action->conf);
 589         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 590         struct rte_flow_item_eth eth;
 591         struct rte_flow_item_eth eth_mask;
 592
 593         memset(&eth, 0, sizeof(eth));
 594         memset(&eth_mask, 0, sizeof(eth_mask));
 595         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 596                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 597                        sizeof(eth.src.addr_bytes));
 598                 memcpy(&eth_mask.src.addr_bytes,
 599                        &rte_flow_item_eth_mask.src.addr_bytes,
 600                        sizeof(eth_mask.src.addr_bytes));
 601         } else {
 602                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 603                        sizeof(eth.dst.addr_bytes));
 604                 memcpy(&eth_mask.dst.addr_bytes,
 605                        &rte_flow_item_eth_mask.dst.addr_bytes,
 606                        sizeof(eth_mask.dst.addr_bytes));
 607         }
 608         item.spec = &eth;
 609         item.mask = &eth_mask;
 610         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 611                                              MLX5_MODIFICATION_TYPE_SET, error);
 612 }
 613
 614 /**
 615  * Convert modify-header set VLAN VID action to DV specification.
 616  *
 617  * @param[in,out] resource
 618  *   Pointer to the modify-header resource.
 619  * @param[in] action
 620  *   Pointer to action specification.
 621  * @param[out] error
 622  *   Pointer to the error structure.
 623  *
 624  * @return
 625  *   0 on success, a negative errno value otherwise and rte_errno is set.
 626  */
 627 static int
 628 flow_dv_convert_action_modify_vlan_vid
 629                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 630                          const struct rte_flow_action *action,
 631                          struct rte_flow_error *error)
 632 {
 633         const struct rte_flow_action_of_set_vlan_vid *conf =
 634                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 635         int i = resource->actions_num;
 636         struct mlx5_modification_cmd *actions = resource->actions;
 637         struct field_modify_info *field = modify_vlan_out_first_vid;
 638
 639         if (i >= MLX5_MAX_MODIFY_NUM)
 640                 return rte_flow_error_set(error, EINVAL,
 641                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 642                          "too many items to modify");
 643         actions[i] = (struct mlx5_modification_cmd) {
 644                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 645                 .field = field->id,
 646                 .length = field->size,
 647                 .offset = field->offset,
 648         };
 649         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 650         actions[i].data1 = conf->vlan_vid;
 651         actions[i].data1 = actions[i].data1 << 16;
 652         resource->actions_num = ++i;
 653         return 0;
 654 }
 655
 656 /**
 657  * Convert modify-header set TP action to DV specification.
 658  *
 659  * @param[in,out] resource
 660  *   Pointer to the modify-header resource.
 661  * @param[in] action
 662  *   Pointer to action specification.
 663  * @param[in] items
 664  *   Pointer to rte_flow_item objects list.
 665  * @param[in] attr
 666  *   Pointer to flow attributes structure.
 667  * @param[in] dev_flow
 668  *   Pointer to the sub flow.
 669  * @param[in] tunnel_decap
 670  *   Whether action is after tunnel decapsulation.
 671  * @param[out] error
 672  *   Pointer to the error structure.
 673  *
 674  * @return
 675  *   0 on success, a negative errno value otherwise and rte_errno is set.
 676  */
 677 static int
 678 flow_dv_convert_action_modify_tp
 679                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 680                          const struct rte_flow_action *action,
 681                          const struct rte_flow_item *items,
 682                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 683                          bool tunnel_decap, struct rte_flow_error *error)
 684 {
 685         const struct rte_flow_action_set_tp *conf =
 686                 (const struct rte_flow_action_set_tp *)(action->conf);
 687         struct rte_flow_item item;
 688         struct rte_flow_item_udp udp;
 689         struct rte_flow_item_udp udp_mask;
 690         struct rte_flow_item_tcp tcp;
 691         struct rte_flow_item_tcp tcp_mask;
 692         struct field_modify_info *field;
 693
 694         if (!attr->valid)
 695                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 696         if (attr->udp) {
 697                 memset(&udp, 0, sizeof(udp));
 698                 memset(&udp_mask, 0, sizeof(udp_mask));
 699                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 700                         udp.hdr.src_port = conf->port;
 701                         udp_mask.hdr.src_port =
 702                                         rte_flow_item_udp_mask.hdr.src_port;
 703                 } else {
 704                         udp.hdr.dst_port = conf->port;
 705                         udp_mask.hdr.dst_port =
 706                                         rte_flow_item_udp_mask.hdr.dst_port;
 707                 }
 708                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 709                 item.spec = &udp;
 710                 item.mask = &udp_mask;
 711                 field = modify_udp;
 712         } else {
 713                 MLX5_ASSERT(attr->tcp);
 714                 memset(&tcp, 0, sizeof(tcp));
 715                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 716                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 717                         tcp.hdr.src_port = conf->port;
 718                         tcp_mask.hdr.src_port =
 719                                         rte_flow_item_tcp_mask.hdr.src_port;
 720                 } else {
 721                         tcp.hdr.dst_port = conf->port;
 722                         tcp_mask.hdr.dst_port =
 723                                         rte_flow_item_tcp_mask.hdr.dst_port;
 724                 }
 725                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 726                 item.spec = &tcp;
 727                 item.mask = &tcp_mask;
 728                 field = modify_tcp;
 729         }
 730         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 731                                              MLX5_MODIFICATION_TYPE_SET, error);
 732 }
 733
 734 /**
 735  * Convert modify-header set TTL action to DV specification.
 736  *
 737  * @param[in,out] resource
 738  *   Pointer to the modify-header resource.
 739  * @param[in] action
 740  *   Pointer to action specification.
 741  * @param[in] items
 742  *   Pointer to rte_flow_item objects list.
 743  * @param[in] attr
 744  *   Pointer to flow attributes structure.
 745  * @param[in] dev_flow
 746  *   Pointer to the sub flow.
 747  * @param[in] tunnel_decap
 748  *   Whether action is after tunnel decapsulation.
 749  * @param[out] error
 750  *   Pointer to the error structure.
 751  *
 752  * @return
 753  *   0 on success, a negative errno value otherwise and rte_errno is set.
 754  */
 755 static int
 756 flow_dv_convert_action_modify_ttl
 757                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 758                          const struct rte_flow_action *action,
 759                          const struct rte_flow_item *items,
 760                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 761                          bool tunnel_decap, struct rte_flow_error *error)
 762 {
 763         const struct rte_flow_action_set_ttl *conf =
 764                 (const struct rte_flow_action_set_ttl *)(action->conf);
 765         struct rte_flow_item item;
 766         struct rte_flow_item_ipv4 ipv4;
 767         struct rte_flow_item_ipv4 ipv4_mask;
 768         struct rte_flow_item_ipv6 ipv6;
 769         struct rte_flow_item_ipv6 ipv6_mask;
 770         struct field_modify_info *field;
 771
 772         if (!attr->valid)
 773                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 774         if (attr->ipv4) {
 775                 memset(&ipv4, 0, sizeof(ipv4));
 776                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 777                 ipv4.hdr.time_to_live = conf->ttl_value;
 778                 ipv4_mask.hdr.time_to_live = 0xFF;
 779                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 780                 item.spec = &ipv4;
 781                 item.mask = &ipv4_mask;
 782                 field = modify_ipv4;
 783         } else {
 784                 MLX5_ASSERT(attr->ipv6);
 785                 memset(&ipv6, 0, sizeof(ipv6));
 786                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 787                 ipv6.hdr.hop_limits = conf->ttl_value;
 788                 ipv6_mask.hdr.hop_limits = 0xFF;
 789                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 790                 item.spec = &ipv6;
 791                 item.mask = &ipv6_mask;
 792                 field = modify_ipv6;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header decrement TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_dec_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_item *items,
 823                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 824                          bool tunnel_decap, struct rte_flow_error *error)
 825 {
 826         struct rte_flow_item item;
 827         struct rte_flow_item_ipv4 ipv4;
 828         struct rte_flow_item_ipv4 ipv4_mask;
 829         struct rte_flow_item_ipv6 ipv6;
 830         struct rte_flow_item_ipv6 ipv6_mask;
 831         struct field_modify_info *field;
 832
 833         if (!attr->valid)
 834                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 835         if (attr->ipv4) {
 836                 memset(&ipv4, 0, sizeof(ipv4));
 837                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 838                 ipv4.hdr.time_to_live = 0xFF;
 839                 ipv4_mask.hdr.time_to_live = 0xFF;
 840                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 841                 item.spec = &ipv4;
 842                 item.mask = &ipv4_mask;
 843                 field = modify_ipv4;
 844         } else {
 845                 MLX5_ASSERT(attr->ipv6);
 846                 memset(&ipv6, 0, sizeof(ipv6));
 847                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 848                 ipv6.hdr.hop_limits = 0xFF;
 849                 ipv6_mask.hdr.hop_limits = 0xFF;
 850                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 851                 item.spec = &ipv6;
 852                 item.mask = &ipv6_mask;
 853                 field = modify_ipv6;
 854         }
 855         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 856                                              MLX5_MODIFICATION_TYPE_ADD, error);
 857 }
 858
 859 /**
 860  * Convert modify-header increment/decrement TCP Sequence number
 861  * to DV specification.
 862  *
 863  * @param[in,out] resource
 864  *   Pointer to the modify-header resource.
 865  * @param[in] action
 866  *   Pointer to action specification.
 867  * @param[out] error
 868  *   Pointer to the error structure.
 869  *
 870  * @return
 871  *   0 on success, a negative errno value otherwise and rte_errno is set.
 872  */
 873 static int
 874 flow_dv_convert_action_modify_tcp_seq
 875                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 876                          const struct rte_flow_action *action,
 877                          struct rte_flow_error *error)
 878 {
 879         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 880         uint64_t value = rte_be_to_cpu_32(*conf);
 881         struct rte_flow_item item;
 882         struct rte_flow_item_tcp tcp;
 883         struct rte_flow_item_tcp tcp_mask;
 884
 885         memset(&tcp, 0, sizeof(tcp));
 886         memset(&tcp_mask, 0, sizeof(tcp_mask));
 887         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 888                 /*
 889                  * The HW has no decrement operation, only increment operation.
 890                  * To simulate decrement X from Y using increment operation
 891                  * we need to add UINT32_MAX X times to Y.
 892                  * Each adding of UINT32_MAX decrements Y by 1.
 893                  */
 894                 value *= UINT32_MAX;
 895         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 896         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 897         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 898         item.spec = &tcp;
 899         item.mask = &tcp_mask;
 900         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 901                                              MLX5_MODIFICATION_TYPE_ADD, error);
 902 }
 903
 904 /**
 905  * Convert modify-header increment/decrement TCP Acknowledgment number
 906  * to DV specification.
 907  *
 908  * @param[in,out] resource
 909  *   Pointer to the modify-header resource.
 910  * @param[in] action
 911  *   Pointer to action specification.
 912  * @param[out] error
 913  *   Pointer to the error structure.
 914  *
 915  * @return
 916  *   0 on success, a negative errno value otherwise and rte_errno is set.
 917  */
 918 static int
 919 flow_dv_convert_action_modify_tcp_ack
 920                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 921                          const struct rte_flow_action *action,
 922                          struct rte_flow_error *error)
 923 {
 924         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 925         uint64_t value = rte_be_to_cpu_32(*conf);
 926         struct rte_flow_item item;
 927         struct rte_flow_item_tcp tcp;
 928         struct rte_flow_item_tcp tcp_mask;
 929
 930         memset(&tcp, 0, sizeof(tcp));
 931         memset(&tcp_mask, 0, sizeof(tcp_mask));
 932         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 933                 /*
 934                  * The HW has no decrement operation, only increment operation.
 935                  * To simulate decrement X from Y using increment operation
 936                  * we need to add UINT32_MAX X times to Y.
 937                  * Each adding of UINT32_MAX decrements Y by 1.
 938                  */
 939                 value *= UINT32_MAX;
 940         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 941         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 942         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 943         item.spec = &tcp;
 944         item.mask = &tcp_mask;
 945         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 946                                              MLX5_MODIFICATION_TYPE_ADD, error);
 947 }
 948
 949 static enum mlx5_modification_field reg_to_field[] = {
 950         [REG_NON] = MLX5_MODI_OUT_NONE,
 951         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 952         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 953         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 954         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 955         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 956         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 957         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 958         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 959         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 960         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 961 };
 962
 963 /**
 964  * Convert register set to DV specification.
 965  *
 966  * @param[in,out] resource
 967  *   Pointer to the modify-header resource.
 968  * @param[in] action
 969  *   Pointer to action specification.
 970  * @param[out] error
 971  *   Pointer to the error structure.
 972  *
 973  * @return
 974  *   0 on success, a negative errno value otherwise and rte_errno is set.
 975  */
 976 static int
 977 flow_dv_convert_action_set_reg
 978                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 979                          const struct rte_flow_action *action,
 980                          struct rte_flow_error *error)
 981 {
 982         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 983         struct mlx5_modification_cmd *actions = resource->actions;
 984         uint32_t i = resource->actions_num;
 985
 986         if (i >= MLX5_MAX_MODIFY_NUM)
 987                 return rte_flow_error_set(error, EINVAL,
 988                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 989                                           "too many items to modify");
 990         MLX5_ASSERT(conf->id != REG_NON);
 991         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
 992         actions[i] = (struct mlx5_modification_cmd) {
 993                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 994                 .field = reg_to_field[conf->id],
 995                 .offset = conf->offset,
 996                 .length = conf->length,
 997         };
 998         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 999         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1000         ++i;
1001         resource->actions_num = i;
1002         return 0;
1003 }
1004
1005 /**
1006  * Convert SET_TAG action to DV specification.
1007  *
1008  * @param[in] dev
1009  *   Pointer to the rte_eth_dev structure.
1010  * @param[in,out] resource
1011  *   Pointer to the modify-header resource.
1012  * @param[in] conf
1013  *   Pointer to action specification.
1014  * @param[out] error
1015  *   Pointer to the error structure.
1016  *
1017  * @return
1018  *   0 on success, a negative errno value otherwise and rte_errno is set.
1019  */
1020 static int
1021 flow_dv_convert_action_set_tag
1022                         (struct rte_eth_dev *dev,
1023                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1024                          const struct rte_flow_action_set_tag *conf,
1025                          struct rte_flow_error *error)
1026 {
1027         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1028         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1029         struct rte_flow_item item = {
1030                 .spec = &data,
1031                 .mask = &mask,
1032         };
1033         struct field_modify_info reg_c_x[] = {
1034                 [1] = {0, 0, 0},
1035         };
1036         enum mlx5_modification_field reg_type;
1037         int ret;
1038
1039         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1040         if (ret < 0)
1041                 return ret;
1042         MLX5_ASSERT(ret != REG_NON);
1043         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1044         reg_type = reg_to_field[ret];
1045         MLX5_ASSERT(reg_type > 0);
1046         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1047         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1048                                              MLX5_MODIFICATION_TYPE_SET, error);
1049 }
1050
1051 /**
1052  * Convert internal COPY_REG action to DV specification.
1053  *
1054  * @param[in] dev
1055  *   Pointer to the rte_eth_dev structure.
1056  * @param[in,out] res
1057  *   Pointer to the modify-header resource.
1058  * @param[in] action
1059  *   Pointer to action specification.
1060  * @param[out] error
1061  *   Pointer to the error structure.
1062  *
1063  * @return
1064  *   0 on success, a negative errno value otherwise and rte_errno is set.
1065  */
1066 static int
1067 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1068                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1069                                  const struct rte_flow_action *action,
1070                                  struct rte_flow_error *error)
1071 {
1072         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1073         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1074         struct rte_flow_item item = {
1075                 .spec = NULL,
1076                 .mask = &mask,
1077         };
1078         struct field_modify_info reg_src[] = {
1079                 {4, 0, reg_to_field[conf->src]},
1080                 {0, 0, 0},
1081         };
1082         struct field_modify_info reg_dst = {
1083                 .offset = 0,
1084                 .id = reg_to_field[conf->dst],
1085         };
1086         /* Adjust reg_c[0] usage according to reported mask. */
1087         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1088                 struct mlx5_priv *priv = dev->data->dev_private;
1089                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1090
1091                 MLX5_ASSERT(reg_c0);
1092                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1093                 if (conf->dst == REG_C_0) {
1094                         /* Copy to reg_c[0], within mask only. */
1095                         reg_dst.offset = rte_bsf32(reg_c0);
1096                         /*
1097                          * Mask is ignoring the enianness, because
1098                          * there is no conversion in datapath.
1099                          */
1100 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1101                         /* Copy from destination lower bits to reg_c[0]. */
1102                         mask = reg_c0 >> reg_dst.offset;
1103 #else
1104                         /* Copy from destination upper bits to reg_c[0]. */
1105                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1106                                           rte_fls_u32(reg_c0));
1107 #endif
1108                 } else {
1109                         mask = rte_cpu_to_be_32(reg_c0);
1110 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1111                         /* Copy from reg_c[0] to destination lower bits. */
1112                         reg_dst.offset = 0;
1113 #else
1114                         /* Copy from reg_c[0] to destination upper bits. */
1115                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1116                                          (rte_fls_u32(reg_c0) -
1117                                           rte_bsf32(reg_c0));
1118 #endif
1119                 }
1120         }
1121         return flow_dv_convert_modify_action(&item,
1122                                              reg_src, &reg_dst, res,
1123                                              MLX5_MODIFICATION_TYPE_COPY,
1124                                              error);
1125 }
1126
1127 /**
1128  * Convert MARK action to DV specification. This routine is used
1129  * in extensive metadata only and requires metadata register to be
1130  * handled. In legacy mode hardware tag resource is engaged.
1131  *
1132  * @param[in] dev
1133  *   Pointer to the rte_eth_dev structure.
1134  * @param[in] conf
1135  *   Pointer to MARK action specification.
1136  * @param[in,out] resource
1137  *   Pointer to the modify-header resource.
1138  * @param[out] error
1139  *   Pointer to the error structure.
1140  *
1141  * @return
1142  *   0 on success, a negative errno value otherwise and rte_errno is set.
1143  */
1144 static int
1145 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1146                             const struct rte_flow_action_mark *conf,
1147                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1148                             struct rte_flow_error *error)
1149 {
1150         struct mlx5_priv *priv = dev->data->dev_private;
1151         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1152                                            priv->sh->dv_mark_mask);
1153         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1154         struct rte_flow_item item = {
1155                 .spec = &data,
1156                 .mask = &mask,
1157         };
1158         struct field_modify_info reg_c_x[] = {
1159                 [1] = {0, 0, 0},
1160         };
1161         int reg;
1162
1163         if (!mask)
1164                 return rte_flow_error_set(error, EINVAL,
1165                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1166                                           NULL, "zero mark action mask");
1167         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1168         if (reg < 0)
1169                 return reg;
1170         MLX5_ASSERT(reg > 0);
1171         if (reg == REG_C_0) {
1172                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1173                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1174
1175                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1176                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1177                 mask = rte_cpu_to_be_32(mask << shl_c0);
1178         }
1179         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1180         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1181                                              MLX5_MODIFICATION_TYPE_SET, error);
1182 }
1183
1184 /**
1185  * Get metadata register index for specified steering domain.
1186  *
1187  * @param[in] dev
1188  *   Pointer to the rte_eth_dev structure.
1189  * @param[in] attr
1190  *   Attributes of flow to determine steering domain.
1191  * @param[out] error
1192  *   Pointer to the error structure.
1193  *
1194  * @return
1195  *   positive index on success, a negative errno value otherwise
1196  *   and rte_errno is set.
1197  */
1198 static enum modify_reg
1199 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1200                          const struct rte_flow_attr *attr,
1201                          struct rte_flow_error *error)
1202 {
1203         int reg =
1204                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1205                                           MLX5_METADATA_FDB :
1206                                             attr->egress ?
1207                                             MLX5_METADATA_TX :
1208                                             MLX5_METADATA_RX, 0, error);
1209         if (reg < 0)
1210                 return rte_flow_error_set(error,
1211                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1212                                           NULL, "unavailable "
1213                                           "metadata register");
1214         return reg;
1215 }
1216
1217 /**
1218  * Convert SET_META action to DV specification.
1219  *
1220  * @param[in] dev
1221  *   Pointer to the rte_eth_dev structure.
1222  * @param[in,out] resource
1223  *   Pointer to the modify-header resource.
1224  * @param[in] attr
1225  *   Attributes of flow that includes this item.
1226  * @param[in] conf
1227  *   Pointer to action specification.
1228  * @param[out] error
1229  *   Pointer to the error structure.
1230  *
1231  * @return
1232  *   0 on success, a negative errno value otherwise and rte_errno is set.
1233  */
1234 static int
1235 flow_dv_convert_action_set_meta
1236                         (struct rte_eth_dev *dev,
1237                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1238                          const struct rte_flow_attr *attr,
1239                          const struct rte_flow_action_set_meta *conf,
1240                          struct rte_flow_error *error)
1241 {
1242         uint32_t data = conf->data;
1243         uint32_t mask = conf->mask;
1244         struct rte_flow_item item = {
1245                 .spec = &data,
1246                 .mask = &mask,
1247         };
1248         struct field_modify_info reg_c_x[] = {
1249                 [1] = {0, 0, 0},
1250         };
1251         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1252
1253         if (reg < 0)
1254                 return reg;
1255         MLX5_ASSERT(reg != REG_NON);
1256         /*
1257          * In datapath code there is no endianness
1258          * coversions for perfromance reasons, all
1259          * pattern conversions are done in rte_flow.
1260          */
1261         if (reg == REG_C_0) {
1262                 struct mlx5_priv *priv = dev->data->dev_private;
1263                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1264                 uint32_t shl_c0;
1265
1266                 MLX5_ASSERT(msk_c0);
1267 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1268                 shl_c0 = rte_bsf32(msk_c0);
1269 #else
1270                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1271 #endif
1272                 mask <<= shl_c0;
1273                 data <<= shl_c0;
1274                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1275         }
1276         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1277         /* The routine expects parameters in memory as big-endian ones. */
1278         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1279                                              MLX5_MODIFICATION_TYPE_SET, error);
1280 }
1281
1282 /**
1283  * Convert modify-header set IPv4 DSCP action to DV specification.
1284  *
1285  * @param[in,out] resource
1286  *   Pointer to the modify-header resource.
1287  * @param[in] action
1288  *   Pointer to action specification.
1289  * @param[out] error
1290  *   Pointer to the error structure.
1291  *
1292  * @return
1293  *   0 on success, a negative errno value otherwise and rte_errno is set.
1294  */
1295 static int
1296 flow_dv_convert_action_modify_ipv4_dscp
1297                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1298                          const struct rte_flow_action *action,
1299                          struct rte_flow_error *error)
1300 {
1301         const struct rte_flow_action_set_dscp *conf =
1302                 (const struct rte_flow_action_set_dscp *)(action->conf);
1303         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1304         struct rte_flow_item_ipv4 ipv4;
1305         struct rte_flow_item_ipv4 ipv4_mask;
1306
1307         memset(&ipv4, 0, sizeof(ipv4));
1308         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1309         ipv4.hdr.type_of_service = conf->dscp;
1310         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1311         item.spec = &ipv4;
1312         item.mask = &ipv4_mask;
1313         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1314                                              MLX5_MODIFICATION_TYPE_SET, error);
1315 }
1316
1317 /**
1318  * Convert modify-header set IPv6 DSCP action to DV specification.
1319  *
1320  * @param[in,out] resource
1321  *   Pointer to the modify-header resource.
1322  * @param[in] action
1323  *   Pointer to action specification.
1324  * @param[out] error
1325  *   Pointer to the error structure.
1326  *
1327  * @return
1328  *   0 on success, a negative errno value otherwise and rte_errno is set.
1329  */
1330 static int
1331 flow_dv_convert_action_modify_ipv6_dscp
1332                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1333                          const struct rte_flow_action *action,
1334                          struct rte_flow_error *error)
1335 {
1336         const struct rte_flow_action_set_dscp *conf =
1337                 (const struct rte_flow_action_set_dscp *)(action->conf);
1338         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1339         struct rte_flow_item_ipv6 ipv6;
1340         struct rte_flow_item_ipv6 ipv6_mask;
1341
1342         memset(&ipv6, 0, sizeof(ipv6));
1343         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1344         /*
1345          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1346          * rdma-core only accept the DSCP bits byte aligned start from
1347          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1348          * bits in IPv6 case as rdma-core requires byte aligned value.
1349          */
1350         ipv6.hdr.vtc_flow = conf->dscp;
1351         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1352         item.spec = &ipv6;
1353         item.mask = &ipv6_mask;
1354         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1355                                              MLX5_MODIFICATION_TYPE_SET, error);
1356 }
1357
1358 static int
1359 mlx5_flow_item_field_width(enum rte_flow_field_id field)
1360 {
1361         switch (field) {
1362         case RTE_FLOW_FIELD_START:
1363                 return 32;
1364         case RTE_FLOW_FIELD_MAC_DST:
1365         case RTE_FLOW_FIELD_MAC_SRC:
1366                 return 48;
1367         case RTE_FLOW_FIELD_VLAN_TYPE:
1368                 return 16;
1369         case RTE_FLOW_FIELD_VLAN_ID:
1370                 return 12;
1371         case RTE_FLOW_FIELD_MAC_TYPE:
1372                 return 16;
1373         case RTE_FLOW_FIELD_IPV4_DSCP:
1374                 return 6;
1375         case RTE_FLOW_FIELD_IPV4_TTL:
1376                 return 8;
1377         case RTE_FLOW_FIELD_IPV4_SRC:
1378         case RTE_FLOW_FIELD_IPV4_DST:
1379                 return 32;
1380         case RTE_FLOW_FIELD_IPV6_DSCP:
1381                 return 6;
1382         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1383                 return 8;
1384         case RTE_FLOW_FIELD_IPV6_SRC:
1385         case RTE_FLOW_FIELD_IPV6_DST:
1386                 return 128;
1387         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1388         case RTE_FLOW_FIELD_TCP_PORT_DST:
1389                 return 16;
1390         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1391         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1392                 return 32;
1393         case RTE_FLOW_FIELD_TCP_FLAGS:
1394                 return 9;
1395         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1396         case RTE_FLOW_FIELD_UDP_PORT_DST:
1397                 return 16;
1398         case RTE_FLOW_FIELD_VXLAN_VNI:
1399         case RTE_FLOW_FIELD_GENEVE_VNI:
1400                 return 24;
1401         case RTE_FLOW_FIELD_GTP_TEID:
1402         case RTE_FLOW_FIELD_TAG:
1403                 return 32;
1404         case RTE_FLOW_FIELD_MARK:
1405                 return 24;
1406         case RTE_FLOW_FIELD_META:
1407                 return 32;
1408         case RTE_FLOW_FIELD_POINTER:
1409         case RTE_FLOW_FIELD_VALUE:
1410                 return 64;
1411         default:
1412                 MLX5_ASSERT(false);
1413         }
1414         return 0;
1415 }
1416
1417 static void
1418 mlx5_flow_field_id_to_modify_info
1419                 (const struct rte_flow_action_modify_data *data,
1420                  struct field_modify_info *info,
1421                  uint32_t *mask, uint32_t *value,
1422                  uint32_t width, uint32_t dst_width,
1423                  struct rte_eth_dev *dev,
1424                  const struct rte_flow_attr *attr,
1425                  struct rte_flow_error *error)
1426 {
1427         uint32_t idx = 0;
1428         uint64_t val = 0;
1429         switch (data->field) {
1430         case RTE_FLOW_FIELD_START:
1431                 /* not supported yet */
1432                 MLX5_ASSERT(false);
1433                 break;
1434         case RTE_FLOW_FIELD_MAC_DST:
1435                 if (mask) {
1436                         if (data->offset < 32) {
1437                                 info[idx] = (struct field_modify_info){4, 0,
1438                                                 MLX5_MODI_OUT_DMAC_47_16};
1439                                 if (width < 32) {
1440                                         mask[idx] =
1441                                                 rte_cpu_to_be_32(0xffffffff >>
1442                                                                  (32 - width));
1443                                         width = 0;
1444                                 } else {
1445                                         mask[idx] = RTE_BE32(0xffffffff);
1446                                         width -= 32;
1447                                 }
1448                                 if (!width)
1449                                         break;
1450                                 ++idx;
1451                         }
1452                         info[idx] = (struct field_modify_info){2, 4 * idx,
1453                                                 MLX5_MODI_OUT_DMAC_15_0};
1454                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1455                 } else {
1456                         if (data->offset < 32)
1457                                 info[idx++] = (struct field_modify_info){4, 0,
1458                                                 MLX5_MODI_OUT_DMAC_47_16};
1459                         info[idx] = (struct field_modify_info){2, 0,
1460                                                 MLX5_MODI_OUT_DMAC_15_0};
1461                 }
1462                 break;
1463         case RTE_FLOW_FIELD_MAC_SRC:
1464                 if (mask) {
1465                         if (data->offset < 32) {
1466                                 info[idx] = (struct field_modify_info){4, 0,
1467                                                 MLX5_MODI_OUT_SMAC_47_16};
1468                                 if (width < 32) {
1469                                         mask[idx] =
1470                                                 rte_cpu_to_be_32(0xffffffff >>
1471                                                                 (32 - width));
1472                                         width = 0;
1473                                 } else {
1474                                         mask[idx] = RTE_BE32(0xffffffff);
1475                                         width -= 32;
1476                                 }
1477                                 if (!width)
1478                                         break;
1479                                 ++idx;
1480                         }
1481                         info[idx] = (struct field_modify_info){2, 4 * idx,
1482                                                 MLX5_MODI_OUT_SMAC_15_0};
1483                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1484                 } else {
1485                         if (data->offset < 32)
1486                                 info[idx++] = (struct field_modify_info){4, 0,
1487                                                 MLX5_MODI_OUT_SMAC_47_16};
1488                         info[idx] = (struct field_modify_info){2, 0,
1489                                                 MLX5_MODI_OUT_SMAC_15_0};
1490                 }
1491                 break;
1492         case RTE_FLOW_FIELD_VLAN_TYPE:
1493                 /* not supported yet */
1494                 break;
1495         case RTE_FLOW_FIELD_VLAN_ID:
1496                 info[idx] = (struct field_modify_info){2, 0,
1497                                         MLX5_MODI_OUT_FIRST_VID};
1498                 if (mask)
1499                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1500                 break;
1501         case RTE_FLOW_FIELD_MAC_TYPE:
1502                 info[idx] = (struct field_modify_info){2, 0,
1503                                         MLX5_MODI_OUT_ETHERTYPE};
1504                 if (mask)
1505                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1506                 break;
1507         case RTE_FLOW_FIELD_IPV4_DSCP:
1508                 info[idx] = (struct field_modify_info){1, 0,
1509                                         MLX5_MODI_OUT_IP_DSCP};
1510                 if (mask)
1511                         mask[idx] = 0x3f >> (6 - width);
1512                 break;
1513         case RTE_FLOW_FIELD_IPV4_TTL:
1514                 info[idx] = (struct field_modify_info){1, 0,
1515                                         MLX5_MODI_OUT_IPV4_TTL};
1516                 if (mask)
1517                         mask[idx] = 0xff >> (8 - width);
1518                 break;
1519         case RTE_FLOW_FIELD_IPV4_SRC:
1520                 info[idx] = (struct field_modify_info){4, 0,
1521                                         MLX5_MODI_OUT_SIPV4};
1522                 if (mask)
1523                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1524                                                      (32 - width));
1525                 break;
1526         case RTE_FLOW_FIELD_IPV4_DST:
1527                 info[idx] = (struct field_modify_info){4, 0,
1528                                         MLX5_MODI_OUT_DIPV4};
1529                 if (mask)
1530                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1531                                                      (32 - width));
1532                 break;
1533         case RTE_FLOW_FIELD_IPV6_DSCP:
1534                 info[idx] = (struct field_modify_info){1, 0,
1535                                         MLX5_MODI_OUT_IP_DSCP};
1536                 if (mask)
1537                         mask[idx] = 0x3f >> (6 - width);
1538                 break;
1539         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1540                 info[idx] = (struct field_modify_info){1, 0,
1541                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1542                 if (mask)
1543                         mask[idx] = 0xff >> (8 - width);
1544                 break;
1545         case RTE_FLOW_FIELD_IPV6_SRC:
1546                 if (mask) {
1547                         if (data->offset < 32) {
1548                                 info[idx] = (struct field_modify_info){4,
1549                                                 4 * idx,
1550                                                 MLX5_MODI_OUT_SIPV6_31_0};
1551                                 if (width < 32) {
1552                                         mask[idx] =
1553                                                 rte_cpu_to_be_32(0xffffffff >>
1554                                                                  (32 - width));
1555                                         width = 0;
1556                                 } else {
1557                                         mask[idx] = RTE_BE32(0xffffffff);
1558                                         width -= 32;
1559                                 }
1560                                 if (!width)
1561                                         break;
1562                                 ++idx;
1563                         }
1564                         if (data->offset < 64) {
1565                                 info[idx] = (struct field_modify_info){4,
1566                                                 4 * idx,
1567                                                 MLX5_MODI_OUT_SIPV6_63_32};
1568                                 if (width < 32) {
1569                                         mask[idx] =
1570                                                 rte_cpu_to_be_32(0xffffffff >>
1571                                                                  (32 - width));
1572                                         width = 0;
1573                                 } else {
1574                                         mask[idx] = RTE_BE32(0xffffffff);
1575                                         width -= 32;
1576                                 }
1577                                 if (!width)
1578                                         break;
1579                                 ++idx;
1580                         }
1581                         if (data->offset < 96) {
1582                                 info[idx] = (struct field_modify_info){4,
1583                                                 4 * idx,
1584                                                 MLX5_MODI_OUT_SIPV6_95_64};
1585                                 if (width < 32) {
1586                                         mask[idx] =
1587                                                 rte_cpu_to_be_32(0xffffffff >>
1588                                                                  (32 - width));
1589                                         width = 0;
1590                                 } else {
1591                                         mask[idx] = RTE_BE32(0xffffffff);
1592                                         width -= 32;
1593                                 }
1594                                 if (!width)
1595                                         break;
1596                                 ++idx;
1597                         }
1598                         info[idx] = (struct field_modify_info){4, 4 * idx,
1599                                                 MLX5_MODI_OUT_SIPV6_127_96};
1600                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1601                                                      (32 - width));
1602                 } else {
1603                         if (data->offset < 32)
1604                                 info[idx++] = (struct field_modify_info){4, 0,
1605                                                 MLX5_MODI_OUT_SIPV6_31_0};
1606                         if (data->offset < 64)
1607                                 info[idx++] = (struct field_modify_info){4, 0,
1608                                                 MLX5_MODI_OUT_SIPV6_63_32};
1609                         if (data->offset < 96)
1610                                 info[idx++] = (struct field_modify_info){4, 0,
1611                                                 MLX5_MODI_OUT_SIPV6_95_64};
1612                         if (data->offset < 128)
1613                                 info[idx++] = (struct field_modify_info){4, 0,
1614                                                 MLX5_MODI_OUT_SIPV6_127_96};
1615                 }
1616                 break;
1617         case RTE_FLOW_FIELD_IPV6_DST:
1618                 if (mask) {
1619                         if (data->offset < 32) {
1620                                 info[idx] = (struct field_modify_info){4,
1621                                                 4 * idx,
1622                                                 MLX5_MODI_OUT_DIPV6_31_0};
1623                                 if (width < 32) {
1624                                         mask[idx] =
1625                                                 rte_cpu_to_be_32(0xffffffff >>
1626                                                                  (32 - width));
1627                                         width = 0;
1628                                 } else {
1629                                         mask[idx] = RTE_BE32(0xffffffff);
1630                                         width -= 32;
1631                                 }
1632                                 if (!width)
1633                                         break;
1634                                 ++idx;
1635                         }
1636                         if (data->offset < 64) {
1637                                 info[idx] = (struct field_modify_info){4,
1638                                                 4 * idx,
1639                                                 MLX5_MODI_OUT_DIPV6_63_32};
1640                                 if (width < 32) {
1641                                         mask[idx] =
1642                                                 rte_cpu_to_be_32(0xffffffff >>
1643                                                                  (32 - width));
1644                                         width = 0;
1645                                 } else {
1646                                         mask[idx] = RTE_BE32(0xffffffff);
1647                                         width -= 32;
1648                                 }
1649                                 if (!width)
1650                                         break;
1651                                 ++idx;
1652                         }
1653                         if (data->offset < 96) {
1654                                 info[idx] = (struct field_modify_info){4,
1655                                                 4 * idx,
1656                                                 MLX5_MODI_OUT_DIPV6_95_64};
1657                                 if (width < 32) {
1658                                         mask[idx] =
1659                                                 rte_cpu_to_be_32(0xffffffff >>
1660                                                                  (32 - width));
1661                                         width = 0;
1662                                 } else {
1663                                         mask[idx] = RTE_BE32(0xffffffff);
1664                                         width -= 32;
1665                                 }
1666                                 if (!width)
1667                                         break;
1668                                 ++idx;
1669                         }
1670                         info[idx] = (struct field_modify_info){4, 4 * idx,
1671                                                 MLX5_MODI_OUT_DIPV6_127_96};
1672                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1673                                                      (32 - width));
1674                 } else {
1675                         if (data->offset < 32)
1676                                 info[idx++] = (struct field_modify_info){4, 0,
1677                                                 MLX5_MODI_OUT_DIPV6_31_0};
1678                         if (data->offset < 64)
1679                                 info[idx++] = (struct field_modify_info){4, 0,
1680                                                 MLX5_MODI_OUT_DIPV6_63_32};
1681                         if (data->offset < 96)
1682                                 info[idx++] = (struct field_modify_info){4, 0,
1683                                                 MLX5_MODI_OUT_DIPV6_95_64};
1684                         if (data->offset < 128)
1685                                 info[idx++] = (struct field_modify_info){4, 0,
1686                                                 MLX5_MODI_OUT_DIPV6_127_96};
1687                 }
1688                 break;
1689         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1690                 info[idx] = (struct field_modify_info){2, 0,
1691                                         MLX5_MODI_OUT_TCP_SPORT};
1692                 if (mask)
1693                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1694                 break;
1695         case RTE_FLOW_FIELD_TCP_PORT_DST:
1696                 info[idx] = (struct field_modify_info){2, 0,
1697                                         MLX5_MODI_OUT_TCP_DPORT};
1698                 if (mask)
1699                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1700                 break;
1701         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1702                 info[idx] = (struct field_modify_info){4, 0,
1703                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1704                 if (mask)
1705                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1706                                                      (32 - width));
1707                 break;
1708         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1709                 info[idx] = (struct field_modify_info){4, 0,
1710                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1711                 if (mask)
1712                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1713                                                      (32 - width));
1714                 break;
1715         case RTE_FLOW_FIELD_TCP_FLAGS:
1716                 info[idx] = (struct field_modify_info){2, 0,
1717                                         MLX5_MODI_OUT_TCP_FLAGS};
1718                 if (mask)
1719                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1720                 break;
1721         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1722                 info[idx] = (struct field_modify_info){2, 0,
1723                                         MLX5_MODI_OUT_UDP_SPORT};
1724                 if (mask)
1725                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1726                 break;
1727         case RTE_FLOW_FIELD_UDP_PORT_DST:
1728                 info[idx] = (struct field_modify_info){2, 0,
1729                                         MLX5_MODI_OUT_UDP_DPORT};
1730                 if (mask)
1731                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1732                 break;
1733         case RTE_FLOW_FIELD_VXLAN_VNI:
1734                 /* not supported yet */
1735                 break;
1736         case RTE_FLOW_FIELD_GENEVE_VNI:
1737                 /* not supported yet*/
1738                 break;
1739         case RTE_FLOW_FIELD_GTP_TEID:
1740                 info[idx] = (struct field_modify_info){4, 0,
1741                                         MLX5_MODI_GTP_TEID};
1742                 if (mask)
1743                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1744                                                      (32 - width));
1745                 break;
1746         case RTE_FLOW_FIELD_TAG:
1747                 {
1748                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1749                                                    data->level, error);
1750                         if (reg < 0)
1751                                 return;
1752                         MLX5_ASSERT(reg != REG_NON);
1753                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1754                         info[idx] = (struct field_modify_info){4, 0,
1755                                                 reg_to_field[reg]};
1756                         if (mask)
1757                                 mask[idx] =
1758                                         rte_cpu_to_be_32(0xffffffff >>
1759                                                          (32 - width));
1760                 }
1761                 break;
1762         case RTE_FLOW_FIELD_MARK:
1763                 {
1764                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1765                                                        0, error);
1766                         if (reg < 0)
1767                                 return;
1768                         MLX5_ASSERT(reg != REG_NON);
1769                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1770                         info[idx] = (struct field_modify_info){4, 0,
1771                                                 reg_to_field[reg]};
1772                         if (mask)
1773                                 mask[idx] =
1774                                         rte_cpu_to_be_32(0xffffffff >>
1775                                                          (32 - width));
1776                 }
1777                 break;
1778         case RTE_FLOW_FIELD_META:
1779                 {
1780                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1781                         if (reg < 0)
1782                                 return;
1783                         MLX5_ASSERT(reg != REG_NON);
1784                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1785                         info[idx] = (struct field_modify_info){4, 0,
1786                                                 reg_to_field[reg]};
1787                         if (mask)
1788                                 mask[idx] =
1789                                         rte_cpu_to_be_32(0xffffffff >>
1790                                                          (32 - width));
1791                 }
1792                 break;
1793         case RTE_FLOW_FIELD_POINTER:
1794         case RTE_FLOW_FIELD_VALUE:
1795                 if (data->field == RTE_FLOW_FIELD_POINTER)
1796                         memcpy(&val, (void *)(uintptr_t)data->value,
1797                                sizeof(uint64_t));
1798                 else
1799                         val = data->value;
1800                 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1801                         if (mask[idx]) {
1802                                 if (dst_width > 16) {
1803                                         value[idx] = rte_cpu_to_be_32(val);
1804                                         val >>= 32;
1805                                 } else if (dst_width > 8) {
1806                                         value[idx] = rte_cpu_to_be_16(val);
1807                                         val >>= 16;
1808                                 } else {
1809                                         value[idx] = (uint8_t)val;
1810                                         val >>= 8;
1811                                 }
1812                                 if (!val)
1813                                         break;
1814                         }
1815                 }
1816                 break;
1817         default:
1818                 MLX5_ASSERT(false);
1819                 break;
1820         }
1821 }
1822
1823 /**
1824  * Convert modify_field action to DV specification.
1825  *
1826  * @param[in] dev
1827  *   Pointer to the rte_eth_dev structure.
1828  * @param[in,out] resource
1829  *   Pointer to the modify-header resource.
1830  * @param[in] action
1831  *   Pointer to action specification.
1832  * @param[in] attr
1833  *   Attributes of flow that includes this item.
1834  * @param[out] error
1835  *   Pointer to the error structure.
1836  *
1837  * @return
1838  *   0 on success, a negative errno value otherwise and rte_errno is set.
1839  */
1840 static int
1841 flow_dv_convert_action_modify_field
1842                         (struct rte_eth_dev *dev,
1843                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1844                          const struct rte_flow_action *action,
1845                          const struct rte_flow_attr *attr,
1846                          struct rte_flow_error *error)
1847 {
1848         const struct rte_flow_action_modify_field *conf =
1849                 (const struct rte_flow_action_modify_field *)(action->conf);
1850         struct rte_flow_item item;
1851         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1852                                                                 {0, 0, 0} };
1853         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1854                                                                 {0, 0, 0} };
1855         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1856         uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1857         uint32_t type;
1858         uint32_t dst_width = mlx5_flow_item_field_width(conf->dst.field);
1859
1860         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1861                 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1862                 type = MLX5_MODIFICATION_TYPE_SET;
1863                 /** For SET fill the destination field (field) first. */
1864                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1865                         value, conf->width, dst_width, dev, attr, error);
1866                 /** Then copy immediate value from source as per mask. */
1867                 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1868                         value, conf->width, dst_width, dev, attr, error);
1869                 item.spec = &value;
1870         } else {
1871                 type = MLX5_MODIFICATION_TYPE_COPY;
1872                 /** For COPY fill the destination field (dcopy) without mask. */
1873                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1874                         value, conf->width, dst_width, dev, attr, error);
1875                 /** Then construct the source field (field) with mask. */
1876                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1877                         value, conf->width, dst_width, dev, attr, error);
1878         }
1879         item.mask = &mask;
1880         return flow_dv_convert_modify_action(&item,
1881                         field, dcopy, resource, type, error);
1882 }
1883
1884 /**
1885  * Validate MARK item.
1886  *
1887  * @param[in] dev
1888  *   Pointer to the rte_eth_dev structure.
1889  * @param[in] item
1890  *   Item specification.
1891  * @param[in] attr
1892  *   Attributes of flow that includes this item.
1893  * @param[out] error
1894  *   Pointer to error structure.
1895  *
1896  * @return
1897  *   0 on success, a negative errno value otherwise and rte_errno is set.
1898  */
1899 static int
1900 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1901                            const struct rte_flow_item *item,
1902                            const struct rte_flow_attr *attr __rte_unused,
1903                            struct rte_flow_error *error)
1904 {
1905         struct mlx5_priv *priv = dev->data->dev_private;
1906         struct mlx5_dev_config *config = &priv->config;
1907         const struct rte_flow_item_mark *spec = item->spec;
1908         const struct rte_flow_item_mark *mask = item->mask;
1909         const struct rte_flow_item_mark nic_mask = {
1910                 .id = priv->sh->dv_mark_mask,
1911         };
1912         int ret;
1913
1914         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1915                 return rte_flow_error_set(error, ENOTSUP,
1916                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1917                                           "extended metadata feature"
1918                                           " isn't enabled");
1919         if (!mlx5_flow_ext_mreg_supported(dev))
1920                 return rte_flow_error_set(error, ENOTSUP,
1921                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1922                                           "extended metadata register"
1923                                           " isn't supported");
1924         if (!nic_mask.id)
1925                 return rte_flow_error_set(error, ENOTSUP,
1926                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1927                                           "extended metadata register"
1928                                           " isn't available");
1929         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1930         if (ret < 0)
1931                 return ret;
1932         if (!spec)
1933                 return rte_flow_error_set(error, EINVAL,
1934                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1935                                           item->spec,
1936                                           "data cannot be empty");
1937         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1938                 return rte_flow_error_set(error, EINVAL,
1939                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1940                                           &spec->id,
1941                                           "mark id exceeds the limit");
1942         if (!mask)
1943                 mask = &nic_mask;
1944         if (!mask->id)
1945                 return rte_flow_error_set(error, EINVAL,
1946                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1947                                         "mask cannot be zero");
1948
1949         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1950                                         (const uint8_t *)&nic_mask,
1951                                         sizeof(struct rte_flow_item_mark),
1952                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1953         if (ret < 0)
1954                 return ret;
1955         return 0;
1956 }
1957
1958 /**
1959  * Validate META item.
1960  *
1961  * @param[in] dev
1962  *   Pointer to the rte_eth_dev structure.
1963  * @param[in] item
1964  *   Item specification.
1965  * @param[in] attr
1966  *   Attributes of flow that includes this item.
1967  * @param[out] error
1968  *   Pointer to error structure.
1969  *
1970  * @return
1971  *   0 on success, a negative errno value otherwise and rte_errno is set.
1972  */
1973 static int
1974 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1975                            const struct rte_flow_item *item,
1976                            const struct rte_flow_attr *attr,
1977                            struct rte_flow_error *error)
1978 {
1979         struct mlx5_priv *priv = dev->data->dev_private;
1980         struct mlx5_dev_config *config = &priv->config;
1981         const struct rte_flow_item_meta *spec = item->spec;
1982         const struct rte_flow_item_meta *mask = item->mask;
1983         struct rte_flow_item_meta nic_mask = {
1984                 .data = UINT32_MAX
1985         };
1986         int reg;
1987         int ret;
1988
1989         if (!spec)
1990                 return rte_flow_error_set(error, EINVAL,
1991                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1992                                           item->spec,
1993                                           "data cannot be empty");
1994         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1995                 if (!mlx5_flow_ext_mreg_supported(dev))
1996                         return rte_flow_error_set(error, ENOTSUP,
1997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1998                                           "extended metadata register"
1999                                           " isn't supported");
2000                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2001                 if (reg < 0)
2002                         return reg;
2003                 if (reg == REG_NON)
2004                         return rte_flow_error_set(error, ENOTSUP,
2005                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2006                                         "unavalable extended metadata register");
2007                 if (reg == REG_B)
2008                         return rte_flow_error_set(error, ENOTSUP,
2009                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2010                                           "match on reg_b "
2011                                           "isn't supported");
2012                 if (reg != REG_A)
2013                         nic_mask.data = priv->sh->dv_meta_mask;
2014         } else {
2015                 if (attr->transfer)
2016                         return rte_flow_error_set(error, ENOTSUP,
2017                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2018                                         "extended metadata feature "
2019                                         "should be enabled when "
2020                                         "meta item is requested "
2021                                         "with e-switch mode ");
2022                 if (attr->ingress)
2023                         return rte_flow_error_set(error, ENOTSUP,
2024                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2025                                         "match on metadata for ingress "
2026                                         "is not supported in legacy "
2027                                         "metadata mode");
2028         }
2029         if (!mask)
2030                 mask = &rte_flow_item_meta_mask;
2031         if (!mask->data)
2032                 return rte_flow_error_set(error, EINVAL,
2033                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2034                                         "mask cannot be zero");
2035
2036         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2037                                         (const uint8_t *)&nic_mask,
2038                                         sizeof(struct rte_flow_item_meta),
2039                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2040         return ret;
2041 }
2042
2043 /**
2044  * Validate TAG item.
2045  *
2046  * @param[in] dev
2047  *   Pointer to the rte_eth_dev structure.
2048  * @param[in] item
2049  *   Item specification.
2050  * @param[in] attr
2051  *   Attributes of flow that includes this item.
2052  * @param[out] error
2053  *   Pointer to error structure.
2054  *
2055  * @return
2056  *   0 on success, a negative errno value otherwise and rte_errno is set.
2057  */
2058 static int
2059 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2060                           const struct rte_flow_item *item,
2061                           const struct rte_flow_attr *attr __rte_unused,
2062                           struct rte_flow_error *error)
2063 {
2064         const struct rte_flow_item_tag *spec = item->spec;
2065         const struct rte_flow_item_tag *mask = item->mask;
2066         const struct rte_flow_item_tag nic_mask = {
2067                 .data = RTE_BE32(UINT32_MAX),
2068                 .index = 0xff,
2069         };
2070         int ret;
2071
2072         if (!mlx5_flow_ext_mreg_supported(dev))
2073                 return rte_flow_error_set(error, ENOTSUP,
2074                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2075                                           "extensive metadata register"
2076                                           " isn't supported");
2077         if (!spec)
2078                 return rte_flow_error_set(error, EINVAL,
2079                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2080                                           item->spec,
2081                                           "data cannot be empty");
2082         if (!mask)
2083                 mask = &rte_flow_item_tag_mask;
2084         if (!mask->data)
2085                 return rte_flow_error_set(error, EINVAL,
2086                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2087                                         "mask cannot be zero");
2088
2089         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2090                                         (const uint8_t *)&nic_mask,
2091                                         sizeof(struct rte_flow_item_tag),
2092                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2093         if (ret < 0)
2094                 return ret;
2095         if (mask->index != 0xff)
2096                 return rte_flow_error_set(error, EINVAL,
2097                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2098                                           "partial mask for tag index"
2099                                           " is not supported");
2100         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2101         if (ret < 0)
2102                 return ret;
2103         MLX5_ASSERT(ret != REG_NON);
2104         return 0;
2105 }
2106
2107 /**
2108  * Validate vport item.
2109  *
2110  * @param[in] dev
2111  *   Pointer to the rte_eth_dev structure.
2112  * @param[in] item
2113  *   Item specification.
2114  * @param[in] attr
2115  *   Attributes of flow that includes this item.
2116  * @param[in] item_flags
2117  *   Bit-fields that holds the items detected until now.
2118  * @param[out] error
2119  *   Pointer to error structure.
2120  *
2121  * @return
2122  *   0 on success, a negative errno value otherwise and rte_errno is set.
2123  */
2124 static int
2125 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2126                               const struct rte_flow_item *item,
2127                               const struct rte_flow_attr *attr,
2128                               uint64_t item_flags,
2129                               struct rte_flow_error *error)
2130 {
2131         const struct rte_flow_item_port_id *spec = item->spec;
2132         const struct rte_flow_item_port_id *mask = item->mask;
2133         const struct rte_flow_item_port_id switch_mask = {
2134                         .id = 0xffffffff,
2135         };
2136         struct mlx5_priv *esw_priv;
2137         struct mlx5_priv *dev_priv;
2138         int ret;
2139
2140         if (!attr->transfer)
2141                 return rte_flow_error_set(error, EINVAL,
2142                                           RTE_FLOW_ERROR_TYPE_ITEM,
2143                                           NULL,
2144                                           "match on port id is valid only"
2145                                           " when transfer flag is enabled");
2146         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2147                 return rte_flow_error_set(error, ENOTSUP,
2148                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2149                                           "multiple source ports are not"
2150                                           " supported");
2151         if (!mask)
2152                 mask = &switch_mask;
2153         if (mask->id != 0xffffffff)
2154                 return rte_flow_error_set(error, ENOTSUP,
2155                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2156                                            mask,
2157                                            "no support for partial mask on"
2158                                            " \"id\" field");
2159         ret = mlx5_flow_item_acceptable
2160                                 (item, (const uint8_t *)mask,
2161                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2162                                  sizeof(struct rte_flow_item_port_id),
2163                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2164         if (ret)
2165                 return ret;
2166         if (!spec)
2167                 return 0;
2168         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2169         if (!esw_priv)
2170                 return rte_flow_error_set(error, rte_errno,
2171                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2172                                           "failed to obtain E-Switch info for"
2173                                           " port");
2174         dev_priv = mlx5_dev_to_eswitch_info(dev);
2175         if (!dev_priv)
2176                 return rte_flow_error_set(error, rte_errno,
2177                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2178                                           NULL,
2179                                           "failed to obtain E-Switch info");
2180         if (esw_priv->domain_id != dev_priv->domain_id)
2181                 return rte_flow_error_set(error, EINVAL,
2182                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2183                                           "cannot match on a port from a"
2184                                           " different E-Switch");
2185         return 0;
2186 }
2187
2188 /**
2189  * Validate VLAN item.
2190  *
2191  * @param[in] item
2192  *   Item specification.
2193  * @param[in] item_flags
2194  *   Bit-fields that holds the items detected until now.
2195  * @param[in] dev
2196  *   Ethernet device flow is being created on.
2197  * @param[out] error
2198  *   Pointer to error structure.
2199  *
2200  * @return
2201  *   0 on success, a negative errno value otherwise and rte_errno is set.
2202  */
2203 static int
2204 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2205                            uint64_t item_flags,
2206                            struct rte_eth_dev *dev,
2207                            struct rte_flow_error *error)
2208 {
2209         const struct rte_flow_item_vlan *mask = item->mask;
2210         const struct rte_flow_item_vlan nic_mask = {
2211                 .tci = RTE_BE16(UINT16_MAX),
2212                 .inner_type = RTE_BE16(UINT16_MAX),
2213                 .has_more_vlan = 1,
2214         };
2215         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2216         int ret;
2217         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2218                                         MLX5_FLOW_LAYER_INNER_L4) :
2219                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2220                                         MLX5_FLOW_LAYER_OUTER_L4);
2221         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2222                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2223
2224         if (item_flags & vlanm)
2225                 return rte_flow_error_set(error, EINVAL,
2226                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2227                                           "multiple VLAN layers not supported");
2228         else if ((item_flags & l34m) != 0)
2229                 return rte_flow_error_set(error, EINVAL,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2231                                           "VLAN cannot follow L3/L4 layer");
2232         if (!mask)
2233                 mask = &rte_flow_item_vlan_mask;
2234         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2235                                         (const uint8_t *)&nic_mask,
2236                                         sizeof(struct rte_flow_item_vlan),
2237                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2238         if (ret)
2239                 return ret;
2240         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2241                 struct mlx5_priv *priv = dev->data->dev_private;
2242
2243                 if (priv->vmwa_context) {
2244                         /*
2245                          * Non-NULL context means we have a virtual machine
2246                          * and SR-IOV enabled, we have to create VLAN interface
2247                          * to make hypervisor to setup E-Switch vport
2248                          * context correctly. We avoid creating the multiple
2249                          * VLAN interfaces, so we cannot support VLAN tag mask.
2250                          */
2251                         return rte_flow_error_set(error, EINVAL,
2252                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2253                                                   item,
2254                                                   "VLAN tag mask is not"
2255                                                   " supported in virtual"
2256                                                   " environment");
2257                 }
2258         }
2259         return 0;
2260 }
2261
2262 /*
2263  * GTP flags are contained in 1 byte of the format:
2264  * -------------------------------------------
2265  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2266  * |-----------------------------------------|
2267  * | value | Version | PT | Res | E | S | PN |
2268  * -------------------------------------------
2269  *
2270  * Matching is supported only for GTP flags E, S, PN.
2271  */
2272 #define MLX5_GTP_FLAGS_MASK     0x07
2273
2274 /**
2275  * Validate GTP item.
2276  *
2277  * @param[in] dev
2278  *   Pointer to the rte_eth_dev structure.
2279  * @param[in] item
2280  *   Item specification.
2281  * @param[in] item_flags
2282  *   Bit-fields that holds the items detected until now.
2283  * @param[out] error
2284  *   Pointer to error structure.
2285  *
2286  * @return
2287  *   0 on success, a negative errno value otherwise and rte_errno is set.
2288  */
2289 static int
2290 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2291                           const struct rte_flow_item *item,
2292                           uint64_t item_flags,
2293                           struct rte_flow_error *error)
2294 {
2295         struct mlx5_priv *priv = dev->data->dev_private;
2296         const struct rte_flow_item_gtp *spec = item->spec;
2297         const struct rte_flow_item_gtp *mask = item->mask;
2298         const struct rte_flow_item_gtp nic_mask = {
2299                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2300                 .msg_type = 0xff,
2301                 .teid = RTE_BE32(0xffffffff),
2302         };
2303
2304         if (!priv->config.hca_attr.tunnel_stateless_gtp)
2305                 return rte_flow_error_set(error, ENOTSUP,
2306                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2307                                           "GTP support is not enabled");
2308         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2309                 return rte_flow_error_set(error, ENOTSUP,
2310                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2311                                           "multiple tunnel layers not"
2312                                           " supported");
2313         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2314                 return rte_flow_error_set(error, EINVAL,
2315                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2316                                           "no outer UDP layer found");
2317         if (!mask)
2318                 mask = &rte_flow_item_gtp_mask;
2319         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2320                 return rte_flow_error_set(error, ENOTSUP,
2321                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2322                                           "Match is supported for GTP"
2323                                           " flags only");
2324         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2325                                          (const uint8_t *)&nic_mask,
2326                                          sizeof(struct rte_flow_item_gtp),
2327                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2328 }
2329
2330 /**
2331  * Validate GTP PSC item.
2332  *
2333  * @param[in] item
2334  *   Item specification.
2335  * @param[in] last_item
2336  *   Previous validated item in the pattern items.
2337  * @param[in] gtp_item
2338  *   Previous GTP item specification.
2339  * @param[in] attr
2340  *   Pointer to flow attributes.
2341  * @param[out] error
2342  *   Pointer to error structure.
2343  *
2344  * @return
2345  *   0 on success, a negative errno value otherwise and rte_errno is set.
2346  */
2347 static int
2348 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2349                               uint64_t last_item,
2350                               const struct rte_flow_item *gtp_item,
2351                               const struct rte_flow_attr *attr,
2352                               struct rte_flow_error *error)
2353 {
2354         const struct rte_flow_item_gtp *gtp_spec;
2355         const struct rte_flow_item_gtp *gtp_mask;
2356         const struct rte_flow_item_gtp_psc *spec;
2357         const struct rte_flow_item_gtp_psc *mask;
2358         const struct rte_flow_item_gtp_psc nic_mask = {
2359                 .pdu_type = 0xFF,
2360                 .qfi = 0xFF,
2361         };
2362
2363         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2364                 return rte_flow_error_set
2365                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2366                          "GTP PSC item must be preceded with GTP item");
2367         gtp_spec = gtp_item->spec;
2368         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2369         /* GTP spec and E flag is requested to match zero. */
2370         if (gtp_spec &&
2371                 (gtp_mask->v_pt_rsv_flags &
2372                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2373                 return rte_flow_error_set
2374                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2375                          "GTP E flag must be 1 to match GTP PSC");
2376         /* Check the flow is not created in group zero. */
2377         if (!attr->transfer && !attr->group)
2378                 return rte_flow_error_set
2379                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2380                          "GTP PSC is not supported for group 0");
2381         /* GTP spec is here and E flag is requested to match zero. */
2382         if (!item->spec)
2383                 return 0;
2384         spec = item->spec;
2385         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2386         if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2387                 return rte_flow_error_set
2388                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2389                          "PDU type should be smaller than 16");
2390         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2391                                          (const uint8_t *)&nic_mask,
2392                                          sizeof(struct rte_flow_item_gtp_psc),
2393                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2394 }
2395
2396 /**
2397  * Validate IPV4 item.
2398  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2399  * add specific validation of fragment_offset field,
2400  *
2401  * @param[in] item
2402  *   Item specification.
2403  * @param[in] item_flags
2404  *   Bit-fields that holds the items detected until now.
2405  * @param[out] error
2406  *   Pointer to error structure.
2407  *
2408  * @return
2409  *   0 on success, a negative errno value otherwise and rte_errno is set.
2410  */
2411 static int
2412 flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
2413                            uint64_t item_flags,
2414                            uint64_t last_item,
2415                            uint16_t ether_type,
2416                            struct rte_flow_error *error)
2417 {
2418         int ret;
2419         const struct rte_flow_item_ipv4 *spec = item->spec;
2420         const struct rte_flow_item_ipv4 *last = item->last;
2421         const struct rte_flow_item_ipv4 *mask = item->mask;
2422         rte_be16_t fragment_offset_spec = 0;
2423         rte_be16_t fragment_offset_last = 0;
2424         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
2425                 .hdr = {
2426                         .src_addr = RTE_BE32(0xffffffff),
2427                         .dst_addr = RTE_BE32(0xffffffff),
2428                         .type_of_service = 0xff,
2429                         .fragment_offset = RTE_BE16(0xffff),
2430                         .next_proto_id = 0xff,
2431                         .time_to_live = 0xff,
2432                 },
2433         };
2434
2435         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2436                                            ether_type, &nic_ipv4_mask,
2437                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2438         if (ret < 0)
2439                 return ret;
2440         if (spec && mask)
2441                 fragment_offset_spec = spec->hdr.fragment_offset &
2442                                        mask->hdr.fragment_offset;
2443         if (!fragment_offset_spec)
2444                 return 0;
2445         /*
2446          * spec and mask are valid, enforce using full mask to make sure the
2447          * complete value is used correctly.
2448          */
2449         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2450                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2451                 return rte_flow_error_set(error, EINVAL,
2452                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2453                                           item, "must use full mask for"
2454                                           " fragment_offset");
2455         /*
2456          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2457          * indicating this is 1st fragment of fragmented packet.
2458          * This is not yet supported in MLX5, return appropriate error message.
2459          */
2460         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2461                 return rte_flow_error_set(error, ENOTSUP,
2462                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2463                                           "match on first fragment not "
2464                                           "supported");
2465         if (fragment_offset_spec && !last)
2466                 return rte_flow_error_set(error, ENOTSUP,
2467                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2468                                           "specified value not supported");
2469         /* spec and last are valid, validate the specified range. */
2470         fragment_offset_last = last->hdr.fragment_offset &
2471                                mask->hdr.fragment_offset;
2472         /*
2473          * Match on fragment_offset spec 0x2001 and last 0x3fff
2474          * means MF is 1 and frag-offset is > 0.
2475          * This packet is fragment 2nd and onward, excluding last.
2476          * This is not yet supported in MLX5, return appropriate
2477          * error message.
2478          */
2479         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2480             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2481                 return rte_flow_error_set(error, ENOTSUP,
2482                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2483                                           last, "match on following "
2484                                           "fragments not supported");
2485         /*
2486          * Match on fragment_offset spec 0x0001 and last 0x1fff
2487          * means MF is 0 and frag-offset is > 0.
2488          * This packet is last fragment of fragmented packet.
2489          * This is not yet supported in MLX5, return appropriate
2490          * error message.
2491          */
2492         if (fragment_offset_spec == RTE_BE16(1) &&
2493             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2494                 return rte_flow_error_set(error, ENOTSUP,
2495                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2496                                           last, "match on last "
2497                                           "fragment not supported");
2498         /*
2499          * Match on fragment_offset spec 0x0001 and last 0x3fff
2500          * means MF and/or frag-offset is not 0.
2501          * This is a fragmented packet.
2502          * Other range values are invalid and rejected.
2503          */
2504         if (!(fragment_offset_spec == RTE_BE16(1) &&
2505               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2506                 return rte_flow_error_set(error, ENOTSUP,
2507                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2508                                           "specified range not supported");
2509         return 0;
2510 }
2511
2512 /**
2513  * Validate IPV6 fragment extension item.
2514  *
2515  * @param[in] item
2516  *   Item specification.
2517  * @param[in] item_flags
2518  *   Bit-fields that holds the items detected until now.
2519  * @param[out] error
2520  *   Pointer to error structure.
2521  *
2522  * @return
2523  *   0 on success, a negative errno value otherwise and rte_errno is set.
2524  */
2525 static int
2526 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2527                                     uint64_t item_flags,
2528                                     struct rte_flow_error *error)
2529 {
2530         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2531         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2532         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2533         rte_be16_t frag_data_spec = 0;
2534         rte_be16_t frag_data_last = 0;
2535         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2536         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2537                                       MLX5_FLOW_LAYER_OUTER_L4;
2538         int ret = 0;
2539         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2540                 .hdr = {
2541                         .next_header = 0xff,
2542                         .frag_data = RTE_BE16(0xffff),
2543                 },
2544         };
2545
2546         if (item_flags & l4m)
2547                 return rte_flow_error_set(error, EINVAL,
2548                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2549                                           "ipv6 fragment extension item cannot "
2550                                           "follow L4 item.");
2551         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2552             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2553                 return rte_flow_error_set(error, EINVAL,
2554                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2555                                           "ipv6 fragment extension item must "
2556                                           "follow ipv6 item");
2557         if (spec && mask)
2558                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2559         if (!frag_data_spec)
2560                 return 0;
2561         /*
2562          * spec and mask are valid, enforce using full mask to make sure the
2563          * complete value is used correctly.
2564          */
2565         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2566                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2567                 return rte_flow_error_set(error, EINVAL,
2568                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2569                                           item, "must use full mask for"
2570                                           " frag_data");
2571         /*
2572          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2573          * This is 1st fragment of fragmented packet.
2574          */
2575         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2576                 return rte_flow_error_set(error, ENOTSUP,
2577                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2578                                           "match on first fragment not "
2579                                           "supported");
2580         if (frag_data_spec && !last)
2581                 return rte_flow_error_set(error, EINVAL,
2582                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2583                                           "specified value not supported");
2584         ret = mlx5_flow_item_acceptable
2585                                 (item, (const uint8_t *)mask,
2586                                  (const uint8_t *)&nic_mask,
2587                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2588                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2589         if (ret)
2590                 return ret;
2591         /* spec and last are valid, validate the specified range. */
2592         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2593         /*
2594          * Match on frag_data spec 0x0009 and last 0xfff9
2595          * means M is 1 and frag-offset is > 0.
2596          * This packet is fragment 2nd and onward, excluding last.
2597          * This is not yet supported in MLX5, return appropriate
2598          * error message.
2599          */
2600         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2601                                        RTE_IPV6_EHDR_MF_MASK) &&
2602             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2603                 return rte_flow_error_set(error, ENOTSUP,
2604                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2605                                           last, "match on following "
2606                                           "fragments not supported");
2607         /*
2608          * Match on frag_data spec 0x0008 and last 0xfff8
2609          * means M is 0 and frag-offset is > 0.
2610          * This packet is last fragment of fragmented packet.
2611          * This is not yet supported in MLX5, return appropriate
2612          * error message.
2613          */
2614         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2615             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2616                 return rte_flow_error_set(error, ENOTSUP,
2617                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2618                                           last, "match on last "
2619                                           "fragment not supported");
2620         /* Other range values are invalid and rejected. */
2621         return rte_flow_error_set(error, EINVAL,
2622                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2623                                   "specified range not supported");
2624 }
2625
2626 /*
2627  * Validate ASO CT item.
2628  *
2629  * @param[in] dev
2630  *   Pointer to the rte_eth_dev structure.
2631  * @param[in] item
2632  *   Item specification.
2633  * @param[in] item_flags
2634  *   Pointer to bit-fields that holds the items detected until now.
2635  * @param[out] error
2636  *   Pointer to error structure.
2637  *
2638  * @return
2639  *   0 on success, a negative errno value otherwise and rte_errno is set.
2640  */
2641 static int
2642 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2643                              const struct rte_flow_item *item,
2644                              uint64_t *item_flags,
2645                              struct rte_flow_error *error)
2646 {
2647         const struct rte_flow_item_conntrack *spec = item->spec;
2648         const struct rte_flow_item_conntrack *mask = item->mask;
2649         RTE_SET_USED(dev);
2650         uint32_t flags;
2651
2652         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2653                 return rte_flow_error_set(error, EINVAL,
2654                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2655                                           "Only one CT is supported");
2656         if (!mask)
2657                 mask = &rte_flow_item_conntrack_mask;
2658         flags = spec->flags & mask->flags;
2659         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2660             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2661              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2662              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2663                 return rte_flow_error_set(error, EINVAL,
2664                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2665                                           "Conflict status bits");
2666         /* State change also needs to be considered. */
2667         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2668         return 0;
2669 }
2670
2671 /**
2672  * Validate the pop VLAN action.
2673  *
2674  * @param[in] dev
2675  *   Pointer to the rte_eth_dev structure.
2676  * @param[in] action_flags
2677  *   Holds the actions detected until now.
2678  * @param[in] action
2679  *   Pointer to the pop vlan action.
2680  * @param[in] item_flags
2681  *   The items found in this flow rule.
2682  * @param[in] attr
2683  *   Pointer to flow attributes.
2684  * @param[out] error
2685  *   Pointer to error structure.
2686  *
2687  * @return
2688  *   0 on success, a negative errno value otherwise and rte_errno is set.
2689  */
2690 static int
2691 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2692                                  uint64_t action_flags,
2693                                  const struct rte_flow_action *action,
2694                                  uint64_t item_flags,
2695                                  const struct rte_flow_attr *attr,
2696                                  struct rte_flow_error *error)
2697 {
2698         const struct mlx5_priv *priv = dev->data->dev_private;
2699
2700         (void)action;
2701         (void)attr;
2702         if (!priv->sh->pop_vlan_action)
2703                 return rte_flow_error_set(error, ENOTSUP,
2704                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2705                                           NULL,
2706                                           "pop vlan action is not supported");
2707         if (attr->egress)
2708                 return rte_flow_error_set(error, ENOTSUP,
2709                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2710                                           NULL,
2711                                           "pop vlan action not supported for "
2712                                           "egress");
2713         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2714                 return rte_flow_error_set(error, ENOTSUP,
2715                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2716                                           "no support for multiple VLAN "
2717                                           "actions");
2718         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2719         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2720             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2721                 return rte_flow_error_set(error, ENOTSUP,
2722                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2723                                           NULL,
2724                                           "cannot pop vlan after decap without "
2725                                           "match on inner vlan in the flow");
2726         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2727         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2728             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2729                 return rte_flow_error_set(error, ENOTSUP,
2730                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2731                                           NULL,
2732                                           "cannot pop vlan without a "
2733                                           "match on (outer) vlan in the flow");
2734         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2735                 return rte_flow_error_set(error, EINVAL,
2736                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2737                                           "wrong action order, port_id should "
2738                                           "be after pop VLAN action");
2739         if (!attr->transfer && priv->representor)
2740                 return rte_flow_error_set(error, ENOTSUP,
2741                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2742                                           "pop vlan action for VF representor "
2743                                           "not supported on NIC table");
2744         return 0;
2745 }
2746
2747 /**
2748  * Get VLAN default info from vlan match info.
2749  *
2750  * @param[in] items
2751  *   the list of item specifications.
2752  * @param[out] vlan
2753  *   pointer VLAN info to fill to.
2754  *
2755  * @return
2756  *   0 on success, a negative errno value otherwise and rte_errno is set.
2757  */
2758 static void
2759 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2760                                   struct rte_vlan_hdr *vlan)
2761 {
2762         const struct rte_flow_item_vlan nic_mask = {
2763                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2764                                 MLX5DV_FLOW_VLAN_VID_MASK),
2765                 .inner_type = RTE_BE16(0xffff),
2766         };
2767
2768         if (items == NULL)
2769                 return;
2770         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2771                 int type = items->type;
2772
2773                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2774                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2775                         break;
2776         }
2777         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2778                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2779                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2780
2781                 /* If VLAN item in pattern doesn't contain data, return here. */
2782                 if (!vlan_v)
2783                         return;
2784                 if (!vlan_m)
2785                         vlan_m = &nic_mask;
2786                 /* Only full match values are accepted */
2787                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2788                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2789                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2790                         vlan->vlan_tci |=
2791                                 rte_be_to_cpu_16(vlan_v->tci &
2792                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2793                 }
2794                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2795                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2796                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2797                         vlan->vlan_tci |=
2798                                 rte_be_to_cpu_16(vlan_v->tci &
2799                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2800                 }
2801                 if (vlan_m->inner_type == nic_mask.inner_type)
2802                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2803                                                            vlan_m->inner_type);
2804         }
2805 }
2806
2807 /**
2808  * Validate the push VLAN action.
2809  *
2810  * @param[in] dev
2811  *   Pointer to the rte_eth_dev structure.
2812  * @param[in] action_flags
2813  *   Holds the actions detected until now.
2814  * @param[in] item_flags
2815  *   The items found in this flow rule.
2816  * @param[in] action
2817  *   Pointer to the action structure.
2818  * @param[in] attr
2819  *   Pointer to flow attributes
2820  * @param[out] error
2821  *   Pointer to error structure.
2822  *
2823  * @return
2824  *   0 on success, a negative errno value otherwise and rte_errno is set.
2825  */
2826 static int
2827 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2828                                   uint64_t action_flags,
2829                                   const struct rte_flow_item_vlan *vlan_m,
2830                                   const struct rte_flow_action *action,
2831                                   const struct rte_flow_attr *attr,
2832                                   struct rte_flow_error *error)
2833 {
2834         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2835         const struct mlx5_priv *priv = dev->data->dev_private;
2836
2837         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2838             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2839                 return rte_flow_error_set(error, EINVAL,
2840                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2841                                           "invalid vlan ethertype");
2842         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2843                 return rte_flow_error_set(error, EINVAL,
2844                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2845                                           "wrong action order, port_id should "
2846                                           "be after push VLAN");
2847         if (!attr->transfer && priv->representor)
2848                 return rte_flow_error_set(error, ENOTSUP,
2849                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2850                                           "push vlan action for VF representor "
2851                                           "not supported on NIC table");
2852         if (vlan_m &&
2853             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2854             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2855                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2856             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2857             !(mlx5_flow_find_action
2858                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2859                 return rte_flow_error_set(error, EINVAL,
2860                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2861                                           "not full match mask on VLAN PCP and "
2862                                           "there is no of_set_vlan_pcp action, "
2863                                           "push VLAN action cannot figure out "
2864                                           "PCP value");
2865         if (vlan_m &&
2866             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2867             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2868                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2869             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2870             !(mlx5_flow_find_action
2871                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2872                 return rte_flow_error_set(error, EINVAL,
2873                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2874                                           "not full match mask on VLAN VID and "
2875                                           "there is no of_set_vlan_vid action, "
2876                                           "push VLAN action cannot figure out "
2877                                           "VID value");
2878         (void)attr;
2879         return 0;
2880 }
2881
2882 /**
2883  * Validate the set VLAN PCP.
2884  *
2885  * @param[in] action_flags
2886  *   Holds the actions detected until now.
2887  * @param[in] actions
2888  *   Pointer to the list of actions remaining in the flow rule.
2889  * @param[out] error
2890  *   Pointer to error structure.
2891  *
2892  * @return
2893  *   0 on success, a negative errno value otherwise and rte_errno is set.
2894  */
2895 static int
2896 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2897                                      const struct rte_flow_action actions[],
2898                                      struct rte_flow_error *error)
2899 {
2900         const struct rte_flow_action *action = actions;
2901         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2902
2903         if (conf->vlan_pcp > 7)
2904                 return rte_flow_error_set(error, EINVAL,
2905                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2906                                           "VLAN PCP value is too big");
2907         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2908                 return rte_flow_error_set(error, ENOTSUP,
2909                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2910                                           "set VLAN PCP action must follow "
2911                                           "the push VLAN action");
2912         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2913                 return rte_flow_error_set(error, ENOTSUP,
2914                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2915                                           "Multiple VLAN PCP modification are "
2916                                           "not supported");
2917         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2918                 return rte_flow_error_set(error, EINVAL,
2919                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2920                                           "wrong action order, port_id should "
2921                                           "be after set VLAN PCP");
2922         return 0;
2923 }
2924
2925 /**
2926  * Validate the set VLAN VID.
2927  *
2928  * @param[in] item_flags
2929  *   Holds the items detected in this rule.
2930  * @param[in] action_flags
2931  *   Holds the actions detected until now.
2932  * @param[in] actions
2933  *   Pointer to the list of actions remaining in the flow rule.
2934  * @param[out] error
2935  *   Pointer to error structure.
2936  *
2937  * @return
2938  *   0 on success, a negative errno value otherwise and rte_errno is set.
2939  */
2940 static int
2941 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2942                                      uint64_t action_flags,
2943                                      const struct rte_flow_action actions[],
2944                                      struct rte_flow_error *error)
2945 {
2946         const struct rte_flow_action *action = actions;
2947         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2948
2949         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
2950                 return rte_flow_error_set(error, EINVAL,
2951                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2952                                           "VLAN VID value is too big");
2953         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
2954             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2955                 return rte_flow_error_set(error, ENOTSUP,
2956                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2957                                           "set VLAN VID action must follow push"
2958                                           " VLAN action or match on VLAN item");
2959         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
2960                 return rte_flow_error_set(error, ENOTSUP,
2961                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2962                                           "Multiple VLAN VID modifications are "
2963                                           "not supported");
2964         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2965                 return rte_flow_error_set(error, EINVAL,
2966                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2967                                           "wrong action order, port_id should "
2968                                           "be after set VLAN VID");
2969         return 0;
2970 }
2971
2972 /*
2973  * Validate the FLAG action.
2974  *
2975  * @param[in] dev
2976  *   Pointer to the rte_eth_dev structure.
2977  * @param[in] action_flags
2978  *   Holds the actions detected until now.
2979  * @param[in] attr
2980  *   Pointer to flow attributes
2981  * @param[out] error
2982  *   Pointer to error structure.
2983  *
2984  * @return
2985  *   0 on success, a negative errno value otherwise and rte_errno is set.
2986  */
2987 static int
2988 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
2989                              uint64_t action_flags,
2990                              const struct rte_flow_attr *attr,
2991                              struct rte_flow_error *error)
2992 {
2993         struct mlx5_priv *priv = dev->data->dev_private;
2994         struct mlx5_dev_config *config = &priv->config;
2995         int ret;
2996
2997         /* Fall back if no extended metadata register support. */
2998         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2999                 return mlx5_flow_validate_action_flag(action_flags, attr,
3000                                                       error);
3001         /* Extensive metadata mode requires registers. */
3002         if (!mlx5_flow_ext_mreg_supported(dev))
3003                 return rte_flow_error_set(error, ENOTSUP,
3004                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3005                                           "no metadata registers "
3006                                           "to support flag action");
3007         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3008                 return rte_flow_error_set(error, ENOTSUP,
3009                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3010                                           "extended metadata register"
3011                                           " isn't available");
3012         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3013         if (ret < 0)
3014                 return ret;
3015         MLX5_ASSERT(ret > 0);
3016         if (action_flags & MLX5_FLOW_ACTION_MARK)
3017                 return rte_flow_error_set(error, EINVAL,
3018                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3019                                           "can't mark and flag in same flow");
3020         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3021                 return rte_flow_error_set(error, EINVAL,
3022                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3023                                           "can't have 2 flag"
3024                                           " actions in same flow");
3025         return 0;
3026 }
3027
3028 /**
3029  * Validate MARK action.
3030  *
3031  * @param[in] dev
3032  *   Pointer to the rte_eth_dev structure.
3033  * @param[in] action
3034  *   Pointer to action.
3035  * @param[in] action_flags
3036  *   Holds the actions detected until now.
3037  * @param[in] attr
3038  *   Pointer to flow attributes
3039  * @param[out] error
3040  *   Pointer to error structure.
3041  *
3042  * @return
3043  *   0 on success, a negative errno value otherwise and rte_errno is set.
3044  */
3045 static int
3046 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3047                              const struct rte_flow_action *action,
3048                              uint64_t action_flags,
3049                              const struct rte_flow_attr *attr,
3050                              struct rte_flow_error *error)
3051 {
3052         struct mlx5_priv *priv = dev->data->dev_private;
3053         struct mlx5_dev_config *config = &priv->config;
3054         const struct rte_flow_action_mark *mark = action->conf;
3055         int ret;
3056
3057         if (is_tunnel_offload_active(dev))
3058                 return rte_flow_error_set(error, ENOTSUP,
3059                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3060                                           "no mark action "
3061                                           "if tunnel offload active");
3062         /* Fall back if no extended metadata register support. */
3063         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3064                 return mlx5_flow_validate_action_mark(action, action_flags,
3065                                                       attr, error);
3066         /* Extensive metadata mode requires registers. */
3067         if (!mlx5_flow_ext_mreg_supported(dev))
3068                 return rte_flow_error_set(error, ENOTSUP,
3069                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3070                                           "no metadata registers "
3071                                           "to support mark action");
3072         if (!priv->sh->dv_mark_mask)
3073                 return rte_flow_error_set(error, ENOTSUP,
3074                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3075                                           "extended metadata register"
3076                                           " isn't available");
3077         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3078         if (ret < 0)
3079                 return ret;
3080         MLX5_ASSERT(ret > 0);
3081         if (!mark)
3082                 return rte_flow_error_set(error, EINVAL,
3083                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3084                                           "configuration cannot be null");
3085         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3086                 return rte_flow_error_set(error, EINVAL,
3087                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3088                                           &mark->id,
3089                                           "mark id exceeds the limit");
3090         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3091                 return rte_flow_error_set(error, EINVAL,
3092                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3093                                           "can't flag and mark in same flow");
3094         if (action_flags & MLX5_FLOW_ACTION_MARK)
3095                 return rte_flow_error_set(error, EINVAL,
3096                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3097                                           "can't have 2 mark actions in same"
3098                                           " flow");
3099         return 0;
3100 }
3101
3102 /**
3103  * Validate SET_META action.
3104  *
3105  * @param[in] dev
3106  *   Pointer to the rte_eth_dev structure.
3107  * @param[in] action
3108  *   Pointer to the action structure.
3109  * @param[in] action_flags
3110  *   Holds the actions detected until now.
3111  * @param[in] attr
3112  *   Pointer to flow attributes
3113  * @param[out] error
3114  *   Pointer to error structure.
3115  *
3116  * @return
3117  *   0 on success, a negative errno value otherwise and rte_errno is set.
3118  */
3119 static int
3120 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3121                                  const struct rte_flow_action *action,
3122                                  uint64_t action_flags __rte_unused,
3123                                  const struct rte_flow_attr *attr,
3124                                  struct rte_flow_error *error)
3125 {
3126         const struct rte_flow_action_set_meta *conf;
3127         uint32_t nic_mask = UINT32_MAX;
3128         int reg;
3129
3130         if (!mlx5_flow_ext_mreg_supported(dev))
3131                 return rte_flow_error_set(error, ENOTSUP,
3132                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3133                                           "extended metadata register"
3134                                           " isn't supported");
3135         reg = flow_dv_get_metadata_reg(dev, attr, error);
3136         if (reg < 0)
3137                 return reg;
3138         if (reg == REG_NON)
3139                 return rte_flow_error_set(error, ENOTSUP,
3140                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3141                                           "unavalable extended metadata register");
3142         if (reg != REG_A && reg != REG_B) {
3143                 struct mlx5_priv *priv = dev->data->dev_private;
3144
3145                 nic_mask = priv->sh->dv_meta_mask;
3146         }
3147         if (!(action->conf))
3148                 return rte_flow_error_set(error, EINVAL,
3149                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3150                                           "configuration cannot be null");
3151         conf = (const struct rte_flow_action_set_meta *)action->conf;
3152         if (!conf->mask)
3153                 return rte_flow_error_set(error, EINVAL,
3154                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3155                                           "zero mask doesn't have any effect");
3156         if (conf->mask & ~nic_mask)
3157                 return rte_flow_error_set(error, EINVAL,
3158                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3159                                           "meta data must be within reg C0");
3160         return 0;
3161 }
3162
3163 /**
3164  * Validate SET_TAG action.
3165  *
3166  * @param[in] dev
3167  *   Pointer to the rte_eth_dev structure.
3168  * @param[in] action
3169  *   Pointer to the action structure.
3170  * @param[in] action_flags
3171  *   Holds the actions detected until now.
3172  * @param[in] attr
3173  *   Pointer to flow attributes
3174  * @param[out] error
3175  *   Pointer to error structure.
3176  *
3177  * @return
3178  *   0 on success, a negative errno value otherwise and rte_errno is set.
3179  */
3180 static int
3181 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3182                                 const struct rte_flow_action *action,
3183                                 uint64_t action_flags,
3184                                 const struct rte_flow_attr *attr,
3185                                 struct rte_flow_error *error)
3186 {
3187         const struct rte_flow_action_set_tag *conf;
3188         const uint64_t terminal_action_flags =
3189                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3190                 MLX5_FLOW_ACTION_RSS;
3191         int ret;
3192
3193         if (!mlx5_flow_ext_mreg_supported(dev))
3194                 return rte_flow_error_set(error, ENOTSUP,
3195                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3196                                           "extensive metadata register"
3197                                           " isn't supported");
3198         if (!(action->conf))
3199                 return rte_flow_error_set(error, EINVAL,
3200                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3201                                           "configuration cannot be null");
3202         conf = (const struct rte_flow_action_set_tag *)action->conf;
3203         if (!conf->mask)
3204                 return rte_flow_error_set(error, EINVAL,
3205                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3206                                           "zero mask doesn't have any effect");
3207         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3208         if (ret < 0)
3209                 return ret;
3210         if (!attr->transfer && attr->ingress &&
3211             (action_flags & terminal_action_flags))
3212                 return rte_flow_error_set(error, EINVAL,
3213                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3214                                           "set_tag has no effect"
3215                                           " with terminal actions");
3216         return 0;
3217 }
3218
3219 /**
3220  * Check if action counter is shared by either old or new mechanism.
3221  *
3222  * @param[in] action
3223  *   Pointer to the action structure.
3224  *
3225  * @return
3226  *   True when counter is shared, false otherwise.
3227  */
3228 static inline bool
3229 is_shared_action_count(const struct rte_flow_action *action)
3230 {
3231         const struct rte_flow_action_count *count =
3232                         (const struct rte_flow_action_count *)action->conf;
3233
3234         if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3235                 return true;
3236         return !!(count && count->shared);
3237 }
3238
3239 /**
3240  * Validate count action.
3241  *
3242  * @param[in] dev
3243  *   Pointer to rte_eth_dev structure.
3244  * @param[in] shared
3245  *   Indicator if action is shared.
3246  * @param[in] action_flags
3247  *   Holds the actions detected until now.
3248  * @param[out] error
3249  *   Pointer to error structure.
3250  *
3251  * @return
3252  *   0 on success, a negative errno value otherwise and rte_errno is set.
3253  */
3254 static int
3255 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3256                               uint64_t action_flags,
3257                               struct rte_flow_error *error)
3258 {
3259         struct mlx5_priv *priv = dev->data->dev_private;
3260
3261         if (!priv->config.devx)
3262                 goto notsup_err;
3263         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3264                 return rte_flow_error_set(error, EINVAL,
3265                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3266                                           "duplicate count actions set");
3267         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3268             !priv->sh->flow_hit_aso_en)
3269                 return rte_flow_error_set(error, EINVAL,
3270                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3271                                           "old age and shared count combination is not supported");
3272 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3273         return 0;
3274 #endif
3275 notsup_err:
3276         return rte_flow_error_set
3277                       (error, ENOTSUP,
3278                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3279                        NULL,
3280                        "count action not supported");
3281 }
3282
3283 /**
3284  * Validate the L2 encap action.
3285  *
3286  * @param[in] dev
3287  *   Pointer to the rte_eth_dev structure.
3288  * @param[in] action_flags
3289  *   Holds the actions detected until now.
3290  * @param[in] action
3291  *   Pointer to the action structure.
3292  * @param[in] attr
3293  *   Pointer to flow attributes.
3294  * @param[out] error
3295  *   Pointer to error structure.
3296  *
3297  * @return
3298  *   0 on success, a negative errno value otherwise and rte_errno is set.
3299  */
3300 static int
3301 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3302                                  uint64_t action_flags,
3303                                  const struct rte_flow_action *action,
3304                                  const struct rte_flow_attr *attr,
3305                                  struct rte_flow_error *error)
3306 {
3307         const struct mlx5_priv *priv = dev->data->dev_private;
3308
3309         if (!(action->conf))
3310                 return rte_flow_error_set(error, EINVAL,
3311                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3312                                           "configuration cannot be null");
3313         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3314                 return rte_flow_error_set(error, EINVAL,
3315                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3316                                           "can only have a single encap action "
3317                                           "in a flow");
3318         if (!attr->transfer && priv->representor)
3319                 return rte_flow_error_set(error, ENOTSUP,
3320                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3321                                           "encap action for VF representor "
3322                                           "not supported on NIC table");
3323         return 0;
3324 }
3325
3326 /**
3327  * Validate a decap action.
3328  *
3329  * @param[in] dev
3330  *   Pointer to the rte_eth_dev structure.
3331  * @param[in] action_flags
3332  *   Holds the actions detected until now.
3333  * @param[in] action
3334  *   Pointer to the action structure.
3335  * @param[in] item_flags
3336  *   Holds the items detected.
3337  * @param[in] attr
3338  *   Pointer to flow attributes
3339  * @param[out] error
3340  *   Pointer to error structure.
3341  *
3342  * @return
3343  *   0 on success, a negative errno value otherwise and rte_errno is set.
3344  */
3345 static int
3346 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3347                               uint64_t action_flags,
3348                               const struct rte_flow_action *action,
3349                               const uint64_t item_flags,
3350                               const struct rte_flow_attr *attr,
3351                               struct rte_flow_error *error)
3352 {
3353         const struct mlx5_priv *priv = dev->data->dev_private;
3354
3355         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3356             !priv->config.decap_en)
3357                 return rte_flow_error_set(error, ENOTSUP,
3358                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3359                                           "decap is not enabled");
3360         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3361                 return rte_flow_error_set(error, ENOTSUP,
3362                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3363                                           action_flags &
3364                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3365                                           "have a single decap action" : "decap "
3366                                           "after encap is not supported");
3367         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3368                 return rte_flow_error_set(error, EINVAL,
3369                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3370                                           "can't have decap action after"
3371                                           " modify action");
3372         if (attr->egress)
3373                 return rte_flow_error_set(error, ENOTSUP,
3374                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3375                                           NULL,
3376                                           "decap action not supported for "
3377                                           "egress");
3378         if (!attr->transfer && priv->representor)
3379                 return rte_flow_error_set(error, ENOTSUP,
3380                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3381                                           "decap action for VF representor "
3382                                           "not supported on NIC table");
3383         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3384             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3385                 return rte_flow_error_set(error, ENOTSUP,
3386                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3387                                 "VXLAN item should be present for VXLAN decap");
3388         return 0;
3389 }
3390
3391 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3392
3393 /**
3394  * Validate the raw encap and decap actions.
3395  *
3396  * @param[in] dev
3397  *   Pointer to the rte_eth_dev structure.
3398  * @param[in] decap
3399  *   Pointer to the decap action.
3400  * @param[in] encap
3401  *   Pointer to the encap action.
3402  * @param[in] attr
3403  *   Pointer to flow attributes
3404  * @param[in/out] action_flags
3405  *   Holds the actions detected until now.
3406  * @param[out] actions_n
3407  *   pointer to the number of actions counter.
3408  * @param[in] action
3409  *   Pointer to the action structure.
3410  * @param[in] item_flags
3411  *   Holds the items detected.
3412  * @param[out] error
3413  *   Pointer to error structure.
3414  *
3415  * @return
3416  *   0 on success, a negative errno value otherwise and rte_errno is set.
3417  */
3418 static int
3419 flow_dv_validate_action_raw_encap_decap
3420         (struct rte_eth_dev *dev,
3421          const struct rte_flow_action_raw_decap *decap,
3422          const struct rte_flow_action_raw_encap *encap,
3423          const struct rte_flow_attr *attr, uint64_t *action_flags,
3424          int *actions_n, const struct rte_flow_action *action,
3425          uint64_t item_flags, struct rte_flow_error *error)
3426 {
3427         const struct mlx5_priv *priv = dev->data->dev_private;
3428         int ret;
3429
3430         if (encap && (!encap->size || !encap->data))
3431                 return rte_flow_error_set(error, EINVAL,
3432                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3433                                           "raw encap data cannot be empty");
3434         if (decap && encap) {
3435                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3436                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3437                         /* L3 encap. */
3438                         decap = NULL;
3439                 else if (encap->size <=
3440                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3441                            decap->size >
3442                            MLX5_ENCAPSULATION_DECISION_SIZE)
3443                         /* L3 decap. */
3444                         encap = NULL;
3445                 else if (encap->size >
3446                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3447                            decap->size >
3448                            MLX5_ENCAPSULATION_DECISION_SIZE)
3449                         /* 2 L2 actions: encap and decap. */
3450                         ;
3451                 else
3452                         return rte_flow_error_set(error,
3453                                 ENOTSUP,
3454                                 RTE_FLOW_ERROR_TYPE_ACTION,
3455                                 NULL, "unsupported too small "
3456                                 "raw decap and too small raw "
3457                                 "encap combination");
3458         }
3459         if (decap) {
3460                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3461                                                     item_flags, attr, error);
3462                 if (ret < 0)
3463                         return ret;
3464                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3465                 ++(*actions_n);
3466         }
3467         if (encap) {
3468                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3469                         return rte_flow_error_set(error, ENOTSUP,
3470                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3471                                                   NULL,
3472                                                   "small raw encap size");
3473                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3474                         return rte_flow_error_set(error, EINVAL,
3475                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3476                                                   NULL,
3477                                                   "more than one encap action");
3478                 if (!attr->transfer && priv->representor)
3479                         return rte_flow_error_set
3480                                         (error, ENOTSUP,
3481                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3482                                          "encap action for VF representor "
3483                                          "not supported on NIC table");
3484                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3485                 ++(*actions_n);
3486         }
3487         return 0;
3488 }
3489
3490 /*
3491  * Validate the ASO CT action.
3492  *
3493  * @param[in] dev
3494  *   Pointer to the rte_eth_dev structure.
3495  * @param[in] action_flags
3496  *   Holds the actions detected until now.
3497  * @param[in] item_flags
3498  *   The items found in this flow rule.
3499  * @param[in] attr
3500  *   Pointer to flow attributes.
3501  * @param[out] error
3502  *   Pointer to error structure.
3503  *
3504  * @return
3505  *   0 on success, a negative errno value otherwise and rte_errno is set.
3506  */
3507 static int
3508 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3509                                uint64_t action_flags,
3510                                uint64_t item_flags,
3511                                const struct rte_flow_attr *attr,
3512                                struct rte_flow_error *error)
3513 {
3514         RTE_SET_USED(dev);
3515
3516         if (attr->group == 0 && !attr->transfer)
3517                 return rte_flow_error_set(error, ENOTSUP,
3518                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3519                                           NULL,
3520                                           "Only support non-root table");
3521         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3522                 return rte_flow_error_set(error, ENOTSUP,
3523                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3524                                           "CT cannot follow a fate action");
3525         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3526             (action_flags & MLX5_FLOW_ACTION_AGE))
3527                 return rte_flow_error_set(error, EINVAL,
3528                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3529                                           "Only one ASO action is supported");
3530         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3531                 return rte_flow_error_set(error, EINVAL,
3532                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3533                                           "Encap cannot exist before CT");
3534         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3535                 return rte_flow_error_set(error, EINVAL,
3536                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3537                                           "Not a outer TCP packet");
3538         return 0;
3539 }
3540
3541 /**
3542  * Match encap_decap resource.
3543  *
3544  * @param list
3545  *   Pointer to the hash list.
3546  * @param entry
3547  *   Pointer to exist resource entry object.
3548  * @param key
3549  *   Key of the new entry.
3550  * @param ctx_cb
3551  *   Pointer to new encap_decap resource.
3552  *
3553  * @return
3554  *   0 on matching, none-zero otherwise.
3555  */
3556 int
3557 flow_dv_encap_decap_match_cb(struct mlx5_hlist *list __rte_unused,
3558                              struct mlx5_hlist_entry *entry,
3559                              uint64_t key __rte_unused, void *cb_ctx)
3560 {
3561         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3562         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
3563         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3564
3565         cache_resource = container_of(entry,
3566                                       struct mlx5_flow_dv_encap_decap_resource,
3567                                       entry);
3568         if (resource->reformat_type == cache_resource->reformat_type &&
3569             resource->ft_type == cache_resource->ft_type &&
3570             resource->flags == cache_resource->flags &&
3571             resource->size == cache_resource->size &&
3572             !memcmp((const void *)resource->buf,
3573                     (const void *)cache_resource->buf,
3574                     resource->size))
3575                 return 0;
3576         return -1;
3577 }
3578
3579 /**
3580  * Allocate encap_decap resource.
3581  *
3582  * @param list
3583  *   Pointer to the hash list.
3584  * @param entry
3585  *   Pointer to exist resource entry object.
3586  * @param ctx_cb
3587  *   Pointer to new encap_decap resource.
3588  *
3589  * @return
3590  *   0 on matching, none-zero otherwise.
3591  */
3592 struct mlx5_hlist_entry *
3593 flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,
3594                               uint64_t key __rte_unused,
3595                               void *cb_ctx)
3596 {
3597         struct mlx5_dev_ctx_shared *sh = list->ctx;
3598         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3599         struct mlx5dv_dr_domain *domain;
3600         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
3601         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3602         uint32_t idx;
3603         int ret;
3604
3605         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3606                 domain = sh->fdb_domain;
3607         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3608                 domain = sh->rx_domain;
3609         else
3610                 domain = sh->tx_domain;
3611         /* Register new encap/decap resource. */
3612         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3613                                        &idx);
3614         if (!cache_resource) {
3615                 rte_flow_error_set(ctx->error, ENOMEM,
3616                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3617                                    "cannot allocate resource memory");
3618                 return NULL;
3619         }
3620         *cache_resource = *resource;
3621         cache_resource->idx = idx;
3622         ret = mlx5_flow_os_create_flow_action_packet_reformat
3623                                         (sh->ctx, domain, cache_resource,
3624                                          &cache_resource->action);
3625         if (ret) {
3626                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3627                 rte_flow_error_set(ctx->error, ENOMEM,
3628                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3629                                    NULL, "cannot create action");
3630                 return NULL;
3631         }
3632
3633         return &cache_resource->entry;
3634 }
3635
3636 /**
3637  * Find existing encap/decap resource or create and register a new one.
3638  *
3639  * @param[in, out] dev
3640  *   Pointer to rte_eth_dev structure.
3641  * @param[in, out] resource
3642  *   Pointer to encap/decap resource.
3643  * @parm[in, out] dev_flow
3644  *   Pointer to the dev_flow.
3645  * @param[out] error
3646  *   pointer to error structure.
3647  *
3648  * @return
3649  *   0 on success otherwise -errno and errno is set.
3650  */
3651 static int
3652 flow_dv_encap_decap_resource_register
3653                         (struct rte_eth_dev *dev,
3654                          struct mlx5_flow_dv_encap_decap_resource *resource,
3655                          struct mlx5_flow *dev_flow,
3656                          struct rte_flow_error *error)
3657 {
3658         struct mlx5_priv *priv = dev->data->dev_private;
3659         struct mlx5_dev_ctx_shared *sh = priv->sh;
3660         struct mlx5_hlist_entry *entry;
3661         union {
3662                 struct {
3663                         uint32_t ft_type:8;
3664                         uint32_t refmt_type:8;
3665                         /*
3666                          * Header reformat actions can be shared between
3667                          * non-root tables. One bit to indicate non-root
3668                          * table or not.
3669                          */
3670                         uint32_t is_root:1;
3671                         uint32_t reserve:15;
3672                 };
3673                 uint32_t v32;
3674         } encap_decap_key = {
3675                 {
3676                         .ft_type = resource->ft_type,
3677                         .refmt_type = resource->reformat_type,
3678                         .is_root = !!dev_flow->dv.group,
3679                         .reserve = 0,
3680                 }
3681         };
3682         struct mlx5_flow_cb_ctx ctx = {
3683                 .error = error,
3684                 .data = resource,
3685         };
3686         uint64_t key64;
3687
3688         resource->flags = dev_flow->dv.group ? 0 : 1;
3689         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3690                                  sizeof(encap_decap_key.v32), 0);
3691         if (resource->reformat_type !=
3692             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3693             resource->size)
3694                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3695         entry = mlx5_hlist_register(sh->encaps_decaps, key64, &ctx);
3696         if (!entry)
3697                 return -rte_errno;
3698         resource = container_of(entry, typeof(*resource), entry);
3699         dev_flow->dv.encap_decap = resource;
3700         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3701         return 0;
3702 }
3703
3704 /**
3705  * Find existing table jump resource or create and register a new one.
3706  *
3707  * @param[in, out] dev
3708  *   Pointer to rte_eth_dev structure.
3709  * @param[in, out] tbl
3710  *   Pointer to flow table resource.
3711  * @parm[in, out] dev_flow
3712  *   Pointer to the dev_flow.
3713  * @param[out] error
3714  *   pointer to error structure.
3715  *
3716  * @return
3717  *   0 on success otherwise -errno and errno is set.
3718  */
3719 static int
3720 flow_dv_jump_tbl_resource_register
3721                         (struct rte_eth_dev *dev __rte_unused,
3722                          struct mlx5_flow_tbl_resource *tbl,
3723                          struct mlx5_flow *dev_flow,
3724                          struct rte_flow_error *error __rte_unused)
3725 {
3726         struct mlx5_flow_tbl_data_entry *tbl_data =
3727                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3728
3729         MLX5_ASSERT(tbl);
3730         MLX5_ASSERT(tbl_data->jump.action);
3731         dev_flow->handle->rix_jump = tbl_data->idx;
3732         dev_flow->dv.jump = &tbl_data->jump;
3733         return 0;
3734 }
3735
3736 int
3737 flow_dv_port_id_match_cb(struct mlx5_cache_list *list __rte_unused,
3738                          struct mlx5_cache_entry *entry, void *cb_ctx)
3739 {
3740         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3741         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3742         struct mlx5_flow_dv_port_id_action_resource *res =
3743                         container_of(entry, typeof(*res), entry);
3744
3745         return ref->port_id != res->port_id;
3746 }
3747
3748 struct mlx5_cache_entry *
3749 flow_dv_port_id_create_cb(struct mlx5_cache_list *list,
3750                           struct mlx5_cache_entry *entry __rte_unused,
3751                           void *cb_ctx)
3752 {
3753         struct mlx5_dev_ctx_shared *sh = list->ctx;
3754         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3755         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3756         struct mlx5_flow_dv_port_id_action_resource *cache;
3757         uint32_t idx;
3758         int ret;
3759
3760         /* Register new port id action resource. */
3761         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3762         if (!cache) {
3763                 rte_flow_error_set(ctx->error, ENOMEM,
3764                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3765                                    "cannot allocate port_id action cache memory");
3766                 return NULL;
3767         }
3768         *cache = *ref;
3769         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3770                                                         ref->port_id,
3771                                                         &cache->action);
3772         if (ret) {
3773                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3774                 rte_flow_error_set(ctx->error, ENOMEM,
3775                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3776                                    "cannot create action");
3777                 return NULL;
3778         }
3779         cache->idx = idx;
3780         return &cache->entry;
3781 }
3782
3783 /**
3784  * Find existing table port ID resource or create and register a new one.
3785  *
3786  * @param[in, out] dev
3787  *   Pointer to rte_eth_dev structure.
3788  * @param[in, out] resource
3789  *   Pointer to port ID action resource.
3790  * @parm[in, out] dev_flow
3791  *   Pointer to the dev_flow.
3792  * @param[out] error
3793  *   pointer to error structure.
3794  *
3795  * @return
3796  *   0 on success otherwise -errno and errno is set.
3797  */
3798 static int
3799 flow_dv_port_id_action_resource_register
3800                         (struct rte_eth_dev *dev,
3801                          struct mlx5_flow_dv_port_id_action_resource *resource,
3802                          struct mlx5_flow *dev_flow,
3803                          struct rte_flow_error *error)
3804 {
3805         struct mlx5_priv *priv = dev->data->dev_private;
3806         struct mlx5_cache_entry *entry;
3807         struct mlx5_flow_dv_port_id_action_resource *cache;
3808         struct mlx5_flow_cb_ctx ctx = {
3809                 .error = error,
3810                 .data = resource,
3811         };
3812
3813         entry = mlx5_cache_register(&priv->sh->port_id_action_list, &ctx);
3814         if (!entry)
3815                 return -rte_errno;
3816         cache = container_of(entry, typeof(*cache), entry);
3817         dev_flow->dv.port_id_action = cache;
3818         dev_flow->handle->rix_port_id_action = cache->idx;
3819         return 0;
3820 }
3821
3822 int
3823 flow_dv_push_vlan_match_cb(struct mlx5_cache_list *list __rte_unused,
3824                          struct mlx5_cache_entry *entry, void *cb_ctx)
3825 {
3826         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3827         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3828         struct mlx5_flow_dv_push_vlan_action_resource *res =
3829                         container_of(entry, typeof(*res), entry);
3830
3831         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3832 }
3833
3834 struct mlx5_cache_entry *
3835 flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,
3836                           struct mlx5_cache_entry *entry __rte_unused,
3837                           void *cb_ctx)
3838 {
3839         struct mlx5_dev_ctx_shared *sh = list->ctx;
3840         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3841         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3842         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3843         struct mlx5dv_dr_domain *domain;
3844         uint32_t idx;
3845         int ret;
3846
3847         /* Register new port id action resource. */
3848         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3849         if (!cache) {
3850                 rte_flow_error_set(ctx->error, ENOMEM,
3851                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3852                                    "cannot allocate push_vlan action cache memory");
3853                 return NULL;
3854         }
3855         *cache = *ref;
3856         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3857                 domain = sh->fdb_domain;
3858         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3859                 domain = sh->rx_domain;
3860         else
3861                 domain = sh->tx_domain;
3862         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3863                                                         &cache->action);
3864         if (ret) {
3865                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3866                 rte_flow_error_set(ctx->error, ENOMEM,
3867                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3868                                    "cannot create push vlan action");
3869                 return NULL;
3870         }
3871         cache->idx = idx;
3872         return &cache->entry;
3873 }
3874
3875 /**
3876  * Find existing push vlan resource or create and register a new one.
3877  *
3878  * @param [in, out] dev
3879  *   Pointer to rte_eth_dev structure.
3880  * @param[in, out] resource
3881  *   Pointer to port ID action resource.
3882  * @parm[in, out] dev_flow
3883  *   Pointer to the dev_flow.
3884  * @param[out] error
3885  *   pointer to error structure.
3886  *
3887  * @return
3888  *   0 on success otherwise -errno and errno is set.
3889  */
3890 static int
3891 flow_dv_push_vlan_action_resource_register
3892                        (struct rte_eth_dev *dev,
3893                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
3894                         struct mlx5_flow *dev_flow,
3895                         struct rte_flow_error *error)
3896 {
3897         struct mlx5_priv *priv = dev->data->dev_private;
3898         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3899         struct mlx5_cache_entry *entry;
3900         struct mlx5_flow_cb_ctx ctx = {
3901                 .error = error,
3902                 .data = resource,
3903         };
3904
3905         entry = mlx5_cache_register(&priv->sh->push_vlan_action_list, &ctx);
3906         if (!entry)
3907                 return -rte_errno;
3908         cache = container_of(entry, typeof(*cache), entry);
3909
3910         dev_flow->handle->dvh.rix_push_vlan = cache->idx;
3911         dev_flow->dv.push_vlan_res = cache;
3912         return 0;
3913 }
3914
3915 /**
3916  * Get the size of specific rte_flow_item_type hdr size
3917  *
3918  * @param[in] item_type
3919  *   Tested rte_flow_item_type.
3920  *
3921  * @return
3922  *   sizeof struct item_type, 0 if void or irrelevant.
3923  */
3924 static size_t
3925 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
3926 {
3927         size_t retval;
3928
3929         switch (item_type) {
3930         case RTE_FLOW_ITEM_TYPE_ETH:
3931                 retval = sizeof(struct rte_ether_hdr);
3932                 break;
3933         case RTE_FLOW_ITEM_TYPE_VLAN:
3934                 retval = sizeof(struct rte_vlan_hdr);
3935                 break;
3936         case RTE_FLOW_ITEM_TYPE_IPV4:
3937                 retval = sizeof(struct rte_ipv4_hdr);
3938                 break;
3939         case RTE_FLOW_ITEM_TYPE_IPV6:
3940                 retval = sizeof(struct rte_ipv6_hdr);
3941                 break;
3942         case RTE_FLOW_ITEM_TYPE_UDP:
3943                 retval = sizeof(struct rte_udp_hdr);
3944                 break;
3945         case RTE_FLOW_ITEM_TYPE_TCP:
3946                 retval = sizeof(struct rte_tcp_hdr);
3947                 break;
3948         case RTE_FLOW_ITEM_TYPE_VXLAN:
3949         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3950                 retval = sizeof(struct rte_vxlan_hdr);
3951                 break;
3952         case RTE_FLOW_ITEM_TYPE_GRE:
3953         case RTE_FLOW_ITEM_TYPE_NVGRE:
3954                 retval = sizeof(struct rte_gre_hdr);
3955                 break;
3956         case RTE_FLOW_ITEM_TYPE_MPLS:
3957                 retval = sizeof(struct rte_mpls_hdr);
3958                 break;
3959         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
3960         default:
3961                 retval = 0;
3962                 break;
3963         }
3964         return retval;
3965 }
3966
3967 #define MLX5_ENCAP_IPV4_VERSION         0x40
3968 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
3969 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
3970 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
3971 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
3972 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
3973 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
3974
3975 /**
3976  * Convert the encap action data from list of rte_flow_item to raw buffer
3977  *
3978  * @param[in] items
3979  *   Pointer to rte_flow_item objects list.
3980  * @param[out] buf
3981  *   Pointer to the output buffer.
3982  * @param[out] size
3983  *   Pointer to the output buffer size.
3984  * @param[out] error
3985  *   Pointer to the error structure.
3986  *
3987  * @return
3988  *   0 on success, a negative errno value otherwise and rte_errno is set.
3989  */
3990 static int
3991 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
3992                            size_t *size, struct rte_flow_error *error)
3993 {
3994         struct rte_ether_hdr *eth = NULL;
3995         struct rte_vlan_hdr *vlan = NULL;
3996         struct rte_ipv4_hdr *ipv4 = NULL;
3997         struct rte_ipv6_hdr *ipv6 = NULL;
3998         struct rte_udp_hdr *udp = NULL;
3999         struct rte_vxlan_hdr *vxlan = NULL;
4000         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4001         struct rte_gre_hdr *gre = NULL;
4002         size_t len;
4003         size_t temp_size = 0;
4004
4005         if (!items)
4006                 return rte_flow_error_set(error, EINVAL,
4007                                           RTE_FLOW_ERROR_TYPE_ACTION,
4008                                           NULL, "invalid empty data");
4009         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4010                 len = flow_dv_get_item_hdr_len(items->type);
4011                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4012                         return rte_flow_error_set(error, EINVAL,
4013                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4014                                                   (void *)items->type,
4015                                                   "items total size is too big"
4016                                                   " for encap action");
4017                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4018                 switch (items->type) {
4019                 case RTE_FLOW_ITEM_TYPE_ETH:
4020                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4021                         break;
4022                 case RTE_FLOW_ITEM_TYPE_VLAN:
4023                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4024                         if (!eth)
4025                                 return rte_flow_error_set(error, EINVAL,
4026                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4027                                                 (void *)items->type,
4028                                                 "eth header not found");
4029                         if (!eth->ether_type)
4030                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4031                         break;
4032                 case RTE_FLOW_ITEM_TYPE_IPV4:
4033                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4034                         if (!vlan && !eth)
4035                                 return rte_flow_error_set(error, EINVAL,
4036                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4037                                                 (void *)items->type,
4038                                                 "neither eth nor vlan"
4039                                                 " header found");
4040                         if (vlan && !vlan->eth_proto)
4041                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4042                         else if (eth && !eth->ether_type)
4043                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4044                         if (!ipv4->version_ihl)
4045                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4046                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4047                         if (!ipv4->time_to_live)
4048                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4049                         break;
4050                 case RTE_FLOW_ITEM_TYPE_IPV6:
4051                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4052                         if (!vlan && !eth)
4053                                 return rte_flow_error_set(error, EINVAL,
4054                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4055                                                 (void *)items->type,
4056                                                 "neither eth nor vlan"
4057                                                 " header found");
4058                         if (vlan && !vlan->eth_proto)
4059                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4060                         else if (eth && !eth->ether_type)
4061                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4062                         if (!ipv6->vtc_flow)
4063                                 ipv6->vtc_flow =
4064                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4065                         if (!ipv6->hop_limits)
4066                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4067                         break;
4068                 case RTE_FLOW_ITEM_TYPE_UDP:
4069                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4070                         if (!ipv4 && !ipv6)
4071                                 return rte_flow_error_set(error, EINVAL,
4072                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4073                                                 (void *)items->type,
4074                                                 "ip header not found");
4075                         if (ipv4 && !ipv4->next_proto_id)
4076                                 ipv4->next_proto_id = IPPROTO_UDP;
4077                         else if (ipv6 && !ipv6->proto)
4078                                 ipv6->proto = IPPROTO_UDP;
4079                         break;
4080                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4081                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4082                         if (!udp)
4083                                 return rte_flow_error_set(error, EINVAL,
4084                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4085                                                 (void *)items->type,
4086                                                 "udp header not found");
4087                         if (!udp->dst_port)
4088                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4089                         if (!vxlan->vx_flags)
4090                                 vxlan->vx_flags =
4091                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4092                         break;
4093                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4094                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4095                         if (!udp)
4096                                 return rte_flow_error_set(error, EINVAL,
4097                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4098                                                 (void *)items->type,
4099                                                 "udp header not found");
4100                         if (!vxlan_gpe->proto)
4101                                 return rte_flow_error_set(error, EINVAL,
4102                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4103                                                 (void *)items->type,
4104                                                 "next protocol not found");
4105                         if (!udp->dst_port)
4106                                 udp->dst_port =
4107                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4108                         if (!vxlan_gpe->vx_flags)
4109                                 vxlan_gpe->vx_flags =
4110                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4111                         break;
4112                 case RTE_FLOW_ITEM_TYPE_GRE:
4113                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4114                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4115                         if (!gre->proto)
4116                                 return rte_flow_error_set(error, EINVAL,
4117                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4118                                                 (void *)items->type,
4119                                                 "next protocol not found");
4120                         if (!ipv4 && !ipv6)
4121                                 return rte_flow_error_set(error, EINVAL,
4122                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4123                                                 (void *)items->type,
4124                                                 "ip header not found");
4125                         if (ipv4 && !ipv4->next_proto_id)
4126                                 ipv4->next_proto_id = IPPROTO_GRE;
4127                         else if (ipv6 && !ipv6->proto)
4128                                 ipv6->proto = IPPROTO_GRE;
4129                         break;
4130                 case RTE_FLOW_ITEM_TYPE_VOID:
4131                         break;
4132                 default:
4133                         return rte_flow_error_set(error, EINVAL,
4134                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4135                                                   (void *)items->type,
4136                                                   "unsupported item type");
4137                         break;
4138                 }
4139                 temp_size += len;
4140         }
4141         *size = temp_size;
4142         return 0;
4143 }
4144
4145 static int
4146 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4147 {
4148         struct rte_ether_hdr *eth = NULL;
4149         struct rte_vlan_hdr *vlan = NULL;
4150         struct rte_ipv6_hdr *ipv6 = NULL;
4151         struct rte_udp_hdr *udp = NULL;
4152         char *next_hdr;
4153         uint16_t proto;
4154
4155         eth = (struct rte_ether_hdr *)data;
4156         next_hdr = (char *)(eth + 1);
4157         proto = RTE_BE16(eth->ether_type);
4158
4159         /* VLAN skipping */
4160         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4161                 vlan = (struct rte_vlan_hdr *)next_hdr;
4162                 proto = RTE_BE16(vlan->eth_proto);
4163                 next_hdr += sizeof(struct rte_vlan_hdr);
4164         }
4165
4166         /* HW calculates IPv4 csum. no need to proceed */
4167         if (proto == RTE_ETHER_TYPE_IPV4)
4168                 return 0;
4169
4170         /* non IPv4/IPv6 header. not supported */
4171         if (proto != RTE_ETHER_TYPE_IPV6) {
4172                 return rte_flow_error_set(error, ENOTSUP,
4173                                           RTE_FLOW_ERROR_TYPE_ACTION,
4174                                           NULL, "Cannot offload non IPv4/IPv6");
4175         }
4176
4177         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4178
4179         /* ignore non UDP */
4180         if (ipv6->proto != IPPROTO_UDP)
4181                 return 0;
4182
4183         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4184         udp->dgram_cksum = 0;
4185
4186         return 0;
4187 }
4188
4189 /**
4190  * Convert L2 encap action to DV specification.
4191  *
4192  * @param[in] dev
4193  *   Pointer to rte_eth_dev structure.
4194  * @param[in] action
4195  *   Pointer to action structure.
4196  * @param[in, out] dev_flow
4197  *   Pointer to the mlx5_flow.
4198  * @param[in] transfer
4199  *   Mark if the flow is E-Switch flow.
4200  * @param[out] error
4201  *   Pointer to the error structure.
4202  *
4203  * @return
4204  *   0 on success, a negative errno value otherwise and rte_errno is set.
4205  */
4206 static int
4207 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4208                                const struct rte_flow_action *action,
4209                                struct mlx5_flow *dev_flow,
4210                                uint8_t transfer,
4211                                struct rte_flow_error *error)
4212 {
4213         const struct rte_flow_item *encap_data;
4214         const struct rte_flow_action_raw_encap *raw_encap_data;
4215         struct mlx5_flow_dv_encap_decap_resource res = {
4216                 .reformat_type =
4217                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4218                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4219                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4220         };
4221
4222         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4223                 raw_encap_data =
4224                         (const struct rte_flow_action_raw_encap *)action->conf;
4225                 res.size = raw_encap_data->size;
4226                 memcpy(res.buf, raw_encap_data->data, res.size);
4227         } else {
4228                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4229                         encap_data =
4230                                 ((const struct rte_flow_action_vxlan_encap *)
4231                                                 action->conf)->definition;
4232                 else
4233                         encap_data =
4234                                 ((const struct rte_flow_action_nvgre_encap *)
4235                                                 action->conf)->definition;
4236                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4237                                                &res.size, error))
4238                         return -rte_errno;
4239         }
4240         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4241                 return -rte_errno;
4242         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4243                 return rte_flow_error_set(error, EINVAL,
4244                                           RTE_FLOW_ERROR_TYPE_ACTION,
4245                                           NULL, "can't create L2 encap action");
4246         return 0;
4247 }
4248
4249 /**
4250  * Convert L2 decap action to DV specification.
4251  *
4252  * @param[in] dev
4253  *   Pointer to rte_eth_dev structure.
4254  * @param[in, out] dev_flow
4255  *   Pointer to the mlx5_flow.
4256  * @param[in] transfer
4257  *   Mark if the flow is E-Switch flow.
4258  * @param[out] error
4259  *   Pointer to the error structure.
4260  *
4261  * @return
4262  *   0 on success, a negative errno value otherwise and rte_errno is set.
4263  */
4264 static int
4265 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4266                                struct mlx5_flow *dev_flow,
4267                                uint8_t transfer,
4268                                struct rte_flow_error *error)
4269 {
4270         struct mlx5_flow_dv_encap_decap_resource res = {
4271                 .size = 0,
4272                 .reformat_type =
4273                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4274                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4275                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4276         };
4277
4278         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4279                 return rte_flow_error_set(error, EINVAL,
4280                                           RTE_FLOW_ERROR_TYPE_ACTION,
4281                                           NULL, "can't create L2 decap action");
4282         return 0;
4283 }
4284
4285 /**
4286  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4287  *
4288  * @param[in] dev
4289  *   Pointer to rte_eth_dev structure.
4290  * @param[in] action
4291  *   Pointer to action structure.
4292  * @param[in, out] dev_flow
4293  *   Pointer to the mlx5_flow.
4294  * @param[in] attr
4295  *   Pointer to the flow attributes.
4296  * @param[out] error
4297  *   Pointer to the error structure.
4298  *
4299  * @return
4300  *   0 on success, a negative errno value otherwise and rte_errno is set.
4301  */
4302 static int
4303 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4304                                 const struct rte_flow_action *action,
4305                                 struct mlx5_flow *dev_flow,
4306                                 const struct rte_flow_attr *attr,
4307                                 struct rte_flow_error *error)
4308 {
4309         const struct rte_flow_action_raw_encap *encap_data;
4310         struct mlx5_flow_dv_encap_decap_resource res;
4311
4312         memset(&res, 0, sizeof(res));
4313         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4314         res.size = encap_data->size;
4315         memcpy(res.buf, encap_data->data, res.size);
4316         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4317                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4318                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4319         if (attr->transfer)
4320                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4321         else
4322                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4323                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4324         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4325                 return rte_flow_error_set(error, EINVAL,
4326                                           RTE_FLOW_ERROR_TYPE_ACTION,
4327                                           NULL, "can't create encap action");
4328         return 0;
4329 }
4330
4331 /**
4332  * Create action push VLAN.
4333  *
4334  * @param[in] dev
4335  *   Pointer to rte_eth_dev structure.
4336  * @param[in] attr
4337  *   Pointer to the flow attributes.
4338  * @param[in] vlan
4339  *   Pointer to the vlan to push to the Ethernet header.
4340  * @param[in, out] dev_flow
4341  *   Pointer to the mlx5_flow.
4342  * @param[out] error
4343  *   Pointer to the error structure.
4344  *
4345  * @return
4346  *   0 on success, a negative errno value otherwise and rte_errno is set.
4347  */
4348 static int
4349 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4350                                 const struct rte_flow_attr *attr,
4351                                 const struct rte_vlan_hdr *vlan,
4352                                 struct mlx5_flow *dev_flow,
4353                                 struct rte_flow_error *error)
4354 {
4355         struct mlx5_flow_dv_push_vlan_action_resource res;
4356
4357         memset(&res, 0, sizeof(res));
4358         res.vlan_tag =
4359                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4360                                  vlan->vlan_tci);
4361         if (attr->transfer)
4362                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4363         else
4364                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4365                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4366         return flow_dv_push_vlan_action_resource_register
4367                                             (dev, &res, dev_flow, error);
4368 }
4369
4370 /**
4371  * Validate the modify-header actions.
4372  *
4373  * @param[in] action_flags
4374  *   Holds the actions detected until now.
4375  * @param[in] action
4376  *   Pointer to the modify action.
4377  * @param[out] error
4378  *   Pointer to error structure.
4379  *
4380  * @return
4381  *   0 on success, a negative errno value otherwise and rte_errno is set.
4382  */
4383 static int
4384 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4385                                    const struct rte_flow_action *action,
4386                                    struct rte_flow_error *error)
4387 {
4388         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4389                 return rte_flow_error_set(error, EINVAL,
4390                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4391                                           NULL, "action configuration not set");
4392         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4393                 return rte_flow_error_set(error, EINVAL,
4394                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4395                                           "can't have encap action before"
4396                                           " modify action");
4397         return 0;
4398 }
4399
4400 /**
4401  * Validate the modify-header MAC address actions.
4402  *
4403  * @param[in] action_flags
4404  *   Holds the actions detected until now.
4405  * @param[in] action
4406  *   Pointer to the modify action.
4407  * @param[in] item_flags
4408  *   Holds the items detected.
4409  * @param[out] error
4410  *   Pointer to error structure.
4411  *
4412  * @return
4413  *   0 on success, a negative errno value otherwise and rte_errno is set.
4414  */
4415 static int
4416 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4417                                    const struct rte_flow_action *action,
4418                                    const uint64_t item_flags,
4419                                    struct rte_flow_error *error)
4420 {
4421         int ret = 0;
4422
4423         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4424         if (!ret) {
4425                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4426                         return rte_flow_error_set(error, EINVAL,
4427                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4428                                                   NULL,
4429                                                   "no L2 item in pattern");
4430         }
4431         return ret;
4432 }
4433
4434 /**
4435  * Validate the modify-header IPv4 address actions.
4436  *
4437  * @param[in] action_flags
4438  *   Holds the actions detected until now.
4439  * @param[in] action
4440  *   Pointer to the modify action.
4441  * @param[in] item_flags
4442  *   Holds the items detected.
4443  * @param[out] error
4444  *   Pointer to error structure.
4445  *
4446  * @return
4447  *   0 on success, a negative errno value otherwise and rte_errno is set.
4448  */
4449 static int
4450 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4451                                     const struct rte_flow_action *action,
4452                                     const uint64_t item_flags,
4453                                     struct rte_flow_error *error)
4454 {
4455         int ret = 0;
4456         uint64_t layer;
4457
4458         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4459         if (!ret) {
4460                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4461                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4462                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4463                 if (!(item_flags & layer))
4464                         return rte_flow_error_set(error, EINVAL,
4465                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4466                                                   NULL,
4467                                                   "no ipv4 item in pattern");
4468         }
4469         return ret;
4470 }
4471
4472 /**
4473  * Validate the modify-header IPv6 address actions.
4474  *
4475  * @param[in] action_flags
4476  *   Holds the actions detected until now.
4477  * @param[in] action
4478  *   Pointer to the modify action.
4479  * @param[in] item_flags
4480  *   Holds the items detected.
4481  * @param[out] error
4482  *   Pointer to error structure.
4483  *
4484  * @return
4485  *   0 on success, a negative errno value otherwise and rte_errno is set.
4486  */
4487 static int
4488 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4489                                     const struct rte_flow_action *action,
4490                                     const uint64_t item_flags,
4491                                     struct rte_flow_error *error)
4492 {
4493         int ret = 0;
4494         uint64_t layer;
4495
4496         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4497         if (!ret) {
4498                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4499                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4500                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4501                 if (!(item_flags & layer))
4502                         return rte_flow_error_set(error, EINVAL,
4503                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4504                                                   NULL,
4505                                                   "no ipv6 item in pattern");
4506         }
4507         return ret;
4508 }
4509
4510 /**
4511  * Validate the modify-header TP actions.
4512  *
4513  * @param[in] action_flags
4514  *   Holds the actions detected until now.
4515  * @param[in] action
4516  *   Pointer to the modify action.
4517  * @param[in] item_flags
4518  *   Holds the items detected.
4519  * @param[out] error
4520  *   Pointer to error structure.
4521  *
4522  * @return
4523  *   0 on success, a negative errno value otherwise and rte_errno is set.
4524  */
4525 static int
4526 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4527                                   const struct rte_flow_action *action,
4528                                   const uint64_t item_flags,
4529                                   struct rte_flow_error *error)
4530 {
4531         int ret = 0;
4532         uint64_t layer;
4533
4534         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4535         if (!ret) {
4536                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4537                                  MLX5_FLOW_LAYER_INNER_L4 :
4538                                  MLX5_FLOW_LAYER_OUTER_L4;
4539                 if (!(item_flags & layer))
4540                         return rte_flow_error_set(error, EINVAL,
4541                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4542                                                   NULL, "no transport layer "
4543                                                   "in pattern");
4544         }
4545         return ret;
4546 }
4547
4548 /**
4549  * Validate the modify-header actions of increment/decrement
4550  * TCP Sequence-number.
4551  *
4552  * @param[in] action_flags
4553  *   Holds the actions detected until now.
4554  * @param[in] action
4555  *   Pointer to the modify action.
4556  * @param[in] item_flags
4557  *   Holds the items detected.
4558  * @param[out] error
4559  *   Pointer to error structure.
4560  *
4561  * @return
4562  *   0 on success, a negative errno value otherwise and rte_errno is set.
4563  */
4564 static int
4565 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4566                                        const struct rte_flow_action *action,
4567                                        const uint64_t item_flags,
4568                                        struct rte_flow_error *error)
4569 {
4570         int ret = 0;
4571         uint64_t layer;
4572
4573         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4574         if (!ret) {
4575                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4576                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4577                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4578                 if (!(item_flags & layer))
4579                         return rte_flow_error_set(error, EINVAL,
4580                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4581                                                   NULL, "no TCP item in"
4582                                                   " pattern");
4583                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4584                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4585                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4586                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4587                         return rte_flow_error_set(error, EINVAL,
4588                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4589                                                   NULL,
4590                                                   "cannot decrease and increase"
4591                                                   " TCP sequence number"
4592                                                   " at the same time");
4593         }
4594         return ret;
4595 }
4596
4597 /**
4598  * Validate the modify-header actions of increment/decrement
4599  * TCP Acknowledgment number.
4600  *
4601  * @param[in] action_flags
4602  *   Holds the actions detected until now.
4603  * @param[in] action
4604  *   Pointer to the modify action.
4605  * @param[in] item_flags
4606  *   Holds the items detected.
4607  * @param[out] error
4608  *   Pointer to error structure.
4609  *
4610  * @return
4611  *   0 on success, a negative errno value otherwise and rte_errno is set.
4612  */
4613 static int
4614 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4615                                        const struct rte_flow_action *action,
4616                                        const uint64_t item_flags,
4617                                        struct rte_flow_error *error)
4618 {
4619         int ret = 0;
4620         uint64_t layer;
4621
4622         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4623         if (!ret) {
4624                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4625                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4626                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4627                 if (!(item_flags & layer))
4628                         return rte_flow_error_set(error, EINVAL,
4629                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4630                                                   NULL, "no TCP item in"
4631                                                   " pattern");
4632                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4633                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4634                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4635                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4636                         return rte_flow_error_set(error, EINVAL,
4637                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4638                                                   NULL,
4639                                                   "cannot decrease and increase"
4640                                                   " TCP acknowledgment number"
4641                                                   " at the same time");
4642         }
4643         return ret;
4644 }
4645
4646 /**
4647  * Validate the modify-header TTL actions.
4648  *
4649  * @param[in] action_flags
4650  *   Holds the actions detected until now.
4651  * @param[in] action
4652  *   Pointer to the modify action.
4653  * @param[in] item_flags
4654  *   Holds the items detected.
4655  * @param[out] error
4656  *   Pointer to error structure.
4657  *
4658  * @return
4659  *   0 on success, a negative errno value otherwise and rte_errno is set.
4660  */
4661 static int
4662 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4663                                    const struct rte_flow_action *action,
4664                                    const uint64_t item_flags,
4665                                    struct rte_flow_error *error)
4666 {
4667         int ret = 0;
4668         uint64_t layer;
4669
4670         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4671         if (!ret) {
4672                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4673                                  MLX5_FLOW_LAYER_INNER_L3 :
4674                                  MLX5_FLOW_LAYER_OUTER_L3;
4675                 if (!(item_flags & layer))
4676                         return rte_flow_error_set(error, EINVAL,
4677                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4678                                                   NULL,
4679                                                   "no IP protocol in pattern");
4680         }
4681         return ret;
4682 }
4683
4684 /**
4685  * Validate the generic modify field actions.
4686  * @param[in] dev
4687  *   Pointer to the rte_eth_dev structure.
4688  * @param[in] action_flags
4689  *   Holds the actions detected until now.
4690  * @param[in] action
4691  *   Pointer to the modify action.
4692  * @param[in] attr
4693  *   Pointer to the flow attributes.
4694  * @param[out] error
4695  *   Pointer to error structure.
4696  *
4697  * @return
4698  *   Number of header fields to modify (0 or more) on success,
4699  *   a negative errno value otherwise and rte_errno is set.
4700  */
4701 static int
4702 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4703                                    const uint64_t action_flags,
4704                                    const struct rte_flow_action *action,
4705                                    const struct rte_flow_attr *attr,
4706                                    struct rte_flow_error *error)
4707 {
4708         int ret = 0;
4709         struct mlx5_priv *priv = dev->data->dev_private;
4710         struct mlx5_dev_config *config = &priv->config;
4711         const struct rte_flow_action_modify_field *action_modify_field =
4712                 action->conf;
4713         uint32_t dst_width =
4714                 mlx5_flow_item_field_width(action_modify_field->dst.field);
4715         uint32_t src_width =
4716                 mlx5_flow_item_field_width(action_modify_field->src.field);
4717
4718         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4719         if (ret)
4720                 return ret;
4721
4722         if (action_modify_field->width == 0)
4723                 return rte_flow_error_set(error, EINVAL,
4724                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4725                                 "no bits are requested to be modified");
4726         else if (action_modify_field->width > dst_width ||
4727                  action_modify_field->width > src_width)
4728                 return rte_flow_error_set(error, EINVAL,
4729                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4730                                 "cannot modify more bits than"
4731                                 " the width of a field");
4732         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4733             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4734                 if ((action_modify_field->dst.offset +
4735                      action_modify_field->width > dst_width) ||
4736                     (action_modify_field->dst.offset % 32))
4737                         return rte_flow_error_set(error, EINVAL,
4738                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4739                                         "destination offset is too big"
4740                                         " or not aligned to 4 bytes");
4741                 if (action_modify_field->dst.level &&
4742                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4743                         return rte_flow_error_set(error, ENOTSUP,
4744                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4745                                         "inner header fields modification"
4746                                         " is not supported");
4747         }
4748         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4749             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4750                 if (!attr->transfer && !attr->group)
4751                         return rte_flow_error_set(error, ENOTSUP,
4752                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4753                                         "modify field action is not"
4754                                         " supported for group 0");
4755                 if ((action_modify_field->src.offset +
4756                      action_modify_field->width > src_width) ||
4757                     (action_modify_field->src.offset % 32))
4758                         return rte_flow_error_set(error, EINVAL,
4759                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4760                                         "source offset is too big"
4761                                         " or not aligned to 4 bytes");
4762                 if (action_modify_field->src.level &&
4763                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4764                         return rte_flow_error_set(error, ENOTSUP,
4765                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4766                                         "inner header fields modification"
4767                                         " is not supported");
4768         }
4769         if (action_modify_field->dst.field ==
4770             action_modify_field->src.field)
4771                 return rte_flow_error_set(error, EINVAL,
4772                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4773                                 "source and destination fields"
4774                                 " cannot be the same");
4775         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4776             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER)
4777                 return rte_flow_error_set(error, EINVAL,
4778                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4779                                 "immediate value or a pointer to it"
4780                                 " cannot be used as a destination");
4781         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4782             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4783                 return rte_flow_error_set(error, ENOTSUP,
4784                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4785                                 "modifications of an arbitrary"
4786                                 " place in a packet is not supported");
4787         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4788             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4789                 return rte_flow_error_set(error, ENOTSUP,
4790                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4791                                 "modifications of the 802.1Q Tag"
4792                                 " Identifier is not supported");
4793         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4794             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4795                 return rte_flow_error_set(error, ENOTSUP,
4796                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4797                                 "modifications of the VXLAN Network"
4798                                 " Identifier is not supported");
4799         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4800             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4801                 return rte_flow_error_set(error, ENOTSUP,
4802                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4803                                 "modifications of the GENEVE Network"
4804                                 " Identifier is not supported");
4805         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4806             action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4807             action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4808             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4809                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4810                     !mlx5_flow_ext_mreg_supported(dev))
4811                         return rte_flow_error_set(error, ENOTSUP,
4812                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4813                                         "cannot modify mark or metadata without"
4814                                         " extended metadata register support");
4815         }
4816         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4817                 return rte_flow_error_set(error, ENOTSUP,
4818                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4819                                 "add and sub operations"
4820                                 " are not supported");
4821         return (action_modify_field->width / 32) +
4822                !!(action_modify_field->width % 32);
4823 }
4824
4825 /**
4826  * Validate jump action.
4827  *
4828  * @param[in] action
4829  *   Pointer to the jump action.
4830  * @param[in] action_flags
4831  *   Holds the actions detected until now.
4832  * @param[in] attributes
4833  *   Pointer to flow attributes
4834  * @param[in] external
4835  *   Action belongs to flow rule created by request external to PMD.
4836  * @param[out] error
4837  *   Pointer to error structure.
4838  *
4839  * @return
4840  *   0 on success, a negative errno value otherwise and rte_errno is set.
4841  */
4842 static int
4843 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4844                              const struct mlx5_flow_tunnel *tunnel,
4845                              const struct rte_flow_action *action,
4846                              uint64_t action_flags,
4847                              const struct rte_flow_attr *attributes,
4848                              bool external, struct rte_flow_error *error)
4849 {
4850         uint32_t target_group, table;
4851         int ret = 0;
4852         struct flow_grp_info grp_info = {
4853                 .external = !!external,
4854                 .transfer = !!attributes->transfer,
4855                 .fdb_def_rule = 1,
4856                 .std_tbl_fix = 0
4857         };
4858         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4859                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4860                 return rte_flow_error_set(error, EINVAL,
4861                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4862                                           "can't have 2 fate actions in"
4863                                           " same flow");
4864         if (!action->conf)
4865                 return rte_flow_error_set(error, EINVAL,
4866                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4867                                           NULL, "action configuration not set");
4868         target_group =
4869                 ((const struct rte_flow_action_jump *)action->conf)->group;
4870         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4871                                        &grp_info, error);
4872         if (ret)
4873                 return ret;
4874         if (attributes->group == target_group &&
4875             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4876                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
4877                 return rte_flow_error_set(error, EINVAL,
4878                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4879                                           "target group must be other than"
4880                                           " the current flow group");
4881         return 0;
4882 }
4883
4884 /*
4885  * Validate the port_id action.
4886  *
4887  * @param[in] dev
4888  *   Pointer to rte_eth_dev structure.
4889  * @param[in] action_flags
4890  *   Bit-fields that holds the actions detected until now.
4891  * @param[in] action
4892  *   Port_id RTE action structure.
4893  * @param[in] attr
4894  *   Attributes of flow that includes this action.
4895  * @param[out] error
4896  *   Pointer to error structure.
4897  *
4898  * @return
4899  *   0 on success, a negative errno value otherwise and rte_errno is set.
4900  */
4901 static int
4902 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
4903                                 uint64_t action_flags,
4904                                 const struct rte_flow_action *action,
4905                                 const struct rte_flow_attr *attr,
4906                                 struct rte_flow_error *error)
4907 {
4908         const struct rte_flow_action_port_id *port_id;
4909         struct mlx5_priv *act_priv;
4910         struct mlx5_priv *dev_priv;
4911         uint16_t port;
4912
4913         if (!attr->transfer)
4914                 return rte_flow_error_set(error, ENOTSUP,
4915                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4916                                           NULL,
4917                                           "port id action is valid in transfer"
4918                                           " mode only");
4919         if (!action || !action->conf)
4920                 return rte_flow_error_set(error, ENOTSUP,
4921                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4922                                           NULL,
4923                                           "port id action parameters must be"
4924                                           " specified");
4925         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4926                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4927                 return rte_flow_error_set(error, EINVAL,
4928                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4929                                           "can have only one fate actions in"
4930                                           " a flow");
4931         dev_priv = mlx5_dev_to_eswitch_info(dev);
4932         if (!dev_priv)
4933                 return rte_flow_error_set(error, rte_errno,
4934                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4935                                           NULL,
4936                                           "failed to obtain E-Switch info");
4937         port_id = action->conf;
4938         port = port_id->original ? dev->data->port_id : port_id->id;
4939         act_priv = mlx5_port_to_eswitch_info(port, false);
4940         if (!act_priv)
4941                 return rte_flow_error_set
4942                                 (error, rte_errno,
4943                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
4944                                  "failed to obtain E-Switch port id for port");
4945         if (act_priv->domain_id != dev_priv->domain_id)
4946                 return rte_flow_error_set
4947                                 (error, EINVAL,
4948                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4949                                  "port does not belong to"
4950                                  " E-Switch being configured");
4951         return 0;
4952 }
4953
4954 /**
4955  * Get the maximum number of modify header actions.
4956  *
4957  * @param dev
4958  *   Pointer to rte_eth_dev structure.
4959  * @param flags
4960  *   Flags bits to check if root level.
4961  *
4962  * @return
4963  *   Max number of modify header actions device can support.
4964  */
4965 static inline unsigned int
4966 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
4967                               uint64_t flags)
4968 {
4969         /*
4970          * There's no way to directly query the max capacity from FW.
4971          * The maximal value on root table should be assumed to be supported.
4972          */
4973         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
4974                 return MLX5_MAX_MODIFY_NUM;
4975         else
4976                 return MLX5_ROOT_TBL_MODIFY_NUM;
4977 }
4978
4979 /**
4980  * Validate the meter action.
4981  *
4982  * @param[in] dev
4983  *   Pointer to rte_eth_dev structure.
4984  * @param[in] action_flags
4985  *   Bit-fields that holds the actions detected until now.
4986  * @param[in] action
4987  *   Pointer to the meter action.
4988  * @param[in] attr
4989  *   Attributes of flow that includes this action.
4990  * @param[out] error
4991  *   Pointer to error structure.
4992  *
4993  * @return
4994  *   0 on success, a negative errno value otherwise and rte_ernno is set.
4995  */
4996 static int
4997 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
4998                                 uint64_t action_flags,
4999                                 const struct rte_flow_action *action,
5000                                 const struct rte_flow_attr *attr,
5001                                 bool *def_policy,
5002                                 struct rte_flow_error *error)
5003 {
5004         struct mlx5_priv *priv = dev->data->dev_private;
5005         const struct rte_flow_action_meter *am = action->conf;
5006         struct mlx5_flow_meter_info *fm;
5007         struct mlx5_flow_meter_policy *mtr_policy;
5008         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5009
5010         if (!am)
5011                 return rte_flow_error_set(error, EINVAL,
5012                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5013                                           "meter action conf is NULL");
5014
5015         if (action_flags & MLX5_FLOW_ACTION_METER)
5016                 return rte_flow_error_set(error, ENOTSUP,
5017                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5018                                           "meter chaining not support");
5019         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5020                 return rte_flow_error_set(error, ENOTSUP,
5021                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5022                                           "meter with jump not support");
5023         if (!priv->mtr_en)
5024                 return rte_flow_error_set(error, ENOTSUP,
5025                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5026                                           NULL,
5027                                           "meter action not supported");
5028         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5029         if (!fm)
5030                 return rte_flow_error_set(error, EINVAL,
5031                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5032                                           "Meter not found");
5033         /* aso meter can always be shared by different domains */
5034         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5035             !(fm->transfer == attr->transfer ||
5036               (!fm->ingress && !attr->ingress && attr->egress) ||
5037               (!fm->egress && !attr->egress && attr->ingress)))
5038                 return rte_flow_error_set(error, EINVAL,
5039                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5040                         "Flow attributes domain are either invalid "
5041                         "or have a domain conflict with current "
5042                         "meter attributes");
5043         if (fm->def_policy) {
5044                 if (!((attr->transfer &&
5045                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5046                         (attr->egress &&
5047                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5048                         (attr->ingress &&
5049                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5050                         return rte_flow_error_set(error, EINVAL,
5051                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5052                                           "Flow attributes domain "
5053                                           "have a conflict with current "
5054                                           "meter domain attributes");
5055                 *def_policy = true;
5056         } else {
5057                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5058                                                 fm->policy_id, NULL);
5059                 if (!mtr_policy)
5060                         return rte_flow_error_set(error, EINVAL,
5061                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5062                                           "Invalid policy id for meter ");
5063                 if (!((attr->transfer && mtr_policy->transfer) ||
5064                         (attr->egress && mtr_policy->egress) ||
5065                         (attr->ingress && mtr_policy->ingress)))
5066                         return rte_flow_error_set(error, EINVAL,
5067                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5068                                           "Flow attributes domain "
5069                                           "have a conflict with current "
5070                                           "meter domain attributes");
5071                 *def_policy = false;
5072         }
5073         return 0;
5074 }
5075
5076 /**
5077  * Validate the age action.
5078  *
5079  * @param[in] action_flags
5080  *   Holds the actions detected until now.
5081  * @param[in] action
5082  *   Pointer to the age action.
5083  * @param[in] dev
5084  *   Pointer to the Ethernet device structure.
5085  * @param[out] error
5086  *   Pointer to error structure.
5087  *
5088  * @return
5089  *   0 on success, a negative errno value otherwise and rte_errno is set.
5090  */
5091 static int
5092 flow_dv_validate_action_age(uint64_t action_flags,
5093                             const struct rte_flow_action *action,
5094                             struct rte_eth_dev *dev,
5095                             struct rte_flow_error *error)
5096 {
5097         struct mlx5_priv *priv = dev->data->dev_private;
5098         const struct rte_flow_action_age *age = action->conf;
5099
5100         if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5101             !priv->sh->aso_age_mng))
5102                 return rte_flow_error_set(error, ENOTSUP,
5103                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5104                                           NULL,
5105                                           "age action not supported");
5106         if (!(action->conf))
5107                 return rte_flow_error_set(error, EINVAL,
5108                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5109                                           "configuration cannot be null");
5110         if (!(age->timeout))
5111                 return rte_flow_error_set(error, EINVAL,
5112                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5113                                           "invalid timeout value 0");
5114         if (action_flags & MLX5_FLOW_ACTION_AGE)
5115                 return rte_flow_error_set(error, EINVAL,
5116                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5117                                           "duplicate age actions set");
5118         return 0;
5119 }
5120
5121 /**
5122  * Validate the modify-header IPv4 DSCP actions.
5123  *
5124  * @param[in] action_flags
5125  *   Holds the actions detected until now.
5126  * @param[in] action
5127  *   Pointer to the modify action.
5128  * @param[in] item_flags
5129  *   Holds the items detected.
5130  * @param[out] error
5131  *   Pointer to error structure.
5132  *
5133  * @return
5134  *   0 on success, a negative errno value otherwise and rte_errno is set.
5135  */
5136 static int
5137 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5138                                          const struct rte_flow_action *action,
5139                                          const uint64_t item_flags,
5140                                          struct rte_flow_error *error)
5141 {
5142         int ret = 0;
5143
5144         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5145         if (!ret) {
5146                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5147                         return rte_flow_error_set(error, EINVAL,
5148                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5149                                                   NULL,
5150                                                   "no ipv4 item in pattern");
5151         }
5152         return ret;
5153 }
5154
5155 /**
5156  * Validate the modify-header IPv6 DSCP actions.
5157  *
5158  * @param[in] action_flags
5159  *   Holds the actions detected until now.
5160  * @param[in] action
5161  *   Pointer to the modify action.
5162  * @param[in] item_flags
5163  *   Holds the items detected.
5164  * @param[out] error
5165  *   Pointer to error structure.
5166  *
5167  * @return
5168  *   0 on success, a negative errno value otherwise and rte_errno is set.
5169  */
5170 static int
5171 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5172                                          const struct rte_flow_action *action,
5173                                          const uint64_t item_flags,
5174                                          struct rte_flow_error *error)
5175 {
5176         int ret = 0;
5177
5178         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5179         if (!ret) {
5180                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5181                         return rte_flow_error_set(error, EINVAL,
5182                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5183                                                   NULL,
5184                                                   "no ipv6 item in pattern");
5185         }
5186         return ret;
5187 }
5188
5189 /**
5190  * Match modify-header resource.
5191  *
5192  * @param list
5193  *   Pointer to the hash list.
5194  * @param entry
5195  *   Pointer to exist resource entry object.
5196  * @param key
5197  *   Key of the new entry.
5198  * @param ctx
5199  *   Pointer to new modify-header resource.
5200  *
5201  * @return
5202  *   0 on matching, non-zero otherwise.
5203  */
5204 int
5205 flow_dv_modify_match_cb(struct mlx5_hlist *list __rte_unused,
5206                         struct mlx5_hlist_entry *entry,
5207                         uint64_t key __rte_unused, void *cb_ctx)
5208 {
5209         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5210         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5211         struct mlx5_flow_dv_modify_hdr_resource *resource =
5212                         container_of(entry, typeof(*resource), entry);
5213         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5214
5215         key_len += ref->actions_num * sizeof(ref->actions[0]);
5216         return ref->actions_num != resource->actions_num ||
5217                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5218 }
5219
5220 struct mlx5_hlist_entry *
5221 flow_dv_modify_create_cb(struct mlx5_hlist *list, uint64_t key __rte_unused,
5222                          void *cb_ctx)
5223 {
5224         struct mlx5_dev_ctx_shared *sh = list->ctx;
5225         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5226         struct mlx5dv_dr_domain *ns;
5227         struct mlx5_flow_dv_modify_hdr_resource *entry;
5228         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5229         int ret;
5230         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5231         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5232
5233         entry = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*entry) + data_len, 0,
5234                             SOCKET_ID_ANY);
5235         if (!entry) {
5236                 rte_flow_error_set(ctx->error, ENOMEM,
5237                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5238                                    "cannot allocate resource memory");
5239                 return NULL;
5240         }
5241         rte_memcpy(&entry->ft_type,
5242                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5243                    key_len + data_len);
5244         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5245                 ns = sh->fdb_domain;
5246         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5247                 ns = sh->tx_domain;
5248         else
5249                 ns = sh->rx_domain;
5250         ret = mlx5_flow_os_create_flow_action_modify_header
5251                                         (sh->ctx, ns, entry,
5252                                          data_len, &entry->action);
5253         if (ret) {
5254                 mlx5_free(entry);
5255                 rte_flow_error_set(ctx->error, ENOMEM,
5256                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5257                                    NULL, "cannot create modification action");
5258                 return NULL;
5259         }
5260         return &entry->entry;
5261 }
5262
5263 /**
5264  * Validate the sample action.
5265  *
5266  * @param[in, out] action_flags
5267  *   Holds the actions detected until now.
5268  * @param[in] action
5269  *   Pointer to the sample action.
5270  * @param[in] dev
5271  *   Pointer to the Ethernet device structure.
5272  * @param[in] attr
5273  *   Attributes of flow that includes this action.
5274  * @param[in] item_flags
5275  *   Holds the items detected.
5276  * @param[in] rss
5277  *   Pointer to the RSS action.
5278  * @param[out] sample_rss
5279  *   Pointer to the RSS action in sample action list.
5280  * @param[out] count
5281  *   Pointer to the COUNT action in sample action list.
5282  * @param[out] fdb_mirror_limit
5283  *   Pointer to the FDB mirror limitation flag.
5284  * @param[out] error
5285  *   Pointer to error structure.
5286  *
5287  * @return
5288  *   0 on success, a negative errno value otherwise and rte_errno is set.
5289  */
5290 static int
5291 flow_dv_validate_action_sample(uint64_t *action_flags,
5292                                const struct rte_flow_action *action,
5293                                struct rte_eth_dev *dev,
5294                                const struct rte_flow_attr *attr,
5295                                uint64_t item_flags,
5296                                const struct rte_flow_action_rss *rss,
5297                                const struct rte_flow_action_rss **sample_rss,
5298                                const struct rte_flow_action_count **count,
5299                                int *fdb_mirror_limit,
5300                                struct rte_flow_error *error)
5301 {
5302         struct mlx5_priv *priv = dev->data->dev_private;
5303         struct mlx5_dev_config *dev_conf = &priv->config;
5304         const struct rte_flow_action_sample *sample = action->conf;
5305         const struct rte_flow_action *act;
5306         uint64_t sub_action_flags = 0;
5307         uint16_t queue_index = 0xFFFF;
5308         int actions_n = 0;
5309         int ret;
5310
5311         if (!sample)
5312                 return rte_flow_error_set(error, EINVAL,
5313                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5314                                           "configuration cannot be NULL");
5315         if (sample->ratio == 0)
5316                 return rte_flow_error_set(error, EINVAL,
5317                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5318                                           "ratio value starts from 1");
5319         if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5320                 return rte_flow_error_set(error, ENOTSUP,
5321                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5322                                           NULL,
5323                                           "sample action not supported");
5324         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5325                 return rte_flow_error_set(error, EINVAL,
5326                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5327                                           "Multiple sample actions not "
5328                                           "supported");
5329         if (*action_flags & MLX5_FLOW_ACTION_METER)
5330                 return rte_flow_error_set(error, EINVAL,
5331                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5332                                           "wrong action order, meter should "
5333                                           "be after sample action");
5334         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5335                 return rte_flow_error_set(error, EINVAL,
5336                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5337                                           "wrong action order, jump should "
5338                                           "be after sample action");
5339         act = sample->actions;
5340         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5341                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5342                         return rte_flow_error_set(error, ENOTSUP,
5343                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5344                                                   act, "too many actions");
5345                 switch (act->type) {
5346                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5347                         ret = mlx5_flow_validate_action_queue(act,
5348                                                               sub_action_flags,
5349                                                               dev,
5350                                                               attr, error);
5351                         if (ret < 0)
5352                                 return ret;
5353                         queue_index = ((const struct rte_flow_action_queue *)
5354                                                         (act->conf))->index;
5355                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5356                         ++actions_n;
5357                         break;
5358                 case RTE_FLOW_ACTION_TYPE_RSS:
5359                         *sample_rss = act->conf;
5360                         ret = mlx5_flow_validate_action_rss(act,
5361                                                             sub_action_flags,
5362                                                             dev, attr,
5363                                                             item_flags,
5364                                                             error);
5365                         if (ret < 0)
5366                                 return ret;
5367                         if (rss && *sample_rss &&
5368                             ((*sample_rss)->level != rss->level ||
5369                             (*sample_rss)->types != rss->types))
5370                                 return rte_flow_error_set(error, ENOTSUP,
5371                                         RTE_FLOW_ERROR_TYPE_ACTION,
5372                                         NULL,
5373                                         "Can't use the different RSS types "
5374                                         "or level in the same flow");
5375                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5376                                 queue_index = (*sample_rss)->queue[0];
5377                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5378                         ++actions_n;
5379                         break;
5380                 case RTE_FLOW_ACTION_TYPE_MARK:
5381                         ret = flow_dv_validate_action_mark(dev, act,
5382                                                            sub_action_flags,
5383                                                            attr, error);
5384                         if (ret < 0)
5385                                 return ret;
5386                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5387                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5388                                                 MLX5_FLOW_ACTION_MARK_EXT;
5389                         else
5390                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5391                         ++actions_n;
5392                         break;
5393                 case RTE_FLOW_ACTION_TYPE_COUNT:
5394                         ret = flow_dv_validate_action_count
5395                                 (dev, is_shared_action_count(act),
5396                                  *action_flags | sub_action_flags,
5397                                  error);
5398                         if (ret < 0)
5399                                 return ret;
5400                         *count = act->conf;
5401                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5402                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5403                         ++actions_n;
5404                         break;
5405                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5406                         ret = flow_dv_validate_action_port_id(dev,
5407                                                               sub_action_flags,
5408                                                               act,
5409                                                               attr,
5410                                                               error);
5411                         if (ret)
5412                                 return ret;
5413                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5414                         ++actions_n;
5415                         break;
5416                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5417                         ret = flow_dv_validate_action_raw_encap_decap
5418                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5419                                  &actions_n, action, item_flags, error);
5420                         if (ret < 0)
5421                                 return ret;
5422                         ++actions_n;
5423                         break;
5424                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5425                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5426                         ret = flow_dv_validate_action_l2_encap(dev,
5427                                                                sub_action_flags,
5428                                                                act, attr,
5429                                                                error);
5430                         if (ret < 0)
5431                                 return ret;
5432                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5433                         ++actions_n;
5434                         break;
5435                 default:
5436                         return rte_flow_error_set(error, ENOTSUP,
5437                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5438                                                   NULL,
5439                                                   "Doesn't support optional "
5440                                                   "action");
5441                 }
5442         }
5443         if (attr->ingress && !attr->transfer) {
5444                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5445                                           MLX5_FLOW_ACTION_RSS)))
5446                         return rte_flow_error_set(error, EINVAL,
5447                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5448                                                   NULL,
5449                                                   "Ingress must has a dest "
5450                                                   "QUEUE for Sample");
5451         } else if (attr->egress && !attr->transfer) {
5452                 return rte_flow_error_set(error, ENOTSUP,
5453                                           RTE_FLOW_ERROR_TYPE_ACTION,
5454                                           NULL,
5455                                           "Sample Only support Ingress "
5456                                           "or E-Switch");
5457         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5458                 MLX5_ASSERT(attr->transfer);
5459                 if (sample->ratio > 1)
5460                         return rte_flow_error_set(error, ENOTSUP,
5461                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5462                                                   NULL,
5463                                                   "E-Switch doesn't support "
5464                                                   "any optional action "
5465                                                   "for sampling");
5466                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5467                         return rte_flow_error_set(error, ENOTSUP,
5468                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5469                                                   NULL,
5470                                                   "unsupported action QUEUE");
5471                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5472                         return rte_flow_error_set(error, ENOTSUP,
5473                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5474                                                   NULL,
5475                                                   "unsupported action QUEUE");
5476                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5477                         return rte_flow_error_set(error, EINVAL,
5478                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5479                                                   NULL,
5480                                                   "E-Switch must has a dest "
5481                                                   "port for mirroring");
5482                 if (!priv->config.hca_attr.reg_c_preserve &&
5483                      priv->representor_id != -1)
5484                         *fdb_mirror_limit = 1;
5485         }
5486         /* Continue validation for Xcap actions.*/
5487         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5488             (queue_index == 0xFFFF ||
5489              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5490                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5491                      MLX5_FLOW_XCAP_ACTIONS)
5492                         return rte_flow_error_set(error, ENOTSUP,
5493                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5494                                                   NULL, "encap and decap "
5495                                                   "combination aren't "
5496                                                   "supported");
5497                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5498                                                         MLX5_FLOW_ACTION_ENCAP))
5499                         return rte_flow_error_set(error, ENOTSUP,
5500                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5501                                                   NULL, "encap is not supported"
5502                                                   " for ingress traffic");
5503         }
5504         return 0;
5505 }
5506
5507 /**
5508  * Find existing modify-header resource or create and register a new one.
5509  *
5510  * @param dev[in, out]
5511  *   Pointer to rte_eth_dev structure.
5512  * @param[in, out] resource
5513  *   Pointer to modify-header resource.
5514  * @parm[in, out] dev_flow
5515  *   Pointer to the dev_flow.
5516  * @param[out] error
5517  *   pointer to error structure.
5518  *
5519  * @return
5520  *   0 on success otherwise -errno and errno is set.
5521  */
5522 static int
5523 flow_dv_modify_hdr_resource_register
5524                         (struct rte_eth_dev *dev,
5525                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5526                          struct mlx5_flow *dev_flow,
5527                          struct rte_flow_error *error)
5528 {
5529         struct mlx5_priv *priv = dev->data->dev_private;
5530         struct mlx5_dev_ctx_shared *sh = priv->sh;
5531         uint32_t key_len = sizeof(*resource) -
5532                            offsetof(typeof(*resource), ft_type) +
5533                            resource->actions_num * sizeof(resource->actions[0]);
5534         struct mlx5_hlist_entry *entry;
5535         struct mlx5_flow_cb_ctx ctx = {
5536                 .error = error,
5537                 .data = resource,
5538         };
5539         uint64_t key64;
5540
5541         resource->flags = dev_flow->dv.group ? 0 :
5542                           MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
5543         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5544                                     resource->flags))
5545                 return rte_flow_error_set(error, EOVERFLOW,
5546                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5547                                           "too many modify header items");
5548         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5549         entry = mlx5_hlist_register(sh->modify_cmds, key64, &ctx);
5550         if (!entry)
5551                 return -rte_errno;
5552         resource = container_of(entry, typeof(*resource), entry);
5553         dev_flow->handle->dvh.modify_hdr = resource;
5554         return 0;
5555 }
5556
5557 /**
5558  * Get DV flow counter by index.
5559  *
5560  * @param[in] dev
5561  *   Pointer to the Ethernet device structure.
5562  * @param[in] idx
5563  *   mlx5 flow counter index in the container.
5564  * @param[out] ppool
5565  *   mlx5 flow counter pool in the container.
5566  *
5567  * @return
5568  *   Pointer to the counter, NULL otherwise.
5569  */
5570 static struct mlx5_flow_counter *
5571 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5572                            uint32_t idx,
5573                            struct mlx5_flow_counter_pool **ppool)
5574 {
5575         struct mlx5_priv *priv = dev->data->dev_private;
5576         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5577         struct mlx5_flow_counter_pool *pool;
5578
5579         /* Decrease to original index and clear shared bit. */
5580         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5581         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5582         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5583         MLX5_ASSERT(pool);
5584         if (ppool)
5585                 *ppool = pool;
5586         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5587 }
5588
5589 /**
5590  * Check the devx counter belongs to the pool.
5591  *
5592  * @param[in] pool
5593  *   Pointer to the counter pool.
5594  * @param[in] id
5595  *   The counter devx ID.
5596  *
5597  * @return
5598  *   True if counter belongs to the pool, false otherwise.
5599  */
5600 static bool
5601 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5602 {
5603         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5604                    MLX5_COUNTERS_PER_POOL;
5605
5606         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5607                 return true;
5608         return false;
5609 }
5610
5611 /**
5612  * Get a pool by devx counter ID.
5613  *
5614  * @param[in] cmng
5615  *   Pointer to the counter management.
5616  * @param[in] id
5617  *   The counter devx ID.
5618  *
5619  * @return
5620  *   The counter pool pointer if exists, NULL otherwise,
5621  */
5622 static struct mlx5_flow_counter_pool *
5623 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5624 {
5625         uint32_t i;
5626         struct mlx5_flow_counter_pool *pool = NULL;
5627
5628         rte_spinlock_lock(&cmng->pool_update_sl);
5629         /* Check last used pool. */
5630         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5631             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5632                 pool = cmng->pools[cmng->last_pool_idx];
5633                 goto out;
5634         }
5635         /* ID out of range means no suitable pool in the container. */
5636         if (id > cmng->max_id || id < cmng->min_id)
5637                 goto out;
5638         /*
5639          * Find the pool from the end of the container, since mostly counter
5640          * ID is sequence increasing, and the last pool should be the needed
5641          * one.
5642          */
5643         i = cmng->n_valid;
5644         while (i--) {
5645                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5646
5647                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5648                         pool = pool_tmp;
5649                         break;
5650                 }
5651         }
5652 out:
5653         rte_spinlock_unlock(&cmng->pool_update_sl);
5654         return pool;
5655 }
5656
5657 /**
5658  * Resize a counter container.
5659  *
5660  * @param[in] dev
5661  *   Pointer to the Ethernet device structure.
5662  *
5663  * @return
5664  *   0 on success, otherwise negative errno value and rte_errno is set.
5665  */
5666 static int
5667 flow_dv_container_resize(struct rte_eth_dev *dev)
5668 {
5669         struct mlx5_priv *priv = dev->data->dev_private;
5670         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5671         void *old_pools = cmng->pools;
5672         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5673         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5674         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5675
5676         if (!pools) {
5677                 rte_errno = ENOMEM;
5678                 return -ENOMEM;
5679         }
5680         if (old_pools)
5681                 memcpy(pools, old_pools, cmng->n *
5682                                        sizeof(struct mlx5_flow_counter_pool *));
5683         cmng->n = resize;
5684         cmng->pools = pools;
5685         if (old_pools)
5686                 mlx5_free(old_pools);
5687         return 0;
5688 }
5689
5690 /**
5691  * Query a devx flow counter.
5692  *
5693  * @param[in] dev
5694  *   Pointer to the Ethernet device structure.
5695  * @param[in] counter
5696  *   Index to the flow counter.
5697  * @param[out] pkts
5698  *   The statistics value of packets.
5699  * @param[out] bytes
5700  *   The statistics value of bytes.
5701  *
5702  * @return
5703  *   0 on success, otherwise a negative errno value and rte_errno is set.
5704  */
5705 static inline int
5706 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5707                      uint64_t *bytes)
5708 {
5709         struct mlx5_priv *priv = dev->data->dev_private;
5710         struct mlx5_flow_counter_pool *pool = NULL;
5711         struct mlx5_flow_counter *cnt;
5712         int offset;
5713
5714         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5715         MLX5_ASSERT(pool);
5716         if (priv->sh->cmng.counter_fallback)
5717                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5718                                         0, pkts, bytes, 0, NULL, NULL, 0);
5719         rte_spinlock_lock(&pool->sl);
5720         if (!pool->raw) {
5721                 *pkts = 0;
5722                 *bytes = 0;
5723         } else {
5724                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5725                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5726                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5727         }
5728         rte_spinlock_unlock(&pool->sl);
5729         return 0;
5730 }
5731
5732 /**
5733  * Create and initialize a new counter pool.
5734  *
5735  * @param[in] dev
5736  *   Pointer to the Ethernet device structure.
5737  * @param[out] dcs
5738  *   The devX counter handle.
5739  * @param[in] age
5740  *   Whether the pool is for counter that was allocated for aging.
5741  * @param[in/out] cont_cur
5742  *   Pointer to the container pointer, it will be update in pool resize.
5743  *
5744  * @return
5745  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
5746  */
5747 static struct mlx5_flow_counter_pool *
5748 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
5749                     uint32_t age)
5750 {
5751         struct mlx5_priv *priv = dev->data->dev_private;
5752         struct mlx5_flow_counter_pool *pool;
5753         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5754         bool fallback = priv->sh->cmng.counter_fallback;
5755         uint32_t size = sizeof(*pool);
5756
5757         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
5758         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
5759         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
5760         if (!pool) {
5761                 rte_errno = ENOMEM;
5762                 return NULL;
5763         }
5764         pool->raw = NULL;
5765         pool->is_aged = !!age;
5766         pool->query_gen = 0;
5767         pool->min_dcs = dcs;
5768         rte_spinlock_init(&pool->sl);
5769         rte_spinlock_init(&pool->csl);
5770         TAILQ_INIT(&pool->counters[0]);
5771         TAILQ_INIT(&pool->counters[1]);
5772         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
5773         rte_spinlock_lock(&cmng->pool_update_sl);
5774         pool->index = cmng->n_valid;
5775         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
5776                 mlx5_free(pool);
5777                 rte_spinlock_unlock(&cmng->pool_update_sl);
5778                 return NULL;
5779         }
5780         cmng->pools[pool->index] = pool;
5781         cmng->n_valid++;
5782         if (unlikely(fallback)) {
5783                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
5784
5785                 if (base < cmng->min_id)
5786                         cmng->min_id = base;
5787                 if (base > cmng->max_id)
5788                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
5789                 cmng->last_pool_idx = pool->index;
5790         }
5791         rte_spinlock_unlock(&cmng->pool_update_sl);
5792         return pool;
5793 }
5794
5795 /**
5796  * Prepare a new counter and/or a new counter pool.
5797  *
5798  * @param[in] dev
5799  *   Pointer to the Ethernet device structure.
5800  * @param[out] cnt_free
5801  *   Where to put the pointer of a new counter.
5802  * @param[in] age
5803  *   Whether the pool is for counter that was allocated for aging.
5804  *
5805  * @return
5806  *   The counter pool pointer and @p cnt_free is set on success,
5807  *   NULL otherwise and rte_errno is set.
5808  */
5809 static struct mlx5_flow_counter_pool *
5810 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
5811                              struct mlx5_flow_counter **cnt_free,
5812                              uint32_t age)
5813 {
5814         struct mlx5_priv *priv = dev->data->dev_private;
5815         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5816         struct mlx5_flow_counter_pool *pool;
5817         struct mlx5_counters tmp_tq;
5818         struct mlx5_devx_obj *dcs = NULL;
5819         struct mlx5_flow_counter *cnt;
5820         enum mlx5_counter_type cnt_type =
5821                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
5822         bool fallback = priv->sh->cmng.counter_fallback;
5823         uint32_t i;
5824
5825         if (fallback) {
5826                 /* bulk_bitmap must be 0 for single counter allocation. */
5827                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
5828                 if (!dcs)
5829                         return NULL;
5830                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
5831                 if (!pool) {
5832                         pool = flow_dv_pool_create(dev, dcs, age);
5833                         if (!pool) {
5834                                 mlx5_devx_cmd_destroy(dcs);
5835                                 return NULL;
5836                         }
5837                 }
5838                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
5839                 cnt = MLX5_POOL_GET_CNT(pool, i);
5840                 cnt->pool = pool;
5841                 cnt->dcs_when_free = dcs;
5842                 *cnt_free = cnt;
5843                 return pool;
5844         }
5845         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
5846         if (!dcs) {
5847                 rte_errno = ENODATA;
5848                 return NULL;
5849         }
5850         pool = flow_dv_pool_create(dev, dcs, age);
5851         if (!pool) {
5852                 mlx5_devx_cmd_destroy(dcs);
5853                 return NULL;
5854         }
5855         TAILQ_INIT(&tmp_tq);
5856         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
5857                 cnt = MLX5_POOL_GET_CNT(pool, i);
5858                 cnt->pool = pool;
5859                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
5860         }
5861         rte_spinlock_lock(&cmng->csl[cnt_type]);
5862         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
5863         rte_spinlock_unlock(&cmng->csl[cnt_type]);
5864         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
5865         (*cnt_free)->pool = pool;
5866         return pool;
5867 }
5868
5869 /**
5870  * Allocate a flow counter.
5871  *
5872  * @param[in] dev
5873  *   Pointer to the Ethernet device structure.
5874  * @param[in] age
5875  *   Whether the counter was allocated for aging.
5876  *
5877  * @return
5878  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
5879  */
5880 static uint32_t
5881 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
5882 {
5883         struct mlx5_priv *priv = dev->data->dev_private;
5884         struct mlx5_flow_counter_pool *pool = NULL;
5885         struct mlx5_flow_counter *cnt_free = NULL;
5886         bool fallback = priv->sh->cmng.counter_fallback;
5887         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5888         enum mlx5_counter_type cnt_type =
5889                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
5890         uint32_t cnt_idx;
5891
5892         if (!priv->config.devx) {
5893                 rte_errno = ENOTSUP;
5894                 return 0;
5895         }
5896         /* Get free counters from container. */
5897         rte_spinlock_lock(&cmng->csl[cnt_type]);
5898         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
5899         if (cnt_free)
5900                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
5901         rte_spinlock_unlock(&cmng->csl[cnt_type]);
5902         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
5903                 goto err;
5904         pool = cnt_free->pool;
5905         if (fallback)
5906                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
5907         /* Create a DV counter action only in the first time usage. */
5908         if (!cnt_free->action) {
5909                 uint16_t offset;
5910                 struct mlx5_devx_obj *dcs;
5911                 int ret;
5912
5913                 if (!fallback) {
5914                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
5915                         dcs = pool->min_dcs;
5916                 } else {
5917                         offset = 0;
5918                         dcs = cnt_free->dcs_when_free;
5919                 }
5920                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
5921                                                             &cnt_free->action);
5922                 if (ret) {
5923                         rte_errno = errno;
5924                         goto err;
5925                 }
5926         }
5927         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
5928                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
5929         /* Update the counter reset values. */
5930         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
5931                                  &cnt_free->bytes))
5932                 goto err;
5933         if (!fallback && !priv->sh->cmng.query_thread_on)
5934                 /* Start the asynchronous batch query by the host thread. */
5935                 mlx5_set_query_alarm(priv->sh);
5936         /*
5937          * When the count action isn't shared (by ID), shared_info field is
5938          * used for indirect action API's refcnt.
5939          * When the counter action is not shared neither by ID nor by indirect
5940          * action API, shared info must be 1.
5941          */
5942         cnt_free->shared_info.refcnt = 1;
5943         return cnt_idx;
5944 err:
5945         if (cnt_free) {
5946                 cnt_free->pool = pool;
5947                 if (fallback)
5948                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
5949                 rte_spinlock_lock(&cmng->csl[cnt_type]);
5950                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
5951                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
5952         }
5953         return 0;
5954 }
5955
5956 /**
5957  * Allocate a shared flow counter.
5958  *
5959  * @param[in] ctx
5960  *   Pointer to the shared counter configuration.
5961  * @param[in] data
5962  *   Pointer to save the allocated counter index.
5963  *
5964  * @return
5965  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
5966  */
5967
5968 static int32_t
5969 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
5970 {
5971         struct mlx5_shared_counter_conf *conf = ctx;
5972         struct rte_eth_dev *dev = conf->dev;
5973         struct mlx5_flow_counter *cnt;
5974
5975         data->dword = flow_dv_counter_alloc(dev, 0);
5976         data->dword |= MLX5_CNT_SHARED_OFFSET;
5977         cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
5978         cnt->shared_info.id = conf->id;
5979         return 0;
5980 }
5981
5982 /**
5983  * Get a shared flow counter.
5984  *
5985  * @param[in] dev
5986  *   Pointer to the Ethernet device structure.
5987  * @param[in] id
5988  *   Counter identifier.
5989  *
5990  * @return
5991  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
5992  */
5993 static uint32_t
5994 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
5995 {
5996         struct mlx5_priv *priv = dev->data->dev_private;
5997         struct mlx5_shared_counter_conf conf = {
5998                 .dev = dev,
5999                 .id = id,
6000         };
6001         union mlx5_l3t_data data = {
6002                 .dword = 0,
6003         };
6004
6005         mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
6006                                flow_dv_counter_alloc_shared_cb, &conf);
6007         return data.dword;
6008 }
6009
6010 /**
6011  * Get age param from counter index.
6012  *
6013  * @param[in] dev
6014  *   Pointer to the Ethernet device structure.
6015  * @param[in] counter
6016  *   Index to the counter handler.
6017  *
6018  * @return
6019  *   The aging parameter specified for the counter index.
6020  */
6021 static struct mlx5_age_param*
6022 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6023                                 uint32_t counter)
6024 {
6025         struct mlx5_flow_counter *cnt;
6026         struct mlx5_flow_counter_pool *pool = NULL;
6027
6028         flow_dv_counter_get_by_idx(dev, counter, &pool);
6029         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6030         cnt = MLX5_POOL_GET_CNT(pool, counter);
6031         return MLX5_CNT_TO_AGE(cnt);
6032 }
6033
6034 /**
6035  * Remove a flow counter from aged counter list.
6036  *
6037  * @param[in] dev
6038  *   Pointer to the Ethernet device structure.
6039  * @param[in] counter
6040  *   Index to the counter handler.
6041  * @param[in] cnt
6042  *   Pointer to the counter handler.
6043  */
6044 static void
6045 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6046                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6047 {
6048         struct mlx5_age_info *age_info;
6049         struct mlx5_age_param *age_param;
6050         struct mlx5_priv *priv = dev->data->dev_private;
6051         uint16_t expected = AGE_CANDIDATE;
6052
6053         age_info = GET_PORT_AGE_INFO(priv);
6054         age_param = flow_dv_counter_idx_get_age(dev, counter);
6055         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6056                                          AGE_FREE, false, __ATOMIC_RELAXED,
6057                                          __ATOMIC_RELAXED)) {
6058                 /**
6059                  * We need the lock even it is age timeout,
6060                  * since counter may still in process.
6061                  */
6062                 rte_spinlock_lock(&age_info->aged_sl);
6063                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6064                 rte_spinlock_unlock(&age_info->aged_sl);
6065                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6066         }
6067 }
6068
6069 /**
6070  * Release a flow counter.
6071  *
6072  * @param[in] dev
6073  *   Pointer to the Ethernet device structure.
6074  * @param[in] counter
6075  *   Index to the counter handler.
6076  */
6077 static void
6078 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6079 {
6080         struct mlx5_priv *priv = dev->data->dev_private;
6081         struct mlx5_flow_counter_pool *pool = NULL;
6082         struct mlx5_flow_counter *cnt;
6083         enum mlx5_counter_type cnt_type;
6084
6085         if (!counter)
6086                 return;
6087         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6088         MLX5_ASSERT(pool);
6089         /*
6090          * If the counter action is shared by ID, the l3t_clear_entry function
6091          * reduces its references counter. If after the reduction the action is
6092          * still referenced, the function returns here and does not release it.
6093          */
6094         if (IS_LEGACY_SHARED_CNT(counter) &&
6095             mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl, cnt->shared_info.id))
6096                 return;
6097         /*
6098          * If the counter action is shared by indirect action API, the atomic
6099          * function reduces its references counter. If after the reduction the
6100          * action is still referenced, the function returns here and does not
6101          * release it.
6102          * When the counter action is not shared neither by ID nor by indirect
6103          * action API, shared info is 1 before the reduction, so this condition
6104          * is failed and function doesn't return here.
6105          */
6106         if (!IS_LEGACY_SHARED_CNT(counter) &&
6107             __atomic_sub_fetch(&cnt->shared_info.refcnt, 1, __ATOMIC_RELAXED))
6108                 return;
6109         if (pool->is_aged)
6110                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6111         cnt->pool = pool;
6112         /*
6113          * Put the counter back to list to be updated in none fallback mode.
6114          * Currently, we are using two list alternately, while one is in query,
6115          * add the freed counter to the other list based on the pool query_gen
6116          * value. After query finishes, add counter the list to the global
6117          * container counter list. The list changes while query starts. In
6118          * this case, lock will not be needed as query callback and release
6119          * function both operate with the different list.
6120          */
6121         if (!priv->sh->cmng.counter_fallback) {
6122                 rte_spinlock_lock(&pool->csl);
6123                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6124                 rte_spinlock_unlock(&pool->csl);
6125         } else {
6126                 cnt->dcs_when_free = cnt->dcs_when_active;
6127                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6128                                            MLX5_COUNTER_TYPE_ORIGIN;
6129                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6130                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6131                                   cnt, next);
6132                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6133         }
6134 }
6135
6136 /**
6137  * Resize a meter id container.
6138  *
6139  * @param[in] dev
6140  *   Pointer to the Ethernet device structure.
6141  *
6142  * @return
6143  *   0 on success, otherwise negative errno value and rte_errno is set.
6144  */
6145 static int
6146 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6147 {
6148         struct mlx5_priv *priv = dev->data->dev_private;
6149         struct mlx5_aso_mtr_pools_mng *pools_mng =
6150                                 &priv->sh->mtrmng->pools_mng;
6151         void *old_pools = pools_mng->pools;
6152         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6153         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6154         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6155
6156         if (!pools) {
6157                 rte_errno = ENOMEM;
6158                 return -ENOMEM;
6159         }
6160         if (!pools_mng->n)
6161                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6162                         mlx5_free(pools);
6163                         return -ENOMEM;
6164                 }
6165         if (old_pools)
6166                 memcpy(pools, old_pools, pools_mng->n *
6167                                        sizeof(struct mlx5_aso_mtr_pool *));
6168         pools_mng->n = resize;
6169         pools_mng->pools = pools;
6170         if (old_pools)
6171                 mlx5_free(old_pools);
6172         return 0;
6173 }
6174
6175 /**
6176  * Prepare a new meter and/or a new meter pool.
6177  *
6178  * @param[in] dev
6179  *   Pointer to the Ethernet device structure.
6180  * @param[out] mtr_free
6181  *   Where to put the pointer of a new meter.g.
6182  *
6183  * @return
6184  *   The meter pool pointer and @mtr_free is set on success,
6185  *   NULL otherwise and rte_errno is set.
6186  */
6187 static struct mlx5_aso_mtr_pool *
6188 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6189                              struct mlx5_aso_mtr **mtr_free)
6190 {
6191         struct mlx5_priv *priv = dev->data->dev_private;
6192         struct mlx5_aso_mtr_pools_mng *pools_mng =
6193                                 &priv->sh->mtrmng->pools_mng;
6194         struct mlx5_aso_mtr_pool *pool = NULL;
6195         struct mlx5_devx_obj *dcs = NULL;
6196         uint32_t i;
6197         uint32_t log_obj_size;
6198
6199         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6200         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6201                         priv->sh->pdn, log_obj_size);
6202         if (!dcs) {
6203                 rte_errno = ENODATA;
6204                 return NULL;
6205         }
6206         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6207         if (!pool) {
6208                 rte_errno = ENOMEM;
6209                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6210                 return NULL;
6211         }
6212         pool->devx_obj = dcs;
6213         pool->index = pools_mng->n_valid;
6214         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6215                 mlx5_free(pool);
6216                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6217                 return NULL;
6218         }
6219         pools_mng->pools[pool->index] = pool;
6220         pools_mng->n_valid++;
6221         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6222                 pool->mtrs[i].offset = i;
6223                 LIST_INSERT_HEAD(&pools_mng->meters,
6224                                                 &pool->mtrs[i], next);
6225         }
6226         pool->mtrs[0].offset = 0;
6227         *mtr_free = &pool->mtrs[0];
6228         return pool;
6229 }
6230
6231 /**
6232  * Release a flow meter into pool.
6233  *
6234  * @param[in] dev
6235  *   Pointer to the Ethernet device structure.
6236  * @param[in] mtr_idx
6237  *   Index to aso flow meter.
6238  */
6239 static void
6240 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6241 {
6242         struct mlx5_priv *priv = dev->data->dev_private;
6243         struct mlx5_aso_mtr_pools_mng *pools_mng =
6244                                 &priv->sh->mtrmng->pools_mng;
6245         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6246
6247         MLX5_ASSERT(aso_mtr);
6248         rte_spinlock_lock(&pools_mng->mtrsl);
6249         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6250         aso_mtr->state = ASO_METER_FREE;
6251         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6252         rte_spinlock_unlock(&pools_mng->mtrsl);
6253 }
6254
6255 /**
6256  * Allocate a aso flow meter.
6257  *
6258  * @param[in] dev
6259  *   Pointer to the Ethernet device structure.
6260  *
6261  * @return
6262  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6263  */
6264 static uint32_t
6265 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6266 {
6267         struct mlx5_priv *priv = dev->data->dev_private;
6268         struct mlx5_aso_mtr *mtr_free = NULL;
6269         struct mlx5_aso_mtr_pools_mng *pools_mng =
6270                                 &priv->sh->mtrmng->pools_mng;
6271         struct mlx5_aso_mtr_pool *pool;
6272         uint32_t mtr_idx = 0;
6273
6274         if (!priv->config.devx) {
6275                 rte_errno = ENOTSUP;
6276                 return 0;
6277         }
6278         /* Allocate the flow meter memory. */
6279         /* Get free meters from management. */
6280         rte_spinlock_lock(&pools_mng->mtrsl);
6281         mtr_free = LIST_FIRST(&pools_mng->meters);
6282         if (mtr_free)
6283                 LIST_REMOVE(mtr_free, next);
6284         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6285                 rte_spinlock_unlock(&pools_mng->mtrsl);
6286                 return 0;
6287         }
6288         mtr_free->state = ASO_METER_WAIT;
6289         rte_spinlock_unlock(&pools_mng->mtrsl);
6290         pool = container_of(mtr_free,
6291                         struct mlx5_aso_mtr_pool,
6292                         mtrs[mtr_free->offset]);
6293         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6294         if (!mtr_free->fm.meter_action) {
6295 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6296                 struct rte_flow_error error;
6297                 uint8_t reg_id;
6298
6299                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6300                 mtr_free->fm.meter_action =
6301                         mlx5_glue->dv_create_flow_action_aso
6302                                                 (priv->sh->rx_domain,
6303                                                  pool->devx_obj->obj,
6304                                                  mtr_free->offset,
6305                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6306                                                  reg_id - REG_C_0);
6307 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6308                 if (!mtr_free->fm.meter_action) {
6309                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6310                         return 0;
6311                 }
6312         }
6313         return mtr_idx;
6314 }
6315
6316 /**
6317  * Verify the @p attributes will be correctly understood by the NIC and store
6318  * them in the @p flow if everything is correct.
6319  *
6320  * @param[in] dev
6321  *   Pointer to dev struct.
6322  * @param[in] attributes
6323  *   Pointer to flow attributes
6324  * @param[in] external
6325  *   This flow rule is created by request external to PMD.
6326  * @param[out] error
6327  *   Pointer to error structure.
6328  *
6329  * @return
6330  *   - 0 on success and non root table.
6331  *   - 1 on success and root table.
6332  *   - a negative errno value otherwise and rte_errno is set.
6333  */
6334 static int
6335 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6336                             const struct mlx5_flow_tunnel *tunnel,
6337                             const struct rte_flow_attr *attributes,
6338                             const struct flow_grp_info *grp_info,
6339                             struct rte_flow_error *error)
6340 {
6341         struct mlx5_priv *priv = dev->data->dev_private;
6342         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6343         int ret = 0;
6344
6345 #ifndef HAVE_MLX5DV_DR
6346         RTE_SET_USED(tunnel);
6347         RTE_SET_USED(grp_info);
6348         if (attributes->group)
6349                 return rte_flow_error_set(error, ENOTSUP,
6350                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6351                                           NULL,
6352                                           "groups are not supported");
6353 #else
6354         uint32_t table = 0;
6355
6356         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6357                                        grp_info, error);
6358         if (ret)
6359                 return ret;
6360         if (!table)
6361                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6362 #endif
6363         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6364             attributes->priority > lowest_priority)
6365                 return rte_flow_error_set(error, ENOTSUP,
6366                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6367                                           NULL,
6368                                           "priority out of range");
6369         if (attributes->transfer) {
6370                 if (!priv->config.dv_esw_en)
6371                         return rte_flow_error_set
6372                                 (error, ENOTSUP,
6373                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6374                                  "E-Switch dr is not supported");
6375                 if (!(priv->representor || priv->master))
6376                         return rte_flow_error_set
6377                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6378                                  NULL, "E-Switch configuration can only be"
6379                                  " done by a master or a representor device");
6380                 if (attributes->egress)
6381                         return rte_flow_error_set
6382                                 (error, ENOTSUP,
6383                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6384                                  "egress is not supported");
6385         }
6386         if (!(attributes->egress ^ attributes->ingress))
6387                 return rte_flow_error_set(error, ENOTSUP,
6388                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6389                                           "must specify exactly one of "
6390                                           "ingress or egress");
6391         return ret;
6392 }
6393
6394 static uint16_t
6395 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6396                           const struct rte_flow_item *end)
6397 {
6398         const struct rte_flow_item *item = *head;
6399         uint16_t l3_protocol;
6400
6401         for (; item != end; item++) {
6402                 switch (item->type) {
6403                 default:
6404                         break;
6405                 case RTE_FLOW_ITEM_TYPE_IPV4:
6406                         l3_protocol = RTE_ETHER_TYPE_IPV4;
6407                         goto l3_ok;
6408                 case RTE_FLOW_ITEM_TYPE_IPV6:
6409                         l3_protocol = RTE_ETHER_TYPE_IPV6;
6410                         goto l3_ok;
6411                 case RTE_FLOW_ITEM_TYPE_ETH:
6412                         if (item->mask && item->spec) {
6413                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6414                                                             type, item,
6415                                                             l3_protocol);
6416                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6417                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6418                                         goto l3_ok;
6419                         }
6420                         break;
6421                 case RTE_FLOW_ITEM_TYPE_VLAN:
6422                         if (item->mask && item->spec) {
6423                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6424                                                             inner_type, item,
6425                                                             l3_protocol);
6426                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6427                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6428                                         goto l3_ok;
6429                         }
6430                         break;
6431                 }
6432         }
6433         return 0;
6434 l3_ok:
6435         *head = item;
6436         return l3_protocol;
6437 }
6438
6439 static uint8_t
6440 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6441                           const struct rte_flow_item *end)
6442 {
6443         const struct rte_flow_item *item = *head;
6444         uint8_t l4_protocol;
6445
6446         for (; item != end; item++) {
6447                 switch (item->type) {
6448                 default:
6449                         break;
6450                 case RTE_FLOW_ITEM_TYPE_TCP:
6451                         l4_protocol = IPPROTO_TCP;
6452                         goto l4_ok;
6453                 case RTE_FLOW_ITEM_TYPE_UDP:
6454                         l4_protocol = IPPROTO_UDP;
6455                         goto l4_ok;
6456                 case RTE_FLOW_ITEM_TYPE_IPV4:
6457                         if (item->mask && item->spec) {
6458                                 const struct rte_flow_item_ipv4 *mask, *spec;
6459
6460                                 mask = (typeof(mask))item->mask;
6461                                 spec = (typeof(spec))item->spec;
6462                                 l4_protocol = mask->hdr.next_proto_id &
6463                                               spec->hdr.next_proto_id;
6464                                 if (l4_protocol == IPPROTO_TCP ||
6465                                     l4_protocol == IPPROTO_UDP)
6466                                         goto l4_ok;
6467                         }
6468                         break;
6469                 case RTE_FLOW_ITEM_TYPE_IPV6:
6470                         if (item->mask && item->spec) {
6471                                 const struct rte_flow_item_ipv6 *mask, *spec;
6472                                 mask = (typeof(mask))item->mask;
6473                                 spec = (typeof(spec))item->spec;
6474                                 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6475                                 if (l4_protocol == IPPROTO_TCP ||
6476                                     l4_protocol == IPPROTO_UDP)
6477                                         goto l4_ok;
6478                         }
6479                         break;
6480                 }
6481         }
6482         return 0;
6483 l4_ok:
6484         *head = item;
6485         return l4_protocol;
6486 }
6487
6488 static int
6489 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6490                                 const struct rte_flow_item *rule_items,
6491                                 const struct rte_flow_item *integrity_item,
6492                                 struct rte_flow_error *error)
6493 {
6494         struct mlx5_priv *priv = dev->data->dev_private;
6495         const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6496         const struct rte_flow_item_integrity *mask = (typeof(mask))
6497                                                      integrity_item->mask;
6498         const struct rte_flow_item_integrity *spec = (typeof(spec))
6499                                                      integrity_item->spec;
6500         uint32_t protocol;
6501
6502         if (!priv->config.hca_attr.pkt_integrity_match)
6503                 return rte_flow_error_set(error, ENOTSUP,
6504                                           RTE_FLOW_ERROR_TYPE_ITEM,
6505                                           integrity_item,
6506                                           "packet integrity integrity_item not supported");
6507         if (!mask)
6508                 mask = &rte_flow_item_integrity_mask;
6509         if (!mlx5_validate_integrity_item(mask))
6510                 return rte_flow_error_set(error, ENOTSUP,
6511                                           RTE_FLOW_ERROR_TYPE_ITEM,
6512                                           integrity_item,
6513                                           "unsupported integrity filter");
6514         tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6515         if (spec->level > 1) {
6516                 if (!tunnel_item)
6517                         return rte_flow_error_set(error, ENOTSUP,
6518                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6519                                                   integrity_item,
6520                                                   "missing tunnel item");
6521                 item = tunnel_item;
6522                 end_item = mlx5_find_end_item(tunnel_item);
6523         } else {
6524                 end_item = tunnel_item ? tunnel_item :
6525                            mlx5_find_end_item(integrity_item);
6526         }
6527         if (mask->l3_ok || mask->ipv4_csum_ok) {
6528                 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6529                 if (!protocol)
6530                         return rte_flow_error_set(error, EINVAL,
6531                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6532                                                   integrity_item,
6533                                                   "missing L3 protocol");
6534         }
6535         if (mask->l4_ok || mask->l4_csum_ok) {
6536                 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6537                 if (!protocol)
6538                         return rte_flow_error_set(error, EINVAL,
6539                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6540                                                   integrity_item,
6541                                                   "missing L4 protocol");
6542         }
6543         return 0;
6544 }
6545
6546 /**
6547  * Internal validation function. For validating both actions and items.
6548  *
6549  * @param[in] dev
6550  *   Pointer to the rte_eth_dev structure.
6551  * @param[in] attr
6552  *   Pointer to the flow attributes.
6553  * @param[in] items
6554  *   Pointer to the list of items.
6555  * @param[in] actions
6556  *   Pointer to the list of actions.
6557  * @param[in] external
6558  *   This flow rule is created by request external to PMD.
6559  * @param[in] hairpin
6560  *   Number of hairpin TX actions, 0 means classic flow.
6561  * @param[out] error
6562  *   Pointer to the error structure.
6563  *
6564  * @return
6565  *   0 on success, a negative errno value otherwise and rte_errno is set.
6566  */
6567 static int
6568 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6569                  const struct rte_flow_item items[],
6570                  const struct rte_flow_action actions[],
6571                  bool external, int hairpin, struct rte_flow_error *error)
6572 {
6573         int ret;
6574         uint64_t action_flags = 0;
6575         uint64_t item_flags = 0;
6576         uint64_t last_item = 0;
6577         uint8_t next_protocol = 0xff;
6578         uint16_t ether_type = 0;
6579         int actions_n = 0;
6580         uint8_t item_ipv6_proto = 0;
6581         int fdb_mirror_limit = 0;
6582         int modify_after_mirror = 0;
6583         const struct rte_flow_item *geneve_item = NULL;
6584         const struct rte_flow_item *gre_item = NULL;
6585         const struct rte_flow_item *gtp_item = NULL;
6586         const struct rte_flow_action_raw_decap *decap;
6587         const struct rte_flow_action_raw_encap *encap;
6588         const struct rte_flow_action_rss *rss = NULL;
6589         const struct rte_flow_action_rss *sample_rss = NULL;
6590         const struct rte_flow_action_count *sample_count = NULL;
6591         const struct rte_flow_item_tcp nic_tcp_mask = {
6592                 .hdr = {
6593                         .tcp_flags = 0xFF,
6594                         .src_port = RTE_BE16(UINT16_MAX),
6595                         .dst_port = RTE_BE16(UINT16_MAX),
6596                 }
6597         };
6598         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6599                 .hdr = {
6600                         .src_addr =
6601                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6602                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6603                         .dst_addr =
6604                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6605                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6606                         .vtc_flow = RTE_BE32(0xffffffff),
6607                         .proto = 0xff,
6608                         .hop_limits = 0xff,
6609                 },
6610                 .has_frag_ext = 1,
6611         };
6612         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6613                 .hdr = {
6614                         .common = {
6615                                 .u32 =
6616                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6617                                         .type = 0xFF,
6618                                         }).u32),
6619                         },
6620                         .dummy[0] = 0xffffffff,
6621                 },
6622         };
6623         struct mlx5_priv *priv = dev->data->dev_private;
6624         struct mlx5_dev_config *dev_conf = &priv->config;
6625         uint16_t queue_index = 0xFFFF;
6626         const struct rte_flow_item_vlan *vlan_m = NULL;
6627         uint32_t rw_act_num = 0;
6628         uint64_t is_root;
6629         const struct mlx5_flow_tunnel *tunnel;
6630         enum mlx5_tof_rule_type tof_rule_type;
6631         struct flow_grp_info grp_info = {
6632                 .external = !!external,
6633                 .transfer = !!attr->transfer,
6634                 .fdb_def_rule = !!priv->fdb_def_rule,
6635                 .std_tbl_fix = true,
6636         };
6637         const struct rte_eth_hairpin_conf *conf;
6638         const struct rte_flow_item *rule_items = items;
6639         bool def_policy = false;
6640
6641         if (items == NULL)
6642                 return -1;
6643         tunnel = is_tunnel_offload_active(dev) ?
6644                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6645         if (tunnel) {
6646                 if (priv->representor)
6647                         return rte_flow_error_set
6648                                 (error, ENOTSUP,
6649                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6650                                  NULL, "decap not supported for VF representor");
6651                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6652                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6653                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6654                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6655                                         MLX5_FLOW_ACTION_DECAP;
6656                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6657                                         (dev, attr, tunnel, tof_rule_type);
6658         }
6659         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6660         if (ret < 0)
6661                 return ret;
6662         is_root = (uint64_t)ret;
6663         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6664                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6665                 int type = items->type;
6666
6667                 if (!mlx5_flow_os_item_supported(type))
6668                         return rte_flow_error_set(error, ENOTSUP,
6669                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6670                                                   NULL, "item not supported");
6671                 switch (type) {
6672                 case RTE_FLOW_ITEM_TYPE_VOID:
6673                         break;
6674                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6675                         ret = flow_dv_validate_item_port_id
6676                                         (dev, items, attr, item_flags, error);
6677                         if (ret < 0)
6678                                 return ret;
6679                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6680                         break;
6681                 case RTE_FLOW_ITEM_TYPE_ETH:
6682                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6683                                                           true, error);
6684                         if (ret < 0)
6685                                 return ret;
6686                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6687                                              MLX5_FLOW_LAYER_OUTER_L2;
6688                         if (items->mask != NULL && items->spec != NULL) {
6689                                 ether_type =
6690                                         ((const struct rte_flow_item_eth *)
6691                                          items->spec)->type;
6692                                 ether_type &=
6693                                         ((const struct rte_flow_item_eth *)
6694                                          items->mask)->type;
6695                                 ether_type = rte_be_to_cpu_16(ether_type);
6696                         } else {
6697                                 ether_type = 0;
6698                         }
6699                         break;
6700                 case RTE_FLOW_ITEM_TYPE_VLAN:
6701                         ret = flow_dv_validate_item_vlan(items, item_flags,
6702                                                          dev, error);
6703                         if (ret < 0)
6704                                 return ret;
6705                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6706                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6707                         if (items->mask != NULL && items->spec != NULL) {
6708                                 ether_type =
6709                                         ((const struct rte_flow_item_vlan *)
6710                                          items->spec)->inner_type;
6711                                 ether_type &=
6712                                         ((const struct rte_flow_item_vlan *)
6713                                          items->mask)->inner_type;
6714                                 ether_type = rte_be_to_cpu_16(ether_type);
6715                         } else {
6716                                 ether_type = 0;
6717                         }
6718                         /* Store outer VLAN mask for of_push_vlan action. */
6719                         if (!tunnel)
6720                                 vlan_m = items->mask;
6721                         break;
6722                 case RTE_FLOW_ITEM_TYPE_IPV4:
6723                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6724                                                   &item_flags, &tunnel);
6725                         ret = flow_dv_validate_item_ipv4(items, item_flags,
6726                                                          last_item, ether_type,
6727                                                          error);
6728                         if (ret < 0)
6729                                 return ret;
6730                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6731                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6732                         if (items->mask != NULL &&
6733                             ((const struct rte_flow_item_ipv4 *)
6734                              items->mask)->hdr.next_proto_id) {
6735                                 next_protocol =
6736                                         ((const struct rte_flow_item_ipv4 *)
6737                                          (items->spec))->hdr.next_proto_id;
6738                                 next_protocol &=
6739                                         ((const struct rte_flow_item_ipv4 *)
6740                                          (items->mask))->hdr.next_proto_id;
6741                         } else {
6742                                 /* Reset for inner layer. */
6743                                 next_protocol = 0xff;
6744                         }
6745                         break;
6746                 case RTE_FLOW_ITEM_TYPE_IPV6:
6747                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6748                                                   &item_flags, &tunnel);
6749                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6750                                                            last_item,
6751                                                            ether_type,
6752                                                            &nic_ipv6_mask,
6753                                                            error);
6754                         if (ret < 0)
6755                                 return ret;
6756                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6757                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6758                         if (items->mask != NULL &&
6759                             ((const struct rte_flow_item_ipv6 *)
6760                              items->mask)->hdr.proto) {
6761                                 item_ipv6_proto =
6762                                         ((const struct rte_flow_item_ipv6 *)
6763                                          items->spec)->hdr.proto;
6764                                 next_protocol =
6765                                         ((const struct rte_flow_item_ipv6 *)
6766                                          items->spec)->hdr.proto;
6767                                 next_protocol &=
6768                                         ((const struct rte_flow_item_ipv6 *)
6769                                          items->mask)->hdr.proto;
6770                         } else {
6771                                 /* Reset for inner layer. */
6772                                 next_protocol = 0xff;
6773                         }
6774                         break;
6775                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6776                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
6777                                                                   item_flags,
6778                                                                   error);
6779                         if (ret < 0)
6780                                 return ret;
6781                         last_item = tunnel ?
6782                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6783                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6784                         if (items->mask != NULL &&
6785                             ((const struct rte_flow_item_ipv6_frag_ext *)
6786                              items->mask)->hdr.next_header) {
6787                                 next_protocol =
6788                                 ((const struct rte_flow_item_ipv6_frag_ext *)
6789                                  items->spec)->hdr.next_header;
6790                                 next_protocol &=
6791                                 ((const struct rte_flow_item_ipv6_frag_ext *)
6792                                  items->mask)->hdr.next_header;
6793                         } else {
6794                                 /* Reset for inner layer. */
6795                                 next_protocol = 0xff;
6796                         }
6797                         break;
6798                 case RTE_FLOW_ITEM_TYPE_TCP:
6799                         ret = mlx5_flow_validate_item_tcp
6800                                                 (items, item_flags,
6801                                                  next_protocol,
6802                                                  &nic_tcp_mask,
6803                                                  error);
6804                         if (ret < 0)
6805                                 return ret;
6806                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
6807                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
6808                         break;
6809                 case RTE_FLOW_ITEM_TYPE_UDP:
6810                         ret = mlx5_flow_validate_item_udp(items, item_flags,
6811                                                           next_protocol,
6812                                                           error);
6813                         if (ret < 0)
6814                                 return ret;
6815                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
6816                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
6817                         break;
6818                 case RTE_FLOW_ITEM_TYPE_GRE:
6819                         ret = mlx5_flow_validate_item_gre(items, item_flags,
6820                                                           next_protocol, error);
6821                         if (ret < 0)
6822                                 return ret;
6823                         gre_item = items;
6824                         last_item = MLX5_FLOW_LAYER_GRE;
6825                         break;
6826                 case RTE_FLOW_ITEM_TYPE_NVGRE:
6827                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
6828                                                             next_protocol,
6829                                                             error);
6830                         if (ret < 0)
6831                                 return ret;
6832                         last_item = MLX5_FLOW_LAYER_NVGRE;
6833                         break;
6834                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
6835                         ret = mlx5_flow_validate_item_gre_key
6836                                 (items, item_flags, gre_item, error);
6837                         if (ret < 0)
6838                                 return ret;
6839                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
6840                         break;
6841                 case RTE_FLOW_ITEM_TYPE_VXLAN:
6842                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
6843                                                             error);
6844                         if (ret < 0)
6845                                 return ret;
6846                         last_item = MLX5_FLOW_LAYER_VXLAN;
6847                         break;
6848                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
6849                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
6850                                                                 item_flags, dev,
6851                                                                 error);
6852                         if (ret < 0)
6853                                 return ret;
6854                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
6855                         break;
6856                 case RTE_FLOW_ITEM_TYPE_GENEVE:
6857                         ret = mlx5_flow_validate_item_geneve(items,
6858                                                              item_flags, dev,
6859                                                              error);
6860                         if (ret < 0)
6861                                 return ret;
6862                         geneve_item = items;
6863                         last_item = MLX5_FLOW_LAYER_GENEVE;
6864                         break;
6865                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
6866                         ret = mlx5_flow_validate_item_geneve_opt(items,
6867                                                                  last_item,
6868                                                                  geneve_item,
6869                                                                  dev,
6870                                                                  error);
6871                         if (ret < 0)
6872                                 return ret;
6873                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
6874                         break;
6875                 case RTE_FLOW_ITEM_TYPE_MPLS:
6876                         ret = mlx5_flow_validate_item_mpls(dev, items,
6877                                                            item_flags,
6878                                                            last_item, error);
6879                         if (ret < 0)
6880                                 return ret;
6881                         last_item = MLX5_FLOW_LAYER_MPLS;
6882                         break;
6883
6884                 case RTE_FLOW_ITEM_TYPE_MARK:
6885                         ret = flow_dv_validate_item_mark(dev, items, attr,
6886                                                          error);
6887                         if (ret < 0)
6888                                 return ret;
6889                         last_item = MLX5_FLOW_ITEM_MARK;
6890                         break;
6891                 case RTE_FLOW_ITEM_TYPE_META:
6892                         ret = flow_dv_validate_item_meta(dev, items, attr,
6893                                                          error);
6894                         if (ret < 0)
6895                                 return ret;
6896                         last_item = MLX5_FLOW_ITEM_METADATA;
6897                         break;
6898                 case RTE_FLOW_ITEM_TYPE_ICMP:
6899                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
6900                                                            next_protocol,
6901                                                            error);
6902                         if (ret < 0)
6903                                 return ret;
6904                         last_item = MLX5_FLOW_LAYER_ICMP;
6905                         break;
6906                 case RTE_FLOW_ITEM_TYPE_ICMP6:
6907                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
6908                                                             next_protocol,
6909                                                             error);
6910                         if (ret < 0)
6911                                 return ret;
6912                         item_ipv6_proto = IPPROTO_ICMPV6;
6913                         last_item = MLX5_FLOW_LAYER_ICMP6;
6914                         break;
6915                 case RTE_FLOW_ITEM_TYPE_TAG:
6916                         ret = flow_dv_validate_item_tag(dev, items,
6917                                                         attr, error);
6918                         if (ret < 0)
6919                                 return ret;
6920                         last_item = MLX5_FLOW_ITEM_TAG;
6921                         break;
6922                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
6923                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
6924                         break;
6925                 case RTE_FLOW_ITEM_TYPE_GTP:
6926                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
6927                                                         error);
6928                         if (ret < 0)
6929                                 return ret;
6930                         gtp_item = items;
6931                         last_item = MLX5_FLOW_LAYER_GTP;
6932                         break;
6933                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
6934                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
6935                                                             gtp_item, attr,
6936                                                             error);
6937                         if (ret < 0)
6938                                 return ret;
6939                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
6940                         break;
6941                 case RTE_FLOW_ITEM_TYPE_ECPRI:
6942                         /* Capacity will be checked in the translate stage. */
6943                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
6944                                                             last_item,
6945                                                             ether_type,
6946                                                             &nic_ecpri_mask,
6947                                                             error);
6948                         if (ret < 0)
6949                                 return ret;
6950                         last_item = MLX5_FLOW_LAYER_ECPRI;
6951                         break;
6952                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
6953                         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
6954                                 return rte_flow_error_set
6955                                         (error, ENOTSUP,
6956                                          RTE_FLOW_ERROR_TYPE_ITEM,
6957                                          NULL, "multiple integrity items not supported");
6958                         ret = flow_dv_validate_item_integrity(dev, rule_items,
6959                                                               items, error);
6960                         if (ret < 0)
6961                                 return ret;
6962                         last_item = MLX5_FLOW_ITEM_INTEGRITY;
6963                         break;
6964                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
6965                         ret = flow_dv_validate_item_aso_ct(dev, items,
6966                                                            &item_flags, error);
6967                         if (ret < 0)
6968                                 return ret;
6969                         break;
6970                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
6971                         /* tunnel offload item was processed before
6972                          * list it here as a supported type
6973                          */
6974                         break;
6975                 default:
6976                         return rte_flow_error_set(error, ENOTSUP,
6977                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6978                                                   NULL, "item not supported");
6979                 }
6980                 item_flags |= last_item;
6981         }
6982         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
6983                 int type = actions->type;
6984                 bool shared_count = false;
6985
6986                 if (!mlx5_flow_os_action_supported(type))
6987                         return rte_flow_error_set(error, ENOTSUP,
6988                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6989                                                   actions,
6990                                                   "action not supported");
6991                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
6992                         return rte_flow_error_set(error, ENOTSUP,
6993                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6994                                                   actions, "too many actions");
6995                 if (action_flags &
6996                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
6997                         return rte_flow_error_set(error, ENOTSUP,
6998                                 RTE_FLOW_ERROR_TYPE_ACTION,
6999                                 NULL, "meter action with policy "
7000                                 "must be the last action");
7001                 switch (type) {
7002                 case RTE_FLOW_ACTION_TYPE_VOID:
7003                         break;
7004                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7005                         ret = flow_dv_validate_action_port_id(dev,
7006                                                               action_flags,
7007                                                               actions,
7008                                                               attr,
7009                                                               error);
7010                         if (ret)
7011                                 return ret;
7012                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7013                         ++actions_n;
7014                         break;
7015                 case RTE_FLOW_ACTION_TYPE_FLAG:
7016                         ret = flow_dv_validate_action_flag(dev, action_flags,
7017                                                            attr, error);
7018                         if (ret < 0)
7019                                 return ret;
7020                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7021                                 /* Count all modify-header actions as one. */
7022                                 if (!(action_flags &
7023                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7024                                         ++actions_n;
7025                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7026                                                 MLX5_FLOW_ACTION_MARK_EXT;
7027                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7028                                         modify_after_mirror = 1;
7029
7030                         } else {
7031                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7032                                 ++actions_n;
7033                         }
7034                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7035                         break;
7036                 case RTE_FLOW_ACTION_TYPE_MARK:
7037                         ret = flow_dv_validate_action_mark(dev, actions,
7038                                                            action_flags,
7039                                                            attr, error);
7040                         if (ret < 0)
7041                                 return ret;
7042                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7043                                 /* Count all modify-header actions as one. */
7044                                 if (!(action_flags &
7045                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7046                                         ++actions_n;
7047                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7048                                                 MLX5_FLOW_ACTION_MARK_EXT;
7049                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7050                                         modify_after_mirror = 1;
7051                         } else {
7052                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7053                                 ++actions_n;
7054                         }
7055                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7056                         break;
7057                 case RTE_FLOW_ACTION_TYPE_SET_META:
7058                         ret = flow_dv_validate_action_set_meta(dev, actions,
7059                                                                action_flags,
7060                                                                attr, error);
7061                         if (ret < 0)
7062                                 return ret;
7063                         /* Count all modify-header actions as one action. */
7064                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7065                                 ++actions_n;
7066                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7067                                 modify_after_mirror = 1;
7068                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7069                         rw_act_num += MLX5_ACT_NUM_SET_META;
7070                         break;
7071                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7072                         ret = flow_dv_validate_action_set_tag(dev, actions,
7073                                                               action_flags,
7074                                                               attr, error);
7075                         if (ret < 0)
7076                                 return ret;
7077                         /* Count all modify-header actions as one action. */
7078                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7079                                 ++actions_n;
7080                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7081                                 modify_after_mirror = 1;
7082                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7083                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7084                         break;
7085                 case RTE_FLOW_ACTION_TYPE_DROP:
7086                         ret = mlx5_flow_validate_action_drop(action_flags,
7087                                                              attr, error);
7088                         if (ret < 0)
7089                                 return ret;
7090                         action_flags |= MLX5_FLOW_ACTION_DROP;
7091                         ++actions_n;
7092                         break;
7093                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7094                         ret = mlx5_flow_validate_action_queue(actions,
7095                                                               action_flags, dev,
7096                                                               attr, error);
7097                         if (ret < 0)
7098                                 return ret;
7099                         queue_index = ((const struct rte_flow_action_queue *)
7100                                                         (actions->conf))->index;
7101                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7102                         ++actions_n;
7103                         break;
7104                 case RTE_FLOW_ACTION_TYPE_RSS:
7105                         rss = actions->conf;
7106                         ret = mlx5_flow_validate_action_rss(actions,
7107                                                             action_flags, dev,
7108                                                             attr, item_flags,
7109                                                             error);
7110                         if (ret < 0)
7111                                 return ret;
7112                         if (rss && sample_rss &&
7113                             (sample_rss->level != rss->level ||
7114                             sample_rss->types != rss->types))
7115                                 return rte_flow_error_set(error, ENOTSUP,
7116                                         RTE_FLOW_ERROR_TYPE_ACTION,
7117                                         NULL,
7118                                         "Can't use the different RSS types "
7119                                         "or level in the same flow");
7120                         if (rss != NULL && rss->queue_num)
7121                                 queue_index = rss->queue[0];
7122                         action_flags |= MLX5_FLOW_ACTION_RSS;
7123                         ++actions_n;
7124                         break;
7125                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7126                         ret =
7127                         mlx5_flow_validate_action_default_miss(action_flags,
7128                                         attr, error);
7129                         if (ret < 0)
7130                                 return ret;
7131                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7132                         ++actions_n;
7133                         break;
7134                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7135                 case RTE_FLOW_ACTION_TYPE_COUNT:
7136                         shared_count = is_shared_action_count(actions);
7137                         ret = flow_dv_validate_action_count(dev, shared_count,
7138                                                             action_flags,
7139                                                             error);
7140                         if (ret < 0)
7141                                 return ret;
7142                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7143                         ++actions_n;
7144                         break;
7145                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7146                         if (flow_dv_validate_action_pop_vlan(dev,
7147                                                              action_flags,
7148                                                              actions,
7149                                                              item_flags, attr,
7150                                                              error))
7151                                 return -rte_errno;
7152                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7153                                 modify_after_mirror = 1;
7154                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7155                         ++actions_n;
7156                         break;
7157                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7158                         ret = flow_dv_validate_action_push_vlan(dev,
7159                                                                 action_flags,
7160                                                                 vlan_m,
7161                                                                 actions, attr,
7162                                                                 error);
7163                         if (ret < 0)
7164                                 return ret;
7165                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7166                                 modify_after_mirror = 1;
7167                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7168                         ++actions_n;
7169                         break;
7170                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7171                         ret = flow_dv_validate_action_set_vlan_pcp
7172                                                 (action_flags, actions, error);
7173                         if (ret < 0)
7174                                 return ret;
7175                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7176                                 modify_after_mirror = 1;
7177                         /* Count PCP with push_vlan command. */
7178                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7179                         break;
7180                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7181                         ret = flow_dv_validate_action_set_vlan_vid
7182                                                 (item_flags, action_flags,
7183                                                  actions, error);
7184                         if (ret < 0)
7185                                 return ret;
7186                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7187                                 modify_after_mirror = 1;
7188                         /* Count VID with push_vlan command. */
7189                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7190                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7191                         break;
7192                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7193                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7194                         ret = flow_dv_validate_action_l2_encap(dev,
7195                                                                action_flags,
7196                                                                actions, attr,
7197                                                                error);
7198                         if (ret < 0)
7199                                 return ret;
7200                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7201                         ++actions_n;
7202                         break;
7203                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7204                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7205                         ret = flow_dv_validate_action_decap(dev, action_flags,
7206                                                             actions, item_flags,
7207                                                             attr, error);
7208                         if (ret < 0)
7209                                 return ret;
7210                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7211                                 modify_after_mirror = 1;
7212                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7213                         ++actions_n;
7214                         break;
7215                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7216                         ret = flow_dv_validate_action_raw_encap_decap
7217                                 (dev, NULL, actions->conf, attr, &action_flags,
7218                                  &actions_n, actions, item_flags, error);
7219                         if (ret < 0)
7220                                 return ret;
7221                         break;
7222                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7223                         decap = actions->conf;
7224                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7225                                 ;
7226                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7227                                 encap = NULL;
7228                                 actions--;
7229                         } else {
7230                                 encap = actions->conf;
7231                         }
7232                         ret = flow_dv_validate_action_raw_encap_decap
7233                                            (dev,
7234                                             decap ? decap : &empty_decap, encap,
7235                                             attr, &action_flags, &actions_n,
7236                                             actions, item_flags, error);
7237                         if (ret < 0)
7238                                 return ret;
7239                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7240                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7241                                 modify_after_mirror = 1;
7242                         break;
7243                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7244                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7245                         ret = flow_dv_validate_action_modify_mac(action_flags,
7246                                                                  actions,
7247                                                                  item_flags,
7248                                                                  error);
7249                         if (ret < 0)
7250                                 return ret;
7251                         /* Count all modify-header actions as one action. */
7252                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7253                                 ++actions_n;
7254                         action_flags |= actions->type ==
7255                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7256                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7257                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7258                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7259                                 modify_after_mirror = 1;
7260                         /*
7261                          * Even if the source and destination MAC addresses have
7262                          * overlap in the header with 4B alignment, the convert
7263                          * function will handle them separately and 4 SW actions
7264                          * will be created. And 2 actions will be added each
7265                          * time no matter how many bytes of address will be set.
7266                          */
7267                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7268                         break;
7269                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7270                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7271                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7272                                                                   actions,
7273                                                                   item_flags,
7274                                                                   error);
7275                         if (ret < 0)
7276                                 return ret;
7277                         /* Count all modify-header actions as one action. */
7278                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7279                                 ++actions_n;
7280                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7281                                 modify_after_mirror = 1;
7282                         action_flags |= actions->type ==
7283                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7284                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7285                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7286                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7287                         break;
7288                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7289                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7290                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7291                                                                   actions,
7292                                                                   item_flags,
7293                                                                   error);
7294                         if (ret < 0)
7295                                 return ret;
7296                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7297                                 return rte_flow_error_set(error, ENOTSUP,
7298                                         RTE_FLOW_ERROR_TYPE_ACTION,
7299                                         actions,
7300                                         "Can't change header "
7301                                         "with ICMPv6 proto");
7302                         /* Count all modify-header actions as one action. */
7303                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7304                                 ++actions_n;
7305                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7306                                 modify_after_mirror = 1;
7307                         action_flags |= actions->type ==
7308                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7309                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7310                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7311                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7312                         break;
7313                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7314                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7315                         ret = flow_dv_validate_action_modify_tp(action_flags,
7316                                                                 actions,
7317                                                                 item_flags,
7318                                                                 error);
7319                         if (ret < 0)
7320                                 return ret;
7321                         /* Count all modify-header actions as one action. */
7322                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7323                                 ++actions_n;
7324                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7325                                 modify_after_mirror = 1;
7326                         action_flags |= actions->type ==
7327                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7328                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7329                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7330                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7331                         break;
7332                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7333                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7334                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7335                                                                  actions,
7336                                                                  item_flags,
7337                                                                  error);
7338                         if (ret < 0)
7339                                 return ret;
7340                         /* Count all modify-header actions as one action. */
7341                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7342                                 ++actions_n;
7343                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7344                                 modify_after_mirror = 1;
7345                         action_flags |= actions->type ==
7346                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7347                                                 MLX5_FLOW_ACTION_SET_TTL :
7348                                                 MLX5_FLOW_ACTION_DEC_TTL;
7349                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7350                         break;
7351                 case RTE_FLOW_ACTION_TYPE_JUMP:
7352                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7353                                                            action_flags,
7354                                                            attr, external,
7355                                                            error);
7356                         if (ret)
7357                                 return ret;
7358                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7359                             fdb_mirror_limit)
7360                                 return rte_flow_error_set(error, EINVAL,
7361                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7362                                                   NULL,
7363                                                   "sample and jump action combination is not supported");
7364                         ++actions_n;
7365                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7366                         break;
7367                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7368                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7369                         ret = flow_dv_validate_action_modify_tcp_seq
7370                                                                 (action_flags,
7371                                                                  actions,
7372                                                                  item_flags,
7373                                                                  error);
7374                         if (ret < 0)
7375                                 return ret;
7376                         /* Count all modify-header actions as one action. */
7377                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7378                                 ++actions_n;
7379                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7380                                 modify_after_mirror = 1;
7381                         action_flags |= actions->type ==
7382                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7383                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7384                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7385                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7386                         break;
7387                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7388                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7389                         ret = flow_dv_validate_action_modify_tcp_ack
7390                                                                 (action_flags,
7391                                                                  actions,
7392                                                                  item_flags,
7393                                                                  error);
7394                         if (ret < 0)
7395                                 return ret;
7396                         /* Count all modify-header actions as one action. */
7397                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7398                                 ++actions_n;
7399                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7400                                 modify_after_mirror = 1;
7401                         action_flags |= actions->type ==
7402                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7403                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7404                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7405                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7406                         break;
7407                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7408                         break;
7409                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7410                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7411                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7412                         break;
7413                 case RTE_FLOW_ACTION_TYPE_METER:
7414                         ret = mlx5_flow_validate_action_meter(dev,
7415                                                               action_flags,
7416                                                               actions, attr,
7417                                                               &def_policy,
7418                                                               error);
7419                         if (ret < 0)
7420                                 return ret;
7421                         action_flags |= MLX5_FLOW_ACTION_METER;
7422                         if (!def_policy)
7423                                 action_flags |=
7424                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7425                         ++actions_n;
7426                         /* Meter action will add one more TAG action. */
7427                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7428                         break;
7429                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7430                         if (!attr->transfer && !attr->group)
7431                                 return rte_flow_error_set(error, ENOTSUP,
7432                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7433                                                                            NULL,
7434                           "Shared ASO age action is not supported for group 0");
7435                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7436                                 return rte_flow_error_set
7437                                                   (error, EINVAL,
7438                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7439                                                    NULL,
7440                                                    "duplicate age actions set");
7441                         action_flags |= MLX5_FLOW_ACTION_AGE;
7442                         ++actions_n;
7443                         break;
7444                 case RTE_FLOW_ACTION_TYPE_AGE:
7445                         ret = flow_dv_validate_action_age(action_flags,
7446                                                           actions, dev,
7447                                                           error);
7448                         if (ret < 0)
7449                                 return ret;
7450                         /*
7451                          * Validate the regular AGE action (using counter)
7452                          * mutual exclusion with share counter actions.
7453                          */
7454                         if (!priv->sh->flow_hit_aso_en) {
7455                                 if (shared_count)
7456                                         return rte_flow_error_set
7457                                                 (error, EINVAL,
7458                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7459                                                 NULL,
7460                                                 "old age and shared count combination is not supported");
7461                                 if (sample_count)
7462                                         return rte_flow_error_set
7463                                                 (error, EINVAL,
7464                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7465                                                 NULL,
7466                                                 "old age action and count must be in the same sub flow");
7467                         }
7468                         action_flags |= MLX5_FLOW_ACTION_AGE;
7469                         ++actions_n;
7470                         break;
7471                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7472                         ret = flow_dv_validate_action_modify_ipv4_dscp
7473                                                          (action_flags,
7474                                                           actions,
7475                                                           item_flags,
7476                                                           error);
7477                         if (ret < 0)
7478                                 return ret;
7479                         /* Count all modify-header actions as one action. */
7480                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7481                                 ++actions_n;
7482                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7483                                 modify_after_mirror = 1;
7484                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7485                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7486                         break;
7487                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7488                         ret = flow_dv_validate_action_modify_ipv6_dscp
7489                                                                 (action_flags,
7490                                                                  actions,
7491                                                                  item_flags,
7492                                                                  error);
7493                         if (ret < 0)
7494                                 return ret;
7495                         /* Count all modify-header actions as one action. */
7496                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7497                                 ++actions_n;
7498                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7499                                 modify_after_mirror = 1;
7500                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7501                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7502                         break;
7503                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7504                         ret = flow_dv_validate_action_sample(&action_flags,
7505                                                              actions, dev,
7506                                                              attr, item_flags,
7507                                                              rss, &sample_rss,
7508                                                              &sample_count,
7509                                                              &fdb_mirror_limit,
7510                                                              error);
7511                         if (ret < 0)
7512                                 return ret;
7513                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7514                         ++actions_n;
7515                         break;
7516                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7517                         ret = flow_dv_validate_action_modify_field(dev,
7518                                                                    action_flags,
7519                                                                    actions,
7520                                                                    attr,
7521                                                                    error);
7522                         if (ret < 0)
7523                                 return ret;
7524                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7525                                 modify_after_mirror = 1;
7526                         /* Count all modify-header actions as one action. */
7527                         if (!(action_flags & MLX5_FLOW_ACTION_MODIFY_FIELD))
7528                                 ++actions_n;
7529                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7530                         rw_act_num += ret;
7531                         break;
7532                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7533                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7534                                                              item_flags, attr,
7535                                                              error);
7536                         if (ret < 0)
7537                                 return ret;
7538                         action_flags |= MLX5_FLOW_ACTION_CT;
7539                         break;
7540                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7541                         /* tunnel offload action was processed before
7542                          * list it here as a supported type
7543                          */
7544                         break;
7545                 default:
7546                         return rte_flow_error_set(error, ENOTSUP,
7547                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7548                                                   actions,
7549                                                   "action not supported");
7550                 }
7551         }
7552         /*
7553          * Validate actions in flow rules
7554          * - Explicit decap action is prohibited by the tunnel offload API.
7555          * - Drop action in tunnel steer rule is prohibited by the API.
7556          * - Application cannot use MARK action because it's value can mask
7557          *   tunnel default miss nitification.
7558          * - JUMP in tunnel match rule has no support in current PMD
7559          *   implementation.
7560          * - TAG & META are reserved for future uses.
7561          */
7562         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7563                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7564                                             MLX5_FLOW_ACTION_MARK     |
7565                                             MLX5_FLOW_ACTION_SET_TAG  |
7566                                             MLX5_FLOW_ACTION_SET_META |
7567                                             MLX5_FLOW_ACTION_DROP;
7568
7569                 if (action_flags & bad_actions_mask)
7570                         return rte_flow_error_set
7571                                         (error, EINVAL,
7572                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7573                                         "Invalid RTE action in tunnel "
7574                                         "set decap rule");
7575                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7576                         return rte_flow_error_set
7577                                         (error, EINVAL,
7578                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7579                                         "tunnel set decap rule must terminate "
7580                                         "with JUMP");
7581                 if (!attr->ingress)
7582                         return rte_flow_error_set
7583                                         (error, EINVAL,
7584                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7585                                         "tunnel flows for ingress traffic only");
7586         }
7587         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7588                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7589                                             MLX5_FLOW_ACTION_MARK    |
7590                                             MLX5_FLOW_ACTION_SET_TAG |
7591                                             MLX5_FLOW_ACTION_SET_META;
7592
7593                 if (action_flags & bad_actions_mask)
7594                         return rte_flow_error_set
7595                                         (error, EINVAL,
7596                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7597                                         "Invalid RTE action in tunnel "
7598                                         "set match rule");
7599         }
7600         /*
7601          * Validate the drop action mutual exclusion with other actions.
7602          * Drop action is mutually-exclusive with any other action, except for
7603          * Count action.
7604          * Drop action compatibility with tunnel offload was already validated.
7605          */
7606         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7607                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7608         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7609             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7610                 return rte_flow_error_set(error, EINVAL,
7611                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7612                                           "Drop action is mutually-exclusive "
7613                                           "with any other action, except for "
7614                                           "Count action");
7615         /* Eswitch has few restrictions on using items and actions */
7616         if (attr->transfer) {
7617                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7618                     action_flags & MLX5_FLOW_ACTION_FLAG)
7619                         return rte_flow_error_set(error, ENOTSUP,
7620                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7621                                                   NULL,
7622                                                   "unsupported action FLAG");
7623                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7624                     action_flags & MLX5_FLOW_ACTION_MARK)
7625                         return rte_flow_error_set(error, ENOTSUP,
7626                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7627                                                   NULL,
7628                                                   "unsupported action MARK");
7629                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7630                         return rte_flow_error_set(error, ENOTSUP,
7631                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7632                                                   NULL,
7633                                                   "unsupported action QUEUE");
7634                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7635                         return rte_flow_error_set(error, ENOTSUP,
7636                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7637                                                   NULL,
7638                                                   "unsupported action RSS");
7639                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7640                         return rte_flow_error_set(error, EINVAL,
7641                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7642                                                   actions,
7643                                                   "no fate action is found");
7644         } else {
7645                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7646                         return rte_flow_error_set(error, EINVAL,
7647                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7648                                                   actions,
7649                                                   "no fate action is found");
7650         }
7651         /*
7652          * Continue validation for Xcap and VLAN actions.
7653          * If hairpin is working in explicit TX rule mode, there is no actions
7654          * splitting and the validation of hairpin ingress flow should be the
7655          * same as other standard flows.
7656          */
7657         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7658                              MLX5_FLOW_VLAN_ACTIONS)) &&
7659             (queue_index == 0xFFFF ||
7660              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7661              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7662              conf->tx_explicit != 0))) {
7663                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7664                     MLX5_FLOW_XCAP_ACTIONS)
7665                         return rte_flow_error_set(error, ENOTSUP,
7666                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7667                                                   NULL, "encap and decap "
7668                                                   "combination aren't supported");
7669                 if (!attr->transfer && attr->ingress) {
7670                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7671                                 return rte_flow_error_set
7672                                                 (error, ENOTSUP,
7673                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7674                                                  NULL, "encap is not supported"
7675                                                  " for ingress traffic");
7676                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7677                                 return rte_flow_error_set
7678                                                 (error, ENOTSUP,
7679                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7680                                                  NULL, "push VLAN action not "
7681                                                  "supported for ingress");
7682                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7683                                         MLX5_FLOW_VLAN_ACTIONS)
7684                                 return rte_flow_error_set
7685                                                 (error, ENOTSUP,
7686                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7687                                                  NULL, "no support for "
7688                                                  "multiple VLAN actions");
7689                 }
7690         }
7691         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7692                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7693                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7694                         attr->ingress)
7695                         return rte_flow_error_set
7696                                 (error, ENOTSUP,
7697                                 RTE_FLOW_ERROR_TYPE_ACTION,
7698                                 NULL, "fate action not supported for "
7699                                 "meter with policy");
7700                 if (attr->egress) {
7701                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7702                                 return rte_flow_error_set
7703                                         (error, ENOTSUP,
7704                                         RTE_FLOW_ERROR_TYPE_ACTION,
7705                                         NULL, "modify header action in egress "
7706                                         "cannot be done before meter action");
7707                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7708                                 return rte_flow_error_set
7709                                         (error, ENOTSUP,
7710                                         RTE_FLOW_ERROR_TYPE_ACTION,
7711                                         NULL, "encap action in egress "
7712                                         "cannot be done before meter action");
7713                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7714                                 return rte_flow_error_set
7715                                         (error, ENOTSUP,
7716                                         RTE_FLOW_ERROR_TYPE_ACTION,
7717                                         NULL, "push vlan action in egress "
7718                                         "cannot be done before meter action");
7719                 }
7720         }
7721         /*
7722          * Hairpin flow will add one more TAG action in TX implicit mode.
7723          * In TX explicit mode, there will be no hairpin flow ID.
7724          */
7725         if (hairpin > 0)
7726                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7727         /* extra metadata enabled: one more TAG action will be add. */
7728         if (dev_conf->dv_flow_en &&
7729             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7730             mlx5_flow_ext_mreg_supported(dev))
7731                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7732         if (rw_act_num >
7733                         flow_dv_modify_hdr_action_max(dev, is_root)) {
7734                 return rte_flow_error_set(error, ENOTSUP,
7735                                           RTE_FLOW_ERROR_TYPE_ACTION,
7736                                           NULL, "too many header modify"
7737                                           " actions to support");
7738         }
7739         /* Eswitch egress mirror and modify flow has limitation on CX5 */
7740         if (fdb_mirror_limit && modify_after_mirror)
7741                 return rte_flow_error_set(error, EINVAL,
7742                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7743                                 "sample before modify action is not supported");
7744         return 0;
7745 }
7746
7747 /**
7748  * Internal preparation function. Allocates the DV flow size,
7749  * this size is constant.
7750  *
7751  * @param[in] dev
7752  *   Pointer to the rte_eth_dev structure.
7753  * @param[in] attr
7754  *   Pointer to the flow attributes.
7755  * @param[in] items
7756  *   Pointer to the list of items.
7757  * @param[in] actions
7758  *   Pointer to the list of actions.
7759  * @param[out] error
7760  *   Pointer to the error structure.
7761  *
7762  * @return
7763  *   Pointer to mlx5_flow object on success,
7764  *   otherwise NULL and rte_errno is set.
7765  */
7766 static struct mlx5_flow *
7767 flow_dv_prepare(struct rte_eth_dev *dev,
7768                 const struct rte_flow_attr *attr __rte_unused,
7769                 const struct rte_flow_item items[] __rte_unused,
7770                 const struct rte_flow_action actions[] __rte_unused,
7771                 struct rte_flow_error *error)
7772 {
7773         uint32_t handle_idx = 0;
7774         struct mlx5_flow *dev_flow;
7775         struct mlx5_flow_handle *dev_handle;
7776         struct mlx5_priv *priv = dev->data->dev_private;
7777         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
7778
7779         MLX5_ASSERT(wks);
7780         wks->skip_matcher_reg = 0;
7781         /* In case of corrupting the memory. */
7782         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
7783                 rte_flow_error_set(error, ENOSPC,
7784                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7785                                    "not free temporary device flow");
7786                 return NULL;
7787         }
7788         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7789                                    &handle_idx);
7790         if (!dev_handle) {
7791                 rte_flow_error_set(error, ENOMEM,
7792                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7793                                    "not enough memory to create flow handle");
7794                 return NULL;
7795         }
7796         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
7797         dev_flow = &wks->flows[wks->flow_idx++];
7798         memset(dev_flow, 0, sizeof(*dev_flow));
7799         dev_flow->handle = dev_handle;
7800         dev_flow->handle_idx = handle_idx;
7801         /*
7802          * In some old rdma-core releases, before continuing, a check of the
7803          * length of matching parameter will be done at first. It needs to use
7804          * the length without misc4 param. If the flow has misc4 support, then
7805          * the length needs to be adjusted accordingly. Each param member is
7806          * aligned with a 64B boundary naturally.
7807          */
7808         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param) -
7809                                   MLX5_ST_SZ_BYTES(fte_match_set_misc4);
7810         dev_flow->ingress = attr->ingress;
7811         dev_flow->dv.transfer = attr->transfer;
7812         return dev_flow;
7813 }
7814
7815 #ifdef RTE_LIBRTE_MLX5_DEBUG
7816 /**
7817  * Sanity check for match mask and value. Similar to check_valid_spec() in
7818  * kernel driver. If unmasked bit is present in value, it returns failure.
7819  *
7820  * @param match_mask
7821  *   pointer to match mask buffer.
7822  * @param match_value
7823  *   pointer to match value buffer.
7824  *
7825  * @return
7826  *   0 if valid, -EINVAL otherwise.
7827  */
7828 static int
7829 flow_dv_check_valid_spec(void *match_mask, void *match_value)
7830 {
7831         uint8_t *m = match_mask;
7832         uint8_t *v = match_value;
7833         unsigned int i;
7834
7835         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
7836                 if (v[i] & ~m[i]) {
7837                         DRV_LOG(ERR,
7838                                 "match_value differs from match_criteria"
7839                                 " %p[%u] != %p[%u]",
7840                                 match_value, i, match_mask, i);
7841                         return -EINVAL;
7842                 }
7843         }
7844         return 0;
7845 }
7846 #endif
7847
7848 /**
7849  * Add match of ip_version.
7850  *
7851  * @param[in] group
7852  *   Flow group.
7853  * @param[in] headers_v
7854  *   Values header pointer.
7855  * @param[in] headers_m
7856  *   Masks header pointer.
7857  * @param[in] ip_version
7858  *   The IP version to set.
7859  */
7860 static inline void
7861 flow_dv_set_match_ip_version(uint32_t group,
7862                              void *headers_v,
7863                              void *headers_m,
7864                              uint8_t ip_version)
7865 {
7866         if (group == 0)
7867                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
7868         else
7869                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
7870                          ip_version);
7871         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
7872         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
7873         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
7874 }
7875
7876 /**
7877  * Add Ethernet item to matcher and to the value.
7878  *
7879  * @param[in, out] matcher
7880  *   Flow matcher.
7881  * @param[in, out] key
7882  *   Flow matcher value.
7883  * @param[in] item
7884  *   Flow pattern to translate.
7885  * @param[in] inner
7886  *   Item is inner pattern.
7887  */
7888 static void
7889 flow_dv_translate_item_eth(void *matcher, void *key,
7890                            const struct rte_flow_item *item, int inner,
7891                            uint32_t group)
7892 {
7893         const struct rte_flow_item_eth *eth_m = item->mask;
7894         const struct rte_flow_item_eth *eth_v = item->spec;
7895         const struct rte_flow_item_eth nic_mask = {
7896                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
7897                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
7898                 .type = RTE_BE16(0xffff),
7899                 .has_vlan = 0,
7900         };
7901         void *hdrs_m;
7902         void *hdrs_v;
7903         char *l24_v;
7904         unsigned int i;
7905
7906         if (!eth_v)
7907                 return;
7908         if (!eth_m)
7909                 eth_m = &nic_mask;
7910         if (inner) {
7911                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
7912                                          inner_headers);
7913                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7914         } else {
7915                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
7916                                          outer_headers);
7917                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7918         }
7919         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
7920                &eth_m->dst, sizeof(eth_m->dst));
7921         /* The value must be in the range of the mask. */
7922         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
7923         for (i = 0; i < sizeof(eth_m->dst); ++i)
7924                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
7925         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
7926                &eth_m->src, sizeof(eth_m->src));
7927         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
7928         /* The value must be in the range of the mask. */
7929         for (i = 0; i < sizeof(eth_m->dst); ++i)
7930                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
7931         /*
7932          * HW supports match on one Ethertype, the Ethertype following the last
7933          * VLAN tag of the packet (see PRM).
7934          * Set match on ethertype only if ETH header is not followed by VLAN.
7935          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
7936          * ethertype, and use ip_version field instead.
7937          * eCPRI over Ether layer will use type value 0xAEFE.
7938          */
7939         if (eth_m->type == 0xFFFF) {
7940                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
7941                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
7942                 switch (eth_v->type) {
7943                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
7944                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
7945                         return;
7946                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
7947                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
7948                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
7949                         return;
7950                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
7951                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
7952                         return;
7953                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
7954                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
7955                         return;
7956                 default:
7957                         break;
7958                 }
7959         }
7960         if (eth_m->has_vlan) {
7961                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
7962                 if (eth_v->has_vlan) {
7963                         /*
7964                          * Here, when also has_more_vlan field in VLAN item is
7965                          * not set, only single-tagged packets will be matched.
7966                          */
7967                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
7968                         return;
7969                 }
7970         }
7971         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
7972                  rte_be_to_cpu_16(eth_m->type));
7973         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
7974         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
7975 }
7976
7977 /**
7978  * Add VLAN item to matcher and to the value.
7979  *
7980  * @param[in, out] dev_flow
7981  *   Flow descriptor.
7982  * @param[in, out] matcher
7983  *   Flow matcher.
7984  * @param[in, out] key
7985  *   Flow matcher value.
7986  * @param[in] item
7987  *   Flow pattern to translate.
7988  * @param[in] inner
7989  *   Item is inner pattern.
7990  */
7991 static void
7992 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
7993                             void *matcher, void *key,
7994                             const struct rte_flow_item *item,
7995                             int inner, uint32_t group)
7996 {
7997         const struct rte_flow_item_vlan *vlan_m = item->mask;
7998         const struct rte_flow_item_vlan *vlan_v = item->spec;
7999         void *hdrs_m;
8000         void *hdrs_v;
8001         uint16_t tci_m;
8002         uint16_t tci_v;
8003
8004         if (inner) {
8005                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8006                                          inner_headers);
8007                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8008         } else {
8009                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8010                                          outer_headers);
8011                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8012                 /*
8013                  * This is workaround, masks are not supported,
8014                  * and pre-validated.
8015                  */
8016                 if (vlan_v)
8017                         dev_flow->handle->vf_vlan.tag =
8018                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8019         }
8020         /*
8021          * When VLAN item exists in flow, mark packet as tagged,
8022          * even if TCI is not specified.
8023          */
8024         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8025                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8026                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8027         }
8028         if (!vlan_v)
8029                 return;
8030         if (!vlan_m)
8031                 vlan_m = &rte_flow_item_vlan_mask;
8032         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8033         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8034         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8035         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8036         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8037         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8038         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8039         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8040         /*
8041          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8042          * ethertype, and use ip_version field instead.
8043          */
8044         if (vlan_m->inner_type == 0xFFFF) {
8045                 switch (vlan_v->inner_type) {
8046                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8047                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8048                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8049                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8050                         return;
8051                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8052                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8053                         return;
8054                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8055                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8056                         return;
8057                 default:
8058                         break;
8059                 }
8060         }
8061         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8062                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8063                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8064                 /* Only one vlan_tag bit can be set. */
8065                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8066                 return;
8067         }
8068         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8069                  rte_be_to_cpu_16(vlan_m->inner_type));
8070         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8071                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8072 }
8073
8074 /**
8075  * Add IPV4 item to matcher and to the value.
8076  *
8077  * @param[in, out] matcher
8078  *   Flow matcher.
8079  * @param[in, out] key
8080  *   Flow matcher value.
8081  * @param[in] item
8082  *   Flow pattern to translate.
8083  * @param[in] inner
8084  *   Item is inner pattern.
8085  * @param[in] group
8086  *   The group to insert the rule.
8087  */
8088 static void
8089 flow_dv_translate_item_ipv4(void *matcher, void *key,
8090                             const struct rte_flow_item *item,
8091                             int inner, uint32_t group)
8092 {
8093         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8094         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8095         const struct rte_flow_item_ipv4 nic_mask = {
8096                 .hdr = {
8097                         .src_addr = RTE_BE32(0xffffffff),
8098                         .dst_addr = RTE_BE32(0xffffffff),
8099                         .type_of_service = 0xff,
8100                         .next_proto_id = 0xff,
8101                         .time_to_live = 0xff,
8102                 },
8103         };
8104         void *headers_m;
8105         void *headers_v;
8106         char *l24_m;
8107         char *l24_v;
8108         uint8_t tos;
8109
8110         if (inner) {
8111                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8112                                          inner_headers);
8113                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8114         } else {
8115                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8116                                          outer_headers);
8117                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8118         }
8119         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8120         if (!ipv4_v)
8121                 return;
8122         if (!ipv4_m)
8123                 ipv4_m = &nic_mask;
8124         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8125                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8126         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8127                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8128         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8129         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8130         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8131                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8132         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8133                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8134         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8135         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8136         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8137         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8138                  ipv4_m->hdr.type_of_service);
8139         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8140         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8141                  ipv4_m->hdr.type_of_service >> 2);
8142         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8143         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8144                  ipv4_m->hdr.next_proto_id);
8145         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8146                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8147         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8148                  ipv4_m->hdr.time_to_live);
8149         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8150                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8151         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8152                  !!(ipv4_m->hdr.fragment_offset));
8153         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8154                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8155 }
8156
8157 /**
8158  * Add IPV6 item to matcher and to the value.
8159  *
8160  * @param[in, out] matcher
8161  *   Flow matcher.
8162  * @param[in, out] key
8163  *   Flow matcher value.
8164  * @param[in] item
8165  *   Flow pattern to translate.
8166  * @param[in] inner
8167  *   Item is inner pattern.
8168  * @param[in] group
8169  *   The group to insert the rule.
8170  */
8171 static void
8172 flow_dv_translate_item_ipv6(void *matcher, void *key,
8173                             const struct rte_flow_item *item,
8174                             int inner, uint32_t group)
8175 {
8176         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8177         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8178         const struct rte_flow_item_ipv6 nic_mask = {
8179                 .hdr = {
8180                         .src_addr =
8181                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8182                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8183                         .dst_addr =
8184                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8185                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8186                         .vtc_flow = RTE_BE32(0xffffffff),
8187                         .proto = 0xff,
8188                         .hop_limits = 0xff,
8189                 },
8190         };
8191         void *headers_m;
8192         void *headers_v;
8193         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8194         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8195         char *l24_m;
8196         char *l24_v;
8197         uint32_t vtc_m;
8198         uint32_t vtc_v;
8199         int i;
8200         int size;
8201
8202         if (inner) {
8203                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8204                                          inner_headers);
8205                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8206         } else {
8207                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8208                                          outer_headers);
8209                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8210         }
8211         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8212         if (!ipv6_v)
8213                 return;
8214         if (!ipv6_m)
8215                 ipv6_m = &nic_mask;
8216         size = sizeof(ipv6_m->hdr.dst_addr);
8217         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8218                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8219         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8220                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8221         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8222         for (i = 0; i < size; ++i)
8223                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8224         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8225                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8226         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8227                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8228         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8229         for (i = 0; i < size; ++i)
8230                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8231         /* TOS. */
8232         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8233         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8234         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8235         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8236         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8237         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8238         /* Label. */
8239         if (inner) {
8240                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8241                          vtc_m);
8242                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8243                          vtc_v);
8244         } else {
8245                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8246                          vtc_m);
8247                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8248                          vtc_v);
8249         }
8250         /* Protocol. */
8251         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8252                  ipv6_m->hdr.proto);
8253         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8254                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8255         /* Hop limit. */
8256         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8257                  ipv6_m->hdr.hop_limits);
8258         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8259                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8260         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8261                  !!(ipv6_m->has_frag_ext));
8262         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8263                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8264 }
8265
8266 /**
8267  * Add IPV6 fragment extension item to matcher and to the value.
8268  *
8269  * @param[in, out] matcher
8270  *   Flow matcher.
8271  * @param[in, out] key
8272  *   Flow matcher value.
8273  * @param[in] item
8274  *   Flow pattern to translate.
8275  * @param[in] inner
8276  *   Item is inner pattern.
8277  */
8278 static void
8279 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8280                                      const struct rte_flow_item *item,
8281                                      int inner)
8282 {
8283         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8284         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8285         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8286                 .hdr = {
8287                         .next_header = 0xff,
8288                         .frag_data = RTE_BE16(0xffff),
8289                 },
8290         };
8291         void *headers_m;
8292         void *headers_v;
8293
8294         if (inner) {
8295                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8296                                          inner_headers);
8297                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8298         } else {
8299                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8300                                          outer_headers);
8301                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8302         }
8303         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8304         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8305         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8306         if (!ipv6_frag_ext_v)
8307                 return;
8308         if (!ipv6_frag_ext_m)
8309                 ipv6_frag_ext_m = &nic_mask;
8310         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8311                  ipv6_frag_ext_m->hdr.next_header);
8312         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8313                  ipv6_frag_ext_v->hdr.next_header &
8314                  ipv6_frag_ext_m->hdr.next_header);
8315 }
8316
8317 /**
8318  * Add TCP item to matcher and to the value.
8319  *
8320  * @param[in, out] matcher
8321  *   Flow matcher.
8322  * @param[in, out] key
8323  *   Flow matcher value.
8324  * @param[in] item
8325  *   Flow pattern to translate.
8326  * @param[in] inner
8327  *   Item is inner pattern.
8328  */
8329 static void
8330 flow_dv_translate_item_tcp(void *matcher, void *key,
8331                            const struct rte_flow_item *item,
8332                            int inner)
8333 {
8334         const struct rte_flow_item_tcp *tcp_m = item->mask;
8335         const struct rte_flow_item_tcp *tcp_v = item->spec;
8336         void *headers_m;
8337         void *headers_v;
8338
8339         if (inner) {
8340                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8341                                          inner_headers);
8342                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8343         } else {
8344                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8345                                          outer_headers);
8346                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8347         }
8348         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8349         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8350         if (!tcp_v)
8351                 return;
8352         if (!tcp_m)
8353                 tcp_m = &rte_flow_item_tcp_mask;
8354         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8355                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8356         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8357                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8358         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8359                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8360         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8361                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8362         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8363                  tcp_m->hdr.tcp_flags);
8364         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8365                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8366 }
8367
8368 /**
8369  * Add UDP item to matcher and to the value.
8370  *
8371  * @param[in, out] matcher
8372  *   Flow matcher.
8373  * @param[in, out] key
8374  *   Flow matcher value.
8375  * @param[in] item
8376  *   Flow pattern to translate.
8377  * @param[in] inner
8378  *   Item is inner pattern.
8379  */
8380 static void
8381 flow_dv_translate_item_udp(void *matcher, void *key,
8382                            const struct rte_flow_item *item,
8383                            int inner)
8384 {
8385         const struct rte_flow_item_udp *udp_m = item->mask;
8386         const struct rte_flow_item_udp *udp_v = item->spec;
8387         void *headers_m;
8388         void *headers_v;
8389
8390         if (inner) {
8391                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8392                                          inner_headers);
8393                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8394         } else {
8395                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8396                                          outer_headers);
8397                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8398         }
8399         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8400         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8401         if (!udp_v)
8402                 return;
8403         if (!udp_m)
8404                 udp_m = &rte_flow_item_udp_mask;
8405         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8406                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8407         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8408                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8409         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8410                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8411         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8412                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8413 }
8414
8415 /**
8416  * Add GRE optional Key item to matcher and to the value.
8417  *
8418  * @param[in, out] matcher
8419  *   Flow matcher.
8420  * @param[in, out] key
8421  *   Flow matcher value.
8422  * @param[in] item
8423  *   Flow pattern to translate.
8424  * @param[in] inner
8425  *   Item is inner pattern.
8426  */
8427 static void
8428 flow_dv_translate_item_gre_key(void *matcher, void *key,
8429                                    const struct rte_flow_item *item)
8430 {
8431         const rte_be32_t *key_m = item->mask;
8432         const rte_be32_t *key_v = item->spec;
8433         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8434         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8435         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8436
8437         /* GRE K bit must be on and should already be validated */
8438         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8439         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8440         if (!key_v)
8441                 return;
8442         if (!key_m)
8443                 key_m = &gre_key_default_mask;
8444         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8445                  rte_be_to_cpu_32(*key_m) >> 8);
8446         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8447                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8448         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8449                  rte_be_to_cpu_32(*key_m) & 0xFF);
8450         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8451                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8452 }
8453
8454 /**
8455  * Add GRE item to matcher and to the value.
8456  *
8457  * @param[in, out] matcher
8458  *   Flow matcher.
8459  * @param[in, out] key
8460  *   Flow matcher value.
8461  * @param[in] item
8462  *   Flow pattern to translate.
8463  * @param[in] inner
8464  *   Item is inner pattern.
8465  */
8466 static void
8467 flow_dv_translate_item_gre(void *matcher, void *key,
8468                            const struct rte_flow_item *item,
8469                            int inner)
8470 {
8471         const struct rte_flow_item_gre *gre_m = item->mask;
8472         const struct rte_flow_item_gre *gre_v = item->spec;
8473         void *headers_m;
8474         void *headers_v;
8475         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8476         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8477         struct {
8478                 union {
8479                         __extension__
8480                         struct {
8481                                 uint16_t version:3;
8482                                 uint16_t rsvd0:9;
8483                                 uint16_t s_present:1;
8484                                 uint16_t k_present:1;
8485                                 uint16_t rsvd_bit1:1;
8486                                 uint16_t c_present:1;
8487                         };
8488                         uint16_t value;
8489                 };
8490         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8491
8492         if (inner) {
8493                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8494                                          inner_headers);
8495                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8496         } else {
8497                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8498                                          outer_headers);
8499                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8500         }
8501         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8502         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8503         if (!gre_v)
8504                 return;
8505         if (!gre_m)
8506                 gre_m = &rte_flow_item_gre_mask;
8507         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8508                  rte_be_to_cpu_16(gre_m->protocol));
8509         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8510                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8511         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8512         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8513         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8514                  gre_crks_rsvd0_ver_m.c_present);
8515         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8516                  gre_crks_rsvd0_ver_v.c_present &
8517                  gre_crks_rsvd0_ver_m.c_present);
8518         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8519                  gre_crks_rsvd0_ver_m.k_present);
8520         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8521                  gre_crks_rsvd0_ver_v.k_present &
8522                  gre_crks_rsvd0_ver_m.k_present);
8523         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8524                  gre_crks_rsvd0_ver_m.s_present);
8525         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8526                  gre_crks_rsvd0_ver_v.s_present &
8527                  gre_crks_rsvd0_ver_m.s_present);
8528 }
8529
8530 /**
8531  * Add NVGRE item to matcher and to the value.
8532  *
8533  * @param[in, out] matcher
8534  *   Flow matcher.
8535  * @param[in, out] key
8536  *   Flow matcher value.
8537  * @param[in] item
8538  *   Flow pattern to translate.
8539  * @param[in] inner
8540  *   Item is inner pattern.
8541  */
8542 static void
8543 flow_dv_translate_item_nvgre(void *matcher, void *key,
8544                              const struct rte_flow_item *item,
8545                              int inner)
8546 {
8547         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8548         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8549         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8550         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8551         const char *tni_flow_id_m;
8552         const char *tni_flow_id_v;
8553         char *gre_key_m;
8554         char *gre_key_v;
8555         int size;
8556         int i;
8557
8558         /* For NVGRE, GRE header fields must be set with defined values. */
8559         const struct rte_flow_item_gre gre_spec = {
8560                 .c_rsvd0_ver = RTE_BE16(0x2000),
8561                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8562         };
8563         const struct rte_flow_item_gre gre_mask = {
8564                 .c_rsvd0_ver = RTE_BE16(0xB000),
8565                 .protocol = RTE_BE16(UINT16_MAX),
8566         };
8567         const struct rte_flow_item gre_item = {
8568                 .spec = &gre_spec,
8569                 .mask = &gre_mask,
8570                 .last = NULL,
8571         };
8572         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8573         if (!nvgre_v)
8574                 return;
8575         if (!nvgre_m)
8576                 nvgre_m = &rte_flow_item_nvgre_mask;
8577         tni_flow_id_m = (const char *)nvgre_m->tni;
8578         tni_flow_id_v = (const char *)nvgre_v->tni;
8579         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8580         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8581         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8582         memcpy(gre_key_m, tni_flow_id_m, size);
8583         for (i = 0; i < size; ++i)
8584                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8585 }
8586
8587 /**
8588  * Add VXLAN item to matcher and to the value.
8589  *
8590  * @param[in, out] matcher
8591  *   Flow matcher.
8592  * @param[in, out] key
8593  *   Flow matcher value.
8594  * @param[in] item
8595  *   Flow pattern to translate.
8596  * @param[in] inner
8597  *   Item is inner pattern.
8598  */
8599 static void
8600 flow_dv_translate_item_vxlan(void *matcher, void *key,
8601                              const struct rte_flow_item *item,
8602                              int inner)
8603 {
8604         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8605         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8606         void *headers_m;
8607         void *headers_v;
8608         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8609         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8610         char *vni_m;
8611         char *vni_v;
8612         uint16_t dport;
8613         int size;
8614         int i;
8615
8616         if (inner) {
8617                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8618                                          inner_headers);
8619                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8620         } else {
8621                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8622                                          outer_headers);
8623                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8624         }
8625         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8626                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8627         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8628                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8629                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8630         }
8631         if (!vxlan_v)
8632                 return;
8633         if (!vxlan_m)
8634                 vxlan_m = &rte_flow_item_vxlan_mask;
8635         size = sizeof(vxlan_m->vni);
8636         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8637         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8638         memcpy(vni_m, vxlan_m->vni, size);
8639         for (i = 0; i < size; ++i)
8640                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8641 }
8642
8643 /**
8644  * Add VXLAN-GPE item to matcher and to the value.
8645  *
8646  * @param[in, out] matcher
8647  *   Flow matcher.
8648  * @param[in, out] key
8649  *   Flow matcher value.
8650  * @param[in] item
8651  *   Flow pattern to translate.
8652  * @param[in] inner
8653  *   Item is inner pattern.
8654  */
8655
8656 static void
8657 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8658                                  const struct rte_flow_item *item, int inner)
8659 {
8660         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8661         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8662         void *headers_m;
8663         void *headers_v;
8664         void *misc_m =
8665                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8666         void *misc_v =
8667                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8668         char *vni_m;
8669         char *vni_v;
8670         uint16_t dport;
8671         int size;
8672         int i;
8673         uint8_t flags_m = 0xff;
8674         uint8_t flags_v = 0xc;
8675
8676         if (inner) {
8677                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8678                                          inner_headers);
8679                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8680         } else {
8681                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8682                                          outer_headers);
8683                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8684         }
8685         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8686                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8687         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8688                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8689                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8690         }
8691         if (!vxlan_v)
8692                 return;
8693         if (!vxlan_m)
8694                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8695         size = sizeof(vxlan_m->vni);
8696         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8697         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8698         memcpy(vni_m, vxlan_m->vni, size);
8699         for (i = 0; i < size; ++i)
8700                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8701         if (vxlan_m->flags) {
8702                 flags_m = vxlan_m->flags;
8703                 flags_v = vxlan_v->flags;
8704         }
8705         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8706         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8707         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8708                  vxlan_m->protocol);
8709         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8710                  vxlan_v->protocol);
8711 }
8712
8713 /**
8714  * Add Geneve item to matcher and to the value.
8715  *
8716  * @param[in, out] matcher
8717  *   Flow matcher.
8718  * @param[in, out] key
8719  *   Flow matcher value.
8720  * @param[in] item
8721  *   Flow pattern to translate.
8722  * @param[in] inner
8723  *   Item is inner pattern.
8724  */
8725
8726 static void
8727 flow_dv_translate_item_geneve(void *matcher, void *key,
8728                               const struct rte_flow_item *item, int inner)
8729 {
8730         const struct rte_flow_item_geneve *geneve_m = item->mask;
8731         const struct rte_flow_item_geneve *geneve_v = item->spec;
8732         void *headers_m;
8733         void *headers_v;
8734         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8735         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8736         uint16_t dport;
8737         uint16_t gbhdr_m;
8738         uint16_t gbhdr_v;
8739         char *vni_m;
8740         char *vni_v;
8741         size_t size, i;
8742
8743         if (inner) {
8744                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8745                                          inner_headers);
8746                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8747         } else {
8748                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8749                                          outer_headers);
8750                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8751         }
8752         dport = MLX5_UDP_PORT_GENEVE;
8753         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8754                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8755                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8756         }
8757         if (!geneve_v)
8758                 return;
8759         if (!geneve_m)
8760                 geneve_m = &rte_flow_item_geneve_mask;
8761         size = sizeof(geneve_m->vni);
8762         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
8763         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
8764         memcpy(vni_m, geneve_m->vni, size);
8765         for (i = 0; i < size; ++i)
8766                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
8767         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
8768                  rte_be_to_cpu_16(geneve_m->protocol));
8769         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
8770                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
8771         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
8772         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
8773         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
8774                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8775         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
8776                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8777         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
8778                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8779         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
8780                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
8781                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8782 }
8783
8784 /**
8785  * Create Geneve TLV option resource.
8786  *
8787  * @param dev[in, out]
8788  *   Pointer to rte_eth_dev structure.
8789  * @param[in, out] tag_be24
8790  *   Tag value in big endian then R-shift 8.
8791  * @parm[in, out] dev_flow
8792  *   Pointer to the dev_flow.
8793  * @param[out] error
8794  *   pointer to error structure.
8795  *
8796  * @return
8797  *   0 on success otherwise -errno and errno is set.
8798  */
8799
8800 int
8801 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
8802                                              const struct rte_flow_item *item,
8803                                              struct rte_flow_error *error)
8804 {
8805         struct mlx5_priv *priv = dev->data->dev_private;
8806         struct mlx5_dev_ctx_shared *sh = priv->sh;
8807         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
8808                         sh->geneve_tlv_option_resource;
8809         struct mlx5_devx_obj *obj;
8810         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
8811         int ret = 0;
8812
8813         if (!geneve_opt_v)
8814                 return -1;
8815         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
8816         if (geneve_opt_resource != NULL) {
8817                 if (geneve_opt_resource->option_class ==
8818                         geneve_opt_v->option_class &&
8819                         geneve_opt_resource->option_type ==
8820                         geneve_opt_v->option_type &&
8821                         geneve_opt_resource->length ==
8822                         geneve_opt_v->option_len) {
8823                         /* We already have GENVE TLV option obj allocated. */
8824                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
8825                                            __ATOMIC_RELAXED);
8826                 } else {
8827                         ret = rte_flow_error_set(error, ENOMEM,
8828                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8829                                 "Only one GENEVE TLV option supported");
8830                         goto exit;
8831                 }
8832         } else {
8833                 /* Create a GENEVE TLV object and resource. */
8834                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
8835                                 geneve_opt_v->option_class,
8836                                 geneve_opt_v->option_type,
8837                                 geneve_opt_v->option_len);
8838                 if (!obj) {
8839                         ret = rte_flow_error_set(error, ENODATA,
8840                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8841                                 "Failed to create GENEVE TLV Devx object");
8842                         goto exit;
8843                 }
8844                 sh->geneve_tlv_option_resource =
8845                                 mlx5_malloc(MLX5_MEM_ZERO,
8846                                                 sizeof(*geneve_opt_resource),
8847                                                 0, SOCKET_ID_ANY);
8848                 if (!sh->geneve_tlv_option_resource) {
8849                         claim_zero(mlx5_devx_cmd_destroy(obj));
8850                         ret = rte_flow_error_set(error, ENOMEM,
8851                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8852                                 "GENEVE TLV object memory allocation failed");
8853                         goto exit;
8854                 }
8855                 geneve_opt_resource = sh->geneve_tlv_option_resource;
8856                 geneve_opt_resource->obj = obj;
8857                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
8858                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
8859                 geneve_opt_resource->length = geneve_opt_v->option_len;
8860                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
8861                                 __ATOMIC_RELAXED);
8862         }
8863 exit:
8864         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
8865         return ret;
8866 }
8867
8868 /**
8869  * Add Geneve TLV option item to matcher.
8870  *
8871  * @param[in, out] dev
8872  *   Pointer to rte_eth_dev structure.
8873  * @param[in, out] matcher
8874  *   Flow matcher.
8875  * @param[in, out] key
8876  *   Flow matcher value.
8877  * @param[in] item
8878  *   Flow pattern to translate.
8879  * @param[out] error
8880  *   Pointer to error structure.
8881  */
8882 static int
8883 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
8884                                   void *key, const struct rte_flow_item *item,
8885                                   struct rte_flow_error *error)
8886 {
8887         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
8888         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
8889         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8890         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8891         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
8892                         misc_parameters_3);
8893         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8894         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
8895         int ret = 0;
8896
8897         if (!geneve_opt_v)
8898                 return -1;
8899         if (!geneve_opt_m)
8900                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
8901         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
8902                                                            error);
8903         if (ret) {
8904                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
8905                 return ret;
8906         }
8907         /*
8908          * Set the option length in GENEVE header if not requested.
8909          * The GENEVE TLV option length is expressed by the option length field
8910          * in the GENEVE header.
8911          * If the option length was not requested but the GENEVE TLV option item
8912          * is present we set the option length field implicitly.
8913          */
8914         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
8915                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
8916                          MLX5_GENEVE_OPTLEN_MASK);
8917                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
8918                          geneve_opt_v->option_len + 1);
8919         }
8920         /* Set the data. */
8921         if (geneve_opt_v->data) {
8922                 memcpy(&opt_data_key, geneve_opt_v->data,
8923                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
8924                                 sizeof(opt_data_key)));
8925                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
8926                                 sizeof(opt_data_key));
8927                 memcpy(&opt_data_mask, geneve_opt_m->data,
8928                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
8929                                 sizeof(opt_data_mask)));
8930                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
8931                                 sizeof(opt_data_mask));
8932                 MLX5_SET(fte_match_set_misc3, misc3_m,
8933                                 geneve_tlv_option_0_data,
8934                                 rte_be_to_cpu_32(opt_data_mask));
8935                 MLX5_SET(fte_match_set_misc3, misc3_v,
8936                                 geneve_tlv_option_0_data,
8937                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
8938         }
8939         return ret;
8940 }
8941
8942 /**
8943  * Add MPLS item to matcher and to the value.
8944  *
8945  * @param[in, out] matcher
8946  *   Flow matcher.
8947  * @param[in, out] key
8948  *   Flow matcher value.
8949  * @param[in] item
8950  *   Flow pattern to translate.
8951  * @param[in] prev_layer
8952  *   The protocol layer indicated in previous item.
8953  * @param[in] inner
8954  *   Item is inner pattern.
8955  */
8956 static void
8957 flow_dv_translate_item_mpls(void *matcher, void *key,
8958                             const struct rte_flow_item *item,
8959                             uint64_t prev_layer,
8960                             int inner)
8961 {
8962         const uint32_t *in_mpls_m = item->mask;
8963         const uint32_t *in_mpls_v = item->spec;
8964         uint32_t *out_mpls_m = 0;
8965         uint32_t *out_mpls_v = 0;
8966         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8967         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8968         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
8969                                      misc_parameters_2);
8970         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
8971         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8972         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8973
8974         switch (prev_layer) {
8975         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
8976                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
8977                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8978                          MLX5_UDP_PORT_MPLS);
8979                 break;
8980         case MLX5_FLOW_LAYER_GRE:
8981                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
8982                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8983                          RTE_ETHER_TYPE_MPLS);
8984                 break;
8985         default:
8986                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8987                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8988                          IPPROTO_MPLS);
8989                 break;
8990         }
8991         if (!in_mpls_v)
8992                 return;
8993         if (!in_mpls_m)
8994                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
8995         switch (prev_layer) {
8996         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
8997                 out_mpls_m =
8998                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
8999                                                  outer_first_mpls_over_udp);
9000                 out_mpls_v =
9001                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9002                                                  outer_first_mpls_over_udp);
9003                 break;
9004         case MLX5_FLOW_LAYER_GRE:
9005                 out_mpls_m =
9006                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9007                                                  outer_first_mpls_over_gre);
9008                 out_mpls_v =
9009                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9010                                                  outer_first_mpls_over_gre);
9011                 break;
9012         default:
9013                 /* Inner MPLS not over GRE is not supported. */
9014                 if (!inner) {
9015                         out_mpls_m =
9016                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9017                                                          misc2_m,
9018                                                          outer_first_mpls);
9019                         out_mpls_v =
9020                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9021                                                          misc2_v,
9022                                                          outer_first_mpls);
9023                 }
9024                 break;
9025         }
9026         if (out_mpls_m && out_mpls_v) {
9027                 *out_mpls_m = *in_mpls_m;
9028                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9029         }
9030 }
9031
9032 /**
9033  * Add metadata register item to matcher
9034  *
9035  * @param[in, out] matcher
9036  *   Flow matcher.
9037  * @param[in, out] key
9038  *   Flow matcher value.
9039  * @param[in] reg_type
9040  *   Type of device metadata register
9041  * @param[in] value
9042  *   Register value
9043  * @param[in] mask
9044  *   Register mask
9045  */
9046 static void
9047 flow_dv_match_meta_reg(void *matcher, void *key,
9048                        enum modify_reg reg_type,
9049                        uint32_t data, uint32_t mask)
9050 {
9051         void *misc2_m =
9052                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9053         void *misc2_v =
9054                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9055         uint32_t temp;
9056
9057         data &= mask;
9058         switch (reg_type) {
9059         case REG_A:
9060                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9061                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9062                 break;
9063         case REG_B:
9064                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9065                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9066                 break;
9067         case REG_C_0:
9068                 /*
9069                  * The metadata register C0 field might be divided into
9070                  * source vport index and META item value, we should set
9071                  * this field according to specified mask, not as whole one.
9072                  */
9073                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9074                 temp |= mask;
9075                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9076                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9077                 temp &= ~mask;
9078                 temp |= data;
9079                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9080                 break;
9081         case REG_C_1:
9082                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9083                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9084                 break;
9085         case REG_C_2:
9086                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9087                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9088                 break;
9089         case REG_C_3:
9090                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9091                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9092                 break;
9093         case REG_C_4:
9094                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9095                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9096                 break;
9097         case REG_C_5:
9098                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9099                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9100                 break;
9101         case REG_C_6:
9102                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9103                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9104                 break;
9105         case REG_C_7:
9106                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9107                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9108                 break;
9109         default:
9110                 MLX5_ASSERT(false);
9111                 break;
9112         }
9113 }
9114
9115 /**
9116  * Add MARK item to matcher
9117  *
9118  * @param[in] dev
9119  *   The device to configure through.
9120  * @param[in, out] matcher
9121  *   Flow matcher.
9122  * @param[in, out] key
9123  *   Flow matcher value.
9124  * @param[in] item
9125  *   Flow pattern to translate.
9126  */
9127 static void
9128 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9129                             void *matcher, void *key,
9130                             const struct rte_flow_item *item)
9131 {
9132         struct mlx5_priv *priv = dev->data->dev_private;
9133         const struct rte_flow_item_mark *mark;
9134         uint32_t value;
9135         uint32_t mask;
9136
9137         mark = item->mask ? (const void *)item->mask :
9138                             &rte_flow_item_mark_mask;
9139         mask = mark->id & priv->sh->dv_mark_mask;
9140         mark = (const void *)item->spec;
9141         MLX5_ASSERT(mark);
9142         value = mark->id & priv->sh->dv_mark_mask & mask;
9143         if (mask) {
9144                 enum modify_reg reg;
9145
9146                 /* Get the metadata register index for the mark. */
9147                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9148                 MLX5_ASSERT(reg > 0);
9149                 if (reg == REG_C_0) {
9150                         struct mlx5_priv *priv = dev->data->dev_private;
9151                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9152                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9153
9154                         mask &= msk_c0;
9155                         mask <<= shl_c0;
9156                         value <<= shl_c0;
9157                 }
9158                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9159         }
9160 }
9161
9162 /**
9163  * Add META item to matcher
9164  *
9165  * @param[in] dev
9166  *   The devich to configure through.
9167  * @param[in, out] matcher
9168  *   Flow matcher.
9169  * @param[in, out] key
9170  *   Flow matcher value.
9171  * @param[in] attr
9172  *   Attributes of flow that includes this item.
9173  * @param[in] item
9174  *   Flow pattern to translate.
9175  */
9176 static void
9177 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9178                             void *matcher, void *key,
9179                             const struct rte_flow_attr *attr,
9180                             const struct rte_flow_item *item)
9181 {
9182         const struct rte_flow_item_meta *meta_m;
9183         const struct rte_flow_item_meta *meta_v;
9184
9185         meta_m = (const void *)item->mask;
9186         if (!meta_m)
9187                 meta_m = &rte_flow_item_meta_mask;
9188         meta_v = (const void *)item->spec;
9189         if (meta_v) {
9190                 int reg;
9191                 uint32_t value = meta_v->data;
9192                 uint32_t mask = meta_m->data;
9193
9194                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9195                 if (reg < 0)
9196                         return;
9197                 MLX5_ASSERT(reg != REG_NON);
9198                 /*
9199                  * In datapath code there is no endianness
9200                  * coversions for perfromance reasons, all
9201                  * pattern conversions are done in rte_flow.
9202                  */
9203                 value = rte_cpu_to_be_32(value);
9204                 mask = rte_cpu_to_be_32(mask);
9205                 if (reg == REG_C_0) {
9206                         struct mlx5_priv *priv = dev->data->dev_private;
9207                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9208                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9209 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
9210                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
9211
9212                         value >>= shr_c0;
9213                         mask >>= shr_c0;
9214 #endif
9215                         value <<= shl_c0;
9216                         mask <<= shl_c0;
9217                         MLX5_ASSERT(msk_c0);
9218                         MLX5_ASSERT(!(~msk_c0 & mask));
9219                 }
9220                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9221         }
9222 }
9223
9224 /**
9225  * Add vport metadata Reg C0 item to matcher
9226  *
9227  * @param[in, out] matcher
9228  *   Flow matcher.
9229  * @param[in, out] key
9230  *   Flow matcher value.
9231  * @param[in] reg
9232  *   Flow pattern to translate.
9233  */
9234 static void
9235 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9236                                   uint32_t value, uint32_t mask)
9237 {
9238         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9239 }
9240
9241 /**
9242  * Add tag item to matcher
9243  *
9244  * @param[in] dev
9245  *   The devich to configure through.
9246  * @param[in, out] matcher
9247  *   Flow matcher.
9248  * @param[in, out] key
9249  *   Flow matcher value.
9250  * @param[in] item
9251  *   Flow pattern to translate.
9252  */
9253 static void
9254 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9255                                 void *matcher, void *key,
9256                                 const struct rte_flow_item *item)
9257 {
9258         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9259         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9260         uint32_t mask, value;
9261
9262         MLX5_ASSERT(tag_v);
9263         value = tag_v->data;
9264         mask = tag_m ? tag_m->data : UINT32_MAX;
9265         if (tag_v->id == REG_C_0) {
9266                 struct mlx5_priv *priv = dev->data->dev_private;
9267                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9268                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9269
9270                 mask &= msk_c0;
9271                 mask <<= shl_c0;
9272                 value <<= shl_c0;
9273         }
9274         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9275 }
9276
9277 /**
9278  * Add TAG item to matcher
9279  *
9280  * @param[in] dev
9281  *   The devich to configure through.
9282  * @param[in, out] matcher
9283  *   Flow matcher.
9284  * @param[in, out] key
9285  *   Flow matcher value.
9286  * @param[in] item
9287  *   Flow pattern to translate.
9288  */
9289 static void
9290 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9291                            void *matcher, void *key,
9292                            const struct rte_flow_item *item)
9293 {
9294         const struct rte_flow_item_tag *tag_v = item->spec;
9295         const struct rte_flow_item_tag *tag_m = item->mask;
9296         enum modify_reg reg;
9297
9298         MLX5_ASSERT(tag_v);
9299         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9300         /* Get the metadata register index for the tag. */
9301         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9302         MLX5_ASSERT(reg > 0);
9303         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9304 }
9305
9306 /**
9307  * Add source vport match to the specified matcher.
9308  *
9309  * @param[in, out] matcher
9310  *   Flow matcher.
9311  * @param[in, out] key
9312  *   Flow matcher value.
9313  * @param[in] port
9314  *   Source vport value to match
9315  * @param[in] mask
9316  *   Mask
9317  */
9318 static void
9319 flow_dv_translate_item_source_vport(void *matcher, void *key,
9320                                     int16_t port, uint16_t mask)
9321 {
9322         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9323         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9324
9325         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9326         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9327 }
9328
9329 /**
9330  * Translate port-id item to eswitch match on  port-id.
9331  *
9332  * @param[in] dev
9333  *   The devich to configure through.
9334  * @param[in, out] matcher
9335  *   Flow matcher.
9336  * @param[in, out] key
9337  *   Flow matcher value.
9338  * @param[in] item
9339  *   Flow pattern to translate.
9340  * @param[in]
9341  *   Flow attributes.
9342  *
9343  * @return
9344  *   0 on success, a negative errno value otherwise.
9345  */
9346 static int
9347 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9348                                void *key, const struct rte_flow_item *item,
9349                                const struct rte_flow_attr *attr)
9350 {
9351         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9352         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9353         struct mlx5_priv *priv;
9354         uint16_t mask, id;
9355
9356         mask = pid_m ? pid_m->id : 0xffff;
9357         id = pid_v ? pid_v->id : dev->data->port_id;
9358         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9359         if (!priv)
9360                 return -rte_errno;
9361         /*
9362          * Translate to vport field or to metadata, depending on mode.
9363          * Kernel can use either misc.source_port or half of C0 metadata
9364          * register.
9365          */
9366         if (priv->vport_meta_mask) {
9367                 /*
9368                  * Provide the hint for SW steering library
9369                  * to insert the flow into ingress domain and
9370                  * save the extra vport match.
9371                  */
9372                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9373                     priv->pf_bond < 0 && attr->transfer)
9374                         flow_dv_translate_item_source_vport
9375                                 (matcher, key, priv->vport_id, mask);
9376                 /*
9377                  * We should always set the vport metadata register,
9378                  * otherwise the SW steering library can drop
9379                  * the rule if wire vport metadata value is not zero,
9380                  * it depends on kernel configuration.
9381                  */
9382                 flow_dv_translate_item_meta_vport(matcher, key,
9383                                                   priv->vport_meta_tag,
9384                                                   priv->vport_meta_mask);
9385         } else {
9386                 flow_dv_translate_item_source_vport(matcher, key,
9387                                                     priv->vport_id, mask);
9388         }
9389         return 0;
9390 }
9391
9392 /**
9393  * Add ICMP6 item to matcher and to the value.
9394  *
9395  * @param[in, out] matcher
9396  *   Flow matcher.
9397  * @param[in, out] key
9398  *   Flow matcher value.
9399  * @param[in] item
9400  *   Flow pattern to translate.
9401  * @param[in] inner
9402  *   Item is inner pattern.
9403  */
9404 static void
9405 flow_dv_translate_item_icmp6(void *matcher, void *key,
9406                               const struct rte_flow_item *item,
9407                               int inner)
9408 {
9409         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9410         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9411         void *headers_m;
9412         void *headers_v;
9413         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9414                                      misc_parameters_3);
9415         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9416         if (inner) {
9417                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9418                                          inner_headers);
9419                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9420         } else {
9421                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9422                                          outer_headers);
9423                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9424         }
9425         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9426         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9427         if (!icmp6_v)
9428                 return;
9429         if (!icmp6_m)
9430                 icmp6_m = &rte_flow_item_icmp6_mask;
9431         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9432         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9433                  icmp6_v->type & icmp6_m->type);
9434         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9435         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9436                  icmp6_v->code & icmp6_m->code);
9437 }
9438
9439 /**
9440  * Add ICMP item to matcher and to the value.
9441  *
9442  * @param[in, out] matcher
9443  *   Flow matcher.
9444  * @param[in, out] key
9445  *   Flow matcher value.
9446  * @param[in] item
9447  *   Flow pattern to translate.
9448  * @param[in] inner
9449  *   Item is inner pattern.
9450  */
9451 static void
9452 flow_dv_translate_item_icmp(void *matcher, void *key,
9453                             const struct rte_flow_item *item,
9454                             int inner)
9455 {
9456         const struct rte_flow_item_icmp *icmp_m = item->mask;
9457         const struct rte_flow_item_icmp *icmp_v = item->spec;
9458         uint32_t icmp_header_data_m = 0;
9459         uint32_t icmp_header_data_v = 0;
9460         void *headers_m;
9461         void *headers_v;
9462         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9463                                      misc_parameters_3);
9464         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9465         if (inner) {
9466                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9467                                          inner_headers);
9468                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9469         } else {
9470                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9471                                          outer_headers);
9472                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9473         }
9474         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9475         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9476         if (!icmp_v)
9477                 return;
9478         if (!icmp_m)
9479                 icmp_m = &rte_flow_item_icmp_mask;
9480         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9481                  icmp_m->hdr.icmp_type);
9482         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9483                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9484         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9485                  icmp_m->hdr.icmp_code);
9486         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9487                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9488         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9489         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9490         if (icmp_header_data_m) {
9491                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9492                 icmp_header_data_v |=
9493                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9494                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9495                          icmp_header_data_m);
9496                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9497                          icmp_header_data_v & icmp_header_data_m);
9498         }
9499 }
9500
9501 /**
9502  * Add GTP item to matcher and to the value.
9503  *
9504  * @param[in, out] matcher
9505  *   Flow matcher.
9506  * @param[in, out] key
9507  *   Flow matcher value.
9508  * @param[in] item
9509  *   Flow pattern to translate.
9510  * @param[in] inner
9511  *   Item is inner pattern.
9512  */
9513 static void
9514 flow_dv_translate_item_gtp(void *matcher, void *key,
9515                            const struct rte_flow_item *item, int inner)
9516 {
9517         const struct rte_flow_item_gtp *gtp_m = item->mask;
9518         const struct rte_flow_item_gtp *gtp_v = item->spec;
9519         void *headers_m;
9520         void *headers_v;
9521         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9522                                      misc_parameters_3);
9523         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9524         uint16_t dport = RTE_GTPU_UDP_PORT;
9525
9526         if (inner) {
9527                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9528                                          inner_headers);
9529                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9530         } else {
9531                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9532                                          outer_headers);
9533                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9534         }
9535         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9536                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9537                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9538         }
9539         if (!gtp_v)
9540                 return;
9541         if (!gtp_m)
9542                 gtp_m = &rte_flow_item_gtp_mask;
9543         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9544                  gtp_m->v_pt_rsv_flags);
9545         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9546                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9547         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9548         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9549                  gtp_v->msg_type & gtp_m->msg_type);
9550         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9551                  rte_be_to_cpu_32(gtp_m->teid));
9552         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9553                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9554 }
9555
9556 /**
9557  * Add GTP PSC item to matcher.
9558  *
9559  * @param[in, out] matcher
9560  *   Flow matcher.
9561  * @param[in, out] key
9562  *   Flow matcher value.
9563  * @param[in] item
9564  *   Flow pattern to translate.
9565  */
9566 static int
9567 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9568                                const struct rte_flow_item *item)
9569 {
9570         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9571         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9572         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9573                         misc_parameters_3);
9574         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9575         union {
9576                 uint32_t w32;
9577                 struct {
9578                         uint16_t seq_num;
9579                         uint8_t npdu_num;
9580                         uint8_t next_ext_header_type;
9581                 };
9582         } dw_2;
9583         uint8_t gtp_flags;
9584
9585         /* Always set E-flag match on one, regardless of GTP item settings. */
9586         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9587         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9588         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9589         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9590         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9591         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9592         /*Set next extension header type. */
9593         dw_2.seq_num = 0;
9594         dw_2.npdu_num = 0;
9595         dw_2.next_ext_header_type = 0xff;
9596         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9597                  rte_cpu_to_be_32(dw_2.w32));
9598         dw_2.seq_num = 0;
9599         dw_2.npdu_num = 0;
9600         dw_2.next_ext_header_type = 0x85;
9601         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9602                  rte_cpu_to_be_32(dw_2.w32));
9603         if (gtp_psc_v) {
9604                 union {
9605                         uint32_t w32;
9606                         struct {
9607                                 uint8_t len;
9608                                 uint8_t type_flags;
9609                                 uint8_t qfi;
9610                                 uint8_t reserved;
9611                         };
9612                 } dw_0;
9613
9614                 /*Set extension header PDU type and Qos. */
9615                 if (!gtp_psc_m)
9616                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9617                 dw_0.w32 = 0;
9618                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9619                 dw_0.qfi = gtp_psc_m->qfi;
9620                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9621                          rte_cpu_to_be_32(dw_0.w32));
9622                 dw_0.w32 = 0;
9623                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9624                                                         gtp_psc_m->pdu_type);
9625                 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9626                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9627                          rte_cpu_to_be_32(dw_0.w32));
9628         }
9629         return 0;
9630 }
9631
9632 /**
9633  * Add eCPRI item to matcher and to the value.
9634  *
9635  * @param[in] dev
9636  *   The devich to configure through.
9637  * @param[in, out] matcher
9638  *   Flow matcher.
9639  * @param[in, out] key
9640  *   Flow matcher value.
9641  * @param[in] item
9642  *   Flow pattern to translate.
9643  * @param[in] samples
9644  *   Sample IDs to be used in the matching.
9645  */
9646 static void
9647 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9648                              void *key, const struct rte_flow_item *item)
9649 {
9650         struct mlx5_priv *priv = dev->data->dev_private;
9651         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9652         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9653         struct rte_ecpri_common_hdr common;
9654         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9655                                      misc_parameters_4);
9656         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9657         uint32_t *samples;
9658         void *dw_m;
9659         void *dw_v;
9660
9661         if (!ecpri_v)
9662                 return;
9663         if (!ecpri_m)
9664                 ecpri_m = &rte_flow_item_ecpri_mask;
9665         /*
9666          * Maximal four DW samples are supported in a single matching now.
9667          * Two are used now for a eCPRI matching:
9668          * 1. Type: one byte, mask should be 0x00ff0000 in network order
9669          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9670          *    if any.
9671          */
9672         if (!ecpri_m->hdr.common.u32)
9673                 return;
9674         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9675         /* Need to take the whole DW as the mask to fill the entry. */
9676         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9677                             prog_sample_field_value_0);
9678         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9679                             prog_sample_field_value_0);
9680         /* Already big endian (network order) in the header. */
9681         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9682         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9683         /* Sample#0, used for matching type, offset 0. */
9684         MLX5_SET(fte_match_set_misc4, misc4_m,
9685                  prog_sample_field_id_0, samples[0]);
9686         /* It makes no sense to set the sample ID in the mask field. */
9687         MLX5_SET(fte_match_set_misc4, misc4_v,
9688                  prog_sample_field_id_0, samples[0]);
9689         /*
9690          * Checking if message body part needs to be matched.
9691          * Some wildcard rules only matching type field should be supported.
9692          */
9693         if (ecpri_m->hdr.dummy[0]) {
9694                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9695                 switch (common.type) {
9696                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9697                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9698                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9699                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9700                                             prog_sample_field_value_1);
9701                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9702                                             prog_sample_field_value_1);
9703                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9704                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9705                                             ecpri_m->hdr.dummy[0];
9706                         /* Sample#1, to match message body, offset 4. */
9707                         MLX5_SET(fte_match_set_misc4, misc4_m,
9708                                  prog_sample_field_id_1, samples[1]);
9709                         MLX5_SET(fte_match_set_misc4, misc4_v,
9710                                  prog_sample_field_id_1, samples[1]);
9711                         break;
9712                 default:
9713                         /* Others, do not match any sample ID. */
9714                         break;
9715                 }
9716         }
9717 }
9718
9719 /*
9720  * Add connection tracking status item to matcher
9721  *
9722  * @param[in] dev
9723  *   The devich to configure through.
9724  * @param[in, out] matcher
9725  *   Flow matcher.
9726  * @param[in, out] key
9727  *   Flow matcher value.
9728  * @param[in] item
9729  *   Flow pattern to translate.
9730  */
9731 static void
9732 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
9733                               void *matcher, void *key,
9734                               const struct rte_flow_item *item)
9735 {
9736         uint32_t reg_value = 0;
9737         int reg_id;
9738         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
9739         uint32_t reg_mask = 0;
9740         const struct rte_flow_item_conntrack *spec = item->spec;
9741         const struct rte_flow_item_conntrack *mask = item->mask;
9742         uint32_t flags;
9743         struct rte_flow_error error;
9744
9745         if (!mask)
9746                 mask = &rte_flow_item_conntrack_mask;
9747         if (!spec || !mask->flags)
9748                 return;
9749         flags = spec->flags & mask->flags;
9750         /* The conflict should be checked in the validation. */
9751         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
9752                 reg_value |= MLX5_CT_SYNDROME_VALID;
9753         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9754                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
9755         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
9756                 reg_value |= MLX5_CT_SYNDROME_INVALID;
9757         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
9758                 reg_value |= MLX5_CT_SYNDROME_TRAP;
9759         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9760                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
9761         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
9762                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
9763                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
9764                 reg_mask |= 0xc0;
9765         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9766                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
9767         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9768                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
9769         /* The REG_C_x value could be saved during startup. */
9770         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
9771         if (reg_id == REG_NON)
9772                 return;
9773         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
9774                                reg_value, reg_mask);
9775 }
9776
9777 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
9778
9779 #define HEADER_IS_ZERO(match_criteria, headers)                              \
9780         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
9781                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
9782
9783 /**
9784  * Calculate flow matcher enable bitmap.
9785  *
9786  * @param match_criteria
9787  *   Pointer to flow matcher criteria.
9788  *
9789  * @return
9790  *   Bitmap of enabled fields.
9791  */
9792 static uint8_t
9793 flow_dv_matcher_enable(uint32_t *match_criteria)
9794 {
9795         uint8_t match_criteria_enable;
9796
9797         match_criteria_enable =
9798                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
9799                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
9800         match_criteria_enable |=
9801                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
9802                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
9803         match_criteria_enable |=
9804                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
9805                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
9806         match_criteria_enable |=
9807                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
9808                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
9809         match_criteria_enable |=
9810                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
9811                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
9812         match_criteria_enable |=
9813                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
9814                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
9815         return match_criteria_enable;
9816 }
9817
9818 struct mlx5_hlist_entry *
9819 flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *cb_ctx)
9820 {
9821         struct mlx5_dev_ctx_shared *sh = list->ctx;
9822         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9823         struct rte_eth_dev *dev = ctx->dev;
9824         struct mlx5_flow_tbl_data_entry *tbl_data;
9825         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data;
9826         struct rte_flow_error *error = ctx->error;
9827         union mlx5_flow_tbl_key key = { .v64 = key64 };
9828         struct mlx5_flow_tbl_resource *tbl;
9829         void *domain;
9830         uint32_t idx = 0;
9831         int ret;
9832
9833         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
9834         if (!tbl_data) {
9835                 rte_flow_error_set(error, ENOMEM,
9836                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9837                                    NULL,
9838                                    "cannot allocate flow table data entry");
9839                 return NULL;
9840         }
9841         tbl_data->idx = idx;
9842         tbl_data->tunnel = tt_prm->tunnel;
9843         tbl_data->group_id = tt_prm->group_id;
9844         tbl_data->external = !!tt_prm->external;
9845         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
9846         tbl_data->is_egress = !!key.is_egress;
9847         tbl_data->is_transfer = !!key.is_fdb;
9848         tbl_data->dummy = !!key.dummy;
9849         tbl_data->level = key.level;
9850         tbl_data->id = key.id;
9851         tbl = &tbl_data->tbl;
9852         if (key.dummy)
9853                 return &tbl_data->entry;
9854         if (key.is_fdb)
9855                 domain = sh->fdb_domain;
9856         else if (key.is_egress)
9857                 domain = sh->tx_domain;
9858         else
9859                 domain = sh->rx_domain;
9860         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
9861         if (ret) {
9862                 rte_flow_error_set(error, ENOMEM,
9863                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9864                                    NULL, "cannot create flow table object");
9865                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
9866                 return NULL;
9867         }
9868         if (key.level != 0) {
9869                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
9870                                         (tbl->obj, &tbl_data->jump.action);
9871                 if (ret) {
9872                         rte_flow_error_set(error, ENOMEM,
9873                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9874                                            NULL,
9875                                            "cannot create flow jump action");
9876                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
9877                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
9878                         return NULL;
9879                 }
9880         }
9881         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_cache",
9882               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
9883               key.level, key.id);
9884         mlx5_cache_list_init(&tbl_data->matchers, matcher_name, 0, sh,
9885                              flow_dv_matcher_create_cb,
9886                              flow_dv_matcher_match_cb,
9887                              flow_dv_matcher_remove_cb);
9888         return &tbl_data->entry;
9889 }
9890
9891 int
9892 flow_dv_tbl_match_cb(struct mlx5_hlist *list __rte_unused,
9893                      struct mlx5_hlist_entry *entry, uint64_t key64,
9894                      void *cb_ctx __rte_unused)
9895 {
9896         struct mlx5_flow_tbl_data_entry *tbl_data =
9897                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
9898         union mlx5_flow_tbl_key key = { .v64 = key64 };
9899
9900         return tbl_data->level != key.level ||
9901                tbl_data->id != key.id ||
9902                tbl_data->dummy != key.dummy ||
9903                tbl_data->is_transfer != !!key.is_fdb ||
9904                tbl_data->is_egress != !!key.is_egress;
9905 }
9906
9907 /**
9908  * Get a flow table.
9909  *
9910  * @param[in, out] dev
9911  *   Pointer to rte_eth_dev structure.
9912  * @param[in] table_level
9913  *   Table level to use.
9914  * @param[in] egress
9915  *   Direction of the table.
9916  * @param[in] transfer
9917  *   E-Switch or NIC flow.
9918  * @param[in] dummy
9919  *   Dummy entry for dv API.
9920  * @param[in] table_id
9921  *   Table id to use.
9922  * @param[out] error
9923  *   pointer to error structure.
9924  *
9925  * @return
9926  *   Returns tables resource based on the index, NULL in case of failed.
9927  */
9928 struct mlx5_flow_tbl_resource *
9929 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
9930                          uint32_t table_level, uint8_t egress,
9931                          uint8_t transfer,
9932                          bool external,
9933                          const struct mlx5_flow_tunnel *tunnel,
9934                          uint32_t group_id, uint8_t dummy,
9935                          uint32_t table_id,
9936                          struct rte_flow_error *error)
9937 {
9938         struct mlx5_priv *priv = dev->data->dev_private;
9939         union mlx5_flow_tbl_key table_key = {
9940                 {
9941                         .level = table_level,
9942                         .id = table_id,
9943                         .reserved = 0,
9944                         .dummy = !!dummy,
9945                         .is_fdb = !!transfer,
9946                         .is_egress = !!egress,
9947                 }
9948         };
9949         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
9950                 .tunnel = tunnel,
9951                 .group_id = group_id,
9952                 .external = external,
9953         };
9954         struct mlx5_flow_cb_ctx ctx = {
9955                 .dev = dev,
9956                 .error = error,
9957                 .data = &tt_prm,
9958         };
9959         struct mlx5_hlist_entry *entry;
9960         struct mlx5_flow_tbl_data_entry *tbl_data;
9961
9962         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
9963         if (!entry) {
9964                 rte_flow_error_set(error, ENOMEM,
9965                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9966                                    "cannot get table");
9967                 return NULL;
9968         }
9969         DRV_LOG(DEBUG, "table_level %u table_id %u "
9970                 "tunnel %u group %u registered.",
9971                 table_level, table_id,
9972                 tunnel ? tunnel->tunnel_id : 0, group_id);
9973         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
9974         return &tbl_data->tbl;
9975 }
9976
9977 void
9978 flow_dv_tbl_remove_cb(struct mlx5_hlist *list,
9979                       struct mlx5_hlist_entry *entry)
9980 {
9981         struct mlx5_dev_ctx_shared *sh = list->ctx;
9982         struct mlx5_flow_tbl_data_entry *tbl_data =
9983                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
9984
9985         MLX5_ASSERT(entry && sh);
9986         if (tbl_data->jump.action)
9987                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
9988         if (tbl_data->tbl.obj)
9989                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
9990         if (tbl_data->tunnel_offload && tbl_data->external) {
9991                 struct mlx5_hlist_entry *he;
9992                 struct mlx5_hlist *tunnel_grp_hash;
9993                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9994                 union tunnel_tbl_key tunnel_key = {
9995                         .tunnel_id = tbl_data->tunnel ?
9996                                         tbl_data->tunnel->tunnel_id : 0,
9997                         .group = tbl_data->group_id
9998                 };
9999                 uint32_t table_level = tbl_data->level;
10000
10001                 tunnel_grp_hash = tbl_data->tunnel ?
10002                                         tbl_data->tunnel->groups :
10003                                         thub->groups;
10004                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, NULL);
10005                 if (he)
10006                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10007                 DRV_LOG(DEBUG,
10008                         "table_level %u id %u tunnel %u group %u released.",
10009                         table_level,
10010                         tbl_data->id,
10011                         tbl_data->tunnel ?
10012                         tbl_data->tunnel->tunnel_id : 0,
10013                         tbl_data->group_id);
10014         }
10015         mlx5_cache_list_destroy(&tbl_data->matchers);
10016         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10017 }
10018
10019 /**
10020  * Release a flow table.
10021  *
10022  * @param[in] sh
10023  *   Pointer to device shared structure.
10024  * @param[in] tbl
10025  *   Table resource to be released.
10026  *
10027  * @return
10028  *   Returns 0 if table was released, else return 1;
10029  */
10030 static int
10031 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10032                              struct mlx5_flow_tbl_resource *tbl)
10033 {
10034         struct mlx5_flow_tbl_data_entry *tbl_data =
10035                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10036
10037         if (!tbl)
10038                 return 0;
10039         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10040 }
10041
10042 int
10043 flow_dv_matcher_match_cb(struct mlx5_cache_list *list __rte_unused,
10044                          struct mlx5_cache_entry *entry, void *cb_ctx)
10045 {
10046         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10047         struct mlx5_flow_dv_matcher *ref = ctx->data;
10048         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10049                                                         entry);
10050
10051         return cur->crc != ref->crc ||
10052                cur->priority != ref->priority ||
10053                memcmp((const void *)cur->mask.buf,
10054                       (const void *)ref->mask.buf, ref->mask.size);
10055 }
10056
10057 struct mlx5_cache_entry *
10058 flow_dv_matcher_create_cb(struct mlx5_cache_list *list,
10059                           struct mlx5_cache_entry *entry __rte_unused,
10060                           void *cb_ctx)
10061 {
10062         struct mlx5_dev_ctx_shared *sh = list->ctx;
10063         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10064         struct mlx5_flow_dv_matcher *ref = ctx->data;
10065         struct mlx5_flow_dv_matcher *cache;
10066         struct mlx5dv_flow_matcher_attr dv_attr = {
10067                 .type = IBV_FLOW_ATTR_NORMAL,
10068                 .match_mask = (void *)&ref->mask,
10069         };
10070         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10071                                                             typeof(*tbl), tbl);
10072         int ret;
10073
10074         cache = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*cache), 0, SOCKET_ID_ANY);
10075         if (!cache) {
10076                 rte_flow_error_set(ctx->error, ENOMEM,
10077                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10078                                    "cannot create matcher");
10079                 return NULL;
10080         }
10081         *cache = *ref;
10082         dv_attr.match_criteria_enable =
10083                 flow_dv_matcher_enable(cache->mask.buf);
10084         dv_attr.priority = ref->priority;
10085         if (tbl->is_egress)
10086                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10087         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10088                                                &cache->matcher_object);
10089         if (ret) {
10090                 mlx5_free(cache);
10091                 rte_flow_error_set(ctx->error, ENOMEM,
10092                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10093                                    "cannot create matcher");
10094                 return NULL;
10095         }
10096         return &cache->entry;
10097 }
10098
10099 /**
10100  * Register the flow matcher.
10101  *
10102  * @param[in, out] dev
10103  *   Pointer to rte_eth_dev structure.
10104  * @param[in, out] matcher
10105  *   Pointer to flow matcher.
10106  * @param[in, out] key
10107  *   Pointer to flow table key.
10108  * @parm[in, out] dev_flow
10109  *   Pointer to the dev_flow.
10110  * @param[out] error
10111  *   pointer to error structure.
10112  *
10113  * @return
10114  *   0 on success otherwise -errno and errno is set.
10115  */
10116 static int
10117 flow_dv_matcher_register(struct rte_eth_dev *dev,
10118                          struct mlx5_flow_dv_matcher *ref,
10119                          union mlx5_flow_tbl_key *key,
10120                          struct mlx5_flow *dev_flow,
10121                          const struct mlx5_flow_tunnel *tunnel,
10122                          uint32_t group_id,
10123                          struct rte_flow_error *error)
10124 {
10125         struct mlx5_cache_entry *entry;
10126         struct mlx5_flow_dv_matcher *cache;
10127         struct mlx5_flow_tbl_resource *tbl;
10128         struct mlx5_flow_tbl_data_entry *tbl_data;
10129         struct mlx5_flow_cb_ctx ctx = {
10130                 .error = error,
10131                 .data = ref,
10132         };
10133
10134         /**
10135          * tunnel offload API requires this registration for cases when
10136          * tunnel match rule was inserted before tunnel set rule.
10137          */
10138         tbl = flow_dv_tbl_resource_get(dev, key->level,
10139                                        key->is_egress, key->is_fdb,
10140                                        dev_flow->external, tunnel,
10141                                        group_id, 0, key->id, error);
10142         if (!tbl)
10143                 return -rte_errno;      /* No need to refill the error info */
10144         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10145         ref->tbl = tbl;
10146         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
10147         if (!entry) {
10148                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10149                 return rte_flow_error_set(error, ENOMEM,
10150                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10151                                           "cannot allocate ref memory");
10152         }
10153         cache = container_of(entry, typeof(*cache), entry);
10154         dev_flow->handle->dvh.matcher = cache;
10155         return 0;
10156 }
10157
10158 struct mlx5_hlist_entry *
10159 flow_dv_tag_create_cb(struct mlx5_hlist *list, uint64_t key, void *ctx)
10160 {
10161         struct mlx5_dev_ctx_shared *sh = list->ctx;
10162         struct rte_flow_error *error = ctx;
10163         struct mlx5_flow_dv_tag_resource *entry;
10164         uint32_t idx = 0;
10165         int ret;
10166
10167         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10168         if (!entry) {
10169                 rte_flow_error_set(error, ENOMEM,
10170                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10171                                    "cannot allocate resource memory");
10172                 return NULL;
10173         }
10174         entry->idx = idx;
10175         entry->tag_id = key;
10176         ret = mlx5_flow_os_create_flow_action_tag(key,
10177                                                   &entry->action);
10178         if (ret) {
10179                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10180                 rte_flow_error_set(error, ENOMEM,
10181                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10182                                    NULL, "cannot create action");
10183                 return NULL;
10184         }
10185         return &entry->entry;
10186 }
10187
10188 int
10189 flow_dv_tag_match_cb(struct mlx5_hlist *list __rte_unused,
10190                      struct mlx5_hlist_entry *entry, uint64_t key,
10191                      void *cb_ctx __rte_unused)
10192 {
10193         struct mlx5_flow_dv_tag_resource *tag =
10194                 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10195
10196         return key != tag->tag_id;
10197 }
10198
10199 /**
10200  * Find existing tag resource or create and register a new one.
10201  *
10202  * @param dev[in, out]
10203  *   Pointer to rte_eth_dev structure.
10204  * @param[in, out] tag_be24
10205  *   Tag value in big endian then R-shift 8.
10206  * @parm[in, out] dev_flow
10207  *   Pointer to the dev_flow.
10208  * @param[out] error
10209  *   pointer to error structure.
10210  *
10211  * @return
10212  *   0 on success otherwise -errno and errno is set.
10213  */
10214 static int
10215 flow_dv_tag_resource_register
10216                         (struct rte_eth_dev *dev,
10217                          uint32_t tag_be24,
10218                          struct mlx5_flow *dev_flow,
10219                          struct rte_flow_error *error)
10220 {
10221         struct mlx5_priv *priv = dev->data->dev_private;
10222         struct mlx5_flow_dv_tag_resource *cache_resource;
10223         struct mlx5_hlist_entry *entry;
10224
10225         entry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, error);
10226         if (entry) {
10227                 cache_resource = container_of
10228                         (entry, struct mlx5_flow_dv_tag_resource, entry);
10229                 dev_flow->handle->dvh.rix_tag = cache_resource->idx;
10230                 dev_flow->dv.tag_resource = cache_resource;
10231                 return 0;
10232         }
10233         return -rte_errno;
10234 }
10235
10236 void
10237 flow_dv_tag_remove_cb(struct mlx5_hlist *list,
10238                       struct mlx5_hlist_entry *entry)
10239 {
10240         struct mlx5_dev_ctx_shared *sh = list->ctx;
10241         struct mlx5_flow_dv_tag_resource *tag =
10242                 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10243
10244         MLX5_ASSERT(tag && sh && tag->action);
10245         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10246         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10247         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10248 }
10249
10250 /**
10251  * Release the tag.
10252  *
10253  * @param dev
10254  *   Pointer to Ethernet device.
10255  * @param tag_idx
10256  *   Tag index.
10257  *
10258  * @return
10259  *   1 while a reference on it exists, 0 when freed.
10260  */
10261 static int
10262 flow_dv_tag_release(struct rte_eth_dev *dev,
10263                     uint32_t tag_idx)
10264 {
10265         struct mlx5_priv *priv = dev->data->dev_private;
10266         struct mlx5_flow_dv_tag_resource *tag;
10267
10268         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10269         if (!tag)
10270                 return 0;
10271         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10272                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10273         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10274 }
10275
10276 /**
10277  * Translate port ID action to vport.
10278  *
10279  * @param[in] dev
10280  *   Pointer to rte_eth_dev structure.
10281  * @param[in] action
10282  *   Pointer to the port ID action.
10283  * @param[out] dst_port_id
10284  *   The target port ID.
10285  * @param[out] error
10286  *   Pointer to the error structure.
10287  *
10288  * @return
10289  *   0 on success, a negative errno value otherwise and rte_errno is set.
10290  */
10291 static int
10292 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10293                                  const struct rte_flow_action *action,
10294                                  uint32_t *dst_port_id,
10295                                  struct rte_flow_error *error)
10296 {
10297         uint32_t port;
10298         struct mlx5_priv *priv;
10299         const struct rte_flow_action_port_id *conf =
10300                         (const struct rte_flow_action_port_id *)action->conf;
10301
10302         port = conf->original ? dev->data->port_id : conf->id;
10303         priv = mlx5_port_to_eswitch_info(port, false);
10304         if (!priv)
10305                 return rte_flow_error_set(error, -rte_errno,
10306                                           RTE_FLOW_ERROR_TYPE_ACTION,
10307                                           NULL,
10308                                           "No eswitch info was found for port");
10309 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
10310         /*
10311          * This parameter is transferred to
10312          * mlx5dv_dr_action_create_dest_ib_port().
10313          */
10314         *dst_port_id = priv->dev_port;
10315 #else
10316         /*
10317          * Legacy mode, no LAG configurations is supported.
10318          * This parameter is transferred to
10319          * mlx5dv_dr_action_create_dest_vport().
10320          */
10321         *dst_port_id = priv->vport_id;
10322 #endif
10323         return 0;
10324 }
10325
10326 /**
10327  * Create a counter with aging configuration.
10328  *
10329  * @param[in] dev
10330  *   Pointer to rte_eth_dev structure.
10331  * @param[in] dev_flow
10332  *   Pointer to the mlx5_flow.
10333  * @param[out] count
10334  *   Pointer to the counter action configuration.
10335  * @param[in] age
10336  *   Pointer to the aging action configuration.
10337  *
10338  * @return
10339  *   Index to flow counter on success, 0 otherwise.
10340  */
10341 static uint32_t
10342 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10343                                 struct mlx5_flow *dev_flow,
10344                                 const struct rte_flow_action_count *count,
10345                                 const struct rte_flow_action_age *age)
10346 {
10347         uint32_t counter;
10348         struct mlx5_age_param *age_param;
10349
10350         if (count && count->shared)
10351                 counter = flow_dv_counter_get_shared(dev, count->id);
10352         else
10353                 counter = flow_dv_counter_alloc(dev, !!age);
10354         if (!counter || age == NULL)
10355                 return counter;
10356         age_param = flow_dv_counter_idx_get_age(dev, counter);
10357         age_param->context = age->context ? age->context :
10358                 (void *)(uintptr_t)(dev_flow->flow_idx);
10359         age_param->timeout = age->timeout;
10360         age_param->port_id = dev->data->port_id;
10361         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10362         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10363         return counter;
10364 }
10365
10366 /**
10367  * Add Tx queue matcher
10368  *
10369  * @param[in] dev
10370  *   Pointer to the dev struct.
10371  * @param[in, out] matcher
10372  *   Flow matcher.
10373  * @param[in, out] key
10374  *   Flow matcher value.
10375  * @param[in] item
10376  *   Flow pattern to translate.
10377  * @param[in] inner
10378  *   Item is inner pattern.
10379  */
10380 static void
10381 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10382                                 void *matcher, void *key,
10383                                 const struct rte_flow_item *item)
10384 {
10385         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10386         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10387         void *misc_m =
10388                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10389         void *misc_v =
10390                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10391         struct mlx5_txq_ctrl *txq;
10392         uint32_t queue;
10393
10394
10395         queue_m = (const void *)item->mask;
10396         if (!queue_m)
10397                 return;
10398         queue_v = (const void *)item->spec;
10399         if (!queue_v)
10400                 return;
10401         txq = mlx5_txq_get(dev, queue_v->queue);
10402         if (!txq)
10403                 return;
10404         queue = txq->obj->sq->id;
10405         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10406         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10407                  queue & queue_m->queue);
10408         mlx5_txq_release(dev, queue_v->queue);
10409 }
10410
10411 /**
10412  * Set the hash fields according to the @p flow information.
10413  *
10414  * @param[in] dev_flow
10415  *   Pointer to the mlx5_flow.
10416  * @param[in] rss_desc
10417  *   Pointer to the mlx5_flow_rss_desc.
10418  */
10419 static void
10420 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10421                        struct mlx5_flow_rss_desc *rss_desc)
10422 {
10423         uint64_t items = dev_flow->handle->layers;
10424         int rss_inner = 0;
10425         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10426
10427         dev_flow->hash_fields = 0;
10428 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10429         if (rss_desc->level >= 2) {
10430                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10431                 rss_inner = 1;
10432         }
10433 #endif
10434         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10435             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10436                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10437                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10438                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10439                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10440                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10441                         else
10442                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10443                 }
10444         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10445                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10446                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10447                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10448                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10449                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10450                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10451                         else
10452                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10453                 }
10454         }
10455         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10456             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10457                 if (rss_types & ETH_RSS_UDP) {
10458                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10459                                 dev_flow->hash_fields |=
10460                                                 IBV_RX_HASH_SRC_PORT_UDP;
10461                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10462                                 dev_flow->hash_fields |=
10463                                                 IBV_RX_HASH_DST_PORT_UDP;
10464                         else
10465                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10466                 }
10467         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10468                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10469                 if (rss_types & ETH_RSS_TCP) {
10470                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10471                                 dev_flow->hash_fields |=
10472                                                 IBV_RX_HASH_SRC_PORT_TCP;
10473                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10474                                 dev_flow->hash_fields |=
10475                                                 IBV_RX_HASH_DST_PORT_TCP;
10476                         else
10477                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10478                 }
10479         }
10480 }
10481
10482 /**
10483  * Prepare an Rx Hash queue.
10484  *
10485  * @param dev
10486  *   Pointer to Ethernet device.
10487  * @param[in] dev_flow
10488  *   Pointer to the mlx5_flow.
10489  * @param[in] rss_desc
10490  *   Pointer to the mlx5_flow_rss_desc.
10491  * @param[out] hrxq_idx
10492  *   Hash Rx queue index.
10493  *
10494  * @return
10495  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10496  */
10497 static struct mlx5_hrxq *
10498 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10499                      struct mlx5_flow *dev_flow,
10500                      struct mlx5_flow_rss_desc *rss_desc,
10501                      uint32_t *hrxq_idx)
10502 {
10503         struct mlx5_priv *priv = dev->data->dev_private;
10504         struct mlx5_flow_handle *dh = dev_flow->handle;
10505         struct mlx5_hrxq *hrxq;
10506
10507         MLX5_ASSERT(rss_desc->queue_num);
10508         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10509         rss_desc->hash_fields = dev_flow->hash_fields;
10510         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10511         rss_desc->shared_rss = 0;
10512         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10513         if (!*hrxq_idx)
10514                 return NULL;
10515         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10516                               *hrxq_idx);
10517         return hrxq;
10518 }
10519
10520 /**
10521  * Release sample sub action resource.
10522  *
10523  * @param[in, out] dev
10524  *   Pointer to rte_eth_dev structure.
10525  * @param[in] act_res
10526  *   Pointer to sample sub action resource.
10527  */
10528 static void
10529 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10530                                    struct mlx5_flow_sub_actions_idx *act_res)
10531 {
10532         if (act_res->rix_hrxq) {
10533                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10534                 act_res->rix_hrxq = 0;
10535         }
10536         if (act_res->rix_encap_decap) {
10537                 flow_dv_encap_decap_resource_release(dev,
10538                                                      act_res->rix_encap_decap);
10539                 act_res->rix_encap_decap = 0;
10540         }
10541         if (act_res->rix_port_id_action) {
10542                 flow_dv_port_id_action_resource_release(dev,
10543                                                 act_res->rix_port_id_action);
10544                 act_res->rix_port_id_action = 0;
10545         }
10546         if (act_res->rix_tag) {
10547                 flow_dv_tag_release(dev, act_res->rix_tag);
10548                 act_res->rix_tag = 0;
10549         }
10550         if (act_res->rix_jump) {
10551                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
10552                 act_res->rix_jump = 0;
10553         }
10554 }
10555
10556 int
10557 flow_dv_sample_match_cb(struct mlx5_cache_list *list __rte_unused,
10558                         struct mlx5_cache_entry *entry, void *cb_ctx)
10559 {
10560         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10561         struct rte_eth_dev *dev = ctx->dev;
10562         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
10563         struct mlx5_flow_dv_sample_resource *cache_resource =
10564                         container_of(entry, typeof(*cache_resource), entry);
10565
10566         if (resource->ratio == cache_resource->ratio &&
10567             resource->ft_type == cache_resource->ft_type &&
10568             resource->ft_id == cache_resource->ft_id &&
10569             resource->set_action == cache_resource->set_action &&
10570             !memcmp((void *)&resource->sample_act,
10571                     (void *)&cache_resource->sample_act,
10572                     sizeof(struct mlx5_flow_sub_actions_list))) {
10573                 /*
10574                  * Existing sample action should release the prepared
10575                  * sub-actions reference counter.
10576                  */
10577                 flow_dv_sample_sub_actions_release(dev,
10578                                                 &resource->sample_idx);
10579                 return 0;
10580         }
10581         return 1;
10582 }
10583
10584 struct mlx5_cache_entry *
10585 flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,
10586                          struct mlx5_cache_entry *entry __rte_unused,
10587                          void *cb_ctx)
10588 {
10589         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10590         struct rte_eth_dev *dev = ctx->dev;
10591         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
10592         void **sample_dv_actions = resource->sub_actions;
10593         struct mlx5_flow_dv_sample_resource *cache_resource;
10594         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
10595         struct mlx5_priv *priv = dev->data->dev_private;
10596         struct mlx5_dev_ctx_shared *sh = priv->sh;
10597         struct mlx5_flow_tbl_resource *tbl;
10598         uint32_t idx = 0;
10599         const uint32_t next_ft_step = 1;
10600         uint32_t next_ft_id = resource->ft_id + next_ft_step;
10601         uint8_t is_egress = 0;
10602         uint8_t is_transfer = 0;
10603         struct rte_flow_error *error = ctx->error;
10604
10605         /* Register new sample resource. */
10606         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
10607         if (!cache_resource) {
10608                 rte_flow_error_set(error, ENOMEM,
10609                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10610                                           NULL,
10611                                           "cannot allocate resource memory");
10612                 return NULL;
10613         }
10614         *cache_resource = *resource;
10615         /* Create normal path table level */
10616         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
10617                 is_transfer = 1;
10618         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
10619                 is_egress = 1;
10620         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
10621                                         is_egress, is_transfer,
10622                                         true, NULL, 0, 0, 0, error);
10623         if (!tbl) {
10624                 rte_flow_error_set(error, ENOMEM,
10625                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10626                                           NULL,
10627                                           "fail to create normal path table "
10628                                           "for sample");
10629                 goto error;
10630         }
10631         cache_resource->normal_path_tbl = tbl;
10632         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
10633                 if (!sh->default_miss_action) {
10634                         rte_flow_error_set(error, ENOMEM,
10635                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10636                                                 NULL,
10637                                                 "default miss action was not "
10638                                                 "created");
10639                         goto error;
10640                 }
10641                 sample_dv_actions[resource->sample_act.actions_num++] =
10642                                                 sh->default_miss_action;
10643         }
10644         /* Create a DR sample action */
10645         sampler_attr.sample_ratio = cache_resource->ratio;
10646         sampler_attr.default_next_table = tbl->obj;
10647         sampler_attr.num_sample_actions = resource->sample_act.actions_num;
10648         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
10649                                                         &sample_dv_actions[0];
10650         sampler_attr.action = cache_resource->set_action;
10651         if (mlx5_os_flow_dr_create_flow_action_sampler
10652                         (&sampler_attr, &cache_resource->verbs_action)) {
10653                 rte_flow_error_set(error, ENOMEM,
10654                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10655                                         NULL, "cannot create sample action");
10656                 goto error;
10657         }
10658         cache_resource->idx = idx;
10659         cache_resource->dev = dev;
10660         return &cache_resource->entry;
10661 error:
10662         if (cache_resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
10663                 flow_dv_sample_sub_actions_release(dev,
10664                                                    &cache_resource->sample_idx);
10665         if (cache_resource->normal_path_tbl)
10666                 flow_dv_tbl_resource_release(MLX5_SH(dev),
10667                                 cache_resource->normal_path_tbl);
10668         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
10669         return NULL;
10670
10671 }
10672
10673 /**
10674  * Find existing sample resource or create and register a new one.
10675  *
10676  * @param[in, out] dev
10677  *   Pointer to rte_eth_dev structure.
10678  * @param[in] resource
10679  *   Pointer to sample resource.
10680  * @parm[in, out] dev_flow
10681  *   Pointer to the dev_flow.
10682  * @param[out] error
10683  *   pointer to error structure.
10684  *
10685  * @return
10686  *   0 on success otherwise -errno and errno is set.
10687  */
10688 static int
10689 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
10690                          struct mlx5_flow_dv_sample_resource *resource,
10691                          struct mlx5_flow *dev_flow,
10692                          struct rte_flow_error *error)
10693 {
10694         struct mlx5_flow_dv_sample_resource *cache_resource;
10695         struct mlx5_cache_entry *entry;
10696         struct mlx5_priv *priv = dev->data->dev_private;
10697         struct mlx5_flow_cb_ctx ctx = {
10698                 .dev = dev,
10699                 .error = error,
10700                 .data = resource,
10701         };
10702
10703         entry = mlx5_cache_register(&priv->sh->sample_action_list, &ctx);
10704         if (!entry)
10705                 return -rte_errno;
10706         cache_resource = container_of(entry, typeof(*cache_resource), entry);
10707         dev_flow->handle->dvh.rix_sample = cache_resource->idx;
10708         dev_flow->dv.sample_res = cache_resource;
10709         return 0;
10710 }
10711
10712 int
10713 flow_dv_dest_array_match_cb(struct mlx5_cache_list *list __rte_unused,
10714                             struct mlx5_cache_entry *entry, void *cb_ctx)
10715 {
10716         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10717         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
10718         struct rte_eth_dev *dev = ctx->dev;
10719         struct mlx5_flow_dv_dest_array_resource *cache_resource =
10720                         container_of(entry, typeof(*cache_resource), entry);
10721         uint32_t idx = 0;
10722
10723         if (resource->num_of_dest == cache_resource->num_of_dest &&
10724             resource->ft_type == cache_resource->ft_type &&
10725             !memcmp((void *)cache_resource->sample_act,
10726                     (void *)resource->sample_act,
10727                    (resource->num_of_dest *
10728                    sizeof(struct mlx5_flow_sub_actions_list)))) {
10729                 /*
10730                  * Existing sample action should release the prepared
10731                  * sub-actions reference counter.
10732                  */
10733                 for (idx = 0; idx < resource->num_of_dest; idx++)
10734                         flow_dv_sample_sub_actions_release(dev,
10735                                         &resource->sample_idx[idx]);
10736                 return 0;
10737         }
10738         return 1;
10739 }
10740
10741 struct mlx5_cache_entry *
10742 flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,
10743                          struct mlx5_cache_entry *entry __rte_unused,
10744                          void *cb_ctx)
10745 {
10746         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10747         struct rte_eth_dev *dev = ctx->dev;
10748         struct mlx5_flow_dv_dest_array_resource *cache_resource;
10749         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
10750         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
10751         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
10752         struct mlx5_priv *priv = dev->data->dev_private;
10753         struct mlx5_dev_ctx_shared *sh = priv->sh;
10754         struct mlx5_flow_sub_actions_list *sample_act;
10755         struct mlx5dv_dr_domain *domain;
10756         uint32_t idx = 0, res_idx = 0;
10757         struct rte_flow_error *error = ctx->error;
10758         uint64_t action_flags;
10759         int ret;
10760
10761         /* Register new destination array resource. */
10762         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
10763                                             &res_idx);
10764         if (!cache_resource) {
10765                 rte_flow_error_set(error, ENOMEM,
10766                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10767                                           NULL,
10768                                           "cannot allocate resource memory");
10769                 return NULL;
10770         }
10771         *cache_resource = *resource;
10772         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
10773                 domain = sh->fdb_domain;
10774         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
10775                 domain = sh->rx_domain;
10776         else
10777                 domain = sh->tx_domain;
10778         for (idx = 0; idx < resource->num_of_dest; idx++) {
10779                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
10780                                  mlx5_malloc(MLX5_MEM_ZERO,
10781                                  sizeof(struct mlx5dv_dr_action_dest_attr),
10782                                  0, SOCKET_ID_ANY);
10783                 if (!dest_attr[idx]) {
10784                         rte_flow_error_set(error, ENOMEM,
10785                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10786                                            NULL,
10787                                            "cannot allocate resource memory");
10788                         goto error;
10789                 }
10790                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
10791                 sample_act = &resource->sample_act[idx];
10792                 action_flags = sample_act->action_flags;
10793                 switch (action_flags) {
10794                 case MLX5_FLOW_ACTION_QUEUE:
10795                         dest_attr[idx]->dest = sample_act->dr_queue_action;
10796                         break;
10797                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
10798                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
10799                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
10800                         dest_attr[idx]->dest_reformat->reformat =
10801                                         sample_act->dr_encap_action;
10802                         dest_attr[idx]->dest_reformat->dest =
10803                                         sample_act->dr_port_id_action;
10804                         break;
10805                 case MLX5_FLOW_ACTION_PORT_ID:
10806                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
10807                         break;
10808                 case MLX5_FLOW_ACTION_JUMP:
10809                         dest_attr[idx]->dest = sample_act->dr_jump_action;
10810                         break;
10811                 default:
10812                         rte_flow_error_set(error, EINVAL,
10813                                            RTE_FLOW_ERROR_TYPE_ACTION,
10814                                            NULL,
10815                                            "unsupported actions type");
10816                         goto error;
10817                 }
10818         }
10819         /* create a dest array actioin */
10820         ret = mlx5_os_flow_dr_create_flow_action_dest_array
10821                                                 (domain,
10822                                                  cache_resource->num_of_dest,
10823                                                  dest_attr,
10824                                                  &cache_resource->action);
10825         if (ret) {
10826                 rte_flow_error_set(error, ENOMEM,
10827                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10828                                    NULL,
10829                                    "cannot create destination array action");
10830                 goto error;
10831         }
10832         cache_resource->idx = res_idx;
10833         cache_resource->dev = dev;
10834         for (idx = 0; idx < resource->num_of_dest; idx++)
10835                 mlx5_free(dest_attr[idx]);
10836         return &cache_resource->entry;
10837 error:
10838         for (idx = 0; idx < resource->num_of_dest; idx++) {
10839                 flow_dv_sample_sub_actions_release(dev,
10840                                 &cache_resource->sample_idx[idx]);
10841                 if (dest_attr[idx])
10842                         mlx5_free(dest_attr[idx]);
10843         }
10844
10845         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
10846         return NULL;
10847 }
10848
10849 /**
10850  * Find existing destination array resource or create and register a new one.
10851  *
10852  * @param[in, out] dev
10853  *   Pointer to rte_eth_dev structure.
10854  * @param[in] resource
10855  *   Pointer to destination array resource.
10856  * @parm[in, out] dev_flow
10857  *   Pointer to the dev_flow.
10858  * @param[out] error
10859  *   pointer to error structure.
10860  *
10861  * @return
10862  *   0 on success otherwise -errno and errno is set.
10863  */
10864 static int
10865 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
10866                          struct mlx5_flow_dv_dest_array_resource *resource,
10867                          struct mlx5_flow *dev_flow,
10868                          struct rte_flow_error *error)
10869 {
10870         struct mlx5_flow_dv_dest_array_resource *cache_resource;
10871         struct mlx5_priv *priv = dev->data->dev_private;
10872         struct mlx5_cache_entry *entry;
10873         struct mlx5_flow_cb_ctx ctx = {
10874                 .dev = dev,
10875                 .error = error,
10876                 .data = resource,
10877         };
10878
10879         entry = mlx5_cache_register(&priv->sh->dest_array_list, &ctx);
10880         if (!entry)
10881                 return -rte_errno;
10882         cache_resource = container_of(entry, typeof(*cache_resource), entry);
10883         dev_flow->handle->dvh.rix_dest_array = cache_resource->idx;
10884         dev_flow->dv.dest_array_res = cache_resource;
10885         return 0;
10886 }
10887
10888 /**
10889  * Convert Sample action to DV specification.
10890  *
10891  * @param[in] dev
10892  *   Pointer to rte_eth_dev structure.
10893  * @param[in] action
10894  *   Pointer to sample action structure.
10895  * @param[in, out] dev_flow
10896  *   Pointer to the mlx5_flow.
10897  * @param[in] attr
10898  *   Pointer to the flow attributes.
10899  * @param[in, out] num_of_dest
10900  *   Pointer to the num of destination.
10901  * @param[in, out] sample_actions
10902  *   Pointer to sample actions list.
10903  * @param[in, out] res
10904  *   Pointer to sample resource.
10905  * @param[out] error
10906  *   Pointer to the error structure.
10907  *
10908  * @return
10909  *   0 on success, a negative errno value otherwise and rte_errno is set.
10910  */
10911 static int
10912 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
10913                                 const struct rte_flow_action_sample *action,
10914                                 struct mlx5_flow *dev_flow,
10915                                 const struct rte_flow_attr *attr,
10916                                 uint32_t *num_of_dest,
10917                                 void **sample_actions,
10918                                 struct mlx5_flow_dv_sample_resource *res,
10919                                 struct rte_flow_error *error)
10920 {
10921         struct mlx5_priv *priv = dev->data->dev_private;
10922         const struct rte_flow_action *sub_actions;
10923         struct mlx5_flow_sub_actions_list *sample_act;
10924         struct mlx5_flow_sub_actions_idx *sample_idx;
10925         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
10926         struct rte_flow *flow = dev_flow->flow;
10927         struct mlx5_flow_rss_desc *rss_desc;
10928         uint64_t action_flags = 0;
10929
10930         MLX5_ASSERT(wks);
10931         rss_desc = &wks->rss_desc;
10932         sample_act = &res->sample_act;
10933         sample_idx = &res->sample_idx;
10934         res->ratio = action->ratio;
10935         sub_actions = action->actions;
10936         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
10937                 int type = sub_actions->type;
10938                 uint32_t pre_rix = 0;
10939                 void *pre_r;
10940                 switch (type) {
10941                 case RTE_FLOW_ACTION_TYPE_QUEUE:
10942                 {
10943                         const struct rte_flow_action_queue *queue;
10944                         struct mlx5_hrxq *hrxq;
10945                         uint32_t hrxq_idx;
10946
10947                         queue = sub_actions->conf;
10948                         rss_desc->queue_num = 1;
10949                         rss_desc->queue[0] = queue->index;
10950                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
10951                                                     rss_desc, &hrxq_idx);
10952                         if (!hrxq)
10953                                 return rte_flow_error_set
10954                                         (error, rte_errno,
10955                                          RTE_FLOW_ERROR_TYPE_ACTION,
10956                                          NULL,
10957                                          "cannot create fate queue");
10958                         sample_act->dr_queue_action = hrxq->action;
10959                         sample_idx->rix_hrxq = hrxq_idx;
10960                         sample_actions[sample_act->actions_num++] =
10961                                                 hrxq->action;
10962                         (*num_of_dest)++;
10963                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
10964                         if (action_flags & MLX5_FLOW_ACTION_MARK)
10965                                 dev_flow->handle->rix_hrxq = hrxq_idx;
10966                         dev_flow->handle->fate_action =
10967                                         MLX5_FLOW_FATE_QUEUE;
10968                         break;
10969                 }
10970                 case RTE_FLOW_ACTION_TYPE_RSS:
10971                 {
10972                         struct mlx5_hrxq *hrxq;
10973                         uint32_t hrxq_idx;
10974                         const struct rte_flow_action_rss *rss;
10975                         const uint8_t *rss_key;
10976
10977                         rss = sub_actions->conf;
10978                         memcpy(rss_desc->queue, rss->queue,
10979                                rss->queue_num * sizeof(uint16_t));
10980                         rss_desc->queue_num = rss->queue_num;
10981                         /* NULL RSS key indicates default RSS key. */
10982                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
10983                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
10984                         /*
10985                          * rss->level and rss.types should be set in advance
10986                          * when expanding items for RSS.
10987                          */
10988                         flow_dv_hashfields_set(dev_flow, rss_desc);
10989                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
10990                                                     rss_desc, &hrxq_idx);
10991                         if (!hrxq)
10992                                 return rte_flow_error_set
10993                                         (error, rte_errno,
10994                                          RTE_FLOW_ERROR_TYPE_ACTION,
10995                                          NULL,
10996                                          "cannot create fate queue");
10997                         sample_act->dr_queue_action = hrxq->action;
10998                         sample_idx->rix_hrxq = hrxq_idx;
10999                         sample_actions[sample_act->actions_num++] =
11000                                                 hrxq->action;
11001                         (*num_of_dest)++;
11002                         action_flags |= MLX5_FLOW_ACTION_RSS;
11003                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11004                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11005                         dev_flow->handle->fate_action =
11006                                         MLX5_FLOW_FATE_QUEUE;
11007                         break;
11008                 }
11009                 case RTE_FLOW_ACTION_TYPE_MARK:
11010                 {
11011                         uint32_t tag_be = mlx5_flow_mark_set
11012                                 (((const struct rte_flow_action_mark *)
11013                                 (sub_actions->conf))->id);
11014
11015                         dev_flow->handle->mark = 1;
11016                         pre_rix = dev_flow->handle->dvh.rix_tag;
11017                         /* Save the mark resource before sample */
11018                         pre_r = dev_flow->dv.tag_resource;
11019                         if (flow_dv_tag_resource_register(dev, tag_be,
11020                                                   dev_flow, error))
11021                                 return -rte_errno;
11022                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11023                         sample_act->dr_tag_action =
11024                                 dev_flow->dv.tag_resource->action;
11025                         sample_idx->rix_tag =
11026                                 dev_flow->handle->dvh.rix_tag;
11027                         sample_actions[sample_act->actions_num++] =
11028                                                 sample_act->dr_tag_action;
11029                         /* Recover the mark resource after sample */
11030                         dev_flow->dv.tag_resource = pre_r;
11031                         dev_flow->handle->dvh.rix_tag = pre_rix;
11032                         action_flags |= MLX5_FLOW_ACTION_MARK;
11033                         break;
11034                 }
11035                 case RTE_FLOW_ACTION_TYPE_COUNT:
11036                 {
11037                         if (!flow->counter) {
11038                                 flow->counter =
11039                                         flow_dv_translate_create_counter(dev,
11040                                                 dev_flow, sub_actions->conf,
11041                                                 0);
11042                                 if (!flow->counter)
11043                                         return rte_flow_error_set
11044                                                 (error, rte_errno,
11045                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11046                                                 NULL,
11047                                                 "cannot create counter"
11048                                                 " object.");
11049                         }
11050                         sample_act->dr_cnt_action =
11051                                   (flow_dv_counter_get_by_idx(dev,
11052                                   flow->counter, NULL))->action;
11053                         sample_actions[sample_act->actions_num++] =
11054                                                 sample_act->dr_cnt_action;
11055                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11056                         break;
11057                 }
11058                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11059                 {
11060                         struct mlx5_flow_dv_port_id_action_resource
11061                                         port_id_resource;
11062                         uint32_t port_id = 0;
11063
11064                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11065                         /* Save the port id resource before sample */
11066                         pre_rix = dev_flow->handle->rix_port_id_action;
11067                         pre_r = dev_flow->dv.port_id_action;
11068                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11069                                                              &port_id, error))
11070                                 return -rte_errno;
11071                         port_id_resource.port_id = port_id;
11072                         if (flow_dv_port_id_action_resource_register
11073                             (dev, &port_id_resource, dev_flow, error))
11074                                 return -rte_errno;
11075                         sample_act->dr_port_id_action =
11076                                 dev_flow->dv.port_id_action->action;
11077                         sample_idx->rix_port_id_action =
11078                                 dev_flow->handle->rix_port_id_action;
11079                         sample_actions[sample_act->actions_num++] =
11080                                                 sample_act->dr_port_id_action;
11081                         /* Recover the port id resource after sample */
11082                         dev_flow->dv.port_id_action = pre_r;
11083                         dev_flow->handle->rix_port_id_action = pre_rix;
11084                         (*num_of_dest)++;
11085                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11086                         break;
11087                 }
11088                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11089                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11090                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11091                         /* Save the encap resource before sample */
11092                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11093                         pre_r = dev_flow->dv.encap_decap;
11094                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11095                                                            dev_flow,
11096                                                            attr->transfer,
11097                                                            error))
11098                                 return -rte_errno;
11099                         sample_act->dr_encap_action =
11100                                 dev_flow->dv.encap_decap->action;
11101                         sample_idx->rix_encap_decap =
11102                                 dev_flow->handle->dvh.rix_encap_decap;
11103                         sample_actions[sample_act->actions_num++] =
11104                                                 sample_act->dr_encap_action;
11105                         /* Recover the encap resource after sample */
11106                         dev_flow->dv.encap_decap = pre_r;
11107                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11108                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11109                         break;
11110                 default:
11111                         return rte_flow_error_set(error, EINVAL,
11112                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11113                                 NULL,
11114                                 "Not support for sampler action");
11115                 }
11116         }
11117         sample_act->action_flags = action_flags;
11118         res->ft_id = dev_flow->dv.group;
11119         if (attr->transfer) {
11120                 union {
11121                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11122                         uint64_t set_action;
11123                 } action_ctx = { .set_action = 0 };
11124
11125                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11126                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11127                          MLX5_MODIFICATION_TYPE_SET);
11128                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11129                          MLX5_MODI_META_REG_C_0);
11130                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11131                          priv->vport_meta_tag);
11132                 res->set_action = action_ctx.set_action;
11133         } else if (attr->ingress) {
11134                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11135         } else {
11136                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11137         }
11138         return 0;
11139 }
11140
11141 /**
11142  * Convert Sample action to DV specification.
11143  *
11144  * @param[in] dev
11145  *   Pointer to rte_eth_dev structure.
11146  * @param[in, out] dev_flow
11147  *   Pointer to the mlx5_flow.
11148  * @param[in] num_of_dest
11149  *   The num of destination.
11150  * @param[in, out] res
11151  *   Pointer to sample resource.
11152  * @param[in, out] mdest_res
11153  *   Pointer to destination array resource.
11154  * @param[in] sample_actions
11155  *   Pointer to sample path actions list.
11156  * @param[in] action_flags
11157  *   Holds the actions detected until now.
11158  * @param[out] error
11159  *   Pointer to the error structure.
11160  *
11161  * @return
11162  *   0 on success, a negative errno value otherwise and rte_errno is set.
11163  */
11164 static int
11165 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11166                              struct mlx5_flow *dev_flow,
11167                              uint32_t num_of_dest,
11168                              struct mlx5_flow_dv_sample_resource *res,
11169                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11170                              void **sample_actions,
11171                              uint64_t action_flags,
11172                              struct rte_flow_error *error)
11173 {
11174         /* update normal path action resource into last index of array */
11175         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11176         struct mlx5_flow_sub_actions_list *sample_act =
11177                                         &mdest_res->sample_act[dest_index];
11178         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11179         struct mlx5_flow_rss_desc *rss_desc;
11180         uint32_t normal_idx = 0;
11181         struct mlx5_hrxq *hrxq;
11182         uint32_t hrxq_idx;
11183
11184         MLX5_ASSERT(wks);
11185         rss_desc = &wks->rss_desc;
11186         if (num_of_dest > 1) {
11187                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11188                         /* Handle QP action for mirroring */
11189                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11190                                                     rss_desc, &hrxq_idx);
11191                         if (!hrxq)
11192                                 return rte_flow_error_set
11193                                      (error, rte_errno,
11194                                       RTE_FLOW_ERROR_TYPE_ACTION,
11195                                       NULL,
11196                                       "cannot create rx queue");
11197                         normal_idx++;
11198                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11199                         sample_act->dr_queue_action = hrxq->action;
11200                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11201                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11202                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11203                 }
11204                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11205                         normal_idx++;
11206                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11207                                 dev_flow->handle->dvh.rix_encap_decap;
11208                         sample_act->dr_encap_action =
11209                                 dev_flow->dv.encap_decap->action;
11210                         dev_flow->handle->dvh.rix_encap_decap = 0;
11211                 }
11212                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11213                         normal_idx++;
11214                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11215                                 dev_flow->handle->rix_port_id_action;
11216                         sample_act->dr_port_id_action =
11217                                 dev_flow->dv.port_id_action->action;
11218                         dev_flow->handle->rix_port_id_action = 0;
11219                 }
11220                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11221                         normal_idx++;
11222                         mdest_res->sample_idx[dest_index].rix_jump =
11223                                 dev_flow->handle->rix_jump;
11224                         sample_act->dr_jump_action =
11225                                 dev_flow->dv.jump->action;
11226                         dev_flow->handle->rix_jump = 0;
11227                 }
11228                 sample_act->actions_num = normal_idx;
11229                 /* update sample action resource into first index of array */
11230                 mdest_res->ft_type = res->ft_type;
11231                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11232                                 sizeof(struct mlx5_flow_sub_actions_idx));
11233                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11234                                 sizeof(struct mlx5_flow_sub_actions_list));
11235                 mdest_res->num_of_dest = num_of_dest;
11236                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11237                                                          dev_flow, error))
11238                         return rte_flow_error_set(error, EINVAL,
11239                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11240                                                   NULL, "can't create sample "
11241                                                   "action");
11242         } else {
11243                 res->sub_actions = sample_actions;
11244                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11245                         return rte_flow_error_set(error, EINVAL,
11246                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11247                                                   NULL,
11248                                                   "can't create sample action");
11249         }
11250         return 0;
11251 }
11252
11253 /**
11254  * Remove an ASO age action from age actions list.
11255  *
11256  * @param[in] dev
11257  *   Pointer to the Ethernet device structure.
11258  * @param[in] age
11259  *   Pointer to the aso age action handler.
11260  */
11261 static void
11262 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11263                                 struct mlx5_aso_age_action *age)
11264 {
11265         struct mlx5_age_info *age_info;
11266         struct mlx5_age_param *age_param = &age->age_params;
11267         struct mlx5_priv *priv = dev->data->dev_private;
11268         uint16_t expected = AGE_CANDIDATE;
11269
11270         age_info = GET_PORT_AGE_INFO(priv);
11271         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11272                                          AGE_FREE, false, __ATOMIC_RELAXED,
11273                                          __ATOMIC_RELAXED)) {
11274                 /**
11275                  * We need the lock even it is age timeout,
11276                  * since age action may still in process.
11277                  */
11278                 rte_spinlock_lock(&age_info->aged_sl);
11279                 LIST_REMOVE(age, next);
11280                 rte_spinlock_unlock(&age_info->aged_sl);
11281                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11282         }
11283 }
11284
11285 /**
11286  * Release an ASO age action.
11287  *
11288  * @param[in] dev
11289  *   Pointer to the Ethernet device structure.
11290  * @param[in] age_idx
11291  *   Index of ASO age action to release.
11292  * @param[in] flow
11293  *   True if the release operation is during flow destroy operation.
11294  *   False if the release operation is during action destroy operation.
11295  *
11296  * @return
11297  *   0 when age action was removed, otherwise the number of references.
11298  */
11299 static int
11300 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11301 {
11302         struct mlx5_priv *priv = dev->data->dev_private;
11303         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11304         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11305         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11306
11307         if (!ret) {
11308                 flow_dv_aso_age_remove_from_age(dev, age);
11309                 rte_spinlock_lock(&mng->free_sl);
11310                 LIST_INSERT_HEAD(&mng->free, age, next);
11311                 rte_spinlock_unlock(&mng->free_sl);
11312         }
11313         return ret;
11314 }
11315
11316 /**
11317  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11318  *
11319  * @param[in] dev
11320  *   Pointer to the Ethernet device structure.
11321  *
11322  * @return
11323  *   0 on success, otherwise negative errno value and rte_errno is set.
11324  */
11325 static int
11326 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11327 {
11328         struct mlx5_priv *priv = dev->data->dev_private;
11329         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11330         void *old_pools = mng->pools;
11331         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11332         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11333         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11334
11335         if (!pools) {
11336                 rte_errno = ENOMEM;
11337                 return -ENOMEM;
11338         }
11339         if (old_pools) {
11340                 memcpy(pools, old_pools,
11341                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11342                 mlx5_free(old_pools);
11343         } else {
11344                 /* First ASO flow hit allocation - starting ASO data-path. */
11345                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11346
11347                 if (ret) {
11348                         mlx5_free(pools);
11349                         return ret;
11350                 }
11351         }
11352         mng->n = resize;
11353         mng->pools = pools;
11354         return 0;
11355 }
11356
11357 /**
11358  * Create and initialize a new ASO aging pool.
11359  *
11360  * @param[in] dev
11361  *   Pointer to the Ethernet device structure.
11362  * @param[out] age_free
11363  *   Where to put the pointer of a new age action.
11364  *
11365  * @return
11366  *   The age actions pool pointer and @p age_free is set on success,
11367  *   NULL otherwise and rte_errno is set.
11368  */
11369 static struct mlx5_aso_age_pool *
11370 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11371                         struct mlx5_aso_age_action **age_free)
11372 {
11373         struct mlx5_priv *priv = dev->data->dev_private;
11374         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11375         struct mlx5_aso_age_pool *pool = NULL;
11376         struct mlx5_devx_obj *obj = NULL;
11377         uint32_t i;
11378
11379         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11380                                                     priv->sh->pdn);
11381         if (!obj) {
11382                 rte_errno = ENODATA;
11383                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11384                 return NULL;
11385         }
11386         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11387         if (!pool) {
11388                 claim_zero(mlx5_devx_cmd_destroy(obj));
11389                 rte_errno = ENOMEM;
11390                 return NULL;
11391         }
11392         pool->flow_hit_aso_obj = obj;
11393         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11394         rte_spinlock_lock(&mng->resize_sl);
11395         pool->index = mng->next;
11396         /* Resize pools array if there is no room for the new pool in it. */
11397         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11398                 claim_zero(mlx5_devx_cmd_destroy(obj));
11399                 mlx5_free(pool);
11400                 rte_spinlock_unlock(&mng->resize_sl);
11401                 return NULL;
11402         }
11403         mng->pools[pool->index] = pool;
11404         mng->next++;
11405         rte_spinlock_unlock(&mng->resize_sl);
11406         /* Assign the first action in the new pool, the rest go to free list. */
11407         *age_free = &pool->actions[0];
11408         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11409                 pool->actions[i].offset = i;
11410                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11411         }
11412         return pool;
11413 }
11414
11415 /**
11416  * Allocate a ASO aging bit.
11417  *
11418  * @param[in] dev
11419  *   Pointer to the Ethernet device structure.
11420  * @param[out] error
11421  *   Pointer to the error structure.
11422  *
11423  * @return
11424  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
11425  */
11426 static uint32_t
11427 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11428 {
11429         struct mlx5_priv *priv = dev->data->dev_private;
11430         const struct mlx5_aso_age_pool *pool;
11431         struct mlx5_aso_age_action *age_free = NULL;
11432         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11433
11434         MLX5_ASSERT(mng);
11435         /* Try to get the next free age action bit. */
11436         rte_spinlock_lock(&mng->free_sl);
11437         age_free = LIST_FIRST(&mng->free);
11438         if (age_free) {
11439                 LIST_REMOVE(age_free, next);
11440         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11441                 rte_spinlock_unlock(&mng->free_sl);
11442                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11443                                    NULL, "failed to create ASO age pool");
11444                 return 0; /* 0 is an error. */
11445         }
11446         rte_spinlock_unlock(&mng->free_sl);
11447         pool = container_of
11448           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11449                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11450                                                                        actions);
11451         if (!age_free->dr_action) {
11452                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11453                                                  error);
11454
11455                 if (reg_c < 0) {
11456                         rte_flow_error_set(error, rte_errno,
11457                                            RTE_FLOW_ERROR_TYPE_ACTION,
11458                                            NULL, "failed to get reg_c "
11459                                            "for ASO flow hit");
11460                         return 0; /* 0 is an error. */
11461                 }
11462 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11463                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11464                                 (priv->sh->rx_domain,
11465                                  pool->flow_hit_aso_obj->obj, age_free->offset,
11466                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11467                                  (reg_c - REG_C_0));
11468 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11469                 if (!age_free->dr_action) {
11470                         rte_errno = errno;
11471                         rte_spinlock_lock(&mng->free_sl);
11472                         LIST_INSERT_HEAD(&mng->free, age_free, next);
11473                         rte_spinlock_unlock(&mng->free_sl);
11474                         rte_flow_error_set(error, rte_errno,
11475                                            RTE_FLOW_ERROR_TYPE_ACTION,
11476                                            NULL, "failed to create ASO "
11477                                            "flow hit action");
11478                         return 0; /* 0 is an error. */
11479                 }
11480         }
11481         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
11482         return pool->index | ((age_free->offset + 1) << 16);
11483 }
11484
11485 /**
11486  * Initialize flow ASO age parameters.
11487  *
11488  * @param[in] dev
11489  *   Pointer to rte_eth_dev structure.
11490  * @param[in] age_idx
11491  *   Index of ASO age action.
11492  * @param[in] context
11493  *   Pointer to flow counter age context.
11494  * @param[in] timeout
11495  *   Aging timeout in seconds.
11496  *
11497  */
11498 static void
11499 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
11500                             uint32_t age_idx,
11501                             void *context,
11502                             uint32_t timeout)
11503 {
11504         struct mlx5_aso_age_action *aso_age;
11505
11506         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
11507         MLX5_ASSERT(aso_age);
11508         aso_age->age_params.context = context;
11509         aso_age->age_params.timeout = timeout;
11510         aso_age->age_params.port_id = dev->data->port_id;
11511         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
11512                          __ATOMIC_RELAXED);
11513         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
11514                          __ATOMIC_RELAXED);
11515 }
11516
11517 static void
11518 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
11519                                const struct rte_flow_item_integrity *value,
11520                                void *headers_m, void *headers_v)
11521 {
11522         if (mask->l4_ok) {
11523                 /* application l4_ok filter aggregates all hardware l4 filters
11524                  * therefore hw l4_checksum_ok must be implicitly added here.
11525                  */
11526                 struct rte_flow_item_integrity local_item;
11527
11528                 local_item.l4_csum_ok = 1;
11529                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11530                          local_item.l4_csum_ok);
11531                 if (value->l4_ok) {
11532                         /* application l4_ok = 1 matches sets both hw flags
11533                          * l4_ok and l4_checksum_ok flags to 1.
11534                          */
11535                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11536                                  l4_checksum_ok, local_item.l4_csum_ok);
11537                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
11538                                  mask->l4_ok);
11539                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
11540                                  value->l4_ok);
11541                 } else {
11542                         /* application l4_ok = 0 matches on hw flag
11543                          * l4_checksum_ok = 0 only.
11544                          */
11545                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11546                                  l4_checksum_ok, 0);
11547                 }
11548         } else if (mask->l4_csum_ok) {
11549                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11550                          mask->l4_csum_ok);
11551                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
11552                          value->l4_csum_ok);
11553         }
11554 }
11555
11556 static void
11557 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
11558                                const struct rte_flow_item_integrity *value,
11559                                void *headers_m, void *headers_v,
11560                                bool is_ipv4)
11561 {
11562         if (mask->l3_ok) {
11563                 /* application l3_ok filter aggregates all hardware l3 filters
11564                  * therefore hw ipv4_checksum_ok must be implicitly added here.
11565                  */
11566                 struct rte_flow_item_integrity local_item;
11567
11568                 local_item.ipv4_csum_ok = !!is_ipv4;
11569                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
11570                          local_item.ipv4_csum_ok);
11571                 if (value->l3_ok) {
11572                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11573                                  ipv4_checksum_ok, local_item.ipv4_csum_ok);
11574                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
11575                                  mask->l3_ok);
11576                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
11577                                  value->l3_ok);
11578                 } else {
11579                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11580                                  ipv4_checksum_ok, 0);
11581                 }
11582         } else if (mask->ipv4_csum_ok) {
11583                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
11584                          mask->ipv4_csum_ok);
11585                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
11586                          value->ipv4_csum_ok);
11587         }
11588 }
11589
11590 static void
11591 flow_dv_translate_item_integrity(void *matcher, void *key,
11592                                  const struct rte_flow_item *head_item,
11593                                  const struct rte_flow_item *integrity_item)
11594 {
11595         const struct rte_flow_item_integrity *mask = integrity_item->mask;
11596         const struct rte_flow_item_integrity *value = integrity_item->spec;
11597         const struct rte_flow_item *tunnel_item, *end_item, *item;
11598         void *headers_m;
11599         void *headers_v;
11600         uint32_t l3_protocol;
11601
11602         if (!value)
11603                 return;
11604         if (!mask)
11605                 mask = &rte_flow_item_integrity_mask;
11606         if (value->level > 1) {
11607                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
11608                                          inner_headers);
11609                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
11610         } else {
11611                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
11612                                          outer_headers);
11613                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
11614         }
11615         tunnel_item = mlx5_flow_find_tunnel_item(head_item);
11616         if (value->level > 1) {
11617                 /* tunnel item was verified during the item validation */
11618                 item = tunnel_item;
11619                 end_item = mlx5_find_end_item(tunnel_item);
11620         } else {
11621                 item = head_item;
11622                 end_item = tunnel_item ? tunnel_item :
11623                            mlx5_find_end_item(integrity_item);
11624         }
11625         l3_protocol = mask->l3_ok ?
11626                       mlx5_flow_locate_proto_l3(&item, end_item) : 0;
11627         flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
11628                                        l3_protocol == RTE_ETHER_TYPE_IPV4);
11629         flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
11630 }
11631
11632 /**
11633  * Prepares DV flow counter with aging configuration.
11634  * Gets it by index when exists, creates a new one when doesn't.
11635  *
11636  * @param[in] dev
11637  *   Pointer to rte_eth_dev structure.
11638  * @param[in] dev_flow
11639  *   Pointer to the mlx5_flow.
11640  * @param[in, out] flow
11641  *   Pointer to the sub flow.
11642  * @param[in] count
11643  *   Pointer to the counter action configuration.
11644  * @param[in] age
11645  *   Pointer to the aging action configuration.
11646  * @param[out] error
11647  *   Pointer to the error structure.
11648  *
11649  * @return
11650  *   Pointer to the counter, NULL otherwise.
11651  */
11652 static struct mlx5_flow_counter *
11653 flow_dv_prepare_counter(struct rte_eth_dev *dev,
11654                         struct mlx5_flow *dev_flow,
11655                         struct rte_flow *flow,
11656                         const struct rte_flow_action_count *count,
11657                         const struct rte_flow_action_age *age,
11658                         struct rte_flow_error *error)
11659 {
11660         if (!flow->counter) {
11661                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
11662                                                                  count, age);
11663                 if (!flow->counter) {
11664                         rte_flow_error_set(error, rte_errno,
11665                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11666                                            "cannot create counter object.");
11667                         return NULL;
11668                 }
11669         }
11670         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
11671 }
11672
11673 /*
11674  * Release an ASO CT action by its own device.
11675  *
11676  * @param[in] dev
11677  *   Pointer to the Ethernet device structure.
11678  * @param[in] idx
11679  *   Index of ASO CT action to release.
11680  *
11681  * @return
11682  *   0 when CT action was removed, otherwise the number of references.
11683  */
11684 static inline int
11685 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
11686 {
11687         struct mlx5_priv *priv = dev->data->dev_private;
11688         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11689         uint32_t ret;
11690         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
11691         enum mlx5_aso_ct_state state =
11692                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
11693
11694         /* Cannot release when CT is in the ASO SQ. */
11695         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
11696                 return -1;
11697         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
11698         if (!ret) {
11699                 if (ct->dr_action_orig) {
11700 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11701                         claim_zero(mlx5_glue->destroy_flow_action
11702                                         (ct->dr_action_orig));
11703 #endif
11704                         ct->dr_action_orig = NULL;
11705                 }
11706                 if (ct->dr_action_rply) {
11707 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11708                         claim_zero(mlx5_glue->destroy_flow_action
11709                                         (ct->dr_action_rply));
11710 #endif
11711                         ct->dr_action_rply = NULL;
11712                 }
11713                 /* Clear the state to free, no need in 1st allocation. */
11714                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
11715                 rte_spinlock_lock(&mng->ct_sl);
11716                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
11717                 rte_spinlock_unlock(&mng->ct_sl);
11718         }
11719         return (int)ret;
11720 }
11721
11722 static inline int
11723 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx)
11724 {
11725         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
11726         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
11727         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
11728         RTE_SET_USED(dev);
11729
11730         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
11731         if (dev->data->dev_started != 1)
11732                 return -1;
11733         return flow_dv_aso_ct_dev_release(owndev, idx);
11734 }
11735
11736 /*
11737  * Resize the ASO CT pools array by 64 pools.
11738  *
11739  * @param[in] dev
11740  *   Pointer to the Ethernet device structure.
11741  *
11742  * @return
11743  *   0 on success, otherwise negative errno value and rte_errno is set.
11744  */
11745 static int
11746 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
11747 {
11748         struct mlx5_priv *priv = dev->data->dev_private;
11749         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11750         void *old_pools = mng->pools;
11751         /* Magic number now, need a macro. */
11752         uint32_t resize = mng->n + 64;
11753         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
11754         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11755
11756         if (!pools) {
11757                 rte_errno = ENOMEM;
11758                 return -rte_errno;
11759         }
11760         rte_rwlock_write_lock(&mng->resize_rwl);
11761         /* ASO SQ/QP was already initialized in the startup. */
11762         if (old_pools) {
11763                 /* Realloc could be an alternative choice. */
11764                 rte_memcpy(pools, old_pools,
11765                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
11766                 mlx5_free(old_pools);
11767         }
11768         mng->n = resize;
11769         mng->pools = pools;
11770         rte_rwlock_write_unlock(&mng->resize_rwl);
11771         return 0;
11772 }
11773
11774 /*
11775  * Create and initialize a new ASO CT pool.
11776  *
11777  * @param[in] dev
11778  *   Pointer to the Ethernet device structure.
11779  * @param[out] ct_free
11780  *   Where to put the pointer of a new CT action.
11781  *
11782  * @return
11783  *   The CT actions pool pointer and @p ct_free is set on success,
11784  *   NULL otherwise and rte_errno is set.
11785  */
11786 static struct mlx5_aso_ct_pool *
11787 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
11788                        struct mlx5_aso_ct_action **ct_free)
11789 {
11790         struct mlx5_priv *priv = dev->data->dev_private;
11791         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11792         struct mlx5_aso_ct_pool *pool = NULL;
11793         struct mlx5_devx_obj *obj = NULL;
11794         uint32_t i;
11795         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
11796
11797         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
11798                                                 priv->sh->pdn, log_obj_size);
11799         if (!obj) {
11800                 rte_errno = ENODATA;
11801                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
11802                 return NULL;
11803         }
11804         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11805         if (!pool) {
11806                 rte_errno = ENOMEM;
11807                 claim_zero(mlx5_devx_cmd_destroy(obj));
11808                 return NULL;
11809         }
11810         pool->devx_obj = obj;
11811         pool->index = mng->next;
11812         /* Resize pools array if there is no room for the new pool in it. */
11813         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
11814                 claim_zero(mlx5_devx_cmd_destroy(obj));
11815                 mlx5_free(pool);
11816                 return NULL;
11817         }
11818         mng->pools[pool->index] = pool;
11819         mng->next++;
11820         /* Assign the first action in the new pool, the rest go to free list. */
11821         *ct_free = &pool->actions[0];
11822         /* Lock outside, the list operation is safe here. */
11823         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
11824                 /* refcnt is 0 when allocating the memory. */
11825                 pool->actions[i].offset = i;
11826                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
11827         }
11828         return pool;
11829 }
11830
11831 /*
11832  * Allocate a ASO CT action from free list.
11833  *
11834  * @param[in] dev
11835  *   Pointer to the Ethernet device structure.
11836  * @param[out] error
11837  *   Pointer to the error structure.
11838  *
11839  * @return
11840  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
11841  */
11842 static uint32_t
11843 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11844 {
11845         struct mlx5_priv *priv = dev->data->dev_private;
11846         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11847         struct mlx5_aso_ct_action *ct = NULL;
11848         struct mlx5_aso_ct_pool *pool;
11849         uint8_t reg_c;
11850         uint32_t ct_idx;
11851
11852         MLX5_ASSERT(mng);
11853         if (!priv->config.devx) {
11854                 rte_errno = ENOTSUP;
11855                 return 0;
11856         }
11857         /* Get a free CT action, if no, a new pool will be created. */
11858         rte_spinlock_lock(&mng->ct_sl);
11859         ct = LIST_FIRST(&mng->free_cts);
11860         if (ct) {
11861                 LIST_REMOVE(ct, next);
11862         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
11863                 rte_spinlock_unlock(&mng->ct_sl);
11864                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11865                                    NULL, "failed to create ASO CT pool");
11866                 return 0;
11867         }
11868         rte_spinlock_unlock(&mng->ct_sl);
11869         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
11870         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
11871         /* 0: inactive, 1: created, 2+: used by flows. */
11872         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
11873         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
11874         if (!ct->dr_action_orig) {
11875 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11876                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
11877                         (priv->sh->rx_domain, pool->devx_obj->obj,
11878                          ct->offset,
11879                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
11880                          reg_c - REG_C_0);
11881 #else
11882                 RTE_SET_USED(reg_c);
11883 #endif
11884                 if (!ct->dr_action_orig) {
11885                         flow_dv_aso_ct_dev_release(dev, ct_idx);
11886                         rte_flow_error_set(error, rte_errno,
11887                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11888                                            "failed to create ASO CT action");
11889                         return 0;
11890                 }
11891         }
11892         if (!ct->dr_action_rply) {
11893 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11894                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
11895                         (priv->sh->rx_domain, pool->devx_obj->obj,
11896                          ct->offset,
11897                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
11898                          reg_c - REG_C_0);
11899 #endif
11900                 if (!ct->dr_action_rply) {
11901                         flow_dv_aso_ct_dev_release(dev, ct_idx);
11902                         rte_flow_error_set(error, rte_errno,
11903                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11904                                            "failed to create ASO CT action");
11905                         return 0;
11906                 }
11907         }
11908         return ct_idx;
11909 }
11910
11911 /*
11912  * Create a conntrack object with context and actions by using ASO mechanism.
11913  *
11914  * @param[in] dev
11915  *   Pointer to rte_eth_dev structure.
11916  * @param[in] pro
11917  *   Pointer to conntrack information profile.
11918  * @param[out] error
11919  *   Pointer to the error structure.
11920  *
11921  * @return
11922  *   Index to conntrack object on success, 0 otherwise.
11923  */
11924 static uint32_t
11925 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
11926                                    const struct rte_flow_action_conntrack *pro,
11927                                    struct rte_flow_error *error)
11928 {
11929         struct mlx5_priv *priv = dev->data->dev_private;
11930         struct mlx5_dev_ctx_shared *sh = priv->sh;
11931         struct mlx5_aso_ct_action *ct;
11932         uint32_t idx;
11933
11934         if (!sh->ct_aso_en)
11935                 return rte_flow_error_set(error, ENOTSUP,
11936                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11937                                           "Connection is not supported");
11938         idx = flow_dv_aso_ct_alloc(dev, error);
11939         if (!idx)
11940                 return rte_flow_error_set(error, rte_errno,
11941                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11942                                           "Failed to allocate CT object");
11943         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
11944         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
11945                 return rte_flow_error_set(error, EBUSY,
11946                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11947                                           "Failed to update CT");
11948         ct->is_original = !!pro->is_original_dir;
11949         ct->peer = pro->peer_port;
11950         return idx;
11951 }
11952
11953 /**
11954  * Fill the flow with DV spec, lock free
11955  * (mutex should be acquired by caller).
11956  *
11957  * @param[in] dev
11958  *   Pointer to rte_eth_dev structure.
11959  * @param[in, out] dev_flow
11960  *   Pointer to the sub flow.
11961  * @param[in] attr
11962  *   Pointer to the flow attributes.
11963  * @param[in] items
11964  *   Pointer to the list of items.
11965  * @param[in] actions
11966  *   Pointer to the list of actions.
11967  * @param[out] error
11968  *   Pointer to the error structure.
11969  *
11970  * @return
11971  *   0 on success, a negative errno value otherwise and rte_errno is set.
11972  */
11973 static int
11974 flow_dv_translate(struct rte_eth_dev *dev,
11975                   struct mlx5_flow *dev_flow,
11976                   const struct rte_flow_attr *attr,
11977                   const struct rte_flow_item items[],
11978                   const struct rte_flow_action actions[],
11979                   struct rte_flow_error *error)
11980 {
11981         struct mlx5_priv *priv = dev->data->dev_private;
11982         struct mlx5_dev_config *dev_conf = &priv->config;
11983         struct rte_flow *flow = dev_flow->flow;
11984         struct mlx5_flow_handle *handle = dev_flow->handle;
11985         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11986         struct mlx5_flow_rss_desc *rss_desc;
11987         uint64_t item_flags = 0;
11988         uint64_t last_item = 0;
11989         uint64_t action_flags = 0;
11990         struct mlx5_flow_dv_matcher matcher = {
11991                 .mask = {
11992                         .size = sizeof(matcher.mask.buf) -
11993                                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
11994                 },
11995         };
11996         int actions_n = 0;
11997         bool actions_end = false;
11998         union {
11999                 struct mlx5_flow_dv_modify_hdr_resource res;
12000                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12001                             sizeof(struct mlx5_modification_cmd) *
12002                             (MLX5_MAX_MODIFY_NUM + 1)];
12003         } mhdr_dummy;
12004         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12005         const struct rte_flow_action_count *count = NULL;
12006         const struct rte_flow_action_age *non_shared_age = NULL;
12007         union flow_dv_attr flow_attr = { .attr = 0 };
12008         uint32_t tag_be;
12009         union mlx5_flow_tbl_key tbl_key;
12010         uint32_t modify_action_position = UINT32_MAX;
12011         void *match_mask = matcher.mask.buf;
12012         void *match_value = dev_flow->dv.value.buf;
12013         uint8_t next_protocol = 0xff;
12014         struct rte_vlan_hdr vlan = { 0 };
12015         struct mlx5_flow_dv_dest_array_resource mdest_res;
12016         struct mlx5_flow_dv_sample_resource sample_res;
12017         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12018         const struct rte_flow_action_sample *sample = NULL;
12019         struct mlx5_flow_sub_actions_list *sample_act;
12020         uint32_t sample_act_pos = UINT32_MAX;
12021         uint32_t age_act_pos = UINT32_MAX;
12022         uint32_t num_of_dest = 0;
12023         int tmp_actions_n = 0;
12024         uint32_t table;
12025         int ret = 0;
12026         const struct mlx5_flow_tunnel *tunnel = NULL;
12027         struct flow_grp_info grp_info = {
12028                 .external = !!dev_flow->external,
12029                 .transfer = !!attr->transfer,
12030                 .fdb_def_rule = !!priv->fdb_def_rule,
12031                 .skip_scale = dev_flow->skip_scale &
12032                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12033                 .std_tbl_fix = true,
12034         };
12035         const struct rte_flow_item *head_item = items;
12036
12037         if (!wks)
12038                 return rte_flow_error_set(error, ENOMEM,
12039                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12040                                           NULL,
12041                                           "failed to push flow workspace");
12042         rss_desc = &wks->rss_desc;
12043         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12044         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12045         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12046                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12047         /* update normal path action resource into last index of array */
12048         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12049         if (is_tunnel_offload_active(dev)) {
12050                 if (dev_flow->tunnel) {
12051                         RTE_VERIFY(dev_flow->tof_type ==
12052                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12053                         tunnel = dev_flow->tunnel;
12054                 } else {
12055                         tunnel = mlx5_get_tof(items, actions,
12056                                               &dev_flow->tof_type);
12057                         dev_flow->tunnel = tunnel;
12058                 }
12059                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12060                                         (dev, attr, tunnel, dev_flow->tof_type);
12061         }
12062         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12063                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12064         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12065                                        &grp_info, error);
12066         if (ret)
12067                 return ret;
12068         dev_flow->dv.group = table;
12069         if (attr->transfer)
12070                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12071         /* number of actions must be set to 0 in case of dirty stack. */
12072         mhdr_res->actions_num = 0;
12073         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12074                 /*
12075                  * do not add decap action if match rule drops packet
12076                  * HW rejects rules with decap & drop
12077                  *
12078                  * if tunnel match rule was inserted before matching tunnel set
12079                  * rule flow table used in the match rule must be registered.
12080                  * current implementation handles that in the
12081                  * flow_dv_match_register() at the function end.
12082                  */
12083                 bool add_decap = true;
12084                 const struct rte_flow_action *ptr = actions;
12085
12086                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12087                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12088                                 add_decap = false;
12089                                 break;
12090                         }
12091                 }
12092                 if (add_decap) {
12093                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12094                                                            attr->transfer,
12095                                                            error))
12096                                 return -rte_errno;
12097                         dev_flow->dv.actions[actions_n++] =
12098                                         dev_flow->dv.encap_decap->action;
12099                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12100                 }
12101         }
12102         for (; !actions_end ; actions++) {
12103                 const struct rte_flow_action_queue *queue;
12104                 const struct rte_flow_action_rss *rss;
12105                 const struct rte_flow_action *action = actions;
12106                 const uint8_t *rss_key;
12107                 struct mlx5_flow_tbl_resource *tbl;
12108                 struct mlx5_aso_age_action *age_act;
12109                 struct mlx5_flow_counter *cnt_act;
12110                 uint32_t port_id = 0;
12111                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12112                 int action_type = actions->type;
12113                 const struct rte_flow_action *found_action = NULL;
12114                 uint32_t jump_group = 0;
12115                 uint32_t owner_idx;
12116                 struct mlx5_aso_ct_action *ct;
12117
12118                 if (!mlx5_flow_os_action_supported(action_type))
12119                         return rte_flow_error_set(error, ENOTSUP,
12120                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12121                                                   actions,
12122                                                   "action not supported");
12123                 switch (action_type) {
12124                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12125                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12126                         break;
12127                 case RTE_FLOW_ACTION_TYPE_VOID:
12128                         break;
12129                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12130                         if (flow_dv_translate_action_port_id(dev, action,
12131                                                              &port_id, error))
12132                                 return -rte_errno;
12133                         port_id_resource.port_id = port_id;
12134                         MLX5_ASSERT(!handle->rix_port_id_action);
12135                         if (flow_dv_port_id_action_resource_register
12136                             (dev, &port_id_resource, dev_flow, error))
12137                                 return -rte_errno;
12138                         dev_flow->dv.actions[actions_n++] =
12139                                         dev_flow->dv.port_id_action->action;
12140                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12141                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12142                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12143                         num_of_dest++;
12144                         break;
12145                 case RTE_FLOW_ACTION_TYPE_FLAG:
12146                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12147                         dev_flow->handle->mark = 1;
12148                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12149                                 struct rte_flow_action_mark mark = {
12150                                         .id = MLX5_FLOW_MARK_DEFAULT,
12151                                 };
12152
12153                                 if (flow_dv_convert_action_mark(dev, &mark,
12154                                                                 mhdr_res,
12155                                                                 error))
12156                                         return -rte_errno;
12157                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12158                                 break;
12159                         }
12160                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12161                         /*
12162                          * Only one FLAG or MARK is supported per device flow
12163                          * right now. So the pointer to the tag resource must be
12164                          * zero before the register process.
12165                          */
12166                         MLX5_ASSERT(!handle->dvh.rix_tag);
12167                         if (flow_dv_tag_resource_register(dev, tag_be,
12168                                                           dev_flow, error))
12169                                 return -rte_errno;
12170                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12171                         dev_flow->dv.actions[actions_n++] =
12172                                         dev_flow->dv.tag_resource->action;
12173                         break;
12174                 case RTE_FLOW_ACTION_TYPE_MARK:
12175                         action_flags |= MLX5_FLOW_ACTION_MARK;
12176                         dev_flow->handle->mark = 1;
12177                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12178                                 const struct rte_flow_action_mark *mark =
12179                                         (const struct rte_flow_action_mark *)
12180                                                 actions->conf;
12181
12182                                 if (flow_dv_convert_action_mark(dev, mark,
12183                                                                 mhdr_res,
12184                                                                 error))
12185                                         return -rte_errno;
12186                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12187                                 break;
12188                         }
12189                         /* Fall-through */
12190                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12191                         /* Legacy (non-extensive) MARK action. */
12192                         tag_be = mlx5_flow_mark_set
12193                               (((const struct rte_flow_action_mark *)
12194                                (actions->conf))->id);
12195                         MLX5_ASSERT(!handle->dvh.rix_tag);
12196                         if (flow_dv_tag_resource_register(dev, tag_be,
12197                                                           dev_flow, error))
12198                                 return -rte_errno;
12199                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12200                         dev_flow->dv.actions[actions_n++] =
12201                                         dev_flow->dv.tag_resource->action;
12202                         break;
12203                 case RTE_FLOW_ACTION_TYPE_SET_META:
12204                         if (flow_dv_convert_action_set_meta
12205                                 (dev, mhdr_res, attr,
12206                                  (const struct rte_flow_action_set_meta *)
12207                                   actions->conf, error))
12208                                 return -rte_errno;
12209                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12210                         break;
12211                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12212                         if (flow_dv_convert_action_set_tag
12213                                 (dev, mhdr_res,
12214                                  (const struct rte_flow_action_set_tag *)
12215                                   actions->conf, error))
12216                                 return -rte_errno;
12217                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12218                         break;
12219                 case RTE_FLOW_ACTION_TYPE_DROP:
12220                         action_flags |= MLX5_FLOW_ACTION_DROP;
12221                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12222                         break;
12223                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12224                         queue = actions->conf;
12225                         rss_desc->queue_num = 1;
12226                         rss_desc->queue[0] = queue->index;
12227                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12228                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12229                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12230                         num_of_dest++;
12231                         break;
12232                 case RTE_FLOW_ACTION_TYPE_RSS:
12233                         rss = actions->conf;
12234                         memcpy(rss_desc->queue, rss->queue,
12235                                rss->queue_num * sizeof(uint16_t));
12236                         rss_desc->queue_num = rss->queue_num;
12237                         /* NULL RSS key indicates default RSS key. */
12238                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12239                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12240                         /*
12241                          * rss->level and rss.types should be set in advance
12242                          * when expanding items for RSS.
12243                          */
12244                         action_flags |= MLX5_FLOW_ACTION_RSS;
12245                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12246                                 MLX5_FLOW_FATE_SHARED_RSS :
12247                                 MLX5_FLOW_FATE_QUEUE;
12248                         break;
12249                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12250                         flow->age = (uint32_t)(uintptr_t)(action->conf);
12251                         age_act = flow_aso_age_get_by_idx(dev, flow->age);
12252                         __atomic_fetch_add(&age_act->refcnt, 1,
12253                                            __ATOMIC_RELAXED);
12254                         age_act_pos = actions_n++;
12255                         action_flags |= MLX5_FLOW_ACTION_AGE;
12256                         break;
12257                 case RTE_FLOW_ACTION_TYPE_AGE:
12258                         non_shared_age = action->conf;
12259                         age_act_pos = actions_n++;
12260                         action_flags |= MLX5_FLOW_ACTION_AGE;
12261                         break;
12262                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12263                         flow->counter = (uint32_t)(uintptr_t)(action->conf);
12264                         cnt_act = flow_dv_counter_get_by_idx(dev, flow->counter,
12265                                                              NULL);
12266                         __atomic_fetch_add(&cnt_act->shared_info.refcnt, 1,
12267                                            __ATOMIC_RELAXED);
12268                         /* Save information first, will apply later. */
12269                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12270                         break;
12271                 case RTE_FLOW_ACTION_TYPE_COUNT:
12272                         if (!dev_conf->devx) {
12273                                 return rte_flow_error_set
12274                                               (error, ENOTSUP,
12275                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12276                                                NULL,
12277                                                "count action not supported");
12278                         }
12279                         /* Save information first, will apply later. */
12280                         count = action->conf;
12281                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12282                         break;
12283                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12284                         dev_flow->dv.actions[actions_n++] =
12285                                                 priv->sh->pop_vlan_action;
12286                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12287                         break;
12288                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12289                         if (!(action_flags &
12290                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12291                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12292                         vlan.eth_proto = rte_be_to_cpu_16
12293                              ((((const struct rte_flow_action_of_push_vlan *)
12294                                                    actions->conf)->ethertype));
12295                         found_action = mlx5_flow_find_action
12296                                         (actions + 1,
12297                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12298                         if (found_action)
12299                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12300                         found_action = mlx5_flow_find_action
12301                                         (actions + 1,
12302                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12303                         if (found_action)
12304                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12305                         if (flow_dv_create_action_push_vlan
12306                                             (dev, attr, &vlan, dev_flow, error))
12307                                 return -rte_errno;
12308                         dev_flow->dv.actions[actions_n++] =
12309                                         dev_flow->dv.push_vlan_res->action;
12310                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12311                         break;
12312                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12313                         /* of_vlan_push action handled this action */
12314                         MLX5_ASSERT(action_flags &
12315                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12316                         break;
12317                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12318                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12319                                 break;
12320                         flow_dev_get_vlan_info_from_items(items, &vlan);
12321                         mlx5_update_vlan_vid_pcp(actions, &vlan);
12322                         /* If no VLAN push - this is a modify header action */
12323                         if (flow_dv_convert_action_modify_vlan_vid
12324                                                 (mhdr_res, actions, error))
12325                                 return -rte_errno;
12326                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12327                         break;
12328                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12329                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12330                         if (flow_dv_create_action_l2_encap(dev, actions,
12331                                                            dev_flow,
12332                                                            attr->transfer,
12333                                                            error))
12334                                 return -rte_errno;
12335                         dev_flow->dv.actions[actions_n++] =
12336                                         dev_flow->dv.encap_decap->action;
12337                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12338                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12339                                 sample_act->action_flags |=
12340                                                         MLX5_FLOW_ACTION_ENCAP;
12341                         break;
12342                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12343                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12344                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12345                                                            attr->transfer,
12346                                                            error))
12347                                 return -rte_errno;
12348                         dev_flow->dv.actions[actions_n++] =
12349                                         dev_flow->dv.encap_decap->action;
12350                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12351                         break;
12352                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12353                         /* Handle encap with preceding decap. */
12354                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12355                                 if (flow_dv_create_action_raw_encap
12356                                         (dev, actions, dev_flow, attr, error))
12357                                         return -rte_errno;
12358                                 dev_flow->dv.actions[actions_n++] =
12359                                         dev_flow->dv.encap_decap->action;
12360                         } else {
12361                                 /* Handle encap without preceding decap. */
12362                                 if (flow_dv_create_action_l2_encap
12363                                     (dev, actions, dev_flow, attr->transfer,
12364                                      error))
12365                                         return -rte_errno;
12366                                 dev_flow->dv.actions[actions_n++] =
12367                                         dev_flow->dv.encap_decap->action;
12368                         }
12369                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12370                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12371                                 sample_act->action_flags |=
12372                                                         MLX5_FLOW_ACTION_ENCAP;
12373                         break;
12374                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12375                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12376                                 ;
12377                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12378                                 if (flow_dv_create_action_l2_decap
12379                                     (dev, dev_flow, attr->transfer, error))
12380                                         return -rte_errno;
12381                                 dev_flow->dv.actions[actions_n++] =
12382                                         dev_flow->dv.encap_decap->action;
12383                         }
12384                         /* If decap is followed by encap, handle it at encap. */
12385                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12386                         break;
12387                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12388                         dev_flow->dv.actions[actions_n++] =
12389                                 (void *)(uintptr_t)action->conf;
12390                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12391                         break;
12392                 case RTE_FLOW_ACTION_TYPE_JUMP:
12393                         jump_group = ((const struct rte_flow_action_jump *)
12394                                                         action->conf)->group;
12395                         grp_info.std_tbl_fix = 0;
12396                         if (dev_flow->skip_scale &
12397                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12398                                 grp_info.skip_scale = 1;
12399                         else
12400                                 grp_info.skip_scale = 0;
12401                         ret = mlx5_flow_group_to_table(dev, tunnel,
12402                                                        jump_group,
12403                                                        &table,
12404                                                        &grp_info, error);
12405                         if (ret)
12406                                 return ret;
12407                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12408                                                        attr->transfer,
12409                                                        !!dev_flow->external,
12410                                                        tunnel, jump_group, 0,
12411                                                        0, error);
12412                         if (!tbl)
12413                                 return rte_flow_error_set
12414                                                 (error, errno,
12415                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12416                                                  NULL,
12417                                                  "cannot create jump action.");
12418                         if (flow_dv_jump_tbl_resource_register
12419                             (dev, tbl, dev_flow, error)) {
12420                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12421                                 return rte_flow_error_set
12422                                                 (error, errno,
12423                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12424                                                  NULL,
12425                                                  "cannot create jump action.");
12426                         }
12427                         dev_flow->dv.actions[actions_n++] =
12428                                         dev_flow->dv.jump->action;
12429                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12430                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12431                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12432                         num_of_dest++;
12433                         break;
12434                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12435                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12436                         if (flow_dv_convert_action_modify_mac
12437                                         (mhdr_res, actions, error))
12438                                 return -rte_errno;
12439                         action_flags |= actions->type ==
12440                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12441                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
12442                                         MLX5_FLOW_ACTION_SET_MAC_DST;
12443                         break;
12444                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12445                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12446                         if (flow_dv_convert_action_modify_ipv4
12447                                         (mhdr_res, actions, error))
12448                                 return -rte_errno;
12449                         action_flags |= actions->type ==
12450                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12451                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
12452                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
12453                         break;
12454                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12455                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12456                         if (flow_dv_convert_action_modify_ipv6
12457                                         (mhdr_res, actions, error))
12458                                 return -rte_errno;
12459                         action_flags |= actions->type ==
12460                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
12461                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
12462                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
12463                         break;
12464                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
12465                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
12466                         if (flow_dv_convert_action_modify_tp
12467                                         (mhdr_res, actions, items,
12468                                          &flow_attr, dev_flow, !!(action_flags &
12469                                          MLX5_FLOW_ACTION_DECAP), error))
12470                                 return -rte_errno;
12471                         action_flags |= actions->type ==
12472                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
12473                                         MLX5_FLOW_ACTION_SET_TP_SRC :
12474                                         MLX5_FLOW_ACTION_SET_TP_DST;
12475                         break;
12476                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
12477                         if (flow_dv_convert_action_modify_dec_ttl
12478                                         (mhdr_res, items, &flow_attr, dev_flow,
12479                                          !!(action_flags &
12480                                          MLX5_FLOW_ACTION_DECAP), error))
12481                                 return -rte_errno;
12482                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
12483                         break;
12484                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
12485                         if (flow_dv_convert_action_modify_ttl
12486                                         (mhdr_res, actions, items, &flow_attr,
12487                                          dev_flow, !!(action_flags &
12488                                          MLX5_FLOW_ACTION_DECAP), error))
12489                                 return -rte_errno;
12490                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
12491                         break;
12492                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
12493                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
12494                         if (flow_dv_convert_action_modify_tcp_seq
12495                                         (mhdr_res, actions, error))
12496                                 return -rte_errno;
12497                         action_flags |= actions->type ==
12498                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
12499                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
12500                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
12501                         break;
12502
12503                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
12504                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
12505                         if (flow_dv_convert_action_modify_tcp_ack
12506                                         (mhdr_res, actions, error))
12507                                 return -rte_errno;
12508                         action_flags |= actions->type ==
12509                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
12510                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
12511                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
12512                         break;
12513                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
12514                         if (flow_dv_convert_action_set_reg
12515                                         (mhdr_res, actions, error))
12516                                 return -rte_errno;
12517                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12518                         break;
12519                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
12520                         if (flow_dv_convert_action_copy_mreg
12521                                         (dev, mhdr_res, actions, error))
12522                                 return -rte_errno;
12523                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12524                         break;
12525                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
12526                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
12527                         dev_flow->handle->fate_action =
12528                                         MLX5_FLOW_FATE_DEFAULT_MISS;
12529                         break;
12530                 case RTE_FLOW_ACTION_TYPE_METER:
12531                         if (!wks->fm)
12532                                 return rte_flow_error_set(error, rte_errno,
12533                                         RTE_FLOW_ERROR_TYPE_ACTION,
12534                                         NULL, "Failed to get meter in flow.");
12535                         /* Set the meter action. */
12536                         dev_flow->dv.actions[actions_n++] =
12537                                 wks->fm->meter_action;
12538                         action_flags |= MLX5_FLOW_ACTION_METER;
12539                         break;
12540                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
12541                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
12542                                                               actions, error))
12543                                 return -rte_errno;
12544                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
12545                         break;
12546                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
12547                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
12548                                                               actions, error))
12549                                 return -rte_errno;
12550                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
12551                         break;
12552                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
12553                         sample_act_pos = actions_n;
12554                         sample = (const struct rte_flow_action_sample *)
12555                                  action->conf;
12556                         actions_n++;
12557                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
12558                         /* put encap action into group if work with port id */
12559                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
12560                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
12561                                 sample_act->action_flags |=
12562                                                         MLX5_FLOW_ACTION_ENCAP;
12563                         break;
12564                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
12565                         if (flow_dv_convert_action_modify_field
12566                                         (dev, mhdr_res, actions, attr, error))
12567                                 return -rte_errno;
12568                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
12569                         break;
12570                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
12571                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12572                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
12573                         if (!ct)
12574                                 return rte_flow_error_set(error, EINVAL,
12575                                                 RTE_FLOW_ERROR_TYPE_ACTION,
12576                                                 NULL,
12577                                                 "Failed to get CT object.");
12578                         if (mlx5_aso_ct_available(priv->sh, ct))
12579                                 return rte_flow_error_set(error, rte_errno,
12580                                                 RTE_FLOW_ERROR_TYPE_ACTION,
12581                                                 NULL,
12582                                                 "CT is unavailable.");
12583                         if (ct->is_original)
12584                                 dev_flow->dv.actions[actions_n] =
12585                                                         ct->dr_action_orig;
12586                         else
12587                                 dev_flow->dv.actions[actions_n] =
12588                                                         ct->dr_action_rply;
12589                         flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;
12590                         flow->ct = owner_idx;
12591                         __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);
12592                         actions_n++;
12593                         action_flags |= MLX5_FLOW_ACTION_CT;
12594                         break;
12595                 case RTE_FLOW_ACTION_TYPE_END:
12596                         actions_end = true;
12597                         if (mhdr_res->actions_num) {
12598                                 /* create modify action if needed. */
12599                                 if (flow_dv_modify_hdr_resource_register
12600                                         (dev, mhdr_res, dev_flow, error))
12601                                         return -rte_errno;
12602                                 dev_flow->dv.actions[modify_action_position] =
12603                                         handle->dvh.modify_hdr->action;
12604                         }
12605                         /*
12606                          * Handle AGE and COUNT action by single HW counter
12607                          * when they are not shared.
12608                          */
12609                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
12610                                 if ((non_shared_age &&
12611                                      count && !count->shared) ||
12612                                     !(priv->sh->flow_hit_aso_en &&
12613                                       (attr->group || attr->transfer))) {
12614                                         /* Creates age by counters. */
12615                                         cnt_act = flow_dv_prepare_counter
12616                                                                 (dev, dev_flow,
12617                                                                  flow, count,
12618                                                                  non_shared_age,
12619                                                                  error);
12620                                         if (!cnt_act)
12621                                                 return -rte_errno;
12622                                         dev_flow->dv.actions[age_act_pos] =
12623                                                                 cnt_act->action;
12624                                         break;
12625                                 }
12626                                 if (!flow->age && non_shared_age) {
12627                                         flow->age = flow_dv_aso_age_alloc
12628                                                                 (dev, error);
12629                                         if (!flow->age)
12630                                                 return -rte_errno;
12631                                         flow_dv_aso_age_params_init
12632                                                     (dev, flow->age,
12633                                                      non_shared_age->context ?
12634                                                      non_shared_age->context :
12635                                                      (void *)(uintptr_t)
12636                                                      (dev_flow->flow_idx),
12637                                                      non_shared_age->timeout);
12638                                 }
12639                                 age_act = flow_aso_age_get_by_idx(dev,
12640                                                                   flow->age);
12641                                 dev_flow->dv.actions[age_act_pos] =
12642                                                              age_act->dr_action;
12643                         }
12644                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
12645                                 /*
12646                                  * Create one count action, to be used
12647                                  * by all sub-flows.
12648                                  */
12649                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
12650                                                                   flow, count,
12651                                                                   NULL, error);
12652                                 if (!cnt_act)
12653                                         return -rte_errno;
12654                                 dev_flow->dv.actions[actions_n++] =
12655                                                                 cnt_act->action;
12656                         }
12657                 default:
12658                         break;
12659                 }
12660                 if (mhdr_res->actions_num &&
12661                     modify_action_position == UINT32_MAX)
12662                         modify_action_position = actions_n++;
12663         }
12664         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
12665                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
12666                 int item_type = items->type;
12667
12668                 if (!mlx5_flow_os_item_supported(item_type))
12669                         return rte_flow_error_set(error, ENOTSUP,
12670                                                   RTE_FLOW_ERROR_TYPE_ITEM,
12671                                                   NULL, "item not supported");
12672                 switch (item_type) {
12673                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
12674                         flow_dv_translate_item_port_id
12675                                 (dev, match_mask, match_value, items, attr);
12676                         last_item = MLX5_FLOW_ITEM_PORT_ID;
12677                         break;
12678                 case RTE_FLOW_ITEM_TYPE_ETH:
12679                         flow_dv_translate_item_eth(match_mask, match_value,
12680                                                    items, tunnel,
12681                                                    dev_flow->dv.group);
12682                         matcher.priority = action_flags &
12683                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
12684                                         !dev_flow->external ?
12685                                         MLX5_PRIORITY_MAP_L3 :
12686                                         MLX5_PRIORITY_MAP_L2;
12687                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
12688                                              MLX5_FLOW_LAYER_OUTER_L2;
12689                         break;
12690                 case RTE_FLOW_ITEM_TYPE_VLAN:
12691                         flow_dv_translate_item_vlan(dev_flow,
12692                                                     match_mask, match_value,
12693                                                     items, tunnel,
12694                                                     dev_flow->dv.group);
12695                         matcher.priority = MLX5_PRIORITY_MAP_L2;
12696                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
12697                                               MLX5_FLOW_LAYER_INNER_VLAN) :
12698                                              (MLX5_FLOW_LAYER_OUTER_L2 |
12699                                               MLX5_FLOW_LAYER_OUTER_VLAN);
12700                         break;
12701                 case RTE_FLOW_ITEM_TYPE_IPV4:
12702                         mlx5_flow_tunnel_ip_check(items, next_protocol,
12703                                                   &item_flags, &tunnel);
12704                         flow_dv_translate_item_ipv4(match_mask, match_value,
12705                                                     items, tunnel,
12706                                                     dev_flow->dv.group);
12707                         matcher.priority = MLX5_PRIORITY_MAP_L3;
12708                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
12709                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
12710                         if (items->mask != NULL &&
12711                             ((const struct rte_flow_item_ipv4 *)
12712                              items->mask)->hdr.next_proto_id) {
12713                                 next_protocol =
12714                                         ((const struct rte_flow_item_ipv4 *)
12715                                          (items->spec))->hdr.next_proto_id;
12716                                 next_protocol &=
12717                                         ((const struct rte_flow_item_ipv4 *)
12718                                          (items->mask))->hdr.next_proto_id;
12719                         } else {
12720                                 /* Reset for inner layer. */
12721                                 next_protocol = 0xff;
12722                         }
12723                         break;
12724                 case RTE_FLOW_ITEM_TYPE_IPV6:
12725                         mlx5_flow_tunnel_ip_check(items, next_protocol,
12726                                                   &item_flags, &tunnel);
12727                         flow_dv_translate_item_ipv6(match_mask, match_value,
12728                                                     items, tunnel,
12729                                                     dev_flow->dv.group);
12730                         matcher.priority = MLX5_PRIORITY_MAP_L3;
12731                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
12732                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
12733                         if (items->mask != NULL &&
12734                             ((const struct rte_flow_item_ipv6 *)
12735                              items->mask)->hdr.proto) {
12736                                 next_protocol =
12737                                         ((const struct rte_flow_item_ipv6 *)
12738                                          items->spec)->hdr.proto;
12739                                 next_protocol &=
12740                                         ((const struct rte_flow_item_ipv6 *)
12741                                          items->mask)->hdr.proto;
12742                         } else {
12743                                 /* Reset for inner layer. */
12744                                 next_protocol = 0xff;
12745                         }
12746                         break;
12747                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
12748                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
12749                                                              match_value,
12750                                                              items, tunnel);
12751                         last_item = tunnel ?
12752                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
12753                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
12754                         if (items->mask != NULL &&
12755                             ((const struct rte_flow_item_ipv6_frag_ext *)
12756                              items->mask)->hdr.next_header) {
12757                                 next_protocol =
12758                                 ((const struct rte_flow_item_ipv6_frag_ext *)
12759                                  items->spec)->hdr.next_header;
12760                                 next_protocol &=
12761                                 ((const struct rte_flow_item_ipv6_frag_ext *)
12762                                  items->mask)->hdr.next_header;
12763                         } else {
12764                                 /* Reset for inner layer. */
12765                                 next_protocol = 0xff;
12766                         }
12767                         break;
12768                 case RTE_FLOW_ITEM_TYPE_TCP:
12769                         flow_dv_translate_item_tcp(match_mask, match_value,
12770                                                    items, tunnel);
12771                         matcher.priority = MLX5_PRIORITY_MAP_L4;
12772                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
12773                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
12774                         break;
12775                 case RTE_FLOW_ITEM_TYPE_UDP:
12776                         flow_dv_translate_item_udp(match_mask, match_value,
12777                                                    items, tunnel);
12778                         matcher.priority = MLX5_PRIORITY_MAP_L4;
12779                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
12780                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
12781                         break;
12782                 case RTE_FLOW_ITEM_TYPE_GRE:
12783                         flow_dv_translate_item_gre(match_mask, match_value,
12784                                                    items, tunnel);
12785                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12786                         last_item = MLX5_FLOW_LAYER_GRE;
12787                         break;
12788                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
12789                         flow_dv_translate_item_gre_key(match_mask,
12790                                                        match_value, items);
12791                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
12792                         break;
12793                 case RTE_FLOW_ITEM_TYPE_NVGRE:
12794                         flow_dv_translate_item_nvgre(match_mask, match_value,
12795                                                      items, tunnel);
12796                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12797                         last_item = MLX5_FLOW_LAYER_GRE;
12798                         break;
12799                 case RTE_FLOW_ITEM_TYPE_VXLAN:
12800                         flow_dv_translate_item_vxlan(match_mask, match_value,
12801                                                      items, tunnel);
12802                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12803                         last_item = MLX5_FLOW_LAYER_VXLAN;
12804                         break;
12805                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
12806                         flow_dv_translate_item_vxlan_gpe(match_mask,
12807                                                          match_value, items,
12808                                                          tunnel);
12809                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12810                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
12811                         break;
12812                 case RTE_FLOW_ITEM_TYPE_GENEVE:
12813                         flow_dv_translate_item_geneve(match_mask, match_value,
12814                                                       items, tunnel);
12815                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12816                         last_item = MLX5_FLOW_LAYER_GENEVE;
12817                         break;
12818                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
12819                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
12820                                                           match_value,
12821                                                           items, error);
12822                         if (ret)
12823                                 return rte_flow_error_set(error, -ret,
12824                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
12825                                         "cannot create GENEVE TLV option");
12826                         flow->geneve_tlv_option = 1;
12827                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
12828                         break;
12829                 case RTE_FLOW_ITEM_TYPE_MPLS:
12830                         flow_dv_translate_item_mpls(match_mask, match_value,
12831                                                     items, last_item, tunnel);
12832                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12833                         last_item = MLX5_FLOW_LAYER_MPLS;
12834                         break;
12835                 case RTE_FLOW_ITEM_TYPE_MARK:
12836                         flow_dv_translate_item_mark(dev, match_mask,
12837                                                     match_value, items);
12838                         last_item = MLX5_FLOW_ITEM_MARK;
12839                         break;
12840                 case RTE_FLOW_ITEM_TYPE_META:
12841                         flow_dv_translate_item_meta(dev, match_mask,
12842                                                     match_value, attr, items);
12843                         last_item = MLX5_FLOW_ITEM_METADATA;
12844                         break;
12845                 case RTE_FLOW_ITEM_TYPE_ICMP:
12846                         flow_dv_translate_item_icmp(match_mask, match_value,
12847                                                     items, tunnel);
12848                         last_item = MLX5_FLOW_LAYER_ICMP;
12849                         break;
12850                 case RTE_FLOW_ITEM_TYPE_ICMP6:
12851                         flow_dv_translate_item_icmp6(match_mask, match_value,
12852                                                       items, tunnel);
12853                         last_item = MLX5_FLOW_LAYER_ICMP6;
12854                         break;
12855                 case RTE_FLOW_ITEM_TYPE_TAG:
12856                         flow_dv_translate_item_tag(dev, match_mask,
12857                                                    match_value, items);
12858                         last_item = MLX5_FLOW_ITEM_TAG;
12859                         break;
12860                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
12861                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
12862                                                         match_value, items);
12863                         last_item = MLX5_FLOW_ITEM_TAG;
12864                         break;
12865                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
12866                         flow_dv_translate_item_tx_queue(dev, match_mask,
12867                                                         match_value,
12868                                                         items);
12869                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
12870                         break;
12871                 case RTE_FLOW_ITEM_TYPE_GTP:
12872                         flow_dv_translate_item_gtp(match_mask, match_value,
12873                                                    items, tunnel);
12874                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12875                         last_item = MLX5_FLOW_LAYER_GTP;
12876                         break;
12877                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
12878                         ret = flow_dv_translate_item_gtp_psc(match_mask,
12879                                                           match_value,
12880                                                           items);
12881                         if (ret)
12882                                 return rte_flow_error_set(error, -ret,
12883                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
12884                                         "cannot create GTP PSC item");
12885                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
12886                         break;
12887                 case RTE_FLOW_ITEM_TYPE_ECPRI:
12888                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
12889                                 /* Create it only the first time to be used. */
12890                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
12891                                 if (ret)
12892                                         return rte_flow_error_set
12893                                                 (error, -ret,
12894                                                 RTE_FLOW_ERROR_TYPE_ITEM,
12895                                                 NULL,
12896                                                 "cannot create eCPRI parser");
12897                         }
12898                         /* Adjust the length matcher and device flow value. */
12899                         matcher.mask.size = MLX5_ST_SZ_BYTES(fte_match_param);
12900                         dev_flow->dv.value.size =
12901                                         MLX5_ST_SZ_BYTES(fte_match_param);
12902                         flow_dv_translate_item_ecpri(dev, match_mask,
12903                                                      match_value, items);
12904                         /* No other protocol should follow eCPRI layer. */
12905                         last_item = MLX5_FLOW_LAYER_ECPRI;
12906                         break;
12907                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
12908                         flow_dv_translate_item_integrity(match_mask,
12909                                                          match_value,
12910                                                          head_item, items);
12911                         break;
12912                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
12913                         flow_dv_translate_item_aso_ct(dev, match_mask,
12914                                                       match_value, items);
12915                         break;
12916                 default:
12917                         break;
12918                 }
12919                 item_flags |= last_item;
12920         }
12921         /*
12922          * When E-Switch mode is enabled, we have two cases where we need to
12923          * set the source port manually.
12924          * The first one, is in case of Nic steering rule, and the second is
12925          * E-Switch rule where no port_id item was found. In both cases
12926          * the source port is set according the current port in use.
12927          */
12928         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
12929             (priv->representor || priv->master)) {
12930                 if (flow_dv_translate_item_port_id(dev, match_mask,
12931                                                    match_value, NULL, attr))
12932                         return -rte_errno;
12933         }
12934 #ifdef RTE_LIBRTE_MLX5_DEBUG
12935         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
12936                                               dev_flow->dv.value.buf));
12937 #endif
12938         /*
12939          * Layers may be already initialized from prefix flow if this dev_flow
12940          * is the suffix flow.
12941          */
12942         handle->layers |= item_flags;
12943         if (action_flags & MLX5_FLOW_ACTION_RSS)
12944                 flow_dv_hashfields_set(dev_flow, rss_desc);
12945         /* If has RSS action in the sample action, the Sample/Mirror resource
12946          * should be registered after the hash filed be update.
12947          */
12948         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
12949                 ret = flow_dv_translate_action_sample(dev,
12950                                                       sample,
12951                                                       dev_flow, attr,
12952                                                       &num_of_dest,
12953                                                       sample_actions,
12954                                                       &sample_res,
12955                                                       error);
12956                 if (ret < 0)
12957                         return ret;
12958                 ret = flow_dv_create_action_sample(dev,
12959                                                    dev_flow,
12960                                                    num_of_dest,
12961                                                    &sample_res,
12962                                                    &mdest_res,
12963                                                    sample_actions,
12964                                                    action_flags,
12965                                                    error);
12966                 if (ret < 0)
12967                         return rte_flow_error_set
12968                                                 (error, rte_errno,
12969                                                 RTE_FLOW_ERROR_TYPE_ACTION,
12970                                                 NULL,
12971                                                 "cannot create sample action");
12972                 if (num_of_dest > 1) {
12973                         dev_flow->dv.actions[sample_act_pos] =
12974                         dev_flow->dv.dest_array_res->action;
12975                 } else {
12976                         dev_flow->dv.actions[sample_act_pos] =
12977                         dev_flow->dv.sample_res->verbs_action;
12978                 }
12979         }
12980         /*
12981          * For multiple destination (sample action with ratio=1), the encap
12982          * action and port id action will be combined into group action.
12983          * So need remove the original these actions in the flow and only
12984          * use the sample action instead of.
12985          */
12986         if (num_of_dest > 1 &&
12987             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
12988                 int i;
12989                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12990
12991                 for (i = 0; i < actions_n; i++) {
12992                         if ((sample_act->dr_encap_action &&
12993                                 sample_act->dr_encap_action ==
12994                                 dev_flow->dv.actions[i]) ||
12995                                 (sample_act->dr_port_id_action &&
12996                                 sample_act->dr_port_id_action ==
12997                                 dev_flow->dv.actions[i]) ||
12998                                 (sample_act->dr_jump_action &&
12999                                 sample_act->dr_jump_action ==
13000                                 dev_flow->dv.actions[i]))
13001                                 continue;
13002                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13003                 }
13004                 memcpy((void *)dev_flow->dv.actions,
13005                                 (void *)temp_actions,
13006                                 tmp_actions_n * sizeof(void *));
13007                 actions_n = tmp_actions_n;
13008         }
13009         dev_flow->dv.actions_n = actions_n;
13010         dev_flow->act_flags = action_flags;
13011         if (wks->skip_matcher_reg)
13012                 return 0;
13013         /* Register matcher. */
13014         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13015                                     matcher.mask.size);
13016         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13017                                         matcher.priority);
13018         /* reserved field no needs to be set to 0 here. */
13019         tbl_key.is_fdb = attr->transfer;
13020         tbl_key.is_egress = attr->egress;
13021         tbl_key.level = dev_flow->dv.group;
13022         tbl_key.id = dev_flow->dv.table_id;
13023         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13024                                      tunnel, attr->group, error))
13025                 return -rte_errno;
13026         return 0;
13027 }
13028
13029 /**
13030  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13031  * and tunnel.
13032  *
13033  * @param[in, out] action
13034  *   Shred RSS action holding hash RX queue objects.
13035  * @param[in] hash_fields
13036  *   Defines combination of packet fields to participate in RX hash.
13037  * @param[in] tunnel
13038  *   Tunnel type
13039  * @param[in] hrxq_idx
13040  *   Hash RX queue index to set.
13041  *
13042  * @return
13043  *   0 on success, otherwise negative errno value.
13044  */
13045 static int
13046 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13047                               const uint64_t hash_fields,
13048                               uint32_t hrxq_idx)
13049 {
13050         uint32_t *hrxqs = action->hrxq;
13051
13052         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13053         case MLX5_RSS_HASH_IPV4:
13054                 /* fall-through. */
13055         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13056                 /* fall-through. */
13057         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13058                 hrxqs[0] = hrxq_idx;
13059                 return 0;
13060         case MLX5_RSS_HASH_IPV4_TCP:
13061                 /* fall-through. */
13062         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13063                 /* fall-through. */
13064         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13065                 hrxqs[1] = hrxq_idx;
13066                 return 0;
13067         case MLX5_RSS_HASH_IPV4_UDP:
13068                 /* fall-through. */
13069         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13070                 /* fall-through. */
13071         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13072                 hrxqs[2] = hrxq_idx;
13073                 return 0;
13074         case MLX5_RSS_HASH_IPV6:
13075                 /* fall-through. */
13076         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13077                 /* fall-through. */
13078         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13079                 hrxqs[3] = hrxq_idx;
13080                 return 0;
13081         case MLX5_RSS_HASH_IPV6_TCP:
13082                 /* fall-through. */
13083         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13084                 /* fall-through. */
13085         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13086                 hrxqs[4] = hrxq_idx;
13087                 return 0;
13088         case MLX5_RSS_HASH_IPV6_UDP:
13089                 /* fall-through. */
13090         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13091                 /* fall-through. */
13092         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13093                 hrxqs[5] = hrxq_idx;
13094                 return 0;
13095         case MLX5_RSS_HASH_NONE:
13096                 hrxqs[6] = hrxq_idx;
13097                 return 0;
13098         default:
13099                 return -1;
13100         }
13101 }
13102
13103 /**
13104  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13105  * and tunnel.
13106  *
13107  * @param[in] dev
13108  *   Pointer to the Ethernet device structure.
13109  * @param[in] idx
13110  *   Shared RSS action ID holding hash RX queue objects.
13111  * @param[in] hash_fields
13112  *   Defines combination of packet fields to participate in RX hash.
13113  * @param[in] tunnel
13114  *   Tunnel type
13115  *
13116  * @return
13117  *   Valid hash RX queue index, otherwise 0.
13118  */
13119 static uint32_t
13120 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13121                                  const uint64_t hash_fields)
13122 {
13123         struct mlx5_priv *priv = dev->data->dev_private;
13124         struct mlx5_shared_action_rss *shared_rss =
13125             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13126         const uint32_t *hrxqs = shared_rss->hrxq;
13127
13128         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13129         case MLX5_RSS_HASH_IPV4:
13130                 /* fall-through. */
13131         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13132                 /* fall-through. */
13133         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13134                 return hrxqs[0];
13135         case MLX5_RSS_HASH_IPV4_TCP:
13136                 /* fall-through. */
13137         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13138                 /* fall-through. */
13139         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13140                 return hrxqs[1];
13141         case MLX5_RSS_HASH_IPV4_UDP:
13142                 /* fall-through. */
13143         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13144                 /* fall-through. */
13145         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13146                 return hrxqs[2];
13147         case MLX5_RSS_HASH_IPV6:
13148                 /* fall-through. */
13149         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13150                 /* fall-through. */
13151         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13152                 return hrxqs[3];
13153         case MLX5_RSS_HASH_IPV6_TCP:
13154                 /* fall-through. */
13155         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13156                 /* fall-through. */
13157         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13158                 return hrxqs[4];
13159         case MLX5_RSS_HASH_IPV6_UDP:
13160                 /* fall-through. */
13161         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13162                 /* fall-through. */
13163         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13164                 return hrxqs[5];
13165         case MLX5_RSS_HASH_NONE:
13166                 return hrxqs[6];
13167         default:
13168                 return 0;
13169         }
13170
13171 }
13172
13173 /**
13174  * Apply the flow to the NIC, lock free,
13175  * (mutex should be acquired by caller).
13176  *
13177  * @param[in] dev
13178  *   Pointer to the Ethernet device structure.
13179  * @param[in, out] flow
13180  *   Pointer to flow structure.
13181  * @param[out] error
13182  *   Pointer to error structure.
13183  *
13184  * @return
13185  *   0 on success, a negative errno value otherwise and rte_errno is set.
13186  */
13187 static int
13188 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13189               struct rte_flow_error *error)
13190 {
13191         struct mlx5_flow_dv_workspace *dv;
13192         struct mlx5_flow_handle *dh;
13193         struct mlx5_flow_handle_dv *dv_h;
13194         struct mlx5_flow *dev_flow;
13195         struct mlx5_priv *priv = dev->data->dev_private;
13196         uint32_t handle_idx;
13197         int n;
13198         int err;
13199         int idx;
13200         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13201         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13202
13203         MLX5_ASSERT(wks);
13204         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13205                 dev_flow = &wks->flows[idx];
13206                 dv = &dev_flow->dv;
13207                 dh = dev_flow->handle;
13208                 dv_h = &dh->dvh;
13209                 n = dv->actions_n;
13210                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13211                         if (dv->transfer) {
13212                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13213                                 dv->actions[n++] = priv->sh->dr_drop_action;
13214                         } else {
13215 #ifdef HAVE_MLX5DV_DR
13216                                 /* DR supports drop action placeholder. */
13217                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13218                                 dv->actions[n++] = priv->sh->dr_drop_action;
13219 #else
13220                                 /* For DV we use the explicit drop queue. */
13221                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13222                                 dv->actions[n++] =
13223                                                 priv->drop_queue.hrxq->action;
13224 #endif
13225                         }
13226                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13227                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13228                         struct mlx5_hrxq *hrxq;
13229                         uint32_t hrxq_idx;
13230
13231                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13232                                                     &hrxq_idx);
13233                         if (!hrxq) {
13234                                 rte_flow_error_set
13235                                         (error, rte_errno,
13236                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13237                                          "cannot get hash queue");
13238                                 goto error;
13239                         }
13240                         dh->rix_hrxq = hrxq_idx;
13241                         dv->actions[n++] = hrxq->action;
13242                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13243                         struct mlx5_hrxq *hrxq = NULL;
13244                         uint32_t hrxq_idx;
13245
13246                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13247                                                 rss_desc->shared_rss,
13248                                                 dev_flow->hash_fields);
13249                         if (hrxq_idx)
13250                                 hrxq = mlx5_ipool_get
13251                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13252                                          hrxq_idx);
13253                         if (!hrxq) {
13254                                 rte_flow_error_set
13255                                         (error, rte_errno,
13256                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13257                                          "cannot get hash queue");
13258                                 goto error;
13259                         }
13260                         dh->rix_srss = rss_desc->shared_rss;
13261                         dv->actions[n++] = hrxq->action;
13262                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13263                         if (!priv->sh->default_miss_action) {
13264                                 rte_flow_error_set
13265                                         (error, rte_errno,
13266                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13267                                          "default miss action not be created.");
13268                                 goto error;
13269                         }
13270                         dv->actions[n++] = priv->sh->default_miss_action;
13271                 }
13272                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13273                                                (void *)&dv->value, n,
13274                                                dv->actions, &dh->drv_flow);
13275                 if (err) {
13276                         rte_flow_error_set(error, errno,
13277                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13278                                            NULL,
13279                                            "hardware refuses to create flow");
13280                         goto error;
13281                 }
13282                 if (priv->vmwa_context &&
13283                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
13284                         /*
13285                          * The rule contains the VLAN pattern.
13286                          * For VF we are going to create VLAN
13287                          * interface to make hypervisor set correct
13288                          * e-Switch vport context.
13289                          */
13290                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13291                 }
13292         }
13293         return 0;
13294 error:
13295         err = rte_errno; /* Save rte_errno before cleanup. */
13296         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13297                        handle_idx, dh, next) {
13298                 /* hrxq is union, don't clear it if the flag is not set. */
13299                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13300                         mlx5_hrxq_release(dev, dh->rix_hrxq);
13301                         dh->rix_hrxq = 0;
13302                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13303                         dh->rix_srss = 0;
13304                 }
13305                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13306                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13307         }
13308         rte_errno = err; /* Restore rte_errno. */
13309         return -rte_errno;
13310 }
13311
13312 void
13313 flow_dv_matcher_remove_cb(struct mlx5_cache_list *list __rte_unused,
13314                           struct mlx5_cache_entry *entry)
13315 {
13316         struct mlx5_flow_dv_matcher *cache = container_of(entry, typeof(*cache),
13317                                                           entry);
13318
13319         claim_zero(mlx5_flow_os_destroy_flow_matcher(cache->matcher_object));
13320         mlx5_free(cache);
13321 }
13322
13323 /**
13324  * Release the flow matcher.
13325  *
13326  * @param dev
13327  *   Pointer to Ethernet device.
13328  * @param port_id
13329  *   Index to port ID action resource.
13330  *
13331  * @return
13332  *   1 while a reference on it exists, 0 when freed.
13333  */
13334 static int
13335 flow_dv_matcher_release(struct rte_eth_dev *dev,
13336                         struct mlx5_flow_handle *handle)
13337 {
13338         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13339         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13340                                                             typeof(*tbl), tbl);
13341         int ret;
13342
13343         MLX5_ASSERT(matcher->matcher_object);
13344         ret = mlx5_cache_unregister(&tbl->matchers, &matcher->entry);
13345         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13346         return ret;
13347 }
13348
13349 /**
13350  * Release encap_decap resource.
13351  *
13352  * @param list
13353  *   Pointer to the hash list.
13354  * @param entry
13355  *   Pointer to exist resource entry object.
13356  */
13357 void
13358 flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,
13359                               struct mlx5_hlist_entry *entry)
13360 {
13361         struct mlx5_dev_ctx_shared *sh = list->ctx;
13362         struct mlx5_flow_dv_encap_decap_resource *res =
13363                 container_of(entry, typeof(*res), entry);
13364
13365         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13366         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13367 }
13368
13369 /**
13370  * Release an encap/decap resource.
13371  *
13372  * @param dev
13373  *   Pointer to Ethernet device.
13374  * @param encap_decap_idx
13375  *   Index of encap decap resource.
13376  *
13377  * @return
13378  *   1 while a reference on it exists, 0 when freed.
13379  */
13380 static int
13381 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13382                                      uint32_t encap_decap_idx)
13383 {
13384         struct mlx5_priv *priv = dev->data->dev_private;
13385         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
13386
13387         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13388                                         encap_decap_idx);
13389         if (!cache_resource)
13390                 return 0;
13391         MLX5_ASSERT(cache_resource->action);
13392         return mlx5_hlist_unregister(priv->sh->encaps_decaps,
13393                                      &cache_resource->entry);
13394 }
13395
13396 /**
13397  * Release an jump to table action resource.
13398  *
13399  * @param dev
13400  *   Pointer to Ethernet device.
13401  * @param rix_jump
13402  *   Index to the jump action resource.
13403  *
13404  * @return
13405  *   1 while a reference on it exists, 0 when freed.
13406  */
13407 static int
13408 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13409                                   uint32_t rix_jump)
13410 {
13411         struct mlx5_priv *priv = dev->data->dev_private;
13412         struct mlx5_flow_tbl_data_entry *tbl_data;
13413
13414         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13415                                   rix_jump);
13416         if (!tbl_data)
13417                 return 0;
13418         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13419 }
13420
13421 void
13422 flow_dv_modify_remove_cb(struct mlx5_hlist *list __rte_unused,
13423                          struct mlx5_hlist_entry *entry)
13424 {
13425         struct mlx5_flow_dv_modify_hdr_resource *res =
13426                 container_of(entry, typeof(*res), entry);
13427
13428         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13429         mlx5_free(entry);
13430 }
13431
13432 /**
13433  * Release a modify-header resource.
13434  *
13435  * @param dev
13436  *   Pointer to Ethernet device.
13437  * @param handle
13438  *   Pointer to mlx5_flow_handle.
13439  *
13440  * @return
13441  *   1 while a reference on it exists, 0 when freed.
13442  */
13443 static int
13444 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13445                                     struct mlx5_flow_handle *handle)
13446 {
13447         struct mlx5_priv *priv = dev->data->dev_private;
13448         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
13449
13450         MLX5_ASSERT(entry->action);
13451         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
13452 }
13453
13454 void
13455 flow_dv_port_id_remove_cb(struct mlx5_cache_list *list,
13456                           struct mlx5_cache_entry *entry)
13457 {
13458         struct mlx5_dev_ctx_shared *sh = list->ctx;
13459         struct mlx5_flow_dv_port_id_action_resource *cache =
13460                         container_of(entry, typeof(*cache), entry);
13461
13462         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
13463         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], cache->idx);
13464 }
13465
13466 /**
13467  * Release port ID action resource.
13468  *
13469  * @param dev
13470  *   Pointer to Ethernet device.
13471  * @param handle
13472  *   Pointer to mlx5_flow_handle.
13473  *
13474  * @return
13475  *   1 while a reference on it exists, 0 when freed.
13476  */
13477 static int
13478 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
13479                                         uint32_t port_id)
13480 {
13481         struct mlx5_priv *priv = dev->data->dev_private;
13482         struct mlx5_flow_dv_port_id_action_resource *cache;
13483
13484         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
13485         if (!cache)
13486                 return 0;
13487         MLX5_ASSERT(cache->action);
13488         return mlx5_cache_unregister(&priv->sh->port_id_action_list,
13489                                      &cache->entry);
13490 }
13491
13492 /**
13493  * Release shared RSS action resource.
13494  *
13495  * @param dev
13496  *   Pointer to Ethernet device.
13497  * @param srss
13498  *   Shared RSS action index.
13499  */
13500 static void
13501 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
13502 {
13503         struct mlx5_priv *priv = dev->data->dev_private;
13504         struct mlx5_shared_action_rss *shared_rss;
13505
13506         shared_rss = mlx5_ipool_get
13507                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
13508         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
13509 }
13510
13511 void
13512 flow_dv_push_vlan_remove_cb(struct mlx5_cache_list *list,
13513                             struct mlx5_cache_entry *entry)
13514 {
13515         struct mlx5_dev_ctx_shared *sh = list->ctx;
13516         struct mlx5_flow_dv_push_vlan_action_resource *cache =
13517                         container_of(entry, typeof(*cache), entry);
13518
13519         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
13520         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], cache->idx);
13521 }
13522
13523 /**
13524  * Release push vlan action resource.
13525  *
13526  * @param dev
13527  *   Pointer to Ethernet device.
13528  * @param handle
13529  *   Pointer to mlx5_flow_handle.
13530  *
13531  * @return
13532  *   1 while a reference on it exists, 0 when freed.
13533  */
13534 static int
13535 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
13536                                           struct mlx5_flow_handle *handle)
13537 {
13538         struct mlx5_priv *priv = dev->data->dev_private;
13539         struct mlx5_flow_dv_push_vlan_action_resource *cache;
13540         uint32_t idx = handle->dvh.rix_push_vlan;
13541
13542         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
13543         if (!cache)
13544                 return 0;
13545         MLX5_ASSERT(cache->action);
13546         return mlx5_cache_unregister(&priv->sh->push_vlan_action_list,
13547                                      &cache->entry);
13548 }
13549
13550 /**
13551  * Release the fate resource.
13552  *
13553  * @param dev
13554  *   Pointer to Ethernet device.
13555  * @param handle
13556  *   Pointer to mlx5_flow_handle.
13557  */
13558 static void
13559 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
13560                                struct mlx5_flow_handle *handle)
13561 {
13562         if (!handle->rix_fate)
13563                 return;
13564         switch (handle->fate_action) {
13565         case MLX5_FLOW_FATE_QUEUE:
13566                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
13567                         mlx5_hrxq_release(dev, handle->rix_hrxq);
13568                 break;
13569         case MLX5_FLOW_FATE_JUMP:
13570                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
13571                 break;
13572         case MLX5_FLOW_FATE_PORT_ID:
13573                 flow_dv_port_id_action_resource_release(dev,
13574                                 handle->rix_port_id_action);
13575                 break;
13576         default:
13577                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
13578                 break;
13579         }
13580         handle->rix_fate = 0;
13581 }
13582
13583 void
13584 flow_dv_sample_remove_cb(struct mlx5_cache_list *list __rte_unused,
13585                          struct mlx5_cache_entry *entry)
13586 {
13587         struct mlx5_flow_dv_sample_resource *cache_resource =
13588                         container_of(entry, typeof(*cache_resource), entry);
13589         struct rte_eth_dev *dev = cache_resource->dev;
13590         struct mlx5_priv *priv = dev->data->dev_private;
13591
13592         if (cache_resource->verbs_action)
13593                 claim_zero(mlx5_flow_os_destroy_flow_action
13594                                 (cache_resource->verbs_action));
13595         if (cache_resource->normal_path_tbl)
13596                 flow_dv_tbl_resource_release(MLX5_SH(dev),
13597                         cache_resource->normal_path_tbl);
13598         flow_dv_sample_sub_actions_release(dev,
13599                                 &cache_resource->sample_idx);
13600         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
13601                         cache_resource->idx);
13602         DRV_LOG(DEBUG, "sample resource %p: removed",
13603                 (void *)cache_resource);
13604 }
13605
13606 /**
13607  * Release an sample resource.
13608  *
13609  * @param dev
13610  *   Pointer to Ethernet device.
13611  * @param handle
13612  *   Pointer to mlx5_flow_handle.
13613  *
13614  * @return
13615  *   1 while a reference on it exists, 0 when freed.
13616  */
13617 static int
13618 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
13619                                      struct mlx5_flow_handle *handle)
13620 {
13621         struct mlx5_priv *priv = dev->data->dev_private;
13622         struct mlx5_flow_dv_sample_resource *cache_resource;
13623
13624         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
13625                          handle->dvh.rix_sample);
13626         if (!cache_resource)
13627                 return 0;
13628         MLX5_ASSERT(cache_resource->verbs_action);
13629         return mlx5_cache_unregister(&priv->sh->sample_action_list,
13630                                      &cache_resource->entry);
13631 }
13632
13633 void
13634 flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list __rte_unused,
13635                              struct mlx5_cache_entry *entry)
13636 {
13637         struct mlx5_flow_dv_dest_array_resource *cache_resource =
13638                         container_of(entry, typeof(*cache_resource), entry);
13639         struct rte_eth_dev *dev = cache_resource->dev;
13640         struct mlx5_priv *priv = dev->data->dev_private;
13641         uint32_t i = 0;
13642
13643         MLX5_ASSERT(cache_resource->action);
13644         if (cache_resource->action)
13645                 claim_zero(mlx5_flow_os_destroy_flow_action
13646                                         (cache_resource->action));
13647         for (; i < cache_resource->num_of_dest; i++)
13648                 flow_dv_sample_sub_actions_release(dev,
13649                                 &cache_resource->sample_idx[i]);
13650         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
13651                         cache_resource->idx);
13652         DRV_LOG(DEBUG, "destination array resource %p: removed",
13653                 (void *)cache_resource);
13654 }
13655
13656 /**
13657  * Release an destination array resource.
13658  *
13659  * @param dev
13660  *   Pointer to Ethernet device.
13661  * @param handle
13662  *   Pointer to mlx5_flow_handle.
13663  *
13664  * @return
13665  *   1 while a reference on it exists, 0 when freed.
13666  */
13667 static int
13668 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
13669                                     struct mlx5_flow_handle *handle)
13670 {
13671         struct mlx5_priv *priv = dev->data->dev_private;
13672         struct mlx5_flow_dv_dest_array_resource *cache;
13673
13674         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
13675                                handle->dvh.rix_dest_array);
13676         if (!cache)
13677                 return 0;
13678         MLX5_ASSERT(cache->action);
13679         return mlx5_cache_unregister(&priv->sh->dest_array_list,
13680                                      &cache->entry);
13681 }
13682
13683 static void
13684 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
13685 {
13686         struct mlx5_priv *priv = dev->data->dev_private;
13687         struct mlx5_dev_ctx_shared *sh = priv->sh;
13688         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
13689                                 sh->geneve_tlv_option_resource;
13690         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
13691         if (geneve_opt_resource) {
13692                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
13693                                          __ATOMIC_RELAXED))) {
13694                         claim_zero(mlx5_devx_cmd_destroy
13695                                         (geneve_opt_resource->obj));
13696                         mlx5_free(sh->geneve_tlv_option_resource);
13697                         sh->geneve_tlv_option_resource = NULL;
13698                 }
13699         }
13700         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
13701 }
13702
13703 /**
13704  * Remove the flow from the NIC but keeps it in memory.
13705  * Lock free, (mutex should be acquired by caller).
13706  *
13707  * @param[in] dev
13708  *   Pointer to Ethernet device.
13709  * @param[in, out] flow
13710  *   Pointer to flow structure.
13711  */
13712 static void
13713 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
13714 {
13715         struct mlx5_flow_handle *dh;
13716         uint32_t handle_idx;
13717         struct mlx5_priv *priv = dev->data->dev_private;
13718
13719         if (!flow)
13720                 return;
13721         handle_idx = flow->dev_handles;
13722         while (handle_idx) {
13723                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
13724                                     handle_idx);
13725                 if (!dh)
13726                         return;
13727                 if (dh->drv_flow) {
13728                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
13729                         dh->drv_flow = NULL;
13730                 }
13731                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
13732                         flow_dv_fate_resource_release(dev, dh);
13733                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13734                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13735                 handle_idx = dh->next.next;
13736         }
13737 }
13738
13739 /**
13740  * Remove the flow from the NIC and the memory.
13741  * Lock free, (mutex should be acquired by caller).
13742  *
13743  * @param[in] dev
13744  *   Pointer to the Ethernet device structure.
13745  * @param[in, out] flow
13746  *   Pointer to flow structure.
13747  */
13748 static void
13749 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
13750 {
13751         struct mlx5_flow_handle *dev_handle;
13752         struct mlx5_priv *priv = dev->data->dev_private;
13753         struct mlx5_flow_meter_info *fm = NULL;
13754         uint32_t srss = 0;
13755
13756         if (!flow)
13757                 return;
13758         flow_dv_remove(dev, flow);
13759         if (flow->counter) {
13760                 flow_dv_counter_free(dev, flow->counter);
13761                 flow->counter = 0;
13762         }
13763         if (flow->meter) {
13764                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
13765                 if (fm)
13766                         mlx5_flow_meter_detach(priv, fm);
13767                 flow->meter = 0;
13768         }
13769         /* Keep the current age handling by default. */
13770         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
13771                 flow_dv_aso_ct_release(dev, flow->ct);
13772         else if (flow->age)
13773                 flow_dv_aso_age_release(dev, flow->age);
13774         if (flow->geneve_tlv_option) {
13775                 flow_dv_geneve_tlv_option_resource_release(dev);
13776                 flow->geneve_tlv_option = 0;
13777         }
13778         while (flow->dev_handles) {
13779                 uint32_t tmp_idx = flow->dev_handles;
13780
13781                 dev_handle = mlx5_ipool_get(priv->sh->ipool
13782                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
13783                 if (!dev_handle)
13784                         return;
13785                 flow->dev_handles = dev_handle->next.next;
13786                 if (dev_handle->dvh.matcher)
13787                         flow_dv_matcher_release(dev, dev_handle);
13788                 if (dev_handle->dvh.rix_sample)
13789                         flow_dv_sample_resource_release(dev, dev_handle);
13790                 if (dev_handle->dvh.rix_dest_array)
13791                         flow_dv_dest_array_resource_release(dev, dev_handle);
13792                 if (dev_handle->dvh.rix_encap_decap)
13793                         flow_dv_encap_decap_resource_release(dev,
13794                                 dev_handle->dvh.rix_encap_decap);
13795                 if (dev_handle->dvh.modify_hdr)
13796                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
13797                 if (dev_handle->dvh.rix_push_vlan)
13798                         flow_dv_push_vlan_action_resource_release(dev,
13799                                                                   dev_handle);
13800                 if (dev_handle->dvh.rix_tag)
13801                         flow_dv_tag_release(dev,
13802                                             dev_handle->dvh.rix_tag);
13803                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
13804                         flow_dv_fate_resource_release(dev, dev_handle);
13805                 else if (!srss)
13806                         srss = dev_handle->rix_srss;
13807                 if (fm && dev_handle->is_meter_flow_id &&
13808                     dev_handle->split_flow_id)
13809                         mlx5_ipool_free(fm->flow_ipool,
13810                                         dev_handle->split_flow_id);
13811                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
13812                            tmp_idx);
13813         }
13814         if (srss)
13815                 flow_dv_shared_rss_action_release(dev, srss);
13816 }
13817
13818 /**
13819  * Release array of hash RX queue objects.
13820  * Helper function.
13821  *
13822  * @param[in] dev
13823  *   Pointer to the Ethernet device structure.
13824  * @param[in, out] hrxqs
13825  *   Array of hash RX queue objects.
13826  *
13827  * @return
13828  *   Total number of references to hash RX queue objects in *hrxqs* array
13829  *   after this operation.
13830  */
13831 static int
13832 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
13833                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
13834 {
13835         size_t i;
13836         int remaining = 0;
13837
13838         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
13839                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
13840
13841                 if (!ret)
13842                         (*hrxqs)[i] = 0;
13843                 remaining += ret;
13844         }
13845         return remaining;
13846 }
13847
13848 /**
13849  * Release all hash RX queue objects representing shared RSS action.
13850  *
13851  * @param[in] dev
13852  *   Pointer to the Ethernet device structure.
13853  * @param[in, out] action
13854  *   Shared RSS action to remove hash RX queue objects from.
13855  *
13856  * @return
13857  *   Total number of references to hash RX queue objects stored in *action*
13858  *   after this operation.
13859  *   Expected to be 0 if no external references held.
13860  */
13861 static int
13862 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
13863                                  struct mlx5_shared_action_rss *shared_rss)
13864 {
13865         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
13866 }
13867
13868 /**
13869  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
13870  * user input.
13871  *
13872  * Only one hash value is available for one L3+L4 combination:
13873  * for example:
13874  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
13875  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
13876  * same slot in mlx5_rss_hash_fields.
13877  *
13878  * @param[in] rss
13879  *   Pointer to the shared action RSS conf.
13880  * @param[in, out] hash_field
13881  *   hash_field variable needed to be adjusted.
13882  *
13883  * @return
13884  *   void
13885  */
13886 static void
13887 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
13888                                      uint64_t *hash_field)
13889 {
13890         uint64_t rss_types = rss->origin.types;
13891
13892         switch (*hash_field & ~IBV_RX_HASH_INNER) {
13893         case MLX5_RSS_HASH_IPV4:
13894                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
13895                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
13896                         if (rss_types & ETH_RSS_L3_DST_ONLY)
13897                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
13898                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
13899                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
13900                         else
13901                                 *hash_field |= MLX5_RSS_HASH_IPV4;
13902                 }
13903                 return;
13904         case MLX5_RSS_HASH_IPV6:
13905                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
13906                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
13907                         if (rss_types & ETH_RSS_L3_DST_ONLY)
13908                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
13909                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
13910                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
13911                         else
13912                                 *hash_field |= MLX5_RSS_HASH_IPV6;
13913                 }
13914                 return;
13915         case MLX5_RSS_HASH_IPV4_UDP:
13916                 /* fall-through. */
13917         case MLX5_RSS_HASH_IPV6_UDP:
13918                 if (rss_types & ETH_RSS_UDP) {
13919                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
13920                         if (rss_types & ETH_RSS_L4_DST_ONLY)
13921                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
13922                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
13923                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
13924                         else
13925                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
13926                 }
13927                 return;
13928         case MLX5_RSS_HASH_IPV4_TCP:
13929                 /* fall-through. */
13930         case MLX5_RSS_HASH_IPV6_TCP:
13931                 if (rss_types & ETH_RSS_TCP) {
13932                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
13933                         if (rss_types & ETH_RSS_L4_DST_ONLY)
13934                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
13935                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
13936                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
13937                         else
13938                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
13939                 }
13940                 return;
13941         default:
13942                 return;
13943         }
13944 }
13945
13946 /**
13947  * Setup shared RSS action.
13948  * Prepare set of hash RX queue objects sufficient to handle all valid
13949  * hash_fields combinations (see enum ibv_rx_hash_fields).
13950  *
13951  * @param[in] dev
13952  *   Pointer to the Ethernet device structure.
13953  * @param[in] action_idx
13954  *   Shared RSS action ipool index.
13955  * @param[in, out] action
13956  *   Partially initialized shared RSS action.
13957  * @param[out] error
13958  *   Perform verbose error reporting if not NULL. Initialized in case of
13959  *   error only.
13960  *
13961  * @return
13962  *   0 on success, otherwise negative errno value.
13963  */
13964 static int
13965 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
13966                            uint32_t action_idx,
13967                            struct mlx5_shared_action_rss *shared_rss,
13968                            struct rte_flow_error *error)
13969 {
13970         struct mlx5_flow_rss_desc rss_desc = { 0 };
13971         size_t i;
13972         int err;
13973
13974         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
13975                 return rte_flow_error_set(error, rte_errno,
13976                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13977                                           "cannot setup indirection table");
13978         }
13979         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
13980         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
13981         rss_desc.const_q = shared_rss->origin.queue;
13982         rss_desc.queue_num = shared_rss->origin.queue_num;
13983         /* Set non-zero value to indicate a shared RSS. */
13984         rss_desc.shared_rss = action_idx;
13985         rss_desc.ind_tbl = shared_rss->ind_tbl;
13986         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
13987                 uint32_t hrxq_idx;
13988                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
13989                 int tunnel = 0;
13990
13991                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
13992                 if (shared_rss->origin.level > 1) {
13993                         hash_fields |= IBV_RX_HASH_INNER;
13994                         tunnel = 1;
13995                 }
13996                 rss_desc.tunnel = tunnel;
13997                 rss_desc.hash_fields = hash_fields;
13998                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
13999                 if (!hrxq_idx) {
14000                         rte_flow_error_set
14001                                 (error, rte_errno,
14002                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14003                                  "cannot get hash queue");
14004                         goto error_hrxq_new;
14005                 }
14006                 err = __flow_dv_action_rss_hrxq_set
14007                         (shared_rss, hash_fields, hrxq_idx);
14008                 MLX5_ASSERT(!err);
14009         }
14010         return 0;
14011 error_hrxq_new:
14012         err = rte_errno;
14013         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14014         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14015                 shared_rss->ind_tbl = NULL;
14016         rte_errno = err;
14017         return -rte_errno;
14018 }
14019
14020 /**
14021  * Create shared RSS action.
14022  *
14023  * @param[in] dev
14024  *   Pointer to the Ethernet device structure.
14025  * @param[in] conf
14026  *   Shared action configuration.
14027  * @param[in] rss
14028  *   RSS action specification used to create shared action.
14029  * @param[out] error
14030  *   Perform verbose error reporting if not NULL. Initialized in case of
14031  *   error only.
14032  *
14033  * @return
14034  *   A valid shared action ID in case of success, 0 otherwise and
14035  *   rte_errno is set.
14036  */
14037 static uint32_t
14038 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14039                             const struct rte_flow_indir_action_conf *conf,
14040                             const struct rte_flow_action_rss *rss,
14041                             struct rte_flow_error *error)
14042 {
14043         struct mlx5_priv *priv = dev->data->dev_private;
14044         struct mlx5_shared_action_rss *shared_rss = NULL;
14045         void *queue = NULL;
14046         struct rte_flow_action_rss *origin;
14047         const uint8_t *rss_key;
14048         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14049         uint32_t idx;
14050
14051         RTE_SET_USED(conf);
14052         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14053                             0, SOCKET_ID_ANY);
14054         shared_rss = mlx5_ipool_zmalloc
14055                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14056         if (!shared_rss || !queue) {
14057                 rte_flow_error_set(error, ENOMEM,
14058                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14059                                    "cannot allocate resource memory");
14060                 goto error_rss_init;
14061         }
14062         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14063                 rte_flow_error_set(error, E2BIG,
14064                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14065                                    "rss action number out of range");
14066                 goto error_rss_init;
14067         }
14068         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14069                                           sizeof(*shared_rss->ind_tbl),
14070                                           0, SOCKET_ID_ANY);
14071         if (!shared_rss->ind_tbl) {
14072                 rte_flow_error_set(error, ENOMEM,
14073                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14074                                    "cannot allocate resource memory");
14075                 goto error_rss_init;
14076         }
14077         memcpy(queue, rss->queue, queue_size);
14078         shared_rss->ind_tbl->queues = queue;
14079         shared_rss->ind_tbl->queues_n = rss->queue_num;
14080         origin = &shared_rss->origin;
14081         origin->func = rss->func;
14082         origin->level = rss->level;
14083         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14084         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14085         /* NULL RSS key indicates default RSS key. */
14086         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14087         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14088         origin->key = &shared_rss->key[0];
14089         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14090         origin->queue = queue;
14091         origin->queue_num = rss->queue_num;
14092         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14093                 goto error_rss_init;
14094         rte_spinlock_init(&shared_rss->action_rss_sl);
14095         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14096         rte_spinlock_lock(&priv->shared_act_sl);
14097         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14098                      &priv->rss_shared_actions, idx, shared_rss, next);
14099         rte_spinlock_unlock(&priv->shared_act_sl);
14100         return idx;
14101 error_rss_init:
14102         if (shared_rss) {
14103                 if (shared_rss->ind_tbl)
14104                         mlx5_free(shared_rss->ind_tbl);
14105                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14106                                 idx);
14107         }
14108         if (queue)
14109                 mlx5_free(queue);
14110         return 0;
14111 }
14112
14113 /**
14114  * Destroy the shared RSS action.
14115  * Release related hash RX queue objects.
14116  *
14117  * @param[in] dev
14118  *   Pointer to the Ethernet device structure.
14119  * @param[in] idx
14120  *   The shared RSS action object ID to be removed.
14121  * @param[out] error
14122  *   Perform verbose error reporting if not NULL. Initialized in case of
14123  *   error only.
14124  *
14125  * @return
14126  *   0 on success, otherwise negative errno value.
14127  */
14128 static int
14129 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14130                              struct rte_flow_error *error)
14131 {
14132         struct mlx5_priv *priv = dev->data->dev_private;
14133         struct mlx5_shared_action_rss *shared_rss =
14134             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14135         uint32_t old_refcnt = 1;
14136         int remaining;
14137         uint16_t *queue = NULL;
14138
14139         if (!shared_rss)
14140                 return rte_flow_error_set(error, EINVAL,
14141                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14142                                           "invalid shared action");
14143         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14144         if (remaining)
14145                 return rte_flow_error_set(error, EBUSY,
14146                                           RTE_FLOW_ERROR_TYPE_ACTION,
14147                                           NULL,
14148                                           "shared rss hrxq has references");
14149         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14150                                          0, 0, __ATOMIC_ACQUIRE,
14151                                          __ATOMIC_RELAXED))
14152                 return rte_flow_error_set(error, EBUSY,
14153                                           RTE_FLOW_ERROR_TYPE_ACTION,
14154                                           NULL,
14155                                           "shared rss has references");
14156         queue = shared_rss->ind_tbl->queues;
14157         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14158         if (remaining)
14159                 return rte_flow_error_set(error, EBUSY,
14160                                           RTE_FLOW_ERROR_TYPE_ACTION,
14161                                           NULL,
14162                                           "shared rss indirection table has"
14163                                           " references");
14164         mlx5_free(queue);
14165         rte_spinlock_lock(&priv->shared_act_sl);
14166         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14167                      &priv->rss_shared_actions, idx, shared_rss, next);
14168         rte_spinlock_unlock(&priv->shared_act_sl);
14169         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14170                         idx);
14171         return 0;
14172 }
14173
14174 /**
14175  * Create indirect action, lock free,
14176  * (mutex should be acquired by caller).
14177  * Dispatcher for action type specific call.
14178  *
14179  * @param[in] dev
14180  *   Pointer to the Ethernet device structure.
14181  * @param[in] conf
14182  *   Shared action configuration.
14183  * @param[in] action
14184  *   Action specification used to create indirect action.
14185  * @param[out] error
14186  *   Perform verbose error reporting if not NULL. Initialized in case of
14187  *   error only.
14188  *
14189  * @return
14190  *   A valid shared action handle in case of success, NULL otherwise and
14191  *   rte_errno is set.
14192  */
14193 static struct rte_flow_action_handle *
14194 flow_dv_action_create(struct rte_eth_dev *dev,
14195                       const struct rte_flow_indir_action_conf *conf,
14196                       const struct rte_flow_action *action,
14197                       struct rte_flow_error *err)
14198 {
14199         struct mlx5_priv *priv = dev->data->dev_private;
14200         uint32_t age_idx = 0;
14201         uint32_t idx = 0;
14202         uint32_t ret = 0;
14203
14204         switch (action->type) {
14205         case RTE_FLOW_ACTION_TYPE_RSS:
14206                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14207                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14208                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14209                 break;
14210         case RTE_FLOW_ACTION_TYPE_AGE:
14211                 age_idx = flow_dv_aso_age_alloc(dev, err);
14212                 if (!age_idx) {
14213                         ret = -rte_errno;
14214                         break;
14215                 }
14216                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14217                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14218                 flow_dv_aso_age_params_init(dev, age_idx,
14219                                         ((const struct rte_flow_action_age *)
14220                                                 action->conf)->context ?
14221                                         ((const struct rte_flow_action_age *)
14222                                                 action->conf)->context :
14223                                         (void *)(uintptr_t)idx,
14224                                         ((const struct rte_flow_action_age *)
14225                                                 action->conf)->timeout);
14226                 ret = age_idx;
14227                 break;
14228         case RTE_FLOW_ACTION_TYPE_COUNT:
14229                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14230                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14231                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14232                 break;
14233         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14234                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14235                                                          err);
14236                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14237                 break;
14238         default:
14239                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14240                                    NULL, "action type not supported");
14241                 break;
14242         }
14243         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14244 }
14245
14246 /**
14247  * Destroy the indirect action.
14248  * Release action related resources on the NIC and the memory.
14249  * Lock free, (mutex should be acquired by caller).
14250  * Dispatcher for action type specific call.
14251  *
14252  * @param[in] dev
14253  *   Pointer to the Ethernet device structure.
14254  * @param[in] handle
14255  *   The indirect action object handle to be removed.
14256  * @param[out] error
14257  *   Perform verbose error reporting if not NULL. Initialized in case of
14258  *   error only.
14259  *
14260  * @return
14261  *   0 on success, otherwise negative errno value.
14262  */
14263 static int
14264 flow_dv_action_destroy(struct rte_eth_dev *dev,
14265                        struct rte_flow_action_handle *handle,
14266                        struct rte_flow_error *error)
14267 {
14268         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14269         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14270         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14271         struct mlx5_flow_counter *cnt;
14272         uint32_t no_flow_refcnt = 1;
14273         int ret;
14274
14275         switch (type) {
14276         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14277                 return __flow_dv_action_rss_release(dev, idx, error);
14278         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14279                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14280                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14281                                                  &no_flow_refcnt, 1, false,
14282                                                  __ATOMIC_ACQUIRE,
14283                                                  __ATOMIC_RELAXED))
14284                         return rte_flow_error_set(error, EBUSY,
14285                                                   RTE_FLOW_ERROR_TYPE_ACTION,
14286                                                   NULL,
14287                                                   "Indirect count action has references");
14288                 flow_dv_counter_free(dev, idx);
14289                 return 0;
14290         case MLX5_INDIRECT_ACTION_TYPE_AGE:
14291                 ret = flow_dv_aso_age_release(dev, idx);
14292                 if (ret)
14293                         /*
14294                          * In this case, the last flow has a reference will
14295                          * actually release the age action.
14296                          */
14297                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14298                                 " released with references %d.", idx, ret);
14299                 return 0;
14300         case MLX5_INDIRECT_ACTION_TYPE_CT:
14301                 ret = flow_dv_aso_ct_release(dev, idx);
14302                 if (ret < 0)
14303                         return ret;
14304                 if (ret > 0)
14305                         DRV_LOG(DEBUG, "Connection tracking object %u still "
14306                                 "has references %d.", idx, ret);
14307                 return 0;
14308         default:
14309                 return rte_flow_error_set(error, ENOTSUP,
14310                                           RTE_FLOW_ERROR_TYPE_ACTION,
14311                                           NULL,
14312                                           "action type not supported");
14313         }
14314 }
14315
14316 /**
14317  * Updates in place shared RSS action configuration.
14318  *
14319  * @param[in] dev
14320  *   Pointer to the Ethernet device structure.
14321  * @param[in] idx
14322  *   The shared RSS action object ID to be updated.
14323  * @param[in] action_conf
14324  *   RSS action specification used to modify *shared_rss*.
14325  * @param[out] error
14326  *   Perform verbose error reporting if not NULL. Initialized in case of
14327  *   error only.
14328  *
14329  * @return
14330  *   0 on success, otherwise negative errno value.
14331  * @note: currently only support update of RSS queues.
14332  */
14333 static int
14334 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14335                             const struct rte_flow_action_rss *action_conf,
14336                             struct rte_flow_error *error)
14337 {
14338         struct mlx5_priv *priv = dev->data->dev_private;
14339         struct mlx5_shared_action_rss *shared_rss =
14340             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14341         int ret = 0;
14342         void *queue = NULL;
14343         uint16_t *queue_old = NULL;
14344         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14345
14346         if (!shared_rss)
14347                 return rte_flow_error_set(error, EINVAL,
14348                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14349                                           "invalid shared action to update");
14350         if (priv->obj_ops.ind_table_modify == NULL)
14351                 return rte_flow_error_set(error, ENOTSUP,
14352                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14353                                           "cannot modify indirection table");
14354         queue = mlx5_malloc(MLX5_MEM_ZERO,
14355                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14356                             0, SOCKET_ID_ANY);
14357         if (!queue)
14358                 return rte_flow_error_set(error, ENOMEM,
14359                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14360                                           NULL,
14361                                           "cannot allocate resource memory");
14362         memcpy(queue, action_conf->queue, queue_size);
14363         MLX5_ASSERT(shared_rss->ind_tbl);
14364         rte_spinlock_lock(&shared_rss->action_rss_sl);
14365         queue_old = shared_rss->ind_tbl->queues;
14366         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14367                                         queue, action_conf->queue_num, true);
14368         if (ret) {
14369                 mlx5_free(queue);
14370                 ret = rte_flow_error_set(error, rte_errno,
14371                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14372                                           "cannot update indirection table");
14373         } else {
14374                 mlx5_free(queue_old);
14375                 shared_rss->origin.queue = queue;
14376                 shared_rss->origin.queue_num = action_conf->queue_num;
14377         }
14378         rte_spinlock_unlock(&shared_rss->action_rss_sl);
14379         return ret;
14380 }
14381
14382 /*
14383  * Updates in place conntrack context or direction.
14384  * Context update should be synchronized.
14385  *
14386  * @param[in] dev
14387  *   Pointer to the Ethernet device structure.
14388  * @param[in] idx
14389  *   The conntrack object ID to be updated.
14390  * @param[in] update
14391  *   Pointer to the structure of information to update.
14392  * @param[out] error
14393  *   Perform verbose error reporting if not NULL. Initialized in case of
14394  *   error only.
14395  *
14396  * @return
14397  *   0 on success, otherwise negative errno value.
14398  */
14399 static int
14400 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14401                            const struct rte_flow_modify_conntrack *update,
14402                            struct rte_flow_error *error)
14403 {
14404         struct mlx5_priv *priv = dev->data->dev_private;
14405         struct mlx5_aso_ct_action *ct;
14406         const struct rte_flow_action_conntrack *new_prf;
14407         int ret = 0;
14408         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14409         uint32_t dev_idx;
14410
14411         if (PORT_ID(priv) != owner)
14412                 return rte_flow_error_set(error, EACCES,
14413                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14414                                           NULL,
14415                                           "CT object owned by another port");
14416         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14417         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14418         if (!ct->refcnt)
14419                 return rte_flow_error_set(error, ENOMEM,
14420                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14421                                           NULL,
14422                                           "CT object is inactive");
14423         new_prf = &update->new_ct;
14424         if (update->direction)
14425                 ct->is_original = !!new_prf->is_original_dir;
14426         if (update->state) {
14427                 /* Only validate the profile when it needs to be updated. */
14428                 ret = mlx5_validate_action_ct(dev, new_prf, error);
14429                 if (ret)
14430                         return ret;
14431                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14432                 if (ret)
14433                         return rte_flow_error_set(error, EIO,
14434                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14435                                         NULL,
14436                                         "Failed to send CT context update WQE");
14437                 /* Block until ready or a failure. */
14438                 ret = mlx5_aso_ct_available(priv->sh, ct);
14439                 if (ret)
14440                         rte_flow_error_set(error, rte_errno,
14441                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14442                                            NULL,
14443                                            "Timeout to get the CT update");
14444         }
14445         return ret;
14446 }
14447
14448 /**
14449  * Updates in place shared action configuration, lock free,
14450  * (mutex should be acquired by caller).
14451  *
14452  * @param[in] dev
14453  *   Pointer to the Ethernet device structure.
14454  * @param[in] handle
14455  *   The indirect action object handle to be updated.
14456  * @param[in] update
14457  *   Action specification used to modify the action pointed by *handle*.
14458  *   *update* could be of same type with the action pointed by the *handle*
14459  *   handle argument, or some other structures like a wrapper, depending on
14460  *   the indirect action type.
14461  * @param[out] error
14462  *   Perform verbose error reporting if not NULL. Initialized in case of
14463  *   error only.
14464  *
14465  * @return
14466  *   0 on success, otherwise negative errno value.
14467  */
14468 static int
14469 flow_dv_action_update(struct rte_eth_dev *dev,
14470                         struct rte_flow_action_handle *handle,
14471                         const void *update,
14472                         struct rte_flow_error *err)
14473 {
14474         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14475         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14476         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14477         const void *action_conf;
14478
14479         switch (type) {
14480         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14481                 action_conf = ((const struct rte_flow_action *)update)->conf;
14482                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
14483         case MLX5_INDIRECT_ACTION_TYPE_CT:
14484                 return __flow_dv_action_ct_update(dev, idx, update, err);
14485         default:
14486                 return rte_flow_error_set(err, ENOTSUP,
14487                                           RTE_FLOW_ERROR_TYPE_ACTION,
14488                                           NULL,
14489                                           "action type update not supported");
14490         }
14491 }
14492
14493 /**
14494  * Destroy the meter sub policy table rules.
14495  * Lock free, (mutex should be acquired by caller).
14496  *
14497  * @param[in] dev
14498  *   Pointer to Ethernet device.
14499  * @param[in] sub_policy
14500  *   Pointer to meter sub policy table.
14501  */
14502 static void
14503 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
14504                              struct mlx5_flow_meter_sub_policy *sub_policy)
14505 {
14506         struct mlx5_flow_tbl_data_entry *tbl;
14507         int i;
14508
14509         for (i = 0; i < RTE_COLORS; i++) {
14510                 if (sub_policy->color_rule[i]) {
14511                         claim_zero(mlx5_flow_os_destroy_flow
14512                                 (sub_policy->color_rule[i]));
14513                         sub_policy->color_rule[i] = NULL;
14514                 }
14515                 if (sub_policy->color_matcher[i]) {
14516                         tbl = container_of(sub_policy->color_matcher[i]->tbl,
14517                                 typeof(*tbl), tbl);
14518                         mlx5_cache_unregister(&tbl->matchers,
14519                                       &sub_policy->color_matcher[i]->entry);
14520                         sub_policy->color_matcher[i] = NULL;
14521                 }
14522         }
14523         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14524                 if (sub_policy->rix_hrxq[i]) {
14525                         mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
14526                         sub_policy->rix_hrxq[i] = 0;
14527                 }
14528                 if (sub_policy->jump_tbl[i]) {
14529                         flow_dv_tbl_resource_release(MLX5_SH(dev),
14530                         sub_policy->jump_tbl[i]);
14531                         sub_policy->jump_tbl[i] = NULL;
14532                 }
14533         }
14534         if (sub_policy->tbl_rsc) {
14535                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14536                         sub_policy->tbl_rsc);
14537                 sub_policy->tbl_rsc = NULL;
14538         }
14539 }
14540
14541 /**
14542  * Destroy policy rules, lock free,
14543  * (mutex should be acquired by caller).
14544  * Dispatcher for action type specific call.
14545  *
14546  * @param[in] dev
14547  *   Pointer to the Ethernet device structure.
14548  * @param[in] mtr_policy
14549  *   Meter policy struct.
14550  */
14551 static void
14552 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
14553                       struct mlx5_flow_meter_policy *mtr_policy)
14554 {
14555         uint32_t i, j;
14556         struct mlx5_flow_meter_sub_policy *sub_policy;
14557         uint16_t sub_policy_num;
14558
14559         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
14560                 sub_policy_num = (mtr_policy->sub_policy_num >>
14561                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
14562                         MLX5_MTR_SUB_POLICY_NUM_MASK;
14563                 for (j = 0; j < sub_policy_num; j++) {
14564                         sub_policy = mtr_policy->sub_policys[i][j];
14565                         if (sub_policy)
14566                                 __flow_dv_destroy_sub_policy_rules
14567                                                 (dev, sub_policy);
14568                 }
14569         }
14570 }
14571
14572 /**
14573  * Destroy policy action, lock free,
14574  * (mutex should be acquired by caller).
14575  * Dispatcher for action type specific call.
14576  *
14577  * @param[in] dev
14578  *   Pointer to the Ethernet device structure.
14579  * @param[in] mtr_policy
14580  *   Meter policy struct.
14581  */
14582 static void
14583 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
14584                       struct mlx5_flow_meter_policy *mtr_policy)
14585 {
14586         struct rte_flow_action *rss_action;
14587         struct mlx5_flow_handle dev_handle;
14588         uint32_t i, j;
14589
14590         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14591                 if (mtr_policy->act_cnt[i].rix_mark) {
14592                         flow_dv_tag_release(dev,
14593                                 mtr_policy->act_cnt[i].rix_mark);
14594                         mtr_policy->act_cnt[i].rix_mark = 0;
14595                 }
14596                 if (mtr_policy->act_cnt[i].modify_hdr) {
14597                         dev_handle.dvh.modify_hdr =
14598                                 mtr_policy->act_cnt[i].modify_hdr;
14599                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
14600                 }
14601                 switch (mtr_policy->act_cnt[i].fate_action) {
14602                 case MLX5_FLOW_FATE_SHARED_RSS:
14603                         rss_action = mtr_policy->act_cnt[i].rss;
14604                         mlx5_free(rss_action);
14605                         break;
14606                 case MLX5_FLOW_FATE_PORT_ID:
14607                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
14608                                 flow_dv_port_id_action_resource_release(dev,
14609                                 mtr_policy->act_cnt[i].rix_port_id_action);
14610                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
14611                         }
14612                         break;
14613                 case MLX5_FLOW_FATE_DROP:
14614                 case MLX5_FLOW_FATE_JUMP:
14615                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
14616                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
14617                                                 NULL;
14618                         break;
14619                 default:
14620                         /*Queue action do nothing*/
14621                         break;
14622                 }
14623         }
14624         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
14625                 mtr_policy->dr_drop_action[j] = NULL;
14626 }
14627
14628 /**
14629  * Create policy action per domain, lock free,
14630  * (mutex should be acquired by caller).
14631  * Dispatcher for action type specific call.
14632  *
14633  * @param[in] dev
14634  *   Pointer to the Ethernet device structure.
14635  * @param[in] mtr_policy
14636  *   Meter policy struct.
14637  * @param[in] action
14638  *   Action specification used to create meter actions.
14639  * @param[out] error
14640  *   Perform verbose error reporting if not NULL. Initialized in case of
14641  *   error only.
14642  *
14643  * @return
14644  *   0 on success, otherwise negative errno value.
14645  */
14646 static int
14647 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
14648                         struct mlx5_flow_meter_policy *mtr_policy,
14649                         const struct rte_flow_action *actions[RTE_COLORS],
14650                         enum mlx5_meter_domain domain,
14651                         struct rte_mtr_error *error)
14652 {
14653         struct mlx5_priv *priv = dev->data->dev_private;
14654         struct rte_flow_error flow_err;
14655         const struct rte_flow_action *act;
14656         uint64_t action_flags = 0;
14657         struct mlx5_flow_handle dh;
14658         struct mlx5_flow dev_flow;
14659         struct mlx5_flow_dv_port_id_action_resource port_id_action;
14660         int i, ret;
14661         uint8_t egress, transfer;
14662         struct mlx5_meter_policy_action_container *act_cnt = NULL;
14663         union {
14664                 struct mlx5_flow_dv_modify_hdr_resource res;
14665                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
14666                             sizeof(struct mlx5_modification_cmd) *
14667                             (MLX5_MAX_MODIFY_NUM + 1)];
14668         } mhdr_dummy;
14669
14670         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
14671         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
14672         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
14673         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
14674         memset(&port_id_action, 0,
14675                 sizeof(struct mlx5_flow_dv_port_id_action_resource));
14676         dev_flow.handle = &dh;
14677         dev_flow.dv.port_id_action = &port_id_action;
14678         dev_flow.external = true;
14679         for (i = 0; i < RTE_COLORS; i++) {
14680                 if (i < MLX5_MTR_RTE_COLORS)
14681                         act_cnt = &mtr_policy->act_cnt[i];
14682                 for (act = actions[i];
14683                         act && act->type != RTE_FLOW_ACTION_TYPE_END;
14684                         act++) {
14685                         switch (act->type) {
14686                         case RTE_FLOW_ACTION_TYPE_MARK:
14687                         {
14688                                 uint32_t tag_be = mlx5_flow_mark_set
14689                                         (((const struct rte_flow_action_mark *)
14690                                         (act->conf))->id);
14691
14692                                 if (i >= MLX5_MTR_RTE_COLORS)
14693                                         return -rte_mtr_error_set(error,
14694                                           ENOTSUP,
14695                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14696                                           NULL,
14697                                           "cannot create policy "
14698                                           "mark action for this color");
14699                                 dev_flow.handle->mark = 1;
14700                                 if (flow_dv_tag_resource_register(dev, tag_be,
14701                                                   &dev_flow, &flow_err))
14702                                         return -rte_mtr_error_set(error,
14703                                         ENOTSUP,
14704                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14705                                         NULL,
14706                                         "cannot setup policy mark action");
14707                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
14708                                 act_cnt->rix_mark =
14709                                         dev_flow.handle->dvh.rix_tag;
14710                                 action_flags |= MLX5_FLOW_ACTION_MARK;
14711                                 break;
14712                         }
14713                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
14714                         {
14715                                 struct mlx5_flow_dv_modify_hdr_resource
14716                                         *mhdr_res = &mhdr_dummy.res;
14717
14718                                 if (i >= MLX5_MTR_RTE_COLORS)
14719                                         return -rte_mtr_error_set(error,
14720                                           ENOTSUP,
14721                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14722                                           NULL,
14723                                           "cannot create policy "
14724                                           "set tag action for this color");
14725                                 memset(mhdr_res, 0, sizeof(*mhdr_res));
14726                                 mhdr_res->ft_type = transfer ?
14727                                         MLX5DV_FLOW_TABLE_TYPE_FDB :
14728                                         egress ?
14729                                         MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
14730                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
14731                                 if (flow_dv_convert_action_set_tag
14732                                 (dev, mhdr_res,
14733                                 (const struct rte_flow_action_set_tag *)
14734                                 act->conf,  &flow_err))
14735                                         return -rte_mtr_error_set(error,
14736                                         ENOTSUP,
14737                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14738                                         NULL, "cannot convert policy "
14739                                         "set tag action");
14740                                 if (!mhdr_res->actions_num)
14741                                         return -rte_mtr_error_set(error,
14742                                         ENOTSUP,
14743                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14744                                         NULL, "cannot find policy "
14745                                         "set tag action");
14746                                 /* create modify action if needed. */
14747                                 dev_flow.dv.group = 1;
14748                                 if (flow_dv_modify_hdr_resource_register
14749                                         (dev, mhdr_res, &dev_flow, &flow_err))
14750                                         return -rte_mtr_error_set(error,
14751                                         ENOTSUP,
14752                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14753                                         NULL, "cannot register policy "
14754                                         "set tag action");
14755                                 act_cnt->modify_hdr =
14756                                 dev_flow.handle->dvh.modify_hdr;
14757                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
14758                                 break;
14759                         }
14760                         case RTE_FLOW_ACTION_TYPE_DROP:
14761                         {
14762                                 struct mlx5_flow_mtr_mng *mtrmng =
14763                                                 priv->sh->mtrmng;
14764                                 struct mlx5_flow_tbl_data_entry *tbl_data;
14765
14766                                 /*
14767                                  * Create the drop table with
14768                                  * METER DROP level.
14769                                  */
14770                                 if (!mtrmng->drop_tbl[domain]) {
14771                                         mtrmng->drop_tbl[domain] =
14772                                         flow_dv_tbl_resource_get(dev,
14773                                         MLX5_FLOW_TABLE_LEVEL_METER,
14774                                         egress, transfer, false, NULL, 0,
14775                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
14776                                         if (!mtrmng->drop_tbl[domain])
14777                                                 return -rte_mtr_error_set
14778                                         (error, ENOTSUP,
14779                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14780                                         NULL,
14781                                         "Failed to create meter drop table");
14782                                 }
14783                                 tbl_data = container_of
14784                                 (mtrmng->drop_tbl[domain],
14785                                 struct mlx5_flow_tbl_data_entry, tbl);
14786                                 if (i < MLX5_MTR_RTE_COLORS) {
14787                                         act_cnt->dr_jump_action[domain] =
14788                                                 tbl_data->jump.action;
14789                                         act_cnt->fate_action =
14790                                                 MLX5_FLOW_FATE_DROP;
14791                                 }
14792                                 if (i == RTE_COLOR_RED)
14793                                         mtr_policy->dr_drop_action[domain] =
14794                                                 tbl_data->jump.action;
14795                                 action_flags |= MLX5_FLOW_ACTION_DROP;
14796                                 break;
14797                         }
14798                         case RTE_FLOW_ACTION_TYPE_QUEUE:
14799                         {
14800                                 if (i >= MLX5_MTR_RTE_COLORS)
14801                                         return -rte_mtr_error_set(error,
14802                                         ENOTSUP,
14803                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14804                                         NULL, "cannot create policy "
14805                                         "fate queue for this color");
14806                                 act_cnt->queue =
14807                                 ((const struct rte_flow_action_queue *)
14808                                         (act->conf))->index;
14809                                 act_cnt->fate_action =
14810                                         MLX5_FLOW_FATE_QUEUE;
14811                                 dev_flow.handle->fate_action =
14812                                         MLX5_FLOW_FATE_QUEUE;
14813                                 mtr_policy->is_queue = 1;
14814                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
14815                                 break;
14816                         }
14817                         case RTE_FLOW_ACTION_TYPE_RSS:
14818                         {
14819                                 int rss_size;
14820
14821                                 if (i >= MLX5_MTR_RTE_COLORS)
14822                                         return -rte_mtr_error_set(error,
14823                                           ENOTSUP,
14824                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14825                                           NULL,
14826                                           "cannot create policy "
14827                                           "rss action for this color");
14828                                 /*
14829                                  * Save RSS conf into policy struct
14830                                  * for translate stage.
14831                                  */
14832                                 rss_size = (int)rte_flow_conv
14833                                         (RTE_FLOW_CONV_OP_ACTION,
14834                                         NULL, 0, act, &flow_err);
14835                                 if (rss_size <= 0)
14836                                         return -rte_mtr_error_set(error,
14837                                           ENOTSUP,
14838                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14839                                           NULL, "Get the wrong "
14840                                           "rss action struct size");
14841                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
14842                                                 rss_size, 0, SOCKET_ID_ANY);
14843                                 if (!act_cnt->rss)
14844                                         return -rte_mtr_error_set(error,
14845                                           ENOTSUP,
14846                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14847                                           NULL,
14848                                           "Fail to malloc rss action memory");
14849                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
14850                                         act_cnt->rss, rss_size,
14851                                         act, &flow_err);
14852                                 if (ret < 0)
14853                                         return -rte_mtr_error_set(error,
14854                                           ENOTSUP,
14855                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14856                                           NULL, "Fail to save "
14857                                           "rss action into policy struct");
14858                                 act_cnt->fate_action =
14859                                         MLX5_FLOW_FATE_SHARED_RSS;
14860                                 action_flags |= MLX5_FLOW_ACTION_RSS;
14861                                 break;
14862                         }
14863                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
14864                         {
14865                                 struct mlx5_flow_dv_port_id_action_resource
14866                                         port_id_resource;
14867                                 uint32_t port_id = 0;
14868
14869                                 if (i >= MLX5_MTR_RTE_COLORS)
14870                                         return -rte_mtr_error_set(error,
14871                                         ENOTSUP,
14872                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14873                                         NULL, "cannot create policy "
14874                                         "port action for this color");
14875                                 memset(&port_id_resource, 0,
14876                                         sizeof(port_id_resource));
14877                                 if (flow_dv_translate_action_port_id(dev, act,
14878                                                 &port_id, &flow_err))
14879                                         return -rte_mtr_error_set(error,
14880                                         ENOTSUP,
14881                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14882                                         NULL, "cannot translate "
14883                                         "policy port action");
14884                                 port_id_resource.port_id = port_id;
14885                                 if (flow_dv_port_id_action_resource_register
14886                                         (dev, &port_id_resource,
14887                                         &dev_flow, &flow_err))
14888                                         return -rte_mtr_error_set(error,
14889                                         ENOTSUP,
14890                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14891                                         NULL, "cannot setup "
14892                                         "policy port action");
14893                                 act_cnt->rix_port_id_action =
14894                                         dev_flow.handle->rix_port_id_action;
14895                                 act_cnt->fate_action =
14896                                         MLX5_FLOW_FATE_PORT_ID;
14897                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
14898                                 break;
14899                         }
14900                         case RTE_FLOW_ACTION_TYPE_JUMP:
14901                         {
14902                                 uint32_t jump_group = 0;
14903                                 uint32_t table = 0;
14904                                 struct mlx5_flow_tbl_data_entry *tbl_data;
14905                                 struct flow_grp_info grp_info = {
14906                                         .external = !!dev_flow.external,
14907                                         .transfer = !!transfer,
14908                                         .fdb_def_rule = !!priv->fdb_def_rule,
14909                                         .std_tbl_fix = 0,
14910                                         .skip_scale = dev_flow.skip_scale &
14911                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
14912                                 };
14913                                 struct mlx5_flow_meter_sub_policy *sub_policy =
14914                                 mtr_policy->sub_policys[domain][0];
14915
14916                                 if (i >= MLX5_MTR_RTE_COLORS)
14917                                         return -rte_mtr_error_set(error,
14918                                           ENOTSUP,
14919                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14920                                           NULL,
14921                                           "cannot create policy "
14922                                           "jump action for this color");
14923                                 jump_group =
14924                                 ((const struct rte_flow_action_jump *)
14925                                                         act->conf)->group;
14926                                 if (mlx5_flow_group_to_table(dev, NULL,
14927                                                        jump_group,
14928                                                        &table,
14929                                                        &grp_info, &flow_err))
14930                                         return -rte_mtr_error_set(error,
14931                                         ENOTSUP,
14932                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14933                                         NULL, "cannot setup "
14934                                         "policy jump action");
14935                                 sub_policy->jump_tbl[i] =
14936                                 flow_dv_tbl_resource_get(dev,
14937                                         table, egress,
14938                                         transfer,
14939                                         !!dev_flow.external,
14940                                         NULL, jump_group, 0,
14941                                         0, &flow_err);
14942                                 if
14943                                 (!sub_policy->jump_tbl[i])
14944                                         return  -rte_mtr_error_set(error,
14945                                         ENOTSUP,
14946                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14947                                         NULL, "cannot create jump action.");
14948                                 tbl_data = container_of
14949                                 (sub_policy->jump_tbl[i],
14950                                 struct mlx5_flow_tbl_data_entry, tbl);
14951                                 act_cnt->dr_jump_action[domain] =
14952                                         tbl_data->jump.action;
14953                                 act_cnt->fate_action =
14954                                         MLX5_FLOW_FATE_JUMP;
14955                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
14956                                 break;
14957                         }
14958                         default:
14959                                 return -rte_mtr_error_set(error, ENOTSUP,
14960                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14961                                           NULL, "action type not supported");
14962                         }
14963                 }
14964         }
14965         return 0;
14966 }
14967
14968 /**
14969  * Create policy action per domain, lock free,
14970  * (mutex should be acquired by caller).
14971  * Dispatcher for action type specific call.
14972  *
14973  * @param[in] dev
14974  *   Pointer to the Ethernet device structure.
14975  * @param[in] mtr_policy
14976  *   Meter policy struct.
14977  * @param[in] action
14978  *   Action specification used to create meter actions.
14979  * @param[out] error
14980  *   Perform verbose error reporting if not NULL. Initialized in case of
14981  *   error only.
14982  *
14983  * @return
14984  *   0 on success, otherwise negative errno value.
14985  */
14986 static int
14987 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
14988                       struct mlx5_flow_meter_policy *mtr_policy,
14989                       const struct rte_flow_action *actions[RTE_COLORS],
14990                       struct rte_mtr_error *error)
14991 {
14992         int ret, i;
14993         uint16_t sub_policy_num;
14994
14995         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
14996                 sub_policy_num = (mtr_policy->sub_policy_num >>
14997                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
14998                         MLX5_MTR_SUB_POLICY_NUM_MASK;
14999                 if (sub_policy_num) {
15000                         ret = __flow_dv_create_domain_policy_acts(dev,
15001                                 mtr_policy, actions,
15002                                 (enum mlx5_meter_domain)i, error);
15003                         if (ret)
15004                                 return ret;
15005                 }
15006         }
15007         return 0;
15008 }
15009
15010 /**
15011  * Query a DV flow rule for its statistics via DevX.
15012  *
15013  * @param[in] dev
15014  *   Pointer to Ethernet device.
15015  * @param[in] cnt_idx
15016  *   Index to the flow counter.
15017  * @param[out] data
15018  *   Data retrieved by the query.
15019  * @param[out] error
15020  *   Perform verbose error reporting if not NULL.
15021  *
15022  * @return
15023  *   0 on success, a negative errno value otherwise and rte_errno is set.
15024  */
15025 static int
15026 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15027                     struct rte_flow_error *error)
15028 {
15029         struct mlx5_priv *priv = dev->data->dev_private;
15030         struct rte_flow_query_count *qc = data;
15031
15032         if (!priv->config.devx)
15033                 return rte_flow_error_set(error, ENOTSUP,
15034                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15035                                           NULL,
15036                                           "counters are not supported");
15037         if (cnt_idx) {
15038                 uint64_t pkts, bytes;
15039                 struct mlx5_flow_counter *cnt;
15040                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15041
15042                 if (err)
15043                         return rte_flow_error_set(error, -err,
15044                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15045                                         NULL, "cannot read counters");
15046                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15047                 qc->hits_set = 1;
15048                 qc->bytes_set = 1;
15049                 qc->hits = pkts - cnt->hits;
15050                 qc->bytes = bytes - cnt->bytes;
15051                 if (qc->reset) {
15052                         cnt->hits = pkts;
15053                         cnt->bytes = bytes;
15054                 }
15055                 return 0;
15056         }
15057         return rte_flow_error_set(error, EINVAL,
15058                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15059                                   NULL,
15060                                   "counters are not available");
15061 }
15062
15063 static int
15064 flow_dv_action_query(struct rte_eth_dev *dev,
15065                      const struct rte_flow_action_handle *handle, void *data,
15066                      struct rte_flow_error *error)
15067 {
15068         struct mlx5_age_param *age_param;
15069         struct rte_flow_query_age *resp;
15070         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15071         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15072         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15073         struct mlx5_priv *priv = dev->data->dev_private;
15074         struct mlx5_aso_ct_action *ct;
15075         uint16_t owner;
15076         uint32_t dev_idx;
15077
15078         switch (type) {
15079         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15080                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15081                 resp = data;
15082                 resp->aged = __atomic_load_n(&age_param->state,
15083                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
15084                                                                           1 : 0;
15085                 resp->sec_since_last_hit_valid = !resp->aged;
15086                 if (resp->sec_since_last_hit_valid)
15087                         resp->sec_since_last_hit = __atomic_load_n
15088                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15089                 return 0;
15090         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15091                 return flow_dv_query_count(dev, idx, data, error);
15092         case MLX5_INDIRECT_ACTION_TYPE_CT:
15093                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15094                 if (owner != PORT_ID(priv))
15095                         return rte_flow_error_set(error, EACCES,
15096                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15097                                         NULL,
15098                                         "CT object owned by another port");
15099                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15100                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15101                 MLX5_ASSERT(ct);
15102                 if (!ct->refcnt)
15103                         return rte_flow_error_set(error, EFAULT,
15104                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15105                                         NULL,
15106                                         "CT object is inactive");
15107                 ((struct rte_flow_action_conntrack *)data)->peer_port =
15108                                                         ct->peer;
15109                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15110                                                         ct->is_original;
15111                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15112                         return rte_flow_error_set(error, EIO,
15113                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15114                                         NULL,
15115                                         "Failed to query CT context");
15116                 return 0;
15117         default:
15118                 return rte_flow_error_set(error, ENOTSUP,
15119                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15120                                           "action type query not supported");
15121         }
15122 }
15123
15124 /**
15125  * Query a flow rule AGE action for aging information.
15126  *
15127  * @param[in] dev
15128  *   Pointer to Ethernet device.
15129  * @param[in] flow
15130  *   Pointer to the sub flow.
15131  * @param[out] data
15132  *   data retrieved by the query.
15133  * @param[out] error
15134  *   Perform verbose error reporting if not NULL.
15135  *
15136  * @return
15137  *   0 on success, a negative errno value otherwise and rte_errno is set.
15138  */
15139 static int
15140 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15141                   void *data, struct rte_flow_error *error)
15142 {
15143         struct rte_flow_query_age *resp = data;
15144         struct mlx5_age_param *age_param;
15145
15146         if (flow->age) {
15147                 struct mlx5_aso_age_action *act =
15148                                      flow_aso_age_get_by_idx(dev, flow->age);
15149
15150                 age_param = &act->age_params;
15151         } else if (flow->counter) {
15152                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15153
15154                 if (!age_param || !age_param->timeout)
15155                         return rte_flow_error_set
15156                                         (error, EINVAL,
15157                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15158                                          NULL, "cannot read age data");
15159         } else {
15160                 return rte_flow_error_set(error, EINVAL,
15161                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15162                                           NULL, "age data not available");
15163         }
15164         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15165                                      AGE_TMOUT ? 1 : 0;
15166         resp->sec_since_last_hit_valid = !resp->aged;
15167         if (resp->sec_since_last_hit_valid)
15168                 resp->sec_since_last_hit = __atomic_load_n
15169                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15170         return 0;
15171 }
15172
15173 /**
15174  * Query a flow.
15175  *
15176  * @see rte_flow_query()
15177  * @see rte_flow_ops
15178  */
15179 static int
15180 flow_dv_query(struct rte_eth_dev *dev,
15181               struct rte_flow *flow __rte_unused,
15182               const struct rte_flow_action *actions __rte_unused,
15183               void *data __rte_unused,
15184               struct rte_flow_error *error __rte_unused)
15185 {
15186         int ret = -EINVAL;
15187
15188         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15189                 switch (actions->type) {
15190                 case RTE_FLOW_ACTION_TYPE_VOID:
15191                         break;
15192                 case RTE_FLOW_ACTION_TYPE_COUNT:
15193                         ret = flow_dv_query_count(dev, flow->counter, data,
15194                                                   error);
15195                         break;
15196                 case RTE_FLOW_ACTION_TYPE_AGE:
15197                         ret = flow_dv_query_age(dev, flow, data, error);
15198                         break;
15199                 default:
15200                         return rte_flow_error_set(error, ENOTSUP,
15201                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15202                                                   actions,
15203                                                   "action not supported");
15204                 }
15205         }
15206         return ret;
15207 }
15208
15209 /**
15210  * Destroy the meter table set.
15211  * Lock free, (mutex should be acquired by caller).
15212  *
15213  * @param[in] dev
15214  *   Pointer to Ethernet device.
15215  * @param[in] fm
15216  *   Meter information table.
15217  */
15218 static void
15219 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15220                         struct mlx5_flow_meter_info *fm)
15221 {
15222         struct mlx5_priv *priv = dev->data->dev_private;
15223         int i;
15224
15225         if (!fm || !priv->config.dv_flow_en)
15226                 return;
15227         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15228                 if (fm->drop_rule[i]) {
15229                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15230                         fm->drop_rule[i] = NULL;
15231                 }
15232         }
15233 }
15234
15235 static void
15236 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15237 {
15238         struct mlx5_priv *priv = dev->data->dev_private;
15239         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15240         struct mlx5_flow_tbl_data_entry *tbl;
15241         int i, j;
15242
15243         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15244                 if (mtrmng->def_rule[i]) {
15245                         claim_zero(mlx5_flow_os_destroy_flow
15246                                         (mtrmng->def_rule[i]));
15247                         mtrmng->def_rule[i] = NULL;
15248                 }
15249                 if (mtrmng->def_matcher[i]) {
15250                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
15251                                 struct mlx5_flow_tbl_data_entry, tbl);
15252                         mlx5_cache_unregister(&tbl->matchers,
15253                                       &mtrmng->def_matcher[i]->entry);
15254                         mtrmng->def_matcher[i] = NULL;
15255                 }
15256                 for (j = 0; j < MLX5_REG_BITS; j++) {
15257                         if (mtrmng->drop_matcher[i][j]) {
15258                                 tbl =
15259                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
15260                                              struct mlx5_flow_tbl_data_entry,
15261                                              tbl);
15262                                 mlx5_cache_unregister(&tbl->matchers,
15263                                         &mtrmng->drop_matcher[i][j]->entry);
15264                                 mtrmng->drop_matcher[i][j] = NULL;
15265                         }
15266                 }
15267                 if (mtrmng->drop_tbl[i]) {
15268                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15269                                 mtrmng->drop_tbl[i]);
15270                         mtrmng->drop_tbl[i] = NULL;
15271                 }
15272         }
15273 }
15274
15275 /* Number of meter flow actions, count and jump or count and drop. */
15276 #define METER_ACTIONS 2
15277
15278 static void
15279 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15280                               enum mlx5_meter_domain domain)
15281 {
15282         struct mlx5_priv *priv = dev->data->dev_private;
15283         struct mlx5_flow_meter_def_policy *def_policy =
15284                         priv->sh->mtrmng->def_policy[domain];
15285
15286         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15287         mlx5_free(def_policy);
15288         priv->sh->mtrmng->def_policy[domain] = NULL;
15289 }
15290
15291 /**
15292  * Destroy the default policy table set.
15293  *
15294  * @param[in] dev
15295  *   Pointer to Ethernet device.
15296  */
15297 static void
15298 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15299 {
15300         struct mlx5_priv *priv = dev->data->dev_private;
15301         int i;
15302
15303         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15304                 if (priv->sh->mtrmng->def_policy[i])
15305                         __flow_dv_destroy_domain_def_policy(dev,
15306                                         (enum mlx5_meter_domain)i);
15307         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15308 }
15309
15310 static int
15311 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15312                         uint32_t color_reg_c_idx,
15313                         enum rte_color color, void *matcher_object,
15314                         int actions_n, void *actions,
15315                         bool is_default_policy, void **rule,
15316                         const struct rte_flow_attr *attr)
15317 {
15318         int ret;
15319         struct mlx5_flow_dv_match_params value = {
15320                 .size = sizeof(value.buf) -
15321                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15322         };
15323         struct mlx5_flow_dv_match_params matcher = {
15324                 .size = sizeof(matcher.buf) -
15325                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15326         };
15327         struct mlx5_priv *priv = dev->data->dev_private;
15328
15329         if (!is_default_policy && (priv->representor || priv->master)) {
15330                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15331                                                    value.buf, NULL, attr)) {
15332                         DRV_LOG(ERR,
15333                         "Failed to create meter policy flow with port.");
15334                         return -1;
15335                 }
15336         }
15337         flow_dv_match_meta_reg(matcher.buf, value.buf,
15338                                 (enum modify_reg)color_reg_c_idx,
15339                                 rte_col_2_mlx5_col(color),
15340                                 UINT32_MAX);
15341         ret = mlx5_flow_os_create_flow(matcher_object,
15342                         (void *)&value, actions_n, actions, rule);
15343         if (ret) {
15344                 DRV_LOG(ERR, "Failed to create meter policy flow.");
15345                 return -1;
15346         }
15347         return 0;
15348 }
15349
15350 static int
15351 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15352                         uint32_t color_reg_c_idx,
15353                         uint16_t priority,
15354                         struct mlx5_flow_meter_sub_policy *sub_policy,
15355                         const struct rte_flow_attr *attr,
15356                         bool is_default_policy,
15357                         struct rte_flow_error *error)
15358 {
15359         struct mlx5_cache_entry *entry;
15360         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15361         struct mlx5_flow_dv_matcher matcher = {
15362                 .mask = {
15363                         .size = sizeof(matcher.mask.buf) -
15364                                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15365                 },
15366                 .tbl = tbl_rsc,
15367         };
15368         struct mlx5_flow_dv_match_params value = {
15369                 .size = sizeof(value.buf) -
15370                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15371         };
15372         struct mlx5_flow_cb_ctx ctx = {
15373                 .error = error,
15374                 .data = &matcher,
15375         };
15376         struct mlx5_flow_tbl_data_entry *tbl_data;
15377         struct mlx5_priv *priv = dev->data->dev_private;
15378         uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
15379
15380         if (!is_default_policy && (priv->representor || priv->master)) {
15381                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
15382                                                    value.buf, NULL, attr)) {
15383                         DRV_LOG(ERR,
15384                         "Failed to register meter drop matcher with port.");
15385                         return -1;
15386                 }
15387         }
15388         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
15389         if (priority < RTE_COLOR_RED)
15390                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15391                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
15392         matcher.priority = priority;
15393         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
15394                                         matcher.mask.size);
15395         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
15396         if (!entry) {
15397                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
15398                 return -1;
15399         }
15400         sub_policy->color_matcher[priority] =
15401                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
15402         return 0;
15403 }
15404
15405 /**
15406  * Create the policy rules per domain.
15407  *
15408  * @param[in] dev
15409  *   Pointer to Ethernet device.
15410  * @param[in] sub_policy
15411  *    Pointer to sub policy table..
15412  * @param[in] egress
15413  *   Direction of the table.
15414  * @param[in] transfer
15415  *   E-Switch or NIC flow.
15416  * @param[in] acts
15417  *   Pointer to policy action list per color.
15418  *
15419  * @return
15420  *   0 on success, -1 otherwise.
15421  */
15422 static int
15423 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
15424                 struct mlx5_flow_meter_sub_policy *sub_policy,
15425                 uint8_t egress, uint8_t transfer, bool is_default_policy,
15426                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
15427 {
15428         struct rte_flow_error flow_err;
15429         uint32_t color_reg_c_idx;
15430         struct rte_flow_attr attr = {
15431                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
15432                 .priority = 0,
15433                 .ingress = 0,
15434                 .egress = !!egress,
15435                 .transfer = !!transfer,
15436                 .reserved = 0,
15437         };
15438         int i;
15439         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
15440
15441         if (ret < 0)
15442                 return -1;
15443         /* Create policy table with POLICY level. */
15444         if (!sub_policy->tbl_rsc)
15445                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
15446                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
15447                                 egress, transfer, false, NULL, 0, 0,
15448                                 sub_policy->idx, &flow_err);
15449         if (!sub_policy->tbl_rsc) {
15450                 DRV_LOG(ERR,
15451                         "Failed to create meter sub policy table.");
15452                 return -1;
15453         }
15454         /* Prepare matchers. */
15455         color_reg_c_idx = ret;
15456         for (i = 0; i < RTE_COLORS; i++) {
15457                 if (i == RTE_COLOR_YELLOW || !acts[i].actions_n)
15458                         continue;
15459                 attr.priority = i;
15460                 if (!sub_policy->color_matcher[i]) {
15461                         /* Create matchers for Color. */
15462                         if (__flow_dv_create_policy_matcher(dev,
15463                                 color_reg_c_idx, i, sub_policy,
15464                                 &attr, is_default_policy, &flow_err))
15465                                 return -1;
15466                 }
15467                 /* Create flow, matching color. */
15468                 if (acts[i].actions_n)
15469                         if (__flow_dv_create_policy_flow(dev,
15470                                 color_reg_c_idx, (enum rte_color)i,
15471                                 sub_policy->color_matcher[i]->matcher_object,
15472                                 acts[i].actions_n,
15473                                 acts[i].dv_actions,
15474                                 is_default_policy,
15475                                 &sub_policy->color_rule[i],
15476                                 &attr))
15477                                 return -1;
15478         }
15479         return 0;
15480 }
15481
15482 static int
15483 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
15484                         struct mlx5_flow_meter_policy *mtr_policy,
15485                         struct mlx5_flow_meter_sub_policy *sub_policy,
15486                         uint32_t domain)
15487 {
15488         struct mlx5_priv *priv = dev->data->dev_private;
15489         struct mlx5_meter_policy_acts acts[RTE_COLORS];
15490         struct mlx5_flow_dv_tag_resource *tag;
15491         struct mlx5_flow_dv_port_id_action_resource *port_action;
15492         struct mlx5_hrxq *hrxq;
15493         uint8_t egress, transfer;
15494         int i;
15495
15496         for (i = 0; i < RTE_COLORS; i++) {
15497                 acts[i].actions_n = 0;
15498                 if (i == RTE_COLOR_YELLOW)
15499                         continue;
15500                 if (i == RTE_COLOR_RED) {
15501                         /* Only support drop on red. */
15502                         acts[i].dv_actions[0] =
15503                         mtr_policy->dr_drop_action[domain];
15504                         acts[i].actions_n = 1;
15505                         continue;
15506                 }
15507                 if (mtr_policy->act_cnt[i].rix_mark) {
15508                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
15509                                         mtr_policy->act_cnt[i].rix_mark);
15510                         if (!tag) {
15511                                 DRV_LOG(ERR, "Failed to find "
15512                                 "mark action for policy.");
15513                                 return -1;
15514                         }
15515                         acts[i].dv_actions[acts[i].actions_n] =
15516                                                 tag->action;
15517                         acts[i].actions_n++;
15518                 }
15519                 if (mtr_policy->act_cnt[i].modify_hdr) {
15520                         acts[i].dv_actions[acts[i].actions_n] =
15521                         mtr_policy->act_cnt[i].modify_hdr->action;
15522                         acts[i].actions_n++;
15523                 }
15524                 if (mtr_policy->act_cnt[i].fate_action) {
15525                         switch (mtr_policy->act_cnt[i].fate_action) {
15526                         case MLX5_FLOW_FATE_PORT_ID:
15527                                 port_action = mlx5_ipool_get
15528                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
15529                                 mtr_policy->act_cnt[i].rix_port_id_action);
15530                                 if (!port_action) {
15531                                         DRV_LOG(ERR, "Failed to find "
15532                                                 "port action for policy.");
15533                                         return -1;
15534                                 }
15535                                 acts[i].dv_actions[acts[i].actions_n] =
15536                                 port_action->action;
15537                                 acts[i].actions_n++;
15538                                 break;
15539                         case MLX5_FLOW_FATE_DROP:
15540                         case MLX5_FLOW_FATE_JUMP:
15541                                 acts[i].dv_actions[acts[i].actions_n] =
15542                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
15543                                 acts[i].actions_n++;
15544                                 break;
15545                         case MLX5_FLOW_FATE_SHARED_RSS:
15546                         case MLX5_FLOW_FATE_QUEUE:
15547                                 hrxq = mlx5_ipool_get
15548                                 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
15549                                 sub_policy->rix_hrxq[i]);
15550                                 if (!hrxq) {
15551                                         DRV_LOG(ERR, "Failed to find "
15552                                                 "queue action for policy.");
15553                                         return -1;
15554                                 }
15555                                 acts[i].dv_actions[acts[i].actions_n] =
15556                                 hrxq->action;
15557                                 acts[i].actions_n++;
15558                                 break;
15559                         default:
15560                                 /*Queue action do nothing*/
15561                                 break;
15562                         }
15563                 }
15564         }
15565         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15566         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15567         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
15568                                 egress, transfer, false, acts)) {
15569                 DRV_LOG(ERR,
15570                 "Failed to create policy rules per domain.");
15571                 return -1;
15572         }
15573         return 0;
15574 }
15575
15576 /**
15577  * Create the policy rules.
15578  *
15579  * @param[in] dev
15580  *   Pointer to Ethernet device.
15581  * @param[in,out] mtr_policy
15582  *   Pointer to meter policy table.
15583  *
15584  * @return
15585  *   0 on success, -1 otherwise.
15586  */
15587 static int
15588 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
15589                              struct mlx5_flow_meter_policy *mtr_policy)
15590 {
15591         int i;
15592         uint16_t sub_policy_num;
15593
15594         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15595                 sub_policy_num = (mtr_policy->sub_policy_num >>
15596                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15597                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15598                 if (!sub_policy_num)
15599                         continue;
15600                 /* Prepare actions list and create policy rules. */
15601                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
15602                         mtr_policy->sub_policys[i][0], i)) {
15603                         DRV_LOG(ERR,
15604                         "Failed to create policy action list per domain.");
15605                         return -1;
15606                 }
15607         }
15608         return 0;
15609 }
15610
15611 static int
15612 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
15613 {
15614         struct mlx5_priv *priv = dev->data->dev_private;
15615         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15616         struct mlx5_flow_meter_def_policy *def_policy;
15617         struct mlx5_flow_tbl_resource *jump_tbl;
15618         struct mlx5_flow_tbl_data_entry *tbl_data;
15619         uint8_t egress, transfer;
15620         struct rte_flow_error error;
15621         struct mlx5_meter_policy_acts acts[RTE_COLORS];
15622         int ret;
15623
15624         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15625         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15626         def_policy = mtrmng->def_policy[domain];
15627         if (!def_policy) {
15628                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
15629                         sizeof(struct mlx5_flow_meter_def_policy),
15630                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
15631                 if (!def_policy) {
15632                         DRV_LOG(ERR, "Failed to alloc "
15633                                         "default policy table.");
15634                         goto def_policy_error;
15635                 }
15636                 mtrmng->def_policy[domain] = def_policy;
15637                 /* Create the meter suffix table with SUFFIX level. */
15638                 jump_tbl = flow_dv_tbl_resource_get(dev,
15639                                 MLX5_FLOW_TABLE_LEVEL_METER,
15640                                 egress, transfer, false, NULL, 0,
15641                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
15642                 if (!jump_tbl) {
15643                         DRV_LOG(ERR,
15644                                 "Failed to create meter suffix table.");
15645                         goto def_policy_error;
15646                 }
15647                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
15648                 tbl_data = container_of(jump_tbl,
15649                                 struct mlx5_flow_tbl_data_entry, tbl);
15650                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
15651                                                 tbl_data->jump.action;
15652                 acts[RTE_COLOR_GREEN].dv_actions[0] =
15653                                                 tbl_data->jump.action;
15654                 acts[RTE_COLOR_GREEN].actions_n = 1;
15655                 /* Create jump action to the drop table. */
15656                 if (!mtrmng->drop_tbl[domain]) {
15657                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
15658                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
15659                                 egress, transfer, false, NULL, 0,
15660                                 0, MLX5_MTR_TABLE_ID_DROP, &error);
15661                         if (!mtrmng->drop_tbl[domain]) {
15662                                 DRV_LOG(ERR, "Failed to create "
15663                                 "meter drop table for default policy.");
15664                                 goto def_policy_error;
15665                         }
15666                 }
15667                 tbl_data = container_of(mtrmng->drop_tbl[domain],
15668                                 struct mlx5_flow_tbl_data_entry, tbl);
15669                 def_policy->dr_jump_action[RTE_COLOR_RED] =
15670                                                 tbl_data->jump.action;
15671                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
15672                 acts[RTE_COLOR_RED].actions_n = 1;
15673                 /* Create default policy rules. */
15674                 ret = __flow_dv_create_domain_policy_rules(dev,
15675                                         &def_policy->sub_policy,
15676                                         egress, transfer, true, acts);
15677                 if (ret) {
15678                         DRV_LOG(ERR, "Failed to create "
15679                                 "default policy rules.");
15680                                 goto def_policy_error;
15681                 }
15682         }
15683         return 0;
15684 def_policy_error:
15685         __flow_dv_destroy_domain_def_policy(dev,
15686                         (enum mlx5_meter_domain)domain);
15687         return -1;
15688 }
15689
15690 /**
15691  * Create the default policy table set.
15692  *
15693  * @param[in] dev
15694  *   Pointer to Ethernet device.
15695  * @return
15696  *   0 on success, -1 otherwise.
15697  */
15698 static int
15699 flow_dv_create_def_policy(struct rte_eth_dev *dev)
15700 {
15701         struct mlx5_priv *priv = dev->data->dev_private;
15702         int i;
15703
15704         /* Non-termination policy table. */
15705         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15706                 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
15707                         continue;
15708                 if (__flow_dv_create_domain_def_policy(dev, i)) {
15709                         DRV_LOG(ERR,
15710                         "Failed to create default policy");
15711                         return -1;
15712                 }
15713         }
15714         return 0;
15715 }
15716
15717 /**
15718  * Create the needed meter tables.
15719  * Lock free, (mutex should be acquired by caller).
15720  *
15721  * @param[in] dev
15722  *   Pointer to Ethernet device.
15723  * @param[in] fm
15724  *   Meter information table.
15725  * @param[in] mtr_idx
15726  *   Meter index.
15727  * @param[in] domain_bitmap
15728  *   Domain bitmap.
15729  * @return
15730  *   0 on success, -1 otherwise.
15731  */
15732 static int
15733 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
15734                         struct mlx5_flow_meter_info *fm,
15735                         uint32_t mtr_idx,
15736                         uint8_t domain_bitmap)
15737 {
15738         struct mlx5_priv *priv = dev->data->dev_private;
15739         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15740         struct rte_flow_error error;
15741         struct mlx5_flow_tbl_data_entry *tbl_data;
15742         uint8_t egress, transfer;
15743         void *actions[METER_ACTIONS];
15744         int domain, ret, i;
15745         struct mlx5_flow_counter *cnt;
15746         struct mlx5_flow_dv_match_params value = {
15747                 .size = sizeof(value.buf) -
15748                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15749         };
15750         struct mlx5_flow_dv_match_params matcher_para = {
15751                 .size = sizeof(matcher_para.buf) -
15752                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15753         };
15754         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
15755                                                      0, &error);
15756         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
15757         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
15758         struct mlx5_cache_entry *entry;
15759         struct mlx5_flow_dv_matcher matcher = {
15760                 .mask = {
15761                         .size = sizeof(matcher.mask.buf) -
15762                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15763                 },
15764         };
15765         struct mlx5_flow_dv_matcher *drop_matcher;
15766         struct mlx5_flow_cb_ctx ctx = {
15767                 .error = &error,
15768                 .data = &matcher,
15769         };
15770
15771         if (!priv->mtr_en || mtr_id_reg_c < 0) {
15772                 rte_errno = ENOTSUP;
15773                 return -1;
15774         }
15775         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
15776                 if (!(domain_bitmap & (1 << domain)) ||
15777                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
15778                         continue;
15779                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15780                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15781                 /* Create the drop table with METER DROP level. */
15782                 if (!mtrmng->drop_tbl[domain]) {
15783                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
15784                                         MLX5_FLOW_TABLE_LEVEL_METER,
15785                                         egress, transfer, false, NULL, 0,
15786                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
15787                         if (!mtrmng->drop_tbl[domain]) {
15788                                 DRV_LOG(ERR, "Failed to create meter drop table.");
15789                                 goto policy_error;
15790                         }
15791                 }
15792                 /* Create default matcher in drop table. */
15793                 matcher.tbl = mtrmng->drop_tbl[domain],
15794                 tbl_data = container_of(mtrmng->drop_tbl[domain],
15795                                 struct mlx5_flow_tbl_data_entry, tbl);
15796                 if (!mtrmng->def_matcher[domain]) {
15797                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15798                                        (enum modify_reg)mtr_id_reg_c,
15799                                        0, 0);
15800                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
15801                         matcher.crc = rte_raw_cksum
15802                                         ((const void *)matcher.mask.buf,
15803                                         matcher.mask.size);
15804                         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
15805                         if (!entry) {
15806                                 DRV_LOG(ERR, "Failed to register meter "
15807                                 "drop default matcher.");
15808                                 goto policy_error;
15809                         }
15810                         mtrmng->def_matcher[domain] = container_of(entry,
15811                         struct mlx5_flow_dv_matcher, entry);
15812                 }
15813                 /* Create default rule in drop table. */
15814                 if (!mtrmng->def_rule[domain]) {
15815                         i = 0;
15816                         actions[i++] = priv->sh->dr_drop_action;
15817                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
15818                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
15819                         ret = mlx5_flow_os_create_flow
15820                                 (mtrmng->def_matcher[domain]->matcher_object,
15821                                 (void *)&value, i, actions,
15822                                 &mtrmng->def_rule[domain]);
15823                         if (ret) {
15824                                 DRV_LOG(ERR, "Failed to create meter "
15825                                 "default drop rule for drop table.");
15826                                 goto policy_error;
15827                         }
15828                 }
15829                 if (!fm->drop_cnt)
15830                         continue;
15831                 MLX5_ASSERT(mtrmng->max_mtr_bits);
15832                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
15833                         /* Create matchers for Drop. */
15834                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15835                                         (enum modify_reg)mtr_id_reg_c, 0,
15836                                         (mtr_id_mask << mtr_id_offset));
15837                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
15838                         matcher.crc = rte_raw_cksum
15839                                         ((const void *)matcher.mask.buf,
15840                                         matcher.mask.size);
15841                         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
15842                         if (!entry) {
15843                                 DRV_LOG(ERR,
15844                                 "Failed to register meter drop matcher.");
15845                                 goto policy_error;
15846                         }
15847                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
15848                                 container_of(entry, struct mlx5_flow_dv_matcher,
15849                                              entry);
15850                 }
15851                 drop_matcher =
15852                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
15853                 /* Create drop rule, matching meter_id only. */
15854                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
15855                                 (enum modify_reg)mtr_id_reg_c,
15856                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
15857                 i = 0;
15858                 cnt = flow_dv_counter_get_by_idx(dev,
15859                                         fm->drop_cnt, NULL);
15860                 actions[i++] = cnt->action;
15861                 actions[i++] = priv->sh->dr_drop_action;
15862                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
15863                                                (void *)&value, i, actions,
15864                                                &fm->drop_rule[domain]);
15865                 if (ret) {
15866                         DRV_LOG(ERR, "Failed to create meter "
15867                                 "drop rule for drop table.");
15868                                 goto policy_error;
15869                 }
15870         }
15871         return 0;
15872 policy_error:
15873         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15874                 if (fm->drop_rule[i]) {
15875                         claim_zero(mlx5_flow_os_destroy_flow
15876                                 (fm->drop_rule[i]));
15877                         fm->drop_rule[i] = NULL;
15878                 }
15879         }
15880         return -1;
15881 }
15882
15883 /**
15884  * Find the policy table for prefix table with RSS.
15885  *
15886  * @param[in] dev
15887  *   Pointer to Ethernet device.
15888  * @param[in] mtr_policy
15889  *   Pointer to meter policy table.
15890  * @param[in] rss_desc
15891  *   Pointer to rss_desc
15892  * @return
15893  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
15894  */
15895 static struct mlx5_flow_meter_sub_policy *
15896 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
15897                 struct mlx5_flow_meter_policy *mtr_policy,
15898                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
15899 {
15900         struct mlx5_priv *priv = dev->data->dev_private;
15901         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
15902         uint32_t sub_policy_idx = 0;
15903         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
15904         uint32_t i, j;
15905         struct mlx5_hrxq *hrxq;
15906         struct mlx5_flow_handle dh;
15907         struct mlx5_meter_policy_action_container *act_cnt;
15908         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
15909         uint16_t sub_policy_num;
15910
15911         rte_spinlock_lock(&mtr_policy->sl);
15912         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15913                 if (!rss_desc[i])
15914                         continue;
15915                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
15916                 if (!hrxq_idx[i]) {
15917                         rte_spinlock_unlock(&mtr_policy->sl);
15918                         return NULL;
15919                 }
15920         }
15921         sub_policy_num = (mtr_policy->sub_policy_num >>
15922                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
15923                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15924         for (i = 0; i < sub_policy_num;
15925                 i++) {
15926                 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++) {
15927                         if (rss_desc[j] &&
15928                                 hrxq_idx[j] !=
15929                         mtr_policy->sub_policys[domain][i]->rix_hrxq[j])
15930                                 break;
15931                 }
15932                 if (j >= MLX5_MTR_RTE_COLORS) {
15933                         /*
15934                          * Found the sub policy table with
15935                          * the same queue per color
15936                          */
15937                         rte_spinlock_unlock(&mtr_policy->sl);
15938                         for (j = 0; j < MLX5_MTR_RTE_COLORS; j++)
15939                                 mlx5_hrxq_release(dev, hrxq_idx[j]);
15940                         return mtr_policy->sub_policys[domain][i];
15941                 }
15942         }
15943         /* Create sub policy. */
15944         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
15945                 /* Reuse the first dummy sub_policy*/
15946                 sub_policy = mtr_policy->sub_policys[domain][0];
15947                 sub_policy_idx = sub_policy->idx;
15948         } else {
15949                 sub_policy = mlx5_ipool_zmalloc
15950                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
15951                                 &sub_policy_idx);
15952                 if (!sub_policy ||
15953                         sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
15954                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
15955                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
15956                         goto rss_sub_policy_error;
15957                 }
15958                 sub_policy->idx = sub_policy_idx;
15959                 sub_policy->main_policy = mtr_policy;
15960         }
15961         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15962                 if (!rss_desc[i])
15963                         continue;
15964                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
15965                 /*
15966                  * Overwrite the last action from
15967                  * RSS action to Queue action.
15968                  */
15969                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
15970                               hrxq_idx[i]);
15971                 if (!hrxq) {
15972                         DRV_LOG(ERR, "Failed to create policy hrxq");
15973                         goto rss_sub_policy_error;
15974                 }
15975                 act_cnt = &mtr_policy->act_cnt[i];
15976                 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
15977                         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15978                         if (act_cnt->rix_mark)
15979                                 dh.mark = 1;
15980                         dh.fate_action = MLX5_FLOW_FATE_QUEUE;
15981                         dh.rix_hrxq = hrxq_idx[i];
15982                         flow_drv_rxq_flags_set(dev, &dh);
15983                 }
15984         }
15985         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
15986                 sub_policy, domain)) {
15987                 DRV_LOG(ERR, "Failed to create policy "
15988                         "rules per domain.");
15989                 goto rss_sub_policy_error;
15990         }
15991         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
15992                 i = (mtr_policy->sub_policy_num >>
15993                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
15994                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15995                 mtr_policy->sub_policys[domain][i] = sub_policy;
15996                 i++;
15997                 if (i > MLX5_MTR_RSS_MAX_SUB_POLICY)
15998                         goto rss_sub_policy_error;
15999                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16000                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16001                 mtr_policy->sub_policy_num |=
16002                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16003                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16004         }
16005         rte_spinlock_unlock(&mtr_policy->sl);
16006         return sub_policy;
16007 rss_sub_policy_error:
16008         if (sub_policy) {
16009                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16010                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16011                         i = (mtr_policy->sub_policy_num >>
16012                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16013                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16014                         mtr_policy->sub_policys[domain][i] = NULL;
16015                         mlx5_ipool_free
16016                         (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16017                                         sub_policy->idx);
16018                 }
16019         }
16020         if (sub_policy_idx)
16021                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16022                         sub_policy_idx);
16023         rte_spinlock_unlock(&mtr_policy->sl);
16024         return NULL;
16025 }
16026
16027
16028 /**
16029  * Destroy the sub policy table with RX queue.
16030  *
16031  * @param[in] dev
16032  *   Pointer to Ethernet device.
16033  * @param[in] mtr_policy
16034  *   Pointer to meter policy table.
16035  */
16036 static void
16037 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
16038                 struct mlx5_flow_meter_policy *mtr_policy)
16039 {
16040         struct mlx5_priv *priv = dev->data->dev_private;
16041         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16042         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16043         uint32_t i, j;
16044         uint16_t sub_policy_num, new_policy_num;
16045
16046         rte_spinlock_lock(&mtr_policy->sl);
16047         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16048                 switch (mtr_policy->act_cnt[i].fate_action) {
16049                 case MLX5_FLOW_FATE_SHARED_RSS:
16050                         sub_policy_num = (mtr_policy->sub_policy_num >>
16051                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16052                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16053                         new_policy_num = sub_policy_num;
16054                         for (j = 0; j < sub_policy_num; j++) {
16055                                 sub_policy =
16056                                         mtr_policy->sub_policys[domain][j];
16057                                 if (sub_policy) {
16058                                         __flow_dv_destroy_sub_policy_rules(dev,
16059                                                 sub_policy);
16060                                 if (sub_policy !=
16061                                         mtr_policy->sub_policys[domain][0]) {
16062                                         mtr_policy->sub_policys[domain][j] =
16063                                                                 NULL;
16064                                         mlx5_ipool_free
16065                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16066                                                 sub_policy->idx);
16067                                                 new_policy_num--;
16068                                         }
16069                                 }
16070                         }
16071                         if (new_policy_num != sub_policy_num) {
16072                                 mtr_policy->sub_policy_num &=
16073                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16074                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16075                                 mtr_policy->sub_policy_num |=
16076                                 (new_policy_num &
16077                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16078                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16079                         }
16080                         break;
16081                 case MLX5_FLOW_FATE_QUEUE:
16082                         sub_policy = mtr_policy->sub_policys[domain][0];
16083                         __flow_dv_destroy_sub_policy_rules(dev,
16084                                                 sub_policy);
16085                         break;
16086                 default:
16087                         /*Other actions without queue and do nothing*/
16088                         break;
16089                 }
16090         }
16091         rte_spinlock_unlock(&mtr_policy->sl);
16092 }
16093
16094 /**
16095  * Validate the batch counter support in root table.
16096  *
16097  * Create a simple flow with invalid counter and drop action on root table to
16098  * validate if batch counter with offset on root table is supported or not.
16099  *
16100  * @param[in] dev
16101  *   Pointer to rte_eth_dev structure.
16102  *
16103  * @return
16104  *   0 on success, a negative errno value otherwise and rte_errno is set.
16105  */
16106 int
16107 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
16108 {
16109         struct mlx5_priv *priv = dev->data->dev_private;
16110         struct mlx5_dev_ctx_shared *sh = priv->sh;
16111         struct mlx5_flow_dv_match_params mask = {
16112                 .size = sizeof(mask.buf),
16113         };
16114         struct mlx5_flow_dv_match_params value = {
16115                 .size = sizeof(value.buf),
16116         };
16117         struct mlx5dv_flow_matcher_attr dv_attr = {
16118                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
16119                 .priority = 0,
16120                 .match_criteria_enable = 0,
16121                 .match_mask = (void *)&mask,
16122         };
16123         void *actions[2] = { 0 };
16124         struct mlx5_flow_tbl_resource *tbl = NULL;
16125         struct mlx5_devx_obj *dcs = NULL;
16126         void *matcher = NULL;
16127         void *flow = NULL;
16128         int ret = -1;
16129
16130         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
16131                                         0, 0, 0, NULL);
16132         if (!tbl)
16133                 goto err;
16134         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
16135         if (!dcs)
16136                 goto err;
16137         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
16138                                                     &actions[0]);
16139         if (ret)
16140                 goto err;
16141         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
16142         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
16143                                                &matcher);
16144         if (ret)
16145                 goto err;
16146         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
16147                                        actions, &flow);
16148 err:
16149         /*
16150          * If batch counter with offset is not supported, the driver will not
16151          * validate the invalid offset value, flow create should success.
16152          * In this case, it means batch counter is not supported in root table.
16153          *
16154          * Otherwise, if flow create is failed, counter offset is supported.
16155          */
16156         if (flow) {
16157                 DRV_LOG(INFO, "Batch counter is not supported in root "
16158                               "table. Switch to fallback mode.");
16159                 rte_errno = ENOTSUP;
16160                 ret = -rte_errno;
16161                 claim_zero(mlx5_flow_os_destroy_flow(flow));
16162         } else {
16163                 /* Check matcher to make sure validate fail at flow create. */
16164                 if (!matcher || (matcher && errno != EINVAL))
16165                         DRV_LOG(ERR, "Unexpected error in counter offset "
16166                                      "support detection");
16167                 ret = 0;
16168         }
16169         if (actions[0])
16170                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
16171         if (matcher)
16172                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
16173         if (tbl)
16174                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
16175         if (dcs)
16176                 claim_zero(mlx5_devx_cmd_destroy(dcs));
16177         return ret;
16178 }
16179
16180 /**
16181  * Query a devx counter.
16182  *
16183  * @param[in] dev
16184  *   Pointer to the Ethernet device structure.
16185  * @param[in] cnt
16186  *   Index to the flow counter.
16187  * @param[in] clear
16188  *   Set to clear the counter statistics.
16189  * @param[out] pkts
16190  *   The statistics value of packets.
16191  * @param[out] bytes
16192  *   The statistics value of bytes.
16193  *
16194  * @return
16195  *   0 on success, otherwise return -1.
16196  */
16197 static int
16198 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
16199                       uint64_t *pkts, uint64_t *bytes)
16200 {
16201         struct mlx5_priv *priv = dev->data->dev_private;
16202         struct mlx5_flow_counter *cnt;
16203         uint64_t inn_pkts, inn_bytes;
16204         int ret;
16205
16206         if (!priv->config.devx)
16207                 return -1;
16208
16209         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
16210         if (ret)
16211                 return -1;
16212         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
16213         *pkts = inn_pkts - cnt->hits;
16214         *bytes = inn_bytes - cnt->bytes;
16215         if (clear) {
16216                 cnt->hits = inn_pkts;
16217                 cnt->bytes = inn_bytes;
16218         }
16219         return 0;
16220 }
16221
16222 /**
16223  * Get aged-out flows.
16224  *
16225  * @param[in] dev
16226  *   Pointer to the Ethernet device structure.
16227  * @param[in] context
16228  *   The address of an array of pointers to the aged-out flows contexts.
16229  * @param[in] nb_contexts
16230  *   The length of context array pointers.
16231  * @param[out] error
16232  *   Perform verbose error reporting if not NULL. Initialized in case of
16233  *   error only.
16234  *
16235  * @return
16236  *   how many contexts get in success, otherwise negative errno value.
16237  *   if nb_contexts is 0, return the amount of all aged contexts.
16238  *   if nb_contexts is not 0 , return the amount of aged flows reported
16239  *   in the context array.
16240  * @note: only stub for now
16241  */
16242 static int
16243 flow_get_aged_flows(struct rte_eth_dev *dev,
16244                     void **context,
16245                     uint32_t nb_contexts,
16246                     struct rte_flow_error *error)
16247 {
16248         struct mlx5_priv *priv = dev->data->dev_private;
16249         struct mlx5_age_info *age_info;
16250         struct mlx5_age_param *age_param;
16251         struct mlx5_flow_counter *counter;
16252         struct mlx5_aso_age_action *act;
16253         int nb_flows = 0;
16254
16255         if (nb_contexts && !context)
16256                 return rte_flow_error_set(error, EINVAL,
16257                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16258                                           NULL, "empty context");
16259         age_info = GET_PORT_AGE_INFO(priv);
16260         rte_spinlock_lock(&age_info->aged_sl);
16261         LIST_FOREACH(act, &age_info->aged_aso, next) {
16262                 nb_flows++;
16263                 if (nb_contexts) {
16264                         context[nb_flows - 1] =
16265                                                 act->age_params.context;
16266                         if (!(--nb_contexts))
16267                                 break;
16268                 }
16269         }
16270         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
16271                 nb_flows++;
16272                 if (nb_contexts) {
16273                         age_param = MLX5_CNT_TO_AGE(counter);
16274                         context[nb_flows - 1] = age_param->context;
16275                         if (!(--nb_contexts))
16276                                 break;
16277                 }
16278         }
16279         rte_spinlock_unlock(&age_info->aged_sl);
16280         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
16281         return nb_flows;
16282 }
16283
16284 /*
16285  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
16286  */
16287 static uint32_t
16288 flow_dv_counter_allocate(struct rte_eth_dev *dev)
16289 {
16290         return flow_dv_counter_alloc(dev, 0);
16291 }
16292
16293 /**
16294  * Validate indirect action.
16295  * Dispatcher for action type specific validation.
16296  *
16297  * @param[in] dev
16298  *   Pointer to the Ethernet device structure.
16299  * @param[in] conf
16300  *   Indirect action configuration.
16301  * @param[in] action
16302  *   The indirect action object to validate.
16303  * @param[out] error
16304  *   Perform verbose error reporting if not NULL. Initialized in case of
16305  *   error only.
16306  *
16307  * @return
16308  *   0 on success, otherwise negative errno value.
16309  */
16310 static int
16311 flow_dv_action_validate(struct rte_eth_dev *dev,
16312                         const struct rte_flow_indir_action_conf *conf,
16313                         const struct rte_flow_action *action,
16314                         struct rte_flow_error *err)
16315 {
16316         struct mlx5_priv *priv = dev->data->dev_private;
16317
16318         RTE_SET_USED(conf);
16319         switch (action->type) {
16320         case RTE_FLOW_ACTION_TYPE_RSS:
16321                 /*
16322                  * priv->obj_ops is set according to driver capabilities.
16323                  * When DevX capabilities are
16324                  * sufficient, it is set to devx_obj_ops.
16325                  * Otherwise, it is set to ibv_obj_ops.
16326                  * ibv_obj_ops doesn't support ind_table_modify operation.
16327                  * In this case the indirect RSS action can't be used.
16328                  */
16329                 if (priv->obj_ops.ind_table_modify == NULL)
16330                         return rte_flow_error_set
16331                                         (err, ENOTSUP,
16332                                          RTE_FLOW_ERROR_TYPE_ACTION,
16333                                          NULL,
16334                                          "Indirect RSS action not supported");
16335                 return mlx5_validate_action_rss(dev, action, err);
16336         case RTE_FLOW_ACTION_TYPE_AGE:
16337                 if (!priv->sh->aso_age_mng)
16338                         return rte_flow_error_set(err, ENOTSUP,
16339                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16340                                                 NULL,
16341                                                 "Indirect age action not supported");
16342                 return flow_dv_validate_action_age(0, action, dev, err);
16343         case RTE_FLOW_ACTION_TYPE_COUNT:
16344                 /*
16345                  * There are two mechanisms to share the action count.
16346                  * The old mechanism uses the shared field to share, while the
16347                  * new mechanism uses the indirect action API.
16348                  * This validation comes to make sure that the two mechanisms
16349                  * are not combined.
16350                  */
16351                 if (is_shared_action_count(action))
16352                         return rte_flow_error_set(err, ENOTSUP,
16353                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16354                                                   NULL,
16355                                                   "Mix shared and indirect counter is not supported");
16356                 return flow_dv_validate_action_count(dev, true, 0, err);
16357         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
16358                 if (!priv->sh->ct_aso_en)
16359                         return rte_flow_error_set(err, ENOTSUP,
16360                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16361                                         "ASO CT is not supported");
16362                 return mlx5_validate_action_ct(dev, action->conf, err);
16363         default:
16364                 return rte_flow_error_set(err, ENOTSUP,
16365                                           RTE_FLOW_ERROR_TYPE_ACTION,
16366                                           NULL,
16367                                           "action type not supported");
16368         }
16369 }
16370
16371 /**
16372  * Validate meter policy actions.
16373  * Dispatcher for action type specific validation.
16374  *
16375  * @param[in] dev
16376  *   Pointer to the Ethernet device structure.
16377  * @param[in] action
16378  *   The meter policy action object to validate.
16379  * @param[in] attr
16380  *   Attributes of flow to determine steering domain.
16381  * @param[out] error
16382  *   Perform verbose error reporting if not NULL. Initialized in case of
16383  *   error only.
16384  *
16385  * @return
16386  *   0 on success, otherwise negative errno value.
16387  */
16388 static int
16389 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
16390                         const struct rte_flow_action *actions[RTE_COLORS],
16391                         struct rte_flow_attr *attr,
16392                         bool *is_rss,
16393                         uint8_t *domain_bitmap,
16394                         bool *is_def_policy,
16395                         struct rte_mtr_error *error)
16396 {
16397         struct mlx5_priv *priv = dev->data->dev_private;
16398         struct mlx5_dev_config *dev_conf = &priv->config;
16399         const struct rte_flow_action *act;
16400         uint64_t action_flags = 0;
16401         int actions_n;
16402         int i, ret;
16403         struct rte_flow_error flow_err;
16404         uint8_t domain_color[RTE_COLORS] = {0};
16405         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
16406
16407         if (!priv->config.dv_esw_en)
16408                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
16409         *domain_bitmap = def_domain;
16410         if (actions[RTE_COLOR_YELLOW] &&
16411                 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_END)
16412                 return -rte_mtr_error_set(error, ENOTSUP,
16413                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
16414                                 NULL,
16415                                 "Yellow color does not support any action.");
16416         if (actions[RTE_COLOR_YELLOW] &&
16417                 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_DROP)
16418                 return -rte_mtr_error_set(error, ENOTSUP,
16419                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
16420                                 NULL, "Red color only supports drop action.");
16421         /*
16422          * Check default policy actions:
16423          * Green/Yellow: no action, Red: drop action
16424          */
16425         if ((!actions[RTE_COLOR_GREEN] ||
16426                 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)) {
16427                 *is_def_policy = true;
16428                 return 0;
16429         }
16430         flow_err.message = NULL;
16431         for (i = 0; i < RTE_COLORS; i++) {
16432                 act = actions[i];
16433                 for (action_flags = 0, actions_n = 0;
16434                         act && act->type != RTE_FLOW_ACTION_TYPE_END;
16435                         act++) {
16436                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
16437                                 return -rte_mtr_error_set(error, ENOTSUP,
16438                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16439                                           NULL, "too many actions");
16440                         switch (act->type) {
16441                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
16442                                 if (!priv->config.dv_esw_en)
16443                                         return -rte_mtr_error_set(error,
16444                                         ENOTSUP,
16445                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16446                                         NULL, "PORT action validate check"
16447                                         " fail for ESW disable");
16448                                 ret = flow_dv_validate_action_port_id(dev,
16449                                                 action_flags,
16450                                                 act, attr, &flow_err);
16451                                 if (ret)
16452                                         return -rte_mtr_error_set(error,
16453                                         ENOTSUP,
16454                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16455                                         NULL, flow_err.message ?
16456                                         flow_err.message :
16457                                         "PORT action validate check fail");
16458                                 ++actions_n;
16459                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
16460                                 break;
16461                         case RTE_FLOW_ACTION_TYPE_MARK:
16462                                 ret = flow_dv_validate_action_mark(dev, act,
16463                                                            action_flags,
16464                                                            attr, &flow_err);
16465                                 if (ret < 0)
16466                                         return -rte_mtr_error_set(error,
16467                                         ENOTSUP,
16468                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16469                                         NULL, flow_err.message ?
16470                                         flow_err.message :
16471                                         "Mark action validate check fail");
16472                                 if (dev_conf->dv_xmeta_en !=
16473                                         MLX5_XMETA_MODE_LEGACY)
16474                                         return -rte_mtr_error_set(error,
16475                                         ENOTSUP,
16476                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16477                                         NULL, "Extend MARK action is "
16478                                         "not supported. Please try use "
16479                                         "default policy for meter.");
16480                                 action_flags |= MLX5_FLOW_ACTION_MARK;
16481                                 ++actions_n;
16482                                 break;
16483                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
16484                                 ret = flow_dv_validate_action_set_tag(dev,
16485                                                         act, action_flags,
16486                                                         attr, &flow_err);
16487                                 if (ret)
16488                                         return -rte_mtr_error_set(error,
16489                                         ENOTSUP,
16490                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16491                                         NULL, flow_err.message ?
16492                                         flow_err.message :
16493                                         "Set tag action validate check fail");
16494                                 /*
16495                                  * Count all modify-header actions
16496                                  * as one action.
16497                                  */
16498                                 if (!(action_flags &
16499                                         MLX5_FLOW_MODIFY_HDR_ACTIONS))
16500                                         ++actions_n;
16501                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
16502                                 break;
16503                         case RTE_FLOW_ACTION_TYPE_DROP:
16504                                 ret = mlx5_flow_validate_action_drop
16505                                         (action_flags,
16506                                         attr, &flow_err);
16507                                 if (ret < 0)
16508                                         return -rte_mtr_error_set(error,
16509                                         ENOTSUP,
16510                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16511                                         NULL, flow_err.message ?
16512                                         flow_err.message :
16513                                         "Drop action validate check fail");
16514                                 action_flags |= MLX5_FLOW_ACTION_DROP;
16515                                 ++actions_n;
16516                                 break;
16517                         case RTE_FLOW_ACTION_TYPE_QUEUE:
16518                                 /*
16519                                  * Check whether extensive
16520                                  * metadata feature is engaged.
16521                                  */
16522                                 if (dev_conf->dv_flow_en &&
16523                                         (dev_conf->dv_xmeta_en !=
16524                                         MLX5_XMETA_MODE_LEGACY) &&
16525                                         mlx5_flow_ext_mreg_supported(dev))
16526                                         return -rte_mtr_error_set(error,
16527                                           ENOTSUP,
16528                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16529                                           NULL, "Queue action with meta "
16530                                           "is not supported. Please try use "
16531                                           "default policy for meter.");
16532                                 ret = mlx5_flow_validate_action_queue(act,
16533                                                         action_flags, dev,
16534                                                         attr, &flow_err);
16535                                 if (ret < 0)
16536                                         return -rte_mtr_error_set(error,
16537                                           ENOTSUP,
16538                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16539                                           NULL, flow_err.message ?
16540                                           flow_err.message :
16541                                           "Queue action validate check fail");
16542                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
16543                                 ++actions_n;
16544                                 break;
16545                         case RTE_FLOW_ACTION_TYPE_RSS:
16546                                 if (dev_conf->dv_flow_en &&
16547                                         (dev_conf->dv_xmeta_en !=
16548                                         MLX5_XMETA_MODE_LEGACY) &&
16549                                         mlx5_flow_ext_mreg_supported(dev))
16550                                         return -rte_mtr_error_set(error,
16551                                           ENOTSUP,
16552                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16553                                           NULL, "RSS action with meta "
16554                                           "is not supported. Please try use "
16555                                           "default policy for meter.");
16556                                 ret = mlx5_validate_action_rss(dev, act,
16557                                                 &flow_err);
16558                                 if (ret < 0)
16559                                         return -rte_mtr_error_set(error,
16560                                           ENOTSUP,
16561                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16562                                           NULL, flow_err.message ?
16563                                           flow_err.message :
16564                                           "RSS action validate check fail");
16565                                 action_flags |= MLX5_FLOW_ACTION_RSS;
16566                                 ++actions_n;
16567                                 *is_rss = true;
16568                                 break;
16569                         case RTE_FLOW_ACTION_TYPE_JUMP:
16570                                 ret = flow_dv_validate_action_jump(dev,
16571                                         NULL, act, action_flags,
16572                                         attr, true, &flow_err);
16573                                 if (ret)
16574                                         return -rte_mtr_error_set(error,
16575                                           ENOTSUP,
16576                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16577                                           NULL, flow_err.message ?
16578                                           flow_err.message :
16579                                           "Jump action validate check fail");
16580                                 ++actions_n;
16581                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
16582                                 break;
16583                         default:
16584                                 return -rte_mtr_error_set(error, ENOTSUP,
16585                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16586                                         NULL,
16587                                         "Doesn't support optional action");
16588                         }
16589                 }
16590                 /* Yellow is not supported, just skip. */
16591                 if (i == RTE_COLOR_YELLOW)
16592                         continue;
16593                 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
16594                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
16595                 else if ((action_flags &
16596                         (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
16597                         (action_flags & MLX5_FLOW_ACTION_MARK))
16598                         /*
16599                          * Only support MLX5_XMETA_MODE_LEGACY
16600                          * so MARK action only in ingress domain.
16601                          */
16602                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
16603                 else
16604                         domain_color[i] = def_domain;
16605                 /*
16606                  * Validate the drop action mutual exclusion
16607                  * with other actions. Drop action is mutually-exclusive
16608                  * with any other action, except for Count action.
16609                  */
16610                 if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
16611                         (action_flags & ~MLX5_FLOW_ACTION_DROP)) {
16612                         return -rte_mtr_error_set(error, ENOTSUP,
16613                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
16614                                 NULL, "Drop action is mutually-exclusive "
16615                                 "with any other action");
16616                 }
16617                 /* Eswitch has few restrictions on using items and actions */
16618                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
16619                         if (!mlx5_flow_ext_mreg_supported(dev) &&
16620                                 action_flags & MLX5_FLOW_ACTION_MARK)
16621                                 return -rte_mtr_error_set(error, ENOTSUP,
16622                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16623                                         NULL, "unsupported action MARK");
16624                         if (action_flags & MLX5_FLOW_ACTION_QUEUE)
16625                                 return -rte_mtr_error_set(error, ENOTSUP,
16626                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16627                                         NULL, "unsupported action QUEUE");
16628                         if (action_flags & MLX5_FLOW_ACTION_RSS)
16629                                 return -rte_mtr_error_set(error, ENOTSUP,
16630                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16631                                         NULL, "unsupported action RSS");
16632                         if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
16633                                 return -rte_mtr_error_set(error, ENOTSUP,
16634                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16635                                         NULL, "no fate action is found");
16636                 } else {
16637                         if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) &&
16638                                 (domain_color[i] &
16639                                 MLX5_MTR_DOMAIN_INGRESS_BIT)) {
16640                                 if ((domain_color[i] &
16641                                         MLX5_MTR_DOMAIN_EGRESS_BIT))
16642                                         domain_color[i] =
16643                                         MLX5_MTR_DOMAIN_EGRESS_BIT;
16644                                 else
16645                                         return -rte_mtr_error_set(error,
16646                                         ENOTSUP,
16647                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16648                                         NULL, "no fate action is found");
16649                         }
16650                 }
16651                 if (domain_color[i] != def_domain)
16652                         *domain_bitmap = domain_color[i];
16653         }
16654         return 0;
16655 }
16656
16657 static int
16658 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
16659 {
16660         struct mlx5_priv *priv = dev->data->dev_private;
16661         int ret = 0;
16662
16663         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
16664                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
16665                                                 flags);
16666                 if (ret != 0)
16667                         return ret;
16668         }
16669         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
16670                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
16671                 if (ret != 0)
16672                         return ret;
16673         }
16674         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
16675                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
16676                 if (ret != 0)
16677                         return ret;
16678         }
16679         return 0;
16680 }
16681
16682 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
16683         .validate = flow_dv_validate,
16684         .prepare = flow_dv_prepare,
16685         .translate = flow_dv_translate,
16686         .apply = flow_dv_apply,
16687         .remove = flow_dv_remove,
16688         .destroy = flow_dv_destroy,
16689         .query = flow_dv_query,
16690         .create_mtr_tbls = flow_dv_create_mtr_tbls,
16691         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
16692         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
16693         .create_meter = flow_dv_mtr_alloc,
16694         .free_meter = flow_dv_aso_mtr_release_to_pool,
16695         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
16696         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
16697         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
16698         .create_policy_rules = flow_dv_create_policy_rules,
16699         .destroy_policy_rules = flow_dv_destroy_policy_rules,
16700         .create_def_policy = flow_dv_create_def_policy,
16701         .destroy_def_policy = flow_dv_destroy_def_policy,
16702         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
16703         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
16704         .counter_alloc = flow_dv_counter_allocate,
16705         .counter_free = flow_dv_counter_free,
16706         .counter_query = flow_dv_counter_query,
16707         .get_aged_flows = flow_get_aged_flows,
16708         .action_validate = flow_dv_action_validate,
16709         .action_create = flow_dv_action_create,
16710         .action_destroy = flow_dv_action_destroy,
16711         .action_update = flow_dv_action_update,
16712         .action_query = flow_dv_action_query,
16713         .sync_domain = flow_dv_sync_domain,
16714 };
16715
16716 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
16717