1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
11 #include <rte_common.h>
12 #include <rte_ether.h>
13 #include <ethdev_driver.h>
15 #include <rte_flow_driver.h>
16 #include <rte_malloc.h>
17 #include <rte_cycles.h>
20 #include <rte_vxlan.h>
22 #include <rte_eal_paging.h>
25 #include <rte_mtr_driver.h>
26 #include <rte_tailq.h>
28 #include <mlx5_glue.h>
29 #include <mlx5_devx_cmds.h>
31 #include <mlx5_malloc.h>
33 #include "mlx5_defs.h"
35 #include "mlx5_common_os.h"
36 #include "mlx5_flow.h"
37 #include "mlx5_flow_os.h"
40 #include "rte_pmd_mlx5.h"
42 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
44 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
45 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
48 #ifndef HAVE_MLX5DV_DR_ESWITCH
49 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
50 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
54 #ifndef HAVE_MLX5DV_DR
55 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
58 /* VLAN header definitions */
59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
78 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
79 struct mlx5_flow_tbl_resource *tbl);
82 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
83 uint32_t encap_decap_idx);
86 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
89 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
92 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
96 * Initialize flow attributes structure according to flow items' types.
98 * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
99 * mode. For tunnel mode, the items to be modified are the outermost ones.
102 * Pointer to item specification.
104 * Pointer to flow attributes structure.
105 * @param[in] dev_flow
106 * Pointer to the sub flow.
107 * @param[in] tunnel_decap
108 * Whether action is after tunnel decapsulation.
111 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
112 struct mlx5_flow *dev_flow, bool tunnel_decap)
114 uint64_t layers = dev_flow->handle->layers;
117 * If layers is already initialized, it means this dev_flow is the
118 * suffix flow, the layers flags is set by the prefix flow. Need to
119 * use the layer flags from prefix flow as the suffix flow may not
120 * have the user defined items as the flow is split.
123 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
125 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
127 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
129 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
134 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
135 uint8_t next_protocol = 0xff;
136 switch (item->type) {
137 case RTE_FLOW_ITEM_TYPE_GRE:
138 case RTE_FLOW_ITEM_TYPE_NVGRE:
139 case RTE_FLOW_ITEM_TYPE_VXLAN:
140 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
141 case RTE_FLOW_ITEM_TYPE_GENEVE:
142 case RTE_FLOW_ITEM_TYPE_MPLS:
146 case RTE_FLOW_ITEM_TYPE_IPV4:
149 if (item->mask != NULL &&
150 ((const struct rte_flow_item_ipv4 *)
151 item->mask)->hdr.next_proto_id)
153 ((const struct rte_flow_item_ipv4 *)
154 (item->spec))->hdr.next_proto_id &
155 ((const struct rte_flow_item_ipv4 *)
156 (item->mask))->hdr.next_proto_id;
157 if ((next_protocol == IPPROTO_IPIP ||
158 next_protocol == IPPROTO_IPV6) && tunnel_decap)
161 case RTE_FLOW_ITEM_TYPE_IPV6:
164 if (item->mask != NULL &&
165 ((const struct rte_flow_item_ipv6 *)
166 item->mask)->hdr.proto)
168 ((const struct rte_flow_item_ipv6 *)
169 (item->spec))->hdr.proto &
170 ((const struct rte_flow_item_ipv6 *)
171 (item->mask))->hdr.proto;
172 if ((next_protocol == IPPROTO_IPIP ||
173 next_protocol == IPPROTO_IPV6) && tunnel_decap)
176 case RTE_FLOW_ITEM_TYPE_UDP:
180 case RTE_FLOW_ITEM_TYPE_TCP:
192 * Convert rte_mtr_color to mlx5 color.
201 rte_col_2_mlx5_col(enum rte_color rcol)
204 case RTE_COLOR_GREEN:
205 return MLX5_FLOW_COLOR_GREEN;
206 case RTE_COLOR_YELLOW:
207 return MLX5_FLOW_COLOR_YELLOW;
209 return MLX5_FLOW_COLOR_RED;
213 return MLX5_FLOW_COLOR_UNDEFINED;
216 struct field_modify_info {
217 uint32_t size; /* Size of field in protocol header, in bytes. */
218 uint32_t offset; /* Offset of field in protocol header, in bytes. */
219 enum mlx5_modification_field id;
222 struct field_modify_info modify_eth[] = {
223 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
224 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
225 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
226 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
230 struct field_modify_info modify_vlan_out_first_vid[] = {
231 /* Size in bits !!! */
232 {12, 0, MLX5_MODI_OUT_FIRST_VID},
236 struct field_modify_info modify_ipv4[] = {
237 {1, 1, MLX5_MODI_OUT_IP_DSCP},
238 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
239 {4, 12, MLX5_MODI_OUT_SIPV4},
240 {4, 16, MLX5_MODI_OUT_DIPV4},
244 struct field_modify_info modify_ipv6[] = {
245 {1, 0, MLX5_MODI_OUT_IP_DSCP},
246 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
247 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
248 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
249 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
250 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
251 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
252 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
253 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
254 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
258 struct field_modify_info modify_udp[] = {
259 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
260 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
264 struct field_modify_info modify_tcp[] = {
265 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
266 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
267 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
268 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
272 static const struct rte_flow_item *
273 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
275 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
276 switch (item->type) {
279 case RTE_FLOW_ITEM_TYPE_VXLAN:
280 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
281 case RTE_FLOW_ITEM_TYPE_GRE:
282 case RTE_FLOW_ITEM_TYPE_MPLS:
283 case RTE_FLOW_ITEM_TYPE_NVGRE:
284 case RTE_FLOW_ITEM_TYPE_GENEVE:
286 case RTE_FLOW_ITEM_TYPE_IPV4:
287 case RTE_FLOW_ITEM_TYPE_IPV6:
288 if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
289 item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
298 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
299 uint8_t next_protocol, uint64_t *item_flags,
302 MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
303 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
304 if (next_protocol == IPPROTO_IPIP) {
305 *item_flags |= MLX5_FLOW_LAYER_IPIP;
308 if (next_protocol == IPPROTO_IPV6) {
309 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
314 /* Update VLAN's VID/PCP based on input rte_flow_action.
317 * Pointer to struct rte_flow_action.
319 * Pointer to struct rte_vlan_hdr.
322 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
323 struct rte_vlan_hdr *vlan)
326 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
328 ((const struct rte_flow_action_of_set_vlan_pcp *)
329 action->conf)->vlan_pcp;
330 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
331 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
332 vlan->vlan_tci |= vlan_tci;
333 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
334 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
335 vlan->vlan_tci |= rte_be_to_cpu_16
336 (((const struct rte_flow_action_of_set_vlan_vid *)
337 action->conf)->vlan_vid);
342 * Fetch 1, 2, 3 or 4 byte field from the byte array
343 * and return as unsigned integer in host-endian format.
346 * Pointer to data array.
348 * Size of field to extract.
351 * converted field in host endian format.
353 static inline uint32_t
354 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
363 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
366 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
367 ret = (ret << 8) | *(data + sizeof(uint16_t));
370 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
381 * Convert modify-header action to DV specification.
383 * Data length of each action is determined by provided field description
384 * and the item mask. Data bit offset and width of each action is determined
385 * by provided item mask.
388 * Pointer to item specification.
390 * Pointer to field modification information.
391 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
392 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
393 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
395 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
396 * Negative offset value sets the same offset as source offset.
397 * size field is ignored, value is taken from source field.
398 * @param[in,out] resource
399 * Pointer to the modify-header resource.
401 * Type of modification.
403 * Pointer to the error structure.
406 * 0 on success, a negative errno value otherwise and rte_errno is set.
409 flow_dv_convert_modify_action(struct rte_flow_item *item,
410 struct field_modify_info *field,
411 struct field_modify_info *dcopy,
412 struct mlx5_flow_dv_modify_hdr_resource *resource,
413 uint32_t type, struct rte_flow_error *error)
415 uint32_t i = resource->actions_num;
416 struct mlx5_modification_cmd *actions = resource->actions;
417 uint32_t carry_b = 0;
420 * The item and mask are provided in big-endian format.
421 * The fields should be presented as in big-endian format either.
422 * Mask must be always present, it defines the actual field width.
424 MLX5_ASSERT(item->mask);
425 MLX5_ASSERT(field->size);
431 bool next_field = true;
432 bool next_dcopy = true;
434 if (i >= MLX5_MAX_MODIFY_NUM)
435 return rte_flow_error_set(error, EINVAL,
436 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
437 "too many items to modify");
438 /* Fetch variable byte size mask from the array. */
439 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
440 field->offset, field->size);
445 /* Deduce actual data width in bits from mask value. */
446 off_b = rte_bsf32(mask) + carry_b;
447 size_b = sizeof(uint32_t) * CHAR_BIT -
448 off_b - __builtin_clz(mask);
450 actions[i] = (struct mlx5_modification_cmd) {
454 .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
457 if (type == MLX5_MODIFICATION_TYPE_COPY) {
459 actions[i].dst_field = dcopy->id;
460 actions[i].dst_offset =
461 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
462 /* Convert entire record to big-endian format. */
463 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
465 * Destination field overflow. Copy leftovers of
466 * a source field to the next destination field.
469 if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
472 dcopy->size * CHAR_BIT - dcopy->offset;
473 carry_b = actions[i].length;
477 * Not enough bits in a source filed to fill a
478 * destination field. Switch to the next source.
480 if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
481 (size_b == field->size * CHAR_BIT - off_b)) {
483 field->size * CHAR_BIT - off_b;
484 dcopy->offset += actions[i].length;
490 MLX5_ASSERT(item->spec);
491 data = flow_dv_fetch_field((const uint8_t *)item->spec +
492 field->offset, field->size);
493 /* Shift out the trailing masked bits from data. */
494 data = (data & mask) >> off_b;
495 actions[i].data1 = rte_cpu_to_be_32(data);
497 /* Convert entire record to expected big-endian format. */
498 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
502 } while (field->size);
503 if (resource->actions_num == i)
504 return rte_flow_error_set(error, EINVAL,
505 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
506 "invalid modification flow item");
507 resource->actions_num = i;
512 * Convert modify-header set IPv4 address action to DV specification.
514 * @param[in,out] resource
515 * Pointer to the modify-header resource.
517 * Pointer to action specification.
519 * Pointer to the error structure.
522 * 0 on success, a negative errno value otherwise and rte_errno is set.
525 flow_dv_convert_action_modify_ipv4
526 (struct mlx5_flow_dv_modify_hdr_resource *resource,
527 const struct rte_flow_action *action,
528 struct rte_flow_error *error)
530 const struct rte_flow_action_set_ipv4 *conf =
531 (const struct rte_flow_action_set_ipv4 *)(action->conf);
532 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
533 struct rte_flow_item_ipv4 ipv4;
534 struct rte_flow_item_ipv4 ipv4_mask;
536 memset(&ipv4, 0, sizeof(ipv4));
537 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
538 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
539 ipv4.hdr.src_addr = conf->ipv4_addr;
540 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
542 ipv4.hdr.dst_addr = conf->ipv4_addr;
543 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
546 item.mask = &ipv4_mask;
547 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
548 MLX5_MODIFICATION_TYPE_SET, error);
552 * Convert modify-header set IPv6 address action to DV specification.
554 * @param[in,out] resource
555 * Pointer to the modify-header resource.
557 * Pointer to action specification.
559 * Pointer to the error structure.
562 * 0 on success, a negative errno value otherwise and rte_errno is set.
565 flow_dv_convert_action_modify_ipv6
566 (struct mlx5_flow_dv_modify_hdr_resource *resource,
567 const struct rte_flow_action *action,
568 struct rte_flow_error *error)
570 const struct rte_flow_action_set_ipv6 *conf =
571 (const struct rte_flow_action_set_ipv6 *)(action->conf);
572 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
573 struct rte_flow_item_ipv6 ipv6;
574 struct rte_flow_item_ipv6 ipv6_mask;
576 memset(&ipv6, 0, sizeof(ipv6));
577 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
578 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
579 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
580 sizeof(ipv6.hdr.src_addr));
581 memcpy(&ipv6_mask.hdr.src_addr,
582 &rte_flow_item_ipv6_mask.hdr.src_addr,
583 sizeof(ipv6.hdr.src_addr));
585 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
586 sizeof(ipv6.hdr.dst_addr));
587 memcpy(&ipv6_mask.hdr.dst_addr,
588 &rte_flow_item_ipv6_mask.hdr.dst_addr,
589 sizeof(ipv6.hdr.dst_addr));
592 item.mask = &ipv6_mask;
593 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
594 MLX5_MODIFICATION_TYPE_SET, error);
598 * Convert modify-header set MAC address action to DV specification.
600 * @param[in,out] resource
601 * Pointer to the modify-header resource.
603 * Pointer to action specification.
605 * Pointer to the error structure.
608 * 0 on success, a negative errno value otherwise and rte_errno is set.
611 flow_dv_convert_action_modify_mac
612 (struct mlx5_flow_dv_modify_hdr_resource *resource,
613 const struct rte_flow_action *action,
614 struct rte_flow_error *error)
616 const struct rte_flow_action_set_mac *conf =
617 (const struct rte_flow_action_set_mac *)(action->conf);
618 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
619 struct rte_flow_item_eth eth;
620 struct rte_flow_item_eth eth_mask;
622 memset(ð, 0, sizeof(eth));
623 memset(ð_mask, 0, sizeof(eth_mask));
624 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
625 memcpy(ð.src.addr_bytes, &conf->mac_addr,
626 sizeof(eth.src.addr_bytes));
627 memcpy(ð_mask.src.addr_bytes,
628 &rte_flow_item_eth_mask.src.addr_bytes,
629 sizeof(eth_mask.src.addr_bytes));
631 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
632 sizeof(eth.dst.addr_bytes));
633 memcpy(ð_mask.dst.addr_bytes,
634 &rte_flow_item_eth_mask.dst.addr_bytes,
635 sizeof(eth_mask.dst.addr_bytes));
638 item.mask = ð_mask;
639 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
640 MLX5_MODIFICATION_TYPE_SET, error);
644 * Convert modify-header set VLAN VID action to DV specification.
646 * @param[in,out] resource
647 * Pointer to the modify-header resource.
649 * Pointer to action specification.
651 * Pointer to the error structure.
654 * 0 on success, a negative errno value otherwise and rte_errno is set.
657 flow_dv_convert_action_modify_vlan_vid
658 (struct mlx5_flow_dv_modify_hdr_resource *resource,
659 const struct rte_flow_action *action,
660 struct rte_flow_error *error)
662 const struct rte_flow_action_of_set_vlan_vid *conf =
663 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
664 int i = resource->actions_num;
665 struct mlx5_modification_cmd *actions = resource->actions;
666 struct field_modify_info *field = modify_vlan_out_first_vid;
668 if (i >= MLX5_MAX_MODIFY_NUM)
669 return rte_flow_error_set(error, EINVAL,
670 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
671 "too many items to modify");
672 actions[i] = (struct mlx5_modification_cmd) {
673 .action_type = MLX5_MODIFICATION_TYPE_SET,
675 .length = field->size,
676 .offset = field->offset,
678 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
679 actions[i].data1 = conf->vlan_vid;
680 actions[i].data1 = actions[i].data1 << 16;
681 resource->actions_num = ++i;
686 * Convert modify-header set TP action to DV specification.
688 * @param[in,out] resource
689 * Pointer to the modify-header resource.
691 * Pointer to action specification.
693 * Pointer to rte_flow_item objects list.
695 * Pointer to flow attributes structure.
696 * @param[in] dev_flow
697 * Pointer to the sub flow.
698 * @param[in] tunnel_decap
699 * Whether action is after tunnel decapsulation.
701 * Pointer to the error structure.
704 * 0 on success, a negative errno value otherwise and rte_errno is set.
707 flow_dv_convert_action_modify_tp
708 (struct mlx5_flow_dv_modify_hdr_resource *resource,
709 const struct rte_flow_action *action,
710 const struct rte_flow_item *items,
711 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
712 bool tunnel_decap, struct rte_flow_error *error)
714 const struct rte_flow_action_set_tp *conf =
715 (const struct rte_flow_action_set_tp *)(action->conf);
716 struct rte_flow_item item;
717 struct rte_flow_item_udp udp;
718 struct rte_flow_item_udp udp_mask;
719 struct rte_flow_item_tcp tcp;
720 struct rte_flow_item_tcp tcp_mask;
721 struct field_modify_info *field;
724 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
726 memset(&udp, 0, sizeof(udp));
727 memset(&udp_mask, 0, sizeof(udp_mask));
728 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
729 udp.hdr.src_port = conf->port;
730 udp_mask.hdr.src_port =
731 rte_flow_item_udp_mask.hdr.src_port;
733 udp.hdr.dst_port = conf->port;
734 udp_mask.hdr.dst_port =
735 rte_flow_item_udp_mask.hdr.dst_port;
737 item.type = RTE_FLOW_ITEM_TYPE_UDP;
739 item.mask = &udp_mask;
742 MLX5_ASSERT(attr->tcp);
743 memset(&tcp, 0, sizeof(tcp));
744 memset(&tcp_mask, 0, sizeof(tcp_mask));
745 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
746 tcp.hdr.src_port = conf->port;
747 tcp_mask.hdr.src_port =
748 rte_flow_item_tcp_mask.hdr.src_port;
750 tcp.hdr.dst_port = conf->port;
751 tcp_mask.hdr.dst_port =
752 rte_flow_item_tcp_mask.hdr.dst_port;
754 item.type = RTE_FLOW_ITEM_TYPE_TCP;
756 item.mask = &tcp_mask;
759 return flow_dv_convert_modify_action(&item, field, NULL, resource,
760 MLX5_MODIFICATION_TYPE_SET, error);
764 * Convert modify-header set TTL action to DV specification.
766 * @param[in,out] resource
767 * Pointer to the modify-header resource.
769 * Pointer to action specification.
771 * Pointer to rte_flow_item objects list.
773 * Pointer to flow attributes structure.
774 * @param[in] dev_flow
775 * Pointer to the sub flow.
776 * @param[in] tunnel_decap
777 * Whether action is after tunnel decapsulation.
779 * Pointer to the error structure.
782 * 0 on success, a negative errno value otherwise and rte_errno is set.
785 flow_dv_convert_action_modify_ttl
786 (struct mlx5_flow_dv_modify_hdr_resource *resource,
787 const struct rte_flow_action *action,
788 const struct rte_flow_item *items,
789 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
790 bool tunnel_decap, struct rte_flow_error *error)
792 const struct rte_flow_action_set_ttl *conf =
793 (const struct rte_flow_action_set_ttl *)(action->conf);
794 struct rte_flow_item item;
795 struct rte_flow_item_ipv4 ipv4;
796 struct rte_flow_item_ipv4 ipv4_mask;
797 struct rte_flow_item_ipv6 ipv6;
798 struct rte_flow_item_ipv6 ipv6_mask;
799 struct field_modify_info *field;
802 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
804 memset(&ipv4, 0, sizeof(ipv4));
805 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
806 ipv4.hdr.time_to_live = conf->ttl_value;
807 ipv4_mask.hdr.time_to_live = 0xFF;
808 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
810 item.mask = &ipv4_mask;
813 MLX5_ASSERT(attr->ipv6);
814 memset(&ipv6, 0, sizeof(ipv6));
815 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
816 ipv6.hdr.hop_limits = conf->ttl_value;
817 ipv6_mask.hdr.hop_limits = 0xFF;
818 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
820 item.mask = &ipv6_mask;
823 return flow_dv_convert_modify_action(&item, field, NULL, resource,
824 MLX5_MODIFICATION_TYPE_SET, error);
828 * Convert modify-header decrement TTL action to DV specification.
830 * @param[in,out] resource
831 * Pointer to the modify-header resource.
833 * Pointer to action specification.
835 * Pointer to rte_flow_item objects list.
837 * Pointer to flow attributes structure.
838 * @param[in] dev_flow
839 * Pointer to the sub flow.
840 * @param[in] tunnel_decap
841 * Whether action is after tunnel decapsulation.
843 * Pointer to the error structure.
846 * 0 on success, a negative errno value otherwise and rte_errno is set.
849 flow_dv_convert_action_modify_dec_ttl
850 (struct mlx5_flow_dv_modify_hdr_resource *resource,
851 const struct rte_flow_item *items,
852 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
853 bool tunnel_decap, struct rte_flow_error *error)
855 struct rte_flow_item item;
856 struct rte_flow_item_ipv4 ipv4;
857 struct rte_flow_item_ipv4 ipv4_mask;
858 struct rte_flow_item_ipv6 ipv6;
859 struct rte_flow_item_ipv6 ipv6_mask;
860 struct field_modify_info *field;
863 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
865 memset(&ipv4, 0, sizeof(ipv4));
866 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
867 ipv4.hdr.time_to_live = 0xFF;
868 ipv4_mask.hdr.time_to_live = 0xFF;
869 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
871 item.mask = &ipv4_mask;
874 MLX5_ASSERT(attr->ipv6);
875 memset(&ipv6, 0, sizeof(ipv6));
876 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
877 ipv6.hdr.hop_limits = 0xFF;
878 ipv6_mask.hdr.hop_limits = 0xFF;
879 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
881 item.mask = &ipv6_mask;
884 return flow_dv_convert_modify_action(&item, field, NULL, resource,
885 MLX5_MODIFICATION_TYPE_ADD, error);
889 * Convert modify-header increment/decrement TCP Sequence number
890 * to DV specification.
892 * @param[in,out] resource
893 * Pointer to the modify-header resource.
895 * Pointer to action specification.
897 * Pointer to the error structure.
900 * 0 on success, a negative errno value otherwise and rte_errno is set.
903 flow_dv_convert_action_modify_tcp_seq
904 (struct mlx5_flow_dv_modify_hdr_resource *resource,
905 const struct rte_flow_action *action,
906 struct rte_flow_error *error)
908 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
909 uint64_t value = rte_be_to_cpu_32(*conf);
910 struct rte_flow_item item;
911 struct rte_flow_item_tcp tcp;
912 struct rte_flow_item_tcp tcp_mask;
914 memset(&tcp, 0, sizeof(tcp));
915 memset(&tcp_mask, 0, sizeof(tcp_mask));
916 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
918 * The HW has no decrement operation, only increment operation.
919 * To simulate decrement X from Y using increment operation
920 * we need to add UINT32_MAX X times to Y.
921 * Each adding of UINT32_MAX decrements Y by 1.
924 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
925 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
926 item.type = RTE_FLOW_ITEM_TYPE_TCP;
928 item.mask = &tcp_mask;
929 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
930 MLX5_MODIFICATION_TYPE_ADD, error);
934 * Convert modify-header increment/decrement TCP Acknowledgment number
935 * to DV specification.
937 * @param[in,out] resource
938 * Pointer to the modify-header resource.
940 * Pointer to action specification.
942 * Pointer to the error structure.
945 * 0 on success, a negative errno value otherwise and rte_errno is set.
948 flow_dv_convert_action_modify_tcp_ack
949 (struct mlx5_flow_dv_modify_hdr_resource *resource,
950 const struct rte_flow_action *action,
951 struct rte_flow_error *error)
953 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
954 uint64_t value = rte_be_to_cpu_32(*conf);
955 struct rte_flow_item item;
956 struct rte_flow_item_tcp tcp;
957 struct rte_flow_item_tcp tcp_mask;
959 memset(&tcp, 0, sizeof(tcp));
960 memset(&tcp_mask, 0, sizeof(tcp_mask));
961 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
963 * The HW has no decrement operation, only increment operation.
964 * To simulate decrement X from Y using increment operation
965 * we need to add UINT32_MAX X times to Y.
966 * Each adding of UINT32_MAX decrements Y by 1.
969 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
970 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
971 item.type = RTE_FLOW_ITEM_TYPE_TCP;
973 item.mask = &tcp_mask;
974 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
975 MLX5_MODIFICATION_TYPE_ADD, error);
978 static enum mlx5_modification_field reg_to_field[] = {
979 [REG_NON] = MLX5_MODI_OUT_NONE,
980 [REG_A] = MLX5_MODI_META_DATA_REG_A,
981 [REG_B] = MLX5_MODI_META_DATA_REG_B,
982 [REG_C_0] = MLX5_MODI_META_REG_C_0,
983 [REG_C_1] = MLX5_MODI_META_REG_C_1,
984 [REG_C_2] = MLX5_MODI_META_REG_C_2,
985 [REG_C_3] = MLX5_MODI_META_REG_C_3,
986 [REG_C_4] = MLX5_MODI_META_REG_C_4,
987 [REG_C_5] = MLX5_MODI_META_REG_C_5,
988 [REG_C_6] = MLX5_MODI_META_REG_C_6,
989 [REG_C_7] = MLX5_MODI_META_REG_C_7,
993 * Convert register set to DV specification.
995 * @param[in,out] resource
996 * Pointer to the modify-header resource.
998 * Pointer to action specification.
1000 * Pointer to the error structure.
1003 * 0 on success, a negative errno value otherwise and rte_errno is set.
1006 flow_dv_convert_action_set_reg
1007 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1008 const struct rte_flow_action *action,
1009 struct rte_flow_error *error)
1011 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1012 struct mlx5_modification_cmd *actions = resource->actions;
1013 uint32_t i = resource->actions_num;
1015 if (i >= MLX5_MAX_MODIFY_NUM)
1016 return rte_flow_error_set(error, EINVAL,
1017 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1018 "too many items to modify");
1019 MLX5_ASSERT(conf->id != REG_NON);
1020 MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1021 actions[i] = (struct mlx5_modification_cmd) {
1022 .action_type = MLX5_MODIFICATION_TYPE_SET,
1023 .field = reg_to_field[conf->id],
1024 .offset = conf->offset,
1025 .length = conf->length,
1027 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1028 actions[i].data1 = rte_cpu_to_be_32(conf->data);
1030 resource->actions_num = i;
1035 * Convert SET_TAG action to DV specification.
1038 * Pointer to the rte_eth_dev structure.
1039 * @param[in,out] resource
1040 * Pointer to the modify-header resource.
1042 * Pointer to action specification.
1044 * Pointer to the error structure.
1047 * 0 on success, a negative errno value otherwise and rte_errno is set.
1050 flow_dv_convert_action_set_tag
1051 (struct rte_eth_dev *dev,
1052 struct mlx5_flow_dv_modify_hdr_resource *resource,
1053 const struct rte_flow_action_set_tag *conf,
1054 struct rte_flow_error *error)
1056 rte_be32_t data = rte_cpu_to_be_32(conf->data);
1057 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1058 struct rte_flow_item item = {
1062 struct field_modify_info reg_c_x[] = {
1065 enum mlx5_modification_field reg_type;
1068 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1071 MLX5_ASSERT(ret != REG_NON);
1072 MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1073 reg_type = reg_to_field[ret];
1074 MLX5_ASSERT(reg_type > 0);
1075 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1076 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1077 MLX5_MODIFICATION_TYPE_SET, error);
1081 * Convert internal COPY_REG action to DV specification.
1084 * Pointer to the rte_eth_dev structure.
1085 * @param[in,out] res
1086 * Pointer to the modify-header resource.
1088 * Pointer to action specification.
1090 * Pointer to the error structure.
1093 * 0 on success, a negative errno value otherwise and rte_errno is set.
1096 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1097 struct mlx5_flow_dv_modify_hdr_resource *res,
1098 const struct rte_flow_action *action,
1099 struct rte_flow_error *error)
1101 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1102 rte_be32_t mask = RTE_BE32(UINT32_MAX);
1103 struct rte_flow_item item = {
1107 struct field_modify_info reg_src[] = {
1108 {4, 0, reg_to_field[conf->src]},
1111 struct field_modify_info reg_dst = {
1113 .id = reg_to_field[conf->dst],
1115 /* Adjust reg_c[0] usage according to reported mask. */
1116 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1117 struct mlx5_priv *priv = dev->data->dev_private;
1118 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1120 MLX5_ASSERT(reg_c0);
1121 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1122 if (conf->dst == REG_C_0) {
1123 /* Copy to reg_c[0], within mask only. */
1124 reg_dst.offset = rte_bsf32(reg_c0);
1126 * Mask is ignoring the enianness, because
1127 * there is no conversion in datapath.
1129 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1130 /* Copy from destination lower bits to reg_c[0]. */
1131 mask = reg_c0 >> reg_dst.offset;
1133 /* Copy from destination upper bits to reg_c[0]. */
1134 mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1135 rte_fls_u32(reg_c0));
1138 mask = rte_cpu_to_be_32(reg_c0);
1139 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1140 /* Copy from reg_c[0] to destination lower bits. */
1143 /* Copy from reg_c[0] to destination upper bits. */
1144 reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1145 (rte_fls_u32(reg_c0) -
1150 return flow_dv_convert_modify_action(&item,
1151 reg_src, ®_dst, res,
1152 MLX5_MODIFICATION_TYPE_COPY,
1157 * Convert MARK action to DV specification. This routine is used
1158 * in extensive metadata only and requires metadata register to be
1159 * handled. In legacy mode hardware tag resource is engaged.
1162 * Pointer to the rte_eth_dev structure.
1164 * Pointer to MARK action specification.
1165 * @param[in,out] resource
1166 * Pointer to the modify-header resource.
1168 * Pointer to the error structure.
1171 * 0 on success, a negative errno value otherwise and rte_errno is set.
1174 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1175 const struct rte_flow_action_mark *conf,
1176 struct mlx5_flow_dv_modify_hdr_resource *resource,
1177 struct rte_flow_error *error)
1179 struct mlx5_priv *priv = dev->data->dev_private;
1180 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1181 priv->sh->dv_mark_mask);
1182 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1183 struct rte_flow_item item = {
1187 struct field_modify_info reg_c_x[] = {
1193 return rte_flow_error_set(error, EINVAL,
1194 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1195 NULL, "zero mark action mask");
1196 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1199 MLX5_ASSERT(reg > 0);
1200 if (reg == REG_C_0) {
1201 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1202 uint32_t shl_c0 = rte_bsf32(msk_c0);
1204 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1205 mask = rte_cpu_to_be_32(mask) & msk_c0;
1206 mask = rte_cpu_to_be_32(mask << shl_c0);
1208 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1209 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1210 MLX5_MODIFICATION_TYPE_SET, error);
1214 * Get metadata register index for specified steering domain.
1217 * Pointer to the rte_eth_dev structure.
1219 * Attributes of flow to determine steering domain.
1221 * Pointer to the error structure.
1224 * positive index on success, a negative errno value otherwise
1225 * and rte_errno is set.
1227 static enum modify_reg
1228 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1229 const struct rte_flow_attr *attr,
1230 struct rte_flow_error *error)
1233 mlx5_flow_get_reg_id(dev, attr->transfer ?
1237 MLX5_METADATA_RX, 0, error);
1239 return rte_flow_error_set(error,
1240 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1241 NULL, "unavailable "
1242 "metadata register");
1247 * Convert SET_META action to DV specification.
1250 * Pointer to the rte_eth_dev structure.
1251 * @param[in,out] resource
1252 * Pointer to the modify-header resource.
1254 * Attributes of flow that includes this item.
1256 * Pointer to action specification.
1258 * Pointer to the error structure.
1261 * 0 on success, a negative errno value otherwise and rte_errno is set.
1264 flow_dv_convert_action_set_meta
1265 (struct rte_eth_dev *dev,
1266 struct mlx5_flow_dv_modify_hdr_resource *resource,
1267 const struct rte_flow_attr *attr,
1268 const struct rte_flow_action_set_meta *conf,
1269 struct rte_flow_error *error)
1271 uint32_t mask = rte_cpu_to_be_32(conf->mask);
1272 uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1273 struct rte_flow_item item = {
1277 struct field_modify_info reg_c_x[] = {
1280 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1284 MLX5_ASSERT(reg != REG_NON);
1285 if (reg == REG_C_0) {
1286 struct mlx5_priv *priv = dev->data->dev_private;
1287 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1288 uint32_t shl_c0 = rte_bsf32(msk_c0);
1290 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1291 mask = rte_cpu_to_be_32(mask) & msk_c0;
1292 mask = rte_cpu_to_be_32(mask << shl_c0);
1294 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1295 /* The routine expects parameters in memory as big-endian ones. */
1296 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1297 MLX5_MODIFICATION_TYPE_SET, error);
1301 * Convert modify-header set IPv4 DSCP action to DV specification.
1303 * @param[in,out] resource
1304 * Pointer to the modify-header resource.
1306 * Pointer to action specification.
1308 * Pointer to the error structure.
1311 * 0 on success, a negative errno value otherwise and rte_errno is set.
1314 flow_dv_convert_action_modify_ipv4_dscp
1315 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1316 const struct rte_flow_action *action,
1317 struct rte_flow_error *error)
1319 const struct rte_flow_action_set_dscp *conf =
1320 (const struct rte_flow_action_set_dscp *)(action->conf);
1321 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1322 struct rte_flow_item_ipv4 ipv4;
1323 struct rte_flow_item_ipv4 ipv4_mask;
1325 memset(&ipv4, 0, sizeof(ipv4));
1326 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1327 ipv4.hdr.type_of_service = conf->dscp;
1328 ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1330 item.mask = &ipv4_mask;
1331 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1332 MLX5_MODIFICATION_TYPE_SET, error);
1336 * Convert modify-header set IPv6 DSCP action to DV specification.
1338 * @param[in,out] resource
1339 * Pointer to the modify-header resource.
1341 * Pointer to action specification.
1343 * Pointer to the error structure.
1346 * 0 on success, a negative errno value otherwise and rte_errno is set.
1349 flow_dv_convert_action_modify_ipv6_dscp
1350 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1351 const struct rte_flow_action *action,
1352 struct rte_flow_error *error)
1354 const struct rte_flow_action_set_dscp *conf =
1355 (const struct rte_flow_action_set_dscp *)(action->conf);
1356 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1357 struct rte_flow_item_ipv6 ipv6;
1358 struct rte_flow_item_ipv6 ipv6_mask;
1360 memset(&ipv6, 0, sizeof(ipv6));
1361 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1363 * Even though the DSCP bits offset of IPv6 is not byte aligned,
1364 * rdma-core only accept the DSCP bits byte aligned start from
1365 * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1366 * bits in IPv6 case as rdma-core requires byte aligned value.
1368 ipv6.hdr.vtc_flow = conf->dscp;
1369 ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1371 item.mask = &ipv6_mask;
1372 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1373 MLX5_MODIFICATION_TYPE_SET, error);
1377 mlx5_flow_item_field_width(struct mlx5_dev_config *config,
1378 enum rte_flow_field_id field)
1381 case RTE_FLOW_FIELD_START:
1383 case RTE_FLOW_FIELD_MAC_DST:
1384 case RTE_FLOW_FIELD_MAC_SRC:
1386 case RTE_FLOW_FIELD_VLAN_TYPE:
1388 case RTE_FLOW_FIELD_VLAN_ID:
1390 case RTE_FLOW_FIELD_MAC_TYPE:
1392 case RTE_FLOW_FIELD_IPV4_DSCP:
1394 case RTE_FLOW_FIELD_IPV4_TTL:
1396 case RTE_FLOW_FIELD_IPV4_SRC:
1397 case RTE_FLOW_FIELD_IPV4_DST:
1399 case RTE_FLOW_FIELD_IPV6_DSCP:
1401 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1403 case RTE_FLOW_FIELD_IPV6_SRC:
1404 case RTE_FLOW_FIELD_IPV6_DST:
1406 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1407 case RTE_FLOW_FIELD_TCP_PORT_DST:
1409 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1410 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1412 case RTE_FLOW_FIELD_TCP_FLAGS:
1414 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1415 case RTE_FLOW_FIELD_UDP_PORT_DST:
1417 case RTE_FLOW_FIELD_VXLAN_VNI:
1418 case RTE_FLOW_FIELD_GENEVE_VNI:
1420 case RTE_FLOW_FIELD_GTP_TEID:
1421 case RTE_FLOW_FIELD_TAG:
1423 case RTE_FLOW_FIELD_MARK:
1425 case RTE_FLOW_FIELD_META:
1426 if (config->dv_xmeta_en == MLX5_XMETA_MODE_META16)
1428 else if (config->dv_xmeta_en == MLX5_XMETA_MODE_META32)
1432 case RTE_FLOW_FIELD_POINTER:
1433 case RTE_FLOW_FIELD_VALUE:
1442 mlx5_flow_field_id_to_modify_info
1443 (const struct rte_flow_action_modify_data *data,
1444 struct field_modify_info *info,
1445 uint32_t *mask, uint32_t *value,
1446 uint32_t width, uint32_t dst_width,
1447 struct rte_eth_dev *dev,
1448 const struct rte_flow_attr *attr,
1449 struct rte_flow_error *error)
1451 struct mlx5_priv *priv = dev->data->dev_private;
1452 struct mlx5_dev_config *config = &priv->config;
1456 switch (data->field) {
1457 case RTE_FLOW_FIELD_START:
1458 /* not supported yet */
1461 case RTE_FLOW_FIELD_MAC_DST:
1462 off = data->offset > 16 ? data->offset - 16 : 0;
1464 if (data->offset < 16) {
1465 info[idx] = (struct field_modify_info){2, 0,
1466 MLX5_MODI_OUT_DMAC_15_0};
1468 mask[idx] = rte_cpu_to_be_16(0xffff >>
1472 mask[idx] = RTE_BE16(0xffff);
1479 info[idx] = (struct field_modify_info){4, 4 * idx,
1480 MLX5_MODI_OUT_DMAC_47_16};
1481 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1482 (32 - width)) << off);
1484 if (data->offset < 16)
1485 info[idx++] = (struct field_modify_info){2, 0,
1486 MLX5_MODI_OUT_DMAC_15_0};
1487 info[idx] = (struct field_modify_info){4, off,
1488 MLX5_MODI_OUT_DMAC_47_16};
1491 case RTE_FLOW_FIELD_MAC_SRC:
1492 off = data->offset > 16 ? data->offset - 16 : 0;
1494 if (data->offset < 16) {
1495 info[idx] = (struct field_modify_info){2, 0,
1496 MLX5_MODI_OUT_SMAC_15_0};
1498 mask[idx] = rte_cpu_to_be_16(0xffff >>
1502 mask[idx] = RTE_BE16(0xffff);
1509 info[idx] = (struct field_modify_info){4, 4 * idx,
1510 MLX5_MODI_OUT_SMAC_47_16};
1511 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1512 (32 - width)) << off);
1514 if (data->offset < 16)
1515 info[idx++] = (struct field_modify_info){2, 0,
1516 MLX5_MODI_OUT_SMAC_15_0};
1517 info[idx] = (struct field_modify_info){4, off,
1518 MLX5_MODI_OUT_SMAC_47_16};
1521 case RTE_FLOW_FIELD_VLAN_TYPE:
1522 /* not supported yet */
1524 case RTE_FLOW_FIELD_VLAN_ID:
1525 info[idx] = (struct field_modify_info){2, 0,
1526 MLX5_MODI_OUT_FIRST_VID};
1528 mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1530 case RTE_FLOW_FIELD_MAC_TYPE:
1531 info[idx] = (struct field_modify_info){2, 0,
1532 MLX5_MODI_OUT_ETHERTYPE};
1534 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1536 case RTE_FLOW_FIELD_IPV4_DSCP:
1537 info[idx] = (struct field_modify_info){1, 0,
1538 MLX5_MODI_OUT_IP_DSCP};
1540 mask[idx] = 0x3f >> (6 - width);
1542 case RTE_FLOW_FIELD_IPV4_TTL:
1543 info[idx] = (struct field_modify_info){1, 0,
1544 MLX5_MODI_OUT_IPV4_TTL};
1546 mask[idx] = 0xff >> (8 - width);
1548 case RTE_FLOW_FIELD_IPV4_SRC:
1549 info[idx] = (struct field_modify_info){4, 0,
1550 MLX5_MODI_OUT_SIPV4};
1552 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1555 case RTE_FLOW_FIELD_IPV4_DST:
1556 info[idx] = (struct field_modify_info){4, 0,
1557 MLX5_MODI_OUT_DIPV4};
1559 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1562 case RTE_FLOW_FIELD_IPV6_DSCP:
1563 info[idx] = (struct field_modify_info){1, 0,
1564 MLX5_MODI_OUT_IP_DSCP};
1566 mask[idx] = 0x3f >> (6 - width);
1568 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1569 info[idx] = (struct field_modify_info){1, 0,
1570 MLX5_MODI_OUT_IPV6_HOPLIMIT};
1572 mask[idx] = 0xff >> (8 - width);
1574 case RTE_FLOW_FIELD_IPV6_SRC:
1576 if (data->offset < 32) {
1577 info[idx] = (struct field_modify_info){4,
1579 MLX5_MODI_OUT_SIPV6_31_0};
1582 rte_cpu_to_be_32(0xffffffff >>
1586 mask[idx] = RTE_BE32(0xffffffff);
1593 if (data->offset < 64) {
1594 info[idx] = (struct field_modify_info){4,
1596 MLX5_MODI_OUT_SIPV6_63_32};
1599 rte_cpu_to_be_32(0xffffffff >>
1603 mask[idx] = RTE_BE32(0xffffffff);
1610 if (data->offset < 96) {
1611 info[idx] = (struct field_modify_info){4,
1613 MLX5_MODI_OUT_SIPV6_95_64};
1616 rte_cpu_to_be_32(0xffffffff >>
1620 mask[idx] = RTE_BE32(0xffffffff);
1627 info[idx] = (struct field_modify_info){4, 4 * idx,
1628 MLX5_MODI_OUT_SIPV6_127_96};
1629 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1632 if (data->offset < 32)
1633 info[idx++] = (struct field_modify_info){4, 0,
1634 MLX5_MODI_OUT_SIPV6_31_0};
1635 if (data->offset < 64)
1636 info[idx++] = (struct field_modify_info){4, 0,
1637 MLX5_MODI_OUT_SIPV6_63_32};
1638 if (data->offset < 96)
1639 info[idx++] = (struct field_modify_info){4, 0,
1640 MLX5_MODI_OUT_SIPV6_95_64};
1641 if (data->offset < 128)
1642 info[idx++] = (struct field_modify_info){4, 0,
1643 MLX5_MODI_OUT_SIPV6_127_96};
1646 case RTE_FLOW_FIELD_IPV6_DST:
1648 if (data->offset < 32) {
1649 info[idx] = (struct field_modify_info){4,
1651 MLX5_MODI_OUT_DIPV6_31_0};
1654 rte_cpu_to_be_32(0xffffffff >>
1658 mask[idx] = RTE_BE32(0xffffffff);
1665 if (data->offset < 64) {
1666 info[idx] = (struct field_modify_info){4,
1668 MLX5_MODI_OUT_DIPV6_63_32};
1671 rte_cpu_to_be_32(0xffffffff >>
1675 mask[idx] = RTE_BE32(0xffffffff);
1682 if (data->offset < 96) {
1683 info[idx] = (struct field_modify_info){4,
1685 MLX5_MODI_OUT_DIPV6_95_64};
1688 rte_cpu_to_be_32(0xffffffff >>
1692 mask[idx] = RTE_BE32(0xffffffff);
1699 info[idx] = (struct field_modify_info){4, 4 * idx,
1700 MLX5_MODI_OUT_DIPV6_127_96};
1701 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1704 if (data->offset < 32)
1705 info[idx++] = (struct field_modify_info){4, 0,
1706 MLX5_MODI_OUT_DIPV6_31_0};
1707 if (data->offset < 64)
1708 info[idx++] = (struct field_modify_info){4, 0,
1709 MLX5_MODI_OUT_DIPV6_63_32};
1710 if (data->offset < 96)
1711 info[idx++] = (struct field_modify_info){4, 0,
1712 MLX5_MODI_OUT_DIPV6_95_64};
1713 if (data->offset < 128)
1714 info[idx++] = (struct field_modify_info){4, 0,
1715 MLX5_MODI_OUT_DIPV6_127_96};
1718 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1719 info[idx] = (struct field_modify_info){2, 0,
1720 MLX5_MODI_OUT_TCP_SPORT};
1722 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1724 case RTE_FLOW_FIELD_TCP_PORT_DST:
1725 info[idx] = (struct field_modify_info){2, 0,
1726 MLX5_MODI_OUT_TCP_DPORT};
1728 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1730 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1731 info[idx] = (struct field_modify_info){4, 0,
1732 MLX5_MODI_OUT_TCP_SEQ_NUM};
1734 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1737 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1738 info[idx] = (struct field_modify_info){4, 0,
1739 MLX5_MODI_OUT_TCP_ACK_NUM};
1741 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1744 case RTE_FLOW_FIELD_TCP_FLAGS:
1745 info[idx] = (struct field_modify_info){2, 0,
1746 MLX5_MODI_OUT_TCP_FLAGS};
1748 mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1750 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1751 info[idx] = (struct field_modify_info){2, 0,
1752 MLX5_MODI_OUT_UDP_SPORT};
1754 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1756 case RTE_FLOW_FIELD_UDP_PORT_DST:
1757 info[idx] = (struct field_modify_info){2, 0,
1758 MLX5_MODI_OUT_UDP_DPORT};
1760 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1762 case RTE_FLOW_FIELD_VXLAN_VNI:
1763 /* not supported yet */
1765 case RTE_FLOW_FIELD_GENEVE_VNI:
1766 /* not supported yet*/
1768 case RTE_FLOW_FIELD_GTP_TEID:
1769 info[idx] = (struct field_modify_info){4, 0,
1770 MLX5_MODI_GTP_TEID};
1772 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1775 case RTE_FLOW_FIELD_TAG:
1777 int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1778 data->level, error);
1781 MLX5_ASSERT(reg != REG_NON);
1782 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1783 info[idx] = (struct field_modify_info){4, 0,
1787 rte_cpu_to_be_32(0xffffffff >>
1791 case RTE_FLOW_FIELD_MARK:
1793 int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1797 MLX5_ASSERT(reg != REG_NON);
1798 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1799 info[idx] = (struct field_modify_info){4, 0,
1803 rte_cpu_to_be_32(0xffffffff >>
1807 case RTE_FLOW_FIELD_META:
1809 unsigned int xmeta = config->dv_xmeta_en;
1810 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1813 MLX5_ASSERT(reg != REG_NON);
1814 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1815 if (xmeta == MLX5_XMETA_MODE_META16) {
1816 info[idx] = (struct field_modify_info){2, 0,
1819 mask[idx] = rte_cpu_to_be_16(0xffff >>
1821 } else if (xmeta == MLX5_XMETA_MODE_META32) {
1822 info[idx] = (struct field_modify_info){4, 0,
1826 rte_cpu_to_be_32(0xffffffff >>
1833 case RTE_FLOW_FIELD_POINTER:
1834 case RTE_FLOW_FIELD_VALUE:
1835 if (data->field == RTE_FLOW_FIELD_POINTER)
1836 memcpy(&val, (void *)(uintptr_t)data->value,
1840 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1842 if (dst_width == 48) {
1843 /*special case for MAC addresses */
1844 value[idx] = rte_cpu_to_be_16(val);
1847 } else if (dst_width > 16) {
1848 value[idx] = rte_cpu_to_be_32(val);
1850 } else if (dst_width > 8) {
1851 value[idx] = rte_cpu_to_be_16(val);
1854 value[idx] = (uint8_t)val;
1869 * Convert modify_field action to DV specification.
1872 * Pointer to the rte_eth_dev structure.
1873 * @param[in,out] resource
1874 * Pointer to the modify-header resource.
1876 * Pointer to action specification.
1878 * Attributes of flow that includes this item.
1880 * Pointer to the error structure.
1883 * 0 on success, a negative errno value otherwise and rte_errno is set.
1886 flow_dv_convert_action_modify_field
1887 (struct rte_eth_dev *dev,
1888 struct mlx5_flow_dv_modify_hdr_resource *resource,
1889 const struct rte_flow_action *action,
1890 const struct rte_flow_attr *attr,
1891 struct rte_flow_error *error)
1893 struct mlx5_priv *priv = dev->data->dev_private;
1894 struct mlx5_dev_config *config = &priv->config;
1895 const struct rte_flow_action_modify_field *conf =
1896 (const struct rte_flow_action_modify_field *)(action->conf);
1897 struct rte_flow_item item;
1898 struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1900 struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1902 uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1903 uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1905 uint32_t dst_width = mlx5_flow_item_field_width(config,
1908 if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1909 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1910 type = MLX5_MODIFICATION_TYPE_SET;
1911 /** For SET fill the destination field (field) first. */
1912 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1913 value, conf->width, dst_width, dev, attr, error);
1914 /** Then copy immediate value from source as per mask. */
1915 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1916 value, conf->width, dst_width, dev, attr, error);
1919 type = MLX5_MODIFICATION_TYPE_COPY;
1920 /** For COPY fill the destination field (dcopy) without mask. */
1921 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1922 value, conf->width, dst_width, dev, attr, error);
1923 /** Then construct the source field (field) with mask. */
1924 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1925 value, conf->width, dst_width, dev, attr, error);
1928 return flow_dv_convert_modify_action(&item,
1929 field, dcopy, resource, type, error);
1933 * Validate MARK item.
1936 * Pointer to the rte_eth_dev structure.
1938 * Item specification.
1940 * Attributes of flow that includes this item.
1942 * Pointer to error structure.
1945 * 0 on success, a negative errno value otherwise and rte_errno is set.
1948 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1949 const struct rte_flow_item *item,
1950 const struct rte_flow_attr *attr __rte_unused,
1951 struct rte_flow_error *error)
1953 struct mlx5_priv *priv = dev->data->dev_private;
1954 struct mlx5_dev_config *config = &priv->config;
1955 const struct rte_flow_item_mark *spec = item->spec;
1956 const struct rte_flow_item_mark *mask = item->mask;
1957 const struct rte_flow_item_mark nic_mask = {
1958 .id = priv->sh->dv_mark_mask,
1962 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1963 return rte_flow_error_set(error, ENOTSUP,
1964 RTE_FLOW_ERROR_TYPE_ITEM, item,
1965 "extended metadata feature"
1967 if (!mlx5_flow_ext_mreg_supported(dev))
1968 return rte_flow_error_set(error, ENOTSUP,
1969 RTE_FLOW_ERROR_TYPE_ITEM, item,
1970 "extended metadata register"
1971 " isn't supported");
1973 return rte_flow_error_set(error, ENOTSUP,
1974 RTE_FLOW_ERROR_TYPE_ITEM, item,
1975 "extended metadata register"
1976 " isn't available");
1977 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1981 return rte_flow_error_set(error, EINVAL,
1982 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1984 "data cannot be empty");
1985 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1986 return rte_flow_error_set(error, EINVAL,
1987 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1989 "mark id exceeds the limit");
1993 return rte_flow_error_set(error, EINVAL,
1994 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1995 "mask cannot be zero");
1997 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1998 (const uint8_t *)&nic_mask,
1999 sizeof(struct rte_flow_item_mark),
2000 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2007 * Validate META item.
2010 * Pointer to the rte_eth_dev structure.
2012 * Item specification.
2014 * Attributes of flow that includes this item.
2016 * Pointer to error structure.
2019 * 0 on success, a negative errno value otherwise and rte_errno is set.
2022 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2023 const struct rte_flow_item *item,
2024 const struct rte_flow_attr *attr,
2025 struct rte_flow_error *error)
2027 struct mlx5_priv *priv = dev->data->dev_private;
2028 struct mlx5_dev_config *config = &priv->config;
2029 const struct rte_flow_item_meta *spec = item->spec;
2030 const struct rte_flow_item_meta *mask = item->mask;
2031 struct rte_flow_item_meta nic_mask = {
2038 return rte_flow_error_set(error, EINVAL,
2039 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2041 "data cannot be empty");
2042 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2043 if (!mlx5_flow_ext_mreg_supported(dev))
2044 return rte_flow_error_set(error, ENOTSUP,
2045 RTE_FLOW_ERROR_TYPE_ITEM, item,
2046 "extended metadata register"
2047 " isn't supported");
2048 reg = flow_dv_get_metadata_reg(dev, attr, error);
2052 return rte_flow_error_set(error, ENOTSUP,
2053 RTE_FLOW_ERROR_TYPE_ITEM, item,
2054 "unavalable extended metadata register");
2056 return rte_flow_error_set(error, ENOTSUP,
2057 RTE_FLOW_ERROR_TYPE_ITEM, item,
2061 nic_mask.data = priv->sh->dv_meta_mask;
2064 return rte_flow_error_set(error, ENOTSUP,
2065 RTE_FLOW_ERROR_TYPE_ITEM, item,
2066 "extended metadata feature "
2067 "should be enabled when "
2068 "meta item is requested "
2069 "with e-switch mode ");
2071 return rte_flow_error_set(error, ENOTSUP,
2072 RTE_FLOW_ERROR_TYPE_ITEM, item,
2073 "match on metadata for ingress "
2074 "is not supported in legacy "
2078 mask = &rte_flow_item_meta_mask;
2080 return rte_flow_error_set(error, EINVAL,
2081 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2082 "mask cannot be zero");
2084 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2085 (const uint8_t *)&nic_mask,
2086 sizeof(struct rte_flow_item_meta),
2087 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2092 * Validate TAG item.
2095 * Pointer to the rte_eth_dev structure.
2097 * Item specification.
2099 * Attributes of flow that includes this item.
2101 * Pointer to error structure.
2104 * 0 on success, a negative errno value otherwise and rte_errno is set.
2107 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2108 const struct rte_flow_item *item,
2109 const struct rte_flow_attr *attr __rte_unused,
2110 struct rte_flow_error *error)
2112 const struct rte_flow_item_tag *spec = item->spec;
2113 const struct rte_flow_item_tag *mask = item->mask;
2114 const struct rte_flow_item_tag nic_mask = {
2115 .data = RTE_BE32(UINT32_MAX),
2120 if (!mlx5_flow_ext_mreg_supported(dev))
2121 return rte_flow_error_set(error, ENOTSUP,
2122 RTE_FLOW_ERROR_TYPE_ITEM, item,
2123 "extensive metadata register"
2124 " isn't supported");
2126 return rte_flow_error_set(error, EINVAL,
2127 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2129 "data cannot be empty");
2131 mask = &rte_flow_item_tag_mask;
2133 return rte_flow_error_set(error, EINVAL,
2134 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2135 "mask cannot be zero");
2137 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2138 (const uint8_t *)&nic_mask,
2139 sizeof(struct rte_flow_item_tag),
2140 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2143 if (mask->index != 0xff)
2144 return rte_flow_error_set(error, EINVAL,
2145 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2146 "partial mask for tag index"
2147 " is not supported");
2148 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2151 MLX5_ASSERT(ret != REG_NON);
2156 * Validate vport item.
2159 * Pointer to the rte_eth_dev structure.
2161 * Item specification.
2163 * Attributes of flow that includes this item.
2164 * @param[in] item_flags
2165 * Bit-fields that holds the items detected until now.
2167 * Pointer to error structure.
2170 * 0 on success, a negative errno value otherwise and rte_errno is set.
2173 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2174 const struct rte_flow_item *item,
2175 const struct rte_flow_attr *attr,
2176 uint64_t item_flags,
2177 struct rte_flow_error *error)
2179 const struct rte_flow_item_port_id *spec = item->spec;
2180 const struct rte_flow_item_port_id *mask = item->mask;
2181 const struct rte_flow_item_port_id switch_mask = {
2184 struct mlx5_priv *esw_priv;
2185 struct mlx5_priv *dev_priv;
2188 if (!attr->transfer)
2189 return rte_flow_error_set(error, EINVAL,
2190 RTE_FLOW_ERROR_TYPE_ITEM,
2192 "match on port id is valid only"
2193 " when transfer flag is enabled");
2194 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2195 return rte_flow_error_set(error, ENOTSUP,
2196 RTE_FLOW_ERROR_TYPE_ITEM, item,
2197 "multiple source ports are not"
2200 mask = &switch_mask;
2201 if (mask->id != 0xffffffff)
2202 return rte_flow_error_set(error, ENOTSUP,
2203 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2205 "no support for partial mask on"
2207 ret = mlx5_flow_item_acceptable
2208 (item, (const uint8_t *)mask,
2209 (const uint8_t *)&rte_flow_item_port_id_mask,
2210 sizeof(struct rte_flow_item_port_id),
2211 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2216 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2218 return rte_flow_error_set(error, rte_errno,
2219 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2220 "failed to obtain E-Switch info for"
2222 dev_priv = mlx5_dev_to_eswitch_info(dev);
2224 return rte_flow_error_set(error, rte_errno,
2225 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2227 "failed to obtain E-Switch info");
2228 if (esw_priv->domain_id != dev_priv->domain_id)
2229 return rte_flow_error_set(error, EINVAL,
2230 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2231 "cannot match on a port from a"
2232 " different E-Switch");
2237 * Validate VLAN item.
2240 * Item specification.
2241 * @param[in] item_flags
2242 * Bit-fields that holds the items detected until now.
2244 * Ethernet device flow is being created on.
2246 * Pointer to error structure.
2249 * 0 on success, a negative errno value otherwise and rte_errno is set.
2252 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2253 uint64_t item_flags,
2254 struct rte_eth_dev *dev,
2255 struct rte_flow_error *error)
2257 const struct rte_flow_item_vlan *mask = item->mask;
2258 const struct rte_flow_item_vlan nic_mask = {
2259 .tci = RTE_BE16(UINT16_MAX),
2260 .inner_type = RTE_BE16(UINT16_MAX),
2263 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2265 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2266 MLX5_FLOW_LAYER_INNER_L4) :
2267 (MLX5_FLOW_LAYER_OUTER_L3 |
2268 MLX5_FLOW_LAYER_OUTER_L4);
2269 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2270 MLX5_FLOW_LAYER_OUTER_VLAN;
2272 if (item_flags & vlanm)
2273 return rte_flow_error_set(error, EINVAL,
2274 RTE_FLOW_ERROR_TYPE_ITEM, item,
2275 "multiple VLAN layers not supported");
2276 else if ((item_flags & l34m) != 0)
2277 return rte_flow_error_set(error, EINVAL,
2278 RTE_FLOW_ERROR_TYPE_ITEM, item,
2279 "VLAN cannot follow L3/L4 layer");
2281 mask = &rte_flow_item_vlan_mask;
2282 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2283 (const uint8_t *)&nic_mask,
2284 sizeof(struct rte_flow_item_vlan),
2285 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2288 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2289 struct mlx5_priv *priv = dev->data->dev_private;
2291 if (priv->vmwa_context) {
2293 * Non-NULL context means we have a virtual machine
2294 * and SR-IOV enabled, we have to create VLAN interface
2295 * to make hypervisor to setup E-Switch vport
2296 * context correctly. We avoid creating the multiple
2297 * VLAN interfaces, so we cannot support VLAN tag mask.
2299 return rte_flow_error_set(error, EINVAL,
2300 RTE_FLOW_ERROR_TYPE_ITEM,
2302 "VLAN tag mask is not"
2303 " supported in virtual"
2311 * GTP flags are contained in 1 byte of the format:
2312 * -------------------------------------------
2313 * | bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
2314 * |-----------------------------------------|
2315 * | value | Version | PT | Res | E | S | PN |
2316 * -------------------------------------------
2318 * Matching is supported only for GTP flags E, S, PN.
2320 #define MLX5_GTP_FLAGS_MASK 0x07
2323 * Validate GTP item.
2326 * Pointer to the rte_eth_dev structure.
2328 * Item specification.
2329 * @param[in] item_flags
2330 * Bit-fields that holds the items detected until now.
2332 * Pointer to error structure.
2335 * 0 on success, a negative errno value otherwise and rte_errno is set.
2338 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2339 const struct rte_flow_item *item,
2340 uint64_t item_flags,
2341 struct rte_flow_error *error)
2343 struct mlx5_priv *priv = dev->data->dev_private;
2344 const struct rte_flow_item_gtp *spec = item->spec;
2345 const struct rte_flow_item_gtp *mask = item->mask;
2346 const struct rte_flow_item_gtp nic_mask = {
2347 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2349 .teid = RTE_BE32(0xffffffff),
2352 if (!priv->config.hca_attr.tunnel_stateless_gtp)
2353 return rte_flow_error_set(error, ENOTSUP,
2354 RTE_FLOW_ERROR_TYPE_ITEM, item,
2355 "GTP support is not enabled");
2356 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2357 return rte_flow_error_set(error, ENOTSUP,
2358 RTE_FLOW_ERROR_TYPE_ITEM, item,
2359 "multiple tunnel layers not"
2361 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2362 return rte_flow_error_set(error, EINVAL,
2363 RTE_FLOW_ERROR_TYPE_ITEM, item,
2364 "no outer UDP layer found");
2366 mask = &rte_flow_item_gtp_mask;
2367 if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2368 return rte_flow_error_set(error, ENOTSUP,
2369 RTE_FLOW_ERROR_TYPE_ITEM, item,
2370 "Match is supported for GTP"
2372 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2373 (const uint8_t *)&nic_mask,
2374 sizeof(struct rte_flow_item_gtp),
2375 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2379 * Validate GTP PSC item.
2382 * Item specification.
2383 * @param[in] last_item
2384 * Previous validated item in the pattern items.
2385 * @param[in] gtp_item
2386 * Previous GTP item specification.
2388 * Pointer to flow attributes.
2390 * Pointer to error structure.
2393 * 0 on success, a negative errno value otherwise and rte_errno is set.
2396 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2398 const struct rte_flow_item *gtp_item,
2399 const struct rte_flow_attr *attr,
2400 struct rte_flow_error *error)
2402 const struct rte_flow_item_gtp *gtp_spec;
2403 const struct rte_flow_item_gtp *gtp_mask;
2404 const struct rte_flow_item_gtp_psc *spec;
2405 const struct rte_flow_item_gtp_psc *mask;
2406 const struct rte_flow_item_gtp_psc nic_mask = {
2411 if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2412 return rte_flow_error_set
2413 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2414 "GTP PSC item must be preceded with GTP item");
2415 gtp_spec = gtp_item->spec;
2416 gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2417 /* GTP spec and E flag is requested to match zero. */
2419 (gtp_mask->v_pt_rsv_flags &
2420 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2421 return rte_flow_error_set
2422 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2423 "GTP E flag must be 1 to match GTP PSC");
2424 /* Check the flow is not created in group zero. */
2425 if (!attr->transfer && !attr->group)
2426 return rte_flow_error_set
2427 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2428 "GTP PSC is not supported for group 0");
2429 /* GTP spec is here and E flag is requested to match zero. */
2433 mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2434 if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2435 return rte_flow_error_set
2436 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2437 "PDU type should be smaller than 16");
2438 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2439 (const uint8_t *)&nic_mask,
2440 sizeof(struct rte_flow_item_gtp_psc),
2441 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2445 * Validate IPV4 item.
2446 * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2447 * add specific validation of fragment_offset field,
2450 * Item specification.
2451 * @param[in] item_flags
2452 * Bit-fields that holds the items detected until now.
2454 * Pointer to error structure.
2457 * 0 on success, a negative errno value otherwise and rte_errno is set.
2460 flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
2461 uint64_t item_flags,
2463 uint16_t ether_type,
2464 struct rte_flow_error *error)
2467 const struct rte_flow_item_ipv4 *spec = item->spec;
2468 const struct rte_flow_item_ipv4 *last = item->last;
2469 const struct rte_flow_item_ipv4 *mask = item->mask;
2470 rte_be16_t fragment_offset_spec = 0;
2471 rte_be16_t fragment_offset_last = 0;
2472 const struct rte_flow_item_ipv4 nic_ipv4_mask = {
2474 .src_addr = RTE_BE32(0xffffffff),
2475 .dst_addr = RTE_BE32(0xffffffff),
2476 .type_of_service = 0xff,
2477 .fragment_offset = RTE_BE16(0xffff),
2478 .next_proto_id = 0xff,
2479 .time_to_live = 0xff,
2483 ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2484 ether_type, &nic_ipv4_mask,
2485 MLX5_ITEM_RANGE_ACCEPTED, error);
2489 fragment_offset_spec = spec->hdr.fragment_offset &
2490 mask->hdr.fragment_offset;
2491 if (!fragment_offset_spec)
2494 * spec and mask are valid, enforce using full mask to make sure the
2495 * complete value is used correctly.
2497 if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2498 != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2499 return rte_flow_error_set(error, EINVAL,
2500 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2501 item, "must use full mask for"
2502 " fragment_offset");
2504 * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2505 * indicating this is 1st fragment of fragmented packet.
2506 * This is not yet supported in MLX5, return appropriate error message.
2508 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2509 return rte_flow_error_set(error, ENOTSUP,
2510 RTE_FLOW_ERROR_TYPE_ITEM, item,
2511 "match on first fragment not "
2513 if (fragment_offset_spec && !last)
2514 return rte_flow_error_set(error, ENOTSUP,
2515 RTE_FLOW_ERROR_TYPE_ITEM, item,
2516 "specified value not supported");
2517 /* spec and last are valid, validate the specified range. */
2518 fragment_offset_last = last->hdr.fragment_offset &
2519 mask->hdr.fragment_offset;
2521 * Match on fragment_offset spec 0x2001 and last 0x3fff
2522 * means MF is 1 and frag-offset is > 0.
2523 * This packet is fragment 2nd and onward, excluding last.
2524 * This is not yet supported in MLX5, return appropriate
2527 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2528 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2529 return rte_flow_error_set(error, ENOTSUP,
2530 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2531 last, "match on following "
2532 "fragments not supported");
2534 * Match on fragment_offset spec 0x0001 and last 0x1fff
2535 * means MF is 0 and frag-offset is > 0.
2536 * This packet is last fragment of fragmented packet.
2537 * This is not yet supported in MLX5, return appropriate
2540 if (fragment_offset_spec == RTE_BE16(1) &&
2541 fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2542 return rte_flow_error_set(error, ENOTSUP,
2543 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2544 last, "match on last "
2545 "fragment not supported");
2547 * Match on fragment_offset spec 0x0001 and last 0x3fff
2548 * means MF and/or frag-offset is not 0.
2549 * This is a fragmented packet.
2550 * Other range values are invalid and rejected.
2552 if (!(fragment_offset_spec == RTE_BE16(1) &&
2553 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2554 return rte_flow_error_set(error, ENOTSUP,
2555 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2556 "specified range not supported");
2561 * Validate IPV6 fragment extension item.
2564 * Item specification.
2565 * @param[in] item_flags
2566 * Bit-fields that holds the items detected until now.
2568 * Pointer to error structure.
2571 * 0 on success, a negative errno value otherwise and rte_errno is set.
2574 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2575 uint64_t item_flags,
2576 struct rte_flow_error *error)
2578 const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2579 const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2580 const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2581 rte_be16_t frag_data_spec = 0;
2582 rte_be16_t frag_data_last = 0;
2583 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2584 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2585 MLX5_FLOW_LAYER_OUTER_L4;
2587 struct rte_flow_item_ipv6_frag_ext nic_mask = {
2589 .next_header = 0xff,
2590 .frag_data = RTE_BE16(0xffff),
2594 if (item_flags & l4m)
2595 return rte_flow_error_set(error, EINVAL,
2596 RTE_FLOW_ERROR_TYPE_ITEM, item,
2597 "ipv6 fragment extension item cannot "
2599 if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2600 (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2601 return rte_flow_error_set(error, EINVAL,
2602 RTE_FLOW_ERROR_TYPE_ITEM, item,
2603 "ipv6 fragment extension item must "
2604 "follow ipv6 item");
2606 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2607 if (!frag_data_spec)
2610 * spec and mask are valid, enforce using full mask to make sure the
2611 * complete value is used correctly.
2613 if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2614 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2615 return rte_flow_error_set(error, EINVAL,
2616 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2617 item, "must use full mask for"
2620 * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2621 * This is 1st fragment of fragmented packet.
2623 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2624 return rte_flow_error_set(error, ENOTSUP,
2625 RTE_FLOW_ERROR_TYPE_ITEM, item,
2626 "match on first fragment not "
2628 if (frag_data_spec && !last)
2629 return rte_flow_error_set(error, EINVAL,
2630 RTE_FLOW_ERROR_TYPE_ITEM, item,
2631 "specified value not supported");
2632 ret = mlx5_flow_item_acceptable
2633 (item, (const uint8_t *)mask,
2634 (const uint8_t *)&nic_mask,
2635 sizeof(struct rte_flow_item_ipv6_frag_ext),
2636 MLX5_ITEM_RANGE_ACCEPTED, error);
2639 /* spec and last are valid, validate the specified range. */
2640 frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2642 * Match on frag_data spec 0x0009 and last 0xfff9
2643 * means M is 1 and frag-offset is > 0.
2644 * This packet is fragment 2nd and onward, excluding last.
2645 * This is not yet supported in MLX5, return appropriate
2648 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2649 RTE_IPV6_EHDR_MF_MASK) &&
2650 frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2651 return rte_flow_error_set(error, ENOTSUP,
2652 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2653 last, "match on following "
2654 "fragments not supported");
2656 * Match on frag_data spec 0x0008 and last 0xfff8
2657 * means M is 0 and frag-offset is > 0.
2658 * This packet is last fragment of fragmented packet.
2659 * This is not yet supported in MLX5, return appropriate
2662 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2663 frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2664 return rte_flow_error_set(error, ENOTSUP,
2665 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2666 last, "match on last "
2667 "fragment not supported");
2668 /* Other range values are invalid and rejected. */
2669 return rte_flow_error_set(error, EINVAL,
2670 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2671 "specified range not supported");
2675 * Validate ASO CT item.
2678 * Pointer to the rte_eth_dev structure.
2680 * Item specification.
2681 * @param[in] item_flags
2682 * Pointer to bit-fields that holds the items detected until now.
2684 * Pointer to error structure.
2687 * 0 on success, a negative errno value otherwise and rte_errno is set.
2690 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2691 const struct rte_flow_item *item,
2692 uint64_t *item_flags,
2693 struct rte_flow_error *error)
2695 const struct rte_flow_item_conntrack *spec = item->spec;
2696 const struct rte_flow_item_conntrack *mask = item->mask;
2700 if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2701 return rte_flow_error_set(error, EINVAL,
2702 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2703 "Only one CT is supported");
2705 mask = &rte_flow_item_conntrack_mask;
2706 flags = spec->flags & mask->flags;
2707 if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2708 ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2709 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2710 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2711 return rte_flow_error_set(error, EINVAL,
2712 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2713 "Conflict status bits");
2714 /* State change also needs to be considered. */
2715 *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2720 * Validate the pop VLAN action.
2723 * Pointer to the rte_eth_dev structure.
2724 * @param[in] action_flags
2725 * Holds the actions detected until now.
2727 * Pointer to the pop vlan action.
2728 * @param[in] item_flags
2729 * The items found in this flow rule.
2731 * Pointer to flow attributes.
2733 * Pointer to error structure.
2736 * 0 on success, a negative errno value otherwise and rte_errno is set.
2739 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2740 uint64_t action_flags,
2741 const struct rte_flow_action *action,
2742 uint64_t item_flags,
2743 const struct rte_flow_attr *attr,
2744 struct rte_flow_error *error)
2746 const struct mlx5_priv *priv = dev->data->dev_private;
2750 if (!priv->sh->pop_vlan_action)
2751 return rte_flow_error_set(error, ENOTSUP,
2752 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2754 "pop vlan action is not supported");
2756 return rte_flow_error_set(error, ENOTSUP,
2757 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2759 "pop vlan action not supported for "
2761 if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2762 return rte_flow_error_set(error, ENOTSUP,
2763 RTE_FLOW_ERROR_TYPE_ACTION, action,
2764 "no support for multiple VLAN "
2766 /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2767 if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2768 !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2769 return rte_flow_error_set(error, ENOTSUP,
2770 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2772 "cannot pop vlan after decap without "
2773 "match on inner vlan in the flow");
2774 /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2775 if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2776 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2777 return rte_flow_error_set(error, ENOTSUP,
2778 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2780 "cannot pop vlan without a "
2781 "match on (outer) vlan in the flow");
2782 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2783 return rte_flow_error_set(error, EINVAL,
2784 RTE_FLOW_ERROR_TYPE_ACTION, action,
2785 "wrong action order, port_id should "
2786 "be after pop VLAN action");
2787 if (!attr->transfer && priv->representor)
2788 return rte_flow_error_set(error, ENOTSUP,
2789 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2790 "pop vlan action for VF representor "
2791 "not supported on NIC table");
2796 * Get VLAN default info from vlan match info.
2799 * the list of item specifications.
2801 * pointer VLAN info to fill to.
2804 * 0 on success, a negative errno value otherwise and rte_errno is set.
2807 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2808 struct rte_vlan_hdr *vlan)
2810 const struct rte_flow_item_vlan nic_mask = {
2811 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2812 MLX5DV_FLOW_VLAN_VID_MASK),
2813 .inner_type = RTE_BE16(0xffff),
2818 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2819 int type = items->type;
2821 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2822 type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2825 if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2826 const struct rte_flow_item_vlan *vlan_m = items->mask;
2827 const struct rte_flow_item_vlan *vlan_v = items->spec;
2829 /* If VLAN item in pattern doesn't contain data, return here. */
2834 /* Only full match values are accepted */
2835 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2836 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2837 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2839 rte_be_to_cpu_16(vlan_v->tci &
2840 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2842 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2843 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2844 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2846 rte_be_to_cpu_16(vlan_v->tci &
2847 MLX5DV_FLOW_VLAN_VID_MASK_BE);
2849 if (vlan_m->inner_type == nic_mask.inner_type)
2850 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2851 vlan_m->inner_type);
2856 * Validate the push VLAN action.
2859 * Pointer to the rte_eth_dev structure.
2860 * @param[in] action_flags
2861 * Holds the actions detected until now.
2862 * @param[in] item_flags
2863 * The items found in this flow rule.
2865 * Pointer to the action structure.
2867 * Pointer to flow attributes
2869 * Pointer to error structure.
2872 * 0 on success, a negative errno value otherwise and rte_errno is set.
2875 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2876 uint64_t action_flags,
2877 const struct rte_flow_item_vlan *vlan_m,
2878 const struct rte_flow_action *action,
2879 const struct rte_flow_attr *attr,
2880 struct rte_flow_error *error)
2882 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2883 const struct mlx5_priv *priv = dev->data->dev_private;
2885 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2886 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2887 return rte_flow_error_set(error, EINVAL,
2888 RTE_FLOW_ERROR_TYPE_ACTION, action,
2889 "invalid vlan ethertype");
2890 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2891 return rte_flow_error_set(error, EINVAL,
2892 RTE_FLOW_ERROR_TYPE_ACTION, action,
2893 "wrong action order, port_id should "
2894 "be after push VLAN");
2895 if (!attr->transfer && priv->representor)
2896 return rte_flow_error_set(error, ENOTSUP,
2897 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2898 "push vlan action for VF representor "
2899 "not supported on NIC table");
2901 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2902 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2903 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2904 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2905 !(mlx5_flow_find_action
2906 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2907 return rte_flow_error_set(error, EINVAL,
2908 RTE_FLOW_ERROR_TYPE_ACTION, action,
2909 "not full match mask on VLAN PCP and "
2910 "there is no of_set_vlan_pcp action, "
2911 "push VLAN action cannot figure out "
2914 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2915 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2916 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2917 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2918 !(mlx5_flow_find_action
2919 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2920 return rte_flow_error_set(error, EINVAL,
2921 RTE_FLOW_ERROR_TYPE_ACTION, action,
2922 "not full match mask on VLAN VID and "
2923 "there is no of_set_vlan_vid action, "
2924 "push VLAN action cannot figure out "
2931 * Validate the set VLAN PCP.
2933 * @param[in] action_flags
2934 * Holds the actions detected until now.
2935 * @param[in] actions
2936 * Pointer to the list of actions remaining in the flow rule.
2938 * Pointer to error structure.
2941 * 0 on success, a negative errno value otherwise and rte_errno is set.
2944 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2945 const struct rte_flow_action actions[],
2946 struct rte_flow_error *error)
2948 const struct rte_flow_action *action = actions;
2949 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2951 if (conf->vlan_pcp > 7)
2952 return rte_flow_error_set(error, EINVAL,
2953 RTE_FLOW_ERROR_TYPE_ACTION, action,
2954 "VLAN PCP value is too big");
2955 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2956 return rte_flow_error_set(error, ENOTSUP,
2957 RTE_FLOW_ERROR_TYPE_ACTION, action,
2958 "set VLAN PCP action must follow "
2959 "the push VLAN action");
2960 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2961 return rte_flow_error_set(error, ENOTSUP,
2962 RTE_FLOW_ERROR_TYPE_ACTION, action,
2963 "Multiple VLAN PCP modification are "
2965 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2966 return rte_flow_error_set(error, EINVAL,
2967 RTE_FLOW_ERROR_TYPE_ACTION, action,
2968 "wrong action order, port_id should "
2969 "be after set VLAN PCP");
2974 * Validate the set VLAN VID.
2976 * @param[in] item_flags
2977 * Holds the items detected in this rule.
2978 * @param[in] action_flags
2979 * Holds the actions detected until now.
2980 * @param[in] actions
2981 * Pointer to the list of actions remaining in the flow rule.
2983 * Pointer to error structure.
2986 * 0 on success, a negative errno value otherwise and rte_errno is set.
2989 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2990 uint64_t action_flags,
2991 const struct rte_flow_action actions[],
2992 struct rte_flow_error *error)
2994 const struct rte_flow_action *action = actions;
2995 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2997 if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
2998 return rte_flow_error_set(error, EINVAL,
2999 RTE_FLOW_ERROR_TYPE_ACTION, action,
3000 "VLAN VID value is too big");
3001 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3002 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3003 return rte_flow_error_set(error, ENOTSUP,
3004 RTE_FLOW_ERROR_TYPE_ACTION, action,
3005 "set VLAN VID action must follow push"
3006 " VLAN action or match on VLAN item");
3007 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3008 return rte_flow_error_set(error, ENOTSUP,
3009 RTE_FLOW_ERROR_TYPE_ACTION, action,
3010 "Multiple VLAN VID modifications are "
3012 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3013 return rte_flow_error_set(error, EINVAL,
3014 RTE_FLOW_ERROR_TYPE_ACTION, action,
3015 "wrong action order, port_id should "
3016 "be after set VLAN VID");
3021 * Validate the FLAG action.
3024 * Pointer to the rte_eth_dev structure.
3025 * @param[in] action_flags
3026 * Holds the actions detected until now.
3028 * Pointer to flow attributes
3030 * Pointer to error structure.
3033 * 0 on success, a negative errno value otherwise and rte_errno is set.
3036 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3037 uint64_t action_flags,
3038 const struct rte_flow_attr *attr,
3039 struct rte_flow_error *error)
3041 struct mlx5_priv *priv = dev->data->dev_private;
3042 struct mlx5_dev_config *config = &priv->config;
3045 /* Fall back if no extended metadata register support. */
3046 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3047 return mlx5_flow_validate_action_flag(action_flags, attr,
3049 /* Extensive metadata mode requires registers. */
3050 if (!mlx5_flow_ext_mreg_supported(dev))
3051 return rte_flow_error_set(error, ENOTSUP,
3052 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3053 "no metadata registers "
3054 "to support flag action");
3055 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3056 return rte_flow_error_set(error, ENOTSUP,
3057 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3058 "extended metadata register"
3059 " isn't available");
3060 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3063 MLX5_ASSERT(ret > 0);
3064 if (action_flags & MLX5_FLOW_ACTION_MARK)
3065 return rte_flow_error_set(error, EINVAL,
3066 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3067 "can't mark and flag in same flow");
3068 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3069 return rte_flow_error_set(error, EINVAL,
3070 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3072 " actions in same flow");
3077 * Validate MARK action.
3080 * Pointer to the rte_eth_dev structure.
3082 * Pointer to action.
3083 * @param[in] action_flags
3084 * Holds the actions detected until now.
3086 * Pointer to flow attributes
3088 * Pointer to error structure.
3091 * 0 on success, a negative errno value otherwise and rte_errno is set.
3094 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3095 const struct rte_flow_action *action,
3096 uint64_t action_flags,
3097 const struct rte_flow_attr *attr,
3098 struct rte_flow_error *error)
3100 struct mlx5_priv *priv = dev->data->dev_private;
3101 struct mlx5_dev_config *config = &priv->config;
3102 const struct rte_flow_action_mark *mark = action->conf;
3105 if (is_tunnel_offload_active(dev))
3106 return rte_flow_error_set(error, ENOTSUP,
3107 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3109 "if tunnel offload active");
3110 /* Fall back if no extended metadata register support. */
3111 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3112 return mlx5_flow_validate_action_mark(action, action_flags,
3114 /* Extensive metadata mode requires registers. */
3115 if (!mlx5_flow_ext_mreg_supported(dev))
3116 return rte_flow_error_set(error, ENOTSUP,
3117 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3118 "no metadata registers "
3119 "to support mark action");
3120 if (!priv->sh->dv_mark_mask)
3121 return rte_flow_error_set(error, ENOTSUP,
3122 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3123 "extended metadata register"
3124 " isn't available");
3125 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3128 MLX5_ASSERT(ret > 0);
3130 return rte_flow_error_set(error, EINVAL,
3131 RTE_FLOW_ERROR_TYPE_ACTION, action,
3132 "configuration cannot be null");
3133 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3134 return rte_flow_error_set(error, EINVAL,
3135 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3137 "mark id exceeds the limit");
3138 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3139 return rte_flow_error_set(error, EINVAL,
3140 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3141 "can't flag and mark in same flow");
3142 if (action_flags & MLX5_FLOW_ACTION_MARK)
3143 return rte_flow_error_set(error, EINVAL,
3144 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3145 "can't have 2 mark actions in same"
3151 * Validate SET_META action.
3154 * Pointer to the rte_eth_dev structure.
3156 * Pointer to the action structure.
3157 * @param[in] action_flags
3158 * Holds the actions detected until now.
3160 * Pointer to flow attributes
3162 * Pointer to error structure.
3165 * 0 on success, a negative errno value otherwise and rte_errno is set.
3168 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3169 const struct rte_flow_action *action,
3170 uint64_t action_flags __rte_unused,
3171 const struct rte_flow_attr *attr,
3172 struct rte_flow_error *error)
3174 const struct rte_flow_action_set_meta *conf;
3175 uint32_t nic_mask = UINT32_MAX;
3178 if (!mlx5_flow_ext_mreg_supported(dev))
3179 return rte_flow_error_set(error, ENOTSUP,
3180 RTE_FLOW_ERROR_TYPE_ACTION, action,
3181 "extended metadata register"
3182 " isn't supported");
3183 reg = flow_dv_get_metadata_reg(dev, attr, error);
3187 return rte_flow_error_set(error, ENOTSUP,
3188 RTE_FLOW_ERROR_TYPE_ACTION, action,
3189 "unavalable extended metadata register");
3190 if (reg != REG_A && reg != REG_B) {
3191 struct mlx5_priv *priv = dev->data->dev_private;
3193 nic_mask = priv->sh->dv_meta_mask;
3195 if (!(action->conf))
3196 return rte_flow_error_set(error, EINVAL,
3197 RTE_FLOW_ERROR_TYPE_ACTION, action,
3198 "configuration cannot be null");
3199 conf = (const struct rte_flow_action_set_meta *)action->conf;
3201 return rte_flow_error_set(error, EINVAL,
3202 RTE_FLOW_ERROR_TYPE_ACTION, action,
3203 "zero mask doesn't have any effect");
3204 if (conf->mask & ~nic_mask)
3205 return rte_flow_error_set(error, EINVAL,
3206 RTE_FLOW_ERROR_TYPE_ACTION, action,
3207 "meta data must be within reg C0");
3212 * Validate SET_TAG action.
3215 * Pointer to the rte_eth_dev structure.
3217 * Pointer to the action structure.
3218 * @param[in] action_flags
3219 * Holds the actions detected until now.
3221 * Pointer to flow attributes
3223 * Pointer to error structure.
3226 * 0 on success, a negative errno value otherwise and rte_errno is set.
3229 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3230 const struct rte_flow_action *action,
3231 uint64_t action_flags,
3232 const struct rte_flow_attr *attr,
3233 struct rte_flow_error *error)
3235 const struct rte_flow_action_set_tag *conf;
3236 const uint64_t terminal_action_flags =
3237 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3238 MLX5_FLOW_ACTION_RSS;
3241 if (!mlx5_flow_ext_mreg_supported(dev))
3242 return rte_flow_error_set(error, ENOTSUP,
3243 RTE_FLOW_ERROR_TYPE_ACTION, action,
3244 "extensive metadata register"
3245 " isn't supported");
3246 if (!(action->conf))
3247 return rte_flow_error_set(error, EINVAL,
3248 RTE_FLOW_ERROR_TYPE_ACTION, action,
3249 "configuration cannot be null");
3250 conf = (const struct rte_flow_action_set_tag *)action->conf;
3252 return rte_flow_error_set(error, EINVAL,
3253 RTE_FLOW_ERROR_TYPE_ACTION, action,
3254 "zero mask doesn't have any effect");
3255 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3258 if (!attr->transfer && attr->ingress &&
3259 (action_flags & terminal_action_flags))
3260 return rte_flow_error_set(error, EINVAL,
3261 RTE_FLOW_ERROR_TYPE_ACTION, action,
3262 "set_tag has no effect"
3263 " with terminal actions");
3268 * Check if action counter is shared by either old or new mechanism.
3271 * Pointer to the action structure.
3274 * True when counter is shared, false otherwise.
3277 is_shared_action_count(const struct rte_flow_action *action)
3279 const struct rte_flow_action_count *count =
3280 (const struct rte_flow_action_count *)action->conf;
3282 if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3284 return !!(count && count->shared);
3288 * Validate count action.
3291 * Pointer to rte_eth_dev structure.
3293 * Indicator if action is shared.
3294 * @param[in] action_flags
3295 * Holds the actions detected until now.
3297 * Pointer to error structure.
3300 * 0 on success, a negative errno value otherwise and rte_errno is set.
3303 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3304 uint64_t action_flags,
3305 struct rte_flow_error *error)
3307 struct mlx5_priv *priv = dev->data->dev_private;
3309 if (!priv->config.devx)
3311 if (action_flags & MLX5_FLOW_ACTION_COUNT)
3312 return rte_flow_error_set(error, EINVAL,
3313 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3314 "duplicate count actions set");
3315 if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3316 !priv->sh->flow_hit_aso_en)
3317 return rte_flow_error_set(error, EINVAL,
3318 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3319 "old age and shared count combination is not supported");
3320 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3324 return rte_flow_error_set
3326 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3328 "count action not supported");
3332 * Validate the L2 encap action.
3335 * Pointer to the rte_eth_dev structure.
3336 * @param[in] action_flags
3337 * Holds the actions detected until now.
3339 * Pointer to the action structure.
3341 * Pointer to flow attributes.
3343 * Pointer to error structure.
3346 * 0 on success, a negative errno value otherwise and rte_errno is set.
3349 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3350 uint64_t action_flags,
3351 const struct rte_flow_action *action,
3352 const struct rte_flow_attr *attr,
3353 struct rte_flow_error *error)
3355 const struct mlx5_priv *priv = dev->data->dev_private;
3357 if (!(action->conf))
3358 return rte_flow_error_set(error, EINVAL,
3359 RTE_FLOW_ERROR_TYPE_ACTION, action,
3360 "configuration cannot be null");
3361 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3362 return rte_flow_error_set(error, EINVAL,
3363 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3364 "can only have a single encap action "
3366 if (!attr->transfer && priv->representor)
3367 return rte_flow_error_set(error, ENOTSUP,
3368 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3369 "encap action for VF representor "
3370 "not supported on NIC table");
3375 * Validate a decap action.
3378 * Pointer to the rte_eth_dev structure.
3379 * @param[in] action_flags
3380 * Holds the actions detected until now.
3382 * Pointer to the action structure.
3383 * @param[in] item_flags
3384 * Holds the items detected.
3386 * Pointer to flow attributes
3388 * Pointer to error structure.
3391 * 0 on success, a negative errno value otherwise and rte_errno is set.
3394 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3395 uint64_t action_flags,
3396 const struct rte_flow_action *action,
3397 const uint64_t item_flags,
3398 const struct rte_flow_attr *attr,
3399 struct rte_flow_error *error)
3401 const struct mlx5_priv *priv = dev->data->dev_private;
3403 if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3404 !priv->config.decap_en)
3405 return rte_flow_error_set(error, ENOTSUP,
3406 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3407 "decap is not enabled");
3408 if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3409 return rte_flow_error_set(error, ENOTSUP,
3410 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3412 MLX5_FLOW_ACTION_DECAP ? "can only "
3413 "have a single decap action" : "decap "
3414 "after encap is not supported");
3415 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3416 return rte_flow_error_set(error, EINVAL,
3417 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3418 "can't have decap action after"
3421 return rte_flow_error_set(error, ENOTSUP,
3422 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3424 "decap action not supported for "
3426 if (!attr->transfer && priv->representor)
3427 return rte_flow_error_set(error, ENOTSUP,
3428 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3429 "decap action for VF representor "
3430 "not supported on NIC table");
3431 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3432 !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3433 return rte_flow_error_set(error, ENOTSUP,
3434 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3435 "VXLAN item should be present for VXLAN decap");
3439 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3442 * Validate the raw encap and decap actions.
3445 * Pointer to the rte_eth_dev structure.
3447 * Pointer to the decap action.
3449 * Pointer to the encap action.
3451 * Pointer to flow attributes
3452 * @param[in/out] action_flags
3453 * Holds the actions detected until now.
3454 * @param[out] actions_n
3455 * pointer to the number of actions counter.
3457 * Pointer to the action structure.
3458 * @param[in] item_flags
3459 * Holds the items detected.
3461 * Pointer to error structure.
3464 * 0 on success, a negative errno value otherwise and rte_errno is set.
3467 flow_dv_validate_action_raw_encap_decap
3468 (struct rte_eth_dev *dev,
3469 const struct rte_flow_action_raw_decap *decap,
3470 const struct rte_flow_action_raw_encap *encap,
3471 const struct rte_flow_attr *attr, uint64_t *action_flags,
3472 int *actions_n, const struct rte_flow_action *action,
3473 uint64_t item_flags, struct rte_flow_error *error)
3475 const struct mlx5_priv *priv = dev->data->dev_private;
3478 if (encap && (!encap->size || !encap->data))
3479 return rte_flow_error_set(error, EINVAL,
3480 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3481 "raw encap data cannot be empty");
3482 if (decap && encap) {
3483 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3484 encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3487 else if (encap->size <=
3488 MLX5_ENCAPSULATION_DECISION_SIZE &&
3490 MLX5_ENCAPSULATION_DECISION_SIZE)
3493 else if (encap->size >
3494 MLX5_ENCAPSULATION_DECISION_SIZE &&
3496 MLX5_ENCAPSULATION_DECISION_SIZE)
3497 /* 2 L2 actions: encap and decap. */
3500 return rte_flow_error_set(error,
3502 RTE_FLOW_ERROR_TYPE_ACTION,
3503 NULL, "unsupported too small "
3504 "raw decap and too small raw "
3505 "encap combination");
3508 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3509 item_flags, attr, error);
3512 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3516 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3517 return rte_flow_error_set(error, ENOTSUP,
3518 RTE_FLOW_ERROR_TYPE_ACTION,
3520 "small raw encap size");
3521 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3522 return rte_flow_error_set(error, EINVAL,
3523 RTE_FLOW_ERROR_TYPE_ACTION,
3525 "more than one encap action");
3526 if (!attr->transfer && priv->representor)
3527 return rte_flow_error_set
3529 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3530 "encap action for VF representor "
3531 "not supported on NIC table");
3532 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3539 * Validate the ASO CT action.
3542 * Pointer to the rte_eth_dev structure.
3543 * @param[in] action_flags
3544 * Holds the actions detected until now.
3545 * @param[in] item_flags
3546 * The items found in this flow rule.
3548 * Pointer to flow attributes.
3550 * Pointer to error structure.
3553 * 0 on success, a negative errno value otherwise and rte_errno is set.
3556 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3557 uint64_t action_flags,
3558 uint64_t item_flags,
3559 const struct rte_flow_attr *attr,
3560 struct rte_flow_error *error)
3564 if (attr->group == 0 && !attr->transfer)
3565 return rte_flow_error_set(error, ENOTSUP,
3566 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3568 "Only support non-root table");
3569 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3570 return rte_flow_error_set(error, ENOTSUP,
3571 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3572 "CT cannot follow a fate action");
3573 if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3574 (action_flags & MLX5_FLOW_ACTION_AGE))
3575 return rte_flow_error_set(error, EINVAL,
3576 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3577 "Only one ASO action is supported");
3578 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3579 return rte_flow_error_set(error, EINVAL,
3580 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3581 "Encap cannot exist before CT");
3582 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3583 return rte_flow_error_set(error, EINVAL,
3584 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3585 "Not a outer TCP packet");
3590 * Match encap_decap resource.
3593 * Pointer to the hash list.
3595 * Pointer to exist resource entry object.
3597 * Key of the new entry.
3599 * Pointer to new encap_decap resource.
3602 * 0 on matching, none-zero otherwise.
3605 flow_dv_encap_decap_match_cb(struct mlx5_hlist *list __rte_unused,
3606 struct mlx5_hlist_entry *entry,
3607 uint64_t key __rte_unused, void *cb_ctx)
3609 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3610 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3611 struct mlx5_flow_dv_encap_decap_resource *resource;
3613 resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3615 if (resource->reformat_type == ctx_resource->reformat_type &&
3616 resource->ft_type == ctx_resource->ft_type &&
3617 resource->flags == ctx_resource->flags &&
3618 resource->size == ctx_resource->size &&
3619 !memcmp((const void *)resource->buf,
3620 (const void *)ctx_resource->buf,
3627 * Allocate encap_decap resource.
3630 * Pointer to the hash list.
3632 * Pointer to exist resource entry object.
3634 * Pointer to new encap_decap resource.
3637 * 0 on matching, none-zero otherwise.
3639 struct mlx5_hlist_entry *
3640 flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,
3641 uint64_t key __rte_unused,
3644 struct mlx5_dev_ctx_shared *sh = list->ctx;
3645 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3646 struct mlx5dv_dr_domain *domain;
3647 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3648 struct mlx5_flow_dv_encap_decap_resource *resource;
3652 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3653 domain = sh->fdb_domain;
3654 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3655 domain = sh->rx_domain;
3657 domain = sh->tx_domain;
3658 /* Register new encap/decap resource. */
3659 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3661 rte_flow_error_set(ctx->error, ENOMEM,
3662 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3663 "cannot allocate resource memory");
3666 *resource = *ctx_resource;
3667 resource->idx = idx;
3668 ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,
3672 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3673 rte_flow_error_set(ctx->error, ENOMEM,
3674 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3675 NULL, "cannot create action");
3679 return &resource->entry;
3683 * Find existing encap/decap resource or create and register a new one.
3685 * @param[in, out] dev
3686 * Pointer to rte_eth_dev structure.
3687 * @param[in, out] resource
3688 * Pointer to encap/decap resource.
3689 * @parm[in, out] dev_flow
3690 * Pointer to the dev_flow.
3692 * pointer to error structure.
3695 * 0 on success otherwise -errno and errno is set.
3698 flow_dv_encap_decap_resource_register
3699 (struct rte_eth_dev *dev,
3700 struct mlx5_flow_dv_encap_decap_resource *resource,
3701 struct mlx5_flow *dev_flow,
3702 struct rte_flow_error *error)
3704 struct mlx5_priv *priv = dev->data->dev_private;
3705 struct mlx5_dev_ctx_shared *sh = priv->sh;
3706 struct mlx5_hlist_entry *entry;
3710 uint32_t refmt_type:8;
3712 * Header reformat actions can be shared between
3713 * non-root tables. One bit to indicate non-root
3717 uint32_t reserve:15;
3720 } encap_decap_key = {
3722 .ft_type = resource->ft_type,
3723 .refmt_type = resource->reformat_type,
3724 .is_root = !!dev_flow->dv.group,
3728 struct mlx5_flow_cb_ctx ctx = {
3734 resource->flags = dev_flow->dv.group ? 0 : 1;
3735 key64 = __rte_raw_cksum(&encap_decap_key.v32,
3736 sizeof(encap_decap_key.v32), 0);
3737 if (resource->reformat_type !=
3738 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3740 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3741 entry = mlx5_hlist_register(sh->encaps_decaps, key64, &ctx);
3744 resource = container_of(entry, typeof(*resource), entry);
3745 dev_flow->dv.encap_decap = resource;
3746 dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3751 * Find existing table jump resource or create and register a new one.
3753 * @param[in, out] dev
3754 * Pointer to rte_eth_dev structure.
3755 * @param[in, out] tbl
3756 * Pointer to flow table resource.
3757 * @parm[in, out] dev_flow
3758 * Pointer to the dev_flow.
3760 * pointer to error structure.
3763 * 0 on success otherwise -errno and errno is set.
3766 flow_dv_jump_tbl_resource_register
3767 (struct rte_eth_dev *dev __rte_unused,
3768 struct mlx5_flow_tbl_resource *tbl,
3769 struct mlx5_flow *dev_flow,
3770 struct rte_flow_error *error __rte_unused)
3772 struct mlx5_flow_tbl_data_entry *tbl_data =
3773 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3776 MLX5_ASSERT(tbl_data->jump.action);
3777 dev_flow->handle->rix_jump = tbl_data->idx;
3778 dev_flow->dv.jump = &tbl_data->jump;
3783 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3784 struct mlx5_list_entry *entry, void *cb_ctx)
3786 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3787 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3788 struct mlx5_flow_dv_port_id_action_resource *res =
3789 container_of(entry, typeof(*res), entry);
3791 return ref->port_id != res->port_id;
3794 struct mlx5_list_entry *
3795 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3797 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3798 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3799 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3800 struct mlx5_flow_dv_port_id_action_resource *resource;
3804 /* Register new port id action resource. */
3805 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3807 rte_flow_error_set(ctx->error, ENOMEM,
3808 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3809 "cannot allocate port_id action memory");
3813 ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3817 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3818 rte_flow_error_set(ctx->error, ENOMEM,
3819 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3820 "cannot create action");
3823 resource->idx = idx;
3824 return &resource->entry;
3827 struct mlx5_list_entry *
3828 flow_dv_port_id_clone_cb(void *tool_ctx,
3829 struct mlx5_list_entry *entry __rte_unused,
3832 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3833 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3834 struct mlx5_flow_dv_port_id_action_resource *resource;
3837 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3839 rte_flow_error_set(ctx->error, ENOMEM,
3840 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3841 "cannot allocate port_id action memory");
3844 memcpy(resource, entry, sizeof(*resource));
3845 resource->idx = idx;
3846 return &resource->entry;
3850 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3852 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3853 struct mlx5_flow_dv_port_id_action_resource *resource =
3854 container_of(entry, typeof(*resource), entry);
3856 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3860 * Find existing table port ID resource or create and register a new one.
3862 * @param[in, out] dev
3863 * Pointer to rte_eth_dev structure.
3864 * @param[in, out] ref
3865 * Pointer to port ID action resource reference.
3866 * @parm[in, out] dev_flow
3867 * Pointer to the dev_flow.
3869 * pointer to error structure.
3872 * 0 on success otherwise -errno and errno is set.
3875 flow_dv_port_id_action_resource_register
3876 (struct rte_eth_dev *dev,
3877 struct mlx5_flow_dv_port_id_action_resource *ref,
3878 struct mlx5_flow *dev_flow,
3879 struct rte_flow_error *error)
3881 struct mlx5_priv *priv = dev->data->dev_private;
3882 struct mlx5_list_entry *entry;
3883 struct mlx5_flow_dv_port_id_action_resource *resource;
3884 struct mlx5_flow_cb_ctx ctx = {
3889 entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3892 resource = container_of(entry, typeof(*resource), entry);
3893 dev_flow->dv.port_id_action = resource;
3894 dev_flow->handle->rix_port_id_action = resource->idx;
3899 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3900 struct mlx5_list_entry *entry, void *cb_ctx)
3902 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3903 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3904 struct mlx5_flow_dv_push_vlan_action_resource *res =
3905 container_of(entry, typeof(*res), entry);
3907 return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3910 struct mlx5_list_entry *
3911 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3913 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3914 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3915 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3916 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3917 struct mlx5dv_dr_domain *domain;
3921 /* Register new port id action resource. */
3922 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3924 rte_flow_error_set(ctx->error, ENOMEM,
3925 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3926 "cannot allocate push_vlan action memory");
3930 if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3931 domain = sh->fdb_domain;
3932 else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3933 domain = sh->rx_domain;
3935 domain = sh->tx_domain;
3936 ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3939 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3940 rte_flow_error_set(ctx->error, ENOMEM,
3941 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3942 "cannot create push vlan action");
3945 resource->idx = idx;
3946 return &resource->entry;
3949 struct mlx5_list_entry *
3950 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3951 struct mlx5_list_entry *entry __rte_unused,
3954 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3955 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3956 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3959 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3961 rte_flow_error_set(ctx->error, ENOMEM,
3962 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3963 "cannot allocate push_vlan action memory");
3966 memcpy(resource, entry, sizeof(*resource));
3967 resource->idx = idx;
3968 return &resource->entry;
3972 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3974 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3975 struct mlx5_flow_dv_push_vlan_action_resource *resource =
3976 container_of(entry, typeof(*resource), entry);
3978 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3982 * Find existing push vlan resource or create and register a new one.
3984 * @param [in, out] dev
3985 * Pointer to rte_eth_dev structure.
3986 * @param[in, out] ref
3987 * Pointer to port ID action resource reference.
3988 * @parm[in, out] dev_flow
3989 * Pointer to the dev_flow.
3991 * pointer to error structure.
3994 * 0 on success otherwise -errno and errno is set.
3997 flow_dv_push_vlan_action_resource_register
3998 (struct rte_eth_dev *dev,
3999 struct mlx5_flow_dv_push_vlan_action_resource *ref,
4000 struct mlx5_flow *dev_flow,
4001 struct rte_flow_error *error)
4003 struct mlx5_priv *priv = dev->data->dev_private;
4004 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4005 struct mlx5_list_entry *entry;
4006 struct mlx5_flow_cb_ctx ctx = {
4011 entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4014 resource = container_of(entry, typeof(*resource), entry);
4016 dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4017 dev_flow->dv.push_vlan_res = resource;
4022 * Get the size of specific rte_flow_item_type hdr size
4024 * @param[in] item_type
4025 * Tested rte_flow_item_type.
4028 * sizeof struct item_type, 0 if void or irrelevant.
4031 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4035 switch (item_type) {
4036 case RTE_FLOW_ITEM_TYPE_ETH:
4037 retval = sizeof(struct rte_ether_hdr);
4039 case RTE_FLOW_ITEM_TYPE_VLAN:
4040 retval = sizeof(struct rte_vlan_hdr);
4042 case RTE_FLOW_ITEM_TYPE_IPV4:
4043 retval = sizeof(struct rte_ipv4_hdr);
4045 case RTE_FLOW_ITEM_TYPE_IPV6:
4046 retval = sizeof(struct rte_ipv6_hdr);
4048 case RTE_FLOW_ITEM_TYPE_UDP:
4049 retval = sizeof(struct rte_udp_hdr);
4051 case RTE_FLOW_ITEM_TYPE_TCP:
4052 retval = sizeof(struct rte_tcp_hdr);
4054 case RTE_FLOW_ITEM_TYPE_VXLAN:
4055 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4056 retval = sizeof(struct rte_vxlan_hdr);
4058 case RTE_FLOW_ITEM_TYPE_GRE:
4059 case RTE_FLOW_ITEM_TYPE_NVGRE:
4060 retval = sizeof(struct rte_gre_hdr);
4062 case RTE_FLOW_ITEM_TYPE_MPLS:
4063 retval = sizeof(struct rte_mpls_hdr);
4065 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4073 #define MLX5_ENCAP_IPV4_VERSION 0x40
4074 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
4075 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
4076 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
4077 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
4078 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
4079 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
4082 * Convert the encap action data from list of rte_flow_item to raw buffer
4085 * Pointer to rte_flow_item objects list.
4087 * Pointer to the output buffer.
4089 * Pointer to the output buffer size.
4091 * Pointer to the error structure.
4094 * 0 on success, a negative errno value otherwise and rte_errno is set.
4097 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4098 size_t *size, struct rte_flow_error *error)
4100 struct rte_ether_hdr *eth = NULL;
4101 struct rte_vlan_hdr *vlan = NULL;
4102 struct rte_ipv4_hdr *ipv4 = NULL;
4103 struct rte_ipv6_hdr *ipv6 = NULL;
4104 struct rte_udp_hdr *udp = NULL;
4105 struct rte_vxlan_hdr *vxlan = NULL;
4106 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4107 struct rte_gre_hdr *gre = NULL;
4109 size_t temp_size = 0;
4112 return rte_flow_error_set(error, EINVAL,
4113 RTE_FLOW_ERROR_TYPE_ACTION,
4114 NULL, "invalid empty data");
4115 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4116 len = flow_dv_get_item_hdr_len(items->type);
4117 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4118 return rte_flow_error_set(error, EINVAL,
4119 RTE_FLOW_ERROR_TYPE_ACTION,
4120 (void *)items->type,
4121 "items total size is too big"
4122 " for encap action");
4123 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4124 switch (items->type) {
4125 case RTE_FLOW_ITEM_TYPE_ETH:
4126 eth = (struct rte_ether_hdr *)&buf[temp_size];
4128 case RTE_FLOW_ITEM_TYPE_VLAN:
4129 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4131 return rte_flow_error_set(error, EINVAL,
4132 RTE_FLOW_ERROR_TYPE_ACTION,
4133 (void *)items->type,
4134 "eth header not found");
4135 if (!eth->ether_type)
4136 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4138 case RTE_FLOW_ITEM_TYPE_IPV4:
4139 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4141 return rte_flow_error_set(error, EINVAL,
4142 RTE_FLOW_ERROR_TYPE_ACTION,
4143 (void *)items->type,
4144 "neither eth nor vlan"
4146 if (vlan && !vlan->eth_proto)
4147 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4148 else if (eth && !eth->ether_type)
4149 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4150 if (!ipv4->version_ihl)
4151 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4152 MLX5_ENCAP_IPV4_IHL_MIN;
4153 if (!ipv4->time_to_live)
4154 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4156 case RTE_FLOW_ITEM_TYPE_IPV6:
4157 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4159 return rte_flow_error_set(error, EINVAL,
4160 RTE_FLOW_ERROR_TYPE_ACTION,
4161 (void *)items->type,
4162 "neither eth nor vlan"
4164 if (vlan && !vlan->eth_proto)
4165 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4166 else if (eth && !eth->ether_type)
4167 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4168 if (!ipv6->vtc_flow)
4170 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4171 if (!ipv6->hop_limits)
4172 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4174 case RTE_FLOW_ITEM_TYPE_UDP:
4175 udp = (struct rte_udp_hdr *)&buf[temp_size];
4177 return rte_flow_error_set(error, EINVAL,
4178 RTE_FLOW_ERROR_TYPE_ACTION,
4179 (void *)items->type,
4180 "ip header not found");
4181 if (ipv4 && !ipv4->next_proto_id)
4182 ipv4->next_proto_id = IPPROTO_UDP;
4183 else if (ipv6 && !ipv6->proto)
4184 ipv6->proto = IPPROTO_UDP;
4186 case RTE_FLOW_ITEM_TYPE_VXLAN:
4187 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4189 return rte_flow_error_set(error, EINVAL,
4190 RTE_FLOW_ERROR_TYPE_ACTION,
4191 (void *)items->type,
4192 "udp header not found");
4194 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4195 if (!vxlan->vx_flags)
4197 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4199 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4200 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4202 return rte_flow_error_set(error, EINVAL,
4203 RTE_FLOW_ERROR_TYPE_ACTION,
4204 (void *)items->type,
4205 "udp header not found");
4206 if (!vxlan_gpe->proto)
4207 return rte_flow_error_set(error, EINVAL,
4208 RTE_FLOW_ERROR_TYPE_ACTION,
4209 (void *)items->type,
4210 "next protocol not found");
4213 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4214 if (!vxlan_gpe->vx_flags)
4215 vxlan_gpe->vx_flags =
4216 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4218 case RTE_FLOW_ITEM_TYPE_GRE:
4219 case RTE_FLOW_ITEM_TYPE_NVGRE:
4220 gre = (struct rte_gre_hdr *)&buf[temp_size];
4222 return rte_flow_error_set(error, EINVAL,
4223 RTE_FLOW_ERROR_TYPE_ACTION,
4224 (void *)items->type,
4225 "next protocol not found");
4227 return rte_flow_error_set(error, EINVAL,
4228 RTE_FLOW_ERROR_TYPE_ACTION,
4229 (void *)items->type,
4230 "ip header not found");
4231 if (ipv4 && !ipv4->next_proto_id)
4232 ipv4->next_proto_id = IPPROTO_GRE;
4233 else if (ipv6 && !ipv6->proto)
4234 ipv6->proto = IPPROTO_GRE;
4236 case RTE_FLOW_ITEM_TYPE_VOID:
4239 return rte_flow_error_set(error, EINVAL,
4240 RTE_FLOW_ERROR_TYPE_ACTION,
4241 (void *)items->type,
4242 "unsupported item type");
4252 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4254 struct rte_ether_hdr *eth = NULL;
4255 struct rte_vlan_hdr *vlan = NULL;
4256 struct rte_ipv6_hdr *ipv6 = NULL;
4257 struct rte_udp_hdr *udp = NULL;
4261 eth = (struct rte_ether_hdr *)data;
4262 next_hdr = (char *)(eth + 1);
4263 proto = RTE_BE16(eth->ether_type);
4266 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4267 vlan = (struct rte_vlan_hdr *)next_hdr;
4268 proto = RTE_BE16(vlan->eth_proto);
4269 next_hdr += sizeof(struct rte_vlan_hdr);
4272 /* HW calculates IPv4 csum. no need to proceed */
4273 if (proto == RTE_ETHER_TYPE_IPV4)
4276 /* non IPv4/IPv6 header. not supported */
4277 if (proto != RTE_ETHER_TYPE_IPV6) {
4278 return rte_flow_error_set(error, ENOTSUP,
4279 RTE_FLOW_ERROR_TYPE_ACTION,
4280 NULL, "Cannot offload non IPv4/IPv6");
4283 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4285 /* ignore non UDP */
4286 if (ipv6->proto != IPPROTO_UDP)
4289 udp = (struct rte_udp_hdr *)(ipv6 + 1);
4290 udp->dgram_cksum = 0;
4296 * Convert L2 encap action to DV specification.
4299 * Pointer to rte_eth_dev structure.
4301 * Pointer to action structure.
4302 * @param[in, out] dev_flow
4303 * Pointer to the mlx5_flow.
4304 * @param[in] transfer
4305 * Mark if the flow is E-Switch flow.
4307 * Pointer to the error structure.
4310 * 0 on success, a negative errno value otherwise and rte_errno is set.
4313 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4314 const struct rte_flow_action *action,
4315 struct mlx5_flow *dev_flow,
4317 struct rte_flow_error *error)
4319 const struct rte_flow_item *encap_data;
4320 const struct rte_flow_action_raw_encap *raw_encap_data;
4321 struct mlx5_flow_dv_encap_decap_resource res = {
4323 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4324 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4325 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4328 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4330 (const struct rte_flow_action_raw_encap *)action->conf;
4331 res.size = raw_encap_data->size;
4332 memcpy(res.buf, raw_encap_data->data, res.size);
4334 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4336 ((const struct rte_flow_action_vxlan_encap *)
4337 action->conf)->definition;
4340 ((const struct rte_flow_action_nvgre_encap *)
4341 action->conf)->definition;
4342 if (flow_dv_convert_encap_data(encap_data, res.buf,
4346 if (flow_dv_zero_encap_udp_csum(res.buf, error))
4348 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4349 return rte_flow_error_set(error, EINVAL,
4350 RTE_FLOW_ERROR_TYPE_ACTION,
4351 NULL, "can't create L2 encap action");
4356 * Convert L2 decap action to DV specification.
4359 * Pointer to rte_eth_dev structure.
4360 * @param[in, out] dev_flow
4361 * Pointer to the mlx5_flow.
4362 * @param[in] transfer
4363 * Mark if the flow is E-Switch flow.
4365 * Pointer to the error structure.
4368 * 0 on success, a negative errno value otherwise and rte_errno is set.
4371 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4372 struct mlx5_flow *dev_flow,
4374 struct rte_flow_error *error)
4376 struct mlx5_flow_dv_encap_decap_resource res = {
4379 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4380 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4381 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4384 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4385 return rte_flow_error_set(error, EINVAL,
4386 RTE_FLOW_ERROR_TYPE_ACTION,
4387 NULL, "can't create L2 decap action");
4392 * Convert raw decap/encap (L3 tunnel) action to DV specification.
4395 * Pointer to rte_eth_dev structure.
4397 * Pointer to action structure.
4398 * @param[in, out] dev_flow
4399 * Pointer to the mlx5_flow.
4401 * Pointer to the flow attributes.
4403 * Pointer to the error structure.
4406 * 0 on success, a negative errno value otherwise and rte_errno is set.
4409 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4410 const struct rte_flow_action *action,
4411 struct mlx5_flow *dev_flow,
4412 const struct rte_flow_attr *attr,
4413 struct rte_flow_error *error)
4415 const struct rte_flow_action_raw_encap *encap_data;
4416 struct mlx5_flow_dv_encap_decap_resource res;
4418 memset(&res, 0, sizeof(res));
4419 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4420 res.size = encap_data->size;
4421 memcpy(res.buf, encap_data->data, res.size);
4422 res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4423 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4424 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4426 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4428 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4429 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4430 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4431 return rte_flow_error_set(error, EINVAL,
4432 RTE_FLOW_ERROR_TYPE_ACTION,
4433 NULL, "can't create encap action");
4438 * Create action push VLAN.
4441 * Pointer to rte_eth_dev structure.
4443 * Pointer to the flow attributes.
4445 * Pointer to the vlan to push to the Ethernet header.
4446 * @param[in, out] dev_flow
4447 * Pointer to the mlx5_flow.
4449 * Pointer to the error structure.
4452 * 0 on success, a negative errno value otherwise and rte_errno is set.
4455 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4456 const struct rte_flow_attr *attr,
4457 const struct rte_vlan_hdr *vlan,
4458 struct mlx5_flow *dev_flow,
4459 struct rte_flow_error *error)
4461 struct mlx5_flow_dv_push_vlan_action_resource res;
4463 memset(&res, 0, sizeof(res));
4465 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4468 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4470 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4471 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4472 return flow_dv_push_vlan_action_resource_register
4473 (dev, &res, dev_flow, error);
4477 * Validate the modify-header actions.
4479 * @param[in] action_flags
4480 * Holds the actions detected until now.
4482 * Pointer to the modify action.
4484 * Pointer to error structure.
4487 * 0 on success, a negative errno value otherwise and rte_errno is set.
4490 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4491 const struct rte_flow_action *action,
4492 struct rte_flow_error *error)
4494 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4495 return rte_flow_error_set(error, EINVAL,
4496 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4497 NULL, "action configuration not set");
4498 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4499 return rte_flow_error_set(error, EINVAL,
4500 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4501 "can't have encap action before"
4507 * Validate the modify-header MAC address actions.
4509 * @param[in] action_flags
4510 * Holds the actions detected until now.
4512 * Pointer to the modify action.
4513 * @param[in] item_flags
4514 * Holds the items detected.
4516 * Pointer to error structure.
4519 * 0 on success, a negative errno value otherwise and rte_errno is set.
4522 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4523 const struct rte_flow_action *action,
4524 const uint64_t item_flags,
4525 struct rte_flow_error *error)
4529 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4531 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4532 return rte_flow_error_set(error, EINVAL,
4533 RTE_FLOW_ERROR_TYPE_ACTION,
4535 "no L2 item in pattern");
4541 * Validate the modify-header IPv4 address actions.
4543 * @param[in] action_flags
4544 * Holds the actions detected until now.
4546 * Pointer to the modify action.
4547 * @param[in] item_flags
4548 * Holds the items detected.
4550 * Pointer to error structure.
4553 * 0 on success, a negative errno value otherwise and rte_errno is set.
4556 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4557 const struct rte_flow_action *action,
4558 const uint64_t item_flags,
4559 struct rte_flow_error *error)
4564 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4566 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4567 MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4568 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4569 if (!(item_flags & layer))
4570 return rte_flow_error_set(error, EINVAL,
4571 RTE_FLOW_ERROR_TYPE_ACTION,
4573 "no ipv4 item in pattern");
4579 * Validate the modify-header IPv6 address actions.
4581 * @param[in] action_flags
4582 * Holds the actions detected until now.
4584 * Pointer to the modify action.
4585 * @param[in] item_flags
4586 * Holds the items detected.
4588 * Pointer to error structure.
4591 * 0 on success, a negative errno value otherwise and rte_errno is set.
4594 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4595 const struct rte_flow_action *action,
4596 const uint64_t item_flags,
4597 struct rte_flow_error *error)
4602 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4604 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4605 MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4606 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4607 if (!(item_flags & layer))
4608 return rte_flow_error_set(error, EINVAL,
4609 RTE_FLOW_ERROR_TYPE_ACTION,
4611 "no ipv6 item in pattern");
4617 * Validate the modify-header TP actions.
4619 * @param[in] action_flags
4620 * Holds the actions detected until now.
4622 * Pointer to the modify action.
4623 * @param[in] item_flags
4624 * Holds the items detected.
4626 * Pointer to error structure.
4629 * 0 on success, a negative errno value otherwise and rte_errno is set.
4632 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4633 const struct rte_flow_action *action,
4634 const uint64_t item_flags,
4635 struct rte_flow_error *error)
4640 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4642 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4643 MLX5_FLOW_LAYER_INNER_L4 :
4644 MLX5_FLOW_LAYER_OUTER_L4;
4645 if (!(item_flags & layer))
4646 return rte_flow_error_set(error, EINVAL,
4647 RTE_FLOW_ERROR_TYPE_ACTION,
4648 NULL, "no transport layer "
4655 * Validate the modify-header actions of increment/decrement
4656 * TCP Sequence-number.
4658 * @param[in] action_flags
4659 * Holds the actions detected until now.
4661 * Pointer to the modify action.
4662 * @param[in] item_flags
4663 * Holds the items detected.
4665 * Pointer to error structure.
4668 * 0 on success, a negative errno value otherwise and rte_errno is set.
4671 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4672 const struct rte_flow_action *action,
4673 const uint64_t item_flags,
4674 struct rte_flow_error *error)
4679 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4681 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4682 MLX5_FLOW_LAYER_INNER_L4_TCP :
4683 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4684 if (!(item_flags & layer))
4685 return rte_flow_error_set(error, EINVAL,
4686 RTE_FLOW_ERROR_TYPE_ACTION,
4687 NULL, "no TCP item in"
4689 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4690 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4691 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4692 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4693 return rte_flow_error_set(error, EINVAL,
4694 RTE_FLOW_ERROR_TYPE_ACTION,
4696 "cannot decrease and increase"
4697 " TCP sequence number"
4698 " at the same time");
4704 * Validate the modify-header actions of increment/decrement
4705 * TCP Acknowledgment number.
4707 * @param[in] action_flags
4708 * Holds the actions detected until now.
4710 * Pointer to the modify action.
4711 * @param[in] item_flags
4712 * Holds the items detected.
4714 * Pointer to error structure.
4717 * 0 on success, a negative errno value otherwise and rte_errno is set.
4720 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4721 const struct rte_flow_action *action,
4722 const uint64_t item_flags,
4723 struct rte_flow_error *error)
4728 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4730 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4731 MLX5_FLOW_LAYER_INNER_L4_TCP :
4732 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4733 if (!(item_flags & layer))
4734 return rte_flow_error_set(error, EINVAL,
4735 RTE_FLOW_ERROR_TYPE_ACTION,
4736 NULL, "no TCP item in"
4738 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4739 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4740 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4741 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4742 return rte_flow_error_set(error, EINVAL,
4743 RTE_FLOW_ERROR_TYPE_ACTION,
4745 "cannot decrease and increase"
4746 " TCP acknowledgment number"
4747 " at the same time");
4753 * Validate the modify-header TTL actions.
4755 * @param[in] action_flags
4756 * Holds the actions detected until now.
4758 * Pointer to the modify action.
4759 * @param[in] item_flags
4760 * Holds the items detected.
4762 * Pointer to error structure.
4765 * 0 on success, a negative errno value otherwise and rte_errno is set.
4768 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4769 const struct rte_flow_action *action,
4770 const uint64_t item_flags,
4771 struct rte_flow_error *error)
4776 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4778 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4779 MLX5_FLOW_LAYER_INNER_L3 :
4780 MLX5_FLOW_LAYER_OUTER_L3;
4781 if (!(item_flags & layer))
4782 return rte_flow_error_set(error, EINVAL,
4783 RTE_FLOW_ERROR_TYPE_ACTION,
4785 "no IP protocol in pattern");
4791 * Validate the generic modify field actions.
4793 * Pointer to the rte_eth_dev structure.
4794 * @param[in] action_flags
4795 * Holds the actions detected until now.
4797 * Pointer to the modify action.
4799 * Pointer to the flow attributes.
4801 * Pointer to error structure.
4804 * Number of header fields to modify (0 or more) on success,
4805 * a negative errno value otherwise and rte_errno is set.
4808 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4809 const uint64_t action_flags,
4810 const struct rte_flow_action *action,
4811 const struct rte_flow_attr *attr,
4812 struct rte_flow_error *error)
4815 struct mlx5_priv *priv = dev->data->dev_private;
4816 struct mlx5_dev_config *config = &priv->config;
4817 const struct rte_flow_action_modify_field *action_modify_field =
4819 uint32_t dst_width = mlx5_flow_item_field_width(config,
4820 action_modify_field->dst.field);
4821 uint32_t src_width = mlx5_flow_item_field_width(config,
4822 action_modify_field->src.field);
4824 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4828 if (action_modify_field->width == 0)
4829 return rte_flow_error_set(error, EINVAL,
4830 RTE_FLOW_ERROR_TYPE_ACTION, action,
4831 "no bits are requested to be modified");
4832 else if (action_modify_field->width > dst_width ||
4833 action_modify_field->width > src_width)
4834 return rte_flow_error_set(error, EINVAL,
4835 RTE_FLOW_ERROR_TYPE_ACTION, action,
4836 "cannot modify more bits than"
4837 " the width of a field");
4838 if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4839 action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4840 if ((action_modify_field->dst.offset +
4841 action_modify_field->width > dst_width) ||
4842 (action_modify_field->dst.offset % 32))
4843 return rte_flow_error_set(error, EINVAL,
4844 RTE_FLOW_ERROR_TYPE_ACTION, action,
4845 "destination offset is too big"
4846 " or not aligned to 4 bytes");
4847 if (action_modify_field->dst.level &&
4848 action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4849 return rte_flow_error_set(error, ENOTSUP,
4850 RTE_FLOW_ERROR_TYPE_ACTION, action,
4851 "inner header fields modification"
4852 " is not supported");
4854 if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4855 action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4856 if (!attr->transfer && !attr->group)
4857 return rte_flow_error_set(error, ENOTSUP,
4858 RTE_FLOW_ERROR_TYPE_ACTION, action,
4859 "modify field action is not"
4860 " supported for group 0");
4861 if ((action_modify_field->src.offset +
4862 action_modify_field->width > src_width) ||
4863 (action_modify_field->src.offset % 32))
4864 return rte_flow_error_set(error, EINVAL,
4865 RTE_FLOW_ERROR_TYPE_ACTION, action,
4866 "source offset is too big"
4867 " or not aligned to 4 bytes");
4868 if (action_modify_field->src.level &&
4869 action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4870 return rte_flow_error_set(error, ENOTSUP,
4871 RTE_FLOW_ERROR_TYPE_ACTION, action,
4872 "inner header fields modification"
4873 " is not supported");
4875 if ((action_modify_field->dst.field ==
4876 action_modify_field->src.field) &&
4877 (action_modify_field->dst.level ==
4878 action_modify_field->src.level))
4879 return rte_flow_error_set(error, EINVAL,
4880 RTE_FLOW_ERROR_TYPE_ACTION, action,
4881 "source and destination fields"
4882 " cannot be the same");
4883 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4884 action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER)
4885 return rte_flow_error_set(error, EINVAL,
4886 RTE_FLOW_ERROR_TYPE_ACTION, action,
4887 "immediate value or a pointer to it"
4888 " cannot be used as a destination");
4889 if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4890 action_modify_field->src.field == RTE_FLOW_FIELD_START)
4891 return rte_flow_error_set(error, ENOTSUP,
4892 RTE_FLOW_ERROR_TYPE_ACTION, action,
4893 "modifications of an arbitrary"
4894 " place in a packet is not supported");
4895 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4896 action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4897 return rte_flow_error_set(error, ENOTSUP,
4898 RTE_FLOW_ERROR_TYPE_ACTION, action,
4899 "modifications of the 802.1Q Tag"
4900 " Identifier is not supported");
4901 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4902 action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4903 return rte_flow_error_set(error, ENOTSUP,
4904 RTE_FLOW_ERROR_TYPE_ACTION, action,
4905 "modifications of the VXLAN Network"
4906 " Identifier is not supported");
4907 if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4908 action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4909 return rte_flow_error_set(error, ENOTSUP,
4910 RTE_FLOW_ERROR_TYPE_ACTION, action,
4911 "modifications of the GENEVE Network"
4912 " Identifier is not supported");
4913 if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4914 action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4915 action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4916 action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4917 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4918 !mlx5_flow_ext_mreg_supported(dev))
4919 return rte_flow_error_set(error, ENOTSUP,
4920 RTE_FLOW_ERROR_TYPE_ACTION, action,
4921 "cannot modify mark or metadata without"
4922 " extended metadata register support");
4924 if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4925 return rte_flow_error_set(error, ENOTSUP,
4926 RTE_FLOW_ERROR_TYPE_ACTION, action,
4927 "add and sub operations"
4928 " are not supported");
4929 return (action_modify_field->width / 32) +
4930 !!(action_modify_field->width % 32);
4934 * Validate jump action.
4937 * Pointer to the jump action.
4938 * @param[in] action_flags
4939 * Holds the actions detected until now.
4940 * @param[in] attributes
4941 * Pointer to flow attributes
4942 * @param[in] external
4943 * Action belongs to flow rule created by request external to PMD.
4945 * Pointer to error structure.
4948 * 0 on success, a negative errno value otherwise and rte_errno is set.
4951 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4952 const struct mlx5_flow_tunnel *tunnel,
4953 const struct rte_flow_action *action,
4954 uint64_t action_flags,
4955 const struct rte_flow_attr *attributes,
4956 bool external, struct rte_flow_error *error)
4958 uint32_t target_group, table;
4960 struct flow_grp_info grp_info = {
4961 .external = !!external,
4962 .transfer = !!attributes->transfer,
4966 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4967 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4968 return rte_flow_error_set(error, EINVAL,
4969 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4970 "can't have 2 fate actions in"
4973 return rte_flow_error_set(error, EINVAL,
4974 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4975 NULL, "action configuration not set");
4977 ((const struct rte_flow_action_jump *)action->conf)->group;
4978 ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4982 if (attributes->group == target_group &&
4983 !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4984 MLX5_FLOW_ACTION_TUNNEL_MATCH)))
4985 return rte_flow_error_set(error, EINVAL,
4986 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4987 "target group must be other than"
4988 " the current flow group");
4993 * Validate the port_id action.
4996 * Pointer to rte_eth_dev structure.
4997 * @param[in] action_flags
4998 * Bit-fields that holds the actions detected until now.
5000 * Port_id RTE action structure.
5002 * Attributes of flow that includes this action.
5004 * Pointer to error structure.
5007 * 0 on success, a negative errno value otherwise and rte_errno is set.
5010 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5011 uint64_t action_flags,
5012 const struct rte_flow_action *action,
5013 const struct rte_flow_attr *attr,
5014 struct rte_flow_error *error)
5016 const struct rte_flow_action_port_id *port_id;
5017 struct mlx5_priv *act_priv;
5018 struct mlx5_priv *dev_priv;
5021 if (!attr->transfer)
5022 return rte_flow_error_set(error, ENOTSUP,
5023 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5025 "port id action is valid in transfer"
5027 if (!action || !action->conf)
5028 return rte_flow_error_set(error, ENOTSUP,
5029 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5031 "port id action parameters must be"
5033 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5034 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5035 return rte_flow_error_set(error, EINVAL,
5036 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5037 "can have only one fate actions in"
5039 dev_priv = mlx5_dev_to_eswitch_info(dev);
5041 return rte_flow_error_set(error, rte_errno,
5042 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5044 "failed to obtain E-Switch info");
5045 port_id = action->conf;
5046 port = port_id->original ? dev->data->port_id : port_id->id;
5047 act_priv = mlx5_port_to_eswitch_info(port, false);
5049 return rte_flow_error_set
5051 RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
5052 "failed to obtain E-Switch port id for port");
5053 if (act_priv->domain_id != dev_priv->domain_id)
5054 return rte_flow_error_set
5056 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5057 "port does not belong to"
5058 " E-Switch being configured");
5063 * Get the maximum number of modify header actions.
5066 * Pointer to rte_eth_dev structure.
5068 * Whether action is on root table.
5071 * Max number of modify header actions device can support.
5073 static inline unsigned int
5074 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5078 * There's no way to directly query the max capacity from FW.
5079 * The maximal value on root table should be assumed to be supported.
5082 return MLX5_MAX_MODIFY_NUM;
5084 return MLX5_ROOT_TBL_MODIFY_NUM;
5088 * Validate the meter action.
5091 * Pointer to rte_eth_dev structure.
5092 * @param[in] action_flags
5093 * Bit-fields that holds the actions detected until now.
5095 * Pointer to the meter action.
5097 * Attributes of flow that includes this action.
5098 * @param[in] port_id_item
5099 * Pointer to item indicating port id.
5101 * Pointer to error structure.
5104 * 0 on success, a negative errno value otherwise and rte_ernno is set.
5107 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5108 uint64_t action_flags,
5109 const struct rte_flow_action *action,
5110 const struct rte_flow_attr *attr,
5111 const struct rte_flow_item *port_id_item,
5113 struct rte_flow_error *error)
5115 struct mlx5_priv *priv = dev->data->dev_private;
5116 const struct rte_flow_action_meter *am = action->conf;
5117 struct mlx5_flow_meter_info *fm;
5118 struct mlx5_flow_meter_policy *mtr_policy;
5119 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5122 return rte_flow_error_set(error, EINVAL,
5123 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5124 "meter action conf is NULL");
5126 if (action_flags & MLX5_FLOW_ACTION_METER)
5127 return rte_flow_error_set(error, ENOTSUP,
5128 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5129 "meter chaining not support");
5130 if (action_flags & MLX5_FLOW_ACTION_JUMP)
5131 return rte_flow_error_set(error, ENOTSUP,
5132 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5133 "meter with jump not support");
5135 return rte_flow_error_set(error, ENOTSUP,
5136 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5138 "meter action not supported");
5139 fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5141 return rte_flow_error_set(error, EINVAL,
5142 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5144 /* aso meter can always be shared by different domains */
5145 if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5146 !(fm->transfer == attr->transfer ||
5147 (!fm->ingress && !attr->ingress && attr->egress) ||
5148 (!fm->egress && !attr->egress && attr->ingress)))
5149 return rte_flow_error_set(error, EINVAL,
5150 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5151 "Flow attributes domain are either invalid "
5152 "or have a domain conflict with current "
5153 "meter attributes");
5154 if (fm->def_policy) {
5155 if (!((attr->transfer &&
5156 mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5158 mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5160 mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5161 return rte_flow_error_set(error, EINVAL,
5162 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5163 "Flow attributes domain "
5164 "have a conflict with current "
5165 "meter domain attributes");
5168 mtr_policy = mlx5_flow_meter_policy_find(dev,
5169 fm->policy_id, NULL);
5171 return rte_flow_error_set(error, EINVAL,
5172 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5173 "Invalid policy id for meter ");
5174 if (!((attr->transfer && mtr_policy->transfer) ||
5175 (attr->egress && mtr_policy->egress) ||
5176 (attr->ingress && mtr_policy->ingress)))
5177 return rte_flow_error_set(error, EINVAL,
5178 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5179 "Flow attributes domain "
5180 "have a conflict with current "
5181 "meter domain attributes");
5182 if (attr->transfer && mtr_policy->dev) {
5184 * When policy has fate action of port_id,
5185 * the flow should have the same src port as policy.
5187 struct mlx5_priv *policy_port_priv =
5188 mtr_policy->dev->data->dev_private;
5189 int32_t flow_src_port = priv->representor_id;
5192 const struct rte_flow_item_port_id *spec =
5194 struct mlx5_priv *port_priv =
5195 mlx5_port_to_eswitch_info(spec->id,
5198 return rte_flow_error_set(error,
5200 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5202 "Failed to get port info.");
5203 flow_src_port = port_priv->representor_id;
5205 if (flow_src_port != policy_port_priv->representor_id)
5206 return rte_flow_error_set(error,
5208 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5210 "Flow and meter policy "
5211 "have different src port.");
5213 *def_policy = false;
5219 * Validate the age action.
5221 * @param[in] action_flags
5222 * Holds the actions detected until now.
5224 * Pointer to the age action.
5226 * Pointer to the Ethernet device structure.
5228 * Pointer to error structure.
5231 * 0 on success, a negative errno value otherwise and rte_errno is set.
5234 flow_dv_validate_action_age(uint64_t action_flags,
5235 const struct rte_flow_action *action,
5236 struct rte_eth_dev *dev,
5237 struct rte_flow_error *error)
5239 struct mlx5_priv *priv = dev->data->dev_private;
5240 const struct rte_flow_action_age *age = action->conf;
5242 if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5243 !priv->sh->aso_age_mng))
5244 return rte_flow_error_set(error, ENOTSUP,
5245 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5247 "age action not supported");
5248 if (!(action->conf))
5249 return rte_flow_error_set(error, EINVAL,
5250 RTE_FLOW_ERROR_TYPE_ACTION, action,
5251 "configuration cannot be null");
5252 if (!(age->timeout))
5253 return rte_flow_error_set(error, EINVAL,
5254 RTE_FLOW_ERROR_TYPE_ACTION, action,
5255 "invalid timeout value 0");
5256 if (action_flags & MLX5_FLOW_ACTION_AGE)
5257 return rte_flow_error_set(error, EINVAL,
5258 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5259 "duplicate age actions set");
5264 * Validate the modify-header IPv4 DSCP actions.
5266 * @param[in] action_flags
5267 * Holds the actions detected until now.
5269 * Pointer to the modify action.
5270 * @param[in] item_flags
5271 * Holds the items detected.
5273 * Pointer to error structure.
5276 * 0 on success, a negative errno value otherwise and rte_errno is set.
5279 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5280 const struct rte_flow_action *action,
5281 const uint64_t item_flags,
5282 struct rte_flow_error *error)
5286 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5288 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5289 return rte_flow_error_set(error, EINVAL,
5290 RTE_FLOW_ERROR_TYPE_ACTION,
5292 "no ipv4 item in pattern");
5298 * Validate the modify-header IPv6 DSCP actions.
5300 * @param[in] action_flags
5301 * Holds the actions detected until now.
5303 * Pointer to the modify action.
5304 * @param[in] item_flags
5305 * Holds the items detected.
5307 * Pointer to error structure.
5310 * 0 on success, a negative errno value otherwise and rte_errno is set.
5313 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5314 const struct rte_flow_action *action,
5315 const uint64_t item_flags,
5316 struct rte_flow_error *error)
5320 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5322 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5323 return rte_flow_error_set(error, EINVAL,
5324 RTE_FLOW_ERROR_TYPE_ACTION,
5326 "no ipv6 item in pattern");
5332 * Match modify-header resource.
5335 * Pointer to the hash list.
5337 * Pointer to exist resource entry object.
5339 * Key of the new entry.
5341 * Pointer to new modify-header resource.
5344 * 0 on matching, non-zero otherwise.
5347 flow_dv_modify_match_cb(struct mlx5_hlist *list __rte_unused,
5348 struct mlx5_hlist_entry *entry,
5349 uint64_t key __rte_unused, void *cb_ctx)
5351 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5352 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5353 struct mlx5_flow_dv_modify_hdr_resource *resource =
5354 container_of(entry, typeof(*resource), entry);
5355 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5357 key_len += ref->actions_num * sizeof(ref->actions[0]);
5358 return ref->actions_num != resource->actions_num ||
5359 memcmp(&ref->ft_type, &resource->ft_type, key_len);
5362 struct mlx5_hlist_entry *
5363 flow_dv_modify_create_cb(struct mlx5_hlist *list, uint64_t key __rte_unused,
5366 struct mlx5_dev_ctx_shared *sh = list->ctx;
5367 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5368 struct mlx5dv_dr_domain *ns;
5369 struct mlx5_flow_dv_modify_hdr_resource *entry;
5370 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5372 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5373 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5375 entry = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*entry) + data_len, 0,
5378 rte_flow_error_set(ctx->error, ENOMEM,
5379 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5380 "cannot allocate resource memory");
5383 rte_memcpy(&entry->ft_type,
5384 RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5385 key_len + data_len);
5386 if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5387 ns = sh->fdb_domain;
5388 else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5392 ret = mlx5_flow_os_create_flow_action_modify_header
5393 (sh->ctx, ns, entry,
5394 data_len, &entry->action);
5397 rte_flow_error_set(ctx->error, ENOMEM,
5398 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5399 NULL, "cannot create modification action");
5402 return &entry->entry;
5406 * Validate the sample action.
5408 * @param[in, out] action_flags
5409 * Holds the actions detected until now.
5411 * Pointer to the sample action.
5413 * Pointer to the Ethernet device structure.
5415 * Attributes of flow that includes this action.
5416 * @param[in] item_flags
5417 * Holds the items detected.
5419 * Pointer to the RSS action.
5420 * @param[out] sample_rss
5421 * Pointer to the RSS action in sample action list.
5423 * Pointer to the COUNT action in sample action list.
5424 * @param[out] fdb_mirror_limit
5425 * Pointer to the FDB mirror limitation flag.
5427 * Pointer to error structure.
5430 * 0 on success, a negative errno value otherwise and rte_errno is set.
5433 flow_dv_validate_action_sample(uint64_t *action_flags,
5434 const struct rte_flow_action *action,
5435 struct rte_eth_dev *dev,
5436 const struct rte_flow_attr *attr,
5437 uint64_t item_flags,
5438 const struct rte_flow_action_rss *rss,
5439 const struct rte_flow_action_rss **sample_rss,
5440 const struct rte_flow_action_count **count,
5441 int *fdb_mirror_limit,
5442 struct rte_flow_error *error)
5444 struct mlx5_priv *priv = dev->data->dev_private;
5445 struct mlx5_dev_config *dev_conf = &priv->config;
5446 const struct rte_flow_action_sample *sample = action->conf;
5447 const struct rte_flow_action *act;
5448 uint64_t sub_action_flags = 0;
5449 uint16_t queue_index = 0xFFFF;
5454 return rte_flow_error_set(error, EINVAL,
5455 RTE_FLOW_ERROR_TYPE_ACTION, action,
5456 "configuration cannot be NULL");
5457 if (sample->ratio == 0)
5458 return rte_flow_error_set(error, EINVAL,
5459 RTE_FLOW_ERROR_TYPE_ACTION, action,
5460 "ratio value starts from 1");
5461 if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5462 return rte_flow_error_set(error, ENOTSUP,
5463 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5465 "sample action not supported");
5466 if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5467 return rte_flow_error_set(error, EINVAL,
5468 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5469 "Multiple sample actions not "
5471 if (*action_flags & MLX5_FLOW_ACTION_METER)
5472 return rte_flow_error_set(error, EINVAL,
5473 RTE_FLOW_ERROR_TYPE_ACTION, action,
5474 "wrong action order, meter should "
5475 "be after sample action");
5476 if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5477 return rte_flow_error_set(error, EINVAL,
5478 RTE_FLOW_ERROR_TYPE_ACTION, action,
5479 "wrong action order, jump should "
5480 "be after sample action");
5481 act = sample->actions;
5482 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5483 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5484 return rte_flow_error_set(error, ENOTSUP,
5485 RTE_FLOW_ERROR_TYPE_ACTION,
5486 act, "too many actions");
5487 switch (act->type) {
5488 case RTE_FLOW_ACTION_TYPE_QUEUE:
5489 ret = mlx5_flow_validate_action_queue(act,
5495 queue_index = ((const struct rte_flow_action_queue *)
5496 (act->conf))->index;
5497 sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5500 case RTE_FLOW_ACTION_TYPE_RSS:
5501 *sample_rss = act->conf;
5502 ret = mlx5_flow_validate_action_rss(act,
5509 if (rss && *sample_rss &&
5510 ((*sample_rss)->level != rss->level ||
5511 (*sample_rss)->types != rss->types))
5512 return rte_flow_error_set(error, ENOTSUP,
5513 RTE_FLOW_ERROR_TYPE_ACTION,
5515 "Can't use the different RSS types "
5516 "or level in the same flow");
5517 if (*sample_rss != NULL && (*sample_rss)->queue_num)
5518 queue_index = (*sample_rss)->queue[0];
5519 sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5522 case RTE_FLOW_ACTION_TYPE_MARK:
5523 ret = flow_dv_validate_action_mark(dev, act,
5528 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5529 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5530 MLX5_FLOW_ACTION_MARK_EXT;
5532 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5535 case RTE_FLOW_ACTION_TYPE_COUNT:
5536 ret = flow_dv_validate_action_count
5537 (dev, is_shared_action_count(act),
5538 *action_flags | sub_action_flags,
5543 sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5544 *action_flags |= MLX5_FLOW_ACTION_COUNT;
5547 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5548 ret = flow_dv_validate_action_port_id(dev,
5555 sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5558 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5559 ret = flow_dv_validate_action_raw_encap_decap
5560 (dev, NULL, act->conf, attr, &sub_action_flags,
5561 &actions_n, action, item_flags, error);
5566 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5567 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5568 ret = flow_dv_validate_action_l2_encap(dev,
5574 sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5578 return rte_flow_error_set(error, ENOTSUP,
5579 RTE_FLOW_ERROR_TYPE_ACTION,
5581 "Doesn't support optional "
5585 if (attr->ingress && !attr->transfer) {
5586 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5587 MLX5_FLOW_ACTION_RSS)))
5588 return rte_flow_error_set(error, EINVAL,
5589 RTE_FLOW_ERROR_TYPE_ACTION,
5591 "Ingress must has a dest "
5592 "QUEUE for Sample");
5593 } else if (attr->egress && !attr->transfer) {
5594 return rte_flow_error_set(error, ENOTSUP,
5595 RTE_FLOW_ERROR_TYPE_ACTION,
5597 "Sample Only support Ingress "
5599 } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5600 MLX5_ASSERT(attr->transfer);
5601 if (sample->ratio > 1)
5602 return rte_flow_error_set(error, ENOTSUP,
5603 RTE_FLOW_ERROR_TYPE_ACTION,
5605 "E-Switch doesn't support "
5606 "any optional action "
5608 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5609 return rte_flow_error_set(error, ENOTSUP,
5610 RTE_FLOW_ERROR_TYPE_ACTION,
5612 "unsupported action QUEUE");
5613 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5614 return rte_flow_error_set(error, ENOTSUP,
5615 RTE_FLOW_ERROR_TYPE_ACTION,
5617 "unsupported action QUEUE");
5618 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5619 return rte_flow_error_set(error, EINVAL,
5620 RTE_FLOW_ERROR_TYPE_ACTION,
5622 "E-Switch must has a dest "
5623 "port for mirroring");
5624 if (!priv->config.hca_attr.reg_c_preserve &&
5625 priv->representor_id != UINT16_MAX)
5626 *fdb_mirror_limit = 1;
5628 /* Continue validation for Xcap actions.*/
5629 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5630 (queue_index == 0xFFFF ||
5631 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5632 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5633 MLX5_FLOW_XCAP_ACTIONS)
5634 return rte_flow_error_set(error, ENOTSUP,
5635 RTE_FLOW_ERROR_TYPE_ACTION,
5636 NULL, "encap and decap "
5637 "combination aren't "
5639 if (!attr->transfer && attr->ingress && (sub_action_flags &
5640 MLX5_FLOW_ACTION_ENCAP))
5641 return rte_flow_error_set(error, ENOTSUP,
5642 RTE_FLOW_ERROR_TYPE_ACTION,
5643 NULL, "encap is not supported"
5644 " for ingress traffic");
5650 * Find existing modify-header resource or create and register a new one.
5652 * @param dev[in, out]
5653 * Pointer to rte_eth_dev structure.
5654 * @param[in, out] resource
5655 * Pointer to modify-header resource.
5656 * @parm[in, out] dev_flow
5657 * Pointer to the dev_flow.
5659 * pointer to error structure.
5662 * 0 on success otherwise -errno and errno is set.
5665 flow_dv_modify_hdr_resource_register
5666 (struct rte_eth_dev *dev,
5667 struct mlx5_flow_dv_modify_hdr_resource *resource,
5668 struct mlx5_flow *dev_flow,
5669 struct rte_flow_error *error)
5671 struct mlx5_priv *priv = dev->data->dev_private;
5672 struct mlx5_dev_ctx_shared *sh = priv->sh;
5673 uint32_t key_len = sizeof(*resource) -
5674 offsetof(typeof(*resource), ft_type) +
5675 resource->actions_num * sizeof(resource->actions[0]);
5676 struct mlx5_hlist_entry *entry;
5677 struct mlx5_flow_cb_ctx ctx = {
5683 resource->root = !dev_flow->dv.group;
5684 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5686 return rte_flow_error_set(error, EOVERFLOW,
5687 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5688 "too many modify header items");
5689 key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5690 entry = mlx5_hlist_register(sh->modify_cmds, key64, &ctx);
5693 resource = container_of(entry, typeof(*resource), entry);
5694 dev_flow->handle->dvh.modify_hdr = resource;
5699 * Get DV flow counter by index.
5702 * Pointer to the Ethernet device structure.
5704 * mlx5 flow counter index in the container.
5706 * mlx5 flow counter pool in the container.
5709 * Pointer to the counter, NULL otherwise.
5711 static struct mlx5_flow_counter *
5712 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5714 struct mlx5_flow_counter_pool **ppool)
5716 struct mlx5_priv *priv = dev->data->dev_private;
5717 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5718 struct mlx5_flow_counter_pool *pool;
5720 /* Decrease to original index and clear shared bit. */
5721 idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5722 MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5723 pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5727 return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5731 * Check the devx counter belongs to the pool.
5734 * Pointer to the counter pool.
5736 * The counter devx ID.
5739 * True if counter belongs to the pool, false otherwise.
5742 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5744 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5745 MLX5_COUNTERS_PER_POOL;
5747 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5753 * Get a pool by devx counter ID.
5756 * Pointer to the counter management.
5758 * The counter devx ID.
5761 * The counter pool pointer if exists, NULL otherwise,
5763 static struct mlx5_flow_counter_pool *
5764 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5767 struct mlx5_flow_counter_pool *pool = NULL;
5769 rte_spinlock_lock(&cmng->pool_update_sl);
5770 /* Check last used pool. */
5771 if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5772 flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5773 pool = cmng->pools[cmng->last_pool_idx];
5776 /* ID out of range means no suitable pool in the container. */
5777 if (id > cmng->max_id || id < cmng->min_id)
5780 * Find the pool from the end of the container, since mostly counter
5781 * ID is sequence increasing, and the last pool should be the needed
5786 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5788 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5794 rte_spinlock_unlock(&cmng->pool_update_sl);
5799 * Resize a counter container.
5802 * Pointer to the Ethernet device structure.
5805 * 0 on success, otherwise negative errno value and rte_errno is set.
5808 flow_dv_container_resize(struct rte_eth_dev *dev)
5810 struct mlx5_priv *priv = dev->data->dev_private;
5811 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5812 void *old_pools = cmng->pools;
5813 uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5814 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5815 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5822 memcpy(pools, old_pools, cmng->n *
5823 sizeof(struct mlx5_flow_counter_pool *));
5825 cmng->pools = pools;
5827 mlx5_free(old_pools);
5832 * Query a devx flow counter.
5835 * Pointer to the Ethernet device structure.
5836 * @param[in] counter
5837 * Index to the flow counter.
5839 * The statistics value of packets.
5841 * The statistics value of bytes.
5844 * 0 on success, otherwise a negative errno value and rte_errno is set.
5847 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5850 struct mlx5_priv *priv = dev->data->dev_private;
5851 struct mlx5_flow_counter_pool *pool = NULL;
5852 struct mlx5_flow_counter *cnt;
5855 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5857 if (priv->sh->cmng.counter_fallback)
5858 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5859 0, pkts, bytes, 0, NULL, NULL, 0);
5860 rte_spinlock_lock(&pool->sl);
5865 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5866 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5867 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5869 rte_spinlock_unlock(&pool->sl);
5874 * Create and initialize a new counter pool.
5877 * Pointer to the Ethernet device structure.
5879 * The devX counter handle.
5881 * Whether the pool is for counter that was allocated for aging.
5882 * @param[in/out] cont_cur
5883 * Pointer to the container pointer, it will be update in pool resize.
5886 * The pool container pointer on success, NULL otherwise and rte_errno is set.
5888 static struct mlx5_flow_counter_pool *
5889 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
5892 struct mlx5_priv *priv = dev->data->dev_private;
5893 struct mlx5_flow_counter_pool *pool;
5894 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5895 bool fallback = priv->sh->cmng.counter_fallback;
5896 uint32_t size = sizeof(*pool);
5898 size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
5899 size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
5900 pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
5906 pool->is_aged = !!age;
5907 pool->query_gen = 0;
5908 pool->min_dcs = dcs;
5909 rte_spinlock_init(&pool->sl);
5910 rte_spinlock_init(&pool->csl);
5911 TAILQ_INIT(&pool->counters[0]);
5912 TAILQ_INIT(&pool->counters[1]);
5913 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
5914 rte_spinlock_lock(&cmng->pool_update_sl);
5915 pool->index = cmng->n_valid;
5916 if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
5918 rte_spinlock_unlock(&cmng->pool_update_sl);
5921 cmng->pools[pool->index] = pool;
5923 if (unlikely(fallback)) {
5924 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
5926 if (base < cmng->min_id)
5927 cmng->min_id = base;
5928 if (base > cmng->max_id)
5929 cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
5930 cmng->last_pool_idx = pool->index;
5932 rte_spinlock_unlock(&cmng->pool_update_sl);
5937 * Prepare a new counter and/or a new counter pool.
5940 * Pointer to the Ethernet device structure.
5941 * @param[out] cnt_free
5942 * Where to put the pointer of a new counter.
5944 * Whether the pool is for counter that was allocated for aging.
5947 * The counter pool pointer and @p cnt_free is set on success,
5948 * NULL otherwise and rte_errno is set.
5950 static struct mlx5_flow_counter_pool *
5951 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
5952 struct mlx5_flow_counter **cnt_free,
5955 struct mlx5_priv *priv = dev->data->dev_private;
5956 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5957 struct mlx5_flow_counter_pool *pool;
5958 struct mlx5_counters tmp_tq;
5959 struct mlx5_devx_obj *dcs = NULL;
5960 struct mlx5_flow_counter *cnt;
5961 enum mlx5_counter_type cnt_type =
5962 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
5963 bool fallback = priv->sh->cmng.counter_fallback;
5967 /* bulk_bitmap must be 0 for single counter allocation. */
5968 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
5971 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
5973 pool = flow_dv_pool_create(dev, dcs, age);
5975 mlx5_devx_cmd_destroy(dcs);
5979 i = dcs->id % MLX5_COUNTERS_PER_POOL;
5980 cnt = MLX5_POOL_GET_CNT(pool, i);
5982 cnt->dcs_when_free = dcs;
5986 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
5988 rte_errno = ENODATA;
5991 pool = flow_dv_pool_create(dev, dcs, age);
5993 mlx5_devx_cmd_destroy(dcs);
5996 TAILQ_INIT(&tmp_tq);
5997 for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
5998 cnt = MLX5_POOL_GET_CNT(pool, i);
6000 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6002 rte_spinlock_lock(&cmng->csl[cnt_type]);
6003 TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6004 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6005 *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6006 (*cnt_free)->pool = pool;
6011 * Allocate a flow counter.
6014 * Pointer to the Ethernet device structure.
6016 * Whether the counter was allocated for aging.
6019 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6022 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6024 struct mlx5_priv *priv = dev->data->dev_private;
6025 struct mlx5_flow_counter_pool *pool = NULL;
6026 struct mlx5_flow_counter *cnt_free = NULL;
6027 bool fallback = priv->sh->cmng.counter_fallback;
6028 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6029 enum mlx5_counter_type cnt_type =
6030 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6033 if (!priv->config.devx) {
6034 rte_errno = ENOTSUP;
6037 /* Get free counters from container. */
6038 rte_spinlock_lock(&cmng->csl[cnt_type]);
6039 cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6041 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6042 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6043 if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6045 pool = cnt_free->pool;
6047 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6048 /* Create a DV counter action only in the first time usage. */
6049 if (!cnt_free->action) {
6051 struct mlx5_devx_obj *dcs;
6055 offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6056 dcs = pool->min_dcs;
6059 dcs = cnt_free->dcs_when_free;
6061 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6068 cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6069 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6070 /* Update the counter reset values. */
6071 if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6074 if (!fallback && !priv->sh->cmng.query_thread_on)
6075 /* Start the asynchronous batch query by the host thread. */
6076 mlx5_set_query_alarm(priv->sh);
6078 * When the count action isn't shared (by ID), shared_info field is
6079 * used for indirect action API's refcnt.
6080 * When the counter action is not shared neither by ID nor by indirect
6081 * action API, shared info must be 1.
6083 cnt_free->shared_info.refcnt = 1;
6087 cnt_free->pool = pool;
6089 cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6090 rte_spinlock_lock(&cmng->csl[cnt_type]);
6091 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6092 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6098 * Allocate a shared flow counter.
6101 * Pointer to the shared counter configuration.
6103 * Pointer to save the allocated counter index.
6106 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6110 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
6112 struct mlx5_shared_counter_conf *conf = ctx;
6113 struct rte_eth_dev *dev = conf->dev;
6114 struct mlx5_flow_counter *cnt;
6116 data->dword = flow_dv_counter_alloc(dev, 0);
6117 data->dword |= MLX5_CNT_SHARED_OFFSET;
6118 cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
6119 cnt->shared_info.id = conf->id;
6124 * Get a shared flow counter.
6127 * Pointer to the Ethernet device structure.
6129 * Counter identifier.
6132 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6135 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
6137 struct mlx5_priv *priv = dev->data->dev_private;
6138 struct mlx5_shared_counter_conf conf = {
6142 union mlx5_l3t_data data = {
6146 mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
6147 flow_dv_counter_alloc_shared_cb, &conf);
6152 * Get age param from counter index.
6155 * Pointer to the Ethernet device structure.
6156 * @param[in] counter
6157 * Index to the counter handler.
6160 * The aging parameter specified for the counter index.
6162 static struct mlx5_age_param*
6163 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6166 struct mlx5_flow_counter *cnt;
6167 struct mlx5_flow_counter_pool *pool = NULL;
6169 flow_dv_counter_get_by_idx(dev, counter, &pool);
6170 counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6171 cnt = MLX5_POOL_GET_CNT(pool, counter);
6172 return MLX5_CNT_TO_AGE(cnt);
6176 * Remove a flow counter from aged counter list.
6179 * Pointer to the Ethernet device structure.
6180 * @param[in] counter
6181 * Index to the counter handler.
6183 * Pointer to the counter handler.
6186 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6187 uint32_t counter, struct mlx5_flow_counter *cnt)
6189 struct mlx5_age_info *age_info;
6190 struct mlx5_age_param *age_param;
6191 struct mlx5_priv *priv = dev->data->dev_private;
6192 uint16_t expected = AGE_CANDIDATE;
6194 age_info = GET_PORT_AGE_INFO(priv);
6195 age_param = flow_dv_counter_idx_get_age(dev, counter);
6196 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6197 AGE_FREE, false, __ATOMIC_RELAXED,
6198 __ATOMIC_RELAXED)) {
6200 * We need the lock even it is age timeout,
6201 * since counter may still in process.
6203 rte_spinlock_lock(&age_info->aged_sl);
6204 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6205 rte_spinlock_unlock(&age_info->aged_sl);
6206 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6211 * Release a flow counter.
6214 * Pointer to the Ethernet device structure.
6215 * @param[in] counter
6216 * Index to the counter handler.
6219 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6221 struct mlx5_priv *priv = dev->data->dev_private;
6222 struct mlx5_flow_counter_pool *pool = NULL;
6223 struct mlx5_flow_counter *cnt;
6224 enum mlx5_counter_type cnt_type;
6228 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6230 if (pool->is_aged) {
6231 flow_dv_counter_remove_from_age(dev, counter, cnt);
6234 * If the counter action is shared by ID, the l3t_clear_entry
6235 * function reduces its references counter. If after the
6236 * reduction the action is still referenced, the function
6237 * returns here and does not release it.
6239 if (IS_LEGACY_SHARED_CNT(counter) &&
6240 mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl,
6241 cnt->shared_info.id))
6244 * If the counter action is shared by indirect action API,
6245 * the atomic function reduces its references counter.
6246 * If after the reduction the action is still referenced, the
6247 * function returns here and does not release it.
6248 * When the counter action is not shared neither by ID nor by
6249 * indirect action API, shared info is 1 before the reduction,
6250 * so this condition is failed and function doesn't return here.
6252 if (!IS_LEGACY_SHARED_CNT(counter) &&
6253 __atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6259 * Put the counter back to list to be updated in none fallback mode.
6260 * Currently, we are using two list alternately, while one is in query,
6261 * add the freed counter to the other list based on the pool query_gen
6262 * value. After query finishes, add counter the list to the global
6263 * container counter list. The list changes while query starts. In
6264 * this case, lock will not be needed as query callback and release
6265 * function both operate with the different list.
6267 if (!priv->sh->cmng.counter_fallback) {
6268 rte_spinlock_lock(&pool->csl);
6269 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6270 rte_spinlock_unlock(&pool->csl);
6272 cnt->dcs_when_free = cnt->dcs_when_active;
6273 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6274 MLX5_COUNTER_TYPE_ORIGIN;
6275 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6276 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6278 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6283 * Resize a meter id container.
6286 * Pointer to the Ethernet device structure.
6289 * 0 on success, otherwise negative errno value and rte_errno is set.
6292 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6294 struct mlx5_priv *priv = dev->data->dev_private;
6295 struct mlx5_aso_mtr_pools_mng *pools_mng =
6296 &priv->sh->mtrmng->pools_mng;
6297 void *old_pools = pools_mng->pools;
6298 uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6299 uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6300 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6307 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6312 memcpy(pools, old_pools, pools_mng->n *
6313 sizeof(struct mlx5_aso_mtr_pool *));
6314 pools_mng->n = resize;
6315 pools_mng->pools = pools;
6317 mlx5_free(old_pools);
6322 * Prepare a new meter and/or a new meter pool.
6325 * Pointer to the Ethernet device structure.
6326 * @param[out] mtr_free
6327 * Where to put the pointer of a new meter.g.
6330 * The meter pool pointer and @mtr_free is set on success,
6331 * NULL otherwise and rte_errno is set.
6333 static struct mlx5_aso_mtr_pool *
6334 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6335 struct mlx5_aso_mtr **mtr_free)
6337 struct mlx5_priv *priv = dev->data->dev_private;
6338 struct mlx5_aso_mtr_pools_mng *pools_mng =
6339 &priv->sh->mtrmng->pools_mng;
6340 struct mlx5_aso_mtr_pool *pool = NULL;
6341 struct mlx5_devx_obj *dcs = NULL;
6343 uint32_t log_obj_size;
6345 log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6346 dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6347 priv->sh->pdn, log_obj_size);
6349 rte_errno = ENODATA;
6352 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6355 claim_zero(mlx5_devx_cmd_destroy(dcs));
6358 pool->devx_obj = dcs;
6359 pool->index = pools_mng->n_valid;
6360 if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6362 claim_zero(mlx5_devx_cmd_destroy(dcs));
6365 pools_mng->pools[pool->index] = pool;
6366 pools_mng->n_valid++;
6367 for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6368 pool->mtrs[i].offset = i;
6369 LIST_INSERT_HEAD(&pools_mng->meters,
6370 &pool->mtrs[i], next);
6372 pool->mtrs[0].offset = 0;
6373 *mtr_free = &pool->mtrs[0];
6378 * Release a flow meter into pool.
6381 * Pointer to the Ethernet device structure.
6382 * @param[in] mtr_idx
6383 * Index to aso flow meter.
6386 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6388 struct mlx5_priv *priv = dev->data->dev_private;
6389 struct mlx5_aso_mtr_pools_mng *pools_mng =
6390 &priv->sh->mtrmng->pools_mng;
6391 struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6393 MLX5_ASSERT(aso_mtr);
6394 rte_spinlock_lock(&pools_mng->mtrsl);
6395 memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6396 aso_mtr->state = ASO_METER_FREE;
6397 LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6398 rte_spinlock_unlock(&pools_mng->mtrsl);
6402 * Allocate a aso flow meter.
6405 * Pointer to the Ethernet device structure.
6408 * Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6411 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6413 struct mlx5_priv *priv = dev->data->dev_private;
6414 struct mlx5_aso_mtr *mtr_free = NULL;
6415 struct mlx5_aso_mtr_pools_mng *pools_mng =
6416 &priv->sh->mtrmng->pools_mng;
6417 struct mlx5_aso_mtr_pool *pool;
6418 uint32_t mtr_idx = 0;
6420 if (!priv->config.devx) {
6421 rte_errno = ENOTSUP;
6424 /* Allocate the flow meter memory. */
6425 /* Get free meters from management. */
6426 rte_spinlock_lock(&pools_mng->mtrsl);
6427 mtr_free = LIST_FIRST(&pools_mng->meters);
6429 LIST_REMOVE(mtr_free, next);
6430 if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6431 rte_spinlock_unlock(&pools_mng->mtrsl);
6434 mtr_free->state = ASO_METER_WAIT;
6435 rte_spinlock_unlock(&pools_mng->mtrsl);
6436 pool = container_of(mtr_free,
6437 struct mlx5_aso_mtr_pool,
6438 mtrs[mtr_free->offset]);
6439 mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6440 if (!mtr_free->fm.meter_action) {
6441 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6442 struct rte_flow_error error;
6445 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6446 mtr_free->fm.meter_action =
6447 mlx5_glue->dv_create_flow_action_aso
6448 (priv->sh->rx_domain,
6449 pool->devx_obj->obj,
6451 (1 << MLX5_FLOW_COLOR_GREEN),
6453 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6454 if (!mtr_free->fm.meter_action) {
6455 flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6463 * Verify the @p attributes will be correctly understood by the NIC and store
6464 * them in the @p flow if everything is correct.
6467 * Pointer to dev struct.
6468 * @param[in] attributes
6469 * Pointer to flow attributes
6470 * @param[in] external
6471 * This flow rule is created by request external to PMD.
6473 * Pointer to error structure.
6476 * - 0 on success and non root table.
6477 * - 1 on success and root table.
6478 * - a negative errno value otherwise and rte_errno is set.
6481 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6482 const struct mlx5_flow_tunnel *tunnel,
6483 const struct rte_flow_attr *attributes,
6484 const struct flow_grp_info *grp_info,
6485 struct rte_flow_error *error)
6487 struct mlx5_priv *priv = dev->data->dev_private;
6488 uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6491 #ifndef HAVE_MLX5DV_DR
6492 RTE_SET_USED(tunnel);
6493 RTE_SET_USED(grp_info);
6494 if (attributes->group)
6495 return rte_flow_error_set(error, ENOTSUP,
6496 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6498 "groups are not supported");
6502 ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6507 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6509 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6510 attributes->priority > lowest_priority)
6511 return rte_flow_error_set(error, ENOTSUP,
6512 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6514 "priority out of range");
6515 if (attributes->transfer) {
6516 if (!priv->config.dv_esw_en)
6517 return rte_flow_error_set
6519 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6520 "E-Switch dr is not supported");
6521 if (!(priv->representor || priv->master))
6522 return rte_flow_error_set
6523 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6524 NULL, "E-Switch configuration can only be"
6525 " done by a master or a representor device");
6526 if (attributes->egress)
6527 return rte_flow_error_set
6529 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6530 "egress is not supported");
6532 if (!(attributes->egress ^ attributes->ingress))
6533 return rte_flow_error_set(error, ENOTSUP,
6534 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6535 "must specify exactly one of "
6536 "ingress or egress");
6541 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6542 const struct rte_flow_item *end)
6544 const struct rte_flow_item *item = *head;
6545 uint16_t l3_protocol;
6547 for (; item != end; item++) {
6548 switch (item->type) {
6551 case RTE_FLOW_ITEM_TYPE_IPV4:
6552 l3_protocol = RTE_ETHER_TYPE_IPV4;
6554 case RTE_FLOW_ITEM_TYPE_IPV6:
6555 l3_protocol = RTE_ETHER_TYPE_IPV6;
6557 case RTE_FLOW_ITEM_TYPE_ETH:
6558 if (item->mask && item->spec) {
6559 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6562 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6563 l3_protocol == RTE_ETHER_TYPE_IPV6)
6567 case RTE_FLOW_ITEM_TYPE_VLAN:
6568 if (item->mask && item->spec) {
6569 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6572 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6573 l3_protocol == RTE_ETHER_TYPE_IPV6)
6586 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6587 const struct rte_flow_item *end)
6589 const struct rte_flow_item *item = *head;
6590 uint8_t l4_protocol;
6592 for (; item != end; item++) {
6593 switch (item->type) {
6596 case RTE_FLOW_ITEM_TYPE_TCP:
6597 l4_protocol = IPPROTO_TCP;
6599 case RTE_FLOW_ITEM_TYPE_UDP:
6600 l4_protocol = IPPROTO_UDP;
6602 case RTE_FLOW_ITEM_TYPE_IPV4:
6603 if (item->mask && item->spec) {
6604 const struct rte_flow_item_ipv4 *mask, *spec;
6606 mask = (typeof(mask))item->mask;
6607 spec = (typeof(spec))item->spec;
6608 l4_protocol = mask->hdr.next_proto_id &
6609 spec->hdr.next_proto_id;
6610 if (l4_protocol == IPPROTO_TCP ||
6611 l4_protocol == IPPROTO_UDP)
6615 case RTE_FLOW_ITEM_TYPE_IPV6:
6616 if (item->mask && item->spec) {
6617 const struct rte_flow_item_ipv6 *mask, *spec;
6618 mask = (typeof(mask))item->mask;
6619 spec = (typeof(spec))item->spec;
6620 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6621 if (l4_protocol == IPPROTO_TCP ||
6622 l4_protocol == IPPROTO_UDP)
6635 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6636 const struct rte_flow_item *rule_items,
6637 const struct rte_flow_item *integrity_item,
6638 struct rte_flow_error *error)
6640 struct mlx5_priv *priv = dev->data->dev_private;
6641 const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6642 const struct rte_flow_item_integrity *mask = (typeof(mask))
6643 integrity_item->mask;
6644 const struct rte_flow_item_integrity *spec = (typeof(spec))
6645 integrity_item->spec;
6648 if (!priv->config.hca_attr.pkt_integrity_match)
6649 return rte_flow_error_set(error, ENOTSUP,
6650 RTE_FLOW_ERROR_TYPE_ITEM,
6652 "packet integrity integrity_item not supported");
6654 mask = &rte_flow_item_integrity_mask;
6655 if (!mlx5_validate_integrity_item(mask))
6656 return rte_flow_error_set(error, ENOTSUP,
6657 RTE_FLOW_ERROR_TYPE_ITEM,
6659 "unsupported integrity filter");
6660 tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6661 if (spec->level > 1) {
6663 return rte_flow_error_set(error, ENOTSUP,
6664 RTE_FLOW_ERROR_TYPE_ITEM,
6666 "missing tunnel item");
6668 end_item = mlx5_find_end_item(tunnel_item);
6670 end_item = tunnel_item ? tunnel_item :
6671 mlx5_find_end_item(integrity_item);
6673 if (mask->l3_ok || mask->ipv4_csum_ok) {
6674 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6676 return rte_flow_error_set(error, EINVAL,
6677 RTE_FLOW_ERROR_TYPE_ITEM,
6679 "missing L3 protocol");
6681 if (mask->l4_ok || mask->l4_csum_ok) {
6682 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6684 return rte_flow_error_set(error, EINVAL,
6685 RTE_FLOW_ERROR_TYPE_ITEM,
6687 "missing L4 protocol");
6693 * Internal validation function. For validating both actions and items.
6696 * Pointer to the rte_eth_dev structure.
6698 * Pointer to the flow attributes.
6700 * Pointer to the list of items.
6701 * @param[in] actions
6702 * Pointer to the list of actions.
6703 * @param[in] external
6704 * This flow rule is created by request external to PMD.
6705 * @param[in] hairpin
6706 * Number of hairpin TX actions, 0 means classic flow.
6708 * Pointer to the error structure.
6711 * 0 on success, a negative errno value otherwise and rte_errno is set.
6714 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6715 const struct rte_flow_item items[],
6716 const struct rte_flow_action actions[],
6717 bool external, int hairpin, struct rte_flow_error *error)
6720 uint64_t action_flags = 0;
6721 uint64_t item_flags = 0;
6722 uint64_t last_item = 0;
6723 uint8_t next_protocol = 0xff;
6724 uint16_t ether_type = 0;
6726 uint8_t item_ipv6_proto = 0;
6727 int fdb_mirror_limit = 0;
6728 int modify_after_mirror = 0;
6729 const struct rte_flow_item *geneve_item = NULL;
6730 const struct rte_flow_item *gre_item = NULL;
6731 const struct rte_flow_item *gtp_item = NULL;
6732 const struct rte_flow_action_raw_decap *decap;
6733 const struct rte_flow_action_raw_encap *encap;
6734 const struct rte_flow_action_rss *rss = NULL;
6735 const struct rte_flow_action_rss *sample_rss = NULL;
6736 const struct rte_flow_action_count *sample_count = NULL;
6737 const struct rte_flow_item_tcp nic_tcp_mask = {
6740 .src_port = RTE_BE16(UINT16_MAX),
6741 .dst_port = RTE_BE16(UINT16_MAX),
6744 const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6747 "\xff\xff\xff\xff\xff\xff\xff\xff"
6748 "\xff\xff\xff\xff\xff\xff\xff\xff",
6750 "\xff\xff\xff\xff\xff\xff\xff\xff"
6751 "\xff\xff\xff\xff\xff\xff\xff\xff",
6752 .vtc_flow = RTE_BE32(0xffffffff),
6758 const struct rte_flow_item_ecpri nic_ecpri_mask = {
6762 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6766 .dummy[0] = 0xffffffff,
6769 struct mlx5_priv *priv = dev->data->dev_private;
6770 struct mlx5_dev_config *dev_conf = &priv->config;
6771 uint16_t queue_index = 0xFFFF;
6772 const struct rte_flow_item_vlan *vlan_m = NULL;
6773 uint32_t rw_act_num = 0;
6775 const struct mlx5_flow_tunnel *tunnel;
6776 enum mlx5_tof_rule_type tof_rule_type;
6777 struct flow_grp_info grp_info = {
6778 .external = !!external,
6779 .transfer = !!attr->transfer,
6780 .fdb_def_rule = !!priv->fdb_def_rule,
6781 .std_tbl_fix = true,
6783 const struct rte_eth_hairpin_conf *conf;
6784 const struct rte_flow_item *rule_items = items;
6785 const struct rte_flow_item *port_id_item = NULL;
6786 bool def_policy = false;
6790 tunnel = is_tunnel_offload_active(dev) ?
6791 mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6793 if (priv->representor)
6794 return rte_flow_error_set
6796 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6797 NULL, "decap not supported for VF representor");
6798 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6799 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6800 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6801 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6802 MLX5_FLOW_ACTION_DECAP;
6803 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6804 (dev, attr, tunnel, tof_rule_type);
6806 ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6809 is_root = (uint64_t)ret;
6810 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6811 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6812 int type = items->type;
6814 if (!mlx5_flow_os_item_supported(type))
6815 return rte_flow_error_set(error, ENOTSUP,
6816 RTE_FLOW_ERROR_TYPE_ITEM,
6817 NULL, "item not supported");
6819 case RTE_FLOW_ITEM_TYPE_VOID:
6821 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6822 ret = flow_dv_validate_item_port_id
6823 (dev, items, attr, item_flags, error);
6826 last_item = MLX5_FLOW_ITEM_PORT_ID;
6827 port_id_item = items;
6829 case RTE_FLOW_ITEM_TYPE_ETH:
6830 ret = mlx5_flow_validate_item_eth(items, item_flags,
6834 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6835 MLX5_FLOW_LAYER_OUTER_L2;
6836 if (items->mask != NULL && items->spec != NULL) {
6838 ((const struct rte_flow_item_eth *)
6841 ((const struct rte_flow_item_eth *)
6843 ether_type = rte_be_to_cpu_16(ether_type);
6848 case RTE_FLOW_ITEM_TYPE_VLAN:
6849 ret = flow_dv_validate_item_vlan(items, item_flags,
6853 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6854 MLX5_FLOW_LAYER_OUTER_VLAN;
6855 if (items->mask != NULL && items->spec != NULL) {
6857 ((const struct rte_flow_item_vlan *)
6858 items->spec)->inner_type;
6860 ((const struct rte_flow_item_vlan *)
6861 items->mask)->inner_type;
6862 ether_type = rte_be_to_cpu_16(ether_type);
6866 /* Store outer VLAN mask for of_push_vlan action. */
6868 vlan_m = items->mask;
6870 case RTE_FLOW_ITEM_TYPE_IPV4:
6871 mlx5_flow_tunnel_ip_check(items, next_protocol,
6872 &item_flags, &tunnel);
6873 ret = flow_dv_validate_item_ipv4(items, item_flags,
6874 last_item, ether_type,
6878 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6879 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6880 if (items->mask != NULL &&
6881 ((const struct rte_flow_item_ipv4 *)
6882 items->mask)->hdr.next_proto_id) {
6884 ((const struct rte_flow_item_ipv4 *)
6885 (items->spec))->hdr.next_proto_id;
6887 ((const struct rte_flow_item_ipv4 *)
6888 (items->mask))->hdr.next_proto_id;
6890 /* Reset for inner layer. */
6891 next_protocol = 0xff;
6894 case RTE_FLOW_ITEM_TYPE_IPV6:
6895 mlx5_flow_tunnel_ip_check(items, next_protocol,
6896 &item_flags, &tunnel);
6897 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6904 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6905 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6906 if (items->mask != NULL &&
6907 ((const struct rte_flow_item_ipv6 *)
6908 items->mask)->hdr.proto) {
6910 ((const struct rte_flow_item_ipv6 *)
6911 items->spec)->hdr.proto;
6913 ((const struct rte_flow_item_ipv6 *)
6914 items->spec)->hdr.proto;
6916 ((const struct rte_flow_item_ipv6 *)
6917 items->mask)->hdr.proto;
6919 /* Reset for inner layer. */
6920 next_protocol = 0xff;
6923 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6924 ret = flow_dv_validate_item_ipv6_frag_ext(items,
6929 last_item = tunnel ?
6930 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6931 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6932 if (items->mask != NULL &&
6933 ((const struct rte_flow_item_ipv6_frag_ext *)
6934 items->mask)->hdr.next_header) {
6936 ((const struct rte_flow_item_ipv6_frag_ext *)
6937 items->spec)->hdr.next_header;
6939 ((const struct rte_flow_item_ipv6_frag_ext *)
6940 items->mask)->hdr.next_header;
6942 /* Reset for inner layer. */
6943 next_protocol = 0xff;
6946 case RTE_FLOW_ITEM_TYPE_TCP:
6947 ret = mlx5_flow_validate_item_tcp
6954 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
6955 MLX5_FLOW_LAYER_OUTER_L4_TCP;
6957 case RTE_FLOW_ITEM_TYPE_UDP:
6958 ret = mlx5_flow_validate_item_udp(items, item_flags,
6963 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
6964 MLX5_FLOW_LAYER_OUTER_L4_UDP;
6966 case RTE_FLOW_ITEM_TYPE_GRE:
6967 ret = mlx5_flow_validate_item_gre(items, item_flags,
6968 next_protocol, error);
6972 last_item = MLX5_FLOW_LAYER_GRE;
6974 case RTE_FLOW_ITEM_TYPE_NVGRE:
6975 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
6980 last_item = MLX5_FLOW_LAYER_NVGRE;
6982 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
6983 ret = mlx5_flow_validate_item_gre_key
6984 (items, item_flags, gre_item, error);
6987 last_item = MLX5_FLOW_LAYER_GRE_KEY;
6989 case RTE_FLOW_ITEM_TYPE_VXLAN:
6990 ret = mlx5_flow_validate_item_vxlan(dev, items,
6995 last_item = MLX5_FLOW_LAYER_VXLAN;
6997 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
6998 ret = mlx5_flow_validate_item_vxlan_gpe(items,
7003 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7005 case RTE_FLOW_ITEM_TYPE_GENEVE:
7006 ret = mlx5_flow_validate_item_geneve(items,
7011 geneve_item = items;
7012 last_item = MLX5_FLOW_LAYER_GENEVE;
7014 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7015 ret = mlx5_flow_validate_item_geneve_opt(items,
7022 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7024 case RTE_FLOW_ITEM_TYPE_MPLS:
7025 ret = mlx5_flow_validate_item_mpls(dev, items,
7030 last_item = MLX5_FLOW_LAYER_MPLS;
7033 case RTE_FLOW_ITEM_TYPE_MARK:
7034 ret = flow_dv_validate_item_mark(dev, items, attr,
7038 last_item = MLX5_FLOW_ITEM_MARK;
7040 case RTE_FLOW_ITEM_TYPE_META:
7041 ret = flow_dv_validate_item_meta(dev, items, attr,
7045 last_item = MLX5_FLOW_ITEM_METADATA;
7047 case RTE_FLOW_ITEM_TYPE_ICMP:
7048 ret = mlx5_flow_validate_item_icmp(items, item_flags,
7053 last_item = MLX5_FLOW_LAYER_ICMP;
7055 case RTE_FLOW_ITEM_TYPE_ICMP6:
7056 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7061 item_ipv6_proto = IPPROTO_ICMPV6;
7062 last_item = MLX5_FLOW_LAYER_ICMP6;
7064 case RTE_FLOW_ITEM_TYPE_TAG:
7065 ret = flow_dv_validate_item_tag(dev, items,
7069 last_item = MLX5_FLOW_ITEM_TAG;
7071 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7072 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7074 case RTE_FLOW_ITEM_TYPE_GTP:
7075 ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7080 last_item = MLX5_FLOW_LAYER_GTP;
7082 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7083 ret = flow_dv_validate_item_gtp_psc(items, last_item,
7088 last_item = MLX5_FLOW_LAYER_GTP_PSC;
7090 case RTE_FLOW_ITEM_TYPE_ECPRI:
7091 /* Capacity will be checked in the translate stage. */
7092 ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7099 last_item = MLX5_FLOW_LAYER_ECPRI;
7101 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7102 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7103 return rte_flow_error_set
7105 RTE_FLOW_ERROR_TYPE_ITEM,
7106 NULL, "multiple integrity items not supported");
7107 ret = flow_dv_validate_item_integrity(dev, rule_items,
7111 last_item = MLX5_FLOW_ITEM_INTEGRITY;
7113 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7114 ret = flow_dv_validate_item_aso_ct(dev, items,
7115 &item_flags, error);
7119 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7120 /* tunnel offload item was processed before
7121 * list it here as a supported type
7125 return rte_flow_error_set(error, ENOTSUP,
7126 RTE_FLOW_ERROR_TYPE_ITEM,
7127 NULL, "item not supported");
7129 item_flags |= last_item;
7131 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7132 int type = actions->type;
7133 bool shared_count = false;
7135 if (!mlx5_flow_os_action_supported(type))
7136 return rte_flow_error_set(error, ENOTSUP,
7137 RTE_FLOW_ERROR_TYPE_ACTION,
7139 "action not supported");
7140 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7141 return rte_flow_error_set(error, ENOTSUP,
7142 RTE_FLOW_ERROR_TYPE_ACTION,
7143 actions, "too many actions");
7145 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7146 return rte_flow_error_set(error, ENOTSUP,
7147 RTE_FLOW_ERROR_TYPE_ACTION,
7148 NULL, "meter action with policy "
7149 "must be the last action");
7151 case RTE_FLOW_ACTION_TYPE_VOID:
7153 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7154 ret = flow_dv_validate_action_port_id(dev,
7161 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7164 case RTE_FLOW_ACTION_TYPE_FLAG:
7165 ret = flow_dv_validate_action_flag(dev, action_flags,
7169 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7170 /* Count all modify-header actions as one. */
7171 if (!(action_flags &
7172 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7174 action_flags |= MLX5_FLOW_ACTION_FLAG |
7175 MLX5_FLOW_ACTION_MARK_EXT;
7176 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7177 modify_after_mirror = 1;
7180 action_flags |= MLX5_FLOW_ACTION_FLAG;
7183 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7185 case RTE_FLOW_ACTION_TYPE_MARK:
7186 ret = flow_dv_validate_action_mark(dev, actions,
7191 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7192 /* Count all modify-header actions as one. */
7193 if (!(action_flags &
7194 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7196 action_flags |= MLX5_FLOW_ACTION_MARK |
7197 MLX5_FLOW_ACTION_MARK_EXT;
7198 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7199 modify_after_mirror = 1;
7201 action_flags |= MLX5_FLOW_ACTION_MARK;
7204 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7206 case RTE_FLOW_ACTION_TYPE_SET_META:
7207 ret = flow_dv_validate_action_set_meta(dev, actions,
7212 /* Count all modify-header actions as one action. */
7213 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7215 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7216 modify_after_mirror = 1;
7217 action_flags |= MLX5_FLOW_ACTION_SET_META;
7218 rw_act_num += MLX5_ACT_NUM_SET_META;
7220 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7221 ret = flow_dv_validate_action_set_tag(dev, actions,
7226 /* Count all modify-header actions as one action. */
7227 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7229 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7230 modify_after_mirror = 1;
7231 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7232 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7234 case RTE_FLOW_ACTION_TYPE_DROP:
7235 ret = mlx5_flow_validate_action_drop(action_flags,
7239 action_flags |= MLX5_FLOW_ACTION_DROP;
7242 case RTE_FLOW_ACTION_TYPE_QUEUE:
7243 ret = mlx5_flow_validate_action_queue(actions,
7248 queue_index = ((const struct rte_flow_action_queue *)
7249 (actions->conf))->index;
7250 action_flags |= MLX5_FLOW_ACTION_QUEUE;
7253 case RTE_FLOW_ACTION_TYPE_RSS:
7254 rss = actions->conf;
7255 ret = mlx5_flow_validate_action_rss(actions,
7261 if (rss && sample_rss &&
7262 (sample_rss->level != rss->level ||
7263 sample_rss->types != rss->types))
7264 return rte_flow_error_set(error, ENOTSUP,
7265 RTE_FLOW_ERROR_TYPE_ACTION,
7267 "Can't use the different RSS types "
7268 "or level in the same flow");
7269 if (rss != NULL && rss->queue_num)
7270 queue_index = rss->queue[0];
7271 action_flags |= MLX5_FLOW_ACTION_RSS;
7274 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7276 mlx5_flow_validate_action_default_miss(action_flags,
7280 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7283 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7284 case RTE_FLOW_ACTION_TYPE_COUNT:
7285 shared_count = is_shared_action_count(actions);
7286 ret = flow_dv_validate_action_count(dev, shared_count,
7291 action_flags |= MLX5_FLOW_ACTION_COUNT;
7294 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7295 if (flow_dv_validate_action_pop_vlan(dev,
7301 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7302 modify_after_mirror = 1;
7303 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7306 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7307 ret = flow_dv_validate_action_push_vlan(dev,
7314 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7315 modify_after_mirror = 1;
7316 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7319 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7320 ret = flow_dv_validate_action_set_vlan_pcp
7321 (action_flags, actions, error);
7324 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7325 modify_after_mirror = 1;
7326 /* Count PCP with push_vlan command. */
7327 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7329 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7330 ret = flow_dv_validate_action_set_vlan_vid
7331 (item_flags, action_flags,
7335 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7336 modify_after_mirror = 1;
7337 /* Count VID with push_vlan command. */
7338 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7339 rw_act_num += MLX5_ACT_NUM_MDF_VID;
7341 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7342 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7343 ret = flow_dv_validate_action_l2_encap(dev,
7349 action_flags |= MLX5_FLOW_ACTION_ENCAP;
7352 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7353 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7354 ret = flow_dv_validate_action_decap(dev, action_flags,
7355 actions, item_flags,
7359 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7360 modify_after_mirror = 1;
7361 action_flags |= MLX5_FLOW_ACTION_DECAP;
7364 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7365 ret = flow_dv_validate_action_raw_encap_decap
7366 (dev, NULL, actions->conf, attr, &action_flags,
7367 &actions_n, actions, item_flags, error);
7371 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7372 decap = actions->conf;
7373 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7375 if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7379 encap = actions->conf;
7381 ret = flow_dv_validate_action_raw_encap_decap
7383 decap ? decap : &empty_decap, encap,
7384 attr, &action_flags, &actions_n,
7385 actions, item_flags, error);
7388 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7389 (action_flags & MLX5_FLOW_ACTION_DECAP))
7390 modify_after_mirror = 1;
7392 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7393 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7394 ret = flow_dv_validate_action_modify_mac(action_flags,
7400 /* Count all modify-header actions as one action. */
7401 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7403 action_flags |= actions->type ==
7404 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7405 MLX5_FLOW_ACTION_SET_MAC_SRC :
7406 MLX5_FLOW_ACTION_SET_MAC_DST;
7407 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7408 modify_after_mirror = 1;
7410 * Even if the source and destination MAC addresses have
7411 * overlap in the header with 4B alignment, the convert
7412 * function will handle them separately and 4 SW actions
7413 * will be created. And 2 actions will be added each
7414 * time no matter how many bytes of address will be set.
7416 rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7418 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7419 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7420 ret = flow_dv_validate_action_modify_ipv4(action_flags,
7426 /* Count all modify-header actions as one action. */
7427 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7429 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7430 modify_after_mirror = 1;
7431 action_flags |= actions->type ==
7432 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7433 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7434 MLX5_FLOW_ACTION_SET_IPV4_DST;
7435 rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7437 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7438 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7439 ret = flow_dv_validate_action_modify_ipv6(action_flags,
7445 if (item_ipv6_proto == IPPROTO_ICMPV6)
7446 return rte_flow_error_set(error, ENOTSUP,
7447 RTE_FLOW_ERROR_TYPE_ACTION,
7449 "Can't change header "
7450 "with ICMPv6 proto");
7451 /* Count all modify-header actions as one action. */
7452 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7454 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7455 modify_after_mirror = 1;
7456 action_flags |= actions->type ==
7457 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7458 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7459 MLX5_FLOW_ACTION_SET_IPV6_DST;
7460 rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7462 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7463 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7464 ret = flow_dv_validate_action_modify_tp(action_flags,
7470 /* Count all modify-header actions as one action. */
7471 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7473 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7474 modify_after_mirror = 1;
7475 action_flags |= actions->type ==
7476 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7477 MLX5_FLOW_ACTION_SET_TP_SRC :
7478 MLX5_FLOW_ACTION_SET_TP_DST;
7479 rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7481 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7482 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7483 ret = flow_dv_validate_action_modify_ttl(action_flags,
7489 /* Count all modify-header actions as one action. */
7490 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7492 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7493 modify_after_mirror = 1;
7494 action_flags |= actions->type ==
7495 RTE_FLOW_ACTION_TYPE_SET_TTL ?
7496 MLX5_FLOW_ACTION_SET_TTL :
7497 MLX5_FLOW_ACTION_DEC_TTL;
7498 rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7500 case RTE_FLOW_ACTION_TYPE_JUMP:
7501 ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7507 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7509 return rte_flow_error_set(error, EINVAL,
7510 RTE_FLOW_ERROR_TYPE_ACTION,
7512 "sample and jump action combination is not supported");
7514 action_flags |= MLX5_FLOW_ACTION_JUMP;
7516 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7517 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7518 ret = flow_dv_validate_action_modify_tcp_seq
7525 /* Count all modify-header actions as one action. */
7526 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7528 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7529 modify_after_mirror = 1;
7530 action_flags |= actions->type ==
7531 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7532 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7533 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7534 rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7536 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7537 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7538 ret = flow_dv_validate_action_modify_tcp_ack
7545 /* Count all modify-header actions as one action. */
7546 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7548 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7549 modify_after_mirror = 1;
7550 action_flags |= actions->type ==
7551 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7552 MLX5_FLOW_ACTION_INC_TCP_ACK :
7553 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7554 rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7556 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7558 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7559 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7560 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7562 case RTE_FLOW_ACTION_TYPE_METER:
7563 ret = mlx5_flow_validate_action_meter(dev,
7571 action_flags |= MLX5_FLOW_ACTION_METER;
7574 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7576 /* Meter action will add one more TAG action. */
7577 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7579 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7580 if (!attr->transfer && !attr->group)
7581 return rte_flow_error_set(error, ENOTSUP,
7582 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7584 "Shared ASO age action is not supported for group 0");
7585 if (action_flags & MLX5_FLOW_ACTION_AGE)
7586 return rte_flow_error_set
7588 RTE_FLOW_ERROR_TYPE_ACTION,
7590 "duplicate age actions set");
7591 action_flags |= MLX5_FLOW_ACTION_AGE;
7594 case RTE_FLOW_ACTION_TYPE_AGE:
7595 ret = flow_dv_validate_action_age(action_flags,
7601 * Validate the regular AGE action (using counter)
7602 * mutual exclusion with share counter actions.
7604 if (!priv->sh->flow_hit_aso_en) {
7606 return rte_flow_error_set
7608 RTE_FLOW_ERROR_TYPE_ACTION,
7610 "old age and shared count combination is not supported");
7612 return rte_flow_error_set
7614 RTE_FLOW_ERROR_TYPE_ACTION,
7616 "old age action and count must be in the same sub flow");
7618 action_flags |= MLX5_FLOW_ACTION_AGE;
7621 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7622 ret = flow_dv_validate_action_modify_ipv4_dscp
7629 /* Count all modify-header actions as one action. */
7630 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7632 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7633 modify_after_mirror = 1;
7634 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7635 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7637 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7638 ret = flow_dv_validate_action_modify_ipv6_dscp
7645 /* Count all modify-header actions as one action. */
7646 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7648 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7649 modify_after_mirror = 1;
7650 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7651 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7653 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7654 ret = flow_dv_validate_action_sample(&action_flags,
7663 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7666 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7667 ret = flow_dv_validate_action_modify_field(dev,
7674 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7675 modify_after_mirror = 1;
7676 /* Count all modify-header actions as one action. */
7677 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7679 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7682 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7683 ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7688 action_flags |= MLX5_FLOW_ACTION_CT;
7690 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7691 /* tunnel offload action was processed before
7692 * list it here as a supported type
7696 return rte_flow_error_set(error, ENOTSUP,
7697 RTE_FLOW_ERROR_TYPE_ACTION,
7699 "action not supported");
7703 * Validate actions in flow rules
7704 * - Explicit decap action is prohibited by the tunnel offload API.
7705 * - Drop action in tunnel steer rule is prohibited by the API.
7706 * - Application cannot use MARK action because it's value can mask
7707 * tunnel default miss nitification.
7708 * - JUMP in tunnel match rule has no support in current PMD
7710 * - TAG & META are reserved for future uses.
7712 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7713 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP |
7714 MLX5_FLOW_ACTION_MARK |
7715 MLX5_FLOW_ACTION_SET_TAG |
7716 MLX5_FLOW_ACTION_SET_META |
7717 MLX5_FLOW_ACTION_DROP;
7719 if (action_flags & bad_actions_mask)
7720 return rte_flow_error_set
7722 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7723 "Invalid RTE action in tunnel "
7725 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7726 return rte_flow_error_set
7728 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7729 "tunnel set decap rule must terminate "
7732 return rte_flow_error_set
7734 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7735 "tunnel flows for ingress traffic only");
7737 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7738 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP |
7739 MLX5_FLOW_ACTION_MARK |
7740 MLX5_FLOW_ACTION_SET_TAG |
7741 MLX5_FLOW_ACTION_SET_META;
7743 if (action_flags & bad_actions_mask)
7744 return rte_flow_error_set
7746 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7747 "Invalid RTE action in tunnel "
7751 * Validate the drop action mutual exclusion with other actions.
7752 * Drop action is mutually-exclusive with any other action, except for
7754 * Drop action compatibility with tunnel offload was already validated.
7756 if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7757 MLX5_FLOW_ACTION_TUNNEL_MATCH));
7758 else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7759 (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7760 return rte_flow_error_set(error, EINVAL,
7761 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7762 "Drop action is mutually-exclusive "
7763 "with any other action, except for "
7765 /* Eswitch has few restrictions on using items and actions */
7766 if (attr->transfer) {
7767 if (!mlx5_flow_ext_mreg_supported(dev) &&
7768 action_flags & MLX5_FLOW_ACTION_FLAG)
7769 return rte_flow_error_set(error, ENOTSUP,
7770 RTE_FLOW_ERROR_TYPE_ACTION,
7772 "unsupported action FLAG");
7773 if (!mlx5_flow_ext_mreg_supported(dev) &&
7774 action_flags & MLX5_FLOW_ACTION_MARK)
7775 return rte_flow_error_set(error, ENOTSUP,
7776 RTE_FLOW_ERROR_TYPE_ACTION,
7778 "unsupported action MARK");
7779 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7780 return rte_flow_error_set(error, ENOTSUP,
7781 RTE_FLOW_ERROR_TYPE_ACTION,
7783 "unsupported action QUEUE");
7784 if (action_flags & MLX5_FLOW_ACTION_RSS)
7785 return rte_flow_error_set(error, ENOTSUP,
7786 RTE_FLOW_ERROR_TYPE_ACTION,
7788 "unsupported action RSS");
7789 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7790 return rte_flow_error_set(error, EINVAL,
7791 RTE_FLOW_ERROR_TYPE_ACTION,
7793 "no fate action is found");
7795 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7796 return rte_flow_error_set(error, EINVAL,
7797 RTE_FLOW_ERROR_TYPE_ACTION,
7799 "no fate action is found");
7802 * Continue validation for Xcap and VLAN actions.
7803 * If hairpin is working in explicit TX rule mode, there is no actions
7804 * splitting and the validation of hairpin ingress flow should be the
7805 * same as other standard flows.
7807 if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7808 MLX5_FLOW_VLAN_ACTIONS)) &&
7809 (queue_index == 0xFFFF ||
7810 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7811 ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7812 conf->tx_explicit != 0))) {
7813 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7814 MLX5_FLOW_XCAP_ACTIONS)
7815 return rte_flow_error_set(error, ENOTSUP,
7816 RTE_FLOW_ERROR_TYPE_ACTION,
7817 NULL, "encap and decap "
7818 "combination aren't supported");
7819 if (!attr->transfer && attr->ingress) {
7820 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7821 return rte_flow_error_set
7823 RTE_FLOW_ERROR_TYPE_ACTION,
7824 NULL, "encap is not supported"
7825 " for ingress traffic");
7826 else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7827 return rte_flow_error_set
7829 RTE_FLOW_ERROR_TYPE_ACTION,
7830 NULL, "push VLAN action not "
7831 "supported for ingress");
7832 else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7833 MLX5_FLOW_VLAN_ACTIONS)
7834 return rte_flow_error_set
7836 RTE_FLOW_ERROR_TYPE_ACTION,
7837 NULL, "no support for "
7838 "multiple VLAN actions");
7841 if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7842 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7843 ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7845 return rte_flow_error_set
7847 RTE_FLOW_ERROR_TYPE_ACTION,
7848 NULL, "fate action not supported for "
7849 "meter with policy");
7851 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7852 return rte_flow_error_set
7854 RTE_FLOW_ERROR_TYPE_ACTION,
7855 NULL, "modify header action in egress "
7856 "cannot be done before meter action");
7857 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7858 return rte_flow_error_set
7860 RTE_FLOW_ERROR_TYPE_ACTION,
7861 NULL, "encap action in egress "
7862 "cannot be done before meter action");
7863 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7864 return rte_flow_error_set
7866 RTE_FLOW_ERROR_TYPE_ACTION,
7867 NULL, "push vlan action in egress "
7868 "cannot be done before meter action");
7872 * Hairpin flow will add one more TAG action in TX implicit mode.
7873 * In TX explicit mode, there will be no hairpin flow ID.
7876 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7877 /* extra metadata enabled: one more TAG action will be add. */
7878 if (dev_conf->dv_flow_en &&
7879 dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7880 mlx5_flow_ext_mreg_supported(dev))
7881 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7883 flow_dv_modify_hdr_action_max(dev, is_root)) {
7884 return rte_flow_error_set(error, ENOTSUP,
7885 RTE_FLOW_ERROR_TYPE_ACTION,
7886 NULL, "too many header modify"
7887 " actions to support");
7889 /* Eswitch egress mirror and modify flow has limitation on CX5 */
7890 if (fdb_mirror_limit && modify_after_mirror)
7891 return rte_flow_error_set(error, EINVAL,
7892 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7893 "sample before modify action is not supported");
7898 * Internal preparation function. Allocates the DV flow size,
7899 * this size is constant.
7902 * Pointer to the rte_eth_dev structure.
7904 * Pointer to the flow attributes.
7906 * Pointer to the list of items.
7907 * @param[in] actions
7908 * Pointer to the list of actions.
7910 * Pointer to the error structure.
7913 * Pointer to mlx5_flow object on success,
7914 * otherwise NULL and rte_errno is set.
7916 static struct mlx5_flow *
7917 flow_dv_prepare(struct rte_eth_dev *dev,
7918 const struct rte_flow_attr *attr __rte_unused,
7919 const struct rte_flow_item items[] __rte_unused,
7920 const struct rte_flow_action actions[] __rte_unused,
7921 struct rte_flow_error *error)
7923 uint32_t handle_idx = 0;
7924 struct mlx5_flow *dev_flow;
7925 struct mlx5_flow_handle *dev_handle;
7926 struct mlx5_priv *priv = dev->data->dev_private;
7927 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
7930 wks->skip_matcher_reg = 0;
7932 wks->final_policy = NULL;
7933 /* In case of corrupting the memory. */
7934 if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
7935 rte_flow_error_set(error, ENOSPC,
7936 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7937 "not free temporary device flow");
7940 dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7943 rte_flow_error_set(error, ENOMEM,
7944 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7945 "not enough memory to create flow handle");
7948 MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
7949 dev_flow = &wks->flows[wks->flow_idx++];
7950 memset(dev_flow, 0, sizeof(*dev_flow));
7951 dev_flow->handle = dev_handle;
7952 dev_flow->handle_idx = handle_idx;
7953 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
7954 dev_flow->ingress = attr->ingress;
7955 dev_flow->dv.transfer = attr->transfer;
7959 #ifdef RTE_LIBRTE_MLX5_DEBUG
7961 * Sanity check for match mask and value. Similar to check_valid_spec() in
7962 * kernel driver. If unmasked bit is present in value, it returns failure.
7965 * pointer to match mask buffer.
7966 * @param match_value
7967 * pointer to match value buffer.
7970 * 0 if valid, -EINVAL otherwise.
7973 flow_dv_check_valid_spec(void *match_mask, void *match_value)
7975 uint8_t *m = match_mask;
7976 uint8_t *v = match_value;
7979 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
7982 "match_value differs from match_criteria"
7983 " %p[%u] != %p[%u]",
7984 match_value, i, match_mask, i);
7993 * Add match of ip_version.
7997 * @param[in] headers_v
7998 * Values header pointer.
7999 * @param[in] headers_m
8000 * Masks header pointer.
8001 * @param[in] ip_version
8002 * The IP version to set.
8005 flow_dv_set_match_ip_version(uint32_t group,
8011 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8013 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8015 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8016 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8017 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8021 * Add Ethernet item to matcher and to the value.
8023 * @param[in, out] matcher
8025 * @param[in, out] key
8026 * Flow matcher value.
8028 * Flow pattern to translate.
8030 * Item is inner pattern.
8033 flow_dv_translate_item_eth(void *matcher, void *key,
8034 const struct rte_flow_item *item, int inner,
8037 const struct rte_flow_item_eth *eth_m = item->mask;
8038 const struct rte_flow_item_eth *eth_v = item->spec;
8039 const struct rte_flow_item_eth nic_mask = {
8040 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8041 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8042 .type = RTE_BE16(0xffff),
8055 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8057 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8059 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8061 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8063 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8064 ð_m->dst, sizeof(eth_m->dst));
8065 /* The value must be in the range of the mask. */
8066 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8067 for (i = 0; i < sizeof(eth_m->dst); ++i)
8068 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8069 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8070 ð_m->src, sizeof(eth_m->src));
8071 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8072 /* The value must be in the range of the mask. */
8073 for (i = 0; i < sizeof(eth_m->dst); ++i)
8074 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8076 * HW supports match on one Ethertype, the Ethertype following the last
8077 * VLAN tag of the packet (see PRM).
8078 * Set match on ethertype only if ETH header is not followed by VLAN.
8079 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8080 * ethertype, and use ip_version field instead.
8081 * eCPRI over Ether layer will use type value 0xAEFE.
8083 if (eth_m->type == 0xFFFF) {
8084 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8085 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8086 switch (eth_v->type) {
8087 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8088 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8090 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8091 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8092 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8094 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8095 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8097 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8098 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8104 if (eth_m->has_vlan) {
8105 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8106 if (eth_v->has_vlan) {
8108 * Here, when also has_more_vlan field in VLAN item is
8109 * not set, only single-tagged packets will be matched.
8111 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8115 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8116 rte_be_to_cpu_16(eth_m->type));
8117 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8118 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8122 * Add VLAN item to matcher and to the value.
8124 * @param[in, out] dev_flow
8126 * @param[in, out] matcher
8128 * @param[in, out] key
8129 * Flow matcher value.
8131 * Flow pattern to translate.
8133 * Item is inner pattern.
8136 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8137 void *matcher, void *key,
8138 const struct rte_flow_item *item,
8139 int inner, uint32_t group)
8141 const struct rte_flow_item_vlan *vlan_m = item->mask;
8142 const struct rte_flow_item_vlan *vlan_v = item->spec;
8149 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8151 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8153 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8155 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8157 * This is workaround, masks are not supported,
8158 * and pre-validated.
8161 dev_flow->handle->vf_vlan.tag =
8162 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8165 * When VLAN item exists in flow, mark packet as tagged,
8166 * even if TCI is not specified.
8168 if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8169 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8170 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8175 vlan_m = &rte_flow_item_vlan_mask;
8176 tci_m = rte_be_to_cpu_16(vlan_m->tci);
8177 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8178 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8179 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8180 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8181 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8182 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8183 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8185 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8186 * ethertype, and use ip_version field instead.
8188 if (vlan_m->inner_type == 0xFFFF) {
8189 switch (vlan_v->inner_type) {
8190 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8191 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8192 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8193 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8195 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8196 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8198 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8199 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8205 if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8206 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8207 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8208 /* Only one vlan_tag bit can be set. */
8209 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8212 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8213 rte_be_to_cpu_16(vlan_m->inner_type));
8214 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8215 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8219 * Add IPV4 item to matcher and to the value.
8221 * @param[in, out] matcher
8223 * @param[in, out] key
8224 * Flow matcher value.
8226 * Flow pattern to translate.
8228 * Item is inner pattern.
8230 * The group to insert the rule.
8233 flow_dv_translate_item_ipv4(void *matcher, void *key,
8234 const struct rte_flow_item *item,
8235 int inner, uint32_t group)
8237 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8238 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8239 const struct rte_flow_item_ipv4 nic_mask = {
8241 .src_addr = RTE_BE32(0xffffffff),
8242 .dst_addr = RTE_BE32(0xffffffff),
8243 .type_of_service = 0xff,
8244 .next_proto_id = 0xff,
8245 .time_to_live = 0xff,
8255 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8257 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8259 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8261 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8263 flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8268 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8269 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8270 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8271 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8272 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8273 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8274 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8275 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8276 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8277 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8278 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8279 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8280 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8281 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8282 ipv4_m->hdr.type_of_service);
8283 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8284 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8285 ipv4_m->hdr.type_of_service >> 2);
8286 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8287 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8288 ipv4_m->hdr.next_proto_id);
8289 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8290 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8291 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8292 ipv4_m->hdr.time_to_live);
8293 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8294 ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8295 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8296 !!(ipv4_m->hdr.fragment_offset));
8297 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8298 !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8302 * Add IPV6 item to matcher and to the value.
8304 * @param[in, out] matcher
8306 * @param[in, out] key
8307 * Flow matcher value.
8309 * Flow pattern to translate.
8311 * Item is inner pattern.
8313 * The group to insert the rule.
8316 flow_dv_translate_item_ipv6(void *matcher, void *key,
8317 const struct rte_flow_item *item,
8318 int inner, uint32_t group)
8320 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8321 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8322 const struct rte_flow_item_ipv6 nic_mask = {
8325 "\xff\xff\xff\xff\xff\xff\xff\xff"
8326 "\xff\xff\xff\xff\xff\xff\xff\xff",
8328 "\xff\xff\xff\xff\xff\xff\xff\xff"
8329 "\xff\xff\xff\xff\xff\xff\xff\xff",
8330 .vtc_flow = RTE_BE32(0xffffffff),
8337 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8338 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8347 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8349 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8351 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8353 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8355 flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8360 size = sizeof(ipv6_m->hdr.dst_addr);
8361 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8362 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8363 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8364 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8365 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8366 for (i = 0; i < size; ++i)
8367 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8368 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8369 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8370 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8371 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8372 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8373 for (i = 0; i < size; ++i)
8374 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8376 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8377 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8378 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8379 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8380 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8381 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8384 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8386 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8389 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8391 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8395 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8397 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8398 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8400 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8401 ipv6_m->hdr.hop_limits);
8402 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8403 ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8404 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8405 !!(ipv6_m->has_frag_ext));
8406 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8407 !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8411 * Add IPV6 fragment extension item to matcher and to the value.
8413 * @param[in, out] matcher
8415 * @param[in, out] key
8416 * Flow matcher value.
8418 * Flow pattern to translate.
8420 * Item is inner pattern.
8423 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8424 const struct rte_flow_item *item,
8427 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8428 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8429 const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8431 .next_header = 0xff,
8432 .frag_data = RTE_BE16(0xffff),
8439 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8441 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8443 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8445 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8447 /* IPv6 fragment extension item exists, so packet is IP fragment. */
8448 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8449 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8450 if (!ipv6_frag_ext_v)
8452 if (!ipv6_frag_ext_m)
8453 ipv6_frag_ext_m = &nic_mask;
8454 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8455 ipv6_frag_ext_m->hdr.next_header);
8456 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8457 ipv6_frag_ext_v->hdr.next_header &
8458 ipv6_frag_ext_m->hdr.next_header);
8462 * Add TCP item to matcher and to the value.
8464 * @param[in, out] matcher
8466 * @param[in, out] key
8467 * Flow matcher value.
8469 * Flow pattern to translate.
8471 * Item is inner pattern.
8474 flow_dv_translate_item_tcp(void *matcher, void *key,
8475 const struct rte_flow_item *item,
8478 const struct rte_flow_item_tcp *tcp_m = item->mask;
8479 const struct rte_flow_item_tcp *tcp_v = item->spec;
8484 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8486 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8488 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8490 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8492 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8493 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8497 tcp_m = &rte_flow_item_tcp_mask;
8498 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8499 rte_be_to_cpu_16(tcp_m->hdr.src_port));
8500 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8501 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8502 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8503 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8504 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8505 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8506 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8507 tcp_m->hdr.tcp_flags);
8508 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8509 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8513 * Add UDP item to matcher and to the value.
8515 * @param[in, out] matcher
8517 * @param[in, out] key
8518 * Flow matcher value.
8520 * Flow pattern to translate.
8522 * Item is inner pattern.
8525 flow_dv_translate_item_udp(void *matcher, void *key,
8526 const struct rte_flow_item *item,
8529 const struct rte_flow_item_udp *udp_m = item->mask;
8530 const struct rte_flow_item_udp *udp_v = item->spec;
8535 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8537 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8539 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8541 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8543 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8544 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8548 udp_m = &rte_flow_item_udp_mask;
8549 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8550 rte_be_to_cpu_16(udp_m->hdr.src_port));
8551 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8552 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8553 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8554 rte_be_to_cpu_16(udp_m->hdr.dst_port));
8555 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8556 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8560 * Add GRE optional Key item to matcher and to the value.
8562 * @param[in, out] matcher
8564 * @param[in, out] key
8565 * Flow matcher value.
8567 * Flow pattern to translate.
8569 * Item is inner pattern.
8572 flow_dv_translate_item_gre_key(void *matcher, void *key,
8573 const struct rte_flow_item *item)
8575 const rte_be32_t *key_m = item->mask;
8576 const rte_be32_t *key_v = item->spec;
8577 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8578 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8579 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8581 /* GRE K bit must be on and should already be validated */
8582 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8583 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8587 key_m = &gre_key_default_mask;
8588 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8589 rte_be_to_cpu_32(*key_m) >> 8);
8590 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8591 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8592 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8593 rte_be_to_cpu_32(*key_m) & 0xFF);
8594 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8595 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8599 * Add GRE item to matcher and to the value.
8601 * @param[in, out] matcher
8603 * @param[in, out] key
8604 * Flow matcher value.
8606 * Flow pattern to translate.
8608 * Item is inner pattern.
8611 flow_dv_translate_item_gre(void *matcher, void *key,
8612 const struct rte_flow_item *item,
8615 const struct rte_flow_item_gre *gre_m = item->mask;
8616 const struct rte_flow_item_gre *gre_v = item->spec;
8619 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8620 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8627 uint16_t s_present:1;
8628 uint16_t k_present:1;
8629 uint16_t rsvd_bit1:1;
8630 uint16_t c_present:1;
8634 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8637 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8639 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8641 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8643 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8645 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8646 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8650 gre_m = &rte_flow_item_gre_mask;
8651 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8652 rte_be_to_cpu_16(gre_m->protocol));
8653 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8654 rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8655 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8656 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8657 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8658 gre_crks_rsvd0_ver_m.c_present);
8659 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8660 gre_crks_rsvd0_ver_v.c_present &
8661 gre_crks_rsvd0_ver_m.c_present);
8662 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8663 gre_crks_rsvd0_ver_m.k_present);
8664 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8665 gre_crks_rsvd0_ver_v.k_present &
8666 gre_crks_rsvd0_ver_m.k_present);
8667 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8668 gre_crks_rsvd0_ver_m.s_present);
8669 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8670 gre_crks_rsvd0_ver_v.s_present &
8671 gre_crks_rsvd0_ver_m.s_present);
8675 * Add NVGRE item to matcher and to the value.
8677 * @param[in, out] matcher
8679 * @param[in, out] key
8680 * Flow matcher value.
8682 * Flow pattern to translate.
8684 * Item is inner pattern.
8687 flow_dv_translate_item_nvgre(void *matcher, void *key,
8688 const struct rte_flow_item *item,
8691 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8692 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8693 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8694 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8695 const char *tni_flow_id_m;
8696 const char *tni_flow_id_v;
8702 /* For NVGRE, GRE header fields must be set with defined values. */
8703 const struct rte_flow_item_gre gre_spec = {
8704 .c_rsvd0_ver = RTE_BE16(0x2000),
8705 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8707 const struct rte_flow_item_gre gre_mask = {
8708 .c_rsvd0_ver = RTE_BE16(0xB000),
8709 .protocol = RTE_BE16(UINT16_MAX),
8711 const struct rte_flow_item gre_item = {
8716 flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8720 nvgre_m = &rte_flow_item_nvgre_mask;
8721 tni_flow_id_m = (const char *)nvgre_m->tni;
8722 tni_flow_id_v = (const char *)nvgre_v->tni;
8723 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8724 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8725 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8726 memcpy(gre_key_m, tni_flow_id_m, size);
8727 for (i = 0; i < size; ++i)
8728 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8732 * Add VXLAN item to matcher and to the value.
8735 * Pointer to the Ethernet device structure.
8737 * Flow rule attributes.
8738 * @param[in, out] matcher
8740 * @param[in, out] key
8741 * Flow matcher value.
8743 * Flow pattern to translate.
8745 * Item is inner pattern.
8748 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8749 const struct rte_flow_attr *attr,
8750 void *matcher, void *key,
8751 const struct rte_flow_item *item,
8754 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8755 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8760 uint32_t *tunnel_header_v;
8761 uint32_t *tunnel_header_m;
8763 struct mlx5_priv *priv = dev->data->dev_private;
8764 const struct rte_flow_item_vxlan nic_mask = {
8765 .vni = "\xff\xff\xff",
8770 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8772 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8774 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8776 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8778 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8779 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8780 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8781 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8782 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8787 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8788 (attr->group && !priv->sh->misc5_cap))
8789 vxlan_m = &rte_flow_item_vxlan_mask;
8791 vxlan_m = &nic_mask;
8793 if ((!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8794 ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8801 misc_m = MLX5_ADDR_OF(fte_match_param,
8802 matcher, misc_parameters);
8803 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8804 size = sizeof(vxlan_m->vni);
8805 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8806 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8807 memcpy(vni_m, vxlan_m->vni, size);
8808 for (i = 0; i < size; ++i)
8809 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8812 misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8813 misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8814 tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8817 tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8820 *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8821 (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8822 (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8823 if (*tunnel_header_v)
8824 *tunnel_header_m = vxlan_m->vni[0] |
8825 vxlan_m->vni[1] << 8 |
8826 vxlan_m->vni[2] << 16;
8828 *tunnel_header_m = 0x0;
8829 *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8830 if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8831 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8835 * Add VXLAN-GPE item to matcher and to the value.
8837 * @param[in, out] matcher
8839 * @param[in, out] key
8840 * Flow matcher value.
8842 * Flow pattern to translate.
8844 * Item is inner pattern.
8848 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8849 const struct rte_flow_item *item, int inner)
8851 const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8852 const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8856 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8858 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8864 uint8_t flags_m = 0xff;
8865 uint8_t flags_v = 0xc;
8868 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8870 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8872 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8874 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8876 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8877 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8878 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8879 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8880 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8885 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8886 size = sizeof(vxlan_m->vni);
8887 vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8888 vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8889 memcpy(vni_m, vxlan_m->vni, size);
8890 for (i = 0; i < size; ++i)
8891 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8892 if (vxlan_m->flags) {
8893 flags_m = vxlan_m->flags;
8894 flags_v = vxlan_v->flags;
8896 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8897 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8898 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8900 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8905 * Add Geneve item to matcher and to the value.
8907 * @param[in, out] matcher
8909 * @param[in, out] key
8910 * Flow matcher value.
8912 * Flow pattern to translate.
8914 * Item is inner pattern.
8918 flow_dv_translate_item_geneve(void *matcher, void *key,
8919 const struct rte_flow_item *item, int inner)
8921 const struct rte_flow_item_geneve *geneve_m = item->mask;
8922 const struct rte_flow_item_geneve *geneve_v = item->spec;
8925 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8926 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8935 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8937 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8939 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8941 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8943 dport = MLX5_UDP_PORT_GENEVE;
8944 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8945 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8946 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8951 geneve_m = &rte_flow_item_geneve_mask;
8952 size = sizeof(geneve_m->vni);
8953 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
8954 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
8955 memcpy(vni_m, geneve_m->vni, size);
8956 for (i = 0; i < size; ++i)
8957 vni_v[i] = vni_m[i] & geneve_v->vni[i];
8958 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
8959 rte_be_to_cpu_16(geneve_m->protocol));
8960 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
8961 rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
8962 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
8963 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
8964 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
8965 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8966 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
8967 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8968 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
8969 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8970 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
8971 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
8972 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8976 * Create Geneve TLV option resource.
8978 * @param dev[in, out]
8979 * Pointer to rte_eth_dev structure.
8980 * @param[in, out] tag_be24
8981 * Tag value in big endian then R-shift 8.
8982 * @parm[in, out] dev_flow
8983 * Pointer to the dev_flow.
8985 * pointer to error structure.
8988 * 0 on success otherwise -errno and errno is set.
8992 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
8993 const struct rte_flow_item *item,
8994 struct rte_flow_error *error)
8996 struct mlx5_priv *priv = dev->data->dev_private;
8997 struct mlx5_dev_ctx_shared *sh = priv->sh;
8998 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
8999 sh->geneve_tlv_option_resource;
9000 struct mlx5_devx_obj *obj;
9001 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9006 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9007 if (geneve_opt_resource != NULL) {
9008 if (geneve_opt_resource->option_class ==
9009 geneve_opt_v->option_class &&
9010 geneve_opt_resource->option_type ==
9011 geneve_opt_v->option_type &&
9012 geneve_opt_resource->length ==
9013 geneve_opt_v->option_len) {
9014 /* We already have GENVE TLV option obj allocated. */
9015 __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9018 ret = rte_flow_error_set(error, ENOMEM,
9019 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9020 "Only one GENEVE TLV option supported");
9024 /* Create a GENEVE TLV object and resource. */
9025 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
9026 geneve_opt_v->option_class,
9027 geneve_opt_v->option_type,
9028 geneve_opt_v->option_len);
9030 ret = rte_flow_error_set(error, ENODATA,
9031 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9032 "Failed to create GENEVE TLV Devx object");
9035 sh->geneve_tlv_option_resource =
9036 mlx5_malloc(MLX5_MEM_ZERO,
9037 sizeof(*geneve_opt_resource),
9039 if (!sh->geneve_tlv_option_resource) {
9040 claim_zero(mlx5_devx_cmd_destroy(obj));
9041 ret = rte_flow_error_set(error, ENOMEM,
9042 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9043 "GENEVE TLV object memory allocation failed");
9046 geneve_opt_resource = sh->geneve_tlv_option_resource;
9047 geneve_opt_resource->obj = obj;
9048 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9049 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9050 geneve_opt_resource->length = geneve_opt_v->option_len;
9051 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9055 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9060 * Add Geneve TLV option item to matcher.
9062 * @param[in, out] dev
9063 * Pointer to rte_eth_dev structure.
9064 * @param[in, out] matcher
9066 * @param[in, out] key
9067 * Flow matcher value.
9069 * Flow pattern to translate.
9071 * Pointer to error structure.
9074 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9075 void *key, const struct rte_flow_item *item,
9076 struct rte_flow_error *error)
9078 const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9079 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9080 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9081 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9082 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9084 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9085 rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9091 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9092 ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9095 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9099 * Set the option length in GENEVE header if not requested.
9100 * The GENEVE TLV option length is expressed by the option length field
9101 * in the GENEVE header.
9102 * If the option length was not requested but the GENEVE TLV option item
9103 * is present we set the option length field implicitly.
9105 if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9106 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9107 MLX5_GENEVE_OPTLEN_MASK);
9108 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9109 geneve_opt_v->option_len + 1);
9112 if (geneve_opt_v->data) {
9113 memcpy(&opt_data_key, geneve_opt_v->data,
9114 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9115 sizeof(opt_data_key)));
9116 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9117 sizeof(opt_data_key));
9118 memcpy(&opt_data_mask, geneve_opt_m->data,
9119 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9120 sizeof(opt_data_mask)));
9121 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9122 sizeof(opt_data_mask));
9123 MLX5_SET(fte_match_set_misc3, misc3_m,
9124 geneve_tlv_option_0_data,
9125 rte_be_to_cpu_32(opt_data_mask));
9126 MLX5_SET(fte_match_set_misc3, misc3_v,
9127 geneve_tlv_option_0_data,
9128 rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9134 * Add MPLS item to matcher and to the value.
9136 * @param[in, out] matcher
9138 * @param[in, out] key
9139 * Flow matcher value.
9141 * Flow pattern to translate.
9142 * @param[in] prev_layer
9143 * The protocol layer indicated in previous item.
9145 * Item is inner pattern.
9148 flow_dv_translate_item_mpls(void *matcher, void *key,
9149 const struct rte_flow_item *item,
9150 uint64_t prev_layer,
9153 const uint32_t *in_mpls_m = item->mask;
9154 const uint32_t *in_mpls_v = item->spec;
9155 uint32_t *out_mpls_m = 0;
9156 uint32_t *out_mpls_v = 0;
9157 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9158 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9159 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9161 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9162 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9163 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9165 switch (prev_layer) {
9166 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9167 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9168 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9169 MLX5_UDP_PORT_MPLS);
9171 case MLX5_FLOW_LAYER_GRE:
9173 case MLX5_FLOW_LAYER_GRE_KEY:
9174 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9175 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9176 RTE_ETHER_TYPE_MPLS);
9184 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9185 switch (prev_layer) {
9186 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9188 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9189 outer_first_mpls_over_udp);
9191 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9192 outer_first_mpls_over_udp);
9194 case MLX5_FLOW_LAYER_GRE:
9196 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9197 outer_first_mpls_over_gre);
9199 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9200 outer_first_mpls_over_gre);
9203 /* Inner MPLS not over GRE is not supported. */
9206 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9210 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9216 if (out_mpls_m && out_mpls_v) {
9217 *out_mpls_m = *in_mpls_m;
9218 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9223 * Add metadata register item to matcher
9225 * @param[in, out] matcher
9227 * @param[in, out] key
9228 * Flow matcher value.
9229 * @param[in] reg_type
9230 * Type of device metadata register
9237 flow_dv_match_meta_reg(void *matcher, void *key,
9238 enum modify_reg reg_type,
9239 uint32_t data, uint32_t mask)
9242 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9244 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9250 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9251 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9254 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9255 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9259 * The metadata register C0 field might be divided into
9260 * source vport index and META item value, we should set
9261 * this field according to specified mask, not as whole one.
9263 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9265 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9266 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9269 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9272 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9273 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9276 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9277 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9280 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9281 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9284 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9285 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9288 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9289 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9292 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9293 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9296 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9297 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9306 * Add MARK item to matcher
9309 * The device to configure through.
9310 * @param[in, out] matcher
9312 * @param[in, out] key
9313 * Flow matcher value.
9315 * Flow pattern to translate.
9318 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9319 void *matcher, void *key,
9320 const struct rte_flow_item *item)
9322 struct mlx5_priv *priv = dev->data->dev_private;
9323 const struct rte_flow_item_mark *mark;
9327 mark = item->mask ? (const void *)item->mask :
9328 &rte_flow_item_mark_mask;
9329 mask = mark->id & priv->sh->dv_mark_mask;
9330 mark = (const void *)item->spec;
9332 value = mark->id & priv->sh->dv_mark_mask & mask;
9334 enum modify_reg reg;
9336 /* Get the metadata register index for the mark. */
9337 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9338 MLX5_ASSERT(reg > 0);
9339 if (reg == REG_C_0) {
9340 struct mlx5_priv *priv = dev->data->dev_private;
9341 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9342 uint32_t shl_c0 = rte_bsf32(msk_c0);
9348 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9353 * Add META item to matcher
9356 * The devich to configure through.
9357 * @param[in, out] matcher
9359 * @param[in, out] key
9360 * Flow matcher value.
9362 * Attributes of flow that includes this item.
9364 * Flow pattern to translate.
9367 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9368 void *matcher, void *key,
9369 const struct rte_flow_attr *attr,
9370 const struct rte_flow_item *item)
9372 const struct rte_flow_item_meta *meta_m;
9373 const struct rte_flow_item_meta *meta_v;
9375 meta_m = (const void *)item->mask;
9377 meta_m = &rte_flow_item_meta_mask;
9378 meta_v = (const void *)item->spec;
9381 uint32_t value = meta_v->data;
9382 uint32_t mask = meta_m->data;
9384 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9387 MLX5_ASSERT(reg != REG_NON);
9388 if (reg == REG_C_0) {
9389 struct mlx5_priv *priv = dev->data->dev_private;
9390 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9391 uint32_t shl_c0 = rte_bsf32(msk_c0);
9397 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9402 * Add vport metadata Reg C0 item to matcher
9404 * @param[in, out] matcher
9406 * @param[in, out] key
9407 * Flow matcher value.
9409 * Flow pattern to translate.
9412 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9413 uint32_t value, uint32_t mask)
9415 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9419 * Add tag item to matcher
9422 * The devich to configure through.
9423 * @param[in, out] matcher
9425 * @param[in, out] key
9426 * Flow matcher value.
9428 * Flow pattern to translate.
9431 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9432 void *matcher, void *key,
9433 const struct rte_flow_item *item)
9435 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9436 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9437 uint32_t mask, value;
9440 value = tag_v->data;
9441 mask = tag_m ? tag_m->data : UINT32_MAX;
9442 if (tag_v->id == REG_C_0) {
9443 struct mlx5_priv *priv = dev->data->dev_private;
9444 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9445 uint32_t shl_c0 = rte_bsf32(msk_c0);
9451 flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9455 * Add TAG item to matcher
9458 * The devich to configure through.
9459 * @param[in, out] matcher
9461 * @param[in, out] key
9462 * Flow matcher value.
9464 * Flow pattern to translate.
9467 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9468 void *matcher, void *key,
9469 const struct rte_flow_item *item)
9471 const struct rte_flow_item_tag *tag_v = item->spec;
9472 const struct rte_flow_item_tag *tag_m = item->mask;
9473 enum modify_reg reg;
9476 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9477 /* Get the metadata register index for the tag. */
9478 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9479 MLX5_ASSERT(reg > 0);
9480 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9484 * Add source vport match to the specified matcher.
9486 * @param[in, out] matcher
9488 * @param[in, out] key
9489 * Flow matcher value.
9491 * Source vport value to match
9496 flow_dv_translate_item_source_vport(void *matcher, void *key,
9497 int16_t port, uint16_t mask)
9499 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9500 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9502 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9503 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9507 * Translate port-id item to eswitch match on port-id.
9510 * The devich to configure through.
9511 * @param[in, out] matcher
9513 * @param[in, out] key
9514 * Flow matcher value.
9516 * Flow pattern to translate.
9521 * 0 on success, a negative errno value otherwise.
9524 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9525 void *key, const struct rte_flow_item *item,
9526 const struct rte_flow_attr *attr)
9528 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9529 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9530 struct mlx5_priv *priv;
9533 mask = pid_m ? pid_m->id : 0xffff;
9534 id = pid_v ? pid_v->id : dev->data->port_id;
9535 priv = mlx5_port_to_eswitch_info(id, item == NULL);
9539 * Translate to vport field or to metadata, depending on mode.
9540 * Kernel can use either misc.source_port or half of C0 metadata
9543 if (priv->vport_meta_mask) {
9545 * Provide the hint for SW steering library
9546 * to insert the flow into ingress domain and
9547 * save the extra vport match.
9549 if (mask == 0xffff && priv->vport_id == 0xffff &&
9550 priv->pf_bond < 0 && attr->transfer)
9551 flow_dv_translate_item_source_vport
9552 (matcher, key, priv->vport_id, mask);
9554 * We should always set the vport metadata register,
9555 * otherwise the SW steering library can drop
9556 * the rule if wire vport metadata value is not zero,
9557 * it depends on kernel configuration.
9559 flow_dv_translate_item_meta_vport(matcher, key,
9560 priv->vport_meta_tag,
9561 priv->vport_meta_mask);
9563 flow_dv_translate_item_source_vport(matcher, key,
9564 priv->vport_id, mask);
9570 * Add ICMP6 item to matcher and to the value.
9572 * @param[in, out] matcher
9574 * @param[in, out] key
9575 * Flow matcher value.
9577 * Flow pattern to translate.
9579 * Item is inner pattern.
9582 flow_dv_translate_item_icmp6(void *matcher, void *key,
9583 const struct rte_flow_item *item,
9586 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9587 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9590 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9592 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9594 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9596 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9598 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9600 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9602 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9603 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9607 icmp6_m = &rte_flow_item_icmp6_mask;
9608 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9609 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9610 icmp6_v->type & icmp6_m->type);
9611 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9612 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9613 icmp6_v->code & icmp6_m->code);
9617 * Add ICMP item to matcher and to the value.
9619 * @param[in, out] matcher
9621 * @param[in, out] key
9622 * Flow matcher value.
9624 * Flow pattern to translate.
9626 * Item is inner pattern.
9629 flow_dv_translate_item_icmp(void *matcher, void *key,
9630 const struct rte_flow_item *item,
9633 const struct rte_flow_item_icmp *icmp_m = item->mask;
9634 const struct rte_flow_item_icmp *icmp_v = item->spec;
9635 uint32_t icmp_header_data_m = 0;
9636 uint32_t icmp_header_data_v = 0;
9639 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9641 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9643 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9645 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9647 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9649 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9651 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9652 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9656 icmp_m = &rte_flow_item_icmp_mask;
9657 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9658 icmp_m->hdr.icmp_type);
9659 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9660 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9661 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9662 icmp_m->hdr.icmp_code);
9663 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9664 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9665 icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9666 icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9667 if (icmp_header_data_m) {
9668 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9669 icmp_header_data_v |=
9670 rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9671 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9672 icmp_header_data_m);
9673 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9674 icmp_header_data_v & icmp_header_data_m);
9679 * Add GTP item to matcher and to the value.
9681 * @param[in, out] matcher
9683 * @param[in, out] key
9684 * Flow matcher value.
9686 * Flow pattern to translate.
9688 * Item is inner pattern.
9691 flow_dv_translate_item_gtp(void *matcher, void *key,
9692 const struct rte_flow_item *item, int inner)
9694 const struct rte_flow_item_gtp *gtp_m = item->mask;
9695 const struct rte_flow_item_gtp *gtp_v = item->spec;
9698 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9700 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9701 uint16_t dport = RTE_GTPU_UDP_PORT;
9704 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9706 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9708 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9710 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9712 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9713 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9714 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9719 gtp_m = &rte_flow_item_gtp_mask;
9720 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9721 gtp_m->v_pt_rsv_flags);
9722 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9723 gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9724 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9725 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9726 gtp_v->msg_type & gtp_m->msg_type);
9727 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9728 rte_be_to_cpu_32(gtp_m->teid));
9729 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9730 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9734 * Add GTP PSC item to matcher.
9736 * @param[in, out] matcher
9738 * @param[in, out] key
9739 * Flow matcher value.
9741 * Flow pattern to translate.
9744 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9745 const struct rte_flow_item *item)
9747 const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9748 const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9749 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9751 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9757 uint8_t next_ext_header_type;
9762 /* Always set E-flag match on one, regardless of GTP item settings. */
9763 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9764 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9765 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9766 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9767 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9768 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9769 /*Set next extension header type. */
9772 dw_2.next_ext_header_type = 0xff;
9773 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9774 rte_cpu_to_be_32(dw_2.w32));
9777 dw_2.next_ext_header_type = 0x85;
9778 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9779 rte_cpu_to_be_32(dw_2.w32));
9791 /*Set extension header PDU type and Qos. */
9793 gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9795 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9796 dw_0.qfi = gtp_psc_m->qfi;
9797 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9798 rte_cpu_to_be_32(dw_0.w32));
9800 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9801 gtp_psc_m->pdu_type);
9802 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9803 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9804 rte_cpu_to_be_32(dw_0.w32));
9810 * Add eCPRI item to matcher and to the value.
9813 * The devich to configure through.
9814 * @param[in, out] matcher
9816 * @param[in, out] key
9817 * Flow matcher value.
9819 * Flow pattern to translate.
9820 * @param[in] samples
9821 * Sample IDs to be used in the matching.
9824 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9825 void *key, const struct rte_flow_item *item)
9827 struct mlx5_priv *priv = dev->data->dev_private;
9828 const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9829 const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9830 struct rte_ecpri_common_hdr common;
9831 void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9833 void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9841 ecpri_m = &rte_flow_item_ecpri_mask;
9843 * Maximal four DW samples are supported in a single matching now.
9844 * Two are used now for a eCPRI matching:
9845 * 1. Type: one byte, mask should be 0x00ff0000 in network order
9846 * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9849 if (!ecpri_m->hdr.common.u32)
9851 samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9852 /* Need to take the whole DW as the mask to fill the entry. */
9853 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9854 prog_sample_field_value_0);
9855 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9856 prog_sample_field_value_0);
9857 /* Already big endian (network order) in the header. */
9858 *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9859 *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9860 /* Sample#0, used for matching type, offset 0. */
9861 MLX5_SET(fte_match_set_misc4, misc4_m,
9862 prog_sample_field_id_0, samples[0]);
9863 /* It makes no sense to set the sample ID in the mask field. */
9864 MLX5_SET(fte_match_set_misc4, misc4_v,
9865 prog_sample_field_id_0, samples[0]);
9867 * Checking if message body part needs to be matched.
9868 * Some wildcard rules only matching type field should be supported.
9870 if (ecpri_m->hdr.dummy[0]) {
9871 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9872 switch (common.type) {
9873 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9874 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9875 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9876 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9877 prog_sample_field_value_1);
9878 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9879 prog_sample_field_value_1);
9880 *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9881 *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9882 ecpri_m->hdr.dummy[0];
9883 /* Sample#1, to match message body, offset 4. */
9884 MLX5_SET(fte_match_set_misc4, misc4_m,
9885 prog_sample_field_id_1, samples[1]);
9886 MLX5_SET(fte_match_set_misc4, misc4_v,
9887 prog_sample_field_id_1, samples[1]);
9890 /* Others, do not match any sample ID. */
9897 * Add connection tracking status item to matcher
9900 * The devich to configure through.
9901 * @param[in, out] matcher
9903 * @param[in, out] key
9904 * Flow matcher value.
9906 * Flow pattern to translate.
9909 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
9910 void *matcher, void *key,
9911 const struct rte_flow_item *item)
9913 uint32_t reg_value = 0;
9915 /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
9916 uint32_t reg_mask = 0;
9917 const struct rte_flow_item_conntrack *spec = item->spec;
9918 const struct rte_flow_item_conntrack *mask = item->mask;
9920 struct rte_flow_error error;
9923 mask = &rte_flow_item_conntrack_mask;
9924 if (!spec || !mask->flags)
9926 flags = spec->flags & mask->flags;
9927 /* The conflict should be checked in the validation. */
9928 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
9929 reg_value |= MLX5_CT_SYNDROME_VALID;
9930 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9931 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
9932 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
9933 reg_value |= MLX5_CT_SYNDROME_INVALID;
9934 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
9935 reg_value |= MLX5_CT_SYNDROME_TRAP;
9936 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9937 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
9938 if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
9939 RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
9940 RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
9942 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9943 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
9944 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9945 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
9946 /* The REG_C_x value could be saved during startup. */
9947 reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
9948 if (reg_id == REG_NON)
9950 flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
9951 reg_value, reg_mask);
9954 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
9956 #define HEADER_IS_ZERO(match_criteria, headers) \
9957 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
9958 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
9961 * Calculate flow matcher enable bitmap.
9963 * @param match_criteria
9964 * Pointer to flow matcher criteria.
9967 * Bitmap of enabled fields.
9970 flow_dv_matcher_enable(uint32_t *match_criteria)
9972 uint8_t match_criteria_enable;
9974 match_criteria_enable =
9975 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
9976 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
9977 match_criteria_enable |=
9978 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
9979 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
9980 match_criteria_enable |=
9981 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
9982 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
9983 match_criteria_enable |=
9984 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
9985 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
9986 match_criteria_enable |=
9987 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
9988 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
9989 match_criteria_enable |=
9990 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
9991 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
9992 match_criteria_enable |=
9993 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
9994 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
9995 return match_criteria_enable;
9999 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10002 * Check flow matching criteria first, subtract misc5/4 length if flow
10003 * doesn't own misc5/4 parameters. In some old rdma-core releases,
10004 * misc5/4 are not supported, and matcher creation failure is expected
10005 * w/o subtration. If misc5 is provided, misc4 must be counted in since
10006 * misc5 is right after misc4.
10008 if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10009 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10010 MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10011 if (!(match_criteria & (1 <<
10012 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10013 *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10018 static struct mlx5_list_entry *
10019 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10020 struct mlx5_list_entry *entry, void *cb_ctx)
10022 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10023 struct mlx5_flow_dv_matcher *ref = ctx->data;
10024 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10025 typeof(*tbl), tbl);
10026 struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10031 rte_flow_error_set(ctx->error, ENOMEM,
10032 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10033 "cannot create matcher");
10036 memcpy(resource, entry, sizeof(*resource));
10037 resource->tbl = &tbl->tbl;
10038 return &resource->entry;
10042 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10043 struct mlx5_list_entry *entry)
10048 struct mlx5_hlist_entry *
10049 flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *cb_ctx)
10051 struct mlx5_dev_ctx_shared *sh = list->ctx;
10052 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10053 struct rte_eth_dev *dev = ctx->dev;
10054 struct mlx5_flow_tbl_data_entry *tbl_data;
10055 struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data;
10056 struct rte_flow_error *error = ctx->error;
10057 union mlx5_flow_tbl_key key = { .v64 = key64 };
10058 struct mlx5_flow_tbl_resource *tbl;
10063 tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10065 rte_flow_error_set(error, ENOMEM,
10066 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10068 "cannot allocate flow table data entry");
10071 tbl_data->idx = idx;
10072 tbl_data->tunnel = tt_prm->tunnel;
10073 tbl_data->group_id = tt_prm->group_id;
10074 tbl_data->external = !!tt_prm->external;
10075 tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10076 tbl_data->is_egress = !!key.is_egress;
10077 tbl_data->is_transfer = !!key.is_fdb;
10078 tbl_data->dummy = !!key.dummy;
10079 tbl_data->level = key.level;
10080 tbl_data->id = key.id;
10081 tbl = &tbl_data->tbl;
10083 return &tbl_data->entry;
10085 domain = sh->fdb_domain;
10086 else if (key.is_egress)
10087 domain = sh->tx_domain;
10089 domain = sh->rx_domain;
10090 ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10092 rte_flow_error_set(error, ENOMEM,
10093 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10094 NULL, "cannot create flow table object");
10095 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10098 if (key.level != 0) {
10099 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10100 (tbl->obj, &tbl_data->jump.action);
10102 rte_flow_error_set(error, ENOMEM,
10103 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10105 "cannot create flow jump action");
10106 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10107 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10111 MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10112 key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10113 key.level, key.id);
10114 tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10115 flow_dv_matcher_create_cb,
10116 flow_dv_matcher_match_cb,
10117 flow_dv_matcher_remove_cb,
10118 flow_dv_matcher_clone_cb,
10119 flow_dv_matcher_clone_free_cb);
10120 if (!tbl_data->matchers) {
10121 rte_flow_error_set(error, ENOMEM,
10122 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10124 "cannot create tbl matcher list");
10125 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10126 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10127 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10130 return &tbl_data->entry;
10134 flow_dv_tbl_match_cb(struct mlx5_hlist *list __rte_unused,
10135 struct mlx5_hlist_entry *entry, uint64_t key64,
10136 void *cb_ctx __rte_unused)
10138 struct mlx5_flow_tbl_data_entry *tbl_data =
10139 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10140 union mlx5_flow_tbl_key key = { .v64 = key64 };
10142 return tbl_data->level != key.level ||
10143 tbl_data->id != key.id ||
10144 tbl_data->dummy != key.dummy ||
10145 tbl_data->is_transfer != !!key.is_fdb ||
10146 tbl_data->is_egress != !!key.is_egress;
10150 * Get a flow table.
10152 * @param[in, out] dev
10153 * Pointer to rte_eth_dev structure.
10154 * @param[in] table_level
10155 * Table level to use.
10156 * @param[in] egress
10157 * Direction of the table.
10158 * @param[in] transfer
10159 * E-Switch or NIC flow.
10161 * Dummy entry for dv API.
10162 * @param[in] table_id
10164 * @param[out] error
10165 * pointer to error structure.
10168 * Returns tables resource based on the index, NULL in case of failed.
10170 struct mlx5_flow_tbl_resource *
10171 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10172 uint32_t table_level, uint8_t egress,
10175 const struct mlx5_flow_tunnel *tunnel,
10176 uint32_t group_id, uint8_t dummy,
10178 struct rte_flow_error *error)
10180 struct mlx5_priv *priv = dev->data->dev_private;
10181 union mlx5_flow_tbl_key table_key = {
10183 .level = table_level,
10187 .is_fdb = !!transfer,
10188 .is_egress = !!egress,
10191 struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10193 .group_id = group_id,
10194 .external = external,
10196 struct mlx5_flow_cb_ctx ctx = {
10201 struct mlx5_hlist_entry *entry;
10202 struct mlx5_flow_tbl_data_entry *tbl_data;
10204 entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10206 rte_flow_error_set(error, ENOMEM,
10207 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10208 "cannot get table");
10211 DRV_LOG(DEBUG, "table_level %u table_id %u "
10212 "tunnel %u group %u registered.",
10213 table_level, table_id,
10214 tunnel ? tunnel->tunnel_id : 0, group_id);
10215 tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10216 return &tbl_data->tbl;
10220 flow_dv_tbl_remove_cb(struct mlx5_hlist *list,
10221 struct mlx5_hlist_entry *entry)
10223 struct mlx5_dev_ctx_shared *sh = list->ctx;
10224 struct mlx5_flow_tbl_data_entry *tbl_data =
10225 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10227 MLX5_ASSERT(entry && sh);
10228 if (tbl_data->jump.action)
10229 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10230 if (tbl_data->tbl.obj)
10231 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10232 if (tbl_data->tunnel_offload && tbl_data->external) {
10233 struct mlx5_hlist_entry *he;
10234 struct mlx5_hlist *tunnel_grp_hash;
10235 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10236 union tunnel_tbl_key tunnel_key = {
10237 .tunnel_id = tbl_data->tunnel ?
10238 tbl_data->tunnel->tunnel_id : 0,
10239 .group = tbl_data->group_id
10241 uint32_t table_level = tbl_data->level;
10243 tunnel_grp_hash = tbl_data->tunnel ?
10244 tbl_data->tunnel->groups :
10246 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, NULL);
10248 mlx5_hlist_unregister(tunnel_grp_hash, he);
10250 "table_level %u id %u tunnel %u group %u released.",
10254 tbl_data->tunnel->tunnel_id : 0,
10255 tbl_data->group_id);
10257 mlx5_list_destroy(tbl_data->matchers);
10258 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10262 * Release a flow table.
10265 * Pointer to device shared structure.
10267 * Table resource to be released.
10270 * Returns 0 if table was released, else return 1;
10273 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10274 struct mlx5_flow_tbl_resource *tbl)
10276 struct mlx5_flow_tbl_data_entry *tbl_data =
10277 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10281 return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10285 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10286 struct mlx5_list_entry *entry, void *cb_ctx)
10288 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10289 struct mlx5_flow_dv_matcher *ref = ctx->data;
10290 struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10293 return cur->crc != ref->crc ||
10294 cur->priority != ref->priority ||
10295 memcmp((const void *)cur->mask.buf,
10296 (const void *)ref->mask.buf, ref->mask.size);
10299 struct mlx5_list_entry *
10300 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10302 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10303 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10304 struct mlx5_flow_dv_matcher *ref = ctx->data;
10305 struct mlx5_flow_dv_matcher *resource;
10306 struct mlx5dv_flow_matcher_attr dv_attr = {
10307 .type = IBV_FLOW_ATTR_NORMAL,
10308 .match_mask = (void *)&ref->mask,
10310 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10311 typeof(*tbl), tbl);
10314 resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10317 rte_flow_error_set(ctx->error, ENOMEM,
10318 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10319 "cannot create matcher");
10323 dv_attr.match_criteria_enable =
10324 flow_dv_matcher_enable(resource->mask.buf);
10325 __flow_dv_adjust_buf_size(&ref->mask.size,
10326 dv_attr.match_criteria_enable);
10327 dv_attr.priority = ref->priority;
10328 if (tbl->is_egress)
10329 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10330 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10331 &resource->matcher_object);
10333 mlx5_free(resource);
10334 rte_flow_error_set(ctx->error, ENOMEM,
10335 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10336 "cannot create matcher");
10339 return &resource->entry;
10343 * Register the flow matcher.
10345 * @param[in, out] dev
10346 * Pointer to rte_eth_dev structure.
10347 * @param[in, out] matcher
10348 * Pointer to flow matcher.
10349 * @param[in, out] key
10350 * Pointer to flow table key.
10351 * @parm[in, out] dev_flow
10352 * Pointer to the dev_flow.
10353 * @param[out] error
10354 * pointer to error structure.
10357 * 0 on success otherwise -errno and errno is set.
10360 flow_dv_matcher_register(struct rte_eth_dev *dev,
10361 struct mlx5_flow_dv_matcher *ref,
10362 union mlx5_flow_tbl_key *key,
10363 struct mlx5_flow *dev_flow,
10364 const struct mlx5_flow_tunnel *tunnel,
10366 struct rte_flow_error *error)
10368 struct mlx5_list_entry *entry;
10369 struct mlx5_flow_dv_matcher *resource;
10370 struct mlx5_flow_tbl_resource *tbl;
10371 struct mlx5_flow_tbl_data_entry *tbl_data;
10372 struct mlx5_flow_cb_ctx ctx = {
10377 * tunnel offload API requires this registration for cases when
10378 * tunnel match rule was inserted before tunnel set rule.
10380 tbl = flow_dv_tbl_resource_get(dev, key->level,
10381 key->is_egress, key->is_fdb,
10382 dev_flow->external, tunnel,
10383 group_id, 0, key->id, error);
10385 return -rte_errno; /* No need to refill the error info */
10386 tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10388 entry = mlx5_list_register(tbl_data->matchers, &ctx);
10390 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10391 return rte_flow_error_set(error, ENOMEM,
10392 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10393 "cannot allocate ref memory");
10395 resource = container_of(entry, typeof(*resource), entry);
10396 dev_flow->handle->dvh.matcher = resource;
10400 struct mlx5_hlist_entry *
10401 flow_dv_tag_create_cb(struct mlx5_hlist *list, uint64_t key, void *ctx)
10403 struct mlx5_dev_ctx_shared *sh = list->ctx;
10404 struct rte_flow_error *error = ctx;
10405 struct mlx5_flow_dv_tag_resource *entry;
10409 entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10411 rte_flow_error_set(error, ENOMEM,
10412 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10413 "cannot allocate resource memory");
10417 entry->tag_id = key;
10418 ret = mlx5_flow_os_create_flow_action_tag(key,
10421 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10422 rte_flow_error_set(error, ENOMEM,
10423 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10424 NULL, "cannot create action");
10427 return &entry->entry;
10431 flow_dv_tag_match_cb(struct mlx5_hlist *list __rte_unused,
10432 struct mlx5_hlist_entry *entry, uint64_t key,
10433 void *cb_ctx __rte_unused)
10435 struct mlx5_flow_dv_tag_resource *tag =
10436 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10438 return key != tag->tag_id;
10442 * Find existing tag resource or create and register a new one.
10444 * @param dev[in, out]
10445 * Pointer to rte_eth_dev structure.
10446 * @param[in, out] tag_be24
10447 * Tag value in big endian then R-shift 8.
10448 * @parm[in, out] dev_flow
10449 * Pointer to the dev_flow.
10450 * @param[out] error
10451 * pointer to error structure.
10454 * 0 on success otherwise -errno and errno is set.
10457 flow_dv_tag_resource_register
10458 (struct rte_eth_dev *dev,
10460 struct mlx5_flow *dev_flow,
10461 struct rte_flow_error *error)
10463 struct mlx5_priv *priv = dev->data->dev_private;
10464 struct mlx5_flow_dv_tag_resource *resource;
10465 struct mlx5_hlist_entry *entry;
10467 entry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, error);
10469 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10471 dev_flow->handle->dvh.rix_tag = resource->idx;
10472 dev_flow->dv.tag_resource = resource;
10479 flow_dv_tag_remove_cb(struct mlx5_hlist *list,
10480 struct mlx5_hlist_entry *entry)
10482 struct mlx5_dev_ctx_shared *sh = list->ctx;
10483 struct mlx5_flow_dv_tag_resource *tag =
10484 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10486 MLX5_ASSERT(tag && sh && tag->action);
10487 claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10488 DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10489 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10496 * Pointer to Ethernet device.
10501 * 1 while a reference on it exists, 0 when freed.
10504 flow_dv_tag_release(struct rte_eth_dev *dev,
10507 struct mlx5_priv *priv = dev->data->dev_private;
10508 struct mlx5_flow_dv_tag_resource *tag;
10510 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10513 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10514 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10515 return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10519 * Translate port ID action to vport.
10522 * Pointer to rte_eth_dev structure.
10523 * @param[in] action
10524 * Pointer to the port ID action.
10525 * @param[out] dst_port_id
10526 * The target port ID.
10527 * @param[out] error
10528 * Pointer to the error structure.
10531 * 0 on success, a negative errno value otherwise and rte_errno is set.
10534 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10535 const struct rte_flow_action *action,
10536 uint32_t *dst_port_id,
10537 struct rte_flow_error *error)
10540 struct mlx5_priv *priv;
10541 const struct rte_flow_action_port_id *conf =
10542 (const struct rte_flow_action_port_id *)action->conf;
10544 port = conf->original ? dev->data->port_id : conf->id;
10545 priv = mlx5_port_to_eswitch_info(port, false);
10547 return rte_flow_error_set(error, -rte_errno,
10548 RTE_FLOW_ERROR_TYPE_ACTION,
10550 "No eswitch info was found for port");
10551 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10553 * This parameter is transferred to
10554 * mlx5dv_dr_action_create_dest_ib_port().
10556 *dst_port_id = priv->dev_port;
10559 * Legacy mode, no LAG configurations is supported.
10560 * This parameter is transferred to
10561 * mlx5dv_dr_action_create_dest_vport().
10563 *dst_port_id = priv->vport_id;
10569 * Create a counter with aging configuration.
10572 * Pointer to rte_eth_dev structure.
10573 * @param[in] dev_flow
10574 * Pointer to the mlx5_flow.
10575 * @param[out] count
10576 * Pointer to the counter action configuration.
10578 * Pointer to the aging action configuration.
10581 * Index to flow counter on success, 0 otherwise.
10584 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10585 struct mlx5_flow *dev_flow,
10586 const struct rte_flow_action_count *count,
10587 const struct rte_flow_action_age *age)
10590 struct mlx5_age_param *age_param;
10592 if (count && count->shared)
10593 counter = flow_dv_counter_get_shared(dev, count->id);
10595 counter = flow_dv_counter_alloc(dev, !!age);
10596 if (!counter || age == NULL)
10598 age_param = flow_dv_counter_idx_get_age(dev, counter);
10599 age_param->context = age->context ? age->context :
10600 (void *)(uintptr_t)(dev_flow->flow_idx);
10601 age_param->timeout = age->timeout;
10602 age_param->port_id = dev->data->port_id;
10603 __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10604 __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10609 * Add Tx queue matcher
10612 * Pointer to the dev struct.
10613 * @param[in, out] matcher
10615 * @param[in, out] key
10616 * Flow matcher value.
10618 * Flow pattern to translate.
10620 * Item is inner pattern.
10623 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10624 void *matcher, void *key,
10625 const struct rte_flow_item *item)
10627 const struct mlx5_rte_flow_item_tx_queue *queue_m;
10628 const struct mlx5_rte_flow_item_tx_queue *queue_v;
10630 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10632 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10633 struct mlx5_txq_ctrl *txq;
10637 queue_m = (const void *)item->mask;
10640 queue_v = (const void *)item->spec;
10643 txq = mlx5_txq_get(dev, queue_v->queue);
10646 queue = txq->obj->sq->id;
10647 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10648 MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10649 queue & queue_m->queue);
10650 mlx5_txq_release(dev, queue_v->queue);
10654 * Set the hash fields according to the @p flow information.
10656 * @param[in] dev_flow
10657 * Pointer to the mlx5_flow.
10658 * @param[in] rss_desc
10659 * Pointer to the mlx5_flow_rss_desc.
10662 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10663 struct mlx5_flow_rss_desc *rss_desc)
10665 uint64_t items = dev_flow->handle->layers;
10667 uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10669 dev_flow->hash_fields = 0;
10670 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10671 if (rss_desc->level >= 2) {
10672 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10676 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10677 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10678 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10679 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10680 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10681 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10682 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10684 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10686 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10687 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10688 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10689 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10690 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10691 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10692 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10694 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10697 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10698 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10699 if (rss_types & ETH_RSS_UDP) {
10700 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10701 dev_flow->hash_fields |=
10702 IBV_RX_HASH_SRC_PORT_UDP;
10703 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10704 dev_flow->hash_fields |=
10705 IBV_RX_HASH_DST_PORT_UDP;
10707 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10709 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10710 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10711 if (rss_types & ETH_RSS_TCP) {
10712 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10713 dev_flow->hash_fields |=
10714 IBV_RX_HASH_SRC_PORT_TCP;
10715 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10716 dev_flow->hash_fields |=
10717 IBV_RX_HASH_DST_PORT_TCP;
10719 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10725 * Prepare an Rx Hash queue.
10728 * Pointer to Ethernet device.
10729 * @param[in] dev_flow
10730 * Pointer to the mlx5_flow.
10731 * @param[in] rss_desc
10732 * Pointer to the mlx5_flow_rss_desc.
10733 * @param[out] hrxq_idx
10734 * Hash Rx queue index.
10737 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10739 static struct mlx5_hrxq *
10740 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10741 struct mlx5_flow *dev_flow,
10742 struct mlx5_flow_rss_desc *rss_desc,
10743 uint32_t *hrxq_idx)
10745 struct mlx5_priv *priv = dev->data->dev_private;
10746 struct mlx5_flow_handle *dh = dev_flow->handle;
10747 struct mlx5_hrxq *hrxq;
10749 MLX5_ASSERT(rss_desc->queue_num);
10750 rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10751 rss_desc->hash_fields = dev_flow->hash_fields;
10752 rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10753 rss_desc->shared_rss = 0;
10754 *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10757 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10763 * Release sample sub action resource.
10765 * @param[in, out] dev
10766 * Pointer to rte_eth_dev structure.
10767 * @param[in] act_res
10768 * Pointer to sample sub action resource.
10771 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10772 struct mlx5_flow_sub_actions_idx *act_res)
10774 if (act_res->rix_hrxq) {
10775 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10776 act_res->rix_hrxq = 0;
10778 if (act_res->rix_encap_decap) {
10779 flow_dv_encap_decap_resource_release(dev,
10780 act_res->rix_encap_decap);
10781 act_res->rix_encap_decap = 0;
10783 if (act_res->rix_port_id_action) {
10784 flow_dv_port_id_action_resource_release(dev,
10785 act_res->rix_port_id_action);
10786 act_res->rix_port_id_action = 0;
10788 if (act_res->rix_tag) {
10789 flow_dv_tag_release(dev, act_res->rix_tag);
10790 act_res->rix_tag = 0;
10792 if (act_res->rix_jump) {
10793 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
10794 act_res->rix_jump = 0;
10799 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
10800 struct mlx5_list_entry *entry, void *cb_ctx)
10802 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10803 struct rte_eth_dev *dev = ctx->dev;
10804 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10805 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
10809 if (ctx_resource->ratio == resource->ratio &&
10810 ctx_resource->ft_type == resource->ft_type &&
10811 ctx_resource->ft_id == resource->ft_id &&
10812 ctx_resource->set_action == resource->set_action &&
10813 !memcmp((void *)&ctx_resource->sample_act,
10814 (void *)&resource->sample_act,
10815 sizeof(struct mlx5_flow_sub_actions_list))) {
10817 * Existing sample action should release the prepared
10818 * sub-actions reference counter.
10820 flow_dv_sample_sub_actions_release(dev,
10821 &ctx_resource->sample_idx);
10827 struct mlx5_list_entry *
10828 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
10830 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10831 struct rte_eth_dev *dev = ctx->dev;
10832 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10833 void **sample_dv_actions = ctx_resource->sub_actions;
10834 struct mlx5_flow_dv_sample_resource *resource;
10835 struct mlx5dv_dr_flow_sampler_attr sampler_attr;
10836 struct mlx5_priv *priv = dev->data->dev_private;
10837 struct mlx5_dev_ctx_shared *sh = priv->sh;
10838 struct mlx5_flow_tbl_resource *tbl;
10840 const uint32_t next_ft_step = 1;
10841 uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
10842 uint8_t is_egress = 0;
10843 uint8_t is_transfer = 0;
10844 struct rte_flow_error *error = ctx->error;
10846 /* Register new sample resource. */
10847 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
10849 rte_flow_error_set(error, ENOMEM,
10850 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10852 "cannot allocate resource memory");
10855 *resource = *ctx_resource;
10856 /* Create normal path table level */
10857 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
10859 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
10861 tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
10862 is_egress, is_transfer,
10863 true, NULL, 0, 0, 0, error);
10865 rte_flow_error_set(error, ENOMEM,
10866 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10868 "fail to create normal path table "
10872 resource->normal_path_tbl = tbl;
10873 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
10874 if (!sh->default_miss_action) {
10875 rte_flow_error_set(error, ENOMEM,
10876 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10878 "default miss action was not "
10882 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
10883 sh->default_miss_action;
10885 /* Create a DR sample action */
10886 sampler_attr.sample_ratio = resource->ratio;
10887 sampler_attr.default_next_table = tbl->obj;
10888 sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
10889 sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
10890 &sample_dv_actions[0];
10891 sampler_attr.action = resource->set_action;
10892 if (mlx5_os_flow_dr_create_flow_action_sampler
10893 (&sampler_attr, &resource->verbs_action)) {
10894 rte_flow_error_set(error, ENOMEM,
10895 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10896 NULL, "cannot create sample action");
10899 resource->idx = idx;
10900 resource->dev = dev;
10901 return &resource->entry;
10903 if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
10904 flow_dv_sample_sub_actions_release(dev,
10905 &resource->sample_idx);
10906 if (resource->normal_path_tbl)
10907 flow_dv_tbl_resource_release(MLX5_SH(dev),
10908 resource->normal_path_tbl);
10909 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
10914 struct mlx5_list_entry *
10915 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
10916 struct mlx5_list_entry *entry __rte_unused,
10919 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10920 struct rte_eth_dev *dev = ctx->dev;
10921 struct mlx5_flow_dv_sample_resource *resource;
10922 struct mlx5_priv *priv = dev->data->dev_private;
10923 struct mlx5_dev_ctx_shared *sh = priv->sh;
10926 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
10928 rte_flow_error_set(ctx->error, ENOMEM,
10929 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10931 "cannot allocate resource memory");
10934 memcpy(resource, entry, sizeof(*resource));
10935 resource->idx = idx;
10936 resource->dev = dev;
10937 return &resource->entry;
10941 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
10942 struct mlx5_list_entry *entry)
10944 struct mlx5_flow_dv_sample_resource *resource =
10945 container_of(entry, typeof(*resource), entry);
10946 struct rte_eth_dev *dev = resource->dev;
10947 struct mlx5_priv *priv = dev->data->dev_private;
10949 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
10953 * Find existing sample resource or create and register a new one.
10955 * @param[in, out] dev
10956 * Pointer to rte_eth_dev structure.
10958 * Pointer to sample resource reference.
10959 * @parm[in, out] dev_flow
10960 * Pointer to the dev_flow.
10961 * @param[out] error
10962 * pointer to error structure.
10965 * 0 on success otherwise -errno and errno is set.
10968 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
10969 struct mlx5_flow_dv_sample_resource *ref,
10970 struct mlx5_flow *dev_flow,
10971 struct rte_flow_error *error)
10973 struct mlx5_flow_dv_sample_resource *resource;
10974 struct mlx5_list_entry *entry;
10975 struct mlx5_priv *priv = dev->data->dev_private;
10976 struct mlx5_flow_cb_ctx ctx = {
10982 entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
10985 resource = container_of(entry, typeof(*resource), entry);
10986 dev_flow->handle->dvh.rix_sample = resource->idx;
10987 dev_flow->dv.sample_res = resource;
10992 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
10993 struct mlx5_list_entry *entry, void *cb_ctx)
10995 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10996 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
10997 struct rte_eth_dev *dev = ctx->dev;
10998 struct mlx5_flow_dv_dest_array_resource *resource =
10999 container_of(entry, typeof(*resource), entry);
11002 if (ctx_resource->num_of_dest == resource->num_of_dest &&
11003 ctx_resource->ft_type == resource->ft_type &&
11004 !memcmp((void *)resource->sample_act,
11005 (void *)ctx_resource->sample_act,
11006 (ctx_resource->num_of_dest *
11007 sizeof(struct mlx5_flow_sub_actions_list)))) {
11009 * Existing sample action should release the prepared
11010 * sub-actions reference counter.
11012 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11013 flow_dv_sample_sub_actions_release(dev,
11014 &ctx_resource->sample_idx[idx]);
11020 struct mlx5_list_entry *
11021 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11023 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11024 struct rte_eth_dev *dev = ctx->dev;
11025 struct mlx5_flow_dv_dest_array_resource *resource;
11026 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11027 struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11028 struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11029 struct mlx5_priv *priv = dev->data->dev_private;
11030 struct mlx5_dev_ctx_shared *sh = priv->sh;
11031 struct mlx5_flow_sub_actions_list *sample_act;
11032 struct mlx5dv_dr_domain *domain;
11033 uint32_t idx = 0, res_idx = 0;
11034 struct rte_flow_error *error = ctx->error;
11035 uint64_t action_flags;
11038 /* Register new destination array resource. */
11039 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11042 rte_flow_error_set(error, ENOMEM,
11043 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11045 "cannot allocate resource memory");
11048 *resource = *ctx_resource;
11049 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11050 domain = sh->fdb_domain;
11051 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11052 domain = sh->rx_domain;
11054 domain = sh->tx_domain;
11055 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11056 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11057 mlx5_malloc(MLX5_MEM_ZERO,
11058 sizeof(struct mlx5dv_dr_action_dest_attr),
11060 if (!dest_attr[idx]) {
11061 rte_flow_error_set(error, ENOMEM,
11062 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11064 "cannot allocate resource memory");
11067 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11068 sample_act = &ctx_resource->sample_act[idx];
11069 action_flags = sample_act->action_flags;
11070 switch (action_flags) {
11071 case MLX5_FLOW_ACTION_QUEUE:
11072 dest_attr[idx]->dest = sample_act->dr_queue_action;
11074 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11075 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11076 dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11077 dest_attr[idx]->dest_reformat->reformat =
11078 sample_act->dr_encap_action;
11079 dest_attr[idx]->dest_reformat->dest =
11080 sample_act->dr_port_id_action;
11082 case MLX5_FLOW_ACTION_PORT_ID:
11083 dest_attr[idx]->dest = sample_act->dr_port_id_action;
11085 case MLX5_FLOW_ACTION_JUMP:
11086 dest_attr[idx]->dest = sample_act->dr_jump_action;
11089 rte_flow_error_set(error, EINVAL,
11090 RTE_FLOW_ERROR_TYPE_ACTION,
11092 "unsupported actions type");
11096 /* create a dest array actioin */
11097 ret = mlx5_os_flow_dr_create_flow_action_dest_array
11099 resource->num_of_dest,
11101 &resource->action);
11103 rte_flow_error_set(error, ENOMEM,
11104 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11106 "cannot create destination array action");
11109 resource->idx = res_idx;
11110 resource->dev = dev;
11111 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11112 mlx5_free(dest_attr[idx]);
11113 return &resource->entry;
11115 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11116 flow_dv_sample_sub_actions_release(dev,
11117 &resource->sample_idx[idx]);
11118 if (dest_attr[idx])
11119 mlx5_free(dest_attr[idx]);
11121 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11125 struct mlx5_list_entry *
11126 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11127 struct mlx5_list_entry *entry __rte_unused,
11130 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11131 struct rte_eth_dev *dev = ctx->dev;
11132 struct mlx5_flow_dv_dest_array_resource *resource;
11133 struct mlx5_priv *priv = dev->data->dev_private;
11134 struct mlx5_dev_ctx_shared *sh = priv->sh;
11135 uint32_t res_idx = 0;
11136 struct rte_flow_error *error = ctx->error;
11138 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11141 rte_flow_error_set(error, ENOMEM,
11142 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11144 "cannot allocate dest-array memory");
11147 memcpy(resource, entry, sizeof(*resource));
11148 resource->idx = res_idx;
11149 resource->dev = dev;
11150 return &resource->entry;
11154 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11155 struct mlx5_list_entry *entry)
11157 struct mlx5_flow_dv_dest_array_resource *resource =
11158 container_of(entry, typeof(*resource), entry);
11159 struct rte_eth_dev *dev = resource->dev;
11160 struct mlx5_priv *priv = dev->data->dev_private;
11162 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11166 * Find existing destination array resource or create and register a new one.
11168 * @param[in, out] dev
11169 * Pointer to rte_eth_dev structure.
11171 * Pointer to destination array resource reference.
11172 * @parm[in, out] dev_flow
11173 * Pointer to the dev_flow.
11174 * @param[out] error
11175 * pointer to error structure.
11178 * 0 on success otherwise -errno and errno is set.
11181 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11182 struct mlx5_flow_dv_dest_array_resource *ref,
11183 struct mlx5_flow *dev_flow,
11184 struct rte_flow_error *error)
11186 struct mlx5_flow_dv_dest_array_resource *resource;
11187 struct mlx5_priv *priv = dev->data->dev_private;
11188 struct mlx5_list_entry *entry;
11189 struct mlx5_flow_cb_ctx ctx = {
11195 entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11198 resource = container_of(entry, typeof(*resource), entry);
11199 dev_flow->handle->dvh.rix_dest_array = resource->idx;
11200 dev_flow->dv.dest_array_res = resource;
11205 * Convert Sample action to DV specification.
11208 * Pointer to rte_eth_dev structure.
11209 * @param[in] action
11210 * Pointer to sample action structure.
11211 * @param[in, out] dev_flow
11212 * Pointer to the mlx5_flow.
11214 * Pointer to the flow attributes.
11215 * @param[in, out] num_of_dest
11216 * Pointer to the num of destination.
11217 * @param[in, out] sample_actions
11218 * Pointer to sample actions list.
11219 * @param[in, out] res
11220 * Pointer to sample resource.
11221 * @param[out] error
11222 * Pointer to the error structure.
11225 * 0 on success, a negative errno value otherwise and rte_errno is set.
11228 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11229 const struct rte_flow_action_sample *action,
11230 struct mlx5_flow *dev_flow,
11231 const struct rte_flow_attr *attr,
11232 uint32_t *num_of_dest,
11233 void **sample_actions,
11234 struct mlx5_flow_dv_sample_resource *res,
11235 struct rte_flow_error *error)
11237 struct mlx5_priv *priv = dev->data->dev_private;
11238 const struct rte_flow_action *sub_actions;
11239 struct mlx5_flow_sub_actions_list *sample_act;
11240 struct mlx5_flow_sub_actions_idx *sample_idx;
11241 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11242 struct rte_flow *flow = dev_flow->flow;
11243 struct mlx5_flow_rss_desc *rss_desc;
11244 uint64_t action_flags = 0;
11247 rss_desc = &wks->rss_desc;
11248 sample_act = &res->sample_act;
11249 sample_idx = &res->sample_idx;
11250 res->ratio = action->ratio;
11251 sub_actions = action->actions;
11252 for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11253 int type = sub_actions->type;
11254 uint32_t pre_rix = 0;
11257 case RTE_FLOW_ACTION_TYPE_QUEUE:
11259 const struct rte_flow_action_queue *queue;
11260 struct mlx5_hrxq *hrxq;
11263 queue = sub_actions->conf;
11264 rss_desc->queue_num = 1;
11265 rss_desc->queue[0] = queue->index;
11266 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11267 rss_desc, &hrxq_idx);
11269 return rte_flow_error_set
11271 RTE_FLOW_ERROR_TYPE_ACTION,
11273 "cannot create fate queue");
11274 sample_act->dr_queue_action = hrxq->action;
11275 sample_idx->rix_hrxq = hrxq_idx;
11276 sample_actions[sample_act->actions_num++] =
11279 action_flags |= MLX5_FLOW_ACTION_QUEUE;
11280 if (action_flags & MLX5_FLOW_ACTION_MARK)
11281 dev_flow->handle->rix_hrxq = hrxq_idx;
11282 dev_flow->handle->fate_action =
11283 MLX5_FLOW_FATE_QUEUE;
11286 case RTE_FLOW_ACTION_TYPE_RSS:
11288 struct mlx5_hrxq *hrxq;
11290 const struct rte_flow_action_rss *rss;
11291 const uint8_t *rss_key;
11293 rss = sub_actions->conf;
11294 memcpy(rss_desc->queue, rss->queue,
11295 rss->queue_num * sizeof(uint16_t));
11296 rss_desc->queue_num = rss->queue_num;
11297 /* NULL RSS key indicates default RSS key. */
11298 rss_key = !rss->key ? rss_hash_default_key : rss->key;
11299 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11301 * rss->level and rss.types should be set in advance
11302 * when expanding items for RSS.
11304 flow_dv_hashfields_set(dev_flow, rss_desc);
11305 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11306 rss_desc, &hrxq_idx);
11308 return rte_flow_error_set
11310 RTE_FLOW_ERROR_TYPE_ACTION,
11312 "cannot create fate queue");
11313 sample_act->dr_queue_action = hrxq->action;
11314 sample_idx->rix_hrxq = hrxq_idx;
11315 sample_actions[sample_act->actions_num++] =
11318 action_flags |= MLX5_FLOW_ACTION_RSS;
11319 if (action_flags & MLX5_FLOW_ACTION_MARK)
11320 dev_flow->handle->rix_hrxq = hrxq_idx;
11321 dev_flow->handle->fate_action =
11322 MLX5_FLOW_FATE_QUEUE;
11325 case RTE_FLOW_ACTION_TYPE_MARK:
11327 uint32_t tag_be = mlx5_flow_mark_set
11328 (((const struct rte_flow_action_mark *)
11329 (sub_actions->conf))->id);
11331 dev_flow->handle->mark = 1;
11332 pre_rix = dev_flow->handle->dvh.rix_tag;
11333 /* Save the mark resource before sample */
11334 pre_r = dev_flow->dv.tag_resource;
11335 if (flow_dv_tag_resource_register(dev, tag_be,
11338 MLX5_ASSERT(dev_flow->dv.tag_resource);
11339 sample_act->dr_tag_action =
11340 dev_flow->dv.tag_resource->action;
11341 sample_idx->rix_tag =
11342 dev_flow->handle->dvh.rix_tag;
11343 sample_actions[sample_act->actions_num++] =
11344 sample_act->dr_tag_action;
11345 /* Recover the mark resource after sample */
11346 dev_flow->dv.tag_resource = pre_r;
11347 dev_flow->handle->dvh.rix_tag = pre_rix;
11348 action_flags |= MLX5_FLOW_ACTION_MARK;
11351 case RTE_FLOW_ACTION_TYPE_COUNT:
11353 if (!flow->counter) {
11355 flow_dv_translate_create_counter(dev,
11356 dev_flow, sub_actions->conf,
11358 if (!flow->counter)
11359 return rte_flow_error_set
11361 RTE_FLOW_ERROR_TYPE_ACTION,
11363 "cannot create counter"
11366 sample_act->dr_cnt_action =
11367 (flow_dv_counter_get_by_idx(dev,
11368 flow->counter, NULL))->action;
11369 sample_actions[sample_act->actions_num++] =
11370 sample_act->dr_cnt_action;
11371 action_flags |= MLX5_FLOW_ACTION_COUNT;
11374 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11376 struct mlx5_flow_dv_port_id_action_resource
11378 uint32_t port_id = 0;
11380 memset(&port_id_resource, 0, sizeof(port_id_resource));
11381 /* Save the port id resource before sample */
11382 pre_rix = dev_flow->handle->rix_port_id_action;
11383 pre_r = dev_flow->dv.port_id_action;
11384 if (flow_dv_translate_action_port_id(dev, sub_actions,
11387 port_id_resource.port_id = port_id;
11388 if (flow_dv_port_id_action_resource_register
11389 (dev, &port_id_resource, dev_flow, error))
11391 sample_act->dr_port_id_action =
11392 dev_flow->dv.port_id_action->action;
11393 sample_idx->rix_port_id_action =
11394 dev_flow->handle->rix_port_id_action;
11395 sample_actions[sample_act->actions_num++] =
11396 sample_act->dr_port_id_action;
11397 /* Recover the port id resource after sample */
11398 dev_flow->dv.port_id_action = pre_r;
11399 dev_flow->handle->rix_port_id_action = pre_rix;
11401 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11404 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11405 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11406 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11407 /* Save the encap resource before sample */
11408 pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11409 pre_r = dev_flow->dv.encap_decap;
11410 if (flow_dv_create_action_l2_encap(dev, sub_actions,
11415 sample_act->dr_encap_action =
11416 dev_flow->dv.encap_decap->action;
11417 sample_idx->rix_encap_decap =
11418 dev_flow->handle->dvh.rix_encap_decap;
11419 sample_actions[sample_act->actions_num++] =
11420 sample_act->dr_encap_action;
11421 /* Recover the encap resource after sample */
11422 dev_flow->dv.encap_decap = pre_r;
11423 dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11424 action_flags |= MLX5_FLOW_ACTION_ENCAP;
11427 return rte_flow_error_set(error, EINVAL,
11428 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11430 "Not support for sampler action");
11433 sample_act->action_flags = action_flags;
11434 res->ft_id = dev_flow->dv.group;
11435 if (attr->transfer) {
11437 uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11438 uint64_t set_action;
11439 } action_ctx = { .set_action = 0 };
11441 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11442 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11443 MLX5_MODIFICATION_TYPE_SET);
11444 MLX5_SET(set_action_in, action_ctx.action_in, field,
11445 MLX5_MODI_META_REG_C_0);
11446 MLX5_SET(set_action_in, action_ctx.action_in, data,
11447 priv->vport_meta_tag);
11448 res->set_action = action_ctx.set_action;
11449 } else if (attr->ingress) {
11450 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11452 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11458 * Convert Sample action to DV specification.
11461 * Pointer to rte_eth_dev structure.
11462 * @param[in, out] dev_flow
11463 * Pointer to the mlx5_flow.
11464 * @param[in] num_of_dest
11465 * The num of destination.
11466 * @param[in, out] res
11467 * Pointer to sample resource.
11468 * @param[in, out] mdest_res
11469 * Pointer to destination array resource.
11470 * @param[in] sample_actions
11471 * Pointer to sample path actions list.
11472 * @param[in] action_flags
11473 * Holds the actions detected until now.
11474 * @param[out] error
11475 * Pointer to the error structure.
11478 * 0 on success, a negative errno value otherwise and rte_errno is set.
11481 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11482 struct mlx5_flow *dev_flow,
11483 uint32_t num_of_dest,
11484 struct mlx5_flow_dv_sample_resource *res,
11485 struct mlx5_flow_dv_dest_array_resource *mdest_res,
11486 void **sample_actions,
11487 uint64_t action_flags,
11488 struct rte_flow_error *error)
11490 /* update normal path action resource into last index of array */
11491 uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11492 struct mlx5_flow_sub_actions_list *sample_act =
11493 &mdest_res->sample_act[dest_index];
11494 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11495 struct mlx5_flow_rss_desc *rss_desc;
11496 uint32_t normal_idx = 0;
11497 struct mlx5_hrxq *hrxq;
11501 rss_desc = &wks->rss_desc;
11502 if (num_of_dest > 1) {
11503 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11504 /* Handle QP action for mirroring */
11505 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11506 rss_desc, &hrxq_idx);
11508 return rte_flow_error_set
11510 RTE_FLOW_ERROR_TYPE_ACTION,
11512 "cannot create rx queue");
11514 mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11515 sample_act->dr_queue_action = hrxq->action;
11516 if (action_flags & MLX5_FLOW_ACTION_MARK)
11517 dev_flow->handle->rix_hrxq = hrxq_idx;
11518 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11520 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11522 mdest_res->sample_idx[dest_index].rix_encap_decap =
11523 dev_flow->handle->dvh.rix_encap_decap;
11524 sample_act->dr_encap_action =
11525 dev_flow->dv.encap_decap->action;
11526 dev_flow->handle->dvh.rix_encap_decap = 0;
11528 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11530 mdest_res->sample_idx[dest_index].rix_port_id_action =
11531 dev_flow->handle->rix_port_id_action;
11532 sample_act->dr_port_id_action =
11533 dev_flow->dv.port_id_action->action;
11534 dev_flow->handle->rix_port_id_action = 0;
11536 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11538 mdest_res->sample_idx[dest_index].rix_jump =
11539 dev_flow->handle->rix_jump;
11540 sample_act->dr_jump_action =
11541 dev_flow->dv.jump->action;
11542 dev_flow->handle->rix_jump = 0;
11544 sample_act->actions_num = normal_idx;
11545 /* update sample action resource into first index of array */
11546 mdest_res->ft_type = res->ft_type;
11547 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11548 sizeof(struct mlx5_flow_sub_actions_idx));
11549 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11550 sizeof(struct mlx5_flow_sub_actions_list));
11551 mdest_res->num_of_dest = num_of_dest;
11552 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11554 return rte_flow_error_set(error, EINVAL,
11555 RTE_FLOW_ERROR_TYPE_ACTION,
11556 NULL, "can't create sample "
11559 res->sub_actions = sample_actions;
11560 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11561 return rte_flow_error_set(error, EINVAL,
11562 RTE_FLOW_ERROR_TYPE_ACTION,
11564 "can't create sample action");
11570 * Remove an ASO age action from age actions list.
11573 * Pointer to the Ethernet device structure.
11575 * Pointer to the aso age action handler.
11578 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11579 struct mlx5_aso_age_action *age)
11581 struct mlx5_age_info *age_info;
11582 struct mlx5_age_param *age_param = &age->age_params;
11583 struct mlx5_priv *priv = dev->data->dev_private;
11584 uint16_t expected = AGE_CANDIDATE;
11586 age_info = GET_PORT_AGE_INFO(priv);
11587 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11588 AGE_FREE, false, __ATOMIC_RELAXED,
11589 __ATOMIC_RELAXED)) {
11591 * We need the lock even it is age timeout,
11592 * since age action may still in process.
11594 rte_spinlock_lock(&age_info->aged_sl);
11595 LIST_REMOVE(age, next);
11596 rte_spinlock_unlock(&age_info->aged_sl);
11597 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11602 * Release an ASO age action.
11605 * Pointer to the Ethernet device structure.
11606 * @param[in] age_idx
11607 * Index of ASO age action to release.
11609 * True if the release operation is during flow destroy operation.
11610 * False if the release operation is during action destroy operation.
11613 * 0 when age action was removed, otherwise the number of references.
11616 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11618 struct mlx5_priv *priv = dev->data->dev_private;
11619 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11620 struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11621 uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11624 flow_dv_aso_age_remove_from_age(dev, age);
11625 rte_spinlock_lock(&mng->free_sl);
11626 LIST_INSERT_HEAD(&mng->free, age, next);
11627 rte_spinlock_unlock(&mng->free_sl);
11633 * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11636 * Pointer to the Ethernet device structure.
11639 * 0 on success, otherwise negative errno value and rte_errno is set.
11642 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11644 struct mlx5_priv *priv = dev->data->dev_private;
11645 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11646 void *old_pools = mng->pools;
11647 uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11648 uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11649 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11652 rte_errno = ENOMEM;
11656 memcpy(pools, old_pools,
11657 mng->n * sizeof(struct mlx5_flow_counter_pool *));
11658 mlx5_free(old_pools);
11660 /* First ASO flow hit allocation - starting ASO data-path. */
11661 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11669 mng->pools = pools;
11674 * Create and initialize a new ASO aging pool.
11677 * Pointer to the Ethernet device structure.
11678 * @param[out] age_free
11679 * Where to put the pointer of a new age action.
11682 * The age actions pool pointer and @p age_free is set on success,
11683 * NULL otherwise and rte_errno is set.
11685 static struct mlx5_aso_age_pool *
11686 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11687 struct mlx5_aso_age_action **age_free)
11689 struct mlx5_priv *priv = dev->data->dev_private;
11690 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11691 struct mlx5_aso_age_pool *pool = NULL;
11692 struct mlx5_devx_obj *obj = NULL;
11695 obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11698 rte_errno = ENODATA;
11699 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11702 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11704 claim_zero(mlx5_devx_cmd_destroy(obj));
11705 rte_errno = ENOMEM;
11708 pool->flow_hit_aso_obj = obj;
11709 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11710 rte_spinlock_lock(&mng->resize_sl);
11711 pool->index = mng->next;
11712 /* Resize pools array if there is no room for the new pool in it. */
11713 if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11714 claim_zero(mlx5_devx_cmd_destroy(obj));
11716 rte_spinlock_unlock(&mng->resize_sl);
11719 mng->pools[pool->index] = pool;
11721 rte_spinlock_unlock(&mng->resize_sl);
11722 /* Assign the first action in the new pool, the rest go to free list. */
11723 *age_free = &pool->actions[0];
11724 for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11725 pool->actions[i].offset = i;
11726 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11732 * Allocate a ASO aging bit.
11735 * Pointer to the Ethernet device structure.
11736 * @param[out] error
11737 * Pointer to the error structure.
11740 * Index to ASO age action on success, 0 otherwise and rte_errno is set.
11743 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11745 struct mlx5_priv *priv = dev->data->dev_private;
11746 const struct mlx5_aso_age_pool *pool;
11747 struct mlx5_aso_age_action *age_free = NULL;
11748 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11751 /* Try to get the next free age action bit. */
11752 rte_spinlock_lock(&mng->free_sl);
11753 age_free = LIST_FIRST(&mng->free);
11755 LIST_REMOVE(age_free, next);
11756 } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11757 rte_spinlock_unlock(&mng->free_sl);
11758 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11759 NULL, "failed to create ASO age pool");
11760 return 0; /* 0 is an error. */
11762 rte_spinlock_unlock(&mng->free_sl);
11763 pool = container_of
11764 ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11765 (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11767 if (!age_free->dr_action) {
11768 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11772 rte_flow_error_set(error, rte_errno,
11773 RTE_FLOW_ERROR_TYPE_ACTION,
11774 NULL, "failed to get reg_c "
11775 "for ASO flow hit");
11776 return 0; /* 0 is an error. */
11778 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11779 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11780 (priv->sh->rx_domain,
11781 pool->flow_hit_aso_obj->obj, age_free->offset,
11782 MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11783 (reg_c - REG_C_0));
11784 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11785 if (!age_free->dr_action) {
11787 rte_spinlock_lock(&mng->free_sl);
11788 LIST_INSERT_HEAD(&mng->free, age_free, next);
11789 rte_spinlock_unlock(&mng->free_sl);
11790 rte_flow_error_set(error, rte_errno,
11791 RTE_FLOW_ERROR_TYPE_ACTION,
11792 NULL, "failed to create ASO "
11793 "flow hit action");
11794 return 0; /* 0 is an error. */
11797 __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
11798 return pool->index | ((age_free->offset + 1) << 16);
11802 * Initialize flow ASO age parameters.
11805 * Pointer to rte_eth_dev structure.
11806 * @param[in] age_idx
11807 * Index of ASO age action.
11808 * @param[in] context
11809 * Pointer to flow counter age context.
11810 * @param[in] timeout
11811 * Aging timeout in seconds.
11815 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
11820 struct mlx5_aso_age_action *aso_age;
11822 aso_age = flow_aso_age_get_by_idx(dev, age_idx);
11823 MLX5_ASSERT(aso_age);
11824 aso_age->age_params.context = context;
11825 aso_age->age_params.timeout = timeout;
11826 aso_age->age_params.port_id = dev->data->port_id;
11827 __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
11829 __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
11834 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
11835 const struct rte_flow_item_integrity *value,
11836 void *headers_m, void *headers_v)
11839 /* application l4_ok filter aggregates all hardware l4 filters
11840 * therefore hw l4_checksum_ok must be implicitly added here.
11842 struct rte_flow_item_integrity local_item;
11844 local_item.l4_csum_ok = 1;
11845 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11846 local_item.l4_csum_ok);
11847 if (value->l4_ok) {
11848 /* application l4_ok = 1 matches sets both hw flags
11849 * l4_ok and l4_checksum_ok flags to 1.
11851 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11852 l4_checksum_ok, local_item.l4_csum_ok);
11853 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
11855 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
11858 /* application l4_ok = 0 matches on hw flag
11859 * l4_checksum_ok = 0 only.
11861 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11862 l4_checksum_ok, 0);
11864 } else if (mask->l4_csum_ok) {
11865 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11867 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
11868 value->l4_csum_ok);
11873 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
11874 const struct rte_flow_item_integrity *value,
11875 void *headers_m, void *headers_v,
11879 /* application l3_ok filter aggregates all hardware l3 filters
11880 * therefore hw ipv4_checksum_ok must be implicitly added here.
11882 struct rte_flow_item_integrity local_item;
11884 local_item.ipv4_csum_ok = !!is_ipv4;
11885 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
11886 local_item.ipv4_csum_ok);
11887 if (value->l3_ok) {
11888 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11889 ipv4_checksum_ok, local_item.ipv4_csum_ok);
11890 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
11892 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
11895 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11896 ipv4_checksum_ok, 0);
11898 } else if (mask->ipv4_csum_ok) {
11899 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
11900 mask->ipv4_csum_ok);
11901 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
11902 value->ipv4_csum_ok);
11907 flow_dv_translate_item_integrity(void *matcher, void *key,
11908 const struct rte_flow_item *head_item,
11909 const struct rte_flow_item *integrity_item)
11911 const struct rte_flow_item_integrity *mask = integrity_item->mask;
11912 const struct rte_flow_item_integrity *value = integrity_item->spec;
11913 const struct rte_flow_item *tunnel_item, *end_item, *item;
11916 uint32_t l3_protocol;
11921 mask = &rte_flow_item_integrity_mask;
11922 if (value->level > 1) {
11923 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
11925 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
11927 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
11929 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
11931 tunnel_item = mlx5_flow_find_tunnel_item(head_item);
11932 if (value->level > 1) {
11933 /* tunnel item was verified during the item validation */
11934 item = tunnel_item;
11935 end_item = mlx5_find_end_item(tunnel_item);
11938 end_item = tunnel_item ? tunnel_item :
11939 mlx5_find_end_item(integrity_item);
11941 l3_protocol = mask->l3_ok ?
11942 mlx5_flow_locate_proto_l3(&item, end_item) : 0;
11943 flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
11944 l3_protocol == RTE_ETHER_TYPE_IPV4);
11945 flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
11949 * Prepares DV flow counter with aging configuration.
11950 * Gets it by index when exists, creates a new one when doesn't.
11953 * Pointer to rte_eth_dev structure.
11954 * @param[in] dev_flow
11955 * Pointer to the mlx5_flow.
11956 * @param[in, out] flow
11957 * Pointer to the sub flow.
11959 * Pointer to the counter action configuration.
11961 * Pointer to the aging action configuration.
11962 * @param[out] error
11963 * Pointer to the error structure.
11966 * Pointer to the counter, NULL otherwise.
11968 static struct mlx5_flow_counter *
11969 flow_dv_prepare_counter(struct rte_eth_dev *dev,
11970 struct mlx5_flow *dev_flow,
11971 struct rte_flow *flow,
11972 const struct rte_flow_action_count *count,
11973 const struct rte_flow_action_age *age,
11974 struct rte_flow_error *error)
11976 if (!flow->counter) {
11977 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
11979 if (!flow->counter) {
11980 rte_flow_error_set(error, rte_errno,
11981 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11982 "cannot create counter object.");
11986 return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
11990 * Release an ASO CT action by its own device.
11993 * Pointer to the Ethernet device structure.
11995 * Index of ASO CT action to release.
11998 * 0 when CT action was removed, otherwise the number of references.
12001 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12003 struct mlx5_priv *priv = dev->data->dev_private;
12004 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12006 struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12007 enum mlx5_aso_ct_state state =
12008 __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12010 /* Cannot release when CT is in the ASO SQ. */
12011 if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12013 ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12015 if (ct->dr_action_orig) {
12016 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12017 claim_zero(mlx5_glue->destroy_flow_action
12018 (ct->dr_action_orig));
12020 ct->dr_action_orig = NULL;
12022 if (ct->dr_action_rply) {
12023 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12024 claim_zero(mlx5_glue->destroy_flow_action
12025 (ct->dr_action_rply));
12027 ct->dr_action_rply = NULL;
12029 /* Clear the state to free, no need in 1st allocation. */
12030 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12031 rte_spinlock_lock(&mng->ct_sl);
12032 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12033 rte_spinlock_unlock(&mng->ct_sl);
12039 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx)
12041 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12042 uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12043 struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12046 MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12047 if (dev->data->dev_started != 1)
12049 return flow_dv_aso_ct_dev_release(owndev, idx);
12053 * Resize the ASO CT pools array by 64 pools.
12056 * Pointer to the Ethernet device structure.
12059 * 0 on success, otherwise negative errno value and rte_errno is set.
12062 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12064 struct mlx5_priv *priv = dev->data->dev_private;
12065 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12066 void *old_pools = mng->pools;
12067 /* Magic number now, need a macro. */
12068 uint32_t resize = mng->n + 64;
12069 uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12070 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12073 rte_errno = ENOMEM;
12076 rte_rwlock_write_lock(&mng->resize_rwl);
12077 /* ASO SQ/QP was already initialized in the startup. */
12079 /* Realloc could be an alternative choice. */
12080 rte_memcpy(pools, old_pools,
12081 mng->n * sizeof(struct mlx5_aso_ct_pool *));
12082 mlx5_free(old_pools);
12085 mng->pools = pools;
12086 rte_rwlock_write_unlock(&mng->resize_rwl);
12091 * Create and initialize a new ASO CT pool.
12094 * Pointer to the Ethernet device structure.
12095 * @param[out] ct_free
12096 * Where to put the pointer of a new CT action.
12099 * The CT actions pool pointer and @p ct_free is set on success,
12100 * NULL otherwise and rte_errno is set.
12102 static struct mlx5_aso_ct_pool *
12103 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12104 struct mlx5_aso_ct_action **ct_free)
12106 struct mlx5_priv *priv = dev->data->dev_private;
12107 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12108 struct mlx5_aso_ct_pool *pool = NULL;
12109 struct mlx5_devx_obj *obj = NULL;
12111 uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12113 obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
12114 priv->sh->pdn, log_obj_size);
12116 rte_errno = ENODATA;
12117 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12120 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12122 rte_errno = ENOMEM;
12123 claim_zero(mlx5_devx_cmd_destroy(obj));
12126 pool->devx_obj = obj;
12127 pool->index = mng->next;
12128 /* Resize pools array if there is no room for the new pool in it. */
12129 if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12130 claim_zero(mlx5_devx_cmd_destroy(obj));
12134 mng->pools[pool->index] = pool;
12136 /* Assign the first action in the new pool, the rest go to free list. */
12137 *ct_free = &pool->actions[0];
12138 /* Lock outside, the list operation is safe here. */
12139 for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12140 /* refcnt is 0 when allocating the memory. */
12141 pool->actions[i].offset = i;
12142 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12148 * Allocate a ASO CT action from free list.
12151 * Pointer to the Ethernet device structure.
12152 * @param[out] error
12153 * Pointer to the error structure.
12156 * Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12159 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12161 struct mlx5_priv *priv = dev->data->dev_private;
12162 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12163 struct mlx5_aso_ct_action *ct = NULL;
12164 struct mlx5_aso_ct_pool *pool;
12169 if (!priv->config.devx) {
12170 rte_errno = ENOTSUP;
12173 /* Get a free CT action, if no, a new pool will be created. */
12174 rte_spinlock_lock(&mng->ct_sl);
12175 ct = LIST_FIRST(&mng->free_cts);
12177 LIST_REMOVE(ct, next);
12178 } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12179 rte_spinlock_unlock(&mng->ct_sl);
12180 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12181 NULL, "failed to create ASO CT pool");
12184 rte_spinlock_unlock(&mng->ct_sl);
12185 pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12186 ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12187 /* 0: inactive, 1: created, 2+: used by flows. */
12188 __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12189 reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12190 if (!ct->dr_action_orig) {
12191 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12192 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12193 (priv->sh->rx_domain, pool->devx_obj->obj,
12195 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12198 RTE_SET_USED(reg_c);
12200 if (!ct->dr_action_orig) {
12201 flow_dv_aso_ct_dev_release(dev, ct_idx);
12202 rte_flow_error_set(error, rte_errno,
12203 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12204 "failed to create ASO CT action");
12208 if (!ct->dr_action_rply) {
12209 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12210 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12211 (priv->sh->rx_domain, pool->devx_obj->obj,
12213 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12216 if (!ct->dr_action_rply) {
12217 flow_dv_aso_ct_dev_release(dev, ct_idx);
12218 rte_flow_error_set(error, rte_errno,
12219 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12220 "failed to create ASO CT action");
12228 * Create a conntrack object with context and actions by using ASO mechanism.
12231 * Pointer to rte_eth_dev structure.
12233 * Pointer to conntrack information profile.
12234 * @param[out] error
12235 * Pointer to the error structure.
12238 * Index to conntrack object on success, 0 otherwise.
12241 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12242 const struct rte_flow_action_conntrack *pro,
12243 struct rte_flow_error *error)
12245 struct mlx5_priv *priv = dev->data->dev_private;
12246 struct mlx5_dev_ctx_shared *sh = priv->sh;
12247 struct mlx5_aso_ct_action *ct;
12250 if (!sh->ct_aso_en)
12251 return rte_flow_error_set(error, ENOTSUP,
12252 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12253 "Connection is not supported");
12254 idx = flow_dv_aso_ct_alloc(dev, error);
12256 return rte_flow_error_set(error, rte_errno,
12257 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12258 "Failed to allocate CT object");
12259 ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12260 if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12261 return rte_flow_error_set(error, EBUSY,
12262 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12263 "Failed to update CT");
12264 ct->is_original = !!pro->is_original_dir;
12265 ct->peer = pro->peer_port;
12270 * Fill the flow with DV spec, lock free
12271 * (mutex should be acquired by caller).
12274 * Pointer to rte_eth_dev structure.
12275 * @param[in, out] dev_flow
12276 * Pointer to the sub flow.
12278 * Pointer to the flow attributes.
12280 * Pointer to the list of items.
12281 * @param[in] actions
12282 * Pointer to the list of actions.
12283 * @param[out] error
12284 * Pointer to the error structure.
12287 * 0 on success, a negative errno value otherwise and rte_errno is set.
12290 flow_dv_translate(struct rte_eth_dev *dev,
12291 struct mlx5_flow *dev_flow,
12292 const struct rte_flow_attr *attr,
12293 const struct rte_flow_item items[],
12294 const struct rte_flow_action actions[],
12295 struct rte_flow_error *error)
12297 struct mlx5_priv *priv = dev->data->dev_private;
12298 struct mlx5_dev_config *dev_conf = &priv->config;
12299 struct rte_flow *flow = dev_flow->flow;
12300 struct mlx5_flow_handle *handle = dev_flow->handle;
12301 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12302 struct mlx5_flow_rss_desc *rss_desc;
12303 uint64_t item_flags = 0;
12304 uint64_t last_item = 0;
12305 uint64_t action_flags = 0;
12306 struct mlx5_flow_dv_matcher matcher = {
12308 .size = sizeof(matcher.mask.buf),
12312 bool actions_end = false;
12314 struct mlx5_flow_dv_modify_hdr_resource res;
12315 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12316 sizeof(struct mlx5_modification_cmd) *
12317 (MLX5_MAX_MODIFY_NUM + 1)];
12319 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12320 const struct rte_flow_action_count *count = NULL;
12321 const struct rte_flow_action_age *non_shared_age = NULL;
12322 union flow_dv_attr flow_attr = { .attr = 0 };
12324 union mlx5_flow_tbl_key tbl_key;
12325 uint32_t modify_action_position = UINT32_MAX;
12326 void *match_mask = matcher.mask.buf;
12327 void *match_value = dev_flow->dv.value.buf;
12328 uint8_t next_protocol = 0xff;
12329 struct rte_vlan_hdr vlan = { 0 };
12330 struct mlx5_flow_dv_dest_array_resource mdest_res;
12331 struct mlx5_flow_dv_sample_resource sample_res;
12332 void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12333 const struct rte_flow_action_sample *sample = NULL;
12334 struct mlx5_flow_sub_actions_list *sample_act;
12335 uint32_t sample_act_pos = UINT32_MAX;
12336 uint32_t age_act_pos = UINT32_MAX;
12337 uint32_t num_of_dest = 0;
12338 int tmp_actions_n = 0;
12341 const struct mlx5_flow_tunnel *tunnel = NULL;
12342 struct flow_grp_info grp_info = {
12343 .external = !!dev_flow->external,
12344 .transfer = !!attr->transfer,
12345 .fdb_def_rule = !!priv->fdb_def_rule,
12346 .skip_scale = dev_flow->skip_scale &
12347 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12348 .std_tbl_fix = true,
12350 const struct rte_flow_item *head_item = items;
12353 return rte_flow_error_set(error, ENOMEM,
12354 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12356 "failed to push flow workspace");
12357 rss_desc = &wks->rss_desc;
12358 memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12359 memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12360 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12361 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12362 /* update normal path action resource into last index of array */
12363 sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12364 if (is_tunnel_offload_active(dev)) {
12365 if (dev_flow->tunnel) {
12366 RTE_VERIFY(dev_flow->tof_type ==
12367 MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12368 tunnel = dev_flow->tunnel;
12370 tunnel = mlx5_get_tof(items, actions,
12371 &dev_flow->tof_type);
12372 dev_flow->tunnel = tunnel;
12374 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12375 (dev, attr, tunnel, dev_flow->tof_type);
12377 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12378 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12379 ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12383 dev_flow->dv.group = table;
12384 if (attr->transfer)
12385 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12386 /* number of actions must be set to 0 in case of dirty stack. */
12387 mhdr_res->actions_num = 0;
12388 if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12390 * do not add decap action if match rule drops packet
12391 * HW rejects rules with decap & drop
12393 * if tunnel match rule was inserted before matching tunnel set
12394 * rule flow table used in the match rule must be registered.
12395 * current implementation handles that in the
12396 * flow_dv_match_register() at the function end.
12398 bool add_decap = true;
12399 const struct rte_flow_action *ptr = actions;
12401 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12402 if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12408 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12412 dev_flow->dv.actions[actions_n++] =
12413 dev_flow->dv.encap_decap->action;
12414 action_flags |= MLX5_FLOW_ACTION_DECAP;
12417 for (; !actions_end ; actions++) {
12418 const struct rte_flow_action_queue *queue;
12419 const struct rte_flow_action_rss *rss;
12420 const struct rte_flow_action *action = actions;
12421 const uint8_t *rss_key;
12422 struct mlx5_flow_tbl_resource *tbl;
12423 struct mlx5_aso_age_action *age_act;
12424 struct mlx5_flow_counter *cnt_act;
12425 uint32_t port_id = 0;
12426 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12427 int action_type = actions->type;
12428 const struct rte_flow_action *found_action = NULL;
12429 uint32_t jump_group = 0;
12430 uint32_t owner_idx;
12431 struct mlx5_aso_ct_action *ct;
12433 if (!mlx5_flow_os_action_supported(action_type))
12434 return rte_flow_error_set(error, ENOTSUP,
12435 RTE_FLOW_ERROR_TYPE_ACTION,
12437 "action not supported");
12438 switch (action_type) {
12439 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12440 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12442 case RTE_FLOW_ACTION_TYPE_VOID:
12444 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12445 if (flow_dv_translate_action_port_id(dev, action,
12448 port_id_resource.port_id = port_id;
12449 MLX5_ASSERT(!handle->rix_port_id_action);
12450 if (flow_dv_port_id_action_resource_register
12451 (dev, &port_id_resource, dev_flow, error))
12453 dev_flow->dv.actions[actions_n++] =
12454 dev_flow->dv.port_id_action->action;
12455 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12456 dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12457 sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12460 case RTE_FLOW_ACTION_TYPE_FLAG:
12461 action_flags |= MLX5_FLOW_ACTION_FLAG;
12462 dev_flow->handle->mark = 1;
12463 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12464 struct rte_flow_action_mark mark = {
12465 .id = MLX5_FLOW_MARK_DEFAULT,
12468 if (flow_dv_convert_action_mark(dev, &mark,
12472 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12475 tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12477 * Only one FLAG or MARK is supported per device flow
12478 * right now. So the pointer to the tag resource must be
12479 * zero before the register process.
12481 MLX5_ASSERT(!handle->dvh.rix_tag);
12482 if (flow_dv_tag_resource_register(dev, tag_be,
12485 MLX5_ASSERT(dev_flow->dv.tag_resource);
12486 dev_flow->dv.actions[actions_n++] =
12487 dev_flow->dv.tag_resource->action;
12489 case RTE_FLOW_ACTION_TYPE_MARK:
12490 action_flags |= MLX5_FLOW_ACTION_MARK;
12491 dev_flow->handle->mark = 1;
12492 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12493 const struct rte_flow_action_mark *mark =
12494 (const struct rte_flow_action_mark *)
12497 if (flow_dv_convert_action_mark(dev, mark,
12501 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12505 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12506 /* Legacy (non-extensive) MARK action. */
12507 tag_be = mlx5_flow_mark_set
12508 (((const struct rte_flow_action_mark *)
12509 (actions->conf))->id);
12510 MLX5_ASSERT(!handle->dvh.rix_tag);
12511 if (flow_dv_tag_resource_register(dev, tag_be,
12514 MLX5_ASSERT(dev_flow->dv.tag_resource);
12515 dev_flow->dv.actions[actions_n++] =
12516 dev_flow->dv.tag_resource->action;
12518 case RTE_FLOW_ACTION_TYPE_SET_META:
12519 if (flow_dv_convert_action_set_meta
12520 (dev, mhdr_res, attr,
12521 (const struct rte_flow_action_set_meta *)
12522 actions->conf, error))
12524 action_flags |= MLX5_FLOW_ACTION_SET_META;
12526 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12527 if (flow_dv_convert_action_set_tag
12529 (const struct rte_flow_action_set_tag *)
12530 actions->conf, error))
12532 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12534 case RTE_FLOW_ACTION_TYPE_DROP:
12535 action_flags |= MLX5_FLOW_ACTION_DROP;
12536 dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12538 case RTE_FLOW_ACTION_TYPE_QUEUE:
12539 queue = actions->conf;
12540 rss_desc->queue_num = 1;
12541 rss_desc->queue[0] = queue->index;
12542 action_flags |= MLX5_FLOW_ACTION_QUEUE;
12543 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12544 sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12547 case RTE_FLOW_ACTION_TYPE_RSS:
12548 rss = actions->conf;
12549 memcpy(rss_desc->queue, rss->queue,
12550 rss->queue_num * sizeof(uint16_t));
12551 rss_desc->queue_num = rss->queue_num;
12552 /* NULL RSS key indicates default RSS key. */
12553 rss_key = !rss->key ? rss_hash_default_key : rss->key;
12554 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12556 * rss->level and rss.types should be set in advance
12557 * when expanding items for RSS.
12559 action_flags |= MLX5_FLOW_ACTION_RSS;
12560 dev_flow->handle->fate_action = rss_desc->shared_rss ?
12561 MLX5_FLOW_FATE_SHARED_RSS :
12562 MLX5_FLOW_FATE_QUEUE;
12564 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12565 flow->age = (uint32_t)(uintptr_t)(action->conf);
12566 age_act = flow_aso_age_get_by_idx(dev, flow->age);
12567 __atomic_fetch_add(&age_act->refcnt, 1,
12569 age_act_pos = actions_n++;
12570 action_flags |= MLX5_FLOW_ACTION_AGE;
12572 case RTE_FLOW_ACTION_TYPE_AGE:
12573 non_shared_age = action->conf;
12574 age_act_pos = actions_n++;
12575 action_flags |= MLX5_FLOW_ACTION_AGE;
12577 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12578 flow->counter = (uint32_t)(uintptr_t)(action->conf);
12579 cnt_act = flow_dv_counter_get_by_idx(dev, flow->counter,
12581 __atomic_fetch_add(&cnt_act->shared_info.refcnt, 1,
12583 /* Save information first, will apply later. */
12584 action_flags |= MLX5_FLOW_ACTION_COUNT;
12586 case RTE_FLOW_ACTION_TYPE_COUNT:
12587 if (!dev_conf->devx) {
12588 return rte_flow_error_set
12590 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12592 "count action not supported");
12594 /* Save information first, will apply later. */
12595 count = action->conf;
12596 action_flags |= MLX5_FLOW_ACTION_COUNT;
12598 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12599 dev_flow->dv.actions[actions_n++] =
12600 priv->sh->pop_vlan_action;
12601 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12603 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12604 if (!(action_flags &
12605 MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12606 flow_dev_get_vlan_info_from_items(items, &vlan);
12607 vlan.eth_proto = rte_be_to_cpu_16
12608 ((((const struct rte_flow_action_of_push_vlan *)
12609 actions->conf)->ethertype));
12610 found_action = mlx5_flow_find_action
12612 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12614 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12615 found_action = mlx5_flow_find_action
12617 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12619 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12620 if (flow_dv_create_action_push_vlan
12621 (dev, attr, &vlan, dev_flow, error))
12623 dev_flow->dv.actions[actions_n++] =
12624 dev_flow->dv.push_vlan_res->action;
12625 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12627 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12628 /* of_vlan_push action handled this action */
12629 MLX5_ASSERT(action_flags &
12630 MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12632 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12633 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12635 flow_dev_get_vlan_info_from_items(items, &vlan);
12636 mlx5_update_vlan_vid_pcp(actions, &vlan);
12637 /* If no VLAN push - this is a modify header action */
12638 if (flow_dv_convert_action_modify_vlan_vid
12639 (mhdr_res, actions, error))
12641 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12643 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12644 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12645 if (flow_dv_create_action_l2_encap(dev, actions,
12650 dev_flow->dv.actions[actions_n++] =
12651 dev_flow->dv.encap_decap->action;
12652 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12653 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12654 sample_act->action_flags |=
12655 MLX5_FLOW_ACTION_ENCAP;
12657 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12658 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12659 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12663 dev_flow->dv.actions[actions_n++] =
12664 dev_flow->dv.encap_decap->action;
12665 action_flags |= MLX5_FLOW_ACTION_DECAP;
12667 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12668 /* Handle encap with preceding decap. */
12669 if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12670 if (flow_dv_create_action_raw_encap
12671 (dev, actions, dev_flow, attr, error))
12673 dev_flow->dv.actions[actions_n++] =
12674 dev_flow->dv.encap_decap->action;
12676 /* Handle encap without preceding decap. */
12677 if (flow_dv_create_action_l2_encap
12678 (dev, actions, dev_flow, attr->transfer,
12681 dev_flow->dv.actions[actions_n++] =
12682 dev_flow->dv.encap_decap->action;
12684 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12685 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12686 sample_act->action_flags |=
12687 MLX5_FLOW_ACTION_ENCAP;
12689 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12690 while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12692 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12693 if (flow_dv_create_action_l2_decap
12694 (dev, dev_flow, attr->transfer, error))
12696 dev_flow->dv.actions[actions_n++] =
12697 dev_flow->dv.encap_decap->action;
12699 /* If decap is followed by encap, handle it at encap. */
12700 action_flags |= MLX5_FLOW_ACTION_DECAP;
12702 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12703 dev_flow->dv.actions[actions_n++] =
12704 (void *)(uintptr_t)action->conf;
12705 action_flags |= MLX5_FLOW_ACTION_JUMP;
12707 case RTE_FLOW_ACTION_TYPE_JUMP:
12708 jump_group = ((const struct rte_flow_action_jump *)
12709 action->conf)->group;
12710 grp_info.std_tbl_fix = 0;
12711 if (dev_flow->skip_scale &
12712 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12713 grp_info.skip_scale = 1;
12715 grp_info.skip_scale = 0;
12716 ret = mlx5_flow_group_to_table(dev, tunnel,
12722 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12724 !!dev_flow->external,
12725 tunnel, jump_group, 0,
12728 return rte_flow_error_set
12730 RTE_FLOW_ERROR_TYPE_ACTION,
12732 "cannot create jump action.");
12733 if (flow_dv_jump_tbl_resource_register
12734 (dev, tbl, dev_flow, error)) {
12735 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12736 return rte_flow_error_set
12738 RTE_FLOW_ERROR_TYPE_ACTION,
12740 "cannot create jump action.");
12742 dev_flow->dv.actions[actions_n++] =
12743 dev_flow->dv.jump->action;
12744 action_flags |= MLX5_FLOW_ACTION_JUMP;
12745 dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12746 sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12749 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12750 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12751 if (flow_dv_convert_action_modify_mac
12752 (mhdr_res, actions, error))
12754 action_flags |= actions->type ==
12755 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12756 MLX5_FLOW_ACTION_SET_MAC_SRC :
12757 MLX5_FLOW_ACTION_SET_MAC_DST;
12759 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12760 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12761 if (flow_dv_convert_action_modify_ipv4
12762 (mhdr_res, actions, error))
12764 action_flags |= actions->type ==
12765 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12766 MLX5_FLOW_ACTION_SET_IPV4_SRC :
12767 MLX5_FLOW_ACTION_SET_IPV4_DST;
12769 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12770 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12771 if (flow_dv_convert_action_modify_ipv6
12772 (mhdr_res, actions, error))
12774 action_flags |= actions->type ==
12775 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
12776 MLX5_FLOW_ACTION_SET_IPV6_SRC :
12777 MLX5_FLOW_ACTION_SET_IPV6_DST;
12779 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
12780 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
12781 if (flow_dv_convert_action_modify_tp
12782 (mhdr_res, actions, items,
12783 &flow_attr, dev_flow, !!(action_flags &
12784 MLX5_FLOW_ACTION_DECAP), error))
12786 action_flags |= actions->type ==
12787 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
12788 MLX5_FLOW_ACTION_SET_TP_SRC :
12789 MLX5_FLOW_ACTION_SET_TP_DST;
12791 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
12792 if (flow_dv_convert_action_modify_dec_ttl
12793 (mhdr_res, items, &flow_attr, dev_flow,
12795 MLX5_FLOW_ACTION_DECAP), error))
12797 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
12799 case RTE_FLOW_ACTION_TYPE_SET_TTL:
12800 if (flow_dv_convert_action_modify_ttl
12801 (mhdr_res, actions, items, &flow_attr,
12802 dev_flow, !!(action_flags &
12803 MLX5_FLOW_ACTION_DECAP), error))
12805 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
12807 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
12808 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
12809 if (flow_dv_convert_action_modify_tcp_seq
12810 (mhdr_res, actions, error))
12812 action_flags |= actions->type ==
12813 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
12814 MLX5_FLOW_ACTION_INC_TCP_SEQ :
12815 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
12818 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
12819 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
12820 if (flow_dv_convert_action_modify_tcp_ack
12821 (mhdr_res, actions, error))
12823 action_flags |= actions->type ==
12824 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
12825 MLX5_FLOW_ACTION_INC_TCP_ACK :
12826 MLX5_FLOW_ACTION_DEC_TCP_ACK;
12828 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
12829 if (flow_dv_convert_action_set_reg
12830 (mhdr_res, actions, error))
12832 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12834 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
12835 if (flow_dv_convert_action_copy_mreg
12836 (dev, mhdr_res, actions, error))
12838 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12840 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
12841 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
12842 dev_flow->handle->fate_action =
12843 MLX5_FLOW_FATE_DEFAULT_MISS;
12845 case RTE_FLOW_ACTION_TYPE_METER:
12847 return rte_flow_error_set(error, rte_errno,
12848 RTE_FLOW_ERROR_TYPE_ACTION,
12849 NULL, "Failed to get meter in flow.");
12850 /* Set the meter action. */
12851 dev_flow->dv.actions[actions_n++] =
12852 wks->fm->meter_action;
12853 action_flags |= MLX5_FLOW_ACTION_METER;
12855 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
12856 if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
12859 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
12861 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
12862 if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
12865 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
12867 case RTE_FLOW_ACTION_TYPE_SAMPLE:
12868 sample_act_pos = actions_n;
12869 sample = (const struct rte_flow_action_sample *)
12872 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
12873 /* put encap action into group if work with port id */
12874 if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
12875 (action_flags & MLX5_FLOW_ACTION_PORT_ID))
12876 sample_act->action_flags |=
12877 MLX5_FLOW_ACTION_ENCAP;
12879 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
12880 if (flow_dv_convert_action_modify_field
12881 (dev, mhdr_res, actions, attr, error))
12883 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
12885 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
12886 owner_idx = (uint32_t)(uintptr_t)action->conf;
12887 ct = flow_aso_ct_get_by_idx(dev, owner_idx);
12889 return rte_flow_error_set(error, EINVAL,
12890 RTE_FLOW_ERROR_TYPE_ACTION,
12892 "Failed to get CT object.");
12893 if (mlx5_aso_ct_available(priv->sh, ct))
12894 return rte_flow_error_set(error, rte_errno,
12895 RTE_FLOW_ERROR_TYPE_ACTION,
12897 "CT is unavailable.");
12898 if (ct->is_original)
12899 dev_flow->dv.actions[actions_n] =
12900 ct->dr_action_orig;
12902 dev_flow->dv.actions[actions_n] =
12903 ct->dr_action_rply;
12904 flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;
12905 flow->ct = owner_idx;
12906 __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);
12908 action_flags |= MLX5_FLOW_ACTION_CT;
12910 case RTE_FLOW_ACTION_TYPE_END:
12911 actions_end = true;
12912 if (mhdr_res->actions_num) {
12913 /* create modify action if needed. */
12914 if (flow_dv_modify_hdr_resource_register
12915 (dev, mhdr_res, dev_flow, error))
12917 dev_flow->dv.actions[modify_action_position] =
12918 handle->dvh.modify_hdr->action;
12921 * Handle AGE and COUNT action by single HW counter
12922 * when they are not shared.
12924 if (action_flags & MLX5_FLOW_ACTION_AGE) {
12925 if ((non_shared_age &&
12926 count && !count->shared) ||
12927 !(priv->sh->flow_hit_aso_en &&
12928 (attr->group || attr->transfer))) {
12929 /* Creates age by counters. */
12930 cnt_act = flow_dv_prepare_counter
12937 dev_flow->dv.actions[age_act_pos] =
12941 if (!flow->age && non_shared_age) {
12942 flow->age = flow_dv_aso_age_alloc
12946 flow_dv_aso_age_params_init
12948 non_shared_age->context ?
12949 non_shared_age->context :
12950 (void *)(uintptr_t)
12951 (dev_flow->flow_idx),
12952 non_shared_age->timeout);
12954 age_act = flow_aso_age_get_by_idx(dev,
12956 dev_flow->dv.actions[age_act_pos] =
12957 age_act->dr_action;
12959 if (action_flags & MLX5_FLOW_ACTION_COUNT) {
12961 * Create one count action, to be used
12962 * by all sub-flows.
12964 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
12969 dev_flow->dv.actions[actions_n++] =
12975 if (mhdr_res->actions_num &&
12976 modify_action_position == UINT32_MAX)
12977 modify_action_position = actions_n++;
12979 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
12980 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
12981 int item_type = items->type;
12983 if (!mlx5_flow_os_item_supported(item_type))
12984 return rte_flow_error_set(error, ENOTSUP,
12985 RTE_FLOW_ERROR_TYPE_ITEM,
12986 NULL, "item not supported");
12987 switch (item_type) {
12988 case RTE_FLOW_ITEM_TYPE_PORT_ID:
12989 flow_dv_translate_item_port_id
12990 (dev, match_mask, match_value, items, attr);
12991 last_item = MLX5_FLOW_ITEM_PORT_ID;
12993 case RTE_FLOW_ITEM_TYPE_ETH:
12994 flow_dv_translate_item_eth(match_mask, match_value,
12996 dev_flow->dv.group);
12997 matcher.priority = action_flags &
12998 MLX5_FLOW_ACTION_DEFAULT_MISS &&
12999 !dev_flow->external ?
13000 MLX5_PRIORITY_MAP_L3 :
13001 MLX5_PRIORITY_MAP_L2;
13002 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13003 MLX5_FLOW_LAYER_OUTER_L2;
13005 case RTE_FLOW_ITEM_TYPE_VLAN:
13006 flow_dv_translate_item_vlan(dev_flow,
13007 match_mask, match_value,
13009 dev_flow->dv.group);
13010 matcher.priority = MLX5_PRIORITY_MAP_L2;
13011 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13012 MLX5_FLOW_LAYER_INNER_VLAN) :
13013 (MLX5_FLOW_LAYER_OUTER_L2 |
13014 MLX5_FLOW_LAYER_OUTER_VLAN);
13016 case RTE_FLOW_ITEM_TYPE_IPV4:
13017 mlx5_flow_tunnel_ip_check(items, next_protocol,
13018 &item_flags, &tunnel);
13019 flow_dv_translate_item_ipv4(match_mask, match_value,
13021 dev_flow->dv.group);
13022 matcher.priority = MLX5_PRIORITY_MAP_L3;
13023 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13024 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13025 if (items->mask != NULL &&
13026 ((const struct rte_flow_item_ipv4 *)
13027 items->mask)->hdr.next_proto_id) {
13029 ((const struct rte_flow_item_ipv4 *)
13030 (items->spec))->hdr.next_proto_id;
13032 ((const struct rte_flow_item_ipv4 *)
13033 (items->mask))->hdr.next_proto_id;
13035 /* Reset for inner layer. */
13036 next_protocol = 0xff;
13039 case RTE_FLOW_ITEM_TYPE_IPV6:
13040 mlx5_flow_tunnel_ip_check(items, next_protocol,
13041 &item_flags, &tunnel);
13042 flow_dv_translate_item_ipv6(match_mask, match_value,
13044 dev_flow->dv.group);
13045 matcher.priority = MLX5_PRIORITY_MAP_L3;
13046 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13047 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13048 if (items->mask != NULL &&
13049 ((const struct rte_flow_item_ipv6 *)
13050 items->mask)->hdr.proto) {
13052 ((const struct rte_flow_item_ipv6 *)
13053 items->spec)->hdr.proto;
13055 ((const struct rte_flow_item_ipv6 *)
13056 items->mask)->hdr.proto;
13058 /* Reset for inner layer. */
13059 next_protocol = 0xff;
13062 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13063 flow_dv_translate_item_ipv6_frag_ext(match_mask,
13066 last_item = tunnel ?
13067 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13068 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13069 if (items->mask != NULL &&
13070 ((const struct rte_flow_item_ipv6_frag_ext *)
13071 items->mask)->hdr.next_header) {
13073 ((const struct rte_flow_item_ipv6_frag_ext *)
13074 items->spec)->hdr.next_header;
13076 ((const struct rte_flow_item_ipv6_frag_ext *)
13077 items->mask)->hdr.next_header;
13079 /* Reset for inner layer. */
13080 next_protocol = 0xff;
13083 case RTE_FLOW_ITEM_TYPE_TCP:
13084 flow_dv_translate_item_tcp(match_mask, match_value,
13086 matcher.priority = MLX5_PRIORITY_MAP_L4;
13087 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13088 MLX5_FLOW_LAYER_OUTER_L4_TCP;
13090 case RTE_FLOW_ITEM_TYPE_UDP:
13091 flow_dv_translate_item_udp(match_mask, match_value,
13093 matcher.priority = MLX5_PRIORITY_MAP_L4;
13094 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13095 MLX5_FLOW_LAYER_OUTER_L4_UDP;
13097 case RTE_FLOW_ITEM_TYPE_GRE:
13098 flow_dv_translate_item_gre(match_mask, match_value,
13100 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13101 last_item = MLX5_FLOW_LAYER_GRE;
13103 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13104 flow_dv_translate_item_gre_key(match_mask,
13105 match_value, items);
13106 last_item = MLX5_FLOW_LAYER_GRE_KEY;
13108 case RTE_FLOW_ITEM_TYPE_NVGRE:
13109 flow_dv_translate_item_nvgre(match_mask, match_value,
13111 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13112 last_item = MLX5_FLOW_LAYER_GRE;
13114 case RTE_FLOW_ITEM_TYPE_VXLAN:
13115 flow_dv_translate_item_vxlan(dev, attr,
13116 match_mask, match_value,
13118 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13119 last_item = MLX5_FLOW_LAYER_VXLAN;
13121 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13122 flow_dv_translate_item_vxlan_gpe(match_mask,
13123 match_value, items,
13125 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13126 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13128 case RTE_FLOW_ITEM_TYPE_GENEVE:
13129 flow_dv_translate_item_geneve(match_mask, match_value,
13131 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13132 last_item = MLX5_FLOW_LAYER_GENEVE;
13134 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13135 ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13139 return rte_flow_error_set(error, -ret,
13140 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13141 "cannot create GENEVE TLV option");
13142 flow->geneve_tlv_option = 1;
13143 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13145 case RTE_FLOW_ITEM_TYPE_MPLS:
13146 flow_dv_translate_item_mpls(match_mask, match_value,
13147 items, last_item, tunnel);
13148 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13149 last_item = MLX5_FLOW_LAYER_MPLS;
13151 case RTE_FLOW_ITEM_TYPE_MARK:
13152 flow_dv_translate_item_mark(dev, match_mask,
13153 match_value, items);
13154 last_item = MLX5_FLOW_ITEM_MARK;
13156 case RTE_FLOW_ITEM_TYPE_META:
13157 flow_dv_translate_item_meta(dev, match_mask,
13158 match_value, attr, items);
13159 last_item = MLX5_FLOW_ITEM_METADATA;
13161 case RTE_FLOW_ITEM_TYPE_ICMP:
13162 flow_dv_translate_item_icmp(match_mask, match_value,
13164 last_item = MLX5_FLOW_LAYER_ICMP;
13166 case RTE_FLOW_ITEM_TYPE_ICMP6:
13167 flow_dv_translate_item_icmp6(match_mask, match_value,
13169 last_item = MLX5_FLOW_LAYER_ICMP6;
13171 case RTE_FLOW_ITEM_TYPE_TAG:
13172 flow_dv_translate_item_tag(dev, match_mask,
13173 match_value, items);
13174 last_item = MLX5_FLOW_ITEM_TAG;
13176 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13177 flow_dv_translate_mlx5_item_tag(dev, match_mask,
13178 match_value, items);
13179 last_item = MLX5_FLOW_ITEM_TAG;
13181 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13182 flow_dv_translate_item_tx_queue(dev, match_mask,
13185 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13187 case RTE_FLOW_ITEM_TYPE_GTP:
13188 flow_dv_translate_item_gtp(match_mask, match_value,
13190 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13191 last_item = MLX5_FLOW_LAYER_GTP;
13193 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13194 ret = flow_dv_translate_item_gtp_psc(match_mask,
13198 return rte_flow_error_set(error, -ret,
13199 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13200 "cannot create GTP PSC item");
13201 last_item = MLX5_FLOW_LAYER_GTP_PSC;
13203 case RTE_FLOW_ITEM_TYPE_ECPRI:
13204 if (!mlx5_flex_parser_ecpri_exist(dev)) {
13205 /* Create it only the first time to be used. */
13206 ret = mlx5_flex_parser_ecpri_alloc(dev);
13208 return rte_flow_error_set
13210 RTE_FLOW_ERROR_TYPE_ITEM,
13212 "cannot create eCPRI parser");
13214 flow_dv_translate_item_ecpri(dev, match_mask,
13215 match_value, items);
13216 /* No other protocol should follow eCPRI layer. */
13217 last_item = MLX5_FLOW_LAYER_ECPRI;
13219 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13220 flow_dv_translate_item_integrity(match_mask,
13224 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13225 flow_dv_translate_item_aso_ct(dev, match_mask,
13226 match_value, items);
13231 item_flags |= last_item;
13234 * When E-Switch mode is enabled, we have two cases where we need to
13235 * set the source port manually.
13236 * The first one, is in case of Nic steering rule, and the second is
13237 * E-Switch rule where no port_id item was found. In both cases
13238 * the source port is set according the current port in use.
13240 if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13241 (priv->representor || priv->master)) {
13242 if (flow_dv_translate_item_port_id(dev, match_mask,
13243 match_value, NULL, attr))
13246 #ifdef RTE_LIBRTE_MLX5_DEBUG
13247 MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13248 dev_flow->dv.value.buf));
13251 * Layers may be already initialized from prefix flow if this dev_flow
13252 * is the suffix flow.
13254 handle->layers |= item_flags;
13255 if (action_flags & MLX5_FLOW_ACTION_RSS)
13256 flow_dv_hashfields_set(dev_flow, rss_desc);
13257 /* If has RSS action in the sample action, the Sample/Mirror resource
13258 * should be registered after the hash filed be update.
13260 if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13261 ret = flow_dv_translate_action_sample(dev,
13270 ret = flow_dv_create_action_sample(dev,
13279 return rte_flow_error_set
13281 RTE_FLOW_ERROR_TYPE_ACTION,
13283 "cannot create sample action");
13284 if (num_of_dest > 1) {
13285 dev_flow->dv.actions[sample_act_pos] =
13286 dev_flow->dv.dest_array_res->action;
13288 dev_flow->dv.actions[sample_act_pos] =
13289 dev_flow->dv.sample_res->verbs_action;
13293 * For multiple destination (sample action with ratio=1), the encap
13294 * action and port id action will be combined into group action.
13295 * So need remove the original these actions in the flow and only
13296 * use the sample action instead of.
13298 if (num_of_dest > 1 &&
13299 (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13301 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13303 for (i = 0; i < actions_n; i++) {
13304 if ((sample_act->dr_encap_action &&
13305 sample_act->dr_encap_action ==
13306 dev_flow->dv.actions[i]) ||
13307 (sample_act->dr_port_id_action &&
13308 sample_act->dr_port_id_action ==
13309 dev_flow->dv.actions[i]) ||
13310 (sample_act->dr_jump_action &&
13311 sample_act->dr_jump_action ==
13312 dev_flow->dv.actions[i]))
13314 temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13316 memcpy((void *)dev_flow->dv.actions,
13317 (void *)temp_actions,
13318 tmp_actions_n * sizeof(void *));
13319 actions_n = tmp_actions_n;
13321 dev_flow->dv.actions_n = actions_n;
13322 dev_flow->act_flags = action_flags;
13323 if (wks->skip_matcher_reg)
13325 /* Register matcher. */
13326 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13327 matcher.mask.size);
13328 matcher.priority = mlx5_get_matcher_priority(dev, attr,
13331 * When creating meter drop flow in drop table, using original
13332 * 5-tuple match, the matcher priority should be lower than
13335 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13336 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13337 matcher.priority <= MLX5_REG_BITS)
13338 matcher.priority += MLX5_REG_BITS;
13339 /* reserved field no needs to be set to 0 here. */
13340 tbl_key.is_fdb = attr->transfer;
13341 tbl_key.is_egress = attr->egress;
13342 tbl_key.level = dev_flow->dv.group;
13343 tbl_key.id = dev_flow->dv.table_id;
13344 if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13345 tunnel, attr->group, error))
13351 * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13354 * @param[in, out] action
13355 * Shred RSS action holding hash RX queue objects.
13356 * @param[in] hash_fields
13357 * Defines combination of packet fields to participate in RX hash.
13358 * @param[in] tunnel
13360 * @param[in] hrxq_idx
13361 * Hash RX queue index to set.
13364 * 0 on success, otherwise negative errno value.
13367 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13368 const uint64_t hash_fields,
13371 uint32_t *hrxqs = action->hrxq;
13373 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13374 case MLX5_RSS_HASH_IPV4:
13375 /* fall-through. */
13376 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13377 /* fall-through. */
13378 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13379 hrxqs[0] = hrxq_idx;
13381 case MLX5_RSS_HASH_IPV4_TCP:
13382 /* fall-through. */
13383 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13384 /* fall-through. */
13385 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13386 hrxqs[1] = hrxq_idx;
13388 case MLX5_RSS_HASH_IPV4_UDP:
13389 /* fall-through. */
13390 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13391 /* fall-through. */
13392 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13393 hrxqs[2] = hrxq_idx;
13395 case MLX5_RSS_HASH_IPV6:
13396 /* fall-through. */
13397 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13398 /* fall-through. */
13399 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13400 hrxqs[3] = hrxq_idx;
13402 case MLX5_RSS_HASH_IPV6_TCP:
13403 /* fall-through. */
13404 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13405 /* fall-through. */
13406 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13407 hrxqs[4] = hrxq_idx;
13409 case MLX5_RSS_HASH_IPV6_UDP:
13410 /* fall-through. */
13411 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13412 /* fall-through. */
13413 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13414 hrxqs[5] = hrxq_idx;
13416 case MLX5_RSS_HASH_NONE:
13417 hrxqs[6] = hrxq_idx;
13425 * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13429 * Pointer to the Ethernet device structure.
13431 * Shared RSS action ID holding hash RX queue objects.
13432 * @param[in] hash_fields
13433 * Defines combination of packet fields to participate in RX hash.
13434 * @param[in] tunnel
13438 * Valid hash RX queue index, otherwise 0.
13441 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13442 const uint64_t hash_fields)
13444 struct mlx5_priv *priv = dev->data->dev_private;
13445 struct mlx5_shared_action_rss *shared_rss =
13446 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13447 const uint32_t *hrxqs = shared_rss->hrxq;
13449 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13450 case MLX5_RSS_HASH_IPV4:
13451 /* fall-through. */
13452 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13453 /* fall-through. */
13454 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13456 case MLX5_RSS_HASH_IPV4_TCP:
13457 /* fall-through. */
13458 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13459 /* fall-through. */
13460 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13462 case MLX5_RSS_HASH_IPV4_UDP:
13463 /* fall-through. */
13464 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13465 /* fall-through. */
13466 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13468 case MLX5_RSS_HASH_IPV6:
13469 /* fall-through. */
13470 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13471 /* fall-through. */
13472 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13474 case MLX5_RSS_HASH_IPV6_TCP:
13475 /* fall-through. */
13476 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13477 /* fall-through. */
13478 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13480 case MLX5_RSS_HASH_IPV6_UDP:
13481 /* fall-through. */
13482 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13483 /* fall-through. */
13484 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13486 case MLX5_RSS_HASH_NONE:
13495 * Apply the flow to the NIC, lock free,
13496 * (mutex should be acquired by caller).
13499 * Pointer to the Ethernet device structure.
13500 * @param[in, out] flow
13501 * Pointer to flow structure.
13502 * @param[out] error
13503 * Pointer to error structure.
13506 * 0 on success, a negative errno value otherwise and rte_errno is set.
13509 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13510 struct rte_flow_error *error)
13512 struct mlx5_flow_dv_workspace *dv;
13513 struct mlx5_flow_handle *dh;
13514 struct mlx5_flow_handle_dv *dv_h;
13515 struct mlx5_flow *dev_flow;
13516 struct mlx5_priv *priv = dev->data->dev_private;
13517 uint32_t handle_idx;
13521 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13522 struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13526 for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13527 dev_flow = &wks->flows[idx];
13528 dv = &dev_flow->dv;
13529 dh = dev_flow->handle;
13532 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13533 if (dv->transfer) {
13534 MLX5_ASSERT(priv->sh->dr_drop_action);
13535 dv->actions[n++] = priv->sh->dr_drop_action;
13537 #ifdef HAVE_MLX5DV_DR
13538 /* DR supports drop action placeholder. */
13539 MLX5_ASSERT(priv->sh->dr_drop_action);
13540 dv->actions[n++] = priv->sh->dr_drop_action;
13542 /* For DV we use the explicit drop queue. */
13543 MLX5_ASSERT(priv->drop_queue.hrxq);
13545 priv->drop_queue.hrxq->action;
13548 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13549 !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13550 struct mlx5_hrxq *hrxq;
13553 hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13558 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13559 "cannot get hash queue");
13562 dh->rix_hrxq = hrxq_idx;
13563 dv->actions[n++] = hrxq->action;
13564 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13565 struct mlx5_hrxq *hrxq = NULL;
13568 hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13569 rss_desc->shared_rss,
13570 dev_flow->hash_fields);
13572 hrxq = mlx5_ipool_get
13573 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13578 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13579 "cannot get hash queue");
13582 dh->rix_srss = rss_desc->shared_rss;
13583 dv->actions[n++] = hrxq->action;
13584 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13585 if (!priv->sh->default_miss_action) {
13588 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13589 "default miss action not be created.");
13592 dv->actions[n++] = priv->sh->default_miss_action;
13594 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13595 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13596 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13597 (void *)&dv->value, n,
13598 dv->actions, &dh->drv_flow);
13602 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13604 (!priv->config.allow_duplicate_pattern &&
13606 "duplicating pattern is not allowed" :
13607 "hardware refuses to create flow");
13610 if (priv->vmwa_context &&
13611 dh->vf_vlan.tag && !dh->vf_vlan.created) {
13613 * The rule contains the VLAN pattern.
13614 * For VF we are going to create VLAN
13615 * interface to make hypervisor set correct
13616 * e-Switch vport context.
13618 mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13623 err = rte_errno; /* Save rte_errno before cleanup. */
13624 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13625 handle_idx, dh, next) {
13626 /* hrxq is union, don't clear it if the flag is not set. */
13627 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13628 mlx5_hrxq_release(dev, dh->rix_hrxq);
13630 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13633 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13634 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13636 rte_errno = err; /* Restore rte_errno. */
13641 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13642 struct mlx5_list_entry *entry)
13644 struct mlx5_flow_dv_matcher *resource = container_of(entry,
13648 claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13649 mlx5_free(resource);
13653 * Release the flow matcher.
13656 * Pointer to Ethernet device.
13658 * Index to port ID action resource.
13661 * 1 while a reference on it exists, 0 when freed.
13664 flow_dv_matcher_release(struct rte_eth_dev *dev,
13665 struct mlx5_flow_handle *handle)
13667 struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13668 struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13669 typeof(*tbl), tbl);
13672 MLX5_ASSERT(matcher->matcher_object);
13673 ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13674 flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13679 * Release encap_decap resource.
13682 * Pointer to the hash list.
13684 * Pointer to exist resource entry object.
13687 flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,
13688 struct mlx5_hlist_entry *entry)
13690 struct mlx5_dev_ctx_shared *sh = list->ctx;
13691 struct mlx5_flow_dv_encap_decap_resource *res =
13692 container_of(entry, typeof(*res), entry);
13694 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13695 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13699 * Release an encap/decap resource.
13702 * Pointer to Ethernet device.
13703 * @param encap_decap_idx
13704 * Index of encap decap resource.
13707 * 1 while a reference on it exists, 0 when freed.
13710 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13711 uint32_t encap_decap_idx)
13713 struct mlx5_priv *priv = dev->data->dev_private;
13714 struct mlx5_flow_dv_encap_decap_resource *resource;
13716 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13720 MLX5_ASSERT(resource->action);
13721 return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13725 * Release an jump to table action resource.
13728 * Pointer to Ethernet device.
13730 * Index to the jump action resource.
13733 * 1 while a reference on it exists, 0 when freed.
13736 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13739 struct mlx5_priv *priv = dev->data->dev_private;
13740 struct mlx5_flow_tbl_data_entry *tbl_data;
13742 tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13746 return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13750 flow_dv_modify_remove_cb(struct mlx5_hlist *list __rte_unused,
13751 struct mlx5_hlist_entry *entry)
13753 struct mlx5_flow_dv_modify_hdr_resource *res =
13754 container_of(entry, typeof(*res), entry);
13756 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13761 * Release a modify-header resource.
13764 * Pointer to Ethernet device.
13766 * Pointer to mlx5_flow_handle.
13769 * 1 while a reference on it exists, 0 when freed.
13772 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13773 struct mlx5_flow_handle *handle)
13775 struct mlx5_priv *priv = dev->data->dev_private;
13776 struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
13778 MLX5_ASSERT(entry->action);
13779 return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
13783 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13785 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13786 struct mlx5_flow_dv_port_id_action_resource *resource =
13787 container_of(entry, typeof(*resource), entry);
13789 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13790 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
13794 * Release port ID action resource.
13797 * Pointer to Ethernet device.
13799 * Pointer to mlx5_flow_handle.
13802 * 1 while a reference on it exists, 0 when freed.
13805 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
13808 struct mlx5_priv *priv = dev->data->dev_private;
13809 struct mlx5_flow_dv_port_id_action_resource *resource;
13811 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
13814 MLX5_ASSERT(resource->action);
13815 return mlx5_list_unregister(priv->sh->port_id_action_list,
13820 * Release shared RSS action resource.
13823 * Pointer to Ethernet device.
13825 * Shared RSS action index.
13828 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
13830 struct mlx5_priv *priv = dev->data->dev_private;
13831 struct mlx5_shared_action_rss *shared_rss;
13833 shared_rss = mlx5_ipool_get
13834 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
13835 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
13839 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13841 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13842 struct mlx5_flow_dv_push_vlan_action_resource *resource =
13843 container_of(entry, typeof(*resource), entry);
13845 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13846 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
13850 * Release push vlan action resource.
13853 * Pointer to Ethernet device.
13855 * Pointer to mlx5_flow_handle.
13858 * 1 while a reference on it exists, 0 when freed.
13861 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
13862 struct mlx5_flow_handle *handle)
13864 struct mlx5_priv *priv = dev->data->dev_private;
13865 struct mlx5_flow_dv_push_vlan_action_resource *resource;
13866 uint32_t idx = handle->dvh.rix_push_vlan;
13868 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
13871 MLX5_ASSERT(resource->action);
13872 return mlx5_list_unregister(priv->sh->push_vlan_action_list,
13877 * Release the fate resource.
13880 * Pointer to Ethernet device.
13882 * Pointer to mlx5_flow_handle.
13885 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
13886 struct mlx5_flow_handle *handle)
13888 if (!handle->rix_fate)
13890 switch (handle->fate_action) {
13891 case MLX5_FLOW_FATE_QUEUE:
13892 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
13893 mlx5_hrxq_release(dev, handle->rix_hrxq);
13895 case MLX5_FLOW_FATE_JUMP:
13896 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
13898 case MLX5_FLOW_FATE_PORT_ID:
13899 flow_dv_port_id_action_resource_release(dev,
13900 handle->rix_port_id_action);
13903 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
13906 handle->rix_fate = 0;
13910 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
13911 struct mlx5_list_entry *entry)
13913 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
13916 struct rte_eth_dev *dev = resource->dev;
13917 struct mlx5_priv *priv = dev->data->dev_private;
13919 if (resource->verbs_action)
13920 claim_zero(mlx5_flow_os_destroy_flow_action
13921 (resource->verbs_action));
13922 if (resource->normal_path_tbl)
13923 flow_dv_tbl_resource_release(MLX5_SH(dev),
13924 resource->normal_path_tbl);
13925 flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
13926 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
13927 DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
13931 * Release an sample resource.
13934 * Pointer to Ethernet device.
13936 * Pointer to mlx5_flow_handle.
13939 * 1 while a reference on it exists, 0 when freed.
13942 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
13943 struct mlx5_flow_handle *handle)
13945 struct mlx5_priv *priv = dev->data->dev_private;
13946 struct mlx5_flow_dv_sample_resource *resource;
13948 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
13949 handle->dvh.rix_sample);
13952 MLX5_ASSERT(resource->verbs_action);
13953 return mlx5_list_unregister(priv->sh->sample_action_list,
13958 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
13959 struct mlx5_list_entry *entry)
13961 struct mlx5_flow_dv_dest_array_resource *resource =
13962 container_of(entry, typeof(*resource), entry);
13963 struct rte_eth_dev *dev = resource->dev;
13964 struct mlx5_priv *priv = dev->data->dev_private;
13967 MLX5_ASSERT(resource->action);
13968 if (resource->action)
13969 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13970 for (; i < resource->num_of_dest; i++)
13971 flow_dv_sample_sub_actions_release(dev,
13972 &resource->sample_idx[i]);
13973 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
13974 DRV_LOG(DEBUG, "destination array resource %p: removed",
13979 * Release an destination array resource.
13982 * Pointer to Ethernet device.
13984 * Pointer to mlx5_flow_handle.
13987 * 1 while a reference on it exists, 0 when freed.
13990 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
13991 struct mlx5_flow_handle *handle)
13993 struct mlx5_priv *priv = dev->data->dev_private;
13994 struct mlx5_flow_dv_dest_array_resource *resource;
13996 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
13997 handle->dvh.rix_dest_array);
14000 MLX5_ASSERT(resource->action);
14001 return mlx5_list_unregister(priv->sh->dest_array_list,
14006 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14008 struct mlx5_priv *priv = dev->data->dev_private;
14009 struct mlx5_dev_ctx_shared *sh = priv->sh;
14010 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14011 sh->geneve_tlv_option_resource;
14012 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14013 if (geneve_opt_resource) {
14014 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14015 __ATOMIC_RELAXED))) {
14016 claim_zero(mlx5_devx_cmd_destroy
14017 (geneve_opt_resource->obj));
14018 mlx5_free(sh->geneve_tlv_option_resource);
14019 sh->geneve_tlv_option_resource = NULL;
14022 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14026 * Remove the flow from the NIC but keeps it in memory.
14027 * Lock free, (mutex should be acquired by caller).
14030 * Pointer to Ethernet device.
14031 * @param[in, out] flow
14032 * Pointer to flow structure.
14035 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14037 struct mlx5_flow_handle *dh;
14038 uint32_t handle_idx;
14039 struct mlx5_priv *priv = dev->data->dev_private;
14043 handle_idx = flow->dev_handles;
14044 while (handle_idx) {
14045 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14049 if (dh->drv_flow) {
14050 claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14051 dh->drv_flow = NULL;
14053 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14054 flow_dv_fate_resource_release(dev, dh);
14055 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14056 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14057 handle_idx = dh->next.next;
14062 * Remove the flow from the NIC and the memory.
14063 * Lock free, (mutex should be acquired by caller).
14066 * Pointer to the Ethernet device structure.
14067 * @param[in, out] flow
14068 * Pointer to flow structure.
14071 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14073 struct mlx5_flow_handle *dev_handle;
14074 struct mlx5_priv *priv = dev->data->dev_private;
14075 struct mlx5_flow_meter_info *fm = NULL;
14080 flow_dv_remove(dev, flow);
14081 if (flow->counter) {
14082 flow_dv_counter_free(dev, flow->counter);
14086 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14088 mlx5_flow_meter_detach(priv, fm);
14091 /* Keep the current age handling by default. */
14092 if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14093 flow_dv_aso_ct_release(dev, flow->ct);
14094 else if (flow->age)
14095 flow_dv_aso_age_release(dev, flow->age);
14096 if (flow->geneve_tlv_option) {
14097 flow_dv_geneve_tlv_option_resource_release(dev);
14098 flow->geneve_tlv_option = 0;
14100 while (flow->dev_handles) {
14101 uint32_t tmp_idx = flow->dev_handles;
14103 dev_handle = mlx5_ipool_get(priv->sh->ipool
14104 [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14107 flow->dev_handles = dev_handle->next.next;
14108 if (dev_handle->dvh.matcher)
14109 flow_dv_matcher_release(dev, dev_handle);
14110 if (dev_handle->dvh.rix_sample)
14111 flow_dv_sample_resource_release(dev, dev_handle);
14112 if (dev_handle->dvh.rix_dest_array)
14113 flow_dv_dest_array_resource_release(dev, dev_handle);
14114 if (dev_handle->dvh.rix_encap_decap)
14115 flow_dv_encap_decap_resource_release(dev,
14116 dev_handle->dvh.rix_encap_decap);
14117 if (dev_handle->dvh.modify_hdr)
14118 flow_dv_modify_hdr_resource_release(dev, dev_handle);
14119 if (dev_handle->dvh.rix_push_vlan)
14120 flow_dv_push_vlan_action_resource_release(dev,
14122 if (dev_handle->dvh.rix_tag)
14123 flow_dv_tag_release(dev,
14124 dev_handle->dvh.rix_tag);
14125 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14126 flow_dv_fate_resource_release(dev, dev_handle);
14128 srss = dev_handle->rix_srss;
14129 if (fm && dev_handle->is_meter_flow_id &&
14130 dev_handle->split_flow_id)
14131 mlx5_ipool_free(fm->flow_ipool,
14132 dev_handle->split_flow_id);
14133 else if (dev_handle->split_flow_id &&
14134 !dev_handle->is_meter_flow_id)
14135 mlx5_ipool_free(priv->sh->ipool
14136 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14137 dev_handle->split_flow_id);
14138 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14142 flow_dv_shared_rss_action_release(dev, srss);
14146 * Release array of hash RX queue objects.
14150 * Pointer to the Ethernet device structure.
14151 * @param[in, out] hrxqs
14152 * Array of hash RX queue objects.
14155 * Total number of references to hash RX queue objects in *hrxqs* array
14156 * after this operation.
14159 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14160 uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14165 for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14166 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14176 * Release all hash RX queue objects representing shared RSS action.
14179 * Pointer to the Ethernet device structure.
14180 * @param[in, out] action
14181 * Shared RSS action to remove hash RX queue objects from.
14184 * Total number of references to hash RX queue objects stored in *action*
14185 * after this operation.
14186 * Expected to be 0 if no external references held.
14189 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14190 struct mlx5_shared_action_rss *shared_rss)
14192 return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14196 * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14199 * Only one hash value is available for one L3+L4 combination:
14201 * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14202 * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14203 * same slot in mlx5_rss_hash_fields.
14206 * Pointer to the shared action RSS conf.
14207 * @param[in, out] hash_field
14208 * hash_field variable needed to be adjusted.
14214 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14215 uint64_t *hash_field)
14217 uint64_t rss_types = rss->origin.types;
14219 switch (*hash_field & ~IBV_RX_HASH_INNER) {
14220 case MLX5_RSS_HASH_IPV4:
14221 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14222 *hash_field &= ~MLX5_RSS_HASH_IPV4;
14223 if (rss_types & ETH_RSS_L3_DST_ONLY)
14224 *hash_field |= IBV_RX_HASH_DST_IPV4;
14225 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14226 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14228 *hash_field |= MLX5_RSS_HASH_IPV4;
14231 case MLX5_RSS_HASH_IPV6:
14232 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14233 *hash_field &= ~MLX5_RSS_HASH_IPV6;
14234 if (rss_types & ETH_RSS_L3_DST_ONLY)
14235 *hash_field |= IBV_RX_HASH_DST_IPV6;
14236 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14237 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14239 *hash_field |= MLX5_RSS_HASH_IPV6;
14242 case MLX5_RSS_HASH_IPV4_UDP:
14243 /* fall-through. */
14244 case MLX5_RSS_HASH_IPV6_UDP:
14245 if (rss_types & ETH_RSS_UDP) {
14246 *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14247 if (rss_types & ETH_RSS_L4_DST_ONLY)
14248 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14249 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14250 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14252 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14255 case MLX5_RSS_HASH_IPV4_TCP:
14256 /* fall-through. */
14257 case MLX5_RSS_HASH_IPV6_TCP:
14258 if (rss_types & ETH_RSS_TCP) {
14259 *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14260 if (rss_types & ETH_RSS_L4_DST_ONLY)
14261 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14262 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14263 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14265 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14274 * Setup shared RSS action.
14275 * Prepare set of hash RX queue objects sufficient to handle all valid
14276 * hash_fields combinations (see enum ibv_rx_hash_fields).
14279 * Pointer to the Ethernet device structure.
14280 * @param[in] action_idx
14281 * Shared RSS action ipool index.
14282 * @param[in, out] action
14283 * Partially initialized shared RSS action.
14284 * @param[out] error
14285 * Perform verbose error reporting if not NULL. Initialized in case of
14289 * 0 on success, otherwise negative errno value.
14292 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14293 uint32_t action_idx,
14294 struct mlx5_shared_action_rss *shared_rss,
14295 struct rte_flow_error *error)
14297 struct mlx5_flow_rss_desc rss_desc = { 0 };
14301 if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14302 return rte_flow_error_set(error, rte_errno,
14303 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14304 "cannot setup indirection table");
14306 memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14307 rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14308 rss_desc.const_q = shared_rss->origin.queue;
14309 rss_desc.queue_num = shared_rss->origin.queue_num;
14310 /* Set non-zero value to indicate a shared RSS. */
14311 rss_desc.shared_rss = action_idx;
14312 rss_desc.ind_tbl = shared_rss->ind_tbl;
14313 for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14315 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14318 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14319 if (shared_rss->origin.level > 1) {
14320 hash_fields |= IBV_RX_HASH_INNER;
14323 rss_desc.tunnel = tunnel;
14324 rss_desc.hash_fields = hash_fields;
14325 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14329 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14330 "cannot get hash queue");
14331 goto error_hrxq_new;
14333 err = __flow_dv_action_rss_hrxq_set
14334 (shared_rss, hash_fields, hrxq_idx);
14340 __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14341 if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14342 shared_rss->ind_tbl = NULL;
14348 * Create shared RSS action.
14351 * Pointer to the Ethernet device structure.
14353 * Shared action configuration.
14355 * RSS action specification used to create shared action.
14356 * @param[out] error
14357 * Perform verbose error reporting if not NULL. Initialized in case of
14361 * A valid shared action ID in case of success, 0 otherwise and
14362 * rte_errno is set.
14365 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14366 const struct rte_flow_indir_action_conf *conf,
14367 const struct rte_flow_action_rss *rss,
14368 struct rte_flow_error *error)
14370 struct mlx5_priv *priv = dev->data->dev_private;
14371 struct mlx5_shared_action_rss *shared_rss = NULL;
14372 void *queue = NULL;
14373 struct rte_flow_action_rss *origin;
14374 const uint8_t *rss_key;
14375 uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14378 RTE_SET_USED(conf);
14379 queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14381 shared_rss = mlx5_ipool_zmalloc
14382 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14383 if (!shared_rss || !queue) {
14384 rte_flow_error_set(error, ENOMEM,
14385 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14386 "cannot allocate resource memory");
14387 goto error_rss_init;
14389 if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14390 rte_flow_error_set(error, E2BIG,
14391 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14392 "rss action number out of range");
14393 goto error_rss_init;
14395 shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14396 sizeof(*shared_rss->ind_tbl),
14398 if (!shared_rss->ind_tbl) {
14399 rte_flow_error_set(error, ENOMEM,
14400 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14401 "cannot allocate resource memory");
14402 goto error_rss_init;
14404 memcpy(queue, rss->queue, queue_size);
14405 shared_rss->ind_tbl->queues = queue;
14406 shared_rss->ind_tbl->queues_n = rss->queue_num;
14407 origin = &shared_rss->origin;
14408 origin->func = rss->func;
14409 origin->level = rss->level;
14410 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14411 origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14412 /* NULL RSS key indicates default RSS key. */
14413 rss_key = !rss->key ? rss_hash_default_key : rss->key;
14414 memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14415 origin->key = &shared_rss->key[0];
14416 origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14417 origin->queue = queue;
14418 origin->queue_num = rss->queue_num;
14419 if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14420 goto error_rss_init;
14421 rte_spinlock_init(&shared_rss->action_rss_sl);
14422 __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14423 rte_spinlock_lock(&priv->shared_act_sl);
14424 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14425 &priv->rss_shared_actions, idx, shared_rss, next);
14426 rte_spinlock_unlock(&priv->shared_act_sl);
14430 if (shared_rss->ind_tbl)
14431 mlx5_free(shared_rss->ind_tbl);
14432 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14441 * Destroy the shared RSS action.
14442 * Release related hash RX queue objects.
14445 * Pointer to the Ethernet device structure.
14447 * The shared RSS action object ID to be removed.
14448 * @param[out] error
14449 * Perform verbose error reporting if not NULL. Initialized in case of
14453 * 0 on success, otherwise negative errno value.
14456 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14457 struct rte_flow_error *error)
14459 struct mlx5_priv *priv = dev->data->dev_private;
14460 struct mlx5_shared_action_rss *shared_rss =
14461 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14462 uint32_t old_refcnt = 1;
14464 uint16_t *queue = NULL;
14467 return rte_flow_error_set(error, EINVAL,
14468 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14469 "invalid shared action");
14470 remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14472 return rte_flow_error_set(error, EBUSY,
14473 RTE_FLOW_ERROR_TYPE_ACTION,
14475 "shared rss hrxq has references");
14476 if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14477 0, 0, __ATOMIC_ACQUIRE,
14479 return rte_flow_error_set(error, EBUSY,
14480 RTE_FLOW_ERROR_TYPE_ACTION,
14482 "shared rss has references");
14483 queue = shared_rss->ind_tbl->queues;
14484 remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14486 return rte_flow_error_set(error, EBUSY,
14487 RTE_FLOW_ERROR_TYPE_ACTION,
14489 "shared rss indirection table has"
14492 rte_spinlock_lock(&priv->shared_act_sl);
14493 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14494 &priv->rss_shared_actions, idx, shared_rss, next);
14495 rte_spinlock_unlock(&priv->shared_act_sl);
14496 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14502 * Create indirect action, lock free,
14503 * (mutex should be acquired by caller).
14504 * Dispatcher for action type specific call.
14507 * Pointer to the Ethernet device structure.
14509 * Shared action configuration.
14510 * @param[in] action
14511 * Action specification used to create indirect action.
14512 * @param[out] error
14513 * Perform verbose error reporting if not NULL. Initialized in case of
14517 * A valid shared action handle in case of success, NULL otherwise and
14518 * rte_errno is set.
14520 static struct rte_flow_action_handle *
14521 flow_dv_action_create(struct rte_eth_dev *dev,
14522 const struct rte_flow_indir_action_conf *conf,
14523 const struct rte_flow_action *action,
14524 struct rte_flow_error *err)
14526 struct mlx5_priv *priv = dev->data->dev_private;
14527 uint32_t age_idx = 0;
14531 switch (action->type) {
14532 case RTE_FLOW_ACTION_TYPE_RSS:
14533 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14534 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14535 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14537 case RTE_FLOW_ACTION_TYPE_AGE:
14538 age_idx = flow_dv_aso_age_alloc(dev, err);
14543 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14544 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14545 flow_dv_aso_age_params_init(dev, age_idx,
14546 ((const struct rte_flow_action_age *)
14547 action->conf)->context ?
14548 ((const struct rte_flow_action_age *)
14549 action->conf)->context :
14550 (void *)(uintptr_t)idx,
14551 ((const struct rte_flow_action_age *)
14552 action->conf)->timeout);
14555 case RTE_FLOW_ACTION_TYPE_COUNT:
14556 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14557 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14558 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14560 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14561 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14563 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14566 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14567 NULL, "action type not supported");
14570 return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14574 * Destroy the indirect action.
14575 * Release action related resources on the NIC and the memory.
14576 * Lock free, (mutex should be acquired by caller).
14577 * Dispatcher for action type specific call.
14580 * Pointer to the Ethernet device structure.
14581 * @param[in] handle
14582 * The indirect action object handle to be removed.
14583 * @param[out] error
14584 * Perform verbose error reporting if not NULL. Initialized in case of
14588 * 0 on success, otherwise negative errno value.
14591 flow_dv_action_destroy(struct rte_eth_dev *dev,
14592 struct rte_flow_action_handle *handle,
14593 struct rte_flow_error *error)
14595 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14596 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14597 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14598 struct mlx5_flow_counter *cnt;
14599 uint32_t no_flow_refcnt = 1;
14603 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14604 return __flow_dv_action_rss_release(dev, idx, error);
14605 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14606 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14607 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14608 &no_flow_refcnt, 1, false,
14611 return rte_flow_error_set(error, EBUSY,
14612 RTE_FLOW_ERROR_TYPE_ACTION,
14614 "Indirect count action has references");
14615 flow_dv_counter_free(dev, idx);
14617 case MLX5_INDIRECT_ACTION_TYPE_AGE:
14618 ret = flow_dv_aso_age_release(dev, idx);
14621 * In this case, the last flow has a reference will
14622 * actually release the age action.
14624 DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14625 " released with references %d.", idx, ret);
14627 case MLX5_INDIRECT_ACTION_TYPE_CT:
14628 ret = flow_dv_aso_ct_release(dev, idx);
14632 DRV_LOG(DEBUG, "Connection tracking object %u still "
14633 "has references %d.", idx, ret);
14636 return rte_flow_error_set(error, ENOTSUP,
14637 RTE_FLOW_ERROR_TYPE_ACTION,
14639 "action type not supported");
14644 * Updates in place shared RSS action configuration.
14647 * Pointer to the Ethernet device structure.
14649 * The shared RSS action object ID to be updated.
14650 * @param[in] action_conf
14651 * RSS action specification used to modify *shared_rss*.
14652 * @param[out] error
14653 * Perform verbose error reporting if not NULL. Initialized in case of
14657 * 0 on success, otherwise negative errno value.
14658 * @note: currently only support update of RSS queues.
14661 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14662 const struct rte_flow_action_rss *action_conf,
14663 struct rte_flow_error *error)
14665 struct mlx5_priv *priv = dev->data->dev_private;
14666 struct mlx5_shared_action_rss *shared_rss =
14667 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14669 void *queue = NULL;
14670 uint16_t *queue_old = NULL;
14671 uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14674 return rte_flow_error_set(error, EINVAL,
14675 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14676 "invalid shared action to update");
14677 if (priv->obj_ops.ind_table_modify == NULL)
14678 return rte_flow_error_set(error, ENOTSUP,
14679 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14680 "cannot modify indirection table");
14681 queue = mlx5_malloc(MLX5_MEM_ZERO,
14682 RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14685 return rte_flow_error_set(error, ENOMEM,
14686 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14688 "cannot allocate resource memory");
14689 memcpy(queue, action_conf->queue, queue_size);
14690 MLX5_ASSERT(shared_rss->ind_tbl);
14691 rte_spinlock_lock(&shared_rss->action_rss_sl);
14692 queue_old = shared_rss->ind_tbl->queues;
14693 ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14694 queue, action_conf->queue_num, true);
14697 ret = rte_flow_error_set(error, rte_errno,
14698 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14699 "cannot update indirection table");
14701 mlx5_free(queue_old);
14702 shared_rss->origin.queue = queue;
14703 shared_rss->origin.queue_num = action_conf->queue_num;
14705 rte_spinlock_unlock(&shared_rss->action_rss_sl);
14710 * Updates in place conntrack context or direction.
14711 * Context update should be synchronized.
14714 * Pointer to the Ethernet device structure.
14716 * The conntrack object ID to be updated.
14717 * @param[in] update
14718 * Pointer to the structure of information to update.
14719 * @param[out] error
14720 * Perform verbose error reporting if not NULL. Initialized in case of
14724 * 0 on success, otherwise negative errno value.
14727 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14728 const struct rte_flow_modify_conntrack *update,
14729 struct rte_flow_error *error)
14731 struct mlx5_priv *priv = dev->data->dev_private;
14732 struct mlx5_aso_ct_action *ct;
14733 const struct rte_flow_action_conntrack *new_prf;
14735 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14738 if (PORT_ID(priv) != owner)
14739 return rte_flow_error_set(error, EACCES,
14740 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14742 "CT object owned by another port");
14743 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14744 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14746 return rte_flow_error_set(error, ENOMEM,
14747 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14749 "CT object is inactive");
14750 new_prf = &update->new_ct;
14751 if (update->direction)
14752 ct->is_original = !!new_prf->is_original_dir;
14753 if (update->state) {
14754 /* Only validate the profile when it needs to be updated. */
14755 ret = mlx5_validate_action_ct(dev, new_prf, error);
14758 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14760 return rte_flow_error_set(error, EIO,
14761 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14763 "Failed to send CT context update WQE");
14764 /* Block until ready or a failure. */
14765 ret = mlx5_aso_ct_available(priv->sh, ct);
14767 rte_flow_error_set(error, rte_errno,
14768 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14770 "Timeout to get the CT update");
14776 * Updates in place shared action configuration, lock free,
14777 * (mutex should be acquired by caller).
14780 * Pointer to the Ethernet device structure.
14781 * @param[in] handle
14782 * The indirect action object handle to be updated.
14783 * @param[in] update
14784 * Action specification used to modify the action pointed by *handle*.
14785 * *update* could be of same type with the action pointed by the *handle*
14786 * handle argument, or some other structures like a wrapper, depending on
14787 * the indirect action type.
14788 * @param[out] error
14789 * Perform verbose error reporting if not NULL. Initialized in case of
14793 * 0 on success, otherwise negative errno value.
14796 flow_dv_action_update(struct rte_eth_dev *dev,
14797 struct rte_flow_action_handle *handle,
14798 const void *update,
14799 struct rte_flow_error *err)
14801 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14802 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14803 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14804 const void *action_conf;
14807 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14808 action_conf = ((const struct rte_flow_action *)update)->conf;
14809 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
14810 case MLX5_INDIRECT_ACTION_TYPE_CT:
14811 return __flow_dv_action_ct_update(dev, idx, update, err);
14813 return rte_flow_error_set(err, ENOTSUP,
14814 RTE_FLOW_ERROR_TYPE_ACTION,
14816 "action type update not supported");
14821 * Destroy the meter sub policy table rules.
14822 * Lock free, (mutex should be acquired by caller).
14825 * Pointer to Ethernet device.
14826 * @param[in] sub_policy
14827 * Pointer to meter sub policy table.
14830 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
14831 struct mlx5_flow_meter_sub_policy *sub_policy)
14833 struct mlx5_priv *priv = dev->data->dev_private;
14834 struct mlx5_flow_tbl_data_entry *tbl;
14835 struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
14836 struct mlx5_flow_meter_info *next_fm;
14837 struct mlx5_sub_policy_color_rule *color_rule;
14841 for (i = 0; i < RTE_COLORS; i++) {
14843 if (i == RTE_COLOR_GREEN && policy &&
14844 policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
14845 next_fm = mlx5_flow_meter_find(priv,
14846 policy->act_cnt[i].next_mtr_id, NULL);
14847 TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
14849 claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
14850 tbl = container_of(color_rule->matcher->tbl,
14851 typeof(*tbl), tbl);
14852 mlx5_list_unregister(tbl->matchers,
14853 &color_rule->matcher->entry);
14854 TAILQ_REMOVE(&sub_policy->color_rules[i],
14855 color_rule, next_port);
14856 mlx5_free(color_rule);
14858 mlx5_flow_meter_detach(priv, next_fm);
14861 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14862 if (sub_policy->rix_hrxq[i]) {
14863 if (policy && !policy->is_hierarchy)
14864 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
14865 sub_policy->rix_hrxq[i] = 0;
14867 if (sub_policy->jump_tbl[i]) {
14868 flow_dv_tbl_resource_release(MLX5_SH(dev),
14869 sub_policy->jump_tbl[i]);
14870 sub_policy->jump_tbl[i] = NULL;
14873 if (sub_policy->tbl_rsc) {
14874 flow_dv_tbl_resource_release(MLX5_SH(dev),
14875 sub_policy->tbl_rsc);
14876 sub_policy->tbl_rsc = NULL;
14881 * Destroy policy rules, lock free,
14882 * (mutex should be acquired by caller).
14883 * Dispatcher for action type specific call.
14886 * Pointer to the Ethernet device structure.
14887 * @param[in] mtr_policy
14888 * Meter policy struct.
14891 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
14892 struct mlx5_flow_meter_policy *mtr_policy)
14895 struct mlx5_flow_meter_sub_policy *sub_policy;
14896 uint16_t sub_policy_num;
14898 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
14899 sub_policy_num = (mtr_policy->sub_policy_num >>
14900 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
14901 MLX5_MTR_SUB_POLICY_NUM_MASK;
14902 for (j = 0; j < sub_policy_num; j++) {
14903 sub_policy = mtr_policy->sub_policys[i][j];
14905 __flow_dv_destroy_sub_policy_rules
14912 * Destroy policy action, lock free,
14913 * (mutex should be acquired by caller).
14914 * Dispatcher for action type specific call.
14917 * Pointer to the Ethernet device structure.
14918 * @param[in] mtr_policy
14919 * Meter policy struct.
14922 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
14923 struct mlx5_flow_meter_policy *mtr_policy)
14925 struct rte_flow_action *rss_action;
14926 struct mlx5_flow_handle dev_handle;
14929 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14930 if (mtr_policy->act_cnt[i].rix_mark) {
14931 flow_dv_tag_release(dev,
14932 mtr_policy->act_cnt[i].rix_mark);
14933 mtr_policy->act_cnt[i].rix_mark = 0;
14935 if (mtr_policy->act_cnt[i].modify_hdr) {
14936 dev_handle.dvh.modify_hdr =
14937 mtr_policy->act_cnt[i].modify_hdr;
14938 flow_dv_modify_hdr_resource_release(dev, &dev_handle);
14940 switch (mtr_policy->act_cnt[i].fate_action) {
14941 case MLX5_FLOW_FATE_SHARED_RSS:
14942 rss_action = mtr_policy->act_cnt[i].rss;
14943 mlx5_free(rss_action);
14945 case MLX5_FLOW_FATE_PORT_ID:
14946 if (mtr_policy->act_cnt[i].rix_port_id_action) {
14947 flow_dv_port_id_action_resource_release(dev,
14948 mtr_policy->act_cnt[i].rix_port_id_action);
14949 mtr_policy->act_cnt[i].rix_port_id_action = 0;
14952 case MLX5_FLOW_FATE_DROP:
14953 case MLX5_FLOW_FATE_JUMP:
14954 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
14955 mtr_policy->act_cnt[i].dr_jump_action[j] =
14959 /*Queue action do nothing*/
14963 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
14964 mtr_policy->dr_drop_action[j] = NULL;
14968 * Create policy action per domain, lock free,
14969 * (mutex should be acquired by caller).
14970 * Dispatcher for action type specific call.
14973 * Pointer to the Ethernet device structure.
14974 * @param[in] mtr_policy
14975 * Meter policy struct.
14976 * @param[in] action
14977 * Action specification used to create meter actions.
14978 * @param[out] error
14979 * Perform verbose error reporting if not NULL. Initialized in case of
14983 * 0 on success, otherwise negative errno value.
14986 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
14987 struct mlx5_flow_meter_policy *mtr_policy,
14988 const struct rte_flow_action *actions[RTE_COLORS],
14989 enum mlx5_meter_domain domain,
14990 struct rte_mtr_error *error)
14992 struct mlx5_priv *priv = dev->data->dev_private;
14993 struct rte_flow_error flow_err;
14994 const struct rte_flow_action *act;
14995 uint64_t action_flags = 0;
14996 struct mlx5_flow_handle dh;
14997 struct mlx5_flow dev_flow;
14998 struct mlx5_flow_dv_port_id_action_resource port_id_action;
15000 uint8_t egress, transfer;
15001 struct mlx5_meter_policy_action_container *act_cnt = NULL;
15003 struct mlx5_flow_dv_modify_hdr_resource res;
15004 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15005 sizeof(struct mlx5_modification_cmd) *
15006 (MLX5_MAX_MODIFY_NUM + 1)];
15008 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15010 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15011 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15012 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15013 memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15014 memset(&port_id_action, 0,
15015 sizeof(struct mlx5_flow_dv_port_id_action_resource));
15016 memset(mhdr_res, 0, sizeof(*mhdr_res));
15017 mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15019 MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15020 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
15021 dev_flow.handle = &dh;
15022 dev_flow.dv.port_id_action = &port_id_action;
15023 dev_flow.external = true;
15024 for (i = 0; i < RTE_COLORS; i++) {
15025 if (i < MLX5_MTR_RTE_COLORS)
15026 act_cnt = &mtr_policy->act_cnt[i];
15027 for (act = actions[i];
15028 act && act->type != RTE_FLOW_ACTION_TYPE_END;
15030 switch (act->type) {
15031 case RTE_FLOW_ACTION_TYPE_MARK:
15033 uint32_t tag_be = mlx5_flow_mark_set
15034 (((const struct rte_flow_action_mark *)
15037 if (i >= MLX5_MTR_RTE_COLORS)
15038 return -rte_mtr_error_set(error,
15040 RTE_MTR_ERROR_TYPE_METER_POLICY,
15042 "cannot create policy "
15043 "mark action for this color");
15044 dev_flow.handle->mark = 1;
15045 if (flow_dv_tag_resource_register(dev, tag_be,
15046 &dev_flow, &flow_err))
15047 return -rte_mtr_error_set(error,
15049 RTE_MTR_ERROR_TYPE_METER_POLICY,
15051 "cannot setup policy mark action");
15052 MLX5_ASSERT(dev_flow.dv.tag_resource);
15053 act_cnt->rix_mark =
15054 dev_flow.handle->dvh.rix_tag;
15055 action_flags |= MLX5_FLOW_ACTION_MARK;
15058 case RTE_FLOW_ACTION_TYPE_SET_TAG:
15059 if (i >= MLX5_MTR_RTE_COLORS)
15060 return -rte_mtr_error_set(error,
15062 RTE_MTR_ERROR_TYPE_METER_POLICY,
15064 "cannot create policy "
15065 "set tag action for this color");
15066 if (flow_dv_convert_action_set_tag
15068 (const struct rte_flow_action_set_tag *)
15069 act->conf, &flow_err))
15070 return -rte_mtr_error_set(error,
15072 RTE_MTR_ERROR_TYPE_METER_POLICY,
15073 NULL, "cannot convert policy "
15075 if (!mhdr_res->actions_num)
15076 return -rte_mtr_error_set(error,
15078 RTE_MTR_ERROR_TYPE_METER_POLICY,
15079 NULL, "cannot find policy "
15081 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15083 case RTE_FLOW_ACTION_TYPE_DROP:
15085 struct mlx5_flow_mtr_mng *mtrmng =
15087 struct mlx5_flow_tbl_data_entry *tbl_data;
15090 * Create the drop table with
15091 * METER DROP level.
15093 if (!mtrmng->drop_tbl[domain]) {
15094 mtrmng->drop_tbl[domain] =
15095 flow_dv_tbl_resource_get(dev,
15096 MLX5_FLOW_TABLE_LEVEL_METER,
15097 egress, transfer, false, NULL, 0,
15098 0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15099 if (!mtrmng->drop_tbl[domain])
15100 return -rte_mtr_error_set
15102 RTE_MTR_ERROR_TYPE_METER_POLICY,
15104 "Failed to create meter drop table");
15106 tbl_data = container_of
15107 (mtrmng->drop_tbl[domain],
15108 struct mlx5_flow_tbl_data_entry, tbl);
15109 if (i < MLX5_MTR_RTE_COLORS) {
15110 act_cnt->dr_jump_action[domain] =
15111 tbl_data->jump.action;
15112 act_cnt->fate_action =
15113 MLX5_FLOW_FATE_DROP;
15115 if (i == RTE_COLOR_RED)
15116 mtr_policy->dr_drop_action[domain] =
15117 tbl_data->jump.action;
15118 action_flags |= MLX5_FLOW_ACTION_DROP;
15121 case RTE_FLOW_ACTION_TYPE_QUEUE:
15123 if (i >= MLX5_MTR_RTE_COLORS)
15124 return -rte_mtr_error_set(error,
15126 RTE_MTR_ERROR_TYPE_METER_POLICY,
15127 NULL, "cannot create policy "
15128 "fate queue for this color");
15130 ((const struct rte_flow_action_queue *)
15131 (act->conf))->index;
15132 act_cnt->fate_action =
15133 MLX5_FLOW_FATE_QUEUE;
15134 dev_flow.handle->fate_action =
15135 MLX5_FLOW_FATE_QUEUE;
15136 mtr_policy->is_queue = 1;
15137 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15140 case RTE_FLOW_ACTION_TYPE_RSS:
15144 if (i >= MLX5_MTR_RTE_COLORS)
15145 return -rte_mtr_error_set(error,
15147 RTE_MTR_ERROR_TYPE_METER_POLICY,
15149 "cannot create policy "
15150 "rss action for this color");
15152 * Save RSS conf into policy struct
15153 * for translate stage.
15155 rss_size = (int)rte_flow_conv
15156 (RTE_FLOW_CONV_OP_ACTION,
15157 NULL, 0, act, &flow_err);
15159 return -rte_mtr_error_set(error,
15161 RTE_MTR_ERROR_TYPE_METER_POLICY,
15162 NULL, "Get the wrong "
15163 "rss action struct size");
15164 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15165 rss_size, 0, SOCKET_ID_ANY);
15167 return -rte_mtr_error_set(error,
15169 RTE_MTR_ERROR_TYPE_METER_POLICY,
15171 "Fail to malloc rss action memory");
15172 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15173 act_cnt->rss, rss_size,
15176 return -rte_mtr_error_set(error,
15178 RTE_MTR_ERROR_TYPE_METER_POLICY,
15179 NULL, "Fail to save "
15180 "rss action into policy struct");
15181 act_cnt->fate_action =
15182 MLX5_FLOW_FATE_SHARED_RSS;
15183 action_flags |= MLX5_FLOW_ACTION_RSS;
15186 case RTE_FLOW_ACTION_TYPE_PORT_ID:
15188 struct mlx5_flow_dv_port_id_action_resource
15190 uint32_t port_id = 0;
15192 if (i >= MLX5_MTR_RTE_COLORS)
15193 return -rte_mtr_error_set(error,
15195 RTE_MTR_ERROR_TYPE_METER_POLICY,
15196 NULL, "cannot create policy "
15197 "port action for this color");
15198 memset(&port_id_resource, 0,
15199 sizeof(port_id_resource));
15200 if (flow_dv_translate_action_port_id(dev, act,
15201 &port_id, &flow_err))
15202 return -rte_mtr_error_set(error,
15204 RTE_MTR_ERROR_TYPE_METER_POLICY,
15205 NULL, "cannot translate "
15206 "policy port action");
15207 port_id_resource.port_id = port_id;
15208 if (flow_dv_port_id_action_resource_register
15209 (dev, &port_id_resource,
15210 &dev_flow, &flow_err))
15211 return -rte_mtr_error_set(error,
15213 RTE_MTR_ERROR_TYPE_METER_POLICY,
15214 NULL, "cannot setup "
15215 "policy port action");
15216 act_cnt->rix_port_id_action =
15217 dev_flow.handle->rix_port_id_action;
15218 act_cnt->fate_action =
15219 MLX5_FLOW_FATE_PORT_ID;
15220 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15223 case RTE_FLOW_ACTION_TYPE_JUMP:
15225 uint32_t jump_group = 0;
15226 uint32_t table = 0;
15227 struct mlx5_flow_tbl_data_entry *tbl_data;
15228 struct flow_grp_info grp_info = {
15229 .external = !!dev_flow.external,
15230 .transfer = !!transfer,
15231 .fdb_def_rule = !!priv->fdb_def_rule,
15233 .skip_scale = dev_flow.skip_scale &
15234 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15236 struct mlx5_flow_meter_sub_policy *sub_policy =
15237 mtr_policy->sub_policys[domain][0];
15239 if (i >= MLX5_MTR_RTE_COLORS)
15240 return -rte_mtr_error_set(error,
15242 RTE_MTR_ERROR_TYPE_METER_POLICY,
15244 "cannot create policy "
15245 "jump action for this color");
15247 ((const struct rte_flow_action_jump *)
15249 if (mlx5_flow_group_to_table(dev, NULL,
15252 &grp_info, &flow_err))
15253 return -rte_mtr_error_set(error,
15255 RTE_MTR_ERROR_TYPE_METER_POLICY,
15256 NULL, "cannot setup "
15257 "policy jump action");
15258 sub_policy->jump_tbl[i] =
15259 flow_dv_tbl_resource_get(dev,
15262 !!dev_flow.external,
15263 NULL, jump_group, 0,
15266 (!sub_policy->jump_tbl[i])
15267 return -rte_mtr_error_set(error,
15269 RTE_MTR_ERROR_TYPE_METER_POLICY,
15270 NULL, "cannot create jump action.");
15271 tbl_data = container_of
15272 (sub_policy->jump_tbl[i],
15273 struct mlx5_flow_tbl_data_entry, tbl);
15274 act_cnt->dr_jump_action[domain] =
15275 tbl_data->jump.action;
15276 act_cnt->fate_action =
15277 MLX5_FLOW_FATE_JUMP;
15278 action_flags |= MLX5_FLOW_ACTION_JUMP;
15281 case RTE_FLOW_ACTION_TYPE_METER:
15283 const struct rte_flow_action_meter *mtr;
15284 struct mlx5_flow_meter_info *next_fm;
15285 struct mlx5_flow_meter_policy *next_policy;
15286 struct rte_flow_action tag_action;
15287 struct mlx5_rte_flow_action_set_tag set_tag;
15288 uint32_t next_mtr_idx = 0;
15291 next_fm = mlx5_flow_meter_find(priv,
15295 return -rte_mtr_error_set(error, EINVAL,
15296 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15297 "Fail to find next meter.");
15298 if (next_fm->def_policy)
15299 return -rte_mtr_error_set(error, EINVAL,
15300 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15301 "Hierarchy only supports termination meter.");
15302 next_policy = mlx5_flow_meter_policy_find(dev,
15303 next_fm->policy_id, NULL);
15304 MLX5_ASSERT(next_policy);
15305 if (next_fm->drop_cnt) {
15308 mlx5_flow_get_reg_id(dev,
15311 (struct rte_flow_error *)error);
15312 set_tag.offset = (priv->mtr_reg_share ?
15313 MLX5_MTR_COLOR_BITS : 0);
15314 set_tag.length = (priv->mtr_reg_share ?
15315 MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15317 set_tag.data = next_mtr_idx;
15319 (enum rte_flow_action_type)
15320 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15321 tag_action.conf = &set_tag;
15322 if (flow_dv_convert_action_set_reg
15323 (mhdr_res, &tag_action,
15324 (struct rte_flow_error *)error))
15327 MLX5_FLOW_ACTION_SET_TAG;
15329 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15330 act_cnt->next_mtr_id = next_fm->meter_id;
15331 act_cnt->next_sub_policy = NULL;
15332 mtr_policy->is_hierarchy = 1;
15333 mtr_policy->dev = next_policy->dev;
15335 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15339 return -rte_mtr_error_set(error, ENOTSUP,
15340 RTE_MTR_ERROR_TYPE_METER_POLICY,
15341 NULL, "action type not supported");
15343 if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15344 /* create modify action if needed. */
15345 dev_flow.dv.group = 1;
15346 if (flow_dv_modify_hdr_resource_register
15347 (dev, mhdr_res, &dev_flow, &flow_err))
15348 return -rte_mtr_error_set(error,
15350 RTE_MTR_ERROR_TYPE_METER_POLICY,
15351 NULL, "cannot register policy "
15353 act_cnt->modify_hdr =
15354 dev_flow.handle->dvh.modify_hdr;
15362 * Create policy action per domain, lock free,
15363 * (mutex should be acquired by caller).
15364 * Dispatcher for action type specific call.
15367 * Pointer to the Ethernet device structure.
15368 * @param[in] mtr_policy
15369 * Meter policy struct.
15370 * @param[in] action
15371 * Action specification used to create meter actions.
15372 * @param[out] error
15373 * Perform verbose error reporting if not NULL. Initialized in case of
15377 * 0 on success, otherwise negative errno value.
15380 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15381 struct mlx5_flow_meter_policy *mtr_policy,
15382 const struct rte_flow_action *actions[RTE_COLORS],
15383 struct rte_mtr_error *error)
15386 uint16_t sub_policy_num;
15388 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15389 sub_policy_num = (mtr_policy->sub_policy_num >>
15390 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15391 MLX5_MTR_SUB_POLICY_NUM_MASK;
15392 if (sub_policy_num) {
15393 ret = __flow_dv_create_domain_policy_acts(dev,
15394 mtr_policy, actions,
15395 (enum mlx5_meter_domain)i, error);
15404 * Query a DV flow rule for its statistics via DevX.
15407 * Pointer to Ethernet device.
15408 * @param[in] cnt_idx
15409 * Index to the flow counter.
15411 * Data retrieved by the query.
15412 * @param[out] error
15413 * Perform verbose error reporting if not NULL.
15416 * 0 on success, a negative errno value otherwise and rte_errno is set.
15419 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15420 struct rte_flow_error *error)
15422 struct mlx5_priv *priv = dev->data->dev_private;
15423 struct rte_flow_query_count *qc = data;
15425 if (!priv->config.devx)
15426 return rte_flow_error_set(error, ENOTSUP,
15427 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15429 "counters are not supported");
15431 uint64_t pkts, bytes;
15432 struct mlx5_flow_counter *cnt;
15433 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15436 return rte_flow_error_set(error, -err,
15437 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15438 NULL, "cannot read counters");
15439 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15442 qc->hits = pkts - cnt->hits;
15443 qc->bytes = bytes - cnt->bytes;
15446 cnt->bytes = bytes;
15450 return rte_flow_error_set(error, EINVAL,
15451 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15453 "counters are not available");
15457 flow_dv_action_query(struct rte_eth_dev *dev,
15458 const struct rte_flow_action_handle *handle, void *data,
15459 struct rte_flow_error *error)
15461 struct mlx5_age_param *age_param;
15462 struct rte_flow_query_age *resp;
15463 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15464 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15465 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15466 struct mlx5_priv *priv = dev->data->dev_private;
15467 struct mlx5_aso_ct_action *ct;
15472 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15473 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15475 resp->aged = __atomic_load_n(&age_param->state,
15476 __ATOMIC_RELAXED) == AGE_TMOUT ?
15478 resp->sec_since_last_hit_valid = !resp->aged;
15479 if (resp->sec_since_last_hit_valid)
15480 resp->sec_since_last_hit = __atomic_load_n
15481 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15483 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15484 return flow_dv_query_count(dev, idx, data, error);
15485 case MLX5_INDIRECT_ACTION_TYPE_CT:
15486 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15487 if (owner != PORT_ID(priv))
15488 return rte_flow_error_set(error, EACCES,
15489 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15491 "CT object owned by another port");
15492 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15493 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15496 return rte_flow_error_set(error, EFAULT,
15497 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15499 "CT object is inactive");
15500 ((struct rte_flow_action_conntrack *)data)->peer_port =
15502 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15504 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15505 return rte_flow_error_set(error, EIO,
15506 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15508 "Failed to query CT context");
15511 return rte_flow_error_set(error, ENOTSUP,
15512 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15513 "action type query not supported");
15518 * Query a flow rule AGE action for aging information.
15521 * Pointer to Ethernet device.
15523 * Pointer to the sub flow.
15525 * data retrieved by the query.
15526 * @param[out] error
15527 * Perform verbose error reporting if not NULL.
15530 * 0 on success, a negative errno value otherwise and rte_errno is set.
15533 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15534 void *data, struct rte_flow_error *error)
15536 struct rte_flow_query_age *resp = data;
15537 struct mlx5_age_param *age_param;
15540 struct mlx5_aso_age_action *act =
15541 flow_aso_age_get_by_idx(dev, flow->age);
15543 age_param = &act->age_params;
15544 } else if (flow->counter) {
15545 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15547 if (!age_param || !age_param->timeout)
15548 return rte_flow_error_set
15550 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15551 NULL, "cannot read age data");
15553 return rte_flow_error_set(error, EINVAL,
15554 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15555 NULL, "age data not available");
15557 resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15559 resp->sec_since_last_hit_valid = !resp->aged;
15560 if (resp->sec_since_last_hit_valid)
15561 resp->sec_since_last_hit = __atomic_load_n
15562 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15569 * @see rte_flow_query()
15570 * @see rte_flow_ops
15573 flow_dv_query(struct rte_eth_dev *dev,
15574 struct rte_flow *flow __rte_unused,
15575 const struct rte_flow_action *actions __rte_unused,
15576 void *data __rte_unused,
15577 struct rte_flow_error *error __rte_unused)
15581 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15582 switch (actions->type) {
15583 case RTE_FLOW_ACTION_TYPE_VOID:
15585 case RTE_FLOW_ACTION_TYPE_COUNT:
15586 ret = flow_dv_query_count(dev, flow->counter, data,
15589 case RTE_FLOW_ACTION_TYPE_AGE:
15590 ret = flow_dv_query_age(dev, flow, data, error);
15593 return rte_flow_error_set(error, ENOTSUP,
15594 RTE_FLOW_ERROR_TYPE_ACTION,
15596 "action not supported");
15603 * Destroy the meter table set.
15604 * Lock free, (mutex should be acquired by caller).
15607 * Pointer to Ethernet device.
15609 * Meter information table.
15612 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15613 struct mlx5_flow_meter_info *fm)
15615 struct mlx5_priv *priv = dev->data->dev_private;
15618 if (!fm || !priv->config.dv_flow_en)
15620 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15621 if (fm->drop_rule[i]) {
15622 claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15623 fm->drop_rule[i] = NULL;
15629 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15631 struct mlx5_priv *priv = dev->data->dev_private;
15632 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15633 struct mlx5_flow_tbl_data_entry *tbl;
15636 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15637 if (mtrmng->def_rule[i]) {
15638 claim_zero(mlx5_flow_os_destroy_flow
15639 (mtrmng->def_rule[i]));
15640 mtrmng->def_rule[i] = NULL;
15642 if (mtrmng->def_matcher[i]) {
15643 tbl = container_of(mtrmng->def_matcher[i]->tbl,
15644 struct mlx5_flow_tbl_data_entry, tbl);
15645 mlx5_list_unregister(tbl->matchers,
15646 &mtrmng->def_matcher[i]->entry);
15647 mtrmng->def_matcher[i] = NULL;
15649 for (j = 0; j < MLX5_REG_BITS; j++) {
15650 if (mtrmng->drop_matcher[i][j]) {
15652 container_of(mtrmng->drop_matcher[i][j]->tbl,
15653 struct mlx5_flow_tbl_data_entry,
15655 mlx5_list_unregister(tbl->matchers,
15656 &mtrmng->drop_matcher[i][j]->entry);
15657 mtrmng->drop_matcher[i][j] = NULL;
15660 if (mtrmng->drop_tbl[i]) {
15661 flow_dv_tbl_resource_release(MLX5_SH(dev),
15662 mtrmng->drop_tbl[i]);
15663 mtrmng->drop_tbl[i] = NULL;
15668 /* Number of meter flow actions, count and jump or count and drop. */
15669 #define METER_ACTIONS 2
15672 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15673 enum mlx5_meter_domain domain)
15675 struct mlx5_priv *priv = dev->data->dev_private;
15676 struct mlx5_flow_meter_def_policy *def_policy =
15677 priv->sh->mtrmng->def_policy[domain];
15679 __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15680 mlx5_free(def_policy);
15681 priv->sh->mtrmng->def_policy[domain] = NULL;
15685 * Destroy the default policy table set.
15688 * Pointer to Ethernet device.
15691 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15693 struct mlx5_priv *priv = dev->data->dev_private;
15696 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15697 if (priv->sh->mtrmng->def_policy[i])
15698 __flow_dv_destroy_domain_def_policy(dev,
15699 (enum mlx5_meter_domain)i);
15700 priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15704 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15705 uint32_t color_reg_c_idx,
15706 enum rte_color color, void *matcher_object,
15707 int actions_n, void *actions,
15708 bool match_src_port, const struct rte_flow_item *item,
15709 void **rule, const struct rte_flow_attr *attr)
15712 struct mlx5_flow_dv_match_params value = {
15713 .size = sizeof(value.buf),
15715 struct mlx5_flow_dv_match_params matcher = {
15716 .size = sizeof(matcher.buf),
15718 struct mlx5_priv *priv = dev->data->dev_private;
15721 if (match_src_port && (priv->representor || priv->master)) {
15722 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15723 value.buf, item, attr)) {
15725 "Failed to create meter policy flow with port.");
15729 flow_dv_match_meta_reg(matcher.buf, value.buf,
15730 (enum modify_reg)color_reg_c_idx,
15731 rte_col_2_mlx5_col(color),
15733 misc_mask = flow_dv_matcher_enable(value.buf);
15734 __flow_dv_adjust_buf_size(&value.size, misc_mask);
15735 ret = mlx5_flow_os_create_flow(matcher_object,
15736 (void *)&value, actions_n, actions, rule);
15738 DRV_LOG(ERR, "Failed to create meter policy flow.");
15745 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15746 uint32_t color_reg_c_idx,
15748 struct mlx5_flow_meter_sub_policy *sub_policy,
15749 const struct rte_flow_attr *attr,
15750 bool match_src_port,
15751 const struct rte_flow_item *item,
15752 struct mlx5_flow_dv_matcher **policy_matcher,
15753 struct rte_flow_error *error)
15755 struct mlx5_list_entry *entry;
15756 struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15757 struct mlx5_flow_dv_matcher matcher = {
15759 .size = sizeof(matcher.mask.buf),
15763 struct mlx5_flow_dv_match_params value = {
15764 .size = sizeof(value.buf),
15766 struct mlx5_flow_cb_ctx ctx = {
15770 struct mlx5_flow_tbl_data_entry *tbl_data;
15771 struct mlx5_priv *priv = dev->data->dev_private;
15772 uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
15774 if (match_src_port && (priv->representor || priv->master)) {
15775 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
15776 value.buf, item, attr)) {
15778 "Failed to register meter drop matcher with port.");
15782 tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
15783 if (priority < RTE_COLOR_RED)
15784 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15785 (enum modify_reg)color_reg_c_idx, 0, color_mask);
15786 matcher.priority = priority;
15787 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
15788 matcher.mask.size);
15789 entry = mlx5_list_register(tbl_data->matchers, &ctx);
15791 DRV_LOG(ERR, "Failed to register meter drop matcher.");
15795 container_of(entry, struct mlx5_flow_dv_matcher, entry);
15800 * Create the policy rules per domain.
15803 * Pointer to Ethernet device.
15804 * @param[in] sub_policy
15805 * Pointer to sub policy table..
15806 * @param[in] egress
15807 * Direction of the table.
15808 * @param[in] transfer
15809 * E-Switch or NIC flow.
15811 * Pointer to policy action list per color.
15814 * 0 on success, -1 otherwise.
15817 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
15818 struct mlx5_flow_meter_sub_policy *sub_policy,
15819 uint8_t egress, uint8_t transfer, bool match_src_port,
15820 struct mlx5_meter_policy_acts acts[RTE_COLORS])
15822 struct mlx5_priv *priv = dev->data->dev_private;
15823 struct rte_flow_error flow_err;
15824 uint32_t color_reg_c_idx;
15825 struct rte_flow_attr attr = {
15826 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
15829 .egress = !!egress,
15830 .transfer = !!transfer,
15834 int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
15835 struct mlx5_sub_policy_color_rule *color_rule;
15839 /* Create policy table with POLICY level. */
15840 if (!sub_policy->tbl_rsc)
15841 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
15842 MLX5_FLOW_TABLE_LEVEL_POLICY,
15843 egress, transfer, false, NULL, 0, 0,
15844 sub_policy->idx, &flow_err);
15845 if (!sub_policy->tbl_rsc) {
15847 "Failed to create meter sub policy table.");
15850 /* Prepare matchers. */
15851 color_reg_c_idx = ret;
15852 for (i = 0; i < RTE_COLORS; i++) {
15853 TAILQ_INIT(&sub_policy->color_rules[i]);
15854 if (i == RTE_COLOR_YELLOW || !acts[i].actions_n)
15856 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
15857 sizeof(struct mlx5_sub_policy_color_rule),
15860 DRV_LOG(ERR, "No memory to create color rule.");
15863 color_rule->src_port = priv->representor_id;
15865 /* Create matchers for Color. */
15866 if (__flow_dv_create_policy_matcher(dev,
15867 color_reg_c_idx, i, sub_policy, &attr,
15868 (i != RTE_COLOR_RED ? match_src_port : false),
15869 NULL, &color_rule->matcher, &flow_err)) {
15870 DRV_LOG(ERR, "Failed to create color matcher.");
15873 /* Create flow, matching color. */
15874 if (__flow_dv_create_policy_flow(dev,
15875 color_reg_c_idx, (enum rte_color)i,
15876 color_rule->matcher->matcher_object,
15878 acts[i].dv_actions,
15879 (i != RTE_COLOR_RED ? match_src_port : false),
15880 NULL, &color_rule->rule,
15882 DRV_LOG(ERR, "Failed to create color rule.");
15885 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
15886 color_rule, next_port);
15891 if (color_rule->rule)
15892 mlx5_flow_os_destroy_flow(color_rule->rule);
15893 if (color_rule->matcher) {
15894 struct mlx5_flow_tbl_data_entry *tbl =
15895 container_of(color_rule->matcher->tbl,
15896 typeof(*tbl), tbl);
15897 mlx5_list_unregister(tbl->matchers,
15898 &color_rule->matcher->entry);
15900 mlx5_free(color_rule);
15906 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
15907 struct mlx5_flow_meter_policy *mtr_policy,
15908 struct mlx5_flow_meter_sub_policy *sub_policy,
15911 struct mlx5_priv *priv = dev->data->dev_private;
15912 struct mlx5_meter_policy_acts acts[RTE_COLORS];
15913 struct mlx5_flow_dv_tag_resource *tag;
15914 struct mlx5_flow_dv_port_id_action_resource *port_action;
15915 struct mlx5_hrxq *hrxq;
15916 struct mlx5_flow_meter_info *next_fm = NULL;
15917 struct mlx5_flow_meter_policy *next_policy;
15918 struct mlx5_flow_meter_sub_policy *next_sub_policy;
15919 struct mlx5_flow_tbl_data_entry *tbl_data;
15920 struct rte_flow_error error;
15921 uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15922 uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15923 bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
15924 bool match_src_port = false;
15927 for (i = 0; i < RTE_COLORS; i++) {
15928 acts[i].actions_n = 0;
15929 if (i == RTE_COLOR_YELLOW)
15931 if (i == RTE_COLOR_RED) {
15932 /* Only support drop on red. */
15933 acts[i].dv_actions[0] =
15934 mtr_policy->dr_drop_action[domain];
15935 acts[i].actions_n = 1;
15938 if (mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
15939 struct rte_flow_attr attr = {
15940 .transfer = transfer
15943 next_fm = mlx5_flow_meter_find(priv,
15944 mtr_policy->act_cnt[i].next_mtr_id,
15948 "Failed to get next hierarchy meter.");
15951 if (mlx5_flow_meter_attach(priv, next_fm,
15953 DRV_LOG(ERR, "%s", error.message);
15957 /* Meter action must be the first for TX. */
15959 acts[i].dv_actions[acts[i].actions_n] =
15960 next_fm->meter_action;
15961 acts[i].actions_n++;
15964 if (mtr_policy->act_cnt[i].rix_mark) {
15965 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
15966 mtr_policy->act_cnt[i].rix_mark);
15968 DRV_LOG(ERR, "Failed to find "
15969 "mark action for policy.");
15972 acts[i].dv_actions[acts[i].actions_n] =
15974 acts[i].actions_n++;
15976 if (mtr_policy->act_cnt[i].modify_hdr) {
15977 acts[i].dv_actions[acts[i].actions_n] =
15978 mtr_policy->act_cnt[i].modify_hdr->action;
15979 acts[i].actions_n++;
15981 if (mtr_policy->act_cnt[i].fate_action) {
15982 switch (mtr_policy->act_cnt[i].fate_action) {
15983 case MLX5_FLOW_FATE_PORT_ID:
15984 port_action = mlx5_ipool_get
15985 (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
15986 mtr_policy->act_cnt[i].rix_port_id_action);
15987 if (!port_action) {
15988 DRV_LOG(ERR, "Failed to find "
15989 "port action for policy.");
15992 acts[i].dv_actions[acts[i].actions_n] =
15993 port_action->action;
15994 acts[i].actions_n++;
15995 mtr_policy->dev = dev;
15996 match_src_port = true;
15998 case MLX5_FLOW_FATE_DROP:
15999 case MLX5_FLOW_FATE_JUMP:
16000 acts[i].dv_actions[acts[i].actions_n] =
16001 mtr_policy->act_cnt[i].dr_jump_action[domain];
16002 acts[i].actions_n++;
16004 case MLX5_FLOW_FATE_SHARED_RSS:
16005 case MLX5_FLOW_FATE_QUEUE:
16006 hrxq = mlx5_ipool_get
16007 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16008 sub_policy->rix_hrxq[i]);
16010 DRV_LOG(ERR, "Failed to find "
16011 "queue action for policy.");
16014 acts[i].dv_actions[acts[i].actions_n] =
16016 acts[i].actions_n++;
16018 case MLX5_FLOW_FATE_MTR:
16021 "No next hierarchy meter.");
16025 acts[i].dv_actions[acts[i].actions_n] =
16026 next_fm->meter_action;
16027 acts[i].actions_n++;
16029 if (mtr_policy->act_cnt[i].next_sub_policy) {
16031 mtr_policy->act_cnt[i].next_sub_policy;
16034 mlx5_flow_meter_policy_find(dev,
16035 next_fm->policy_id, NULL);
16036 MLX5_ASSERT(next_policy);
16038 next_policy->sub_policys[domain][0];
16041 container_of(next_sub_policy->tbl_rsc,
16042 struct mlx5_flow_tbl_data_entry, tbl);
16043 acts[i].dv_actions[acts[i].actions_n++] =
16044 tbl_data->jump.action;
16045 if (mtr_policy->act_cnt[i].modify_hdr)
16046 match_src_port = !!transfer;
16049 /*Queue action do nothing*/
16054 if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16055 egress, transfer, match_src_port, acts)) {
16057 "Failed to create policy rules per domain.");
16063 mlx5_flow_meter_detach(priv, next_fm);
16068 * Create the policy rules.
16071 * Pointer to Ethernet device.
16072 * @param[in,out] mtr_policy
16073 * Pointer to meter policy table.
16076 * 0 on success, -1 otherwise.
16079 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16080 struct mlx5_flow_meter_policy *mtr_policy)
16083 uint16_t sub_policy_num;
16085 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16086 sub_policy_num = (mtr_policy->sub_policy_num >>
16087 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16088 MLX5_MTR_SUB_POLICY_NUM_MASK;
16089 if (!sub_policy_num)
16091 /* Prepare actions list and create policy rules. */
16092 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16093 mtr_policy->sub_policys[i][0], i)) {
16095 "Failed to create policy action list per domain.");
16103 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16105 struct mlx5_priv *priv = dev->data->dev_private;
16106 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16107 struct mlx5_flow_meter_def_policy *def_policy;
16108 struct mlx5_flow_tbl_resource *jump_tbl;
16109 struct mlx5_flow_tbl_data_entry *tbl_data;
16110 uint8_t egress, transfer;
16111 struct rte_flow_error error;
16112 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16115 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16116 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16117 def_policy = mtrmng->def_policy[domain];
16119 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16120 sizeof(struct mlx5_flow_meter_def_policy),
16121 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16123 DRV_LOG(ERR, "Failed to alloc "
16124 "default policy table.");
16125 goto def_policy_error;
16127 mtrmng->def_policy[domain] = def_policy;
16128 /* Create the meter suffix table with SUFFIX level. */
16129 jump_tbl = flow_dv_tbl_resource_get(dev,
16130 MLX5_FLOW_TABLE_LEVEL_METER,
16131 egress, transfer, false, NULL, 0,
16132 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16135 "Failed to create meter suffix table.");
16136 goto def_policy_error;
16138 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16139 tbl_data = container_of(jump_tbl,
16140 struct mlx5_flow_tbl_data_entry, tbl);
16141 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16142 tbl_data->jump.action;
16143 acts[RTE_COLOR_GREEN].dv_actions[0] =
16144 tbl_data->jump.action;
16145 acts[RTE_COLOR_GREEN].actions_n = 1;
16146 /* Create jump action to the drop table. */
16147 if (!mtrmng->drop_tbl[domain]) {
16148 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16149 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16150 egress, transfer, false, NULL, 0,
16151 0, MLX5_MTR_TABLE_ID_DROP, &error);
16152 if (!mtrmng->drop_tbl[domain]) {
16153 DRV_LOG(ERR, "Failed to create "
16154 "meter drop table for default policy.");
16155 goto def_policy_error;
16158 tbl_data = container_of(mtrmng->drop_tbl[domain],
16159 struct mlx5_flow_tbl_data_entry, tbl);
16160 def_policy->dr_jump_action[RTE_COLOR_RED] =
16161 tbl_data->jump.action;
16162 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16163 acts[RTE_COLOR_RED].actions_n = 1;
16164 /* Create default policy rules. */
16165 ret = __flow_dv_create_domain_policy_rules(dev,
16166 &def_policy->sub_policy,
16167 egress, transfer, false, acts);
16169 DRV_LOG(ERR, "Failed to create "
16170 "default policy rules.");
16171 goto def_policy_error;
16176 __flow_dv_destroy_domain_def_policy(dev,
16177 (enum mlx5_meter_domain)domain);
16182 * Create the default policy table set.
16185 * Pointer to Ethernet device.
16187 * 0 on success, -1 otherwise.
16190 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16192 struct mlx5_priv *priv = dev->data->dev_private;
16195 /* Non-termination policy table. */
16196 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16197 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16199 if (__flow_dv_create_domain_def_policy(dev, i)) {
16201 "Failed to create default policy");
16209 * Create the needed meter tables.
16210 * Lock free, (mutex should be acquired by caller).
16213 * Pointer to Ethernet device.
16215 * Meter information table.
16216 * @param[in] mtr_idx
16218 * @param[in] domain_bitmap
16221 * 0 on success, -1 otherwise.
16224 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16225 struct mlx5_flow_meter_info *fm,
16227 uint8_t domain_bitmap)
16229 struct mlx5_priv *priv = dev->data->dev_private;
16230 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16231 struct rte_flow_error error;
16232 struct mlx5_flow_tbl_data_entry *tbl_data;
16233 uint8_t egress, transfer;
16234 void *actions[METER_ACTIONS];
16235 int domain, ret, i;
16236 struct mlx5_flow_counter *cnt;
16237 struct mlx5_flow_dv_match_params value = {
16238 .size = sizeof(value.buf),
16240 struct mlx5_flow_dv_match_params matcher_para = {
16241 .size = sizeof(matcher_para.buf),
16243 int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16245 uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16246 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16247 struct mlx5_list_entry *entry;
16248 struct mlx5_flow_dv_matcher matcher = {
16250 .size = sizeof(matcher.mask.buf),
16253 struct mlx5_flow_dv_matcher *drop_matcher;
16254 struct mlx5_flow_cb_ctx ctx = {
16260 if (!priv->mtr_en || mtr_id_reg_c < 0) {
16261 rte_errno = ENOTSUP;
16264 for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16265 if (!(domain_bitmap & (1 << domain)) ||
16266 (mtrmng->def_rule[domain] && !fm->drop_cnt))
16268 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16269 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16270 /* Create the drop table with METER DROP level. */
16271 if (!mtrmng->drop_tbl[domain]) {
16272 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16273 MLX5_FLOW_TABLE_LEVEL_METER,
16274 egress, transfer, false, NULL, 0,
16275 0, MLX5_MTR_TABLE_ID_DROP, &error);
16276 if (!mtrmng->drop_tbl[domain]) {
16277 DRV_LOG(ERR, "Failed to create meter drop table.");
16281 /* Create default matcher in drop table. */
16282 matcher.tbl = mtrmng->drop_tbl[domain],
16283 tbl_data = container_of(mtrmng->drop_tbl[domain],
16284 struct mlx5_flow_tbl_data_entry, tbl);
16285 if (!mtrmng->def_matcher[domain]) {
16286 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16287 (enum modify_reg)mtr_id_reg_c,
16289 matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16290 matcher.crc = rte_raw_cksum
16291 ((const void *)matcher.mask.buf,
16292 matcher.mask.size);
16293 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16295 DRV_LOG(ERR, "Failed to register meter "
16296 "drop default matcher.");
16299 mtrmng->def_matcher[domain] = container_of(entry,
16300 struct mlx5_flow_dv_matcher, entry);
16302 /* Create default rule in drop table. */
16303 if (!mtrmng->def_rule[domain]) {
16305 actions[i++] = priv->sh->dr_drop_action;
16306 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16307 (enum modify_reg)mtr_id_reg_c, 0, 0);
16308 misc_mask = flow_dv_matcher_enable(value.buf);
16309 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16310 ret = mlx5_flow_os_create_flow
16311 (mtrmng->def_matcher[domain]->matcher_object,
16312 (void *)&value, i, actions,
16313 &mtrmng->def_rule[domain]);
16315 DRV_LOG(ERR, "Failed to create meter "
16316 "default drop rule for drop table.");
16322 MLX5_ASSERT(mtrmng->max_mtr_bits);
16323 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16324 /* Create matchers for Drop. */
16325 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16326 (enum modify_reg)mtr_id_reg_c, 0,
16327 (mtr_id_mask << mtr_id_offset));
16328 matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16329 matcher.crc = rte_raw_cksum
16330 ((const void *)matcher.mask.buf,
16331 matcher.mask.size);
16332 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16335 "Failed to register meter drop matcher.");
16338 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16339 container_of(entry, struct mlx5_flow_dv_matcher,
16343 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16344 /* Create drop rule, matching meter_id only. */
16345 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16346 (enum modify_reg)mtr_id_reg_c,
16347 (mtr_idx << mtr_id_offset), UINT32_MAX);
16349 cnt = flow_dv_counter_get_by_idx(dev,
16350 fm->drop_cnt, NULL);
16351 actions[i++] = cnt->action;
16352 actions[i++] = priv->sh->dr_drop_action;
16353 misc_mask = flow_dv_matcher_enable(value.buf);
16354 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16355 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16356 (void *)&value, i, actions,
16357 &fm->drop_rule[domain]);
16359 DRV_LOG(ERR, "Failed to create meter "
16360 "drop rule for drop table.");
16366 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16367 if (fm->drop_rule[i]) {
16368 claim_zero(mlx5_flow_os_destroy_flow
16369 (fm->drop_rule[i]));
16370 fm->drop_rule[i] = NULL;
16376 static struct mlx5_flow_meter_sub_policy *
16377 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16378 struct mlx5_flow_meter_policy *mtr_policy,
16379 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16380 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16383 struct mlx5_priv *priv = dev->data->dev_private;
16384 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16385 uint32_t sub_policy_idx = 0;
16386 uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16388 struct mlx5_hrxq *hrxq;
16389 struct mlx5_flow_handle dh;
16390 struct mlx5_meter_policy_action_container *act_cnt;
16391 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16392 uint16_t sub_policy_num;
16394 rte_spinlock_lock(&mtr_policy->sl);
16395 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16398 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16399 if (!hrxq_idx[i]) {
16400 rte_spinlock_unlock(&mtr_policy->sl);
16404 sub_policy_num = (mtr_policy->sub_policy_num >>
16405 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16406 MLX5_MTR_SUB_POLICY_NUM_MASK;
16407 for (i = 0; i < sub_policy_num;
16409 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++) {
16412 mtr_policy->sub_policys[domain][i]->rix_hrxq[j])
16415 if (j >= MLX5_MTR_RTE_COLORS) {
16417 * Found the sub policy table with
16418 * the same queue per color
16420 rte_spinlock_unlock(&mtr_policy->sl);
16421 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++)
16422 mlx5_hrxq_release(dev, hrxq_idx[j]);
16424 return mtr_policy->sub_policys[domain][i];
16427 /* Create sub policy. */
16428 if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16429 /* Reuse the first dummy sub_policy*/
16430 sub_policy = mtr_policy->sub_policys[domain][0];
16431 sub_policy_idx = sub_policy->idx;
16433 sub_policy = mlx5_ipool_zmalloc
16434 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16437 sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16438 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16439 mlx5_hrxq_release(dev, hrxq_idx[i]);
16440 goto rss_sub_policy_error;
16442 sub_policy->idx = sub_policy_idx;
16443 sub_policy->main_policy = mtr_policy;
16445 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16448 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16449 if (mtr_policy->is_hierarchy) {
16450 act_cnt = &mtr_policy->act_cnt[i];
16451 act_cnt->next_sub_policy = next_sub_policy;
16452 mlx5_hrxq_release(dev, hrxq_idx[i]);
16455 * Overwrite the last action from
16456 * RSS action to Queue action.
16458 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16461 DRV_LOG(ERR, "Failed to create policy hrxq");
16462 goto rss_sub_policy_error;
16464 act_cnt = &mtr_policy->act_cnt[i];
16465 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16466 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16467 if (act_cnt->rix_mark)
16469 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16470 dh.rix_hrxq = hrxq_idx[i];
16471 flow_drv_rxq_flags_set(dev, &dh);
16475 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16476 sub_policy, domain)) {
16477 DRV_LOG(ERR, "Failed to create policy "
16478 "rules per domain.");
16479 goto rss_sub_policy_error;
16481 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16482 i = (mtr_policy->sub_policy_num >>
16483 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16484 MLX5_MTR_SUB_POLICY_NUM_MASK;
16485 mtr_policy->sub_policys[domain][i] = sub_policy;
16487 if (i > MLX5_MTR_RSS_MAX_SUB_POLICY)
16488 goto rss_sub_policy_error;
16489 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16490 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16491 mtr_policy->sub_policy_num |=
16492 (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16493 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16495 rte_spinlock_unlock(&mtr_policy->sl);
16498 rss_sub_policy_error:
16500 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16501 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16502 i = (mtr_policy->sub_policy_num >>
16503 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16504 MLX5_MTR_SUB_POLICY_NUM_MASK;
16505 mtr_policy->sub_policys[domain][i] = NULL;
16507 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16511 rte_spinlock_unlock(&mtr_policy->sl);
16516 * Find the policy table for prefix table with RSS.
16519 * Pointer to Ethernet device.
16520 * @param[in] mtr_policy
16521 * Pointer to meter policy table.
16522 * @param[in] rss_desc
16523 * Pointer to rss_desc
16525 * Pointer to table set on success, NULL otherwise and rte_errno is set.
16527 static struct mlx5_flow_meter_sub_policy *
16528 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16529 struct mlx5_flow_meter_policy *mtr_policy,
16530 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16532 struct mlx5_priv *priv = dev->data->dev_private;
16533 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16534 struct mlx5_flow_meter_info *next_fm;
16535 struct mlx5_flow_meter_policy *next_policy;
16536 struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16537 struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16538 struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16539 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16540 bool reuse_sub_policy;
16545 /* Iterate hierarchy to get all policies in this hierarchy. */
16546 policies[i++] = mtr_policy;
16547 if (!mtr_policy->is_hierarchy)
16549 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16550 DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16553 next_fm = mlx5_flow_meter_find(priv,
16554 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16556 DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16560 mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16562 MLX5_ASSERT(next_policy);
16563 mtr_policy = next_policy;
16567 * From last policy to the first one in hierarchy,
16568 * create/get the sub policy for each of them.
16570 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16574 &reuse_sub_policy);
16576 DRV_LOG(ERR, "Failed to get the sub policy.");
16579 if (!reuse_sub_policy)
16580 sub_policies[j++] = sub_policy;
16581 next_sub_policy = sub_policy;
16586 uint16_t sub_policy_num;
16588 sub_policy = sub_policies[--j];
16589 mtr_policy = sub_policy->main_policy;
16590 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16591 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16592 sub_policy_num = (mtr_policy->sub_policy_num >>
16593 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16594 MLX5_MTR_SUB_POLICY_NUM_MASK;
16595 mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16598 mtr_policy->sub_policy_num &=
16599 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16600 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16601 mtr_policy->sub_policy_num |=
16602 (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16603 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16604 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16612 * Create the sub policy tag rule for all meters in hierarchy.
16615 * Pointer to Ethernet device.
16617 * Meter information table.
16618 * @param[in] src_port
16619 * The src port this extra rule should use.
16621 * The src port match item.
16622 * @param[out] error
16623 * Perform verbose error reporting if not NULL.
16625 * 0 on success, a negative errno value otherwise and rte_errno is set.
16628 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16629 struct mlx5_flow_meter_info *fm,
16631 const struct rte_flow_item *item,
16632 struct rte_flow_error *error)
16634 struct mlx5_priv *priv = dev->data->dev_private;
16635 struct mlx5_flow_meter_policy *mtr_policy;
16636 struct mlx5_flow_meter_sub_policy *sub_policy;
16637 struct mlx5_flow_meter_info *next_fm = NULL;
16638 struct mlx5_flow_meter_policy *next_policy;
16639 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16640 struct mlx5_flow_tbl_data_entry *tbl_data;
16641 struct mlx5_sub_policy_color_rule *color_rule;
16642 struct mlx5_meter_policy_acts acts;
16643 uint32_t color_reg_c_idx;
16644 bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16645 struct rte_flow_attr attr = {
16646 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16653 uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16656 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16657 MLX5_ASSERT(mtr_policy);
16658 if (!mtr_policy->is_hierarchy)
16660 next_fm = mlx5_flow_meter_find(priv,
16661 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16663 return rte_flow_error_set(error, EINVAL,
16664 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16665 "Failed to find next meter in hierarchy.");
16667 if (!next_fm->drop_cnt)
16669 color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16670 sub_policy = mtr_policy->sub_policys[domain][0];
16671 for (i = 0; i < RTE_COLORS; i++) {
16672 bool rule_exist = false;
16673 struct mlx5_meter_policy_action_container *act_cnt;
16675 if (i >= RTE_COLOR_YELLOW)
16677 TAILQ_FOREACH(color_rule,
16678 &sub_policy->color_rules[i], next_port)
16679 if (color_rule->src_port == src_port) {
16685 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16686 sizeof(struct mlx5_sub_policy_color_rule),
16689 return rte_flow_error_set(error, ENOMEM,
16690 RTE_FLOW_ERROR_TYPE_ACTION,
16691 NULL, "No memory to create tag color rule.");
16692 color_rule->src_port = src_port;
16694 next_policy = mlx5_flow_meter_policy_find(dev,
16695 next_fm->policy_id, NULL);
16696 MLX5_ASSERT(next_policy);
16697 next_sub_policy = next_policy->sub_policys[domain][0];
16698 tbl_data = container_of(next_sub_policy->tbl_rsc,
16699 struct mlx5_flow_tbl_data_entry, tbl);
16700 act_cnt = &mtr_policy->act_cnt[i];
16702 acts.dv_actions[0] = next_fm->meter_action;
16703 acts.dv_actions[1] = act_cnt->modify_hdr->action;
16705 acts.dv_actions[0] = act_cnt->modify_hdr->action;
16706 acts.dv_actions[1] = next_fm->meter_action;
16708 acts.dv_actions[2] = tbl_data->jump.action;
16709 acts.actions_n = 3;
16710 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16714 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16715 i, sub_policy, &attr, true, item,
16716 &color_rule->matcher, error)) {
16717 rte_flow_error_set(error, errno,
16718 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16719 "Failed to create hierarchy meter matcher.");
16722 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
16724 color_rule->matcher->matcher_object,
16725 acts.actions_n, acts.dv_actions,
16727 &color_rule->rule, &attr)) {
16728 rte_flow_error_set(error, errno,
16729 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16730 "Failed to create hierarchy meter rule.");
16733 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16734 color_rule, next_port);
16738 * Recursive call to iterate all meters in hierarchy and
16739 * create needed rules.
16741 return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
16742 src_port, item, error);
16745 if (color_rule->rule)
16746 mlx5_flow_os_destroy_flow(color_rule->rule);
16747 if (color_rule->matcher) {
16748 struct mlx5_flow_tbl_data_entry *tbl =
16749 container_of(color_rule->matcher->tbl,
16750 typeof(*tbl), tbl);
16751 mlx5_list_unregister(tbl->matchers,
16752 &color_rule->matcher->entry);
16754 mlx5_free(color_rule);
16757 mlx5_flow_meter_detach(priv, next_fm);
16762 * Destroy the sub policy table with RX queue.
16765 * Pointer to Ethernet device.
16766 * @param[in] mtr_policy
16767 * Pointer to meter policy table.
16770 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
16771 struct mlx5_flow_meter_policy *mtr_policy)
16773 struct mlx5_priv *priv = dev->data->dev_private;
16774 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16775 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16777 uint16_t sub_policy_num, new_policy_num;
16779 rte_spinlock_lock(&mtr_policy->sl);
16780 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16781 switch (mtr_policy->act_cnt[i].fate_action) {
16782 case MLX5_FLOW_FATE_SHARED_RSS:
16783 sub_policy_num = (mtr_policy->sub_policy_num >>
16784 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16785 MLX5_MTR_SUB_POLICY_NUM_MASK;
16786 new_policy_num = sub_policy_num;
16787 for (j = 0; j < sub_policy_num; j++) {
16789 mtr_policy->sub_policys[domain][j];
16791 __flow_dv_destroy_sub_policy_rules(dev,
16794 mtr_policy->sub_policys[domain][0]) {
16795 mtr_policy->sub_policys[domain][j] =
16798 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16804 if (new_policy_num != sub_policy_num) {
16805 mtr_policy->sub_policy_num &=
16806 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16807 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16808 mtr_policy->sub_policy_num |=
16810 MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16811 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16814 case MLX5_FLOW_FATE_QUEUE:
16815 sub_policy = mtr_policy->sub_policys[domain][0];
16816 __flow_dv_destroy_sub_policy_rules(dev,
16820 /*Other actions without queue and do nothing*/
16824 rte_spinlock_unlock(&mtr_policy->sl);
16828 * Validate the batch counter support in root table.
16830 * Create a simple flow with invalid counter and drop action on root table to
16831 * validate if batch counter with offset on root table is supported or not.
16834 * Pointer to rte_eth_dev structure.
16837 * 0 on success, a negative errno value otherwise and rte_errno is set.
16840 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
16842 struct mlx5_priv *priv = dev->data->dev_private;
16843 struct mlx5_dev_ctx_shared *sh = priv->sh;
16844 struct mlx5_flow_dv_match_params mask = {
16845 .size = sizeof(mask.buf),
16847 struct mlx5_flow_dv_match_params value = {
16848 .size = sizeof(value.buf),
16850 struct mlx5dv_flow_matcher_attr dv_attr = {
16851 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
16853 .match_criteria_enable = 0,
16854 .match_mask = (void *)&mask,
16856 void *actions[2] = { 0 };
16857 struct mlx5_flow_tbl_resource *tbl = NULL;
16858 struct mlx5_devx_obj *dcs = NULL;
16859 void *matcher = NULL;
16863 tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
16867 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
16870 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
16874 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
16875 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
16876 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
16880 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
16881 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
16885 * If batch counter with offset is not supported, the driver will not
16886 * validate the invalid offset value, flow create should success.
16887 * In this case, it means batch counter is not supported in root table.
16889 * Otherwise, if flow create is failed, counter offset is supported.
16892 DRV_LOG(INFO, "Batch counter is not supported in root "
16893 "table. Switch to fallback mode.");
16894 rte_errno = ENOTSUP;
16896 claim_zero(mlx5_flow_os_destroy_flow(flow));
16898 /* Check matcher to make sure validate fail at flow create. */
16899 if (!matcher || (matcher && errno != EINVAL))
16900 DRV_LOG(ERR, "Unexpected error in counter offset "
16901 "support detection");
16905 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
16907 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
16909 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
16911 claim_zero(mlx5_devx_cmd_destroy(dcs));
16916 * Query a devx counter.
16919 * Pointer to the Ethernet device structure.
16921 * Index to the flow counter.
16923 * Set to clear the counter statistics.
16925 * The statistics value of packets.
16926 * @param[out] bytes
16927 * The statistics value of bytes.
16930 * 0 on success, otherwise return -1.
16933 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
16934 uint64_t *pkts, uint64_t *bytes)
16936 struct mlx5_priv *priv = dev->data->dev_private;
16937 struct mlx5_flow_counter *cnt;
16938 uint64_t inn_pkts, inn_bytes;
16941 if (!priv->config.devx)
16944 ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
16947 cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
16948 *pkts = inn_pkts - cnt->hits;
16949 *bytes = inn_bytes - cnt->bytes;
16951 cnt->hits = inn_pkts;
16952 cnt->bytes = inn_bytes;
16958 * Get aged-out flows.
16961 * Pointer to the Ethernet device structure.
16962 * @param[in] context
16963 * The address of an array of pointers to the aged-out flows contexts.
16964 * @param[in] nb_contexts
16965 * The length of context array pointers.
16966 * @param[out] error
16967 * Perform verbose error reporting if not NULL. Initialized in case of
16971 * how many contexts get in success, otherwise negative errno value.
16972 * if nb_contexts is 0, return the amount of all aged contexts.
16973 * if nb_contexts is not 0 , return the amount of aged flows reported
16974 * in the context array.
16975 * @note: only stub for now
16978 flow_get_aged_flows(struct rte_eth_dev *dev,
16980 uint32_t nb_contexts,
16981 struct rte_flow_error *error)
16983 struct mlx5_priv *priv = dev->data->dev_private;
16984 struct mlx5_age_info *age_info;
16985 struct mlx5_age_param *age_param;
16986 struct mlx5_flow_counter *counter;
16987 struct mlx5_aso_age_action *act;
16990 if (nb_contexts && !context)
16991 return rte_flow_error_set(error, EINVAL,
16992 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16993 NULL, "empty context");
16994 age_info = GET_PORT_AGE_INFO(priv);
16995 rte_spinlock_lock(&age_info->aged_sl);
16996 LIST_FOREACH(act, &age_info->aged_aso, next) {
16999 context[nb_flows - 1] =
17000 act->age_params.context;
17001 if (!(--nb_contexts))
17005 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17008 age_param = MLX5_CNT_TO_AGE(counter);
17009 context[nb_flows - 1] = age_param->context;
17010 if (!(--nb_contexts))
17014 rte_spinlock_unlock(&age_info->aged_sl);
17015 MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17020 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17023 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17025 return flow_dv_counter_alloc(dev, 0);
17029 * Validate indirect action.
17030 * Dispatcher for action type specific validation.
17033 * Pointer to the Ethernet device structure.
17035 * Indirect action configuration.
17036 * @param[in] action
17037 * The indirect action object to validate.
17038 * @param[out] error
17039 * Perform verbose error reporting if not NULL. Initialized in case of
17043 * 0 on success, otherwise negative errno value.
17046 flow_dv_action_validate(struct rte_eth_dev *dev,
17047 const struct rte_flow_indir_action_conf *conf,
17048 const struct rte_flow_action *action,
17049 struct rte_flow_error *err)
17051 struct mlx5_priv *priv = dev->data->dev_private;
17053 RTE_SET_USED(conf);
17054 switch (action->type) {
17055 case RTE_FLOW_ACTION_TYPE_RSS:
17057 * priv->obj_ops is set according to driver capabilities.
17058 * When DevX capabilities are
17059 * sufficient, it is set to devx_obj_ops.
17060 * Otherwise, it is set to ibv_obj_ops.
17061 * ibv_obj_ops doesn't support ind_table_modify operation.
17062 * In this case the indirect RSS action can't be used.
17064 if (priv->obj_ops.ind_table_modify == NULL)
17065 return rte_flow_error_set
17067 RTE_FLOW_ERROR_TYPE_ACTION,
17069 "Indirect RSS action not supported");
17070 return mlx5_validate_action_rss(dev, action, err);
17071 case RTE_FLOW_ACTION_TYPE_AGE:
17072 if (!priv->sh->aso_age_mng)
17073 return rte_flow_error_set(err, ENOTSUP,
17074 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17076 "Indirect age action not supported");
17077 return flow_dv_validate_action_age(0, action, dev, err);
17078 case RTE_FLOW_ACTION_TYPE_COUNT:
17080 * There are two mechanisms to share the action count.
17081 * The old mechanism uses the shared field to share, while the
17082 * new mechanism uses the indirect action API.
17083 * This validation comes to make sure that the two mechanisms
17084 * are not combined.
17086 if (is_shared_action_count(action))
17087 return rte_flow_error_set(err, ENOTSUP,
17088 RTE_FLOW_ERROR_TYPE_ACTION,
17090 "Mix shared and indirect counter is not supported");
17091 return flow_dv_validate_action_count(dev, true, 0, err);
17092 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17093 if (!priv->sh->ct_aso_en)
17094 return rte_flow_error_set(err, ENOTSUP,
17095 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17096 "ASO CT is not supported");
17097 return mlx5_validate_action_ct(dev, action->conf, err);
17099 return rte_flow_error_set(err, ENOTSUP,
17100 RTE_FLOW_ERROR_TYPE_ACTION,
17102 "action type not supported");
17107 * Validate the meter hierarchy chain for meter policy.
17110 * Pointer to the Ethernet device structure.
17111 * @param[in] meter_id
17113 * @param[in] action_flags
17114 * Holds the actions detected until now.
17115 * @param[out] is_rss
17117 * @param[out] hierarchy_domain
17118 * The domain bitmap for hierarchy policy.
17119 * @param[out] error
17120 * Perform verbose error reporting if not NULL. Initialized in case of
17124 * 0 on success, otherwise negative errno value with error set.
17127 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17129 uint64_t action_flags,
17131 uint8_t *hierarchy_domain,
17132 struct rte_mtr_error *error)
17134 struct mlx5_priv *priv = dev->data->dev_private;
17135 struct mlx5_flow_meter_info *fm;
17136 struct mlx5_flow_meter_policy *policy;
17139 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17140 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17141 return -rte_mtr_error_set(error, EINVAL,
17142 RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17144 "Multiple fate actions not supported.");
17146 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17148 return -rte_mtr_error_set(error, EINVAL,
17149 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17150 "Meter not found in meter hierarchy.");
17151 if (fm->def_policy)
17152 return -rte_mtr_error_set(error, EINVAL,
17153 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17154 "Non termination meter not supported in hierarchy.");
17155 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17156 MLX5_ASSERT(policy);
17157 if (!policy->is_hierarchy) {
17158 if (policy->transfer)
17159 *hierarchy_domain |=
17160 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17161 if (policy->ingress)
17162 *hierarchy_domain |=
17163 MLX5_MTR_DOMAIN_INGRESS_BIT;
17164 if (policy->egress)
17165 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17166 *is_rss = policy->is_rss;
17169 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17170 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17171 return -rte_mtr_error_set(error, EINVAL,
17172 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17173 "Exceed max hierarchy meter number.");
17179 * Validate meter policy actions.
17180 * Dispatcher for action type specific validation.
17183 * Pointer to the Ethernet device structure.
17184 * @param[in] action
17185 * The meter policy action object to validate.
17187 * Attributes of flow to determine steering domain.
17188 * @param[out] error
17189 * Perform verbose error reporting if not NULL. Initialized in case of
17193 * 0 on success, otherwise negative errno value.
17196 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17197 const struct rte_flow_action *actions[RTE_COLORS],
17198 struct rte_flow_attr *attr,
17200 uint8_t *domain_bitmap,
17201 bool *is_def_policy,
17202 struct rte_mtr_error *error)
17204 struct mlx5_priv *priv = dev->data->dev_private;
17205 struct mlx5_dev_config *dev_conf = &priv->config;
17206 const struct rte_flow_action *act;
17207 uint64_t action_flags = 0;
17210 struct rte_flow_error flow_err;
17211 uint8_t domain_color[RTE_COLORS] = {0};
17212 uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17213 uint8_t hierarchy_domain = 0;
17214 const struct rte_flow_action_meter *mtr;
17216 if (!priv->config.dv_esw_en)
17217 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17218 *domain_bitmap = def_domain;
17219 if (actions[RTE_COLOR_YELLOW] &&
17220 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_END)
17221 return -rte_mtr_error_set(error, ENOTSUP,
17222 RTE_MTR_ERROR_TYPE_METER_POLICY,
17224 "Yellow color does not support any action.");
17225 if (actions[RTE_COLOR_YELLOW] &&
17226 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_DROP)
17227 return -rte_mtr_error_set(error, ENOTSUP,
17228 RTE_MTR_ERROR_TYPE_METER_POLICY,
17229 NULL, "Red color only supports drop action.");
17231 * Check default policy actions:
17232 * Green/Yellow: no action, Red: drop action
17234 if ((!actions[RTE_COLOR_GREEN] ||
17235 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)) {
17236 *is_def_policy = true;
17239 flow_err.message = NULL;
17240 for (i = 0; i < RTE_COLORS; i++) {
17242 for (action_flags = 0, actions_n = 0;
17243 act && act->type != RTE_FLOW_ACTION_TYPE_END;
17245 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17246 return -rte_mtr_error_set(error, ENOTSUP,
17247 RTE_MTR_ERROR_TYPE_METER_POLICY,
17248 NULL, "too many actions");
17249 switch (act->type) {
17250 case RTE_FLOW_ACTION_TYPE_PORT_ID:
17251 if (!priv->config.dv_esw_en)
17252 return -rte_mtr_error_set(error,
17254 RTE_MTR_ERROR_TYPE_METER_POLICY,
17255 NULL, "PORT action validate check"
17256 " fail for ESW disable");
17257 ret = flow_dv_validate_action_port_id(dev,
17259 act, attr, &flow_err);
17261 return -rte_mtr_error_set(error,
17263 RTE_MTR_ERROR_TYPE_METER_POLICY,
17264 NULL, flow_err.message ?
17266 "PORT action validate check fail");
17268 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
17270 case RTE_FLOW_ACTION_TYPE_MARK:
17271 ret = flow_dv_validate_action_mark(dev, act,
17275 return -rte_mtr_error_set(error,
17277 RTE_MTR_ERROR_TYPE_METER_POLICY,
17278 NULL, flow_err.message ?
17280 "Mark action validate check fail");
17281 if (dev_conf->dv_xmeta_en !=
17282 MLX5_XMETA_MODE_LEGACY)
17283 return -rte_mtr_error_set(error,
17285 RTE_MTR_ERROR_TYPE_METER_POLICY,
17286 NULL, "Extend MARK action is "
17287 "not supported. Please try use "
17288 "default policy for meter.");
17289 action_flags |= MLX5_FLOW_ACTION_MARK;
17292 case RTE_FLOW_ACTION_TYPE_SET_TAG:
17293 ret = flow_dv_validate_action_set_tag(dev,
17297 return -rte_mtr_error_set(error,
17299 RTE_MTR_ERROR_TYPE_METER_POLICY,
17300 NULL, flow_err.message ?
17302 "Set tag action validate check fail");
17304 * Count all modify-header actions
17307 if (!(action_flags &
17308 MLX5_FLOW_MODIFY_HDR_ACTIONS))
17310 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
17312 case RTE_FLOW_ACTION_TYPE_DROP:
17313 ret = mlx5_flow_validate_action_drop
17317 return -rte_mtr_error_set(error,
17319 RTE_MTR_ERROR_TYPE_METER_POLICY,
17320 NULL, flow_err.message ?
17322 "Drop action validate check fail");
17323 action_flags |= MLX5_FLOW_ACTION_DROP;
17326 case RTE_FLOW_ACTION_TYPE_QUEUE:
17328 * Check whether extensive
17329 * metadata feature is engaged.
17331 if (dev_conf->dv_flow_en &&
17332 (dev_conf->dv_xmeta_en !=
17333 MLX5_XMETA_MODE_LEGACY) &&
17334 mlx5_flow_ext_mreg_supported(dev))
17335 return -rte_mtr_error_set(error,
17337 RTE_MTR_ERROR_TYPE_METER_POLICY,
17338 NULL, "Queue action with meta "
17339 "is not supported. Please try use "
17340 "default policy for meter.");
17341 ret = mlx5_flow_validate_action_queue(act,
17345 return -rte_mtr_error_set(error,
17347 RTE_MTR_ERROR_TYPE_METER_POLICY,
17348 NULL, flow_err.message ?
17350 "Queue action validate check fail");
17351 action_flags |= MLX5_FLOW_ACTION_QUEUE;
17354 case RTE_FLOW_ACTION_TYPE_RSS:
17355 if (dev_conf->dv_flow_en &&
17356 (dev_conf->dv_xmeta_en !=
17357 MLX5_XMETA_MODE_LEGACY) &&
17358 mlx5_flow_ext_mreg_supported(dev))
17359 return -rte_mtr_error_set(error,
17361 RTE_MTR_ERROR_TYPE_METER_POLICY,
17362 NULL, "RSS action with meta "
17363 "is not supported. Please try use "
17364 "default policy for meter.");
17365 ret = mlx5_validate_action_rss(dev, act,
17368 return -rte_mtr_error_set(error,
17370 RTE_MTR_ERROR_TYPE_METER_POLICY,
17371 NULL, flow_err.message ?
17373 "RSS action validate check fail");
17374 action_flags |= MLX5_FLOW_ACTION_RSS;
17378 case RTE_FLOW_ACTION_TYPE_JUMP:
17379 ret = flow_dv_validate_action_jump(dev,
17380 NULL, act, action_flags,
17381 attr, true, &flow_err);
17383 return -rte_mtr_error_set(error,
17385 RTE_MTR_ERROR_TYPE_METER_POLICY,
17386 NULL, flow_err.message ?
17388 "Jump action validate check fail");
17390 action_flags |= MLX5_FLOW_ACTION_JUMP;
17392 case RTE_FLOW_ACTION_TYPE_METER:
17393 if (i != RTE_COLOR_GREEN)
17394 return -rte_mtr_error_set(error,
17396 RTE_MTR_ERROR_TYPE_METER_POLICY,
17397 NULL, flow_err.message ?
17399 "Meter hierarchy only supports GREEN color.");
17401 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17411 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17414 return -rte_mtr_error_set(error, ENOTSUP,
17415 RTE_MTR_ERROR_TYPE_METER_POLICY,
17417 "Doesn't support optional action");
17420 /* Yellow is not supported, just skip. */
17421 if (i == RTE_COLOR_YELLOW)
17423 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
17424 domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17425 else if ((action_flags &
17426 (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17427 (action_flags & MLX5_FLOW_ACTION_MARK))
17429 * Only support MLX5_XMETA_MODE_LEGACY
17430 * so MARK action only in ingress domain.
17432 domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17433 else if (action_flags &
17434 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17435 domain_color[i] = hierarchy_domain;
17437 domain_color[i] = def_domain;
17439 * Validate the drop action mutual exclusion
17440 * with other actions. Drop action is mutually-exclusive
17441 * with any other action, except for Count action.
17443 if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
17444 (action_flags & ~MLX5_FLOW_ACTION_DROP)) {
17445 return -rte_mtr_error_set(error, ENOTSUP,
17446 RTE_MTR_ERROR_TYPE_METER_POLICY,
17447 NULL, "Drop action is mutually-exclusive "
17448 "with any other action");
17450 /* Eswitch has few restrictions on using items and actions */
17451 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17452 if (!mlx5_flow_ext_mreg_supported(dev) &&
17453 action_flags & MLX5_FLOW_ACTION_MARK)
17454 return -rte_mtr_error_set(error, ENOTSUP,
17455 RTE_MTR_ERROR_TYPE_METER_POLICY,
17456 NULL, "unsupported action MARK");
17457 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
17458 return -rte_mtr_error_set(error, ENOTSUP,
17459 RTE_MTR_ERROR_TYPE_METER_POLICY,
17460 NULL, "unsupported action QUEUE");
17461 if (action_flags & MLX5_FLOW_ACTION_RSS)
17462 return -rte_mtr_error_set(error, ENOTSUP,
17463 RTE_MTR_ERROR_TYPE_METER_POLICY,
17464 NULL, "unsupported action RSS");
17465 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17466 return -rte_mtr_error_set(error, ENOTSUP,
17467 RTE_MTR_ERROR_TYPE_METER_POLICY,
17468 NULL, "no fate action is found");
17470 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) &&
17472 MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17473 if ((domain_color[i] &
17474 MLX5_MTR_DOMAIN_EGRESS_BIT))
17476 MLX5_MTR_DOMAIN_EGRESS_BIT;
17478 return -rte_mtr_error_set(error,
17480 RTE_MTR_ERROR_TYPE_METER_POLICY,
17481 NULL, "no fate action is found");
17484 if (domain_color[i] != def_domain)
17485 *domain_bitmap = domain_color[i];
17491 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17493 struct mlx5_priv *priv = dev->data->dev_private;
17496 if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17497 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17502 if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17503 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17507 if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17508 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17515 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17516 .validate = flow_dv_validate,
17517 .prepare = flow_dv_prepare,
17518 .translate = flow_dv_translate,
17519 .apply = flow_dv_apply,
17520 .remove = flow_dv_remove,
17521 .destroy = flow_dv_destroy,
17522 .query = flow_dv_query,
17523 .create_mtr_tbls = flow_dv_create_mtr_tbls,
17524 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17525 .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17526 .create_meter = flow_dv_mtr_alloc,
17527 .free_meter = flow_dv_aso_mtr_release_to_pool,
17528 .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17529 .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17530 .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17531 .create_policy_rules = flow_dv_create_policy_rules,
17532 .destroy_policy_rules = flow_dv_destroy_policy_rules,
17533 .create_def_policy = flow_dv_create_def_policy,
17534 .destroy_def_policy = flow_dv_destroy_def_policy,
17535 .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17536 .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17537 .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17538 .counter_alloc = flow_dv_counter_allocate,
17539 .counter_free = flow_dv_counter_free,
17540 .counter_query = flow_dv_counter_query,
17541 .get_aged_flows = flow_get_aged_flows,
17542 .action_validate = flow_dv_action_validate,
17543 .action_create = flow_dv_action_create,
17544 .action_destroy = flow_dv_action_destroy,
17545 .action_update = flow_dv_action_update,
17546 .action_query = flow_dv_action_query,
17547 .sync_domain = flow_dv_sync_domain,
17550 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */