drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_bus_pci.h>
  19 #include <rte_ip.h>
  20 #include <rte_gre.h>
  21 #include <rte_vxlan.h>
  22 #include <rte_gtp.h>
  23 #include <rte_eal_paging.h>
  24 #include <rte_mpls.h>
  25 #include <rte_mtr.h>
  26 #include <rte_mtr_driver.h>
  27 #include <rte_tailq.h>
  28
  29 #include <mlx5_glue.h>
  30 #include <mlx5_devx_cmds.h>
  31 #include <mlx5_prm.h>
  32 #include <mlx5_malloc.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_common_os.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_flow_os.h"
  39 #include "mlx5_rx.h"
  40 #include "mlx5_tx.h"
  41 #include "rte_pmd_mlx5.h"
  42
  43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  44
  45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR_ESWITCH
  50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  52 #endif
  53 #endif
  54
  55 #ifndef HAVE_MLX5DV_DR
  56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  57 #endif
  58
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 static int
  79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  80                              struct mlx5_flow_tbl_resource *tbl);
  81
  82 static int
  83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  84                                      uint32_t encap_decap_idx);
  85
  86 static int
  87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  88                                         uint32_t port_id);
  89 static void
  90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  91
  92 static int
  93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  94                                   uint32_t rix_jump);
  95
  96 static int16_t
  97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
  98 {
  99         struct mlx5_priv *priv = dev->data->dev_private;
 100         struct mlx5_common_device *cdev = priv->sh->cdev;
 101
 102         if (cdev->config.hca_attr.esw_mgr_vport_id_valid)
 103                 return (int16_t)cdev->config.hca_attr.esw_mgr_vport_id;
 104
 105         if (priv->pci_dev == NULL)
 106                 return 0;
 107         switch (priv->pci_dev->id.device_id) {
 108         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
 109         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
 110         case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
 111                 return (int16_t)0xfffe;
 112         default:
 113                 return 0;
 114         }
 115 }
 116
 117 /**
 118  * Initialize flow attributes structure according to flow items' types.
 119  *
 120  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
 121  * mode. For tunnel mode, the items to be modified are the outermost ones.
 122  *
 123  * @param[in] item
 124  *   Pointer to item specification.
 125  * @param[out] attr
 126  *   Pointer to flow attributes structure.
 127  * @param[in] dev_flow
 128  *   Pointer to the sub flow.
 129  * @param[in] tunnel_decap
 130  *   Whether action is after tunnel decapsulation.
 131  */
 132 static void
 133 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 134                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 135 {
 136         uint64_t layers = dev_flow->handle->layers;
 137
 138         /*
 139          * If layers is already initialized, it means this dev_flow is the
 140          * suffix flow, the layers flags is set by the prefix flow. Need to
 141          * use the layer flags from prefix flow as the suffix flow may not
 142          * have the user defined items as the flow is split.
 143          */
 144         if (layers) {
 145                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 146                         attr->ipv4 = 1;
 147                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 148                         attr->ipv6 = 1;
 149                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 150                         attr->tcp = 1;
 151                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 152                         attr->udp = 1;
 153                 attr->valid = 1;
 154                 return;
 155         }
 156         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 157                 uint8_t next_protocol = 0xff;
 158                 switch (item->type) {
 159                 case RTE_FLOW_ITEM_TYPE_GRE:
 160                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 161                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 162                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 163                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 164                 case RTE_FLOW_ITEM_TYPE_MPLS:
 165                         if (tunnel_decap)
 166                                 attr->attr = 0;
 167                         break;
 168                 case RTE_FLOW_ITEM_TYPE_IPV4:
 169                         if (!attr->ipv6)
 170                                 attr->ipv4 = 1;
 171                         if (item->mask != NULL &&
 172                             ((const struct rte_flow_item_ipv4 *)
 173                             item->mask)->hdr.next_proto_id)
 174                                 next_protocol =
 175                                     ((const struct rte_flow_item_ipv4 *)
 176                                       (item->spec))->hdr.next_proto_id &
 177                                     ((const struct rte_flow_item_ipv4 *)
 178                                       (item->mask))->hdr.next_proto_id;
 179                         if ((next_protocol == IPPROTO_IPIP ||
 180                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 181                                 attr->attr = 0;
 182                         break;
 183                 case RTE_FLOW_ITEM_TYPE_IPV6:
 184                         if (!attr->ipv4)
 185                                 attr->ipv6 = 1;
 186                         if (item->mask != NULL &&
 187                             ((const struct rte_flow_item_ipv6 *)
 188                             item->mask)->hdr.proto)
 189                                 next_protocol =
 190                                     ((const struct rte_flow_item_ipv6 *)
 191                                       (item->spec))->hdr.proto &
 192                                     ((const struct rte_flow_item_ipv6 *)
 193                                       (item->mask))->hdr.proto;
 194                         if ((next_protocol == IPPROTO_IPIP ||
 195                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 196                                 attr->attr = 0;
 197                         break;
 198                 case RTE_FLOW_ITEM_TYPE_UDP:
 199                         if (!attr->tcp)
 200                                 attr->udp = 1;
 201                         break;
 202                 case RTE_FLOW_ITEM_TYPE_TCP:
 203                         if (!attr->udp)
 204                                 attr->tcp = 1;
 205                         break;
 206                 default:
 207                         break;
 208                 }
 209         }
 210         attr->valid = 1;
 211 }
 212
 213 /*
 214  * Convert rte_mtr_color to mlx5 color.
 215  *
 216  * @param[in] rcol
 217  *   rte_mtr_color.
 218  *
 219  * @return
 220  *   mlx5 color.
 221  */
 222 static inline int
 223 rte_col_2_mlx5_col(enum rte_color rcol)
 224 {
 225         switch (rcol) {
 226         case RTE_COLOR_GREEN:
 227                 return MLX5_FLOW_COLOR_GREEN;
 228         case RTE_COLOR_YELLOW:
 229                 return MLX5_FLOW_COLOR_YELLOW;
 230         case RTE_COLOR_RED:
 231                 return MLX5_FLOW_COLOR_RED;
 232         default:
 233                 break;
 234         }
 235         return MLX5_FLOW_COLOR_UNDEFINED;
 236 }
 237
 238 struct field_modify_info {
 239         uint32_t size; /* Size of field in protocol header, in bytes. */
 240         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 241         enum mlx5_modification_field id;
 242 };
 243
 244 struct field_modify_info modify_eth[] = {
 245         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 246         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 247         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 248         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 249         {0, 0, 0},
 250 };
 251
 252 struct field_modify_info modify_vlan_out_first_vid[] = {
 253         /* Size in bits !!! */
 254         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 255         {0, 0, 0},
 256 };
 257
 258 struct field_modify_info modify_ipv4[] = {
 259         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 260         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 261         {4, 12, MLX5_MODI_OUT_SIPV4},
 262         {4, 16, MLX5_MODI_OUT_DIPV4},
 263         {0, 0, 0},
 264 };
 265
 266 struct field_modify_info modify_ipv6[] = {
 267         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 268         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 269         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 270         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 271         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 272         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 273         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 274         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 275         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 276         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 277         {0, 0, 0},
 278 };
 279
 280 struct field_modify_info modify_udp[] = {
 281         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 282         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 283         {0, 0, 0},
 284 };
 285
 286 struct field_modify_info modify_tcp[] = {
 287         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 288         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 289         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 290         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 291         {0, 0, 0},
 292 };
 293
 294 static void
 295 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 296                           uint8_t next_protocol, uint64_t *item_flags,
 297                           int *tunnel)
 298 {
 299         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 300                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 301         if (next_protocol == IPPROTO_IPIP) {
 302                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 303                 *tunnel = 1;
 304         }
 305         if (next_protocol == IPPROTO_IPV6) {
 306                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 307                 *tunnel = 1;
 308         }
 309 }
 310
 311 static inline struct mlx5_hlist *
 312 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 313                      const char *name, uint32_t size, bool direct_key,
 314                      bool lcores_share, void *ctx,
 315                      mlx5_list_create_cb cb_create,
 316                      mlx5_list_match_cb cb_match,
 317                      mlx5_list_remove_cb cb_remove,
 318                      mlx5_list_clone_cb cb_clone,
 319                      mlx5_list_clone_free_cb cb_clone_free,
 320                      struct rte_flow_error *error)
 321 {
 322         struct mlx5_hlist *hl;
 323         struct mlx5_hlist *expected = NULL;
 324         char s[MLX5_NAME_SIZE];
 325
 326         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 327         if (likely(hl))
 328                 return hl;
 329         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 330         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 331                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 332                         cb_clone_free);
 333         if (!hl) {
 334                 DRV_LOG(ERR, "%s hash creation failed", name);
 335                 rte_flow_error_set(error, ENOMEM,
 336                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 337                                    "cannot allocate resource memory");
 338                 return NULL;
 339         }
 340         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 341                                          __ATOMIC_SEQ_CST,
 342                                          __ATOMIC_SEQ_CST)) {
 343                 mlx5_hlist_destroy(hl);
 344                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 345         }
 346         return hl;
 347 }
 348
 349 /* Update VLAN's VID/PCP based on input rte_flow_action.
 350  *
 351  * @param[in] action
 352  *   Pointer to struct rte_flow_action.
 353  * @param[out] vlan
 354  *   Pointer to struct rte_vlan_hdr.
 355  */
 356 static void
 357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 358                          struct rte_vlan_hdr *vlan)
 359 {
 360         uint16_t vlan_tci;
 361         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 362                 vlan_tci =
 363                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 364                                                action->conf)->vlan_pcp;
 365                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 366                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 367                 vlan->vlan_tci |= vlan_tci;
 368         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 369                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 370                 vlan->vlan_tci |= rte_be_to_cpu_16
 371                     (((const struct rte_flow_action_of_set_vlan_vid *)
 372                                              action->conf)->vlan_vid);
 373         }
 374 }
 375
 376 /**
 377  * Fetch 1, 2, 3 or 4 byte field from the byte array
 378  * and return as unsigned integer in host-endian format.
 379  *
 380  * @param[in] data
 381  *   Pointer to data array.
 382  * @param[in] size
 383  *   Size of field to extract.
 384  *
 385  * @return
 386  *   converted field in host endian format.
 387  */
 388 static inline uint32_t
 389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 390 {
 391         uint32_t ret;
 392
 393         switch (size) {
 394         case 1:
 395                 ret = *data;
 396                 break;
 397         case 2:
 398                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 399                 break;
 400         case 3:
 401                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 402                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 403                 break;
 404         case 4:
 405                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 406                 break;
 407         default:
 408                 MLX5_ASSERT(false);
 409                 ret = 0;
 410                 break;
 411         }
 412         return ret;
 413 }
 414
 415 /**
 416  * Convert modify-header action to DV specification.
 417  *
 418  * Data length of each action is determined by provided field description
 419  * and the item mask. Data bit offset and width of each action is determined
 420  * by provided item mask.
 421  *
 422  * @param[in] item
 423  *   Pointer to item specification.
 424  * @param[in] field
 425  *   Pointer to field modification information.
 426  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 427  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 428  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 429  * @param[in] dcopy
 430  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 431  *   Negative offset value sets the same offset as source offset.
 432  *   size field is ignored, value is taken from source field.
 433  * @param[in,out] resource
 434  *   Pointer to the modify-header resource.
 435  * @param[in] type
 436  *   Type of modification.
 437  * @param[out] error
 438  *   Pointer to the error structure.
 439  *
 440  * @return
 441  *   0 on success, a negative errno value otherwise and rte_errno is set.
 442  */
 443 static int
 444 flow_dv_convert_modify_action(struct rte_flow_item *item,
 445                               struct field_modify_info *field,
 446                               struct field_modify_info *dcopy,
 447                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 448                               uint32_t type, struct rte_flow_error *error)
 449 {
 450         uint32_t i = resource->actions_num;
 451         struct mlx5_modification_cmd *actions = resource->actions;
 452         uint32_t carry_b = 0;
 453
 454         /*
 455          * The item and mask are provided in big-endian format.
 456          * The fields should be presented as in big-endian format either.
 457          * Mask must be always present, it defines the actual field width.
 458          */
 459         MLX5_ASSERT(item->mask);
 460         MLX5_ASSERT(field->size);
 461         do {
 462                 uint32_t size_b;
 463                 uint32_t off_b;
 464                 uint32_t mask;
 465                 uint32_t data;
 466                 bool next_field = true;
 467                 bool next_dcopy = true;
 468
 469                 if (i >= MLX5_MAX_MODIFY_NUM)
 470                         return rte_flow_error_set(error, EINVAL,
 471                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                  "too many items to modify");
 473                 /* Fetch variable byte size mask from the array. */
 474                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 475                                            field->offset, field->size);
 476                 if (!mask) {
 477                         ++field;
 478                         continue;
 479                 }
 480                 /* Deduce actual data width in bits from mask value. */
 481                 off_b = rte_bsf32(mask) + carry_b;
 482                 size_b = sizeof(uint32_t) * CHAR_BIT -
 483                          off_b - __builtin_clz(mask);
 484                 MLX5_ASSERT(size_b);
 485                 actions[i] = (struct mlx5_modification_cmd) {
 486                         .action_type = type,
 487                         .field = field->id,
 488                         .offset = off_b,
 489                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 490                                 0 : size_b,
 491                 };
 492                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 493                         MLX5_ASSERT(dcopy);
 494                         actions[i].dst_field = dcopy->id;
 495                         actions[i].dst_offset =
 496                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 497                         /* Convert entire record to big-endian format. */
 498                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 499                         /*
 500                          * Destination field overflow. Copy leftovers of
 501                          * a source field to the next destination field.
 502                          */
 503                         carry_b = 0;
 504                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 505                             dcopy->size != 0) {
 506                                 actions[i].length =
 507                                         dcopy->size * CHAR_BIT - dcopy->offset;
 508                                 carry_b = actions[i].length;
 509                                 next_field = false;
 510                         }
 511                         /*
 512                          * Not enough bits in a source filed to fill a
 513                          * destination field. Switch to the next source.
 514                          */
 515                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 516                             (size_b == field->size * CHAR_BIT - off_b)) {
 517                                 actions[i].length =
 518                                         field->size * CHAR_BIT - off_b;
 519                                 dcopy->offset += actions[i].length;
 520                                 next_dcopy = false;
 521                         }
 522                         if (next_dcopy)
 523                                 ++dcopy;
 524                 } else {
 525                         MLX5_ASSERT(item->spec);
 526                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 527                                                    field->offset, field->size);
 528                         /* Shift out the trailing masked bits from data. */
 529                         data = (data & mask) >> off_b;
 530                         actions[i].data1 = rte_cpu_to_be_32(data);
 531                 }
 532                 /* Convert entire record to expected big-endian format. */
 533                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 534                 if (next_field)
 535                         ++field;
 536                 ++i;
 537         } while (field->size);
 538         if (resource->actions_num == i)
 539                 return rte_flow_error_set(error, EINVAL,
 540                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 541                                           "invalid modification flow item");
 542         resource->actions_num = i;
 543         return 0;
 544 }
 545
 546 /**
 547  * Convert modify-header set IPv4 address action to DV specification.
 548  *
 549  * @param[in,out] resource
 550  *   Pointer to the modify-header resource.
 551  * @param[in] action
 552  *   Pointer to action specification.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_ipv4
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_action *action,
 563                          struct rte_flow_error *error)
 564 {
 565         const struct rte_flow_action_set_ipv4 *conf =
 566                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 567         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 568         struct rte_flow_item_ipv4 ipv4;
 569         struct rte_flow_item_ipv4 ipv4_mask;
 570
 571         memset(&ipv4, 0, sizeof(ipv4));
 572         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 573         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 574                 ipv4.hdr.src_addr = conf->ipv4_addr;
 575                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 576         } else {
 577                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 578                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 579         }
 580         item.spec = &ipv4;
 581         item.mask = &ipv4_mask;
 582         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 583                                              MLX5_MODIFICATION_TYPE_SET, error);
 584 }
 585
 586 /**
 587  * Convert modify-header set IPv6 address action to DV specification.
 588  *
 589  * @param[in,out] resource
 590  *   Pointer to the modify-header resource.
 591  * @param[in] action
 592  *   Pointer to action specification.
 593  * @param[out] error
 594  *   Pointer to the error structure.
 595  *
 596  * @return
 597  *   0 on success, a negative errno value otherwise and rte_errno is set.
 598  */
 599 static int
 600 flow_dv_convert_action_modify_ipv6
 601                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 602                          const struct rte_flow_action *action,
 603                          struct rte_flow_error *error)
 604 {
 605         const struct rte_flow_action_set_ipv6 *conf =
 606                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 607         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 608         struct rte_flow_item_ipv6 ipv6;
 609         struct rte_flow_item_ipv6 ipv6_mask;
 610
 611         memset(&ipv6, 0, sizeof(ipv6));
 612         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 613         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 614                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 615                        sizeof(ipv6.hdr.src_addr));
 616                 memcpy(&ipv6_mask.hdr.src_addr,
 617                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 618                        sizeof(ipv6.hdr.src_addr));
 619         } else {
 620                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 621                        sizeof(ipv6.hdr.dst_addr));
 622                 memcpy(&ipv6_mask.hdr.dst_addr,
 623                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 624                        sizeof(ipv6.hdr.dst_addr));
 625         }
 626         item.spec = &ipv6;
 627         item.mask = &ipv6_mask;
 628         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 629                                              MLX5_MODIFICATION_TYPE_SET, error);
 630 }
 631
 632 /**
 633  * Convert modify-header set MAC address action to DV specification.
 634  *
 635  * @param[in,out] resource
 636  *   Pointer to the modify-header resource.
 637  * @param[in] action
 638  *   Pointer to action specification.
 639  * @param[out] error
 640  *   Pointer to the error structure.
 641  *
 642  * @return
 643  *   0 on success, a negative errno value otherwise and rte_errno is set.
 644  */
 645 static int
 646 flow_dv_convert_action_modify_mac
 647                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 648                          const struct rte_flow_action *action,
 649                          struct rte_flow_error *error)
 650 {
 651         const struct rte_flow_action_set_mac *conf =
 652                 (const struct rte_flow_action_set_mac *)(action->conf);
 653         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 654         struct rte_flow_item_eth eth;
 655         struct rte_flow_item_eth eth_mask;
 656
 657         memset(&eth, 0, sizeof(eth));
 658         memset(&eth_mask, 0, sizeof(eth_mask));
 659         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 660                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 661                        sizeof(eth.src.addr_bytes));
 662                 memcpy(&eth_mask.src.addr_bytes,
 663                        &rte_flow_item_eth_mask.src.addr_bytes,
 664                        sizeof(eth_mask.src.addr_bytes));
 665         } else {
 666                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 667                        sizeof(eth.dst.addr_bytes));
 668                 memcpy(&eth_mask.dst.addr_bytes,
 669                        &rte_flow_item_eth_mask.dst.addr_bytes,
 670                        sizeof(eth_mask.dst.addr_bytes));
 671         }
 672         item.spec = &eth;
 673         item.mask = &eth_mask;
 674         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 675                                              MLX5_MODIFICATION_TYPE_SET, error);
 676 }
 677
 678 /**
 679  * Convert modify-header set VLAN VID action to DV specification.
 680  *
 681  * @param[in,out] resource
 682  *   Pointer to the modify-header resource.
 683  * @param[in] action
 684  *   Pointer to action specification.
 685  * @param[out] error
 686  *   Pointer to the error structure.
 687  *
 688  * @return
 689  *   0 on success, a negative errno value otherwise and rte_errno is set.
 690  */
 691 static int
 692 flow_dv_convert_action_modify_vlan_vid
 693                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 694                          const struct rte_flow_action *action,
 695                          struct rte_flow_error *error)
 696 {
 697         const struct rte_flow_action_of_set_vlan_vid *conf =
 698                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 699         int i = resource->actions_num;
 700         struct mlx5_modification_cmd *actions = resource->actions;
 701         struct field_modify_info *field = modify_vlan_out_first_vid;
 702
 703         if (i >= MLX5_MAX_MODIFY_NUM)
 704                 return rte_flow_error_set(error, EINVAL,
 705                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 706                          "too many items to modify");
 707         actions[i] = (struct mlx5_modification_cmd) {
 708                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 709                 .field = field->id,
 710                 .length = field->size,
 711                 .offset = field->offset,
 712         };
 713         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 714         actions[i].data1 = conf->vlan_vid;
 715         actions[i].data1 = actions[i].data1 << 16;
 716         resource->actions_num = ++i;
 717         return 0;
 718 }
 719
 720 /**
 721  * Convert modify-header set TP action to DV specification.
 722  *
 723  * @param[in,out] resource
 724  *   Pointer to the modify-header resource.
 725  * @param[in] action
 726  *   Pointer to action specification.
 727  * @param[in] items
 728  *   Pointer to rte_flow_item objects list.
 729  * @param[in] attr
 730  *   Pointer to flow attributes structure.
 731  * @param[in] dev_flow
 732  *   Pointer to the sub flow.
 733  * @param[in] tunnel_decap
 734  *   Whether action is after tunnel decapsulation.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_tp
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_action *action,
 745                          const struct rte_flow_item *items,
 746                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 747                          bool tunnel_decap, struct rte_flow_error *error)
 748 {
 749         const struct rte_flow_action_set_tp *conf =
 750                 (const struct rte_flow_action_set_tp *)(action->conf);
 751         struct rte_flow_item item;
 752         struct rte_flow_item_udp udp;
 753         struct rte_flow_item_udp udp_mask;
 754         struct rte_flow_item_tcp tcp;
 755         struct rte_flow_item_tcp tcp_mask;
 756         struct field_modify_info *field;
 757
 758         if (!attr->valid)
 759                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 760         if (attr->udp) {
 761                 memset(&udp, 0, sizeof(udp));
 762                 memset(&udp_mask, 0, sizeof(udp_mask));
 763                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 764                         udp.hdr.src_port = conf->port;
 765                         udp_mask.hdr.src_port =
 766                                         rte_flow_item_udp_mask.hdr.src_port;
 767                 } else {
 768                         udp.hdr.dst_port = conf->port;
 769                         udp_mask.hdr.dst_port =
 770                                         rte_flow_item_udp_mask.hdr.dst_port;
 771                 }
 772                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 773                 item.spec = &udp;
 774                 item.mask = &udp_mask;
 775                 field = modify_udp;
 776         } else {
 777                 MLX5_ASSERT(attr->tcp);
 778                 memset(&tcp, 0, sizeof(tcp));
 779                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 780                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 781                         tcp.hdr.src_port = conf->port;
 782                         tcp_mask.hdr.src_port =
 783                                         rte_flow_item_tcp_mask.hdr.src_port;
 784                 } else {
 785                         tcp.hdr.dst_port = conf->port;
 786                         tcp_mask.hdr.dst_port =
 787                                         rte_flow_item_tcp_mask.hdr.dst_port;
 788                 }
 789                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 790                 item.spec = &tcp;
 791                 item.mask = &tcp_mask;
 792                 field = modify_tcp;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header set TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_action *action,
 823                          const struct rte_flow_item *items,
 824                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 825                          bool tunnel_decap, struct rte_flow_error *error)
 826 {
 827         const struct rte_flow_action_set_ttl *conf =
 828                 (const struct rte_flow_action_set_ttl *)(action->conf);
 829         struct rte_flow_item item;
 830         struct rte_flow_item_ipv4 ipv4;
 831         struct rte_flow_item_ipv4 ipv4_mask;
 832         struct rte_flow_item_ipv6 ipv6;
 833         struct rte_flow_item_ipv6 ipv6_mask;
 834         struct field_modify_info *field;
 835
 836         if (!attr->valid)
 837                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 838         if (attr->ipv4) {
 839                 memset(&ipv4, 0, sizeof(ipv4));
 840                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 841                 ipv4.hdr.time_to_live = conf->ttl_value;
 842                 ipv4_mask.hdr.time_to_live = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 844                 item.spec = &ipv4;
 845                 item.mask = &ipv4_mask;
 846                 field = modify_ipv4;
 847         } else {
 848                 MLX5_ASSERT(attr->ipv6);
 849                 memset(&ipv6, 0, sizeof(ipv6));
 850                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 851                 ipv6.hdr.hop_limits = conf->ttl_value;
 852                 ipv6_mask.hdr.hop_limits = 0xFF;
 853                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 854                 item.spec = &ipv6;
 855                 item.mask = &ipv6_mask;
 856                 field = modify_ipv6;
 857         }
 858         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 859                                              MLX5_MODIFICATION_TYPE_SET, error);
 860 }
 861
 862 /**
 863  * Convert modify-header decrement TTL action to DV specification.
 864  *
 865  * @param[in,out] resource
 866  *   Pointer to the modify-header resource.
 867  * @param[in] action
 868  *   Pointer to action specification.
 869  * @param[in] items
 870  *   Pointer to rte_flow_item objects list.
 871  * @param[in] attr
 872  *   Pointer to flow attributes structure.
 873  * @param[in] dev_flow
 874  *   Pointer to the sub flow.
 875  * @param[in] tunnel_decap
 876  *   Whether action is after tunnel decapsulation.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_dec_ttl
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_item *items,
 887                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 888                          bool tunnel_decap, struct rte_flow_error *error)
 889 {
 890         struct rte_flow_item item;
 891         struct rte_flow_item_ipv4 ipv4;
 892         struct rte_flow_item_ipv4 ipv4_mask;
 893         struct rte_flow_item_ipv6 ipv6;
 894         struct rte_flow_item_ipv6 ipv6_mask;
 895         struct field_modify_info *field;
 896
 897         if (!attr->valid)
 898                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 899         if (attr->ipv4) {
 900                 memset(&ipv4, 0, sizeof(ipv4));
 901                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 902                 ipv4.hdr.time_to_live = 0xFF;
 903                 ipv4_mask.hdr.time_to_live = 0xFF;
 904                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 905                 item.spec = &ipv4;
 906                 item.mask = &ipv4_mask;
 907                 field = modify_ipv4;
 908         } else {
 909                 MLX5_ASSERT(attr->ipv6);
 910                 memset(&ipv6, 0, sizeof(ipv6));
 911                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 912                 ipv6.hdr.hop_limits = 0xFF;
 913                 ipv6_mask.hdr.hop_limits = 0xFF;
 914                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 915                 item.spec = &ipv6;
 916                 item.mask = &ipv6_mask;
 917                 field = modify_ipv6;
 918         }
 919         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 920                                              MLX5_MODIFICATION_TYPE_ADD, error);
 921 }
 922
 923 /**
 924  * Convert modify-header increment/decrement TCP Sequence number
 925  * to DV specification.
 926  *
 927  * @param[in,out] resource
 928  *   Pointer to the modify-header resource.
 929  * @param[in] action
 930  *   Pointer to action specification.
 931  * @param[out] error
 932  *   Pointer to the error structure.
 933  *
 934  * @return
 935  *   0 on success, a negative errno value otherwise and rte_errno is set.
 936  */
 937 static int
 938 flow_dv_convert_action_modify_tcp_seq
 939                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 940                          const struct rte_flow_action *action,
 941                          struct rte_flow_error *error)
 942 {
 943         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 944         uint64_t value = rte_be_to_cpu_32(*conf);
 945         struct rte_flow_item item;
 946         struct rte_flow_item_tcp tcp;
 947         struct rte_flow_item_tcp tcp_mask;
 948
 949         memset(&tcp, 0, sizeof(tcp));
 950         memset(&tcp_mask, 0, sizeof(tcp_mask));
 951         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 952                 /*
 953                  * The HW has no decrement operation, only increment operation.
 954                  * To simulate decrement X from Y using increment operation
 955                  * we need to add UINT32_MAX X times to Y.
 956                  * Each adding of UINT32_MAX decrements Y by 1.
 957                  */
 958                 value *= UINT32_MAX;
 959         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 960         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 961         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 962         item.spec = &tcp;
 963         item.mask = &tcp_mask;
 964         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 965                                              MLX5_MODIFICATION_TYPE_ADD, error);
 966 }
 967
 968 /**
 969  * Convert modify-header increment/decrement TCP Acknowledgment number
 970  * to DV specification.
 971  *
 972  * @param[in,out] resource
 973  *   Pointer to the modify-header resource.
 974  * @param[in] action
 975  *   Pointer to action specification.
 976  * @param[out] error
 977  *   Pointer to the error structure.
 978  *
 979  * @return
 980  *   0 on success, a negative errno value otherwise and rte_errno is set.
 981  */
 982 static int
 983 flow_dv_convert_action_modify_tcp_ack
 984                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 985                          const struct rte_flow_action *action,
 986                          struct rte_flow_error *error)
 987 {
 988         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 989         uint64_t value = rte_be_to_cpu_32(*conf);
 990         struct rte_flow_item item;
 991         struct rte_flow_item_tcp tcp;
 992         struct rte_flow_item_tcp tcp_mask;
 993
 994         memset(&tcp, 0, sizeof(tcp));
 995         memset(&tcp_mask, 0, sizeof(tcp_mask));
 996         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 997                 /*
 998                  * The HW has no decrement operation, only increment operation.
 999                  * To simulate decrement X from Y using increment operation
1000                  * we need to add UINT32_MAX X times to Y.
1001                  * Each adding of UINT32_MAX decrements Y by 1.
1002                  */
1003                 value *= UINT32_MAX;
1004         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1007         item.spec = &tcp;
1008         item.mask = &tcp_mask;
1009         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010                                              MLX5_MODIFICATION_TYPE_ADD, error);
1011 }
1012
1013 static enum mlx5_modification_field reg_to_field[] = {
1014         [REG_NON] = MLX5_MODI_OUT_NONE,
1015         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1025 };
1026
1027 /**
1028  * Convert register set to DV specification.
1029  *
1030  * @param[in,out] resource
1031  *   Pointer to the modify-header resource.
1032  * @param[in] action
1033  *   Pointer to action specification.
1034  * @param[out] error
1035  *   Pointer to the error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 static int
1041 flow_dv_convert_action_set_reg
1042                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043                          const struct rte_flow_action *action,
1044                          struct rte_flow_error *error)
1045 {
1046         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047         struct mlx5_modification_cmd *actions = resource->actions;
1048         uint32_t i = resource->actions_num;
1049
1050         if (i >= MLX5_MAX_MODIFY_NUM)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053                                           "too many items to modify");
1054         MLX5_ASSERT(conf->id != REG_NON);
1055         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056         actions[i] = (struct mlx5_modification_cmd) {
1057                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058                 .field = reg_to_field[conf->id],
1059                 .offset = conf->offset,
1060                 .length = conf->length,
1061         };
1062         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1064         ++i;
1065         resource->actions_num = i;
1066         return 0;
1067 }
1068
1069 /**
1070  * Convert SET_TAG action to DV specification.
1071  *
1072  * @param[in] dev
1073  *   Pointer to the rte_eth_dev structure.
1074  * @param[in,out] resource
1075  *   Pointer to the modify-header resource.
1076  * @param[in] conf
1077  *   Pointer to action specification.
1078  * @param[out] error
1079  *   Pointer to the error structure.
1080  *
1081  * @return
1082  *   0 on success, a negative errno value otherwise and rte_errno is set.
1083  */
1084 static int
1085 flow_dv_convert_action_set_tag
1086                         (struct rte_eth_dev *dev,
1087                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1088                          const struct rte_flow_action_set_tag *conf,
1089                          struct rte_flow_error *error)
1090 {
1091         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093         struct rte_flow_item item = {
1094                 .spec = &data,
1095                 .mask = &mask,
1096         };
1097         struct field_modify_info reg_c_x[] = {
1098                 [1] = {0, 0, 0},
1099         };
1100         enum mlx5_modification_field reg_type;
1101         int ret;
1102
1103         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1104         if (ret < 0)
1105                 return ret;
1106         MLX5_ASSERT(ret != REG_NON);
1107         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108         reg_type = reg_to_field[ret];
1109         MLX5_ASSERT(reg_type > 0);
1110         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112                                              MLX5_MODIFICATION_TYPE_SET, error);
1113 }
1114
1115 /**
1116  * Convert internal COPY_REG action to DV specification.
1117  *
1118  * @param[in] dev
1119  *   Pointer to the rte_eth_dev structure.
1120  * @param[in,out] res
1121  *   Pointer to the modify-header resource.
1122  * @param[in] action
1123  *   Pointer to action specification.
1124  * @param[out] error
1125  *   Pointer to the error structure.
1126  *
1127  * @return
1128  *   0 on success, a negative errno value otherwise and rte_errno is set.
1129  */
1130 static int
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1133                                  const struct rte_flow_action *action,
1134                                  struct rte_flow_error *error)
1135 {
1136         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138         struct rte_flow_item item = {
1139                 .spec = NULL,
1140                 .mask = &mask,
1141         };
1142         struct field_modify_info reg_src[] = {
1143                 {4, 0, reg_to_field[conf->src]},
1144                 {0, 0, 0},
1145         };
1146         struct field_modify_info reg_dst = {
1147                 .offset = 0,
1148                 .id = reg_to_field[conf->dst],
1149         };
1150         /* Adjust reg_c[0] usage according to reported mask. */
1151         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152                 struct mlx5_priv *priv = dev->data->dev_private;
1153                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1154
1155                 MLX5_ASSERT(reg_c0);
1156                 MLX5_ASSERT(priv->sh->config.dv_xmeta_en !=
1157                             MLX5_XMETA_MODE_LEGACY);
1158                 if (conf->dst == REG_C_0) {
1159                         /* Copy to reg_c[0], within mask only. */
1160                         reg_dst.offset = rte_bsf32(reg_c0);
1161                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1162                 } else {
1163                         reg_dst.offset = 0;
1164                         mask = rte_cpu_to_be_32(reg_c0);
1165                 }
1166         }
1167         return flow_dv_convert_modify_action(&item,
1168                                              reg_src, &reg_dst, res,
1169                                              MLX5_MODIFICATION_TYPE_COPY,
1170                                              error);
1171 }
1172
1173 /**
1174  * Convert MARK action to DV specification. This routine is used
1175  * in extensive metadata only and requires metadata register to be
1176  * handled. In legacy mode hardware tag resource is engaged.
1177  *
1178  * @param[in] dev
1179  *   Pointer to the rte_eth_dev structure.
1180  * @param[in] conf
1181  *   Pointer to MARK action specification.
1182  * @param[in,out] resource
1183  *   Pointer to the modify-header resource.
1184  * @param[out] error
1185  *   Pointer to the error structure.
1186  *
1187  * @return
1188  *   0 on success, a negative errno value otherwise and rte_errno is set.
1189  */
1190 static int
1191 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1192                             const struct rte_flow_action_mark *conf,
1193                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1194                             struct rte_flow_error *error)
1195 {
1196         struct mlx5_priv *priv = dev->data->dev_private;
1197         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1198                                            priv->sh->dv_mark_mask);
1199         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1200         struct rte_flow_item item = {
1201                 .spec = &data,
1202                 .mask = &mask,
1203         };
1204         struct field_modify_info reg_c_x[] = {
1205                 [1] = {0, 0, 0},
1206         };
1207         int reg;
1208
1209         if (!mask)
1210                 return rte_flow_error_set(error, EINVAL,
1211                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1212                                           NULL, "zero mark action mask");
1213         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1214         if (reg < 0)
1215                 return reg;
1216         MLX5_ASSERT(reg > 0);
1217         if (reg == REG_C_0) {
1218                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1219                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1220
1221                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1222                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1223                 mask = rte_cpu_to_be_32(mask << shl_c0);
1224         }
1225         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1226         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1227                                              MLX5_MODIFICATION_TYPE_SET, error);
1228 }
1229
1230 /**
1231  * Get metadata register index for specified steering domain.
1232  *
1233  * @param[in] dev
1234  *   Pointer to the rte_eth_dev structure.
1235  * @param[in] attr
1236  *   Attributes of flow to determine steering domain.
1237  * @param[out] error
1238  *   Pointer to the error structure.
1239  *
1240  * @return
1241  *   positive index on success, a negative errno value otherwise
1242  *   and rte_errno is set.
1243  */
1244 static enum modify_reg
1245 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1246                          const struct rte_flow_attr *attr,
1247                          struct rte_flow_error *error)
1248 {
1249         int reg =
1250                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1251                                           MLX5_METADATA_FDB :
1252                                             attr->egress ?
1253                                             MLX5_METADATA_TX :
1254                                             MLX5_METADATA_RX, 0, error);
1255         if (reg < 0)
1256                 return rte_flow_error_set(error,
1257                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1258                                           NULL, "unavailable "
1259                                           "metadata register");
1260         return reg;
1261 }
1262
1263 /**
1264  * Convert SET_META action to DV specification.
1265  *
1266  * @param[in] dev
1267  *   Pointer to the rte_eth_dev structure.
1268  * @param[in,out] resource
1269  *   Pointer to the modify-header resource.
1270  * @param[in] attr
1271  *   Attributes of flow that includes this item.
1272  * @param[in] conf
1273  *   Pointer to action specification.
1274  * @param[out] error
1275  *   Pointer to the error structure.
1276  *
1277  * @return
1278  *   0 on success, a negative errno value otherwise and rte_errno is set.
1279  */
1280 static int
1281 flow_dv_convert_action_set_meta
1282                         (struct rte_eth_dev *dev,
1283                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1284                          const struct rte_flow_attr *attr,
1285                          const struct rte_flow_action_set_meta *conf,
1286                          struct rte_flow_error *error)
1287 {
1288         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1289         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1290         struct rte_flow_item item = {
1291                 .spec = &data,
1292                 .mask = &mask,
1293         };
1294         struct field_modify_info reg_c_x[] = {
1295                 [1] = {0, 0, 0},
1296         };
1297         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1298
1299         if (reg < 0)
1300                 return reg;
1301         MLX5_ASSERT(reg != REG_NON);
1302         if (reg == REG_C_0) {
1303                 struct mlx5_priv *priv = dev->data->dev_private;
1304                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1305                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1306
1307                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1308                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1309                 mask = rte_cpu_to_be_32(mask << shl_c0);
1310         }
1311         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1312         /* The routine expects parameters in memory as big-endian ones. */
1313         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1314                                              MLX5_MODIFICATION_TYPE_SET, error);
1315 }
1316
1317 /**
1318  * Convert modify-header set IPv4 DSCP action to DV specification.
1319  *
1320  * @param[in,out] resource
1321  *   Pointer to the modify-header resource.
1322  * @param[in] action
1323  *   Pointer to action specification.
1324  * @param[out] error
1325  *   Pointer to the error structure.
1326  *
1327  * @return
1328  *   0 on success, a negative errno value otherwise and rte_errno is set.
1329  */
1330 static int
1331 flow_dv_convert_action_modify_ipv4_dscp
1332                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1333                          const struct rte_flow_action *action,
1334                          struct rte_flow_error *error)
1335 {
1336         const struct rte_flow_action_set_dscp *conf =
1337                 (const struct rte_flow_action_set_dscp *)(action->conf);
1338         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1339         struct rte_flow_item_ipv4 ipv4;
1340         struct rte_flow_item_ipv4 ipv4_mask;
1341
1342         memset(&ipv4, 0, sizeof(ipv4));
1343         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1344         ipv4.hdr.type_of_service = conf->dscp;
1345         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1346         item.spec = &ipv4;
1347         item.mask = &ipv4_mask;
1348         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1349                                              MLX5_MODIFICATION_TYPE_SET, error);
1350 }
1351
1352 /**
1353  * Convert modify-header set IPv6 DSCP action to DV specification.
1354  *
1355  * @param[in,out] resource
1356  *   Pointer to the modify-header resource.
1357  * @param[in] action
1358  *   Pointer to action specification.
1359  * @param[out] error
1360  *   Pointer to the error structure.
1361  *
1362  * @return
1363  *   0 on success, a negative errno value otherwise and rte_errno is set.
1364  */
1365 static int
1366 flow_dv_convert_action_modify_ipv6_dscp
1367                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1368                          const struct rte_flow_action *action,
1369                          struct rte_flow_error *error)
1370 {
1371         const struct rte_flow_action_set_dscp *conf =
1372                 (const struct rte_flow_action_set_dscp *)(action->conf);
1373         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1374         struct rte_flow_item_ipv6 ipv6;
1375         struct rte_flow_item_ipv6 ipv6_mask;
1376
1377         memset(&ipv6, 0, sizeof(ipv6));
1378         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1379         /*
1380          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1381          * rdma-core only accept the DSCP bits byte aligned start from
1382          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1383          * bits in IPv6 case as rdma-core requires byte aligned value.
1384          */
1385         ipv6.hdr.vtc_flow = conf->dscp;
1386         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1387         item.spec = &ipv6;
1388         item.mask = &ipv6_mask;
1389         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1390                                              MLX5_MODIFICATION_TYPE_SET, error);
1391 }
1392
1393 static int
1394 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1395                            enum rte_flow_field_id field, int inherit,
1396                            const struct rte_flow_attr *attr,
1397                            struct rte_flow_error *error)
1398 {
1399         struct mlx5_priv *priv = dev->data->dev_private;
1400
1401         switch (field) {
1402         case RTE_FLOW_FIELD_START:
1403                 return 32;
1404         case RTE_FLOW_FIELD_MAC_DST:
1405         case RTE_FLOW_FIELD_MAC_SRC:
1406                 return 48;
1407         case RTE_FLOW_FIELD_VLAN_TYPE:
1408                 return 16;
1409         case RTE_FLOW_FIELD_VLAN_ID:
1410                 return 12;
1411         case RTE_FLOW_FIELD_MAC_TYPE:
1412                 return 16;
1413         case RTE_FLOW_FIELD_IPV4_DSCP:
1414                 return 6;
1415         case RTE_FLOW_FIELD_IPV4_TTL:
1416                 return 8;
1417         case RTE_FLOW_FIELD_IPV4_SRC:
1418         case RTE_FLOW_FIELD_IPV4_DST:
1419                 return 32;
1420         case RTE_FLOW_FIELD_IPV6_DSCP:
1421                 return 6;
1422         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1423                 return 8;
1424         case RTE_FLOW_FIELD_IPV6_SRC:
1425         case RTE_FLOW_FIELD_IPV6_DST:
1426                 return 128;
1427         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1428         case RTE_FLOW_FIELD_TCP_PORT_DST:
1429                 return 16;
1430         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1431         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1432                 return 32;
1433         case RTE_FLOW_FIELD_TCP_FLAGS:
1434                 return 9;
1435         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1436         case RTE_FLOW_FIELD_UDP_PORT_DST:
1437                 return 16;
1438         case RTE_FLOW_FIELD_VXLAN_VNI:
1439         case RTE_FLOW_FIELD_GENEVE_VNI:
1440                 return 24;
1441         case RTE_FLOW_FIELD_GTP_TEID:
1442         case RTE_FLOW_FIELD_TAG:
1443                 return 32;
1444         case RTE_FLOW_FIELD_MARK:
1445                 return __builtin_popcount(priv->sh->dv_mark_mask);
1446         case RTE_FLOW_FIELD_META:
1447                 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1448                         __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1449         case RTE_FLOW_FIELD_POINTER:
1450         case RTE_FLOW_FIELD_VALUE:
1451                 return inherit < 0 ? 0 : inherit;
1452         default:
1453                 MLX5_ASSERT(false);
1454         }
1455         return 0;
1456 }
1457
1458 static void
1459 mlx5_flow_field_id_to_modify_info
1460                 (const struct rte_flow_action_modify_data *data,
1461                  struct field_modify_info *info, uint32_t *mask,
1462                  uint32_t width, struct rte_eth_dev *dev,
1463                  const struct rte_flow_attr *attr, struct rte_flow_error *error)
1464 {
1465         struct mlx5_priv *priv = dev->data->dev_private;
1466         uint32_t idx = 0;
1467         uint32_t off = 0;
1468
1469         switch (data->field) {
1470         case RTE_FLOW_FIELD_START:
1471                 /* not supported yet */
1472                 MLX5_ASSERT(false);
1473                 break;
1474         case RTE_FLOW_FIELD_MAC_DST:
1475                 off = data->offset > 16 ? data->offset - 16 : 0;
1476                 if (mask) {
1477                         if (data->offset < 16) {
1478                                 info[idx] = (struct field_modify_info){2, 4,
1479                                                 MLX5_MODI_OUT_DMAC_15_0};
1480                                 if (width < 16) {
1481                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1482                                                                  (16 - width));
1483                                         width = 0;
1484                                 } else {
1485                                         mask[1] = RTE_BE16(0xffff);
1486                                         width -= 16;
1487                                 }
1488                                 if (!width)
1489                                         break;
1490                                 ++idx;
1491                         }
1492                         info[idx] = (struct field_modify_info){4, 0,
1493                                                 MLX5_MODI_OUT_DMAC_47_16};
1494                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1495                                                     (32 - width)) << off);
1496                 } else {
1497                         if (data->offset < 16)
1498                                 info[idx++] = (struct field_modify_info){2, 0,
1499                                                 MLX5_MODI_OUT_DMAC_15_0};
1500                         info[idx] = (struct field_modify_info){4, off,
1501                                                 MLX5_MODI_OUT_DMAC_47_16};
1502                 }
1503                 break;
1504         case RTE_FLOW_FIELD_MAC_SRC:
1505                 off = data->offset > 16 ? data->offset - 16 : 0;
1506                 if (mask) {
1507                         if (data->offset < 16) {
1508                                 info[idx] = (struct field_modify_info){2, 4,
1509                                                 MLX5_MODI_OUT_SMAC_15_0};
1510                                 if (width < 16) {
1511                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1512                                                                  (16 - width));
1513                                         width = 0;
1514                                 } else {
1515                                         mask[1] = RTE_BE16(0xffff);
1516                                         width -= 16;
1517                                 }
1518                                 if (!width)
1519                                         break;
1520                                 ++idx;
1521                         }
1522                         info[idx] = (struct field_modify_info){4, 0,
1523                                                 MLX5_MODI_OUT_SMAC_47_16};
1524                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1525                                                     (32 - width)) << off);
1526                 } else {
1527                         if (data->offset < 16)
1528                                 info[idx++] = (struct field_modify_info){2, 0,
1529                                                 MLX5_MODI_OUT_SMAC_15_0};
1530                         info[idx] = (struct field_modify_info){4, off,
1531                                                 MLX5_MODI_OUT_SMAC_47_16};
1532                 }
1533                 break;
1534         case RTE_FLOW_FIELD_VLAN_TYPE:
1535                 /* not supported yet */
1536                 break;
1537         case RTE_FLOW_FIELD_VLAN_ID:
1538                 info[idx] = (struct field_modify_info){2, 0,
1539                                         MLX5_MODI_OUT_FIRST_VID};
1540                 if (mask)
1541                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1542                 break;
1543         case RTE_FLOW_FIELD_MAC_TYPE:
1544                 info[idx] = (struct field_modify_info){2, 0,
1545                                         MLX5_MODI_OUT_ETHERTYPE};
1546                 if (mask)
1547                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1548                 break;
1549         case RTE_FLOW_FIELD_IPV4_DSCP:
1550                 info[idx] = (struct field_modify_info){1, 0,
1551                                         MLX5_MODI_OUT_IP_DSCP};
1552                 if (mask)
1553                         mask[idx] = 0x3f >> (6 - width);
1554                 break;
1555         case RTE_FLOW_FIELD_IPV4_TTL:
1556                 info[idx] = (struct field_modify_info){1, 0,
1557                                         MLX5_MODI_OUT_IPV4_TTL};
1558                 if (mask)
1559                         mask[idx] = 0xff >> (8 - width);
1560                 break;
1561         case RTE_FLOW_FIELD_IPV4_SRC:
1562                 info[idx] = (struct field_modify_info){4, 0,
1563                                         MLX5_MODI_OUT_SIPV4};
1564                 if (mask)
1565                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1566                                                      (32 - width));
1567                 break;
1568         case RTE_FLOW_FIELD_IPV4_DST:
1569                 info[idx] = (struct field_modify_info){4, 0,
1570                                         MLX5_MODI_OUT_DIPV4};
1571                 if (mask)
1572                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1573                                                      (32 - width));
1574                 break;
1575         case RTE_FLOW_FIELD_IPV6_DSCP:
1576                 info[idx] = (struct field_modify_info){1, 0,
1577                                         MLX5_MODI_OUT_IP_DSCP};
1578                 if (mask)
1579                         mask[idx] = 0x3f >> (6 - width);
1580                 break;
1581         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1582                 info[idx] = (struct field_modify_info){1, 0,
1583                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1584                 if (mask)
1585                         mask[idx] = 0xff >> (8 - width);
1586                 break;
1587         case RTE_FLOW_FIELD_IPV6_SRC:
1588                 if (mask) {
1589                         if (data->offset < 32) {
1590                                 info[idx] = (struct field_modify_info){4, 12,
1591                                                 MLX5_MODI_OUT_SIPV6_31_0};
1592                                 if (width < 32) {
1593                                         mask[3] =
1594                                                 rte_cpu_to_be_32(0xffffffff >>
1595                                                                  (32 - width));
1596                                         width = 0;
1597                                 } else {
1598                                         mask[3] = RTE_BE32(0xffffffff);
1599                                         width -= 32;
1600                                 }
1601                                 if (!width)
1602                                         break;
1603                                 ++idx;
1604                         }
1605                         if (data->offset < 64) {
1606                                 info[idx] = (struct field_modify_info){4, 8,
1607                                                 MLX5_MODI_OUT_SIPV6_63_32};
1608                                 if (width < 32) {
1609                                         mask[2] =
1610                                                 rte_cpu_to_be_32(0xffffffff >>
1611                                                                  (32 - width));
1612                                         width = 0;
1613                                 } else {
1614                                         mask[2] = RTE_BE32(0xffffffff);
1615                                         width -= 32;
1616                                 }
1617                                 if (!width)
1618                                         break;
1619                                 ++idx;
1620                         }
1621                         if (data->offset < 96) {
1622                                 info[idx] = (struct field_modify_info){4, 4,
1623                                                 MLX5_MODI_OUT_SIPV6_95_64};
1624                                 if (width < 32) {
1625                                         mask[1] =
1626                                                 rte_cpu_to_be_32(0xffffffff >>
1627                                                                  (32 - width));
1628                                         width = 0;
1629                                 } else {
1630                                         mask[1] = RTE_BE32(0xffffffff);
1631                                         width -= 32;
1632                                 }
1633                                 if (!width)
1634                                         break;
1635                                 ++idx;
1636                         }
1637                         info[idx] = (struct field_modify_info){4, 0,
1638                                                 MLX5_MODI_OUT_SIPV6_127_96};
1639                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1640                 } else {
1641                         if (data->offset < 32)
1642                                 info[idx++] = (struct field_modify_info){4, 0,
1643                                                 MLX5_MODI_OUT_SIPV6_31_0};
1644                         if (data->offset < 64)
1645                                 info[idx++] = (struct field_modify_info){4, 0,
1646                                                 MLX5_MODI_OUT_SIPV6_63_32};
1647                         if (data->offset < 96)
1648                                 info[idx++] = (struct field_modify_info){4, 0,
1649                                                 MLX5_MODI_OUT_SIPV6_95_64};
1650                         if (data->offset < 128)
1651                                 info[idx++] = (struct field_modify_info){4, 0,
1652                                                 MLX5_MODI_OUT_SIPV6_127_96};
1653                 }
1654                 break;
1655         case RTE_FLOW_FIELD_IPV6_DST:
1656                 if (mask) {
1657                         if (data->offset < 32) {
1658                                 info[idx] = (struct field_modify_info){4, 12,
1659                                                 MLX5_MODI_OUT_DIPV6_31_0};
1660                                 if (width < 32) {
1661                                         mask[3] =
1662                                                 rte_cpu_to_be_32(0xffffffff >>
1663                                                                  (32 - width));
1664                                         width = 0;
1665                                 } else {
1666                                         mask[3] = RTE_BE32(0xffffffff);
1667                                         width -= 32;
1668                                 }
1669                                 if (!width)
1670                                         break;
1671                                 ++idx;
1672                         }
1673                         if (data->offset < 64) {
1674                                 info[idx] = (struct field_modify_info){4, 8,
1675                                                 MLX5_MODI_OUT_DIPV6_63_32};
1676                                 if (width < 32) {
1677                                         mask[2] =
1678                                                 rte_cpu_to_be_32(0xffffffff >>
1679                                                                  (32 - width));
1680                                         width = 0;
1681                                 } else {
1682                                         mask[2] = RTE_BE32(0xffffffff);
1683                                         width -= 32;
1684                                 }
1685                                 if (!width)
1686                                         break;
1687                                 ++idx;
1688                         }
1689                         if (data->offset < 96) {
1690                                 info[idx] = (struct field_modify_info){4, 4,
1691                                                 MLX5_MODI_OUT_DIPV6_95_64};
1692                                 if (width < 32) {
1693                                         mask[1] =
1694                                                 rte_cpu_to_be_32(0xffffffff >>
1695                                                                  (32 - width));
1696                                         width = 0;
1697                                 } else {
1698                                         mask[1] = RTE_BE32(0xffffffff);
1699                                         width -= 32;
1700                                 }
1701                                 if (!width)
1702                                         break;
1703                                 ++idx;
1704                         }
1705                         info[idx] = (struct field_modify_info){4, 0,
1706                                                 MLX5_MODI_OUT_DIPV6_127_96};
1707                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1708                 } else {
1709                         if (data->offset < 32)
1710                                 info[idx++] = (struct field_modify_info){4, 0,
1711                                                 MLX5_MODI_OUT_DIPV6_31_0};
1712                         if (data->offset < 64)
1713                                 info[idx++] = (struct field_modify_info){4, 0,
1714                                                 MLX5_MODI_OUT_DIPV6_63_32};
1715                         if (data->offset < 96)
1716                                 info[idx++] = (struct field_modify_info){4, 0,
1717                                                 MLX5_MODI_OUT_DIPV6_95_64};
1718                         if (data->offset < 128)
1719                                 info[idx++] = (struct field_modify_info){4, 0,
1720                                                 MLX5_MODI_OUT_DIPV6_127_96};
1721                 }
1722                 break;
1723         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1724                 info[idx] = (struct field_modify_info){2, 0,
1725                                         MLX5_MODI_OUT_TCP_SPORT};
1726                 if (mask)
1727                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1728                 break;
1729         case RTE_FLOW_FIELD_TCP_PORT_DST:
1730                 info[idx] = (struct field_modify_info){2, 0,
1731                                         MLX5_MODI_OUT_TCP_DPORT};
1732                 if (mask)
1733                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1734                 break;
1735         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1736                 info[idx] = (struct field_modify_info){4, 0,
1737                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1738                 if (mask)
1739                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1740                                                      (32 - width));
1741                 break;
1742         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1743                 info[idx] = (struct field_modify_info){4, 0,
1744                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1745                 if (mask)
1746                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1747                                                      (32 - width));
1748                 break;
1749         case RTE_FLOW_FIELD_TCP_FLAGS:
1750                 info[idx] = (struct field_modify_info){2, 0,
1751                                         MLX5_MODI_OUT_TCP_FLAGS};
1752                 if (mask)
1753                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1754                 break;
1755         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1756                 info[idx] = (struct field_modify_info){2, 0,
1757                                         MLX5_MODI_OUT_UDP_SPORT};
1758                 if (mask)
1759                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1760                 break;
1761         case RTE_FLOW_FIELD_UDP_PORT_DST:
1762                 info[idx] = (struct field_modify_info){2, 0,
1763                                         MLX5_MODI_OUT_UDP_DPORT};
1764                 if (mask)
1765                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1766                 break;
1767         case RTE_FLOW_FIELD_VXLAN_VNI:
1768                 /* not supported yet */
1769                 break;
1770         case RTE_FLOW_FIELD_GENEVE_VNI:
1771                 /* not supported yet*/
1772                 break;
1773         case RTE_FLOW_FIELD_GTP_TEID:
1774                 info[idx] = (struct field_modify_info){4, 0,
1775                                         MLX5_MODI_GTP_TEID};
1776                 if (mask)
1777                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1778                                                      (32 - width));
1779                 break;
1780         case RTE_FLOW_FIELD_TAG:
1781                 {
1782                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1783                                                    data->level, error);
1784                         if (reg < 0)
1785                                 return;
1786                         MLX5_ASSERT(reg != REG_NON);
1787                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1788                         info[idx] = (struct field_modify_info){4, 0,
1789                                                 reg_to_field[reg]};
1790                         if (mask)
1791                                 mask[idx] =
1792                                         rte_cpu_to_be_32(0xffffffff >>
1793                                                          (32 - width));
1794                 }
1795                 break;
1796         case RTE_FLOW_FIELD_MARK:
1797                 {
1798                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1799                         uint32_t mark_count = __builtin_popcount(mark_mask);
1800                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1801                                                        0, error);
1802                         if (reg < 0)
1803                                 return;
1804                         MLX5_ASSERT(reg != REG_NON);
1805                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1806                         info[idx] = (struct field_modify_info){4, 0,
1807                                                 reg_to_field[reg]};
1808                         if (mask)
1809                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1810                                          (mark_count - width)) & mark_mask);
1811                 }
1812                 break;
1813         case RTE_FLOW_FIELD_META:
1814                 {
1815                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1816                         uint32_t meta_count = __builtin_popcount(meta_mask);
1817                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1818                         if (reg < 0)
1819                                 return;
1820                         MLX5_ASSERT(reg != REG_NON);
1821                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1822                         info[idx] = (struct field_modify_info){4, 0,
1823                                                 reg_to_field[reg]};
1824                         if (mask)
1825                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1826                                         (meta_count - width)) & meta_mask);
1827                 }
1828                 break;
1829         case RTE_FLOW_FIELD_POINTER:
1830         case RTE_FLOW_FIELD_VALUE:
1831         default:
1832                 MLX5_ASSERT(false);
1833                 break;
1834         }
1835 }
1836
1837 /**
1838  * Convert modify_field action to DV specification.
1839  *
1840  * @param[in] dev
1841  *   Pointer to the rte_eth_dev structure.
1842  * @param[in,out] resource
1843  *   Pointer to the modify-header resource.
1844  * @param[in] action
1845  *   Pointer to action specification.
1846  * @param[in] attr
1847  *   Attributes of flow that includes this item.
1848  * @param[out] error
1849  *   Pointer to the error structure.
1850  *
1851  * @return
1852  *   0 on success, a negative errno value otherwise and rte_errno is set.
1853  */
1854 static int
1855 flow_dv_convert_action_modify_field
1856                         (struct rte_eth_dev *dev,
1857                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1858                          const struct rte_flow_action *action,
1859                          const struct rte_flow_attr *attr,
1860                          struct rte_flow_error *error)
1861 {
1862         const struct rte_flow_action_modify_field *conf =
1863                 (const struct rte_flow_action_modify_field *)(action->conf);
1864         struct rte_flow_item item = {
1865                 .spec = NULL,
1866                 .mask = NULL
1867         };
1868         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1869                                                                 {0, 0, 0} };
1870         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1871                                                                 {0, 0, 0} };
1872         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1873         uint32_t type, meta = 0;
1874
1875         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1876             conf->src.field == RTE_FLOW_FIELD_VALUE) {
1877                 type = MLX5_MODIFICATION_TYPE_SET;
1878                 /** For SET fill the destination field (field) first. */
1879                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1880                                                   conf->width, dev,
1881                                                   attr, error);
1882                 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1883                                         (void *)(uintptr_t)conf->src.pvalue :
1884                                         (void *)(uintptr_t)&conf->src.value;
1885                 if (conf->dst.field == RTE_FLOW_FIELD_META) {
1886                         meta = *(const unaligned_uint32_t *)item.spec;
1887                         meta = rte_cpu_to_be_32(meta);
1888                         item.spec = &meta;
1889                 }
1890         } else {
1891                 type = MLX5_MODIFICATION_TYPE_COPY;
1892                 /** For COPY fill the destination field (dcopy) without mask. */
1893                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1894                                                   conf->width, dev,
1895                                                   attr, error);
1896                 /** Then construct the source field (field) with mask. */
1897                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1898                                                   conf->width, dev,
1899                                                   attr, error);
1900         }
1901         item.mask = &mask;
1902         return flow_dv_convert_modify_action(&item,
1903                         field, dcopy, resource, type, error);
1904 }
1905
1906 /**
1907  * Validate MARK item.
1908  *
1909  * @param[in] dev
1910  *   Pointer to the rte_eth_dev structure.
1911  * @param[in] item
1912  *   Item specification.
1913  * @param[in] attr
1914  *   Attributes of flow that includes this item.
1915  * @param[out] error
1916  *   Pointer to error structure.
1917  *
1918  * @return
1919  *   0 on success, a negative errno value otherwise and rte_errno is set.
1920  */
1921 static int
1922 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1923                            const struct rte_flow_item *item,
1924                            const struct rte_flow_attr *attr __rte_unused,
1925                            struct rte_flow_error *error)
1926 {
1927         struct mlx5_priv *priv = dev->data->dev_private;
1928         struct mlx5_sh_config *config = &priv->sh->config;
1929         const struct rte_flow_item_mark *spec = item->spec;
1930         const struct rte_flow_item_mark *mask = item->mask;
1931         const struct rte_flow_item_mark nic_mask = {
1932                 .id = priv->sh->dv_mark_mask,
1933         };
1934         int ret;
1935
1936         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1937                 return rte_flow_error_set(error, ENOTSUP,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "extended metadata feature"
1940                                           " isn't enabled");
1941         if (!mlx5_flow_ext_mreg_supported(dev))
1942                 return rte_flow_error_set(error, ENOTSUP,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "extended metadata register"
1945                                           " isn't supported");
1946         if (!nic_mask.id)
1947                 return rte_flow_error_set(error, ENOTSUP,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "extended metadata register"
1950                                           " isn't available");
1951         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1952         if (ret < 0)
1953                 return ret;
1954         if (!spec)
1955                 return rte_flow_error_set(error, EINVAL,
1956                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1957                                           item->spec,
1958                                           "data cannot be empty");
1959         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1960                 return rte_flow_error_set(error, EINVAL,
1961                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1962                                           &spec->id,
1963                                           "mark id exceeds the limit");
1964         if (!mask)
1965                 mask = &nic_mask;
1966         if (!mask->id)
1967                 return rte_flow_error_set(error, EINVAL,
1968                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1969                                         "mask cannot be zero");
1970
1971         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1972                                         (const uint8_t *)&nic_mask,
1973                                         sizeof(struct rte_flow_item_mark),
1974                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1975         if (ret < 0)
1976                 return ret;
1977         return 0;
1978 }
1979
1980 /**
1981  * Validate META item.
1982  *
1983  * @param[in] dev
1984  *   Pointer to the rte_eth_dev structure.
1985  * @param[in] item
1986  *   Item specification.
1987  * @param[in] attr
1988  *   Attributes of flow that includes this item.
1989  * @param[out] error
1990  *   Pointer to error structure.
1991  *
1992  * @return
1993  *   0 on success, a negative errno value otherwise and rte_errno is set.
1994  */
1995 static int
1996 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1997                            const struct rte_flow_item *item,
1998                            const struct rte_flow_attr *attr,
1999                            struct rte_flow_error *error)
2000 {
2001         struct mlx5_priv *priv = dev->data->dev_private;
2002         struct mlx5_sh_config *config = &priv->sh->config;
2003         const struct rte_flow_item_meta *spec = item->spec;
2004         const struct rte_flow_item_meta *mask = item->mask;
2005         struct rte_flow_item_meta nic_mask = {
2006                 .data = UINT32_MAX
2007         };
2008         int reg;
2009         int ret;
2010
2011         if (!spec)
2012                 return rte_flow_error_set(error, EINVAL,
2013                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2014                                           item->spec,
2015                                           "data cannot be empty");
2016         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2017                 if (!mlx5_flow_ext_mreg_supported(dev))
2018                         return rte_flow_error_set(error, ENOTSUP,
2019                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2020                                           "extended metadata register"
2021                                           " isn't supported");
2022                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2023                 if (reg < 0)
2024                         return reg;
2025                 if (reg == REG_NON)
2026                         return rte_flow_error_set(error, ENOTSUP,
2027                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2028                                         "unavailable extended metadata register");
2029                 if (reg == REG_B)
2030                         return rte_flow_error_set(error, ENOTSUP,
2031                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2032                                           "match on reg_b "
2033                                           "isn't supported");
2034                 if (reg != REG_A)
2035                         nic_mask.data = priv->sh->dv_meta_mask;
2036         } else {
2037                 if (attr->transfer)
2038                         return rte_flow_error_set(error, ENOTSUP,
2039                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2040                                         "extended metadata feature "
2041                                         "should be enabled when "
2042                                         "meta item is requested "
2043                                         "with e-switch mode ");
2044                 if (attr->ingress)
2045                         return rte_flow_error_set(error, ENOTSUP,
2046                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2047                                         "match on metadata for ingress "
2048                                         "is not supported in legacy "
2049                                         "metadata mode");
2050         }
2051         if (!mask)
2052                 mask = &rte_flow_item_meta_mask;
2053         if (!mask->data)
2054                 return rte_flow_error_set(error, EINVAL,
2055                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2056                                         "mask cannot be zero");
2057
2058         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2059                                         (const uint8_t *)&nic_mask,
2060                                         sizeof(struct rte_flow_item_meta),
2061                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2062         return ret;
2063 }
2064
2065 /**
2066  * Validate TAG item.
2067  *
2068  * @param[in] dev
2069  *   Pointer to the rte_eth_dev structure.
2070  * @param[in] item
2071  *   Item specification.
2072  * @param[in] attr
2073  *   Attributes of flow that includes this item.
2074  * @param[out] error
2075  *   Pointer to error structure.
2076  *
2077  * @return
2078  *   0 on success, a negative errno value otherwise and rte_errno is set.
2079  */
2080 static int
2081 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2082                           const struct rte_flow_item *item,
2083                           const struct rte_flow_attr *attr __rte_unused,
2084                           struct rte_flow_error *error)
2085 {
2086         const struct rte_flow_item_tag *spec = item->spec;
2087         const struct rte_flow_item_tag *mask = item->mask;
2088         const struct rte_flow_item_tag nic_mask = {
2089                 .data = RTE_BE32(UINT32_MAX),
2090                 .index = 0xff,
2091         };
2092         int ret;
2093
2094         if (!mlx5_flow_ext_mreg_supported(dev))
2095                 return rte_flow_error_set(error, ENOTSUP,
2096                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2097                                           "extensive metadata register"
2098                                           " isn't supported");
2099         if (!spec)
2100                 return rte_flow_error_set(error, EINVAL,
2101                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2102                                           item->spec,
2103                                           "data cannot be empty");
2104         if (!mask)
2105                 mask = &rte_flow_item_tag_mask;
2106         if (!mask->data)
2107                 return rte_flow_error_set(error, EINVAL,
2108                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2109                                         "mask cannot be zero");
2110
2111         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2112                                         (const uint8_t *)&nic_mask,
2113                                         sizeof(struct rte_flow_item_tag),
2114                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2115         if (ret < 0)
2116                 return ret;
2117         if (mask->index != 0xff)
2118                 return rte_flow_error_set(error, EINVAL,
2119                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2120                                           "partial mask for tag index"
2121                                           " is not supported");
2122         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2123         if (ret < 0)
2124                 return ret;
2125         MLX5_ASSERT(ret != REG_NON);
2126         return 0;
2127 }
2128
2129 /**
2130  * Validate vport item.
2131  *
2132  * @param[in] dev
2133  *   Pointer to the rte_eth_dev structure.
2134  * @param[in] item
2135  *   Item specification.
2136  * @param[in] attr
2137  *   Attributes of flow that includes this item.
2138  * @param[in] item_flags
2139  *   Bit-fields that holds the items detected until now.
2140  * @param[out] error
2141  *   Pointer to error structure.
2142  *
2143  * @return
2144  *   0 on success, a negative errno value otherwise and rte_errno is set.
2145  */
2146 static int
2147 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2148                               const struct rte_flow_item *item,
2149                               const struct rte_flow_attr *attr,
2150                               uint64_t item_flags,
2151                               struct rte_flow_error *error)
2152 {
2153         const struct rte_flow_item_port_id *spec = item->spec;
2154         const struct rte_flow_item_port_id *mask = item->mask;
2155         const struct rte_flow_item_port_id switch_mask = {
2156                         .id = 0xffffffff,
2157         };
2158         struct mlx5_priv *esw_priv;
2159         struct mlx5_priv *dev_priv;
2160         int ret;
2161
2162         if (!attr->transfer)
2163                 return rte_flow_error_set(error, EINVAL,
2164                                           RTE_FLOW_ERROR_TYPE_ITEM,
2165                                           NULL,
2166                                           "match on port id is valid only"
2167                                           " when transfer flag is enabled");
2168         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2169                 return rte_flow_error_set(error, ENOTSUP,
2170                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2171                                           "multiple source ports are not"
2172                                           " supported");
2173         if (!mask)
2174                 mask = &switch_mask;
2175         if (mask->id != 0xffffffff)
2176                 return rte_flow_error_set(error, ENOTSUP,
2177                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2178                                            mask,
2179                                            "no support for partial mask on"
2180                                            " \"id\" field");
2181         ret = mlx5_flow_item_acceptable
2182                                 (item, (const uint8_t *)mask,
2183                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2184                                  sizeof(struct rte_flow_item_port_id),
2185                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2186         if (ret)
2187                 return ret;
2188         if (!spec)
2189                 return 0;
2190         if (spec->id == MLX5_PORT_ESW_MGR)
2191                 return 0;
2192         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2193         if (!esw_priv)
2194                 return rte_flow_error_set(error, rte_errno,
2195                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2196                                           "failed to obtain E-Switch info for"
2197                                           " port");
2198         dev_priv = mlx5_dev_to_eswitch_info(dev);
2199         if (!dev_priv)
2200                 return rte_flow_error_set(error, rte_errno,
2201                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2202                                           NULL,
2203                                           "failed to obtain E-Switch info");
2204         if (esw_priv->domain_id != dev_priv->domain_id)
2205                 return rte_flow_error_set(error, EINVAL,
2206                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2207                                           "cannot match on a port from a"
2208                                           " different E-Switch");
2209         return 0;
2210 }
2211
2212 /**
2213  * Validate VLAN item.
2214  *
2215  * @param[in] item
2216  *   Item specification.
2217  * @param[in] item_flags
2218  *   Bit-fields that holds the items detected until now.
2219  * @param[in] dev
2220  *   Ethernet device flow is being created on.
2221  * @param[out] error
2222  *   Pointer to error structure.
2223  *
2224  * @return
2225  *   0 on success, a negative errno value otherwise and rte_errno is set.
2226  */
2227 static int
2228 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2229                            uint64_t item_flags,
2230                            struct rte_eth_dev *dev,
2231                            struct rte_flow_error *error)
2232 {
2233         const struct rte_flow_item_vlan *mask = item->mask;
2234         const struct rte_flow_item_vlan nic_mask = {
2235                 .tci = RTE_BE16(UINT16_MAX),
2236                 .inner_type = RTE_BE16(UINT16_MAX),
2237                 .has_more_vlan = 1,
2238         };
2239         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2240         int ret;
2241         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2242                                         MLX5_FLOW_LAYER_INNER_L4) :
2243                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2244                                         MLX5_FLOW_LAYER_OUTER_L4);
2245         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2246                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2247
2248         if (item_flags & vlanm)
2249                 return rte_flow_error_set(error, EINVAL,
2250                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2251                                           "multiple VLAN layers not supported");
2252         else if ((item_flags & l34m) != 0)
2253                 return rte_flow_error_set(error, EINVAL,
2254                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2255                                           "VLAN cannot follow L3/L4 layer");
2256         if (!mask)
2257                 mask = &rte_flow_item_vlan_mask;
2258         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2259                                         (const uint8_t *)&nic_mask,
2260                                         sizeof(struct rte_flow_item_vlan),
2261                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2262         if (ret)
2263                 return ret;
2264         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2265                 struct mlx5_priv *priv = dev->data->dev_private;
2266
2267                 if (priv->vmwa_context) {
2268                         /*
2269                          * Non-NULL context means we have a virtual machine
2270                          * and SR-IOV enabled, we have to create VLAN interface
2271                          * to make hypervisor to setup E-Switch vport
2272                          * context correctly. We avoid creating the multiple
2273                          * VLAN interfaces, so we cannot support VLAN tag mask.
2274                          */
2275                         return rte_flow_error_set(error, EINVAL,
2276                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2277                                                   item,
2278                                                   "VLAN tag mask is not"
2279                                                   " supported in virtual"
2280                                                   " environment");
2281                 }
2282         }
2283         return 0;
2284 }
2285
2286 /*
2287  * GTP flags are contained in 1 byte of the format:
2288  * -------------------------------------------
2289  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2290  * |-----------------------------------------|
2291  * | value | Version | PT | Res | E | S | PN |
2292  * -------------------------------------------
2293  *
2294  * Matching is supported only for GTP flags E, S, PN.
2295  */
2296 #define MLX5_GTP_FLAGS_MASK     0x07
2297
2298 /**
2299  * Validate GTP item.
2300  *
2301  * @param[in] dev
2302  *   Pointer to the rte_eth_dev structure.
2303  * @param[in] item
2304  *   Item specification.
2305  * @param[in] item_flags
2306  *   Bit-fields that holds the items detected until now.
2307  * @param[out] error
2308  *   Pointer to error structure.
2309  *
2310  * @return
2311  *   0 on success, a negative errno value otherwise and rte_errno is set.
2312  */
2313 static int
2314 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2315                           const struct rte_flow_item *item,
2316                           uint64_t item_flags,
2317                           struct rte_flow_error *error)
2318 {
2319         struct mlx5_priv *priv = dev->data->dev_private;
2320         const struct rte_flow_item_gtp *spec = item->spec;
2321         const struct rte_flow_item_gtp *mask = item->mask;
2322         const struct rte_flow_item_gtp nic_mask = {
2323                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2324                 .msg_type = 0xff,
2325                 .teid = RTE_BE32(0xffffffff),
2326         };
2327
2328         if (!priv->sh->cdev->config.hca_attr.tunnel_stateless_gtp)
2329                 return rte_flow_error_set(error, ENOTSUP,
2330                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2331                                           "GTP support is not enabled");
2332         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2333                 return rte_flow_error_set(error, ENOTSUP,
2334                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2335                                           "multiple tunnel layers not"
2336                                           " supported");
2337         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2338                 return rte_flow_error_set(error, EINVAL,
2339                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2340                                           "no outer UDP layer found");
2341         if (!mask)
2342                 mask = &rte_flow_item_gtp_mask;
2343         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2344                 return rte_flow_error_set(error, ENOTSUP,
2345                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2346                                           "Match is supported for GTP"
2347                                           " flags only");
2348         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2349                                          (const uint8_t *)&nic_mask,
2350                                          sizeof(struct rte_flow_item_gtp),
2351                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2352 }
2353
2354 /**
2355  * Validate GTP PSC item.
2356  *
2357  * @param[in] item
2358  *   Item specification.
2359  * @param[in] last_item
2360  *   Previous validated item in the pattern items.
2361  * @param[in] gtp_item
2362  *   Previous GTP item specification.
2363  * @param[in] attr
2364  *   Pointer to flow attributes.
2365  * @param[out] error
2366  *   Pointer to error structure.
2367  *
2368  * @return
2369  *   0 on success, a negative errno value otherwise and rte_errno is set.
2370  */
2371 static int
2372 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2373                               uint64_t last_item,
2374                               const struct rte_flow_item *gtp_item,
2375                               const struct rte_flow_attr *attr,
2376                               struct rte_flow_error *error)
2377 {
2378         const struct rte_flow_item_gtp *gtp_spec;
2379         const struct rte_flow_item_gtp *gtp_mask;
2380         const struct rte_flow_item_gtp_psc *mask;
2381         const struct rte_flow_item_gtp_psc nic_mask = {
2382                 .hdr.type = 0xF,
2383                 .hdr.qfi = 0x3F,
2384         };
2385
2386         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2387                 return rte_flow_error_set
2388                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2389                          "GTP PSC item must be preceded with GTP item");
2390         gtp_spec = gtp_item->spec;
2391         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2392         /* GTP spec and E flag is requested to match zero. */
2393         if (gtp_spec &&
2394                 (gtp_mask->v_pt_rsv_flags &
2395                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2396                 return rte_flow_error_set
2397                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2398                          "GTP E flag must be 1 to match GTP PSC");
2399         /* Check the flow is not created in group zero. */
2400         if (!attr->transfer && !attr->group)
2401                 return rte_flow_error_set
2402                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2403                          "GTP PSC is not supported for group 0");
2404         /* GTP spec is here and E flag is requested to match zero. */
2405         if (!item->spec)
2406                 return 0;
2407         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2408         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2409                                          (const uint8_t *)&nic_mask,
2410                                          sizeof(struct rte_flow_item_gtp_psc),
2411                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2412 }
2413
2414 /**
2415  * Validate IPV4 item.
2416  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2417  * add specific validation of fragment_offset field,
2418  *
2419  * @param[in] item
2420  *   Item specification.
2421  * @param[in] item_flags
2422  *   Bit-fields that holds the items detected until now.
2423  * @param[out] error
2424  *   Pointer to error structure.
2425  *
2426  * @return
2427  *   0 on success, a negative errno value otherwise and rte_errno is set.
2428  */
2429 static int
2430 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2431                            const struct rte_flow_item *item,
2432                            uint64_t item_flags, uint64_t last_item,
2433                            uint16_t ether_type, struct rte_flow_error *error)
2434 {
2435         int ret;
2436         struct mlx5_priv *priv = dev->data->dev_private;
2437         struct mlx5_hca_attr *attr = &priv->sh->cdev->config.hca_attr;
2438         const struct rte_flow_item_ipv4 *spec = item->spec;
2439         const struct rte_flow_item_ipv4 *last = item->last;
2440         const struct rte_flow_item_ipv4 *mask = item->mask;
2441         rte_be16_t fragment_offset_spec = 0;
2442         rte_be16_t fragment_offset_last = 0;
2443         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2444                 .hdr = {
2445                         .src_addr = RTE_BE32(0xffffffff),
2446                         .dst_addr = RTE_BE32(0xffffffff),
2447                         .type_of_service = 0xff,
2448                         .fragment_offset = RTE_BE16(0xffff),
2449                         .next_proto_id = 0xff,
2450                         .time_to_live = 0xff,
2451                 },
2452         };
2453
2454         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2455                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2456                 bool ihl_cap = !tunnel ?
2457                                attr->outer_ipv4_ihl : attr->inner_ipv4_ihl;
2458                 if (!ihl_cap)
2459                         return rte_flow_error_set(error, ENOTSUP,
2460                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2461                                                   item,
2462                                                   "IPV4 ihl offload not supported");
2463                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2464         }
2465         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2466                                            ether_type, &nic_ipv4_mask,
2467                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2468         if (ret < 0)
2469                 return ret;
2470         if (spec && mask)
2471                 fragment_offset_spec = spec->hdr.fragment_offset &
2472                                        mask->hdr.fragment_offset;
2473         if (!fragment_offset_spec)
2474                 return 0;
2475         /*
2476          * spec and mask are valid, enforce using full mask to make sure the
2477          * complete value is used correctly.
2478          */
2479         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2480                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2481                 return rte_flow_error_set(error, EINVAL,
2482                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2483                                           item, "must use full mask for"
2484                                           " fragment_offset");
2485         /*
2486          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2487          * indicating this is 1st fragment of fragmented packet.
2488          * This is not yet supported in MLX5, return appropriate error message.
2489          */
2490         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2491                 return rte_flow_error_set(error, ENOTSUP,
2492                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2493                                           "match on first fragment not "
2494                                           "supported");
2495         if (fragment_offset_spec && !last)
2496                 return rte_flow_error_set(error, ENOTSUP,
2497                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2498                                           "specified value not supported");
2499         /* spec and last are valid, validate the specified range. */
2500         fragment_offset_last = last->hdr.fragment_offset &
2501                                mask->hdr.fragment_offset;
2502         /*
2503          * Match on fragment_offset spec 0x2001 and last 0x3fff
2504          * means MF is 1 and frag-offset is > 0.
2505          * This packet is fragment 2nd and onward, excluding last.
2506          * This is not yet supported in MLX5, return appropriate
2507          * error message.
2508          */
2509         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2510             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2511                 return rte_flow_error_set(error, ENOTSUP,
2512                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2513                                           last, "match on following "
2514                                           "fragments not supported");
2515         /*
2516          * Match on fragment_offset spec 0x0001 and last 0x1fff
2517          * means MF is 0 and frag-offset is > 0.
2518          * This packet is last fragment of fragmented packet.
2519          * This is not yet supported in MLX5, return appropriate
2520          * error message.
2521          */
2522         if (fragment_offset_spec == RTE_BE16(1) &&
2523             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2524                 return rte_flow_error_set(error, ENOTSUP,
2525                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2526                                           last, "match on last "
2527                                           "fragment not supported");
2528         /*
2529          * Match on fragment_offset spec 0x0001 and last 0x3fff
2530          * means MF and/or frag-offset is not 0.
2531          * This is a fragmented packet.
2532          * Other range values are invalid and rejected.
2533          */
2534         if (!(fragment_offset_spec == RTE_BE16(1) &&
2535               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2536                 return rte_flow_error_set(error, ENOTSUP,
2537                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2538                                           "specified range not supported");
2539         return 0;
2540 }
2541
2542 /**
2543  * Validate IPV6 fragment extension item.
2544  *
2545  * @param[in] item
2546  *   Item specification.
2547  * @param[in] item_flags
2548  *   Bit-fields that holds the items detected until now.
2549  * @param[out] error
2550  *   Pointer to error structure.
2551  *
2552  * @return
2553  *   0 on success, a negative errno value otherwise and rte_errno is set.
2554  */
2555 static int
2556 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2557                                     uint64_t item_flags,
2558                                     struct rte_flow_error *error)
2559 {
2560         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2561         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2562         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2563         rte_be16_t frag_data_spec = 0;
2564         rte_be16_t frag_data_last = 0;
2565         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2566         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2567                                       MLX5_FLOW_LAYER_OUTER_L4;
2568         int ret = 0;
2569         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2570                 .hdr = {
2571                         .next_header = 0xff,
2572                         .frag_data = RTE_BE16(0xffff),
2573                 },
2574         };
2575
2576         if (item_flags & l4m)
2577                 return rte_flow_error_set(error, EINVAL,
2578                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2579                                           "ipv6 fragment extension item cannot "
2580                                           "follow L4 item.");
2581         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2582             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2585                                           "ipv6 fragment extension item must "
2586                                           "follow ipv6 item");
2587         if (spec && mask)
2588                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2589         if (!frag_data_spec)
2590                 return 0;
2591         /*
2592          * spec and mask are valid, enforce using full mask to make sure the
2593          * complete value is used correctly.
2594          */
2595         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2596                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2597                 return rte_flow_error_set(error, EINVAL,
2598                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2599                                           item, "must use full mask for"
2600                                           " frag_data");
2601         /*
2602          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2603          * This is 1st fragment of fragmented packet.
2604          */
2605         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2606                 return rte_flow_error_set(error, ENOTSUP,
2607                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2608                                           "match on first fragment not "
2609                                           "supported");
2610         if (frag_data_spec && !last)
2611                 return rte_flow_error_set(error, EINVAL,
2612                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2613                                           "specified value not supported");
2614         ret = mlx5_flow_item_acceptable
2615                                 (item, (const uint8_t *)mask,
2616                                  (const uint8_t *)&nic_mask,
2617                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2618                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2619         if (ret)
2620                 return ret;
2621         /* spec and last are valid, validate the specified range. */
2622         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2623         /*
2624          * Match on frag_data spec 0x0009 and last 0xfff9
2625          * means M is 1 and frag-offset is > 0.
2626          * This packet is fragment 2nd and onward, excluding last.
2627          * This is not yet supported in MLX5, return appropriate
2628          * error message.
2629          */
2630         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2631                                        RTE_IPV6_EHDR_MF_MASK) &&
2632             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2633                 return rte_flow_error_set(error, ENOTSUP,
2634                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2635                                           last, "match on following "
2636                                           "fragments not supported");
2637         /*
2638          * Match on frag_data spec 0x0008 and last 0xfff8
2639          * means M is 0 and frag-offset is > 0.
2640          * This packet is last fragment of fragmented packet.
2641          * This is not yet supported in MLX5, return appropriate
2642          * error message.
2643          */
2644         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2645             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2646                 return rte_flow_error_set(error, ENOTSUP,
2647                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2648                                           last, "match on last "
2649                                           "fragment not supported");
2650         /* Other range values are invalid and rejected. */
2651         return rte_flow_error_set(error, EINVAL,
2652                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2653                                   "specified range not supported");
2654 }
2655
2656 /*
2657  * Validate ASO CT item.
2658  *
2659  * @param[in] dev
2660  *   Pointer to the rte_eth_dev structure.
2661  * @param[in] item
2662  *   Item specification.
2663  * @param[in] item_flags
2664  *   Pointer to bit-fields that holds the items detected until now.
2665  * @param[out] error
2666  *   Pointer to error structure.
2667  *
2668  * @return
2669  *   0 on success, a negative errno value otherwise and rte_errno is set.
2670  */
2671 static int
2672 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2673                              const struct rte_flow_item *item,
2674                              uint64_t *item_flags,
2675                              struct rte_flow_error *error)
2676 {
2677         const struct rte_flow_item_conntrack *spec = item->spec;
2678         const struct rte_flow_item_conntrack *mask = item->mask;
2679         RTE_SET_USED(dev);
2680         uint32_t flags;
2681
2682         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2683                 return rte_flow_error_set(error, EINVAL,
2684                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2685                                           "Only one CT is supported");
2686         if (!mask)
2687                 mask = &rte_flow_item_conntrack_mask;
2688         flags = spec->flags & mask->flags;
2689         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2690             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2691              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2692              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2693                 return rte_flow_error_set(error, EINVAL,
2694                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2695                                           "Conflict status bits");
2696         /* State change also needs to be considered. */
2697         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2698         return 0;
2699 }
2700
2701 /**
2702  * Validate the pop VLAN action.
2703  *
2704  * @param[in] dev
2705  *   Pointer to the rte_eth_dev structure.
2706  * @param[in] action_flags
2707  *   Holds the actions detected until now.
2708  * @param[in] action
2709  *   Pointer to the pop vlan action.
2710  * @param[in] item_flags
2711  *   The items found in this flow rule.
2712  * @param[in] attr
2713  *   Pointer to flow attributes.
2714  * @param[out] error
2715  *   Pointer to error structure.
2716  *
2717  * @return
2718  *   0 on success, a negative errno value otherwise and rte_errno is set.
2719  */
2720 static int
2721 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2722                                  uint64_t action_flags,
2723                                  const struct rte_flow_action *action,
2724                                  uint64_t item_flags,
2725                                  const struct rte_flow_attr *attr,
2726                                  struct rte_flow_error *error)
2727 {
2728         const struct mlx5_priv *priv = dev->data->dev_private;
2729         struct mlx5_dev_ctx_shared *sh = priv->sh;
2730         bool direction_error = false;
2731
2732         if (!priv->sh->pop_vlan_action)
2733                 return rte_flow_error_set(error, ENOTSUP,
2734                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2735                                           NULL,
2736                                           "pop vlan action is not supported");
2737         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2738         if (attr->transfer) {
2739                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2740                 bool is_cx5 = sh->steering_format_version ==
2741                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2742
2743                 if (fdb_tx && is_cx5)
2744                         direction_error = true;
2745         } else if (attr->egress) {
2746                 direction_error = true;
2747         }
2748         if (direction_error)
2749                 return rte_flow_error_set(error, ENOTSUP,
2750                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2751                                           NULL,
2752                                           "pop vlan action not supported for egress");
2753         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2754                 return rte_flow_error_set(error, ENOTSUP,
2755                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2756                                           "no support for multiple VLAN "
2757                                           "actions");
2758         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2759         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2760             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2761                 return rte_flow_error_set(error, ENOTSUP,
2762                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2763                                           NULL,
2764                                           "cannot pop vlan after decap without "
2765                                           "match on inner vlan in the flow");
2766         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2767         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2768             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2769                 return rte_flow_error_set(error, ENOTSUP,
2770                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2771                                           NULL,
2772                                           "cannot pop vlan without a "
2773                                           "match on (outer) vlan in the flow");
2774         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2775                 return rte_flow_error_set(error, EINVAL,
2776                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2777                                           "wrong action order, port_id should "
2778                                           "be after pop VLAN action");
2779         if (!attr->transfer && priv->representor)
2780                 return rte_flow_error_set(error, ENOTSUP,
2781                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2782                                           "pop vlan action for VF representor "
2783                                           "not supported on NIC table");
2784         return 0;
2785 }
2786
2787 /**
2788  * Get VLAN default info from vlan match info.
2789  *
2790  * @param[in] items
2791  *   the list of item specifications.
2792  * @param[out] vlan
2793  *   pointer VLAN info to fill to.
2794  *
2795  * @return
2796  *   0 on success, a negative errno value otherwise and rte_errno is set.
2797  */
2798 static void
2799 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2800                                   struct rte_vlan_hdr *vlan)
2801 {
2802         const struct rte_flow_item_vlan nic_mask = {
2803                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2804                                 MLX5DV_FLOW_VLAN_VID_MASK),
2805                 .inner_type = RTE_BE16(0xffff),
2806         };
2807
2808         if (items == NULL)
2809                 return;
2810         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2811                 int type = items->type;
2812
2813                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2814                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2815                         break;
2816         }
2817         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2818                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2819                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2820
2821                 /* If VLAN item in pattern doesn't contain data, return here. */
2822                 if (!vlan_v)
2823                         return;
2824                 if (!vlan_m)
2825                         vlan_m = &nic_mask;
2826                 /* Only full match values are accepted */
2827                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2828                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2829                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2830                         vlan->vlan_tci |=
2831                                 rte_be_to_cpu_16(vlan_v->tci &
2832                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2833                 }
2834                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2835                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2836                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2837                         vlan->vlan_tci |=
2838                                 rte_be_to_cpu_16(vlan_v->tci &
2839                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2840                 }
2841                 if (vlan_m->inner_type == nic_mask.inner_type)
2842                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2843                                                            vlan_m->inner_type);
2844         }
2845 }
2846
2847 /**
2848  * Validate the push VLAN action.
2849  *
2850  * @param[in] dev
2851  *   Pointer to the rte_eth_dev structure.
2852  * @param[in] action_flags
2853  *   Holds the actions detected until now.
2854  * @param[in] item_flags
2855  *   The items found in this flow rule.
2856  * @param[in] action
2857  *   Pointer to the action structure.
2858  * @param[in] attr
2859  *   Pointer to flow attributes
2860  * @param[out] error
2861  *   Pointer to error structure.
2862  *
2863  * @return
2864  *   0 on success, a negative errno value otherwise and rte_errno is set.
2865  */
2866 static int
2867 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2868                                   uint64_t action_flags,
2869                                   const struct rte_flow_item_vlan *vlan_m,
2870                                   const struct rte_flow_action *action,
2871                                   const struct rte_flow_attr *attr,
2872                                   struct rte_flow_error *error)
2873 {
2874         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2875         const struct mlx5_priv *priv = dev->data->dev_private;
2876         struct mlx5_dev_ctx_shared *sh = priv->sh;
2877         bool direction_error = false;
2878
2879         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2880             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2881                 return rte_flow_error_set(error, EINVAL,
2882                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2883                                           "invalid vlan ethertype");
2884         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2885                 return rte_flow_error_set(error, EINVAL,
2886                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2887                                           "wrong action order, port_id should "
2888                                           "be after push VLAN");
2889         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2890         if (attr->transfer) {
2891                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2892                 bool is_cx5 = sh->steering_format_version ==
2893                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2894
2895                 if (!fdb_tx && is_cx5)
2896                         direction_error = true;
2897         } else if (attr->ingress) {
2898                 direction_error = true;
2899         }
2900         if (direction_error)
2901                 return rte_flow_error_set(error, ENOTSUP,
2902                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2903                                           NULL,
2904                                           "push vlan action not supported for ingress");
2905         if (!attr->transfer && priv->representor)
2906                 return rte_flow_error_set(error, ENOTSUP,
2907                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2908                                           "push vlan action for VF representor "
2909                                           "not supported on NIC table");
2910         if (vlan_m &&
2911             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2912             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2913                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2914             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2915             !(mlx5_flow_find_action
2916                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2917                 return rte_flow_error_set(error, EINVAL,
2918                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2919                                           "not full match mask on VLAN PCP and "
2920                                           "there is no of_set_vlan_pcp action, "
2921                                           "push VLAN action cannot figure out "
2922                                           "PCP value");
2923         if (vlan_m &&
2924             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2925             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2926                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2927             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2928             !(mlx5_flow_find_action
2929                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2930                 return rte_flow_error_set(error, EINVAL,
2931                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2932                                           "not full match mask on VLAN VID and "
2933                                           "there is no of_set_vlan_vid action, "
2934                                           "push VLAN action cannot figure out "
2935                                           "VID value");
2936         (void)attr;
2937         return 0;
2938 }
2939
2940 /**
2941  * Validate the set VLAN PCP.
2942  *
2943  * @param[in] action_flags
2944  *   Holds the actions detected until now.
2945  * @param[in] actions
2946  *   Pointer to the list of actions remaining in the flow rule.
2947  * @param[out] error
2948  *   Pointer to error structure.
2949  *
2950  * @return
2951  *   0 on success, a negative errno value otherwise and rte_errno is set.
2952  */
2953 static int
2954 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2955                                      const struct rte_flow_action actions[],
2956                                      struct rte_flow_error *error)
2957 {
2958         const struct rte_flow_action *action = actions;
2959         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2960
2961         if (conf->vlan_pcp > 7)
2962                 return rte_flow_error_set(error, EINVAL,
2963                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2964                                           "VLAN PCP value is too big");
2965         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2966                 return rte_flow_error_set(error, ENOTSUP,
2967                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2968                                           "set VLAN PCP action must follow "
2969                                           "the push VLAN action");
2970         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2971                 return rte_flow_error_set(error, ENOTSUP,
2972                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2973                                           "Multiple VLAN PCP modification are "
2974                                           "not supported");
2975         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2976                 return rte_flow_error_set(error, EINVAL,
2977                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2978                                           "wrong action order, port_id should "
2979                                           "be after set VLAN PCP");
2980         return 0;
2981 }
2982
2983 /**
2984  * Validate the set VLAN VID.
2985  *
2986  * @param[in] item_flags
2987  *   Holds the items detected in this rule.
2988  * @param[in] action_flags
2989  *   Holds the actions detected until now.
2990  * @param[in] actions
2991  *   Pointer to the list of actions remaining in the flow rule.
2992  * @param[out] error
2993  *   Pointer to error structure.
2994  *
2995  * @return
2996  *   0 on success, a negative errno value otherwise and rte_errno is set.
2997  */
2998 static int
2999 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3000                                      uint64_t action_flags,
3001                                      const struct rte_flow_action actions[],
3002                                      struct rte_flow_error *error)
3003 {
3004         const struct rte_flow_action *action = actions;
3005         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3006
3007         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3008                 return rte_flow_error_set(error, EINVAL,
3009                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3010                                           "VLAN VID value is too big");
3011         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3012             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3013                 return rte_flow_error_set(error, ENOTSUP,
3014                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3015                                           "set VLAN VID action must follow push"
3016                                           " VLAN action or match on VLAN item");
3017         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3018                 return rte_flow_error_set(error, ENOTSUP,
3019                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3020                                           "Multiple VLAN VID modifications are "
3021                                           "not supported");
3022         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3023                 return rte_flow_error_set(error, EINVAL,
3024                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3025                                           "wrong action order, port_id should "
3026                                           "be after set VLAN VID");
3027         return 0;
3028 }
3029
3030 /*
3031  * Validate the FLAG action.
3032  *
3033  * @param[in] dev
3034  *   Pointer to the rte_eth_dev structure.
3035  * @param[in] action_flags
3036  *   Holds the actions detected until now.
3037  * @param[in] attr
3038  *   Pointer to flow attributes
3039  * @param[out] error
3040  *   Pointer to error structure.
3041  *
3042  * @return
3043  *   0 on success, a negative errno value otherwise and rte_errno is set.
3044  */
3045 static int
3046 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3047                              uint64_t action_flags,
3048                              const struct rte_flow_attr *attr,
3049                              struct rte_flow_error *error)
3050 {
3051         struct mlx5_priv *priv = dev->data->dev_private;
3052         struct mlx5_sh_config *config = &priv->sh->config;
3053         int ret;
3054
3055         /* Fall back if no extended metadata register support. */
3056         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3057                 return mlx5_flow_validate_action_flag(action_flags, attr,
3058                                                       error);
3059         /* Extensive metadata mode requires registers. */
3060         if (!mlx5_flow_ext_mreg_supported(dev))
3061                 return rte_flow_error_set(error, ENOTSUP,
3062                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3063                                           "no metadata registers "
3064                                           "to support flag action");
3065         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3066                 return rte_flow_error_set(error, ENOTSUP,
3067                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3068                                           "extended metadata register"
3069                                           " isn't available");
3070         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3071         if (ret < 0)
3072                 return ret;
3073         MLX5_ASSERT(ret > 0);
3074         if (action_flags & MLX5_FLOW_ACTION_MARK)
3075                 return rte_flow_error_set(error, EINVAL,
3076                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3077                                           "can't mark and flag in same flow");
3078         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3079                 return rte_flow_error_set(error, EINVAL,
3080                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3081                                           "can't have 2 flag"
3082                                           " actions in same flow");
3083         return 0;
3084 }
3085
3086 /**
3087  * Validate MARK action.
3088  *
3089  * @param[in] dev
3090  *   Pointer to the rte_eth_dev structure.
3091  * @param[in] action
3092  *   Pointer to action.
3093  * @param[in] action_flags
3094  *   Holds the actions detected until now.
3095  * @param[in] attr
3096  *   Pointer to flow attributes
3097  * @param[out] error
3098  *   Pointer to error structure.
3099  *
3100  * @return
3101  *   0 on success, a negative errno value otherwise and rte_errno is set.
3102  */
3103 static int
3104 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3105                              const struct rte_flow_action *action,
3106                              uint64_t action_flags,
3107                              const struct rte_flow_attr *attr,
3108                              struct rte_flow_error *error)
3109 {
3110         struct mlx5_priv *priv = dev->data->dev_private;
3111         struct mlx5_sh_config *config = &priv->sh->config;
3112         const struct rte_flow_action_mark *mark = action->conf;
3113         int ret;
3114
3115         if (is_tunnel_offload_active(dev))
3116                 return rte_flow_error_set(error, ENOTSUP,
3117                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3118                                           "no mark action "
3119                                           "if tunnel offload active");
3120         /* Fall back if no extended metadata register support. */
3121         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3122                 return mlx5_flow_validate_action_mark(action, action_flags,
3123                                                       attr, error);
3124         /* Extensive metadata mode requires registers. */
3125         if (!mlx5_flow_ext_mreg_supported(dev))
3126                 return rte_flow_error_set(error, ENOTSUP,
3127                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3128                                           "no metadata registers "
3129                                           "to support mark action");
3130         if (!priv->sh->dv_mark_mask)
3131                 return rte_flow_error_set(error, ENOTSUP,
3132                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3133                                           "extended metadata register"
3134                                           " isn't available");
3135         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3136         if (ret < 0)
3137                 return ret;
3138         MLX5_ASSERT(ret > 0);
3139         if (!mark)
3140                 return rte_flow_error_set(error, EINVAL,
3141                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3142                                           "configuration cannot be null");
3143         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3144                 return rte_flow_error_set(error, EINVAL,
3145                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3146                                           &mark->id,
3147                                           "mark id exceeds the limit");
3148         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3149                 return rte_flow_error_set(error, EINVAL,
3150                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3151                                           "can't flag and mark in same flow");
3152         if (action_flags & MLX5_FLOW_ACTION_MARK)
3153                 return rte_flow_error_set(error, EINVAL,
3154                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3155                                           "can't have 2 mark actions in same"
3156                                           " flow");
3157         return 0;
3158 }
3159
3160 /**
3161  * Validate SET_META action.
3162  *
3163  * @param[in] dev
3164  *   Pointer to the rte_eth_dev structure.
3165  * @param[in] action
3166  *   Pointer to the action structure.
3167  * @param[in] action_flags
3168  *   Holds the actions detected until now.
3169  * @param[in] attr
3170  *   Pointer to flow attributes
3171  * @param[out] error
3172  *   Pointer to error structure.
3173  *
3174  * @return
3175  *   0 on success, a negative errno value otherwise and rte_errno is set.
3176  */
3177 static int
3178 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3179                                  const struct rte_flow_action *action,
3180                                  uint64_t action_flags __rte_unused,
3181                                  const struct rte_flow_attr *attr,
3182                                  struct rte_flow_error *error)
3183 {
3184         struct mlx5_priv *priv = dev->data->dev_private;
3185         struct mlx5_sh_config *config = &priv->sh->config;
3186         const struct rte_flow_action_set_meta *conf;
3187         uint32_t nic_mask = UINT32_MAX;
3188         int reg;
3189
3190         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3191             !mlx5_flow_ext_mreg_supported(dev))
3192                 return rte_flow_error_set(error, ENOTSUP,
3193                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3194                                           "extended metadata register"
3195                                           " isn't supported");
3196         reg = flow_dv_get_metadata_reg(dev, attr, error);
3197         if (reg < 0)
3198                 return reg;
3199         if (reg == REG_NON)
3200                 return rte_flow_error_set(error, ENOTSUP,
3201                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3202                                           "unavailable extended metadata register");
3203         if (reg != REG_A && reg != REG_B) {
3204                 struct mlx5_priv *priv = dev->data->dev_private;
3205
3206                 nic_mask = priv->sh->dv_meta_mask;
3207         }
3208         if (!(action->conf))
3209                 return rte_flow_error_set(error, EINVAL,
3210                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3211                                           "configuration cannot be null");
3212         conf = (const struct rte_flow_action_set_meta *)action->conf;
3213         if (!conf->mask)
3214                 return rte_flow_error_set(error, EINVAL,
3215                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3216                                           "zero mask doesn't have any effect");
3217         if (conf->mask & ~nic_mask)
3218                 return rte_flow_error_set(error, EINVAL,
3219                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3220                                           "meta data must be within reg C0");
3221         return 0;
3222 }
3223
3224 /**
3225  * Validate SET_TAG action.
3226  *
3227  * @param[in] dev
3228  *   Pointer to the rte_eth_dev structure.
3229  * @param[in] action
3230  *   Pointer to the action structure.
3231  * @param[in] action_flags
3232  *   Holds the actions detected until now.
3233  * @param[in] attr
3234  *   Pointer to flow attributes
3235  * @param[out] error
3236  *   Pointer to error structure.
3237  *
3238  * @return
3239  *   0 on success, a negative errno value otherwise and rte_errno is set.
3240  */
3241 static int
3242 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3243                                 const struct rte_flow_action *action,
3244                                 uint64_t action_flags,
3245                                 const struct rte_flow_attr *attr,
3246                                 struct rte_flow_error *error)
3247 {
3248         const struct rte_flow_action_set_tag *conf;
3249         const uint64_t terminal_action_flags =
3250                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3251                 MLX5_FLOW_ACTION_RSS;
3252         int ret;
3253
3254         if (!mlx5_flow_ext_mreg_supported(dev))
3255                 return rte_flow_error_set(error, ENOTSUP,
3256                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3257                                           "extensive metadata register"
3258                                           " isn't supported");
3259         if (!(action->conf))
3260                 return rte_flow_error_set(error, EINVAL,
3261                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3262                                           "configuration cannot be null");
3263         conf = (const struct rte_flow_action_set_tag *)action->conf;
3264         if (!conf->mask)
3265                 return rte_flow_error_set(error, EINVAL,
3266                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3267                                           "zero mask doesn't have any effect");
3268         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3269         if (ret < 0)
3270                 return ret;
3271         if (!attr->transfer && attr->ingress &&
3272             (action_flags & terminal_action_flags))
3273                 return rte_flow_error_set(error, EINVAL,
3274                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3275                                           "set_tag has no effect"
3276                                           " with terminal actions");
3277         return 0;
3278 }
3279
3280 /**
3281  * Validate count action.
3282  *
3283  * @param[in] dev
3284  *   Pointer to rte_eth_dev structure.
3285  * @param[in] shared
3286  *   Indicator if action is shared.
3287  * @param[in] action_flags
3288  *   Holds the actions detected until now.
3289  * @param[out] error
3290  *   Pointer to error structure.
3291  *
3292  * @return
3293  *   0 on success, a negative errno value otherwise and rte_errno is set.
3294  */
3295 static int
3296 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3297                               uint64_t action_flags,
3298                               struct rte_flow_error *error)
3299 {
3300         struct mlx5_priv *priv = dev->data->dev_private;
3301
3302         if (!priv->sh->cdev->config.devx)
3303                 goto notsup_err;
3304         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3305                 return rte_flow_error_set(error, EINVAL,
3306                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3307                                           "duplicate count actions set");
3308         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3309             !priv->sh->flow_hit_aso_en)
3310                 return rte_flow_error_set(error, EINVAL,
3311                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3312                                           "old age and shared count combination is not supported");
3313 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3314         return 0;
3315 #endif
3316 notsup_err:
3317         return rte_flow_error_set
3318                       (error, ENOTSUP,
3319                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3320                        NULL,
3321                        "count action not supported");
3322 }
3323
3324 /**
3325  * Validate the L2 encap action.
3326  *
3327  * @param[in] dev
3328  *   Pointer to the rte_eth_dev structure.
3329  * @param[in] action_flags
3330  *   Holds the actions detected until now.
3331  * @param[in] action
3332  *   Pointer to the action structure.
3333  * @param[in] attr
3334  *   Pointer to flow attributes.
3335  * @param[out] error
3336  *   Pointer to error structure.
3337  *
3338  * @return
3339  *   0 on success, a negative errno value otherwise and rte_errno is set.
3340  */
3341 static int
3342 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3343                                  uint64_t action_flags,
3344                                  const struct rte_flow_action *action,
3345                                  const struct rte_flow_attr *attr,
3346                                  struct rte_flow_error *error)
3347 {
3348         const struct mlx5_priv *priv = dev->data->dev_private;
3349
3350         if (!(action->conf))
3351                 return rte_flow_error_set(error, EINVAL,
3352                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3353                                           "configuration cannot be null");
3354         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3355                 return rte_flow_error_set(error, EINVAL,
3356                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3357                                           "can only have a single encap action "
3358                                           "in a flow");
3359         if (!attr->transfer && priv->representor)
3360                 return rte_flow_error_set(error, ENOTSUP,
3361                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3362                                           "encap action for VF representor "
3363                                           "not supported on NIC table");
3364         return 0;
3365 }
3366
3367 /**
3368  * Validate a decap action.
3369  *
3370  * @param[in] dev
3371  *   Pointer to the rte_eth_dev structure.
3372  * @param[in] action_flags
3373  *   Holds the actions detected until now.
3374  * @param[in] action
3375  *   Pointer to the action structure.
3376  * @param[in] item_flags
3377  *   Holds the items detected.
3378  * @param[in] attr
3379  *   Pointer to flow attributes
3380  * @param[out] error
3381  *   Pointer to error structure.
3382  *
3383  * @return
3384  *   0 on success, a negative errno value otherwise and rte_errno is set.
3385  */
3386 static int
3387 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3388                               uint64_t action_flags,
3389                               const struct rte_flow_action *action,
3390                               const uint64_t item_flags,
3391                               const struct rte_flow_attr *attr,
3392                               struct rte_flow_error *error)
3393 {
3394         const struct mlx5_priv *priv = dev->data->dev_private;
3395
3396         if (priv->sh->cdev->config.hca_attr.scatter_fcs_w_decap_disable &&
3397             !priv->sh->config.decap_en)
3398                 return rte_flow_error_set(error, ENOTSUP,
3399                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3400                                           "decap is not enabled");
3401         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3402                 return rte_flow_error_set(error, ENOTSUP,
3403                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3404                                           action_flags &
3405                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3406                                           "have a single decap action" : "decap "
3407                                           "after encap is not supported");
3408         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3409                 return rte_flow_error_set(error, EINVAL,
3410                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3411                                           "can't have decap action after"
3412                                           " modify action");
3413         if (attr->egress)
3414                 return rte_flow_error_set(error, ENOTSUP,
3415                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3416                                           NULL,
3417                                           "decap action not supported for "
3418                                           "egress");
3419         if (!attr->transfer && priv->representor)
3420                 return rte_flow_error_set(error, ENOTSUP,
3421                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3422                                           "decap action for VF representor "
3423                                           "not supported on NIC table");
3424         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3425             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3426                 return rte_flow_error_set(error, ENOTSUP,
3427                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3428                                 "VXLAN item should be present for VXLAN decap");
3429         return 0;
3430 }
3431
3432 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3433
3434 /**
3435  * Validate the raw encap and decap actions.
3436  *
3437  * @param[in] dev
3438  *   Pointer to the rte_eth_dev structure.
3439  * @param[in] decap
3440  *   Pointer to the decap action.
3441  * @param[in] encap
3442  *   Pointer to the encap action.
3443  * @param[in] attr
3444  *   Pointer to flow attributes
3445  * @param[in/out] action_flags
3446  *   Holds the actions detected until now.
3447  * @param[out] actions_n
3448  *   pointer to the number of actions counter.
3449  * @param[in] action
3450  *   Pointer to the action structure.
3451  * @param[in] item_flags
3452  *   Holds the items detected.
3453  * @param[out] error
3454  *   Pointer to error structure.
3455  *
3456  * @return
3457  *   0 on success, a negative errno value otherwise and rte_errno is set.
3458  */
3459 static int
3460 flow_dv_validate_action_raw_encap_decap
3461         (struct rte_eth_dev *dev,
3462          const struct rte_flow_action_raw_decap *decap,
3463          const struct rte_flow_action_raw_encap *encap,
3464          const struct rte_flow_attr *attr, uint64_t *action_flags,
3465          int *actions_n, const struct rte_flow_action *action,
3466          uint64_t item_flags, struct rte_flow_error *error)
3467 {
3468         const struct mlx5_priv *priv = dev->data->dev_private;
3469         int ret;
3470
3471         if (encap && (!encap->size || !encap->data))
3472                 return rte_flow_error_set(error, EINVAL,
3473                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3474                                           "raw encap data cannot be empty");
3475         if (decap && encap) {
3476                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3477                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3478                         /* L3 encap. */
3479                         decap = NULL;
3480                 else if (encap->size <=
3481                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3482                            decap->size >
3483                            MLX5_ENCAPSULATION_DECISION_SIZE)
3484                         /* L3 decap. */
3485                         encap = NULL;
3486                 else if (encap->size >
3487                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3488                            decap->size >
3489                            MLX5_ENCAPSULATION_DECISION_SIZE)
3490                         /* 2 L2 actions: encap and decap. */
3491                         ;
3492                 else
3493                         return rte_flow_error_set(error,
3494                                 ENOTSUP,
3495                                 RTE_FLOW_ERROR_TYPE_ACTION,
3496                                 NULL, "unsupported too small "
3497                                 "raw decap and too small raw "
3498                                 "encap combination");
3499         }
3500         if (decap) {
3501                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3502                                                     item_flags, attr, error);
3503                 if (ret < 0)
3504                         return ret;
3505                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3506                 ++(*actions_n);
3507         }
3508         if (encap) {
3509                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3510                         return rte_flow_error_set(error, ENOTSUP,
3511                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3512                                                   NULL,
3513                                                   "small raw encap size");
3514                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3515                         return rte_flow_error_set(error, EINVAL,
3516                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3517                                                   NULL,
3518                                                   "more than one encap action");
3519                 if (!attr->transfer && priv->representor)
3520                         return rte_flow_error_set
3521                                         (error, ENOTSUP,
3522                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3523                                          "encap action for VF representor "
3524                                          "not supported on NIC table");
3525                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3526                 ++(*actions_n);
3527         }
3528         return 0;
3529 }
3530
3531 /*
3532  * Validate the ASO CT action.
3533  *
3534  * @param[in] dev
3535  *   Pointer to the rte_eth_dev structure.
3536  * @param[in] action_flags
3537  *   Holds the actions detected until now.
3538  * @param[in] item_flags
3539  *   The items found in this flow rule.
3540  * @param[in] attr
3541  *   Pointer to flow attributes.
3542  * @param[out] error
3543  *   Pointer to error structure.
3544  *
3545  * @return
3546  *   0 on success, a negative errno value otherwise and rte_errno is set.
3547  */
3548 static int
3549 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3550                                uint64_t action_flags,
3551                                uint64_t item_flags,
3552                                const struct rte_flow_attr *attr,
3553                                struct rte_flow_error *error)
3554 {
3555         RTE_SET_USED(dev);
3556
3557         if (attr->group == 0 && !attr->transfer)
3558                 return rte_flow_error_set(error, ENOTSUP,
3559                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3560                                           NULL,
3561                                           "Only support non-root table");
3562         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3563                 return rte_flow_error_set(error, ENOTSUP,
3564                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3565                                           "CT cannot follow a fate action");
3566         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3567             (action_flags & MLX5_FLOW_ACTION_AGE))
3568                 return rte_flow_error_set(error, EINVAL,
3569                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3570                                           "Only one ASO action is supported");
3571         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3572                 return rte_flow_error_set(error, EINVAL,
3573                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3574                                           "Encap cannot exist before CT");
3575         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3576                 return rte_flow_error_set(error, EINVAL,
3577                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3578                                           "Not a outer TCP packet");
3579         return 0;
3580 }
3581
3582 int
3583 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3584                              struct mlx5_list_entry *entry, void *cb_ctx)
3585 {
3586         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3587         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3588         struct mlx5_flow_dv_encap_decap_resource *resource;
3589
3590         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3591                                 entry);
3592         if (resource->reformat_type == ctx_resource->reformat_type &&
3593             resource->ft_type == ctx_resource->ft_type &&
3594             resource->flags == ctx_resource->flags &&
3595             resource->size == ctx_resource->size &&
3596             !memcmp((const void *)resource->buf,
3597                     (const void *)ctx_resource->buf,
3598                     resource->size))
3599                 return 0;
3600         return -1;
3601 }
3602
3603 struct mlx5_list_entry *
3604 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3605 {
3606         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3607         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3608         struct mlx5dv_dr_domain *domain;
3609         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3610         struct mlx5_flow_dv_encap_decap_resource *resource;
3611         uint32_t idx;
3612         int ret;
3613
3614         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3615                 domain = sh->fdb_domain;
3616         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3617                 domain = sh->rx_domain;
3618         else
3619                 domain = sh->tx_domain;
3620         /* Register new encap/decap resource. */
3621         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3622         if (!resource) {
3623                 rte_flow_error_set(ctx->error, ENOMEM,
3624                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3625                                    "cannot allocate resource memory");
3626                 return NULL;
3627         }
3628         *resource = *ctx_resource;
3629         resource->idx = idx;
3630         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3631                                                               domain, resource,
3632                                                              &resource->action);
3633         if (ret) {
3634                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3635                 rte_flow_error_set(ctx->error, ENOMEM,
3636                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3637                                    NULL, "cannot create action");
3638                 return NULL;
3639         }
3640
3641         return &resource->entry;
3642 }
3643
3644 struct mlx5_list_entry *
3645 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3646                              void *cb_ctx)
3647 {
3648         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3649         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3650         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3651         uint32_t idx;
3652
3653         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3654                                            &idx);
3655         if (!cache_resource) {
3656                 rte_flow_error_set(ctx->error, ENOMEM,
3657                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3658                                    "cannot allocate resource memory");
3659                 return NULL;
3660         }
3661         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3662         cache_resource->idx = idx;
3663         return &cache_resource->entry;
3664 }
3665
3666 void
3667 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3668 {
3669         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3670         struct mlx5_flow_dv_encap_decap_resource *res =
3671                                        container_of(entry, typeof(*res), entry);
3672
3673         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3674 }
3675
3676 /**
3677  * Find existing encap/decap resource or create and register a new one.
3678  *
3679  * @param[in, out] dev
3680  *   Pointer to rte_eth_dev structure.
3681  * @param[in, out] resource
3682  *   Pointer to encap/decap resource.
3683  * @parm[in, out] dev_flow
3684  *   Pointer to the dev_flow.
3685  * @param[out] error
3686  *   pointer to error structure.
3687  *
3688  * @return
3689  *   0 on success otherwise -errno and errno is set.
3690  */
3691 static int
3692 flow_dv_encap_decap_resource_register
3693                         (struct rte_eth_dev *dev,
3694                          struct mlx5_flow_dv_encap_decap_resource *resource,
3695                          struct mlx5_flow *dev_flow,
3696                          struct rte_flow_error *error)
3697 {
3698         struct mlx5_priv *priv = dev->data->dev_private;
3699         struct mlx5_dev_ctx_shared *sh = priv->sh;
3700         struct mlx5_list_entry *entry;
3701         union {
3702                 struct {
3703                         uint32_t ft_type:8;
3704                         uint32_t refmt_type:8;
3705                         /*
3706                          * Header reformat actions can be shared between
3707                          * non-root tables. One bit to indicate non-root
3708                          * table or not.
3709                          */
3710                         uint32_t is_root:1;
3711                         uint32_t reserve:15;
3712                 };
3713                 uint32_t v32;
3714         } encap_decap_key = {
3715                 {
3716                         .ft_type = resource->ft_type,
3717                         .refmt_type = resource->reformat_type,
3718                         .is_root = !!dev_flow->dv.group,
3719                         .reserve = 0,
3720                 }
3721         };
3722         struct mlx5_flow_cb_ctx ctx = {
3723                 .error = error,
3724                 .data = resource,
3725         };
3726         struct mlx5_hlist *encaps_decaps;
3727         uint64_t key64;
3728
3729         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3730                                 "encaps_decaps",
3731                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3732                                 true, true, sh,
3733                                 flow_dv_encap_decap_create_cb,
3734                                 flow_dv_encap_decap_match_cb,
3735                                 flow_dv_encap_decap_remove_cb,
3736                                 flow_dv_encap_decap_clone_cb,
3737                                 flow_dv_encap_decap_clone_free_cb,
3738                                 error);
3739         if (unlikely(!encaps_decaps))
3740                 return -rte_errno;
3741         resource->flags = dev_flow->dv.group ? 0 : 1;
3742         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3743                                  sizeof(encap_decap_key.v32), 0);
3744         if (resource->reformat_type !=
3745             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3746             resource->size)
3747                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3748         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3749         if (!entry)
3750                 return -rte_errno;
3751         resource = container_of(entry, typeof(*resource), entry);
3752         dev_flow->dv.encap_decap = resource;
3753         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3754         return 0;
3755 }
3756
3757 /**
3758  * Find existing table jump resource or create and register a new one.
3759  *
3760  * @param[in, out] dev
3761  *   Pointer to rte_eth_dev structure.
3762  * @param[in, out] tbl
3763  *   Pointer to flow table resource.
3764  * @parm[in, out] dev_flow
3765  *   Pointer to the dev_flow.
3766  * @param[out] error
3767  *   pointer to error structure.
3768  *
3769  * @return
3770  *   0 on success otherwise -errno and errno is set.
3771  */
3772 static int
3773 flow_dv_jump_tbl_resource_register
3774                         (struct rte_eth_dev *dev __rte_unused,
3775                          struct mlx5_flow_tbl_resource *tbl,
3776                          struct mlx5_flow *dev_flow,
3777                          struct rte_flow_error *error __rte_unused)
3778 {
3779         struct mlx5_flow_tbl_data_entry *tbl_data =
3780                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3781
3782         MLX5_ASSERT(tbl);
3783         MLX5_ASSERT(tbl_data->jump.action);
3784         dev_flow->handle->rix_jump = tbl_data->idx;
3785         dev_flow->dv.jump = &tbl_data->jump;
3786         return 0;
3787 }
3788
3789 int
3790 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3791                          struct mlx5_list_entry *entry, void *cb_ctx)
3792 {
3793         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3794         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3795         struct mlx5_flow_dv_port_id_action_resource *res =
3796                                        container_of(entry, typeof(*res), entry);
3797
3798         return ref->port_id != res->port_id;
3799 }
3800
3801 struct mlx5_list_entry *
3802 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3803 {
3804         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3805         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3806         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3807         struct mlx5_flow_dv_port_id_action_resource *resource;
3808         uint32_t idx;
3809         int ret;
3810
3811         /* Register new port id action resource. */
3812         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3813         if (!resource) {
3814                 rte_flow_error_set(ctx->error, ENOMEM,
3815                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3816                                    "cannot allocate port_id action memory");
3817                 return NULL;
3818         }
3819         *resource = *ref;
3820         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3821                                                         ref->port_id,
3822                                                         &resource->action);
3823         if (ret) {
3824                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3825                 rte_flow_error_set(ctx->error, ENOMEM,
3826                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3827                                    "cannot create action");
3828                 return NULL;
3829         }
3830         resource->idx = idx;
3831         return &resource->entry;
3832 }
3833
3834 struct mlx5_list_entry *
3835 flow_dv_port_id_clone_cb(void *tool_ctx,
3836                          struct mlx5_list_entry *entry __rte_unused,
3837                          void *cb_ctx)
3838 {
3839         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3840         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3841         struct mlx5_flow_dv_port_id_action_resource *resource;
3842         uint32_t idx;
3843
3844         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3845         if (!resource) {
3846                 rte_flow_error_set(ctx->error, ENOMEM,
3847                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3848                                    "cannot allocate port_id action memory");
3849                 return NULL;
3850         }
3851         memcpy(resource, entry, sizeof(*resource));
3852         resource->idx = idx;
3853         return &resource->entry;
3854 }
3855
3856 void
3857 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3858 {
3859         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3860         struct mlx5_flow_dv_port_id_action_resource *resource =
3861                                   container_of(entry, typeof(*resource), entry);
3862
3863         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3864 }
3865
3866 /**
3867  * Find existing table port ID resource or create and register a new one.
3868  *
3869  * @param[in, out] dev
3870  *   Pointer to rte_eth_dev structure.
3871  * @param[in, out] ref
3872  *   Pointer to port ID action resource reference.
3873  * @parm[in, out] dev_flow
3874  *   Pointer to the dev_flow.
3875  * @param[out] error
3876  *   pointer to error structure.
3877  *
3878  * @return
3879  *   0 on success otherwise -errno and errno is set.
3880  */
3881 static int
3882 flow_dv_port_id_action_resource_register
3883                         (struct rte_eth_dev *dev,
3884                          struct mlx5_flow_dv_port_id_action_resource *ref,
3885                          struct mlx5_flow *dev_flow,
3886                          struct rte_flow_error *error)
3887 {
3888         struct mlx5_priv *priv = dev->data->dev_private;
3889         struct mlx5_list_entry *entry;
3890         struct mlx5_flow_dv_port_id_action_resource *resource;
3891         struct mlx5_flow_cb_ctx ctx = {
3892                 .error = error,
3893                 .data = ref,
3894         };
3895
3896         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3897         if (!entry)
3898                 return -rte_errno;
3899         resource = container_of(entry, typeof(*resource), entry);
3900         dev_flow->dv.port_id_action = resource;
3901         dev_flow->handle->rix_port_id_action = resource->idx;
3902         return 0;
3903 }
3904
3905 int
3906 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3907                            struct mlx5_list_entry *entry, void *cb_ctx)
3908 {
3909         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3910         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3911         struct mlx5_flow_dv_push_vlan_action_resource *res =
3912                                        container_of(entry, typeof(*res), entry);
3913
3914         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3915 }
3916
3917 struct mlx5_list_entry *
3918 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3919 {
3920         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3921         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3922         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3923         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3924         struct mlx5dv_dr_domain *domain;
3925         uint32_t idx;
3926         int ret;
3927
3928         /* Register new port id action resource. */
3929         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3930         if (!resource) {
3931                 rte_flow_error_set(ctx->error, ENOMEM,
3932                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3933                                    "cannot allocate push_vlan action memory");
3934                 return NULL;
3935         }
3936         *resource = *ref;
3937         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3938                 domain = sh->fdb_domain;
3939         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3940                 domain = sh->rx_domain;
3941         else
3942                 domain = sh->tx_domain;
3943         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3944                                                         &resource->action);
3945         if (ret) {
3946                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3947                 rte_flow_error_set(ctx->error, ENOMEM,
3948                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3949                                    "cannot create push vlan action");
3950                 return NULL;
3951         }
3952         resource->idx = idx;
3953         return &resource->entry;
3954 }
3955
3956 struct mlx5_list_entry *
3957 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3958                            struct mlx5_list_entry *entry __rte_unused,
3959                            void *cb_ctx)
3960 {
3961         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3962         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3963         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3964         uint32_t idx;
3965
3966         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3967         if (!resource) {
3968                 rte_flow_error_set(ctx->error, ENOMEM,
3969                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3970                                    "cannot allocate push_vlan action memory");
3971                 return NULL;
3972         }
3973         memcpy(resource, entry, sizeof(*resource));
3974         resource->idx = idx;
3975         return &resource->entry;
3976 }
3977
3978 void
3979 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3980 {
3981         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3982         struct mlx5_flow_dv_push_vlan_action_resource *resource =
3983                                   container_of(entry, typeof(*resource), entry);
3984
3985         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3986 }
3987
3988 /**
3989  * Find existing push vlan resource or create and register a new one.
3990  *
3991  * @param [in, out] dev
3992  *   Pointer to rte_eth_dev structure.
3993  * @param[in, out] ref
3994  *   Pointer to port ID action resource reference.
3995  * @parm[in, out] dev_flow
3996  *   Pointer to the dev_flow.
3997  * @param[out] error
3998  *   pointer to error structure.
3999  *
4000  * @return
4001  *   0 on success otherwise -errno and errno is set.
4002  */
4003 static int
4004 flow_dv_push_vlan_action_resource_register
4005                        (struct rte_eth_dev *dev,
4006                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4007                         struct mlx5_flow *dev_flow,
4008                         struct rte_flow_error *error)
4009 {
4010         struct mlx5_priv *priv = dev->data->dev_private;
4011         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4012         struct mlx5_list_entry *entry;
4013         struct mlx5_flow_cb_ctx ctx = {
4014                 .error = error,
4015                 .data = ref,
4016         };
4017
4018         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4019         if (!entry)
4020                 return -rte_errno;
4021         resource = container_of(entry, typeof(*resource), entry);
4022
4023         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4024         dev_flow->dv.push_vlan_res = resource;
4025         return 0;
4026 }
4027
4028 /**
4029  * Get the size of specific rte_flow_item_type hdr size
4030  *
4031  * @param[in] item_type
4032  *   Tested rte_flow_item_type.
4033  *
4034  * @return
4035  *   sizeof struct item_type, 0 if void or irrelevant.
4036  */
4037 static size_t
4038 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4039 {
4040         size_t retval;
4041
4042         switch (item_type) {
4043         case RTE_FLOW_ITEM_TYPE_ETH:
4044                 retval = sizeof(struct rte_ether_hdr);
4045                 break;
4046         case RTE_FLOW_ITEM_TYPE_VLAN:
4047                 retval = sizeof(struct rte_vlan_hdr);
4048                 break;
4049         case RTE_FLOW_ITEM_TYPE_IPV4:
4050                 retval = sizeof(struct rte_ipv4_hdr);
4051                 break;
4052         case RTE_FLOW_ITEM_TYPE_IPV6:
4053                 retval = sizeof(struct rte_ipv6_hdr);
4054                 break;
4055         case RTE_FLOW_ITEM_TYPE_UDP:
4056                 retval = sizeof(struct rte_udp_hdr);
4057                 break;
4058         case RTE_FLOW_ITEM_TYPE_TCP:
4059                 retval = sizeof(struct rte_tcp_hdr);
4060                 break;
4061         case RTE_FLOW_ITEM_TYPE_VXLAN:
4062         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4063                 retval = sizeof(struct rte_vxlan_hdr);
4064                 break;
4065         case RTE_FLOW_ITEM_TYPE_GRE:
4066         case RTE_FLOW_ITEM_TYPE_NVGRE:
4067                 retval = sizeof(struct rte_gre_hdr);
4068                 break;
4069         case RTE_FLOW_ITEM_TYPE_MPLS:
4070                 retval = sizeof(struct rte_mpls_hdr);
4071                 break;
4072         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4073         default:
4074                 retval = 0;
4075                 break;
4076         }
4077         return retval;
4078 }
4079
4080 #define MLX5_ENCAP_IPV4_VERSION         0x40
4081 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4082 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4083 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4084 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4085 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4086 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4087
4088 /**
4089  * Convert the encap action data from list of rte_flow_item to raw buffer
4090  *
4091  * @param[in] items
4092  *   Pointer to rte_flow_item objects list.
4093  * @param[out] buf
4094  *   Pointer to the output buffer.
4095  * @param[out] size
4096  *   Pointer to the output buffer size.
4097  * @param[out] error
4098  *   Pointer to the error structure.
4099  *
4100  * @return
4101  *   0 on success, a negative errno value otherwise and rte_errno is set.
4102  */
4103 static int
4104 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4105                            size_t *size, struct rte_flow_error *error)
4106 {
4107         struct rte_ether_hdr *eth = NULL;
4108         struct rte_vlan_hdr *vlan = NULL;
4109         struct rte_ipv4_hdr *ipv4 = NULL;
4110         struct rte_ipv6_hdr *ipv6 = NULL;
4111         struct rte_udp_hdr *udp = NULL;
4112         struct rte_vxlan_hdr *vxlan = NULL;
4113         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4114         struct rte_gre_hdr *gre = NULL;
4115         size_t len;
4116         size_t temp_size = 0;
4117
4118         if (!items)
4119                 return rte_flow_error_set(error, EINVAL,
4120                                           RTE_FLOW_ERROR_TYPE_ACTION,
4121                                           NULL, "invalid empty data");
4122         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4123                 len = flow_dv_get_item_hdr_len(items->type);
4124                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4125                         return rte_flow_error_set(error, EINVAL,
4126                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4127                                                   (void *)items->type,
4128                                                   "items total size is too big"
4129                                                   " for encap action");
4130                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4131                 switch (items->type) {
4132                 case RTE_FLOW_ITEM_TYPE_ETH:
4133                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4134                         break;
4135                 case RTE_FLOW_ITEM_TYPE_VLAN:
4136                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4137                         if (!eth)
4138                                 return rte_flow_error_set(error, EINVAL,
4139                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4140                                                 (void *)items->type,
4141                                                 "eth header not found");
4142                         if (!eth->ether_type)
4143                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4144                         break;
4145                 case RTE_FLOW_ITEM_TYPE_IPV4:
4146                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4147                         if (!vlan && !eth)
4148                                 return rte_flow_error_set(error, EINVAL,
4149                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4150                                                 (void *)items->type,
4151                                                 "neither eth nor vlan"
4152                                                 " header found");
4153                         if (vlan && !vlan->eth_proto)
4154                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4155                         else if (eth && !eth->ether_type)
4156                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4157                         if (!ipv4->version_ihl)
4158                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4159                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4160                         if (!ipv4->time_to_live)
4161                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4162                         break;
4163                 case RTE_FLOW_ITEM_TYPE_IPV6:
4164                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4165                         if (!vlan && !eth)
4166                                 return rte_flow_error_set(error, EINVAL,
4167                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4168                                                 (void *)items->type,
4169                                                 "neither eth nor vlan"
4170                                                 " header found");
4171                         if (vlan && !vlan->eth_proto)
4172                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4173                         else if (eth && !eth->ether_type)
4174                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4175                         if (!ipv6->vtc_flow)
4176                                 ipv6->vtc_flow =
4177                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4178                         if (!ipv6->hop_limits)
4179                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4180                         break;
4181                 case RTE_FLOW_ITEM_TYPE_UDP:
4182                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4183                         if (!ipv4 && !ipv6)
4184                                 return rte_flow_error_set(error, EINVAL,
4185                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4186                                                 (void *)items->type,
4187                                                 "ip header not found");
4188                         if (ipv4 && !ipv4->next_proto_id)
4189                                 ipv4->next_proto_id = IPPROTO_UDP;
4190                         else if (ipv6 && !ipv6->proto)
4191                                 ipv6->proto = IPPROTO_UDP;
4192                         break;
4193                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4194                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4195                         if (!udp)
4196                                 return rte_flow_error_set(error, EINVAL,
4197                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4198                                                 (void *)items->type,
4199                                                 "udp header not found");
4200                         if (!udp->dst_port)
4201                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4202                         if (!vxlan->vx_flags)
4203                                 vxlan->vx_flags =
4204                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4205                         break;
4206                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4207                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4208                         if (!udp)
4209                                 return rte_flow_error_set(error, EINVAL,
4210                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4211                                                 (void *)items->type,
4212                                                 "udp header not found");
4213                         if (!vxlan_gpe->proto)
4214                                 return rte_flow_error_set(error, EINVAL,
4215                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4216                                                 (void *)items->type,
4217                                                 "next protocol not found");
4218                         if (!udp->dst_port)
4219                                 udp->dst_port =
4220                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4221                         if (!vxlan_gpe->vx_flags)
4222                                 vxlan_gpe->vx_flags =
4223                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4224                         break;
4225                 case RTE_FLOW_ITEM_TYPE_GRE:
4226                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4227                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4228                         if (!gre->proto)
4229                                 return rte_flow_error_set(error, EINVAL,
4230                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4231                                                 (void *)items->type,
4232                                                 "next protocol not found");
4233                         if (!ipv4 && !ipv6)
4234                                 return rte_flow_error_set(error, EINVAL,
4235                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4236                                                 (void *)items->type,
4237                                                 "ip header not found");
4238                         if (ipv4 && !ipv4->next_proto_id)
4239                                 ipv4->next_proto_id = IPPROTO_GRE;
4240                         else if (ipv6 && !ipv6->proto)
4241                                 ipv6->proto = IPPROTO_GRE;
4242                         break;
4243                 case RTE_FLOW_ITEM_TYPE_VOID:
4244                         break;
4245                 default:
4246                         return rte_flow_error_set(error, EINVAL,
4247                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4248                                                   (void *)items->type,
4249                                                   "unsupported item type");
4250                         break;
4251                 }
4252                 temp_size += len;
4253         }
4254         *size = temp_size;
4255         return 0;
4256 }
4257
4258 static int
4259 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4260 {
4261         struct rte_ether_hdr *eth = NULL;
4262         struct rte_vlan_hdr *vlan = NULL;
4263         struct rte_ipv6_hdr *ipv6 = NULL;
4264         struct rte_udp_hdr *udp = NULL;
4265         char *next_hdr;
4266         uint16_t proto;
4267
4268         eth = (struct rte_ether_hdr *)data;
4269         next_hdr = (char *)(eth + 1);
4270         proto = RTE_BE16(eth->ether_type);
4271
4272         /* VLAN skipping */
4273         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4274                 vlan = (struct rte_vlan_hdr *)next_hdr;
4275                 proto = RTE_BE16(vlan->eth_proto);
4276                 next_hdr += sizeof(struct rte_vlan_hdr);
4277         }
4278
4279         /* HW calculates IPv4 csum. no need to proceed */
4280         if (proto == RTE_ETHER_TYPE_IPV4)
4281                 return 0;
4282
4283         /* non IPv4/IPv6 header. not supported */
4284         if (proto != RTE_ETHER_TYPE_IPV6) {
4285                 return rte_flow_error_set(error, ENOTSUP,
4286                                           RTE_FLOW_ERROR_TYPE_ACTION,
4287                                           NULL, "Cannot offload non IPv4/IPv6");
4288         }
4289
4290         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4291
4292         /* ignore non UDP */
4293         if (ipv6->proto != IPPROTO_UDP)
4294                 return 0;
4295
4296         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4297         udp->dgram_cksum = 0;
4298
4299         return 0;
4300 }
4301
4302 /**
4303  * Convert L2 encap action to DV specification.
4304  *
4305  * @param[in] dev
4306  *   Pointer to rte_eth_dev structure.
4307  * @param[in] action
4308  *   Pointer to action structure.
4309  * @param[in, out] dev_flow
4310  *   Pointer to the mlx5_flow.
4311  * @param[in] transfer
4312  *   Mark if the flow is E-Switch flow.
4313  * @param[out] error
4314  *   Pointer to the error structure.
4315  *
4316  * @return
4317  *   0 on success, a negative errno value otherwise and rte_errno is set.
4318  */
4319 static int
4320 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4321                                const struct rte_flow_action *action,
4322                                struct mlx5_flow *dev_flow,
4323                                uint8_t transfer,
4324                                struct rte_flow_error *error)
4325 {
4326         const struct rte_flow_item *encap_data;
4327         const struct rte_flow_action_raw_encap *raw_encap_data;
4328         struct mlx5_flow_dv_encap_decap_resource res = {
4329                 .reformat_type =
4330                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4331                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4332                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4333         };
4334
4335         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4336                 raw_encap_data =
4337                         (const struct rte_flow_action_raw_encap *)action->conf;
4338                 res.size = raw_encap_data->size;
4339                 memcpy(res.buf, raw_encap_data->data, res.size);
4340         } else {
4341                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4342                         encap_data =
4343                                 ((const struct rte_flow_action_vxlan_encap *)
4344                                                 action->conf)->definition;
4345                 else
4346                         encap_data =
4347                                 ((const struct rte_flow_action_nvgre_encap *)
4348                                                 action->conf)->definition;
4349                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4350                                                &res.size, error))
4351                         return -rte_errno;
4352         }
4353         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4354                 return -rte_errno;
4355         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4356                 return rte_flow_error_set(error, EINVAL,
4357                                           RTE_FLOW_ERROR_TYPE_ACTION,
4358                                           NULL, "can't create L2 encap action");
4359         return 0;
4360 }
4361
4362 /**
4363  * Convert L2 decap action to DV specification.
4364  *
4365  * @param[in] dev
4366  *   Pointer to rte_eth_dev structure.
4367  * @param[in, out] dev_flow
4368  *   Pointer to the mlx5_flow.
4369  * @param[in] transfer
4370  *   Mark if the flow is E-Switch flow.
4371  * @param[out] error
4372  *   Pointer to the error structure.
4373  *
4374  * @return
4375  *   0 on success, a negative errno value otherwise and rte_errno is set.
4376  */
4377 static int
4378 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4379                                struct mlx5_flow *dev_flow,
4380                                uint8_t transfer,
4381                                struct rte_flow_error *error)
4382 {
4383         struct mlx5_flow_dv_encap_decap_resource res = {
4384                 .size = 0,
4385                 .reformat_type =
4386                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4387                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4388                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4389         };
4390
4391         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4392                 return rte_flow_error_set(error, EINVAL,
4393                                           RTE_FLOW_ERROR_TYPE_ACTION,
4394                                           NULL, "can't create L2 decap action");
4395         return 0;
4396 }
4397
4398 /**
4399  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4400  *
4401  * @param[in] dev
4402  *   Pointer to rte_eth_dev structure.
4403  * @param[in] action
4404  *   Pointer to action structure.
4405  * @param[in, out] dev_flow
4406  *   Pointer to the mlx5_flow.
4407  * @param[in] attr
4408  *   Pointer to the flow attributes.
4409  * @param[out] error
4410  *   Pointer to the error structure.
4411  *
4412  * @return
4413  *   0 on success, a negative errno value otherwise and rte_errno is set.
4414  */
4415 static int
4416 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4417                                 const struct rte_flow_action *action,
4418                                 struct mlx5_flow *dev_flow,
4419                                 const struct rte_flow_attr *attr,
4420                                 struct rte_flow_error *error)
4421 {
4422         const struct rte_flow_action_raw_encap *encap_data;
4423         struct mlx5_flow_dv_encap_decap_resource res;
4424
4425         memset(&res, 0, sizeof(res));
4426         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4427         res.size = encap_data->size;
4428         memcpy(res.buf, encap_data->data, res.size);
4429         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4430                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4431                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4432         if (attr->transfer)
4433                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4434         else
4435                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4436                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4437         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4438                 return rte_flow_error_set(error, EINVAL,
4439                                           RTE_FLOW_ERROR_TYPE_ACTION,
4440                                           NULL, "can't create encap action");
4441         return 0;
4442 }
4443
4444 /**
4445  * Create action push VLAN.
4446  *
4447  * @param[in] dev
4448  *   Pointer to rte_eth_dev structure.
4449  * @param[in] attr
4450  *   Pointer to the flow attributes.
4451  * @param[in] vlan
4452  *   Pointer to the vlan to push to the Ethernet header.
4453  * @param[in, out] dev_flow
4454  *   Pointer to the mlx5_flow.
4455  * @param[out] error
4456  *   Pointer to the error structure.
4457  *
4458  * @return
4459  *   0 on success, a negative errno value otherwise and rte_errno is set.
4460  */
4461 static int
4462 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4463                                 const struct rte_flow_attr *attr,
4464                                 const struct rte_vlan_hdr *vlan,
4465                                 struct mlx5_flow *dev_flow,
4466                                 struct rte_flow_error *error)
4467 {
4468         struct mlx5_flow_dv_push_vlan_action_resource res;
4469
4470         memset(&res, 0, sizeof(res));
4471         res.vlan_tag =
4472                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4473                                  vlan->vlan_tci);
4474         if (attr->transfer)
4475                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4476         else
4477                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4478                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4479         return flow_dv_push_vlan_action_resource_register
4480                                             (dev, &res, dev_flow, error);
4481 }
4482
4483 /**
4484  * Validate the modify-header actions.
4485  *
4486  * @param[in] action_flags
4487  *   Holds the actions detected until now.
4488  * @param[in] action
4489  *   Pointer to the modify action.
4490  * @param[out] error
4491  *   Pointer to error structure.
4492  *
4493  * @return
4494  *   0 on success, a negative errno value otherwise and rte_errno is set.
4495  */
4496 static int
4497 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4498                                    const struct rte_flow_action *action,
4499                                    struct rte_flow_error *error)
4500 {
4501         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4502                 return rte_flow_error_set(error, EINVAL,
4503                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4504                                           NULL, "action configuration not set");
4505         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4506                 return rte_flow_error_set(error, EINVAL,
4507                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4508                                           "can't have encap action before"
4509                                           " modify action");
4510         return 0;
4511 }
4512
4513 /**
4514  * Validate the modify-header MAC address actions.
4515  *
4516  * @param[in] action_flags
4517  *   Holds the actions detected until now.
4518  * @param[in] action
4519  *   Pointer to the modify action.
4520  * @param[in] item_flags
4521  *   Holds the items detected.
4522  * @param[out] error
4523  *   Pointer to error structure.
4524  *
4525  * @return
4526  *   0 on success, a negative errno value otherwise and rte_errno is set.
4527  */
4528 static int
4529 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4530                                    const struct rte_flow_action *action,
4531                                    const uint64_t item_flags,
4532                                    struct rte_flow_error *error)
4533 {
4534         int ret = 0;
4535
4536         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4537         if (!ret) {
4538                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4539                         return rte_flow_error_set(error, EINVAL,
4540                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4541                                                   NULL,
4542                                                   "no L2 item in pattern");
4543         }
4544         return ret;
4545 }
4546
4547 /**
4548  * Validate the modify-header IPv4 address actions.
4549  *
4550  * @param[in] action_flags
4551  *   Holds the actions detected until now.
4552  * @param[in] action
4553  *   Pointer to the modify action.
4554  * @param[in] item_flags
4555  *   Holds the items detected.
4556  * @param[out] error
4557  *   Pointer to error structure.
4558  *
4559  * @return
4560  *   0 on success, a negative errno value otherwise and rte_errno is set.
4561  */
4562 static int
4563 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4564                                     const struct rte_flow_action *action,
4565                                     const uint64_t item_flags,
4566                                     struct rte_flow_error *error)
4567 {
4568         int ret = 0;
4569         uint64_t layer;
4570
4571         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4572         if (!ret) {
4573                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4574                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4575                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4576                 if (!(item_flags & layer))
4577                         return rte_flow_error_set(error, EINVAL,
4578                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4579                                                   NULL,
4580                                                   "no ipv4 item in pattern");
4581         }
4582         return ret;
4583 }
4584
4585 /**
4586  * Validate the modify-header IPv6 address actions.
4587  *
4588  * @param[in] action_flags
4589  *   Holds the actions detected until now.
4590  * @param[in] action
4591  *   Pointer to the modify action.
4592  * @param[in] item_flags
4593  *   Holds the items detected.
4594  * @param[out] error
4595  *   Pointer to error structure.
4596  *
4597  * @return
4598  *   0 on success, a negative errno value otherwise and rte_errno is set.
4599  */
4600 static int
4601 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4602                                     const struct rte_flow_action *action,
4603                                     const uint64_t item_flags,
4604                                     struct rte_flow_error *error)
4605 {
4606         int ret = 0;
4607         uint64_t layer;
4608
4609         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4610         if (!ret) {
4611                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4612                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4613                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4614                 if (!(item_flags & layer))
4615                         return rte_flow_error_set(error, EINVAL,
4616                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4617                                                   NULL,
4618                                                   "no ipv6 item in pattern");
4619         }
4620         return ret;
4621 }
4622
4623 /**
4624  * Validate the modify-header TP actions.
4625  *
4626  * @param[in] action_flags
4627  *   Holds the actions detected until now.
4628  * @param[in] action
4629  *   Pointer to the modify action.
4630  * @param[in] item_flags
4631  *   Holds the items detected.
4632  * @param[out] error
4633  *   Pointer to error structure.
4634  *
4635  * @return
4636  *   0 on success, a negative errno value otherwise and rte_errno is set.
4637  */
4638 static int
4639 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4640                                   const struct rte_flow_action *action,
4641                                   const uint64_t item_flags,
4642                                   struct rte_flow_error *error)
4643 {
4644         int ret = 0;
4645         uint64_t layer;
4646
4647         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4648         if (!ret) {
4649                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4650                                  MLX5_FLOW_LAYER_INNER_L4 :
4651                                  MLX5_FLOW_LAYER_OUTER_L4;
4652                 if (!(item_flags & layer))
4653                         return rte_flow_error_set(error, EINVAL,
4654                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4655                                                   NULL, "no transport layer "
4656                                                   "in pattern");
4657         }
4658         return ret;
4659 }
4660
4661 /**
4662  * Validate the modify-header actions of increment/decrement
4663  * TCP Sequence-number.
4664  *
4665  * @param[in] action_flags
4666  *   Holds the actions detected until now.
4667  * @param[in] action
4668  *   Pointer to the modify action.
4669  * @param[in] item_flags
4670  *   Holds the items detected.
4671  * @param[out] error
4672  *   Pointer to error structure.
4673  *
4674  * @return
4675  *   0 on success, a negative errno value otherwise and rte_errno is set.
4676  */
4677 static int
4678 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4679                                        const struct rte_flow_action *action,
4680                                        const uint64_t item_flags,
4681                                        struct rte_flow_error *error)
4682 {
4683         int ret = 0;
4684         uint64_t layer;
4685
4686         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4687         if (!ret) {
4688                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4689                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4690                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4691                 if (!(item_flags & layer))
4692                         return rte_flow_error_set(error, EINVAL,
4693                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4694                                                   NULL, "no TCP item in"
4695                                                   " pattern");
4696                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4697                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4698                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4699                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4700                         return rte_flow_error_set(error, EINVAL,
4701                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4702                                                   NULL,
4703                                                   "cannot decrease and increase"
4704                                                   " TCP sequence number"
4705                                                   " at the same time");
4706         }
4707         return ret;
4708 }
4709
4710 /**
4711  * Validate the modify-header actions of increment/decrement
4712  * TCP Acknowledgment number.
4713  *
4714  * @param[in] action_flags
4715  *   Holds the actions detected until now.
4716  * @param[in] action
4717  *   Pointer to the modify action.
4718  * @param[in] item_flags
4719  *   Holds the items detected.
4720  * @param[out] error
4721  *   Pointer to error structure.
4722  *
4723  * @return
4724  *   0 on success, a negative errno value otherwise and rte_errno is set.
4725  */
4726 static int
4727 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4728                                        const struct rte_flow_action *action,
4729                                        const uint64_t item_flags,
4730                                        struct rte_flow_error *error)
4731 {
4732         int ret = 0;
4733         uint64_t layer;
4734
4735         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4736         if (!ret) {
4737                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4738                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4739                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4740                 if (!(item_flags & layer))
4741                         return rte_flow_error_set(error, EINVAL,
4742                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4743                                                   NULL, "no TCP item in"
4744                                                   " pattern");
4745                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4746                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4747                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4748                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4749                         return rte_flow_error_set(error, EINVAL,
4750                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4751                                                   NULL,
4752                                                   "cannot decrease and increase"
4753                                                   " TCP acknowledgment number"
4754                                                   " at the same time");
4755         }
4756         return ret;
4757 }
4758
4759 /**
4760  * Validate the modify-header TTL actions.
4761  *
4762  * @param[in] action_flags
4763  *   Holds the actions detected until now.
4764  * @param[in] action
4765  *   Pointer to the modify action.
4766  * @param[in] item_flags
4767  *   Holds the items detected.
4768  * @param[out] error
4769  *   Pointer to error structure.
4770  *
4771  * @return
4772  *   0 on success, a negative errno value otherwise and rte_errno is set.
4773  */
4774 static int
4775 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4776                                    const struct rte_flow_action *action,
4777                                    const uint64_t item_flags,
4778                                    struct rte_flow_error *error)
4779 {
4780         int ret = 0;
4781         uint64_t layer;
4782
4783         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4784         if (!ret) {
4785                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4786                                  MLX5_FLOW_LAYER_INNER_L3 :
4787                                  MLX5_FLOW_LAYER_OUTER_L3;
4788                 if (!(item_flags & layer))
4789                         return rte_flow_error_set(error, EINVAL,
4790                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4791                                                   NULL,
4792                                                   "no IP protocol in pattern");
4793         }
4794         return ret;
4795 }
4796
4797 /**
4798  * Validate the generic modify field actions.
4799  * @param[in] dev
4800  *   Pointer to the rte_eth_dev structure.
4801  * @param[in] action_flags
4802  *   Holds the actions detected until now.
4803  * @param[in] action
4804  *   Pointer to the modify action.
4805  * @param[in] attr
4806  *   Pointer to the flow attributes.
4807  * @param[out] error
4808  *   Pointer to error structure.
4809  *
4810  * @return
4811  *   Number of header fields to modify (0 or more) on success,
4812  *   a negative errno value otherwise and rte_errno is set.
4813  */
4814 static int
4815 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4816                                    const uint64_t action_flags,
4817                                    const struct rte_flow_action *action,
4818                                    const struct rte_flow_attr *attr,
4819                                    struct rte_flow_error *error)
4820 {
4821         int ret = 0;
4822         struct mlx5_priv *priv = dev->data->dev_private;
4823         struct mlx5_sh_config *config = &priv->sh->config;
4824         const struct rte_flow_action_modify_field *action_modify_field =
4825                 action->conf;
4826         uint32_t dst_width = mlx5_flow_item_field_width(dev,
4827                                 action_modify_field->dst.field,
4828                                 -1, attr, error);
4829         uint32_t src_width = mlx5_flow_item_field_width(dev,
4830                                 action_modify_field->src.field,
4831                                 dst_width, attr, error);
4832
4833         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4834         if (ret)
4835                 return ret;
4836
4837         if (action_modify_field->width == 0)
4838                 return rte_flow_error_set(error, EINVAL,
4839                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4840                                 "no bits are requested to be modified");
4841         else if (action_modify_field->width > dst_width ||
4842                  action_modify_field->width > src_width)
4843                 return rte_flow_error_set(error, EINVAL,
4844                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4845                                 "cannot modify more bits than"
4846                                 " the width of a field");
4847         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4848             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4849                 if ((action_modify_field->dst.offset +
4850                      action_modify_field->width > dst_width) ||
4851                     (action_modify_field->dst.offset % 32))
4852                         return rte_flow_error_set(error, EINVAL,
4853                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4854                                         "destination offset is too big"
4855                                         " or not aligned to 4 bytes");
4856                 if (action_modify_field->dst.level &&
4857                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4858                         return rte_flow_error_set(error, ENOTSUP,
4859                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4860                                         "inner header fields modification"
4861                                         " is not supported");
4862         }
4863         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4864             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4865                 if (!attr->transfer && !attr->group)
4866                         return rte_flow_error_set(error, ENOTSUP,
4867                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4868                                         "modify field action is not"
4869                                         " supported for group 0");
4870                 if ((action_modify_field->src.offset +
4871                      action_modify_field->width > src_width) ||
4872                     (action_modify_field->src.offset % 32))
4873                         return rte_flow_error_set(error, EINVAL,
4874                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4875                                         "source offset is too big"
4876                                         " or not aligned to 4 bytes");
4877                 if (action_modify_field->src.level &&
4878                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4879                         return rte_flow_error_set(error, ENOTSUP,
4880                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4881                                         "inner header fields modification"
4882                                         " is not supported");
4883         }
4884         if ((action_modify_field->dst.field ==
4885              action_modify_field->src.field) &&
4886             (action_modify_field->dst.level ==
4887              action_modify_field->src.level))
4888                 return rte_flow_error_set(error, EINVAL,
4889                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4890                                 "source and destination fields"
4891                                 " cannot be the same");
4892         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4893             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4894             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4895                 return rte_flow_error_set(error, EINVAL,
4896                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4897                                 "mark, immediate value or a pointer to it"
4898                                 " cannot be used as a destination");
4899         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4900             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4901                 return rte_flow_error_set(error, ENOTSUP,
4902                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4903                                 "modifications of an arbitrary"
4904                                 " place in a packet is not supported");
4905         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4906             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4907                 return rte_flow_error_set(error, ENOTSUP,
4908                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4909                                 "modifications of the 802.1Q Tag"
4910                                 " Identifier is not supported");
4911         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4912             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4913                 return rte_flow_error_set(error, ENOTSUP,
4914                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4915                                 "modifications of the VXLAN Network"
4916                                 " Identifier is not supported");
4917         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4918             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4919                 return rte_flow_error_set(error, ENOTSUP,
4920                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4921                                 "modifications of the GENEVE Network"
4922                                 " Identifier is not supported");
4923         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4924             action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4925                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4926                     !mlx5_flow_ext_mreg_supported(dev))
4927                         return rte_flow_error_set(error, ENOTSUP,
4928                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4929                                         "cannot modify mark in legacy mode"
4930                                         " or without extensive registers");
4931         if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4932             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4933                 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4934                     !mlx5_flow_ext_mreg_supported(dev))
4935                         return rte_flow_error_set(error, ENOTSUP,
4936                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4937                                         "cannot modify meta without"
4938                                         " extensive registers support");
4939                 ret = flow_dv_get_metadata_reg(dev, attr, error);
4940                 if (ret < 0 || ret == REG_NON)
4941                         return rte_flow_error_set(error, ENOTSUP,
4942                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4943                                         "cannot modify meta without"
4944                                         " extensive registers available");
4945         }
4946         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4947                 return rte_flow_error_set(error, ENOTSUP,
4948                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4949                                 "add and sub operations"
4950                                 " are not supported");
4951         return (action_modify_field->width / 32) +
4952                !!(action_modify_field->width % 32);
4953 }
4954
4955 /**
4956  * Validate jump action.
4957  *
4958  * @param[in] action
4959  *   Pointer to the jump action.
4960  * @param[in] action_flags
4961  *   Holds the actions detected until now.
4962  * @param[in] attributes
4963  *   Pointer to flow attributes
4964  * @param[in] external
4965  *   Action belongs to flow rule created by request external to PMD.
4966  * @param[out] error
4967  *   Pointer to error structure.
4968  *
4969  * @return
4970  *   0 on success, a negative errno value otherwise and rte_errno is set.
4971  */
4972 static int
4973 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4974                              const struct mlx5_flow_tunnel *tunnel,
4975                              const struct rte_flow_action *action,
4976                              uint64_t action_flags,
4977                              const struct rte_flow_attr *attributes,
4978                              bool external, struct rte_flow_error *error)
4979 {
4980         uint32_t target_group, table = 0;
4981         int ret = 0;
4982         struct flow_grp_info grp_info = {
4983                 .external = !!external,
4984                 .transfer = !!attributes->transfer,
4985                 .fdb_def_rule = 1,
4986                 .std_tbl_fix = 0
4987         };
4988         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4989                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4990                 return rte_flow_error_set(error, EINVAL,
4991                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4992                                           "can't have 2 fate actions in"
4993                                           " same flow");
4994         if (!action->conf)
4995                 return rte_flow_error_set(error, EINVAL,
4996                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4997                                           NULL, "action configuration not set");
4998         target_group =
4999                 ((const struct rte_flow_action_jump *)action->conf)->group;
5000         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5001                                        &grp_info, error);
5002         if (ret)
5003                 return ret;
5004         if (attributes->group == target_group &&
5005             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5006                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5007                 return rte_flow_error_set(error, EINVAL,
5008                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5009                                           "target group must be other than"
5010                                           " the current flow group");
5011         if (table == 0)
5012                 return rte_flow_error_set(error, EINVAL,
5013                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5014                                           NULL, "root table shouldn't be destination");
5015         return 0;
5016 }
5017
5018 /*
5019  * Validate action PORT_ID / REPRESENTED_PORT.
5020  *
5021  * @param[in] dev
5022  *   Pointer to rte_eth_dev structure.
5023  * @param[in] action_flags
5024  *   Bit-fields that holds the actions detected until now.
5025  * @param[in] action
5026  *   PORT_ID / REPRESENTED_PORT action structure.
5027  * @param[in] attr
5028  *   Attributes of flow that includes this action.
5029  * @param[out] error
5030  *   Pointer to error structure.
5031  *
5032  * @return
5033  *   0 on success, a negative errno value otherwise and rte_errno is set.
5034  */
5035 static int
5036 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5037                                 uint64_t action_flags,
5038                                 const struct rte_flow_action *action,
5039                                 const struct rte_flow_attr *attr,
5040                                 struct rte_flow_error *error)
5041 {
5042         const struct rte_flow_action_port_id *port_id;
5043         const struct rte_flow_action_ethdev *ethdev;
5044         struct mlx5_priv *act_priv;
5045         struct mlx5_priv *dev_priv;
5046         uint16_t port;
5047
5048         if (!attr->transfer)
5049                 return rte_flow_error_set(error, ENOTSUP,
5050                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5051                                           NULL,
5052                                           "port action is valid in transfer"
5053                                           " mode only");
5054         if (!action || !action->conf)
5055                 return rte_flow_error_set(error, ENOTSUP,
5056                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5057                                           NULL,
5058                                           "port action parameters must be"
5059                                           " specified");
5060         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5061                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5062                 return rte_flow_error_set(error, EINVAL,
5063                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5064                                           "can have only one fate actions in"
5065                                           " a flow");
5066         dev_priv = mlx5_dev_to_eswitch_info(dev);
5067         if (!dev_priv)
5068                 return rte_flow_error_set(error, rte_errno,
5069                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5070                                           NULL,
5071                                           "failed to obtain E-Switch info");
5072         switch (action->type) {
5073         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5074                 port_id = action->conf;
5075                 port = port_id->original ? dev->data->port_id : port_id->id;
5076                 break;
5077         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5078                 ethdev = action->conf;
5079                 port = ethdev->port_id;
5080                 break;
5081         default:
5082                 MLX5_ASSERT(false);
5083                 return rte_flow_error_set
5084                                 (error, EINVAL,
5085                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5086                                  "unknown E-Switch action");
5087         }
5088         act_priv = mlx5_port_to_eswitch_info(port, false);
5089         if (!act_priv)
5090                 return rte_flow_error_set
5091                                 (error, rte_errno,
5092                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5093                                  "failed to obtain E-Switch port id for port");
5094         if (act_priv->domain_id != dev_priv->domain_id)
5095                 return rte_flow_error_set
5096                                 (error, EINVAL,
5097                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5098                                  "port does not belong to"
5099                                  " E-Switch being configured");
5100         return 0;
5101 }
5102
5103 /**
5104  * Get the maximum number of modify header actions.
5105  *
5106  * @param dev
5107  *   Pointer to rte_eth_dev structure.
5108  * @param root
5109  *   Whether action is on root table.
5110  *
5111  * @return
5112  *   Max number of modify header actions device can support.
5113  */
5114 static inline unsigned int
5115 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5116                               bool root)
5117 {
5118         /*
5119          * There's no way to directly query the max capacity from FW.
5120          * The maximal value on root table should be assumed to be supported.
5121          */
5122         if (!root)
5123                 return MLX5_MAX_MODIFY_NUM;
5124         else
5125                 return MLX5_ROOT_TBL_MODIFY_NUM;
5126 }
5127
5128 /**
5129  * Validate the meter action.
5130  *
5131  * @param[in] dev
5132  *   Pointer to rte_eth_dev structure.
5133  * @param[in] action_flags
5134  *   Bit-fields that holds the actions detected until now.
5135  * @param[in] item_flags
5136  *   Holds the items detected.
5137  * @param[in] action
5138  *   Pointer to the meter action.
5139  * @param[in] attr
5140  *   Attributes of flow that includes this action.
5141  * @param[in] port_id_item
5142  *   Pointer to item indicating port id.
5143  * @param[out] error
5144  *   Pointer to error structure.
5145  *
5146  * @return
5147  *   0 on success, a negative errno value otherwise and rte_errno is set.
5148  */
5149 static int
5150 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5151                                 uint64_t action_flags, uint64_t item_flags,
5152                                 const struct rte_flow_action *action,
5153                                 const struct rte_flow_attr *attr,
5154                                 const struct rte_flow_item *port_id_item,
5155                                 bool *def_policy,
5156                                 struct rte_flow_error *error)
5157 {
5158         struct mlx5_priv *priv = dev->data->dev_private;
5159         const struct rte_flow_action_meter *am = action->conf;
5160         struct mlx5_flow_meter_info *fm;
5161         struct mlx5_flow_meter_policy *mtr_policy;
5162         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5163
5164         if (!am)
5165                 return rte_flow_error_set(error, EINVAL,
5166                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5167                                           "meter action conf is NULL");
5168
5169         if (action_flags & MLX5_FLOW_ACTION_METER)
5170                 return rte_flow_error_set(error, ENOTSUP,
5171                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5172                                           "meter chaining not support");
5173         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5174                 return rte_flow_error_set(error, ENOTSUP,
5175                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5176                                           "meter with jump not support");
5177         if (!priv->mtr_en)
5178                 return rte_flow_error_set(error, ENOTSUP,
5179                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5180                                           NULL,
5181                                           "meter action not supported");
5182         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5183         if (!fm)
5184                 return rte_flow_error_set(error, EINVAL,
5185                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5186                                           "Meter not found");
5187         /* aso meter can always be shared by different domains */
5188         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5189             !(fm->transfer == attr->transfer ||
5190               (!fm->ingress && !attr->ingress && attr->egress) ||
5191               (!fm->egress && !attr->egress && attr->ingress)))
5192                 return rte_flow_error_set(error, EINVAL,
5193                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5194                         "Flow attributes domain are either invalid "
5195                         "or have a domain conflict with current "
5196                         "meter attributes");
5197         if (fm->def_policy) {
5198                 if (!((attr->transfer &&
5199                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5200                         (attr->egress &&
5201                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5202                         (attr->ingress &&
5203                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5204                         return rte_flow_error_set(error, EINVAL,
5205                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5206                                           "Flow attributes domain "
5207                                           "have a conflict with current "
5208                                           "meter domain attributes");
5209                 *def_policy = true;
5210         } else {
5211                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5212                                                 fm->policy_id, NULL);
5213                 if (!mtr_policy)
5214                         return rte_flow_error_set(error, EINVAL,
5215                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5216                                           "Invalid policy id for meter ");
5217                 if (!((attr->transfer && mtr_policy->transfer) ||
5218                         (attr->egress && mtr_policy->egress) ||
5219                         (attr->ingress && mtr_policy->ingress)))
5220                         return rte_flow_error_set(error, EINVAL,
5221                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5222                                           "Flow attributes domain "
5223                                           "have a conflict with current "
5224                                           "meter domain attributes");
5225                 if (attr->transfer && mtr_policy->dev) {
5226                         /**
5227                          * When policy has fate action of port_id,
5228                          * the flow should have the same src port as policy.
5229                          */
5230                         struct mlx5_priv *policy_port_priv =
5231                                         mtr_policy->dev->data->dev_private;
5232                         int32_t flow_src_port = priv->representor_id;
5233
5234                         if (port_id_item) {
5235                                 const struct rte_flow_item_port_id *spec =
5236                                                         port_id_item->spec;
5237                                 struct mlx5_priv *port_priv =
5238                                         mlx5_port_to_eswitch_info(spec->id,
5239                                                                   false);
5240                                 if (!port_priv)
5241                                         return rte_flow_error_set(error,
5242                                                 rte_errno,
5243                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5244                                                 spec,
5245                                                 "Failed to get port info.");
5246                                 flow_src_port = port_priv->representor_id;
5247                         }
5248                         if (flow_src_port != policy_port_priv->representor_id)
5249                                 return rte_flow_error_set(error,
5250                                                 rte_errno,
5251                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5252                                                 NULL,
5253                                                 "Flow and meter policy "
5254                                                 "have different src port.");
5255                 } else if (mtr_policy->is_rss) {
5256                         struct mlx5_flow_meter_policy *fp;
5257                         struct mlx5_meter_policy_action_container *acg;
5258                         struct mlx5_meter_policy_action_container *acy;
5259                         const struct rte_flow_action *rss_act;
5260                         int ret;
5261
5262                         fp = mlx5_flow_meter_hierarchy_get_final_policy(dev,
5263                                                                 mtr_policy);
5264                         if (fp == NULL)
5265                                 return rte_flow_error_set(error, EINVAL,
5266                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5267                                                   "Unable to get the final "
5268                                                   "policy in the hierarchy");
5269                         acg = &fp->act_cnt[RTE_COLOR_GREEN];
5270                         acy = &fp->act_cnt[RTE_COLOR_YELLOW];
5271                         MLX5_ASSERT(acg->fate_action ==
5272                                     MLX5_FLOW_FATE_SHARED_RSS ||
5273                                     acy->fate_action ==
5274                                     MLX5_FLOW_FATE_SHARED_RSS);
5275                         if (acg->fate_action == MLX5_FLOW_FATE_SHARED_RSS)
5276                                 rss_act = acg->rss;
5277                         else
5278                                 rss_act = acy->rss;
5279                         ret = mlx5_flow_validate_action_rss(rss_act,
5280                                         action_flags, dev, attr,
5281                                         item_flags, error);
5282                         if (ret)
5283                                 return ret;
5284                 }
5285                 *def_policy = false;
5286         }
5287         return 0;
5288 }
5289
5290 /**
5291  * Validate the age action.
5292  *
5293  * @param[in] action_flags
5294  *   Holds the actions detected until now.
5295  * @param[in] action
5296  *   Pointer to the age action.
5297  * @param[in] dev
5298  *   Pointer to the Ethernet device structure.
5299  * @param[out] error
5300  *   Pointer to error structure.
5301  *
5302  * @return
5303  *   0 on success, a negative errno value otherwise and rte_errno is set.
5304  */
5305 static int
5306 flow_dv_validate_action_age(uint64_t action_flags,
5307                             const struct rte_flow_action *action,
5308                             struct rte_eth_dev *dev,
5309                             struct rte_flow_error *error)
5310 {
5311         struct mlx5_priv *priv = dev->data->dev_private;
5312         const struct rte_flow_action_age *age = action->conf;
5313
5314         if (!priv->sh->cdev->config.devx ||
5315             (priv->sh->cmng.counter_fallback && !priv->sh->aso_age_mng))
5316                 return rte_flow_error_set(error, ENOTSUP,
5317                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5318                                           NULL,
5319                                           "age action not supported");
5320         if (!(action->conf))
5321                 return rte_flow_error_set(error, EINVAL,
5322                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5323                                           "configuration cannot be null");
5324         if (!(age->timeout))
5325                 return rte_flow_error_set(error, EINVAL,
5326                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5327                                           "invalid timeout value 0");
5328         if (action_flags & MLX5_FLOW_ACTION_AGE)
5329                 return rte_flow_error_set(error, EINVAL,
5330                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5331                                           "duplicate age actions set");
5332         return 0;
5333 }
5334
5335 /**
5336  * Validate the modify-header IPv4 DSCP actions.
5337  *
5338  * @param[in] action_flags
5339  *   Holds the actions detected until now.
5340  * @param[in] action
5341  *   Pointer to the modify action.
5342  * @param[in] item_flags
5343  *   Holds the items detected.
5344  * @param[out] error
5345  *   Pointer to error structure.
5346  *
5347  * @return
5348  *   0 on success, a negative errno value otherwise and rte_errno is set.
5349  */
5350 static int
5351 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5352                                          const struct rte_flow_action *action,
5353                                          const uint64_t item_flags,
5354                                          struct rte_flow_error *error)
5355 {
5356         int ret = 0;
5357
5358         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5359         if (!ret) {
5360                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5361                         return rte_flow_error_set(error, EINVAL,
5362                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5363                                                   NULL,
5364                                                   "no ipv4 item in pattern");
5365         }
5366         return ret;
5367 }
5368
5369 /**
5370  * Validate the modify-header IPv6 DSCP actions.
5371  *
5372  * @param[in] action_flags
5373  *   Holds the actions detected until now.
5374  * @param[in] action
5375  *   Pointer to the modify action.
5376  * @param[in] item_flags
5377  *   Holds the items detected.
5378  * @param[out] error
5379  *   Pointer to error structure.
5380  *
5381  * @return
5382  *   0 on success, a negative errno value otherwise and rte_errno is set.
5383  */
5384 static int
5385 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5386                                          const struct rte_flow_action *action,
5387                                          const uint64_t item_flags,
5388                                          struct rte_flow_error *error)
5389 {
5390         int ret = 0;
5391
5392         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5393         if (!ret) {
5394                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5395                         return rte_flow_error_set(error, EINVAL,
5396                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5397                                                   NULL,
5398                                                   "no ipv6 item in pattern");
5399         }
5400         return ret;
5401 }
5402
5403 int
5404 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5405                         struct mlx5_list_entry *entry, void *cb_ctx)
5406 {
5407         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5408         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5409         struct mlx5_flow_dv_modify_hdr_resource *resource =
5410                                   container_of(entry, typeof(*resource), entry);
5411         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5412
5413         key_len += ref->actions_num * sizeof(ref->actions[0]);
5414         return ref->actions_num != resource->actions_num ||
5415                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5416 }
5417
5418 static struct mlx5_indexed_pool *
5419 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5420 {
5421         struct mlx5_indexed_pool *ipool = __atomic_load_n
5422                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5423
5424         if (!ipool) {
5425                 struct mlx5_indexed_pool *expected = NULL;
5426                 struct mlx5_indexed_pool_config cfg =
5427                     (struct mlx5_indexed_pool_config) {
5428                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5429                                                                    (index + 1) *
5430                                            sizeof(struct mlx5_modification_cmd),
5431                        .trunk_size = 64,
5432                        .grow_trunk = 3,
5433                        .grow_shift = 2,
5434                        .need_lock = 1,
5435                        .release_mem_en = !!sh->config.reclaim_mode,
5436                        .per_core_cache =
5437                                        sh->config.reclaim_mode ? 0 : (1 << 16),
5438                        .malloc = mlx5_malloc,
5439                        .free = mlx5_free,
5440                        .type = "mlx5_modify_action_resource",
5441                 };
5442
5443                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5444                 ipool = mlx5_ipool_create(&cfg);
5445                 if (!ipool)
5446                         return NULL;
5447                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5448                                                  &expected, ipool, false,
5449                                                  __ATOMIC_SEQ_CST,
5450                                                  __ATOMIC_SEQ_CST)) {
5451                         mlx5_ipool_destroy(ipool);
5452                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5453                                                 __ATOMIC_SEQ_CST);
5454                 }
5455         }
5456         return ipool;
5457 }
5458
5459 struct mlx5_list_entry *
5460 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5461 {
5462         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5463         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5464         struct mlx5dv_dr_domain *ns;
5465         struct mlx5_flow_dv_modify_hdr_resource *entry;
5466         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5467         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5468                                                           ref->actions_num - 1);
5469         int ret;
5470         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5471         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5472         uint32_t idx;
5473
5474         if (unlikely(!ipool)) {
5475                 rte_flow_error_set(ctx->error, ENOMEM,
5476                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5477                                    NULL, "cannot allocate modify ipool");
5478                 return NULL;
5479         }
5480         entry = mlx5_ipool_zmalloc(ipool, &idx);
5481         if (!entry) {
5482                 rte_flow_error_set(ctx->error, ENOMEM,
5483                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5484                                    "cannot allocate resource memory");
5485                 return NULL;
5486         }
5487         rte_memcpy(&entry->ft_type,
5488                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5489                    key_len + data_len);
5490         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5491                 ns = sh->fdb_domain;
5492         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5493                 ns = sh->tx_domain;
5494         else
5495                 ns = sh->rx_domain;
5496         ret = mlx5_flow_os_create_flow_action_modify_header
5497                                         (sh->cdev->ctx, ns, entry,
5498                                          data_len, &entry->action);
5499         if (ret) {
5500                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5501                 rte_flow_error_set(ctx->error, ENOMEM,
5502                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5503                                    NULL, "cannot create modification action");
5504                 return NULL;
5505         }
5506         entry->idx = idx;
5507         return &entry->entry;
5508 }
5509
5510 struct mlx5_list_entry *
5511 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5512                         void *cb_ctx)
5513 {
5514         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5515         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5516         struct mlx5_flow_dv_modify_hdr_resource *entry;
5517         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5518         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5519         uint32_t idx;
5520
5521         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5522                                   &idx);
5523         if (!entry) {
5524                 rte_flow_error_set(ctx->error, ENOMEM,
5525                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5526                                    "cannot allocate resource memory");
5527                 return NULL;
5528         }
5529         memcpy(entry, oentry, sizeof(*entry) + data_len);
5530         entry->idx = idx;
5531         return &entry->entry;
5532 }
5533
5534 void
5535 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5536 {
5537         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5538         struct mlx5_flow_dv_modify_hdr_resource *res =
5539                 container_of(entry, typeof(*res), entry);
5540
5541         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5542 }
5543
5544 /**
5545  * Validate the sample action.
5546  *
5547  * @param[in, out] action_flags
5548  *   Holds the actions detected until now.
5549  * @param[in] action
5550  *   Pointer to the sample action.
5551  * @param[in] dev
5552  *   Pointer to the Ethernet device structure.
5553  * @param[in] attr
5554  *   Attributes of flow that includes this action.
5555  * @param[in] item_flags
5556  *   Holds the items detected.
5557  * @param[in] rss
5558  *   Pointer to the RSS action.
5559  * @param[out] sample_rss
5560  *   Pointer to the RSS action in sample action list.
5561  * @param[out] count
5562  *   Pointer to the COUNT action in sample action list.
5563  * @param[out] fdb_mirror_limit
5564  *   Pointer to the FDB mirror limitation flag.
5565  * @param[out] error
5566  *   Pointer to error structure.
5567  *
5568  * @return
5569  *   0 on success, a negative errno value otherwise and rte_errno is set.
5570  */
5571 static int
5572 flow_dv_validate_action_sample(uint64_t *action_flags,
5573                                const struct rte_flow_action *action,
5574                                struct rte_eth_dev *dev,
5575                                const struct rte_flow_attr *attr,
5576                                uint64_t item_flags,
5577                                const struct rte_flow_action_rss *rss,
5578                                const struct rte_flow_action_rss **sample_rss,
5579                                const struct rte_flow_action_count **count,
5580                                int *fdb_mirror_limit,
5581                                struct rte_flow_error *error)
5582 {
5583         struct mlx5_priv *priv = dev->data->dev_private;
5584         struct mlx5_sh_config *dev_conf = &priv->sh->config;
5585         const struct rte_flow_action_sample *sample = action->conf;
5586         const struct rte_flow_action *act;
5587         uint64_t sub_action_flags = 0;
5588         uint16_t queue_index = 0xFFFF;
5589         int actions_n = 0;
5590         int ret;
5591
5592         if (!sample)
5593                 return rte_flow_error_set(error, EINVAL,
5594                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5595                                           "configuration cannot be NULL");
5596         if (sample->ratio == 0)
5597                 return rte_flow_error_set(error, EINVAL,
5598                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5599                                           "ratio value starts from 1");
5600         if (!priv->sh->cdev->config.devx ||
5601             (sample->ratio > 0 && !priv->sampler_en))
5602                 return rte_flow_error_set(error, ENOTSUP,
5603                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5604                                           NULL,
5605                                           "sample action not supported");
5606         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5607                 return rte_flow_error_set(error, EINVAL,
5608                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5609                                           "Multiple sample actions not "
5610                                           "supported");
5611         if (*action_flags & MLX5_FLOW_ACTION_METER)
5612                 return rte_flow_error_set(error, EINVAL,
5613                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5614                                           "wrong action order, meter should "
5615                                           "be after sample action");
5616         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5617                 return rte_flow_error_set(error, EINVAL,
5618                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5619                                           "wrong action order, jump should "
5620                                           "be after sample action");
5621         if (*action_flags & MLX5_FLOW_ACTION_CT)
5622                 return rte_flow_error_set(error, EINVAL,
5623                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5624                                           "Sample after CT not supported");
5625         act = sample->actions;
5626         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5627                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5628                         return rte_flow_error_set(error, ENOTSUP,
5629                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5630                                                   act, "too many actions");
5631                 switch (act->type) {
5632                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5633                         ret = mlx5_flow_validate_action_queue(act,
5634                                                               sub_action_flags,
5635                                                               dev,
5636                                                               attr, error);
5637                         if (ret < 0)
5638                                 return ret;
5639                         queue_index = ((const struct rte_flow_action_queue *)
5640                                                         (act->conf))->index;
5641                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5642                         ++actions_n;
5643                         break;
5644                 case RTE_FLOW_ACTION_TYPE_RSS:
5645                         *sample_rss = act->conf;
5646                         ret = mlx5_flow_validate_action_rss(act,
5647                                                             sub_action_flags,
5648                                                             dev, attr,
5649                                                             item_flags,
5650                                                             error);
5651                         if (ret < 0)
5652                                 return ret;
5653                         if (rss && *sample_rss &&
5654                             ((*sample_rss)->level != rss->level ||
5655                             (*sample_rss)->types != rss->types))
5656                                 return rte_flow_error_set(error, ENOTSUP,
5657                                         RTE_FLOW_ERROR_TYPE_ACTION,
5658                                         NULL,
5659                                         "Can't use the different RSS types "
5660                                         "or level in the same flow");
5661                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5662                                 queue_index = (*sample_rss)->queue[0];
5663                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5664                         ++actions_n;
5665                         break;
5666                 case RTE_FLOW_ACTION_TYPE_MARK:
5667                         ret = flow_dv_validate_action_mark(dev, act,
5668                                                            sub_action_flags,
5669                                                            attr, error);
5670                         if (ret < 0)
5671                                 return ret;
5672                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5673                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5674                                                 MLX5_FLOW_ACTION_MARK_EXT;
5675                         else
5676                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5677                         ++actions_n;
5678                         break;
5679                 case RTE_FLOW_ACTION_TYPE_COUNT:
5680                         ret = flow_dv_validate_action_count
5681                                 (dev, false, *action_flags | sub_action_flags,
5682                                  error);
5683                         if (ret < 0)
5684                                 return ret;
5685                         *count = act->conf;
5686                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5687                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5688                         ++actions_n;
5689                         break;
5690                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5691                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5692                         ret = flow_dv_validate_action_port_id(dev,
5693                                                               sub_action_flags,
5694                                                               act,
5695                                                               attr,
5696                                                               error);
5697                         if (ret)
5698                                 return ret;
5699                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5700                         ++actions_n;
5701                         break;
5702                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5703                         ret = flow_dv_validate_action_raw_encap_decap
5704                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5705                                  &actions_n, action, item_flags, error);
5706                         if (ret < 0)
5707                                 return ret;
5708                         ++actions_n;
5709                         break;
5710                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5711                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5712                         ret = flow_dv_validate_action_l2_encap(dev,
5713                                                                sub_action_flags,
5714                                                                act, attr,
5715                                                                error);
5716                         if (ret < 0)
5717                                 return ret;
5718                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5719                         ++actions_n;
5720                         break;
5721                 default:
5722                         return rte_flow_error_set(error, ENOTSUP,
5723                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5724                                                   NULL,
5725                                                   "Doesn't support optional "
5726                                                   "action");
5727                 }
5728         }
5729         if (attr->ingress && !attr->transfer) {
5730                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5731                                           MLX5_FLOW_ACTION_RSS)))
5732                         return rte_flow_error_set(error, EINVAL,
5733                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5734                                                   NULL,
5735                                                   "Ingress must has a dest "
5736                                                   "QUEUE for Sample");
5737         } else if (attr->egress && !attr->transfer) {
5738                 return rte_flow_error_set(error, ENOTSUP,
5739                                           RTE_FLOW_ERROR_TYPE_ACTION,
5740                                           NULL,
5741                                           "Sample Only support Ingress "
5742                                           "or E-Switch");
5743         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5744                 MLX5_ASSERT(attr->transfer);
5745                 if (sample->ratio > 1)
5746                         return rte_flow_error_set(error, ENOTSUP,
5747                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5748                                                   NULL,
5749                                                   "E-Switch doesn't support "
5750                                                   "any optional action "
5751                                                   "for sampling");
5752                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5753                         return rte_flow_error_set(error, ENOTSUP,
5754                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5755                                                   NULL,
5756                                                   "unsupported action QUEUE");
5757                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5758                         return rte_flow_error_set(error, ENOTSUP,
5759                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5760                                                   NULL,
5761                                                   "unsupported action QUEUE");
5762                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5763                         return rte_flow_error_set(error, EINVAL,
5764                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5765                                                   NULL,
5766                                                   "E-Switch must has a dest "
5767                                                   "port for mirroring");
5768                 if (!priv->sh->cdev->config.hca_attr.reg_c_preserve &&
5769                      priv->representor_id != UINT16_MAX)
5770                         *fdb_mirror_limit = 1;
5771         }
5772         /* Continue validation for Xcap actions.*/
5773         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5774             (queue_index == 0xFFFF ||
5775              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5776                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5777                      MLX5_FLOW_XCAP_ACTIONS)
5778                         return rte_flow_error_set(error, ENOTSUP,
5779                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5780                                                   NULL, "encap and decap "
5781                                                   "combination aren't "
5782                                                   "supported");
5783                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5784                                                         MLX5_FLOW_ACTION_ENCAP))
5785                         return rte_flow_error_set(error, ENOTSUP,
5786                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5787                                                   NULL, "encap is not supported"
5788                                                   " for ingress traffic");
5789         }
5790         return 0;
5791 }
5792
5793 /**
5794  * Find existing modify-header resource or create and register a new one.
5795  *
5796  * @param dev[in, out]
5797  *   Pointer to rte_eth_dev structure.
5798  * @param[in, out] resource
5799  *   Pointer to modify-header resource.
5800  * @parm[in, out] dev_flow
5801  *   Pointer to the dev_flow.
5802  * @param[out] error
5803  *   pointer to error structure.
5804  *
5805  * @return
5806  *   0 on success otherwise -errno and errno is set.
5807  */
5808 static int
5809 flow_dv_modify_hdr_resource_register
5810                         (struct rte_eth_dev *dev,
5811                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5812                          struct mlx5_flow *dev_flow,
5813                          struct rte_flow_error *error)
5814 {
5815         struct mlx5_priv *priv = dev->data->dev_private;
5816         struct mlx5_dev_ctx_shared *sh = priv->sh;
5817         uint32_t key_len = sizeof(*resource) -
5818                            offsetof(typeof(*resource), ft_type) +
5819                            resource->actions_num * sizeof(resource->actions[0]);
5820         struct mlx5_list_entry *entry;
5821         struct mlx5_flow_cb_ctx ctx = {
5822                 .error = error,
5823                 .data = resource,
5824         };
5825         struct mlx5_hlist *modify_cmds;
5826         uint64_t key64;
5827
5828         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5829                                 "hdr_modify",
5830                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5831                                 true, false, sh,
5832                                 flow_dv_modify_create_cb,
5833                                 flow_dv_modify_match_cb,
5834                                 flow_dv_modify_remove_cb,
5835                                 flow_dv_modify_clone_cb,
5836                                 flow_dv_modify_clone_free_cb,
5837                                 error);
5838         if (unlikely(!modify_cmds))
5839                 return -rte_errno;
5840         resource->root = !dev_flow->dv.group;
5841         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5842                                                                 resource->root))
5843                 return rte_flow_error_set(error, EOVERFLOW,
5844                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5845                                           "too many modify header items");
5846         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5847         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5848         if (!entry)
5849                 return -rte_errno;
5850         resource = container_of(entry, typeof(*resource), entry);
5851         dev_flow->handle->dvh.modify_hdr = resource;
5852         return 0;
5853 }
5854
5855 /**
5856  * Get DV flow counter by index.
5857  *
5858  * @param[in] dev
5859  *   Pointer to the Ethernet device structure.
5860  * @param[in] idx
5861  *   mlx5 flow counter index in the container.
5862  * @param[out] ppool
5863  *   mlx5 flow counter pool in the container.
5864  *
5865  * @return
5866  *   Pointer to the counter, NULL otherwise.
5867  */
5868 static struct mlx5_flow_counter *
5869 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5870                            uint32_t idx,
5871                            struct mlx5_flow_counter_pool **ppool)
5872 {
5873         struct mlx5_priv *priv = dev->data->dev_private;
5874         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5875         struct mlx5_flow_counter_pool *pool;
5876
5877         /* Decrease to original index and clear shared bit. */
5878         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5879         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5880         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5881         MLX5_ASSERT(pool);
5882         if (ppool)
5883                 *ppool = pool;
5884         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5885 }
5886
5887 /**
5888  * Check the devx counter belongs to the pool.
5889  *
5890  * @param[in] pool
5891  *   Pointer to the counter pool.
5892  * @param[in] id
5893  *   The counter devx ID.
5894  *
5895  * @return
5896  *   True if counter belongs to the pool, false otherwise.
5897  */
5898 static bool
5899 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5900 {
5901         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5902                    MLX5_COUNTERS_PER_POOL;
5903
5904         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5905                 return true;
5906         return false;
5907 }
5908
5909 /**
5910  * Get a pool by devx counter ID.
5911  *
5912  * @param[in] cmng
5913  *   Pointer to the counter management.
5914  * @param[in] id
5915  *   The counter devx ID.
5916  *
5917  * @return
5918  *   The counter pool pointer if exists, NULL otherwise,
5919  */
5920 static struct mlx5_flow_counter_pool *
5921 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5922 {
5923         uint32_t i;
5924         struct mlx5_flow_counter_pool *pool = NULL;
5925
5926         rte_spinlock_lock(&cmng->pool_update_sl);
5927         /* Check last used pool. */
5928         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5929             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5930                 pool = cmng->pools[cmng->last_pool_idx];
5931                 goto out;
5932         }
5933         /* ID out of range means no suitable pool in the container. */
5934         if (id > cmng->max_id || id < cmng->min_id)
5935                 goto out;
5936         /*
5937          * Find the pool from the end of the container, since mostly counter
5938          * ID is sequence increasing, and the last pool should be the needed
5939          * one.
5940          */
5941         i = cmng->n_valid;
5942         while (i--) {
5943                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5944
5945                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5946                         pool = pool_tmp;
5947                         break;
5948                 }
5949         }
5950 out:
5951         rte_spinlock_unlock(&cmng->pool_update_sl);
5952         return pool;
5953 }
5954
5955 /**
5956  * Resize a counter container.
5957  *
5958  * @param[in] dev
5959  *   Pointer to the Ethernet device structure.
5960  *
5961  * @return
5962  *   0 on success, otherwise negative errno value and rte_errno is set.
5963  */
5964 static int
5965 flow_dv_container_resize(struct rte_eth_dev *dev)
5966 {
5967         struct mlx5_priv *priv = dev->data->dev_private;
5968         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5969         void *old_pools = cmng->pools;
5970         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5971         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5972         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5973
5974         if (!pools) {
5975                 rte_errno = ENOMEM;
5976                 return -ENOMEM;
5977         }
5978         if (old_pools)
5979                 memcpy(pools, old_pools, cmng->n *
5980                                        sizeof(struct mlx5_flow_counter_pool *));
5981         cmng->n = resize;
5982         cmng->pools = pools;
5983         if (old_pools)
5984                 mlx5_free(old_pools);
5985         return 0;
5986 }
5987
5988 /**
5989  * Query a devx flow counter.
5990  *
5991  * @param[in] dev
5992  *   Pointer to the Ethernet device structure.
5993  * @param[in] counter
5994  *   Index to the flow counter.
5995  * @param[out] pkts
5996  *   The statistics value of packets.
5997  * @param[out] bytes
5998  *   The statistics value of bytes.
5999  *
6000  * @return
6001  *   0 on success, otherwise a negative errno value and rte_errno is set.
6002  */
6003 static inline int
6004 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
6005                      uint64_t *bytes)
6006 {
6007         struct mlx5_priv *priv = dev->data->dev_private;
6008         struct mlx5_flow_counter_pool *pool = NULL;
6009         struct mlx5_flow_counter *cnt;
6010         int offset;
6011
6012         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6013         MLX5_ASSERT(pool);
6014         if (priv->sh->cmng.counter_fallback)
6015                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6016                                         0, pkts, bytes, 0, NULL, NULL, 0);
6017         rte_spinlock_lock(&pool->sl);
6018         if (!pool->raw) {
6019                 *pkts = 0;
6020                 *bytes = 0;
6021         } else {
6022                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6023                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6024                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6025         }
6026         rte_spinlock_unlock(&pool->sl);
6027         return 0;
6028 }
6029
6030 /**
6031  * Create and initialize a new counter pool.
6032  *
6033  * @param[in] dev
6034  *   Pointer to the Ethernet device structure.
6035  * @param[out] dcs
6036  *   The devX counter handle.
6037  * @param[in] age
6038  *   Whether the pool is for counter that was allocated for aging.
6039  * @param[in/out] cont_cur
6040  *   Pointer to the container pointer, it will be update in pool resize.
6041  *
6042  * @return
6043  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6044  */
6045 static struct mlx5_flow_counter_pool *
6046 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6047                     uint32_t age)
6048 {
6049         struct mlx5_priv *priv = dev->data->dev_private;
6050         struct mlx5_flow_counter_pool *pool;
6051         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6052         bool fallback = priv->sh->cmng.counter_fallback;
6053         uint32_t size = sizeof(*pool);
6054
6055         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6056         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6057         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6058         if (!pool) {
6059                 rte_errno = ENOMEM;
6060                 return NULL;
6061         }
6062         pool->raw = NULL;
6063         pool->is_aged = !!age;
6064         pool->query_gen = 0;
6065         pool->min_dcs = dcs;
6066         rte_spinlock_init(&pool->sl);
6067         rte_spinlock_init(&pool->csl);
6068         TAILQ_INIT(&pool->counters[0]);
6069         TAILQ_INIT(&pool->counters[1]);
6070         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6071         rte_spinlock_lock(&cmng->pool_update_sl);
6072         pool->index = cmng->n_valid;
6073         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6074                 mlx5_free(pool);
6075                 rte_spinlock_unlock(&cmng->pool_update_sl);
6076                 return NULL;
6077         }
6078         cmng->pools[pool->index] = pool;
6079         cmng->n_valid++;
6080         if (unlikely(fallback)) {
6081                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6082
6083                 if (base < cmng->min_id)
6084                         cmng->min_id = base;
6085                 if (base > cmng->max_id)
6086                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6087                 cmng->last_pool_idx = pool->index;
6088         }
6089         rte_spinlock_unlock(&cmng->pool_update_sl);
6090         return pool;
6091 }
6092
6093 /**
6094  * Prepare a new counter and/or a new counter pool.
6095  *
6096  * @param[in] dev
6097  *   Pointer to the Ethernet device structure.
6098  * @param[out] cnt_free
6099  *   Where to put the pointer of a new counter.
6100  * @param[in] age
6101  *   Whether the pool is for counter that was allocated for aging.
6102  *
6103  * @return
6104  *   The counter pool pointer and @p cnt_free is set on success,
6105  *   NULL otherwise and rte_errno is set.
6106  */
6107 static struct mlx5_flow_counter_pool *
6108 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6109                              struct mlx5_flow_counter **cnt_free,
6110                              uint32_t age)
6111 {
6112         struct mlx5_priv *priv = dev->data->dev_private;
6113         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6114         struct mlx5_flow_counter_pool *pool;
6115         struct mlx5_counters tmp_tq;
6116         struct mlx5_devx_obj *dcs = NULL;
6117         struct mlx5_flow_counter *cnt;
6118         enum mlx5_counter_type cnt_type =
6119                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6120         bool fallback = priv->sh->cmng.counter_fallback;
6121         uint32_t i;
6122
6123         if (fallback) {
6124                 /* bulk_bitmap must be 0 for single counter allocation. */
6125                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6126                 if (!dcs)
6127                         return NULL;
6128                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6129                 if (!pool) {
6130                         pool = flow_dv_pool_create(dev, dcs, age);
6131                         if (!pool) {
6132                                 mlx5_devx_cmd_destroy(dcs);
6133                                 return NULL;
6134                         }
6135                 }
6136                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6137                 cnt = MLX5_POOL_GET_CNT(pool, i);
6138                 cnt->pool = pool;
6139                 cnt->dcs_when_free = dcs;
6140                 *cnt_free = cnt;
6141                 return pool;
6142         }
6143         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6144         if (!dcs) {
6145                 rte_errno = ENODATA;
6146                 return NULL;
6147         }
6148         pool = flow_dv_pool_create(dev, dcs, age);
6149         if (!pool) {
6150                 mlx5_devx_cmd_destroy(dcs);
6151                 return NULL;
6152         }
6153         TAILQ_INIT(&tmp_tq);
6154         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6155                 cnt = MLX5_POOL_GET_CNT(pool, i);
6156                 cnt->pool = pool;
6157                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6158         }
6159         rte_spinlock_lock(&cmng->csl[cnt_type]);
6160         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6161         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6162         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6163         (*cnt_free)->pool = pool;
6164         return pool;
6165 }
6166
6167 /**
6168  * Allocate a flow counter.
6169  *
6170  * @param[in] dev
6171  *   Pointer to the Ethernet device structure.
6172  * @param[in] age
6173  *   Whether the counter was allocated for aging.
6174  *
6175  * @return
6176  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6177  */
6178 static uint32_t
6179 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6180 {
6181         struct mlx5_priv *priv = dev->data->dev_private;
6182         struct mlx5_flow_counter_pool *pool = NULL;
6183         struct mlx5_flow_counter *cnt_free = NULL;
6184         bool fallback = priv->sh->cmng.counter_fallback;
6185         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6186         enum mlx5_counter_type cnt_type =
6187                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6188         uint32_t cnt_idx;
6189
6190         if (!priv->sh->cdev->config.devx) {
6191                 rte_errno = ENOTSUP;
6192                 return 0;
6193         }
6194         /* Get free counters from container. */
6195         rte_spinlock_lock(&cmng->csl[cnt_type]);
6196         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6197         if (cnt_free)
6198                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6199         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6200         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6201                 goto err;
6202         pool = cnt_free->pool;
6203         if (fallback)
6204                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6205         /* Create a DV counter action only in the first time usage. */
6206         if (!cnt_free->action) {
6207                 uint16_t offset;
6208                 struct mlx5_devx_obj *dcs;
6209                 int ret;
6210
6211                 if (!fallback) {
6212                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6213                         dcs = pool->min_dcs;
6214                 } else {
6215                         offset = 0;
6216                         dcs = cnt_free->dcs_when_free;
6217                 }
6218                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6219                                                             &cnt_free->action);
6220                 if (ret) {
6221                         rte_errno = errno;
6222                         goto err;
6223                 }
6224         }
6225         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6226                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6227         /* Update the counter reset values. */
6228         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6229                                  &cnt_free->bytes))
6230                 goto err;
6231         if (!fallback && !priv->sh->cmng.query_thread_on)
6232                 /* Start the asynchronous batch query by the host thread. */
6233                 mlx5_set_query_alarm(priv->sh);
6234         /*
6235          * When the count action isn't shared (by ID), shared_info field is
6236          * used for indirect action API's refcnt.
6237          * When the counter action is not shared neither by ID nor by indirect
6238          * action API, shared info must be 1.
6239          */
6240         cnt_free->shared_info.refcnt = 1;
6241         return cnt_idx;
6242 err:
6243         if (cnt_free) {
6244                 cnt_free->pool = pool;
6245                 if (fallback)
6246                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6247                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6248                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6249                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6250         }
6251         return 0;
6252 }
6253
6254 /**
6255  * Get age param from counter index.
6256  *
6257  * @param[in] dev
6258  *   Pointer to the Ethernet device structure.
6259  * @param[in] counter
6260  *   Index to the counter handler.
6261  *
6262  * @return
6263  *   The aging parameter specified for the counter index.
6264  */
6265 static struct mlx5_age_param*
6266 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6267                                 uint32_t counter)
6268 {
6269         struct mlx5_flow_counter *cnt;
6270         struct mlx5_flow_counter_pool *pool = NULL;
6271
6272         flow_dv_counter_get_by_idx(dev, counter, &pool);
6273         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6274         cnt = MLX5_POOL_GET_CNT(pool, counter);
6275         return MLX5_CNT_TO_AGE(cnt);
6276 }
6277
6278 /**
6279  * Remove a flow counter from aged counter list.
6280  *
6281  * @param[in] dev
6282  *   Pointer to the Ethernet device structure.
6283  * @param[in] counter
6284  *   Index to the counter handler.
6285  * @param[in] cnt
6286  *   Pointer to the counter handler.
6287  */
6288 static void
6289 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6290                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6291 {
6292         struct mlx5_age_info *age_info;
6293         struct mlx5_age_param *age_param;
6294         struct mlx5_priv *priv = dev->data->dev_private;
6295         uint16_t expected = AGE_CANDIDATE;
6296
6297         age_info = GET_PORT_AGE_INFO(priv);
6298         age_param = flow_dv_counter_idx_get_age(dev, counter);
6299         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6300                                          AGE_FREE, false, __ATOMIC_RELAXED,
6301                                          __ATOMIC_RELAXED)) {
6302                 /**
6303                  * We need the lock even it is age timeout,
6304                  * since counter may still in process.
6305                  */
6306                 rte_spinlock_lock(&age_info->aged_sl);
6307                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6308                 rte_spinlock_unlock(&age_info->aged_sl);
6309                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6310         }
6311 }
6312
6313 /**
6314  * Release a flow counter.
6315  *
6316  * @param[in] dev
6317  *   Pointer to the Ethernet device structure.
6318  * @param[in] counter
6319  *   Index to the counter handler.
6320  */
6321 static void
6322 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6323 {
6324         struct mlx5_priv *priv = dev->data->dev_private;
6325         struct mlx5_flow_counter_pool *pool = NULL;
6326         struct mlx5_flow_counter *cnt;
6327         enum mlx5_counter_type cnt_type;
6328
6329         if (!counter)
6330                 return;
6331         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6332         MLX5_ASSERT(pool);
6333         if (pool->is_aged) {
6334                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6335         } else {
6336                 /*
6337                  * If the counter action is shared by indirect action API,
6338                  * the atomic function reduces its references counter.
6339                  * If after the reduction the action is still referenced, the
6340                  * function returns here and does not release it.
6341                  * When the counter action is not shared by
6342                  * indirect action API, shared info is 1 before the reduction,
6343                  * so this condition is failed and function doesn't return here.
6344                  */
6345                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6346                                        __ATOMIC_RELAXED))
6347                         return;
6348         }
6349         cnt->pool = pool;
6350         /*
6351          * Put the counter back to list to be updated in none fallback mode.
6352          * Currently, we are using two list alternately, while one is in query,
6353          * add the freed counter to the other list based on the pool query_gen
6354          * value. After query finishes, add counter the list to the global
6355          * container counter list. The list changes while query starts. In
6356          * this case, lock will not be needed as query callback and release
6357          * function both operate with the different list.
6358          */
6359         if (!priv->sh->cmng.counter_fallback) {
6360                 rte_spinlock_lock(&pool->csl);
6361                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6362                 rte_spinlock_unlock(&pool->csl);
6363         } else {
6364                 cnt->dcs_when_free = cnt->dcs_when_active;
6365                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6366                                            MLX5_COUNTER_TYPE_ORIGIN;
6367                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6368                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6369                                   cnt, next);
6370                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6371         }
6372 }
6373
6374 /**
6375  * Resize a meter id container.
6376  *
6377  * @param[in] dev
6378  *   Pointer to the Ethernet device structure.
6379  *
6380  * @return
6381  *   0 on success, otherwise negative errno value and rte_errno is set.
6382  */
6383 static int
6384 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6385 {
6386         struct mlx5_priv *priv = dev->data->dev_private;
6387         struct mlx5_aso_mtr_pools_mng *pools_mng =
6388                                 &priv->sh->mtrmng->pools_mng;
6389         void *old_pools = pools_mng->pools;
6390         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6391         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6392         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6393
6394         if (!pools) {
6395                 rte_errno = ENOMEM;
6396                 return -ENOMEM;
6397         }
6398         if (!pools_mng->n)
6399                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6400                         mlx5_free(pools);
6401                         return -ENOMEM;
6402                 }
6403         if (old_pools)
6404                 memcpy(pools, old_pools, pools_mng->n *
6405                                        sizeof(struct mlx5_aso_mtr_pool *));
6406         pools_mng->n = resize;
6407         pools_mng->pools = pools;
6408         if (old_pools)
6409                 mlx5_free(old_pools);
6410         return 0;
6411 }
6412
6413 /**
6414  * Prepare a new meter and/or a new meter pool.
6415  *
6416  * @param[in] dev
6417  *   Pointer to the Ethernet device structure.
6418  * @param[out] mtr_free
6419  *   Where to put the pointer of a new meter.g.
6420  *
6421  * @return
6422  *   The meter pool pointer and @mtr_free is set on success,
6423  *   NULL otherwise and rte_errno is set.
6424  */
6425 static struct mlx5_aso_mtr_pool *
6426 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6427 {
6428         struct mlx5_priv *priv = dev->data->dev_private;
6429         struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6430         struct mlx5_aso_mtr_pool *pool = NULL;
6431         struct mlx5_devx_obj *dcs = NULL;
6432         uint32_t i;
6433         uint32_t log_obj_size;
6434
6435         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6436         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6437                                                       priv->sh->cdev->pdn,
6438                                                       log_obj_size);
6439         if (!dcs) {
6440                 rte_errno = ENODATA;
6441                 return NULL;
6442         }
6443         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6444         if (!pool) {
6445                 rte_errno = ENOMEM;
6446                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6447                 return NULL;
6448         }
6449         pool->devx_obj = dcs;
6450         rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6451         pool->index = pools_mng->n_valid;
6452         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6453                 mlx5_free(pool);
6454                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6455                 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6456                 return NULL;
6457         }
6458         pools_mng->pools[pool->index] = pool;
6459         pools_mng->n_valid++;
6460         rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6461         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6462                 pool->mtrs[i].offset = i;
6463                 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6464         }
6465         pool->mtrs[0].offset = 0;
6466         *mtr_free = &pool->mtrs[0];
6467         return pool;
6468 }
6469
6470 /**
6471  * Release a flow meter into pool.
6472  *
6473  * @param[in] dev
6474  *   Pointer to the Ethernet device structure.
6475  * @param[in] mtr_idx
6476  *   Index to aso flow meter.
6477  */
6478 static void
6479 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6480 {
6481         struct mlx5_priv *priv = dev->data->dev_private;
6482         struct mlx5_aso_mtr_pools_mng *pools_mng =
6483                                 &priv->sh->mtrmng->pools_mng;
6484         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6485
6486         MLX5_ASSERT(aso_mtr);
6487         rte_spinlock_lock(&pools_mng->mtrsl);
6488         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6489         aso_mtr->state = ASO_METER_FREE;
6490         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6491         rte_spinlock_unlock(&pools_mng->mtrsl);
6492 }
6493
6494 /**
6495  * Allocate a aso flow meter.
6496  *
6497  * @param[in] dev
6498  *   Pointer to the Ethernet device structure.
6499  *
6500  * @return
6501  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6502  */
6503 static uint32_t
6504 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6505 {
6506         struct mlx5_priv *priv = dev->data->dev_private;
6507         struct mlx5_aso_mtr *mtr_free = NULL;
6508         struct mlx5_aso_mtr_pools_mng *pools_mng =
6509                                 &priv->sh->mtrmng->pools_mng;
6510         struct mlx5_aso_mtr_pool *pool;
6511         uint32_t mtr_idx = 0;
6512
6513         if (!priv->sh->cdev->config.devx) {
6514                 rte_errno = ENOTSUP;
6515                 return 0;
6516         }
6517         /* Allocate the flow meter memory. */
6518         /* Get free meters from management. */
6519         rte_spinlock_lock(&pools_mng->mtrsl);
6520         mtr_free = LIST_FIRST(&pools_mng->meters);
6521         if (mtr_free)
6522                 LIST_REMOVE(mtr_free, next);
6523         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6524                 rte_spinlock_unlock(&pools_mng->mtrsl);
6525                 return 0;
6526         }
6527         mtr_free->state = ASO_METER_WAIT;
6528         rte_spinlock_unlock(&pools_mng->mtrsl);
6529         pool = container_of(mtr_free,
6530                         struct mlx5_aso_mtr_pool,
6531                         mtrs[mtr_free->offset]);
6532         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6533         if (!mtr_free->fm.meter_action) {
6534 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6535                 struct rte_flow_error error;
6536                 uint8_t reg_id;
6537
6538                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6539                 mtr_free->fm.meter_action =
6540                         mlx5_glue->dv_create_flow_action_aso
6541                                                 (priv->sh->rx_domain,
6542                                                  pool->devx_obj->obj,
6543                                                  mtr_free->offset,
6544                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6545                                                  reg_id - REG_C_0);
6546 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6547                 if (!mtr_free->fm.meter_action) {
6548                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6549                         return 0;
6550                 }
6551         }
6552         return mtr_idx;
6553 }
6554
6555 /**
6556  * Verify the @p attributes will be correctly understood by the NIC and store
6557  * them in the @p flow if everything is correct.
6558  *
6559  * @param[in] dev
6560  *   Pointer to dev struct.
6561  * @param[in] attributes
6562  *   Pointer to flow attributes
6563  * @param[in] external
6564  *   This flow rule is created by request external to PMD.
6565  * @param[out] error
6566  *   Pointer to error structure.
6567  *
6568  * @return
6569  *   - 0 on success and non root table.
6570  *   - 1 on success and root table.
6571  *   - a negative errno value otherwise and rte_errno is set.
6572  */
6573 static int
6574 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6575                             const struct mlx5_flow_tunnel *tunnel,
6576                             const struct rte_flow_attr *attributes,
6577                             const struct flow_grp_info *grp_info,
6578                             struct rte_flow_error *error)
6579 {
6580         struct mlx5_priv *priv = dev->data->dev_private;
6581         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6582         int ret = 0;
6583
6584 #ifndef HAVE_MLX5DV_DR
6585         RTE_SET_USED(tunnel);
6586         RTE_SET_USED(grp_info);
6587         if (attributes->group)
6588                 return rte_flow_error_set(error, ENOTSUP,
6589                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6590                                           NULL,
6591                                           "groups are not supported");
6592 #else
6593         uint32_t table = 0;
6594
6595         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6596                                        grp_info, error);
6597         if (ret)
6598                 return ret;
6599         if (!table)
6600                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6601 #endif
6602         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6603             attributes->priority > lowest_priority)
6604                 return rte_flow_error_set(error, ENOTSUP,
6605                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6606                                           NULL,
6607                                           "priority out of range");
6608         if (attributes->transfer) {
6609                 if (!priv->sh->config.dv_esw_en)
6610                         return rte_flow_error_set
6611                                 (error, ENOTSUP,
6612                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6613                                  "E-Switch dr is not supported");
6614                 if (attributes->egress)
6615                         return rte_flow_error_set
6616                                 (error, ENOTSUP,
6617                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6618                                  "egress is not supported");
6619         }
6620         if (!(attributes->egress ^ attributes->ingress))
6621                 return rte_flow_error_set(error, ENOTSUP,
6622                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6623                                           "must specify exactly one of "
6624                                           "ingress or egress");
6625         return ret;
6626 }
6627
6628 static int
6629 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6630                         int64_t pattern_flags, uint64_t l3_flags,
6631                         uint64_t l4_flags, uint64_t ip4_flag,
6632                         struct rte_flow_error *error)
6633 {
6634         if (mask->l3_ok && !(pattern_flags & l3_flags))
6635                 return rte_flow_error_set(error, EINVAL,
6636                                           RTE_FLOW_ERROR_TYPE_ITEM,
6637                                           NULL, "missing L3 protocol");
6638
6639         if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6640                 return rte_flow_error_set(error, EINVAL,
6641                                           RTE_FLOW_ERROR_TYPE_ITEM,
6642                                           NULL, "missing IPv4 protocol");
6643
6644         if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6645                 return rte_flow_error_set(error, EINVAL,
6646                                           RTE_FLOW_ERROR_TYPE_ITEM,
6647                                           NULL, "missing L4 protocol");
6648
6649         return 0;
6650 }
6651
6652 static int
6653 flow_dv_validate_item_integrity_post(const struct
6654                                      rte_flow_item *integrity_items[2],
6655                                      int64_t pattern_flags,
6656                                      struct rte_flow_error *error)
6657 {
6658         const struct rte_flow_item_integrity *mask;
6659         int ret;
6660
6661         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6662                 mask = (typeof(mask))integrity_items[0]->mask;
6663                 ret = validate_integrity_bits(mask, pattern_flags,
6664                                               MLX5_FLOW_LAYER_OUTER_L3,
6665                                               MLX5_FLOW_LAYER_OUTER_L4,
6666                                               MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6667                                               error);
6668                 if (ret)
6669                         return ret;
6670         }
6671         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6672                 mask = (typeof(mask))integrity_items[1]->mask;
6673                 ret = validate_integrity_bits(mask, pattern_flags,
6674                                               MLX5_FLOW_LAYER_INNER_L3,
6675                                               MLX5_FLOW_LAYER_INNER_L4,
6676                                               MLX5_FLOW_LAYER_INNER_L3_IPV4,
6677                                               error);
6678                 if (ret)
6679                         return ret;
6680         }
6681         return 0;
6682 }
6683
6684 static int
6685 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6686                                 const struct rte_flow_item *integrity_item,
6687                                 uint64_t pattern_flags, uint64_t *last_item,
6688                                 const struct rte_flow_item *integrity_items[2],
6689                                 struct rte_flow_error *error)
6690 {
6691         struct mlx5_priv *priv = dev->data->dev_private;
6692         const struct rte_flow_item_integrity *mask = (typeof(mask))
6693                                                      integrity_item->mask;
6694         const struct rte_flow_item_integrity *spec = (typeof(spec))
6695                                                      integrity_item->spec;
6696
6697         if (!priv->sh->cdev->config.hca_attr.pkt_integrity_match)
6698                 return rte_flow_error_set(error, ENOTSUP,
6699                                           RTE_FLOW_ERROR_TYPE_ITEM,
6700                                           integrity_item,
6701                                           "packet integrity integrity_item not supported");
6702         if (!spec)
6703                 return rte_flow_error_set(error, ENOTSUP,
6704                                           RTE_FLOW_ERROR_TYPE_ITEM,
6705                                           integrity_item,
6706                                           "no spec for integrity item");
6707         if (!mask)
6708                 mask = &rte_flow_item_integrity_mask;
6709         if (!mlx5_validate_integrity_item(mask))
6710                 return rte_flow_error_set(error, ENOTSUP,
6711                                           RTE_FLOW_ERROR_TYPE_ITEM,
6712                                           integrity_item,
6713                                           "unsupported integrity filter");
6714         if (spec->level > 1) {
6715                 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6716                         return rte_flow_error_set
6717                                 (error, ENOTSUP,
6718                                  RTE_FLOW_ERROR_TYPE_ITEM,
6719                                  NULL, "multiple inner integrity items not supported");
6720                 integrity_items[1] = integrity_item;
6721                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6722         } else {
6723                 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6724                         return rte_flow_error_set
6725                                 (error, ENOTSUP,
6726                                  RTE_FLOW_ERROR_TYPE_ITEM,
6727                                  NULL, "multiple outer integrity items not supported");
6728                 integrity_items[0] = integrity_item;
6729                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6730         }
6731         return 0;
6732 }
6733
6734 static int
6735 flow_dv_validate_item_flex(struct rte_eth_dev *dev,
6736                            const struct rte_flow_item *item,
6737                            uint64_t item_flags,
6738                            uint64_t *last_item,
6739                            bool is_inner,
6740                            struct rte_flow_error *error)
6741 {
6742         const struct rte_flow_item_flex *flow_spec = item->spec;
6743         const struct rte_flow_item_flex *flow_mask = item->mask;
6744         struct mlx5_flex_item *flex;
6745
6746         if (!flow_spec)
6747                 return rte_flow_error_set(error, EINVAL,
6748                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6749                                           "flex flow item spec cannot be NULL");
6750         if (!flow_mask)
6751                 return rte_flow_error_set(error, EINVAL,
6752                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6753                                           "flex flow item mask cannot be NULL");
6754         if (item->last)
6755                 return rte_flow_error_set(error, ENOTSUP,
6756                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6757                                           "flex flow item last not supported");
6758         if (mlx5_flex_acquire_index(dev, flow_spec->handle, false) < 0)
6759                 return rte_flow_error_set(error, EINVAL,
6760                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6761                                           "invalid flex flow item handle");
6762         flex = (struct mlx5_flex_item *)flow_spec->handle;
6763         switch (flex->tunnel_mode) {
6764         case FLEX_TUNNEL_MODE_SINGLE:
6765                 if (item_flags &
6766                     (MLX5_FLOW_ITEM_OUTER_FLEX | MLX5_FLOW_ITEM_INNER_FLEX))
6767                         rte_flow_error_set(error, EINVAL,
6768                                            RTE_FLOW_ERROR_TYPE_ITEM,
6769                                            NULL, "multiple flex items not supported");
6770                 break;
6771         case FLEX_TUNNEL_MODE_OUTER:
6772                 if (is_inner)
6773                         rte_flow_error_set(error, EINVAL,
6774                                            RTE_FLOW_ERROR_TYPE_ITEM,
6775                                            NULL, "inner flex item was not configured");
6776                 if (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX)
6777                         rte_flow_error_set(error, ENOTSUP,
6778                                            RTE_FLOW_ERROR_TYPE_ITEM,
6779                                            NULL, "multiple flex items not supported");
6780                 break;
6781         case FLEX_TUNNEL_MODE_INNER:
6782                 if (!is_inner)
6783                         rte_flow_error_set(error, EINVAL,
6784                                            RTE_FLOW_ERROR_TYPE_ITEM,
6785                                            NULL, "outer flex item was not configured");
6786                 if (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)
6787                         rte_flow_error_set(error, EINVAL,
6788                                            RTE_FLOW_ERROR_TYPE_ITEM,
6789                                            NULL, "multiple flex items not supported");
6790                 break;
6791         case FLEX_TUNNEL_MODE_MULTI:
6792                 if ((is_inner && (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)) ||
6793                     (!is_inner && (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX))) {
6794                         rte_flow_error_set(error, EINVAL,
6795                                            RTE_FLOW_ERROR_TYPE_ITEM,
6796                                            NULL, "multiple flex items not supported");
6797                 }
6798                 break;
6799         case FLEX_TUNNEL_MODE_TUNNEL:
6800                 if (is_inner || (item_flags & MLX5_FLOW_ITEM_FLEX_TUNNEL))
6801                         rte_flow_error_set(error, EINVAL,
6802                                            RTE_FLOW_ERROR_TYPE_ITEM,
6803                                            NULL, "multiple flex tunnel items not supported");
6804                 break;
6805         default:
6806                 rte_flow_error_set(error, EINVAL,
6807                                    RTE_FLOW_ERROR_TYPE_ITEM,
6808                                    NULL, "invalid flex item configuration");
6809         }
6810         *last_item = flex->tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ?
6811                      MLX5_FLOW_ITEM_FLEX_TUNNEL : is_inner ?
6812                      MLX5_FLOW_ITEM_INNER_FLEX : MLX5_FLOW_ITEM_OUTER_FLEX;
6813         return 0;
6814 }
6815
6816 /**
6817  * Internal validation function. For validating both actions and items.
6818  *
6819  * @param[in] dev
6820  *   Pointer to the rte_eth_dev structure.
6821  * @param[in] attr
6822  *   Pointer to the flow attributes.
6823  * @param[in] items
6824  *   Pointer to the list of items.
6825  * @param[in] actions
6826  *   Pointer to the list of actions.
6827  * @param[in] external
6828  *   This flow rule is created by request external to PMD.
6829  * @param[in] hairpin
6830  *   Number of hairpin TX actions, 0 means classic flow.
6831  * @param[out] error
6832  *   Pointer to the error structure.
6833  *
6834  * @return
6835  *   0 on success, a negative errno value otherwise and rte_errno is set.
6836  */
6837 static int
6838 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6839                  const struct rte_flow_item items[],
6840                  const struct rte_flow_action actions[],
6841                  bool external, int hairpin, struct rte_flow_error *error)
6842 {
6843         int ret;
6844         uint64_t action_flags = 0;
6845         uint64_t item_flags = 0;
6846         uint64_t last_item = 0;
6847         uint8_t next_protocol = 0xff;
6848         uint16_t ether_type = 0;
6849         int actions_n = 0;
6850         uint8_t item_ipv6_proto = 0;
6851         int fdb_mirror_limit = 0;
6852         int modify_after_mirror = 0;
6853         const struct rte_flow_item *geneve_item = NULL;
6854         const struct rte_flow_item *gre_item = NULL;
6855         const struct rte_flow_item *gtp_item = NULL;
6856         const struct rte_flow_action_raw_decap *decap;
6857         const struct rte_flow_action_raw_encap *encap;
6858         const struct rte_flow_action_rss *rss = NULL;
6859         const struct rte_flow_action_rss *sample_rss = NULL;
6860         const struct rte_flow_action_count *sample_count = NULL;
6861         const struct rte_flow_item_tcp nic_tcp_mask = {
6862                 .hdr = {
6863                         .tcp_flags = 0xFF,
6864                         .src_port = RTE_BE16(UINT16_MAX),
6865                         .dst_port = RTE_BE16(UINT16_MAX),
6866                 }
6867         };
6868         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6869                 .hdr = {
6870                         .src_addr =
6871                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6872                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6873                         .dst_addr =
6874                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6875                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6876                         .vtc_flow = RTE_BE32(0xffffffff),
6877                         .proto = 0xff,
6878                         .hop_limits = 0xff,
6879                 },
6880                 .has_frag_ext = 1,
6881         };
6882         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6883                 .hdr = {
6884                         .common = {
6885                                 .u32 =
6886                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6887                                         .type = 0xFF,
6888                                         }).u32),
6889                         },
6890                         .dummy[0] = 0xffffffff,
6891                 },
6892         };
6893         struct mlx5_priv *priv = dev->data->dev_private;
6894         struct mlx5_sh_config *dev_conf = &priv->sh->config;
6895         uint16_t queue_index = 0xFFFF;
6896         const struct rte_flow_item_vlan *vlan_m = NULL;
6897         uint32_t rw_act_num = 0;
6898         uint64_t is_root;
6899         const struct mlx5_flow_tunnel *tunnel;
6900         enum mlx5_tof_rule_type tof_rule_type;
6901         struct flow_grp_info grp_info = {
6902                 .external = !!external,
6903                 .transfer = !!attr->transfer,
6904                 .fdb_def_rule = !!priv->fdb_def_rule,
6905                 .std_tbl_fix = true,
6906         };
6907         const struct rte_eth_hairpin_conf *conf;
6908         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6909         const struct rte_flow_item *port_id_item = NULL;
6910         bool def_policy = false;
6911         uint16_t udp_dport = 0;
6912
6913         if (items == NULL)
6914                 return -1;
6915         tunnel = is_tunnel_offload_active(dev) ?
6916                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6917         if (tunnel) {
6918                 if (!dev_conf->dv_flow_en)
6919                         return rte_flow_error_set
6920                                 (error, ENOTSUP,
6921                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6922                                  NULL, "tunnel offload requires DV flow interface");
6923                 if (priv->representor)
6924                         return rte_flow_error_set
6925                                 (error, ENOTSUP,
6926                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6927                                  NULL, "decap not supported for VF representor");
6928                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6929                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6930                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6931                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6932                                         MLX5_FLOW_ACTION_DECAP;
6933                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6934                                         (dev, attr, tunnel, tof_rule_type);
6935         }
6936         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6937         if (ret < 0)
6938                 return ret;
6939         is_root = (uint64_t)ret;
6940         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6941                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6942                 int type = items->type;
6943
6944                 if (!mlx5_flow_os_item_supported(type))
6945                         return rte_flow_error_set(error, ENOTSUP,
6946                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6947                                                   NULL, "item not supported");
6948                 switch (type) {
6949                 case RTE_FLOW_ITEM_TYPE_VOID:
6950                         break;
6951                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6952                         ret = flow_dv_validate_item_port_id
6953                                         (dev, items, attr, item_flags, error);
6954                         if (ret < 0)
6955                                 return ret;
6956                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6957                         port_id_item = items;
6958                         break;
6959                 case RTE_FLOW_ITEM_TYPE_ETH:
6960                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6961                                                           true, error);
6962                         if (ret < 0)
6963                                 return ret;
6964                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6965                                              MLX5_FLOW_LAYER_OUTER_L2;
6966                         if (items->mask != NULL && items->spec != NULL) {
6967                                 ether_type =
6968                                         ((const struct rte_flow_item_eth *)
6969                                          items->spec)->type;
6970                                 ether_type &=
6971                                         ((const struct rte_flow_item_eth *)
6972                                          items->mask)->type;
6973                                 ether_type = rte_be_to_cpu_16(ether_type);
6974                         } else {
6975                                 ether_type = 0;
6976                         }
6977                         break;
6978                 case RTE_FLOW_ITEM_TYPE_VLAN:
6979                         ret = flow_dv_validate_item_vlan(items, item_flags,
6980                                                          dev, error);
6981                         if (ret < 0)
6982                                 return ret;
6983                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6984                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6985                         if (items->mask != NULL && items->spec != NULL) {
6986                                 ether_type =
6987                                         ((const struct rte_flow_item_vlan *)
6988                                          items->spec)->inner_type;
6989                                 ether_type &=
6990                                         ((const struct rte_flow_item_vlan *)
6991                                          items->mask)->inner_type;
6992                                 ether_type = rte_be_to_cpu_16(ether_type);
6993                         } else {
6994                                 ether_type = 0;
6995                         }
6996                         /* Store outer VLAN mask for of_push_vlan action. */
6997                         if (!tunnel)
6998                                 vlan_m = items->mask;
6999                         break;
7000                 case RTE_FLOW_ITEM_TYPE_IPV4:
7001                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7002                                                   &item_flags, &tunnel);
7003                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7004                                                          last_item, ether_type,
7005                                                          error);
7006                         if (ret < 0)
7007                                 return ret;
7008                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7009                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7010                         if (items->mask != NULL &&
7011                             ((const struct rte_flow_item_ipv4 *)
7012                              items->mask)->hdr.next_proto_id) {
7013                                 next_protocol =
7014                                         ((const struct rte_flow_item_ipv4 *)
7015                                          (items->spec))->hdr.next_proto_id;
7016                                 next_protocol &=
7017                                         ((const struct rte_flow_item_ipv4 *)
7018                                          (items->mask))->hdr.next_proto_id;
7019                         } else {
7020                                 /* Reset for inner layer. */
7021                                 next_protocol = 0xff;
7022                         }
7023                         break;
7024                 case RTE_FLOW_ITEM_TYPE_IPV6:
7025                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7026                                                   &item_flags, &tunnel);
7027                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7028                                                            last_item,
7029                                                            ether_type,
7030                                                            &nic_ipv6_mask,
7031                                                            error);
7032                         if (ret < 0)
7033                                 return ret;
7034                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7035                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7036                         if (items->mask != NULL &&
7037                             ((const struct rte_flow_item_ipv6 *)
7038                              items->mask)->hdr.proto) {
7039                                 item_ipv6_proto =
7040                                         ((const struct rte_flow_item_ipv6 *)
7041                                          items->spec)->hdr.proto;
7042                                 next_protocol =
7043                                         ((const struct rte_flow_item_ipv6 *)
7044                                          items->spec)->hdr.proto;
7045                                 next_protocol &=
7046                                         ((const struct rte_flow_item_ipv6 *)
7047                                          items->mask)->hdr.proto;
7048                         } else {
7049                                 /* Reset for inner layer. */
7050                                 next_protocol = 0xff;
7051                         }
7052                         break;
7053                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7054                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
7055                                                                   item_flags,
7056                                                                   error);
7057                         if (ret < 0)
7058                                 return ret;
7059                         last_item = tunnel ?
7060                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7061                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7062                         if (items->mask != NULL &&
7063                             ((const struct rte_flow_item_ipv6_frag_ext *)
7064                              items->mask)->hdr.next_header) {
7065                                 next_protocol =
7066                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7067                                  items->spec)->hdr.next_header;
7068                                 next_protocol &=
7069                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7070                                  items->mask)->hdr.next_header;
7071                         } else {
7072                                 /* Reset for inner layer. */
7073                                 next_protocol = 0xff;
7074                         }
7075                         break;
7076                 case RTE_FLOW_ITEM_TYPE_TCP:
7077                         ret = mlx5_flow_validate_item_tcp
7078                                                 (items, item_flags,
7079                                                  next_protocol,
7080                                                  &nic_tcp_mask,
7081                                                  error);
7082                         if (ret < 0)
7083                                 return ret;
7084                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7085                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7086                         break;
7087                 case RTE_FLOW_ITEM_TYPE_UDP:
7088                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7089                                                           next_protocol,
7090                                                           error);
7091                         const struct rte_flow_item_udp *spec = items->spec;
7092                         const struct rte_flow_item_udp *mask = items->mask;
7093                         if (!mask)
7094                                 mask = &rte_flow_item_udp_mask;
7095                         if (spec != NULL)
7096                                 udp_dport = rte_be_to_cpu_16
7097                                                 (spec->hdr.dst_port &
7098                                                  mask->hdr.dst_port);
7099                         if (ret < 0)
7100                                 return ret;
7101                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7102                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7103                         break;
7104                 case RTE_FLOW_ITEM_TYPE_GRE:
7105                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7106                                                           next_protocol, error);
7107                         if (ret < 0)
7108                                 return ret;
7109                         gre_item = items;
7110                         last_item = MLX5_FLOW_LAYER_GRE;
7111                         break;
7112                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7113                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7114                                                             next_protocol,
7115                                                             error);
7116                         if (ret < 0)
7117                                 return ret;
7118                         last_item = MLX5_FLOW_LAYER_NVGRE;
7119                         break;
7120                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7121                         ret = mlx5_flow_validate_item_gre_key
7122                                 (items, item_flags, gre_item, error);
7123                         if (ret < 0)
7124                                 return ret;
7125                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7126                         break;
7127                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7128                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7129                                                             items, item_flags,
7130                                                             attr, error);
7131                         if (ret < 0)
7132                                 return ret;
7133                         last_item = MLX5_FLOW_LAYER_VXLAN;
7134                         break;
7135                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7136                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7137                                                                 item_flags, dev,
7138                                                                 error);
7139                         if (ret < 0)
7140                                 return ret;
7141                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7142                         break;
7143                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7144                         ret = mlx5_flow_validate_item_geneve(items,
7145                                                              item_flags, dev,
7146                                                              error);
7147                         if (ret < 0)
7148                                 return ret;
7149                         geneve_item = items;
7150                         last_item = MLX5_FLOW_LAYER_GENEVE;
7151                         break;
7152                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7153                         ret = mlx5_flow_validate_item_geneve_opt(items,
7154                                                                  last_item,
7155                                                                  geneve_item,
7156                                                                  dev,
7157                                                                  error);
7158                         if (ret < 0)
7159                                 return ret;
7160                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7161                         break;
7162                 case RTE_FLOW_ITEM_TYPE_MPLS:
7163                         ret = mlx5_flow_validate_item_mpls(dev, items,
7164                                                            item_flags,
7165                                                            last_item, error);
7166                         if (ret < 0)
7167                                 return ret;
7168                         last_item = MLX5_FLOW_LAYER_MPLS;
7169                         break;
7170
7171                 case RTE_FLOW_ITEM_TYPE_MARK:
7172                         ret = flow_dv_validate_item_mark(dev, items, attr,
7173                                                          error);
7174                         if (ret < 0)
7175                                 return ret;
7176                         last_item = MLX5_FLOW_ITEM_MARK;
7177                         break;
7178                 case RTE_FLOW_ITEM_TYPE_META:
7179                         ret = flow_dv_validate_item_meta(dev, items, attr,
7180                                                          error);
7181                         if (ret < 0)
7182                                 return ret;
7183                         last_item = MLX5_FLOW_ITEM_METADATA;
7184                         break;
7185                 case RTE_FLOW_ITEM_TYPE_ICMP:
7186                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7187                                                            next_protocol,
7188                                                            error);
7189                         if (ret < 0)
7190                                 return ret;
7191                         last_item = MLX5_FLOW_LAYER_ICMP;
7192                         break;
7193                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7194                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7195                                                             next_protocol,
7196                                                             error);
7197                         if (ret < 0)
7198                                 return ret;
7199                         item_ipv6_proto = IPPROTO_ICMPV6;
7200                         last_item = MLX5_FLOW_LAYER_ICMP6;
7201                         break;
7202                 case RTE_FLOW_ITEM_TYPE_TAG:
7203                         ret = flow_dv_validate_item_tag(dev, items,
7204                                                         attr, error);
7205                         if (ret < 0)
7206                                 return ret;
7207                         last_item = MLX5_FLOW_ITEM_TAG;
7208                         break;
7209                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7210                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7211                         break;
7212                 case RTE_FLOW_ITEM_TYPE_GTP:
7213                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7214                                                         error);
7215                         if (ret < 0)
7216                                 return ret;
7217                         gtp_item = items;
7218                         last_item = MLX5_FLOW_LAYER_GTP;
7219                         break;
7220                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7221                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7222                                                             gtp_item, attr,
7223                                                             error);
7224                         if (ret < 0)
7225                                 return ret;
7226                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7227                         break;
7228                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7229                         /* Capacity will be checked in the translate stage. */
7230                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7231                                                             last_item,
7232                                                             ether_type,
7233                                                             &nic_ecpri_mask,
7234                                                             error);
7235                         if (ret < 0)
7236                                 return ret;
7237                         last_item = MLX5_FLOW_LAYER_ECPRI;
7238                         break;
7239                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7240                         ret = flow_dv_validate_item_integrity(dev, items,
7241                                                               item_flags,
7242                                                               &last_item,
7243                                                               integrity_items,
7244                                                               error);
7245                         if (ret < 0)
7246                                 return ret;
7247                         break;
7248                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7249                         ret = flow_dv_validate_item_aso_ct(dev, items,
7250                                                            &item_flags, error);
7251                         if (ret < 0)
7252                                 return ret;
7253                         break;
7254                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7255                         /* tunnel offload item was processed before
7256                          * list it here as a supported type
7257                          */
7258                         break;
7259                 case RTE_FLOW_ITEM_TYPE_FLEX:
7260                         ret = flow_dv_validate_item_flex(dev, items, item_flags,
7261                                                          &last_item,
7262                                                          tunnel != 0, error);
7263                         if (ret < 0)
7264                                 return ret;
7265                         break;
7266                 default:
7267                         return rte_flow_error_set(error, ENOTSUP,
7268                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7269                                                   NULL, "item not supported");
7270                 }
7271                 item_flags |= last_item;
7272         }
7273         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7274                 ret = flow_dv_validate_item_integrity_post(integrity_items,
7275                                                            item_flags, error);
7276                 if (ret)
7277                         return ret;
7278         }
7279         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7280                 int type = actions->type;
7281                 bool shared_count = false;
7282
7283                 if (!mlx5_flow_os_action_supported(type))
7284                         return rte_flow_error_set(error, ENOTSUP,
7285                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7286                                                   actions,
7287                                                   "action not supported");
7288                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7289                         return rte_flow_error_set(error, ENOTSUP,
7290                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7291                                                   actions, "too many actions");
7292                 if (action_flags &
7293                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7294                         return rte_flow_error_set(error, ENOTSUP,
7295                                 RTE_FLOW_ERROR_TYPE_ACTION,
7296                                 NULL, "meter action with policy "
7297                                 "must be the last action");
7298                 switch (type) {
7299                 case RTE_FLOW_ACTION_TYPE_VOID:
7300                         break;
7301                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7302                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7303                         ret = flow_dv_validate_action_port_id(dev,
7304                                                               action_flags,
7305                                                               actions,
7306                                                               attr,
7307                                                               error);
7308                         if (ret)
7309                                 return ret;
7310                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7311                         ++actions_n;
7312                         break;
7313                 case RTE_FLOW_ACTION_TYPE_FLAG:
7314                         ret = flow_dv_validate_action_flag(dev, action_flags,
7315                                                            attr, error);
7316                         if (ret < 0)
7317                                 return ret;
7318                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7319                                 /* Count all modify-header actions as one. */
7320                                 if (!(action_flags &
7321                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7322                                         ++actions_n;
7323                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7324                                                 MLX5_FLOW_ACTION_MARK_EXT;
7325                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7326                                         modify_after_mirror = 1;
7327
7328                         } else {
7329                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7330                                 ++actions_n;
7331                         }
7332                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7333                         break;
7334                 case RTE_FLOW_ACTION_TYPE_MARK:
7335                         ret = flow_dv_validate_action_mark(dev, actions,
7336                                                            action_flags,
7337                                                            attr, error);
7338                         if (ret < 0)
7339                                 return ret;
7340                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7341                                 /* Count all modify-header actions as one. */
7342                                 if (!(action_flags &
7343                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7344                                         ++actions_n;
7345                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7346                                                 MLX5_FLOW_ACTION_MARK_EXT;
7347                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7348                                         modify_after_mirror = 1;
7349                         } else {
7350                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7351                                 ++actions_n;
7352                         }
7353                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7354                         break;
7355                 case RTE_FLOW_ACTION_TYPE_SET_META:
7356                         ret = flow_dv_validate_action_set_meta(dev, actions,
7357                                                                action_flags,
7358                                                                attr, error);
7359                         if (ret < 0)
7360                                 return ret;
7361                         /* Count all modify-header actions as one action. */
7362                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7363                                 ++actions_n;
7364                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7365                                 modify_after_mirror = 1;
7366                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7367                         rw_act_num += MLX5_ACT_NUM_SET_META;
7368                         break;
7369                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7370                         ret = flow_dv_validate_action_set_tag(dev, actions,
7371                                                               action_flags,
7372                                                               attr, error);
7373                         if (ret < 0)
7374                                 return ret;
7375                         /* Count all modify-header actions as one action. */
7376                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7377                                 ++actions_n;
7378                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7379                                 modify_after_mirror = 1;
7380                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7381                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7382                         break;
7383                 case RTE_FLOW_ACTION_TYPE_DROP:
7384                         ret = mlx5_flow_validate_action_drop(action_flags,
7385                                                              attr, error);
7386                         if (ret < 0)
7387                                 return ret;
7388                         action_flags |= MLX5_FLOW_ACTION_DROP;
7389                         ++actions_n;
7390                         break;
7391                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7392                         ret = mlx5_flow_validate_action_queue(actions,
7393                                                               action_flags, dev,
7394                                                               attr, error);
7395                         if (ret < 0)
7396                                 return ret;
7397                         queue_index = ((const struct rte_flow_action_queue *)
7398                                                         (actions->conf))->index;
7399                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7400                         ++actions_n;
7401                         break;
7402                 case RTE_FLOW_ACTION_TYPE_RSS:
7403                         rss = actions->conf;
7404                         ret = mlx5_flow_validate_action_rss(actions,
7405                                                             action_flags, dev,
7406                                                             attr, item_flags,
7407                                                             error);
7408                         if (ret < 0)
7409                                 return ret;
7410                         if (rss && sample_rss &&
7411                             (sample_rss->level != rss->level ||
7412                             sample_rss->types != rss->types))
7413                                 return rte_flow_error_set(error, ENOTSUP,
7414                                         RTE_FLOW_ERROR_TYPE_ACTION,
7415                                         NULL,
7416                                         "Can't use the different RSS types "
7417                                         "or level in the same flow");
7418                         if (rss != NULL && rss->queue_num)
7419                                 queue_index = rss->queue[0];
7420                         action_flags |= MLX5_FLOW_ACTION_RSS;
7421                         ++actions_n;
7422                         break;
7423                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7424                         ret =
7425                         mlx5_flow_validate_action_default_miss(action_flags,
7426                                         attr, error);
7427                         if (ret < 0)
7428                                 return ret;
7429                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7430                         ++actions_n;
7431                         break;
7432                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7433                         shared_count = true;
7434                         /* fall-through. */
7435                 case RTE_FLOW_ACTION_TYPE_COUNT:
7436                         ret = flow_dv_validate_action_count(dev, shared_count,
7437                                                             action_flags,
7438                                                             error);
7439                         if (ret < 0)
7440                                 return ret;
7441                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7442                         ++actions_n;
7443                         break;
7444                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7445                         if (flow_dv_validate_action_pop_vlan(dev,
7446                                                              action_flags,
7447                                                              actions,
7448                                                              item_flags, attr,
7449                                                              error))
7450                                 return -rte_errno;
7451                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7452                                 modify_after_mirror = 1;
7453                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7454                         ++actions_n;
7455                         break;
7456                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7457                         ret = flow_dv_validate_action_push_vlan(dev,
7458                                                                 action_flags,
7459                                                                 vlan_m,
7460                                                                 actions, attr,
7461                                                                 error);
7462                         if (ret < 0)
7463                                 return ret;
7464                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7465                                 modify_after_mirror = 1;
7466                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7467                         ++actions_n;
7468                         break;
7469                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7470                         ret = flow_dv_validate_action_set_vlan_pcp
7471                                                 (action_flags, actions, error);
7472                         if (ret < 0)
7473                                 return ret;
7474                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7475                                 modify_after_mirror = 1;
7476                         /* Count PCP with push_vlan command. */
7477                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7478                         break;
7479                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7480                         ret = flow_dv_validate_action_set_vlan_vid
7481                                                 (item_flags, action_flags,
7482                                                  actions, error);
7483                         if (ret < 0)
7484                                 return ret;
7485                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7486                                 modify_after_mirror = 1;
7487                         /* Count VID with push_vlan command. */
7488                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7489                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7490                         break;
7491                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7492                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7493                         ret = flow_dv_validate_action_l2_encap(dev,
7494                                                                action_flags,
7495                                                                actions, attr,
7496                                                                error);
7497                         if (ret < 0)
7498                                 return ret;
7499                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7500                         ++actions_n;
7501                         break;
7502                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7503                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7504                         ret = flow_dv_validate_action_decap(dev, action_flags,
7505                                                             actions, item_flags,
7506                                                             attr, error);
7507                         if (ret < 0)
7508                                 return ret;
7509                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7510                                 modify_after_mirror = 1;
7511                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7512                         ++actions_n;
7513                         break;
7514                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7515                         ret = flow_dv_validate_action_raw_encap_decap
7516                                 (dev, NULL, actions->conf, attr, &action_flags,
7517                                  &actions_n, actions, item_flags, error);
7518                         if (ret < 0)
7519                                 return ret;
7520                         break;
7521                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7522                         decap = actions->conf;
7523                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7524                                 ;
7525                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7526                                 encap = NULL;
7527                                 actions--;
7528                         } else {
7529                                 encap = actions->conf;
7530                         }
7531                         ret = flow_dv_validate_action_raw_encap_decap
7532                                            (dev,
7533                                             decap ? decap : &empty_decap, encap,
7534                                             attr, &action_flags, &actions_n,
7535                                             actions, item_flags, error);
7536                         if (ret < 0)
7537                                 return ret;
7538                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7539                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7540                                 modify_after_mirror = 1;
7541                         break;
7542                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7543                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7544                         ret = flow_dv_validate_action_modify_mac(action_flags,
7545                                                                  actions,
7546                                                                  item_flags,
7547                                                                  error);
7548                         if (ret < 0)
7549                                 return ret;
7550                         /* Count all modify-header actions as one action. */
7551                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7552                                 ++actions_n;
7553                         action_flags |= actions->type ==
7554                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7555                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7556                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7557                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7558                                 modify_after_mirror = 1;
7559                         /*
7560                          * Even if the source and destination MAC addresses have
7561                          * overlap in the header with 4B alignment, the convert
7562                          * function will handle them separately and 4 SW actions
7563                          * will be created. And 2 actions will be added each
7564                          * time no matter how many bytes of address will be set.
7565                          */
7566                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7567                         break;
7568                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7569                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7570                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7571                                                                   actions,
7572                                                                   item_flags,
7573                                                                   error);
7574                         if (ret < 0)
7575                                 return ret;
7576                         /* Count all modify-header actions as one action. */
7577                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7578                                 ++actions_n;
7579                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7580                                 modify_after_mirror = 1;
7581                         action_flags |= actions->type ==
7582                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7583                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7584                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7585                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7586                         break;
7587                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7588                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7589                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7590                                                                   actions,
7591                                                                   item_flags,
7592                                                                   error);
7593                         if (ret < 0)
7594                                 return ret;
7595                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7596                                 return rte_flow_error_set(error, ENOTSUP,
7597                                         RTE_FLOW_ERROR_TYPE_ACTION,
7598                                         actions,
7599                                         "Can't change header "
7600                                         "with ICMPv6 proto");
7601                         /* Count all modify-header actions as one action. */
7602                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7603                                 ++actions_n;
7604                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7605                                 modify_after_mirror = 1;
7606                         action_flags |= actions->type ==
7607                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7608                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7609                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7610                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7611                         break;
7612                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7613                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7614                         ret = flow_dv_validate_action_modify_tp(action_flags,
7615                                                                 actions,
7616                                                                 item_flags,
7617                                                                 error);
7618                         if (ret < 0)
7619                                 return ret;
7620                         /* Count all modify-header actions as one action. */
7621                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7622                                 ++actions_n;
7623                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7624                                 modify_after_mirror = 1;
7625                         action_flags |= actions->type ==
7626                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7627                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7628                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7629                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7630                         break;
7631                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7632                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7633                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7634                                                                  actions,
7635                                                                  item_flags,
7636                                                                  error);
7637                         if (ret < 0)
7638                                 return ret;
7639                         /* Count all modify-header actions as one action. */
7640                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7641                                 ++actions_n;
7642                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7643                                 modify_after_mirror = 1;
7644                         action_flags |= actions->type ==
7645                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7646                                                 MLX5_FLOW_ACTION_SET_TTL :
7647                                                 MLX5_FLOW_ACTION_DEC_TTL;
7648                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7649                         break;
7650                 case RTE_FLOW_ACTION_TYPE_JUMP:
7651                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7652                                                            action_flags,
7653                                                            attr, external,
7654                                                            error);
7655                         if (ret)
7656                                 return ret;
7657                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7658                             fdb_mirror_limit)
7659                                 return rte_flow_error_set(error, EINVAL,
7660                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7661                                                   NULL,
7662                                                   "sample and jump action combination is not supported");
7663                         ++actions_n;
7664                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7665                         break;
7666                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7667                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7668                         ret = flow_dv_validate_action_modify_tcp_seq
7669                                                                 (action_flags,
7670                                                                  actions,
7671                                                                  item_flags,
7672                                                                  error);
7673                         if (ret < 0)
7674                                 return ret;
7675                         /* Count all modify-header actions as one action. */
7676                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7677                                 ++actions_n;
7678                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7679                                 modify_after_mirror = 1;
7680                         action_flags |= actions->type ==
7681                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7682                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7683                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7684                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7685                         break;
7686                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7687                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7688                         ret = flow_dv_validate_action_modify_tcp_ack
7689                                                                 (action_flags,
7690                                                                  actions,
7691                                                                  item_flags,
7692                                                                  error);
7693                         if (ret < 0)
7694                                 return ret;
7695                         /* Count all modify-header actions as one action. */
7696                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7697                                 ++actions_n;
7698                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7699                                 modify_after_mirror = 1;
7700                         action_flags |= actions->type ==
7701                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7702                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7703                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7704                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7705                         break;
7706                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7707                         break;
7708                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7709                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7710                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7711                         break;
7712                 case RTE_FLOW_ACTION_TYPE_METER:
7713                         ret = mlx5_flow_validate_action_meter(dev,
7714                                                               action_flags,
7715                                                               item_flags,
7716                                                               actions, attr,
7717                                                               port_id_item,
7718                                                               &def_policy,
7719                                                               error);
7720                         if (ret < 0)
7721                                 return ret;
7722                         action_flags |= MLX5_FLOW_ACTION_METER;
7723                         if (!def_policy)
7724                                 action_flags |=
7725                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7726                         ++actions_n;
7727                         /* Meter action will add one more TAG action. */
7728                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7729                         break;
7730                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7731                         if (!attr->transfer && !attr->group)
7732                                 return rte_flow_error_set(error, ENOTSUP,
7733                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7734                                                                            NULL,
7735                           "Shared ASO age action is not supported for group 0");
7736                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7737                                 return rte_flow_error_set
7738                                                   (error, EINVAL,
7739                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7740                                                    NULL,
7741                                                    "duplicate age actions set");
7742                         action_flags |= MLX5_FLOW_ACTION_AGE;
7743                         ++actions_n;
7744                         break;
7745                 case RTE_FLOW_ACTION_TYPE_AGE:
7746                         ret = flow_dv_validate_action_age(action_flags,
7747                                                           actions, dev,
7748                                                           error);
7749                         if (ret < 0)
7750                                 return ret;
7751                         /*
7752                          * Validate the regular AGE action (using counter)
7753                          * mutual exclusion with share counter actions.
7754                          */
7755                         if (!priv->sh->flow_hit_aso_en) {
7756                                 if (shared_count)
7757                                         return rte_flow_error_set
7758                                                 (error, EINVAL,
7759                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7760                                                 NULL,
7761                                                 "old age and shared count combination is not supported");
7762                                 if (sample_count)
7763                                         return rte_flow_error_set
7764                                                 (error, EINVAL,
7765                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7766                                                 NULL,
7767                                                 "old age action and count must be in the same sub flow");
7768                         }
7769                         action_flags |= MLX5_FLOW_ACTION_AGE;
7770                         ++actions_n;
7771                         break;
7772                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7773                         ret = flow_dv_validate_action_modify_ipv4_dscp
7774                                                          (action_flags,
7775                                                           actions,
7776                                                           item_flags,
7777                                                           error);
7778                         if (ret < 0)
7779                                 return ret;
7780                         /* Count all modify-header actions as one action. */
7781                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7782                                 ++actions_n;
7783                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7784                                 modify_after_mirror = 1;
7785                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7786                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7787                         break;
7788                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7789                         ret = flow_dv_validate_action_modify_ipv6_dscp
7790                                                                 (action_flags,
7791                                                                  actions,
7792                                                                  item_flags,
7793                                                                  error);
7794                         if (ret < 0)
7795                                 return ret;
7796                         /* Count all modify-header actions as one action. */
7797                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7798                                 ++actions_n;
7799                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7800                                 modify_after_mirror = 1;
7801                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7802                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7803                         break;
7804                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7805                         ret = flow_dv_validate_action_sample(&action_flags,
7806                                                              actions, dev,
7807                                                              attr, item_flags,
7808                                                              rss, &sample_rss,
7809                                                              &sample_count,
7810                                                              &fdb_mirror_limit,
7811                                                              error);
7812                         if (ret < 0)
7813                                 return ret;
7814                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7815                         ++actions_n;
7816                         break;
7817                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7818                         ret = flow_dv_validate_action_modify_field(dev,
7819                                                                    action_flags,
7820                                                                    actions,
7821                                                                    attr,
7822                                                                    error);
7823                         if (ret < 0)
7824                                 return ret;
7825                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7826                                 modify_after_mirror = 1;
7827                         /* Count all modify-header actions as one action. */
7828                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7829                                 ++actions_n;
7830                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7831                         rw_act_num += ret;
7832                         break;
7833                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7834                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7835                                                              item_flags, attr,
7836                                                              error);
7837                         if (ret < 0)
7838                                 return ret;
7839                         action_flags |= MLX5_FLOW_ACTION_CT;
7840                         break;
7841                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7842                         /* tunnel offload action was processed before
7843                          * list it here as a supported type
7844                          */
7845                         break;
7846                 default:
7847                         return rte_flow_error_set(error, ENOTSUP,
7848                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7849                                                   actions,
7850                                                   "action not supported");
7851                 }
7852         }
7853         /*
7854          * Validate actions in flow rules
7855          * - Explicit decap action is prohibited by the tunnel offload API.
7856          * - Drop action in tunnel steer rule is prohibited by the API.
7857          * - Application cannot use MARK action because it's value can mask
7858          *   tunnel default miss notification.
7859          * - JUMP in tunnel match rule has no support in current PMD
7860          *   implementation.
7861          * - TAG & META are reserved for future uses.
7862          */
7863         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7864                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7865                                             MLX5_FLOW_ACTION_MARK     |
7866                                             MLX5_FLOW_ACTION_SET_TAG  |
7867                                             MLX5_FLOW_ACTION_SET_META |
7868                                             MLX5_FLOW_ACTION_DROP;
7869
7870                 if (action_flags & bad_actions_mask)
7871                         return rte_flow_error_set
7872                                         (error, EINVAL,
7873                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7874                                         "Invalid RTE action in tunnel "
7875                                         "set decap rule");
7876                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7877                         return rte_flow_error_set
7878                                         (error, EINVAL,
7879                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7880                                         "tunnel set decap rule must terminate "
7881                                         "with JUMP");
7882                 if (!attr->ingress)
7883                         return rte_flow_error_set
7884                                         (error, EINVAL,
7885                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7886                                         "tunnel flows for ingress traffic only");
7887         }
7888         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7889                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7890                                             MLX5_FLOW_ACTION_MARK    |
7891                                             MLX5_FLOW_ACTION_SET_TAG |
7892                                             MLX5_FLOW_ACTION_SET_META;
7893
7894                 if (action_flags & bad_actions_mask)
7895                         return rte_flow_error_set
7896                                         (error, EINVAL,
7897                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7898                                         "Invalid RTE action in tunnel "
7899                                         "set match rule");
7900         }
7901         /*
7902          * Validate the drop action mutual exclusion with other actions.
7903          * Drop action is mutually-exclusive with any other action, except for
7904          * Count action.
7905          * Drop action compatibility with tunnel offload was already validated.
7906          */
7907         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7908                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7909         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7910             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7911                 return rte_flow_error_set(error, EINVAL,
7912                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7913                                           "Drop action is mutually-exclusive "
7914                                           "with any other action, except for "
7915                                           "Count action");
7916         /* Eswitch has few restrictions on using items and actions */
7917         if (attr->transfer) {
7918                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7919                     action_flags & MLX5_FLOW_ACTION_FLAG)
7920                         return rte_flow_error_set(error, ENOTSUP,
7921                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7922                                                   NULL,
7923                                                   "unsupported action FLAG");
7924                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7925                     action_flags & MLX5_FLOW_ACTION_MARK)
7926                         return rte_flow_error_set(error, ENOTSUP,
7927                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7928                                                   NULL,
7929                                                   "unsupported action MARK");
7930                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7931                         return rte_flow_error_set(error, ENOTSUP,
7932                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7933                                                   NULL,
7934                                                   "unsupported action QUEUE");
7935                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7936                         return rte_flow_error_set(error, ENOTSUP,
7937                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7938                                                   NULL,
7939                                                   "unsupported action RSS");
7940                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7941                         return rte_flow_error_set(error, EINVAL,
7942                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7943                                                   actions,
7944                                                   "no fate action is found");
7945         } else {
7946                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7947                         return rte_flow_error_set(error, EINVAL,
7948                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7949                                                   actions,
7950                                                   "no fate action is found");
7951         }
7952         /*
7953          * Continue validation for Xcap and VLAN actions.
7954          * If hairpin is working in explicit TX rule mode, there is no actions
7955          * splitting and the validation of hairpin ingress flow should be the
7956          * same as other standard flows.
7957          */
7958         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7959                              MLX5_FLOW_VLAN_ACTIONS)) &&
7960             (queue_index == 0xFFFF ||
7961              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7962              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7963              conf->tx_explicit != 0))) {
7964                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7965                     MLX5_FLOW_XCAP_ACTIONS)
7966                         return rte_flow_error_set(error, ENOTSUP,
7967                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7968                                                   NULL, "encap and decap "
7969                                                   "combination aren't supported");
7970                 if (!attr->transfer && attr->ingress) {
7971                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7972                                 return rte_flow_error_set
7973                                                 (error, ENOTSUP,
7974                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7975                                                  NULL, "encap is not supported"
7976                                                  " for ingress traffic");
7977                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7978                                 return rte_flow_error_set
7979                                                 (error, ENOTSUP,
7980                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7981                                                  NULL, "push VLAN action not "
7982                                                  "supported for ingress");
7983                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7984                                         MLX5_FLOW_VLAN_ACTIONS)
7985                                 return rte_flow_error_set
7986                                                 (error, ENOTSUP,
7987                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7988                                                  NULL, "no support for "
7989                                                  "multiple VLAN actions");
7990                 }
7991         }
7992         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7993                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7994                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7995                         attr->ingress)
7996                         return rte_flow_error_set
7997                                 (error, ENOTSUP,
7998                                 RTE_FLOW_ERROR_TYPE_ACTION,
7999                                 NULL, "fate action not supported for "
8000                                 "meter with policy");
8001                 if (attr->egress) {
8002                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
8003                                 return rte_flow_error_set
8004                                         (error, ENOTSUP,
8005                                         RTE_FLOW_ERROR_TYPE_ACTION,
8006                                         NULL, "modify header action in egress "
8007                                         "cannot be done before meter action");
8008                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8009                                 return rte_flow_error_set
8010                                         (error, ENOTSUP,
8011                                         RTE_FLOW_ERROR_TYPE_ACTION,
8012                                         NULL, "encap action in egress "
8013                                         "cannot be done before meter action");
8014                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8015                                 return rte_flow_error_set
8016                                         (error, ENOTSUP,
8017                                         RTE_FLOW_ERROR_TYPE_ACTION,
8018                                         NULL, "push vlan action in egress "
8019                                         "cannot be done before meter action");
8020                 }
8021         }
8022         /*
8023          * Hairpin flow will add one more TAG action in TX implicit mode.
8024          * In TX explicit mode, there will be no hairpin flow ID.
8025          */
8026         if (hairpin > 0)
8027                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8028         /* extra metadata enabled: one more TAG action will be add. */
8029         if (dev_conf->dv_flow_en &&
8030             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8031             mlx5_flow_ext_mreg_supported(dev))
8032                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8033         if (rw_act_num >
8034                         flow_dv_modify_hdr_action_max(dev, is_root)) {
8035                 return rte_flow_error_set(error, ENOTSUP,
8036                                           RTE_FLOW_ERROR_TYPE_ACTION,
8037                                           NULL, "too many header modify"
8038                                           " actions to support");
8039         }
8040         /* Eswitch egress mirror and modify flow has limitation on CX5 */
8041         if (fdb_mirror_limit && modify_after_mirror)
8042                 return rte_flow_error_set(error, EINVAL,
8043                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8044                                 "sample before modify action is not supported");
8045         return 0;
8046 }
8047
8048 /**
8049  * Internal preparation function. Allocates the DV flow size,
8050  * this size is constant.
8051  *
8052  * @param[in] dev
8053  *   Pointer to the rte_eth_dev structure.
8054  * @param[in] attr
8055  *   Pointer to the flow attributes.
8056  * @param[in] items
8057  *   Pointer to the list of items.
8058  * @param[in] actions
8059  *   Pointer to the list of actions.
8060  * @param[out] error
8061  *   Pointer to the error structure.
8062  *
8063  * @return
8064  *   Pointer to mlx5_flow object on success,
8065  *   otherwise NULL and rte_errno is set.
8066  */
8067 static struct mlx5_flow *
8068 flow_dv_prepare(struct rte_eth_dev *dev,
8069                 const struct rte_flow_attr *attr __rte_unused,
8070                 const struct rte_flow_item items[] __rte_unused,
8071                 const struct rte_flow_action actions[] __rte_unused,
8072                 struct rte_flow_error *error)
8073 {
8074         uint32_t handle_idx = 0;
8075         struct mlx5_flow *dev_flow;
8076         struct mlx5_flow_handle *dev_handle;
8077         struct mlx5_priv *priv = dev->data->dev_private;
8078         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8079
8080         MLX5_ASSERT(wks);
8081         wks->skip_matcher_reg = 0;
8082         wks->policy = NULL;
8083         wks->final_policy = NULL;
8084         /* In case of corrupting the memory. */
8085         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8086                 rte_flow_error_set(error, ENOSPC,
8087                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8088                                    "not free temporary device flow");
8089                 return NULL;
8090         }
8091         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8092                                    &handle_idx);
8093         if (!dev_handle) {
8094                 rte_flow_error_set(error, ENOMEM,
8095                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8096                                    "not enough memory to create flow handle");
8097                 return NULL;
8098         }
8099         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8100         dev_flow = &wks->flows[wks->flow_idx++];
8101         memset(dev_flow, 0, sizeof(*dev_flow));
8102         dev_flow->handle = dev_handle;
8103         dev_flow->handle_idx = handle_idx;
8104         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8105         dev_flow->ingress = attr->ingress;
8106         dev_flow->dv.transfer = attr->transfer;
8107         return dev_flow;
8108 }
8109
8110 #ifdef RTE_LIBRTE_MLX5_DEBUG
8111 /**
8112  * Sanity check for match mask and value. Similar to check_valid_spec() in
8113  * kernel driver. If unmasked bit is present in value, it returns failure.
8114  *
8115  * @param match_mask
8116  *   pointer to match mask buffer.
8117  * @param match_value
8118  *   pointer to match value buffer.
8119  *
8120  * @return
8121  *   0 if valid, -EINVAL otherwise.
8122  */
8123 static int
8124 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8125 {
8126         uint8_t *m = match_mask;
8127         uint8_t *v = match_value;
8128         unsigned int i;
8129
8130         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8131                 if (v[i] & ~m[i]) {
8132                         DRV_LOG(ERR,
8133                                 "match_value differs from match_criteria"
8134                                 " %p[%u] != %p[%u]",
8135                                 match_value, i, match_mask, i);
8136                         return -EINVAL;
8137                 }
8138         }
8139         return 0;
8140 }
8141 #endif
8142
8143 /**
8144  * Add match of ip_version.
8145  *
8146  * @param[in] group
8147  *   Flow group.
8148  * @param[in] headers_v
8149  *   Values header pointer.
8150  * @param[in] headers_m
8151  *   Masks header pointer.
8152  * @param[in] ip_version
8153  *   The IP version to set.
8154  */
8155 static inline void
8156 flow_dv_set_match_ip_version(uint32_t group,
8157                              void *headers_v,
8158                              void *headers_m,
8159                              uint8_t ip_version)
8160 {
8161         if (group == 0)
8162                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8163         else
8164                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8165                          ip_version);
8166         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8167         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8168         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8169 }
8170
8171 /**
8172  * Add Ethernet item to matcher and to the value.
8173  *
8174  * @param[in, out] matcher
8175  *   Flow matcher.
8176  * @param[in, out] key
8177  *   Flow matcher value.
8178  * @param[in] item
8179  *   Flow pattern to translate.
8180  * @param[in] inner
8181  *   Item is inner pattern.
8182  */
8183 static void
8184 flow_dv_translate_item_eth(void *matcher, void *key,
8185                            const struct rte_flow_item *item, int inner,
8186                            uint32_t group)
8187 {
8188         const struct rte_flow_item_eth *eth_m = item->mask;
8189         const struct rte_flow_item_eth *eth_v = item->spec;
8190         const struct rte_flow_item_eth nic_mask = {
8191                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8192                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8193                 .type = RTE_BE16(0xffff),
8194                 .has_vlan = 0,
8195         };
8196         void *hdrs_m;
8197         void *hdrs_v;
8198         char *l24_v;
8199         unsigned int i;
8200
8201         if (!eth_v)
8202                 return;
8203         if (!eth_m)
8204                 eth_m = &nic_mask;
8205         if (inner) {
8206                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8207                                          inner_headers);
8208                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8209         } else {
8210                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8211                                          outer_headers);
8212                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8213         }
8214         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8215                &eth_m->dst, sizeof(eth_m->dst));
8216         /* The value must be in the range of the mask. */
8217         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8218         for (i = 0; i < sizeof(eth_m->dst); ++i)
8219                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8220         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8221                &eth_m->src, sizeof(eth_m->src));
8222         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8223         /* The value must be in the range of the mask. */
8224         for (i = 0; i < sizeof(eth_m->dst); ++i)
8225                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8226         /*
8227          * HW supports match on one Ethertype, the Ethertype following the last
8228          * VLAN tag of the packet (see PRM).
8229          * Set match on ethertype only if ETH header is not followed by VLAN.
8230          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8231          * ethertype, and use ip_version field instead.
8232          * eCPRI over Ether layer will use type value 0xAEFE.
8233          */
8234         if (eth_m->type == 0xFFFF) {
8235                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8236                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8237                 switch (eth_v->type) {
8238                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8239                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8240                         return;
8241                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8242                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8243                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8244                         return;
8245                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8246                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8247                         return;
8248                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8249                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8250                         return;
8251                 default:
8252                         break;
8253                 }
8254         }
8255         if (eth_m->has_vlan) {
8256                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8257                 if (eth_v->has_vlan) {
8258                         /*
8259                          * Here, when also has_more_vlan field in VLAN item is
8260                          * not set, only single-tagged packets will be matched.
8261                          */
8262                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8263                         return;
8264                 }
8265         }
8266         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8267                  rte_be_to_cpu_16(eth_m->type));
8268         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8269         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8270 }
8271
8272 /**
8273  * Add VLAN item to matcher and to the value.
8274  *
8275  * @param[in, out] dev_flow
8276  *   Flow descriptor.
8277  * @param[in, out] matcher
8278  *   Flow matcher.
8279  * @param[in, out] key
8280  *   Flow matcher value.
8281  * @param[in] item
8282  *   Flow pattern to translate.
8283  * @param[in] inner
8284  *   Item is inner pattern.
8285  */
8286 static void
8287 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8288                             void *matcher, void *key,
8289                             const struct rte_flow_item *item,
8290                             int inner, uint32_t group)
8291 {
8292         const struct rte_flow_item_vlan *vlan_m = item->mask;
8293         const struct rte_flow_item_vlan *vlan_v = item->spec;
8294         void *hdrs_m;
8295         void *hdrs_v;
8296         uint16_t tci_m;
8297         uint16_t tci_v;
8298
8299         if (inner) {
8300                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8301                                          inner_headers);
8302                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8303         } else {
8304                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8305                                          outer_headers);
8306                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8307                 /*
8308                  * This is workaround, masks are not supported,
8309                  * and pre-validated.
8310                  */
8311                 if (vlan_v)
8312                         dev_flow->handle->vf_vlan.tag =
8313                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8314         }
8315         /*
8316          * When VLAN item exists in flow, mark packet as tagged,
8317          * even if TCI is not specified.
8318          */
8319         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8320                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8321                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8322         }
8323         if (!vlan_v)
8324                 return;
8325         if (!vlan_m)
8326                 vlan_m = &rte_flow_item_vlan_mask;
8327         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8328         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8329         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8330         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8331         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8332         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8333         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8334         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8335         /*
8336          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8337          * ethertype, and use ip_version field instead.
8338          */
8339         if (vlan_m->inner_type == 0xFFFF) {
8340                 switch (vlan_v->inner_type) {
8341                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8342                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8343                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8344                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8345                         return;
8346                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8347                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8348                         return;
8349                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8350                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8351                         return;
8352                 default:
8353                         break;
8354                 }
8355         }
8356         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8357                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8358                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8359                 /* Only one vlan_tag bit can be set. */
8360                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8361                 return;
8362         }
8363         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8364                  rte_be_to_cpu_16(vlan_m->inner_type));
8365         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8366                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8367 }
8368
8369 /**
8370  * Add IPV4 item to matcher and to the value.
8371  *
8372  * @param[in, out] matcher
8373  *   Flow matcher.
8374  * @param[in, out] key
8375  *   Flow matcher value.
8376  * @param[in] item
8377  *   Flow pattern to translate.
8378  * @param[in] inner
8379  *   Item is inner pattern.
8380  * @param[in] group
8381  *   The group to insert the rule.
8382  */
8383 static void
8384 flow_dv_translate_item_ipv4(void *matcher, void *key,
8385                             const struct rte_flow_item *item,
8386                             int inner, uint32_t group)
8387 {
8388         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8389         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8390         const struct rte_flow_item_ipv4 nic_mask = {
8391                 .hdr = {
8392                         .src_addr = RTE_BE32(0xffffffff),
8393                         .dst_addr = RTE_BE32(0xffffffff),
8394                         .type_of_service = 0xff,
8395                         .next_proto_id = 0xff,
8396                         .time_to_live = 0xff,
8397                 },
8398         };
8399         void *headers_m;
8400         void *headers_v;
8401         char *l24_m;
8402         char *l24_v;
8403         uint8_t tos, ihl_m, ihl_v;
8404
8405         if (inner) {
8406                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8407                                          inner_headers);
8408                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8409         } else {
8410                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8411                                          outer_headers);
8412                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8413         }
8414         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8415         if (!ipv4_v)
8416                 return;
8417         if (!ipv4_m)
8418                 ipv4_m = &nic_mask;
8419         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8420                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8421         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8422                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8423         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8424         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8425         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8426                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8427         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8428                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8429         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8430         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8431         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8432         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8433         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8434         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8435         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8436         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8437                  ipv4_m->hdr.type_of_service);
8438         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8439         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8440                  ipv4_m->hdr.type_of_service >> 2);
8441         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8442         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8443                  ipv4_m->hdr.next_proto_id);
8444         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8445                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8446         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8447                  ipv4_m->hdr.time_to_live);
8448         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8449                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8450         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8451                  !!(ipv4_m->hdr.fragment_offset));
8452         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8453                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8454 }
8455
8456 /**
8457  * Add IPV6 item to matcher and to the value.
8458  *
8459  * @param[in, out] matcher
8460  *   Flow matcher.
8461  * @param[in, out] key
8462  *   Flow matcher value.
8463  * @param[in] item
8464  *   Flow pattern to translate.
8465  * @param[in] inner
8466  *   Item is inner pattern.
8467  * @param[in] group
8468  *   The group to insert the rule.
8469  */
8470 static void
8471 flow_dv_translate_item_ipv6(void *matcher, void *key,
8472                             const struct rte_flow_item *item,
8473                             int inner, uint32_t group)
8474 {
8475         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8476         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8477         const struct rte_flow_item_ipv6 nic_mask = {
8478                 .hdr = {
8479                         .src_addr =
8480                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8481                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8482                         .dst_addr =
8483                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8484                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8485                         .vtc_flow = RTE_BE32(0xffffffff),
8486                         .proto = 0xff,
8487                         .hop_limits = 0xff,
8488                 },
8489         };
8490         void *headers_m;
8491         void *headers_v;
8492         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8493         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8494         char *l24_m;
8495         char *l24_v;
8496         uint32_t vtc_m;
8497         uint32_t vtc_v;
8498         int i;
8499         int size;
8500
8501         if (inner) {
8502                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8503                                          inner_headers);
8504                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8505         } else {
8506                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8507                                          outer_headers);
8508                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8509         }
8510         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8511         if (!ipv6_v)
8512                 return;
8513         if (!ipv6_m)
8514                 ipv6_m = &nic_mask;
8515         size = sizeof(ipv6_m->hdr.dst_addr);
8516         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8517                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8518         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8519                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8520         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8521         for (i = 0; i < size; ++i)
8522                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8523         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8524                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8525         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8526                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8527         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8528         for (i = 0; i < size; ++i)
8529                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8530         /* TOS. */
8531         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8532         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8533         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8534         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8535         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8536         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8537         /* Label. */
8538         if (inner) {
8539                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8540                          vtc_m);
8541                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8542                          vtc_v);
8543         } else {
8544                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8545                          vtc_m);
8546                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8547                          vtc_v);
8548         }
8549         /* Protocol. */
8550         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8551                  ipv6_m->hdr.proto);
8552         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8553                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8554         /* Hop limit. */
8555         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8556                  ipv6_m->hdr.hop_limits);
8557         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8558                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8559         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8560                  !!(ipv6_m->has_frag_ext));
8561         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8562                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8563 }
8564
8565 /**
8566  * Add IPV6 fragment extension item to matcher and to the value.
8567  *
8568  * @param[in, out] matcher
8569  *   Flow matcher.
8570  * @param[in, out] key
8571  *   Flow matcher value.
8572  * @param[in] item
8573  *   Flow pattern to translate.
8574  * @param[in] inner
8575  *   Item is inner pattern.
8576  */
8577 static void
8578 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8579                                      const struct rte_flow_item *item,
8580                                      int inner)
8581 {
8582         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8583         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8584         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8585                 .hdr = {
8586                         .next_header = 0xff,
8587                         .frag_data = RTE_BE16(0xffff),
8588                 },
8589         };
8590         void *headers_m;
8591         void *headers_v;
8592
8593         if (inner) {
8594                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8595                                          inner_headers);
8596                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8597         } else {
8598                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8599                                          outer_headers);
8600                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8601         }
8602         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8603         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8604         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8605         if (!ipv6_frag_ext_v)
8606                 return;
8607         if (!ipv6_frag_ext_m)
8608                 ipv6_frag_ext_m = &nic_mask;
8609         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8610                  ipv6_frag_ext_m->hdr.next_header);
8611         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8612                  ipv6_frag_ext_v->hdr.next_header &
8613                  ipv6_frag_ext_m->hdr.next_header);
8614 }
8615
8616 /**
8617  * Add TCP item to matcher and to the value.
8618  *
8619  * @param[in, out] matcher
8620  *   Flow matcher.
8621  * @param[in, out] key
8622  *   Flow matcher value.
8623  * @param[in] item
8624  *   Flow pattern to translate.
8625  * @param[in] inner
8626  *   Item is inner pattern.
8627  */
8628 static void
8629 flow_dv_translate_item_tcp(void *matcher, void *key,
8630                            const struct rte_flow_item *item,
8631                            int inner)
8632 {
8633         const struct rte_flow_item_tcp *tcp_m = item->mask;
8634         const struct rte_flow_item_tcp *tcp_v = item->spec;
8635         void *headers_m;
8636         void *headers_v;
8637
8638         if (inner) {
8639                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8640                                          inner_headers);
8641                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8642         } else {
8643                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8644                                          outer_headers);
8645                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8646         }
8647         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8648         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8649         if (!tcp_v)
8650                 return;
8651         if (!tcp_m)
8652                 tcp_m = &rte_flow_item_tcp_mask;
8653         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8654                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8655         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8656                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8657         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8658                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8659         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8660                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8661         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8662                  tcp_m->hdr.tcp_flags);
8663         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8664                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8665 }
8666
8667 /**
8668  * Add UDP item to matcher and to the value.
8669  *
8670  * @param[in, out] matcher
8671  *   Flow matcher.
8672  * @param[in, out] key
8673  *   Flow matcher value.
8674  * @param[in] item
8675  *   Flow pattern to translate.
8676  * @param[in] inner
8677  *   Item is inner pattern.
8678  */
8679 static void
8680 flow_dv_translate_item_udp(void *matcher, void *key,
8681                            const struct rte_flow_item *item,
8682                            int inner)
8683 {
8684         const struct rte_flow_item_udp *udp_m = item->mask;
8685         const struct rte_flow_item_udp *udp_v = item->spec;
8686         void *headers_m;
8687         void *headers_v;
8688
8689         if (inner) {
8690                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8691                                          inner_headers);
8692                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8693         } else {
8694                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8695                                          outer_headers);
8696                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8697         }
8698         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8699         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8700         if (!udp_v)
8701                 return;
8702         if (!udp_m)
8703                 udp_m = &rte_flow_item_udp_mask;
8704         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8705                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8706         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8707                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8708         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8709                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8710         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8711                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8712 }
8713
8714 /**
8715  * Add GRE optional Key item to matcher and to the value.
8716  *
8717  * @param[in, out] matcher
8718  *   Flow matcher.
8719  * @param[in, out] key
8720  *   Flow matcher value.
8721  * @param[in] item
8722  *   Flow pattern to translate.
8723  * @param[in] inner
8724  *   Item is inner pattern.
8725  */
8726 static void
8727 flow_dv_translate_item_gre_key(void *matcher, void *key,
8728                                    const struct rte_flow_item *item)
8729 {
8730         const rte_be32_t *key_m = item->mask;
8731         const rte_be32_t *key_v = item->spec;
8732         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8733         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8734         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8735
8736         /* GRE K bit must be on and should already be validated */
8737         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8738         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8739         if (!key_v)
8740                 return;
8741         if (!key_m)
8742                 key_m = &gre_key_default_mask;
8743         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8744                  rte_be_to_cpu_32(*key_m) >> 8);
8745         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8746                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8747         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8748                  rte_be_to_cpu_32(*key_m) & 0xFF);
8749         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8750                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8751 }
8752
8753 /**
8754  * Add GRE item to matcher and to the value.
8755  *
8756  * @param[in, out] matcher
8757  *   Flow matcher.
8758  * @param[in, out] key
8759  *   Flow matcher value.
8760  * @param[in] item
8761  *   Flow pattern to translate.
8762  * @param[in] pattern_flags
8763  *   Accumulated pattern flags.
8764  */
8765 static void
8766 flow_dv_translate_item_gre(void *matcher, void *key,
8767                            const struct rte_flow_item *item,
8768                            uint64_t pattern_flags)
8769 {
8770         static const struct rte_flow_item_gre empty_gre = {0,};
8771         const struct rte_flow_item_gre *gre_m = item->mask;
8772         const struct rte_flow_item_gre *gre_v = item->spec;
8773         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8774         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8775         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8776         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8777         struct {
8778                 union {
8779                         __extension__
8780                         struct {
8781                                 uint16_t version:3;
8782                                 uint16_t rsvd0:9;
8783                                 uint16_t s_present:1;
8784                                 uint16_t k_present:1;
8785                                 uint16_t rsvd_bit1:1;
8786                                 uint16_t c_present:1;
8787                         };
8788                         uint16_t value;
8789                 };
8790         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8791         uint16_t protocol_m, protocol_v;
8792
8793         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8794         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8795         if (!gre_v) {
8796                 gre_v = &empty_gre;
8797                 gre_m = &empty_gre;
8798         } else {
8799                 if (!gre_m)
8800                         gre_m = &rte_flow_item_gre_mask;
8801         }
8802         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8803         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8804         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8805                  gre_crks_rsvd0_ver_m.c_present);
8806         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8807                  gre_crks_rsvd0_ver_v.c_present &
8808                  gre_crks_rsvd0_ver_m.c_present);
8809         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8810                  gre_crks_rsvd0_ver_m.k_present);
8811         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8812                  gre_crks_rsvd0_ver_v.k_present &
8813                  gre_crks_rsvd0_ver_m.k_present);
8814         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8815                  gre_crks_rsvd0_ver_m.s_present);
8816         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8817                  gre_crks_rsvd0_ver_v.s_present &
8818                  gre_crks_rsvd0_ver_m.s_present);
8819         protocol_m = rte_be_to_cpu_16(gre_m->protocol);
8820         protocol_v = rte_be_to_cpu_16(gre_v->protocol);
8821         if (!protocol_m) {
8822                 /* Force next protocol to prevent matchers duplication */
8823                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
8824                 if (protocol_v)
8825                         protocol_m = 0xFFFF;
8826         }
8827         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, protocol_m);
8828         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8829                  protocol_m & protocol_v);
8830 }
8831
8832 /**
8833  * Add NVGRE item to matcher and to the value.
8834  *
8835  * @param[in, out] matcher
8836  *   Flow matcher.
8837  * @param[in, out] key
8838  *   Flow matcher value.
8839  * @param[in] item
8840  *   Flow pattern to translate.
8841  * @param[in] pattern_flags
8842  *   Accumulated pattern flags.
8843  */
8844 static void
8845 flow_dv_translate_item_nvgre(void *matcher, void *key,
8846                              const struct rte_flow_item *item,
8847                              unsigned long pattern_flags)
8848 {
8849         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8850         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8851         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8852         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8853         const char *tni_flow_id_m;
8854         const char *tni_flow_id_v;
8855         char *gre_key_m;
8856         char *gre_key_v;
8857         int size;
8858         int i;
8859
8860         /* For NVGRE, GRE header fields must be set with defined values. */
8861         const struct rte_flow_item_gre gre_spec = {
8862                 .c_rsvd0_ver = RTE_BE16(0x2000),
8863                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8864         };
8865         const struct rte_flow_item_gre gre_mask = {
8866                 .c_rsvd0_ver = RTE_BE16(0xB000),
8867                 .protocol = RTE_BE16(UINT16_MAX),
8868         };
8869         const struct rte_flow_item gre_item = {
8870                 .spec = &gre_spec,
8871                 .mask = &gre_mask,
8872                 .last = NULL,
8873         };
8874         flow_dv_translate_item_gre(matcher, key, &gre_item, pattern_flags);
8875         if (!nvgre_v)
8876                 return;
8877         if (!nvgre_m)
8878                 nvgre_m = &rte_flow_item_nvgre_mask;
8879         tni_flow_id_m = (const char *)nvgre_m->tni;
8880         tni_flow_id_v = (const char *)nvgre_v->tni;
8881         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8882         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8883         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8884         memcpy(gre_key_m, tni_flow_id_m, size);
8885         for (i = 0; i < size; ++i)
8886                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8887 }
8888
8889 /**
8890  * Add VXLAN item to matcher and to the value.
8891  *
8892  * @param[in] dev
8893  *   Pointer to the Ethernet device structure.
8894  * @param[in] attr
8895  *   Flow rule attributes.
8896  * @param[in, out] matcher
8897  *   Flow matcher.
8898  * @param[in, out] key
8899  *   Flow matcher value.
8900  * @param[in] item
8901  *   Flow pattern to translate.
8902  * @param[in] inner
8903  *   Item is inner pattern.
8904  */
8905 static void
8906 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8907                              const struct rte_flow_attr *attr,
8908                              void *matcher, void *key,
8909                              const struct rte_flow_item *item,
8910                              int inner)
8911 {
8912         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8913         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8914         void *headers_m;
8915         void *headers_v;
8916         void *misc5_m;
8917         void *misc5_v;
8918         uint32_t *tunnel_header_v;
8919         uint32_t *tunnel_header_m;
8920         uint16_t dport;
8921         struct mlx5_priv *priv = dev->data->dev_private;
8922         const struct rte_flow_item_vxlan nic_mask = {
8923                 .vni = "\xff\xff\xff",
8924                 .rsvd1 = 0xff,
8925         };
8926
8927         if (inner) {
8928                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8929                                          inner_headers);
8930                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8931         } else {
8932                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8933                                          outer_headers);
8934                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8935         }
8936         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8937                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8938         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8939                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8940                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8941         }
8942         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8943         if (!vxlan_v)
8944                 return;
8945         if (!vxlan_m) {
8946                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8947                     (attr->group && !priv->sh->misc5_cap))
8948                         vxlan_m = &rte_flow_item_vxlan_mask;
8949                 else
8950                         vxlan_m = &nic_mask;
8951         }
8952         if ((priv->sh->steering_format_version ==
8953             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8954             dport != MLX5_UDP_PORT_VXLAN) ||
8955             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8956             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8957                 void *misc_m;
8958                 void *misc_v;
8959                 char *vni_m;
8960                 char *vni_v;
8961                 int size;
8962                 int i;
8963                 misc_m = MLX5_ADDR_OF(fte_match_param,
8964                                       matcher, misc_parameters);
8965                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8966                 size = sizeof(vxlan_m->vni);
8967                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8968                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8969                 memcpy(vni_m, vxlan_m->vni, size);
8970                 for (i = 0; i < size; ++i)
8971                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8972                 return;
8973         }
8974         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8975         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8976         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8977                                                    misc5_v,
8978                                                    tunnel_header_1);
8979         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8980                                                    misc5_m,
8981                                                    tunnel_header_1);
8982         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8983                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8984                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8985         if (*tunnel_header_v)
8986                 *tunnel_header_m = vxlan_m->vni[0] |
8987                         vxlan_m->vni[1] << 8 |
8988                         vxlan_m->vni[2] << 16;
8989         else
8990                 *tunnel_header_m = 0x0;
8991         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8992         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8993                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8994 }
8995
8996 /**
8997  * Add VXLAN-GPE item to matcher and to the value.
8998  *
8999  * @param[in, out] matcher
9000  *   Flow matcher.
9001  * @param[in, out] key
9002  *   Flow matcher value.
9003  * @param[in] item
9004  *   Flow pattern to translate.
9005  * @param[in] inner
9006  *   Item is inner pattern.
9007  */
9008
9009 static void
9010 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
9011                                  const struct rte_flow_item *item,
9012                                  const uint64_t pattern_flags)
9013 {
9014         static const struct rte_flow_item_vxlan_gpe dummy_vxlan_gpe_hdr = {0, };
9015         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
9016         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9017         /* The item was validated to be on the outer side */
9018         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9019         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9020         void *misc_m =
9021                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9022         void *misc_v =
9023                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9024         char *vni_m =
9025                 MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9026         char *vni_v =
9027                 MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9028         int i, size = sizeof(vxlan_m->vni);
9029         uint8_t flags_m = 0xff;
9030         uint8_t flags_v = 0xc;
9031         uint8_t m_protocol, v_protocol;
9032
9033         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9034                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9035                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9036                          MLX5_UDP_PORT_VXLAN_GPE);
9037         }
9038         if (!vxlan_v) {
9039                 vxlan_v = &dummy_vxlan_gpe_hdr;
9040                 vxlan_m = &dummy_vxlan_gpe_hdr;
9041         } else {
9042                 if (!vxlan_m)
9043                         vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9044         }
9045         memcpy(vni_m, vxlan_m->vni, size);
9046         for (i = 0; i < size; ++i)
9047                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9048         if (vxlan_m->flags) {
9049                 flags_m = vxlan_m->flags;
9050                 flags_v = vxlan_v->flags;
9051         }
9052         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9053         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9054         m_protocol = vxlan_m->protocol;
9055         v_protocol = vxlan_v->protocol;
9056         if (!m_protocol) {
9057                 /* Force next protocol to ensure next headers parsing. */
9058                 if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
9059                         v_protocol = RTE_VXLAN_GPE_TYPE_ETH;
9060                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
9061                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV4;
9062                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
9063                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV6;
9064                 if (v_protocol)
9065                         m_protocol = 0xFF;
9066         }
9067         MLX5_SET(fte_match_set_misc3, misc_m,
9068                  outer_vxlan_gpe_next_protocol, m_protocol);
9069         MLX5_SET(fte_match_set_misc3, misc_v,
9070                  outer_vxlan_gpe_next_protocol, m_protocol & v_protocol);
9071 }
9072
9073 /**
9074  * Add Geneve item to matcher and to the value.
9075  *
9076  * @param[in, out] matcher
9077  *   Flow matcher.
9078  * @param[in, out] key
9079  *   Flow matcher value.
9080  * @param[in] item
9081  *   Flow pattern to translate.
9082  * @param[in] inner
9083  *   Item is inner pattern.
9084  */
9085
9086 static void
9087 flow_dv_translate_item_geneve(void *matcher, void *key,
9088                               const struct rte_flow_item *item,
9089                               uint64_t pattern_flags)
9090 {
9091         static const struct rte_flow_item_geneve empty_geneve = {0,};
9092         const struct rte_flow_item_geneve *geneve_m = item->mask;
9093         const struct rte_flow_item_geneve *geneve_v = item->spec;
9094         /* GENEVE flow item validation allows single tunnel item */
9095         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9096         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9097         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9098         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9099         uint16_t gbhdr_m;
9100         uint16_t gbhdr_v;
9101         char *vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9102         char *vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9103         size_t size = sizeof(geneve_m->vni), i;
9104         uint16_t protocol_m, protocol_v;
9105
9106         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9107                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9108                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9109                          MLX5_UDP_PORT_GENEVE);
9110         }
9111         if (!geneve_v) {
9112                 geneve_v = &empty_geneve;
9113                 geneve_m = &empty_geneve;
9114         } else {
9115                 if (!geneve_m)
9116                         geneve_m = &rte_flow_item_geneve_mask;
9117         }
9118         memcpy(vni_m, geneve_m->vni, size);
9119         for (i = 0; i < size; ++i)
9120                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9121         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9122         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9123         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9124                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9125         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9126                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9127         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9128                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9129         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9130                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9131                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9132         protocol_m = rte_be_to_cpu_16(geneve_m->protocol);
9133         protocol_v = rte_be_to_cpu_16(geneve_v->protocol);
9134         if (!protocol_m) {
9135                 /* Force next protocol to prevent matchers duplication */
9136                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
9137                 if (protocol_v)
9138                         protocol_m = 0xFFFF;
9139         }
9140         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);
9141         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9142                  protocol_m & protocol_v);
9143 }
9144
9145 /**
9146  * Create Geneve TLV option resource.
9147  *
9148  * @param dev[in, out]
9149  *   Pointer to rte_eth_dev structure.
9150  * @param[in, out] tag_be24
9151  *   Tag value in big endian then R-shift 8.
9152  * @parm[in, out] dev_flow
9153  *   Pointer to the dev_flow.
9154  * @param[out] error
9155  *   pointer to error structure.
9156  *
9157  * @return
9158  *   0 on success otherwise -errno and errno is set.
9159  */
9160
9161 int
9162 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9163                                              const struct rte_flow_item *item,
9164                                              struct rte_flow_error *error)
9165 {
9166         struct mlx5_priv *priv = dev->data->dev_private;
9167         struct mlx5_dev_ctx_shared *sh = priv->sh;
9168         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9169                         sh->geneve_tlv_option_resource;
9170         struct mlx5_devx_obj *obj;
9171         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9172         int ret = 0;
9173
9174         if (!geneve_opt_v)
9175                 return -1;
9176         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9177         if (geneve_opt_resource != NULL) {
9178                 if (geneve_opt_resource->option_class ==
9179                         geneve_opt_v->option_class &&
9180                         geneve_opt_resource->option_type ==
9181                         geneve_opt_v->option_type &&
9182                         geneve_opt_resource->length ==
9183                         geneve_opt_v->option_len) {
9184                         /* We already have GENEVE TLV option obj allocated. */
9185                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9186                                            __ATOMIC_RELAXED);
9187                 } else {
9188                         ret = rte_flow_error_set(error, ENOMEM,
9189                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9190                                 "Only one GENEVE TLV option supported");
9191                         goto exit;
9192                 }
9193         } else {
9194                 /* Create a GENEVE TLV object and resource. */
9195                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9196                                 geneve_opt_v->option_class,
9197                                 geneve_opt_v->option_type,
9198                                 geneve_opt_v->option_len);
9199                 if (!obj) {
9200                         ret = rte_flow_error_set(error, ENODATA,
9201                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9202                                 "Failed to create GENEVE TLV Devx object");
9203                         goto exit;
9204                 }
9205                 sh->geneve_tlv_option_resource =
9206                                 mlx5_malloc(MLX5_MEM_ZERO,
9207                                                 sizeof(*geneve_opt_resource),
9208                                                 0, SOCKET_ID_ANY);
9209                 if (!sh->geneve_tlv_option_resource) {
9210                         claim_zero(mlx5_devx_cmd_destroy(obj));
9211                         ret = rte_flow_error_set(error, ENOMEM,
9212                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9213                                 "GENEVE TLV object memory allocation failed");
9214                         goto exit;
9215                 }
9216                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9217                 geneve_opt_resource->obj = obj;
9218                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9219                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9220                 geneve_opt_resource->length = geneve_opt_v->option_len;
9221                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9222                                 __ATOMIC_RELAXED);
9223         }
9224 exit:
9225         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9226         return ret;
9227 }
9228
9229 /**
9230  * Add Geneve TLV option item to matcher.
9231  *
9232  * @param[in, out] dev
9233  *   Pointer to rte_eth_dev structure.
9234  * @param[in, out] matcher
9235  *   Flow matcher.
9236  * @param[in, out] key
9237  *   Flow matcher value.
9238  * @param[in] item
9239  *   Flow pattern to translate.
9240  * @param[out] error
9241  *   Pointer to error structure.
9242  */
9243 static int
9244 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9245                                   void *key, const struct rte_flow_item *item,
9246                                   struct rte_flow_error *error)
9247 {
9248         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9249         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9250         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9251         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9252         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9253                         misc_parameters_3);
9254         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9255         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9256         int ret = 0;
9257
9258         if (!geneve_opt_v)
9259                 return -1;
9260         if (!geneve_opt_m)
9261                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9262         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9263                                                            error);
9264         if (ret) {
9265                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9266                 return ret;
9267         }
9268         /*
9269          * Set the option length in GENEVE header if not requested.
9270          * The GENEVE TLV option length is expressed by the option length field
9271          * in the GENEVE header.
9272          * If the option length was not requested but the GENEVE TLV option item
9273          * is present we set the option length field implicitly.
9274          */
9275         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9276                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9277                          MLX5_GENEVE_OPTLEN_MASK);
9278                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9279                          geneve_opt_v->option_len + 1);
9280         }
9281         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9282         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9283         /* Set the data. */
9284         if (geneve_opt_v->data) {
9285                 memcpy(&opt_data_key, geneve_opt_v->data,
9286                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9287                                 sizeof(opt_data_key)));
9288                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9289                                 sizeof(opt_data_key));
9290                 memcpy(&opt_data_mask, geneve_opt_m->data,
9291                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9292                                 sizeof(opt_data_mask)));
9293                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9294                                 sizeof(opt_data_mask));
9295                 MLX5_SET(fte_match_set_misc3, misc3_m,
9296                                 geneve_tlv_option_0_data,
9297                                 rte_be_to_cpu_32(opt_data_mask));
9298                 MLX5_SET(fte_match_set_misc3, misc3_v,
9299                                 geneve_tlv_option_0_data,
9300                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9301         }
9302         return ret;
9303 }
9304
9305 /**
9306  * Add MPLS item to matcher and to the value.
9307  *
9308  * @param[in, out] matcher
9309  *   Flow matcher.
9310  * @param[in, out] key
9311  *   Flow matcher value.
9312  * @param[in] item
9313  *   Flow pattern to translate.
9314  * @param[in] prev_layer
9315  *   The protocol layer indicated in previous item.
9316  * @param[in] inner
9317  *   Item is inner pattern.
9318  */
9319 static void
9320 flow_dv_translate_item_mpls(void *matcher, void *key,
9321                             const struct rte_flow_item *item,
9322                             uint64_t prev_layer,
9323                             int inner)
9324 {
9325         const uint32_t *in_mpls_m = item->mask;
9326         const uint32_t *in_mpls_v = item->spec;
9327         uint32_t *out_mpls_m = 0;
9328         uint32_t *out_mpls_v = 0;
9329         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9330         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9331         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9332                                      misc_parameters_2);
9333         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9334         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9335         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9336
9337         switch (prev_layer) {
9338         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9339                 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9340                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
9341                                  0xffff);
9342                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9343                                  MLX5_UDP_PORT_MPLS);
9344                 }
9345                 break;
9346         case MLX5_FLOW_LAYER_GRE:
9347                 /* Fall-through. */
9348         case MLX5_FLOW_LAYER_GRE_KEY:
9349                 if (!MLX5_GET16(fte_match_set_misc, misc_v, gre_protocol)) {
9350                         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
9351                                  0xffff);
9352                         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9353                                  RTE_ETHER_TYPE_MPLS);
9354                 }
9355                 break;
9356         default:
9357                 break;
9358         }
9359         if (!in_mpls_v)
9360                 return;
9361         if (!in_mpls_m)
9362                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9363         switch (prev_layer) {
9364         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9365                 out_mpls_m =
9366                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9367                                                  outer_first_mpls_over_udp);
9368                 out_mpls_v =
9369                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9370                                                  outer_first_mpls_over_udp);
9371                 break;
9372         case MLX5_FLOW_LAYER_GRE:
9373                 out_mpls_m =
9374                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9375                                                  outer_first_mpls_over_gre);
9376                 out_mpls_v =
9377                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9378                                                  outer_first_mpls_over_gre);
9379                 break;
9380         default:
9381                 /* Inner MPLS not over GRE is not supported. */
9382                 if (!inner) {
9383                         out_mpls_m =
9384                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9385                                                          misc2_m,
9386                                                          outer_first_mpls);
9387                         out_mpls_v =
9388                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9389                                                          misc2_v,
9390                                                          outer_first_mpls);
9391                 }
9392                 break;
9393         }
9394         if (out_mpls_m && out_mpls_v) {
9395                 *out_mpls_m = *in_mpls_m;
9396                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9397         }
9398 }
9399
9400 /**
9401  * Add metadata register item to matcher
9402  *
9403  * @param[in, out] matcher
9404  *   Flow matcher.
9405  * @param[in, out] key
9406  *   Flow matcher value.
9407  * @param[in] reg_type
9408  *   Type of device metadata register
9409  * @param[in] value
9410  *   Register value
9411  * @param[in] mask
9412  *   Register mask
9413  */
9414 static void
9415 flow_dv_match_meta_reg(void *matcher, void *key,
9416                        enum modify_reg reg_type,
9417                        uint32_t data, uint32_t mask)
9418 {
9419         void *misc2_m =
9420                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9421         void *misc2_v =
9422                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9423         uint32_t temp;
9424
9425         data &= mask;
9426         switch (reg_type) {
9427         case REG_A:
9428                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9429                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9430                 break;
9431         case REG_B:
9432                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9433                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9434                 break;
9435         case REG_C_0:
9436                 /*
9437                  * The metadata register C0 field might be divided into
9438                  * source vport index and META item value, we should set
9439                  * this field according to specified mask, not as whole one.
9440                  */
9441                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9442                 temp |= mask;
9443                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9444                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9445                 temp &= ~mask;
9446                 temp |= data;
9447                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9448                 break;
9449         case REG_C_1:
9450                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9451                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9452                 break;
9453         case REG_C_2:
9454                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9455                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9456                 break;
9457         case REG_C_3:
9458                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9459                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9460                 break;
9461         case REG_C_4:
9462                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9463                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9464                 break;
9465         case REG_C_5:
9466                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9467                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9468                 break;
9469         case REG_C_6:
9470                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9471                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9472                 break;
9473         case REG_C_7:
9474                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9475                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9476                 break;
9477         default:
9478                 MLX5_ASSERT(false);
9479                 break;
9480         }
9481 }
9482
9483 /**
9484  * Add MARK item to matcher
9485  *
9486  * @param[in] dev
9487  *   The device to configure through.
9488  * @param[in, out] matcher
9489  *   Flow matcher.
9490  * @param[in, out] key
9491  *   Flow matcher value.
9492  * @param[in] item
9493  *   Flow pattern to translate.
9494  */
9495 static void
9496 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9497                             void *matcher, void *key,
9498                             const struct rte_flow_item *item)
9499 {
9500         struct mlx5_priv *priv = dev->data->dev_private;
9501         const struct rte_flow_item_mark *mark;
9502         uint32_t value;
9503         uint32_t mask;
9504
9505         mark = item->mask ? (const void *)item->mask :
9506                             &rte_flow_item_mark_mask;
9507         mask = mark->id & priv->sh->dv_mark_mask;
9508         mark = (const void *)item->spec;
9509         MLX5_ASSERT(mark);
9510         value = mark->id & priv->sh->dv_mark_mask & mask;
9511         if (mask) {
9512                 enum modify_reg reg;
9513
9514                 /* Get the metadata register index for the mark. */
9515                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9516                 MLX5_ASSERT(reg > 0);
9517                 if (reg == REG_C_0) {
9518                         struct mlx5_priv *priv = dev->data->dev_private;
9519                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9520                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9521
9522                         mask &= msk_c0;
9523                         mask <<= shl_c0;
9524                         value <<= shl_c0;
9525                 }
9526                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9527         }
9528 }
9529
9530 /**
9531  * Add META item to matcher
9532  *
9533  * @param[in] dev
9534  *   The devich to configure through.
9535  * @param[in, out] matcher
9536  *   Flow matcher.
9537  * @param[in, out] key
9538  *   Flow matcher value.
9539  * @param[in] attr
9540  *   Attributes of flow that includes this item.
9541  * @param[in] item
9542  *   Flow pattern to translate.
9543  */
9544 static void
9545 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9546                             void *matcher, void *key,
9547                             const struct rte_flow_attr *attr,
9548                             const struct rte_flow_item *item)
9549 {
9550         const struct rte_flow_item_meta *meta_m;
9551         const struct rte_flow_item_meta *meta_v;
9552
9553         meta_m = (const void *)item->mask;
9554         if (!meta_m)
9555                 meta_m = &rte_flow_item_meta_mask;
9556         meta_v = (const void *)item->spec;
9557         if (meta_v) {
9558                 int reg;
9559                 uint32_t value = meta_v->data;
9560                 uint32_t mask = meta_m->data;
9561
9562                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9563                 if (reg < 0)
9564                         return;
9565                 MLX5_ASSERT(reg != REG_NON);
9566                 if (reg == REG_C_0) {
9567                         struct mlx5_priv *priv = dev->data->dev_private;
9568                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9569                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9570
9571                         mask &= msk_c0;
9572                         mask <<= shl_c0;
9573                         value <<= shl_c0;
9574                 }
9575                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9576         }
9577 }
9578
9579 /**
9580  * Add vport metadata Reg C0 item to matcher
9581  *
9582  * @param[in, out] matcher
9583  *   Flow matcher.
9584  * @param[in, out] key
9585  *   Flow matcher value.
9586  * @param[in] reg
9587  *   Flow pattern to translate.
9588  */
9589 static void
9590 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9591                                   uint32_t value, uint32_t mask)
9592 {
9593         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9594 }
9595
9596 /**
9597  * Add tag item to matcher
9598  *
9599  * @param[in] dev
9600  *   The devich to configure through.
9601  * @param[in, out] matcher
9602  *   Flow matcher.
9603  * @param[in, out] key
9604  *   Flow matcher value.
9605  * @param[in] item
9606  *   Flow pattern to translate.
9607  */
9608 static void
9609 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9610                                 void *matcher, void *key,
9611                                 const struct rte_flow_item *item)
9612 {
9613         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9614         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9615         uint32_t mask, value;
9616
9617         MLX5_ASSERT(tag_v);
9618         value = tag_v->data;
9619         mask = tag_m ? tag_m->data : UINT32_MAX;
9620         if (tag_v->id == REG_C_0) {
9621                 struct mlx5_priv *priv = dev->data->dev_private;
9622                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9623                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9624
9625                 mask &= msk_c0;
9626                 mask <<= shl_c0;
9627                 value <<= shl_c0;
9628         }
9629         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9630 }
9631
9632 /**
9633  * Add TAG item to matcher
9634  *
9635  * @param[in] dev
9636  *   The devich to configure through.
9637  * @param[in, out] matcher
9638  *   Flow matcher.
9639  * @param[in, out] key
9640  *   Flow matcher value.
9641  * @param[in] item
9642  *   Flow pattern to translate.
9643  */
9644 static void
9645 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9646                            void *matcher, void *key,
9647                            const struct rte_flow_item *item)
9648 {
9649         const struct rte_flow_item_tag *tag_v = item->spec;
9650         const struct rte_flow_item_tag *tag_m = item->mask;
9651         enum modify_reg reg;
9652
9653         MLX5_ASSERT(tag_v);
9654         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9655         /* Get the metadata register index for the tag. */
9656         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9657         MLX5_ASSERT(reg > 0);
9658         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9659 }
9660
9661 /**
9662  * Add source vport match to the specified matcher.
9663  *
9664  * @param[in, out] matcher
9665  *   Flow matcher.
9666  * @param[in, out] key
9667  *   Flow matcher value.
9668  * @param[in] port
9669  *   Source vport value to match
9670  * @param[in] mask
9671  *   Mask
9672  */
9673 static void
9674 flow_dv_translate_item_source_vport(void *matcher, void *key,
9675                                     int16_t port, uint16_t mask)
9676 {
9677         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9678         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9679
9680         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9681         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9682 }
9683
9684 /**
9685  * Translate port-id item to eswitch match on  port-id.
9686  *
9687  * @param[in] dev
9688  *   The devich to configure through.
9689  * @param[in, out] matcher
9690  *   Flow matcher.
9691  * @param[in, out] key
9692  *   Flow matcher value.
9693  * @param[in] item
9694  *   Flow pattern to translate.
9695  * @param[in]
9696  *   Flow attributes.
9697  *
9698  * @return
9699  *   0 on success, a negative errno value otherwise.
9700  */
9701 static int
9702 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9703                                void *key, const struct rte_flow_item *item,
9704                                const struct rte_flow_attr *attr)
9705 {
9706         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9707         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9708         struct mlx5_priv *priv;
9709         uint16_t mask, id;
9710
9711         if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9712                 flow_dv_translate_item_source_vport(matcher, key,
9713                         flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9714                 return 0;
9715         }
9716         mask = pid_m ? pid_m->id : 0xffff;
9717         id = pid_v ? pid_v->id : dev->data->port_id;
9718         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9719         if (!priv)
9720                 return -rte_errno;
9721         /*
9722          * Translate to vport field or to metadata, depending on mode.
9723          * Kernel can use either misc.source_port or half of C0 metadata
9724          * register.
9725          */
9726         if (priv->vport_meta_mask) {
9727                 /*
9728                  * Provide the hint for SW steering library
9729                  * to insert the flow into ingress domain and
9730                  * save the extra vport match.
9731                  */
9732                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9733                     priv->pf_bond < 0 && attr->transfer)
9734                         flow_dv_translate_item_source_vport
9735                                 (matcher, key, priv->vport_id, mask);
9736                 /*
9737                  * We should always set the vport metadata register,
9738                  * otherwise the SW steering library can drop
9739                  * the rule if wire vport metadata value is not zero,
9740                  * it depends on kernel configuration.
9741                  */
9742                 flow_dv_translate_item_meta_vport(matcher, key,
9743                                                   priv->vport_meta_tag,
9744                                                   priv->vport_meta_mask);
9745         } else {
9746                 flow_dv_translate_item_source_vport(matcher, key,
9747                                                     priv->vport_id, mask);
9748         }
9749         return 0;
9750 }
9751
9752 /**
9753  * Add ICMP6 item to matcher and to the value.
9754  *
9755  * @param[in, out] matcher
9756  *   Flow matcher.
9757  * @param[in, out] key
9758  *   Flow matcher value.
9759  * @param[in] item
9760  *   Flow pattern to translate.
9761  * @param[in] inner
9762  *   Item is inner pattern.
9763  */
9764 static void
9765 flow_dv_translate_item_icmp6(void *matcher, void *key,
9766                               const struct rte_flow_item *item,
9767                               int inner)
9768 {
9769         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9770         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9771         void *headers_m;
9772         void *headers_v;
9773         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9774                                      misc_parameters_3);
9775         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9776         if (inner) {
9777                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9778                                          inner_headers);
9779                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9780         } else {
9781                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9782                                          outer_headers);
9783                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9784         }
9785         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9786         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9787         if (!icmp6_v)
9788                 return;
9789         if (!icmp6_m)
9790                 icmp6_m = &rte_flow_item_icmp6_mask;
9791         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9792         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9793                  icmp6_v->type & icmp6_m->type);
9794         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9795         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9796                  icmp6_v->code & icmp6_m->code);
9797 }
9798
9799 /**
9800  * Add ICMP item to matcher and to the value.
9801  *
9802  * @param[in, out] matcher
9803  *   Flow matcher.
9804  * @param[in, out] key
9805  *   Flow matcher value.
9806  * @param[in] item
9807  *   Flow pattern to translate.
9808  * @param[in] inner
9809  *   Item is inner pattern.
9810  */
9811 static void
9812 flow_dv_translate_item_icmp(void *matcher, void *key,
9813                             const struct rte_flow_item *item,
9814                             int inner)
9815 {
9816         const struct rte_flow_item_icmp *icmp_m = item->mask;
9817         const struct rte_flow_item_icmp *icmp_v = item->spec;
9818         uint32_t icmp_header_data_m = 0;
9819         uint32_t icmp_header_data_v = 0;
9820         void *headers_m;
9821         void *headers_v;
9822         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9823                                      misc_parameters_3);
9824         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9825         if (inner) {
9826                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9827                                          inner_headers);
9828                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9829         } else {
9830                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9831                                          outer_headers);
9832                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9833         }
9834         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9835         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9836         if (!icmp_v)
9837                 return;
9838         if (!icmp_m)
9839                 icmp_m = &rte_flow_item_icmp_mask;
9840         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9841                  icmp_m->hdr.icmp_type);
9842         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9843                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9844         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9845                  icmp_m->hdr.icmp_code);
9846         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9847                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9848         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9849         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9850         if (icmp_header_data_m) {
9851                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9852                 icmp_header_data_v |=
9853                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9854                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9855                          icmp_header_data_m);
9856                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9857                          icmp_header_data_v & icmp_header_data_m);
9858         }
9859 }
9860
9861 /**
9862  * Add GTP item to matcher and to the value.
9863  *
9864  * @param[in, out] matcher
9865  *   Flow matcher.
9866  * @param[in, out] key
9867  *   Flow matcher value.
9868  * @param[in] item
9869  *   Flow pattern to translate.
9870  * @param[in] inner
9871  *   Item is inner pattern.
9872  */
9873 static void
9874 flow_dv_translate_item_gtp(void *matcher, void *key,
9875                            const struct rte_flow_item *item, int inner)
9876 {
9877         const struct rte_flow_item_gtp *gtp_m = item->mask;
9878         const struct rte_flow_item_gtp *gtp_v = item->spec;
9879         void *headers_m;
9880         void *headers_v;
9881         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9882                                      misc_parameters_3);
9883         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9884         uint16_t dport = RTE_GTPU_UDP_PORT;
9885
9886         if (inner) {
9887                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9888                                          inner_headers);
9889                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9890         } else {
9891                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9892                                          outer_headers);
9893                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9894         }
9895         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9896                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9897                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9898         }
9899         if (!gtp_v)
9900                 return;
9901         if (!gtp_m)
9902                 gtp_m = &rte_flow_item_gtp_mask;
9903         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9904                  gtp_m->v_pt_rsv_flags);
9905         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9906                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9907         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9908         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9909                  gtp_v->msg_type & gtp_m->msg_type);
9910         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9911                  rte_be_to_cpu_32(gtp_m->teid));
9912         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9913                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9914 }
9915
9916 /**
9917  * Add GTP PSC item to matcher.
9918  *
9919  * @param[in, out] matcher
9920  *   Flow matcher.
9921  * @param[in, out] key
9922  *   Flow matcher value.
9923  * @param[in] item
9924  *   Flow pattern to translate.
9925  */
9926 static int
9927 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9928                                const struct rte_flow_item *item)
9929 {
9930         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9931         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9932         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9933                         misc_parameters_3);
9934         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9935         union {
9936                 uint32_t w32;
9937                 struct {
9938                         uint16_t seq_num;
9939                         uint8_t npdu_num;
9940                         uint8_t next_ext_header_type;
9941                 };
9942         } dw_2;
9943         uint8_t gtp_flags;
9944
9945         /* Always set E-flag match on one, regardless of GTP item settings. */
9946         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9947         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9948         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9949         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9950         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9951         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9952         /*Set next extension header type. */
9953         dw_2.seq_num = 0;
9954         dw_2.npdu_num = 0;
9955         dw_2.next_ext_header_type = 0xff;
9956         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9957                  rte_cpu_to_be_32(dw_2.w32));
9958         dw_2.seq_num = 0;
9959         dw_2.npdu_num = 0;
9960         dw_2.next_ext_header_type = 0x85;
9961         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9962                  rte_cpu_to_be_32(dw_2.w32));
9963         if (gtp_psc_v) {
9964                 union {
9965                         uint32_t w32;
9966                         struct {
9967                                 uint8_t len;
9968                                 uint8_t type_flags;
9969                                 uint8_t qfi;
9970                                 uint8_t reserved;
9971                         };
9972                 } dw_0;
9973
9974                 /*Set extension header PDU type and Qos. */
9975                 if (!gtp_psc_m)
9976                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9977                 dw_0.w32 = 0;
9978                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
9979                 dw_0.qfi = gtp_psc_m->hdr.qfi;
9980                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9981                          rte_cpu_to_be_32(dw_0.w32));
9982                 dw_0.w32 = 0;
9983                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
9984                                                         gtp_psc_m->hdr.type);
9985                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
9986                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9987                          rte_cpu_to_be_32(dw_0.w32));
9988         }
9989         return 0;
9990 }
9991
9992 /**
9993  * Add eCPRI item to matcher and to the value.
9994  *
9995  * @param[in] dev
9996  *   The devich to configure through.
9997  * @param[in, out] matcher
9998  *   Flow matcher.
9999  * @param[in, out] key
10000  *   Flow matcher value.
10001  * @param[in] item
10002  *   Flow pattern to translate.
10003  * @param[in] last_item
10004  *   Last item flags.
10005  */
10006 static void
10007 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
10008                              void *key, const struct rte_flow_item *item,
10009                              uint64_t last_item)
10010 {
10011         struct mlx5_priv *priv = dev->data->dev_private;
10012         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
10013         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
10014         struct rte_ecpri_common_hdr common;
10015         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
10016                                      misc_parameters_4);
10017         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
10018         uint32_t *samples;
10019         void *dw_m;
10020         void *dw_v;
10021
10022         /*
10023          * In case of eCPRI over Ethernet, if EtherType is not specified,
10024          * match on eCPRI EtherType implicitly.
10025          */
10026         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
10027                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
10028
10029                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
10030                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10031                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
10032                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
10033                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
10034                         *(uint16_t *)l2m = UINT16_MAX;
10035                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
10036                 }
10037         }
10038         if (!ecpri_v)
10039                 return;
10040         if (!ecpri_m)
10041                 ecpri_m = &rte_flow_item_ecpri_mask;
10042         /*
10043          * Maximal four DW samples are supported in a single matching now.
10044          * Two are used now for a eCPRI matching:
10045          * 1. Type: one byte, mask should be 0x00ff0000 in network order
10046          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10047          *    if any.
10048          */
10049         if (!ecpri_m->hdr.common.u32)
10050                 return;
10051         samples = priv->sh->ecpri_parser.ids;
10052         /* Need to take the whole DW as the mask to fill the entry. */
10053         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10054                             prog_sample_field_value_0);
10055         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10056                             prog_sample_field_value_0);
10057         /* Already big endian (network order) in the header. */
10058         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10059         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10060         /* Sample#0, used for matching type, offset 0. */
10061         MLX5_SET(fte_match_set_misc4, misc4_m,
10062                  prog_sample_field_id_0, samples[0]);
10063         /* It makes no sense to set the sample ID in the mask field. */
10064         MLX5_SET(fte_match_set_misc4, misc4_v,
10065                  prog_sample_field_id_0, samples[0]);
10066         /*
10067          * Checking if message body part needs to be matched.
10068          * Some wildcard rules only matching type field should be supported.
10069          */
10070         if (ecpri_m->hdr.dummy[0]) {
10071                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10072                 switch (common.type) {
10073                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10074                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10075                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10076                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10077                                             prog_sample_field_value_1);
10078                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10079                                             prog_sample_field_value_1);
10080                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10081                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10082                                             ecpri_m->hdr.dummy[0];
10083                         /* Sample#1, to match message body, offset 4. */
10084                         MLX5_SET(fte_match_set_misc4, misc4_m,
10085                                  prog_sample_field_id_1, samples[1]);
10086                         MLX5_SET(fte_match_set_misc4, misc4_v,
10087                                  prog_sample_field_id_1, samples[1]);
10088                         break;
10089                 default:
10090                         /* Others, do not match any sample ID. */
10091                         break;
10092                 }
10093         }
10094 }
10095
10096 /*
10097  * Add connection tracking status item to matcher
10098  *
10099  * @param[in] dev
10100  *   The devich to configure through.
10101  * @param[in, out] matcher
10102  *   Flow matcher.
10103  * @param[in, out] key
10104  *   Flow matcher value.
10105  * @param[in] item
10106  *   Flow pattern to translate.
10107  */
10108 static void
10109 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10110                               void *matcher, void *key,
10111                               const struct rte_flow_item *item)
10112 {
10113         uint32_t reg_value = 0;
10114         int reg_id;
10115         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10116         uint32_t reg_mask = 0;
10117         const struct rte_flow_item_conntrack *spec = item->spec;
10118         const struct rte_flow_item_conntrack *mask = item->mask;
10119         uint32_t flags;
10120         struct rte_flow_error error;
10121
10122         if (!mask)
10123                 mask = &rte_flow_item_conntrack_mask;
10124         if (!spec || !mask->flags)
10125                 return;
10126         flags = spec->flags & mask->flags;
10127         /* The conflict should be checked in the validation. */
10128         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10129                 reg_value |= MLX5_CT_SYNDROME_VALID;
10130         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10131                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10132         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10133                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10134         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10135                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10136         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10137                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10138         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10139                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10140                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10141                 reg_mask |= 0xc0;
10142         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10143                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10144         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10145                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10146         /* The REG_C_x value could be saved during startup. */
10147         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10148         if (reg_id == REG_NON)
10149                 return;
10150         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10151                                reg_value, reg_mask);
10152 }
10153
10154 static void
10155 flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,
10156                             const struct rte_flow_item *item,
10157                             struct mlx5_flow *dev_flow, bool is_inner)
10158 {
10159         const struct rte_flow_item_flex *spec =
10160                 (const struct rte_flow_item_flex *)item->spec;
10161         int index = mlx5_flex_acquire_index(dev, spec->handle, false);
10162
10163         MLX5_ASSERT(index >= 0 && index <= (int)(sizeof(uint32_t) * CHAR_BIT));
10164         if (index < 0)
10165                 return;
10166         if (!(dev_flow->handle->flex_item & RTE_BIT32(index))) {
10167                 /* Don't count both inner and outer flex items in one rule. */
10168                 if (mlx5_flex_acquire_index(dev, spec->handle, true) != index)
10169                         MLX5_ASSERT(false);
10170                 dev_flow->handle->flex_item |= RTE_BIT32(index);
10171         }
10172         mlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);
10173 }
10174
10175 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10176
10177 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10178         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10179                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10180
10181 /**
10182  * Calculate flow matcher enable bitmap.
10183  *
10184  * @param match_criteria
10185  *   Pointer to flow matcher criteria.
10186  *
10187  * @return
10188  *   Bitmap of enabled fields.
10189  */
10190 static uint8_t
10191 flow_dv_matcher_enable(uint32_t *match_criteria)
10192 {
10193         uint8_t match_criteria_enable;
10194
10195         match_criteria_enable =
10196                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10197                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10198         match_criteria_enable |=
10199                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10200                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10201         match_criteria_enable |=
10202                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10203                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10204         match_criteria_enable |=
10205                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10206                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10207         match_criteria_enable |=
10208                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10209                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10210         match_criteria_enable |=
10211                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10212                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10213         match_criteria_enable |=
10214                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10215                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10216         return match_criteria_enable;
10217 }
10218
10219 static void
10220 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10221 {
10222         /*
10223          * Check flow matching criteria first, subtract misc5/4 length if flow
10224          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10225          * misc5/4 are not supported, and matcher creation failure is expected
10226          * w/o subtraction. If misc5 is provided, misc4 must be counted in since
10227          * misc5 is right after misc4.
10228          */
10229         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10230                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10231                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10232                 if (!(match_criteria & (1 <<
10233                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10234                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10235                 }
10236         }
10237 }
10238
10239 static struct mlx5_list_entry *
10240 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10241                          struct mlx5_list_entry *entry, void *cb_ctx)
10242 {
10243         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10244         struct mlx5_flow_dv_matcher *ref = ctx->data;
10245         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10246                                                             typeof(*tbl), tbl);
10247         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10248                                                             sizeof(*resource),
10249                                                             0, SOCKET_ID_ANY);
10250
10251         if (!resource) {
10252                 rte_flow_error_set(ctx->error, ENOMEM,
10253                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10254                                    "cannot create matcher");
10255                 return NULL;
10256         }
10257         memcpy(resource, entry, sizeof(*resource));
10258         resource->tbl = &tbl->tbl;
10259         return &resource->entry;
10260 }
10261
10262 static void
10263 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10264                              struct mlx5_list_entry *entry)
10265 {
10266         mlx5_free(entry);
10267 }
10268
10269 struct mlx5_list_entry *
10270 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10271 {
10272         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10273         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10274         struct rte_eth_dev *dev = ctx->dev;
10275         struct mlx5_flow_tbl_data_entry *tbl_data;
10276         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10277         struct rte_flow_error *error = ctx->error;
10278         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10279         struct mlx5_flow_tbl_resource *tbl;
10280         void *domain;
10281         uint32_t idx = 0;
10282         int ret;
10283
10284         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10285         if (!tbl_data) {
10286                 rte_flow_error_set(error, ENOMEM,
10287                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10288                                    NULL,
10289                                    "cannot allocate flow table data entry");
10290                 return NULL;
10291         }
10292         tbl_data->idx = idx;
10293         tbl_data->tunnel = tt_prm->tunnel;
10294         tbl_data->group_id = tt_prm->group_id;
10295         tbl_data->external = !!tt_prm->external;
10296         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10297         tbl_data->is_egress = !!key.is_egress;
10298         tbl_data->is_transfer = !!key.is_fdb;
10299         tbl_data->dummy = !!key.dummy;
10300         tbl_data->level = key.level;
10301         tbl_data->id = key.id;
10302         tbl = &tbl_data->tbl;
10303         if (key.dummy)
10304                 return &tbl_data->entry;
10305         if (key.is_fdb)
10306                 domain = sh->fdb_domain;
10307         else if (key.is_egress)
10308                 domain = sh->tx_domain;
10309         else
10310                 domain = sh->rx_domain;
10311         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10312         if (ret) {
10313                 rte_flow_error_set(error, ENOMEM,
10314                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10315                                    NULL, "cannot create flow table object");
10316                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10317                 return NULL;
10318         }
10319         if (key.level != 0) {
10320                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10321                                         (tbl->obj, &tbl_data->jump.action);
10322                 if (ret) {
10323                         rte_flow_error_set(error, ENOMEM,
10324                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10325                                            NULL,
10326                                            "cannot create flow jump action");
10327                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10328                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10329                         return NULL;
10330                 }
10331         }
10332         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10333               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10334               key.level, key.id);
10335         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10336                                               flow_dv_matcher_create_cb,
10337                                               flow_dv_matcher_match_cb,
10338                                               flow_dv_matcher_remove_cb,
10339                                               flow_dv_matcher_clone_cb,
10340                                               flow_dv_matcher_clone_free_cb);
10341         if (!tbl_data->matchers) {
10342                 rte_flow_error_set(error, ENOMEM,
10343                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10344                                    NULL,
10345                                    "cannot create tbl matcher list");
10346                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10347                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10348                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10349                 return NULL;
10350         }
10351         return &tbl_data->entry;
10352 }
10353
10354 int
10355 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10356                      void *cb_ctx)
10357 {
10358         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10359         struct mlx5_flow_tbl_data_entry *tbl_data =
10360                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10361         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10362
10363         return tbl_data->level != key.level ||
10364                tbl_data->id != key.id ||
10365                tbl_data->dummy != key.dummy ||
10366                tbl_data->is_transfer != !!key.is_fdb ||
10367                tbl_data->is_egress != !!key.is_egress;
10368 }
10369
10370 struct mlx5_list_entry *
10371 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10372                       void *cb_ctx)
10373 {
10374         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10375         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10376         struct mlx5_flow_tbl_data_entry *tbl_data;
10377         struct rte_flow_error *error = ctx->error;
10378         uint32_t idx = 0;
10379
10380         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10381         if (!tbl_data) {
10382                 rte_flow_error_set(error, ENOMEM,
10383                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10384                                    NULL,
10385                                    "cannot allocate flow table data entry");
10386                 return NULL;
10387         }
10388         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10389         tbl_data->idx = idx;
10390         return &tbl_data->entry;
10391 }
10392
10393 void
10394 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10395 {
10396         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10397         struct mlx5_flow_tbl_data_entry *tbl_data =
10398                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10399
10400         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10401 }
10402
10403 /**
10404  * Get a flow table.
10405  *
10406  * @param[in, out] dev
10407  *   Pointer to rte_eth_dev structure.
10408  * @param[in] table_level
10409  *   Table level to use.
10410  * @param[in] egress
10411  *   Direction of the table.
10412  * @param[in] transfer
10413  *   E-Switch or NIC flow.
10414  * @param[in] dummy
10415  *   Dummy entry for dv API.
10416  * @param[in] table_id
10417  *   Table id to use.
10418  * @param[out] error
10419  *   pointer to error structure.
10420  *
10421  * @return
10422  *   Returns tables resource based on the index, NULL in case of failed.
10423  */
10424 struct mlx5_flow_tbl_resource *
10425 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10426                          uint32_t table_level, uint8_t egress,
10427                          uint8_t transfer,
10428                          bool external,
10429                          const struct mlx5_flow_tunnel *tunnel,
10430                          uint32_t group_id, uint8_t dummy,
10431                          uint32_t table_id,
10432                          struct rte_flow_error *error)
10433 {
10434         struct mlx5_priv *priv = dev->data->dev_private;
10435         union mlx5_flow_tbl_key table_key = {
10436                 {
10437                         .level = table_level,
10438                         .id = table_id,
10439                         .reserved = 0,
10440                         .dummy = !!dummy,
10441                         .is_fdb = !!transfer,
10442                         .is_egress = !!egress,
10443                 }
10444         };
10445         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10446                 .tunnel = tunnel,
10447                 .group_id = group_id,
10448                 .external = external,
10449         };
10450         struct mlx5_flow_cb_ctx ctx = {
10451                 .dev = dev,
10452                 .error = error,
10453                 .data = &table_key.v64,
10454                 .data2 = &tt_prm,
10455         };
10456         struct mlx5_list_entry *entry;
10457         struct mlx5_flow_tbl_data_entry *tbl_data;
10458
10459         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10460         if (!entry) {
10461                 rte_flow_error_set(error, ENOMEM,
10462                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10463                                    "cannot get table");
10464                 return NULL;
10465         }
10466         DRV_LOG(DEBUG, "table_level %u table_id %u "
10467                 "tunnel %u group %u registered.",
10468                 table_level, table_id,
10469                 tunnel ? tunnel->tunnel_id : 0, group_id);
10470         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10471         return &tbl_data->tbl;
10472 }
10473
10474 void
10475 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10476 {
10477         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10478         struct mlx5_flow_tbl_data_entry *tbl_data =
10479                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10480
10481         MLX5_ASSERT(entry && sh);
10482         if (tbl_data->jump.action)
10483                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10484         if (tbl_data->tbl.obj)
10485                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10486         if (tbl_data->tunnel_offload && tbl_data->external) {
10487                 struct mlx5_list_entry *he;
10488                 struct mlx5_hlist *tunnel_grp_hash;
10489                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10490                 union tunnel_tbl_key tunnel_key = {
10491                         .tunnel_id = tbl_data->tunnel ?
10492                                         tbl_data->tunnel->tunnel_id : 0,
10493                         .group = tbl_data->group_id
10494                 };
10495                 uint32_t table_level = tbl_data->level;
10496                 struct mlx5_flow_cb_ctx ctx = {
10497                         .data = (void *)&tunnel_key.val,
10498                 };
10499
10500                 tunnel_grp_hash = tbl_data->tunnel ?
10501                                         tbl_data->tunnel->groups :
10502                                         thub->groups;
10503                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10504                 if (he)
10505                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10506                 DRV_LOG(DEBUG,
10507                         "table_level %u id %u tunnel %u group %u released.",
10508                         table_level,
10509                         tbl_data->id,
10510                         tbl_data->tunnel ?
10511                         tbl_data->tunnel->tunnel_id : 0,
10512                         tbl_data->group_id);
10513         }
10514         mlx5_list_destroy(tbl_data->matchers);
10515         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10516 }
10517
10518 /**
10519  * Release a flow table.
10520  *
10521  * @param[in] sh
10522  *   Pointer to device shared structure.
10523  * @param[in] tbl
10524  *   Table resource to be released.
10525  *
10526  * @return
10527  *   Returns 0 if table was released, else return 1;
10528  */
10529 static int
10530 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10531                              struct mlx5_flow_tbl_resource *tbl)
10532 {
10533         struct mlx5_flow_tbl_data_entry *tbl_data =
10534                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10535
10536         if (!tbl)
10537                 return 0;
10538         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10539 }
10540
10541 int
10542 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10543                          struct mlx5_list_entry *entry, void *cb_ctx)
10544 {
10545         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10546         struct mlx5_flow_dv_matcher *ref = ctx->data;
10547         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10548                                                         entry);
10549
10550         return cur->crc != ref->crc ||
10551                cur->priority != ref->priority ||
10552                memcmp((const void *)cur->mask.buf,
10553                       (const void *)ref->mask.buf, ref->mask.size);
10554 }
10555
10556 struct mlx5_list_entry *
10557 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10558 {
10559         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10560         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10561         struct mlx5_flow_dv_matcher *ref = ctx->data;
10562         struct mlx5_flow_dv_matcher *resource;
10563         struct mlx5dv_flow_matcher_attr dv_attr = {
10564                 .type = IBV_FLOW_ATTR_NORMAL,
10565                 .match_mask = (void *)&ref->mask,
10566         };
10567         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10568                                                             typeof(*tbl), tbl);
10569         int ret;
10570
10571         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10572                                SOCKET_ID_ANY);
10573         if (!resource) {
10574                 rte_flow_error_set(ctx->error, ENOMEM,
10575                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10576                                    "cannot create matcher");
10577                 return NULL;
10578         }
10579         *resource = *ref;
10580         dv_attr.match_criteria_enable =
10581                 flow_dv_matcher_enable(resource->mask.buf);
10582         __flow_dv_adjust_buf_size(&ref->mask.size,
10583                                   dv_attr.match_criteria_enable);
10584         dv_attr.priority = ref->priority;
10585         if (tbl->is_egress)
10586                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10587         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10588                                                tbl->tbl.obj,
10589                                                &resource->matcher_object);
10590         if (ret) {
10591                 mlx5_free(resource);
10592                 rte_flow_error_set(ctx->error, ENOMEM,
10593                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10594                                    "cannot create matcher");
10595                 return NULL;
10596         }
10597         return &resource->entry;
10598 }
10599
10600 /**
10601  * Register the flow matcher.
10602  *
10603  * @param[in, out] dev
10604  *   Pointer to rte_eth_dev structure.
10605  * @param[in, out] matcher
10606  *   Pointer to flow matcher.
10607  * @param[in, out] key
10608  *   Pointer to flow table key.
10609  * @parm[in, out] dev_flow
10610  *   Pointer to the dev_flow.
10611  * @param[out] error
10612  *   pointer to error structure.
10613  *
10614  * @return
10615  *   0 on success otherwise -errno and errno is set.
10616  */
10617 static int
10618 flow_dv_matcher_register(struct rte_eth_dev *dev,
10619                          struct mlx5_flow_dv_matcher *ref,
10620                          union mlx5_flow_tbl_key *key,
10621                          struct mlx5_flow *dev_flow,
10622                          const struct mlx5_flow_tunnel *tunnel,
10623                          uint32_t group_id,
10624                          struct rte_flow_error *error)
10625 {
10626         struct mlx5_list_entry *entry;
10627         struct mlx5_flow_dv_matcher *resource;
10628         struct mlx5_flow_tbl_resource *tbl;
10629         struct mlx5_flow_tbl_data_entry *tbl_data;
10630         struct mlx5_flow_cb_ctx ctx = {
10631                 .error = error,
10632                 .data = ref,
10633         };
10634         /**
10635          * tunnel offload API requires this registration for cases when
10636          * tunnel match rule was inserted before tunnel set rule.
10637          */
10638         tbl = flow_dv_tbl_resource_get(dev, key->level,
10639                                        key->is_egress, key->is_fdb,
10640                                        dev_flow->external, tunnel,
10641                                        group_id, 0, key->id, error);
10642         if (!tbl)
10643                 return -rte_errno;      /* No need to refill the error info */
10644         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10645         ref->tbl = tbl;
10646         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10647         if (!entry) {
10648                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10649                 return rte_flow_error_set(error, ENOMEM,
10650                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10651                                           "cannot allocate ref memory");
10652         }
10653         resource = container_of(entry, typeof(*resource), entry);
10654         dev_flow->handle->dvh.matcher = resource;
10655         return 0;
10656 }
10657
10658 struct mlx5_list_entry *
10659 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10660 {
10661         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10662         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10663         struct mlx5_flow_dv_tag_resource *entry;
10664         uint32_t idx = 0;
10665         int ret;
10666
10667         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10668         if (!entry) {
10669                 rte_flow_error_set(ctx->error, ENOMEM,
10670                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10671                                    "cannot allocate resource memory");
10672                 return NULL;
10673         }
10674         entry->idx = idx;
10675         entry->tag_id = *(uint32_t *)(ctx->data);
10676         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10677                                                   &entry->action);
10678         if (ret) {
10679                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10680                 rte_flow_error_set(ctx->error, ENOMEM,
10681                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10682                                    NULL, "cannot create action");
10683                 return NULL;
10684         }
10685         return &entry->entry;
10686 }
10687
10688 int
10689 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10690                      void *cb_ctx)
10691 {
10692         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10693         struct mlx5_flow_dv_tag_resource *tag =
10694                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10695
10696         return *(uint32_t *)(ctx->data) != tag->tag_id;
10697 }
10698
10699 struct mlx5_list_entry *
10700 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10701                      void *cb_ctx)
10702 {
10703         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10704         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10705         struct mlx5_flow_dv_tag_resource *entry;
10706         uint32_t idx = 0;
10707
10708         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10709         if (!entry) {
10710                 rte_flow_error_set(ctx->error, ENOMEM,
10711                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10712                                    "cannot allocate tag resource memory");
10713                 return NULL;
10714         }
10715         memcpy(entry, oentry, sizeof(*entry));
10716         entry->idx = idx;
10717         return &entry->entry;
10718 }
10719
10720 void
10721 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10722 {
10723         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10724         struct mlx5_flow_dv_tag_resource *tag =
10725                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10726
10727         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10728 }
10729
10730 /**
10731  * Find existing tag resource or create and register a new one.
10732  *
10733  * @param dev[in, out]
10734  *   Pointer to rte_eth_dev structure.
10735  * @param[in, out] tag_be24
10736  *   Tag value in big endian then R-shift 8.
10737  * @parm[in, out] dev_flow
10738  *   Pointer to the dev_flow.
10739  * @param[out] error
10740  *   pointer to error structure.
10741  *
10742  * @return
10743  *   0 on success otherwise -errno and errno is set.
10744  */
10745 static int
10746 flow_dv_tag_resource_register
10747                         (struct rte_eth_dev *dev,
10748                          uint32_t tag_be24,
10749                          struct mlx5_flow *dev_flow,
10750                          struct rte_flow_error *error)
10751 {
10752         struct mlx5_priv *priv = dev->data->dev_private;
10753         struct mlx5_flow_dv_tag_resource *resource;
10754         struct mlx5_list_entry *entry;
10755         struct mlx5_flow_cb_ctx ctx = {
10756                                         .error = error,
10757                                         .data = &tag_be24,
10758                                         };
10759         struct mlx5_hlist *tag_table;
10760
10761         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10762                                       "tags",
10763                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10764                                       false, false, priv->sh,
10765                                       flow_dv_tag_create_cb,
10766                                       flow_dv_tag_match_cb,
10767                                       flow_dv_tag_remove_cb,
10768                                       flow_dv_tag_clone_cb,
10769                                       flow_dv_tag_clone_free_cb,
10770                                       error);
10771         if (unlikely(!tag_table))
10772                 return -rte_errno;
10773         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10774         if (entry) {
10775                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10776                                         entry);
10777                 dev_flow->handle->dvh.rix_tag = resource->idx;
10778                 dev_flow->dv.tag_resource = resource;
10779                 return 0;
10780         }
10781         return -rte_errno;
10782 }
10783
10784 void
10785 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10786 {
10787         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10788         struct mlx5_flow_dv_tag_resource *tag =
10789                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10790
10791         MLX5_ASSERT(tag && sh && tag->action);
10792         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10793         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10794         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10795 }
10796
10797 /**
10798  * Release the tag.
10799  *
10800  * @param dev
10801  *   Pointer to Ethernet device.
10802  * @param tag_idx
10803  *   Tag index.
10804  *
10805  * @return
10806  *   1 while a reference on it exists, 0 when freed.
10807  */
10808 static int
10809 flow_dv_tag_release(struct rte_eth_dev *dev,
10810                     uint32_t tag_idx)
10811 {
10812         struct mlx5_priv *priv = dev->data->dev_private;
10813         struct mlx5_flow_dv_tag_resource *tag;
10814
10815         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10816         if (!tag)
10817                 return 0;
10818         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10819                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10820         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10821 }
10822
10823 /**
10824  * Translate action PORT_ID / REPRESENTED_PORT to vport.
10825  *
10826  * @param[in] dev
10827  *   Pointer to rte_eth_dev structure.
10828  * @param[in] action
10829  *   Pointer to action PORT_ID / REPRESENTED_PORT.
10830  * @param[out] dst_port_id
10831  *   The target port ID.
10832  * @param[out] error
10833  *   Pointer to the error structure.
10834  *
10835  * @return
10836  *   0 on success, a negative errno value otherwise and rte_errno is set.
10837  */
10838 static int
10839 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10840                                  const struct rte_flow_action *action,
10841                                  uint32_t *dst_port_id,
10842                                  struct rte_flow_error *error)
10843 {
10844         uint32_t port;
10845         struct mlx5_priv *priv;
10846
10847         switch (action->type) {
10848         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10849                 const struct rte_flow_action_port_id *conf;
10850
10851                 conf = (const struct rte_flow_action_port_id *)action->conf;
10852                 port = conf->original ? dev->data->port_id : conf->id;
10853                 break;
10854         }
10855         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10856                 const struct rte_flow_action_ethdev *ethdev;
10857
10858                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10859                 port = ethdev->port_id;
10860                 break;
10861         }
10862         default:
10863                 MLX5_ASSERT(false);
10864                 return rte_flow_error_set(error, EINVAL,
10865                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
10866                                           "unknown E-Switch action");
10867         }
10868
10869         priv = mlx5_port_to_eswitch_info(port, false);
10870         if (!priv)
10871                 return rte_flow_error_set(error, -rte_errno,
10872                                           RTE_FLOW_ERROR_TYPE_ACTION,
10873                                           NULL,
10874                                           "No eswitch info was found for port");
10875 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10876         /*
10877          * This parameter is transferred to
10878          * mlx5dv_dr_action_create_dest_ib_port().
10879          */
10880         *dst_port_id = priv->dev_port;
10881 #else
10882         /*
10883          * Legacy mode, no LAG configurations is supported.
10884          * This parameter is transferred to
10885          * mlx5dv_dr_action_create_dest_vport().
10886          */
10887         *dst_port_id = priv->vport_id;
10888 #endif
10889         return 0;
10890 }
10891
10892 /**
10893  * Create a counter with aging configuration.
10894  *
10895  * @param[in] dev
10896  *   Pointer to rte_eth_dev structure.
10897  * @param[in] dev_flow
10898  *   Pointer to the mlx5_flow.
10899  * @param[out] count
10900  *   Pointer to the counter action configuration.
10901  * @param[in] age
10902  *   Pointer to the aging action configuration.
10903  *
10904  * @return
10905  *   Index to flow counter on success, 0 otherwise.
10906  */
10907 static uint32_t
10908 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10909                                 struct mlx5_flow *dev_flow,
10910                                 const struct rte_flow_action_count *count
10911                                         __rte_unused,
10912                                 const struct rte_flow_action_age *age)
10913 {
10914         uint32_t counter;
10915         struct mlx5_age_param *age_param;
10916
10917         counter = flow_dv_counter_alloc(dev, !!age);
10918         if (!counter || age == NULL)
10919                 return counter;
10920         age_param = flow_dv_counter_idx_get_age(dev, counter);
10921         age_param->context = age->context ? age->context :
10922                 (void *)(uintptr_t)(dev_flow->flow_idx);
10923         age_param->timeout = age->timeout;
10924         age_param->port_id = dev->data->port_id;
10925         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10926         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10927         return counter;
10928 }
10929
10930 /**
10931  * Add Tx queue matcher
10932  *
10933  * @param[in] dev
10934  *   Pointer to the dev struct.
10935  * @param[in, out] matcher
10936  *   Flow matcher.
10937  * @param[in, out] key
10938  *   Flow matcher value.
10939  * @param[in] item
10940  *   Flow pattern to translate.
10941  * @param[in] inner
10942  *   Item is inner pattern.
10943  */
10944 static void
10945 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10946                                 void *matcher, void *key,
10947                                 const struct rte_flow_item *item)
10948 {
10949         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10950         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10951         void *misc_m =
10952                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10953         void *misc_v =
10954                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10955         struct mlx5_txq_ctrl *txq;
10956         uint32_t queue, mask;
10957
10958         queue_m = (const void *)item->mask;
10959         queue_v = (const void *)item->spec;
10960         if (!queue_v)
10961                 return;
10962         txq = mlx5_txq_get(dev, queue_v->queue);
10963         if (!txq)
10964                 return;
10965         if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
10966                 queue = txq->obj->sq->id;
10967         else
10968                 queue = txq->obj->sq_obj.sq->id;
10969         mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
10970         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
10971         MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
10972         mlx5_txq_release(dev, queue_v->queue);
10973 }
10974
10975 /**
10976  * Set the hash fields according to the @p flow information.
10977  *
10978  * @param[in] dev_flow
10979  *   Pointer to the mlx5_flow.
10980  * @param[in] rss_desc
10981  *   Pointer to the mlx5_flow_rss_desc.
10982  */
10983 static void
10984 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10985                        struct mlx5_flow_rss_desc *rss_desc)
10986 {
10987         uint64_t items = dev_flow->handle->layers;
10988         int rss_inner = 0;
10989         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10990
10991         dev_flow->hash_fields = 0;
10992 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10993         if (rss_desc->level >= 2)
10994                 rss_inner = 1;
10995 #endif
10996         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10997             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10998                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10999                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11000                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
11001                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11002                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
11003                         else
11004                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
11005                 }
11006         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
11007                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
11008                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
11009                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11010                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
11011                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11012                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
11013                         else
11014                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
11015                 }
11016         }
11017         if (dev_flow->hash_fields == 0)
11018                 /*
11019                  * There is no match between the RSS types and the
11020                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
11021                  */
11022                 return;
11023         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
11024             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
11025                 if (rss_types & RTE_ETH_RSS_UDP) {
11026                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11027                                 dev_flow->hash_fields |=
11028                                                 IBV_RX_HASH_SRC_PORT_UDP;
11029                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11030                                 dev_flow->hash_fields |=
11031                                                 IBV_RX_HASH_DST_PORT_UDP;
11032                         else
11033                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
11034                 }
11035         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
11036                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
11037                 if (rss_types & RTE_ETH_RSS_TCP) {
11038                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11039                                 dev_flow->hash_fields |=
11040                                                 IBV_RX_HASH_SRC_PORT_TCP;
11041                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11042                                 dev_flow->hash_fields |=
11043                                                 IBV_RX_HASH_DST_PORT_TCP;
11044                         else
11045                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
11046                 }
11047         }
11048         if (rss_inner)
11049                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
11050 }
11051
11052 /**
11053  * Prepare an Rx Hash queue.
11054  *
11055  * @param dev
11056  *   Pointer to Ethernet device.
11057  * @param[in] dev_flow
11058  *   Pointer to the mlx5_flow.
11059  * @param[in] rss_desc
11060  *   Pointer to the mlx5_flow_rss_desc.
11061  * @param[out] hrxq_idx
11062  *   Hash Rx queue index.
11063  *
11064  * @return
11065  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
11066  */
11067 static struct mlx5_hrxq *
11068 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
11069                      struct mlx5_flow *dev_flow,
11070                      struct mlx5_flow_rss_desc *rss_desc,
11071                      uint32_t *hrxq_idx)
11072 {
11073         struct mlx5_priv *priv = dev->data->dev_private;
11074         struct mlx5_flow_handle *dh = dev_flow->handle;
11075         struct mlx5_hrxq *hrxq;
11076
11077         MLX5_ASSERT(rss_desc->queue_num);
11078         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
11079         rss_desc->hash_fields = dev_flow->hash_fields;
11080         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11081         rss_desc->shared_rss = 0;
11082         if (rss_desc->hash_fields == 0)
11083                 rss_desc->queue_num = 1;
11084         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
11085         if (!*hrxq_idx)
11086                 return NULL;
11087         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
11088                               *hrxq_idx);
11089         return hrxq;
11090 }
11091
11092 /**
11093  * Release sample sub action resource.
11094  *
11095  * @param[in, out] dev
11096  *   Pointer to rte_eth_dev structure.
11097  * @param[in] act_res
11098  *   Pointer to sample sub action resource.
11099  */
11100 static void
11101 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11102                                    struct mlx5_flow_sub_actions_idx *act_res)
11103 {
11104         if (act_res->rix_hrxq) {
11105                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11106                 act_res->rix_hrxq = 0;
11107         }
11108         if (act_res->rix_encap_decap) {
11109                 flow_dv_encap_decap_resource_release(dev,
11110                                                      act_res->rix_encap_decap);
11111                 act_res->rix_encap_decap = 0;
11112         }
11113         if (act_res->rix_port_id_action) {
11114                 flow_dv_port_id_action_resource_release(dev,
11115                                                 act_res->rix_port_id_action);
11116                 act_res->rix_port_id_action = 0;
11117         }
11118         if (act_res->rix_tag) {
11119                 flow_dv_tag_release(dev, act_res->rix_tag);
11120                 act_res->rix_tag = 0;
11121         }
11122         if (act_res->rix_jump) {
11123                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11124                 act_res->rix_jump = 0;
11125         }
11126 }
11127
11128 int
11129 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11130                         struct mlx5_list_entry *entry, void *cb_ctx)
11131 {
11132         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11133         struct rte_eth_dev *dev = ctx->dev;
11134         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11135         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11136                                                               typeof(*resource),
11137                                                               entry);
11138
11139         if (ctx_resource->ratio == resource->ratio &&
11140             ctx_resource->ft_type == resource->ft_type &&
11141             ctx_resource->ft_id == resource->ft_id &&
11142             ctx_resource->set_action == resource->set_action &&
11143             !memcmp((void *)&ctx_resource->sample_act,
11144                     (void *)&resource->sample_act,
11145                     sizeof(struct mlx5_flow_sub_actions_list))) {
11146                 /*
11147                  * Existing sample action should release the prepared
11148                  * sub-actions reference counter.
11149                  */
11150                 flow_dv_sample_sub_actions_release(dev,
11151                                                    &ctx_resource->sample_idx);
11152                 return 0;
11153         }
11154         return 1;
11155 }
11156
11157 struct mlx5_list_entry *
11158 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11159 {
11160         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11161         struct rte_eth_dev *dev = ctx->dev;
11162         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11163         void **sample_dv_actions = ctx_resource->sub_actions;
11164         struct mlx5_flow_dv_sample_resource *resource;
11165         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11166         struct mlx5_priv *priv = dev->data->dev_private;
11167         struct mlx5_dev_ctx_shared *sh = priv->sh;
11168         struct mlx5_flow_tbl_resource *tbl;
11169         uint32_t idx = 0;
11170         const uint32_t next_ft_step = 1;
11171         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11172         uint8_t is_egress = 0;
11173         uint8_t is_transfer = 0;
11174         struct rte_flow_error *error = ctx->error;
11175
11176         /* Register new sample resource. */
11177         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11178         if (!resource) {
11179                 rte_flow_error_set(error, ENOMEM,
11180                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11181                                           NULL,
11182                                           "cannot allocate resource memory");
11183                 return NULL;
11184         }
11185         *resource = *ctx_resource;
11186         /* Create normal path table level */
11187         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11188                 is_transfer = 1;
11189         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11190                 is_egress = 1;
11191         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11192                                         is_egress, is_transfer,
11193                                         true, NULL, 0, 0, 0, error);
11194         if (!tbl) {
11195                 rte_flow_error_set(error, ENOMEM,
11196                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11197                                           NULL,
11198                                           "fail to create normal path table "
11199                                           "for sample");
11200                 goto error;
11201         }
11202         resource->normal_path_tbl = tbl;
11203         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11204                 if (!sh->default_miss_action) {
11205                         rte_flow_error_set(error, ENOMEM,
11206                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11207                                                 NULL,
11208                                                 "default miss action was not "
11209                                                 "created");
11210                         goto error;
11211                 }
11212                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11213                                                 sh->default_miss_action;
11214         }
11215         /* Create a DR sample action */
11216         sampler_attr.sample_ratio = resource->ratio;
11217         sampler_attr.default_next_table = tbl->obj;
11218         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11219         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11220                                                         &sample_dv_actions[0];
11221         sampler_attr.action = resource->set_action;
11222         if (mlx5_os_flow_dr_create_flow_action_sampler
11223                         (&sampler_attr, &resource->verbs_action)) {
11224                 rte_flow_error_set(error, ENOMEM,
11225                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11226                                         NULL, "cannot create sample action");
11227                 goto error;
11228         }
11229         resource->idx = idx;
11230         resource->dev = dev;
11231         return &resource->entry;
11232 error:
11233         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11234                 flow_dv_sample_sub_actions_release(dev,
11235                                                    &resource->sample_idx);
11236         if (resource->normal_path_tbl)
11237                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11238                                 resource->normal_path_tbl);
11239         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11240         return NULL;
11241
11242 }
11243
11244 struct mlx5_list_entry *
11245 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11246                          struct mlx5_list_entry *entry __rte_unused,
11247                          void *cb_ctx)
11248 {
11249         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11250         struct rte_eth_dev *dev = ctx->dev;
11251         struct mlx5_flow_dv_sample_resource *resource;
11252         struct mlx5_priv *priv = dev->data->dev_private;
11253         struct mlx5_dev_ctx_shared *sh = priv->sh;
11254         uint32_t idx = 0;
11255
11256         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11257         if (!resource) {
11258                 rte_flow_error_set(ctx->error, ENOMEM,
11259                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11260                                           NULL,
11261                                           "cannot allocate resource memory");
11262                 return NULL;
11263         }
11264         memcpy(resource, entry, sizeof(*resource));
11265         resource->idx = idx;
11266         resource->dev = dev;
11267         return &resource->entry;
11268 }
11269
11270 void
11271 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11272                              struct mlx5_list_entry *entry)
11273 {
11274         struct mlx5_flow_dv_sample_resource *resource =
11275                                   container_of(entry, typeof(*resource), entry);
11276         struct rte_eth_dev *dev = resource->dev;
11277         struct mlx5_priv *priv = dev->data->dev_private;
11278
11279         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11280 }
11281
11282 /**
11283  * Find existing sample resource or create and register a new one.
11284  *
11285  * @param[in, out] dev
11286  *   Pointer to rte_eth_dev structure.
11287  * @param[in] ref
11288  *   Pointer to sample resource reference.
11289  * @parm[in, out] dev_flow
11290  *   Pointer to the dev_flow.
11291  * @param[out] error
11292  *   pointer to error structure.
11293  *
11294  * @return
11295  *   0 on success otherwise -errno and errno is set.
11296  */
11297 static int
11298 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11299                          struct mlx5_flow_dv_sample_resource *ref,
11300                          struct mlx5_flow *dev_flow,
11301                          struct rte_flow_error *error)
11302 {
11303         struct mlx5_flow_dv_sample_resource *resource;
11304         struct mlx5_list_entry *entry;
11305         struct mlx5_priv *priv = dev->data->dev_private;
11306         struct mlx5_flow_cb_ctx ctx = {
11307                 .dev = dev,
11308                 .error = error,
11309                 .data = ref,
11310         };
11311
11312         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11313         if (!entry)
11314                 return -rte_errno;
11315         resource = container_of(entry, typeof(*resource), entry);
11316         dev_flow->handle->dvh.rix_sample = resource->idx;
11317         dev_flow->dv.sample_res = resource;
11318         return 0;
11319 }
11320
11321 int
11322 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11323                             struct mlx5_list_entry *entry, void *cb_ctx)
11324 {
11325         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11326         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11327         struct rte_eth_dev *dev = ctx->dev;
11328         struct mlx5_flow_dv_dest_array_resource *resource =
11329                                   container_of(entry, typeof(*resource), entry);
11330         uint32_t idx = 0;
11331
11332         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11333             ctx_resource->ft_type == resource->ft_type &&
11334             !memcmp((void *)resource->sample_act,
11335                     (void *)ctx_resource->sample_act,
11336                    (ctx_resource->num_of_dest *
11337                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11338                 /*
11339                  * Existing sample action should release the prepared
11340                  * sub-actions reference counter.
11341                  */
11342                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11343                         flow_dv_sample_sub_actions_release(dev,
11344                                         &ctx_resource->sample_idx[idx]);
11345                 return 0;
11346         }
11347         return 1;
11348 }
11349
11350 struct mlx5_list_entry *
11351 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11352 {
11353         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11354         struct rte_eth_dev *dev = ctx->dev;
11355         struct mlx5_flow_dv_dest_array_resource *resource;
11356         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11357         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11358         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11359         struct mlx5_priv *priv = dev->data->dev_private;
11360         struct mlx5_dev_ctx_shared *sh = priv->sh;
11361         struct mlx5_flow_sub_actions_list *sample_act;
11362         struct mlx5dv_dr_domain *domain;
11363         uint32_t idx = 0, res_idx = 0;
11364         struct rte_flow_error *error = ctx->error;
11365         uint64_t action_flags;
11366         int ret;
11367
11368         /* Register new destination array resource. */
11369         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11370                                             &res_idx);
11371         if (!resource) {
11372                 rte_flow_error_set(error, ENOMEM,
11373                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11374                                           NULL,
11375                                           "cannot allocate resource memory");
11376                 return NULL;
11377         }
11378         *resource = *ctx_resource;
11379         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11380                 domain = sh->fdb_domain;
11381         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11382                 domain = sh->rx_domain;
11383         else
11384                 domain = sh->tx_domain;
11385         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11386                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11387                                  mlx5_malloc(MLX5_MEM_ZERO,
11388                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11389                                  0, SOCKET_ID_ANY);
11390                 if (!dest_attr[idx]) {
11391                         rte_flow_error_set(error, ENOMEM,
11392                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11393                                            NULL,
11394                                            "cannot allocate resource memory");
11395                         goto error;
11396                 }
11397                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11398                 sample_act = &ctx_resource->sample_act[idx];
11399                 action_flags = sample_act->action_flags;
11400                 switch (action_flags) {
11401                 case MLX5_FLOW_ACTION_QUEUE:
11402                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11403                         break;
11404                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11405                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11406                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11407                         dest_attr[idx]->dest_reformat->reformat =
11408                                         sample_act->dr_encap_action;
11409                         dest_attr[idx]->dest_reformat->dest =
11410                                         sample_act->dr_port_id_action;
11411                         break;
11412                 case MLX5_FLOW_ACTION_PORT_ID:
11413                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11414                         break;
11415                 case MLX5_FLOW_ACTION_JUMP:
11416                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11417                         break;
11418                 default:
11419                         rte_flow_error_set(error, EINVAL,
11420                                            RTE_FLOW_ERROR_TYPE_ACTION,
11421                                            NULL,
11422                                            "unsupported actions type");
11423                         goto error;
11424                 }
11425         }
11426         /* create a dest array action */
11427         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11428                                                 (domain,
11429                                                  resource->num_of_dest,
11430                                                  dest_attr,
11431                                                  &resource->action);
11432         if (ret) {
11433                 rte_flow_error_set(error, ENOMEM,
11434                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11435                                    NULL,
11436                                    "cannot create destination array action");
11437                 goto error;
11438         }
11439         resource->idx = res_idx;
11440         resource->dev = dev;
11441         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11442                 mlx5_free(dest_attr[idx]);
11443         return &resource->entry;
11444 error:
11445         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11446                 flow_dv_sample_sub_actions_release(dev,
11447                                                    &resource->sample_idx[idx]);
11448                 if (dest_attr[idx])
11449                         mlx5_free(dest_attr[idx]);
11450         }
11451         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11452         return NULL;
11453 }
11454
11455 struct mlx5_list_entry *
11456 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11457                             struct mlx5_list_entry *entry __rte_unused,
11458                             void *cb_ctx)
11459 {
11460         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11461         struct rte_eth_dev *dev = ctx->dev;
11462         struct mlx5_flow_dv_dest_array_resource *resource;
11463         struct mlx5_priv *priv = dev->data->dev_private;
11464         struct mlx5_dev_ctx_shared *sh = priv->sh;
11465         uint32_t res_idx = 0;
11466         struct rte_flow_error *error = ctx->error;
11467
11468         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11469                                       &res_idx);
11470         if (!resource) {
11471                 rte_flow_error_set(error, ENOMEM,
11472                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11473                                           NULL,
11474                                           "cannot allocate dest-array memory");
11475                 return NULL;
11476         }
11477         memcpy(resource, entry, sizeof(*resource));
11478         resource->idx = res_idx;
11479         resource->dev = dev;
11480         return &resource->entry;
11481 }
11482
11483 void
11484 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11485                                  struct mlx5_list_entry *entry)
11486 {
11487         struct mlx5_flow_dv_dest_array_resource *resource =
11488                         container_of(entry, typeof(*resource), entry);
11489         struct rte_eth_dev *dev = resource->dev;
11490         struct mlx5_priv *priv = dev->data->dev_private;
11491
11492         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11493 }
11494
11495 /**
11496  * Find existing destination array resource or create and register a new one.
11497  *
11498  * @param[in, out] dev
11499  *   Pointer to rte_eth_dev structure.
11500  * @param[in] ref
11501  *   Pointer to destination array resource reference.
11502  * @parm[in, out] dev_flow
11503  *   Pointer to the dev_flow.
11504  * @param[out] error
11505  *   pointer to error structure.
11506  *
11507  * @return
11508  *   0 on success otherwise -errno and errno is set.
11509  */
11510 static int
11511 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11512                          struct mlx5_flow_dv_dest_array_resource *ref,
11513                          struct mlx5_flow *dev_flow,
11514                          struct rte_flow_error *error)
11515 {
11516         struct mlx5_flow_dv_dest_array_resource *resource;
11517         struct mlx5_priv *priv = dev->data->dev_private;
11518         struct mlx5_list_entry *entry;
11519         struct mlx5_flow_cb_ctx ctx = {
11520                 .dev = dev,
11521                 .error = error,
11522                 .data = ref,
11523         };
11524
11525         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11526         if (!entry)
11527                 return -rte_errno;
11528         resource = container_of(entry, typeof(*resource), entry);
11529         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11530         dev_flow->dv.dest_array_res = resource;
11531         return 0;
11532 }
11533
11534 /**
11535  * Convert Sample action to DV specification.
11536  *
11537  * @param[in] dev
11538  *   Pointer to rte_eth_dev structure.
11539  * @param[in] action
11540  *   Pointer to sample action structure.
11541  * @param[in, out] dev_flow
11542  *   Pointer to the mlx5_flow.
11543  * @param[in] attr
11544  *   Pointer to the flow attributes.
11545  * @param[in, out] num_of_dest
11546  *   Pointer to the num of destination.
11547  * @param[in, out] sample_actions
11548  *   Pointer to sample actions list.
11549  * @param[in, out] res
11550  *   Pointer to sample resource.
11551  * @param[out] error
11552  *   Pointer to the error structure.
11553  *
11554  * @return
11555  *   0 on success, a negative errno value otherwise and rte_errno is set.
11556  */
11557 static int
11558 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11559                                 const struct rte_flow_action_sample *action,
11560                                 struct mlx5_flow *dev_flow,
11561                                 const struct rte_flow_attr *attr,
11562                                 uint32_t *num_of_dest,
11563                                 void **sample_actions,
11564                                 struct mlx5_flow_dv_sample_resource *res,
11565                                 struct rte_flow_error *error)
11566 {
11567         struct mlx5_priv *priv = dev->data->dev_private;
11568         const struct rte_flow_action *sub_actions;
11569         struct mlx5_flow_sub_actions_list *sample_act;
11570         struct mlx5_flow_sub_actions_idx *sample_idx;
11571         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11572         struct rte_flow *flow = dev_flow->flow;
11573         struct mlx5_flow_rss_desc *rss_desc;
11574         uint64_t action_flags = 0;
11575
11576         MLX5_ASSERT(wks);
11577         rss_desc = &wks->rss_desc;
11578         sample_act = &res->sample_act;
11579         sample_idx = &res->sample_idx;
11580         res->ratio = action->ratio;
11581         sub_actions = action->actions;
11582         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11583                 int type = sub_actions->type;
11584                 uint32_t pre_rix = 0;
11585                 void *pre_r;
11586                 switch (type) {
11587                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11588                 {
11589                         const struct rte_flow_action_queue *queue;
11590                         struct mlx5_hrxq *hrxq;
11591                         uint32_t hrxq_idx;
11592
11593                         queue = sub_actions->conf;
11594                         rss_desc->queue_num = 1;
11595                         rss_desc->queue[0] = queue->index;
11596                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11597                                                     rss_desc, &hrxq_idx);
11598                         if (!hrxq)
11599                                 return rte_flow_error_set
11600                                         (error, rte_errno,
11601                                          RTE_FLOW_ERROR_TYPE_ACTION,
11602                                          NULL,
11603                                          "cannot create fate queue");
11604                         sample_act->dr_queue_action = hrxq->action;
11605                         sample_idx->rix_hrxq = hrxq_idx;
11606                         sample_actions[sample_act->actions_num++] =
11607                                                 hrxq->action;
11608                         (*num_of_dest)++;
11609                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11610                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11611                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11612                         dev_flow->handle->fate_action =
11613                                         MLX5_FLOW_FATE_QUEUE;
11614                         break;
11615                 }
11616                 case RTE_FLOW_ACTION_TYPE_RSS:
11617                 {
11618                         struct mlx5_hrxq *hrxq;
11619                         uint32_t hrxq_idx;
11620                         const struct rte_flow_action_rss *rss;
11621                         const uint8_t *rss_key;
11622
11623                         rss = sub_actions->conf;
11624                         memcpy(rss_desc->queue, rss->queue,
11625                                rss->queue_num * sizeof(uint16_t));
11626                         rss_desc->queue_num = rss->queue_num;
11627                         /* NULL RSS key indicates default RSS key. */
11628                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11629                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11630                         /*
11631                          * rss->level and rss.types should be set in advance
11632                          * when expanding items for RSS.
11633                          */
11634                         flow_dv_hashfields_set(dev_flow, rss_desc);
11635                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11636                                                     rss_desc, &hrxq_idx);
11637                         if (!hrxq)
11638                                 return rte_flow_error_set
11639                                         (error, rte_errno,
11640                                          RTE_FLOW_ERROR_TYPE_ACTION,
11641                                          NULL,
11642                                          "cannot create fate queue");
11643                         sample_act->dr_queue_action = hrxq->action;
11644                         sample_idx->rix_hrxq = hrxq_idx;
11645                         sample_actions[sample_act->actions_num++] =
11646                                                 hrxq->action;
11647                         (*num_of_dest)++;
11648                         action_flags |= MLX5_FLOW_ACTION_RSS;
11649                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11650                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11651                         dev_flow->handle->fate_action =
11652                                         MLX5_FLOW_FATE_QUEUE;
11653                         break;
11654                 }
11655                 case RTE_FLOW_ACTION_TYPE_MARK:
11656                 {
11657                         uint32_t tag_be = mlx5_flow_mark_set
11658                                 (((const struct rte_flow_action_mark *)
11659                                 (sub_actions->conf))->id);
11660
11661                         wks->mark = 1;
11662                         pre_rix = dev_flow->handle->dvh.rix_tag;
11663                         /* Save the mark resource before sample */
11664                         pre_r = dev_flow->dv.tag_resource;
11665                         if (flow_dv_tag_resource_register(dev, tag_be,
11666                                                   dev_flow, error))
11667                                 return -rte_errno;
11668                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11669                         sample_act->dr_tag_action =
11670                                 dev_flow->dv.tag_resource->action;
11671                         sample_idx->rix_tag =
11672                                 dev_flow->handle->dvh.rix_tag;
11673                         sample_actions[sample_act->actions_num++] =
11674                                                 sample_act->dr_tag_action;
11675                         /* Recover the mark resource after sample */
11676                         dev_flow->dv.tag_resource = pre_r;
11677                         dev_flow->handle->dvh.rix_tag = pre_rix;
11678                         action_flags |= MLX5_FLOW_ACTION_MARK;
11679                         break;
11680                 }
11681                 case RTE_FLOW_ACTION_TYPE_COUNT:
11682                 {
11683                         if (!flow->counter) {
11684                                 flow->counter =
11685                                         flow_dv_translate_create_counter(dev,
11686                                                 dev_flow, sub_actions->conf,
11687                                                 0);
11688                                 if (!flow->counter)
11689                                         return rte_flow_error_set
11690                                                 (error, rte_errno,
11691                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11692                                                 NULL,
11693                                                 "cannot create counter"
11694                                                 " object.");
11695                         }
11696                         sample_act->dr_cnt_action =
11697                                   (flow_dv_counter_get_by_idx(dev,
11698                                   flow->counter, NULL))->action;
11699                         sample_actions[sample_act->actions_num++] =
11700                                                 sample_act->dr_cnt_action;
11701                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11702                         break;
11703                 }
11704                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11705                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11706                 {
11707                         struct mlx5_flow_dv_port_id_action_resource
11708                                         port_id_resource;
11709                         uint32_t port_id = 0;
11710
11711                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11712                         /* Save the port id resource before sample */
11713                         pre_rix = dev_flow->handle->rix_port_id_action;
11714                         pre_r = dev_flow->dv.port_id_action;
11715                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11716                                                              &port_id, error))
11717                                 return -rte_errno;
11718                         port_id_resource.port_id = port_id;
11719                         if (flow_dv_port_id_action_resource_register
11720                             (dev, &port_id_resource, dev_flow, error))
11721                                 return -rte_errno;
11722                         sample_act->dr_port_id_action =
11723                                 dev_flow->dv.port_id_action->action;
11724                         sample_idx->rix_port_id_action =
11725                                 dev_flow->handle->rix_port_id_action;
11726                         sample_actions[sample_act->actions_num++] =
11727                                                 sample_act->dr_port_id_action;
11728                         /* Recover the port id resource after sample */
11729                         dev_flow->dv.port_id_action = pre_r;
11730                         dev_flow->handle->rix_port_id_action = pre_rix;
11731                         (*num_of_dest)++;
11732                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11733                         break;
11734                 }
11735                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11736                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11737                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11738                         /* Save the encap resource before sample */
11739                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11740                         pre_r = dev_flow->dv.encap_decap;
11741                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11742                                                            dev_flow,
11743                                                            attr->transfer,
11744                                                            error))
11745                                 return -rte_errno;
11746                         sample_act->dr_encap_action =
11747                                 dev_flow->dv.encap_decap->action;
11748                         sample_idx->rix_encap_decap =
11749                                 dev_flow->handle->dvh.rix_encap_decap;
11750                         sample_actions[sample_act->actions_num++] =
11751                                                 sample_act->dr_encap_action;
11752                         /* Recover the encap resource after sample */
11753                         dev_flow->dv.encap_decap = pre_r;
11754                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11755                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11756                         break;
11757                 default:
11758                         return rte_flow_error_set(error, EINVAL,
11759                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11760                                 NULL,
11761                                 "Not support for sampler action");
11762                 }
11763         }
11764         sample_act->action_flags = action_flags;
11765         res->ft_id = dev_flow->dv.group;
11766         if (attr->transfer) {
11767                 union {
11768                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11769                         uint64_t set_action;
11770                 } action_ctx = { .set_action = 0 };
11771
11772                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11773                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11774                          MLX5_MODIFICATION_TYPE_SET);
11775                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11776                          MLX5_MODI_META_REG_C_0);
11777                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11778                          priv->vport_meta_tag);
11779                 res->set_action = action_ctx.set_action;
11780         } else if (attr->ingress) {
11781                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11782         } else {
11783                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11784         }
11785         return 0;
11786 }
11787
11788 /**
11789  * Convert Sample action to DV specification.
11790  *
11791  * @param[in] dev
11792  *   Pointer to rte_eth_dev structure.
11793  * @param[in, out] dev_flow
11794  *   Pointer to the mlx5_flow.
11795  * @param[in] num_of_dest
11796  *   The num of destination.
11797  * @param[in, out] res
11798  *   Pointer to sample resource.
11799  * @param[in, out] mdest_res
11800  *   Pointer to destination array resource.
11801  * @param[in] sample_actions
11802  *   Pointer to sample path actions list.
11803  * @param[in] action_flags
11804  *   Holds the actions detected until now.
11805  * @param[out] error
11806  *   Pointer to the error structure.
11807  *
11808  * @return
11809  *   0 on success, a negative errno value otherwise and rte_errno is set.
11810  */
11811 static int
11812 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11813                              struct mlx5_flow *dev_flow,
11814                              uint32_t num_of_dest,
11815                              struct mlx5_flow_dv_sample_resource *res,
11816                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11817                              void **sample_actions,
11818                              uint64_t action_flags,
11819                              struct rte_flow_error *error)
11820 {
11821         /* update normal path action resource into last index of array */
11822         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11823         struct mlx5_flow_sub_actions_list *sample_act =
11824                                         &mdest_res->sample_act[dest_index];
11825         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11826         struct mlx5_flow_rss_desc *rss_desc;
11827         uint32_t normal_idx = 0;
11828         struct mlx5_hrxq *hrxq;
11829         uint32_t hrxq_idx;
11830
11831         MLX5_ASSERT(wks);
11832         rss_desc = &wks->rss_desc;
11833         if (num_of_dest > 1) {
11834                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11835                         /* Handle QP action for mirroring */
11836                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11837                                                     rss_desc, &hrxq_idx);
11838                         if (!hrxq)
11839                                 return rte_flow_error_set
11840                                      (error, rte_errno,
11841                                       RTE_FLOW_ERROR_TYPE_ACTION,
11842                                       NULL,
11843                                       "cannot create rx queue");
11844                         normal_idx++;
11845                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11846                         sample_act->dr_queue_action = hrxq->action;
11847                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11848                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11849                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11850                 }
11851                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11852                         normal_idx++;
11853                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11854                                 dev_flow->handle->dvh.rix_encap_decap;
11855                         sample_act->dr_encap_action =
11856                                 dev_flow->dv.encap_decap->action;
11857                         dev_flow->handle->dvh.rix_encap_decap = 0;
11858                 }
11859                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11860                         normal_idx++;
11861                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11862                                 dev_flow->handle->rix_port_id_action;
11863                         sample_act->dr_port_id_action =
11864                                 dev_flow->dv.port_id_action->action;
11865                         dev_flow->handle->rix_port_id_action = 0;
11866                 }
11867                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11868                         normal_idx++;
11869                         mdest_res->sample_idx[dest_index].rix_jump =
11870                                 dev_flow->handle->rix_jump;
11871                         sample_act->dr_jump_action =
11872                                 dev_flow->dv.jump->action;
11873                         dev_flow->handle->rix_jump = 0;
11874                 }
11875                 sample_act->actions_num = normal_idx;
11876                 /* update sample action resource into first index of array */
11877                 mdest_res->ft_type = res->ft_type;
11878                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11879                                 sizeof(struct mlx5_flow_sub_actions_idx));
11880                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11881                                 sizeof(struct mlx5_flow_sub_actions_list));
11882                 mdest_res->num_of_dest = num_of_dest;
11883                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11884                                                          dev_flow, error))
11885                         return rte_flow_error_set(error, EINVAL,
11886                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11887                                                   NULL, "can't create sample "
11888                                                   "action");
11889         } else {
11890                 res->sub_actions = sample_actions;
11891                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11892                         return rte_flow_error_set(error, EINVAL,
11893                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11894                                                   NULL,
11895                                                   "can't create sample action");
11896         }
11897         return 0;
11898 }
11899
11900 /**
11901  * Remove an ASO age action from age actions list.
11902  *
11903  * @param[in] dev
11904  *   Pointer to the Ethernet device structure.
11905  * @param[in] age
11906  *   Pointer to the aso age action handler.
11907  */
11908 static void
11909 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11910                                 struct mlx5_aso_age_action *age)
11911 {
11912         struct mlx5_age_info *age_info;
11913         struct mlx5_age_param *age_param = &age->age_params;
11914         struct mlx5_priv *priv = dev->data->dev_private;
11915         uint16_t expected = AGE_CANDIDATE;
11916
11917         age_info = GET_PORT_AGE_INFO(priv);
11918         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11919                                          AGE_FREE, false, __ATOMIC_RELAXED,
11920                                          __ATOMIC_RELAXED)) {
11921                 /**
11922                  * We need the lock even it is age timeout,
11923                  * since age action may still in process.
11924                  */
11925                 rte_spinlock_lock(&age_info->aged_sl);
11926                 LIST_REMOVE(age, next);
11927                 rte_spinlock_unlock(&age_info->aged_sl);
11928                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11929         }
11930 }
11931
11932 /**
11933  * Release an ASO age action.
11934  *
11935  * @param[in] dev
11936  *   Pointer to the Ethernet device structure.
11937  * @param[in] age_idx
11938  *   Index of ASO age action to release.
11939  * @param[in] flow
11940  *   True if the release operation is during flow destroy operation.
11941  *   False if the release operation is during action destroy operation.
11942  *
11943  * @return
11944  *   0 when age action was removed, otherwise the number of references.
11945  */
11946 static int
11947 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11948 {
11949         struct mlx5_priv *priv = dev->data->dev_private;
11950         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11951         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11952         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11953
11954         if (!ret) {
11955                 flow_dv_aso_age_remove_from_age(dev, age);
11956                 rte_spinlock_lock(&mng->free_sl);
11957                 LIST_INSERT_HEAD(&mng->free, age, next);
11958                 rte_spinlock_unlock(&mng->free_sl);
11959         }
11960         return ret;
11961 }
11962
11963 /**
11964  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11965  *
11966  * @param[in] dev
11967  *   Pointer to the Ethernet device structure.
11968  *
11969  * @return
11970  *   0 on success, otherwise negative errno value and rte_errno is set.
11971  */
11972 static int
11973 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11974 {
11975         struct mlx5_priv *priv = dev->data->dev_private;
11976         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11977         void *old_pools = mng->pools;
11978         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11979         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11980         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11981
11982         if (!pools) {
11983                 rte_errno = ENOMEM;
11984                 return -ENOMEM;
11985         }
11986         if (old_pools) {
11987                 memcpy(pools, old_pools,
11988                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11989                 mlx5_free(old_pools);
11990         } else {
11991                 /* First ASO flow hit allocation - starting ASO data-path. */
11992                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11993
11994                 if (ret) {
11995                         mlx5_free(pools);
11996                         return ret;
11997                 }
11998         }
11999         mng->n = resize;
12000         mng->pools = pools;
12001         return 0;
12002 }
12003
12004 /**
12005  * Create and initialize a new ASO aging pool.
12006  *
12007  * @param[in] dev
12008  *   Pointer to the Ethernet device structure.
12009  * @param[out] age_free
12010  *   Where to put the pointer of a new age action.
12011  *
12012  * @return
12013  *   The age actions pool pointer and @p age_free is set on success,
12014  *   NULL otherwise and rte_errno is set.
12015  */
12016 static struct mlx5_aso_age_pool *
12017 flow_dv_age_pool_create(struct rte_eth_dev *dev,
12018                         struct mlx5_aso_age_action **age_free)
12019 {
12020         struct mlx5_priv *priv = dev->data->dev_private;
12021         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12022         struct mlx5_aso_age_pool *pool = NULL;
12023         struct mlx5_devx_obj *obj = NULL;
12024         uint32_t i;
12025
12026         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
12027                                                     priv->sh->cdev->pdn);
12028         if (!obj) {
12029                 rte_errno = ENODATA;
12030                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
12031                 return NULL;
12032         }
12033         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12034         if (!pool) {
12035                 claim_zero(mlx5_devx_cmd_destroy(obj));
12036                 rte_errno = ENOMEM;
12037                 return NULL;
12038         }
12039         pool->flow_hit_aso_obj = obj;
12040         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
12041         rte_rwlock_write_lock(&mng->resize_rwl);
12042         pool->index = mng->next;
12043         /* Resize pools array if there is no room for the new pool in it. */
12044         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
12045                 claim_zero(mlx5_devx_cmd_destroy(obj));
12046                 mlx5_free(pool);
12047                 rte_rwlock_write_unlock(&mng->resize_rwl);
12048                 return NULL;
12049         }
12050         mng->pools[pool->index] = pool;
12051         mng->next++;
12052         rte_rwlock_write_unlock(&mng->resize_rwl);
12053         /* Assign the first action in the new pool, the rest go to free list. */
12054         *age_free = &pool->actions[0];
12055         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
12056                 pool->actions[i].offset = i;
12057                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
12058         }
12059         return pool;
12060 }
12061
12062 /**
12063  * Allocate a ASO aging bit.
12064  *
12065  * @param[in] dev
12066  *   Pointer to the Ethernet device structure.
12067  * @param[out] error
12068  *   Pointer to the error structure.
12069  *
12070  * @return
12071  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
12072  */
12073 static uint32_t
12074 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12075 {
12076         struct mlx5_priv *priv = dev->data->dev_private;
12077         const struct mlx5_aso_age_pool *pool;
12078         struct mlx5_aso_age_action *age_free = NULL;
12079         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12080
12081         MLX5_ASSERT(mng);
12082         /* Try to get the next free age action bit. */
12083         rte_spinlock_lock(&mng->free_sl);
12084         age_free = LIST_FIRST(&mng->free);
12085         if (age_free) {
12086                 LIST_REMOVE(age_free, next);
12087         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12088                 rte_spinlock_unlock(&mng->free_sl);
12089                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12090                                    NULL, "failed to create ASO age pool");
12091                 return 0; /* 0 is an error. */
12092         }
12093         rte_spinlock_unlock(&mng->free_sl);
12094         pool = container_of
12095           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12096                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12097                                                                        actions);
12098         if (!age_free->dr_action) {
12099                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12100                                                  error);
12101
12102                 if (reg_c < 0) {
12103                         rte_flow_error_set(error, rte_errno,
12104                                            RTE_FLOW_ERROR_TYPE_ACTION,
12105                                            NULL, "failed to get reg_c "
12106                                            "for ASO flow hit");
12107                         return 0; /* 0 is an error. */
12108                 }
12109 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12110                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12111                                 (priv->sh->rx_domain,
12112                                  pool->flow_hit_aso_obj->obj, age_free->offset,
12113                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12114                                  (reg_c - REG_C_0));
12115 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12116                 if (!age_free->dr_action) {
12117                         rte_errno = errno;
12118                         rte_spinlock_lock(&mng->free_sl);
12119                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12120                         rte_spinlock_unlock(&mng->free_sl);
12121                         rte_flow_error_set(error, rte_errno,
12122                                            RTE_FLOW_ERROR_TYPE_ACTION,
12123                                            NULL, "failed to create ASO "
12124                                            "flow hit action");
12125                         return 0; /* 0 is an error. */
12126                 }
12127         }
12128         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12129         return pool->index | ((age_free->offset + 1) << 16);
12130 }
12131
12132 /**
12133  * Initialize flow ASO age parameters.
12134  *
12135  * @param[in] dev
12136  *   Pointer to rte_eth_dev structure.
12137  * @param[in] age_idx
12138  *   Index of ASO age action.
12139  * @param[in] context
12140  *   Pointer to flow counter age context.
12141  * @param[in] timeout
12142  *   Aging timeout in seconds.
12143  *
12144  */
12145 static void
12146 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12147                             uint32_t age_idx,
12148                             void *context,
12149                             uint32_t timeout)
12150 {
12151         struct mlx5_aso_age_action *aso_age;
12152
12153         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12154         MLX5_ASSERT(aso_age);
12155         aso_age->age_params.context = context;
12156         aso_age->age_params.timeout = timeout;
12157         aso_age->age_params.port_id = dev->data->port_id;
12158         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12159                          __ATOMIC_RELAXED);
12160         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12161                          __ATOMIC_RELAXED);
12162 }
12163
12164 static void
12165 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12166                                const struct rte_flow_item_integrity *value,
12167                                void *headers_m, void *headers_v)
12168 {
12169         if (mask->l4_ok) {
12170                 /* RTE l4_ok filter aggregates hardware l4_ok and
12171                  * l4_checksum_ok filters.
12172                  * Positive RTE l4_ok match requires hardware match on both L4
12173                  * hardware integrity bits.
12174                  * For negative match, check hardware l4_checksum_ok bit only,
12175                  * because hardware sets that bit to 0 for all packets
12176                  * with bad L4.
12177                  */
12178                 if (value->l4_ok) {
12179                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok, 1);
12180                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok, 1);
12181                 }
12182                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12183                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12184                          !!value->l4_ok);
12185         }
12186         if (mask->l4_csum_ok) {
12187                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12188                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12189                          value->l4_csum_ok);
12190         }
12191 }
12192
12193 static void
12194 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12195                                const struct rte_flow_item_integrity *value,
12196                                void *headers_m, void *headers_v, bool is_ipv4)
12197 {
12198         if (mask->l3_ok) {
12199                 /* RTE l3_ok filter aggregates for IPv4 hardware l3_ok and
12200                  * ipv4_csum_ok filters.
12201                  * Positive RTE l3_ok match requires hardware match on both L3
12202                  * hardware integrity bits.
12203                  * For negative match, check hardware l3_csum_ok bit only,
12204                  * because hardware sets that bit to 0 for all packets
12205                  * with bad L3.
12206                  */
12207                 if (is_ipv4) {
12208                         if (value->l3_ok) {
12209                                 MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12210                                          l3_ok, 1);
12211                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12212                                          l3_ok, 1);
12213                         }
12214                         MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12215                                  ipv4_checksum_ok, 1);
12216                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12217                                  ipv4_checksum_ok, !!value->l3_ok);
12218                 } else {
12219                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok, 1);
12220                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12221                                  value->l3_ok);
12222                 }
12223         }
12224         if (mask->ipv4_csum_ok) {
12225                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok, 1);
12226                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12227                          value->ipv4_csum_ok);
12228         }
12229 }
12230
12231 static void
12232 set_integrity_bits(void *headers_m, void *headers_v,
12233                    const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12234 {
12235         const struct rte_flow_item_integrity *spec = integrity_item->spec;
12236         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12237
12238         /* Integrity bits validation cleared spec pointer */
12239         MLX5_ASSERT(spec != NULL);
12240         if (!mask)
12241                 mask = &rte_flow_item_integrity_mask;
12242         flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12243                                        is_l3_ip4);
12244         flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12245 }
12246
12247 static void
12248 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12249                                       const
12250                                       struct rte_flow_item *integrity_items[2],
12251                                       uint64_t pattern_flags)
12252 {
12253         void *headers_m, *headers_v;
12254         bool is_l3_ip4;
12255
12256         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12257                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12258                                          inner_headers);
12259                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12260                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12261                             0;
12262                 set_integrity_bits(headers_m, headers_v,
12263                                    integrity_items[1], is_l3_ip4);
12264         }
12265         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12266                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12267                                          outer_headers);
12268                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12269                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12270                             0;
12271                 set_integrity_bits(headers_m, headers_v,
12272                                    integrity_items[0], is_l3_ip4);
12273         }
12274 }
12275
12276 static void
12277 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12278                                  const struct rte_flow_item *integrity_items[2],
12279                                  uint64_t *last_item)
12280 {
12281         const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12282
12283         /* integrity bits validation cleared spec pointer */
12284         MLX5_ASSERT(spec != NULL);
12285         if (spec->level > 1) {
12286                 integrity_items[1] = item;
12287                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12288         } else {
12289                 integrity_items[0] = item;
12290                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12291         }
12292 }
12293
12294 /**
12295  * Prepares DV flow counter with aging configuration.
12296  * Gets it by index when exists, creates a new one when doesn't.
12297  *
12298  * @param[in] dev
12299  *   Pointer to rte_eth_dev structure.
12300  * @param[in] dev_flow
12301  *   Pointer to the mlx5_flow.
12302  * @param[in, out] flow
12303  *   Pointer to the sub flow.
12304  * @param[in] count
12305  *   Pointer to the counter action configuration.
12306  * @param[in] age
12307  *   Pointer to the aging action configuration.
12308  * @param[out] error
12309  *   Pointer to the error structure.
12310  *
12311  * @return
12312  *   Pointer to the counter, NULL otherwise.
12313  */
12314 static struct mlx5_flow_counter *
12315 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12316                         struct mlx5_flow *dev_flow,
12317                         struct rte_flow *flow,
12318                         const struct rte_flow_action_count *count,
12319                         const struct rte_flow_action_age *age,
12320                         struct rte_flow_error *error)
12321 {
12322         if (!flow->counter) {
12323                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12324                                                                  count, age);
12325                 if (!flow->counter) {
12326                         rte_flow_error_set(error, rte_errno,
12327                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12328                                            "cannot create counter object.");
12329                         return NULL;
12330                 }
12331         }
12332         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12333 }
12334
12335 /*
12336  * Release an ASO CT action by its own device.
12337  *
12338  * @param[in] dev
12339  *   Pointer to the Ethernet device structure.
12340  * @param[in] idx
12341  *   Index of ASO CT action to release.
12342  *
12343  * @return
12344  *   0 when CT action was removed, otherwise the number of references.
12345  */
12346 static inline int
12347 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12348 {
12349         struct mlx5_priv *priv = dev->data->dev_private;
12350         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12351         uint32_t ret;
12352         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12353         enum mlx5_aso_ct_state state =
12354                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12355
12356         /* Cannot release when CT is in the ASO SQ. */
12357         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12358                 return -1;
12359         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12360         if (!ret) {
12361                 if (ct->dr_action_orig) {
12362 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12363                         claim_zero(mlx5_glue->destroy_flow_action
12364                                         (ct->dr_action_orig));
12365 #endif
12366                         ct->dr_action_orig = NULL;
12367                 }
12368                 if (ct->dr_action_rply) {
12369 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12370                         claim_zero(mlx5_glue->destroy_flow_action
12371                                         (ct->dr_action_rply));
12372 #endif
12373                         ct->dr_action_rply = NULL;
12374                 }
12375                 /* Clear the state to free, no need in 1st allocation. */
12376                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12377                 rte_spinlock_lock(&mng->ct_sl);
12378                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12379                 rte_spinlock_unlock(&mng->ct_sl);
12380         }
12381         return (int)ret;
12382 }
12383
12384 static inline int
12385 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12386                        struct rte_flow_error *error)
12387 {
12388         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12389         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12390         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12391         int ret;
12392
12393         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12394         if (dev->data->dev_started != 1)
12395                 return rte_flow_error_set(error, EAGAIN,
12396                                           RTE_FLOW_ERROR_TYPE_ACTION,
12397                                           NULL,
12398                                           "Indirect CT action cannot be destroyed when the port is stopped");
12399         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12400         if (ret < 0)
12401                 return rte_flow_error_set(error, EAGAIN,
12402                                           RTE_FLOW_ERROR_TYPE_ACTION,
12403                                           NULL,
12404                                           "Current state prevents indirect CT action from being destroyed");
12405         return ret;
12406 }
12407
12408 /*
12409  * Resize the ASO CT pools array by 64 pools.
12410  *
12411  * @param[in] dev
12412  *   Pointer to the Ethernet device structure.
12413  *
12414  * @return
12415  *   0 on success, otherwise negative errno value and rte_errno is set.
12416  */
12417 static int
12418 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12419 {
12420         struct mlx5_priv *priv = dev->data->dev_private;
12421         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12422         void *old_pools = mng->pools;
12423         /* Magic number now, need a macro. */
12424         uint32_t resize = mng->n + 64;
12425         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12426         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12427
12428         if (!pools) {
12429                 rte_errno = ENOMEM;
12430                 return -rte_errno;
12431         }
12432         rte_rwlock_write_lock(&mng->resize_rwl);
12433         /* ASO SQ/QP was already initialized in the startup. */
12434         if (old_pools) {
12435                 /* Realloc could be an alternative choice. */
12436                 rte_memcpy(pools, old_pools,
12437                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12438                 mlx5_free(old_pools);
12439         }
12440         mng->n = resize;
12441         mng->pools = pools;
12442         rte_rwlock_write_unlock(&mng->resize_rwl);
12443         return 0;
12444 }
12445
12446 /*
12447  * Create and initialize a new ASO CT pool.
12448  *
12449  * @param[in] dev
12450  *   Pointer to the Ethernet device structure.
12451  * @param[out] ct_free
12452  *   Where to put the pointer of a new CT action.
12453  *
12454  * @return
12455  *   The CT actions pool pointer and @p ct_free is set on success,
12456  *   NULL otherwise and rte_errno is set.
12457  */
12458 static struct mlx5_aso_ct_pool *
12459 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12460                        struct mlx5_aso_ct_action **ct_free)
12461 {
12462         struct mlx5_priv *priv = dev->data->dev_private;
12463         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12464         struct mlx5_aso_ct_pool *pool = NULL;
12465         struct mlx5_devx_obj *obj = NULL;
12466         uint32_t i;
12467         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12468
12469         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12470                                                           priv->sh->cdev->pdn,
12471                                                           log_obj_size);
12472         if (!obj) {
12473                 rte_errno = ENODATA;
12474                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12475                 return NULL;
12476         }
12477         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12478         if (!pool) {
12479                 rte_errno = ENOMEM;
12480                 claim_zero(mlx5_devx_cmd_destroy(obj));
12481                 return NULL;
12482         }
12483         pool->devx_obj = obj;
12484         pool->index = mng->next;
12485         /* Resize pools array if there is no room for the new pool in it. */
12486         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12487                 claim_zero(mlx5_devx_cmd_destroy(obj));
12488                 mlx5_free(pool);
12489                 return NULL;
12490         }
12491         mng->pools[pool->index] = pool;
12492         mng->next++;
12493         /* Assign the first action in the new pool, the rest go to free list. */
12494         *ct_free = &pool->actions[0];
12495         /* Lock outside, the list operation is safe here. */
12496         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12497                 /* refcnt is 0 when allocating the memory. */
12498                 pool->actions[i].offset = i;
12499                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12500         }
12501         return pool;
12502 }
12503
12504 /*
12505  * Allocate a ASO CT action from free list.
12506  *
12507  * @param[in] dev
12508  *   Pointer to the Ethernet device structure.
12509  * @param[out] error
12510  *   Pointer to the error structure.
12511  *
12512  * @return
12513  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12514  */
12515 static uint32_t
12516 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12517 {
12518         struct mlx5_priv *priv = dev->data->dev_private;
12519         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12520         struct mlx5_aso_ct_action *ct = NULL;
12521         struct mlx5_aso_ct_pool *pool;
12522         uint8_t reg_c;
12523         uint32_t ct_idx;
12524
12525         MLX5_ASSERT(mng);
12526         if (!priv->sh->cdev->config.devx) {
12527                 rte_errno = ENOTSUP;
12528                 return 0;
12529         }
12530         /* Get a free CT action, if no, a new pool will be created. */
12531         rte_spinlock_lock(&mng->ct_sl);
12532         ct = LIST_FIRST(&mng->free_cts);
12533         if (ct) {
12534                 LIST_REMOVE(ct, next);
12535         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12536                 rte_spinlock_unlock(&mng->ct_sl);
12537                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12538                                    NULL, "failed to create ASO CT pool");
12539                 return 0;
12540         }
12541         rte_spinlock_unlock(&mng->ct_sl);
12542         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12543         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12544         /* 0: inactive, 1: created, 2+: used by flows. */
12545         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12546         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12547         if (!ct->dr_action_orig) {
12548 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12549                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12550                         (priv->sh->rx_domain, pool->devx_obj->obj,
12551                          ct->offset,
12552                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12553                          reg_c - REG_C_0);
12554 #else
12555                 RTE_SET_USED(reg_c);
12556 #endif
12557                 if (!ct->dr_action_orig) {
12558                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12559                         rte_flow_error_set(error, rte_errno,
12560                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12561                                            "failed to create ASO CT action");
12562                         return 0;
12563                 }
12564         }
12565         if (!ct->dr_action_rply) {
12566 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12567                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12568                         (priv->sh->rx_domain, pool->devx_obj->obj,
12569                          ct->offset,
12570                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12571                          reg_c - REG_C_0);
12572 #endif
12573                 if (!ct->dr_action_rply) {
12574                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12575                         rte_flow_error_set(error, rte_errno,
12576                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12577                                            "failed to create ASO CT action");
12578                         return 0;
12579                 }
12580         }
12581         return ct_idx;
12582 }
12583
12584 /*
12585  * Create a conntrack object with context and actions by using ASO mechanism.
12586  *
12587  * @param[in] dev
12588  *   Pointer to rte_eth_dev structure.
12589  * @param[in] pro
12590  *   Pointer to conntrack information profile.
12591  * @param[out] error
12592  *   Pointer to the error structure.
12593  *
12594  * @return
12595  *   Index to conntrack object on success, 0 otherwise.
12596  */
12597 static uint32_t
12598 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12599                                    const struct rte_flow_action_conntrack *pro,
12600                                    struct rte_flow_error *error)
12601 {
12602         struct mlx5_priv *priv = dev->data->dev_private;
12603         struct mlx5_dev_ctx_shared *sh = priv->sh;
12604         struct mlx5_aso_ct_action *ct;
12605         uint32_t idx;
12606
12607         if (!sh->ct_aso_en)
12608                 return rte_flow_error_set(error, ENOTSUP,
12609                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12610                                           "Connection is not supported");
12611         idx = flow_dv_aso_ct_alloc(dev, error);
12612         if (!idx)
12613                 return rte_flow_error_set(error, rte_errno,
12614                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12615                                           "Failed to allocate CT object");
12616         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12617         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12618                 return rte_flow_error_set(error, EBUSY,
12619                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12620                                           "Failed to update CT");
12621         ct->is_original = !!pro->is_original_dir;
12622         ct->peer = pro->peer_port;
12623         return idx;
12624 }
12625
12626 /**
12627  * Fill the flow with DV spec, lock free
12628  * (mutex should be acquired by caller).
12629  *
12630  * @param[in] dev
12631  *   Pointer to rte_eth_dev structure.
12632  * @param[in, out] dev_flow
12633  *   Pointer to the sub flow.
12634  * @param[in] attr
12635  *   Pointer to the flow attributes.
12636  * @param[in] items
12637  *   Pointer to the list of items.
12638  * @param[in] actions
12639  *   Pointer to the list of actions.
12640  * @param[out] error
12641  *   Pointer to the error structure.
12642  *
12643  * @return
12644  *   0 on success, a negative errno value otherwise and rte_errno is set.
12645  */
12646 static int
12647 flow_dv_translate(struct rte_eth_dev *dev,
12648                   struct mlx5_flow *dev_flow,
12649                   const struct rte_flow_attr *attr,
12650                   const struct rte_flow_item items[],
12651                   const struct rte_flow_action actions[],
12652                   struct rte_flow_error *error)
12653 {
12654         struct mlx5_priv *priv = dev->data->dev_private;
12655         struct mlx5_sh_config *dev_conf = &priv->sh->config;
12656         struct rte_flow *flow = dev_flow->flow;
12657         struct mlx5_flow_handle *handle = dev_flow->handle;
12658         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12659         struct mlx5_flow_rss_desc *rss_desc;
12660         uint64_t item_flags = 0;
12661         uint64_t last_item = 0;
12662         uint64_t action_flags = 0;
12663         struct mlx5_flow_dv_matcher matcher = {
12664                 .mask = {
12665                         .size = sizeof(matcher.mask.buf),
12666                 },
12667         };
12668         int actions_n = 0;
12669         bool actions_end = false;
12670         union {
12671                 struct mlx5_flow_dv_modify_hdr_resource res;
12672                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12673                             sizeof(struct mlx5_modification_cmd) *
12674                             (MLX5_MAX_MODIFY_NUM + 1)];
12675         } mhdr_dummy;
12676         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12677         const struct rte_flow_action_count *count = NULL;
12678         const struct rte_flow_action_age *non_shared_age = NULL;
12679         union flow_dv_attr flow_attr = { .attr = 0 };
12680         uint32_t tag_be;
12681         union mlx5_flow_tbl_key tbl_key;
12682         uint32_t modify_action_position = UINT32_MAX;
12683         void *match_mask = matcher.mask.buf;
12684         void *match_value = dev_flow->dv.value.buf;
12685         uint8_t next_protocol = 0xff;
12686         struct rte_vlan_hdr vlan = { 0 };
12687         struct mlx5_flow_dv_dest_array_resource mdest_res;
12688         struct mlx5_flow_dv_sample_resource sample_res;
12689         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12690         const struct rte_flow_action_sample *sample = NULL;
12691         struct mlx5_flow_sub_actions_list *sample_act;
12692         uint32_t sample_act_pos = UINT32_MAX;
12693         uint32_t age_act_pos = UINT32_MAX;
12694         uint32_t num_of_dest = 0;
12695         int tmp_actions_n = 0;
12696         uint32_t table;
12697         int ret = 0;
12698         const struct mlx5_flow_tunnel *tunnel = NULL;
12699         struct flow_grp_info grp_info = {
12700                 .external = !!dev_flow->external,
12701                 .transfer = !!attr->transfer,
12702                 .fdb_def_rule = !!priv->fdb_def_rule,
12703                 .skip_scale = dev_flow->skip_scale &
12704                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12705                 .std_tbl_fix = true,
12706         };
12707         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12708         const struct rte_flow_item *tunnel_item = NULL;
12709
12710         if (!wks)
12711                 return rte_flow_error_set(error, ENOMEM,
12712                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12713                                           NULL,
12714                                           "failed to push flow workspace");
12715         rss_desc = &wks->rss_desc;
12716         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12717         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12718         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12719                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12720         /* update normal path action resource into last index of array */
12721         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12722         if (is_tunnel_offload_active(dev)) {
12723                 if (dev_flow->tunnel) {
12724                         RTE_VERIFY(dev_flow->tof_type ==
12725                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12726                         tunnel = dev_flow->tunnel;
12727                 } else {
12728                         tunnel = mlx5_get_tof(items, actions,
12729                                               &dev_flow->tof_type);
12730                         dev_flow->tunnel = tunnel;
12731                 }
12732                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12733                                         (dev, attr, tunnel, dev_flow->tof_type);
12734         }
12735         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12736                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12737         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12738                                        &grp_info, error);
12739         if (ret)
12740                 return ret;
12741         dev_flow->dv.group = table;
12742         if (attr->transfer)
12743                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12744         /* number of actions must be set to 0 in case of dirty stack. */
12745         mhdr_res->actions_num = 0;
12746         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12747                 /*
12748                  * do not add decap action if match rule drops packet
12749                  * HW rejects rules with decap & drop
12750                  *
12751                  * if tunnel match rule was inserted before matching tunnel set
12752                  * rule flow table used in the match rule must be registered.
12753                  * current implementation handles that in the
12754                  * flow_dv_match_register() at the function end.
12755                  */
12756                 bool add_decap = true;
12757                 const struct rte_flow_action *ptr = actions;
12758
12759                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12760                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12761                                 add_decap = false;
12762                                 break;
12763                         }
12764                 }
12765                 if (add_decap) {
12766                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12767                                                            attr->transfer,
12768                                                            error))
12769                                 return -rte_errno;
12770                         dev_flow->dv.actions[actions_n++] =
12771                                         dev_flow->dv.encap_decap->action;
12772                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12773                 }
12774         }
12775         for (; !actions_end ; actions++) {
12776                 const struct rte_flow_action_queue *queue;
12777                 const struct rte_flow_action_rss *rss;
12778                 const struct rte_flow_action *action = actions;
12779                 const uint8_t *rss_key;
12780                 struct mlx5_flow_tbl_resource *tbl;
12781                 struct mlx5_aso_age_action *age_act;
12782                 struct mlx5_flow_counter *cnt_act;
12783                 uint32_t port_id = 0;
12784                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12785                 int action_type = actions->type;
12786                 const struct rte_flow_action *found_action = NULL;
12787                 uint32_t jump_group = 0;
12788                 uint32_t owner_idx;
12789                 struct mlx5_aso_ct_action *ct;
12790
12791                 if (!mlx5_flow_os_action_supported(action_type))
12792                         return rte_flow_error_set(error, ENOTSUP,
12793                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12794                                                   actions,
12795                                                   "action not supported");
12796                 switch (action_type) {
12797                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12798                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12799                         break;
12800                 case RTE_FLOW_ACTION_TYPE_VOID:
12801                         break;
12802                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12803                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12804                         if (flow_dv_translate_action_port_id(dev, action,
12805                                                              &port_id, error))
12806                                 return -rte_errno;
12807                         port_id_resource.port_id = port_id;
12808                         MLX5_ASSERT(!handle->rix_port_id_action);
12809                         if (flow_dv_port_id_action_resource_register
12810                             (dev, &port_id_resource, dev_flow, error))
12811                                 return -rte_errno;
12812                         dev_flow->dv.actions[actions_n++] =
12813                                         dev_flow->dv.port_id_action->action;
12814                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12815                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12816                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12817                         num_of_dest++;
12818                         break;
12819                 case RTE_FLOW_ACTION_TYPE_FLAG:
12820                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12821                         wks->mark = 1;
12822                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12823                                 struct rte_flow_action_mark mark = {
12824                                         .id = MLX5_FLOW_MARK_DEFAULT,
12825                                 };
12826
12827                                 if (flow_dv_convert_action_mark(dev, &mark,
12828                                                                 mhdr_res,
12829                                                                 error))
12830                                         return -rte_errno;
12831                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12832                                 break;
12833                         }
12834                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12835                         /*
12836                          * Only one FLAG or MARK is supported per device flow
12837                          * right now. So the pointer to the tag resource must be
12838                          * zero before the register process.
12839                          */
12840                         MLX5_ASSERT(!handle->dvh.rix_tag);
12841                         if (flow_dv_tag_resource_register(dev, tag_be,
12842                                                           dev_flow, error))
12843                                 return -rte_errno;
12844                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12845                         dev_flow->dv.actions[actions_n++] =
12846                                         dev_flow->dv.tag_resource->action;
12847                         break;
12848                 case RTE_FLOW_ACTION_TYPE_MARK:
12849                         action_flags |= MLX5_FLOW_ACTION_MARK;
12850                         wks->mark = 1;
12851                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12852                                 const struct rte_flow_action_mark *mark =
12853                                         (const struct rte_flow_action_mark *)
12854                                                 actions->conf;
12855
12856                                 if (flow_dv_convert_action_mark(dev, mark,
12857                                                                 mhdr_res,
12858                                                                 error))
12859                                         return -rte_errno;
12860                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12861                                 break;
12862                         }
12863                         /* Fall-through */
12864                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12865                         /* Legacy (non-extensive) MARK action. */
12866                         tag_be = mlx5_flow_mark_set
12867                               (((const struct rte_flow_action_mark *)
12868                                (actions->conf))->id);
12869                         MLX5_ASSERT(!handle->dvh.rix_tag);
12870                         if (flow_dv_tag_resource_register(dev, tag_be,
12871                                                           dev_flow, error))
12872                                 return -rte_errno;
12873                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12874                         dev_flow->dv.actions[actions_n++] =
12875                                         dev_flow->dv.tag_resource->action;
12876                         break;
12877                 case RTE_FLOW_ACTION_TYPE_SET_META:
12878                         if (flow_dv_convert_action_set_meta
12879                                 (dev, mhdr_res, attr,
12880                                  (const struct rte_flow_action_set_meta *)
12881                                   actions->conf, error))
12882                                 return -rte_errno;
12883                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12884                         break;
12885                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12886                         if (flow_dv_convert_action_set_tag
12887                                 (dev, mhdr_res,
12888                                  (const struct rte_flow_action_set_tag *)
12889                                   actions->conf, error))
12890                                 return -rte_errno;
12891                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12892                         break;
12893                 case RTE_FLOW_ACTION_TYPE_DROP:
12894                         action_flags |= MLX5_FLOW_ACTION_DROP;
12895                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12896                         break;
12897                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12898                         queue = actions->conf;
12899                         rss_desc->queue_num = 1;
12900                         rss_desc->queue[0] = queue->index;
12901                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12902                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12903                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12904                         num_of_dest++;
12905                         break;
12906                 case RTE_FLOW_ACTION_TYPE_RSS:
12907                         rss = actions->conf;
12908                         memcpy(rss_desc->queue, rss->queue,
12909                                rss->queue_num * sizeof(uint16_t));
12910                         rss_desc->queue_num = rss->queue_num;
12911                         /* NULL RSS key indicates default RSS key. */
12912                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12913                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12914                         /*
12915                          * rss->level and rss.types should be set in advance
12916                          * when expanding items for RSS.
12917                          */
12918                         action_flags |= MLX5_FLOW_ACTION_RSS;
12919                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12920                                 MLX5_FLOW_FATE_SHARED_RSS :
12921                                 MLX5_FLOW_FATE_QUEUE;
12922                         break;
12923                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12924                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12925                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
12926                         if (flow->age == 0) {
12927                                 flow->age = owner_idx;
12928                                 __atomic_fetch_add(&age_act->refcnt, 1,
12929                                                    __ATOMIC_RELAXED);
12930                         }
12931                         age_act_pos = actions_n++;
12932                         action_flags |= MLX5_FLOW_ACTION_AGE;
12933                         break;
12934                 case RTE_FLOW_ACTION_TYPE_AGE:
12935                         non_shared_age = action->conf;
12936                         age_act_pos = actions_n++;
12937                         action_flags |= MLX5_FLOW_ACTION_AGE;
12938                         break;
12939                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12940                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12941                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
12942                                                              NULL);
12943                         MLX5_ASSERT(cnt_act != NULL);
12944                         /**
12945                          * When creating meter drop flow in drop table, the
12946                          * counter should not overwrite the rte flow counter.
12947                          */
12948                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12949                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12950                                 dev_flow->dv.actions[actions_n++] =
12951                                                         cnt_act->action;
12952                         } else {
12953                                 if (flow->counter == 0) {
12954                                         flow->counter = owner_idx;
12955                                         __atomic_fetch_add
12956                                                 (&cnt_act->shared_info.refcnt,
12957                                                  1, __ATOMIC_RELAXED);
12958                                 }
12959                                 /* Save information first, will apply later. */
12960                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
12961                         }
12962                         break;
12963                 case RTE_FLOW_ACTION_TYPE_COUNT:
12964                         if (!priv->sh->cdev->config.devx) {
12965                                 return rte_flow_error_set
12966                                               (error, ENOTSUP,
12967                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12968                                                NULL,
12969                                                "count action not supported");
12970                         }
12971                         /* Save information first, will apply later. */
12972                         count = action->conf;
12973                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12974                         break;
12975                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12976                         dev_flow->dv.actions[actions_n++] =
12977                                                 priv->sh->pop_vlan_action;
12978                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12979                         break;
12980                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12981                         if (!(action_flags &
12982                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12983                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12984                         vlan.eth_proto = rte_be_to_cpu_16
12985                              ((((const struct rte_flow_action_of_push_vlan *)
12986                                                    actions->conf)->ethertype));
12987                         found_action = mlx5_flow_find_action
12988                                         (actions + 1,
12989                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12990                         if (found_action)
12991                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12992                         found_action = mlx5_flow_find_action
12993                                         (actions + 1,
12994                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12995                         if (found_action)
12996                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12997                         if (flow_dv_create_action_push_vlan
12998                                             (dev, attr, &vlan, dev_flow, error))
12999                                 return -rte_errno;
13000                         dev_flow->dv.actions[actions_n++] =
13001                                         dev_flow->dv.push_vlan_res->action;
13002                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
13003                         break;
13004                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
13005                         /* of_vlan_push action handled this action */
13006                         MLX5_ASSERT(action_flags &
13007                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
13008                         break;
13009                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
13010                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
13011                                 break;
13012                         flow_dev_get_vlan_info_from_items(items, &vlan);
13013                         mlx5_update_vlan_vid_pcp(actions, &vlan);
13014                         /* If no VLAN push - this is a modify header action */
13015                         if (flow_dv_convert_action_modify_vlan_vid
13016                                                 (mhdr_res, actions, error))
13017                                 return -rte_errno;
13018                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
13019                         break;
13020                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
13021                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
13022                         if (flow_dv_create_action_l2_encap(dev, actions,
13023                                                            dev_flow,
13024                                                            attr->transfer,
13025                                                            error))
13026                                 return -rte_errno;
13027                         dev_flow->dv.actions[actions_n++] =
13028                                         dev_flow->dv.encap_decap->action;
13029                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13030                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13031                                 sample_act->action_flags |=
13032                                                         MLX5_FLOW_ACTION_ENCAP;
13033                         break;
13034                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
13035                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
13036                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
13037                                                            attr->transfer,
13038                                                            error))
13039                                 return -rte_errno;
13040                         dev_flow->dv.actions[actions_n++] =
13041                                         dev_flow->dv.encap_decap->action;
13042                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13043                         break;
13044                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
13045                         /* Handle encap with preceding decap. */
13046                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
13047                                 if (flow_dv_create_action_raw_encap
13048                                         (dev, actions, dev_flow, attr, error))
13049                                         return -rte_errno;
13050                                 dev_flow->dv.actions[actions_n++] =
13051                                         dev_flow->dv.encap_decap->action;
13052                         } else {
13053                                 /* Handle encap without preceding decap. */
13054                                 if (flow_dv_create_action_l2_encap
13055                                     (dev, actions, dev_flow, attr->transfer,
13056                                      error))
13057                                         return -rte_errno;
13058                                 dev_flow->dv.actions[actions_n++] =
13059                                         dev_flow->dv.encap_decap->action;
13060                         }
13061                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13062                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13063                                 sample_act->action_flags |=
13064                                                         MLX5_FLOW_ACTION_ENCAP;
13065                         break;
13066                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
13067                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
13068                                 ;
13069                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
13070                                 if (flow_dv_create_action_l2_decap
13071                                     (dev, dev_flow, attr->transfer, error))
13072                                         return -rte_errno;
13073                                 dev_flow->dv.actions[actions_n++] =
13074                                         dev_flow->dv.encap_decap->action;
13075                         }
13076                         /* If decap is followed by encap, handle it at encap. */
13077                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13078                         break;
13079                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
13080                         dev_flow->dv.actions[actions_n++] =
13081                                 (void *)(uintptr_t)action->conf;
13082                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13083                         break;
13084                 case RTE_FLOW_ACTION_TYPE_JUMP:
13085                         jump_group = ((const struct rte_flow_action_jump *)
13086                                                         action->conf)->group;
13087                         grp_info.std_tbl_fix = 0;
13088                         if (dev_flow->skip_scale &
13089                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
13090                                 grp_info.skip_scale = 1;
13091                         else
13092                                 grp_info.skip_scale = 0;
13093                         ret = mlx5_flow_group_to_table(dev, tunnel,
13094                                                        jump_group,
13095                                                        &table,
13096                                                        &grp_info, error);
13097                         if (ret)
13098                                 return ret;
13099                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
13100                                                        attr->transfer,
13101                                                        !!dev_flow->external,
13102                                                        tunnel, jump_group, 0,
13103                                                        0, error);
13104                         if (!tbl)
13105                                 return rte_flow_error_set
13106                                                 (error, errno,
13107                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13108                                                  NULL,
13109                                                  "cannot create jump action.");
13110                         if (flow_dv_jump_tbl_resource_register
13111                             (dev, tbl, dev_flow, error)) {
13112                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
13113                                 return rte_flow_error_set
13114                                                 (error, errno,
13115                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13116                                                  NULL,
13117                                                  "cannot create jump action.");
13118                         }
13119                         dev_flow->dv.actions[actions_n++] =
13120                                         dev_flow->dv.jump->action;
13121                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13122                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13123                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13124                         num_of_dest++;
13125                         break;
13126                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13127                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13128                         if (flow_dv_convert_action_modify_mac
13129                                         (mhdr_res, actions, error))
13130                                 return -rte_errno;
13131                         action_flags |= actions->type ==
13132                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13133                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
13134                                         MLX5_FLOW_ACTION_SET_MAC_DST;
13135                         break;
13136                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13137                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13138                         if (flow_dv_convert_action_modify_ipv4
13139                                         (mhdr_res, actions, error))
13140                                 return -rte_errno;
13141                         action_flags |= actions->type ==
13142                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13143                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13144                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13145                         break;
13146                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13147                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13148                         if (flow_dv_convert_action_modify_ipv6
13149                                         (mhdr_res, actions, error))
13150                                 return -rte_errno;
13151                         action_flags |= actions->type ==
13152                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13153                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13154                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13155                         break;
13156                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13157                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13158                         if (flow_dv_convert_action_modify_tp
13159                                         (mhdr_res, actions, items,
13160                                          &flow_attr, dev_flow, !!(action_flags &
13161                                          MLX5_FLOW_ACTION_DECAP), error))
13162                                 return -rte_errno;
13163                         action_flags |= actions->type ==
13164                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13165                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13166                                         MLX5_FLOW_ACTION_SET_TP_DST;
13167                         break;
13168                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13169                         if (flow_dv_convert_action_modify_dec_ttl
13170                                         (mhdr_res, items, &flow_attr, dev_flow,
13171                                          !!(action_flags &
13172                                          MLX5_FLOW_ACTION_DECAP), error))
13173                                 return -rte_errno;
13174                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13175                         break;
13176                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13177                         if (flow_dv_convert_action_modify_ttl
13178                                         (mhdr_res, actions, items, &flow_attr,
13179                                          dev_flow, !!(action_flags &
13180                                          MLX5_FLOW_ACTION_DECAP), error))
13181                                 return -rte_errno;
13182                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13183                         break;
13184                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13185                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13186                         if (flow_dv_convert_action_modify_tcp_seq
13187                                         (mhdr_res, actions, error))
13188                                 return -rte_errno;
13189                         action_flags |= actions->type ==
13190                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13191                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13192                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13193                         break;
13194
13195                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13196                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13197                         if (flow_dv_convert_action_modify_tcp_ack
13198                                         (mhdr_res, actions, error))
13199                                 return -rte_errno;
13200                         action_flags |= actions->type ==
13201                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13202                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13203                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13204                         break;
13205                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13206                         if (flow_dv_convert_action_set_reg
13207                                         (mhdr_res, actions, error))
13208                                 return -rte_errno;
13209                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13210                         break;
13211                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13212                         if (flow_dv_convert_action_copy_mreg
13213                                         (dev, mhdr_res, actions, error))
13214                                 return -rte_errno;
13215                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13216                         break;
13217                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13218                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13219                         dev_flow->handle->fate_action =
13220                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13221                         break;
13222                 case RTE_FLOW_ACTION_TYPE_METER:
13223                         if (!wks->fm)
13224                                 return rte_flow_error_set(error, rte_errno,
13225                                         RTE_FLOW_ERROR_TYPE_ACTION,
13226                                         NULL, "Failed to get meter in flow.");
13227                         /* Set the meter action. */
13228                         dev_flow->dv.actions[actions_n++] =
13229                                 wks->fm->meter_action;
13230                         action_flags |= MLX5_FLOW_ACTION_METER;
13231                         break;
13232                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13233                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13234                                                               actions, error))
13235                                 return -rte_errno;
13236                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13237                         break;
13238                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13239                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13240                                                               actions, error))
13241                                 return -rte_errno;
13242                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13243                         break;
13244                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13245                         sample_act_pos = actions_n;
13246                         sample = (const struct rte_flow_action_sample *)
13247                                  action->conf;
13248                         actions_n++;
13249                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13250                         /* put encap action into group if work with port id */
13251                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13252                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13253                                 sample_act->action_flags |=
13254                                                         MLX5_FLOW_ACTION_ENCAP;
13255                         break;
13256                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13257                         if (flow_dv_convert_action_modify_field
13258                                         (dev, mhdr_res, actions, attr, error))
13259                                 return -rte_errno;
13260                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13261                         break;
13262                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13263                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13264                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13265                         if (!ct)
13266                                 return rte_flow_error_set(error, EINVAL,
13267                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13268                                                 NULL,
13269                                                 "Failed to get CT object.");
13270                         if (mlx5_aso_ct_available(priv->sh, ct))
13271                                 return rte_flow_error_set(error, rte_errno,
13272                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13273                                                 NULL,
13274                                                 "CT is unavailable.");
13275                         if (ct->is_original)
13276                                 dev_flow->dv.actions[actions_n] =
13277                                                         ct->dr_action_orig;
13278                         else
13279                                 dev_flow->dv.actions[actions_n] =
13280                                                         ct->dr_action_rply;
13281                         if (flow->ct == 0) {
13282                                 flow->indirect_type =
13283                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13284                                 flow->ct = owner_idx;
13285                                 __atomic_fetch_add(&ct->refcnt, 1,
13286                                                    __ATOMIC_RELAXED);
13287                         }
13288                         actions_n++;
13289                         action_flags |= MLX5_FLOW_ACTION_CT;
13290                         break;
13291                 case RTE_FLOW_ACTION_TYPE_END:
13292                         actions_end = true;
13293                         if (mhdr_res->actions_num) {
13294                                 /* create modify action if needed. */
13295                                 if (flow_dv_modify_hdr_resource_register
13296                                         (dev, mhdr_res, dev_flow, error))
13297                                         return -rte_errno;
13298                                 dev_flow->dv.actions[modify_action_position] =
13299                                         handle->dvh.modify_hdr->action;
13300                         }
13301                         /*
13302                          * Handle AGE and COUNT action by single HW counter
13303                          * when they are not shared.
13304                          */
13305                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13306                                 if ((non_shared_age && count) ||
13307                                     !(priv->sh->flow_hit_aso_en &&
13308                                       (attr->group || attr->transfer))) {
13309                                         /* Creates age by counters. */
13310                                         cnt_act = flow_dv_prepare_counter
13311                                                                 (dev, dev_flow,
13312                                                                  flow, count,
13313                                                                  non_shared_age,
13314                                                                  error);
13315                                         if (!cnt_act)
13316                                                 return -rte_errno;
13317                                         dev_flow->dv.actions[age_act_pos] =
13318                                                                 cnt_act->action;
13319                                         break;
13320                                 }
13321                                 if (!flow->age && non_shared_age) {
13322                                         flow->age = flow_dv_aso_age_alloc
13323                                                                 (dev, error);
13324                                         if (!flow->age)
13325                                                 return -rte_errno;
13326                                         flow_dv_aso_age_params_init
13327                                                     (dev, flow->age,
13328                                                      non_shared_age->context ?
13329                                                      non_shared_age->context :
13330                                                      (void *)(uintptr_t)
13331                                                      (dev_flow->flow_idx),
13332                                                      non_shared_age->timeout);
13333                                 }
13334                                 age_act = flow_aso_age_get_by_idx(dev,
13335                                                                   flow->age);
13336                                 dev_flow->dv.actions[age_act_pos] =
13337                                                              age_act->dr_action;
13338                         }
13339                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13340                                 /*
13341                                  * Create one count action, to be used
13342                                  * by all sub-flows.
13343                                  */
13344                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13345                                                                   flow, count,
13346                                                                   NULL, error);
13347                                 if (!cnt_act)
13348                                         return -rte_errno;
13349                                 dev_flow->dv.actions[actions_n++] =
13350                                                                 cnt_act->action;
13351                         }
13352                 default:
13353                         break;
13354                 }
13355                 if (mhdr_res->actions_num &&
13356                     modify_action_position == UINT32_MAX)
13357                         modify_action_position = actions_n++;
13358         }
13359         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13360                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13361                 int item_type = items->type;
13362
13363                 if (!mlx5_flow_os_item_supported(item_type))
13364                         return rte_flow_error_set(error, ENOTSUP,
13365                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13366                                                   NULL, "item not supported");
13367                 switch (item_type) {
13368                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13369                         flow_dv_translate_item_port_id
13370                                 (dev, match_mask, match_value, items, attr);
13371                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13372                         break;
13373                 case RTE_FLOW_ITEM_TYPE_ETH:
13374                         flow_dv_translate_item_eth(match_mask, match_value,
13375                                                    items, tunnel,
13376                                                    dev_flow->dv.group);
13377                         matcher.priority = action_flags &
13378                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13379                                         !dev_flow->external ?
13380                                         MLX5_PRIORITY_MAP_L3 :
13381                                         MLX5_PRIORITY_MAP_L2;
13382                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13383                                              MLX5_FLOW_LAYER_OUTER_L2;
13384                         break;
13385                 case RTE_FLOW_ITEM_TYPE_VLAN:
13386                         flow_dv_translate_item_vlan(dev_flow,
13387                                                     match_mask, match_value,
13388                                                     items, tunnel,
13389                                                     dev_flow->dv.group);
13390                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13391                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13392                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13393                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13394                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13395                         break;
13396                 case RTE_FLOW_ITEM_TYPE_IPV4:
13397                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13398                                                   &item_flags, &tunnel);
13399                         flow_dv_translate_item_ipv4(match_mask, match_value,
13400                                                     items, tunnel,
13401                                                     dev_flow->dv.group);
13402                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13403                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13404                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13405                         if (items->mask != NULL &&
13406                             ((const struct rte_flow_item_ipv4 *)
13407                              items->mask)->hdr.next_proto_id) {
13408                                 next_protocol =
13409                                         ((const struct rte_flow_item_ipv4 *)
13410                                          (items->spec))->hdr.next_proto_id;
13411                                 next_protocol &=
13412                                         ((const struct rte_flow_item_ipv4 *)
13413                                          (items->mask))->hdr.next_proto_id;
13414                         } else {
13415                                 /* Reset for inner layer. */
13416                                 next_protocol = 0xff;
13417                         }
13418                         break;
13419                 case RTE_FLOW_ITEM_TYPE_IPV6:
13420                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13421                                                   &item_flags, &tunnel);
13422                         flow_dv_translate_item_ipv6(match_mask, match_value,
13423                                                     items, tunnel,
13424                                                     dev_flow->dv.group);
13425                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13426                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13427                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13428                         if (items->mask != NULL &&
13429                             ((const struct rte_flow_item_ipv6 *)
13430                              items->mask)->hdr.proto) {
13431                                 next_protocol =
13432                                         ((const struct rte_flow_item_ipv6 *)
13433                                          items->spec)->hdr.proto;
13434                                 next_protocol &=
13435                                         ((const struct rte_flow_item_ipv6 *)
13436                                          items->mask)->hdr.proto;
13437                         } else {
13438                                 /* Reset for inner layer. */
13439                                 next_protocol = 0xff;
13440                         }
13441                         break;
13442                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13443                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13444                                                              match_value,
13445                                                              items, tunnel);
13446                         last_item = tunnel ?
13447                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13448                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13449                         if (items->mask != NULL &&
13450                             ((const struct rte_flow_item_ipv6_frag_ext *)
13451                              items->mask)->hdr.next_header) {
13452                                 next_protocol =
13453                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13454                                  items->spec)->hdr.next_header;
13455                                 next_protocol &=
13456                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13457                                  items->mask)->hdr.next_header;
13458                         } else {
13459                                 /* Reset for inner layer. */
13460                                 next_protocol = 0xff;
13461                         }
13462                         break;
13463                 case RTE_FLOW_ITEM_TYPE_TCP:
13464                         flow_dv_translate_item_tcp(match_mask, match_value,
13465                                                    items, tunnel);
13466                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13467                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13468                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13469                         break;
13470                 case RTE_FLOW_ITEM_TYPE_UDP:
13471                         flow_dv_translate_item_udp(match_mask, match_value,
13472                                                    items, tunnel);
13473                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13474                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13475                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13476                         break;
13477                 case RTE_FLOW_ITEM_TYPE_GRE:
13478                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13479                         last_item = MLX5_FLOW_LAYER_GRE;
13480                         tunnel_item = items;
13481                         break;
13482                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13483                         flow_dv_translate_item_gre_key(match_mask,
13484                                                        match_value, items);
13485                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13486                         break;
13487                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13488                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13489                         last_item = MLX5_FLOW_LAYER_GRE;
13490                         tunnel_item = items;
13491                         break;
13492                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13493                         flow_dv_translate_item_vxlan(dev, attr,
13494                                                      match_mask, match_value,
13495                                                      items, tunnel);
13496                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13497                         last_item = MLX5_FLOW_LAYER_VXLAN;
13498                         break;
13499                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13500                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13501                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13502                         tunnel_item = items;
13503                         break;
13504                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13505                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13506                         last_item = MLX5_FLOW_LAYER_GENEVE;
13507                         tunnel_item = items;
13508                         break;
13509                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13510                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13511                                                           match_value,
13512                                                           items, error);
13513                         if (ret)
13514                                 return rte_flow_error_set(error, -ret,
13515                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13516                                         "cannot create GENEVE TLV option");
13517                         flow->geneve_tlv_option = 1;
13518                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13519                         break;
13520                 case RTE_FLOW_ITEM_TYPE_MPLS:
13521                         flow_dv_translate_item_mpls(match_mask, match_value,
13522                                                     items, last_item, tunnel);
13523                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13524                         last_item = MLX5_FLOW_LAYER_MPLS;
13525                         break;
13526                 case RTE_FLOW_ITEM_TYPE_MARK:
13527                         flow_dv_translate_item_mark(dev, match_mask,
13528                                                     match_value, items);
13529                         last_item = MLX5_FLOW_ITEM_MARK;
13530                         break;
13531                 case RTE_FLOW_ITEM_TYPE_META:
13532                         flow_dv_translate_item_meta(dev, match_mask,
13533                                                     match_value, attr, items);
13534                         last_item = MLX5_FLOW_ITEM_METADATA;
13535                         break;
13536                 case RTE_FLOW_ITEM_TYPE_ICMP:
13537                         flow_dv_translate_item_icmp(match_mask, match_value,
13538                                                     items, tunnel);
13539                         last_item = MLX5_FLOW_LAYER_ICMP;
13540                         break;
13541                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13542                         flow_dv_translate_item_icmp6(match_mask, match_value,
13543                                                       items, tunnel);
13544                         last_item = MLX5_FLOW_LAYER_ICMP6;
13545                         break;
13546                 case RTE_FLOW_ITEM_TYPE_TAG:
13547                         flow_dv_translate_item_tag(dev, match_mask,
13548                                                    match_value, items);
13549                         last_item = MLX5_FLOW_ITEM_TAG;
13550                         break;
13551                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13552                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13553                                                         match_value, items);
13554                         last_item = MLX5_FLOW_ITEM_TAG;
13555                         break;
13556                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13557                         flow_dv_translate_item_tx_queue(dev, match_mask,
13558                                                         match_value,
13559                                                         items);
13560                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13561                         break;
13562                 case RTE_FLOW_ITEM_TYPE_GTP:
13563                         flow_dv_translate_item_gtp(match_mask, match_value,
13564                                                    items, tunnel);
13565                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13566                         last_item = MLX5_FLOW_LAYER_GTP;
13567                         break;
13568                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13569                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13570                                                           match_value,
13571                                                           items);
13572                         if (ret)
13573                                 return rte_flow_error_set(error, -ret,
13574                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13575                                         "cannot create GTP PSC item");
13576                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13577                         break;
13578                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13579                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13580                                 /* Create it only the first time to be used. */
13581                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13582                                 if (ret)
13583                                         return rte_flow_error_set
13584                                                 (error, -ret,
13585                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13586                                                 NULL,
13587                                                 "cannot create eCPRI parser");
13588                         }
13589                         flow_dv_translate_item_ecpri(dev, match_mask,
13590                                                      match_value, items,
13591                                                      last_item);
13592                         /* No other protocol should follow eCPRI layer. */
13593                         last_item = MLX5_FLOW_LAYER_ECPRI;
13594                         break;
13595                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13596                         flow_dv_translate_item_integrity(items, integrity_items,
13597                                                          &last_item);
13598                         break;
13599                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13600                         flow_dv_translate_item_aso_ct(dev, match_mask,
13601                                                       match_value, items);
13602                         break;
13603                 case RTE_FLOW_ITEM_TYPE_FLEX:
13604                         flow_dv_translate_item_flex(dev, match_mask,
13605                                                     match_value, items,
13606                                                     dev_flow, tunnel != 0);
13607                         last_item = tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
13608                                     MLX5_FLOW_ITEM_OUTER_FLEX;
13609                         break;
13610                 default:
13611                         break;
13612                 }
13613                 item_flags |= last_item;
13614         }
13615         /*
13616          * When E-Switch mode is enabled, we have two cases where we need to
13617          * set the source port manually.
13618          * The first one, is in case of Nic steering rule, and the second is
13619          * E-Switch rule where no port_id item was found. In both cases
13620          * the source port is set according the current port in use.
13621          */
13622         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode) {
13623                 if (flow_dv_translate_item_port_id(dev, match_mask,
13624                                                    match_value, NULL, attr))
13625                         return -rte_errno;
13626         }
13627         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13628                 flow_dv_translate_item_integrity_post(match_mask, match_value,
13629                                                       integrity_items,
13630                                                       item_flags);
13631         }
13632         if (item_flags & MLX5_FLOW_LAYER_VXLAN_GPE)
13633                 flow_dv_translate_item_vxlan_gpe(match_mask, match_value,
13634                                                  tunnel_item, item_flags);
13635         else if (item_flags & MLX5_FLOW_LAYER_GENEVE)
13636                 flow_dv_translate_item_geneve(match_mask, match_value,
13637                                               tunnel_item, item_flags);
13638         else if (item_flags & MLX5_FLOW_LAYER_GRE) {
13639                 if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE)
13640                         flow_dv_translate_item_gre(match_mask, match_value,
13641                                                    tunnel_item, item_flags);
13642                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_NVGRE)
13643                         flow_dv_translate_item_nvgre(match_mask, match_value,
13644                                                      tunnel_item, item_flags);
13645                 else
13646                         MLX5_ASSERT(false);
13647         }
13648 #ifdef RTE_LIBRTE_MLX5_DEBUG
13649         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13650                                               dev_flow->dv.value.buf));
13651 #endif
13652         /*
13653          * Layers may be already initialized from prefix flow if this dev_flow
13654          * is the suffix flow.
13655          */
13656         handle->layers |= item_flags;
13657         if (action_flags & MLX5_FLOW_ACTION_RSS)
13658                 flow_dv_hashfields_set(dev_flow, rss_desc);
13659         /* If has RSS action in the sample action, the Sample/Mirror resource
13660          * should be registered after the hash filed be update.
13661          */
13662         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13663                 ret = flow_dv_translate_action_sample(dev,
13664                                                       sample,
13665                                                       dev_flow, attr,
13666                                                       &num_of_dest,
13667                                                       sample_actions,
13668                                                       &sample_res,
13669                                                       error);
13670                 if (ret < 0)
13671                         return ret;
13672                 ret = flow_dv_create_action_sample(dev,
13673                                                    dev_flow,
13674                                                    num_of_dest,
13675                                                    &sample_res,
13676                                                    &mdest_res,
13677                                                    sample_actions,
13678                                                    action_flags,
13679                                                    error);
13680                 if (ret < 0)
13681                         return rte_flow_error_set
13682                                                 (error, rte_errno,
13683                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13684                                                 NULL,
13685                                                 "cannot create sample action");
13686                 if (num_of_dest > 1) {
13687                         dev_flow->dv.actions[sample_act_pos] =
13688                         dev_flow->dv.dest_array_res->action;
13689                 } else {
13690                         dev_flow->dv.actions[sample_act_pos] =
13691                         dev_flow->dv.sample_res->verbs_action;
13692                 }
13693         }
13694         /*
13695          * For multiple destination (sample action with ratio=1), the encap
13696          * action and port id action will be combined into group action.
13697          * So need remove the original these actions in the flow and only
13698          * use the sample action instead of.
13699          */
13700         if (num_of_dest > 1 &&
13701             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13702                 int i;
13703                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13704
13705                 for (i = 0; i < actions_n; i++) {
13706                         if ((sample_act->dr_encap_action &&
13707                                 sample_act->dr_encap_action ==
13708                                 dev_flow->dv.actions[i]) ||
13709                                 (sample_act->dr_port_id_action &&
13710                                 sample_act->dr_port_id_action ==
13711                                 dev_flow->dv.actions[i]) ||
13712                                 (sample_act->dr_jump_action &&
13713                                 sample_act->dr_jump_action ==
13714                                 dev_flow->dv.actions[i]))
13715                                 continue;
13716                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13717                 }
13718                 memcpy((void *)dev_flow->dv.actions,
13719                                 (void *)temp_actions,
13720                                 tmp_actions_n * sizeof(void *));
13721                 actions_n = tmp_actions_n;
13722         }
13723         dev_flow->dv.actions_n = actions_n;
13724         dev_flow->act_flags = action_flags;
13725         if (wks->skip_matcher_reg)
13726                 return 0;
13727         /* Register matcher. */
13728         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13729                                     matcher.mask.size);
13730         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13731                                                      matcher.priority,
13732                                                      dev_flow->external);
13733         /**
13734          * When creating meter drop flow in drop table, using original
13735          * 5-tuple match, the matcher priority should be lower than
13736          * mtr_id matcher.
13737          */
13738         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13739             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13740             matcher.priority <= MLX5_REG_BITS)
13741                 matcher.priority += MLX5_REG_BITS;
13742         /* reserved field no needs to be set to 0 here. */
13743         tbl_key.is_fdb = attr->transfer;
13744         tbl_key.is_egress = attr->egress;
13745         tbl_key.level = dev_flow->dv.group;
13746         tbl_key.id = dev_flow->dv.table_id;
13747         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13748                                      tunnel, attr->group, error))
13749                 return -rte_errno;
13750         return 0;
13751 }
13752
13753 /**
13754  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13755  * and tunnel.
13756  *
13757  * @param[in, out] action
13758  *   Shred RSS action holding hash RX queue objects.
13759  * @param[in] hash_fields
13760  *   Defines combination of packet fields to participate in RX hash.
13761  * @param[in] tunnel
13762  *   Tunnel type
13763  * @param[in] hrxq_idx
13764  *   Hash RX queue index to set.
13765  *
13766  * @return
13767  *   0 on success, otherwise negative errno value.
13768  */
13769 static int
13770 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13771                               const uint64_t hash_fields,
13772                               uint32_t hrxq_idx)
13773 {
13774         uint32_t *hrxqs = action->hrxq;
13775
13776         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13777         case MLX5_RSS_HASH_IPV4:
13778                 /* fall-through. */
13779         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13780                 /* fall-through. */
13781         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13782                 hrxqs[0] = hrxq_idx;
13783                 return 0;
13784         case MLX5_RSS_HASH_IPV4_TCP:
13785                 /* fall-through. */
13786         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13787                 /* fall-through. */
13788         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13789                 hrxqs[1] = hrxq_idx;
13790                 return 0;
13791         case MLX5_RSS_HASH_IPV4_UDP:
13792                 /* fall-through. */
13793         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13794                 /* fall-through. */
13795         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13796                 hrxqs[2] = hrxq_idx;
13797                 return 0;
13798         case MLX5_RSS_HASH_IPV6:
13799                 /* fall-through. */
13800         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13801                 /* fall-through. */
13802         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13803                 hrxqs[3] = hrxq_idx;
13804                 return 0;
13805         case MLX5_RSS_HASH_IPV6_TCP:
13806                 /* fall-through. */
13807         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13808                 /* fall-through. */
13809         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13810                 hrxqs[4] = hrxq_idx;
13811                 return 0;
13812         case MLX5_RSS_HASH_IPV6_UDP:
13813                 /* fall-through. */
13814         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13815                 /* fall-through. */
13816         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13817                 hrxqs[5] = hrxq_idx;
13818                 return 0;
13819         case MLX5_RSS_HASH_NONE:
13820                 hrxqs[6] = hrxq_idx;
13821                 return 0;
13822         default:
13823                 return -1;
13824         }
13825 }
13826
13827 /**
13828  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13829  * and tunnel.
13830  *
13831  * @param[in] dev
13832  *   Pointer to the Ethernet device structure.
13833  * @param[in] idx
13834  *   Shared RSS action ID holding hash RX queue objects.
13835  * @param[in] hash_fields
13836  *   Defines combination of packet fields to participate in RX hash.
13837  * @param[in] tunnel
13838  *   Tunnel type
13839  *
13840  * @return
13841  *   Valid hash RX queue index, otherwise 0.
13842  */
13843 static uint32_t
13844 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13845                                  const uint64_t hash_fields)
13846 {
13847         struct mlx5_priv *priv = dev->data->dev_private;
13848         struct mlx5_shared_action_rss *shared_rss =
13849             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13850         const uint32_t *hrxqs = shared_rss->hrxq;
13851
13852         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13853         case MLX5_RSS_HASH_IPV4:
13854                 /* fall-through. */
13855         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13856                 /* fall-through. */
13857         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13858                 return hrxqs[0];
13859         case MLX5_RSS_HASH_IPV4_TCP:
13860                 /* fall-through. */
13861         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13862                 /* fall-through. */
13863         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13864                 return hrxqs[1];
13865         case MLX5_RSS_HASH_IPV4_UDP:
13866                 /* fall-through. */
13867         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13868                 /* fall-through. */
13869         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13870                 return hrxqs[2];
13871         case MLX5_RSS_HASH_IPV6:
13872                 /* fall-through. */
13873         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13874                 /* fall-through. */
13875         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13876                 return hrxqs[3];
13877         case MLX5_RSS_HASH_IPV6_TCP:
13878                 /* fall-through. */
13879         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13880                 /* fall-through. */
13881         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13882                 return hrxqs[4];
13883         case MLX5_RSS_HASH_IPV6_UDP:
13884                 /* fall-through. */
13885         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13886                 /* fall-through. */
13887         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13888                 return hrxqs[5];
13889         case MLX5_RSS_HASH_NONE:
13890                 return hrxqs[6];
13891         default:
13892                 return 0;
13893         }
13894
13895 }
13896
13897 /**
13898  * Apply the flow to the NIC, lock free,
13899  * (mutex should be acquired by caller).
13900  *
13901  * @param[in] dev
13902  *   Pointer to the Ethernet device structure.
13903  * @param[in, out] flow
13904  *   Pointer to flow structure.
13905  * @param[out] error
13906  *   Pointer to error structure.
13907  *
13908  * @return
13909  *   0 on success, a negative errno value otherwise and rte_errno is set.
13910  */
13911 static int
13912 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13913               struct rte_flow_error *error)
13914 {
13915         struct mlx5_flow_dv_workspace *dv;
13916         struct mlx5_flow_handle *dh;
13917         struct mlx5_flow_handle_dv *dv_h;
13918         struct mlx5_flow *dev_flow;
13919         struct mlx5_priv *priv = dev->data->dev_private;
13920         uint32_t handle_idx;
13921         int n;
13922         int err;
13923         int idx;
13924         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13925         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13926         uint8_t misc_mask;
13927
13928         MLX5_ASSERT(wks);
13929         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13930                 dev_flow = &wks->flows[idx];
13931                 dv = &dev_flow->dv;
13932                 dh = dev_flow->handle;
13933                 dv_h = &dh->dvh;
13934                 n = dv->actions_n;
13935                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13936                         if (dv->transfer) {
13937                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13938                                 dv->actions[n++] = priv->sh->dr_drop_action;
13939                         } else {
13940 #ifdef HAVE_MLX5DV_DR
13941                                 /* DR supports drop action placeholder. */
13942                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13943                                 dv->actions[n++] = dv->group ?
13944                                         priv->sh->dr_drop_action :
13945                                         priv->root_drop_action;
13946 #else
13947                                 /* For DV we use the explicit drop queue. */
13948                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13949                                 dv->actions[n++] =
13950                                                 priv->drop_queue.hrxq->action;
13951 #endif
13952                         }
13953                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13954                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13955                         struct mlx5_hrxq *hrxq;
13956                         uint32_t hrxq_idx;
13957
13958                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13959                                                     &hrxq_idx);
13960                         if (!hrxq) {
13961                                 rte_flow_error_set
13962                                         (error, rte_errno,
13963                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13964                                          "cannot get hash queue");
13965                                 goto error;
13966                         }
13967                         dh->rix_hrxq = hrxq_idx;
13968                         dv->actions[n++] = hrxq->action;
13969                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13970                         struct mlx5_hrxq *hrxq = NULL;
13971                         uint32_t hrxq_idx;
13972
13973                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13974                                                 rss_desc->shared_rss,
13975                                                 dev_flow->hash_fields);
13976                         if (hrxq_idx)
13977                                 hrxq = mlx5_ipool_get
13978                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13979                                          hrxq_idx);
13980                         if (!hrxq) {
13981                                 rte_flow_error_set
13982                                         (error, rte_errno,
13983                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13984                                          "cannot get hash queue");
13985                                 goto error;
13986                         }
13987                         dh->rix_srss = rss_desc->shared_rss;
13988                         dv->actions[n++] = hrxq->action;
13989                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13990                         if (!priv->sh->default_miss_action) {
13991                                 rte_flow_error_set
13992                                         (error, rte_errno,
13993                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13994                                          "default miss action not be created.");
13995                                 goto error;
13996                         }
13997                         dv->actions[n++] = priv->sh->default_miss_action;
13998                 }
13999                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
14000                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
14001                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
14002                                                (void *)&dv->value, n,
14003                                                dv->actions, &dh->drv_flow);
14004                 if (err) {
14005                         rte_flow_error_set
14006                                 (error, errno,
14007                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14008                                 NULL,
14009                                 (!priv->sh->config.allow_duplicate_pattern &&
14010                                 errno == EEXIST) ?
14011                                 "duplicating pattern is not allowed" :
14012                                 "hardware refuses to create flow");
14013                         goto error;
14014                 }
14015                 if (priv->vmwa_context &&
14016                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
14017                         /*
14018                          * The rule contains the VLAN pattern.
14019                          * For VF we are going to create VLAN
14020                          * interface to make hypervisor set correct
14021                          * e-Switch vport context.
14022                          */
14023                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
14024                 }
14025         }
14026         return 0;
14027 error:
14028         err = rte_errno; /* Save rte_errno before cleanup. */
14029         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
14030                        handle_idx, dh, next) {
14031                 /* hrxq is union, don't clear it if the flag is not set. */
14032                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
14033                         mlx5_hrxq_release(dev, dh->rix_hrxq);
14034                         dh->rix_hrxq = 0;
14035                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14036                         dh->rix_srss = 0;
14037                 }
14038                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14039                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14040         }
14041         rte_errno = err; /* Restore rte_errno. */
14042         return -rte_errno;
14043 }
14044
14045 void
14046 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
14047                           struct mlx5_list_entry *entry)
14048 {
14049         struct mlx5_flow_dv_matcher *resource = container_of(entry,
14050                                                              typeof(*resource),
14051                                                              entry);
14052
14053         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
14054         mlx5_free(resource);
14055 }
14056
14057 /**
14058  * Release the flow matcher.
14059  *
14060  * @param dev
14061  *   Pointer to Ethernet device.
14062  * @param port_id
14063  *   Index to port ID action resource.
14064  *
14065  * @return
14066  *   1 while a reference on it exists, 0 when freed.
14067  */
14068 static int
14069 flow_dv_matcher_release(struct rte_eth_dev *dev,
14070                         struct mlx5_flow_handle *handle)
14071 {
14072         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
14073         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
14074                                                             typeof(*tbl), tbl);
14075         int ret;
14076
14077         MLX5_ASSERT(matcher->matcher_object);
14078         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
14079         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
14080         return ret;
14081 }
14082
14083 void
14084 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14085 {
14086         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14087         struct mlx5_flow_dv_encap_decap_resource *res =
14088                                        container_of(entry, typeof(*res), entry);
14089
14090         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14091         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
14092 }
14093
14094 /**
14095  * Release an encap/decap resource.
14096  *
14097  * @param dev
14098  *   Pointer to Ethernet device.
14099  * @param encap_decap_idx
14100  *   Index of encap decap resource.
14101  *
14102  * @return
14103  *   1 while a reference on it exists, 0 when freed.
14104  */
14105 static int
14106 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
14107                                      uint32_t encap_decap_idx)
14108 {
14109         struct mlx5_priv *priv = dev->data->dev_private;
14110         struct mlx5_flow_dv_encap_decap_resource *resource;
14111
14112         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
14113                                   encap_decap_idx);
14114         if (!resource)
14115                 return 0;
14116         MLX5_ASSERT(resource->action);
14117         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
14118 }
14119
14120 /**
14121  * Release an jump to table action resource.
14122  *
14123  * @param dev
14124  *   Pointer to Ethernet device.
14125  * @param rix_jump
14126  *   Index to the jump action resource.
14127  *
14128  * @return
14129  *   1 while a reference on it exists, 0 when freed.
14130  */
14131 static int
14132 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
14133                                   uint32_t rix_jump)
14134 {
14135         struct mlx5_priv *priv = dev->data->dev_private;
14136         struct mlx5_flow_tbl_data_entry *tbl_data;
14137
14138         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
14139                                   rix_jump);
14140         if (!tbl_data)
14141                 return 0;
14142         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14143 }
14144
14145 void
14146 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14147 {
14148         struct mlx5_flow_dv_modify_hdr_resource *res =
14149                 container_of(entry, typeof(*res), entry);
14150         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14151
14152         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14153         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14154 }
14155
14156 /**
14157  * Release a modify-header resource.
14158  *
14159  * @param dev
14160  *   Pointer to Ethernet device.
14161  * @param handle
14162  *   Pointer to mlx5_flow_handle.
14163  *
14164  * @return
14165  *   1 while a reference on it exists, 0 when freed.
14166  */
14167 static int
14168 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14169                                     struct mlx5_flow_handle *handle)
14170 {
14171         struct mlx5_priv *priv = dev->data->dev_private;
14172         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14173
14174         MLX5_ASSERT(entry->action);
14175         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14176 }
14177
14178 void
14179 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14180 {
14181         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14182         struct mlx5_flow_dv_port_id_action_resource *resource =
14183                                   container_of(entry, typeof(*resource), entry);
14184
14185         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14186         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14187 }
14188
14189 /**
14190  * Release port ID action resource.
14191  *
14192  * @param dev
14193  *   Pointer to Ethernet device.
14194  * @param handle
14195  *   Pointer to mlx5_flow_handle.
14196  *
14197  * @return
14198  *   1 while a reference on it exists, 0 when freed.
14199  */
14200 static int
14201 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14202                                         uint32_t port_id)
14203 {
14204         struct mlx5_priv *priv = dev->data->dev_private;
14205         struct mlx5_flow_dv_port_id_action_resource *resource;
14206
14207         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14208         if (!resource)
14209                 return 0;
14210         MLX5_ASSERT(resource->action);
14211         return mlx5_list_unregister(priv->sh->port_id_action_list,
14212                                     &resource->entry);
14213 }
14214
14215 /**
14216  * Release shared RSS action resource.
14217  *
14218  * @param dev
14219  *   Pointer to Ethernet device.
14220  * @param srss
14221  *   Shared RSS action index.
14222  */
14223 static void
14224 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14225 {
14226         struct mlx5_priv *priv = dev->data->dev_private;
14227         struct mlx5_shared_action_rss *shared_rss;
14228
14229         shared_rss = mlx5_ipool_get
14230                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14231         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14232 }
14233
14234 void
14235 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14236 {
14237         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14238         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14239                         container_of(entry, typeof(*resource), entry);
14240
14241         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14242         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14243 }
14244
14245 /**
14246  * Release push vlan action resource.
14247  *
14248  * @param dev
14249  *   Pointer to Ethernet device.
14250  * @param handle
14251  *   Pointer to mlx5_flow_handle.
14252  *
14253  * @return
14254  *   1 while a reference on it exists, 0 when freed.
14255  */
14256 static int
14257 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14258                                           struct mlx5_flow_handle *handle)
14259 {
14260         struct mlx5_priv *priv = dev->data->dev_private;
14261         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14262         uint32_t idx = handle->dvh.rix_push_vlan;
14263
14264         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14265         if (!resource)
14266                 return 0;
14267         MLX5_ASSERT(resource->action);
14268         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14269                                     &resource->entry);
14270 }
14271
14272 /**
14273  * Release the fate resource.
14274  *
14275  * @param dev
14276  *   Pointer to Ethernet device.
14277  * @param handle
14278  *   Pointer to mlx5_flow_handle.
14279  */
14280 static void
14281 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14282                                struct mlx5_flow_handle *handle)
14283 {
14284         if (!handle->rix_fate)
14285                 return;
14286         switch (handle->fate_action) {
14287         case MLX5_FLOW_FATE_QUEUE:
14288                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14289                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14290                 break;
14291         case MLX5_FLOW_FATE_JUMP:
14292                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14293                 break;
14294         case MLX5_FLOW_FATE_PORT_ID:
14295                 flow_dv_port_id_action_resource_release(dev,
14296                                 handle->rix_port_id_action);
14297                 break;
14298         default:
14299                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14300                 break;
14301         }
14302         handle->rix_fate = 0;
14303 }
14304
14305 void
14306 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14307                          struct mlx5_list_entry *entry)
14308 {
14309         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14310                                                               typeof(*resource),
14311                                                               entry);
14312         struct rte_eth_dev *dev = resource->dev;
14313         struct mlx5_priv *priv = dev->data->dev_private;
14314
14315         if (resource->verbs_action)
14316                 claim_zero(mlx5_flow_os_destroy_flow_action
14317                                                       (resource->verbs_action));
14318         if (resource->normal_path_tbl)
14319                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14320                                              resource->normal_path_tbl);
14321         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14322         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14323         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14324 }
14325
14326 /**
14327  * Release an sample resource.
14328  *
14329  * @param dev
14330  *   Pointer to Ethernet device.
14331  * @param handle
14332  *   Pointer to mlx5_flow_handle.
14333  *
14334  * @return
14335  *   1 while a reference on it exists, 0 when freed.
14336  */
14337 static int
14338 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14339                                      struct mlx5_flow_handle *handle)
14340 {
14341         struct mlx5_priv *priv = dev->data->dev_private;
14342         struct mlx5_flow_dv_sample_resource *resource;
14343
14344         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14345                                   handle->dvh.rix_sample);
14346         if (!resource)
14347                 return 0;
14348         MLX5_ASSERT(resource->verbs_action);
14349         return mlx5_list_unregister(priv->sh->sample_action_list,
14350                                     &resource->entry);
14351 }
14352
14353 void
14354 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14355                              struct mlx5_list_entry *entry)
14356 {
14357         struct mlx5_flow_dv_dest_array_resource *resource =
14358                         container_of(entry, typeof(*resource), entry);
14359         struct rte_eth_dev *dev = resource->dev;
14360         struct mlx5_priv *priv = dev->data->dev_private;
14361         uint32_t i = 0;
14362
14363         MLX5_ASSERT(resource->action);
14364         if (resource->action)
14365                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14366         for (; i < resource->num_of_dest; i++)
14367                 flow_dv_sample_sub_actions_release(dev,
14368                                                    &resource->sample_idx[i]);
14369         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14370         DRV_LOG(DEBUG, "destination array resource %p: removed",
14371                 (void *)resource);
14372 }
14373
14374 /**
14375  * Release an destination array resource.
14376  *
14377  * @param dev
14378  *   Pointer to Ethernet device.
14379  * @param handle
14380  *   Pointer to mlx5_flow_handle.
14381  *
14382  * @return
14383  *   1 while a reference on it exists, 0 when freed.
14384  */
14385 static int
14386 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14387                                     struct mlx5_flow_handle *handle)
14388 {
14389         struct mlx5_priv *priv = dev->data->dev_private;
14390         struct mlx5_flow_dv_dest_array_resource *resource;
14391
14392         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14393                                   handle->dvh.rix_dest_array);
14394         if (!resource)
14395                 return 0;
14396         MLX5_ASSERT(resource->action);
14397         return mlx5_list_unregister(priv->sh->dest_array_list,
14398                                     &resource->entry);
14399 }
14400
14401 static void
14402 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14403 {
14404         struct mlx5_priv *priv = dev->data->dev_private;
14405         struct mlx5_dev_ctx_shared *sh = priv->sh;
14406         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14407                                 sh->geneve_tlv_option_resource;
14408         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14409         if (geneve_opt_resource) {
14410                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14411                                          __ATOMIC_RELAXED))) {
14412                         claim_zero(mlx5_devx_cmd_destroy
14413                                         (geneve_opt_resource->obj));
14414                         mlx5_free(sh->geneve_tlv_option_resource);
14415                         sh->geneve_tlv_option_resource = NULL;
14416                 }
14417         }
14418         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14419 }
14420
14421 /**
14422  * Remove the flow from the NIC but keeps it in memory.
14423  * Lock free, (mutex should be acquired by caller).
14424  *
14425  * @param[in] dev
14426  *   Pointer to Ethernet device.
14427  * @param[in, out] flow
14428  *   Pointer to flow structure.
14429  */
14430 static void
14431 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14432 {
14433         struct mlx5_flow_handle *dh;
14434         uint32_t handle_idx;
14435         struct mlx5_priv *priv = dev->data->dev_private;
14436
14437         if (!flow)
14438                 return;
14439         handle_idx = flow->dev_handles;
14440         while (handle_idx) {
14441                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14442                                     handle_idx);
14443                 if (!dh)
14444                         return;
14445                 if (dh->drv_flow) {
14446                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14447                         dh->drv_flow = NULL;
14448                 }
14449                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14450                         flow_dv_fate_resource_release(dev, dh);
14451                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14452                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14453                 handle_idx = dh->next.next;
14454         }
14455 }
14456
14457 /**
14458  * Remove the flow from the NIC and the memory.
14459  * Lock free, (mutex should be acquired by caller).
14460  *
14461  * @param[in] dev
14462  *   Pointer to the Ethernet device structure.
14463  * @param[in, out] flow
14464  *   Pointer to flow structure.
14465  */
14466 static void
14467 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14468 {
14469         struct mlx5_flow_handle *dev_handle;
14470         struct mlx5_priv *priv = dev->data->dev_private;
14471         struct mlx5_flow_meter_info *fm = NULL;
14472         uint32_t srss = 0;
14473
14474         if (!flow)
14475                 return;
14476         flow_dv_remove(dev, flow);
14477         if (flow->counter) {
14478                 flow_dv_counter_free(dev, flow->counter);
14479                 flow->counter = 0;
14480         }
14481         if (flow->meter) {
14482                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14483                 if (fm)
14484                         mlx5_flow_meter_detach(priv, fm);
14485                 flow->meter = 0;
14486         }
14487         /* Keep the current age handling by default. */
14488         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14489                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14490         else if (flow->age)
14491                 flow_dv_aso_age_release(dev, flow->age);
14492         if (flow->geneve_tlv_option) {
14493                 flow_dv_geneve_tlv_option_resource_release(dev);
14494                 flow->geneve_tlv_option = 0;
14495         }
14496         while (flow->dev_handles) {
14497                 uint32_t tmp_idx = flow->dev_handles;
14498
14499                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14500                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14501                 if (!dev_handle)
14502                         return;
14503                 flow->dev_handles = dev_handle->next.next;
14504                 while (dev_handle->flex_item) {
14505                         int index = rte_bsf32(dev_handle->flex_item);
14506
14507                         mlx5_flex_release_index(dev, index);
14508                         dev_handle->flex_item &= ~RTE_BIT32(index);
14509                 }
14510                 if (dev_handle->dvh.matcher)
14511                         flow_dv_matcher_release(dev, dev_handle);
14512                 if (dev_handle->dvh.rix_sample)
14513                         flow_dv_sample_resource_release(dev, dev_handle);
14514                 if (dev_handle->dvh.rix_dest_array)
14515                         flow_dv_dest_array_resource_release(dev, dev_handle);
14516                 if (dev_handle->dvh.rix_encap_decap)
14517                         flow_dv_encap_decap_resource_release(dev,
14518                                 dev_handle->dvh.rix_encap_decap);
14519                 if (dev_handle->dvh.modify_hdr)
14520                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14521                 if (dev_handle->dvh.rix_push_vlan)
14522                         flow_dv_push_vlan_action_resource_release(dev,
14523                                                                   dev_handle);
14524                 if (dev_handle->dvh.rix_tag)
14525                         flow_dv_tag_release(dev,
14526                                             dev_handle->dvh.rix_tag);
14527                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14528                         flow_dv_fate_resource_release(dev, dev_handle);
14529                 else if (!srss)
14530                         srss = dev_handle->rix_srss;
14531                 if (fm && dev_handle->is_meter_flow_id &&
14532                     dev_handle->split_flow_id)
14533                         mlx5_ipool_free(fm->flow_ipool,
14534                                         dev_handle->split_flow_id);
14535                 else if (dev_handle->split_flow_id &&
14536                     !dev_handle->is_meter_flow_id)
14537                         mlx5_ipool_free(priv->sh->ipool
14538                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14539                                         dev_handle->split_flow_id);
14540                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14541                            tmp_idx);
14542         }
14543         if (srss)
14544                 flow_dv_shared_rss_action_release(dev, srss);
14545 }
14546
14547 /**
14548  * Release array of hash RX queue objects.
14549  * Helper function.
14550  *
14551  * @param[in] dev
14552  *   Pointer to the Ethernet device structure.
14553  * @param[in, out] hrxqs
14554  *   Array of hash RX queue objects.
14555  *
14556  * @return
14557  *   Total number of references to hash RX queue objects in *hrxqs* array
14558  *   after this operation.
14559  */
14560 static int
14561 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14562                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14563 {
14564         size_t i;
14565         int remaining = 0;
14566
14567         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14568                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14569
14570                 if (!ret)
14571                         (*hrxqs)[i] = 0;
14572                 remaining += ret;
14573         }
14574         return remaining;
14575 }
14576
14577 /**
14578  * Release all hash RX queue objects representing shared RSS action.
14579  *
14580  * @param[in] dev
14581  *   Pointer to the Ethernet device structure.
14582  * @param[in, out] action
14583  *   Shared RSS action to remove hash RX queue objects from.
14584  *
14585  * @return
14586  *   Total number of references to hash RX queue objects stored in *action*
14587  *   after this operation.
14588  *   Expected to be 0 if no external references held.
14589  */
14590 static int
14591 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14592                                  struct mlx5_shared_action_rss *shared_rss)
14593 {
14594         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14595 }
14596
14597 /**
14598  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14599  * user input.
14600  *
14601  * Only one hash value is available for one L3+L4 combination:
14602  * for example:
14603  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14604  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14605  * same slot in mlx5_rss_hash_fields.
14606  *
14607  * @param[in] rss
14608  *   Pointer to the shared action RSS conf.
14609  * @param[in, out] hash_field
14610  *   hash_field variable needed to be adjusted.
14611  *
14612  * @return
14613  *   void
14614  */
14615 static void
14616 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14617                                      uint64_t *hash_field)
14618 {
14619         uint64_t rss_types = rss->origin.types;
14620
14621         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14622         case MLX5_RSS_HASH_IPV4:
14623                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14624                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14625                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14626                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14627                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14628                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14629                         else
14630                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14631                 }
14632                 return;
14633         case MLX5_RSS_HASH_IPV6:
14634                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14635                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14636                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14637                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14638                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14639                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14640                         else
14641                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14642                 }
14643                 return;
14644         case MLX5_RSS_HASH_IPV4_UDP:
14645                 /* fall-through. */
14646         case MLX5_RSS_HASH_IPV6_UDP:
14647                 if (rss_types & RTE_ETH_RSS_UDP) {
14648                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14649                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14650                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14651                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14652                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14653                         else
14654                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14655                 }
14656                 return;
14657         case MLX5_RSS_HASH_IPV4_TCP:
14658                 /* fall-through. */
14659         case MLX5_RSS_HASH_IPV6_TCP:
14660                 if (rss_types & RTE_ETH_RSS_TCP) {
14661                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14662                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14663                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14664                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14665                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14666                         else
14667                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14668                 }
14669                 return;
14670         default:
14671                 return;
14672         }
14673 }
14674
14675 /**
14676  * Setup shared RSS action.
14677  * Prepare set of hash RX queue objects sufficient to handle all valid
14678  * hash_fields combinations (see enum ibv_rx_hash_fields).
14679  *
14680  * @param[in] dev
14681  *   Pointer to the Ethernet device structure.
14682  * @param[in] action_idx
14683  *   Shared RSS action ipool index.
14684  * @param[in, out] action
14685  *   Partially initialized shared RSS action.
14686  * @param[out] error
14687  *   Perform verbose error reporting if not NULL. Initialized in case of
14688  *   error only.
14689  *
14690  * @return
14691  *   0 on success, otherwise negative errno value.
14692  */
14693 static int
14694 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14695                            uint32_t action_idx,
14696                            struct mlx5_shared_action_rss *shared_rss,
14697                            struct rte_flow_error *error)
14698 {
14699         struct mlx5_flow_rss_desc rss_desc = { 0 };
14700         size_t i;
14701         int err;
14702
14703         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl,
14704                                      !!dev->data->dev_started)) {
14705                 return rte_flow_error_set(error, rte_errno,
14706                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14707                                           "cannot setup indirection table");
14708         }
14709         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14710         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14711         rss_desc.const_q = shared_rss->origin.queue;
14712         rss_desc.queue_num = shared_rss->origin.queue_num;
14713         /* Set non-zero value to indicate a shared RSS. */
14714         rss_desc.shared_rss = action_idx;
14715         rss_desc.ind_tbl = shared_rss->ind_tbl;
14716         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14717                 uint32_t hrxq_idx;
14718                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14719                 int tunnel = 0;
14720
14721                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14722                 if (shared_rss->origin.level > 1) {
14723                         hash_fields |= IBV_RX_HASH_INNER;
14724                         tunnel = 1;
14725                 }
14726                 rss_desc.tunnel = tunnel;
14727                 rss_desc.hash_fields = hash_fields;
14728                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14729                 if (!hrxq_idx) {
14730                         rte_flow_error_set
14731                                 (error, rte_errno,
14732                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14733                                  "cannot get hash queue");
14734                         goto error_hrxq_new;
14735                 }
14736                 err = __flow_dv_action_rss_hrxq_set
14737                         (shared_rss, hash_fields, hrxq_idx);
14738                 MLX5_ASSERT(!err);
14739         }
14740         return 0;
14741 error_hrxq_new:
14742         err = rte_errno;
14743         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14744         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true, true))
14745                 shared_rss->ind_tbl = NULL;
14746         rte_errno = err;
14747         return -rte_errno;
14748 }
14749
14750 /**
14751  * Create shared RSS action.
14752  *
14753  * @param[in] dev
14754  *   Pointer to the Ethernet device structure.
14755  * @param[in] conf
14756  *   Shared action configuration.
14757  * @param[in] rss
14758  *   RSS action specification used to create shared action.
14759  * @param[out] error
14760  *   Perform verbose error reporting if not NULL. Initialized in case of
14761  *   error only.
14762  *
14763  * @return
14764  *   A valid shared action ID in case of success, 0 otherwise and
14765  *   rte_errno is set.
14766  */
14767 static uint32_t
14768 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14769                             const struct rte_flow_indir_action_conf *conf,
14770                             const struct rte_flow_action_rss *rss,
14771                             struct rte_flow_error *error)
14772 {
14773         struct mlx5_priv *priv = dev->data->dev_private;
14774         struct mlx5_shared_action_rss *shared_rss = NULL;
14775         void *queue = NULL;
14776         struct rte_flow_action_rss *origin;
14777         const uint8_t *rss_key;
14778         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14779         uint32_t idx;
14780
14781         RTE_SET_USED(conf);
14782         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14783                             0, SOCKET_ID_ANY);
14784         shared_rss = mlx5_ipool_zmalloc
14785                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14786         if (!shared_rss || !queue) {
14787                 rte_flow_error_set(error, ENOMEM,
14788                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14789                                    "cannot allocate resource memory");
14790                 goto error_rss_init;
14791         }
14792         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14793                 rte_flow_error_set(error, E2BIG,
14794                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14795                                    "rss action number out of range");
14796                 goto error_rss_init;
14797         }
14798         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14799                                           sizeof(*shared_rss->ind_tbl),
14800                                           0, SOCKET_ID_ANY);
14801         if (!shared_rss->ind_tbl) {
14802                 rte_flow_error_set(error, ENOMEM,
14803                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14804                                    "cannot allocate resource memory");
14805                 goto error_rss_init;
14806         }
14807         memcpy(queue, rss->queue, queue_size);
14808         shared_rss->ind_tbl->queues = queue;
14809         shared_rss->ind_tbl->queues_n = rss->queue_num;
14810         origin = &shared_rss->origin;
14811         origin->func = rss->func;
14812         origin->level = rss->level;
14813         /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14814         origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14815         /* NULL RSS key indicates default RSS key. */
14816         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14817         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14818         origin->key = &shared_rss->key[0];
14819         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14820         origin->queue = queue;
14821         origin->queue_num = rss->queue_num;
14822         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14823                 goto error_rss_init;
14824         rte_spinlock_init(&shared_rss->action_rss_sl);
14825         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14826         rte_spinlock_lock(&priv->shared_act_sl);
14827         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14828                      &priv->rss_shared_actions, idx, shared_rss, next);
14829         rte_spinlock_unlock(&priv->shared_act_sl);
14830         return idx;
14831 error_rss_init:
14832         if (shared_rss) {
14833                 if (shared_rss->ind_tbl)
14834                         mlx5_free(shared_rss->ind_tbl);
14835                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14836                                 idx);
14837         }
14838         if (queue)
14839                 mlx5_free(queue);
14840         return 0;
14841 }
14842
14843 /**
14844  * Destroy the shared RSS action.
14845  * Release related hash RX queue objects.
14846  *
14847  * @param[in] dev
14848  *   Pointer to the Ethernet device structure.
14849  * @param[in] idx
14850  *   The shared RSS action object ID to be removed.
14851  * @param[out] error
14852  *   Perform verbose error reporting if not NULL. Initialized in case of
14853  *   error only.
14854  *
14855  * @return
14856  *   0 on success, otherwise negative errno value.
14857  */
14858 static int
14859 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14860                              struct rte_flow_error *error)
14861 {
14862         struct mlx5_priv *priv = dev->data->dev_private;
14863         struct mlx5_shared_action_rss *shared_rss =
14864             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14865         uint32_t old_refcnt = 1;
14866         int remaining;
14867         uint16_t *queue = NULL;
14868
14869         if (!shared_rss)
14870                 return rte_flow_error_set(error, EINVAL,
14871                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14872                                           "invalid shared action");
14873         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14874                                          0, 0, __ATOMIC_ACQUIRE,
14875                                          __ATOMIC_RELAXED))
14876                 return rte_flow_error_set(error, EBUSY,
14877                                           RTE_FLOW_ERROR_TYPE_ACTION,
14878                                           NULL,
14879                                           "shared rss has references");
14880         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14881         if (remaining)
14882                 return rte_flow_error_set(error, EBUSY,
14883                                           RTE_FLOW_ERROR_TYPE_ACTION,
14884                                           NULL,
14885                                           "shared rss hrxq has references");
14886         queue = shared_rss->ind_tbl->queues;
14887         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true,
14888                                                !!dev->data->dev_started);
14889         if (remaining)
14890                 return rte_flow_error_set(error, EBUSY,
14891                                           RTE_FLOW_ERROR_TYPE_ACTION,
14892                                           NULL,
14893                                           "shared rss indirection table has"
14894                                           " references");
14895         mlx5_free(queue);
14896         rte_spinlock_lock(&priv->shared_act_sl);
14897         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14898                      &priv->rss_shared_actions, idx, shared_rss, next);
14899         rte_spinlock_unlock(&priv->shared_act_sl);
14900         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14901                         idx);
14902         return 0;
14903 }
14904
14905 /**
14906  * Create indirect action, lock free,
14907  * (mutex should be acquired by caller).
14908  * Dispatcher for action type specific call.
14909  *
14910  * @param[in] dev
14911  *   Pointer to the Ethernet device structure.
14912  * @param[in] conf
14913  *   Shared action configuration.
14914  * @param[in] action
14915  *   Action specification used to create indirect action.
14916  * @param[out] error
14917  *   Perform verbose error reporting if not NULL. Initialized in case of
14918  *   error only.
14919  *
14920  * @return
14921  *   A valid shared action handle in case of success, NULL otherwise and
14922  *   rte_errno is set.
14923  */
14924 static struct rte_flow_action_handle *
14925 flow_dv_action_create(struct rte_eth_dev *dev,
14926                       const struct rte_flow_indir_action_conf *conf,
14927                       const struct rte_flow_action *action,
14928                       struct rte_flow_error *err)
14929 {
14930         struct mlx5_priv *priv = dev->data->dev_private;
14931         uint32_t age_idx = 0;
14932         uint32_t idx = 0;
14933         uint32_t ret = 0;
14934
14935         switch (action->type) {
14936         case RTE_FLOW_ACTION_TYPE_RSS:
14937                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14938                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14939                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14940                 break;
14941         case RTE_FLOW_ACTION_TYPE_AGE:
14942                 age_idx = flow_dv_aso_age_alloc(dev, err);
14943                 if (!age_idx) {
14944                         ret = -rte_errno;
14945                         break;
14946                 }
14947                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14948                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14949                 flow_dv_aso_age_params_init(dev, age_idx,
14950                                         ((const struct rte_flow_action_age *)
14951                                                 action->conf)->context ?
14952                                         ((const struct rte_flow_action_age *)
14953                                                 action->conf)->context :
14954                                         (void *)(uintptr_t)idx,
14955                                         ((const struct rte_flow_action_age *)
14956                                                 action->conf)->timeout);
14957                 ret = age_idx;
14958                 break;
14959         case RTE_FLOW_ACTION_TYPE_COUNT:
14960                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14961                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14962                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14963                 break;
14964         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14965                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14966                                                          err);
14967                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14968                 break;
14969         default:
14970                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14971                                    NULL, "action type not supported");
14972                 break;
14973         }
14974         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14975 }
14976
14977 /**
14978  * Destroy the indirect action.
14979  * Release action related resources on the NIC and the memory.
14980  * Lock free, (mutex should be acquired by caller).
14981  * Dispatcher for action type specific call.
14982  *
14983  * @param[in] dev
14984  *   Pointer to the Ethernet device structure.
14985  * @param[in] handle
14986  *   The indirect action object handle to be removed.
14987  * @param[out] error
14988  *   Perform verbose error reporting if not NULL. Initialized in case of
14989  *   error only.
14990  *
14991  * @return
14992  *   0 on success, otherwise negative errno value.
14993  */
14994 static int
14995 flow_dv_action_destroy(struct rte_eth_dev *dev,
14996                        struct rte_flow_action_handle *handle,
14997                        struct rte_flow_error *error)
14998 {
14999         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15000         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15001         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15002         struct mlx5_flow_counter *cnt;
15003         uint32_t no_flow_refcnt = 1;
15004         int ret;
15005
15006         switch (type) {
15007         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15008                 return __flow_dv_action_rss_release(dev, idx, error);
15009         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15010                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
15011                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
15012                                                  &no_flow_refcnt, 1, false,
15013                                                  __ATOMIC_ACQUIRE,
15014                                                  __ATOMIC_RELAXED))
15015                         return rte_flow_error_set(error, EBUSY,
15016                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15017                                                   NULL,
15018                                                   "Indirect count action has references");
15019                 flow_dv_counter_free(dev, idx);
15020                 return 0;
15021         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15022                 ret = flow_dv_aso_age_release(dev, idx);
15023                 if (ret)
15024                         /*
15025                          * In this case, the last flow has a reference will
15026                          * actually release the age action.
15027                          */
15028                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
15029                                 " released with references %d.", idx, ret);
15030                 return 0;
15031         case MLX5_INDIRECT_ACTION_TYPE_CT:
15032                 ret = flow_dv_aso_ct_release(dev, idx, error);
15033                 if (ret < 0)
15034                         return ret;
15035                 if (ret > 0)
15036                         DRV_LOG(DEBUG, "Connection tracking object %u still "
15037                                 "has references %d.", idx, ret);
15038                 return 0;
15039         default:
15040                 return rte_flow_error_set(error, ENOTSUP,
15041                                           RTE_FLOW_ERROR_TYPE_ACTION,
15042                                           NULL,
15043                                           "action type not supported");
15044         }
15045 }
15046
15047 /**
15048  * Updates in place shared RSS action configuration.
15049  *
15050  * @param[in] dev
15051  *   Pointer to the Ethernet device structure.
15052  * @param[in] idx
15053  *   The shared RSS action object ID to be updated.
15054  * @param[in] action_conf
15055  *   RSS action specification used to modify *shared_rss*.
15056  * @param[out] error
15057  *   Perform verbose error reporting if not NULL. Initialized in case of
15058  *   error only.
15059  *
15060  * @return
15061  *   0 on success, otherwise negative errno value.
15062  * @note: currently only support update of RSS queues.
15063  */
15064 static int
15065 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
15066                             const struct rte_flow_action_rss *action_conf,
15067                             struct rte_flow_error *error)
15068 {
15069         struct mlx5_priv *priv = dev->data->dev_private;
15070         struct mlx5_shared_action_rss *shared_rss =
15071             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15072         int ret = 0;
15073         void *queue = NULL;
15074         uint16_t *queue_old = NULL;
15075         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
15076         bool dev_started = !!dev->data->dev_started;
15077
15078         if (!shared_rss)
15079                 return rte_flow_error_set(error, EINVAL,
15080                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15081                                           "invalid shared action to update");
15082         if (priv->obj_ops.ind_table_modify == NULL)
15083                 return rte_flow_error_set(error, ENOTSUP,
15084                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15085                                           "cannot modify indirection table");
15086         queue = mlx5_malloc(MLX5_MEM_ZERO,
15087                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
15088                             0, SOCKET_ID_ANY);
15089         if (!queue)
15090                 return rte_flow_error_set(error, ENOMEM,
15091                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15092                                           NULL,
15093                                           "cannot allocate resource memory");
15094         memcpy(queue, action_conf->queue, queue_size);
15095         MLX5_ASSERT(shared_rss->ind_tbl);
15096         rte_spinlock_lock(&shared_rss->action_rss_sl);
15097         queue_old = shared_rss->ind_tbl->queues;
15098         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
15099                                         queue, action_conf->queue_num,
15100                                         true /* standalone */,
15101                                         dev_started /* ref_new_qs */,
15102                                         dev_started /* deref_old_qs */);
15103         if (ret) {
15104                 mlx5_free(queue);
15105                 ret = rte_flow_error_set(error, rte_errno,
15106                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15107                                           "cannot update indirection table");
15108         } else {
15109                 mlx5_free(queue_old);
15110                 shared_rss->origin.queue = queue;
15111                 shared_rss->origin.queue_num = action_conf->queue_num;
15112         }
15113         rte_spinlock_unlock(&shared_rss->action_rss_sl);
15114         return ret;
15115 }
15116
15117 /*
15118  * Updates in place conntrack context or direction.
15119  * Context update should be synchronized.
15120  *
15121  * @param[in] dev
15122  *   Pointer to the Ethernet device structure.
15123  * @param[in] idx
15124  *   The conntrack object ID to be updated.
15125  * @param[in] update
15126  *   Pointer to the structure of information to update.
15127  * @param[out] error
15128  *   Perform verbose error reporting if not NULL. Initialized in case of
15129  *   error only.
15130  *
15131  * @return
15132  *   0 on success, otherwise negative errno value.
15133  */
15134 static int
15135 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
15136                            const struct rte_flow_modify_conntrack *update,
15137                            struct rte_flow_error *error)
15138 {
15139         struct mlx5_priv *priv = dev->data->dev_private;
15140         struct mlx5_aso_ct_action *ct;
15141         const struct rte_flow_action_conntrack *new_prf;
15142         int ret = 0;
15143         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15144         uint32_t dev_idx;
15145
15146         if (PORT_ID(priv) != owner)
15147                 return rte_flow_error_set(error, EACCES,
15148                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15149                                           NULL,
15150                                           "CT object owned by another port");
15151         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15152         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15153         if (!ct->refcnt)
15154                 return rte_flow_error_set(error, ENOMEM,
15155                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15156                                           NULL,
15157                                           "CT object is inactive");
15158         new_prf = &update->new_ct;
15159         if (update->direction)
15160                 ct->is_original = !!new_prf->is_original_dir;
15161         if (update->state) {
15162                 /* Only validate the profile when it needs to be updated. */
15163                 ret = mlx5_validate_action_ct(dev, new_prf, error);
15164                 if (ret)
15165                         return ret;
15166                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15167                 if (ret)
15168                         return rte_flow_error_set(error, EIO,
15169                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15170                                         NULL,
15171                                         "Failed to send CT context update WQE");
15172                 /* Block until ready or a failure. */
15173                 ret = mlx5_aso_ct_available(priv->sh, ct);
15174                 if (ret)
15175                         rte_flow_error_set(error, rte_errno,
15176                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15177                                            NULL,
15178                                            "Timeout to get the CT update");
15179         }
15180         return ret;
15181 }
15182
15183 /**
15184  * Updates in place shared action configuration, lock free,
15185  * (mutex should be acquired by caller).
15186  *
15187  * @param[in] dev
15188  *   Pointer to the Ethernet device structure.
15189  * @param[in] handle
15190  *   The indirect action object handle to be updated.
15191  * @param[in] update
15192  *   Action specification used to modify the action pointed by *handle*.
15193  *   *update* could be of same type with the action pointed by the *handle*
15194  *   handle argument, or some other structures like a wrapper, depending on
15195  *   the indirect action type.
15196  * @param[out] error
15197  *   Perform verbose error reporting if not NULL. Initialized in case of
15198  *   error only.
15199  *
15200  * @return
15201  *   0 on success, otherwise negative errno value.
15202  */
15203 static int
15204 flow_dv_action_update(struct rte_eth_dev *dev,
15205                         struct rte_flow_action_handle *handle,
15206                         const void *update,
15207                         struct rte_flow_error *err)
15208 {
15209         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15210         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15211         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15212         const void *action_conf;
15213
15214         switch (type) {
15215         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15216                 action_conf = ((const struct rte_flow_action *)update)->conf;
15217                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15218         case MLX5_INDIRECT_ACTION_TYPE_CT:
15219                 return __flow_dv_action_ct_update(dev, idx, update, err);
15220         default:
15221                 return rte_flow_error_set(err, ENOTSUP,
15222                                           RTE_FLOW_ERROR_TYPE_ACTION,
15223                                           NULL,
15224                                           "action type update not supported");
15225         }
15226 }
15227
15228 /**
15229  * Destroy the meter sub policy table rules.
15230  * Lock free, (mutex should be acquired by caller).
15231  *
15232  * @param[in] dev
15233  *   Pointer to Ethernet device.
15234  * @param[in] sub_policy
15235  *   Pointer to meter sub policy table.
15236  */
15237 static void
15238 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15239                              struct mlx5_flow_meter_sub_policy *sub_policy)
15240 {
15241         struct mlx5_priv *priv = dev->data->dev_private;
15242         struct mlx5_flow_tbl_data_entry *tbl;
15243         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15244         struct mlx5_flow_meter_info *next_fm;
15245         struct mlx5_sub_policy_color_rule *color_rule;
15246         void *tmp;
15247         uint32_t i;
15248
15249         for (i = 0; i < RTE_COLORS; i++) {
15250                 next_fm = NULL;
15251                 if (i == RTE_COLOR_GREEN && policy &&
15252                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15253                         next_fm = mlx5_flow_meter_find(priv,
15254                                         policy->act_cnt[i].next_mtr_id, NULL);
15255                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15256                                    next_port, tmp) {
15257                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15258                         tbl = container_of(color_rule->matcher->tbl,
15259                                            typeof(*tbl), tbl);
15260                         mlx5_list_unregister(tbl->matchers,
15261                                              &color_rule->matcher->entry);
15262                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15263                                      color_rule, next_port);
15264                         mlx5_free(color_rule);
15265                         if (next_fm)
15266                                 mlx5_flow_meter_detach(priv, next_fm);
15267                 }
15268         }
15269         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15270                 if (sub_policy->rix_hrxq[i]) {
15271                         if (policy && !policy->is_hierarchy)
15272                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15273                         sub_policy->rix_hrxq[i] = 0;
15274                 }
15275                 if (sub_policy->jump_tbl[i]) {
15276                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15277                                                      sub_policy->jump_tbl[i]);
15278                         sub_policy->jump_tbl[i] = NULL;
15279                 }
15280         }
15281         if (sub_policy->tbl_rsc) {
15282                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15283                                              sub_policy->tbl_rsc);
15284                 sub_policy->tbl_rsc = NULL;
15285         }
15286 }
15287
15288 /**
15289  * Destroy policy rules, lock free,
15290  * (mutex should be acquired by caller).
15291  * Dispatcher for action type specific call.
15292  *
15293  * @param[in] dev
15294  *   Pointer to the Ethernet device structure.
15295  * @param[in] mtr_policy
15296  *   Meter policy struct.
15297  */
15298 static void
15299 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15300                              struct mlx5_flow_meter_policy *mtr_policy)
15301 {
15302         uint32_t i, j;
15303         struct mlx5_flow_meter_sub_policy *sub_policy;
15304         uint16_t sub_policy_num;
15305
15306         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15307                 sub_policy_num = (mtr_policy->sub_policy_num >>
15308                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15309                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15310                 for (j = 0; j < sub_policy_num; j++) {
15311                         sub_policy = mtr_policy->sub_policys[i][j];
15312                         if (sub_policy)
15313                                 __flow_dv_destroy_sub_policy_rules(dev,
15314                                                                    sub_policy);
15315                 }
15316         }
15317 }
15318
15319 /**
15320  * Destroy policy action, lock free,
15321  * (mutex should be acquired by caller).
15322  * Dispatcher for action type specific call.
15323  *
15324  * @param[in] dev
15325  *   Pointer to the Ethernet device structure.
15326  * @param[in] mtr_policy
15327  *   Meter policy struct.
15328  */
15329 static void
15330 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15331                       struct mlx5_flow_meter_policy *mtr_policy)
15332 {
15333         struct rte_flow_action *rss_action;
15334         struct mlx5_flow_handle dev_handle;
15335         uint32_t i, j;
15336
15337         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15338                 if (mtr_policy->act_cnt[i].rix_mark) {
15339                         flow_dv_tag_release(dev,
15340                                 mtr_policy->act_cnt[i].rix_mark);
15341                         mtr_policy->act_cnt[i].rix_mark = 0;
15342                 }
15343                 if (mtr_policy->act_cnt[i].modify_hdr) {
15344                         dev_handle.dvh.modify_hdr =
15345                                 mtr_policy->act_cnt[i].modify_hdr;
15346                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15347                 }
15348                 switch (mtr_policy->act_cnt[i].fate_action) {
15349                 case MLX5_FLOW_FATE_SHARED_RSS:
15350                         rss_action = mtr_policy->act_cnt[i].rss;
15351                         mlx5_free(rss_action);
15352                         break;
15353                 case MLX5_FLOW_FATE_PORT_ID:
15354                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15355                                 flow_dv_port_id_action_resource_release(dev,
15356                                 mtr_policy->act_cnt[i].rix_port_id_action);
15357                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15358                         }
15359                         break;
15360                 case MLX5_FLOW_FATE_DROP:
15361                 case MLX5_FLOW_FATE_JUMP:
15362                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15363                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15364                                                 NULL;
15365                         break;
15366                 default:
15367                         /*Queue action do nothing*/
15368                         break;
15369                 }
15370         }
15371         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15372                 mtr_policy->dr_drop_action[j] = NULL;
15373 }
15374
15375 /**
15376  * Create policy action per domain, lock free,
15377  * (mutex should be acquired by caller).
15378  * Dispatcher for action type specific call.
15379  *
15380  * @param[in] dev
15381  *   Pointer to the Ethernet device structure.
15382  * @param[in] mtr_policy
15383  *   Meter policy struct.
15384  * @param[in] action
15385  *   Action specification used to create meter actions.
15386  * @param[out] error
15387  *   Perform verbose error reporting if not NULL. Initialized in case of
15388  *   error only.
15389  *
15390  * @return
15391  *   0 on success, otherwise negative errno value.
15392  */
15393 static int
15394 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15395                         struct mlx5_flow_meter_policy *mtr_policy,
15396                         const struct rte_flow_action *actions[RTE_COLORS],
15397                         enum mlx5_meter_domain domain,
15398                         struct rte_mtr_error *error)
15399 {
15400         struct mlx5_priv *priv = dev->data->dev_private;
15401         struct rte_flow_error flow_err;
15402         const struct rte_flow_action *act;
15403         uint64_t action_flags;
15404         struct mlx5_flow_handle dh;
15405         struct mlx5_flow dev_flow;
15406         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15407         int i, ret;
15408         uint8_t egress, transfer;
15409         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15410         union {
15411                 struct mlx5_flow_dv_modify_hdr_resource res;
15412                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15413                             sizeof(struct mlx5_modification_cmd) *
15414                             (MLX5_MAX_MODIFY_NUM + 1)];
15415         } mhdr_dummy;
15416         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15417         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
15418
15419         MLX5_ASSERT(wks);
15420         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15421         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15422         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15423         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15424         memset(&port_id_action, 0,
15425                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15426         memset(mhdr_res, 0, sizeof(*mhdr_res));
15427         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15428                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15429                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15430         dev_flow.handle = &dh;
15431         dev_flow.dv.port_id_action = &port_id_action;
15432         dev_flow.external = true;
15433         for (i = 0; i < RTE_COLORS; i++) {
15434                 if (i < MLX5_MTR_RTE_COLORS)
15435                         act_cnt = &mtr_policy->act_cnt[i];
15436                 /* Skip the color policy actions creation. */
15437                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15438                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15439                         continue;
15440                 action_flags = 0;
15441                 for (act = actions[i];
15442                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15443                         switch (act->type) {
15444                         case RTE_FLOW_ACTION_TYPE_MARK:
15445                         {
15446                                 uint32_t tag_be = mlx5_flow_mark_set
15447                                         (((const struct rte_flow_action_mark *)
15448                                         (act->conf))->id);
15449
15450                                 if (i >= MLX5_MTR_RTE_COLORS)
15451                                         return -rte_mtr_error_set(error,
15452                                           ENOTSUP,
15453                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15454                                           NULL,
15455                                           "cannot create policy "
15456                                           "mark action for this color");
15457                                 wks->mark = 1;
15458                                 if (flow_dv_tag_resource_register(dev, tag_be,
15459                                                   &dev_flow, &flow_err))
15460                                         return -rte_mtr_error_set(error,
15461                                         ENOTSUP,
15462                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15463                                         NULL,
15464                                         "cannot setup policy mark action");
15465                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15466                                 act_cnt->rix_mark =
15467                                         dev_flow.handle->dvh.rix_tag;
15468                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15469                                 break;
15470                         }
15471                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15472                                 if (i >= MLX5_MTR_RTE_COLORS)
15473                                         return -rte_mtr_error_set(error,
15474                                           ENOTSUP,
15475                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15476                                           NULL,
15477                                           "cannot create policy "
15478                                           "set tag action for this color");
15479                                 if (flow_dv_convert_action_set_tag
15480                                 (dev, mhdr_res,
15481                                 (const struct rte_flow_action_set_tag *)
15482                                 act->conf,  &flow_err))
15483                                         return -rte_mtr_error_set(error,
15484                                         ENOTSUP,
15485                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15486                                         NULL, "cannot convert policy "
15487                                         "set tag action");
15488                                 if (!mhdr_res->actions_num)
15489                                         return -rte_mtr_error_set(error,
15490                                         ENOTSUP,
15491                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15492                                         NULL, "cannot find policy "
15493                                         "set tag action");
15494                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15495                                 break;
15496                         case RTE_FLOW_ACTION_TYPE_DROP:
15497                         {
15498                                 struct mlx5_flow_mtr_mng *mtrmng =
15499                                                 priv->sh->mtrmng;
15500                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15501
15502                                 /*
15503                                  * Create the drop table with
15504                                  * METER DROP level.
15505                                  */
15506                                 if (!mtrmng->drop_tbl[domain]) {
15507                                         mtrmng->drop_tbl[domain] =
15508                                         flow_dv_tbl_resource_get(dev,
15509                                         MLX5_FLOW_TABLE_LEVEL_METER,
15510                                         egress, transfer, false, NULL, 0,
15511                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15512                                         if (!mtrmng->drop_tbl[domain])
15513                                                 return -rte_mtr_error_set
15514                                         (error, ENOTSUP,
15515                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15516                                         NULL,
15517                                         "Failed to create meter drop table");
15518                                 }
15519                                 tbl_data = container_of
15520                                 (mtrmng->drop_tbl[domain],
15521                                 struct mlx5_flow_tbl_data_entry, tbl);
15522                                 if (i < MLX5_MTR_RTE_COLORS) {
15523                                         act_cnt->dr_jump_action[domain] =
15524                                                 tbl_data->jump.action;
15525                                         act_cnt->fate_action =
15526                                                 MLX5_FLOW_FATE_DROP;
15527                                 }
15528                                 if (i == RTE_COLOR_RED)
15529                                         mtr_policy->dr_drop_action[domain] =
15530                                                 tbl_data->jump.action;
15531                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15532                                 break;
15533                         }
15534                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15535                         {
15536                                 if (i >= MLX5_MTR_RTE_COLORS)
15537                                         return -rte_mtr_error_set(error,
15538                                         ENOTSUP,
15539                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15540                                         NULL, "cannot create policy "
15541                                         "fate queue for this color");
15542                                 act_cnt->queue =
15543                                 ((const struct rte_flow_action_queue *)
15544                                         (act->conf))->index;
15545                                 act_cnt->fate_action =
15546                                         MLX5_FLOW_FATE_QUEUE;
15547                                 dev_flow.handle->fate_action =
15548                                         MLX5_FLOW_FATE_QUEUE;
15549                                 mtr_policy->is_queue = 1;
15550                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15551                                 break;
15552                         }
15553                         case RTE_FLOW_ACTION_TYPE_RSS:
15554                         {
15555                                 int rss_size;
15556
15557                                 if (i >= MLX5_MTR_RTE_COLORS)
15558                                         return -rte_mtr_error_set(error,
15559                                           ENOTSUP,
15560                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15561                                           NULL,
15562                                           "cannot create policy "
15563                                           "rss action for this color");
15564                                 /*
15565                                  * Save RSS conf into policy struct
15566                                  * for translate stage.
15567                                  */
15568                                 rss_size = (int)rte_flow_conv
15569                                         (RTE_FLOW_CONV_OP_ACTION,
15570                                         NULL, 0, act, &flow_err);
15571                                 if (rss_size <= 0)
15572                                         return -rte_mtr_error_set(error,
15573                                           ENOTSUP,
15574                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15575                                           NULL, "Get the wrong "
15576                                           "rss action struct size");
15577                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15578                                                 rss_size, 0, SOCKET_ID_ANY);
15579                                 if (!act_cnt->rss)
15580                                         return -rte_mtr_error_set(error,
15581                                           ENOTSUP,
15582                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15583                                           NULL,
15584                                           "Fail to malloc rss action memory");
15585                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15586                                         act_cnt->rss, rss_size,
15587                                         act, &flow_err);
15588                                 if (ret < 0)
15589                                         return -rte_mtr_error_set(error,
15590                                           ENOTSUP,
15591                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15592                                           NULL, "Fail to save "
15593                                           "rss action into policy struct");
15594                                 act_cnt->fate_action =
15595                                         MLX5_FLOW_FATE_SHARED_RSS;
15596                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15597                                 break;
15598                         }
15599                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15600                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15601                         {
15602                                 struct mlx5_flow_dv_port_id_action_resource
15603                                         port_id_resource;
15604                                 uint32_t port_id = 0;
15605
15606                                 if (i >= MLX5_MTR_RTE_COLORS)
15607                                         return -rte_mtr_error_set(error,
15608                                         ENOTSUP,
15609                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15610                                         NULL, "cannot create policy "
15611                                         "port action for this color");
15612                                 memset(&port_id_resource, 0,
15613                                         sizeof(port_id_resource));
15614                                 if (flow_dv_translate_action_port_id(dev, act,
15615                                                 &port_id, &flow_err))
15616                                         return -rte_mtr_error_set(error,
15617                                         ENOTSUP,
15618                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15619                                         NULL, "cannot translate "
15620                                         "policy port action");
15621                                 port_id_resource.port_id = port_id;
15622                                 if (flow_dv_port_id_action_resource_register
15623                                         (dev, &port_id_resource,
15624                                         &dev_flow, &flow_err))
15625                                         return -rte_mtr_error_set(error,
15626                                         ENOTSUP,
15627                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15628                                         NULL, "cannot setup "
15629                                         "policy port action");
15630                                 act_cnt->rix_port_id_action =
15631                                         dev_flow.handle->rix_port_id_action;
15632                                 act_cnt->fate_action =
15633                                         MLX5_FLOW_FATE_PORT_ID;
15634                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15635                                 break;
15636                         }
15637                         case RTE_FLOW_ACTION_TYPE_JUMP:
15638                         {
15639                                 uint32_t jump_group = 0;
15640                                 uint32_t table = 0;
15641                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15642                                 struct flow_grp_info grp_info = {
15643                                         .external = !!dev_flow.external,
15644                                         .transfer = !!transfer,
15645                                         .fdb_def_rule = !!priv->fdb_def_rule,
15646                                         .std_tbl_fix = 0,
15647                                         .skip_scale = dev_flow.skip_scale &
15648                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15649                                 };
15650                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15651                                         mtr_policy->sub_policys[domain][0];
15652
15653                                 if (i >= MLX5_MTR_RTE_COLORS)
15654                                         return -rte_mtr_error_set(error,
15655                                           ENOTSUP,
15656                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15657                                           NULL,
15658                                           "cannot create policy "
15659                                           "jump action for this color");
15660                                 jump_group =
15661                                 ((const struct rte_flow_action_jump *)
15662                                                         act->conf)->group;
15663                                 if (mlx5_flow_group_to_table(dev, NULL,
15664                                                        jump_group,
15665                                                        &table,
15666                                                        &grp_info, &flow_err))
15667                                         return -rte_mtr_error_set(error,
15668                                         ENOTSUP,
15669                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15670                                         NULL, "cannot setup "
15671                                         "policy jump action");
15672                                 sub_policy->jump_tbl[i] =
15673                                 flow_dv_tbl_resource_get(dev,
15674                                         table, egress,
15675                                         transfer,
15676                                         !!dev_flow.external,
15677                                         NULL, jump_group, 0,
15678                                         0, &flow_err);
15679                                 if
15680                                 (!sub_policy->jump_tbl[i])
15681                                         return  -rte_mtr_error_set(error,
15682                                         ENOTSUP,
15683                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15684                                         NULL, "cannot create jump action.");
15685                                 tbl_data = container_of
15686                                 (sub_policy->jump_tbl[i],
15687                                 struct mlx5_flow_tbl_data_entry, tbl);
15688                                 act_cnt->dr_jump_action[domain] =
15689                                         tbl_data->jump.action;
15690                                 act_cnt->fate_action =
15691                                         MLX5_FLOW_FATE_JUMP;
15692                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15693                                 break;
15694                         }
15695                         /*
15696                          * No need to check meter hierarchy for Y or R colors
15697                          * here since it is done in the validation stage.
15698                          */
15699                         case RTE_FLOW_ACTION_TYPE_METER:
15700                         {
15701                                 const struct rte_flow_action_meter *mtr;
15702                                 struct mlx5_flow_meter_info *next_fm;
15703                                 struct mlx5_flow_meter_policy *next_policy;
15704                                 struct rte_flow_action tag_action;
15705                                 struct mlx5_rte_flow_action_set_tag set_tag;
15706                                 uint32_t next_mtr_idx = 0;
15707
15708                                 mtr = act->conf;
15709                                 next_fm = mlx5_flow_meter_find(priv,
15710                                                         mtr->mtr_id,
15711                                                         &next_mtr_idx);
15712                                 if (!next_fm)
15713                                         return -rte_mtr_error_set(error, EINVAL,
15714                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15715                                                 "Fail to find next meter.");
15716                                 if (next_fm->def_policy)
15717                                         return -rte_mtr_error_set(error, EINVAL,
15718                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15719                                 "Hierarchy only supports termination meter.");
15720                                 next_policy = mlx5_flow_meter_policy_find(dev,
15721                                                 next_fm->policy_id, NULL);
15722                                 MLX5_ASSERT(next_policy);
15723                                 if (next_fm->drop_cnt) {
15724                                         set_tag.id =
15725                                                 (enum modify_reg)
15726                                                 mlx5_flow_get_reg_id(dev,
15727                                                 MLX5_MTR_ID,
15728                                                 0,
15729                                                 (struct rte_flow_error *)error);
15730                                         set_tag.offset = (priv->mtr_reg_share ?
15731                                                 MLX5_MTR_COLOR_BITS : 0);
15732                                         set_tag.length = (priv->mtr_reg_share ?
15733                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15734                                                MLX5_REG_BITS);
15735                                         set_tag.data = next_mtr_idx;
15736                                         tag_action.type =
15737                                                 (enum rte_flow_action_type)
15738                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15739                                         tag_action.conf = &set_tag;
15740                                         if (flow_dv_convert_action_set_reg
15741                                                 (mhdr_res, &tag_action,
15742                                                 (struct rte_flow_error *)error))
15743                                                 return -rte_errno;
15744                                         action_flags |=
15745                                                 MLX5_FLOW_ACTION_SET_TAG;
15746                                 }
15747                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15748                                 act_cnt->next_mtr_id = next_fm->meter_id;
15749                                 act_cnt->next_sub_policy = NULL;
15750                                 mtr_policy->is_hierarchy = 1;
15751                                 mtr_policy->dev = next_policy->dev;
15752                                 action_flags |=
15753                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15754                                 break;
15755                         }
15756                         default:
15757                                 return -rte_mtr_error_set(error, ENOTSUP,
15758                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15759                                           NULL, "action type not supported");
15760                         }
15761                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15762                                 /* create modify action if needed. */
15763                                 dev_flow.dv.group = 1;
15764                                 if (flow_dv_modify_hdr_resource_register
15765                                         (dev, mhdr_res, &dev_flow, &flow_err))
15766                                         return -rte_mtr_error_set(error,
15767                                                 ENOTSUP,
15768                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15769                                                 NULL, "cannot register policy "
15770                                                 "set tag action");
15771                                 act_cnt->modify_hdr =
15772                                         dev_flow.handle->dvh.modify_hdr;
15773                         }
15774                 }
15775         }
15776         return 0;
15777 }
15778
15779 /**
15780  * Create policy action per domain, lock free,
15781  * (mutex should be acquired by caller).
15782  * Dispatcher for action type specific call.
15783  *
15784  * @param[in] dev
15785  *   Pointer to the Ethernet device structure.
15786  * @param[in] mtr_policy
15787  *   Meter policy struct.
15788  * @param[in] action
15789  *   Action specification used to create meter actions.
15790  * @param[out] error
15791  *   Perform verbose error reporting if not NULL. Initialized in case of
15792  *   error only.
15793  *
15794  * @return
15795  *   0 on success, otherwise negative errno value.
15796  */
15797 static int
15798 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15799                       struct mlx5_flow_meter_policy *mtr_policy,
15800                       const struct rte_flow_action *actions[RTE_COLORS],
15801                       struct rte_mtr_error *error)
15802 {
15803         int ret, i;
15804         uint16_t sub_policy_num;
15805
15806         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15807                 sub_policy_num = (mtr_policy->sub_policy_num >>
15808                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15809                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15810                 if (sub_policy_num) {
15811                         ret = __flow_dv_create_domain_policy_acts(dev,
15812                                 mtr_policy, actions,
15813                                 (enum mlx5_meter_domain)i, error);
15814                         /* Cleaning resource is done in the caller level. */
15815                         if (ret)
15816                                 return ret;
15817                 }
15818         }
15819         return 0;
15820 }
15821
15822 /**
15823  * Query a DV flow rule for its statistics via DevX.
15824  *
15825  * @param[in] dev
15826  *   Pointer to Ethernet device.
15827  * @param[in] cnt_idx
15828  *   Index to the flow counter.
15829  * @param[out] data
15830  *   Data retrieved by the query.
15831  * @param[out] error
15832  *   Perform verbose error reporting if not NULL.
15833  *
15834  * @return
15835  *   0 on success, a negative errno value otherwise and rte_errno is set.
15836  */
15837 static int
15838 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15839                     struct rte_flow_error *error)
15840 {
15841         struct mlx5_priv *priv = dev->data->dev_private;
15842         struct rte_flow_query_count *qc = data;
15843
15844         if (!priv->sh->cdev->config.devx)
15845                 return rte_flow_error_set(error, ENOTSUP,
15846                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15847                                           NULL,
15848                                           "counters are not supported");
15849         if (cnt_idx) {
15850                 uint64_t pkts, bytes;
15851                 struct mlx5_flow_counter *cnt;
15852                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15853
15854                 if (err)
15855                         return rte_flow_error_set(error, -err,
15856                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15857                                         NULL, "cannot read counters");
15858                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15859                 qc->hits_set = 1;
15860                 qc->bytes_set = 1;
15861                 qc->hits = pkts - cnt->hits;
15862                 qc->bytes = bytes - cnt->bytes;
15863                 if (qc->reset) {
15864                         cnt->hits = pkts;
15865                         cnt->bytes = bytes;
15866                 }
15867                 return 0;
15868         }
15869         return rte_flow_error_set(error, EINVAL,
15870                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15871                                   NULL,
15872                                   "counters are not available");
15873 }
15874
15875 static int
15876 flow_dv_action_query(struct rte_eth_dev *dev,
15877                      const struct rte_flow_action_handle *handle, void *data,
15878                      struct rte_flow_error *error)
15879 {
15880         struct mlx5_age_param *age_param;
15881         struct rte_flow_query_age *resp;
15882         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15883         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15884         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15885         struct mlx5_priv *priv = dev->data->dev_private;
15886         struct mlx5_aso_ct_action *ct;
15887         uint16_t owner;
15888         uint32_t dev_idx;
15889
15890         switch (type) {
15891         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15892                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15893                 resp = data;
15894                 resp->aged = __atomic_load_n(&age_param->state,
15895                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
15896                                                                           1 : 0;
15897                 resp->sec_since_last_hit_valid = !resp->aged;
15898                 if (resp->sec_since_last_hit_valid)
15899                         resp->sec_since_last_hit = __atomic_load_n
15900                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15901                 return 0;
15902         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15903                 return flow_dv_query_count(dev, idx, data, error);
15904         case MLX5_INDIRECT_ACTION_TYPE_CT:
15905                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15906                 if (owner != PORT_ID(priv))
15907                         return rte_flow_error_set(error, EACCES,
15908                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15909                                         NULL,
15910                                         "CT object owned by another port");
15911                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15912                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15913                 MLX5_ASSERT(ct);
15914                 if (!ct->refcnt)
15915                         return rte_flow_error_set(error, EFAULT,
15916                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15917                                         NULL,
15918                                         "CT object is inactive");
15919                 ((struct rte_flow_action_conntrack *)data)->peer_port =
15920                                                         ct->peer;
15921                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15922                                                         ct->is_original;
15923                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15924                         return rte_flow_error_set(error, EIO,
15925                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15926                                         NULL,
15927                                         "Failed to query CT context");
15928                 return 0;
15929         default:
15930                 return rte_flow_error_set(error, ENOTSUP,
15931                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15932                                           "action type query not supported");
15933         }
15934 }
15935
15936 /**
15937  * Query a flow rule AGE action for aging information.
15938  *
15939  * @param[in] dev
15940  *   Pointer to Ethernet device.
15941  * @param[in] flow
15942  *   Pointer to the sub flow.
15943  * @param[out] data
15944  *   data retrieved by the query.
15945  * @param[out] error
15946  *   Perform verbose error reporting if not NULL.
15947  *
15948  * @return
15949  *   0 on success, a negative errno value otherwise and rte_errno is set.
15950  */
15951 static int
15952 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15953                   void *data, struct rte_flow_error *error)
15954 {
15955         struct rte_flow_query_age *resp = data;
15956         struct mlx5_age_param *age_param;
15957
15958         if (flow->age) {
15959                 struct mlx5_aso_age_action *act =
15960                                      flow_aso_age_get_by_idx(dev, flow->age);
15961
15962                 age_param = &act->age_params;
15963         } else if (flow->counter) {
15964                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15965
15966                 if (!age_param || !age_param->timeout)
15967                         return rte_flow_error_set
15968                                         (error, EINVAL,
15969                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15970                                          NULL, "cannot read age data");
15971         } else {
15972                 return rte_flow_error_set(error, EINVAL,
15973                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15974                                           NULL, "age data not available");
15975         }
15976         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15977                                      AGE_TMOUT ? 1 : 0;
15978         resp->sec_since_last_hit_valid = !resp->aged;
15979         if (resp->sec_since_last_hit_valid)
15980                 resp->sec_since_last_hit = __atomic_load_n
15981                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15982         return 0;
15983 }
15984
15985 /**
15986  * Query a flow.
15987  *
15988  * @see rte_flow_query()
15989  * @see rte_flow_ops
15990  */
15991 static int
15992 flow_dv_query(struct rte_eth_dev *dev,
15993               struct rte_flow *flow __rte_unused,
15994               const struct rte_flow_action *actions __rte_unused,
15995               void *data __rte_unused,
15996               struct rte_flow_error *error __rte_unused)
15997 {
15998         int ret = -EINVAL;
15999
16000         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
16001                 switch (actions->type) {
16002                 case RTE_FLOW_ACTION_TYPE_VOID:
16003                         break;
16004                 case RTE_FLOW_ACTION_TYPE_COUNT:
16005                         ret = flow_dv_query_count(dev, flow->counter, data,
16006                                                   error);
16007                         break;
16008                 case RTE_FLOW_ACTION_TYPE_AGE:
16009                         ret = flow_dv_query_age(dev, flow, data, error);
16010                         break;
16011                 default:
16012                         return rte_flow_error_set(error, ENOTSUP,
16013                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16014                                                   actions,
16015                                                   "action not supported");
16016                 }
16017         }
16018         return ret;
16019 }
16020
16021 /**
16022  * Destroy the meter table set.
16023  * Lock free, (mutex should be acquired by caller).
16024  *
16025  * @param[in] dev
16026  *   Pointer to Ethernet device.
16027  * @param[in] fm
16028  *   Meter information table.
16029  */
16030 static void
16031 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
16032                         struct mlx5_flow_meter_info *fm)
16033 {
16034         struct mlx5_priv *priv = dev->data->dev_private;
16035         int i;
16036
16037         if (!fm || !priv->sh->config.dv_flow_en)
16038                 return;
16039         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16040                 if (fm->drop_rule[i]) {
16041                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
16042                         fm->drop_rule[i] = NULL;
16043                 }
16044         }
16045 }
16046
16047 static void
16048 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
16049 {
16050         struct mlx5_priv *priv = dev->data->dev_private;
16051         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16052         struct mlx5_flow_tbl_data_entry *tbl;
16053         int i, j;
16054
16055         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16056                 if (mtrmng->def_rule[i]) {
16057                         claim_zero(mlx5_flow_os_destroy_flow
16058                                         (mtrmng->def_rule[i]));
16059                         mtrmng->def_rule[i] = NULL;
16060                 }
16061                 if (mtrmng->def_matcher[i]) {
16062                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
16063                                 struct mlx5_flow_tbl_data_entry, tbl);
16064                         mlx5_list_unregister(tbl->matchers,
16065                                              &mtrmng->def_matcher[i]->entry);
16066                         mtrmng->def_matcher[i] = NULL;
16067                 }
16068                 for (j = 0; j < MLX5_REG_BITS; j++) {
16069                         if (mtrmng->drop_matcher[i][j]) {
16070                                 tbl =
16071                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
16072                                              struct mlx5_flow_tbl_data_entry,
16073                                              tbl);
16074                                 mlx5_list_unregister(tbl->matchers,
16075                                             &mtrmng->drop_matcher[i][j]->entry);
16076                                 mtrmng->drop_matcher[i][j] = NULL;
16077                         }
16078                 }
16079                 if (mtrmng->drop_tbl[i]) {
16080                         flow_dv_tbl_resource_release(MLX5_SH(dev),
16081                                 mtrmng->drop_tbl[i]);
16082                         mtrmng->drop_tbl[i] = NULL;
16083                 }
16084         }
16085 }
16086
16087 /* Number of meter flow actions, count and jump or count and drop. */
16088 #define METER_ACTIONS 2
16089
16090 static void
16091 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
16092                                     enum mlx5_meter_domain domain)
16093 {
16094         struct mlx5_priv *priv = dev->data->dev_private;
16095         struct mlx5_flow_meter_def_policy *def_policy =
16096                         priv->sh->mtrmng->def_policy[domain];
16097
16098         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
16099         mlx5_free(def_policy);
16100         priv->sh->mtrmng->def_policy[domain] = NULL;
16101 }
16102
16103 /**
16104  * Destroy the default policy table set.
16105  *
16106  * @param[in] dev
16107  *   Pointer to Ethernet device.
16108  */
16109 static void
16110 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
16111 {
16112         struct mlx5_priv *priv = dev->data->dev_private;
16113         int i;
16114
16115         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
16116                 if (priv->sh->mtrmng->def_policy[i])
16117                         __flow_dv_destroy_domain_def_policy(dev,
16118                                         (enum mlx5_meter_domain)i);
16119         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
16120 }
16121
16122 static int
16123 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
16124                         uint32_t color_reg_c_idx,
16125                         enum rte_color color, void *matcher_object,
16126                         int actions_n, void *actions,
16127                         bool match_src_port, const struct rte_flow_item *item,
16128                         void **rule, const struct rte_flow_attr *attr)
16129 {
16130         int ret;
16131         struct mlx5_flow_dv_match_params value = {
16132                 .size = sizeof(value.buf),
16133         };
16134         struct mlx5_flow_dv_match_params matcher = {
16135                 .size = sizeof(matcher.buf),
16136         };
16137         struct mlx5_priv *priv = dev->data->dev_private;
16138         uint8_t misc_mask;
16139
16140         if (match_src_port && priv->sh->esw_mode) {
16141                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
16142                                                    value.buf, item, attr)) {
16143                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
16144                                 " value with port.", color);
16145                         return -1;
16146                 }
16147         }
16148         flow_dv_match_meta_reg(matcher.buf, value.buf,
16149                                (enum modify_reg)color_reg_c_idx,
16150                                rte_col_2_mlx5_col(color), UINT32_MAX);
16151         misc_mask = flow_dv_matcher_enable(value.buf);
16152         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16153         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
16154                                        actions_n, actions, rule);
16155         if (ret) {
16156                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16157                 return -1;
16158         }
16159         return 0;
16160 }
16161
16162 static int
16163 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16164                         uint32_t color_reg_c_idx,
16165                         uint16_t priority,
16166                         struct mlx5_flow_meter_sub_policy *sub_policy,
16167                         const struct rte_flow_attr *attr,
16168                         bool match_src_port,
16169                         const struct rte_flow_item *item,
16170                         struct mlx5_flow_dv_matcher **policy_matcher,
16171                         struct rte_flow_error *error)
16172 {
16173         struct mlx5_list_entry *entry;
16174         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16175         struct mlx5_flow_dv_matcher matcher = {
16176                 .mask = {
16177                         .size = sizeof(matcher.mask.buf),
16178                 },
16179                 .tbl = tbl_rsc,
16180         };
16181         struct mlx5_flow_dv_match_params value = {
16182                 .size = sizeof(value.buf),
16183         };
16184         struct mlx5_flow_cb_ctx ctx = {
16185                 .error = error,
16186                 .data = &matcher,
16187         };
16188         struct mlx5_flow_tbl_data_entry *tbl_data;
16189         struct mlx5_priv *priv = dev->data->dev_private;
16190         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16191
16192         if (match_src_port && priv->sh->esw_mode) {
16193                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16194                                                    value.buf, item, attr)) {
16195                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16196                                 " with port.", priority);
16197                         return -1;
16198                 }
16199         }
16200         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16201         if (priority < RTE_COLOR_RED)
16202                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16203                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16204         matcher.priority = priority;
16205         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16206                                     matcher.mask.size);
16207         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16208         if (!entry) {
16209                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16210                 return -1;
16211         }
16212         *policy_matcher =
16213                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16214         return 0;
16215 }
16216
16217 /**
16218  * Create the policy rules per domain.
16219  *
16220  * @param[in] dev
16221  *   Pointer to Ethernet device.
16222  * @param[in] sub_policy
16223  *    Pointer to sub policy table..
16224  * @param[in] egress
16225  *   Direction of the table.
16226  * @param[in] transfer
16227  *   E-Switch or NIC flow.
16228  * @param[in] acts
16229  *   Pointer to policy action list per color.
16230  *
16231  * @return
16232  *   0 on success, -1 otherwise.
16233  */
16234 static int
16235 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16236                 struct mlx5_flow_meter_sub_policy *sub_policy,
16237                 uint8_t egress, uint8_t transfer, bool match_src_port,
16238                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16239 {
16240         struct mlx5_priv *priv = dev->data->dev_private;
16241         struct rte_flow_error flow_err;
16242         uint32_t color_reg_c_idx;
16243         struct rte_flow_attr attr = {
16244                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16245                 .priority = 0,
16246                 .ingress = 0,
16247                 .egress = !!egress,
16248                 .transfer = !!transfer,
16249                 .reserved = 0,
16250         };
16251         int i;
16252         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16253         struct mlx5_sub_policy_color_rule *color_rule;
16254         bool svport_match;
16255         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16256
16257         if (ret < 0)
16258                 return -1;
16259         /* Create policy table with POLICY level. */
16260         if (!sub_policy->tbl_rsc)
16261                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16262                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16263                                 egress, transfer, false, NULL, 0, 0,
16264                                 sub_policy->idx, &flow_err);
16265         if (!sub_policy->tbl_rsc) {
16266                 DRV_LOG(ERR,
16267                         "Failed to create meter sub policy table.");
16268                 return -1;
16269         }
16270         /* Prepare matchers. */
16271         color_reg_c_idx = ret;
16272         for (i = 0; i < RTE_COLORS; i++) {
16273                 TAILQ_INIT(&sub_policy->color_rules[i]);
16274                 if (!acts[i].actions_n)
16275                         continue;
16276                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16277                                 sizeof(struct mlx5_sub_policy_color_rule),
16278                                 0, SOCKET_ID_ANY);
16279                 if (!color_rule) {
16280                         DRV_LOG(ERR, "No memory to create color rule.");
16281                         goto err_exit;
16282                 }
16283                 tmp_rules[i] = color_rule;
16284                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16285                                   color_rule, next_port);
16286                 color_rule->src_port = priv->representor_id;
16287                 /* No use. */
16288                 attr.priority = i;
16289                 /* Create matchers for colors. */
16290                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16291                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16292                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16293                                 &attr, svport_match, NULL,
16294                                 &color_rule->matcher, &flow_err)) {
16295                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16296                         goto err_exit;
16297                 }
16298                 /* Create flow, matching color. */
16299                 if (__flow_dv_create_policy_flow(dev,
16300                                 color_reg_c_idx, (enum rte_color)i,
16301                                 color_rule->matcher->matcher_object,
16302                                 acts[i].actions_n, acts[i].dv_actions,
16303                                 svport_match, NULL, &color_rule->rule,
16304                                 &attr)) {
16305                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16306                         goto err_exit;
16307                 }
16308         }
16309         return 0;
16310 err_exit:
16311         /* All the policy rules will be cleared. */
16312         do {
16313                 color_rule = tmp_rules[i];
16314                 if (color_rule) {
16315                         if (color_rule->rule)
16316                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16317                         if (color_rule->matcher) {
16318                                 struct mlx5_flow_tbl_data_entry *tbl =
16319                                         container_of(color_rule->matcher->tbl,
16320                                                      typeof(*tbl), tbl);
16321                                 mlx5_list_unregister(tbl->matchers,
16322                                                 &color_rule->matcher->entry);
16323                         }
16324                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16325                                      color_rule, next_port);
16326                         mlx5_free(color_rule);
16327                 }
16328         } while (i--);
16329         return -1;
16330 }
16331
16332 static int
16333 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16334                         struct mlx5_flow_meter_policy *mtr_policy,
16335                         struct mlx5_flow_meter_sub_policy *sub_policy,
16336                         uint32_t domain)
16337 {
16338         struct mlx5_priv *priv = dev->data->dev_private;
16339         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16340         struct mlx5_flow_dv_tag_resource *tag;
16341         struct mlx5_flow_dv_port_id_action_resource *port_action;
16342         struct mlx5_hrxq *hrxq;
16343         struct mlx5_flow_meter_info *next_fm = NULL;
16344         struct mlx5_flow_meter_policy *next_policy;
16345         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16346         struct mlx5_flow_tbl_data_entry *tbl_data;
16347         struct rte_flow_error error;
16348         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16349         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16350         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16351         bool match_src_port = false;
16352         int i;
16353
16354         /* If RSS or Queue, no previous actions / rules is created. */
16355         for (i = 0; i < RTE_COLORS; i++) {
16356                 acts[i].actions_n = 0;
16357                 if (i == RTE_COLOR_RED) {
16358                         /* Only support drop on red. */
16359                         acts[i].dv_actions[0] =
16360                                 mtr_policy->dr_drop_action[domain];
16361                         acts[i].actions_n = 1;
16362                         continue;
16363                 }
16364                 if (i == RTE_COLOR_GREEN &&
16365                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16366                         struct rte_flow_attr attr = {
16367                                 .transfer = transfer
16368                         };
16369
16370                         next_fm = mlx5_flow_meter_find(priv,
16371                                         mtr_policy->act_cnt[i].next_mtr_id,
16372                                         NULL);
16373                         if (!next_fm) {
16374                                 DRV_LOG(ERR,
16375                                         "Failed to get next hierarchy meter.");
16376                                 goto err_exit;
16377                         }
16378                         if (mlx5_flow_meter_attach(priv, next_fm,
16379                                                    &attr, &error)) {
16380                                 DRV_LOG(ERR, "%s", error.message);
16381                                 next_fm = NULL;
16382                                 goto err_exit;
16383                         }
16384                         /* Meter action must be the first for TX. */
16385                         if (mtr_first) {
16386                                 acts[i].dv_actions[acts[i].actions_n] =
16387                                         next_fm->meter_action;
16388                                 acts[i].actions_n++;
16389                         }
16390                 }
16391                 if (mtr_policy->act_cnt[i].rix_mark) {
16392                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16393                                         mtr_policy->act_cnt[i].rix_mark);
16394                         if (!tag) {
16395                                 DRV_LOG(ERR, "Failed to find "
16396                                 "mark action for policy.");
16397                                 goto err_exit;
16398                         }
16399                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16400                         acts[i].actions_n++;
16401                 }
16402                 if (mtr_policy->act_cnt[i].modify_hdr) {
16403                         acts[i].dv_actions[acts[i].actions_n] =
16404                                 mtr_policy->act_cnt[i].modify_hdr->action;
16405                         acts[i].actions_n++;
16406                 }
16407                 if (mtr_policy->act_cnt[i].fate_action) {
16408                         switch (mtr_policy->act_cnt[i].fate_action) {
16409                         case MLX5_FLOW_FATE_PORT_ID:
16410                                 port_action = mlx5_ipool_get
16411                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16412                                 mtr_policy->act_cnt[i].rix_port_id_action);
16413                                 if (!port_action) {
16414                                         DRV_LOG(ERR, "Failed to find "
16415                                                 "port action for policy.");
16416                                         goto err_exit;
16417                                 }
16418                                 acts[i].dv_actions[acts[i].actions_n] =
16419                                         port_action->action;
16420                                 acts[i].actions_n++;
16421                                 mtr_policy->dev = dev;
16422                                 match_src_port = true;
16423                                 break;
16424                         case MLX5_FLOW_FATE_DROP:
16425                         case MLX5_FLOW_FATE_JUMP:
16426                                 acts[i].dv_actions[acts[i].actions_n] =
16427                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16428                                 acts[i].actions_n++;
16429                                 break;
16430                         case MLX5_FLOW_FATE_SHARED_RSS:
16431                         case MLX5_FLOW_FATE_QUEUE:
16432                                 hrxq = mlx5_ipool_get
16433                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16434                                          sub_policy->rix_hrxq[i]);
16435                                 if (!hrxq) {
16436                                         DRV_LOG(ERR, "Failed to find "
16437                                                 "queue action for policy.");
16438                                         goto err_exit;
16439                                 }
16440                                 acts[i].dv_actions[acts[i].actions_n] =
16441                                         hrxq->action;
16442                                 acts[i].actions_n++;
16443                                 break;
16444                         case MLX5_FLOW_FATE_MTR:
16445                                 if (!next_fm) {
16446                                         DRV_LOG(ERR,
16447                                                 "No next hierarchy meter.");
16448                                         goto err_exit;
16449                                 }
16450                                 if (!mtr_first) {
16451                                         acts[i].dv_actions[acts[i].actions_n] =
16452                                                         next_fm->meter_action;
16453                                         acts[i].actions_n++;
16454                                 }
16455                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16456                                         next_sub_policy =
16457                                         mtr_policy->act_cnt[i].next_sub_policy;
16458                                 } else {
16459                                         next_policy =
16460                                                 mlx5_flow_meter_policy_find(dev,
16461                                                 next_fm->policy_id, NULL);
16462                                         MLX5_ASSERT(next_policy);
16463                                         next_sub_policy =
16464                                         next_policy->sub_policys[domain][0];
16465                                 }
16466                                 tbl_data =
16467                                         container_of(next_sub_policy->tbl_rsc,
16468                                         struct mlx5_flow_tbl_data_entry, tbl);
16469                                 acts[i].dv_actions[acts[i].actions_n++] =
16470                                                         tbl_data->jump.action;
16471                                 if (mtr_policy->act_cnt[i].modify_hdr)
16472                                         match_src_port = !!transfer;
16473                                 break;
16474                         default:
16475                                 /*Queue action do nothing*/
16476                                 break;
16477                         }
16478                 }
16479         }
16480         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16481                                 egress, transfer, match_src_port, acts)) {
16482                 DRV_LOG(ERR,
16483                         "Failed to create policy rules per domain.");
16484                 goto err_exit;
16485         }
16486         return 0;
16487 err_exit:
16488         if (next_fm)
16489                 mlx5_flow_meter_detach(priv, next_fm);
16490         return -1;
16491 }
16492
16493 /**
16494  * Create the policy rules.
16495  *
16496  * @param[in] dev
16497  *   Pointer to Ethernet device.
16498  * @param[in,out] mtr_policy
16499  *   Pointer to meter policy table.
16500  *
16501  * @return
16502  *   0 on success, -1 otherwise.
16503  */
16504 static int
16505 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16506                              struct mlx5_flow_meter_policy *mtr_policy)
16507 {
16508         int i;
16509         uint16_t sub_policy_num;
16510
16511         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16512                 sub_policy_num = (mtr_policy->sub_policy_num >>
16513                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16514                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16515                 if (!sub_policy_num)
16516                         continue;
16517                 /* Prepare actions list and create policy rules. */
16518                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16519                         mtr_policy->sub_policys[i][0], i)) {
16520                         DRV_LOG(ERR, "Failed to create policy action "
16521                                 "list per domain.");
16522                         return -1;
16523                 }
16524         }
16525         return 0;
16526 }
16527
16528 static int
16529 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16530 {
16531         struct mlx5_priv *priv = dev->data->dev_private;
16532         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16533         struct mlx5_flow_meter_def_policy *def_policy;
16534         struct mlx5_flow_tbl_resource *jump_tbl;
16535         struct mlx5_flow_tbl_data_entry *tbl_data;
16536         uint8_t egress, transfer;
16537         struct rte_flow_error error;
16538         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16539         int ret;
16540
16541         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16542         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16543         def_policy = mtrmng->def_policy[domain];
16544         if (!def_policy) {
16545                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16546                         sizeof(struct mlx5_flow_meter_def_policy),
16547                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16548                 if (!def_policy) {
16549                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16550                         goto def_policy_error;
16551                 }
16552                 mtrmng->def_policy[domain] = def_policy;
16553                 /* Create the meter suffix table with SUFFIX level. */
16554                 jump_tbl = flow_dv_tbl_resource_get(dev,
16555                                 MLX5_FLOW_TABLE_LEVEL_METER,
16556                                 egress, transfer, false, NULL, 0,
16557                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16558                 if (!jump_tbl) {
16559                         DRV_LOG(ERR,
16560                                 "Failed to create meter suffix table.");
16561                         goto def_policy_error;
16562                 }
16563                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16564                 tbl_data = container_of(jump_tbl,
16565                                         struct mlx5_flow_tbl_data_entry, tbl);
16566                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16567                                                 tbl_data->jump.action;
16568                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16569                 acts[RTE_COLOR_GREEN].actions_n = 1;
16570                 /*
16571                  * YELLOW has the same default policy as GREEN does.
16572                  * G & Y share the same table and action. The 2nd time of table
16573                  * resource getting is just to update the reference count for
16574                  * the releasing stage.
16575                  */
16576                 jump_tbl = flow_dv_tbl_resource_get(dev,
16577                                 MLX5_FLOW_TABLE_LEVEL_METER,
16578                                 egress, transfer, false, NULL, 0,
16579                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16580                 if (!jump_tbl) {
16581                         DRV_LOG(ERR,
16582                                 "Failed to get meter suffix table.");
16583                         goto def_policy_error;
16584                 }
16585                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16586                 tbl_data = container_of(jump_tbl,
16587                                         struct mlx5_flow_tbl_data_entry, tbl);
16588                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16589                                                 tbl_data->jump.action;
16590                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16591                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16592                 /* Create jump action to the drop table. */
16593                 if (!mtrmng->drop_tbl[domain]) {
16594                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16595                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16596                                  egress, transfer, false, NULL, 0,
16597                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16598                         if (!mtrmng->drop_tbl[domain]) {
16599                                 DRV_LOG(ERR, "Failed to create meter "
16600                                         "drop table for default policy.");
16601                                 goto def_policy_error;
16602                         }
16603                 }
16604                 /* all RED: unique Drop table for jump action. */
16605                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16606                                         struct mlx5_flow_tbl_data_entry, tbl);
16607                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16608                                                 tbl_data->jump.action;
16609                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16610                 acts[RTE_COLOR_RED].actions_n = 1;
16611                 /* Create default policy rules. */
16612                 ret = __flow_dv_create_domain_policy_rules(dev,
16613                                         &def_policy->sub_policy,
16614                                         egress, transfer, false, acts);
16615                 if (ret) {
16616                         DRV_LOG(ERR, "Failed to create default policy rules.");
16617                         goto def_policy_error;
16618                 }
16619         }
16620         return 0;
16621 def_policy_error:
16622         __flow_dv_destroy_domain_def_policy(dev,
16623                                             (enum mlx5_meter_domain)domain);
16624         return -1;
16625 }
16626
16627 /**
16628  * Create the default policy table set.
16629  *
16630  * @param[in] dev
16631  *   Pointer to Ethernet device.
16632  * @return
16633  *   0 on success, -1 otherwise.
16634  */
16635 static int
16636 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16637 {
16638         struct mlx5_priv *priv = dev->data->dev_private;
16639         int i;
16640
16641         /* Non-termination policy table. */
16642         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16643                 if (!priv->sh->config.dv_esw_en &&
16644                     i == MLX5_MTR_DOMAIN_TRANSFER)
16645                         continue;
16646                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16647                         DRV_LOG(ERR, "Failed to create default policy");
16648                         /* Rollback the created default policies for others. */
16649                         flow_dv_destroy_def_policy(dev);
16650                         return -1;
16651                 }
16652         }
16653         return 0;
16654 }
16655
16656 /**
16657  * Create the needed meter tables.
16658  * Lock free, (mutex should be acquired by caller).
16659  *
16660  * @param[in] dev
16661  *   Pointer to Ethernet device.
16662  * @param[in] fm
16663  *   Meter information table.
16664  * @param[in] mtr_idx
16665  *   Meter index.
16666  * @param[in] domain_bitmap
16667  *   Domain bitmap.
16668  * @return
16669  *   0 on success, -1 otherwise.
16670  */
16671 static int
16672 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16673                         struct mlx5_flow_meter_info *fm,
16674                         uint32_t mtr_idx,
16675                         uint8_t domain_bitmap)
16676 {
16677         struct mlx5_priv *priv = dev->data->dev_private;
16678         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16679         struct rte_flow_error error;
16680         struct mlx5_flow_tbl_data_entry *tbl_data;
16681         uint8_t egress, transfer;
16682         void *actions[METER_ACTIONS];
16683         int domain, ret, i;
16684         struct mlx5_flow_counter *cnt;
16685         struct mlx5_flow_dv_match_params value = {
16686                 .size = sizeof(value.buf),
16687         };
16688         struct mlx5_flow_dv_match_params matcher_para = {
16689                 .size = sizeof(matcher_para.buf),
16690         };
16691         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16692                                                      0, &error);
16693         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16694         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16695         struct mlx5_list_entry *entry;
16696         struct mlx5_flow_dv_matcher matcher = {
16697                 .mask = {
16698                         .size = sizeof(matcher.mask.buf),
16699                 },
16700         };
16701         struct mlx5_flow_dv_matcher *drop_matcher;
16702         struct mlx5_flow_cb_ctx ctx = {
16703                 .error = &error,
16704                 .data = &matcher,
16705         };
16706         uint8_t misc_mask;
16707
16708         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16709                 rte_errno = ENOTSUP;
16710                 return -1;
16711         }
16712         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16713                 if (!(domain_bitmap & (1 << domain)) ||
16714                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16715                         continue;
16716                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16717                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16718                 /* Create the drop table with METER DROP level. */
16719                 if (!mtrmng->drop_tbl[domain]) {
16720                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16721                                         MLX5_FLOW_TABLE_LEVEL_METER,
16722                                         egress, transfer, false, NULL, 0,
16723                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16724                         if (!mtrmng->drop_tbl[domain]) {
16725                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16726                                 goto policy_error;
16727                         }
16728                 }
16729                 /* Create default matcher in drop table. */
16730                 matcher.tbl = mtrmng->drop_tbl[domain],
16731                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16732                                 struct mlx5_flow_tbl_data_entry, tbl);
16733                 if (!mtrmng->def_matcher[domain]) {
16734                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16735                                        (enum modify_reg)mtr_id_reg_c,
16736                                        0, 0);
16737                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16738                         matcher.crc = rte_raw_cksum
16739                                         ((const void *)matcher.mask.buf,
16740                                         matcher.mask.size);
16741                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16742                         if (!entry) {
16743                                 DRV_LOG(ERR, "Failed to register meter "
16744                                 "drop default matcher.");
16745                                 goto policy_error;
16746                         }
16747                         mtrmng->def_matcher[domain] = container_of(entry,
16748                         struct mlx5_flow_dv_matcher, entry);
16749                 }
16750                 /* Create default rule in drop table. */
16751                 if (!mtrmng->def_rule[domain]) {
16752                         i = 0;
16753                         actions[i++] = priv->sh->dr_drop_action;
16754                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16755                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16756                         misc_mask = flow_dv_matcher_enable(value.buf);
16757                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16758                         ret = mlx5_flow_os_create_flow
16759                                 (mtrmng->def_matcher[domain]->matcher_object,
16760                                 (void *)&value, i, actions,
16761                                 &mtrmng->def_rule[domain]);
16762                         if (ret) {
16763                                 DRV_LOG(ERR, "Failed to create meter "
16764                                 "default drop rule for drop table.");
16765                                 goto policy_error;
16766                         }
16767                 }
16768                 if (!fm->drop_cnt)
16769                         continue;
16770                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16771                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16772                         /* Create matchers for Drop. */
16773                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16774                                         (enum modify_reg)mtr_id_reg_c, 0,
16775                                         (mtr_id_mask << mtr_id_offset));
16776                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16777                         matcher.crc = rte_raw_cksum
16778                                         ((const void *)matcher.mask.buf,
16779                                         matcher.mask.size);
16780                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16781                         if (!entry) {
16782                                 DRV_LOG(ERR,
16783                                 "Failed to register meter drop matcher.");
16784                                 goto policy_error;
16785                         }
16786                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16787                                 container_of(entry, struct mlx5_flow_dv_matcher,
16788                                              entry);
16789                 }
16790                 drop_matcher =
16791                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16792                 /* Create drop rule, matching meter_id only. */
16793                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16794                                 (enum modify_reg)mtr_id_reg_c,
16795                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16796                 i = 0;
16797                 cnt = flow_dv_counter_get_by_idx(dev,
16798                                         fm->drop_cnt, NULL);
16799                 actions[i++] = cnt->action;
16800                 actions[i++] = priv->sh->dr_drop_action;
16801                 misc_mask = flow_dv_matcher_enable(value.buf);
16802                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16803                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16804                                                (void *)&value, i, actions,
16805                                                &fm->drop_rule[domain]);
16806                 if (ret) {
16807                         DRV_LOG(ERR, "Failed to create meter "
16808                                 "drop rule for drop table.");
16809                                 goto policy_error;
16810                 }
16811         }
16812         return 0;
16813 policy_error:
16814         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16815                 if (fm->drop_rule[i]) {
16816                         claim_zero(mlx5_flow_os_destroy_flow
16817                                 (fm->drop_rule[i]));
16818                         fm->drop_rule[i] = NULL;
16819                 }
16820         }
16821         return -1;
16822 }
16823
16824 static struct mlx5_flow_meter_sub_policy *
16825 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16826                 struct mlx5_flow_meter_policy *mtr_policy,
16827                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16828                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16829                 bool *is_reuse)
16830 {
16831         struct mlx5_priv *priv = dev->data->dev_private;
16832         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16833         uint32_t sub_policy_idx = 0;
16834         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16835         uint32_t i, j;
16836         struct mlx5_hrxq *hrxq;
16837         struct mlx5_flow_handle dh;
16838         struct mlx5_meter_policy_action_container *act_cnt;
16839         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16840         uint16_t sub_policy_num;
16841         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
16842
16843         MLX5_ASSERT(wks);
16844         rte_spinlock_lock(&mtr_policy->sl);
16845         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16846                 if (!rss_desc[i])
16847                         continue;
16848                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16849                 if (!hrxq_idx[i]) {
16850                         rte_spinlock_unlock(&mtr_policy->sl);
16851                         return NULL;
16852                 }
16853         }
16854         sub_policy_num = (mtr_policy->sub_policy_num >>
16855                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16856                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16857         for (j = 0; j < sub_policy_num; j++) {
16858                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16859                         if (rss_desc[i] &&
16860                             hrxq_idx[i] !=
16861                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16862                                 break;
16863                 }
16864                 if (i >= MLX5_MTR_RTE_COLORS) {
16865                         /*
16866                          * Found the sub policy table with
16867                          * the same queue per color.
16868                          */
16869                         rte_spinlock_unlock(&mtr_policy->sl);
16870                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16871                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16872                         *is_reuse = true;
16873                         return mtr_policy->sub_policys[domain][j];
16874                 }
16875         }
16876         /* Create sub policy. */
16877         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16878                 /* Reuse the first pre-allocated sub_policy. */
16879                 sub_policy = mtr_policy->sub_policys[domain][0];
16880                 sub_policy_idx = sub_policy->idx;
16881         } else {
16882                 sub_policy = mlx5_ipool_zmalloc
16883                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16884                                  &sub_policy_idx);
16885                 if (!sub_policy ||
16886                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16887                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16888                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16889                         goto rss_sub_policy_error;
16890                 }
16891                 sub_policy->idx = sub_policy_idx;
16892                 sub_policy->main_policy = mtr_policy;
16893         }
16894         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16895                 if (!rss_desc[i])
16896                         continue;
16897                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16898                 if (mtr_policy->is_hierarchy) {
16899                         act_cnt = &mtr_policy->act_cnt[i];
16900                         act_cnt->next_sub_policy = next_sub_policy;
16901                         mlx5_hrxq_release(dev, hrxq_idx[i]);
16902                 } else {
16903                         /*
16904                          * Overwrite the last action from
16905                          * RSS action to Queue action.
16906                          */
16907                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16908                                               hrxq_idx[i]);
16909                         if (!hrxq) {
16910                                 DRV_LOG(ERR, "Failed to get policy hrxq");
16911                                 goto rss_sub_policy_error;
16912                         }
16913                         act_cnt = &mtr_policy->act_cnt[i];
16914                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16915                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16916                                 if (act_cnt->rix_mark)
16917                                         wks->mark = 1;
16918                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16919                                 dh.rix_hrxq = hrxq_idx[i];
16920                                 flow_drv_rxq_flags_set(dev, &dh);
16921                         }
16922                 }
16923         }
16924         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16925                                                sub_policy, domain)) {
16926                 DRV_LOG(ERR, "Failed to create policy "
16927                         "rules for ingress domain.");
16928                 goto rss_sub_policy_error;
16929         }
16930         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16931                 i = (mtr_policy->sub_policy_num >>
16932                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16933                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16934                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16935                         DRV_LOG(ERR, "No free sub-policy slot.");
16936                         goto rss_sub_policy_error;
16937                 }
16938                 mtr_policy->sub_policys[domain][i] = sub_policy;
16939                 i++;
16940                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16941                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16942                 mtr_policy->sub_policy_num |=
16943                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16944                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16945         }
16946         rte_spinlock_unlock(&mtr_policy->sl);
16947         *is_reuse = false;
16948         return sub_policy;
16949 rss_sub_policy_error:
16950         if (sub_policy) {
16951                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16952                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16953                         i = (mtr_policy->sub_policy_num >>
16954                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16955                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16956                         mtr_policy->sub_policys[domain][i] = NULL;
16957                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16958                                         sub_policy->idx);
16959                 }
16960         }
16961         rte_spinlock_unlock(&mtr_policy->sl);
16962         return NULL;
16963 }
16964
16965 /**
16966  * Find the policy table for prefix table with RSS.
16967  *
16968  * @param[in] dev
16969  *   Pointer to Ethernet device.
16970  * @param[in] mtr_policy
16971  *   Pointer to meter policy table.
16972  * @param[in] rss_desc
16973  *   Pointer to rss_desc
16974  * @return
16975  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
16976  */
16977 static struct mlx5_flow_meter_sub_policy *
16978 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16979                 struct mlx5_flow_meter_policy *mtr_policy,
16980                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16981 {
16982         struct mlx5_priv *priv = dev->data->dev_private;
16983         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16984         struct mlx5_flow_meter_info *next_fm;
16985         struct mlx5_flow_meter_policy *next_policy;
16986         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16987         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16988         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16989         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16990         bool reuse_sub_policy;
16991         uint32_t i = 0;
16992         uint32_t j = 0;
16993
16994         while (true) {
16995                 /* Iterate hierarchy to get all policies in this hierarchy. */
16996                 policies[i++] = mtr_policy;
16997                 if (!mtr_policy->is_hierarchy)
16998                         break;
16999                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
17000                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
17001                         return NULL;
17002                 }
17003                 next_fm = mlx5_flow_meter_find(priv,
17004                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17005                 if (!next_fm) {
17006                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
17007                         return NULL;
17008                 }
17009                 next_policy =
17010                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
17011                                                     NULL);
17012                 MLX5_ASSERT(next_policy);
17013                 mtr_policy = next_policy;
17014         }
17015         while (i) {
17016                 /**
17017                  * From last policy to the first one in hierarchy,
17018                  * create / get the sub policy for each of them.
17019                  */
17020                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
17021                                                         policies[--i],
17022                                                         rss_desc,
17023                                                         next_sub_policy,
17024                                                         &reuse_sub_policy);
17025                 if (!sub_policy) {
17026                         DRV_LOG(ERR, "Failed to get the sub policy.");
17027                         goto err_exit;
17028                 }
17029                 if (!reuse_sub_policy)
17030                         sub_policies[j++] = sub_policy;
17031                 next_sub_policy = sub_policy;
17032         }
17033         return sub_policy;
17034 err_exit:
17035         while (j) {
17036                 uint16_t sub_policy_num;
17037
17038                 sub_policy = sub_policies[--j];
17039                 mtr_policy = sub_policy->main_policy;
17040                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17041                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17042                         sub_policy_num = (mtr_policy->sub_policy_num >>
17043                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17044                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
17045                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
17046                                                                         NULL;
17047                         sub_policy_num--;
17048                         mtr_policy->sub_policy_num &=
17049                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17050                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
17051                         mtr_policy->sub_policy_num |=
17052                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17053                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
17054                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17055                                         sub_policy->idx);
17056                 }
17057         }
17058         return NULL;
17059 }
17060
17061 /**
17062  * Create the sub policy tag rule for all meters in hierarchy.
17063  *
17064  * @param[in] dev
17065  *   Pointer to Ethernet device.
17066  * @param[in] fm
17067  *   Meter information table.
17068  * @param[in] src_port
17069  *   The src port this extra rule should use.
17070  * @param[in] item
17071  *   The src port match item.
17072  * @param[out] error
17073  *   Perform verbose error reporting if not NULL.
17074  * @return
17075  *   0 on success, a negative errno value otherwise and rte_errno is set.
17076  */
17077 static int
17078 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
17079                                 struct mlx5_flow_meter_info *fm,
17080                                 int32_t src_port,
17081                                 const struct rte_flow_item *item,
17082                                 struct rte_flow_error *error)
17083 {
17084         struct mlx5_priv *priv = dev->data->dev_private;
17085         struct mlx5_flow_meter_policy *mtr_policy;
17086         struct mlx5_flow_meter_sub_policy *sub_policy;
17087         struct mlx5_flow_meter_info *next_fm = NULL;
17088         struct mlx5_flow_meter_policy *next_policy;
17089         struct mlx5_flow_meter_sub_policy *next_sub_policy;
17090         struct mlx5_flow_tbl_data_entry *tbl_data;
17091         struct mlx5_sub_policy_color_rule *color_rule;
17092         struct mlx5_meter_policy_acts acts;
17093         uint32_t color_reg_c_idx;
17094         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
17095         struct rte_flow_attr attr = {
17096                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
17097                 .priority = 0,
17098                 .ingress = 0,
17099                 .egress = 0,
17100                 .transfer = 1,
17101                 .reserved = 0,
17102         };
17103         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17104         int i;
17105
17106         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17107         MLX5_ASSERT(mtr_policy);
17108         if (!mtr_policy->is_hierarchy)
17109                 return 0;
17110         next_fm = mlx5_flow_meter_find(priv,
17111                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17112         if (!next_fm) {
17113                 return rte_flow_error_set(error, EINVAL,
17114                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
17115                                 "Failed to find next meter in hierarchy.");
17116         }
17117         if (!next_fm->drop_cnt)
17118                 goto exit;
17119         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
17120         sub_policy = mtr_policy->sub_policys[domain][0];
17121         for (i = 0; i < RTE_COLORS; i++) {
17122                 bool rule_exist = false;
17123                 struct mlx5_meter_policy_action_container *act_cnt;
17124
17125                 if (i >= RTE_COLOR_YELLOW)
17126                         break;
17127                 TAILQ_FOREACH(color_rule,
17128                               &sub_policy->color_rules[i], next_port)
17129                         if (color_rule->src_port == src_port) {
17130                                 rule_exist = true;
17131                                 break;
17132                         }
17133                 if (rule_exist)
17134                         continue;
17135                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
17136                                 sizeof(struct mlx5_sub_policy_color_rule),
17137                                 0, SOCKET_ID_ANY);
17138                 if (!color_rule)
17139                         return rte_flow_error_set(error, ENOMEM,
17140                                 RTE_FLOW_ERROR_TYPE_ACTION,
17141                                 NULL, "No memory to create tag color rule.");
17142                 color_rule->src_port = src_port;
17143                 attr.priority = i;
17144                 next_policy = mlx5_flow_meter_policy_find(dev,
17145                                                 next_fm->policy_id, NULL);
17146                 MLX5_ASSERT(next_policy);
17147                 next_sub_policy = next_policy->sub_policys[domain][0];
17148                 tbl_data = container_of(next_sub_policy->tbl_rsc,
17149                                         struct mlx5_flow_tbl_data_entry, tbl);
17150                 act_cnt = &mtr_policy->act_cnt[i];
17151                 if (mtr_first) {
17152                         acts.dv_actions[0] = next_fm->meter_action;
17153                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
17154                 } else {
17155                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
17156                         acts.dv_actions[1] = next_fm->meter_action;
17157                 }
17158                 acts.dv_actions[2] = tbl_data->jump.action;
17159                 acts.actions_n = 3;
17160                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17161                         next_fm = NULL;
17162                         goto err_exit;
17163                 }
17164                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17165                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17166                                 &attr, true, item,
17167                                 &color_rule->matcher, error)) {
17168                         rte_flow_error_set(error, errno,
17169                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17170                                 "Failed to create hierarchy meter matcher.");
17171                         goto err_exit;
17172                 }
17173                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17174                                         (enum rte_color)i,
17175                                         color_rule->matcher->matcher_object,
17176                                         acts.actions_n, acts.dv_actions,
17177                                         true, item,
17178                                         &color_rule->rule, &attr)) {
17179                         rte_flow_error_set(error, errno,
17180                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17181                                 "Failed to create hierarchy meter rule.");
17182                         goto err_exit;
17183                 }
17184                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17185                                   color_rule, next_port);
17186         }
17187 exit:
17188         /**
17189          * Recursive call to iterate all meters in hierarchy and
17190          * create needed rules.
17191          */
17192         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17193                                                 src_port, item, error);
17194 err_exit:
17195         if (color_rule) {
17196                 if (color_rule->rule)
17197                         mlx5_flow_os_destroy_flow(color_rule->rule);
17198                 if (color_rule->matcher) {
17199                         struct mlx5_flow_tbl_data_entry *tbl =
17200                                 container_of(color_rule->matcher->tbl,
17201                                                 typeof(*tbl), tbl);
17202                         mlx5_list_unregister(tbl->matchers,
17203                                                 &color_rule->matcher->entry);
17204                 }
17205                 mlx5_free(color_rule);
17206         }
17207         if (next_fm)
17208                 mlx5_flow_meter_detach(priv, next_fm);
17209         return -rte_errno;
17210 }
17211
17212 /**
17213  * Destroy the sub policy table with RX queue.
17214  *
17215  * @param[in] dev
17216  *   Pointer to Ethernet device.
17217  * @param[in] mtr_policy
17218  *   Pointer to meter policy table.
17219  */
17220 static void
17221 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17222                                     struct mlx5_flow_meter_policy *mtr_policy)
17223 {
17224         struct mlx5_priv *priv = dev->data->dev_private;
17225         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17226         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17227         uint32_t i, j;
17228         uint16_t sub_policy_num, new_policy_num;
17229
17230         rte_spinlock_lock(&mtr_policy->sl);
17231         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17232                 switch (mtr_policy->act_cnt[i].fate_action) {
17233                 case MLX5_FLOW_FATE_SHARED_RSS:
17234                         sub_policy_num = (mtr_policy->sub_policy_num >>
17235                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17236                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17237                         new_policy_num = sub_policy_num;
17238                         for (j = 0; j < sub_policy_num; j++) {
17239                                 sub_policy =
17240                                         mtr_policy->sub_policys[domain][j];
17241                                 if (sub_policy) {
17242                                         __flow_dv_destroy_sub_policy_rules(dev,
17243                                                 sub_policy);
17244                                 if (sub_policy !=
17245                                         mtr_policy->sub_policys[domain][0]) {
17246                                         mtr_policy->sub_policys[domain][j] =
17247                                                                 NULL;
17248                                         mlx5_ipool_free
17249                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17250                                                 sub_policy->idx);
17251                                                 new_policy_num--;
17252                                         }
17253                                 }
17254                         }
17255                         if (new_policy_num != sub_policy_num) {
17256                                 mtr_policy->sub_policy_num &=
17257                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17258                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17259                                 mtr_policy->sub_policy_num |=
17260                                 (new_policy_num &
17261                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17262                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17263                         }
17264                         break;
17265                 case MLX5_FLOW_FATE_QUEUE:
17266                         sub_policy = mtr_policy->sub_policys[domain][0];
17267                         __flow_dv_destroy_sub_policy_rules(dev,
17268                                                            sub_policy);
17269                         break;
17270                 default:
17271                         /*Other actions without queue and do nothing*/
17272                         break;
17273                 }
17274         }
17275         rte_spinlock_unlock(&mtr_policy->sl);
17276 }
17277 /**
17278  * Check whether the DR drop action is supported on the root table or not.
17279  *
17280  * Create a simple flow with DR drop action on root table to validate
17281  * if DR drop action on root table is supported or not.
17282  *
17283  * @param[in] dev
17284  *   Pointer to rte_eth_dev structure.
17285  *
17286  * @return
17287  *   0 on success, a negative errno value otherwise and rte_errno is set.
17288  */
17289 int
17290 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17291 {
17292         struct mlx5_priv *priv = dev->data->dev_private;
17293         struct mlx5_dev_ctx_shared *sh = priv->sh;
17294         struct mlx5_flow_dv_match_params mask = {
17295                 .size = sizeof(mask.buf),
17296         };
17297         struct mlx5_flow_dv_match_params value = {
17298                 .size = sizeof(value.buf),
17299         };
17300         struct mlx5dv_flow_matcher_attr dv_attr = {
17301                 .type = IBV_FLOW_ATTR_NORMAL,
17302                 .priority = 0,
17303                 .match_criteria_enable = 0,
17304                 .match_mask = (void *)&mask,
17305         };
17306         struct mlx5_flow_tbl_resource *tbl = NULL;
17307         void *matcher = NULL;
17308         void *flow = NULL;
17309         int ret = -1;
17310
17311         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17312                                         0, 0, 0, NULL);
17313         if (!tbl)
17314                 goto err;
17315         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17316         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17317         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17318                                                tbl->obj, &matcher);
17319         if (ret)
17320                 goto err;
17321         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17322         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17323                                        &sh->dr_drop_action, &flow);
17324 err:
17325         /*
17326          * If DR drop action is not supported on root table, flow create will
17327          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17328          */
17329         if (!flow) {
17330                 if (matcher &&
17331                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17332                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17333                 else
17334                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17335                 ret = -1;
17336         } else {
17337                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17338         }
17339         if (matcher)
17340                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17341         if (tbl)
17342                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17343         return ret;
17344 }
17345
17346 /**
17347  * Validate the batch counter support in root table.
17348  *
17349  * Create a simple flow with invalid counter and drop action on root table to
17350  * validate if batch counter with offset on root table is supported or not.
17351  *
17352  * @param[in] dev
17353  *   Pointer to rte_eth_dev structure.
17354  *
17355  * @return
17356  *   0 on success, a negative errno value otherwise and rte_errno is set.
17357  */
17358 int
17359 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17360 {
17361         struct mlx5_priv *priv = dev->data->dev_private;
17362         struct mlx5_dev_ctx_shared *sh = priv->sh;
17363         struct mlx5_flow_dv_match_params mask = {
17364                 .size = sizeof(mask.buf),
17365         };
17366         struct mlx5_flow_dv_match_params value = {
17367                 .size = sizeof(value.buf),
17368         };
17369         struct mlx5dv_flow_matcher_attr dv_attr = {
17370                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17371                 .priority = 0,
17372                 .match_criteria_enable = 0,
17373                 .match_mask = (void *)&mask,
17374         };
17375         void *actions[2] = { 0 };
17376         struct mlx5_flow_tbl_resource *tbl = NULL;
17377         struct mlx5_devx_obj *dcs = NULL;
17378         void *matcher = NULL;
17379         void *flow = NULL;
17380         int ret = -1;
17381
17382         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17383                                         0, 0, 0, NULL);
17384         if (!tbl)
17385                 goto err;
17386         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17387         if (!dcs)
17388                 goto err;
17389         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17390                                                     &actions[0]);
17391         if (ret)
17392                 goto err;
17393         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17394         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17395         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17396                                                tbl->obj, &matcher);
17397         if (ret)
17398                 goto err;
17399         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17400         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17401                                        actions, &flow);
17402 err:
17403         /*
17404          * If batch counter with offset is not supported, the driver will not
17405          * validate the invalid offset value, flow create should success.
17406          * In this case, it means batch counter is not supported in root table.
17407          *
17408          * Otherwise, if flow create is failed, counter offset is supported.
17409          */
17410         if (flow) {
17411                 DRV_LOG(INFO, "Batch counter is not supported in root "
17412                               "table. Switch to fallback mode.");
17413                 rte_errno = ENOTSUP;
17414                 ret = -rte_errno;
17415                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17416         } else {
17417                 /* Check matcher to make sure validate fail at flow create. */
17418                 if (!matcher || (matcher && errno != EINVAL))
17419                         DRV_LOG(ERR, "Unexpected error in counter offset "
17420                                      "support detection");
17421                 ret = 0;
17422         }
17423         if (actions[0])
17424                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17425         if (matcher)
17426                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17427         if (tbl)
17428                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17429         if (dcs)
17430                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17431         return ret;
17432 }
17433
17434 /**
17435  * Query a devx counter.
17436  *
17437  * @param[in] dev
17438  *   Pointer to the Ethernet device structure.
17439  * @param[in] cnt
17440  *   Index to the flow counter.
17441  * @param[in] clear
17442  *   Set to clear the counter statistics.
17443  * @param[out] pkts
17444  *   The statistics value of packets.
17445  * @param[out] bytes
17446  *   The statistics value of bytes.
17447  *
17448  * @return
17449  *   0 on success, otherwise return -1.
17450  */
17451 static int
17452 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17453                       uint64_t *pkts, uint64_t *bytes, void **action)
17454 {
17455         struct mlx5_priv *priv = dev->data->dev_private;
17456         struct mlx5_flow_counter *cnt;
17457         uint64_t inn_pkts, inn_bytes;
17458         int ret;
17459
17460         if (!priv->sh->cdev->config.devx)
17461                 return -1;
17462
17463         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17464         if (ret)
17465                 return -1;
17466         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17467         if (cnt && action)
17468                 *action = cnt->action;
17469
17470         *pkts = inn_pkts - cnt->hits;
17471         *bytes = inn_bytes - cnt->bytes;
17472         if (clear) {
17473                 cnt->hits = inn_pkts;
17474                 cnt->bytes = inn_bytes;
17475         }
17476         return 0;
17477 }
17478
17479 /**
17480  * Get aged-out flows.
17481  *
17482  * @param[in] dev
17483  *   Pointer to the Ethernet device structure.
17484  * @param[in] context
17485  *   The address of an array of pointers to the aged-out flows contexts.
17486  * @param[in] nb_contexts
17487  *   The length of context array pointers.
17488  * @param[out] error
17489  *   Perform verbose error reporting if not NULL. Initialized in case of
17490  *   error only.
17491  *
17492  * @return
17493  *   how many contexts get in success, otherwise negative errno value.
17494  *   if nb_contexts is 0, return the amount of all aged contexts.
17495  *   if nb_contexts is not 0 , return the amount of aged flows reported
17496  *   in the context array.
17497  * @note: only stub for now
17498  */
17499 static int
17500 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17501                     void **context,
17502                     uint32_t nb_contexts,
17503                     struct rte_flow_error *error)
17504 {
17505         struct mlx5_priv *priv = dev->data->dev_private;
17506         struct mlx5_age_info *age_info;
17507         struct mlx5_age_param *age_param;
17508         struct mlx5_flow_counter *counter;
17509         struct mlx5_aso_age_action *act;
17510         int nb_flows = 0;
17511
17512         if (nb_contexts && !context)
17513                 return rte_flow_error_set(error, EINVAL,
17514                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17515                                           NULL, "empty context");
17516         age_info = GET_PORT_AGE_INFO(priv);
17517         rte_spinlock_lock(&age_info->aged_sl);
17518         LIST_FOREACH(act, &age_info->aged_aso, next) {
17519                 nb_flows++;
17520                 if (nb_contexts) {
17521                         context[nb_flows - 1] =
17522                                                 act->age_params.context;
17523                         if (!(--nb_contexts))
17524                                 break;
17525                 }
17526         }
17527         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17528                 nb_flows++;
17529                 if (nb_contexts) {
17530                         age_param = MLX5_CNT_TO_AGE(counter);
17531                         context[nb_flows - 1] = age_param->context;
17532                         if (!(--nb_contexts))
17533                                 break;
17534                 }
17535         }
17536         rte_spinlock_unlock(&age_info->aged_sl);
17537         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17538         return nb_flows;
17539 }
17540
17541 /*
17542  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17543  */
17544 static uint32_t
17545 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17546 {
17547         return flow_dv_counter_alloc(dev, 0);
17548 }
17549
17550 /**
17551  * Validate indirect action.
17552  * Dispatcher for action type specific validation.
17553  *
17554  * @param[in] dev
17555  *   Pointer to the Ethernet device structure.
17556  * @param[in] conf
17557  *   Indirect action configuration.
17558  * @param[in] action
17559  *   The indirect action object to validate.
17560  * @param[out] error
17561  *   Perform verbose error reporting if not NULL. Initialized in case of
17562  *   error only.
17563  *
17564  * @return
17565  *   0 on success, otherwise negative errno value.
17566  */
17567 static int
17568 flow_dv_action_validate(struct rte_eth_dev *dev,
17569                         const struct rte_flow_indir_action_conf *conf,
17570                         const struct rte_flow_action *action,
17571                         struct rte_flow_error *err)
17572 {
17573         struct mlx5_priv *priv = dev->data->dev_private;
17574
17575         RTE_SET_USED(conf);
17576         switch (action->type) {
17577         case RTE_FLOW_ACTION_TYPE_RSS:
17578                 /*
17579                  * priv->obj_ops is set according to driver capabilities.
17580                  * When DevX capabilities are
17581                  * sufficient, it is set to devx_obj_ops.
17582                  * Otherwise, it is set to ibv_obj_ops.
17583                  * ibv_obj_ops doesn't support ind_table_modify operation.
17584                  * In this case the indirect RSS action can't be used.
17585                  */
17586                 if (priv->obj_ops.ind_table_modify == NULL)
17587                         return rte_flow_error_set
17588                                         (err, ENOTSUP,
17589                                          RTE_FLOW_ERROR_TYPE_ACTION,
17590                                          NULL,
17591                                          "Indirect RSS action not supported");
17592                 return mlx5_validate_action_rss(dev, action, err);
17593         case RTE_FLOW_ACTION_TYPE_AGE:
17594                 if (!priv->sh->aso_age_mng)
17595                         return rte_flow_error_set(err, ENOTSUP,
17596                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17597                                                 NULL,
17598                                                 "Indirect age action not supported");
17599                 return flow_dv_validate_action_age(0, action, dev, err);
17600         case RTE_FLOW_ACTION_TYPE_COUNT:
17601                 return flow_dv_validate_action_count(dev, true, 0, err);
17602         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17603                 if (!priv->sh->ct_aso_en)
17604                         return rte_flow_error_set(err, ENOTSUP,
17605                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17606                                         "ASO CT is not supported");
17607                 return mlx5_validate_action_ct(dev, action->conf, err);
17608         default:
17609                 return rte_flow_error_set(err, ENOTSUP,
17610                                           RTE_FLOW_ERROR_TYPE_ACTION,
17611                                           NULL,
17612                                           "action type not supported");
17613         }
17614 }
17615
17616 /*
17617  * Check if the RSS configurations for colors of a meter policy match
17618  * each other, except the queues.
17619  *
17620  * @param[in] r1
17621  *   Pointer to the first RSS flow action.
17622  * @param[in] r2
17623  *   Pointer to the second RSS flow action.
17624  *
17625  * @return
17626  *   0 on match, 1 on conflict.
17627  */
17628 static inline int
17629 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17630                                const struct rte_flow_action_rss *r2)
17631 {
17632         if (r1 == NULL || r2 == NULL)
17633                 return 0;
17634         if (!(r1->level <= 1 && r2->level <= 1) &&
17635             !(r1->level > 1 && r2->level > 1))
17636                 return 1;
17637         if (r1->types != r2->types &&
17638             !((r1->types == 0 || r1->types == RTE_ETH_RSS_IP) &&
17639               (r2->types == 0 || r2->types == RTE_ETH_RSS_IP)))
17640                 return 1;
17641         if (r1->key || r2->key) {
17642                 const void *key1 = r1->key ? r1->key : rss_hash_default_key;
17643                 const void *key2 = r2->key ? r2->key : rss_hash_default_key;
17644
17645                 if (memcmp(key1, key2, MLX5_RSS_HASH_KEY_LEN))
17646                         return 1;
17647         }
17648         return 0;
17649 }
17650
17651 /**
17652  * Validate the meter hierarchy chain for meter policy.
17653  *
17654  * @param[in] dev
17655  *   Pointer to the Ethernet device structure.
17656  * @param[in] meter_id
17657  *   Meter id.
17658  * @param[in] action_flags
17659  *   Holds the actions detected until now.
17660  * @param[out] is_rss
17661  *   Is RSS or not.
17662  * @param[out] hierarchy_domain
17663  *   The domain bitmap for hierarchy policy.
17664  * @param[out] error
17665  *   Perform verbose error reporting if not NULL. Initialized in case of
17666  *   error only.
17667  *
17668  * @return
17669  *   0 on success, otherwise negative errno value with error set.
17670  */
17671 static int
17672 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17673                                   uint32_t meter_id,
17674                                   uint64_t action_flags,
17675                                   bool *is_rss,
17676                                   uint8_t *hierarchy_domain,
17677                                   struct rte_mtr_error *error)
17678 {
17679         struct mlx5_priv *priv = dev->data->dev_private;
17680         struct mlx5_flow_meter_info *fm;
17681         struct mlx5_flow_meter_policy *policy;
17682         uint8_t cnt = 1;
17683
17684         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17685                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17686                 return -rte_mtr_error_set(error, EINVAL,
17687                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17688                                         NULL,
17689                                         "Multiple fate actions not supported.");
17690         *hierarchy_domain = 0;
17691         while (true) {
17692                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17693                 if (!fm)
17694                         return -rte_mtr_error_set(error, EINVAL,
17695                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17696                                         "Meter not found in meter hierarchy.");
17697                 if (fm->def_policy)
17698                         return -rte_mtr_error_set(error, EINVAL,
17699                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17700                         "Non termination meter not supported in hierarchy.");
17701                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17702                 MLX5_ASSERT(policy);
17703                 /**
17704                  * Only inherit the supported domains of the first meter in
17705                  * hierarchy.
17706                  * One meter supports at least one domain.
17707                  */
17708                 if (!*hierarchy_domain) {
17709                         if (policy->transfer)
17710                                 *hierarchy_domain |=
17711                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17712                         if (policy->ingress)
17713                                 *hierarchy_domain |=
17714                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17715                         if (policy->egress)
17716                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17717                 }
17718                 if (!policy->is_hierarchy) {
17719                         *is_rss = policy->is_rss;
17720                         break;
17721                 }
17722                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17723                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17724                         return -rte_mtr_error_set(error, EINVAL,
17725                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17726                                         "Exceed max hierarchy meter number.");
17727         }
17728         return 0;
17729 }
17730
17731 /**
17732  * Validate meter policy actions.
17733  * Dispatcher for action type specific validation.
17734  *
17735  * @param[in] dev
17736  *   Pointer to the Ethernet device structure.
17737  * @param[in] action
17738  *   The meter policy action object to validate.
17739  * @param[in] attr
17740  *   Attributes of flow to determine steering domain.
17741  * @param[out] error
17742  *   Perform verbose error reporting if not NULL. Initialized in case of
17743  *   error only.
17744  *
17745  * @return
17746  *   0 on success, otherwise negative errno value.
17747  */
17748 static int
17749 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17750                         const struct rte_flow_action *actions[RTE_COLORS],
17751                         struct rte_flow_attr *attr,
17752                         bool *is_rss,
17753                         uint8_t *domain_bitmap,
17754                         uint8_t *policy_mode,
17755                         struct rte_mtr_error *error)
17756 {
17757         struct mlx5_priv *priv = dev->data->dev_private;
17758         struct mlx5_sh_config *dev_conf = &priv->sh->config;
17759         const struct rte_flow_action *act;
17760         uint64_t action_flags[RTE_COLORS] = {0};
17761         int actions_n;
17762         int i, ret;
17763         struct rte_flow_error flow_err;
17764         uint8_t domain_color[RTE_COLORS] = {0};
17765         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17766         uint8_t hierarchy_domain = 0;
17767         const struct rte_flow_action_meter *mtr;
17768         bool def_green = false;
17769         bool def_yellow = false;
17770         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17771
17772         if (!dev_conf->dv_esw_en)
17773                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17774         *domain_bitmap = def_domain;
17775         /* Red color could only support DROP action. */
17776         if (!actions[RTE_COLOR_RED] ||
17777             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17778                 return -rte_mtr_error_set(error, ENOTSUP,
17779                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17780                                 NULL, "Red color only supports drop action.");
17781         /*
17782          * Check default policy actions:
17783          * Green / Yellow: no action, Red: drop action
17784          * Either G or Y will trigger default policy actions to be created.
17785          */
17786         if (!actions[RTE_COLOR_GREEN] ||
17787             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17788                 def_green = true;
17789         if (!actions[RTE_COLOR_YELLOW] ||
17790             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17791                 def_yellow = true;
17792         if (def_green && def_yellow) {
17793                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17794                 return 0;
17795         } else if (!def_green && def_yellow) {
17796                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17797         } else if (def_green && !def_yellow) {
17798                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17799         } else {
17800                 *policy_mode = MLX5_MTR_POLICY_MODE_ALL;
17801         }
17802         /* Set to empty string in case of NULL pointer access by user. */
17803         flow_err.message = "";
17804         for (i = 0; i < RTE_COLORS; i++) {
17805                 act = actions[i];
17806                 for (action_flags[i] = 0, actions_n = 0;
17807                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17808                      act++) {
17809                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17810                                 return -rte_mtr_error_set(error, ENOTSUP,
17811                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17812                                           NULL, "too many actions");
17813                         switch (act->type) {
17814                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17815                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17816                                 if (!dev_conf->dv_esw_en)
17817                                         return -rte_mtr_error_set(error,
17818                                         ENOTSUP,
17819                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17820                                         NULL, "PORT action validate check"
17821                                         " fail for ESW disable");
17822                                 ret = flow_dv_validate_action_port_id(dev,
17823                                                 action_flags[i],
17824                                                 act, attr, &flow_err);
17825                                 if (ret)
17826                                         return -rte_mtr_error_set(error,
17827                                         ENOTSUP,
17828                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17829                                         NULL, flow_err.message ?
17830                                         flow_err.message :
17831                                         "PORT action validate check fail");
17832                                 ++actions_n;
17833                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17834                                 break;
17835                         case RTE_FLOW_ACTION_TYPE_MARK:
17836                                 ret = flow_dv_validate_action_mark(dev, act,
17837                                                            action_flags[i],
17838                                                            attr, &flow_err);
17839                                 if (ret < 0)
17840                                         return -rte_mtr_error_set(error,
17841                                         ENOTSUP,
17842                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17843                                         NULL, flow_err.message ?
17844                                         flow_err.message :
17845                                         "Mark action validate check fail");
17846                                 if (dev_conf->dv_xmeta_en !=
17847                                         MLX5_XMETA_MODE_LEGACY)
17848                                         return -rte_mtr_error_set(error,
17849                                         ENOTSUP,
17850                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17851                                         NULL, "Extend MARK action is "
17852                                         "not supported. Please try use "
17853                                         "default policy for meter.");
17854                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17855                                 ++actions_n;
17856                                 break;
17857                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17858                                 ret = flow_dv_validate_action_set_tag(dev,
17859                                                         act, action_flags[i],
17860                                                         attr, &flow_err);
17861                                 if (ret)
17862                                         return -rte_mtr_error_set(error,
17863                                         ENOTSUP,
17864                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17865                                         NULL, flow_err.message ?
17866                                         flow_err.message :
17867                                         "Set tag action validate check fail");
17868                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17869                                 ++actions_n;
17870                                 break;
17871                         case RTE_FLOW_ACTION_TYPE_DROP:
17872                                 ret = mlx5_flow_validate_action_drop
17873                                         (action_flags[i], attr, &flow_err);
17874                                 if (ret < 0)
17875                                         return -rte_mtr_error_set(error,
17876                                         ENOTSUP,
17877                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17878                                         NULL, flow_err.message ?
17879                                         flow_err.message :
17880                                         "Drop action validate check fail");
17881                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17882                                 ++actions_n;
17883                                 break;
17884                         case RTE_FLOW_ACTION_TYPE_QUEUE:
17885                                 /*
17886                                  * Check whether extensive
17887                                  * metadata feature is engaged.
17888                                  */
17889                                 if (dev_conf->dv_flow_en &&
17890                                     (dev_conf->dv_xmeta_en !=
17891                                      MLX5_XMETA_MODE_LEGACY) &&
17892                                     mlx5_flow_ext_mreg_supported(dev))
17893                                         return -rte_mtr_error_set(error,
17894                                           ENOTSUP,
17895                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17896                                           NULL, "Queue action with meta "
17897                                           "is not supported. Please try use "
17898                                           "default policy for meter.");
17899                                 ret = mlx5_flow_validate_action_queue(act,
17900                                                         action_flags[i], dev,
17901                                                         attr, &flow_err);
17902                                 if (ret < 0)
17903                                         return -rte_mtr_error_set(error,
17904                                           ENOTSUP,
17905                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17906                                           NULL, flow_err.message ?
17907                                           flow_err.message :
17908                                           "Queue action validate check fail");
17909                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17910                                 ++actions_n;
17911                                 break;
17912                         case RTE_FLOW_ACTION_TYPE_RSS:
17913                                 if (dev_conf->dv_flow_en &&
17914                                     (dev_conf->dv_xmeta_en !=
17915                                      MLX5_XMETA_MODE_LEGACY) &&
17916                                     mlx5_flow_ext_mreg_supported(dev))
17917                                         return -rte_mtr_error_set(error,
17918                                           ENOTSUP,
17919                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17920                                           NULL, "RSS action with meta "
17921                                           "is not supported. Please try use "
17922                                           "default policy for meter.");
17923                                 ret = mlx5_validate_action_rss(dev, act,
17924                                                                &flow_err);
17925                                 if (ret < 0)
17926                                         return -rte_mtr_error_set(error,
17927                                           ENOTSUP,
17928                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17929                                           NULL, flow_err.message ?
17930                                           flow_err.message :
17931                                           "RSS action validate check fail");
17932                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17933                                 ++actions_n;
17934                                 /* Either G or Y will set the RSS. */
17935                                 rss_color[i] = act->conf;
17936                                 break;
17937                         case RTE_FLOW_ACTION_TYPE_JUMP:
17938                                 ret = flow_dv_validate_action_jump(dev,
17939                                         NULL, act, action_flags[i],
17940                                         attr, true, &flow_err);
17941                                 if (ret)
17942                                         return -rte_mtr_error_set(error,
17943                                           ENOTSUP,
17944                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17945                                           NULL, flow_err.message ?
17946                                           flow_err.message :
17947                                           "Jump action validate check fail");
17948                                 ++actions_n;
17949                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17950                                 break;
17951                         /*
17952                          * Only the last meter in the hierarchy will support
17953                          * the YELLOW color steering. Then in the meter policy
17954                          * actions list, there should be no other meter inside.
17955                          */
17956                         case RTE_FLOW_ACTION_TYPE_METER:
17957                                 if (i != RTE_COLOR_GREEN)
17958                                         return -rte_mtr_error_set(error,
17959                                                 ENOTSUP,
17960                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17961                                                 NULL,
17962                                                 "Meter hierarchy only supports GREEN color.");
17963                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17964                                         return -rte_mtr_error_set(error,
17965                                                 ENOTSUP,
17966                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17967                                                 NULL,
17968                                                 "No yellow policy should be provided in meter hierarchy.");
17969                                 mtr = act->conf;
17970                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17971                                                         mtr->mtr_id,
17972                                                         action_flags[i],
17973                                                         is_rss,
17974                                                         &hierarchy_domain,
17975                                                         error);
17976                                 if (ret)
17977                                         return ret;
17978                                 ++actions_n;
17979                                 action_flags[i] |=
17980                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17981                                 break;
17982                         default:
17983                                 return -rte_mtr_error_set(error, ENOTSUP,
17984                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17985                                         NULL,
17986                                         "Doesn't support optional action");
17987                         }
17988                 }
17989                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
17990                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17991                 } else if ((action_flags[i] &
17992                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17993                           (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
17994                         /*
17995                          * Only support MLX5_XMETA_MODE_LEGACY
17996                          * so MARK action is only in ingress domain.
17997                          */
17998                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17999                 } else {
18000                         domain_color[i] = def_domain;
18001                         if (action_flags[i] &&
18002                             !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18003                                 domain_color[i] &=
18004                                 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
18005                 }
18006                 if (action_flags[i] &
18007                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
18008                         domain_color[i] &= hierarchy_domain;
18009                 /*
18010                  * Non-termination actions only support NIC Tx domain.
18011                  * The adjustion should be skipped when there is no
18012                  * action or only END is provided. The default domains
18013                  * bit-mask is set to find the MIN intersection.
18014                  * The action flags checking should also be skipped.
18015                  */
18016                 if ((def_green && i == RTE_COLOR_GREEN) ||
18017                     (def_yellow && i == RTE_COLOR_YELLOW))
18018                         continue;
18019                 /*
18020                  * Validate the drop action mutual exclusion
18021                  * with other actions. Drop action is mutually-exclusive
18022                  * with any other action, except for Count action.
18023                  */
18024                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
18025                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
18026                         return -rte_mtr_error_set(error, ENOTSUP,
18027                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18028                                 NULL, "Drop action is mutually-exclusive "
18029                                 "with any other action");
18030                 }
18031                 /* Eswitch has few restrictions on using items and actions */
18032                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
18033                         if (!mlx5_flow_ext_mreg_supported(dev) &&
18034                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
18035                                 return -rte_mtr_error_set(error, ENOTSUP,
18036                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18037                                         NULL, "unsupported action MARK");
18038                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
18039                                 return -rte_mtr_error_set(error, ENOTSUP,
18040                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18041                                         NULL, "unsupported action QUEUE");
18042                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
18043                                 return -rte_mtr_error_set(error, ENOTSUP,
18044                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18045                                         NULL, "unsupported action RSS");
18046                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18047                                 return -rte_mtr_error_set(error, ENOTSUP,
18048                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18049                                         NULL, "no fate action is found");
18050                 } else {
18051                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
18052                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
18053                                 if ((domain_color[i] &
18054                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
18055                                         domain_color[i] =
18056                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
18057                                 else
18058                                         return -rte_mtr_error_set(error,
18059                                                 ENOTSUP,
18060                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18061                                                 NULL,
18062                                                 "no fate action is found");
18063                         }
18064                 }
18065         }
18066         /* If both colors have RSS, the attributes should be the same. */
18067         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
18068                                            rss_color[RTE_COLOR_YELLOW]))
18069                 return -rte_mtr_error_set(error, EINVAL,
18070                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18071                                           NULL, "policy RSS attr conflict");
18072         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
18073                 *is_rss = true;
18074         /* "domain_color[C]" is non-zero for each color, default is ALL. */
18075         if (!def_green && !def_yellow &&
18076             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
18077             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
18078             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
18079                 return -rte_mtr_error_set(error, EINVAL,
18080                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18081                                           NULL, "policy domains conflict");
18082         /*
18083          * At least one color policy is listed in the actions, the domains
18084          * to be supported should be the intersection.
18085          */
18086         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
18087                          domain_color[RTE_COLOR_YELLOW];
18088         return 0;
18089 }
18090
18091 static int
18092 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
18093 {
18094         struct mlx5_priv *priv = dev->data->dev_private;
18095         int ret = 0;
18096
18097         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
18098                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
18099                                                 flags);
18100                 if (ret != 0)
18101                         return ret;
18102         }
18103         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
18104                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
18105                 if (ret != 0)
18106                         return ret;
18107         }
18108         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
18109                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
18110                 if (ret != 0)
18111                         return ret;
18112         }
18113         return 0;
18114 }
18115
18116 /**
18117  * Discover the number of available flow priorities
18118  * by trying to create a flow with the highest priority value
18119  * for each possible number.
18120  *
18121  * @param[in] dev
18122  *   Ethernet device.
18123  * @param[in] vprio
18124  *   List of possible number of available priorities.
18125  * @param[in] vprio_n
18126  *   Size of @p vprio array.
18127  * @return
18128  *   On success, number of available flow priorities.
18129  *   On failure, a negative errno-style code and rte_errno is set.
18130  */
18131 static int
18132 flow_dv_discover_priorities(struct rte_eth_dev *dev,
18133                             const uint16_t *vprio, int vprio_n)
18134 {
18135         struct mlx5_priv *priv = dev->data->dev_private;
18136         struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
18137         struct rte_flow_item_eth eth;
18138         struct rte_flow_item item = {
18139                 .type = RTE_FLOW_ITEM_TYPE_ETH,
18140                 .spec = &eth,
18141                 .mask = &eth,
18142         };
18143         struct mlx5_flow_dv_matcher matcher = {
18144                 .mask = {
18145                         .size = sizeof(matcher.mask.buf),
18146                 },
18147         };
18148         union mlx5_flow_tbl_key tbl_key;
18149         struct mlx5_flow flow;
18150         void *action;
18151         struct rte_flow_error error;
18152         uint8_t misc_mask;
18153         int i, err, ret = -ENOTSUP;
18154
18155         /*
18156          * Prepare a flow with a catch-all pattern and a drop action.
18157          * Use drop queue, because shared drop action may be unavailable.
18158          */
18159         action = priv->drop_queue.hrxq->action;
18160         if (action == NULL) {
18161                 DRV_LOG(ERR, "Priority discovery requires a drop action");
18162                 rte_errno = ENOTSUP;
18163                 return -rte_errno;
18164         }
18165         memset(&flow, 0, sizeof(flow));
18166         flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
18167         if (flow.handle == NULL) {
18168                 DRV_LOG(ERR, "Cannot create flow handle");
18169                 rte_errno = ENOMEM;
18170                 return -rte_errno;
18171         }
18172         flow.ingress = true;
18173         flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
18174         flow.dv.actions[0] = action;
18175         flow.dv.actions_n = 1;
18176         memset(&eth, 0, sizeof(eth));
18177         flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
18178                                    &item, /* inner */ false, /* group */ 0);
18179         matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
18180         for (i = 0; i < vprio_n; i++) {
18181                 /* Configure the next proposed maximum priority. */
18182                 matcher.priority = vprio[i] - 1;
18183                 memset(&tbl_key, 0, sizeof(tbl_key));
18184                 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18185                                                /* tunnel */ NULL,
18186                                                /* group */ 0,
18187                                                &error);
18188                 if (err != 0) {
18189                         /* This action is pure SW and must always succeed. */
18190                         DRV_LOG(ERR, "Cannot register matcher");
18191                         ret = -rte_errno;
18192                         break;
18193                 }
18194                 /* Try to apply the flow to HW. */
18195                 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18196                 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18197                 err = mlx5_flow_os_create_flow
18198                                 (flow.handle->dvh.matcher->matcher_object,
18199                                  (void *)&flow.dv.value, flow.dv.actions_n,
18200                                  flow.dv.actions, &flow.handle->drv_flow);
18201                 if (err == 0) {
18202                         claim_zero(mlx5_flow_os_destroy_flow
18203                                                 (flow.handle->drv_flow));
18204                         flow.handle->drv_flow = NULL;
18205                 }
18206                 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18207                 if (err != 0)
18208                         break;
18209                 ret = vprio[i];
18210         }
18211         mlx5_ipool_free(pool, flow.handle_idx);
18212         /* Set rte_errno if no expected priority value matched. */
18213         if (ret < 0)
18214                 rte_errno = -ret;
18215         return ret;
18216 }
18217
18218 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18219         .validate = flow_dv_validate,
18220         .prepare = flow_dv_prepare,
18221         .translate = flow_dv_translate,
18222         .apply = flow_dv_apply,
18223         .remove = flow_dv_remove,
18224         .destroy = flow_dv_destroy,
18225         .query = flow_dv_query,
18226         .create_mtr_tbls = flow_dv_create_mtr_tbls,
18227         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18228         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18229         .create_meter = flow_dv_mtr_alloc,
18230         .free_meter = flow_dv_aso_mtr_release_to_pool,
18231         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18232         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18233         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18234         .create_policy_rules = flow_dv_create_policy_rules,
18235         .destroy_policy_rules = flow_dv_destroy_policy_rules,
18236         .create_def_policy = flow_dv_create_def_policy,
18237         .destroy_def_policy = flow_dv_destroy_def_policy,
18238         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18239         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18240         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18241         .counter_alloc = flow_dv_counter_allocate,
18242         .counter_free = flow_dv_counter_free,
18243         .counter_query = flow_dv_counter_query,
18244         .get_aged_flows = flow_dv_get_aged_flows,
18245         .action_validate = flow_dv_action_validate,
18246         .action_create = flow_dv_action_create,
18247         .action_destroy = flow_dv_action_destroy,
18248         .action_update = flow_dv_action_update,
18249         .action_query = flow_dv_action_query,
18250         .sync_domain = flow_dv_sync_domain,
18251         .discover_priorities = flow_dv_discover_priorities,
18252         .item_create = flow_dv_item_create,
18253         .item_release = flow_dv_item_release,
18254 };
18255
18256 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
18257