drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_bus_pci.h>
  19 #include <rte_ip.h>
  20 #include <rte_gre.h>
  21 #include <rte_vxlan.h>
  22 #include <rte_gtp.h>
  23 #include <rte_eal_paging.h>
  24 #include <rte_mpls.h>
  25 #include <rte_mtr.h>
  26 #include <rte_mtr_driver.h>
  27 #include <rte_tailq.h>
  28
  29 #include <mlx5_glue.h>
  30 #include <mlx5_devx_cmds.h>
  31 #include <mlx5_prm.h>
  32 #include <mlx5_malloc.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_common_os.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_flow_os.h"
  39 #include "mlx5_rx.h"
  40 #include "mlx5_tx.h"
  41 #include "rte_pmd_mlx5.h"
  42
  43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  44
  45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR_ESWITCH
  50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  52 #endif
  53 #endif
  54
  55 #ifndef HAVE_MLX5DV_DR
  56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  57 #endif
  58
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 static int
  79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  80                              struct mlx5_flow_tbl_resource *tbl);
  81
  82 static int
  83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  84                                      uint32_t encap_decap_idx);
  85
  86 static int
  87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  88                                         uint32_t port_id);
  89 static void
  90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  91
  92 static int
  93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  94                                   uint32_t rix_jump);
  95
  96 static inline uint16_t
  97 mlx5_translate_tunnel_etypes(uint64_t pattern_flags)
  98 {
  99         if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
 100                 return RTE_ETHER_TYPE_TEB;
 101         else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
 102                 return RTE_ETHER_TYPE_IPV4;
 103         else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
 104                 return RTE_ETHER_TYPE_IPV6;
 105         else if (pattern_flags & MLX5_FLOW_LAYER_MPLS)
 106                 return RTE_ETHER_TYPE_MPLS;
 107         return 0;
 108 }
 109
 110 static int16_t
 111 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
 112 {
 113         struct mlx5_priv *priv = dev->data->dev_private;
 114
 115         if (priv->pci_dev == NULL)
 116                 return 0;
 117         switch (priv->pci_dev->id.device_id) {
 118         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
 119         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
 120         case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
 121                 return (int16_t)0xfffe;
 122         default:
 123                 return 0;
 124         }
 125 }
 126
 127 /**
 128  * Initialize flow attributes structure according to flow items' types.
 129  *
 130  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
 131  * mode. For tunnel mode, the items to be modified are the outermost ones.
 132  *
 133  * @param[in] item
 134  *   Pointer to item specification.
 135  * @param[out] attr
 136  *   Pointer to flow attributes structure.
 137  * @param[in] dev_flow
 138  *   Pointer to the sub flow.
 139  * @param[in] tunnel_decap
 140  *   Whether action is after tunnel decapsulation.
 141  */
 142 static void
 143 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 144                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 145 {
 146         uint64_t layers = dev_flow->handle->layers;
 147
 148         /*
 149          * If layers is already initialized, it means this dev_flow is the
 150          * suffix flow, the layers flags is set by the prefix flow. Need to
 151          * use the layer flags from prefix flow as the suffix flow may not
 152          * have the user defined items as the flow is split.
 153          */
 154         if (layers) {
 155                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 156                         attr->ipv4 = 1;
 157                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 158                         attr->ipv6 = 1;
 159                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 160                         attr->tcp = 1;
 161                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 162                         attr->udp = 1;
 163                 attr->valid = 1;
 164                 return;
 165         }
 166         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 167                 uint8_t next_protocol = 0xff;
 168                 switch (item->type) {
 169                 case RTE_FLOW_ITEM_TYPE_GRE:
 170                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 171                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 172                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 173                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 174                 case RTE_FLOW_ITEM_TYPE_MPLS:
 175                         if (tunnel_decap)
 176                                 attr->attr = 0;
 177                         break;
 178                 case RTE_FLOW_ITEM_TYPE_IPV4:
 179                         if (!attr->ipv6)
 180                                 attr->ipv4 = 1;
 181                         if (item->mask != NULL &&
 182                             ((const struct rte_flow_item_ipv4 *)
 183                             item->mask)->hdr.next_proto_id)
 184                                 next_protocol =
 185                                     ((const struct rte_flow_item_ipv4 *)
 186                                       (item->spec))->hdr.next_proto_id &
 187                                     ((const struct rte_flow_item_ipv4 *)
 188                                       (item->mask))->hdr.next_proto_id;
 189                         if ((next_protocol == IPPROTO_IPIP ||
 190                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 191                                 attr->attr = 0;
 192                         break;
 193                 case RTE_FLOW_ITEM_TYPE_IPV6:
 194                         if (!attr->ipv4)
 195                                 attr->ipv6 = 1;
 196                         if (item->mask != NULL &&
 197                             ((const struct rte_flow_item_ipv6 *)
 198                             item->mask)->hdr.proto)
 199                                 next_protocol =
 200                                     ((const struct rte_flow_item_ipv6 *)
 201                                       (item->spec))->hdr.proto &
 202                                     ((const struct rte_flow_item_ipv6 *)
 203                                       (item->mask))->hdr.proto;
 204                         if ((next_protocol == IPPROTO_IPIP ||
 205                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 206                                 attr->attr = 0;
 207                         break;
 208                 case RTE_FLOW_ITEM_TYPE_UDP:
 209                         if (!attr->tcp)
 210                                 attr->udp = 1;
 211                         break;
 212                 case RTE_FLOW_ITEM_TYPE_TCP:
 213                         if (!attr->udp)
 214                                 attr->tcp = 1;
 215                         break;
 216                 default:
 217                         break;
 218                 }
 219         }
 220         attr->valid = 1;
 221 }
 222
 223 /*
 224  * Convert rte_mtr_color to mlx5 color.
 225  *
 226  * @param[in] rcol
 227  *   rte_mtr_color.
 228  *
 229  * @return
 230  *   mlx5 color.
 231  */
 232 static inline int
 233 rte_col_2_mlx5_col(enum rte_color rcol)
 234 {
 235         switch (rcol) {
 236         case RTE_COLOR_GREEN:
 237                 return MLX5_FLOW_COLOR_GREEN;
 238         case RTE_COLOR_YELLOW:
 239                 return MLX5_FLOW_COLOR_YELLOW;
 240         case RTE_COLOR_RED:
 241                 return MLX5_FLOW_COLOR_RED;
 242         default:
 243                 break;
 244         }
 245         return MLX5_FLOW_COLOR_UNDEFINED;
 246 }
 247
 248 struct field_modify_info {
 249         uint32_t size; /* Size of field in protocol header, in bytes. */
 250         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 251         enum mlx5_modification_field id;
 252 };
 253
 254 struct field_modify_info modify_eth[] = {
 255         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 256         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 257         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 258         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 259         {0, 0, 0},
 260 };
 261
 262 struct field_modify_info modify_vlan_out_first_vid[] = {
 263         /* Size in bits !!! */
 264         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 265         {0, 0, 0},
 266 };
 267
 268 struct field_modify_info modify_ipv4[] = {
 269         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 270         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 271         {4, 12, MLX5_MODI_OUT_SIPV4},
 272         {4, 16, MLX5_MODI_OUT_DIPV4},
 273         {0, 0, 0},
 274 };
 275
 276 struct field_modify_info modify_ipv6[] = {
 277         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 278         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 279         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 280         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 281         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 282         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 283         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 284         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 285         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 286         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 287         {0, 0, 0},
 288 };
 289
 290 struct field_modify_info modify_udp[] = {
 291         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 292         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 293         {0, 0, 0},
 294 };
 295
 296 struct field_modify_info modify_tcp[] = {
 297         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 298         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 299         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 300         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 301         {0, 0, 0},
 302 };
 303
 304 static void
 305 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 306                           uint8_t next_protocol, uint64_t *item_flags,
 307                           int *tunnel)
 308 {
 309         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 310                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 311         if (next_protocol == IPPROTO_IPIP) {
 312                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 313                 *tunnel = 1;
 314         }
 315         if (next_protocol == IPPROTO_IPV6) {
 316                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 317                 *tunnel = 1;
 318         }
 319 }
 320
 321 static inline struct mlx5_hlist *
 322 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 323                      const char *name, uint32_t size, bool direct_key,
 324                      bool lcores_share, void *ctx,
 325                      mlx5_list_create_cb cb_create,
 326                      mlx5_list_match_cb cb_match,
 327                      mlx5_list_remove_cb cb_remove,
 328                      mlx5_list_clone_cb cb_clone,
 329                      mlx5_list_clone_free_cb cb_clone_free)
 330 {
 331         struct mlx5_hlist *hl;
 332         struct mlx5_hlist *expected = NULL;
 333         char s[MLX5_NAME_SIZE];
 334
 335         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 336         if (likely(hl))
 337                 return hl;
 338         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 339         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 340                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 341                         cb_clone_free);
 342         if (!hl) {
 343                 DRV_LOG(ERR, "%s hash creation failed", name);
 344                 rte_errno = ENOMEM;
 345                 return NULL;
 346         }
 347         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 348                                          __ATOMIC_SEQ_CST,
 349                                          __ATOMIC_SEQ_CST)) {
 350                 mlx5_hlist_destroy(hl);
 351                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 352         }
 353         return hl;
 354 }
 355
 356 /* Update VLAN's VID/PCP based on input rte_flow_action.
 357  *
 358  * @param[in] action
 359  *   Pointer to struct rte_flow_action.
 360  * @param[out] vlan
 361  *   Pointer to struct rte_vlan_hdr.
 362  */
 363 static void
 364 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 365                          struct rte_vlan_hdr *vlan)
 366 {
 367         uint16_t vlan_tci;
 368         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 369                 vlan_tci =
 370                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 371                                                action->conf)->vlan_pcp;
 372                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 373                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 374                 vlan->vlan_tci |= vlan_tci;
 375         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 376                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 377                 vlan->vlan_tci |= rte_be_to_cpu_16
 378                     (((const struct rte_flow_action_of_set_vlan_vid *)
 379                                              action->conf)->vlan_vid);
 380         }
 381 }
 382
 383 /**
 384  * Fetch 1, 2, 3 or 4 byte field from the byte array
 385  * and return as unsigned integer in host-endian format.
 386  *
 387  * @param[in] data
 388  *   Pointer to data array.
 389  * @param[in] size
 390  *   Size of field to extract.
 391  *
 392  * @return
 393  *   converted field in host endian format.
 394  */
 395 static inline uint32_t
 396 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 397 {
 398         uint32_t ret;
 399
 400         switch (size) {
 401         case 1:
 402                 ret = *data;
 403                 break;
 404         case 2:
 405                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 406                 break;
 407         case 3:
 408                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 409                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 410                 break;
 411         case 4:
 412                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 413                 break;
 414         default:
 415                 MLX5_ASSERT(false);
 416                 ret = 0;
 417                 break;
 418         }
 419         return ret;
 420 }
 421
 422 /**
 423  * Convert modify-header action to DV specification.
 424  *
 425  * Data length of each action is determined by provided field description
 426  * and the item mask. Data bit offset and width of each action is determined
 427  * by provided item mask.
 428  *
 429  * @param[in] item
 430  *   Pointer to item specification.
 431  * @param[in] field
 432  *   Pointer to field modification information.
 433  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 434  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 435  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 436  * @param[in] dcopy
 437  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 438  *   Negative offset value sets the same offset as source offset.
 439  *   size field is ignored, value is taken from source field.
 440  * @param[in,out] resource
 441  *   Pointer to the modify-header resource.
 442  * @param[in] type
 443  *   Type of modification.
 444  * @param[out] error
 445  *   Pointer to the error structure.
 446  *
 447  * @return
 448  *   0 on success, a negative errno value otherwise and rte_errno is set.
 449  */
 450 static int
 451 flow_dv_convert_modify_action(struct rte_flow_item *item,
 452                               struct field_modify_info *field,
 453                               struct field_modify_info *dcopy,
 454                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 455                               uint32_t type, struct rte_flow_error *error)
 456 {
 457         uint32_t i = resource->actions_num;
 458         struct mlx5_modification_cmd *actions = resource->actions;
 459         uint32_t carry_b = 0;
 460
 461         /*
 462          * The item and mask are provided in big-endian format.
 463          * The fields should be presented as in big-endian format either.
 464          * Mask must be always present, it defines the actual field width.
 465          */
 466         MLX5_ASSERT(item->mask);
 467         MLX5_ASSERT(field->size);
 468         do {
 469                 uint32_t size_b;
 470                 uint32_t off_b;
 471                 uint32_t mask;
 472                 uint32_t data;
 473                 bool next_field = true;
 474                 bool next_dcopy = true;
 475
 476                 if (i >= MLX5_MAX_MODIFY_NUM)
 477                         return rte_flow_error_set(error, EINVAL,
 478                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 479                                  "too many items to modify");
 480                 /* Fetch variable byte size mask from the array. */
 481                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 482                                            field->offset, field->size);
 483                 if (!mask) {
 484                         ++field;
 485                         continue;
 486                 }
 487                 /* Deduce actual data width in bits from mask value. */
 488                 off_b = rte_bsf32(mask) + carry_b;
 489                 size_b = sizeof(uint32_t) * CHAR_BIT -
 490                          off_b - __builtin_clz(mask);
 491                 MLX5_ASSERT(size_b);
 492                 actions[i] = (struct mlx5_modification_cmd) {
 493                         .action_type = type,
 494                         .field = field->id,
 495                         .offset = off_b,
 496                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 497                                 0 : size_b,
 498                 };
 499                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 500                         MLX5_ASSERT(dcopy);
 501                         actions[i].dst_field = dcopy->id;
 502                         actions[i].dst_offset =
 503                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 504                         /* Convert entire record to big-endian format. */
 505                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 506                         /*
 507                          * Destination field overflow. Copy leftovers of
 508                          * a source field to the next destination field.
 509                          */
 510                         carry_b = 0;
 511                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 512                             dcopy->size != 0) {
 513                                 actions[i].length =
 514                                         dcopy->size * CHAR_BIT - dcopy->offset;
 515                                 carry_b = actions[i].length;
 516                                 next_field = false;
 517                         }
 518                         /*
 519                          * Not enough bits in a source filed to fill a
 520                          * destination field. Switch to the next source.
 521                          */
 522                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 523                             (size_b == field->size * CHAR_BIT - off_b)) {
 524                                 actions[i].length =
 525                                         field->size * CHAR_BIT - off_b;
 526                                 dcopy->offset += actions[i].length;
 527                                 next_dcopy = false;
 528                         }
 529                         if (next_dcopy)
 530                                 ++dcopy;
 531                 } else {
 532                         MLX5_ASSERT(item->spec);
 533                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 534                                                    field->offset, field->size);
 535                         /* Shift out the trailing masked bits from data. */
 536                         data = (data & mask) >> off_b;
 537                         actions[i].data1 = rte_cpu_to_be_32(data);
 538                 }
 539                 /* Convert entire record to expected big-endian format. */
 540                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 541                 if (next_field)
 542                         ++field;
 543                 ++i;
 544         } while (field->size);
 545         if (resource->actions_num == i)
 546                 return rte_flow_error_set(error, EINVAL,
 547                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 548                                           "invalid modification flow item");
 549         resource->actions_num = i;
 550         return 0;
 551 }
 552
 553 /**
 554  * Convert modify-header set IPv4 address action to DV specification.
 555  *
 556  * @param[in,out] resource
 557  *   Pointer to the modify-header resource.
 558  * @param[in] action
 559  *   Pointer to action specification.
 560  * @param[out] error
 561  *   Pointer to the error structure.
 562  *
 563  * @return
 564  *   0 on success, a negative errno value otherwise and rte_errno is set.
 565  */
 566 static int
 567 flow_dv_convert_action_modify_ipv4
 568                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 569                          const struct rte_flow_action *action,
 570                          struct rte_flow_error *error)
 571 {
 572         const struct rte_flow_action_set_ipv4 *conf =
 573                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 574         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 575         struct rte_flow_item_ipv4 ipv4;
 576         struct rte_flow_item_ipv4 ipv4_mask;
 577
 578         memset(&ipv4, 0, sizeof(ipv4));
 579         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 580         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 581                 ipv4.hdr.src_addr = conf->ipv4_addr;
 582                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 583         } else {
 584                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 585                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 586         }
 587         item.spec = &ipv4;
 588         item.mask = &ipv4_mask;
 589         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 590                                              MLX5_MODIFICATION_TYPE_SET, error);
 591 }
 592
 593 /**
 594  * Convert modify-header set IPv6 address action to DV specification.
 595  *
 596  * @param[in,out] resource
 597  *   Pointer to the modify-header resource.
 598  * @param[in] action
 599  *   Pointer to action specification.
 600  * @param[out] error
 601  *   Pointer to the error structure.
 602  *
 603  * @return
 604  *   0 on success, a negative errno value otherwise and rte_errno is set.
 605  */
 606 static int
 607 flow_dv_convert_action_modify_ipv6
 608                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 609                          const struct rte_flow_action *action,
 610                          struct rte_flow_error *error)
 611 {
 612         const struct rte_flow_action_set_ipv6 *conf =
 613                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 614         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 615         struct rte_flow_item_ipv6 ipv6;
 616         struct rte_flow_item_ipv6 ipv6_mask;
 617
 618         memset(&ipv6, 0, sizeof(ipv6));
 619         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 620         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 621                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 622                        sizeof(ipv6.hdr.src_addr));
 623                 memcpy(&ipv6_mask.hdr.src_addr,
 624                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 625                        sizeof(ipv6.hdr.src_addr));
 626         } else {
 627                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 628                        sizeof(ipv6.hdr.dst_addr));
 629                 memcpy(&ipv6_mask.hdr.dst_addr,
 630                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 631                        sizeof(ipv6.hdr.dst_addr));
 632         }
 633         item.spec = &ipv6;
 634         item.mask = &ipv6_mask;
 635         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 636                                              MLX5_MODIFICATION_TYPE_SET, error);
 637 }
 638
 639 /**
 640  * Convert modify-header set MAC address action to DV specification.
 641  *
 642  * @param[in,out] resource
 643  *   Pointer to the modify-header resource.
 644  * @param[in] action
 645  *   Pointer to action specification.
 646  * @param[out] error
 647  *   Pointer to the error structure.
 648  *
 649  * @return
 650  *   0 on success, a negative errno value otherwise and rte_errno is set.
 651  */
 652 static int
 653 flow_dv_convert_action_modify_mac
 654                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 655                          const struct rte_flow_action *action,
 656                          struct rte_flow_error *error)
 657 {
 658         const struct rte_flow_action_set_mac *conf =
 659                 (const struct rte_flow_action_set_mac *)(action->conf);
 660         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 661         struct rte_flow_item_eth eth;
 662         struct rte_flow_item_eth eth_mask;
 663
 664         memset(&eth, 0, sizeof(eth));
 665         memset(&eth_mask, 0, sizeof(eth_mask));
 666         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 667                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 668                        sizeof(eth.src.addr_bytes));
 669                 memcpy(&eth_mask.src.addr_bytes,
 670                        &rte_flow_item_eth_mask.src.addr_bytes,
 671                        sizeof(eth_mask.src.addr_bytes));
 672         } else {
 673                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 674                        sizeof(eth.dst.addr_bytes));
 675                 memcpy(&eth_mask.dst.addr_bytes,
 676                        &rte_flow_item_eth_mask.dst.addr_bytes,
 677                        sizeof(eth_mask.dst.addr_bytes));
 678         }
 679         item.spec = &eth;
 680         item.mask = &eth_mask;
 681         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 682                                              MLX5_MODIFICATION_TYPE_SET, error);
 683 }
 684
 685 /**
 686  * Convert modify-header set VLAN VID action to DV specification.
 687  *
 688  * @param[in,out] resource
 689  *   Pointer to the modify-header resource.
 690  * @param[in] action
 691  *   Pointer to action specification.
 692  * @param[out] error
 693  *   Pointer to the error structure.
 694  *
 695  * @return
 696  *   0 on success, a negative errno value otherwise and rte_errno is set.
 697  */
 698 static int
 699 flow_dv_convert_action_modify_vlan_vid
 700                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 701                          const struct rte_flow_action *action,
 702                          struct rte_flow_error *error)
 703 {
 704         const struct rte_flow_action_of_set_vlan_vid *conf =
 705                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 706         int i = resource->actions_num;
 707         struct mlx5_modification_cmd *actions = resource->actions;
 708         struct field_modify_info *field = modify_vlan_out_first_vid;
 709
 710         if (i >= MLX5_MAX_MODIFY_NUM)
 711                 return rte_flow_error_set(error, EINVAL,
 712                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 713                          "too many items to modify");
 714         actions[i] = (struct mlx5_modification_cmd) {
 715                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 716                 .field = field->id,
 717                 .length = field->size,
 718                 .offset = field->offset,
 719         };
 720         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 721         actions[i].data1 = conf->vlan_vid;
 722         actions[i].data1 = actions[i].data1 << 16;
 723         resource->actions_num = ++i;
 724         return 0;
 725 }
 726
 727 /**
 728  * Convert modify-header set TP action to DV specification.
 729  *
 730  * @param[in,out] resource
 731  *   Pointer to the modify-header resource.
 732  * @param[in] action
 733  *   Pointer to action specification.
 734  * @param[in] items
 735  *   Pointer to rte_flow_item objects list.
 736  * @param[in] attr
 737  *   Pointer to flow attributes structure.
 738  * @param[in] dev_flow
 739  *   Pointer to the sub flow.
 740  * @param[in] tunnel_decap
 741  *   Whether action is after tunnel decapsulation.
 742  * @param[out] error
 743  *   Pointer to the error structure.
 744  *
 745  * @return
 746  *   0 on success, a negative errno value otherwise and rte_errno is set.
 747  */
 748 static int
 749 flow_dv_convert_action_modify_tp
 750                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 751                          const struct rte_flow_action *action,
 752                          const struct rte_flow_item *items,
 753                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 754                          bool tunnel_decap, struct rte_flow_error *error)
 755 {
 756         const struct rte_flow_action_set_tp *conf =
 757                 (const struct rte_flow_action_set_tp *)(action->conf);
 758         struct rte_flow_item item;
 759         struct rte_flow_item_udp udp;
 760         struct rte_flow_item_udp udp_mask;
 761         struct rte_flow_item_tcp tcp;
 762         struct rte_flow_item_tcp tcp_mask;
 763         struct field_modify_info *field;
 764
 765         if (!attr->valid)
 766                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 767         if (attr->udp) {
 768                 memset(&udp, 0, sizeof(udp));
 769                 memset(&udp_mask, 0, sizeof(udp_mask));
 770                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 771                         udp.hdr.src_port = conf->port;
 772                         udp_mask.hdr.src_port =
 773                                         rte_flow_item_udp_mask.hdr.src_port;
 774                 } else {
 775                         udp.hdr.dst_port = conf->port;
 776                         udp_mask.hdr.dst_port =
 777                                         rte_flow_item_udp_mask.hdr.dst_port;
 778                 }
 779                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 780                 item.spec = &udp;
 781                 item.mask = &udp_mask;
 782                 field = modify_udp;
 783         } else {
 784                 MLX5_ASSERT(attr->tcp);
 785                 memset(&tcp, 0, sizeof(tcp));
 786                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 787                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 788                         tcp.hdr.src_port = conf->port;
 789                         tcp_mask.hdr.src_port =
 790                                         rte_flow_item_tcp_mask.hdr.src_port;
 791                 } else {
 792                         tcp.hdr.dst_port = conf->port;
 793                         tcp_mask.hdr.dst_port =
 794                                         rte_flow_item_tcp_mask.hdr.dst_port;
 795                 }
 796                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 797                 item.spec = &tcp;
 798                 item.mask = &tcp_mask;
 799                 field = modify_tcp;
 800         }
 801         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 802                                              MLX5_MODIFICATION_TYPE_SET, error);
 803 }
 804
 805 /**
 806  * Convert modify-header set TTL action to DV specification.
 807  *
 808  * @param[in,out] resource
 809  *   Pointer to the modify-header resource.
 810  * @param[in] action
 811  *   Pointer to action specification.
 812  * @param[in] items
 813  *   Pointer to rte_flow_item objects list.
 814  * @param[in] attr
 815  *   Pointer to flow attributes structure.
 816  * @param[in] dev_flow
 817  *   Pointer to the sub flow.
 818  * @param[in] tunnel_decap
 819  *   Whether action is after tunnel decapsulation.
 820  * @param[out] error
 821  *   Pointer to the error structure.
 822  *
 823  * @return
 824  *   0 on success, a negative errno value otherwise and rte_errno is set.
 825  */
 826 static int
 827 flow_dv_convert_action_modify_ttl
 828                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 829                          const struct rte_flow_action *action,
 830                          const struct rte_flow_item *items,
 831                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 832                          bool tunnel_decap, struct rte_flow_error *error)
 833 {
 834         const struct rte_flow_action_set_ttl *conf =
 835                 (const struct rte_flow_action_set_ttl *)(action->conf);
 836         struct rte_flow_item item;
 837         struct rte_flow_item_ipv4 ipv4;
 838         struct rte_flow_item_ipv4 ipv4_mask;
 839         struct rte_flow_item_ipv6 ipv6;
 840         struct rte_flow_item_ipv6 ipv6_mask;
 841         struct field_modify_info *field;
 842
 843         if (!attr->valid)
 844                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 845         if (attr->ipv4) {
 846                 memset(&ipv4, 0, sizeof(ipv4));
 847                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 848                 ipv4.hdr.time_to_live = conf->ttl_value;
 849                 ipv4_mask.hdr.time_to_live = 0xFF;
 850                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 851                 item.spec = &ipv4;
 852                 item.mask = &ipv4_mask;
 853                 field = modify_ipv4;
 854         } else {
 855                 MLX5_ASSERT(attr->ipv6);
 856                 memset(&ipv6, 0, sizeof(ipv6));
 857                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 858                 ipv6.hdr.hop_limits = conf->ttl_value;
 859                 ipv6_mask.hdr.hop_limits = 0xFF;
 860                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 861                 item.spec = &ipv6;
 862                 item.mask = &ipv6_mask;
 863                 field = modify_ipv6;
 864         }
 865         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 866                                              MLX5_MODIFICATION_TYPE_SET, error);
 867 }
 868
 869 /**
 870  * Convert modify-header decrement TTL action to DV specification.
 871  *
 872  * @param[in,out] resource
 873  *   Pointer to the modify-header resource.
 874  * @param[in] action
 875  *   Pointer to action specification.
 876  * @param[in] items
 877  *   Pointer to rte_flow_item objects list.
 878  * @param[in] attr
 879  *   Pointer to flow attributes structure.
 880  * @param[in] dev_flow
 881  *   Pointer to the sub flow.
 882  * @param[in] tunnel_decap
 883  *   Whether action is after tunnel decapsulation.
 884  * @param[out] error
 885  *   Pointer to the error structure.
 886  *
 887  * @return
 888  *   0 on success, a negative errno value otherwise and rte_errno is set.
 889  */
 890 static int
 891 flow_dv_convert_action_modify_dec_ttl
 892                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 893                          const struct rte_flow_item *items,
 894                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 895                          bool tunnel_decap, struct rte_flow_error *error)
 896 {
 897         struct rte_flow_item item;
 898         struct rte_flow_item_ipv4 ipv4;
 899         struct rte_flow_item_ipv4 ipv4_mask;
 900         struct rte_flow_item_ipv6 ipv6;
 901         struct rte_flow_item_ipv6 ipv6_mask;
 902         struct field_modify_info *field;
 903
 904         if (!attr->valid)
 905                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 906         if (attr->ipv4) {
 907                 memset(&ipv4, 0, sizeof(ipv4));
 908                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 909                 ipv4.hdr.time_to_live = 0xFF;
 910                 ipv4_mask.hdr.time_to_live = 0xFF;
 911                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 912                 item.spec = &ipv4;
 913                 item.mask = &ipv4_mask;
 914                 field = modify_ipv4;
 915         } else {
 916                 MLX5_ASSERT(attr->ipv6);
 917                 memset(&ipv6, 0, sizeof(ipv6));
 918                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 919                 ipv6.hdr.hop_limits = 0xFF;
 920                 ipv6_mask.hdr.hop_limits = 0xFF;
 921                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 922                 item.spec = &ipv6;
 923                 item.mask = &ipv6_mask;
 924                 field = modify_ipv6;
 925         }
 926         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 927                                              MLX5_MODIFICATION_TYPE_ADD, error);
 928 }
 929
 930 /**
 931  * Convert modify-header increment/decrement TCP Sequence number
 932  * to DV specification.
 933  *
 934  * @param[in,out] resource
 935  *   Pointer to the modify-header resource.
 936  * @param[in] action
 937  *   Pointer to action specification.
 938  * @param[out] error
 939  *   Pointer to the error structure.
 940  *
 941  * @return
 942  *   0 on success, a negative errno value otherwise and rte_errno is set.
 943  */
 944 static int
 945 flow_dv_convert_action_modify_tcp_seq
 946                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 947                          const struct rte_flow_action *action,
 948                          struct rte_flow_error *error)
 949 {
 950         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 951         uint64_t value = rte_be_to_cpu_32(*conf);
 952         struct rte_flow_item item;
 953         struct rte_flow_item_tcp tcp;
 954         struct rte_flow_item_tcp tcp_mask;
 955
 956         memset(&tcp, 0, sizeof(tcp));
 957         memset(&tcp_mask, 0, sizeof(tcp_mask));
 958         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 959                 /*
 960                  * The HW has no decrement operation, only increment operation.
 961                  * To simulate decrement X from Y using increment operation
 962                  * we need to add UINT32_MAX X times to Y.
 963                  * Each adding of UINT32_MAX decrements Y by 1.
 964                  */
 965                 value *= UINT32_MAX;
 966         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 967         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 968         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 969         item.spec = &tcp;
 970         item.mask = &tcp_mask;
 971         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 972                                              MLX5_MODIFICATION_TYPE_ADD, error);
 973 }
 974
 975 /**
 976  * Convert modify-header increment/decrement TCP Acknowledgment number
 977  * to DV specification.
 978  *
 979  * @param[in,out] resource
 980  *   Pointer to the modify-header resource.
 981  * @param[in] action
 982  *   Pointer to action specification.
 983  * @param[out] error
 984  *   Pointer to the error structure.
 985  *
 986  * @return
 987  *   0 on success, a negative errno value otherwise and rte_errno is set.
 988  */
 989 static int
 990 flow_dv_convert_action_modify_tcp_ack
 991                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 992                          const struct rte_flow_action *action,
 993                          struct rte_flow_error *error)
 994 {
 995         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 996         uint64_t value = rte_be_to_cpu_32(*conf);
 997         struct rte_flow_item item;
 998         struct rte_flow_item_tcp tcp;
 999         struct rte_flow_item_tcp tcp_mask;
1000
1001         memset(&tcp, 0, sizeof(tcp));
1002         memset(&tcp_mask, 0, sizeof(tcp_mask));
1003         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
1004                 /*
1005                  * The HW has no decrement operation, only increment operation.
1006                  * To simulate decrement X from Y using increment operation
1007                  * we need to add UINT32_MAX X times to Y.
1008                  * Each adding of UINT32_MAX decrements Y by 1.
1009                  */
1010                 value *= UINT32_MAX;
1011         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1012         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1013         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1014         item.spec = &tcp;
1015         item.mask = &tcp_mask;
1016         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1017                                              MLX5_MODIFICATION_TYPE_ADD, error);
1018 }
1019
1020 static enum mlx5_modification_field reg_to_field[] = {
1021         [REG_NON] = MLX5_MODI_OUT_NONE,
1022         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1023         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1024         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1025         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1026         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1027         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1028         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1029         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1030         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1031         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1032 };
1033
1034 /**
1035  * Convert register set to DV specification.
1036  *
1037  * @param[in,out] resource
1038  *   Pointer to the modify-header resource.
1039  * @param[in] action
1040  *   Pointer to action specification.
1041  * @param[out] error
1042  *   Pointer to the error structure.
1043  *
1044  * @return
1045  *   0 on success, a negative errno value otherwise and rte_errno is set.
1046  */
1047 static int
1048 flow_dv_convert_action_set_reg
1049                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1050                          const struct rte_flow_action *action,
1051                          struct rte_flow_error *error)
1052 {
1053         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1054         struct mlx5_modification_cmd *actions = resource->actions;
1055         uint32_t i = resource->actions_num;
1056
1057         if (i >= MLX5_MAX_MODIFY_NUM)
1058                 return rte_flow_error_set(error, EINVAL,
1059                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1060                                           "too many items to modify");
1061         MLX5_ASSERT(conf->id != REG_NON);
1062         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1063         actions[i] = (struct mlx5_modification_cmd) {
1064                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1065                 .field = reg_to_field[conf->id],
1066                 .offset = conf->offset,
1067                 .length = conf->length,
1068         };
1069         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1070         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1071         ++i;
1072         resource->actions_num = i;
1073         return 0;
1074 }
1075
1076 /**
1077  * Convert SET_TAG action to DV specification.
1078  *
1079  * @param[in] dev
1080  *   Pointer to the rte_eth_dev structure.
1081  * @param[in,out] resource
1082  *   Pointer to the modify-header resource.
1083  * @param[in] conf
1084  *   Pointer to action specification.
1085  * @param[out] error
1086  *   Pointer to the error structure.
1087  *
1088  * @return
1089  *   0 on success, a negative errno value otherwise and rte_errno is set.
1090  */
1091 static int
1092 flow_dv_convert_action_set_tag
1093                         (struct rte_eth_dev *dev,
1094                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1095                          const struct rte_flow_action_set_tag *conf,
1096                          struct rte_flow_error *error)
1097 {
1098         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1099         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1100         struct rte_flow_item item = {
1101                 .spec = &data,
1102                 .mask = &mask,
1103         };
1104         struct field_modify_info reg_c_x[] = {
1105                 [1] = {0, 0, 0},
1106         };
1107         enum mlx5_modification_field reg_type;
1108         int ret;
1109
1110         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1111         if (ret < 0)
1112                 return ret;
1113         MLX5_ASSERT(ret != REG_NON);
1114         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1115         reg_type = reg_to_field[ret];
1116         MLX5_ASSERT(reg_type > 0);
1117         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1118         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1119                                              MLX5_MODIFICATION_TYPE_SET, error);
1120 }
1121
1122 /**
1123  * Convert internal COPY_REG action to DV specification.
1124  *
1125  * @param[in] dev
1126  *   Pointer to the rte_eth_dev structure.
1127  * @param[in,out] res
1128  *   Pointer to the modify-header resource.
1129  * @param[in] action
1130  *   Pointer to action specification.
1131  * @param[out] error
1132  *   Pointer to the error structure.
1133  *
1134  * @return
1135  *   0 on success, a negative errno value otherwise and rte_errno is set.
1136  */
1137 static int
1138 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1139                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1140                                  const struct rte_flow_action *action,
1141                                  struct rte_flow_error *error)
1142 {
1143         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1144         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1145         struct rte_flow_item item = {
1146                 .spec = NULL,
1147                 .mask = &mask,
1148         };
1149         struct field_modify_info reg_src[] = {
1150                 {4, 0, reg_to_field[conf->src]},
1151                 {0, 0, 0},
1152         };
1153         struct field_modify_info reg_dst = {
1154                 .offset = 0,
1155                 .id = reg_to_field[conf->dst],
1156         };
1157         /* Adjust reg_c[0] usage according to reported mask. */
1158         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1159                 struct mlx5_priv *priv = dev->data->dev_private;
1160                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1161
1162                 MLX5_ASSERT(reg_c0);
1163                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1164                 if (conf->dst == REG_C_0) {
1165                         /* Copy to reg_c[0], within mask only. */
1166                         reg_dst.offset = rte_bsf32(reg_c0);
1167                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1168                 } else {
1169                         reg_dst.offset = 0;
1170                         mask = rte_cpu_to_be_32(reg_c0);
1171                 }
1172         }
1173         return flow_dv_convert_modify_action(&item,
1174                                              reg_src, &reg_dst, res,
1175                                              MLX5_MODIFICATION_TYPE_COPY,
1176                                              error);
1177 }
1178
1179 /**
1180  * Convert MARK action to DV specification. This routine is used
1181  * in extensive metadata only and requires metadata register to be
1182  * handled. In legacy mode hardware tag resource is engaged.
1183  *
1184  * @param[in] dev
1185  *   Pointer to the rte_eth_dev structure.
1186  * @param[in] conf
1187  *   Pointer to MARK action specification.
1188  * @param[in,out] resource
1189  *   Pointer to the modify-header resource.
1190  * @param[out] error
1191  *   Pointer to the error structure.
1192  *
1193  * @return
1194  *   0 on success, a negative errno value otherwise and rte_errno is set.
1195  */
1196 static int
1197 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1198                             const struct rte_flow_action_mark *conf,
1199                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1200                             struct rte_flow_error *error)
1201 {
1202         struct mlx5_priv *priv = dev->data->dev_private;
1203         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1204                                            priv->sh->dv_mark_mask);
1205         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1206         struct rte_flow_item item = {
1207                 .spec = &data,
1208                 .mask = &mask,
1209         };
1210         struct field_modify_info reg_c_x[] = {
1211                 [1] = {0, 0, 0},
1212         };
1213         int reg;
1214
1215         if (!mask)
1216                 return rte_flow_error_set(error, EINVAL,
1217                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1218                                           NULL, "zero mark action mask");
1219         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1220         if (reg < 0)
1221                 return reg;
1222         MLX5_ASSERT(reg > 0);
1223         if (reg == REG_C_0) {
1224                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1225                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1226
1227                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1228                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1229                 mask = rte_cpu_to_be_32(mask << shl_c0);
1230         }
1231         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1232         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1233                                              MLX5_MODIFICATION_TYPE_SET, error);
1234 }
1235
1236 /**
1237  * Get metadata register index for specified steering domain.
1238  *
1239  * @param[in] dev
1240  *   Pointer to the rte_eth_dev structure.
1241  * @param[in] attr
1242  *   Attributes of flow to determine steering domain.
1243  * @param[out] error
1244  *   Pointer to the error structure.
1245  *
1246  * @return
1247  *   positive index on success, a negative errno value otherwise
1248  *   and rte_errno is set.
1249  */
1250 static enum modify_reg
1251 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1252                          const struct rte_flow_attr *attr,
1253                          struct rte_flow_error *error)
1254 {
1255         int reg =
1256                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1257                                           MLX5_METADATA_FDB :
1258                                             attr->egress ?
1259                                             MLX5_METADATA_TX :
1260                                             MLX5_METADATA_RX, 0, error);
1261         if (reg < 0)
1262                 return rte_flow_error_set(error,
1263                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1264                                           NULL, "unavailable "
1265                                           "metadata register");
1266         return reg;
1267 }
1268
1269 /**
1270  * Convert SET_META action to DV specification.
1271  *
1272  * @param[in] dev
1273  *   Pointer to the rte_eth_dev structure.
1274  * @param[in,out] resource
1275  *   Pointer to the modify-header resource.
1276  * @param[in] attr
1277  *   Attributes of flow that includes this item.
1278  * @param[in] conf
1279  *   Pointer to action specification.
1280  * @param[out] error
1281  *   Pointer to the error structure.
1282  *
1283  * @return
1284  *   0 on success, a negative errno value otherwise and rte_errno is set.
1285  */
1286 static int
1287 flow_dv_convert_action_set_meta
1288                         (struct rte_eth_dev *dev,
1289                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1290                          const struct rte_flow_attr *attr,
1291                          const struct rte_flow_action_set_meta *conf,
1292                          struct rte_flow_error *error)
1293 {
1294         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1295         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1296         struct rte_flow_item item = {
1297                 .spec = &data,
1298                 .mask = &mask,
1299         };
1300         struct field_modify_info reg_c_x[] = {
1301                 [1] = {0, 0, 0},
1302         };
1303         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1304
1305         if (reg < 0)
1306                 return reg;
1307         MLX5_ASSERT(reg != REG_NON);
1308         if (reg == REG_C_0) {
1309                 struct mlx5_priv *priv = dev->data->dev_private;
1310                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1311                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1312
1313                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1314                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1315                 mask = rte_cpu_to_be_32(mask << shl_c0);
1316         }
1317         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1318         /* The routine expects parameters in memory as big-endian ones. */
1319         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1320                                              MLX5_MODIFICATION_TYPE_SET, error);
1321 }
1322
1323 /**
1324  * Convert modify-header set IPv4 DSCP action to DV specification.
1325  *
1326  * @param[in,out] resource
1327  *   Pointer to the modify-header resource.
1328  * @param[in] action
1329  *   Pointer to action specification.
1330  * @param[out] error
1331  *   Pointer to the error structure.
1332  *
1333  * @return
1334  *   0 on success, a negative errno value otherwise and rte_errno is set.
1335  */
1336 static int
1337 flow_dv_convert_action_modify_ipv4_dscp
1338                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1339                          const struct rte_flow_action *action,
1340                          struct rte_flow_error *error)
1341 {
1342         const struct rte_flow_action_set_dscp *conf =
1343                 (const struct rte_flow_action_set_dscp *)(action->conf);
1344         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1345         struct rte_flow_item_ipv4 ipv4;
1346         struct rte_flow_item_ipv4 ipv4_mask;
1347
1348         memset(&ipv4, 0, sizeof(ipv4));
1349         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1350         ipv4.hdr.type_of_service = conf->dscp;
1351         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1352         item.spec = &ipv4;
1353         item.mask = &ipv4_mask;
1354         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1355                                              MLX5_MODIFICATION_TYPE_SET, error);
1356 }
1357
1358 /**
1359  * Convert modify-header set IPv6 DSCP action to DV specification.
1360  *
1361  * @param[in,out] resource
1362  *   Pointer to the modify-header resource.
1363  * @param[in] action
1364  *   Pointer to action specification.
1365  * @param[out] error
1366  *   Pointer to the error structure.
1367  *
1368  * @return
1369  *   0 on success, a negative errno value otherwise and rte_errno is set.
1370  */
1371 static int
1372 flow_dv_convert_action_modify_ipv6_dscp
1373                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1374                          const struct rte_flow_action *action,
1375                          struct rte_flow_error *error)
1376 {
1377         const struct rte_flow_action_set_dscp *conf =
1378                 (const struct rte_flow_action_set_dscp *)(action->conf);
1379         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1380         struct rte_flow_item_ipv6 ipv6;
1381         struct rte_flow_item_ipv6 ipv6_mask;
1382
1383         memset(&ipv6, 0, sizeof(ipv6));
1384         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1385         /*
1386          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1387          * rdma-core only accept the DSCP bits byte aligned start from
1388          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1389          * bits in IPv6 case as rdma-core requires byte aligned value.
1390          */
1391         ipv6.hdr.vtc_flow = conf->dscp;
1392         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1393         item.spec = &ipv6;
1394         item.mask = &ipv6_mask;
1395         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1396                                              MLX5_MODIFICATION_TYPE_SET, error);
1397 }
1398
1399 static int
1400 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1401                            enum rte_flow_field_id field, int inherit,
1402                            const struct rte_flow_attr *attr,
1403                            struct rte_flow_error *error)
1404 {
1405         struct mlx5_priv *priv = dev->data->dev_private;
1406
1407         switch (field) {
1408         case RTE_FLOW_FIELD_START:
1409                 return 32;
1410         case RTE_FLOW_FIELD_MAC_DST:
1411         case RTE_FLOW_FIELD_MAC_SRC:
1412                 return 48;
1413         case RTE_FLOW_FIELD_VLAN_TYPE:
1414                 return 16;
1415         case RTE_FLOW_FIELD_VLAN_ID:
1416                 return 12;
1417         case RTE_FLOW_FIELD_MAC_TYPE:
1418                 return 16;
1419         case RTE_FLOW_FIELD_IPV4_DSCP:
1420                 return 6;
1421         case RTE_FLOW_FIELD_IPV4_TTL:
1422                 return 8;
1423         case RTE_FLOW_FIELD_IPV4_SRC:
1424         case RTE_FLOW_FIELD_IPV4_DST:
1425                 return 32;
1426         case RTE_FLOW_FIELD_IPV6_DSCP:
1427                 return 6;
1428         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1429                 return 8;
1430         case RTE_FLOW_FIELD_IPV6_SRC:
1431         case RTE_FLOW_FIELD_IPV6_DST:
1432                 return 128;
1433         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1434         case RTE_FLOW_FIELD_TCP_PORT_DST:
1435                 return 16;
1436         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1437         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1438                 return 32;
1439         case RTE_FLOW_FIELD_TCP_FLAGS:
1440                 return 9;
1441         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1442         case RTE_FLOW_FIELD_UDP_PORT_DST:
1443                 return 16;
1444         case RTE_FLOW_FIELD_VXLAN_VNI:
1445         case RTE_FLOW_FIELD_GENEVE_VNI:
1446                 return 24;
1447         case RTE_FLOW_FIELD_GTP_TEID:
1448         case RTE_FLOW_FIELD_TAG:
1449                 return 32;
1450         case RTE_FLOW_FIELD_MARK:
1451                 return __builtin_popcount(priv->sh->dv_mark_mask);
1452         case RTE_FLOW_FIELD_META:
1453                 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1454                         __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1455         case RTE_FLOW_FIELD_POINTER:
1456         case RTE_FLOW_FIELD_VALUE:
1457                 return inherit < 0 ? 0 : inherit;
1458         default:
1459                 MLX5_ASSERT(false);
1460         }
1461         return 0;
1462 }
1463
1464 static void
1465 mlx5_flow_field_id_to_modify_info
1466                 (const struct rte_flow_action_modify_data *data,
1467                  struct field_modify_info *info, uint32_t *mask,
1468                  uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
1469                  const struct rte_flow_attr *attr, struct rte_flow_error *error)
1470 {
1471         struct mlx5_priv *priv = dev->data->dev_private;
1472         uint32_t idx = 0;
1473         uint32_t off = 0;
1474
1475         switch (data->field) {
1476         case RTE_FLOW_FIELD_START:
1477                 /* not supported yet */
1478                 MLX5_ASSERT(false);
1479                 break;
1480         case RTE_FLOW_FIELD_MAC_DST:
1481                 off = data->offset > 16 ? data->offset - 16 : 0;
1482                 if (mask) {
1483                         if (data->offset < 16) {
1484                                 info[idx] = (struct field_modify_info){2, 4,
1485                                                 MLX5_MODI_OUT_DMAC_15_0};
1486                                 if (width < 16) {
1487                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1488                                                                  (16 - width));
1489                                         width = 0;
1490                                 } else {
1491                                         mask[1] = RTE_BE16(0xffff);
1492                                         width -= 16;
1493                                 }
1494                                 if (!width)
1495                                         break;
1496                                 ++idx;
1497                         }
1498                         info[idx] = (struct field_modify_info){4, 0,
1499                                                 MLX5_MODI_OUT_DMAC_47_16};
1500                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1501                                                     (32 - width)) << off);
1502                 } else {
1503                         if (data->offset < 16)
1504                                 info[idx++] = (struct field_modify_info){2, 4,
1505                                                 MLX5_MODI_OUT_DMAC_15_0};
1506                         info[idx] = (struct field_modify_info){4, 0,
1507                                                 MLX5_MODI_OUT_DMAC_47_16};
1508                 }
1509                 break;
1510         case RTE_FLOW_FIELD_MAC_SRC:
1511                 off = data->offset > 16 ? data->offset - 16 : 0;
1512                 if (mask) {
1513                         if (data->offset < 16) {
1514                                 info[idx] = (struct field_modify_info){2, 4,
1515                                                 MLX5_MODI_OUT_SMAC_15_0};
1516                                 if (width < 16) {
1517                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1518                                                                  (16 - width));
1519                                         width = 0;
1520                                 } else {
1521                                         mask[1] = RTE_BE16(0xffff);
1522                                         width -= 16;
1523                                 }
1524                                 if (!width)
1525                                         break;
1526                                 ++idx;
1527                         }
1528                         info[idx] = (struct field_modify_info){4, 0,
1529                                                 MLX5_MODI_OUT_SMAC_47_16};
1530                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1531                                                     (32 - width)) << off);
1532                 } else {
1533                         if (data->offset < 16)
1534                                 info[idx++] = (struct field_modify_info){2, 4,
1535                                                 MLX5_MODI_OUT_SMAC_15_0};
1536                         info[idx] = (struct field_modify_info){4, 0,
1537                                                 MLX5_MODI_OUT_SMAC_47_16};
1538                 }
1539                 break;
1540         case RTE_FLOW_FIELD_VLAN_TYPE:
1541                 /* not supported yet */
1542                 break;
1543         case RTE_FLOW_FIELD_VLAN_ID:
1544                 info[idx] = (struct field_modify_info){2, 0,
1545                                         MLX5_MODI_OUT_FIRST_VID};
1546                 if (mask)
1547                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1548                 break;
1549         case RTE_FLOW_FIELD_MAC_TYPE:
1550                 info[idx] = (struct field_modify_info){2, 0,
1551                                         MLX5_MODI_OUT_ETHERTYPE};
1552                 if (mask)
1553                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1554                 break;
1555         case RTE_FLOW_FIELD_IPV4_DSCP:
1556                 info[idx] = (struct field_modify_info){1, 0,
1557                                         MLX5_MODI_OUT_IP_DSCP};
1558                 if (mask)
1559                         mask[idx] = 0x3f >> (6 - width);
1560                 break;
1561         case RTE_FLOW_FIELD_IPV4_TTL:
1562                 info[idx] = (struct field_modify_info){1, 0,
1563                                         MLX5_MODI_OUT_IPV4_TTL};
1564                 if (mask)
1565                         mask[idx] = 0xff >> (8 - width);
1566                 break;
1567         case RTE_FLOW_FIELD_IPV4_SRC:
1568                 info[idx] = (struct field_modify_info){4, 0,
1569                                         MLX5_MODI_OUT_SIPV4};
1570                 if (mask)
1571                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1572                                                      (32 - width));
1573                 break;
1574         case RTE_FLOW_FIELD_IPV4_DST:
1575                 info[idx] = (struct field_modify_info){4, 0,
1576                                         MLX5_MODI_OUT_DIPV4};
1577                 if (mask)
1578                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1579                                                      (32 - width));
1580                 break;
1581         case RTE_FLOW_FIELD_IPV6_DSCP:
1582                 info[idx] = (struct field_modify_info){1, 0,
1583                                         MLX5_MODI_OUT_IP_DSCP};
1584                 if (mask)
1585                         mask[idx] = 0x3f >> (6 - width);
1586                 break;
1587         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1588                 info[idx] = (struct field_modify_info){1, 0,
1589                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1590                 if (mask)
1591                         mask[idx] = 0xff >> (8 - width);
1592                 break;
1593         case RTE_FLOW_FIELD_IPV6_SRC:
1594                 if (mask) {
1595                         if (data->offset < 32) {
1596                                 info[idx] = (struct field_modify_info){4, 12,
1597                                                 MLX5_MODI_OUT_SIPV6_31_0};
1598                                 if (width < 32) {
1599                                         mask[3] =
1600                                                 rte_cpu_to_be_32(0xffffffff >>
1601                                                                  (32 - width));
1602                                         width = 0;
1603                                 } else {
1604                                         mask[3] = RTE_BE32(0xffffffff);
1605                                         width -= 32;
1606                                 }
1607                                 if (!width)
1608                                         break;
1609                                 ++idx;
1610                         }
1611                         if (data->offset < 64) {
1612                                 info[idx] = (struct field_modify_info){4, 8,
1613                                                 MLX5_MODI_OUT_SIPV6_63_32};
1614                                 if (width < 32) {
1615                                         mask[2] =
1616                                                 rte_cpu_to_be_32(0xffffffff >>
1617                                                                  (32 - width));
1618                                         width = 0;
1619                                 } else {
1620                                         mask[2] = RTE_BE32(0xffffffff);
1621                                         width -= 32;
1622                                 }
1623                                 if (!width)
1624                                         break;
1625                                 ++idx;
1626                         }
1627                         if (data->offset < 96) {
1628                                 info[idx] = (struct field_modify_info){4, 4,
1629                                                 MLX5_MODI_OUT_SIPV6_95_64};
1630                                 if (width < 32) {
1631                                         mask[1] =
1632                                                 rte_cpu_to_be_32(0xffffffff >>
1633                                                                  (32 - width));
1634                                         width = 0;
1635                                 } else {
1636                                         mask[1] = RTE_BE32(0xffffffff);
1637                                         width -= 32;
1638                                 }
1639                                 if (!width)
1640                                         break;
1641                                 ++idx;
1642                         }
1643                         info[idx] = (struct field_modify_info){4, 0,
1644                                                 MLX5_MODI_OUT_SIPV6_127_96};
1645                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1646                 } else {
1647                         if (data->offset < 32)
1648                                 info[idx++] = (struct field_modify_info){4, 12,
1649                                                 MLX5_MODI_OUT_SIPV6_31_0};
1650                         if (data->offset < 64)
1651                                 info[idx++] = (struct field_modify_info){4, 8,
1652                                                 MLX5_MODI_OUT_SIPV6_63_32};
1653                         if (data->offset < 96)
1654                                 info[idx++] = (struct field_modify_info){4, 4,
1655                                                 MLX5_MODI_OUT_SIPV6_95_64};
1656                         if (data->offset < 128)
1657                                 info[idx++] = (struct field_modify_info){4, 0,
1658                                                 MLX5_MODI_OUT_SIPV6_127_96};
1659                 }
1660                 break;
1661         case RTE_FLOW_FIELD_IPV6_DST:
1662                 if (mask) {
1663                         if (data->offset < 32) {
1664                                 info[idx] = (struct field_modify_info){4, 12,
1665                                                 MLX5_MODI_OUT_DIPV6_31_0};
1666                                 if (width < 32) {
1667                                         mask[3] =
1668                                                 rte_cpu_to_be_32(0xffffffff >>
1669                                                                  (32 - width));
1670                                         width = 0;
1671                                 } else {
1672                                         mask[3] = RTE_BE32(0xffffffff);
1673                                         width -= 32;
1674                                 }
1675                                 if (!width)
1676                                         break;
1677                                 ++idx;
1678                         }
1679                         if (data->offset < 64) {
1680                                 info[idx] = (struct field_modify_info){4, 8,
1681                                                 MLX5_MODI_OUT_DIPV6_63_32};
1682                                 if (width < 32) {
1683                                         mask[2] =
1684                                                 rte_cpu_to_be_32(0xffffffff >>
1685                                                                  (32 - width));
1686                                         width = 0;
1687                                 } else {
1688                                         mask[2] = RTE_BE32(0xffffffff);
1689                                         width -= 32;
1690                                 }
1691                                 if (!width)
1692                                         break;
1693                                 ++idx;
1694                         }
1695                         if (data->offset < 96) {
1696                                 info[idx] = (struct field_modify_info){4, 4,
1697                                                 MLX5_MODI_OUT_DIPV6_95_64};
1698                                 if (width < 32) {
1699                                         mask[1] =
1700                                                 rte_cpu_to_be_32(0xffffffff >>
1701                                                                  (32 - width));
1702                                         width = 0;
1703                                 } else {
1704                                         mask[1] = RTE_BE32(0xffffffff);
1705                                         width -= 32;
1706                                 }
1707                                 if (!width)
1708                                         break;
1709                                 ++idx;
1710                         }
1711                         info[idx] = (struct field_modify_info){4, 0,
1712                                                 MLX5_MODI_OUT_DIPV6_127_96};
1713                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1714                 } else {
1715                         if (data->offset < 32)
1716                                 info[idx++] = (struct field_modify_info){4, 12,
1717                                                 MLX5_MODI_OUT_DIPV6_31_0};
1718                         if (data->offset < 64)
1719                                 info[idx++] = (struct field_modify_info){4, 8,
1720                                                 MLX5_MODI_OUT_DIPV6_63_32};
1721                         if (data->offset < 96)
1722                                 info[idx++] = (struct field_modify_info){4, 4,
1723                                                 MLX5_MODI_OUT_DIPV6_95_64};
1724                         if (data->offset < 128)
1725                                 info[idx++] = (struct field_modify_info){4, 0,
1726                                                 MLX5_MODI_OUT_DIPV6_127_96};
1727                 }
1728                 break;
1729         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1730                 info[idx] = (struct field_modify_info){2, 0,
1731                                         MLX5_MODI_OUT_TCP_SPORT};
1732                 if (mask)
1733                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1734                 break;
1735         case RTE_FLOW_FIELD_TCP_PORT_DST:
1736                 info[idx] = (struct field_modify_info){2, 0,
1737                                         MLX5_MODI_OUT_TCP_DPORT};
1738                 if (mask)
1739                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1740                 break;
1741         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1742                 info[idx] = (struct field_modify_info){4, 0,
1743                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1744                 if (mask)
1745                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1746                                                      (32 - width));
1747                 break;
1748         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1749                 info[idx] = (struct field_modify_info){4, 0,
1750                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1751                 if (mask)
1752                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1753                                                      (32 - width));
1754                 break;
1755         case RTE_FLOW_FIELD_TCP_FLAGS:
1756                 info[idx] = (struct field_modify_info){2, 0,
1757                                         MLX5_MODI_OUT_TCP_FLAGS};
1758                 if (mask)
1759                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1760                 break;
1761         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1762                 info[idx] = (struct field_modify_info){2, 0,
1763                                         MLX5_MODI_OUT_UDP_SPORT};
1764                 if (mask)
1765                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1766                 break;
1767         case RTE_FLOW_FIELD_UDP_PORT_DST:
1768                 info[idx] = (struct field_modify_info){2, 0,
1769                                         MLX5_MODI_OUT_UDP_DPORT};
1770                 if (mask)
1771                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1772                 break;
1773         case RTE_FLOW_FIELD_VXLAN_VNI:
1774                 /* not supported yet */
1775                 break;
1776         case RTE_FLOW_FIELD_GENEVE_VNI:
1777                 /* not supported yet*/
1778                 break;
1779         case RTE_FLOW_FIELD_GTP_TEID:
1780                 info[idx] = (struct field_modify_info){4, 0,
1781                                         MLX5_MODI_GTP_TEID};
1782                 if (mask)
1783                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1784                                                      (32 - width));
1785                 break;
1786         case RTE_FLOW_FIELD_TAG:
1787                 {
1788                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1789                                                    data->level, error);
1790                         if (reg < 0)
1791                                 return;
1792                         MLX5_ASSERT(reg != REG_NON);
1793                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1794                         info[idx] = (struct field_modify_info){4, 0,
1795                                                 reg_to_field[reg]};
1796                         if (mask)
1797                                 mask[idx] =
1798                                         rte_cpu_to_be_32(0xffffffff >>
1799                                                          (32 - width));
1800                 }
1801                 break;
1802         case RTE_FLOW_FIELD_MARK:
1803                 {
1804                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1805                         uint32_t mark_count = __builtin_popcount(mark_mask);
1806                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1807                                                        0, error);
1808                         if (reg < 0)
1809                                 return;
1810                         MLX5_ASSERT(reg != REG_NON);
1811                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1812                         info[idx] = (struct field_modify_info){4, 0,
1813                                                 reg_to_field[reg]};
1814                         if (mask)
1815                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1816                                          (mark_count - width)) & mark_mask);
1817                 }
1818                 break;
1819         case RTE_FLOW_FIELD_META:
1820                 {
1821                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1822                         uint32_t meta_count = __builtin_popcount(meta_mask);
1823                         uint32_t msk_c0 =
1824                                 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1825                         uint32_t shl_c0 = rte_bsf32(msk_c0);
1826                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1827                         if (reg < 0)
1828                                 return;
1829                         MLX5_ASSERT(reg != REG_NON);
1830                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1831                         if (reg == REG_C_0)
1832                                 *shift = shl_c0;
1833                         info[idx] = (struct field_modify_info){4, 0,
1834                                                 reg_to_field[reg]};
1835                         if (mask)
1836                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1837                                         (meta_count - width)) & meta_mask);
1838                 }
1839                 break;
1840         case RTE_FLOW_FIELD_POINTER:
1841         case RTE_FLOW_FIELD_VALUE:
1842         default:
1843                 MLX5_ASSERT(false);
1844                 break;
1845         }
1846 }
1847
1848 /**
1849  * Convert modify_field action to DV specification.
1850  *
1851  * @param[in] dev
1852  *   Pointer to the rte_eth_dev structure.
1853  * @param[in,out] resource
1854  *   Pointer to the modify-header resource.
1855  * @param[in] action
1856  *   Pointer to action specification.
1857  * @param[in] attr
1858  *   Attributes of flow that includes this item.
1859  * @param[out] error
1860  *   Pointer to the error structure.
1861  *
1862  * @return
1863  *   0 on success, a negative errno value otherwise and rte_errno is set.
1864  */
1865 static int
1866 flow_dv_convert_action_modify_field
1867                         (struct rte_eth_dev *dev,
1868                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1869                          const struct rte_flow_action *action,
1870                          const struct rte_flow_attr *attr,
1871                          struct rte_flow_error *error)
1872 {
1873         const struct rte_flow_action_modify_field *conf =
1874                 (const struct rte_flow_action_modify_field *)(action->conf);
1875         struct rte_flow_item item = {
1876                 .spec = NULL,
1877                 .mask = NULL
1878         };
1879         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1880                                                                 {0, 0, 0} };
1881         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1882                                                                 {0, 0, 0} };
1883         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1884         uint32_t type;
1885         uint32_t shift = 0;
1886
1887         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1888             conf->src.field == RTE_FLOW_FIELD_VALUE) {
1889                 type = MLX5_MODIFICATION_TYPE_SET;
1890                 /** For SET fill the destination field (field) first. */
1891                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1892                                                   conf->width, &shift, dev,
1893                                                   attr, error);
1894                 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1895                                         (void *)(uintptr_t)conf->src.pvalue :
1896                                         (void *)(uintptr_t)&conf->src.value;
1897         } else {
1898                 type = MLX5_MODIFICATION_TYPE_COPY;
1899                 /** For COPY fill the destination field (dcopy) without mask. */
1900                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1901                                                   conf->width, &shift, dev,
1902                                                   attr, error);
1903                 /** Then construct the source field (field) with mask. */
1904                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1905                                                   conf->width, &shift,
1906                                                   dev, attr, error);
1907         }
1908         item.mask = &mask;
1909         return flow_dv_convert_modify_action(&item,
1910                         field, dcopy, resource, type, error);
1911 }
1912
1913 /**
1914  * Validate MARK item.
1915  *
1916  * @param[in] dev
1917  *   Pointer to the rte_eth_dev structure.
1918  * @param[in] item
1919  *   Item specification.
1920  * @param[in] attr
1921  *   Attributes of flow that includes this item.
1922  * @param[out] error
1923  *   Pointer to error structure.
1924  *
1925  * @return
1926  *   0 on success, a negative errno value otherwise and rte_errno is set.
1927  */
1928 static int
1929 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1930                            const struct rte_flow_item *item,
1931                            const struct rte_flow_attr *attr __rte_unused,
1932                            struct rte_flow_error *error)
1933 {
1934         struct mlx5_priv *priv = dev->data->dev_private;
1935         struct mlx5_dev_config *config = &priv->config;
1936         const struct rte_flow_item_mark *spec = item->spec;
1937         const struct rte_flow_item_mark *mask = item->mask;
1938         const struct rte_flow_item_mark nic_mask = {
1939                 .id = priv->sh->dv_mark_mask,
1940         };
1941         int ret;
1942
1943         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1944                 return rte_flow_error_set(error, ENOTSUP,
1945                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1946                                           "extended metadata feature"
1947                                           " isn't enabled");
1948         if (!mlx5_flow_ext_mreg_supported(dev))
1949                 return rte_flow_error_set(error, ENOTSUP,
1950                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1951                                           "extended metadata register"
1952                                           " isn't supported");
1953         if (!nic_mask.id)
1954                 return rte_flow_error_set(error, ENOTSUP,
1955                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1956                                           "extended metadata register"
1957                                           " isn't available");
1958         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1959         if (ret < 0)
1960                 return ret;
1961         if (!spec)
1962                 return rte_flow_error_set(error, EINVAL,
1963                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1964                                           item->spec,
1965                                           "data cannot be empty");
1966         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1967                 return rte_flow_error_set(error, EINVAL,
1968                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1969                                           &spec->id,
1970                                           "mark id exceeds the limit");
1971         if (!mask)
1972                 mask = &nic_mask;
1973         if (!mask->id)
1974                 return rte_flow_error_set(error, EINVAL,
1975                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1976                                         "mask cannot be zero");
1977
1978         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1979                                         (const uint8_t *)&nic_mask,
1980                                         sizeof(struct rte_flow_item_mark),
1981                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1982         if (ret < 0)
1983                 return ret;
1984         return 0;
1985 }
1986
1987 /**
1988  * Validate META item.
1989  *
1990  * @param[in] dev
1991  *   Pointer to the rte_eth_dev structure.
1992  * @param[in] item
1993  *   Item specification.
1994  * @param[in] attr
1995  *   Attributes of flow that includes this item.
1996  * @param[out] error
1997  *   Pointer to error structure.
1998  *
1999  * @return
2000  *   0 on success, a negative errno value otherwise and rte_errno is set.
2001  */
2002 static int
2003 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2004                            const struct rte_flow_item *item,
2005                            const struct rte_flow_attr *attr,
2006                            struct rte_flow_error *error)
2007 {
2008         struct mlx5_priv *priv = dev->data->dev_private;
2009         struct mlx5_dev_config *config = &priv->config;
2010         const struct rte_flow_item_meta *spec = item->spec;
2011         const struct rte_flow_item_meta *mask = item->mask;
2012         struct rte_flow_item_meta nic_mask = {
2013                 .data = UINT32_MAX
2014         };
2015         int reg;
2016         int ret;
2017
2018         if (!spec)
2019                 return rte_flow_error_set(error, EINVAL,
2020                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2021                                           item->spec,
2022                                           "data cannot be empty");
2023         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2024                 if (!mlx5_flow_ext_mreg_supported(dev))
2025                         return rte_flow_error_set(error, ENOTSUP,
2026                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2027                                           "extended metadata register"
2028                                           " isn't supported");
2029                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2030                 if (reg < 0)
2031                         return reg;
2032                 if (reg == REG_NON)
2033                         return rte_flow_error_set(error, ENOTSUP,
2034                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2035                                         "unavalable extended metadata register");
2036                 if (reg == REG_B)
2037                         return rte_flow_error_set(error, ENOTSUP,
2038                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2039                                           "match on reg_b "
2040                                           "isn't supported");
2041                 if (reg != REG_A)
2042                         nic_mask.data = priv->sh->dv_meta_mask;
2043         } else {
2044                 if (attr->transfer)
2045                         return rte_flow_error_set(error, ENOTSUP,
2046                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2047                                         "extended metadata feature "
2048                                         "should be enabled when "
2049                                         "meta item is requested "
2050                                         "with e-switch mode ");
2051                 if (attr->ingress)
2052                         return rte_flow_error_set(error, ENOTSUP,
2053                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2054                                         "match on metadata for ingress "
2055                                         "is not supported in legacy "
2056                                         "metadata mode");
2057         }
2058         if (!mask)
2059                 mask = &rte_flow_item_meta_mask;
2060         if (!mask->data)
2061                 return rte_flow_error_set(error, EINVAL,
2062                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2063                                         "mask cannot be zero");
2064
2065         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2066                                         (const uint8_t *)&nic_mask,
2067                                         sizeof(struct rte_flow_item_meta),
2068                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2069         return ret;
2070 }
2071
2072 /**
2073  * Validate TAG item.
2074  *
2075  * @param[in] dev
2076  *   Pointer to the rte_eth_dev structure.
2077  * @param[in] item
2078  *   Item specification.
2079  * @param[in] attr
2080  *   Attributes of flow that includes this item.
2081  * @param[out] error
2082  *   Pointer to error structure.
2083  *
2084  * @return
2085  *   0 on success, a negative errno value otherwise and rte_errno is set.
2086  */
2087 static int
2088 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2089                           const struct rte_flow_item *item,
2090                           const struct rte_flow_attr *attr __rte_unused,
2091                           struct rte_flow_error *error)
2092 {
2093         const struct rte_flow_item_tag *spec = item->spec;
2094         const struct rte_flow_item_tag *mask = item->mask;
2095         const struct rte_flow_item_tag nic_mask = {
2096                 .data = RTE_BE32(UINT32_MAX),
2097                 .index = 0xff,
2098         };
2099         int ret;
2100
2101         if (!mlx5_flow_ext_mreg_supported(dev))
2102                 return rte_flow_error_set(error, ENOTSUP,
2103                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2104                                           "extensive metadata register"
2105                                           " isn't supported");
2106         if (!spec)
2107                 return rte_flow_error_set(error, EINVAL,
2108                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2109                                           item->spec,
2110                                           "data cannot be empty");
2111         if (!mask)
2112                 mask = &rte_flow_item_tag_mask;
2113         if (!mask->data)
2114                 return rte_flow_error_set(error, EINVAL,
2115                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2116                                         "mask cannot be zero");
2117
2118         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2119                                         (const uint8_t *)&nic_mask,
2120                                         sizeof(struct rte_flow_item_tag),
2121                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2122         if (ret < 0)
2123                 return ret;
2124         if (mask->index != 0xff)
2125                 return rte_flow_error_set(error, EINVAL,
2126                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2127                                           "partial mask for tag index"
2128                                           " is not supported");
2129         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2130         if (ret < 0)
2131                 return ret;
2132         MLX5_ASSERT(ret != REG_NON);
2133         return 0;
2134 }
2135
2136 /**
2137  * Validate vport item.
2138  *
2139  * @param[in] dev
2140  *   Pointer to the rte_eth_dev structure.
2141  * @param[in] item
2142  *   Item specification.
2143  * @param[in] attr
2144  *   Attributes of flow that includes this item.
2145  * @param[in] item_flags
2146  *   Bit-fields that holds the items detected until now.
2147  * @param[out] error
2148  *   Pointer to error structure.
2149  *
2150  * @return
2151  *   0 on success, a negative errno value otherwise and rte_errno is set.
2152  */
2153 static int
2154 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2155                               const struct rte_flow_item *item,
2156                               const struct rte_flow_attr *attr,
2157                               uint64_t item_flags,
2158                               struct rte_flow_error *error)
2159 {
2160         const struct rte_flow_item_port_id *spec = item->spec;
2161         const struct rte_flow_item_port_id *mask = item->mask;
2162         const struct rte_flow_item_port_id switch_mask = {
2163                         .id = 0xffffffff,
2164         };
2165         struct mlx5_priv *esw_priv;
2166         struct mlx5_priv *dev_priv;
2167         int ret;
2168
2169         if (!attr->transfer)
2170                 return rte_flow_error_set(error, EINVAL,
2171                                           RTE_FLOW_ERROR_TYPE_ITEM,
2172                                           NULL,
2173                                           "match on port id is valid only"
2174                                           " when transfer flag is enabled");
2175         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2176                 return rte_flow_error_set(error, ENOTSUP,
2177                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2178                                           "multiple source ports are not"
2179                                           " supported");
2180         if (!mask)
2181                 mask = &switch_mask;
2182         if (mask->id != 0xffffffff)
2183                 return rte_flow_error_set(error, ENOTSUP,
2184                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2185                                            mask,
2186                                            "no support for partial mask on"
2187                                            " \"id\" field");
2188         ret = mlx5_flow_item_acceptable
2189                                 (item, (const uint8_t *)mask,
2190                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2191                                  sizeof(struct rte_flow_item_port_id),
2192                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2193         if (ret)
2194                 return ret;
2195         if (!spec)
2196                 return 0;
2197         if (spec->id == MLX5_PORT_ESW_MGR)
2198                 return 0;
2199         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2200         if (!esw_priv)
2201                 return rte_flow_error_set(error, rte_errno,
2202                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2203                                           "failed to obtain E-Switch info for"
2204                                           " port");
2205         dev_priv = mlx5_dev_to_eswitch_info(dev);
2206         if (!dev_priv)
2207                 return rte_flow_error_set(error, rte_errno,
2208                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2209                                           NULL,
2210                                           "failed to obtain E-Switch info");
2211         if (esw_priv->domain_id != dev_priv->domain_id)
2212                 return rte_flow_error_set(error, EINVAL,
2213                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2214                                           "cannot match on a port from a"
2215                                           " different E-Switch");
2216         return 0;
2217 }
2218
2219 /**
2220  * Validate VLAN item.
2221  *
2222  * @param[in] item
2223  *   Item specification.
2224  * @param[in] item_flags
2225  *   Bit-fields that holds the items detected until now.
2226  * @param[in] dev
2227  *   Ethernet device flow is being created on.
2228  * @param[out] error
2229  *   Pointer to error structure.
2230  *
2231  * @return
2232  *   0 on success, a negative errno value otherwise and rte_errno is set.
2233  */
2234 static int
2235 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2236                            uint64_t item_flags,
2237                            struct rte_eth_dev *dev,
2238                            struct rte_flow_error *error)
2239 {
2240         const struct rte_flow_item_vlan *mask = item->mask;
2241         const struct rte_flow_item_vlan nic_mask = {
2242                 .tci = RTE_BE16(UINT16_MAX),
2243                 .inner_type = RTE_BE16(UINT16_MAX),
2244                 .has_more_vlan = 1,
2245         };
2246         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2247         int ret;
2248         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2249                                         MLX5_FLOW_LAYER_INNER_L4) :
2250                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2251                                         MLX5_FLOW_LAYER_OUTER_L4);
2252         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2253                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2254
2255         if (item_flags & vlanm)
2256                 return rte_flow_error_set(error, EINVAL,
2257                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2258                                           "multiple VLAN layers not supported");
2259         else if ((item_flags & l34m) != 0)
2260                 return rte_flow_error_set(error, EINVAL,
2261                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2262                                           "VLAN cannot follow L3/L4 layer");
2263         if (!mask)
2264                 mask = &rte_flow_item_vlan_mask;
2265         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2266                                         (const uint8_t *)&nic_mask,
2267                                         sizeof(struct rte_flow_item_vlan),
2268                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2269         if (ret)
2270                 return ret;
2271         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2272                 struct mlx5_priv *priv = dev->data->dev_private;
2273
2274                 if (priv->vmwa_context) {
2275                         /*
2276                          * Non-NULL context means we have a virtual machine
2277                          * and SR-IOV enabled, we have to create VLAN interface
2278                          * to make hypervisor to setup E-Switch vport
2279                          * context correctly. We avoid creating the multiple
2280                          * VLAN interfaces, so we cannot support VLAN tag mask.
2281                          */
2282                         return rte_flow_error_set(error, EINVAL,
2283                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2284                                                   item,
2285                                                   "VLAN tag mask is not"
2286                                                   " supported in virtual"
2287                                                   " environment");
2288                 }
2289         }
2290         return 0;
2291 }
2292
2293 /*
2294  * GTP flags are contained in 1 byte of the format:
2295  * -------------------------------------------
2296  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2297  * |-----------------------------------------|
2298  * | value | Version | PT | Res | E | S | PN |
2299  * -------------------------------------------
2300  *
2301  * Matching is supported only for GTP flags E, S, PN.
2302  */
2303 #define MLX5_GTP_FLAGS_MASK     0x07
2304
2305 /**
2306  * Validate GTP item.
2307  *
2308  * @param[in] dev
2309  *   Pointer to the rte_eth_dev structure.
2310  * @param[in] item
2311  *   Item specification.
2312  * @param[in] item_flags
2313  *   Bit-fields that holds the items detected until now.
2314  * @param[out] error
2315  *   Pointer to error structure.
2316  *
2317  * @return
2318  *   0 on success, a negative errno value otherwise and rte_errno is set.
2319  */
2320 static int
2321 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2322                           const struct rte_flow_item *item,
2323                           uint64_t item_flags,
2324                           struct rte_flow_error *error)
2325 {
2326         struct mlx5_priv *priv = dev->data->dev_private;
2327         const struct rte_flow_item_gtp *spec = item->spec;
2328         const struct rte_flow_item_gtp *mask = item->mask;
2329         const struct rte_flow_item_gtp nic_mask = {
2330                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2331                 .msg_type = 0xff,
2332                 .teid = RTE_BE32(0xffffffff),
2333         };
2334
2335         if (!priv->config.hca_attr.tunnel_stateless_gtp)
2336                 return rte_flow_error_set(error, ENOTSUP,
2337                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2338                                           "GTP support is not enabled");
2339         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2340                 return rte_flow_error_set(error, ENOTSUP,
2341                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2342                                           "multiple tunnel layers not"
2343                                           " supported");
2344         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2345                 return rte_flow_error_set(error, EINVAL,
2346                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2347                                           "no outer UDP layer found");
2348         if (!mask)
2349                 mask = &rte_flow_item_gtp_mask;
2350         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2351                 return rte_flow_error_set(error, ENOTSUP,
2352                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2353                                           "Match is supported for GTP"
2354                                           " flags only");
2355         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2356                                          (const uint8_t *)&nic_mask,
2357                                          sizeof(struct rte_flow_item_gtp),
2358                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2359 }
2360
2361 /**
2362  * Validate GTP PSC item.
2363  *
2364  * @param[in] item
2365  *   Item specification.
2366  * @param[in] last_item
2367  *   Previous validated item in the pattern items.
2368  * @param[in] gtp_item
2369  *   Previous GTP item specification.
2370  * @param[in] attr
2371  *   Pointer to flow attributes.
2372  * @param[out] error
2373  *   Pointer to error structure.
2374  *
2375  * @return
2376  *   0 on success, a negative errno value otherwise and rte_errno is set.
2377  */
2378 static int
2379 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2380                               uint64_t last_item,
2381                               const struct rte_flow_item *gtp_item,
2382                               const struct rte_flow_attr *attr,
2383                               struct rte_flow_error *error)
2384 {
2385         const struct rte_flow_item_gtp *gtp_spec;
2386         const struct rte_flow_item_gtp *gtp_mask;
2387         const struct rte_flow_item_gtp_psc *mask;
2388         const struct rte_flow_item_gtp_psc nic_mask = {
2389                 .hdr.type = 0xF,
2390                 .hdr.qfi = 0x3F,
2391         };
2392
2393         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2394                 return rte_flow_error_set
2395                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2396                          "GTP PSC item must be preceded with GTP item");
2397         gtp_spec = gtp_item->spec;
2398         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2399         /* GTP spec and E flag is requested to match zero. */
2400         if (gtp_spec &&
2401                 (gtp_mask->v_pt_rsv_flags &
2402                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2403                 return rte_flow_error_set
2404                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2405                          "GTP E flag must be 1 to match GTP PSC");
2406         /* Check the flow is not created in group zero. */
2407         if (!attr->transfer && !attr->group)
2408                 return rte_flow_error_set
2409                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2410                          "GTP PSC is not supported for group 0");
2411         /* GTP spec is here and E flag is requested to match zero. */
2412         if (!item->spec)
2413                 return 0;
2414         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2415         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2416                                          (const uint8_t *)&nic_mask,
2417                                          sizeof(struct rte_flow_item_gtp_psc),
2418                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2419 }
2420
2421 /**
2422  * Validate IPV4 item.
2423  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2424  * add specific validation of fragment_offset field,
2425  *
2426  * @param[in] item
2427  *   Item specification.
2428  * @param[in] item_flags
2429  *   Bit-fields that holds the items detected until now.
2430  * @param[out] error
2431  *   Pointer to error structure.
2432  *
2433  * @return
2434  *   0 on success, a negative errno value otherwise and rte_errno is set.
2435  */
2436 static int
2437 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2438                            const struct rte_flow_item *item,
2439                            uint64_t item_flags, uint64_t last_item,
2440                            uint16_t ether_type, struct rte_flow_error *error)
2441 {
2442         int ret;
2443         struct mlx5_priv *priv = dev->data->dev_private;
2444         const struct rte_flow_item_ipv4 *spec = item->spec;
2445         const struct rte_flow_item_ipv4 *last = item->last;
2446         const struct rte_flow_item_ipv4 *mask = item->mask;
2447         rte_be16_t fragment_offset_spec = 0;
2448         rte_be16_t fragment_offset_last = 0;
2449         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2450                 .hdr = {
2451                         .src_addr = RTE_BE32(0xffffffff),
2452                         .dst_addr = RTE_BE32(0xffffffff),
2453                         .type_of_service = 0xff,
2454                         .fragment_offset = RTE_BE16(0xffff),
2455                         .next_proto_id = 0xff,
2456                         .time_to_live = 0xff,
2457                 },
2458         };
2459
2460         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2461                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2462                 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2463                                priv->config.hca_attr.inner_ipv4_ihl;
2464                 if (!ihl_cap)
2465                         return rte_flow_error_set(error, ENOTSUP,
2466                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2467                                                   item,
2468                                                   "IPV4 ihl offload not supported");
2469                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2470         }
2471         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2472                                            ether_type, &nic_ipv4_mask,
2473                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2474         if (ret < 0)
2475                 return ret;
2476         if (spec && mask)
2477                 fragment_offset_spec = spec->hdr.fragment_offset &
2478                                        mask->hdr.fragment_offset;
2479         if (!fragment_offset_spec)
2480                 return 0;
2481         /*
2482          * spec and mask are valid, enforce using full mask to make sure the
2483          * complete value is used correctly.
2484          */
2485         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2486                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2487                 return rte_flow_error_set(error, EINVAL,
2488                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2489                                           item, "must use full mask for"
2490                                           " fragment_offset");
2491         /*
2492          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2493          * indicating this is 1st fragment of fragmented packet.
2494          * This is not yet supported in MLX5, return appropriate error message.
2495          */
2496         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2497                 return rte_flow_error_set(error, ENOTSUP,
2498                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2499                                           "match on first fragment not "
2500                                           "supported");
2501         if (fragment_offset_spec && !last)
2502                 return rte_flow_error_set(error, ENOTSUP,
2503                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2504                                           "specified value not supported");
2505         /* spec and last are valid, validate the specified range. */
2506         fragment_offset_last = last->hdr.fragment_offset &
2507                                mask->hdr.fragment_offset;
2508         /*
2509          * Match on fragment_offset spec 0x2001 and last 0x3fff
2510          * means MF is 1 and frag-offset is > 0.
2511          * This packet is fragment 2nd and onward, excluding last.
2512          * This is not yet supported in MLX5, return appropriate
2513          * error message.
2514          */
2515         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2516             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2517                 return rte_flow_error_set(error, ENOTSUP,
2518                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2519                                           last, "match on following "
2520                                           "fragments not supported");
2521         /*
2522          * Match on fragment_offset spec 0x0001 and last 0x1fff
2523          * means MF is 0 and frag-offset is > 0.
2524          * This packet is last fragment of fragmented packet.
2525          * This is not yet supported in MLX5, return appropriate
2526          * error message.
2527          */
2528         if (fragment_offset_spec == RTE_BE16(1) &&
2529             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2530                 return rte_flow_error_set(error, ENOTSUP,
2531                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2532                                           last, "match on last "
2533                                           "fragment not supported");
2534         /*
2535          * Match on fragment_offset spec 0x0001 and last 0x3fff
2536          * means MF and/or frag-offset is not 0.
2537          * This is a fragmented packet.
2538          * Other range values are invalid and rejected.
2539          */
2540         if (!(fragment_offset_spec == RTE_BE16(1) &&
2541               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2542                 return rte_flow_error_set(error, ENOTSUP,
2543                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2544                                           "specified range not supported");
2545         return 0;
2546 }
2547
2548 /**
2549  * Validate IPV6 fragment extension item.
2550  *
2551  * @param[in] item
2552  *   Item specification.
2553  * @param[in] item_flags
2554  *   Bit-fields that holds the items detected until now.
2555  * @param[out] error
2556  *   Pointer to error structure.
2557  *
2558  * @return
2559  *   0 on success, a negative errno value otherwise and rte_errno is set.
2560  */
2561 static int
2562 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2563                                     uint64_t item_flags,
2564                                     struct rte_flow_error *error)
2565 {
2566         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2567         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2568         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2569         rte_be16_t frag_data_spec = 0;
2570         rte_be16_t frag_data_last = 0;
2571         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2572         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2573                                       MLX5_FLOW_LAYER_OUTER_L4;
2574         int ret = 0;
2575         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2576                 .hdr = {
2577                         .next_header = 0xff,
2578                         .frag_data = RTE_BE16(0xffff),
2579                 },
2580         };
2581
2582         if (item_flags & l4m)
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2585                                           "ipv6 fragment extension item cannot "
2586                                           "follow L4 item.");
2587         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2588             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2589                 return rte_flow_error_set(error, EINVAL,
2590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2591                                           "ipv6 fragment extension item must "
2592                                           "follow ipv6 item");
2593         if (spec && mask)
2594                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2595         if (!frag_data_spec)
2596                 return 0;
2597         /*
2598          * spec and mask are valid, enforce using full mask to make sure the
2599          * complete value is used correctly.
2600          */
2601         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2602                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2603                 return rte_flow_error_set(error, EINVAL,
2604                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2605                                           item, "must use full mask for"
2606                                           " frag_data");
2607         /*
2608          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2609          * This is 1st fragment of fragmented packet.
2610          */
2611         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2612                 return rte_flow_error_set(error, ENOTSUP,
2613                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2614                                           "match on first fragment not "
2615                                           "supported");
2616         if (frag_data_spec && !last)
2617                 return rte_flow_error_set(error, EINVAL,
2618                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2619                                           "specified value not supported");
2620         ret = mlx5_flow_item_acceptable
2621                                 (item, (const uint8_t *)mask,
2622                                  (const uint8_t *)&nic_mask,
2623                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2624                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2625         if (ret)
2626                 return ret;
2627         /* spec and last are valid, validate the specified range. */
2628         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2629         /*
2630          * Match on frag_data spec 0x0009 and last 0xfff9
2631          * means M is 1 and frag-offset is > 0.
2632          * This packet is fragment 2nd and onward, excluding last.
2633          * This is not yet supported in MLX5, return appropriate
2634          * error message.
2635          */
2636         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2637                                        RTE_IPV6_EHDR_MF_MASK) &&
2638             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2639                 return rte_flow_error_set(error, ENOTSUP,
2640                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2641                                           last, "match on following "
2642                                           "fragments not supported");
2643         /*
2644          * Match on frag_data spec 0x0008 and last 0xfff8
2645          * means M is 0 and frag-offset is > 0.
2646          * This packet is last fragment of fragmented packet.
2647          * This is not yet supported in MLX5, return appropriate
2648          * error message.
2649          */
2650         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2651             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2652                 return rte_flow_error_set(error, ENOTSUP,
2653                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2654                                           last, "match on last "
2655                                           "fragment not supported");
2656         /* Other range values are invalid and rejected. */
2657         return rte_flow_error_set(error, EINVAL,
2658                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2659                                   "specified range not supported");
2660 }
2661
2662 /*
2663  * Validate ASO CT item.
2664  *
2665  * @param[in] dev
2666  *   Pointer to the rte_eth_dev structure.
2667  * @param[in] item
2668  *   Item specification.
2669  * @param[in] item_flags
2670  *   Pointer to bit-fields that holds the items detected until now.
2671  * @param[out] error
2672  *   Pointer to error structure.
2673  *
2674  * @return
2675  *   0 on success, a negative errno value otherwise and rte_errno is set.
2676  */
2677 static int
2678 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2679                              const struct rte_flow_item *item,
2680                              uint64_t *item_flags,
2681                              struct rte_flow_error *error)
2682 {
2683         const struct rte_flow_item_conntrack *spec = item->spec;
2684         const struct rte_flow_item_conntrack *mask = item->mask;
2685         RTE_SET_USED(dev);
2686         uint32_t flags;
2687
2688         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2689                 return rte_flow_error_set(error, EINVAL,
2690                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2691                                           "Only one CT is supported");
2692         if (!mask)
2693                 mask = &rte_flow_item_conntrack_mask;
2694         flags = spec->flags & mask->flags;
2695         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2696             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2697              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2698              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2699                 return rte_flow_error_set(error, EINVAL,
2700                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2701                                           "Conflict status bits");
2702         /* State change also needs to be considered. */
2703         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2704         return 0;
2705 }
2706
2707 /**
2708  * Validate the pop VLAN action.
2709  *
2710  * @param[in] dev
2711  *   Pointer to the rte_eth_dev structure.
2712  * @param[in] action_flags
2713  *   Holds the actions detected until now.
2714  * @param[in] action
2715  *   Pointer to the pop vlan action.
2716  * @param[in] item_flags
2717  *   The items found in this flow rule.
2718  * @param[in] attr
2719  *   Pointer to flow attributes.
2720  * @param[out] error
2721  *   Pointer to error structure.
2722  *
2723  * @return
2724  *   0 on success, a negative errno value otherwise and rte_errno is set.
2725  */
2726 static int
2727 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2728                                  uint64_t action_flags,
2729                                  const struct rte_flow_action *action,
2730                                  uint64_t item_flags,
2731                                  const struct rte_flow_attr *attr,
2732                                  struct rte_flow_error *error)
2733 {
2734         const struct mlx5_priv *priv = dev->data->dev_private;
2735         struct mlx5_dev_ctx_shared *sh = priv->sh;
2736         bool direction_error = false;
2737
2738         if (!priv->sh->pop_vlan_action)
2739                 return rte_flow_error_set(error, ENOTSUP,
2740                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2741                                           NULL,
2742                                           "pop vlan action is not supported");
2743         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2744         if (attr->transfer) {
2745                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2746                 bool is_cx5 = sh->steering_format_version ==
2747                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2748
2749                 if (fdb_tx && is_cx5)
2750                         direction_error = true;
2751         } else if (attr->egress) {
2752                 direction_error = true;
2753         }
2754         if (direction_error)
2755                 return rte_flow_error_set(error, ENOTSUP,
2756                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2757                                           NULL,
2758                                           "pop vlan action not supported for egress");
2759         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2760                 return rte_flow_error_set(error, ENOTSUP,
2761                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2762                                           "no support for multiple VLAN "
2763                                           "actions");
2764         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2765         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2766             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2767                 return rte_flow_error_set(error, ENOTSUP,
2768                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2769                                           NULL,
2770                                           "cannot pop vlan after decap without "
2771                                           "match on inner vlan in the flow");
2772         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2773         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2774             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2775                 return rte_flow_error_set(error, ENOTSUP,
2776                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2777                                           NULL,
2778                                           "cannot pop vlan without a "
2779                                           "match on (outer) vlan in the flow");
2780         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2781                 return rte_flow_error_set(error, EINVAL,
2782                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2783                                           "wrong action order, port_id should "
2784                                           "be after pop VLAN action");
2785         if (!attr->transfer && priv->representor)
2786                 return rte_flow_error_set(error, ENOTSUP,
2787                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2788                                           "pop vlan action for VF representor "
2789                                           "not supported on NIC table");
2790         return 0;
2791 }
2792
2793 /**
2794  * Get VLAN default info from vlan match info.
2795  *
2796  * @param[in] items
2797  *   the list of item specifications.
2798  * @param[out] vlan
2799  *   pointer VLAN info to fill to.
2800  *
2801  * @return
2802  *   0 on success, a negative errno value otherwise and rte_errno is set.
2803  */
2804 static void
2805 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2806                                   struct rte_vlan_hdr *vlan)
2807 {
2808         const struct rte_flow_item_vlan nic_mask = {
2809                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2810                                 MLX5DV_FLOW_VLAN_VID_MASK),
2811                 .inner_type = RTE_BE16(0xffff),
2812         };
2813
2814         if (items == NULL)
2815                 return;
2816         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2817                 int type = items->type;
2818
2819                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2820                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2821                         break;
2822         }
2823         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2824                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2825                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2826
2827                 /* If VLAN item in pattern doesn't contain data, return here. */
2828                 if (!vlan_v)
2829                         return;
2830                 if (!vlan_m)
2831                         vlan_m = &nic_mask;
2832                 /* Only full match values are accepted */
2833                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2834                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2835                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2836                         vlan->vlan_tci |=
2837                                 rte_be_to_cpu_16(vlan_v->tci &
2838                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2839                 }
2840                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2841                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2842                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2843                         vlan->vlan_tci |=
2844                                 rte_be_to_cpu_16(vlan_v->tci &
2845                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2846                 }
2847                 if (vlan_m->inner_type == nic_mask.inner_type)
2848                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2849                                                            vlan_m->inner_type);
2850         }
2851 }
2852
2853 /**
2854  * Validate the push VLAN action.
2855  *
2856  * @param[in] dev
2857  *   Pointer to the rte_eth_dev structure.
2858  * @param[in] action_flags
2859  *   Holds the actions detected until now.
2860  * @param[in] item_flags
2861  *   The items found in this flow rule.
2862  * @param[in] action
2863  *   Pointer to the action structure.
2864  * @param[in] attr
2865  *   Pointer to flow attributes
2866  * @param[out] error
2867  *   Pointer to error structure.
2868  *
2869  * @return
2870  *   0 on success, a negative errno value otherwise and rte_errno is set.
2871  */
2872 static int
2873 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2874                                   uint64_t action_flags,
2875                                   const struct rte_flow_item_vlan *vlan_m,
2876                                   const struct rte_flow_action *action,
2877                                   const struct rte_flow_attr *attr,
2878                                   struct rte_flow_error *error)
2879 {
2880         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2881         const struct mlx5_priv *priv = dev->data->dev_private;
2882         struct mlx5_dev_ctx_shared *sh = priv->sh;
2883         bool direction_error = false;
2884
2885         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2886             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2887                 return rte_flow_error_set(error, EINVAL,
2888                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2889                                           "invalid vlan ethertype");
2890         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2891                 return rte_flow_error_set(error, EINVAL,
2892                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2893                                           "wrong action order, port_id should "
2894                                           "be after push VLAN");
2895         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2896         if (attr->transfer) {
2897                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2898                 bool is_cx5 = sh->steering_format_version ==
2899                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2900
2901                 if (!fdb_tx && is_cx5)
2902                         direction_error = true;
2903         } else if (attr->ingress) {
2904                 direction_error = true;
2905         }
2906         if (direction_error)
2907                 return rte_flow_error_set(error, ENOTSUP,
2908                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2909                                           NULL,
2910                                           "push vlan action not supported for ingress");
2911         if (!attr->transfer && priv->representor)
2912                 return rte_flow_error_set(error, ENOTSUP,
2913                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2914                                           "push vlan action for VF representor "
2915                                           "not supported on NIC table");
2916         if (vlan_m &&
2917             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2918             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2919                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2920             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2921             !(mlx5_flow_find_action
2922                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2923                 return rte_flow_error_set(error, EINVAL,
2924                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2925                                           "not full match mask on VLAN PCP and "
2926                                           "there is no of_set_vlan_pcp action, "
2927                                           "push VLAN action cannot figure out "
2928                                           "PCP value");
2929         if (vlan_m &&
2930             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2931             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2932                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2933             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2934             !(mlx5_flow_find_action
2935                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2936                 return rte_flow_error_set(error, EINVAL,
2937                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2938                                           "not full match mask on VLAN VID and "
2939                                           "there is no of_set_vlan_vid action, "
2940                                           "push VLAN action cannot figure out "
2941                                           "VID value");
2942         (void)attr;
2943         return 0;
2944 }
2945
2946 /**
2947  * Validate the set VLAN PCP.
2948  *
2949  * @param[in] action_flags
2950  *   Holds the actions detected until now.
2951  * @param[in] actions
2952  *   Pointer to the list of actions remaining in the flow rule.
2953  * @param[out] error
2954  *   Pointer to error structure.
2955  *
2956  * @return
2957  *   0 on success, a negative errno value otherwise and rte_errno is set.
2958  */
2959 static int
2960 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2961                                      const struct rte_flow_action actions[],
2962                                      struct rte_flow_error *error)
2963 {
2964         const struct rte_flow_action *action = actions;
2965         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2966
2967         if (conf->vlan_pcp > 7)
2968                 return rte_flow_error_set(error, EINVAL,
2969                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2970                                           "VLAN PCP value is too big");
2971         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2972                 return rte_flow_error_set(error, ENOTSUP,
2973                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2974                                           "set VLAN PCP action must follow "
2975                                           "the push VLAN action");
2976         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2977                 return rte_flow_error_set(error, ENOTSUP,
2978                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2979                                           "Multiple VLAN PCP modification are "
2980                                           "not supported");
2981         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2982                 return rte_flow_error_set(error, EINVAL,
2983                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2984                                           "wrong action order, port_id should "
2985                                           "be after set VLAN PCP");
2986         return 0;
2987 }
2988
2989 /**
2990  * Validate the set VLAN VID.
2991  *
2992  * @param[in] item_flags
2993  *   Holds the items detected in this rule.
2994  * @param[in] action_flags
2995  *   Holds the actions detected until now.
2996  * @param[in] actions
2997  *   Pointer to the list of actions remaining in the flow rule.
2998  * @param[out] error
2999  *   Pointer to error structure.
3000  *
3001  * @return
3002  *   0 on success, a negative errno value otherwise and rte_errno is set.
3003  */
3004 static int
3005 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3006                                      uint64_t action_flags,
3007                                      const struct rte_flow_action actions[],
3008                                      struct rte_flow_error *error)
3009 {
3010         const struct rte_flow_action *action = actions;
3011         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3012
3013         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3014                 return rte_flow_error_set(error, EINVAL,
3015                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3016                                           "VLAN VID value is too big");
3017         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3018             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3019                 return rte_flow_error_set(error, ENOTSUP,
3020                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3021                                           "set VLAN VID action must follow push"
3022                                           " VLAN action or match on VLAN item");
3023         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3024                 return rte_flow_error_set(error, ENOTSUP,
3025                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3026                                           "Multiple VLAN VID modifications are "
3027                                           "not supported");
3028         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3029                 return rte_flow_error_set(error, EINVAL,
3030                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3031                                           "wrong action order, port_id should "
3032                                           "be after set VLAN VID");
3033         return 0;
3034 }
3035
3036 /*
3037  * Validate the FLAG action.
3038  *
3039  * @param[in] dev
3040  *   Pointer to the rte_eth_dev structure.
3041  * @param[in] action_flags
3042  *   Holds the actions detected until now.
3043  * @param[in] attr
3044  *   Pointer to flow attributes
3045  * @param[out] error
3046  *   Pointer to error structure.
3047  *
3048  * @return
3049  *   0 on success, a negative errno value otherwise and rte_errno is set.
3050  */
3051 static int
3052 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3053                              uint64_t action_flags,
3054                              const struct rte_flow_attr *attr,
3055                              struct rte_flow_error *error)
3056 {
3057         struct mlx5_priv *priv = dev->data->dev_private;
3058         struct mlx5_dev_config *config = &priv->config;
3059         int ret;
3060
3061         /* Fall back if no extended metadata register support. */
3062         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3063                 return mlx5_flow_validate_action_flag(action_flags, attr,
3064                                                       error);
3065         /* Extensive metadata mode requires registers. */
3066         if (!mlx5_flow_ext_mreg_supported(dev))
3067                 return rte_flow_error_set(error, ENOTSUP,
3068                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3069                                           "no metadata registers "
3070                                           "to support flag action");
3071         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3072                 return rte_flow_error_set(error, ENOTSUP,
3073                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3074                                           "extended metadata register"
3075                                           " isn't available");
3076         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3077         if (ret < 0)
3078                 return ret;
3079         MLX5_ASSERT(ret > 0);
3080         if (action_flags & MLX5_FLOW_ACTION_MARK)
3081                 return rte_flow_error_set(error, EINVAL,
3082                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3083                                           "can't mark and flag in same flow");
3084         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3085                 return rte_flow_error_set(error, EINVAL,
3086                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3087                                           "can't have 2 flag"
3088                                           " actions in same flow");
3089         return 0;
3090 }
3091
3092 /**
3093  * Validate MARK action.
3094  *
3095  * @param[in] dev
3096  *   Pointer to the rte_eth_dev structure.
3097  * @param[in] action
3098  *   Pointer to action.
3099  * @param[in] action_flags
3100  *   Holds the actions detected until now.
3101  * @param[in] attr
3102  *   Pointer to flow attributes
3103  * @param[out] error
3104  *   Pointer to error structure.
3105  *
3106  * @return
3107  *   0 on success, a negative errno value otherwise and rte_errno is set.
3108  */
3109 static int
3110 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3111                              const struct rte_flow_action *action,
3112                              uint64_t action_flags,
3113                              const struct rte_flow_attr *attr,
3114                              struct rte_flow_error *error)
3115 {
3116         struct mlx5_priv *priv = dev->data->dev_private;
3117         struct mlx5_dev_config *config = &priv->config;
3118         const struct rte_flow_action_mark *mark = action->conf;
3119         int ret;
3120
3121         if (is_tunnel_offload_active(dev))
3122                 return rte_flow_error_set(error, ENOTSUP,
3123                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3124                                           "no mark action "
3125                                           "if tunnel offload active");
3126         /* Fall back if no extended metadata register support. */
3127         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3128                 return mlx5_flow_validate_action_mark(action, action_flags,
3129                                                       attr, error);
3130         /* Extensive metadata mode requires registers. */
3131         if (!mlx5_flow_ext_mreg_supported(dev))
3132                 return rte_flow_error_set(error, ENOTSUP,
3133                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3134                                           "no metadata registers "
3135                                           "to support mark action");
3136         if (!priv->sh->dv_mark_mask)
3137                 return rte_flow_error_set(error, ENOTSUP,
3138                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3139                                           "extended metadata register"
3140                                           " isn't available");
3141         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3142         if (ret < 0)
3143                 return ret;
3144         MLX5_ASSERT(ret > 0);
3145         if (!mark)
3146                 return rte_flow_error_set(error, EINVAL,
3147                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3148                                           "configuration cannot be null");
3149         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3150                 return rte_flow_error_set(error, EINVAL,
3151                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3152                                           &mark->id,
3153                                           "mark id exceeds the limit");
3154         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3155                 return rte_flow_error_set(error, EINVAL,
3156                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3157                                           "can't flag and mark in same flow");
3158         if (action_flags & MLX5_FLOW_ACTION_MARK)
3159                 return rte_flow_error_set(error, EINVAL,
3160                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3161                                           "can't have 2 mark actions in same"
3162                                           " flow");
3163         return 0;
3164 }
3165
3166 /**
3167  * Validate SET_META action.
3168  *
3169  * @param[in] dev
3170  *   Pointer to the rte_eth_dev structure.
3171  * @param[in] action
3172  *   Pointer to the action structure.
3173  * @param[in] action_flags
3174  *   Holds the actions detected until now.
3175  * @param[in] attr
3176  *   Pointer to flow attributes
3177  * @param[out] error
3178  *   Pointer to error structure.
3179  *
3180  * @return
3181  *   0 on success, a negative errno value otherwise and rte_errno is set.
3182  */
3183 static int
3184 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3185                                  const struct rte_flow_action *action,
3186                                  uint64_t action_flags __rte_unused,
3187                                  const struct rte_flow_attr *attr,
3188                                  struct rte_flow_error *error)
3189 {
3190         struct mlx5_priv *priv = dev->data->dev_private;
3191         struct mlx5_dev_config *config = &priv->config;
3192         const struct rte_flow_action_set_meta *conf;
3193         uint32_t nic_mask = UINT32_MAX;
3194         int reg;
3195
3196         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3197             !mlx5_flow_ext_mreg_supported(dev))
3198                 return rte_flow_error_set(error, ENOTSUP,
3199                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3200                                           "extended metadata register"
3201                                           " isn't supported");
3202         reg = flow_dv_get_metadata_reg(dev, attr, error);
3203         if (reg < 0)
3204                 return reg;
3205         if (reg == REG_NON)
3206                 return rte_flow_error_set(error, ENOTSUP,
3207                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3208                                           "unavalable extended metadata register");
3209         if (reg != REG_A && reg != REG_B) {
3210                 struct mlx5_priv *priv = dev->data->dev_private;
3211
3212                 nic_mask = priv->sh->dv_meta_mask;
3213         }
3214         if (!(action->conf))
3215                 return rte_flow_error_set(error, EINVAL,
3216                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3217                                           "configuration cannot be null");
3218         conf = (const struct rte_flow_action_set_meta *)action->conf;
3219         if (!conf->mask)
3220                 return rte_flow_error_set(error, EINVAL,
3221                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3222                                           "zero mask doesn't have any effect");
3223         if (conf->mask & ~nic_mask)
3224                 return rte_flow_error_set(error, EINVAL,
3225                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3226                                           "meta data must be within reg C0");
3227         return 0;
3228 }
3229
3230 /**
3231  * Validate SET_TAG action.
3232  *
3233  * @param[in] dev
3234  *   Pointer to the rte_eth_dev structure.
3235  * @param[in] action
3236  *   Pointer to the action structure.
3237  * @param[in] action_flags
3238  *   Holds the actions detected until now.
3239  * @param[in] attr
3240  *   Pointer to flow attributes
3241  * @param[out] error
3242  *   Pointer to error structure.
3243  *
3244  * @return
3245  *   0 on success, a negative errno value otherwise and rte_errno is set.
3246  */
3247 static int
3248 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3249                                 const struct rte_flow_action *action,
3250                                 uint64_t action_flags,
3251                                 const struct rte_flow_attr *attr,
3252                                 struct rte_flow_error *error)
3253 {
3254         const struct rte_flow_action_set_tag *conf;
3255         const uint64_t terminal_action_flags =
3256                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3257                 MLX5_FLOW_ACTION_RSS;
3258         int ret;
3259
3260         if (!mlx5_flow_ext_mreg_supported(dev))
3261                 return rte_flow_error_set(error, ENOTSUP,
3262                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3263                                           "extensive metadata register"
3264                                           " isn't supported");
3265         if (!(action->conf))
3266                 return rte_flow_error_set(error, EINVAL,
3267                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3268                                           "configuration cannot be null");
3269         conf = (const struct rte_flow_action_set_tag *)action->conf;
3270         if (!conf->mask)
3271                 return rte_flow_error_set(error, EINVAL,
3272                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3273                                           "zero mask doesn't have any effect");
3274         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3275         if (ret < 0)
3276                 return ret;
3277         if (!attr->transfer && attr->ingress &&
3278             (action_flags & terminal_action_flags))
3279                 return rte_flow_error_set(error, EINVAL,
3280                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3281                                           "set_tag has no effect"
3282                                           " with terminal actions");
3283         return 0;
3284 }
3285
3286 /**
3287  * Validate count action.
3288  *
3289  * @param[in] dev
3290  *   Pointer to rte_eth_dev structure.
3291  * @param[in] shared
3292  *   Indicator if action is shared.
3293  * @param[in] action_flags
3294  *   Holds the actions detected until now.
3295  * @param[out] error
3296  *   Pointer to error structure.
3297  *
3298  * @return
3299  *   0 on success, a negative errno value otherwise and rte_errno is set.
3300  */
3301 static int
3302 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3303                               uint64_t action_flags,
3304                               struct rte_flow_error *error)
3305 {
3306         struct mlx5_priv *priv = dev->data->dev_private;
3307
3308         if (!priv->sh->devx)
3309                 goto notsup_err;
3310         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3311                 return rte_flow_error_set(error, EINVAL,
3312                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3313                                           "duplicate count actions set");
3314         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3315             !priv->sh->flow_hit_aso_en)
3316                 return rte_flow_error_set(error, EINVAL,
3317                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3318                                           "old age and shared count combination is not supported");
3319 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3320         return 0;
3321 #endif
3322 notsup_err:
3323         return rte_flow_error_set
3324                       (error, ENOTSUP,
3325                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3326                        NULL,
3327                        "count action not supported");
3328 }
3329
3330 /**
3331  * Validate the L2 encap action.
3332  *
3333  * @param[in] dev
3334  *   Pointer to the rte_eth_dev structure.
3335  * @param[in] action_flags
3336  *   Holds the actions detected until now.
3337  * @param[in] action
3338  *   Pointer to the action structure.
3339  * @param[in] attr
3340  *   Pointer to flow attributes.
3341  * @param[out] error
3342  *   Pointer to error structure.
3343  *
3344  * @return
3345  *   0 on success, a negative errno value otherwise and rte_errno is set.
3346  */
3347 static int
3348 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3349                                  uint64_t action_flags,
3350                                  const struct rte_flow_action *action,
3351                                  const struct rte_flow_attr *attr,
3352                                  struct rte_flow_error *error)
3353 {
3354         const struct mlx5_priv *priv = dev->data->dev_private;
3355
3356         if (!(action->conf))
3357                 return rte_flow_error_set(error, EINVAL,
3358                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3359                                           "configuration cannot be null");
3360         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3361                 return rte_flow_error_set(error, EINVAL,
3362                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3363                                           "can only have a single encap action "
3364                                           "in a flow");
3365         if (!attr->transfer && priv->representor)
3366                 return rte_flow_error_set(error, ENOTSUP,
3367                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3368                                           "encap action for VF representor "
3369                                           "not supported on NIC table");
3370         return 0;
3371 }
3372
3373 /**
3374  * Validate a decap action.
3375  *
3376  * @param[in] dev
3377  *   Pointer to the rte_eth_dev structure.
3378  * @param[in] action_flags
3379  *   Holds the actions detected until now.
3380  * @param[in] action
3381  *   Pointer to the action structure.
3382  * @param[in] item_flags
3383  *   Holds the items detected.
3384  * @param[in] attr
3385  *   Pointer to flow attributes
3386  * @param[out] error
3387  *   Pointer to error structure.
3388  *
3389  * @return
3390  *   0 on success, a negative errno value otherwise and rte_errno is set.
3391  */
3392 static int
3393 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3394                               uint64_t action_flags,
3395                               const struct rte_flow_action *action,
3396                               const uint64_t item_flags,
3397                               const struct rte_flow_attr *attr,
3398                               struct rte_flow_error *error)
3399 {
3400         const struct mlx5_priv *priv = dev->data->dev_private;
3401
3402         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3403             !priv->config.decap_en)
3404                 return rte_flow_error_set(error, ENOTSUP,
3405                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3406                                           "decap is not enabled");
3407         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3408                 return rte_flow_error_set(error, ENOTSUP,
3409                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3410                                           action_flags &
3411                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3412                                           "have a single decap action" : "decap "
3413                                           "after encap is not supported");
3414         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3415                 return rte_flow_error_set(error, EINVAL,
3416                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3417                                           "can't have decap action after"
3418                                           " modify action");
3419         if (attr->egress)
3420                 return rte_flow_error_set(error, ENOTSUP,
3421                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3422                                           NULL,
3423                                           "decap action not supported for "
3424                                           "egress");
3425         if (!attr->transfer && priv->representor)
3426                 return rte_flow_error_set(error, ENOTSUP,
3427                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3428                                           "decap action for VF representor "
3429                                           "not supported on NIC table");
3430         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3431             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3432                 return rte_flow_error_set(error, ENOTSUP,
3433                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3434                                 "VXLAN item should be present for VXLAN decap");
3435         return 0;
3436 }
3437
3438 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3439
3440 /**
3441  * Validate the raw encap and decap actions.
3442  *
3443  * @param[in] dev
3444  *   Pointer to the rte_eth_dev structure.
3445  * @param[in] decap
3446  *   Pointer to the decap action.
3447  * @param[in] encap
3448  *   Pointer to the encap action.
3449  * @param[in] attr
3450  *   Pointer to flow attributes
3451  * @param[in/out] action_flags
3452  *   Holds the actions detected until now.
3453  * @param[out] actions_n
3454  *   pointer to the number of actions counter.
3455  * @param[in] action
3456  *   Pointer to the action structure.
3457  * @param[in] item_flags
3458  *   Holds the items detected.
3459  * @param[out] error
3460  *   Pointer to error structure.
3461  *
3462  * @return
3463  *   0 on success, a negative errno value otherwise and rte_errno is set.
3464  */
3465 static int
3466 flow_dv_validate_action_raw_encap_decap
3467         (struct rte_eth_dev *dev,
3468          const struct rte_flow_action_raw_decap *decap,
3469          const struct rte_flow_action_raw_encap *encap,
3470          const struct rte_flow_attr *attr, uint64_t *action_flags,
3471          int *actions_n, const struct rte_flow_action *action,
3472          uint64_t item_flags, struct rte_flow_error *error)
3473 {
3474         const struct mlx5_priv *priv = dev->data->dev_private;
3475         int ret;
3476
3477         if (encap && (!encap->size || !encap->data))
3478                 return rte_flow_error_set(error, EINVAL,
3479                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3480                                           "raw encap data cannot be empty");
3481         if (decap && encap) {
3482                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3483                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3484                         /* L3 encap. */
3485                         decap = NULL;
3486                 else if (encap->size <=
3487                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3488                            decap->size >
3489                            MLX5_ENCAPSULATION_DECISION_SIZE)
3490                         /* L3 decap. */
3491                         encap = NULL;
3492                 else if (encap->size >
3493                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3494                            decap->size >
3495                            MLX5_ENCAPSULATION_DECISION_SIZE)
3496                         /* 2 L2 actions: encap and decap. */
3497                         ;
3498                 else
3499                         return rte_flow_error_set(error,
3500                                 ENOTSUP,
3501                                 RTE_FLOW_ERROR_TYPE_ACTION,
3502                                 NULL, "unsupported too small "
3503                                 "raw decap and too small raw "
3504                                 "encap combination");
3505         }
3506         if (decap) {
3507                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3508                                                     item_flags, attr, error);
3509                 if (ret < 0)
3510                         return ret;
3511                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3512                 ++(*actions_n);
3513         }
3514         if (encap) {
3515                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3516                         return rte_flow_error_set(error, ENOTSUP,
3517                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3518                                                   NULL,
3519                                                   "small raw encap size");
3520                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3521                         return rte_flow_error_set(error, EINVAL,
3522                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3523                                                   NULL,
3524                                                   "more than one encap action");
3525                 if (!attr->transfer && priv->representor)
3526                         return rte_flow_error_set
3527                                         (error, ENOTSUP,
3528                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3529                                          "encap action for VF representor "
3530                                          "not supported on NIC table");
3531                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3532                 ++(*actions_n);
3533         }
3534         return 0;
3535 }
3536
3537 /*
3538  * Validate the ASO CT action.
3539  *
3540  * @param[in] dev
3541  *   Pointer to the rte_eth_dev structure.
3542  * @param[in] action_flags
3543  *   Holds the actions detected until now.
3544  * @param[in] item_flags
3545  *   The items found in this flow rule.
3546  * @param[in] attr
3547  *   Pointer to flow attributes.
3548  * @param[out] error
3549  *   Pointer to error structure.
3550  *
3551  * @return
3552  *   0 on success, a negative errno value otherwise and rte_errno is set.
3553  */
3554 static int
3555 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3556                                uint64_t action_flags,
3557                                uint64_t item_flags,
3558                                const struct rte_flow_attr *attr,
3559                                struct rte_flow_error *error)
3560 {
3561         RTE_SET_USED(dev);
3562
3563         if (attr->group == 0 && !attr->transfer)
3564                 return rte_flow_error_set(error, ENOTSUP,
3565                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3566                                           NULL,
3567                                           "Only support non-root table");
3568         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3569                 return rte_flow_error_set(error, ENOTSUP,
3570                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3571                                           "CT cannot follow a fate action");
3572         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3573             (action_flags & MLX5_FLOW_ACTION_AGE))
3574                 return rte_flow_error_set(error, EINVAL,
3575                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3576                                           "Only one ASO action is supported");
3577         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3578                 return rte_flow_error_set(error, EINVAL,
3579                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3580                                           "Encap cannot exist before CT");
3581         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3582                 return rte_flow_error_set(error, EINVAL,
3583                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3584                                           "Not a outer TCP packet");
3585         return 0;
3586 }
3587
3588 int
3589 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3590                              struct mlx5_list_entry *entry, void *cb_ctx)
3591 {
3592         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3593         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3594         struct mlx5_flow_dv_encap_decap_resource *resource;
3595
3596         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3597                                 entry);
3598         if (resource->reformat_type == ctx_resource->reformat_type &&
3599             resource->ft_type == ctx_resource->ft_type &&
3600             resource->flags == ctx_resource->flags &&
3601             resource->size == ctx_resource->size &&
3602             !memcmp((const void *)resource->buf,
3603                     (const void *)ctx_resource->buf,
3604                     resource->size))
3605                 return 0;
3606         return -1;
3607 }
3608
3609 struct mlx5_list_entry *
3610 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3611 {
3612         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3613         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3614         struct mlx5dv_dr_domain *domain;
3615         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3616         struct mlx5_flow_dv_encap_decap_resource *resource;
3617         uint32_t idx;
3618         int ret;
3619
3620         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3621                 domain = sh->fdb_domain;
3622         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3623                 domain = sh->rx_domain;
3624         else
3625                 domain = sh->tx_domain;
3626         /* Register new encap/decap resource. */
3627         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3628         if (!resource) {
3629                 rte_flow_error_set(ctx->error, ENOMEM,
3630                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3631                                    "cannot allocate resource memory");
3632                 return NULL;
3633         }
3634         *resource = *ctx_resource;
3635         resource->idx = idx;
3636         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3637                                                               domain, resource,
3638                                                              &resource->action);
3639         if (ret) {
3640                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3641                 rte_flow_error_set(ctx->error, ENOMEM,
3642                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3643                                    NULL, "cannot create action");
3644                 return NULL;
3645         }
3646
3647         return &resource->entry;
3648 }
3649
3650 struct mlx5_list_entry *
3651 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3652                              void *cb_ctx)
3653 {
3654         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3655         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3656         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3657         uint32_t idx;
3658
3659         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3660                                            &idx);
3661         if (!cache_resource) {
3662                 rte_flow_error_set(ctx->error, ENOMEM,
3663                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3664                                    "cannot allocate resource memory");
3665                 return NULL;
3666         }
3667         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3668         cache_resource->idx = idx;
3669         return &cache_resource->entry;
3670 }
3671
3672 void
3673 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3674 {
3675         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3676         struct mlx5_flow_dv_encap_decap_resource *res =
3677                                        container_of(entry, typeof(*res), entry);
3678
3679         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3680 }
3681
3682 /**
3683  * Find existing encap/decap resource or create and register a new one.
3684  *
3685  * @param[in, out] dev
3686  *   Pointer to rte_eth_dev structure.
3687  * @param[in, out] resource
3688  *   Pointer to encap/decap resource.
3689  * @parm[in, out] dev_flow
3690  *   Pointer to the dev_flow.
3691  * @param[out] error
3692  *   pointer to error structure.
3693  *
3694  * @return
3695  *   0 on success otherwise -errno and errno is set.
3696  */
3697 static int
3698 flow_dv_encap_decap_resource_register
3699                         (struct rte_eth_dev *dev,
3700                          struct mlx5_flow_dv_encap_decap_resource *resource,
3701                          struct mlx5_flow *dev_flow,
3702                          struct rte_flow_error *error)
3703 {
3704         struct mlx5_priv *priv = dev->data->dev_private;
3705         struct mlx5_dev_ctx_shared *sh = priv->sh;
3706         struct mlx5_list_entry *entry;
3707         union {
3708                 struct {
3709                         uint32_t ft_type:8;
3710                         uint32_t refmt_type:8;
3711                         /*
3712                          * Header reformat actions can be shared between
3713                          * non-root tables. One bit to indicate non-root
3714                          * table or not.
3715                          */
3716                         uint32_t is_root:1;
3717                         uint32_t reserve:15;
3718                 };
3719                 uint32_t v32;
3720         } encap_decap_key = {
3721                 {
3722                         .ft_type = resource->ft_type,
3723                         .refmt_type = resource->reformat_type,
3724                         .is_root = !!dev_flow->dv.group,
3725                         .reserve = 0,
3726                 }
3727         };
3728         struct mlx5_flow_cb_ctx ctx = {
3729                 .error = error,
3730                 .data = resource,
3731         };
3732         struct mlx5_hlist *encaps_decaps;
3733         uint64_t key64;
3734
3735         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3736                                 "encaps_decaps",
3737                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3738                                 true, true, sh,
3739                                 flow_dv_encap_decap_create_cb,
3740                                 flow_dv_encap_decap_match_cb,
3741                                 flow_dv_encap_decap_remove_cb,
3742                                 flow_dv_encap_decap_clone_cb,
3743                                 flow_dv_encap_decap_clone_free_cb);
3744         if (unlikely(!encaps_decaps))
3745                 return -rte_errno;
3746         resource->flags = dev_flow->dv.group ? 0 : 1;
3747         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3748                                  sizeof(encap_decap_key.v32), 0);
3749         if (resource->reformat_type !=
3750             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3751             resource->size)
3752                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3753         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3754         if (!entry)
3755                 return -rte_errno;
3756         resource = container_of(entry, typeof(*resource), entry);
3757         dev_flow->dv.encap_decap = resource;
3758         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3759         return 0;
3760 }
3761
3762 /**
3763  * Find existing table jump resource or create and register a new one.
3764  *
3765  * @param[in, out] dev
3766  *   Pointer to rte_eth_dev structure.
3767  * @param[in, out] tbl
3768  *   Pointer to flow table resource.
3769  * @parm[in, out] dev_flow
3770  *   Pointer to the dev_flow.
3771  * @param[out] error
3772  *   pointer to error structure.
3773  *
3774  * @return
3775  *   0 on success otherwise -errno and errno is set.
3776  */
3777 static int
3778 flow_dv_jump_tbl_resource_register
3779                         (struct rte_eth_dev *dev __rte_unused,
3780                          struct mlx5_flow_tbl_resource *tbl,
3781                          struct mlx5_flow *dev_flow,
3782                          struct rte_flow_error *error __rte_unused)
3783 {
3784         struct mlx5_flow_tbl_data_entry *tbl_data =
3785                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3786
3787         MLX5_ASSERT(tbl);
3788         MLX5_ASSERT(tbl_data->jump.action);
3789         dev_flow->handle->rix_jump = tbl_data->idx;
3790         dev_flow->dv.jump = &tbl_data->jump;
3791         return 0;
3792 }
3793
3794 int
3795 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3796                          struct mlx5_list_entry *entry, void *cb_ctx)
3797 {
3798         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3799         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3800         struct mlx5_flow_dv_port_id_action_resource *res =
3801                                        container_of(entry, typeof(*res), entry);
3802
3803         return ref->port_id != res->port_id;
3804 }
3805
3806 struct mlx5_list_entry *
3807 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3808 {
3809         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3810         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3811         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3812         struct mlx5_flow_dv_port_id_action_resource *resource;
3813         uint32_t idx;
3814         int ret;
3815
3816         /* Register new port id action resource. */
3817         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3818         if (!resource) {
3819                 rte_flow_error_set(ctx->error, ENOMEM,
3820                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3821                                    "cannot allocate port_id action memory");
3822                 return NULL;
3823         }
3824         *resource = *ref;
3825         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3826                                                         ref->port_id,
3827                                                         &resource->action);
3828         if (ret) {
3829                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3830                 rte_flow_error_set(ctx->error, ENOMEM,
3831                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3832                                    "cannot create action");
3833                 return NULL;
3834         }
3835         resource->idx = idx;
3836         return &resource->entry;
3837 }
3838
3839 struct mlx5_list_entry *
3840 flow_dv_port_id_clone_cb(void *tool_ctx,
3841                          struct mlx5_list_entry *entry __rte_unused,
3842                          void *cb_ctx)
3843 {
3844         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3845         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3846         struct mlx5_flow_dv_port_id_action_resource *resource;
3847         uint32_t idx;
3848
3849         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3850         if (!resource) {
3851                 rte_flow_error_set(ctx->error, ENOMEM,
3852                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3853                                    "cannot allocate port_id action memory");
3854                 return NULL;
3855         }
3856         memcpy(resource, entry, sizeof(*resource));
3857         resource->idx = idx;
3858         return &resource->entry;
3859 }
3860
3861 void
3862 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3863 {
3864         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3865         struct mlx5_flow_dv_port_id_action_resource *resource =
3866                                   container_of(entry, typeof(*resource), entry);
3867
3868         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3869 }
3870
3871 /**
3872  * Find existing table port ID resource or create and register a new one.
3873  *
3874  * @param[in, out] dev
3875  *   Pointer to rte_eth_dev structure.
3876  * @param[in, out] ref
3877  *   Pointer to port ID action resource reference.
3878  * @parm[in, out] dev_flow
3879  *   Pointer to the dev_flow.
3880  * @param[out] error
3881  *   pointer to error structure.
3882  *
3883  * @return
3884  *   0 on success otherwise -errno and errno is set.
3885  */
3886 static int
3887 flow_dv_port_id_action_resource_register
3888                         (struct rte_eth_dev *dev,
3889                          struct mlx5_flow_dv_port_id_action_resource *ref,
3890                          struct mlx5_flow *dev_flow,
3891                          struct rte_flow_error *error)
3892 {
3893         struct mlx5_priv *priv = dev->data->dev_private;
3894         struct mlx5_list_entry *entry;
3895         struct mlx5_flow_dv_port_id_action_resource *resource;
3896         struct mlx5_flow_cb_ctx ctx = {
3897                 .error = error,
3898                 .data = ref,
3899         };
3900
3901         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3902         if (!entry)
3903                 return -rte_errno;
3904         resource = container_of(entry, typeof(*resource), entry);
3905         dev_flow->dv.port_id_action = resource;
3906         dev_flow->handle->rix_port_id_action = resource->idx;
3907         return 0;
3908 }
3909
3910 int
3911 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3912                            struct mlx5_list_entry *entry, void *cb_ctx)
3913 {
3914         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3915         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3916         struct mlx5_flow_dv_push_vlan_action_resource *res =
3917                                        container_of(entry, typeof(*res), entry);
3918
3919         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3920 }
3921
3922 struct mlx5_list_entry *
3923 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3924 {
3925         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3926         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3927         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3928         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3929         struct mlx5dv_dr_domain *domain;
3930         uint32_t idx;
3931         int ret;
3932
3933         /* Register new port id action resource. */
3934         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3935         if (!resource) {
3936                 rte_flow_error_set(ctx->error, ENOMEM,
3937                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3938                                    "cannot allocate push_vlan action memory");
3939                 return NULL;
3940         }
3941         *resource = *ref;
3942         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3943                 domain = sh->fdb_domain;
3944         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3945                 domain = sh->rx_domain;
3946         else
3947                 domain = sh->tx_domain;
3948         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3949                                                         &resource->action);
3950         if (ret) {
3951                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3952                 rte_flow_error_set(ctx->error, ENOMEM,
3953                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3954                                    "cannot create push vlan action");
3955                 return NULL;
3956         }
3957         resource->idx = idx;
3958         return &resource->entry;
3959 }
3960
3961 struct mlx5_list_entry *
3962 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3963                            struct mlx5_list_entry *entry __rte_unused,
3964                            void *cb_ctx)
3965 {
3966         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3967         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3968         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3969         uint32_t idx;
3970
3971         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3972         if (!resource) {
3973                 rte_flow_error_set(ctx->error, ENOMEM,
3974                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3975                                    "cannot allocate push_vlan action memory");
3976                 return NULL;
3977         }
3978         memcpy(resource, entry, sizeof(*resource));
3979         resource->idx = idx;
3980         return &resource->entry;
3981 }
3982
3983 void
3984 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3985 {
3986         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3987         struct mlx5_flow_dv_push_vlan_action_resource *resource =
3988                                   container_of(entry, typeof(*resource), entry);
3989
3990         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3991 }
3992
3993 /**
3994  * Find existing push vlan resource or create and register a new one.
3995  *
3996  * @param [in, out] dev
3997  *   Pointer to rte_eth_dev structure.
3998  * @param[in, out] ref
3999  *   Pointer to port ID action resource reference.
4000  * @parm[in, out] dev_flow
4001  *   Pointer to the dev_flow.
4002  * @param[out] error
4003  *   pointer to error structure.
4004  *
4005  * @return
4006  *   0 on success otherwise -errno and errno is set.
4007  */
4008 static int
4009 flow_dv_push_vlan_action_resource_register
4010                        (struct rte_eth_dev *dev,
4011                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4012                         struct mlx5_flow *dev_flow,
4013                         struct rte_flow_error *error)
4014 {
4015         struct mlx5_priv *priv = dev->data->dev_private;
4016         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4017         struct mlx5_list_entry *entry;
4018         struct mlx5_flow_cb_ctx ctx = {
4019                 .error = error,
4020                 .data = ref,
4021         };
4022
4023         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4024         if (!entry)
4025                 return -rte_errno;
4026         resource = container_of(entry, typeof(*resource), entry);
4027
4028         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4029         dev_flow->dv.push_vlan_res = resource;
4030         return 0;
4031 }
4032
4033 /**
4034  * Get the size of specific rte_flow_item_type hdr size
4035  *
4036  * @param[in] item_type
4037  *   Tested rte_flow_item_type.
4038  *
4039  * @return
4040  *   sizeof struct item_type, 0 if void or irrelevant.
4041  */
4042 static size_t
4043 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4044 {
4045         size_t retval;
4046
4047         switch (item_type) {
4048         case RTE_FLOW_ITEM_TYPE_ETH:
4049                 retval = sizeof(struct rte_ether_hdr);
4050                 break;
4051         case RTE_FLOW_ITEM_TYPE_VLAN:
4052                 retval = sizeof(struct rte_vlan_hdr);
4053                 break;
4054         case RTE_FLOW_ITEM_TYPE_IPV4:
4055                 retval = sizeof(struct rte_ipv4_hdr);
4056                 break;
4057         case RTE_FLOW_ITEM_TYPE_IPV6:
4058                 retval = sizeof(struct rte_ipv6_hdr);
4059                 break;
4060         case RTE_FLOW_ITEM_TYPE_UDP:
4061                 retval = sizeof(struct rte_udp_hdr);
4062                 break;
4063         case RTE_FLOW_ITEM_TYPE_TCP:
4064                 retval = sizeof(struct rte_tcp_hdr);
4065                 break;
4066         case RTE_FLOW_ITEM_TYPE_VXLAN:
4067         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4068                 retval = sizeof(struct rte_vxlan_hdr);
4069                 break;
4070         case RTE_FLOW_ITEM_TYPE_GRE:
4071         case RTE_FLOW_ITEM_TYPE_NVGRE:
4072                 retval = sizeof(struct rte_gre_hdr);
4073                 break;
4074         case RTE_FLOW_ITEM_TYPE_MPLS:
4075                 retval = sizeof(struct rte_mpls_hdr);
4076                 break;
4077         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4078         default:
4079                 retval = 0;
4080                 break;
4081         }
4082         return retval;
4083 }
4084
4085 #define MLX5_ENCAP_IPV4_VERSION         0x40
4086 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4087 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4088 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4089 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4090 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4091 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4092
4093 /**
4094  * Convert the encap action data from list of rte_flow_item to raw buffer
4095  *
4096  * @param[in] items
4097  *   Pointer to rte_flow_item objects list.
4098  * @param[out] buf
4099  *   Pointer to the output buffer.
4100  * @param[out] size
4101  *   Pointer to the output buffer size.
4102  * @param[out] error
4103  *   Pointer to the error structure.
4104  *
4105  * @return
4106  *   0 on success, a negative errno value otherwise and rte_errno is set.
4107  */
4108 static int
4109 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4110                            size_t *size, struct rte_flow_error *error)
4111 {
4112         struct rte_ether_hdr *eth = NULL;
4113         struct rte_vlan_hdr *vlan = NULL;
4114         struct rte_ipv4_hdr *ipv4 = NULL;
4115         struct rte_ipv6_hdr *ipv6 = NULL;
4116         struct rte_udp_hdr *udp = NULL;
4117         struct rte_vxlan_hdr *vxlan = NULL;
4118         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4119         struct rte_gre_hdr *gre = NULL;
4120         size_t len;
4121         size_t temp_size = 0;
4122
4123         if (!items)
4124                 return rte_flow_error_set(error, EINVAL,
4125                                           RTE_FLOW_ERROR_TYPE_ACTION,
4126                                           NULL, "invalid empty data");
4127         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4128                 len = flow_dv_get_item_hdr_len(items->type);
4129                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4130                         return rte_flow_error_set(error, EINVAL,
4131                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4132                                                   (void *)items->type,
4133                                                   "items total size is too big"
4134                                                   " for encap action");
4135                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4136                 switch (items->type) {
4137                 case RTE_FLOW_ITEM_TYPE_ETH:
4138                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4139                         break;
4140                 case RTE_FLOW_ITEM_TYPE_VLAN:
4141                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4142                         if (!eth)
4143                                 return rte_flow_error_set(error, EINVAL,
4144                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4145                                                 (void *)items->type,
4146                                                 "eth header not found");
4147                         if (!eth->ether_type)
4148                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4149                         break;
4150                 case RTE_FLOW_ITEM_TYPE_IPV4:
4151                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4152                         if (!vlan && !eth)
4153                                 return rte_flow_error_set(error, EINVAL,
4154                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4155                                                 (void *)items->type,
4156                                                 "neither eth nor vlan"
4157                                                 " header found");
4158                         if (vlan && !vlan->eth_proto)
4159                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4160                         else if (eth && !eth->ether_type)
4161                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4162                         if (!ipv4->version_ihl)
4163                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4164                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4165                         if (!ipv4->time_to_live)
4166                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4167                         break;
4168                 case RTE_FLOW_ITEM_TYPE_IPV6:
4169                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4170                         if (!vlan && !eth)
4171                                 return rte_flow_error_set(error, EINVAL,
4172                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4173                                                 (void *)items->type,
4174                                                 "neither eth nor vlan"
4175                                                 " header found");
4176                         if (vlan && !vlan->eth_proto)
4177                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4178                         else if (eth && !eth->ether_type)
4179                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4180                         if (!ipv6->vtc_flow)
4181                                 ipv6->vtc_flow =
4182                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4183                         if (!ipv6->hop_limits)
4184                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4185                         break;
4186                 case RTE_FLOW_ITEM_TYPE_UDP:
4187                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4188                         if (!ipv4 && !ipv6)
4189                                 return rte_flow_error_set(error, EINVAL,
4190                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4191                                                 (void *)items->type,
4192                                                 "ip header not found");
4193                         if (ipv4 && !ipv4->next_proto_id)
4194                                 ipv4->next_proto_id = IPPROTO_UDP;
4195                         else if (ipv6 && !ipv6->proto)
4196                                 ipv6->proto = IPPROTO_UDP;
4197                         break;
4198                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4199                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4200                         if (!udp)
4201                                 return rte_flow_error_set(error, EINVAL,
4202                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4203                                                 (void *)items->type,
4204                                                 "udp header not found");
4205                         if (!udp->dst_port)
4206                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4207                         if (!vxlan->vx_flags)
4208                                 vxlan->vx_flags =
4209                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4210                         break;
4211                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4212                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4213                         if (!udp)
4214                                 return rte_flow_error_set(error, EINVAL,
4215                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4216                                                 (void *)items->type,
4217                                                 "udp header not found");
4218                         if (!vxlan_gpe->proto)
4219                                 return rte_flow_error_set(error, EINVAL,
4220                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4221                                                 (void *)items->type,
4222                                                 "next protocol not found");
4223                         if (!udp->dst_port)
4224                                 udp->dst_port =
4225                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4226                         if (!vxlan_gpe->vx_flags)
4227                                 vxlan_gpe->vx_flags =
4228                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4229                         break;
4230                 case RTE_FLOW_ITEM_TYPE_GRE:
4231                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4232                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4233                         if (!gre->proto)
4234                                 return rte_flow_error_set(error, EINVAL,
4235                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4236                                                 (void *)items->type,
4237                                                 "next protocol not found");
4238                         if (!ipv4 && !ipv6)
4239                                 return rte_flow_error_set(error, EINVAL,
4240                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4241                                                 (void *)items->type,
4242                                                 "ip header not found");
4243                         if (ipv4 && !ipv4->next_proto_id)
4244                                 ipv4->next_proto_id = IPPROTO_GRE;
4245                         else if (ipv6 && !ipv6->proto)
4246                                 ipv6->proto = IPPROTO_GRE;
4247                         break;
4248                 case RTE_FLOW_ITEM_TYPE_VOID:
4249                         break;
4250                 default:
4251                         return rte_flow_error_set(error, EINVAL,
4252                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4253                                                   (void *)items->type,
4254                                                   "unsupported item type");
4255                         break;
4256                 }
4257                 temp_size += len;
4258         }
4259         *size = temp_size;
4260         return 0;
4261 }
4262
4263 static int
4264 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4265 {
4266         struct rte_ether_hdr *eth = NULL;
4267         struct rte_vlan_hdr *vlan = NULL;
4268         struct rte_ipv6_hdr *ipv6 = NULL;
4269         struct rte_udp_hdr *udp = NULL;
4270         char *next_hdr;
4271         uint16_t proto;
4272
4273         eth = (struct rte_ether_hdr *)data;
4274         next_hdr = (char *)(eth + 1);
4275         proto = RTE_BE16(eth->ether_type);
4276
4277         /* VLAN skipping */
4278         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4279                 vlan = (struct rte_vlan_hdr *)next_hdr;
4280                 proto = RTE_BE16(vlan->eth_proto);
4281                 next_hdr += sizeof(struct rte_vlan_hdr);
4282         }
4283
4284         /* HW calculates IPv4 csum. no need to proceed */
4285         if (proto == RTE_ETHER_TYPE_IPV4)
4286                 return 0;
4287
4288         /* non IPv4/IPv6 header. not supported */
4289         if (proto != RTE_ETHER_TYPE_IPV6) {
4290                 return rte_flow_error_set(error, ENOTSUP,
4291                                           RTE_FLOW_ERROR_TYPE_ACTION,
4292                                           NULL, "Cannot offload non IPv4/IPv6");
4293         }
4294
4295         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4296
4297         /* ignore non UDP */
4298         if (ipv6->proto != IPPROTO_UDP)
4299                 return 0;
4300
4301         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4302         udp->dgram_cksum = 0;
4303
4304         return 0;
4305 }
4306
4307 /**
4308  * Convert L2 encap action to DV specification.
4309  *
4310  * @param[in] dev
4311  *   Pointer to rte_eth_dev structure.
4312  * @param[in] action
4313  *   Pointer to action structure.
4314  * @param[in, out] dev_flow
4315  *   Pointer to the mlx5_flow.
4316  * @param[in] transfer
4317  *   Mark if the flow is E-Switch flow.
4318  * @param[out] error
4319  *   Pointer to the error structure.
4320  *
4321  * @return
4322  *   0 on success, a negative errno value otherwise and rte_errno is set.
4323  */
4324 static int
4325 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4326                                const struct rte_flow_action *action,
4327                                struct mlx5_flow *dev_flow,
4328                                uint8_t transfer,
4329                                struct rte_flow_error *error)
4330 {
4331         const struct rte_flow_item *encap_data;
4332         const struct rte_flow_action_raw_encap *raw_encap_data;
4333         struct mlx5_flow_dv_encap_decap_resource res = {
4334                 .reformat_type =
4335                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4336                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4337                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4338         };
4339
4340         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4341                 raw_encap_data =
4342                         (const struct rte_flow_action_raw_encap *)action->conf;
4343                 res.size = raw_encap_data->size;
4344                 memcpy(res.buf, raw_encap_data->data, res.size);
4345         } else {
4346                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4347                         encap_data =
4348                                 ((const struct rte_flow_action_vxlan_encap *)
4349                                                 action->conf)->definition;
4350                 else
4351                         encap_data =
4352                                 ((const struct rte_flow_action_nvgre_encap *)
4353                                                 action->conf)->definition;
4354                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4355                                                &res.size, error))
4356                         return -rte_errno;
4357         }
4358         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4359                 return -rte_errno;
4360         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4361                 return rte_flow_error_set(error, EINVAL,
4362                                           RTE_FLOW_ERROR_TYPE_ACTION,
4363                                           NULL, "can't create L2 encap action");
4364         return 0;
4365 }
4366
4367 /**
4368  * Convert L2 decap action to DV specification.
4369  *
4370  * @param[in] dev
4371  *   Pointer to rte_eth_dev structure.
4372  * @param[in, out] dev_flow
4373  *   Pointer to the mlx5_flow.
4374  * @param[in] transfer
4375  *   Mark if the flow is E-Switch flow.
4376  * @param[out] error
4377  *   Pointer to the error structure.
4378  *
4379  * @return
4380  *   0 on success, a negative errno value otherwise and rte_errno is set.
4381  */
4382 static int
4383 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4384                                struct mlx5_flow *dev_flow,
4385                                uint8_t transfer,
4386                                struct rte_flow_error *error)
4387 {
4388         struct mlx5_flow_dv_encap_decap_resource res = {
4389                 .size = 0,
4390                 .reformat_type =
4391                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4392                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4393                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4394         };
4395
4396         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4397                 return rte_flow_error_set(error, EINVAL,
4398                                           RTE_FLOW_ERROR_TYPE_ACTION,
4399                                           NULL, "can't create L2 decap action");
4400         return 0;
4401 }
4402
4403 /**
4404  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4405  *
4406  * @param[in] dev
4407  *   Pointer to rte_eth_dev structure.
4408  * @param[in] action
4409  *   Pointer to action structure.
4410  * @param[in, out] dev_flow
4411  *   Pointer to the mlx5_flow.
4412  * @param[in] attr
4413  *   Pointer to the flow attributes.
4414  * @param[out] error
4415  *   Pointer to the error structure.
4416  *
4417  * @return
4418  *   0 on success, a negative errno value otherwise and rte_errno is set.
4419  */
4420 static int
4421 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4422                                 const struct rte_flow_action *action,
4423                                 struct mlx5_flow *dev_flow,
4424                                 const struct rte_flow_attr *attr,
4425                                 struct rte_flow_error *error)
4426 {
4427         const struct rte_flow_action_raw_encap *encap_data;
4428         struct mlx5_flow_dv_encap_decap_resource res;
4429
4430         memset(&res, 0, sizeof(res));
4431         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4432         res.size = encap_data->size;
4433         memcpy(res.buf, encap_data->data, res.size);
4434         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4435                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4436                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4437         if (attr->transfer)
4438                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4439         else
4440                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4441                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4442         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4443                 return rte_flow_error_set(error, EINVAL,
4444                                           RTE_FLOW_ERROR_TYPE_ACTION,
4445                                           NULL, "can't create encap action");
4446         return 0;
4447 }
4448
4449 /**
4450  * Create action push VLAN.
4451  *
4452  * @param[in] dev
4453  *   Pointer to rte_eth_dev structure.
4454  * @param[in] attr
4455  *   Pointer to the flow attributes.
4456  * @param[in] vlan
4457  *   Pointer to the vlan to push to the Ethernet header.
4458  * @param[in, out] dev_flow
4459  *   Pointer to the mlx5_flow.
4460  * @param[out] error
4461  *   Pointer to the error structure.
4462  *
4463  * @return
4464  *   0 on success, a negative errno value otherwise and rte_errno is set.
4465  */
4466 static int
4467 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4468                                 const struct rte_flow_attr *attr,
4469                                 const struct rte_vlan_hdr *vlan,
4470                                 struct mlx5_flow *dev_flow,
4471                                 struct rte_flow_error *error)
4472 {
4473         struct mlx5_flow_dv_push_vlan_action_resource res;
4474
4475         memset(&res, 0, sizeof(res));
4476         res.vlan_tag =
4477                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4478                                  vlan->vlan_tci);
4479         if (attr->transfer)
4480                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4481         else
4482                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4483                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4484         return flow_dv_push_vlan_action_resource_register
4485                                             (dev, &res, dev_flow, error);
4486 }
4487
4488 /**
4489  * Validate the modify-header actions.
4490  *
4491  * @param[in] action_flags
4492  *   Holds the actions detected until now.
4493  * @param[in] action
4494  *   Pointer to the modify action.
4495  * @param[out] error
4496  *   Pointer to error structure.
4497  *
4498  * @return
4499  *   0 on success, a negative errno value otherwise and rte_errno is set.
4500  */
4501 static int
4502 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4503                                    const struct rte_flow_action *action,
4504                                    struct rte_flow_error *error)
4505 {
4506         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4507                 return rte_flow_error_set(error, EINVAL,
4508                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4509                                           NULL, "action configuration not set");
4510         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4511                 return rte_flow_error_set(error, EINVAL,
4512                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4513                                           "can't have encap action before"
4514                                           " modify action");
4515         return 0;
4516 }
4517
4518 /**
4519  * Validate the modify-header MAC address actions.
4520  *
4521  * @param[in] action_flags
4522  *   Holds the actions detected until now.
4523  * @param[in] action
4524  *   Pointer to the modify action.
4525  * @param[in] item_flags
4526  *   Holds the items detected.
4527  * @param[out] error
4528  *   Pointer to error structure.
4529  *
4530  * @return
4531  *   0 on success, a negative errno value otherwise and rte_errno is set.
4532  */
4533 static int
4534 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4535                                    const struct rte_flow_action *action,
4536                                    const uint64_t item_flags,
4537                                    struct rte_flow_error *error)
4538 {
4539         int ret = 0;
4540
4541         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4542         if (!ret) {
4543                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4544                         return rte_flow_error_set(error, EINVAL,
4545                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4546                                                   NULL,
4547                                                   "no L2 item in pattern");
4548         }
4549         return ret;
4550 }
4551
4552 /**
4553  * Validate the modify-header IPv4 address actions.
4554  *
4555  * @param[in] action_flags
4556  *   Holds the actions detected until now.
4557  * @param[in] action
4558  *   Pointer to the modify action.
4559  * @param[in] item_flags
4560  *   Holds the items detected.
4561  * @param[out] error
4562  *   Pointer to error structure.
4563  *
4564  * @return
4565  *   0 on success, a negative errno value otherwise and rte_errno is set.
4566  */
4567 static int
4568 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4569                                     const struct rte_flow_action *action,
4570                                     const uint64_t item_flags,
4571                                     struct rte_flow_error *error)
4572 {
4573         int ret = 0;
4574         uint64_t layer;
4575
4576         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4577         if (!ret) {
4578                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4579                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4580                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4581                 if (!(item_flags & layer))
4582                         return rte_flow_error_set(error, EINVAL,
4583                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4584                                                   NULL,
4585                                                   "no ipv4 item in pattern");
4586         }
4587         return ret;
4588 }
4589
4590 /**
4591  * Validate the modify-header IPv6 address actions.
4592  *
4593  * @param[in] action_flags
4594  *   Holds the actions detected until now.
4595  * @param[in] action
4596  *   Pointer to the modify action.
4597  * @param[in] item_flags
4598  *   Holds the items detected.
4599  * @param[out] error
4600  *   Pointer to error structure.
4601  *
4602  * @return
4603  *   0 on success, a negative errno value otherwise and rte_errno is set.
4604  */
4605 static int
4606 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4607                                     const struct rte_flow_action *action,
4608                                     const uint64_t item_flags,
4609                                     struct rte_flow_error *error)
4610 {
4611         int ret = 0;
4612         uint64_t layer;
4613
4614         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4615         if (!ret) {
4616                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4617                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4618                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4619                 if (!(item_flags & layer))
4620                         return rte_flow_error_set(error, EINVAL,
4621                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4622                                                   NULL,
4623                                                   "no ipv6 item in pattern");
4624         }
4625         return ret;
4626 }
4627
4628 /**
4629  * Validate the modify-header TP actions.
4630  *
4631  * @param[in] action_flags
4632  *   Holds the actions detected until now.
4633  * @param[in] action
4634  *   Pointer to the modify action.
4635  * @param[in] item_flags
4636  *   Holds the items detected.
4637  * @param[out] error
4638  *   Pointer to error structure.
4639  *
4640  * @return
4641  *   0 on success, a negative errno value otherwise and rte_errno is set.
4642  */
4643 static int
4644 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4645                                   const struct rte_flow_action *action,
4646                                   const uint64_t item_flags,
4647                                   struct rte_flow_error *error)
4648 {
4649         int ret = 0;
4650         uint64_t layer;
4651
4652         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4653         if (!ret) {
4654                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4655                                  MLX5_FLOW_LAYER_INNER_L4 :
4656                                  MLX5_FLOW_LAYER_OUTER_L4;
4657                 if (!(item_flags & layer))
4658                         return rte_flow_error_set(error, EINVAL,
4659                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4660                                                   NULL, "no transport layer "
4661                                                   "in pattern");
4662         }
4663         return ret;
4664 }
4665
4666 /**
4667  * Validate the modify-header actions of increment/decrement
4668  * TCP Sequence-number.
4669  *
4670  * @param[in] action_flags
4671  *   Holds the actions detected until now.
4672  * @param[in] action
4673  *   Pointer to the modify action.
4674  * @param[in] item_flags
4675  *   Holds the items detected.
4676  * @param[out] error
4677  *   Pointer to error structure.
4678  *
4679  * @return
4680  *   0 on success, a negative errno value otherwise and rte_errno is set.
4681  */
4682 static int
4683 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4684                                        const struct rte_flow_action *action,
4685                                        const uint64_t item_flags,
4686                                        struct rte_flow_error *error)
4687 {
4688         int ret = 0;
4689         uint64_t layer;
4690
4691         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4692         if (!ret) {
4693                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4694                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4695                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4696                 if (!(item_flags & layer))
4697                         return rte_flow_error_set(error, EINVAL,
4698                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4699                                                   NULL, "no TCP item in"
4700                                                   " pattern");
4701                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4702                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4703                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4704                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4705                         return rte_flow_error_set(error, EINVAL,
4706                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4707                                                   NULL,
4708                                                   "cannot decrease and increase"
4709                                                   " TCP sequence number"
4710                                                   " at the same time");
4711         }
4712         return ret;
4713 }
4714
4715 /**
4716  * Validate the modify-header actions of increment/decrement
4717  * TCP Acknowledgment number.
4718  *
4719  * @param[in] action_flags
4720  *   Holds the actions detected until now.
4721  * @param[in] action
4722  *   Pointer to the modify action.
4723  * @param[in] item_flags
4724  *   Holds the items detected.
4725  * @param[out] error
4726  *   Pointer to error structure.
4727  *
4728  * @return
4729  *   0 on success, a negative errno value otherwise and rte_errno is set.
4730  */
4731 static int
4732 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4733                                        const struct rte_flow_action *action,
4734                                        const uint64_t item_flags,
4735                                        struct rte_flow_error *error)
4736 {
4737         int ret = 0;
4738         uint64_t layer;
4739
4740         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4741         if (!ret) {
4742                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4743                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4744                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4745                 if (!(item_flags & layer))
4746                         return rte_flow_error_set(error, EINVAL,
4747                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4748                                                   NULL, "no TCP item in"
4749                                                   " pattern");
4750                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4751                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4752                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4753                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4754                         return rte_flow_error_set(error, EINVAL,
4755                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4756                                                   NULL,
4757                                                   "cannot decrease and increase"
4758                                                   " TCP acknowledgment number"
4759                                                   " at the same time");
4760         }
4761         return ret;
4762 }
4763
4764 /**
4765  * Validate the modify-header TTL actions.
4766  *
4767  * @param[in] action_flags
4768  *   Holds the actions detected until now.
4769  * @param[in] action
4770  *   Pointer to the modify action.
4771  * @param[in] item_flags
4772  *   Holds the items detected.
4773  * @param[out] error
4774  *   Pointer to error structure.
4775  *
4776  * @return
4777  *   0 on success, a negative errno value otherwise and rte_errno is set.
4778  */
4779 static int
4780 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4781                                    const struct rte_flow_action *action,
4782                                    const uint64_t item_flags,
4783                                    struct rte_flow_error *error)
4784 {
4785         int ret = 0;
4786         uint64_t layer;
4787
4788         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4789         if (!ret) {
4790                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4791                                  MLX5_FLOW_LAYER_INNER_L3 :
4792                                  MLX5_FLOW_LAYER_OUTER_L3;
4793                 if (!(item_flags & layer))
4794                         return rte_flow_error_set(error, EINVAL,
4795                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4796                                                   NULL,
4797                                                   "no IP protocol in pattern");
4798         }
4799         return ret;
4800 }
4801
4802 /**
4803  * Validate the generic modify field actions.
4804  * @param[in] dev
4805  *   Pointer to the rte_eth_dev structure.
4806  * @param[in] action_flags
4807  *   Holds the actions detected until now.
4808  * @param[in] action
4809  *   Pointer to the modify action.
4810  * @param[in] attr
4811  *   Pointer to the flow attributes.
4812  * @param[out] error
4813  *   Pointer to error structure.
4814  *
4815  * @return
4816  *   Number of header fields to modify (0 or more) on success,
4817  *   a negative errno value otherwise and rte_errno is set.
4818  */
4819 static int
4820 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4821                                    const uint64_t action_flags,
4822                                    const struct rte_flow_action *action,
4823                                    const struct rte_flow_attr *attr,
4824                                    struct rte_flow_error *error)
4825 {
4826         int ret = 0;
4827         struct mlx5_priv *priv = dev->data->dev_private;
4828         struct mlx5_dev_config *config = &priv->config;
4829         const struct rte_flow_action_modify_field *action_modify_field =
4830                 action->conf;
4831         uint32_t dst_width = mlx5_flow_item_field_width(dev,
4832                                 action_modify_field->dst.field,
4833                                 -1, attr, error);
4834         uint32_t src_width = mlx5_flow_item_field_width(dev,
4835                                 action_modify_field->src.field,
4836                                 dst_width, attr, error);
4837
4838         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4839         if (ret)
4840                 return ret;
4841
4842         if (action_modify_field->width == 0)
4843                 return rte_flow_error_set(error, EINVAL,
4844                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4845                                 "no bits are requested to be modified");
4846         else if (action_modify_field->width > dst_width ||
4847                  action_modify_field->width > src_width)
4848                 return rte_flow_error_set(error, EINVAL,
4849                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4850                                 "cannot modify more bits than"
4851                                 " the width of a field");
4852         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4853             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4854                 if ((action_modify_field->dst.offset +
4855                      action_modify_field->width > dst_width) ||
4856                     (action_modify_field->dst.offset % 32))
4857                         return rte_flow_error_set(error, EINVAL,
4858                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4859                                         "destination offset is too big"
4860                                         " or not aligned to 4 bytes");
4861                 if (action_modify_field->dst.level &&
4862                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4863                         return rte_flow_error_set(error, ENOTSUP,
4864                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4865                                         "inner header fields modification"
4866                                         " is not supported");
4867         }
4868         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4869             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4870                 if (!attr->transfer && !attr->group)
4871                         return rte_flow_error_set(error, ENOTSUP,
4872                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4873                                         "modify field action is not"
4874                                         " supported for group 0");
4875                 if ((action_modify_field->src.offset +
4876                      action_modify_field->width > src_width) ||
4877                     (action_modify_field->src.offset % 32))
4878                         return rte_flow_error_set(error, EINVAL,
4879                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4880                                         "source offset is too big"
4881                                         " or not aligned to 4 bytes");
4882                 if (action_modify_field->src.level &&
4883                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4884                         return rte_flow_error_set(error, ENOTSUP,
4885                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4886                                         "inner header fields modification"
4887                                         " is not supported");
4888         }
4889         if ((action_modify_field->dst.field ==
4890              action_modify_field->src.field) &&
4891             (action_modify_field->dst.level ==
4892              action_modify_field->src.level))
4893                 return rte_flow_error_set(error, EINVAL,
4894                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4895                                 "source and destination fields"
4896                                 " cannot be the same");
4897         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4898             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4899             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4900                 return rte_flow_error_set(error, EINVAL,
4901                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4902                                 "mark, immediate value or a pointer to it"
4903                                 " cannot be used as a destination");
4904         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4905             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4906                 return rte_flow_error_set(error, ENOTSUP,
4907                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4908                                 "modifications of an arbitrary"
4909                                 " place in a packet is not supported");
4910         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4911             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4912                 return rte_flow_error_set(error, ENOTSUP,
4913                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4914                                 "modifications of the 802.1Q Tag"
4915                                 " Identifier is not supported");
4916         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4917             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4918                 return rte_flow_error_set(error, ENOTSUP,
4919                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4920                                 "modifications of the VXLAN Network"
4921                                 " Identifier is not supported");
4922         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4923             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4924                 return rte_flow_error_set(error, ENOTSUP,
4925                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4926                                 "modifications of the GENEVE Network"
4927                                 " Identifier is not supported");
4928         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4929             action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4930                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4931                     !mlx5_flow_ext_mreg_supported(dev))
4932                         return rte_flow_error_set(error, ENOTSUP,
4933                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4934                                         "cannot modify mark in legacy mode"
4935                                         " or without extensive registers");
4936         if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4937             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4938                 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4939                     !mlx5_flow_ext_mreg_supported(dev))
4940                         return rte_flow_error_set(error, ENOTSUP,
4941                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4942                                         "cannot modify meta without"
4943                                         " extensive registers support");
4944                 ret = flow_dv_get_metadata_reg(dev, attr, error);
4945                 if (ret < 0 || ret == REG_NON)
4946                         return rte_flow_error_set(error, ENOTSUP,
4947                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4948                                         "cannot modify meta without"
4949                                         " extensive registers available");
4950         }
4951         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4952                 return rte_flow_error_set(error, ENOTSUP,
4953                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4954                                 "add and sub operations"
4955                                 " are not supported");
4956         return (action_modify_field->width / 32) +
4957                !!(action_modify_field->width % 32);
4958 }
4959
4960 /**
4961  * Validate jump action.
4962  *
4963  * @param[in] action
4964  *   Pointer to the jump action.
4965  * @param[in] action_flags
4966  *   Holds the actions detected until now.
4967  * @param[in] attributes
4968  *   Pointer to flow attributes
4969  * @param[in] external
4970  *   Action belongs to flow rule created by request external to PMD.
4971  * @param[out] error
4972  *   Pointer to error structure.
4973  *
4974  * @return
4975  *   0 on success, a negative errno value otherwise and rte_errno is set.
4976  */
4977 static int
4978 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4979                              const struct mlx5_flow_tunnel *tunnel,
4980                              const struct rte_flow_action *action,
4981                              uint64_t action_flags,
4982                              const struct rte_flow_attr *attributes,
4983                              bool external, struct rte_flow_error *error)
4984 {
4985         uint32_t target_group, table;
4986         int ret = 0;
4987         struct flow_grp_info grp_info = {
4988                 .external = !!external,
4989                 .transfer = !!attributes->transfer,
4990                 .fdb_def_rule = 1,
4991                 .std_tbl_fix = 0
4992         };
4993         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4994                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4995                 return rte_flow_error_set(error, EINVAL,
4996                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4997                                           "can't have 2 fate actions in"
4998                                           " same flow");
4999         if (!action->conf)
5000                 return rte_flow_error_set(error, EINVAL,
5001                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5002                                           NULL, "action configuration not set");
5003         target_group =
5004                 ((const struct rte_flow_action_jump *)action->conf)->group;
5005         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5006                                        &grp_info, error);
5007         if (ret)
5008                 return ret;
5009         if (attributes->group == target_group &&
5010             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5011                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5012                 return rte_flow_error_set(error, EINVAL,
5013                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5014                                           "target group must be other than"
5015                                           " the current flow group");
5016         return 0;
5017 }
5018
5019 /*
5020  * Validate action PORT_ID / REPRESENTED_PORT.
5021  *
5022  * @param[in] dev
5023  *   Pointer to rte_eth_dev structure.
5024  * @param[in] action_flags
5025  *   Bit-fields that holds the actions detected until now.
5026  * @param[in] action
5027  *   PORT_ID / REPRESENTED_PORT action structure.
5028  * @param[in] attr
5029  *   Attributes of flow that includes this action.
5030  * @param[out] error
5031  *   Pointer to error structure.
5032  *
5033  * @return
5034  *   0 on success, a negative errno value otherwise and rte_errno is set.
5035  */
5036 static int
5037 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5038                                 uint64_t action_flags,
5039                                 const struct rte_flow_action *action,
5040                                 const struct rte_flow_attr *attr,
5041                                 struct rte_flow_error *error)
5042 {
5043         const struct rte_flow_action_port_id *port_id;
5044         const struct rte_flow_action_ethdev *ethdev;
5045         struct mlx5_priv *act_priv;
5046         struct mlx5_priv *dev_priv;
5047         uint16_t port;
5048
5049         if (!attr->transfer)
5050                 return rte_flow_error_set(error, ENOTSUP,
5051                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5052                                           NULL,
5053                                           "port action is valid in transfer"
5054                                           " mode only");
5055         if (!action || !action->conf)
5056                 return rte_flow_error_set(error, ENOTSUP,
5057                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5058                                           NULL,
5059                                           "port action parameters must be"
5060                                           " specified");
5061         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5062                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5063                 return rte_flow_error_set(error, EINVAL,
5064                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5065                                           "can have only one fate actions in"
5066                                           " a flow");
5067         dev_priv = mlx5_dev_to_eswitch_info(dev);
5068         if (!dev_priv)
5069                 return rte_flow_error_set(error, rte_errno,
5070                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5071                                           NULL,
5072                                           "failed to obtain E-Switch info");
5073         switch (action->type) {
5074         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5075                 port_id = action->conf;
5076                 port = port_id->original ? dev->data->port_id : port_id->id;
5077                 break;
5078         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5079                 ethdev = action->conf;
5080                 port = ethdev->port_id;
5081                 break;
5082         default:
5083                 MLX5_ASSERT(false);
5084                 return rte_flow_error_set
5085                                 (error, EINVAL,
5086                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5087                                  "unknown E-Switch action");
5088         }
5089         act_priv = mlx5_port_to_eswitch_info(port, false);
5090         if (!act_priv)
5091                 return rte_flow_error_set
5092                                 (error, rte_errno,
5093                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5094                                  "failed to obtain E-Switch port id for port");
5095         if (act_priv->domain_id != dev_priv->domain_id)
5096                 return rte_flow_error_set
5097                                 (error, EINVAL,
5098                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5099                                  "port does not belong to"
5100                                  " E-Switch being configured");
5101         return 0;
5102 }
5103
5104 /**
5105  * Get the maximum number of modify header actions.
5106  *
5107  * @param dev
5108  *   Pointer to rte_eth_dev structure.
5109  * @param root
5110  *   Whether action is on root table.
5111  *
5112  * @return
5113  *   Max number of modify header actions device can support.
5114  */
5115 static inline unsigned int
5116 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5117                               bool root)
5118 {
5119         /*
5120          * There's no way to directly query the max capacity from FW.
5121          * The maximal value on root table should be assumed to be supported.
5122          */
5123         if (!root)
5124                 return MLX5_MAX_MODIFY_NUM;
5125         else
5126                 return MLX5_ROOT_TBL_MODIFY_NUM;
5127 }
5128
5129 /**
5130  * Validate the meter action.
5131  *
5132  * @param[in] dev
5133  *   Pointer to rte_eth_dev structure.
5134  * @param[in] action_flags
5135  *   Bit-fields that holds the actions detected until now.
5136  * @param[in] action
5137  *   Pointer to the meter action.
5138  * @param[in] attr
5139  *   Attributes of flow that includes this action.
5140  * @param[in] port_id_item
5141  *   Pointer to item indicating port id.
5142  * @param[out] error
5143  *   Pointer to error structure.
5144  *
5145  * @return
5146  *   0 on success, a negative errno value otherwise and rte_ernno is set.
5147  */
5148 static int
5149 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5150                                 uint64_t action_flags,
5151                                 const struct rte_flow_action *action,
5152                                 const struct rte_flow_attr *attr,
5153                                 const struct rte_flow_item *port_id_item,
5154                                 bool *def_policy,
5155                                 struct rte_flow_error *error)
5156 {
5157         struct mlx5_priv *priv = dev->data->dev_private;
5158         const struct rte_flow_action_meter *am = action->conf;
5159         struct mlx5_flow_meter_info *fm;
5160         struct mlx5_flow_meter_policy *mtr_policy;
5161         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5162
5163         if (!am)
5164                 return rte_flow_error_set(error, EINVAL,
5165                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5166                                           "meter action conf is NULL");
5167
5168         if (action_flags & MLX5_FLOW_ACTION_METER)
5169                 return rte_flow_error_set(error, ENOTSUP,
5170                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5171                                           "meter chaining not support");
5172         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5173                 return rte_flow_error_set(error, ENOTSUP,
5174                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5175                                           "meter with jump not support");
5176         if (!priv->mtr_en)
5177                 return rte_flow_error_set(error, ENOTSUP,
5178                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5179                                           NULL,
5180                                           "meter action not supported");
5181         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5182         if (!fm)
5183                 return rte_flow_error_set(error, EINVAL,
5184                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5185                                           "Meter not found");
5186         /* aso meter can always be shared by different domains */
5187         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5188             !(fm->transfer == attr->transfer ||
5189               (!fm->ingress && !attr->ingress && attr->egress) ||
5190               (!fm->egress && !attr->egress && attr->ingress)))
5191                 return rte_flow_error_set(error, EINVAL,
5192                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5193                         "Flow attributes domain are either invalid "
5194                         "or have a domain conflict with current "
5195                         "meter attributes");
5196         if (fm->def_policy) {
5197                 if (!((attr->transfer &&
5198                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5199                         (attr->egress &&
5200                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5201                         (attr->ingress &&
5202                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5203                         return rte_flow_error_set(error, EINVAL,
5204                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5205                                           "Flow attributes domain "
5206                                           "have a conflict with current "
5207                                           "meter domain attributes");
5208                 *def_policy = true;
5209         } else {
5210                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5211                                                 fm->policy_id, NULL);
5212                 if (!mtr_policy)
5213                         return rte_flow_error_set(error, EINVAL,
5214                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5215                                           "Invalid policy id for meter ");
5216                 if (!((attr->transfer && mtr_policy->transfer) ||
5217                         (attr->egress && mtr_policy->egress) ||
5218                         (attr->ingress && mtr_policy->ingress)))
5219                         return rte_flow_error_set(error, EINVAL,
5220                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5221                                           "Flow attributes domain "
5222                                           "have a conflict with current "
5223                                           "meter domain attributes");
5224                 if (attr->transfer && mtr_policy->dev) {
5225                         /**
5226                          * When policy has fate action of port_id,
5227                          * the flow should have the same src port as policy.
5228                          */
5229                         struct mlx5_priv *policy_port_priv =
5230                                         mtr_policy->dev->data->dev_private;
5231                         int32_t flow_src_port = priv->representor_id;
5232
5233                         if (port_id_item) {
5234                                 const struct rte_flow_item_port_id *spec =
5235                                                         port_id_item->spec;
5236                                 struct mlx5_priv *port_priv =
5237                                         mlx5_port_to_eswitch_info(spec->id,
5238                                                                   false);
5239                                 if (!port_priv)
5240                                         return rte_flow_error_set(error,
5241                                                 rte_errno,
5242                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5243                                                 spec,
5244                                                 "Failed to get port info.");
5245                                 flow_src_port = port_priv->representor_id;
5246                         }
5247                         if (flow_src_port != policy_port_priv->representor_id)
5248                                 return rte_flow_error_set(error,
5249                                                 rte_errno,
5250                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5251                                                 NULL,
5252                                                 "Flow and meter policy "
5253                                                 "have different src port.");
5254                 }
5255                 *def_policy = false;
5256         }
5257         return 0;
5258 }
5259
5260 /**
5261  * Validate the age action.
5262  *
5263  * @param[in] action_flags
5264  *   Holds the actions detected until now.
5265  * @param[in] action
5266  *   Pointer to the age action.
5267  * @param[in] dev
5268  *   Pointer to the Ethernet device structure.
5269  * @param[out] error
5270  *   Pointer to error structure.
5271  *
5272  * @return
5273  *   0 on success, a negative errno value otherwise and rte_errno is set.
5274  */
5275 static int
5276 flow_dv_validate_action_age(uint64_t action_flags,
5277                             const struct rte_flow_action *action,
5278                             struct rte_eth_dev *dev,
5279                             struct rte_flow_error *error)
5280 {
5281         struct mlx5_priv *priv = dev->data->dev_private;
5282         const struct rte_flow_action_age *age = action->conf;
5283
5284         if (!priv->sh->devx || (priv->sh->cmng.counter_fallback &&
5285             !priv->sh->aso_age_mng))
5286                 return rte_flow_error_set(error, ENOTSUP,
5287                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5288                                           NULL,
5289                                           "age action not supported");
5290         if (!(action->conf))
5291                 return rte_flow_error_set(error, EINVAL,
5292                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5293                                           "configuration cannot be null");
5294         if (!(age->timeout))
5295                 return rte_flow_error_set(error, EINVAL,
5296                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5297                                           "invalid timeout value 0");
5298         if (action_flags & MLX5_FLOW_ACTION_AGE)
5299                 return rte_flow_error_set(error, EINVAL,
5300                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5301                                           "duplicate age actions set");
5302         return 0;
5303 }
5304
5305 /**
5306  * Validate the modify-header IPv4 DSCP actions.
5307  *
5308  * @param[in] action_flags
5309  *   Holds the actions detected until now.
5310  * @param[in] action
5311  *   Pointer to the modify action.
5312  * @param[in] item_flags
5313  *   Holds the items detected.
5314  * @param[out] error
5315  *   Pointer to error structure.
5316  *
5317  * @return
5318  *   0 on success, a negative errno value otherwise and rte_errno is set.
5319  */
5320 static int
5321 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5322                                          const struct rte_flow_action *action,
5323                                          const uint64_t item_flags,
5324                                          struct rte_flow_error *error)
5325 {
5326         int ret = 0;
5327
5328         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5329         if (!ret) {
5330                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5331                         return rte_flow_error_set(error, EINVAL,
5332                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5333                                                   NULL,
5334                                                   "no ipv4 item in pattern");
5335         }
5336         return ret;
5337 }
5338
5339 /**
5340  * Validate the modify-header IPv6 DSCP actions.
5341  *
5342  * @param[in] action_flags
5343  *   Holds the actions detected until now.
5344  * @param[in] action
5345  *   Pointer to the modify action.
5346  * @param[in] item_flags
5347  *   Holds the items detected.
5348  * @param[out] error
5349  *   Pointer to error structure.
5350  *
5351  * @return
5352  *   0 on success, a negative errno value otherwise and rte_errno is set.
5353  */
5354 static int
5355 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5356                                          const struct rte_flow_action *action,
5357                                          const uint64_t item_flags,
5358                                          struct rte_flow_error *error)
5359 {
5360         int ret = 0;
5361
5362         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5363         if (!ret) {
5364                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5365                         return rte_flow_error_set(error, EINVAL,
5366                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5367                                                   NULL,
5368                                                   "no ipv6 item in pattern");
5369         }
5370         return ret;
5371 }
5372
5373 int
5374 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5375                         struct mlx5_list_entry *entry, void *cb_ctx)
5376 {
5377         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5378         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5379         struct mlx5_flow_dv_modify_hdr_resource *resource =
5380                                   container_of(entry, typeof(*resource), entry);
5381         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5382
5383         key_len += ref->actions_num * sizeof(ref->actions[0]);
5384         return ref->actions_num != resource->actions_num ||
5385                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5386 }
5387
5388 static struct mlx5_indexed_pool *
5389 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5390 {
5391         struct mlx5_indexed_pool *ipool = __atomic_load_n
5392                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5393
5394         if (!ipool) {
5395                 struct mlx5_indexed_pool *expected = NULL;
5396                 struct mlx5_indexed_pool_config cfg =
5397                     (struct mlx5_indexed_pool_config) {
5398                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5399                                                                    (index + 1) *
5400                                            sizeof(struct mlx5_modification_cmd),
5401                        .trunk_size = 64,
5402                        .grow_trunk = 3,
5403                        .grow_shift = 2,
5404                        .need_lock = 1,
5405                        .release_mem_en = !!sh->reclaim_mode,
5406                        .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5407                        .malloc = mlx5_malloc,
5408                        .free = mlx5_free,
5409                        .type = "mlx5_modify_action_resource",
5410                 };
5411
5412                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5413                 ipool = mlx5_ipool_create(&cfg);
5414                 if (!ipool)
5415                         return NULL;
5416                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5417                                                  &expected, ipool, false,
5418                                                  __ATOMIC_SEQ_CST,
5419                                                  __ATOMIC_SEQ_CST)) {
5420                         mlx5_ipool_destroy(ipool);
5421                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5422                                                 __ATOMIC_SEQ_CST);
5423                 }
5424         }
5425         return ipool;
5426 }
5427
5428 struct mlx5_list_entry *
5429 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5430 {
5431         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5432         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5433         struct mlx5dv_dr_domain *ns;
5434         struct mlx5_flow_dv_modify_hdr_resource *entry;
5435         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5436         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5437                                                           ref->actions_num - 1);
5438         int ret;
5439         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5440         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5441         uint32_t idx;
5442
5443         if (unlikely(!ipool)) {
5444                 rte_flow_error_set(ctx->error, ENOMEM,
5445                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5446                                    NULL, "cannot allocate modify ipool");
5447                 return NULL;
5448         }
5449         entry = mlx5_ipool_zmalloc(ipool, &idx);
5450         if (!entry) {
5451                 rte_flow_error_set(ctx->error, ENOMEM,
5452                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5453                                    "cannot allocate resource memory");
5454                 return NULL;
5455         }
5456         rte_memcpy(&entry->ft_type,
5457                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5458                    key_len + data_len);
5459         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5460                 ns = sh->fdb_domain;
5461         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5462                 ns = sh->tx_domain;
5463         else
5464                 ns = sh->rx_domain;
5465         ret = mlx5_flow_os_create_flow_action_modify_header
5466                                         (sh->cdev->ctx, ns, entry,
5467                                          data_len, &entry->action);
5468         if (ret) {
5469                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5470                 rte_flow_error_set(ctx->error, ENOMEM,
5471                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5472                                    NULL, "cannot create modification action");
5473                 return NULL;
5474         }
5475         entry->idx = idx;
5476         return &entry->entry;
5477 }
5478
5479 struct mlx5_list_entry *
5480 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5481                         void *cb_ctx)
5482 {
5483         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5484         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5485         struct mlx5_flow_dv_modify_hdr_resource *entry;
5486         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5487         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5488         uint32_t idx;
5489
5490         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5491                                   &idx);
5492         if (!entry) {
5493                 rte_flow_error_set(ctx->error, ENOMEM,
5494                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5495                                    "cannot allocate resource memory");
5496                 return NULL;
5497         }
5498         memcpy(entry, oentry, sizeof(*entry) + data_len);
5499         entry->idx = idx;
5500         return &entry->entry;
5501 }
5502
5503 void
5504 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5505 {
5506         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5507         struct mlx5_flow_dv_modify_hdr_resource *res =
5508                 container_of(entry, typeof(*res), entry);
5509
5510         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5511 }
5512
5513 /**
5514  * Validate the sample action.
5515  *
5516  * @param[in, out] action_flags
5517  *   Holds the actions detected until now.
5518  * @param[in] action
5519  *   Pointer to the sample action.
5520  * @param[in] dev
5521  *   Pointer to the Ethernet device structure.
5522  * @param[in] attr
5523  *   Attributes of flow that includes this action.
5524  * @param[in] item_flags
5525  *   Holds the items detected.
5526  * @param[in] rss
5527  *   Pointer to the RSS action.
5528  * @param[out] sample_rss
5529  *   Pointer to the RSS action in sample action list.
5530  * @param[out] count
5531  *   Pointer to the COUNT action in sample action list.
5532  * @param[out] fdb_mirror_limit
5533  *   Pointer to the FDB mirror limitation flag.
5534  * @param[out] error
5535  *   Pointer to error structure.
5536  *
5537  * @return
5538  *   0 on success, a negative errno value otherwise and rte_errno is set.
5539  */
5540 static int
5541 flow_dv_validate_action_sample(uint64_t *action_flags,
5542                                const struct rte_flow_action *action,
5543                                struct rte_eth_dev *dev,
5544                                const struct rte_flow_attr *attr,
5545                                uint64_t item_flags,
5546                                const struct rte_flow_action_rss *rss,
5547                                const struct rte_flow_action_rss **sample_rss,
5548                                const struct rte_flow_action_count **count,
5549                                int *fdb_mirror_limit,
5550                                struct rte_flow_error *error)
5551 {
5552         struct mlx5_priv *priv = dev->data->dev_private;
5553         struct mlx5_dev_config *dev_conf = &priv->config;
5554         const struct rte_flow_action_sample *sample = action->conf;
5555         const struct rte_flow_action *act;
5556         uint64_t sub_action_flags = 0;
5557         uint16_t queue_index = 0xFFFF;
5558         int actions_n = 0;
5559         int ret;
5560
5561         if (!sample)
5562                 return rte_flow_error_set(error, EINVAL,
5563                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5564                                           "configuration cannot be NULL");
5565         if (sample->ratio == 0)
5566                 return rte_flow_error_set(error, EINVAL,
5567                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5568                                           "ratio value starts from 1");
5569         if (!priv->sh->devx || (sample->ratio > 0 && !priv->sampler_en))
5570                 return rte_flow_error_set(error, ENOTSUP,
5571                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5572                                           NULL,
5573                                           "sample action not supported");
5574         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5575                 return rte_flow_error_set(error, EINVAL,
5576                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5577                                           "Multiple sample actions not "
5578                                           "supported");
5579         if (*action_flags & MLX5_FLOW_ACTION_METER)
5580                 return rte_flow_error_set(error, EINVAL,
5581                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5582                                           "wrong action order, meter should "
5583                                           "be after sample action");
5584         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5585                 return rte_flow_error_set(error, EINVAL,
5586                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5587                                           "wrong action order, jump should "
5588                                           "be after sample action");
5589         if (*action_flags & MLX5_FLOW_ACTION_CT)
5590                 return rte_flow_error_set(error, EINVAL,
5591                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5592                                           "Sample after CT not supported");
5593         act = sample->actions;
5594         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5595                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5596                         return rte_flow_error_set(error, ENOTSUP,
5597                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5598                                                   act, "too many actions");
5599                 switch (act->type) {
5600                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5601                         ret = mlx5_flow_validate_action_queue(act,
5602                                                               sub_action_flags,
5603                                                               dev,
5604                                                               attr, error);
5605                         if (ret < 0)
5606                                 return ret;
5607                         queue_index = ((const struct rte_flow_action_queue *)
5608                                                         (act->conf))->index;
5609                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5610                         ++actions_n;
5611                         break;
5612                 case RTE_FLOW_ACTION_TYPE_RSS:
5613                         *sample_rss = act->conf;
5614                         ret = mlx5_flow_validate_action_rss(act,
5615                                                             sub_action_flags,
5616                                                             dev, attr,
5617                                                             item_flags,
5618                                                             error);
5619                         if (ret < 0)
5620                                 return ret;
5621                         if (rss && *sample_rss &&
5622                             ((*sample_rss)->level != rss->level ||
5623                             (*sample_rss)->types != rss->types))
5624                                 return rte_flow_error_set(error, ENOTSUP,
5625                                         RTE_FLOW_ERROR_TYPE_ACTION,
5626                                         NULL,
5627                                         "Can't use the different RSS types "
5628                                         "or level in the same flow");
5629                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5630                                 queue_index = (*sample_rss)->queue[0];
5631                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5632                         ++actions_n;
5633                         break;
5634                 case RTE_FLOW_ACTION_TYPE_MARK:
5635                         ret = flow_dv_validate_action_mark(dev, act,
5636                                                            sub_action_flags,
5637                                                            attr, error);
5638                         if (ret < 0)
5639                                 return ret;
5640                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5641                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5642                                                 MLX5_FLOW_ACTION_MARK_EXT;
5643                         else
5644                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5645                         ++actions_n;
5646                         break;
5647                 case RTE_FLOW_ACTION_TYPE_COUNT:
5648                         ret = flow_dv_validate_action_count
5649                                 (dev, false, *action_flags | sub_action_flags,
5650                                  error);
5651                         if (ret < 0)
5652                                 return ret;
5653                         *count = act->conf;
5654                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5655                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5656                         ++actions_n;
5657                         break;
5658                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5659                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5660                         ret = flow_dv_validate_action_port_id(dev,
5661                                                               sub_action_flags,
5662                                                               act,
5663                                                               attr,
5664                                                               error);
5665                         if (ret)
5666                                 return ret;
5667                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5668                         ++actions_n;
5669                         break;
5670                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5671                         ret = flow_dv_validate_action_raw_encap_decap
5672                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5673                                  &actions_n, action, item_flags, error);
5674                         if (ret < 0)
5675                                 return ret;
5676                         ++actions_n;
5677                         break;
5678                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5679                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5680                         ret = flow_dv_validate_action_l2_encap(dev,
5681                                                                sub_action_flags,
5682                                                                act, attr,
5683                                                                error);
5684                         if (ret < 0)
5685                                 return ret;
5686                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5687                         ++actions_n;
5688                         break;
5689                 default:
5690                         return rte_flow_error_set(error, ENOTSUP,
5691                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5692                                                   NULL,
5693                                                   "Doesn't support optional "
5694                                                   "action");
5695                 }
5696         }
5697         if (attr->ingress && !attr->transfer) {
5698                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5699                                           MLX5_FLOW_ACTION_RSS)))
5700                         return rte_flow_error_set(error, EINVAL,
5701                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5702                                                   NULL,
5703                                                   "Ingress must has a dest "
5704                                                   "QUEUE for Sample");
5705         } else if (attr->egress && !attr->transfer) {
5706                 return rte_flow_error_set(error, ENOTSUP,
5707                                           RTE_FLOW_ERROR_TYPE_ACTION,
5708                                           NULL,
5709                                           "Sample Only support Ingress "
5710                                           "or E-Switch");
5711         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5712                 MLX5_ASSERT(attr->transfer);
5713                 if (sample->ratio > 1)
5714                         return rte_flow_error_set(error, ENOTSUP,
5715                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5716                                                   NULL,
5717                                                   "E-Switch doesn't support "
5718                                                   "any optional action "
5719                                                   "for sampling");
5720                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5721                         return rte_flow_error_set(error, ENOTSUP,
5722                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5723                                                   NULL,
5724                                                   "unsupported action QUEUE");
5725                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5726                         return rte_flow_error_set(error, ENOTSUP,
5727                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5728                                                   NULL,
5729                                                   "unsupported action QUEUE");
5730                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5731                         return rte_flow_error_set(error, EINVAL,
5732                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5733                                                   NULL,
5734                                                   "E-Switch must has a dest "
5735                                                   "port for mirroring");
5736                 if (!priv->config.hca_attr.reg_c_preserve &&
5737                      priv->representor_id != UINT16_MAX)
5738                         *fdb_mirror_limit = 1;
5739         }
5740         /* Continue validation for Xcap actions.*/
5741         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5742             (queue_index == 0xFFFF ||
5743              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5744                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5745                      MLX5_FLOW_XCAP_ACTIONS)
5746                         return rte_flow_error_set(error, ENOTSUP,
5747                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5748                                                   NULL, "encap and decap "
5749                                                   "combination aren't "
5750                                                   "supported");
5751                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5752                                                         MLX5_FLOW_ACTION_ENCAP))
5753                         return rte_flow_error_set(error, ENOTSUP,
5754                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5755                                                   NULL, "encap is not supported"
5756                                                   " for ingress traffic");
5757         }
5758         return 0;
5759 }
5760
5761 /**
5762  * Find existing modify-header resource or create and register a new one.
5763  *
5764  * @param dev[in, out]
5765  *   Pointer to rte_eth_dev structure.
5766  * @param[in, out] resource
5767  *   Pointer to modify-header resource.
5768  * @parm[in, out] dev_flow
5769  *   Pointer to the dev_flow.
5770  * @param[out] error
5771  *   pointer to error structure.
5772  *
5773  * @return
5774  *   0 on success otherwise -errno and errno is set.
5775  */
5776 static int
5777 flow_dv_modify_hdr_resource_register
5778                         (struct rte_eth_dev *dev,
5779                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5780                          struct mlx5_flow *dev_flow,
5781                          struct rte_flow_error *error)
5782 {
5783         struct mlx5_priv *priv = dev->data->dev_private;
5784         struct mlx5_dev_ctx_shared *sh = priv->sh;
5785         uint32_t key_len = sizeof(*resource) -
5786                            offsetof(typeof(*resource), ft_type) +
5787                            resource->actions_num * sizeof(resource->actions[0]);
5788         struct mlx5_list_entry *entry;
5789         struct mlx5_flow_cb_ctx ctx = {
5790                 .error = error,
5791                 .data = resource,
5792         };
5793         struct mlx5_hlist *modify_cmds;
5794         uint64_t key64;
5795
5796         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5797                                 "hdr_modify",
5798                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5799                                 true, false, sh,
5800                                 flow_dv_modify_create_cb,
5801                                 flow_dv_modify_match_cb,
5802                                 flow_dv_modify_remove_cb,
5803                                 flow_dv_modify_clone_cb,
5804                                 flow_dv_modify_clone_free_cb);
5805         if (unlikely(!modify_cmds))
5806                 return -rte_errno;
5807         resource->root = !dev_flow->dv.group;
5808         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5809                                                                 resource->root))
5810                 return rte_flow_error_set(error, EOVERFLOW,
5811                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5812                                           "too many modify header items");
5813         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5814         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5815         if (!entry)
5816                 return -rte_errno;
5817         resource = container_of(entry, typeof(*resource), entry);
5818         dev_flow->handle->dvh.modify_hdr = resource;
5819         return 0;
5820 }
5821
5822 /**
5823  * Get DV flow counter by index.
5824  *
5825  * @param[in] dev
5826  *   Pointer to the Ethernet device structure.
5827  * @param[in] idx
5828  *   mlx5 flow counter index in the container.
5829  * @param[out] ppool
5830  *   mlx5 flow counter pool in the container.
5831  *
5832  * @return
5833  *   Pointer to the counter, NULL otherwise.
5834  */
5835 static struct mlx5_flow_counter *
5836 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5837                            uint32_t idx,
5838                            struct mlx5_flow_counter_pool **ppool)
5839 {
5840         struct mlx5_priv *priv = dev->data->dev_private;
5841         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5842         struct mlx5_flow_counter_pool *pool;
5843
5844         /* Decrease to original index and clear shared bit. */
5845         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5846         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5847         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5848         MLX5_ASSERT(pool);
5849         if (ppool)
5850                 *ppool = pool;
5851         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5852 }
5853
5854 /**
5855  * Check the devx counter belongs to the pool.
5856  *
5857  * @param[in] pool
5858  *   Pointer to the counter pool.
5859  * @param[in] id
5860  *   The counter devx ID.
5861  *
5862  * @return
5863  *   True if counter belongs to the pool, false otherwise.
5864  */
5865 static bool
5866 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5867 {
5868         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5869                    MLX5_COUNTERS_PER_POOL;
5870
5871         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5872                 return true;
5873         return false;
5874 }
5875
5876 /**
5877  * Get a pool by devx counter ID.
5878  *
5879  * @param[in] cmng
5880  *   Pointer to the counter management.
5881  * @param[in] id
5882  *   The counter devx ID.
5883  *
5884  * @return
5885  *   The counter pool pointer if exists, NULL otherwise,
5886  */
5887 static struct mlx5_flow_counter_pool *
5888 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5889 {
5890         uint32_t i;
5891         struct mlx5_flow_counter_pool *pool = NULL;
5892
5893         rte_spinlock_lock(&cmng->pool_update_sl);
5894         /* Check last used pool. */
5895         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5896             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5897                 pool = cmng->pools[cmng->last_pool_idx];
5898                 goto out;
5899         }
5900         /* ID out of range means no suitable pool in the container. */
5901         if (id > cmng->max_id || id < cmng->min_id)
5902                 goto out;
5903         /*
5904          * Find the pool from the end of the container, since mostly counter
5905          * ID is sequence increasing, and the last pool should be the needed
5906          * one.
5907          */
5908         i = cmng->n_valid;
5909         while (i--) {
5910                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5911
5912                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5913                         pool = pool_tmp;
5914                         break;
5915                 }
5916         }
5917 out:
5918         rte_spinlock_unlock(&cmng->pool_update_sl);
5919         return pool;
5920 }
5921
5922 /**
5923  * Resize a counter container.
5924  *
5925  * @param[in] dev
5926  *   Pointer to the Ethernet device structure.
5927  *
5928  * @return
5929  *   0 on success, otherwise negative errno value and rte_errno is set.
5930  */
5931 static int
5932 flow_dv_container_resize(struct rte_eth_dev *dev)
5933 {
5934         struct mlx5_priv *priv = dev->data->dev_private;
5935         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5936         void *old_pools = cmng->pools;
5937         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5938         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5939         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5940
5941         if (!pools) {
5942                 rte_errno = ENOMEM;
5943                 return -ENOMEM;
5944         }
5945         if (old_pools)
5946                 memcpy(pools, old_pools, cmng->n *
5947                                        sizeof(struct mlx5_flow_counter_pool *));
5948         cmng->n = resize;
5949         cmng->pools = pools;
5950         if (old_pools)
5951                 mlx5_free(old_pools);
5952         return 0;
5953 }
5954
5955 /**
5956  * Query a devx flow counter.
5957  *
5958  * @param[in] dev
5959  *   Pointer to the Ethernet device structure.
5960  * @param[in] counter
5961  *   Index to the flow counter.
5962  * @param[out] pkts
5963  *   The statistics value of packets.
5964  * @param[out] bytes
5965  *   The statistics value of bytes.
5966  *
5967  * @return
5968  *   0 on success, otherwise a negative errno value and rte_errno is set.
5969  */
5970 static inline int
5971 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5972                      uint64_t *bytes)
5973 {
5974         struct mlx5_priv *priv = dev->data->dev_private;
5975         struct mlx5_flow_counter_pool *pool = NULL;
5976         struct mlx5_flow_counter *cnt;
5977         int offset;
5978
5979         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5980         MLX5_ASSERT(pool);
5981         if (priv->sh->cmng.counter_fallback)
5982                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5983                                         0, pkts, bytes, 0, NULL, NULL, 0);
5984         rte_spinlock_lock(&pool->sl);
5985         if (!pool->raw) {
5986                 *pkts = 0;
5987                 *bytes = 0;
5988         } else {
5989                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5990                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5991                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5992         }
5993         rte_spinlock_unlock(&pool->sl);
5994         return 0;
5995 }
5996
5997 /**
5998  * Create and initialize a new counter pool.
5999  *
6000  * @param[in] dev
6001  *   Pointer to the Ethernet device structure.
6002  * @param[out] dcs
6003  *   The devX counter handle.
6004  * @param[in] age
6005  *   Whether the pool is for counter that was allocated for aging.
6006  * @param[in/out] cont_cur
6007  *   Pointer to the container pointer, it will be update in pool resize.
6008  *
6009  * @return
6010  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6011  */
6012 static struct mlx5_flow_counter_pool *
6013 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6014                     uint32_t age)
6015 {
6016         struct mlx5_priv *priv = dev->data->dev_private;
6017         struct mlx5_flow_counter_pool *pool;
6018         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6019         bool fallback = priv->sh->cmng.counter_fallback;
6020         uint32_t size = sizeof(*pool);
6021
6022         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6023         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6024         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6025         if (!pool) {
6026                 rte_errno = ENOMEM;
6027                 return NULL;
6028         }
6029         pool->raw = NULL;
6030         pool->is_aged = !!age;
6031         pool->query_gen = 0;
6032         pool->min_dcs = dcs;
6033         rte_spinlock_init(&pool->sl);
6034         rte_spinlock_init(&pool->csl);
6035         TAILQ_INIT(&pool->counters[0]);
6036         TAILQ_INIT(&pool->counters[1]);
6037         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6038         rte_spinlock_lock(&cmng->pool_update_sl);
6039         pool->index = cmng->n_valid;
6040         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6041                 mlx5_free(pool);
6042                 rte_spinlock_unlock(&cmng->pool_update_sl);
6043                 return NULL;
6044         }
6045         cmng->pools[pool->index] = pool;
6046         cmng->n_valid++;
6047         if (unlikely(fallback)) {
6048                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6049
6050                 if (base < cmng->min_id)
6051                         cmng->min_id = base;
6052                 if (base > cmng->max_id)
6053                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6054                 cmng->last_pool_idx = pool->index;
6055         }
6056         rte_spinlock_unlock(&cmng->pool_update_sl);
6057         return pool;
6058 }
6059
6060 /**
6061  * Prepare a new counter and/or a new counter pool.
6062  *
6063  * @param[in] dev
6064  *   Pointer to the Ethernet device structure.
6065  * @param[out] cnt_free
6066  *   Where to put the pointer of a new counter.
6067  * @param[in] age
6068  *   Whether the pool is for counter that was allocated for aging.
6069  *
6070  * @return
6071  *   The counter pool pointer and @p cnt_free is set on success,
6072  *   NULL otherwise and rte_errno is set.
6073  */
6074 static struct mlx5_flow_counter_pool *
6075 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6076                              struct mlx5_flow_counter **cnt_free,
6077                              uint32_t age)
6078 {
6079         struct mlx5_priv *priv = dev->data->dev_private;
6080         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6081         struct mlx5_flow_counter_pool *pool;
6082         struct mlx5_counters tmp_tq;
6083         struct mlx5_devx_obj *dcs = NULL;
6084         struct mlx5_flow_counter *cnt;
6085         enum mlx5_counter_type cnt_type =
6086                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6087         bool fallback = priv->sh->cmng.counter_fallback;
6088         uint32_t i;
6089
6090         if (fallback) {
6091                 /* bulk_bitmap must be 0 for single counter allocation. */
6092                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6093                 if (!dcs)
6094                         return NULL;
6095                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6096                 if (!pool) {
6097                         pool = flow_dv_pool_create(dev, dcs, age);
6098                         if (!pool) {
6099                                 mlx5_devx_cmd_destroy(dcs);
6100                                 return NULL;
6101                         }
6102                 }
6103                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6104                 cnt = MLX5_POOL_GET_CNT(pool, i);
6105                 cnt->pool = pool;
6106                 cnt->dcs_when_free = dcs;
6107                 *cnt_free = cnt;
6108                 return pool;
6109         }
6110         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6111         if (!dcs) {
6112                 rte_errno = ENODATA;
6113                 return NULL;
6114         }
6115         pool = flow_dv_pool_create(dev, dcs, age);
6116         if (!pool) {
6117                 mlx5_devx_cmd_destroy(dcs);
6118                 return NULL;
6119         }
6120         TAILQ_INIT(&tmp_tq);
6121         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6122                 cnt = MLX5_POOL_GET_CNT(pool, i);
6123                 cnt->pool = pool;
6124                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6125         }
6126         rte_spinlock_lock(&cmng->csl[cnt_type]);
6127         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6128         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6129         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6130         (*cnt_free)->pool = pool;
6131         return pool;
6132 }
6133
6134 /**
6135  * Allocate a flow counter.
6136  *
6137  * @param[in] dev
6138  *   Pointer to the Ethernet device structure.
6139  * @param[in] age
6140  *   Whether the counter was allocated for aging.
6141  *
6142  * @return
6143  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6144  */
6145 static uint32_t
6146 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6147 {
6148         struct mlx5_priv *priv = dev->data->dev_private;
6149         struct mlx5_flow_counter_pool *pool = NULL;
6150         struct mlx5_flow_counter *cnt_free = NULL;
6151         bool fallback = priv->sh->cmng.counter_fallback;
6152         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6153         enum mlx5_counter_type cnt_type =
6154                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6155         uint32_t cnt_idx;
6156
6157         if (!priv->sh->devx) {
6158                 rte_errno = ENOTSUP;
6159                 return 0;
6160         }
6161         /* Get free counters from container. */
6162         rte_spinlock_lock(&cmng->csl[cnt_type]);
6163         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6164         if (cnt_free)
6165                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6166         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6167         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6168                 goto err;
6169         pool = cnt_free->pool;
6170         if (fallback)
6171                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6172         /* Create a DV counter action only in the first time usage. */
6173         if (!cnt_free->action) {
6174                 uint16_t offset;
6175                 struct mlx5_devx_obj *dcs;
6176                 int ret;
6177
6178                 if (!fallback) {
6179                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6180                         dcs = pool->min_dcs;
6181                 } else {
6182                         offset = 0;
6183                         dcs = cnt_free->dcs_when_free;
6184                 }
6185                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6186                                                             &cnt_free->action);
6187                 if (ret) {
6188                         rte_errno = errno;
6189                         goto err;
6190                 }
6191         }
6192         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6193                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6194         /* Update the counter reset values. */
6195         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6196                                  &cnt_free->bytes))
6197                 goto err;
6198         if (!fallback && !priv->sh->cmng.query_thread_on)
6199                 /* Start the asynchronous batch query by the host thread. */
6200                 mlx5_set_query_alarm(priv->sh);
6201         /*
6202          * When the count action isn't shared (by ID), shared_info field is
6203          * used for indirect action API's refcnt.
6204          * When the counter action is not shared neither by ID nor by indirect
6205          * action API, shared info must be 1.
6206          */
6207         cnt_free->shared_info.refcnt = 1;
6208         return cnt_idx;
6209 err:
6210         if (cnt_free) {
6211                 cnt_free->pool = pool;
6212                 if (fallback)
6213                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6214                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6215                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6216                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6217         }
6218         return 0;
6219 }
6220
6221 /**
6222  * Get age param from counter index.
6223  *
6224  * @param[in] dev
6225  *   Pointer to the Ethernet device structure.
6226  * @param[in] counter
6227  *   Index to the counter handler.
6228  *
6229  * @return
6230  *   The aging parameter specified for the counter index.
6231  */
6232 static struct mlx5_age_param*
6233 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6234                                 uint32_t counter)
6235 {
6236         struct mlx5_flow_counter *cnt;
6237         struct mlx5_flow_counter_pool *pool = NULL;
6238
6239         flow_dv_counter_get_by_idx(dev, counter, &pool);
6240         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6241         cnt = MLX5_POOL_GET_CNT(pool, counter);
6242         return MLX5_CNT_TO_AGE(cnt);
6243 }
6244
6245 /**
6246  * Remove a flow counter from aged counter list.
6247  *
6248  * @param[in] dev
6249  *   Pointer to the Ethernet device structure.
6250  * @param[in] counter
6251  *   Index to the counter handler.
6252  * @param[in] cnt
6253  *   Pointer to the counter handler.
6254  */
6255 static void
6256 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6257                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6258 {
6259         struct mlx5_age_info *age_info;
6260         struct mlx5_age_param *age_param;
6261         struct mlx5_priv *priv = dev->data->dev_private;
6262         uint16_t expected = AGE_CANDIDATE;
6263
6264         age_info = GET_PORT_AGE_INFO(priv);
6265         age_param = flow_dv_counter_idx_get_age(dev, counter);
6266         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6267                                          AGE_FREE, false, __ATOMIC_RELAXED,
6268                                          __ATOMIC_RELAXED)) {
6269                 /**
6270                  * We need the lock even it is age timeout,
6271                  * since counter may still in process.
6272                  */
6273                 rte_spinlock_lock(&age_info->aged_sl);
6274                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6275                 rte_spinlock_unlock(&age_info->aged_sl);
6276                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6277         }
6278 }
6279
6280 /**
6281  * Release a flow counter.
6282  *
6283  * @param[in] dev
6284  *   Pointer to the Ethernet device structure.
6285  * @param[in] counter
6286  *   Index to the counter handler.
6287  */
6288 static void
6289 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6290 {
6291         struct mlx5_priv *priv = dev->data->dev_private;
6292         struct mlx5_flow_counter_pool *pool = NULL;
6293         struct mlx5_flow_counter *cnt;
6294         enum mlx5_counter_type cnt_type;
6295
6296         if (!counter)
6297                 return;
6298         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6299         MLX5_ASSERT(pool);
6300         if (pool->is_aged) {
6301                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6302         } else {
6303                 /*
6304                  * If the counter action is shared by indirect action API,
6305                  * the atomic function reduces its references counter.
6306                  * If after the reduction the action is still referenced, the
6307                  * function returns here and does not release it.
6308                  * When the counter action is not shared by
6309                  * indirect action API, shared info is 1 before the reduction,
6310                  * so this condition is failed and function doesn't return here.
6311                  */
6312                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6313                                        __ATOMIC_RELAXED))
6314                         return;
6315         }
6316         cnt->pool = pool;
6317         /*
6318          * Put the counter back to list to be updated in none fallback mode.
6319          * Currently, we are using two list alternately, while one is in query,
6320          * add the freed counter to the other list based on the pool query_gen
6321          * value. After query finishes, add counter the list to the global
6322          * container counter list. The list changes while query starts. In
6323          * this case, lock will not be needed as query callback and release
6324          * function both operate with the different list.
6325          */
6326         if (!priv->sh->cmng.counter_fallback) {
6327                 rte_spinlock_lock(&pool->csl);
6328                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6329                 rte_spinlock_unlock(&pool->csl);
6330         } else {
6331                 cnt->dcs_when_free = cnt->dcs_when_active;
6332                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6333                                            MLX5_COUNTER_TYPE_ORIGIN;
6334                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6335                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6336                                   cnt, next);
6337                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6338         }
6339 }
6340
6341 /**
6342  * Resize a meter id container.
6343  *
6344  * @param[in] dev
6345  *   Pointer to the Ethernet device structure.
6346  *
6347  * @return
6348  *   0 on success, otherwise negative errno value and rte_errno is set.
6349  */
6350 static int
6351 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6352 {
6353         struct mlx5_priv *priv = dev->data->dev_private;
6354         struct mlx5_aso_mtr_pools_mng *pools_mng =
6355                                 &priv->sh->mtrmng->pools_mng;
6356         void *old_pools = pools_mng->pools;
6357         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6358         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6359         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6360
6361         if (!pools) {
6362                 rte_errno = ENOMEM;
6363                 return -ENOMEM;
6364         }
6365         if (!pools_mng->n)
6366                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6367                         mlx5_free(pools);
6368                         return -ENOMEM;
6369                 }
6370         if (old_pools)
6371                 memcpy(pools, old_pools, pools_mng->n *
6372                                        sizeof(struct mlx5_aso_mtr_pool *));
6373         pools_mng->n = resize;
6374         pools_mng->pools = pools;
6375         if (old_pools)
6376                 mlx5_free(old_pools);
6377         return 0;
6378 }
6379
6380 /**
6381  * Prepare a new meter and/or a new meter pool.
6382  *
6383  * @param[in] dev
6384  *   Pointer to the Ethernet device structure.
6385  * @param[out] mtr_free
6386  *   Where to put the pointer of a new meter.g.
6387  *
6388  * @return
6389  *   The meter pool pointer and @mtr_free is set on success,
6390  *   NULL otherwise and rte_errno is set.
6391  */
6392 static struct mlx5_aso_mtr_pool *
6393 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6394 {
6395         struct mlx5_priv *priv = dev->data->dev_private;
6396         struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6397         struct mlx5_aso_mtr_pool *pool = NULL;
6398         struct mlx5_devx_obj *dcs = NULL;
6399         uint32_t i;
6400         uint32_t log_obj_size;
6401
6402         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6403         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6404                                                       priv->sh->cdev->pdn,
6405                                                       log_obj_size);
6406         if (!dcs) {
6407                 rte_errno = ENODATA;
6408                 return NULL;
6409         }
6410         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6411         if (!pool) {
6412                 rte_errno = ENOMEM;
6413                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6414                 return NULL;
6415         }
6416         pool->devx_obj = dcs;
6417         rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6418         pool->index = pools_mng->n_valid;
6419         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6420                 mlx5_free(pool);
6421                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6422                 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6423                 return NULL;
6424         }
6425         pools_mng->pools[pool->index] = pool;
6426         pools_mng->n_valid++;
6427         rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6428         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6429                 pool->mtrs[i].offset = i;
6430                 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6431         }
6432         pool->mtrs[0].offset = 0;
6433         *mtr_free = &pool->mtrs[0];
6434         return pool;
6435 }
6436
6437 /**
6438  * Release a flow meter into pool.
6439  *
6440  * @param[in] dev
6441  *   Pointer to the Ethernet device structure.
6442  * @param[in] mtr_idx
6443  *   Index to aso flow meter.
6444  */
6445 static void
6446 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6447 {
6448         struct mlx5_priv *priv = dev->data->dev_private;
6449         struct mlx5_aso_mtr_pools_mng *pools_mng =
6450                                 &priv->sh->mtrmng->pools_mng;
6451         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6452
6453         MLX5_ASSERT(aso_mtr);
6454         rte_spinlock_lock(&pools_mng->mtrsl);
6455         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6456         aso_mtr->state = ASO_METER_FREE;
6457         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6458         rte_spinlock_unlock(&pools_mng->mtrsl);
6459 }
6460
6461 /**
6462  * Allocate a aso flow meter.
6463  *
6464  * @param[in] dev
6465  *   Pointer to the Ethernet device structure.
6466  *
6467  * @return
6468  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6469  */
6470 static uint32_t
6471 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6472 {
6473         struct mlx5_priv *priv = dev->data->dev_private;
6474         struct mlx5_aso_mtr *mtr_free = NULL;
6475         struct mlx5_aso_mtr_pools_mng *pools_mng =
6476                                 &priv->sh->mtrmng->pools_mng;
6477         struct mlx5_aso_mtr_pool *pool;
6478         uint32_t mtr_idx = 0;
6479
6480         if (!priv->sh->devx) {
6481                 rte_errno = ENOTSUP;
6482                 return 0;
6483         }
6484         /* Allocate the flow meter memory. */
6485         /* Get free meters from management. */
6486         rte_spinlock_lock(&pools_mng->mtrsl);
6487         mtr_free = LIST_FIRST(&pools_mng->meters);
6488         if (mtr_free)
6489                 LIST_REMOVE(mtr_free, next);
6490         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6491                 rte_spinlock_unlock(&pools_mng->mtrsl);
6492                 return 0;
6493         }
6494         mtr_free->state = ASO_METER_WAIT;
6495         rte_spinlock_unlock(&pools_mng->mtrsl);
6496         pool = container_of(mtr_free,
6497                         struct mlx5_aso_mtr_pool,
6498                         mtrs[mtr_free->offset]);
6499         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6500         if (!mtr_free->fm.meter_action) {
6501 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6502                 struct rte_flow_error error;
6503                 uint8_t reg_id;
6504
6505                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6506                 mtr_free->fm.meter_action =
6507                         mlx5_glue->dv_create_flow_action_aso
6508                                                 (priv->sh->rx_domain,
6509                                                  pool->devx_obj->obj,
6510                                                  mtr_free->offset,
6511                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6512                                                  reg_id - REG_C_0);
6513 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6514                 if (!mtr_free->fm.meter_action) {
6515                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6516                         return 0;
6517                 }
6518         }
6519         return mtr_idx;
6520 }
6521
6522 /**
6523  * Verify the @p attributes will be correctly understood by the NIC and store
6524  * them in the @p flow if everything is correct.
6525  *
6526  * @param[in] dev
6527  *   Pointer to dev struct.
6528  * @param[in] attributes
6529  *   Pointer to flow attributes
6530  * @param[in] external
6531  *   This flow rule is created by request external to PMD.
6532  * @param[out] error
6533  *   Pointer to error structure.
6534  *
6535  * @return
6536  *   - 0 on success and non root table.
6537  *   - 1 on success and root table.
6538  *   - a negative errno value otherwise and rte_errno is set.
6539  */
6540 static int
6541 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6542                             const struct mlx5_flow_tunnel *tunnel,
6543                             const struct rte_flow_attr *attributes,
6544                             const struct flow_grp_info *grp_info,
6545                             struct rte_flow_error *error)
6546 {
6547         struct mlx5_priv *priv = dev->data->dev_private;
6548         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6549         int ret = 0;
6550
6551 #ifndef HAVE_MLX5DV_DR
6552         RTE_SET_USED(tunnel);
6553         RTE_SET_USED(grp_info);
6554         if (attributes->group)
6555                 return rte_flow_error_set(error, ENOTSUP,
6556                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6557                                           NULL,
6558                                           "groups are not supported");
6559 #else
6560         uint32_t table = 0;
6561
6562         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6563                                        grp_info, error);
6564         if (ret)
6565                 return ret;
6566         if (!table)
6567                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6568 #endif
6569         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6570             attributes->priority > lowest_priority)
6571                 return rte_flow_error_set(error, ENOTSUP,
6572                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6573                                           NULL,
6574                                           "priority out of range");
6575         if (attributes->transfer) {
6576                 if (!priv->config.dv_esw_en)
6577                         return rte_flow_error_set
6578                                 (error, ENOTSUP,
6579                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6580                                  "E-Switch dr is not supported");
6581                 if (!(priv->representor || priv->master))
6582                         return rte_flow_error_set
6583                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6584                                  NULL, "E-Switch configuration can only be"
6585                                  " done by a master or a representor device");
6586                 if (attributes->egress)
6587                         return rte_flow_error_set
6588                                 (error, ENOTSUP,
6589                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6590                                  "egress is not supported");
6591         }
6592         if (!(attributes->egress ^ attributes->ingress))
6593                 return rte_flow_error_set(error, ENOTSUP,
6594                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6595                                           "must specify exactly one of "
6596                                           "ingress or egress");
6597         return ret;
6598 }
6599
6600 static int
6601 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6602                         int64_t pattern_flags, uint64_t l3_flags,
6603                         uint64_t l4_flags, uint64_t ip4_flag,
6604                         struct rte_flow_error *error)
6605 {
6606         if (mask->l3_ok && !(pattern_flags & l3_flags))
6607                 return rte_flow_error_set(error, EINVAL,
6608                                           RTE_FLOW_ERROR_TYPE_ITEM,
6609                                           NULL, "missing L3 protocol");
6610
6611         if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6612                 return rte_flow_error_set(error, EINVAL,
6613                                           RTE_FLOW_ERROR_TYPE_ITEM,
6614                                           NULL, "missing IPv4 protocol");
6615
6616         if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6617                 return rte_flow_error_set(error, EINVAL,
6618                                           RTE_FLOW_ERROR_TYPE_ITEM,
6619                                           NULL, "missing L4 protocol");
6620
6621         return 0;
6622 }
6623
6624 static int
6625 flow_dv_validate_item_integrity_post(const struct
6626                                      rte_flow_item *integrity_items[2],
6627                                      int64_t pattern_flags,
6628                                      struct rte_flow_error *error)
6629 {
6630         const struct rte_flow_item_integrity *mask;
6631         int ret;
6632
6633         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6634                 mask = (typeof(mask))integrity_items[0]->mask;
6635                 ret = validate_integrity_bits(mask, pattern_flags,
6636                                               MLX5_FLOW_LAYER_OUTER_L3,
6637                                               MLX5_FLOW_LAYER_OUTER_L4,
6638                                               MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6639                                               error);
6640                 if (ret)
6641                         return ret;
6642         }
6643         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6644                 mask = (typeof(mask))integrity_items[1]->mask;
6645                 ret = validate_integrity_bits(mask, pattern_flags,
6646                                               MLX5_FLOW_LAYER_INNER_L3,
6647                                               MLX5_FLOW_LAYER_INNER_L4,
6648                                               MLX5_FLOW_LAYER_INNER_L3_IPV4,
6649                                               error);
6650                 if (ret)
6651                         return ret;
6652         }
6653         return 0;
6654 }
6655
6656 static int
6657 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6658                                 const struct rte_flow_item *integrity_item,
6659                                 uint64_t pattern_flags, uint64_t *last_item,
6660                                 const struct rte_flow_item *integrity_items[2],
6661                                 struct rte_flow_error *error)
6662 {
6663         struct mlx5_priv *priv = dev->data->dev_private;
6664         const struct rte_flow_item_integrity *mask = (typeof(mask))
6665                                                      integrity_item->mask;
6666         const struct rte_flow_item_integrity *spec = (typeof(spec))
6667                                                      integrity_item->spec;
6668
6669         if (!priv->config.hca_attr.pkt_integrity_match)
6670                 return rte_flow_error_set(error, ENOTSUP,
6671                                           RTE_FLOW_ERROR_TYPE_ITEM,
6672                                           integrity_item,
6673                                           "packet integrity integrity_item not supported");
6674         if (!spec)
6675                 return rte_flow_error_set(error, ENOTSUP,
6676                                           RTE_FLOW_ERROR_TYPE_ITEM,
6677                                           integrity_item,
6678                                           "no spec for integrity item");
6679         if (!mask)
6680                 mask = &rte_flow_item_integrity_mask;
6681         if (!mlx5_validate_integrity_item(mask))
6682                 return rte_flow_error_set(error, ENOTSUP,
6683                                           RTE_FLOW_ERROR_TYPE_ITEM,
6684                                           integrity_item,
6685                                           "unsupported integrity filter");
6686         if (spec->level > 1) {
6687                 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6688                         return rte_flow_error_set
6689                                 (error, ENOTSUP,
6690                                  RTE_FLOW_ERROR_TYPE_ITEM,
6691                                  NULL, "multiple inner integrity items not supported");
6692                 integrity_items[1] = integrity_item;
6693                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6694         } else {
6695                 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6696                         return rte_flow_error_set
6697                                 (error, ENOTSUP,
6698                                  RTE_FLOW_ERROR_TYPE_ITEM,
6699                                  NULL, "multiple outer integrity items not supported");
6700                 integrity_items[0] = integrity_item;
6701                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6702         }
6703         return 0;
6704 }
6705
6706 static int
6707 flow_dv_validate_item_flex(struct rte_eth_dev *dev,
6708                            const struct rte_flow_item *item,
6709                            uint64_t item_flags,
6710                            uint64_t *last_item,
6711                            bool is_inner,
6712                            struct rte_flow_error *error)
6713 {
6714         const struct rte_flow_item_flex *flow_spec = item->spec;
6715         const struct rte_flow_item_flex *flow_mask = item->mask;
6716         struct mlx5_flex_item *flex;
6717
6718         if (!flow_spec)
6719                 return rte_flow_error_set(error, EINVAL,
6720                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6721                                           "flex flow item spec cannot be NULL");
6722         if (!flow_mask)
6723                 return rte_flow_error_set(error, EINVAL,
6724                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6725                                           "flex flow item mask cannot be NULL");
6726         if (item->last)
6727                 return rte_flow_error_set(error, ENOTSUP,
6728                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6729                                           "flex flow item last not supported");
6730         if (mlx5_flex_acquire_index(dev, flow_spec->handle, false) < 0)
6731                 return rte_flow_error_set(error, EINVAL,
6732                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6733                                           "invalid flex flow item handle");
6734         flex = (struct mlx5_flex_item *)flow_spec->handle;
6735         switch (flex->tunnel_mode) {
6736         case FLEX_TUNNEL_MODE_SINGLE:
6737                 if (item_flags &
6738                     (MLX5_FLOW_ITEM_OUTER_FLEX | MLX5_FLOW_ITEM_INNER_FLEX))
6739                         rte_flow_error_set(error, EINVAL,
6740                                            RTE_FLOW_ERROR_TYPE_ITEM,
6741                                            NULL, "multiple flex items not supported");
6742                 break;
6743         case FLEX_TUNNEL_MODE_OUTER:
6744                 if (is_inner)
6745                         rte_flow_error_set(error, EINVAL,
6746                                            RTE_FLOW_ERROR_TYPE_ITEM,
6747                                            NULL, "inner flex item was not configured");
6748                 if (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX)
6749                         rte_flow_error_set(error, ENOTSUP,
6750                                            RTE_FLOW_ERROR_TYPE_ITEM,
6751                                            NULL, "multiple flex items not supported");
6752                 break;
6753         case FLEX_TUNNEL_MODE_INNER:
6754                 if (!is_inner)
6755                         rte_flow_error_set(error, EINVAL,
6756                                            RTE_FLOW_ERROR_TYPE_ITEM,
6757                                            NULL, "outer flex item was not configured");
6758                 if (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)
6759                         rte_flow_error_set(error, EINVAL,
6760                                            RTE_FLOW_ERROR_TYPE_ITEM,
6761                                            NULL, "multiple flex items not supported");
6762                 break;
6763         case FLEX_TUNNEL_MODE_MULTI:
6764                 if ((is_inner && (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)) ||
6765                     (!is_inner && (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX))) {
6766                         rte_flow_error_set(error, EINVAL,
6767                                            RTE_FLOW_ERROR_TYPE_ITEM,
6768                                            NULL, "multiple flex items not supported");
6769                 }
6770                 break;
6771         case FLEX_TUNNEL_MODE_TUNNEL:
6772                 if (is_inner || (item_flags & MLX5_FLOW_ITEM_FLEX_TUNNEL))
6773                         rte_flow_error_set(error, EINVAL,
6774                                            RTE_FLOW_ERROR_TYPE_ITEM,
6775                                            NULL, "multiple flex tunnel items not supported");
6776                 break;
6777         default:
6778                 rte_flow_error_set(error, EINVAL,
6779                                    RTE_FLOW_ERROR_TYPE_ITEM,
6780                                    NULL, "invalid flex item configuration");
6781         }
6782         *last_item = flex->tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ?
6783                      MLX5_FLOW_ITEM_FLEX_TUNNEL : is_inner ?
6784                      MLX5_FLOW_ITEM_INNER_FLEX : MLX5_FLOW_ITEM_OUTER_FLEX;
6785         return 0;
6786 }
6787
6788 /**
6789  * Internal validation function. For validating both actions and items.
6790  *
6791  * @param[in] dev
6792  *   Pointer to the rte_eth_dev structure.
6793  * @param[in] attr
6794  *   Pointer to the flow attributes.
6795  * @param[in] items
6796  *   Pointer to the list of items.
6797  * @param[in] actions
6798  *   Pointer to the list of actions.
6799  * @param[in] external
6800  *   This flow rule is created by request external to PMD.
6801  * @param[in] hairpin
6802  *   Number of hairpin TX actions, 0 means classic flow.
6803  * @param[out] error
6804  *   Pointer to the error structure.
6805  *
6806  * @return
6807  *   0 on success, a negative errno value otherwise and rte_errno is set.
6808  */
6809 static int
6810 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6811                  const struct rte_flow_item items[],
6812                  const struct rte_flow_action actions[],
6813                  bool external, int hairpin, struct rte_flow_error *error)
6814 {
6815         int ret;
6816         uint64_t action_flags = 0;
6817         uint64_t item_flags = 0;
6818         uint64_t last_item = 0;
6819         uint8_t next_protocol = 0xff;
6820         uint16_t ether_type = 0;
6821         int actions_n = 0;
6822         uint8_t item_ipv6_proto = 0;
6823         int fdb_mirror_limit = 0;
6824         int modify_after_mirror = 0;
6825         const struct rte_flow_item *geneve_item = NULL;
6826         const struct rte_flow_item *gre_item = NULL;
6827         const struct rte_flow_item *gtp_item = NULL;
6828         const struct rte_flow_action_raw_decap *decap;
6829         const struct rte_flow_action_raw_encap *encap;
6830         const struct rte_flow_action_rss *rss = NULL;
6831         const struct rte_flow_action_rss *sample_rss = NULL;
6832         const struct rte_flow_action_count *sample_count = NULL;
6833         const struct rte_flow_item_tcp nic_tcp_mask = {
6834                 .hdr = {
6835                         .tcp_flags = 0xFF,
6836                         .src_port = RTE_BE16(UINT16_MAX),
6837                         .dst_port = RTE_BE16(UINT16_MAX),
6838                 }
6839         };
6840         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6841                 .hdr = {
6842                         .src_addr =
6843                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6844                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6845                         .dst_addr =
6846                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6847                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6848                         .vtc_flow = RTE_BE32(0xffffffff),
6849                         .proto = 0xff,
6850                         .hop_limits = 0xff,
6851                 },
6852                 .has_frag_ext = 1,
6853         };
6854         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6855                 .hdr = {
6856                         .common = {
6857                                 .u32 =
6858                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6859                                         .type = 0xFF,
6860                                         }).u32),
6861                         },
6862                         .dummy[0] = 0xffffffff,
6863                 },
6864         };
6865         struct mlx5_priv *priv = dev->data->dev_private;
6866         struct mlx5_dev_config *dev_conf = &priv->config;
6867         uint16_t queue_index = 0xFFFF;
6868         const struct rte_flow_item_vlan *vlan_m = NULL;
6869         uint32_t rw_act_num = 0;
6870         uint64_t is_root;
6871         const struct mlx5_flow_tunnel *tunnel;
6872         enum mlx5_tof_rule_type tof_rule_type;
6873         struct flow_grp_info grp_info = {
6874                 .external = !!external,
6875                 .transfer = !!attr->transfer,
6876                 .fdb_def_rule = !!priv->fdb_def_rule,
6877                 .std_tbl_fix = true,
6878         };
6879         const struct rte_eth_hairpin_conf *conf;
6880         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6881         const struct rte_flow_item *port_id_item = NULL;
6882         bool def_policy = false;
6883         uint16_t udp_dport = 0;
6884
6885         if (items == NULL)
6886                 return -1;
6887         tunnel = is_tunnel_offload_active(dev) ?
6888                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6889         if (tunnel) {
6890                 if (!priv->config.dv_flow_en)
6891                         return rte_flow_error_set
6892                                 (error, ENOTSUP,
6893                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6894                                  NULL, "tunnel offload requires DV flow interface");
6895                 if (priv->representor)
6896                         return rte_flow_error_set
6897                                 (error, ENOTSUP,
6898                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6899                                  NULL, "decap not supported for VF representor");
6900                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6901                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6902                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6903                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6904                                         MLX5_FLOW_ACTION_DECAP;
6905                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6906                                         (dev, attr, tunnel, tof_rule_type);
6907         }
6908         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6909         if (ret < 0)
6910                 return ret;
6911         is_root = (uint64_t)ret;
6912         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6913                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6914                 int type = items->type;
6915
6916                 if (!mlx5_flow_os_item_supported(type))
6917                         return rte_flow_error_set(error, ENOTSUP,
6918                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6919                                                   NULL, "item not supported");
6920                 switch (type) {
6921                 case RTE_FLOW_ITEM_TYPE_VOID:
6922                         break;
6923                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6924                         ret = flow_dv_validate_item_port_id
6925                                         (dev, items, attr, item_flags, error);
6926                         if (ret < 0)
6927                                 return ret;
6928                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6929                         port_id_item = items;
6930                         break;
6931                 case RTE_FLOW_ITEM_TYPE_ETH:
6932                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6933                                                           true, error);
6934                         if (ret < 0)
6935                                 return ret;
6936                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6937                                              MLX5_FLOW_LAYER_OUTER_L2;
6938                         if (items->mask != NULL && items->spec != NULL) {
6939                                 ether_type =
6940                                         ((const struct rte_flow_item_eth *)
6941                                          items->spec)->type;
6942                                 ether_type &=
6943                                         ((const struct rte_flow_item_eth *)
6944                                          items->mask)->type;
6945                                 ether_type = rte_be_to_cpu_16(ether_type);
6946                         } else {
6947                                 ether_type = 0;
6948                         }
6949                         break;
6950                 case RTE_FLOW_ITEM_TYPE_VLAN:
6951                         ret = flow_dv_validate_item_vlan(items, item_flags,
6952                                                          dev, error);
6953                         if (ret < 0)
6954                                 return ret;
6955                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6956                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6957                         if (items->mask != NULL && items->spec != NULL) {
6958                                 ether_type =
6959                                         ((const struct rte_flow_item_vlan *)
6960                                          items->spec)->inner_type;
6961                                 ether_type &=
6962                                         ((const struct rte_flow_item_vlan *)
6963                                          items->mask)->inner_type;
6964                                 ether_type = rte_be_to_cpu_16(ether_type);
6965                         } else {
6966                                 ether_type = 0;
6967                         }
6968                         /* Store outer VLAN mask for of_push_vlan action. */
6969                         if (!tunnel)
6970                                 vlan_m = items->mask;
6971                         break;
6972                 case RTE_FLOW_ITEM_TYPE_IPV4:
6973                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6974                                                   &item_flags, &tunnel);
6975                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
6976                                                          last_item, ether_type,
6977                                                          error);
6978                         if (ret < 0)
6979                                 return ret;
6980                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6981                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6982                         if (items->mask != NULL &&
6983                             ((const struct rte_flow_item_ipv4 *)
6984                              items->mask)->hdr.next_proto_id) {
6985                                 next_protocol =
6986                                         ((const struct rte_flow_item_ipv4 *)
6987                                          (items->spec))->hdr.next_proto_id;
6988                                 next_protocol &=
6989                                         ((const struct rte_flow_item_ipv4 *)
6990                                          (items->mask))->hdr.next_proto_id;
6991                         } else {
6992                                 /* Reset for inner layer. */
6993                                 next_protocol = 0xff;
6994                         }
6995                         break;
6996                 case RTE_FLOW_ITEM_TYPE_IPV6:
6997                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6998                                                   &item_flags, &tunnel);
6999                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7000                                                            last_item,
7001                                                            ether_type,
7002                                                            &nic_ipv6_mask,
7003                                                            error);
7004                         if (ret < 0)
7005                                 return ret;
7006                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7007                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7008                         if (items->mask != NULL &&
7009                             ((const struct rte_flow_item_ipv6 *)
7010                              items->mask)->hdr.proto) {
7011                                 item_ipv6_proto =
7012                                         ((const struct rte_flow_item_ipv6 *)
7013                                          items->spec)->hdr.proto;
7014                                 next_protocol =
7015                                         ((const struct rte_flow_item_ipv6 *)
7016                                          items->spec)->hdr.proto;
7017                                 next_protocol &=
7018                                         ((const struct rte_flow_item_ipv6 *)
7019                                          items->mask)->hdr.proto;
7020                         } else {
7021                                 /* Reset for inner layer. */
7022                                 next_protocol = 0xff;
7023                         }
7024                         break;
7025                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7026                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
7027                                                                   item_flags,
7028                                                                   error);
7029                         if (ret < 0)
7030                                 return ret;
7031                         last_item = tunnel ?
7032                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7033                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7034                         if (items->mask != NULL &&
7035                             ((const struct rte_flow_item_ipv6_frag_ext *)
7036                              items->mask)->hdr.next_header) {
7037                                 next_protocol =
7038                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7039                                  items->spec)->hdr.next_header;
7040                                 next_protocol &=
7041                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7042                                  items->mask)->hdr.next_header;
7043                         } else {
7044                                 /* Reset for inner layer. */
7045                                 next_protocol = 0xff;
7046                         }
7047                         break;
7048                 case RTE_FLOW_ITEM_TYPE_TCP:
7049                         ret = mlx5_flow_validate_item_tcp
7050                                                 (items, item_flags,
7051                                                  next_protocol,
7052                                                  &nic_tcp_mask,
7053                                                  error);
7054                         if (ret < 0)
7055                                 return ret;
7056                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7057                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7058                         break;
7059                 case RTE_FLOW_ITEM_TYPE_UDP:
7060                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7061                                                           next_protocol,
7062                                                           error);
7063                         const struct rte_flow_item_udp *spec = items->spec;
7064                         const struct rte_flow_item_udp *mask = items->mask;
7065                         if (!mask)
7066                                 mask = &rte_flow_item_udp_mask;
7067                         if (spec != NULL)
7068                                 udp_dport = rte_be_to_cpu_16
7069                                                 (spec->hdr.dst_port &
7070                                                  mask->hdr.dst_port);
7071                         if (ret < 0)
7072                                 return ret;
7073                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7074                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7075                         break;
7076                 case RTE_FLOW_ITEM_TYPE_GRE:
7077                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7078                                                           next_protocol, error);
7079                         if (ret < 0)
7080                                 return ret;
7081                         gre_item = items;
7082                         last_item = MLX5_FLOW_LAYER_GRE;
7083                         break;
7084                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7085                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7086                                                             next_protocol,
7087                                                             error);
7088                         if (ret < 0)
7089                                 return ret;
7090                         last_item = MLX5_FLOW_LAYER_NVGRE;
7091                         break;
7092                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7093                         ret = mlx5_flow_validate_item_gre_key
7094                                 (items, item_flags, gre_item, error);
7095                         if (ret < 0)
7096                                 return ret;
7097                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7098                         break;
7099                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7100                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7101                                                             items, item_flags,
7102                                                             attr, error);
7103                         if (ret < 0)
7104                                 return ret;
7105                         last_item = MLX5_FLOW_LAYER_VXLAN;
7106                         break;
7107                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7108                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7109                                                                 item_flags, dev,
7110                                                                 error);
7111                         if (ret < 0)
7112                                 return ret;
7113                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7114                         break;
7115                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7116                         ret = mlx5_flow_validate_item_geneve(items,
7117                                                              item_flags, dev,
7118                                                              error);
7119                         if (ret < 0)
7120                                 return ret;
7121                         geneve_item = items;
7122                         last_item = MLX5_FLOW_LAYER_GENEVE;
7123                         break;
7124                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7125                         ret = mlx5_flow_validate_item_geneve_opt(items,
7126                                                                  last_item,
7127                                                                  geneve_item,
7128                                                                  dev,
7129                                                                  error);
7130                         if (ret < 0)
7131                                 return ret;
7132                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7133                         break;
7134                 case RTE_FLOW_ITEM_TYPE_MPLS:
7135                         ret = mlx5_flow_validate_item_mpls(dev, items,
7136                                                            item_flags,
7137                                                            last_item, error);
7138                         if (ret < 0)
7139                                 return ret;
7140                         last_item = MLX5_FLOW_LAYER_MPLS;
7141                         break;
7142
7143                 case RTE_FLOW_ITEM_TYPE_MARK:
7144                         ret = flow_dv_validate_item_mark(dev, items, attr,
7145                                                          error);
7146                         if (ret < 0)
7147                                 return ret;
7148                         last_item = MLX5_FLOW_ITEM_MARK;
7149                         break;
7150                 case RTE_FLOW_ITEM_TYPE_META:
7151                         ret = flow_dv_validate_item_meta(dev, items, attr,
7152                                                          error);
7153                         if (ret < 0)
7154                                 return ret;
7155                         last_item = MLX5_FLOW_ITEM_METADATA;
7156                         break;
7157                 case RTE_FLOW_ITEM_TYPE_ICMP:
7158                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7159                                                            next_protocol,
7160                                                            error);
7161                         if (ret < 0)
7162                                 return ret;
7163                         last_item = MLX5_FLOW_LAYER_ICMP;
7164                         break;
7165                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7166                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7167                                                             next_protocol,
7168                                                             error);
7169                         if (ret < 0)
7170                                 return ret;
7171                         item_ipv6_proto = IPPROTO_ICMPV6;
7172                         last_item = MLX5_FLOW_LAYER_ICMP6;
7173                         break;
7174                 case RTE_FLOW_ITEM_TYPE_TAG:
7175                         ret = flow_dv_validate_item_tag(dev, items,
7176                                                         attr, error);
7177                         if (ret < 0)
7178                                 return ret;
7179                         last_item = MLX5_FLOW_ITEM_TAG;
7180                         break;
7181                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7182                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7183                         break;
7184                 case RTE_FLOW_ITEM_TYPE_GTP:
7185                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7186                                                         error);
7187                         if (ret < 0)
7188                                 return ret;
7189                         gtp_item = items;
7190                         last_item = MLX5_FLOW_LAYER_GTP;
7191                         break;
7192                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7193                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7194                                                             gtp_item, attr,
7195                                                             error);
7196                         if (ret < 0)
7197                                 return ret;
7198                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7199                         break;
7200                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7201                         /* Capacity will be checked in the translate stage. */
7202                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7203                                                             last_item,
7204                                                             ether_type,
7205                                                             &nic_ecpri_mask,
7206                                                             error);
7207                         if (ret < 0)
7208                                 return ret;
7209                         last_item = MLX5_FLOW_LAYER_ECPRI;
7210                         break;
7211                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7212                         ret = flow_dv_validate_item_integrity(dev, items,
7213                                                               item_flags,
7214                                                               &last_item,
7215                                                               integrity_items,
7216                                                               error);
7217                         if (ret < 0)
7218                                 return ret;
7219                         break;
7220                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7221                         ret = flow_dv_validate_item_aso_ct(dev, items,
7222                                                            &item_flags, error);
7223                         if (ret < 0)
7224                                 return ret;
7225                         break;
7226                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7227                         /* tunnel offload item was processed before
7228                          * list it here as a supported type
7229                          */
7230                         break;
7231                 case RTE_FLOW_ITEM_TYPE_FLEX:
7232                         ret = flow_dv_validate_item_flex(dev, items, item_flags,
7233                                                          &last_item,
7234                                                          tunnel != 0, error);
7235                         if (ret < 0)
7236                                 return ret;
7237                         break;
7238                 default:
7239                         return rte_flow_error_set(error, ENOTSUP,
7240                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7241                                                   NULL, "item not supported");
7242                 }
7243                 item_flags |= last_item;
7244         }
7245         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7246                 ret = flow_dv_validate_item_integrity_post(integrity_items,
7247                                                            item_flags, error);
7248                 if (ret)
7249                         return ret;
7250         }
7251         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7252                 int type = actions->type;
7253                 bool shared_count = false;
7254
7255                 if (!mlx5_flow_os_action_supported(type))
7256                         return rte_flow_error_set(error, ENOTSUP,
7257                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7258                                                   actions,
7259                                                   "action not supported");
7260                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7261                         return rte_flow_error_set(error, ENOTSUP,
7262                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7263                                                   actions, "too many actions");
7264                 if (action_flags &
7265                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7266                         return rte_flow_error_set(error, ENOTSUP,
7267                                 RTE_FLOW_ERROR_TYPE_ACTION,
7268                                 NULL, "meter action with policy "
7269                                 "must be the last action");
7270                 switch (type) {
7271                 case RTE_FLOW_ACTION_TYPE_VOID:
7272                         break;
7273                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7274                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7275                         ret = flow_dv_validate_action_port_id(dev,
7276                                                               action_flags,
7277                                                               actions,
7278                                                               attr,
7279                                                               error);
7280                         if (ret)
7281                                 return ret;
7282                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7283                         ++actions_n;
7284                         break;
7285                 case RTE_FLOW_ACTION_TYPE_FLAG:
7286                         ret = flow_dv_validate_action_flag(dev, action_flags,
7287                                                            attr, error);
7288                         if (ret < 0)
7289                                 return ret;
7290                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7291                                 /* Count all modify-header actions as one. */
7292                                 if (!(action_flags &
7293                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7294                                         ++actions_n;
7295                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7296                                                 MLX5_FLOW_ACTION_MARK_EXT;
7297                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7298                                         modify_after_mirror = 1;
7299
7300                         } else {
7301                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7302                                 ++actions_n;
7303                         }
7304                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7305                         break;
7306                 case RTE_FLOW_ACTION_TYPE_MARK:
7307                         ret = flow_dv_validate_action_mark(dev, actions,
7308                                                            action_flags,
7309                                                            attr, error);
7310                         if (ret < 0)
7311                                 return ret;
7312                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7313                                 /* Count all modify-header actions as one. */
7314                                 if (!(action_flags &
7315                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7316                                         ++actions_n;
7317                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7318                                                 MLX5_FLOW_ACTION_MARK_EXT;
7319                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7320                                         modify_after_mirror = 1;
7321                         } else {
7322                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7323                                 ++actions_n;
7324                         }
7325                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7326                         break;
7327                 case RTE_FLOW_ACTION_TYPE_SET_META:
7328                         ret = flow_dv_validate_action_set_meta(dev, actions,
7329                                                                action_flags,
7330                                                                attr, error);
7331                         if (ret < 0)
7332                                 return ret;
7333                         /* Count all modify-header actions as one action. */
7334                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7335                                 ++actions_n;
7336                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7337                                 modify_after_mirror = 1;
7338                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7339                         rw_act_num += MLX5_ACT_NUM_SET_META;
7340                         break;
7341                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7342                         ret = flow_dv_validate_action_set_tag(dev, actions,
7343                                                               action_flags,
7344                                                               attr, error);
7345                         if (ret < 0)
7346                                 return ret;
7347                         /* Count all modify-header actions as one action. */
7348                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7349                                 ++actions_n;
7350                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7351                                 modify_after_mirror = 1;
7352                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7353                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7354                         break;
7355                 case RTE_FLOW_ACTION_TYPE_DROP:
7356                         ret = mlx5_flow_validate_action_drop(action_flags,
7357                                                              attr, error);
7358                         if (ret < 0)
7359                                 return ret;
7360                         action_flags |= MLX5_FLOW_ACTION_DROP;
7361                         ++actions_n;
7362                         break;
7363                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7364                         ret = mlx5_flow_validate_action_queue(actions,
7365                                                               action_flags, dev,
7366                                                               attr, error);
7367                         if (ret < 0)
7368                                 return ret;
7369                         queue_index = ((const struct rte_flow_action_queue *)
7370                                                         (actions->conf))->index;
7371                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7372                         ++actions_n;
7373                         break;
7374                 case RTE_FLOW_ACTION_TYPE_RSS:
7375                         rss = actions->conf;
7376                         ret = mlx5_flow_validate_action_rss(actions,
7377                                                             action_flags, dev,
7378                                                             attr, item_flags,
7379                                                             error);
7380                         if (ret < 0)
7381                                 return ret;
7382                         if (rss && sample_rss &&
7383                             (sample_rss->level != rss->level ||
7384                             sample_rss->types != rss->types))
7385                                 return rte_flow_error_set(error, ENOTSUP,
7386                                         RTE_FLOW_ERROR_TYPE_ACTION,
7387                                         NULL,
7388                                         "Can't use the different RSS types "
7389                                         "or level in the same flow");
7390                         if (rss != NULL && rss->queue_num)
7391                                 queue_index = rss->queue[0];
7392                         action_flags |= MLX5_FLOW_ACTION_RSS;
7393                         ++actions_n;
7394                         break;
7395                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7396                         ret =
7397                         mlx5_flow_validate_action_default_miss(action_flags,
7398                                         attr, error);
7399                         if (ret < 0)
7400                                 return ret;
7401                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7402                         ++actions_n;
7403                         break;
7404                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7405                         shared_count = true;
7406                         /* fall-through. */
7407                 case RTE_FLOW_ACTION_TYPE_COUNT:
7408                         ret = flow_dv_validate_action_count(dev, shared_count,
7409                                                             action_flags,
7410                                                             error);
7411                         if (ret < 0)
7412                                 return ret;
7413                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7414                         ++actions_n;
7415                         break;
7416                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7417                         if (flow_dv_validate_action_pop_vlan(dev,
7418                                                              action_flags,
7419                                                              actions,
7420                                                              item_flags, attr,
7421                                                              error))
7422                                 return -rte_errno;
7423                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7424                                 modify_after_mirror = 1;
7425                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7426                         ++actions_n;
7427                         break;
7428                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7429                         ret = flow_dv_validate_action_push_vlan(dev,
7430                                                                 action_flags,
7431                                                                 vlan_m,
7432                                                                 actions, attr,
7433                                                                 error);
7434                         if (ret < 0)
7435                                 return ret;
7436                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7437                                 modify_after_mirror = 1;
7438                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7439                         ++actions_n;
7440                         break;
7441                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7442                         ret = flow_dv_validate_action_set_vlan_pcp
7443                                                 (action_flags, actions, error);
7444                         if (ret < 0)
7445                                 return ret;
7446                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7447                                 modify_after_mirror = 1;
7448                         /* Count PCP with push_vlan command. */
7449                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7450                         break;
7451                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7452                         ret = flow_dv_validate_action_set_vlan_vid
7453                                                 (item_flags, action_flags,
7454                                                  actions, error);
7455                         if (ret < 0)
7456                                 return ret;
7457                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7458                                 modify_after_mirror = 1;
7459                         /* Count VID with push_vlan command. */
7460                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7461                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7462                         break;
7463                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7464                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7465                         ret = flow_dv_validate_action_l2_encap(dev,
7466                                                                action_flags,
7467                                                                actions, attr,
7468                                                                error);
7469                         if (ret < 0)
7470                                 return ret;
7471                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7472                         ++actions_n;
7473                         break;
7474                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7475                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7476                         ret = flow_dv_validate_action_decap(dev, action_flags,
7477                                                             actions, item_flags,
7478                                                             attr, error);
7479                         if (ret < 0)
7480                                 return ret;
7481                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7482                                 modify_after_mirror = 1;
7483                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7484                         ++actions_n;
7485                         break;
7486                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7487                         ret = flow_dv_validate_action_raw_encap_decap
7488                                 (dev, NULL, actions->conf, attr, &action_flags,
7489                                  &actions_n, actions, item_flags, error);
7490                         if (ret < 0)
7491                                 return ret;
7492                         break;
7493                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7494                         decap = actions->conf;
7495                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7496                                 ;
7497                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7498                                 encap = NULL;
7499                                 actions--;
7500                         } else {
7501                                 encap = actions->conf;
7502                         }
7503                         ret = flow_dv_validate_action_raw_encap_decap
7504                                            (dev,
7505                                             decap ? decap : &empty_decap, encap,
7506                                             attr, &action_flags, &actions_n,
7507                                             actions, item_flags, error);
7508                         if (ret < 0)
7509                                 return ret;
7510                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7511                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7512                                 modify_after_mirror = 1;
7513                         break;
7514                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7515                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7516                         ret = flow_dv_validate_action_modify_mac(action_flags,
7517                                                                  actions,
7518                                                                  item_flags,
7519                                                                  error);
7520                         if (ret < 0)
7521                                 return ret;
7522                         /* Count all modify-header actions as one action. */
7523                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7524                                 ++actions_n;
7525                         action_flags |= actions->type ==
7526                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7527                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7528                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7529                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7530                                 modify_after_mirror = 1;
7531                         /*
7532                          * Even if the source and destination MAC addresses have
7533                          * overlap in the header with 4B alignment, the convert
7534                          * function will handle them separately and 4 SW actions
7535                          * will be created. And 2 actions will be added each
7536                          * time no matter how many bytes of address will be set.
7537                          */
7538                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7539                         break;
7540                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7541                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7542                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7543                                                                   actions,
7544                                                                   item_flags,
7545                                                                   error);
7546                         if (ret < 0)
7547                                 return ret;
7548                         /* Count all modify-header actions as one action. */
7549                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7550                                 ++actions_n;
7551                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7552                                 modify_after_mirror = 1;
7553                         action_flags |= actions->type ==
7554                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7555                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7556                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7557                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7558                         break;
7559                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7560                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7561                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7562                                                                   actions,
7563                                                                   item_flags,
7564                                                                   error);
7565                         if (ret < 0)
7566                                 return ret;
7567                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7568                                 return rte_flow_error_set(error, ENOTSUP,
7569                                         RTE_FLOW_ERROR_TYPE_ACTION,
7570                                         actions,
7571                                         "Can't change header "
7572                                         "with ICMPv6 proto");
7573                         /* Count all modify-header actions as one action. */
7574                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7575                                 ++actions_n;
7576                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7577                                 modify_after_mirror = 1;
7578                         action_flags |= actions->type ==
7579                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7580                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7581                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7582                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7583                         break;
7584                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7585                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7586                         ret = flow_dv_validate_action_modify_tp(action_flags,
7587                                                                 actions,
7588                                                                 item_flags,
7589                                                                 error);
7590                         if (ret < 0)
7591                                 return ret;
7592                         /* Count all modify-header actions as one action. */
7593                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7594                                 ++actions_n;
7595                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7596                                 modify_after_mirror = 1;
7597                         action_flags |= actions->type ==
7598                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7599                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7600                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7601                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7602                         break;
7603                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7604                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7605                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7606                                                                  actions,
7607                                                                  item_flags,
7608                                                                  error);
7609                         if (ret < 0)
7610                                 return ret;
7611                         /* Count all modify-header actions as one action. */
7612                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7613                                 ++actions_n;
7614                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7615                                 modify_after_mirror = 1;
7616                         action_flags |= actions->type ==
7617                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7618                                                 MLX5_FLOW_ACTION_SET_TTL :
7619                                                 MLX5_FLOW_ACTION_DEC_TTL;
7620                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7621                         break;
7622                 case RTE_FLOW_ACTION_TYPE_JUMP:
7623                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7624                                                            action_flags,
7625                                                            attr, external,
7626                                                            error);
7627                         if (ret)
7628                                 return ret;
7629                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7630                             fdb_mirror_limit)
7631                                 return rte_flow_error_set(error, EINVAL,
7632                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7633                                                   NULL,
7634                                                   "sample and jump action combination is not supported");
7635                         ++actions_n;
7636                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7637                         break;
7638                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7639                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7640                         ret = flow_dv_validate_action_modify_tcp_seq
7641                                                                 (action_flags,
7642                                                                  actions,
7643                                                                  item_flags,
7644                                                                  error);
7645                         if (ret < 0)
7646                                 return ret;
7647                         /* Count all modify-header actions as one action. */
7648                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7649                                 ++actions_n;
7650                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7651                                 modify_after_mirror = 1;
7652                         action_flags |= actions->type ==
7653                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7654                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7655                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7656                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7657                         break;
7658                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7659                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7660                         ret = flow_dv_validate_action_modify_tcp_ack
7661                                                                 (action_flags,
7662                                                                  actions,
7663                                                                  item_flags,
7664                                                                  error);
7665                         if (ret < 0)
7666                                 return ret;
7667                         /* Count all modify-header actions as one action. */
7668                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7669                                 ++actions_n;
7670                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7671                                 modify_after_mirror = 1;
7672                         action_flags |= actions->type ==
7673                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7674                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7675                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7676                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7677                         break;
7678                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7679                         break;
7680                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7681                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7682                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7683                         break;
7684                 case RTE_FLOW_ACTION_TYPE_METER:
7685                         ret = mlx5_flow_validate_action_meter(dev,
7686                                                               action_flags,
7687                                                               actions, attr,
7688                                                               port_id_item,
7689                                                               &def_policy,
7690                                                               error);
7691                         if (ret < 0)
7692                                 return ret;
7693                         action_flags |= MLX5_FLOW_ACTION_METER;
7694                         if (!def_policy)
7695                                 action_flags |=
7696                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7697                         ++actions_n;
7698                         /* Meter action will add one more TAG action. */
7699                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7700                         break;
7701                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7702                         if (!attr->transfer && !attr->group)
7703                                 return rte_flow_error_set(error, ENOTSUP,
7704                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7705                                                                            NULL,
7706                           "Shared ASO age action is not supported for group 0");
7707                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7708                                 return rte_flow_error_set
7709                                                   (error, EINVAL,
7710                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7711                                                    NULL,
7712                                                    "duplicate age actions set");
7713                         action_flags |= MLX5_FLOW_ACTION_AGE;
7714                         ++actions_n;
7715                         break;
7716                 case RTE_FLOW_ACTION_TYPE_AGE:
7717                         ret = flow_dv_validate_action_age(action_flags,
7718                                                           actions, dev,
7719                                                           error);
7720                         if (ret < 0)
7721                                 return ret;
7722                         /*
7723                          * Validate the regular AGE action (using counter)
7724                          * mutual exclusion with share counter actions.
7725                          */
7726                         if (!priv->sh->flow_hit_aso_en) {
7727                                 if (shared_count)
7728                                         return rte_flow_error_set
7729                                                 (error, EINVAL,
7730                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7731                                                 NULL,
7732                                                 "old age and shared count combination is not supported");
7733                                 if (sample_count)
7734                                         return rte_flow_error_set
7735                                                 (error, EINVAL,
7736                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7737                                                 NULL,
7738                                                 "old age action and count must be in the same sub flow");
7739                         }
7740                         action_flags |= MLX5_FLOW_ACTION_AGE;
7741                         ++actions_n;
7742                         break;
7743                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7744                         ret = flow_dv_validate_action_modify_ipv4_dscp
7745                                                          (action_flags,
7746                                                           actions,
7747                                                           item_flags,
7748                                                           error);
7749                         if (ret < 0)
7750                                 return ret;
7751                         /* Count all modify-header actions as one action. */
7752                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7753                                 ++actions_n;
7754                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7755                                 modify_after_mirror = 1;
7756                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7757                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7758                         break;
7759                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7760                         ret = flow_dv_validate_action_modify_ipv6_dscp
7761                                                                 (action_flags,
7762                                                                  actions,
7763                                                                  item_flags,
7764                                                                  error);
7765                         if (ret < 0)
7766                                 return ret;
7767                         /* Count all modify-header actions as one action. */
7768                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7769                                 ++actions_n;
7770                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7771                                 modify_after_mirror = 1;
7772                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7773                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7774                         break;
7775                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7776                         ret = flow_dv_validate_action_sample(&action_flags,
7777                                                              actions, dev,
7778                                                              attr, item_flags,
7779                                                              rss, &sample_rss,
7780                                                              &sample_count,
7781                                                              &fdb_mirror_limit,
7782                                                              error);
7783                         if (ret < 0)
7784                                 return ret;
7785                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7786                         ++actions_n;
7787                         break;
7788                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7789                         ret = flow_dv_validate_action_modify_field(dev,
7790                                                                    action_flags,
7791                                                                    actions,
7792                                                                    attr,
7793                                                                    error);
7794                         if (ret < 0)
7795                                 return ret;
7796                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7797                                 modify_after_mirror = 1;
7798                         /* Count all modify-header actions as one action. */
7799                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7800                                 ++actions_n;
7801                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7802                         rw_act_num += ret;
7803                         break;
7804                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7805                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7806                                                              item_flags, attr,
7807                                                              error);
7808                         if (ret < 0)
7809                                 return ret;
7810                         action_flags |= MLX5_FLOW_ACTION_CT;
7811                         break;
7812                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7813                         /* tunnel offload action was processed before
7814                          * list it here as a supported type
7815                          */
7816                         break;
7817                 default:
7818                         return rte_flow_error_set(error, ENOTSUP,
7819                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7820                                                   actions,
7821                                                   "action not supported");
7822                 }
7823         }
7824         /*
7825          * Validate actions in flow rules
7826          * - Explicit decap action is prohibited by the tunnel offload API.
7827          * - Drop action in tunnel steer rule is prohibited by the API.
7828          * - Application cannot use MARK action because it's value can mask
7829          *   tunnel default miss nitification.
7830          * - JUMP in tunnel match rule has no support in current PMD
7831          *   implementation.
7832          * - TAG & META are reserved for future uses.
7833          */
7834         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7835                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7836                                             MLX5_FLOW_ACTION_MARK     |
7837                                             MLX5_FLOW_ACTION_SET_TAG  |
7838                                             MLX5_FLOW_ACTION_SET_META |
7839                                             MLX5_FLOW_ACTION_DROP;
7840
7841                 if (action_flags & bad_actions_mask)
7842                         return rte_flow_error_set
7843                                         (error, EINVAL,
7844                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7845                                         "Invalid RTE action in tunnel "
7846                                         "set decap rule");
7847                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7848                         return rte_flow_error_set
7849                                         (error, EINVAL,
7850                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7851                                         "tunnel set decap rule must terminate "
7852                                         "with JUMP");
7853                 if (!attr->ingress)
7854                         return rte_flow_error_set
7855                                         (error, EINVAL,
7856                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7857                                         "tunnel flows for ingress traffic only");
7858         }
7859         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7860                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7861                                             MLX5_FLOW_ACTION_MARK    |
7862                                             MLX5_FLOW_ACTION_SET_TAG |
7863                                             MLX5_FLOW_ACTION_SET_META;
7864
7865                 if (action_flags & bad_actions_mask)
7866                         return rte_flow_error_set
7867                                         (error, EINVAL,
7868                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7869                                         "Invalid RTE action in tunnel "
7870                                         "set match rule");
7871         }
7872         /*
7873          * Validate the drop action mutual exclusion with other actions.
7874          * Drop action is mutually-exclusive with any other action, except for
7875          * Count action.
7876          * Drop action compatibility with tunnel offload was already validated.
7877          */
7878         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7879                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7880         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7881             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7882                 return rte_flow_error_set(error, EINVAL,
7883                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7884                                           "Drop action is mutually-exclusive "
7885                                           "with any other action, except for "
7886                                           "Count action");
7887         /* Eswitch has few restrictions on using items and actions */
7888         if (attr->transfer) {
7889                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7890                     action_flags & MLX5_FLOW_ACTION_FLAG)
7891                         return rte_flow_error_set(error, ENOTSUP,
7892                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7893                                                   NULL,
7894                                                   "unsupported action FLAG");
7895                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7896                     action_flags & MLX5_FLOW_ACTION_MARK)
7897                         return rte_flow_error_set(error, ENOTSUP,
7898                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7899                                                   NULL,
7900                                                   "unsupported action MARK");
7901                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7902                         return rte_flow_error_set(error, ENOTSUP,
7903                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7904                                                   NULL,
7905                                                   "unsupported action QUEUE");
7906                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7907                         return rte_flow_error_set(error, ENOTSUP,
7908                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7909                                                   NULL,
7910                                                   "unsupported action RSS");
7911                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7912                         return rte_flow_error_set(error, EINVAL,
7913                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7914                                                   actions,
7915                                                   "no fate action is found");
7916         } else {
7917                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7918                         return rte_flow_error_set(error, EINVAL,
7919                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7920                                                   actions,
7921                                                   "no fate action is found");
7922         }
7923         /*
7924          * Continue validation for Xcap and VLAN actions.
7925          * If hairpin is working in explicit TX rule mode, there is no actions
7926          * splitting and the validation of hairpin ingress flow should be the
7927          * same as other standard flows.
7928          */
7929         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7930                              MLX5_FLOW_VLAN_ACTIONS)) &&
7931             (queue_index == 0xFFFF ||
7932              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7933              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7934              conf->tx_explicit != 0))) {
7935                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7936                     MLX5_FLOW_XCAP_ACTIONS)
7937                         return rte_flow_error_set(error, ENOTSUP,
7938                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7939                                                   NULL, "encap and decap "
7940                                                   "combination aren't supported");
7941                 if (!attr->transfer && attr->ingress) {
7942                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7943                                 return rte_flow_error_set
7944                                                 (error, ENOTSUP,
7945                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7946                                                  NULL, "encap is not supported"
7947                                                  " for ingress traffic");
7948                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7949                                 return rte_flow_error_set
7950                                                 (error, ENOTSUP,
7951                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7952                                                  NULL, "push VLAN action not "
7953                                                  "supported for ingress");
7954                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7955                                         MLX5_FLOW_VLAN_ACTIONS)
7956                                 return rte_flow_error_set
7957                                                 (error, ENOTSUP,
7958                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7959                                                  NULL, "no support for "
7960                                                  "multiple VLAN actions");
7961                 }
7962         }
7963         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7964                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7965                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7966                         attr->ingress)
7967                         return rte_flow_error_set
7968                                 (error, ENOTSUP,
7969                                 RTE_FLOW_ERROR_TYPE_ACTION,
7970                                 NULL, "fate action not supported for "
7971                                 "meter with policy");
7972                 if (attr->egress) {
7973                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7974                                 return rte_flow_error_set
7975                                         (error, ENOTSUP,
7976                                         RTE_FLOW_ERROR_TYPE_ACTION,
7977                                         NULL, "modify header action in egress "
7978                                         "cannot be done before meter action");
7979                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7980                                 return rte_flow_error_set
7981                                         (error, ENOTSUP,
7982                                         RTE_FLOW_ERROR_TYPE_ACTION,
7983                                         NULL, "encap action in egress "
7984                                         "cannot be done before meter action");
7985                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7986                                 return rte_flow_error_set
7987                                         (error, ENOTSUP,
7988                                         RTE_FLOW_ERROR_TYPE_ACTION,
7989                                         NULL, "push vlan action in egress "
7990                                         "cannot be done before meter action");
7991                 }
7992         }
7993         /*
7994          * Hairpin flow will add one more TAG action in TX implicit mode.
7995          * In TX explicit mode, there will be no hairpin flow ID.
7996          */
7997         if (hairpin > 0)
7998                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7999         /* extra metadata enabled: one more TAG action will be add. */
8000         if (dev_conf->dv_flow_en &&
8001             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8002             mlx5_flow_ext_mreg_supported(dev))
8003                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8004         if (rw_act_num >
8005                         flow_dv_modify_hdr_action_max(dev, is_root)) {
8006                 return rte_flow_error_set(error, ENOTSUP,
8007                                           RTE_FLOW_ERROR_TYPE_ACTION,
8008                                           NULL, "too many header modify"
8009                                           " actions to support");
8010         }
8011         /* Eswitch egress mirror and modify flow has limitation on CX5 */
8012         if (fdb_mirror_limit && modify_after_mirror)
8013                 return rte_flow_error_set(error, EINVAL,
8014                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8015                                 "sample before modify action is not supported");
8016         return 0;
8017 }
8018
8019 /**
8020  * Internal preparation function. Allocates the DV flow size,
8021  * this size is constant.
8022  *
8023  * @param[in] dev
8024  *   Pointer to the rte_eth_dev structure.
8025  * @param[in] attr
8026  *   Pointer to the flow attributes.
8027  * @param[in] items
8028  *   Pointer to the list of items.
8029  * @param[in] actions
8030  *   Pointer to the list of actions.
8031  * @param[out] error
8032  *   Pointer to the error structure.
8033  *
8034  * @return
8035  *   Pointer to mlx5_flow object on success,
8036  *   otherwise NULL and rte_errno is set.
8037  */
8038 static struct mlx5_flow *
8039 flow_dv_prepare(struct rte_eth_dev *dev,
8040                 const struct rte_flow_attr *attr __rte_unused,
8041                 const struct rte_flow_item items[] __rte_unused,
8042                 const struct rte_flow_action actions[] __rte_unused,
8043                 struct rte_flow_error *error)
8044 {
8045         uint32_t handle_idx = 0;
8046         struct mlx5_flow *dev_flow;
8047         struct mlx5_flow_handle *dev_handle;
8048         struct mlx5_priv *priv = dev->data->dev_private;
8049         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8050
8051         MLX5_ASSERT(wks);
8052         wks->skip_matcher_reg = 0;
8053         wks->policy = NULL;
8054         wks->final_policy = NULL;
8055         /* In case of corrupting the memory. */
8056         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8057                 rte_flow_error_set(error, ENOSPC,
8058                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8059                                    "not free temporary device flow");
8060                 return NULL;
8061         }
8062         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8063                                    &handle_idx);
8064         if (!dev_handle) {
8065                 rte_flow_error_set(error, ENOMEM,
8066                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8067                                    "not enough memory to create flow handle");
8068                 return NULL;
8069         }
8070         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8071         dev_flow = &wks->flows[wks->flow_idx++];
8072         memset(dev_flow, 0, sizeof(*dev_flow));
8073         dev_flow->handle = dev_handle;
8074         dev_flow->handle_idx = handle_idx;
8075         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8076         dev_flow->ingress = attr->ingress;
8077         dev_flow->dv.transfer = attr->transfer;
8078         return dev_flow;
8079 }
8080
8081 #ifdef RTE_LIBRTE_MLX5_DEBUG
8082 /**
8083  * Sanity check for match mask and value. Similar to check_valid_spec() in
8084  * kernel driver. If unmasked bit is present in value, it returns failure.
8085  *
8086  * @param match_mask
8087  *   pointer to match mask buffer.
8088  * @param match_value
8089  *   pointer to match value buffer.
8090  *
8091  * @return
8092  *   0 if valid, -EINVAL otherwise.
8093  */
8094 static int
8095 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8096 {
8097         uint8_t *m = match_mask;
8098         uint8_t *v = match_value;
8099         unsigned int i;
8100
8101         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8102                 if (v[i] & ~m[i]) {
8103                         DRV_LOG(ERR,
8104                                 "match_value differs from match_criteria"
8105                                 " %p[%u] != %p[%u]",
8106                                 match_value, i, match_mask, i);
8107                         return -EINVAL;
8108                 }
8109         }
8110         return 0;
8111 }
8112 #endif
8113
8114 /**
8115  * Add match of ip_version.
8116  *
8117  * @param[in] group
8118  *   Flow group.
8119  * @param[in] headers_v
8120  *   Values header pointer.
8121  * @param[in] headers_m
8122  *   Masks header pointer.
8123  * @param[in] ip_version
8124  *   The IP version to set.
8125  */
8126 static inline void
8127 flow_dv_set_match_ip_version(uint32_t group,
8128                              void *headers_v,
8129                              void *headers_m,
8130                              uint8_t ip_version)
8131 {
8132         if (group == 0)
8133                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8134         else
8135                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8136                          ip_version);
8137         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8138         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8139         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8140 }
8141
8142 /**
8143  * Add Ethernet item to matcher and to the value.
8144  *
8145  * @param[in, out] matcher
8146  *   Flow matcher.
8147  * @param[in, out] key
8148  *   Flow matcher value.
8149  * @param[in] item
8150  *   Flow pattern to translate.
8151  * @param[in] inner
8152  *   Item is inner pattern.
8153  */
8154 static void
8155 flow_dv_translate_item_eth(void *matcher, void *key,
8156                            const struct rte_flow_item *item, int inner,
8157                            uint32_t group)
8158 {
8159         const struct rte_flow_item_eth *eth_m = item->mask;
8160         const struct rte_flow_item_eth *eth_v = item->spec;
8161         const struct rte_flow_item_eth nic_mask = {
8162                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8163                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8164                 .type = RTE_BE16(0xffff),
8165                 .has_vlan = 0,
8166         };
8167         void *hdrs_m;
8168         void *hdrs_v;
8169         char *l24_v;
8170         unsigned int i;
8171
8172         if (!eth_v)
8173                 return;
8174         if (!eth_m)
8175                 eth_m = &nic_mask;
8176         if (inner) {
8177                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8178                                          inner_headers);
8179                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8180         } else {
8181                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8182                                          outer_headers);
8183                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8184         }
8185         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8186                &eth_m->dst, sizeof(eth_m->dst));
8187         /* The value must be in the range of the mask. */
8188         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8189         for (i = 0; i < sizeof(eth_m->dst); ++i)
8190                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8191         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8192                &eth_m->src, sizeof(eth_m->src));
8193         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8194         /* The value must be in the range of the mask. */
8195         for (i = 0; i < sizeof(eth_m->dst); ++i)
8196                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8197         /*
8198          * HW supports match on one Ethertype, the Ethertype following the last
8199          * VLAN tag of the packet (see PRM).
8200          * Set match on ethertype only if ETH header is not followed by VLAN.
8201          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8202          * ethertype, and use ip_version field instead.
8203          * eCPRI over Ether layer will use type value 0xAEFE.
8204          */
8205         if (eth_m->type == 0xFFFF) {
8206                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8207                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8208                 switch (eth_v->type) {
8209                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8210                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8211                         return;
8212                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8213                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8214                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8215                         return;
8216                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8217                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8218                         return;
8219                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8220                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8221                         return;
8222                 default:
8223                         break;
8224                 }
8225         }
8226         if (eth_m->has_vlan) {
8227                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8228                 if (eth_v->has_vlan) {
8229                         /*
8230                          * Here, when also has_more_vlan field in VLAN item is
8231                          * not set, only single-tagged packets will be matched.
8232                          */
8233                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8234                         return;
8235                 }
8236         }
8237         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8238                  rte_be_to_cpu_16(eth_m->type));
8239         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8240         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8241 }
8242
8243 /**
8244  * Add VLAN item to matcher and to the value.
8245  *
8246  * @param[in, out] dev_flow
8247  *   Flow descriptor.
8248  * @param[in, out] matcher
8249  *   Flow matcher.
8250  * @param[in, out] key
8251  *   Flow matcher value.
8252  * @param[in] item
8253  *   Flow pattern to translate.
8254  * @param[in] inner
8255  *   Item is inner pattern.
8256  */
8257 static void
8258 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8259                             void *matcher, void *key,
8260                             const struct rte_flow_item *item,
8261                             int inner, uint32_t group)
8262 {
8263         const struct rte_flow_item_vlan *vlan_m = item->mask;
8264         const struct rte_flow_item_vlan *vlan_v = item->spec;
8265         void *hdrs_m;
8266         void *hdrs_v;
8267         uint16_t tci_m;
8268         uint16_t tci_v;
8269
8270         if (inner) {
8271                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8272                                          inner_headers);
8273                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8274         } else {
8275                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8276                                          outer_headers);
8277                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8278                 /*
8279                  * This is workaround, masks are not supported,
8280                  * and pre-validated.
8281                  */
8282                 if (vlan_v)
8283                         dev_flow->handle->vf_vlan.tag =
8284                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8285         }
8286         /*
8287          * When VLAN item exists in flow, mark packet as tagged,
8288          * even if TCI is not specified.
8289          */
8290         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8291                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8292                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8293         }
8294         if (!vlan_v)
8295                 return;
8296         if (!vlan_m)
8297                 vlan_m = &rte_flow_item_vlan_mask;
8298         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8299         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8300         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8301         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8302         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8303         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8304         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8305         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8306         /*
8307          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8308          * ethertype, and use ip_version field instead.
8309          */
8310         if (vlan_m->inner_type == 0xFFFF) {
8311                 switch (vlan_v->inner_type) {
8312                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8313                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8314                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8315                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8316                         return;
8317                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8318                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8319                         return;
8320                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8321                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8322                         return;
8323                 default:
8324                         break;
8325                 }
8326         }
8327         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8328                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8329                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8330                 /* Only one vlan_tag bit can be set. */
8331                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8332                 return;
8333         }
8334         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8335                  rte_be_to_cpu_16(vlan_m->inner_type));
8336         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8337                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8338 }
8339
8340 /**
8341  * Add IPV4 item to matcher and to the value.
8342  *
8343  * @param[in, out] matcher
8344  *   Flow matcher.
8345  * @param[in, out] key
8346  *   Flow matcher value.
8347  * @param[in] item
8348  *   Flow pattern to translate.
8349  * @param[in] inner
8350  *   Item is inner pattern.
8351  * @param[in] group
8352  *   The group to insert the rule.
8353  */
8354 static void
8355 flow_dv_translate_item_ipv4(void *matcher, void *key,
8356                             const struct rte_flow_item *item,
8357                             int inner, uint32_t group)
8358 {
8359         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8360         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8361         const struct rte_flow_item_ipv4 nic_mask = {
8362                 .hdr = {
8363                         .src_addr = RTE_BE32(0xffffffff),
8364                         .dst_addr = RTE_BE32(0xffffffff),
8365                         .type_of_service = 0xff,
8366                         .next_proto_id = 0xff,
8367                         .time_to_live = 0xff,
8368                 },
8369         };
8370         void *headers_m;
8371         void *headers_v;
8372         char *l24_m;
8373         char *l24_v;
8374         uint8_t tos, ihl_m, ihl_v;
8375
8376         if (inner) {
8377                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8378                                          inner_headers);
8379                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8380         } else {
8381                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8382                                          outer_headers);
8383                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8384         }
8385         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8386         if (!ipv4_v)
8387                 return;
8388         if (!ipv4_m)
8389                 ipv4_m = &nic_mask;
8390         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8391                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8392         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8393                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8394         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8395         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8396         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8397                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8398         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8399                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8400         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8401         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8402         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8403         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8404         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8405         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8406         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8407         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8408                  ipv4_m->hdr.type_of_service);
8409         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8410         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8411                  ipv4_m->hdr.type_of_service >> 2);
8412         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8413         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8414                  ipv4_m->hdr.next_proto_id);
8415         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8416                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8417         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8418                  ipv4_m->hdr.time_to_live);
8419         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8420                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8421         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8422                  !!(ipv4_m->hdr.fragment_offset));
8423         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8424                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8425 }
8426
8427 /**
8428  * Add IPV6 item to matcher and to the value.
8429  *
8430  * @param[in, out] matcher
8431  *   Flow matcher.
8432  * @param[in, out] key
8433  *   Flow matcher value.
8434  * @param[in] item
8435  *   Flow pattern to translate.
8436  * @param[in] inner
8437  *   Item is inner pattern.
8438  * @param[in] group
8439  *   The group to insert the rule.
8440  */
8441 static void
8442 flow_dv_translate_item_ipv6(void *matcher, void *key,
8443                             const struct rte_flow_item *item,
8444                             int inner, uint32_t group)
8445 {
8446         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8447         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8448         const struct rte_flow_item_ipv6 nic_mask = {
8449                 .hdr = {
8450                         .src_addr =
8451                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8452                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8453                         .dst_addr =
8454                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8455                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8456                         .vtc_flow = RTE_BE32(0xffffffff),
8457                         .proto = 0xff,
8458                         .hop_limits = 0xff,
8459                 },
8460         };
8461         void *headers_m;
8462         void *headers_v;
8463         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8464         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8465         char *l24_m;
8466         char *l24_v;
8467         uint32_t vtc_m;
8468         uint32_t vtc_v;
8469         int i;
8470         int size;
8471
8472         if (inner) {
8473                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8474                                          inner_headers);
8475                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8476         } else {
8477                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8478                                          outer_headers);
8479                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8480         }
8481         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8482         if (!ipv6_v)
8483                 return;
8484         if (!ipv6_m)
8485                 ipv6_m = &nic_mask;
8486         size = sizeof(ipv6_m->hdr.dst_addr);
8487         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8488                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8489         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8490                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8491         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8492         for (i = 0; i < size; ++i)
8493                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8494         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8495                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8496         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8497                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8498         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8499         for (i = 0; i < size; ++i)
8500                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8501         /* TOS. */
8502         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8503         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8504         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8505         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8506         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8507         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8508         /* Label. */
8509         if (inner) {
8510                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8511                          vtc_m);
8512                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8513                          vtc_v);
8514         } else {
8515                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8516                          vtc_m);
8517                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8518                          vtc_v);
8519         }
8520         /* Protocol. */
8521         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8522                  ipv6_m->hdr.proto);
8523         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8524                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8525         /* Hop limit. */
8526         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8527                  ipv6_m->hdr.hop_limits);
8528         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8529                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8530         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8531                  !!(ipv6_m->has_frag_ext));
8532         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8533                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8534 }
8535
8536 /**
8537  * Add IPV6 fragment extension item to matcher and to the value.
8538  *
8539  * @param[in, out] matcher
8540  *   Flow matcher.
8541  * @param[in, out] key
8542  *   Flow matcher value.
8543  * @param[in] item
8544  *   Flow pattern to translate.
8545  * @param[in] inner
8546  *   Item is inner pattern.
8547  */
8548 static void
8549 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8550                                      const struct rte_flow_item *item,
8551                                      int inner)
8552 {
8553         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8554         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8555         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8556                 .hdr = {
8557                         .next_header = 0xff,
8558                         .frag_data = RTE_BE16(0xffff),
8559                 },
8560         };
8561         void *headers_m;
8562         void *headers_v;
8563
8564         if (inner) {
8565                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8566                                          inner_headers);
8567                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8568         } else {
8569                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8570                                          outer_headers);
8571                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8572         }
8573         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8574         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8575         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8576         if (!ipv6_frag_ext_v)
8577                 return;
8578         if (!ipv6_frag_ext_m)
8579                 ipv6_frag_ext_m = &nic_mask;
8580         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8581                  ipv6_frag_ext_m->hdr.next_header);
8582         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8583                  ipv6_frag_ext_v->hdr.next_header &
8584                  ipv6_frag_ext_m->hdr.next_header);
8585 }
8586
8587 /**
8588  * Add TCP item to matcher and to the value.
8589  *
8590  * @param[in, out] matcher
8591  *   Flow matcher.
8592  * @param[in, out] key
8593  *   Flow matcher value.
8594  * @param[in] item
8595  *   Flow pattern to translate.
8596  * @param[in] inner
8597  *   Item is inner pattern.
8598  */
8599 static void
8600 flow_dv_translate_item_tcp(void *matcher, void *key,
8601                            const struct rte_flow_item *item,
8602                            int inner)
8603 {
8604         const struct rte_flow_item_tcp *tcp_m = item->mask;
8605         const struct rte_flow_item_tcp *tcp_v = item->spec;
8606         void *headers_m;
8607         void *headers_v;
8608
8609         if (inner) {
8610                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8611                                          inner_headers);
8612                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8613         } else {
8614                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8615                                          outer_headers);
8616                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8617         }
8618         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8619         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8620         if (!tcp_v)
8621                 return;
8622         if (!tcp_m)
8623                 tcp_m = &rte_flow_item_tcp_mask;
8624         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8625                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8626         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8627                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8628         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8629                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8630         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8631                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8632         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8633                  tcp_m->hdr.tcp_flags);
8634         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8635                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8636 }
8637
8638 /**
8639  * Add UDP item to matcher and to the value.
8640  *
8641  * @param[in, out] matcher
8642  *   Flow matcher.
8643  * @param[in, out] key
8644  *   Flow matcher value.
8645  * @param[in] item
8646  *   Flow pattern to translate.
8647  * @param[in] inner
8648  *   Item is inner pattern.
8649  */
8650 static void
8651 flow_dv_translate_item_udp(void *matcher, void *key,
8652                            const struct rte_flow_item *item,
8653                            int inner)
8654 {
8655         const struct rte_flow_item_udp *udp_m = item->mask;
8656         const struct rte_flow_item_udp *udp_v = item->spec;
8657         void *headers_m;
8658         void *headers_v;
8659
8660         if (inner) {
8661                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8662                                          inner_headers);
8663                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8664         } else {
8665                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8666                                          outer_headers);
8667                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8668         }
8669         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8670         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8671         if (!udp_v)
8672                 return;
8673         if (!udp_m)
8674                 udp_m = &rte_flow_item_udp_mask;
8675         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8676                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8677         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8678                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8679         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8680                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8681         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8682                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8683 }
8684
8685 /**
8686  * Add GRE optional Key item to matcher and to the value.
8687  *
8688  * @param[in, out] matcher
8689  *   Flow matcher.
8690  * @param[in, out] key
8691  *   Flow matcher value.
8692  * @param[in] item
8693  *   Flow pattern to translate.
8694  * @param[in] inner
8695  *   Item is inner pattern.
8696  */
8697 static void
8698 flow_dv_translate_item_gre_key(void *matcher, void *key,
8699                                    const struct rte_flow_item *item)
8700 {
8701         const rte_be32_t *key_m = item->mask;
8702         const rte_be32_t *key_v = item->spec;
8703         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8704         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8705         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8706
8707         /* GRE K bit must be on and should already be validated */
8708         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8709         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8710         if (!key_v)
8711                 return;
8712         if (!key_m)
8713                 key_m = &gre_key_default_mask;
8714         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8715                  rte_be_to_cpu_32(*key_m) >> 8);
8716         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8717                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8718         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8719                  rte_be_to_cpu_32(*key_m) & 0xFF);
8720         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8721                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8722 }
8723
8724 /**
8725  * Add GRE item to matcher and to the value.
8726  *
8727  * @param[in, out] matcher
8728  *   Flow matcher.
8729  * @param[in, out] key
8730  *   Flow matcher value.
8731  * @param[in] item
8732  *   Flow pattern to translate.
8733  * @param[in] inner
8734  *   Item is inner pattern.
8735  */
8736 static void
8737 flow_dv_translate_item_gre(void *matcher, void *key,
8738                            const struct rte_flow_item *item,
8739                            int inner)
8740 {
8741         const struct rte_flow_item_gre *gre_m = item->mask;
8742         const struct rte_flow_item_gre *gre_v = item->spec;
8743         void *headers_m;
8744         void *headers_v;
8745         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8746         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8747         struct {
8748                 union {
8749                         __extension__
8750                         struct {
8751                                 uint16_t version:3;
8752                                 uint16_t rsvd0:9;
8753                                 uint16_t s_present:1;
8754                                 uint16_t k_present:1;
8755                                 uint16_t rsvd_bit1:1;
8756                                 uint16_t c_present:1;
8757                         };
8758                         uint16_t value;
8759                 };
8760         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8761
8762         if (inner) {
8763                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8764                                          inner_headers);
8765                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8766         } else {
8767                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8768                                          outer_headers);
8769                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8770         }
8771         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8772         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8773         if (!gre_v)
8774                 return;
8775         if (!gre_m)
8776                 gre_m = &rte_flow_item_gre_mask;
8777         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8778                  rte_be_to_cpu_16(gre_m->protocol));
8779         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8780                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8781         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8782         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8783         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8784                  gre_crks_rsvd0_ver_m.c_present);
8785         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8786                  gre_crks_rsvd0_ver_v.c_present &
8787                  gre_crks_rsvd0_ver_m.c_present);
8788         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8789                  gre_crks_rsvd0_ver_m.k_present);
8790         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8791                  gre_crks_rsvd0_ver_v.k_present &
8792                  gre_crks_rsvd0_ver_m.k_present);
8793         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8794                  gre_crks_rsvd0_ver_m.s_present);
8795         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8796                  gre_crks_rsvd0_ver_v.s_present &
8797                  gre_crks_rsvd0_ver_m.s_present);
8798 }
8799
8800 /**
8801  * Add NVGRE item to matcher and to the value.
8802  *
8803  * @param[in, out] matcher
8804  *   Flow matcher.
8805  * @param[in, out] key
8806  *   Flow matcher value.
8807  * @param[in] item
8808  *   Flow pattern to translate.
8809  * @param[in] inner
8810  *   Item is inner pattern.
8811  */
8812 static void
8813 flow_dv_translate_item_nvgre(void *matcher, void *key,
8814                              const struct rte_flow_item *item,
8815                              int inner)
8816 {
8817         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8818         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8819         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8820         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8821         const char *tni_flow_id_m;
8822         const char *tni_flow_id_v;
8823         char *gre_key_m;
8824         char *gre_key_v;
8825         int size;
8826         int i;
8827
8828         /* For NVGRE, GRE header fields must be set with defined values. */
8829         const struct rte_flow_item_gre gre_spec = {
8830                 .c_rsvd0_ver = RTE_BE16(0x2000),
8831                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8832         };
8833         const struct rte_flow_item_gre gre_mask = {
8834                 .c_rsvd0_ver = RTE_BE16(0xB000),
8835                 .protocol = RTE_BE16(UINT16_MAX),
8836         };
8837         const struct rte_flow_item gre_item = {
8838                 .spec = &gre_spec,
8839                 .mask = &gre_mask,
8840                 .last = NULL,
8841         };
8842         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8843         if (!nvgre_v)
8844                 return;
8845         if (!nvgre_m)
8846                 nvgre_m = &rte_flow_item_nvgre_mask;
8847         tni_flow_id_m = (const char *)nvgre_m->tni;
8848         tni_flow_id_v = (const char *)nvgre_v->tni;
8849         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8850         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8851         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8852         memcpy(gre_key_m, tni_flow_id_m, size);
8853         for (i = 0; i < size; ++i)
8854                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8855 }
8856
8857 /**
8858  * Add VXLAN item to matcher and to the value.
8859  *
8860  * @param[in] dev
8861  *   Pointer to the Ethernet device structure.
8862  * @param[in] attr
8863  *   Flow rule attributes.
8864  * @param[in, out] matcher
8865  *   Flow matcher.
8866  * @param[in, out] key
8867  *   Flow matcher value.
8868  * @param[in] item
8869  *   Flow pattern to translate.
8870  * @param[in] inner
8871  *   Item is inner pattern.
8872  */
8873 static void
8874 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8875                              const struct rte_flow_attr *attr,
8876                              void *matcher, void *key,
8877                              const struct rte_flow_item *item,
8878                              int inner)
8879 {
8880         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8881         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8882         void *headers_m;
8883         void *headers_v;
8884         void *misc5_m;
8885         void *misc5_v;
8886         uint32_t *tunnel_header_v;
8887         uint32_t *tunnel_header_m;
8888         uint16_t dport;
8889         struct mlx5_priv *priv = dev->data->dev_private;
8890         const struct rte_flow_item_vxlan nic_mask = {
8891                 .vni = "\xff\xff\xff",
8892                 .rsvd1 = 0xff,
8893         };
8894
8895         if (inner) {
8896                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8897                                          inner_headers);
8898                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8899         } else {
8900                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8901                                          outer_headers);
8902                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8903         }
8904         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8905                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8906         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8907                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8908                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8909         }
8910         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8911         if (!vxlan_v)
8912                 return;
8913         if (!vxlan_m) {
8914                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8915                     (attr->group && !priv->sh->misc5_cap))
8916                         vxlan_m = &rte_flow_item_vxlan_mask;
8917                 else
8918                         vxlan_m = &nic_mask;
8919         }
8920         if ((priv->sh->steering_format_version ==
8921             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8922             dport != MLX5_UDP_PORT_VXLAN) ||
8923             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8924             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8925                 void *misc_m;
8926                 void *misc_v;
8927                 char *vni_m;
8928                 char *vni_v;
8929                 int size;
8930                 int i;
8931                 misc_m = MLX5_ADDR_OF(fte_match_param,
8932                                       matcher, misc_parameters);
8933                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8934                 size = sizeof(vxlan_m->vni);
8935                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8936                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8937                 memcpy(vni_m, vxlan_m->vni, size);
8938                 for (i = 0; i < size; ++i)
8939                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8940                 return;
8941         }
8942         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8943         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8944         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8945                                                    misc5_v,
8946                                                    tunnel_header_1);
8947         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8948                                                    misc5_m,
8949                                                    tunnel_header_1);
8950         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8951                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8952                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8953         if (*tunnel_header_v)
8954                 *tunnel_header_m = vxlan_m->vni[0] |
8955                         vxlan_m->vni[1] << 8 |
8956                         vxlan_m->vni[2] << 16;
8957         else
8958                 *tunnel_header_m = 0x0;
8959         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8960         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8961                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8962 }
8963
8964 /**
8965  * Add VXLAN-GPE item to matcher and to the value.
8966  *
8967  * @param[in, out] matcher
8968  *   Flow matcher.
8969  * @param[in, out] key
8970  *   Flow matcher value.
8971  * @param[in] item
8972  *   Flow pattern to translate.
8973  * @param[in] inner
8974  *   Item is inner pattern.
8975  */
8976
8977 static void
8978 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8979                                  const struct rte_flow_item *item,
8980                                  const uint64_t pattern_flags)
8981 {
8982         static const struct rte_flow_item_vxlan_gpe dummy_vxlan_gpe_hdr = {0, };
8983         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8984         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8985         /* The item was validated to be on the outer side */
8986         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8987         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8988         void *misc_m =
8989                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8990         void *misc_v =
8991                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8992         char *vni_m =
8993                 MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8994         char *vni_v =
8995                 MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8996         int i, size = sizeof(vxlan_m->vni);
8997         uint8_t flags_m = 0xff;
8998         uint8_t flags_v = 0xc;
8999         uint8_t m_protocol, v_protocol;
9000
9001         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9002                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9003                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9004                          MLX5_UDP_PORT_VXLAN_GPE);
9005         }
9006         if (!vxlan_v) {
9007                 vxlan_v = &dummy_vxlan_gpe_hdr;
9008                 vxlan_m = &dummy_vxlan_gpe_hdr;
9009         } else {
9010                 if (!vxlan_m)
9011                         vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9012         }
9013         memcpy(vni_m, vxlan_m->vni, size);
9014         for (i = 0; i < size; ++i)
9015                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9016         if (vxlan_m->flags) {
9017                 flags_m = vxlan_m->flags;
9018                 flags_v = vxlan_v->flags;
9019         }
9020         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9021         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9022         m_protocol = vxlan_m->protocol;
9023         v_protocol = vxlan_v->protocol;
9024         if (!m_protocol) {
9025                 m_protocol = 0xff;
9026                 /* Force next protocol to ensure next headers parsing. */
9027                 if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
9028                         v_protocol = RTE_VXLAN_GPE_TYPE_ETH;
9029                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
9030                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV4;
9031                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
9032                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV6;
9033         }
9034         MLX5_SET(fte_match_set_misc3, misc_m,
9035                  outer_vxlan_gpe_next_protocol, m_protocol);
9036         MLX5_SET(fte_match_set_misc3, misc_v,
9037                  outer_vxlan_gpe_next_protocol, m_protocol & v_protocol);
9038 }
9039
9040 /**
9041  * Add Geneve item to matcher and to the value.
9042  *
9043  * @param[in, out] matcher
9044  *   Flow matcher.
9045  * @param[in, out] key
9046  *   Flow matcher value.
9047  * @param[in] item
9048  *   Flow pattern to translate.
9049  * @param[in] inner
9050  *   Item is inner pattern.
9051  */
9052
9053 static void
9054 flow_dv_translate_item_geneve(void *matcher, void *key,
9055                               const struct rte_flow_item *item,
9056                               uint64_t pattern_flags)
9057 {
9058         static const struct rte_flow_item_geneve empty_geneve = {0,};
9059         const struct rte_flow_item_geneve *geneve_m = item->mask;
9060         const struct rte_flow_item_geneve *geneve_v = item->spec;
9061         /* GENEVE flow item validation allows single tunnel item */
9062         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9063         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9064         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9065         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9066         uint16_t gbhdr_m;
9067         uint16_t gbhdr_v;
9068         char *vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9069         char *vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9070         size_t size = sizeof(geneve_m->vni), i;
9071         uint16_t protocol_m, protocol_v;
9072
9073         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9074                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9075                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9076                          MLX5_UDP_PORT_GENEVE);
9077         }
9078         if (!geneve_v) {
9079                 geneve_v = &empty_geneve;
9080                 geneve_m = &empty_geneve;
9081         } else {
9082                 if (!geneve_m)
9083                         geneve_m = &rte_flow_item_geneve_mask;
9084         }
9085         memcpy(vni_m, geneve_m->vni, size);
9086         for (i = 0; i < size; ++i)
9087                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9088         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9089         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9090         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9091                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9092         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9093                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9094         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9095                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9096         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9097                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9098                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9099         protocol_m = rte_be_to_cpu_16(geneve_m->protocol);
9100         protocol_v = rte_be_to_cpu_16(geneve_v->protocol);
9101         if (!protocol_m) {
9102                 /* Force next protocol to prevent matchers duplication */
9103                 protocol_m = 0xFFFF;
9104                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
9105         }
9106         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);
9107         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9108                  protocol_m & protocol_v);
9109 }
9110
9111 /**
9112  * Create Geneve TLV option resource.
9113  *
9114  * @param dev[in, out]
9115  *   Pointer to rte_eth_dev structure.
9116  * @param[in, out] tag_be24
9117  *   Tag value in big endian then R-shift 8.
9118  * @parm[in, out] dev_flow
9119  *   Pointer to the dev_flow.
9120  * @param[out] error
9121  *   pointer to error structure.
9122  *
9123  * @return
9124  *   0 on success otherwise -errno and errno is set.
9125  */
9126
9127 int
9128 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9129                                              const struct rte_flow_item *item,
9130                                              struct rte_flow_error *error)
9131 {
9132         struct mlx5_priv *priv = dev->data->dev_private;
9133         struct mlx5_dev_ctx_shared *sh = priv->sh;
9134         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9135                         sh->geneve_tlv_option_resource;
9136         struct mlx5_devx_obj *obj;
9137         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9138         int ret = 0;
9139
9140         if (!geneve_opt_v)
9141                 return -1;
9142         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9143         if (geneve_opt_resource != NULL) {
9144                 if (geneve_opt_resource->option_class ==
9145                         geneve_opt_v->option_class &&
9146                         geneve_opt_resource->option_type ==
9147                         geneve_opt_v->option_type &&
9148                         geneve_opt_resource->length ==
9149                         geneve_opt_v->option_len) {
9150                         /* We already have GENVE TLV option obj allocated. */
9151                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9152                                            __ATOMIC_RELAXED);
9153                 } else {
9154                         ret = rte_flow_error_set(error, ENOMEM,
9155                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9156                                 "Only one GENEVE TLV option supported");
9157                         goto exit;
9158                 }
9159         } else {
9160                 /* Create a GENEVE TLV object and resource. */
9161                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9162                                 geneve_opt_v->option_class,
9163                                 geneve_opt_v->option_type,
9164                                 geneve_opt_v->option_len);
9165                 if (!obj) {
9166                         ret = rte_flow_error_set(error, ENODATA,
9167                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9168                                 "Failed to create GENEVE TLV Devx object");
9169                         goto exit;
9170                 }
9171                 sh->geneve_tlv_option_resource =
9172                                 mlx5_malloc(MLX5_MEM_ZERO,
9173                                                 sizeof(*geneve_opt_resource),
9174                                                 0, SOCKET_ID_ANY);
9175                 if (!sh->geneve_tlv_option_resource) {
9176                         claim_zero(mlx5_devx_cmd_destroy(obj));
9177                         ret = rte_flow_error_set(error, ENOMEM,
9178                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9179                                 "GENEVE TLV object memory allocation failed");
9180                         goto exit;
9181                 }
9182                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9183                 geneve_opt_resource->obj = obj;
9184                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9185                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9186                 geneve_opt_resource->length = geneve_opt_v->option_len;
9187                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9188                                 __ATOMIC_RELAXED);
9189         }
9190 exit:
9191         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9192         return ret;
9193 }
9194
9195 /**
9196  * Add Geneve TLV option item to matcher.
9197  *
9198  * @param[in, out] dev
9199  *   Pointer to rte_eth_dev structure.
9200  * @param[in, out] matcher
9201  *   Flow matcher.
9202  * @param[in, out] key
9203  *   Flow matcher value.
9204  * @param[in] item
9205  *   Flow pattern to translate.
9206  * @param[out] error
9207  *   Pointer to error structure.
9208  */
9209 static int
9210 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9211                                   void *key, const struct rte_flow_item *item,
9212                                   struct rte_flow_error *error)
9213 {
9214         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9215         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9216         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9217         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9218         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9219                         misc_parameters_3);
9220         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9221         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9222         int ret = 0;
9223
9224         if (!geneve_opt_v)
9225                 return -1;
9226         if (!geneve_opt_m)
9227                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9228         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9229                                                            error);
9230         if (ret) {
9231                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9232                 return ret;
9233         }
9234         /*
9235          * Set the option length in GENEVE header if not requested.
9236          * The GENEVE TLV option length is expressed by the option length field
9237          * in the GENEVE header.
9238          * If the option length was not requested but the GENEVE TLV option item
9239          * is present we set the option length field implicitly.
9240          */
9241         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9242                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9243                          MLX5_GENEVE_OPTLEN_MASK);
9244                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9245                          geneve_opt_v->option_len + 1);
9246         }
9247         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9248         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9249         /* Set the data. */
9250         if (geneve_opt_v->data) {
9251                 memcpy(&opt_data_key, geneve_opt_v->data,
9252                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9253                                 sizeof(opt_data_key)));
9254                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9255                                 sizeof(opt_data_key));
9256                 memcpy(&opt_data_mask, geneve_opt_m->data,
9257                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9258                                 sizeof(opt_data_mask)));
9259                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9260                                 sizeof(opt_data_mask));
9261                 MLX5_SET(fte_match_set_misc3, misc3_m,
9262                                 geneve_tlv_option_0_data,
9263                                 rte_be_to_cpu_32(opt_data_mask));
9264                 MLX5_SET(fte_match_set_misc3, misc3_v,
9265                                 geneve_tlv_option_0_data,
9266                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9267         }
9268         return ret;
9269 }
9270
9271 /**
9272  * Add MPLS item to matcher and to the value.
9273  *
9274  * @param[in, out] matcher
9275  *   Flow matcher.
9276  * @param[in, out] key
9277  *   Flow matcher value.
9278  * @param[in] item
9279  *   Flow pattern to translate.
9280  * @param[in] prev_layer
9281  *   The protocol layer indicated in previous item.
9282  * @param[in] inner
9283  *   Item is inner pattern.
9284  */
9285 static void
9286 flow_dv_translate_item_mpls(void *matcher, void *key,
9287                             const struct rte_flow_item *item,
9288                             uint64_t prev_layer,
9289                             int inner)
9290 {
9291         const uint32_t *in_mpls_m = item->mask;
9292         const uint32_t *in_mpls_v = item->spec;
9293         uint32_t *out_mpls_m = 0;
9294         uint32_t *out_mpls_v = 0;
9295         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9296         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9297         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9298                                      misc_parameters_2);
9299         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9300         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9301         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9302
9303         switch (prev_layer) {
9304         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9305                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9306                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9307                          MLX5_UDP_PORT_MPLS);
9308                 break;
9309         case MLX5_FLOW_LAYER_GRE:
9310                 /* Fall-through. */
9311         case MLX5_FLOW_LAYER_GRE_KEY:
9312                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9313                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9314                          RTE_ETHER_TYPE_MPLS);
9315                 break;
9316         default:
9317                 break;
9318         }
9319         if (!in_mpls_v)
9320                 return;
9321         if (!in_mpls_m)
9322                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9323         switch (prev_layer) {
9324         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9325                 out_mpls_m =
9326                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9327                                                  outer_first_mpls_over_udp);
9328                 out_mpls_v =
9329                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9330                                                  outer_first_mpls_over_udp);
9331                 break;
9332         case MLX5_FLOW_LAYER_GRE:
9333                 out_mpls_m =
9334                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9335                                                  outer_first_mpls_over_gre);
9336                 out_mpls_v =
9337                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9338                                                  outer_first_mpls_over_gre);
9339                 break;
9340         default:
9341                 /* Inner MPLS not over GRE is not supported. */
9342                 if (!inner) {
9343                         out_mpls_m =
9344                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9345                                                          misc2_m,
9346                                                          outer_first_mpls);
9347                         out_mpls_v =
9348                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9349                                                          misc2_v,
9350                                                          outer_first_mpls);
9351                 }
9352                 break;
9353         }
9354         if (out_mpls_m && out_mpls_v) {
9355                 *out_mpls_m = *in_mpls_m;
9356                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9357         }
9358 }
9359
9360 /**
9361  * Add metadata register item to matcher
9362  *
9363  * @param[in, out] matcher
9364  *   Flow matcher.
9365  * @param[in, out] key
9366  *   Flow matcher value.
9367  * @param[in] reg_type
9368  *   Type of device metadata register
9369  * @param[in] value
9370  *   Register value
9371  * @param[in] mask
9372  *   Register mask
9373  */
9374 static void
9375 flow_dv_match_meta_reg(void *matcher, void *key,
9376                        enum modify_reg reg_type,
9377                        uint32_t data, uint32_t mask)
9378 {
9379         void *misc2_m =
9380                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9381         void *misc2_v =
9382                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9383         uint32_t temp;
9384
9385         data &= mask;
9386         switch (reg_type) {
9387         case REG_A:
9388                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9389                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9390                 break;
9391         case REG_B:
9392                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9393                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9394                 break;
9395         case REG_C_0:
9396                 /*
9397                  * The metadata register C0 field might be divided into
9398                  * source vport index and META item value, we should set
9399                  * this field according to specified mask, not as whole one.
9400                  */
9401                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9402                 temp |= mask;
9403                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9404                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9405                 temp &= ~mask;
9406                 temp |= data;
9407                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9408                 break;
9409         case REG_C_1:
9410                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9411                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9412                 break;
9413         case REG_C_2:
9414                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9415                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9416                 break;
9417         case REG_C_3:
9418                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9419                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9420                 break;
9421         case REG_C_4:
9422                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9423                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9424                 break;
9425         case REG_C_5:
9426                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9427                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9428                 break;
9429         case REG_C_6:
9430                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9431                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9432                 break;
9433         case REG_C_7:
9434                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9435                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9436                 break;
9437         default:
9438                 MLX5_ASSERT(false);
9439                 break;
9440         }
9441 }
9442
9443 /**
9444  * Add MARK item to matcher
9445  *
9446  * @param[in] dev
9447  *   The device to configure through.
9448  * @param[in, out] matcher
9449  *   Flow matcher.
9450  * @param[in, out] key
9451  *   Flow matcher value.
9452  * @param[in] item
9453  *   Flow pattern to translate.
9454  */
9455 static void
9456 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9457                             void *matcher, void *key,
9458                             const struct rte_flow_item *item)
9459 {
9460         struct mlx5_priv *priv = dev->data->dev_private;
9461         const struct rte_flow_item_mark *mark;
9462         uint32_t value;
9463         uint32_t mask;
9464
9465         mark = item->mask ? (const void *)item->mask :
9466                             &rte_flow_item_mark_mask;
9467         mask = mark->id & priv->sh->dv_mark_mask;
9468         mark = (const void *)item->spec;
9469         MLX5_ASSERT(mark);
9470         value = mark->id & priv->sh->dv_mark_mask & mask;
9471         if (mask) {
9472                 enum modify_reg reg;
9473
9474                 /* Get the metadata register index for the mark. */
9475                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9476                 MLX5_ASSERT(reg > 0);
9477                 if (reg == REG_C_0) {
9478                         struct mlx5_priv *priv = dev->data->dev_private;
9479                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9480                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9481
9482                         mask &= msk_c0;
9483                         mask <<= shl_c0;
9484                         value <<= shl_c0;
9485                 }
9486                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9487         }
9488 }
9489
9490 /**
9491  * Add META item to matcher
9492  *
9493  * @param[in] dev
9494  *   The devich to configure through.
9495  * @param[in, out] matcher
9496  *   Flow matcher.
9497  * @param[in, out] key
9498  *   Flow matcher value.
9499  * @param[in] attr
9500  *   Attributes of flow that includes this item.
9501  * @param[in] item
9502  *   Flow pattern to translate.
9503  */
9504 static void
9505 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9506                             void *matcher, void *key,
9507                             const struct rte_flow_attr *attr,
9508                             const struct rte_flow_item *item)
9509 {
9510         const struct rte_flow_item_meta *meta_m;
9511         const struct rte_flow_item_meta *meta_v;
9512
9513         meta_m = (const void *)item->mask;
9514         if (!meta_m)
9515                 meta_m = &rte_flow_item_meta_mask;
9516         meta_v = (const void *)item->spec;
9517         if (meta_v) {
9518                 int reg;
9519                 uint32_t value = meta_v->data;
9520                 uint32_t mask = meta_m->data;
9521
9522                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9523                 if (reg < 0)
9524                         return;
9525                 MLX5_ASSERT(reg != REG_NON);
9526                 if (reg == REG_C_0) {
9527                         struct mlx5_priv *priv = dev->data->dev_private;
9528                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9529                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9530
9531                         mask &= msk_c0;
9532                         mask <<= shl_c0;
9533                         value <<= shl_c0;
9534                 }
9535                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9536         }
9537 }
9538
9539 /**
9540  * Add vport metadata Reg C0 item to matcher
9541  *
9542  * @param[in, out] matcher
9543  *   Flow matcher.
9544  * @param[in, out] key
9545  *   Flow matcher value.
9546  * @param[in] reg
9547  *   Flow pattern to translate.
9548  */
9549 static void
9550 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9551                                   uint32_t value, uint32_t mask)
9552 {
9553         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9554 }
9555
9556 /**
9557  * Add tag item to matcher
9558  *
9559  * @param[in] dev
9560  *   The devich to configure through.
9561  * @param[in, out] matcher
9562  *   Flow matcher.
9563  * @param[in, out] key
9564  *   Flow matcher value.
9565  * @param[in] item
9566  *   Flow pattern to translate.
9567  */
9568 static void
9569 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9570                                 void *matcher, void *key,
9571                                 const struct rte_flow_item *item)
9572 {
9573         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9574         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9575         uint32_t mask, value;
9576
9577         MLX5_ASSERT(tag_v);
9578         value = tag_v->data;
9579         mask = tag_m ? tag_m->data : UINT32_MAX;
9580         if (tag_v->id == REG_C_0) {
9581                 struct mlx5_priv *priv = dev->data->dev_private;
9582                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9583                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9584
9585                 mask &= msk_c0;
9586                 mask <<= shl_c0;
9587                 value <<= shl_c0;
9588         }
9589         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9590 }
9591
9592 /**
9593  * Add TAG item to matcher
9594  *
9595  * @param[in] dev
9596  *   The devich to configure through.
9597  * @param[in, out] matcher
9598  *   Flow matcher.
9599  * @param[in, out] key
9600  *   Flow matcher value.
9601  * @param[in] item
9602  *   Flow pattern to translate.
9603  */
9604 static void
9605 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9606                            void *matcher, void *key,
9607                            const struct rte_flow_item *item)
9608 {
9609         const struct rte_flow_item_tag *tag_v = item->spec;
9610         const struct rte_flow_item_tag *tag_m = item->mask;
9611         enum modify_reg reg;
9612
9613         MLX5_ASSERT(tag_v);
9614         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9615         /* Get the metadata register index for the tag. */
9616         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9617         MLX5_ASSERT(reg > 0);
9618         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9619 }
9620
9621 /**
9622  * Add source vport match to the specified matcher.
9623  *
9624  * @param[in, out] matcher
9625  *   Flow matcher.
9626  * @param[in, out] key
9627  *   Flow matcher value.
9628  * @param[in] port
9629  *   Source vport value to match
9630  * @param[in] mask
9631  *   Mask
9632  */
9633 static void
9634 flow_dv_translate_item_source_vport(void *matcher, void *key,
9635                                     int16_t port, uint16_t mask)
9636 {
9637         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9638         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9639
9640         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9641         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9642 }
9643
9644 /**
9645  * Translate port-id item to eswitch match on  port-id.
9646  *
9647  * @param[in] dev
9648  *   The devich to configure through.
9649  * @param[in, out] matcher
9650  *   Flow matcher.
9651  * @param[in, out] key
9652  *   Flow matcher value.
9653  * @param[in] item
9654  *   Flow pattern to translate.
9655  * @param[in]
9656  *   Flow attributes.
9657  *
9658  * @return
9659  *   0 on success, a negative errno value otherwise.
9660  */
9661 static int
9662 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9663                                void *key, const struct rte_flow_item *item,
9664                                const struct rte_flow_attr *attr)
9665 {
9666         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9667         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9668         struct mlx5_priv *priv;
9669         uint16_t mask, id;
9670
9671         if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9672                 flow_dv_translate_item_source_vport(matcher, key,
9673                         flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9674                 return 0;
9675         }
9676         mask = pid_m ? pid_m->id : 0xffff;
9677         id = pid_v ? pid_v->id : dev->data->port_id;
9678         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9679         if (!priv)
9680                 return -rte_errno;
9681         /*
9682          * Translate to vport field or to metadata, depending on mode.
9683          * Kernel can use either misc.source_port or half of C0 metadata
9684          * register.
9685          */
9686         if (priv->vport_meta_mask) {
9687                 /*
9688                  * Provide the hint for SW steering library
9689                  * to insert the flow into ingress domain and
9690                  * save the extra vport match.
9691                  */
9692                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9693                     priv->pf_bond < 0 && attr->transfer)
9694                         flow_dv_translate_item_source_vport
9695                                 (matcher, key, priv->vport_id, mask);
9696                 /*
9697                  * We should always set the vport metadata register,
9698                  * otherwise the SW steering library can drop
9699                  * the rule if wire vport metadata value is not zero,
9700                  * it depends on kernel configuration.
9701                  */
9702                 flow_dv_translate_item_meta_vport(matcher, key,
9703                                                   priv->vport_meta_tag,
9704                                                   priv->vport_meta_mask);
9705         } else {
9706                 flow_dv_translate_item_source_vport(matcher, key,
9707                                                     priv->vport_id, mask);
9708         }
9709         return 0;
9710 }
9711
9712 /**
9713  * Add ICMP6 item to matcher and to the value.
9714  *
9715  * @param[in, out] matcher
9716  *   Flow matcher.
9717  * @param[in, out] key
9718  *   Flow matcher value.
9719  * @param[in] item
9720  *   Flow pattern to translate.
9721  * @param[in] inner
9722  *   Item is inner pattern.
9723  */
9724 static void
9725 flow_dv_translate_item_icmp6(void *matcher, void *key,
9726                               const struct rte_flow_item *item,
9727                               int inner)
9728 {
9729         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9730         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9731         void *headers_m;
9732         void *headers_v;
9733         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9734                                      misc_parameters_3);
9735         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9736         if (inner) {
9737                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9738                                          inner_headers);
9739                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9740         } else {
9741                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9742                                          outer_headers);
9743                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9744         }
9745         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9746         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9747         if (!icmp6_v)
9748                 return;
9749         if (!icmp6_m)
9750                 icmp6_m = &rte_flow_item_icmp6_mask;
9751         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9752         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9753                  icmp6_v->type & icmp6_m->type);
9754         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9755         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9756                  icmp6_v->code & icmp6_m->code);
9757 }
9758
9759 /**
9760  * Add ICMP item to matcher and to the value.
9761  *
9762  * @param[in, out] matcher
9763  *   Flow matcher.
9764  * @param[in, out] key
9765  *   Flow matcher value.
9766  * @param[in] item
9767  *   Flow pattern to translate.
9768  * @param[in] inner
9769  *   Item is inner pattern.
9770  */
9771 static void
9772 flow_dv_translate_item_icmp(void *matcher, void *key,
9773                             const struct rte_flow_item *item,
9774                             int inner)
9775 {
9776         const struct rte_flow_item_icmp *icmp_m = item->mask;
9777         const struct rte_flow_item_icmp *icmp_v = item->spec;
9778         uint32_t icmp_header_data_m = 0;
9779         uint32_t icmp_header_data_v = 0;
9780         void *headers_m;
9781         void *headers_v;
9782         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9783                                      misc_parameters_3);
9784         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9785         if (inner) {
9786                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9787                                          inner_headers);
9788                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9789         } else {
9790                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9791                                          outer_headers);
9792                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9793         }
9794         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9795         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9796         if (!icmp_v)
9797                 return;
9798         if (!icmp_m)
9799                 icmp_m = &rte_flow_item_icmp_mask;
9800         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9801                  icmp_m->hdr.icmp_type);
9802         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9803                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9804         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9805                  icmp_m->hdr.icmp_code);
9806         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9807                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9808         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9809         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9810         if (icmp_header_data_m) {
9811                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9812                 icmp_header_data_v |=
9813                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9814                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9815                          icmp_header_data_m);
9816                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9817                          icmp_header_data_v & icmp_header_data_m);
9818         }
9819 }
9820
9821 /**
9822  * Add GTP item to matcher and to the value.
9823  *
9824  * @param[in, out] matcher
9825  *   Flow matcher.
9826  * @param[in, out] key
9827  *   Flow matcher value.
9828  * @param[in] item
9829  *   Flow pattern to translate.
9830  * @param[in] inner
9831  *   Item is inner pattern.
9832  */
9833 static void
9834 flow_dv_translate_item_gtp(void *matcher, void *key,
9835                            const struct rte_flow_item *item, int inner)
9836 {
9837         const struct rte_flow_item_gtp *gtp_m = item->mask;
9838         const struct rte_flow_item_gtp *gtp_v = item->spec;
9839         void *headers_m;
9840         void *headers_v;
9841         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9842                                      misc_parameters_3);
9843         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9844         uint16_t dport = RTE_GTPU_UDP_PORT;
9845
9846         if (inner) {
9847                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9848                                          inner_headers);
9849                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9850         } else {
9851                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9852                                          outer_headers);
9853                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9854         }
9855         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9856                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9857                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9858         }
9859         if (!gtp_v)
9860                 return;
9861         if (!gtp_m)
9862                 gtp_m = &rte_flow_item_gtp_mask;
9863         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9864                  gtp_m->v_pt_rsv_flags);
9865         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9866                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9867         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9868         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9869                  gtp_v->msg_type & gtp_m->msg_type);
9870         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9871                  rte_be_to_cpu_32(gtp_m->teid));
9872         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9873                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9874 }
9875
9876 /**
9877  * Add GTP PSC item to matcher.
9878  *
9879  * @param[in, out] matcher
9880  *   Flow matcher.
9881  * @param[in, out] key
9882  *   Flow matcher value.
9883  * @param[in] item
9884  *   Flow pattern to translate.
9885  */
9886 static int
9887 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9888                                const struct rte_flow_item *item)
9889 {
9890         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9891         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9892         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9893                         misc_parameters_3);
9894         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9895         union {
9896                 uint32_t w32;
9897                 struct {
9898                         uint16_t seq_num;
9899                         uint8_t npdu_num;
9900                         uint8_t next_ext_header_type;
9901                 };
9902         } dw_2;
9903         uint8_t gtp_flags;
9904
9905         /* Always set E-flag match on one, regardless of GTP item settings. */
9906         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9907         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9908         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9909         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9910         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9911         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9912         /*Set next extension header type. */
9913         dw_2.seq_num = 0;
9914         dw_2.npdu_num = 0;
9915         dw_2.next_ext_header_type = 0xff;
9916         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9917                  rte_cpu_to_be_32(dw_2.w32));
9918         dw_2.seq_num = 0;
9919         dw_2.npdu_num = 0;
9920         dw_2.next_ext_header_type = 0x85;
9921         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9922                  rte_cpu_to_be_32(dw_2.w32));
9923         if (gtp_psc_v) {
9924                 union {
9925                         uint32_t w32;
9926                         struct {
9927                                 uint8_t len;
9928                                 uint8_t type_flags;
9929                                 uint8_t qfi;
9930                                 uint8_t reserved;
9931                         };
9932                 } dw_0;
9933
9934                 /*Set extension header PDU type and Qos. */
9935                 if (!gtp_psc_m)
9936                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9937                 dw_0.w32 = 0;
9938                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
9939                 dw_0.qfi = gtp_psc_m->hdr.qfi;
9940                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9941                          rte_cpu_to_be_32(dw_0.w32));
9942                 dw_0.w32 = 0;
9943                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
9944                                                         gtp_psc_m->hdr.type);
9945                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
9946                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9947                          rte_cpu_to_be_32(dw_0.w32));
9948         }
9949         return 0;
9950 }
9951
9952 /**
9953  * Add eCPRI item to matcher and to the value.
9954  *
9955  * @param[in] dev
9956  *   The devich to configure through.
9957  * @param[in, out] matcher
9958  *   Flow matcher.
9959  * @param[in, out] key
9960  *   Flow matcher value.
9961  * @param[in] item
9962  *   Flow pattern to translate.
9963  * @param[in] last_item
9964  *   Last item flags.
9965  */
9966 static void
9967 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9968                              void *key, const struct rte_flow_item *item,
9969                              uint64_t last_item)
9970 {
9971         struct mlx5_priv *priv = dev->data->dev_private;
9972         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9973         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9974         struct rte_ecpri_common_hdr common;
9975         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9976                                      misc_parameters_4);
9977         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9978         uint32_t *samples;
9979         void *dw_m;
9980         void *dw_v;
9981
9982         /*
9983          * In case of eCPRI over Ethernet, if EtherType is not specified,
9984          * match on eCPRI EtherType implicitly.
9985          */
9986         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
9987                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
9988
9989                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9990                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9991                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
9992                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
9993                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
9994                         *(uint16_t *)l2m = UINT16_MAX;
9995                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
9996                 }
9997         }
9998         if (!ecpri_v)
9999                 return;
10000         if (!ecpri_m)
10001                 ecpri_m = &rte_flow_item_ecpri_mask;
10002         /*
10003          * Maximal four DW samples are supported in a single matching now.
10004          * Two are used now for a eCPRI matching:
10005          * 1. Type: one byte, mask should be 0x00ff0000 in network order
10006          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10007          *    if any.
10008          */
10009         if (!ecpri_m->hdr.common.u32)
10010                 return;
10011         samples = priv->sh->ecpri_parser.ids;
10012         /* Need to take the whole DW as the mask to fill the entry. */
10013         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10014                             prog_sample_field_value_0);
10015         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10016                             prog_sample_field_value_0);
10017         /* Already big endian (network order) in the header. */
10018         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10019         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10020         /* Sample#0, used for matching type, offset 0. */
10021         MLX5_SET(fte_match_set_misc4, misc4_m,
10022                  prog_sample_field_id_0, samples[0]);
10023         /* It makes no sense to set the sample ID in the mask field. */
10024         MLX5_SET(fte_match_set_misc4, misc4_v,
10025                  prog_sample_field_id_0, samples[0]);
10026         /*
10027          * Checking if message body part needs to be matched.
10028          * Some wildcard rules only matching type field should be supported.
10029          */
10030         if (ecpri_m->hdr.dummy[0]) {
10031                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10032                 switch (common.type) {
10033                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10034                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10035                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10036                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10037                                             prog_sample_field_value_1);
10038                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10039                                             prog_sample_field_value_1);
10040                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10041                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10042                                             ecpri_m->hdr.dummy[0];
10043                         /* Sample#1, to match message body, offset 4. */
10044                         MLX5_SET(fte_match_set_misc4, misc4_m,
10045                                  prog_sample_field_id_1, samples[1]);
10046                         MLX5_SET(fte_match_set_misc4, misc4_v,
10047                                  prog_sample_field_id_1, samples[1]);
10048                         break;
10049                 default:
10050                         /* Others, do not match any sample ID. */
10051                         break;
10052                 }
10053         }
10054 }
10055
10056 /*
10057  * Add connection tracking status item to matcher
10058  *
10059  * @param[in] dev
10060  *   The devich to configure through.
10061  * @param[in, out] matcher
10062  *   Flow matcher.
10063  * @param[in, out] key
10064  *   Flow matcher value.
10065  * @param[in] item
10066  *   Flow pattern to translate.
10067  */
10068 static void
10069 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10070                               void *matcher, void *key,
10071                               const struct rte_flow_item *item)
10072 {
10073         uint32_t reg_value = 0;
10074         int reg_id;
10075         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10076         uint32_t reg_mask = 0;
10077         const struct rte_flow_item_conntrack *spec = item->spec;
10078         const struct rte_flow_item_conntrack *mask = item->mask;
10079         uint32_t flags;
10080         struct rte_flow_error error;
10081
10082         if (!mask)
10083                 mask = &rte_flow_item_conntrack_mask;
10084         if (!spec || !mask->flags)
10085                 return;
10086         flags = spec->flags & mask->flags;
10087         /* The conflict should be checked in the validation. */
10088         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10089                 reg_value |= MLX5_CT_SYNDROME_VALID;
10090         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10091                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10092         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10093                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10094         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10095                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10096         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10097                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10098         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10099                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10100                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10101                 reg_mask |= 0xc0;
10102         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10103                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10104         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10105                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10106         /* The REG_C_x value could be saved during startup. */
10107         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10108         if (reg_id == REG_NON)
10109                 return;
10110         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10111                                reg_value, reg_mask);
10112 }
10113
10114 static void
10115 flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,
10116                             const struct rte_flow_item *item,
10117                             struct mlx5_flow *dev_flow, bool is_inner)
10118 {
10119         const struct rte_flow_item_flex *spec =
10120                 (const struct rte_flow_item_flex *)item->spec;
10121         int index = mlx5_flex_acquire_index(dev, spec->handle, false);
10122
10123         MLX5_ASSERT(index >= 0 && index <= (int)(sizeof(uint32_t) * CHAR_BIT));
10124         if (index < 0)
10125                 return;
10126         if (!(dev_flow->handle->flex_item & RTE_BIT32(index))) {
10127                 /* Don't count both inner and outer flex items in one rule. */
10128                 if (mlx5_flex_acquire_index(dev, spec->handle, true) != index)
10129                         MLX5_ASSERT(false);
10130                 dev_flow->handle->flex_item |= RTE_BIT32(index);
10131         }
10132         mlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);
10133 }
10134
10135 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10136
10137 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10138         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10139                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10140
10141 /**
10142  * Calculate flow matcher enable bitmap.
10143  *
10144  * @param match_criteria
10145  *   Pointer to flow matcher criteria.
10146  *
10147  * @return
10148  *   Bitmap of enabled fields.
10149  */
10150 static uint8_t
10151 flow_dv_matcher_enable(uint32_t *match_criteria)
10152 {
10153         uint8_t match_criteria_enable;
10154
10155         match_criteria_enable =
10156                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10157                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10158         match_criteria_enable |=
10159                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10160                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10161         match_criteria_enable |=
10162                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10163                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10164         match_criteria_enable |=
10165                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10166                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10167         match_criteria_enable |=
10168                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10169                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10170         match_criteria_enable |=
10171                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10172                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10173         match_criteria_enable |=
10174                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10175                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10176         return match_criteria_enable;
10177 }
10178
10179 static void
10180 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10181 {
10182         /*
10183          * Check flow matching criteria first, subtract misc5/4 length if flow
10184          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10185          * misc5/4 are not supported, and matcher creation failure is expected
10186          * w/o subtration. If misc5 is provided, misc4 must be counted in since
10187          * misc5 is right after misc4.
10188          */
10189         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10190                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10191                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10192                 if (!(match_criteria & (1 <<
10193                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10194                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10195                 }
10196         }
10197 }
10198
10199 static struct mlx5_list_entry *
10200 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10201                          struct mlx5_list_entry *entry, void *cb_ctx)
10202 {
10203         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10204         struct mlx5_flow_dv_matcher *ref = ctx->data;
10205         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10206                                                             typeof(*tbl), tbl);
10207         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10208                                                             sizeof(*resource),
10209                                                             0, SOCKET_ID_ANY);
10210
10211         if (!resource) {
10212                 rte_flow_error_set(ctx->error, ENOMEM,
10213                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10214                                    "cannot create matcher");
10215                 return NULL;
10216         }
10217         memcpy(resource, entry, sizeof(*resource));
10218         resource->tbl = &tbl->tbl;
10219         return &resource->entry;
10220 }
10221
10222 static void
10223 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10224                              struct mlx5_list_entry *entry)
10225 {
10226         mlx5_free(entry);
10227 }
10228
10229 struct mlx5_list_entry *
10230 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10231 {
10232         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10233         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10234         struct rte_eth_dev *dev = ctx->dev;
10235         struct mlx5_flow_tbl_data_entry *tbl_data;
10236         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10237         struct rte_flow_error *error = ctx->error;
10238         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10239         struct mlx5_flow_tbl_resource *tbl;
10240         void *domain;
10241         uint32_t idx = 0;
10242         int ret;
10243
10244         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10245         if (!tbl_data) {
10246                 rte_flow_error_set(error, ENOMEM,
10247                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10248                                    NULL,
10249                                    "cannot allocate flow table data entry");
10250                 return NULL;
10251         }
10252         tbl_data->idx = idx;
10253         tbl_data->tunnel = tt_prm->tunnel;
10254         tbl_data->group_id = tt_prm->group_id;
10255         tbl_data->external = !!tt_prm->external;
10256         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10257         tbl_data->is_egress = !!key.is_egress;
10258         tbl_data->is_transfer = !!key.is_fdb;
10259         tbl_data->dummy = !!key.dummy;
10260         tbl_data->level = key.level;
10261         tbl_data->id = key.id;
10262         tbl = &tbl_data->tbl;
10263         if (key.dummy)
10264                 return &tbl_data->entry;
10265         if (key.is_fdb)
10266                 domain = sh->fdb_domain;
10267         else if (key.is_egress)
10268                 domain = sh->tx_domain;
10269         else
10270                 domain = sh->rx_domain;
10271         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10272         if (ret) {
10273                 rte_flow_error_set(error, ENOMEM,
10274                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10275                                    NULL, "cannot create flow table object");
10276                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10277                 return NULL;
10278         }
10279         if (key.level != 0) {
10280                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10281                                         (tbl->obj, &tbl_data->jump.action);
10282                 if (ret) {
10283                         rte_flow_error_set(error, ENOMEM,
10284                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10285                                            NULL,
10286                                            "cannot create flow jump action");
10287                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10288                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10289                         return NULL;
10290                 }
10291         }
10292         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10293               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10294               key.level, key.id);
10295         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10296                                               flow_dv_matcher_create_cb,
10297                                               flow_dv_matcher_match_cb,
10298                                               flow_dv_matcher_remove_cb,
10299                                               flow_dv_matcher_clone_cb,
10300                                               flow_dv_matcher_clone_free_cb);
10301         if (!tbl_data->matchers) {
10302                 rte_flow_error_set(error, ENOMEM,
10303                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10304                                    NULL,
10305                                    "cannot create tbl matcher list");
10306                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10307                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10308                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10309                 return NULL;
10310         }
10311         return &tbl_data->entry;
10312 }
10313
10314 int
10315 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10316                      void *cb_ctx)
10317 {
10318         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10319         struct mlx5_flow_tbl_data_entry *tbl_data =
10320                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10321         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10322
10323         return tbl_data->level != key.level ||
10324                tbl_data->id != key.id ||
10325                tbl_data->dummy != key.dummy ||
10326                tbl_data->is_transfer != !!key.is_fdb ||
10327                tbl_data->is_egress != !!key.is_egress;
10328 }
10329
10330 struct mlx5_list_entry *
10331 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10332                       void *cb_ctx)
10333 {
10334         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10335         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10336         struct mlx5_flow_tbl_data_entry *tbl_data;
10337         struct rte_flow_error *error = ctx->error;
10338         uint32_t idx = 0;
10339
10340         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10341         if (!tbl_data) {
10342                 rte_flow_error_set(error, ENOMEM,
10343                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10344                                    NULL,
10345                                    "cannot allocate flow table data entry");
10346                 return NULL;
10347         }
10348         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10349         tbl_data->idx = idx;
10350         return &tbl_data->entry;
10351 }
10352
10353 void
10354 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10355 {
10356         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10357         struct mlx5_flow_tbl_data_entry *tbl_data =
10358                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10359
10360         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10361 }
10362
10363 /**
10364  * Get a flow table.
10365  *
10366  * @param[in, out] dev
10367  *   Pointer to rte_eth_dev structure.
10368  * @param[in] table_level
10369  *   Table level to use.
10370  * @param[in] egress
10371  *   Direction of the table.
10372  * @param[in] transfer
10373  *   E-Switch or NIC flow.
10374  * @param[in] dummy
10375  *   Dummy entry for dv API.
10376  * @param[in] table_id
10377  *   Table id to use.
10378  * @param[out] error
10379  *   pointer to error structure.
10380  *
10381  * @return
10382  *   Returns tables resource based on the index, NULL in case of failed.
10383  */
10384 struct mlx5_flow_tbl_resource *
10385 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10386                          uint32_t table_level, uint8_t egress,
10387                          uint8_t transfer,
10388                          bool external,
10389                          const struct mlx5_flow_tunnel *tunnel,
10390                          uint32_t group_id, uint8_t dummy,
10391                          uint32_t table_id,
10392                          struct rte_flow_error *error)
10393 {
10394         struct mlx5_priv *priv = dev->data->dev_private;
10395         union mlx5_flow_tbl_key table_key = {
10396                 {
10397                         .level = table_level,
10398                         .id = table_id,
10399                         .reserved = 0,
10400                         .dummy = !!dummy,
10401                         .is_fdb = !!transfer,
10402                         .is_egress = !!egress,
10403                 }
10404         };
10405         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10406                 .tunnel = tunnel,
10407                 .group_id = group_id,
10408                 .external = external,
10409         };
10410         struct mlx5_flow_cb_ctx ctx = {
10411                 .dev = dev,
10412                 .error = error,
10413                 .data = &table_key.v64,
10414                 .data2 = &tt_prm,
10415         };
10416         struct mlx5_list_entry *entry;
10417         struct mlx5_flow_tbl_data_entry *tbl_data;
10418
10419         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10420         if (!entry) {
10421                 rte_flow_error_set(error, ENOMEM,
10422                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10423                                    "cannot get table");
10424                 return NULL;
10425         }
10426         DRV_LOG(DEBUG, "table_level %u table_id %u "
10427                 "tunnel %u group %u registered.",
10428                 table_level, table_id,
10429                 tunnel ? tunnel->tunnel_id : 0, group_id);
10430         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10431         return &tbl_data->tbl;
10432 }
10433
10434 void
10435 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10436 {
10437         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10438         struct mlx5_flow_tbl_data_entry *tbl_data =
10439                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10440
10441         MLX5_ASSERT(entry && sh);
10442         if (tbl_data->jump.action)
10443                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10444         if (tbl_data->tbl.obj)
10445                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10446         if (tbl_data->tunnel_offload && tbl_data->external) {
10447                 struct mlx5_list_entry *he;
10448                 struct mlx5_hlist *tunnel_grp_hash;
10449                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10450                 union tunnel_tbl_key tunnel_key = {
10451                         .tunnel_id = tbl_data->tunnel ?
10452                                         tbl_data->tunnel->tunnel_id : 0,
10453                         .group = tbl_data->group_id
10454                 };
10455                 uint32_t table_level = tbl_data->level;
10456                 struct mlx5_flow_cb_ctx ctx = {
10457                         .data = (void *)&tunnel_key.val,
10458                 };
10459
10460                 tunnel_grp_hash = tbl_data->tunnel ?
10461                                         tbl_data->tunnel->groups :
10462                                         thub->groups;
10463                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10464                 if (he)
10465                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10466                 DRV_LOG(DEBUG,
10467                         "table_level %u id %u tunnel %u group %u released.",
10468                         table_level,
10469                         tbl_data->id,
10470                         tbl_data->tunnel ?
10471                         tbl_data->tunnel->tunnel_id : 0,
10472                         tbl_data->group_id);
10473         }
10474         mlx5_list_destroy(tbl_data->matchers);
10475         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10476 }
10477
10478 /**
10479  * Release a flow table.
10480  *
10481  * @param[in] sh
10482  *   Pointer to device shared structure.
10483  * @param[in] tbl
10484  *   Table resource to be released.
10485  *
10486  * @return
10487  *   Returns 0 if table was released, else return 1;
10488  */
10489 static int
10490 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10491                              struct mlx5_flow_tbl_resource *tbl)
10492 {
10493         struct mlx5_flow_tbl_data_entry *tbl_data =
10494                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10495
10496         if (!tbl)
10497                 return 0;
10498         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10499 }
10500
10501 int
10502 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10503                          struct mlx5_list_entry *entry, void *cb_ctx)
10504 {
10505         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10506         struct mlx5_flow_dv_matcher *ref = ctx->data;
10507         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10508                                                         entry);
10509
10510         return cur->crc != ref->crc ||
10511                cur->priority != ref->priority ||
10512                memcmp((const void *)cur->mask.buf,
10513                       (const void *)ref->mask.buf, ref->mask.size);
10514 }
10515
10516 struct mlx5_list_entry *
10517 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10518 {
10519         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10520         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10521         struct mlx5_flow_dv_matcher *ref = ctx->data;
10522         struct mlx5_flow_dv_matcher *resource;
10523         struct mlx5dv_flow_matcher_attr dv_attr = {
10524                 .type = IBV_FLOW_ATTR_NORMAL,
10525                 .match_mask = (void *)&ref->mask,
10526         };
10527         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10528                                                             typeof(*tbl), tbl);
10529         int ret;
10530
10531         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10532                                SOCKET_ID_ANY);
10533         if (!resource) {
10534                 rte_flow_error_set(ctx->error, ENOMEM,
10535                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10536                                    "cannot create matcher");
10537                 return NULL;
10538         }
10539         *resource = *ref;
10540         dv_attr.match_criteria_enable =
10541                 flow_dv_matcher_enable(resource->mask.buf);
10542         __flow_dv_adjust_buf_size(&ref->mask.size,
10543                                   dv_attr.match_criteria_enable);
10544         dv_attr.priority = ref->priority;
10545         if (tbl->is_egress)
10546                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10547         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10548                                                tbl->tbl.obj,
10549                                                &resource->matcher_object);
10550         if (ret) {
10551                 mlx5_free(resource);
10552                 rte_flow_error_set(ctx->error, ENOMEM,
10553                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10554                                    "cannot create matcher");
10555                 return NULL;
10556         }
10557         return &resource->entry;
10558 }
10559
10560 /**
10561  * Register the flow matcher.
10562  *
10563  * @param[in, out] dev
10564  *   Pointer to rte_eth_dev structure.
10565  * @param[in, out] matcher
10566  *   Pointer to flow matcher.
10567  * @param[in, out] key
10568  *   Pointer to flow table key.
10569  * @parm[in, out] dev_flow
10570  *   Pointer to the dev_flow.
10571  * @param[out] error
10572  *   pointer to error structure.
10573  *
10574  * @return
10575  *   0 on success otherwise -errno and errno is set.
10576  */
10577 static int
10578 flow_dv_matcher_register(struct rte_eth_dev *dev,
10579                          struct mlx5_flow_dv_matcher *ref,
10580                          union mlx5_flow_tbl_key *key,
10581                          struct mlx5_flow *dev_flow,
10582                          const struct mlx5_flow_tunnel *tunnel,
10583                          uint32_t group_id,
10584                          struct rte_flow_error *error)
10585 {
10586         struct mlx5_list_entry *entry;
10587         struct mlx5_flow_dv_matcher *resource;
10588         struct mlx5_flow_tbl_resource *tbl;
10589         struct mlx5_flow_tbl_data_entry *tbl_data;
10590         struct mlx5_flow_cb_ctx ctx = {
10591                 .error = error,
10592                 .data = ref,
10593         };
10594         /**
10595          * tunnel offload API requires this registration for cases when
10596          * tunnel match rule was inserted before tunnel set rule.
10597          */
10598         tbl = flow_dv_tbl_resource_get(dev, key->level,
10599                                        key->is_egress, key->is_fdb,
10600                                        dev_flow->external, tunnel,
10601                                        group_id, 0, key->id, error);
10602         if (!tbl)
10603                 return -rte_errno;      /* No need to refill the error info */
10604         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10605         ref->tbl = tbl;
10606         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10607         if (!entry) {
10608                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10609                 return rte_flow_error_set(error, ENOMEM,
10610                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10611                                           "cannot allocate ref memory");
10612         }
10613         resource = container_of(entry, typeof(*resource), entry);
10614         dev_flow->handle->dvh.matcher = resource;
10615         return 0;
10616 }
10617
10618 struct mlx5_list_entry *
10619 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10620 {
10621         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10622         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10623         struct mlx5_flow_dv_tag_resource *entry;
10624         uint32_t idx = 0;
10625         int ret;
10626
10627         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10628         if (!entry) {
10629                 rte_flow_error_set(ctx->error, ENOMEM,
10630                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10631                                    "cannot allocate resource memory");
10632                 return NULL;
10633         }
10634         entry->idx = idx;
10635         entry->tag_id = *(uint32_t *)(ctx->data);
10636         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10637                                                   &entry->action);
10638         if (ret) {
10639                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10640                 rte_flow_error_set(ctx->error, ENOMEM,
10641                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10642                                    NULL, "cannot create action");
10643                 return NULL;
10644         }
10645         return &entry->entry;
10646 }
10647
10648 int
10649 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10650                      void *cb_ctx)
10651 {
10652         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10653         struct mlx5_flow_dv_tag_resource *tag =
10654                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10655
10656         return *(uint32_t *)(ctx->data) != tag->tag_id;
10657 }
10658
10659 struct mlx5_list_entry *
10660 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10661                      void *cb_ctx)
10662 {
10663         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10664         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10665         struct mlx5_flow_dv_tag_resource *entry;
10666         uint32_t idx = 0;
10667
10668         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10669         if (!entry) {
10670                 rte_flow_error_set(ctx->error, ENOMEM,
10671                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10672                                    "cannot allocate tag resource memory");
10673                 return NULL;
10674         }
10675         memcpy(entry, oentry, sizeof(*entry));
10676         entry->idx = idx;
10677         return &entry->entry;
10678 }
10679
10680 void
10681 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10682 {
10683         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10684         struct mlx5_flow_dv_tag_resource *tag =
10685                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10686
10687         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10688 }
10689
10690 /**
10691  * Find existing tag resource or create and register a new one.
10692  *
10693  * @param dev[in, out]
10694  *   Pointer to rte_eth_dev structure.
10695  * @param[in, out] tag_be24
10696  *   Tag value in big endian then R-shift 8.
10697  * @parm[in, out] dev_flow
10698  *   Pointer to the dev_flow.
10699  * @param[out] error
10700  *   pointer to error structure.
10701  *
10702  * @return
10703  *   0 on success otherwise -errno and errno is set.
10704  */
10705 static int
10706 flow_dv_tag_resource_register
10707                         (struct rte_eth_dev *dev,
10708                          uint32_t tag_be24,
10709                          struct mlx5_flow *dev_flow,
10710                          struct rte_flow_error *error)
10711 {
10712         struct mlx5_priv *priv = dev->data->dev_private;
10713         struct mlx5_flow_dv_tag_resource *resource;
10714         struct mlx5_list_entry *entry;
10715         struct mlx5_flow_cb_ctx ctx = {
10716                                         .error = error,
10717                                         .data = &tag_be24,
10718                                         };
10719         struct mlx5_hlist *tag_table;
10720
10721         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10722                                       "tags",
10723                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10724                                       false, false, priv->sh,
10725                                       flow_dv_tag_create_cb,
10726                                       flow_dv_tag_match_cb,
10727                                       flow_dv_tag_remove_cb,
10728                                       flow_dv_tag_clone_cb,
10729                                       flow_dv_tag_clone_free_cb);
10730         if (unlikely(!tag_table))
10731                 return -rte_errno;
10732         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10733         if (entry) {
10734                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10735                                         entry);
10736                 dev_flow->handle->dvh.rix_tag = resource->idx;
10737                 dev_flow->dv.tag_resource = resource;
10738                 return 0;
10739         }
10740         return -rte_errno;
10741 }
10742
10743 void
10744 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10745 {
10746         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10747         struct mlx5_flow_dv_tag_resource *tag =
10748                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10749
10750         MLX5_ASSERT(tag && sh && tag->action);
10751         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10752         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10753         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10754 }
10755
10756 /**
10757  * Release the tag.
10758  *
10759  * @param dev
10760  *   Pointer to Ethernet device.
10761  * @param tag_idx
10762  *   Tag index.
10763  *
10764  * @return
10765  *   1 while a reference on it exists, 0 when freed.
10766  */
10767 static int
10768 flow_dv_tag_release(struct rte_eth_dev *dev,
10769                     uint32_t tag_idx)
10770 {
10771         struct mlx5_priv *priv = dev->data->dev_private;
10772         struct mlx5_flow_dv_tag_resource *tag;
10773
10774         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10775         if (!tag)
10776                 return 0;
10777         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10778                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10779         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10780 }
10781
10782 /**
10783  * Translate action PORT_ID / REPRESENTED_PORT to vport.
10784  *
10785  * @param[in] dev
10786  *   Pointer to rte_eth_dev structure.
10787  * @param[in] action
10788  *   Pointer to action PORT_ID / REPRESENTED_PORT.
10789  * @param[out] dst_port_id
10790  *   The target port ID.
10791  * @param[out] error
10792  *   Pointer to the error structure.
10793  *
10794  * @return
10795  *   0 on success, a negative errno value otherwise and rte_errno is set.
10796  */
10797 static int
10798 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10799                                  const struct rte_flow_action *action,
10800                                  uint32_t *dst_port_id,
10801                                  struct rte_flow_error *error)
10802 {
10803         uint32_t port;
10804         struct mlx5_priv *priv;
10805
10806         switch (action->type) {
10807         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10808                 const struct rte_flow_action_port_id *conf;
10809
10810                 conf = (const struct rte_flow_action_port_id *)action->conf;
10811                 port = conf->original ? dev->data->port_id : conf->id;
10812                 break;
10813         }
10814         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10815                 const struct rte_flow_action_ethdev *ethdev;
10816
10817                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10818                 port = ethdev->port_id;
10819                 break;
10820         }
10821         default:
10822                 MLX5_ASSERT(false);
10823                 return rte_flow_error_set(error, EINVAL,
10824                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
10825                                           "unknown E-Switch action");
10826         }
10827
10828         priv = mlx5_port_to_eswitch_info(port, false);
10829         if (!priv)
10830                 return rte_flow_error_set(error, -rte_errno,
10831                                           RTE_FLOW_ERROR_TYPE_ACTION,
10832                                           NULL,
10833                                           "No eswitch info was found for port");
10834 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10835         /*
10836          * This parameter is transferred to
10837          * mlx5dv_dr_action_create_dest_ib_port().
10838          */
10839         *dst_port_id = priv->dev_port;
10840 #else
10841         /*
10842          * Legacy mode, no LAG configurations is supported.
10843          * This parameter is transferred to
10844          * mlx5dv_dr_action_create_dest_vport().
10845          */
10846         *dst_port_id = priv->vport_id;
10847 #endif
10848         return 0;
10849 }
10850
10851 /**
10852  * Create a counter with aging configuration.
10853  *
10854  * @param[in] dev
10855  *   Pointer to rte_eth_dev structure.
10856  * @param[in] dev_flow
10857  *   Pointer to the mlx5_flow.
10858  * @param[out] count
10859  *   Pointer to the counter action configuration.
10860  * @param[in] age
10861  *   Pointer to the aging action configuration.
10862  *
10863  * @return
10864  *   Index to flow counter on success, 0 otherwise.
10865  */
10866 static uint32_t
10867 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10868                                 struct mlx5_flow *dev_flow,
10869                                 const struct rte_flow_action_count *count
10870                                         __rte_unused,
10871                                 const struct rte_flow_action_age *age)
10872 {
10873         uint32_t counter;
10874         struct mlx5_age_param *age_param;
10875
10876         counter = flow_dv_counter_alloc(dev, !!age);
10877         if (!counter || age == NULL)
10878                 return counter;
10879         age_param = flow_dv_counter_idx_get_age(dev, counter);
10880         age_param->context = age->context ? age->context :
10881                 (void *)(uintptr_t)(dev_flow->flow_idx);
10882         age_param->timeout = age->timeout;
10883         age_param->port_id = dev->data->port_id;
10884         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10885         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10886         return counter;
10887 }
10888
10889 /**
10890  * Add Tx queue matcher
10891  *
10892  * @param[in] dev
10893  *   Pointer to the dev struct.
10894  * @param[in, out] matcher
10895  *   Flow matcher.
10896  * @param[in, out] key
10897  *   Flow matcher value.
10898  * @param[in] item
10899  *   Flow pattern to translate.
10900  * @param[in] inner
10901  *   Item is inner pattern.
10902  */
10903 static void
10904 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10905                                 void *matcher, void *key,
10906                                 const struct rte_flow_item *item)
10907 {
10908         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10909         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10910         void *misc_m =
10911                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10912         void *misc_v =
10913                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10914         struct mlx5_txq_ctrl *txq;
10915         uint32_t queue, mask;
10916
10917         queue_m = (const void *)item->mask;
10918         queue_v = (const void *)item->spec;
10919         if (!queue_v)
10920                 return;
10921         txq = mlx5_txq_get(dev, queue_v->queue);
10922         if (!txq)
10923                 return;
10924         if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
10925                 queue = txq->obj->sq->id;
10926         else
10927                 queue = txq->obj->sq_obj.sq->id;
10928         mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
10929         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
10930         MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
10931         mlx5_txq_release(dev, queue_v->queue);
10932 }
10933
10934 /**
10935  * Set the hash fields according to the @p flow information.
10936  *
10937  * @param[in] dev_flow
10938  *   Pointer to the mlx5_flow.
10939  * @param[in] rss_desc
10940  *   Pointer to the mlx5_flow_rss_desc.
10941  */
10942 static void
10943 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10944                        struct mlx5_flow_rss_desc *rss_desc)
10945 {
10946         uint64_t items = dev_flow->handle->layers;
10947         int rss_inner = 0;
10948         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10949
10950         dev_flow->hash_fields = 0;
10951 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10952         if (rss_desc->level >= 2)
10953                 rss_inner = 1;
10954 #endif
10955         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10956             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10957                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10958                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10959                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10960                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
10961                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10962                         else
10963                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10964                 }
10965         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10966                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10967                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10968                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10969                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10970                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
10971                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10972                         else
10973                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10974                 }
10975         }
10976         if (dev_flow->hash_fields == 0)
10977                 /*
10978                  * There is no match between the RSS types and the
10979                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
10980                  */
10981                 return;
10982         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10983             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10984                 if (rss_types & RTE_ETH_RSS_UDP) {
10985                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
10986                                 dev_flow->hash_fields |=
10987                                                 IBV_RX_HASH_SRC_PORT_UDP;
10988                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
10989                                 dev_flow->hash_fields |=
10990                                                 IBV_RX_HASH_DST_PORT_UDP;
10991                         else
10992                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10993                 }
10994         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10995                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10996                 if (rss_types & RTE_ETH_RSS_TCP) {
10997                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
10998                                 dev_flow->hash_fields |=
10999                                                 IBV_RX_HASH_SRC_PORT_TCP;
11000                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11001                                 dev_flow->hash_fields |=
11002                                                 IBV_RX_HASH_DST_PORT_TCP;
11003                         else
11004                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
11005                 }
11006         }
11007         if (rss_inner)
11008                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
11009 }
11010
11011 /**
11012  * Prepare an Rx Hash queue.
11013  *
11014  * @param dev
11015  *   Pointer to Ethernet device.
11016  * @param[in] dev_flow
11017  *   Pointer to the mlx5_flow.
11018  * @param[in] rss_desc
11019  *   Pointer to the mlx5_flow_rss_desc.
11020  * @param[out] hrxq_idx
11021  *   Hash Rx queue index.
11022  *
11023  * @return
11024  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
11025  */
11026 static struct mlx5_hrxq *
11027 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
11028                      struct mlx5_flow *dev_flow,
11029                      struct mlx5_flow_rss_desc *rss_desc,
11030                      uint32_t *hrxq_idx)
11031 {
11032         struct mlx5_priv *priv = dev->data->dev_private;
11033         struct mlx5_flow_handle *dh = dev_flow->handle;
11034         struct mlx5_hrxq *hrxq;
11035
11036         MLX5_ASSERT(rss_desc->queue_num);
11037         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
11038         rss_desc->hash_fields = dev_flow->hash_fields;
11039         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11040         rss_desc->shared_rss = 0;
11041         if (rss_desc->hash_fields == 0)
11042                 rss_desc->queue_num = 1;
11043         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
11044         if (!*hrxq_idx)
11045                 return NULL;
11046         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
11047                               *hrxq_idx);
11048         return hrxq;
11049 }
11050
11051 /**
11052  * Release sample sub action resource.
11053  *
11054  * @param[in, out] dev
11055  *   Pointer to rte_eth_dev structure.
11056  * @param[in] act_res
11057  *   Pointer to sample sub action resource.
11058  */
11059 static void
11060 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11061                                    struct mlx5_flow_sub_actions_idx *act_res)
11062 {
11063         if (act_res->rix_hrxq) {
11064                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11065                 act_res->rix_hrxq = 0;
11066         }
11067         if (act_res->rix_encap_decap) {
11068                 flow_dv_encap_decap_resource_release(dev,
11069                                                      act_res->rix_encap_decap);
11070                 act_res->rix_encap_decap = 0;
11071         }
11072         if (act_res->rix_port_id_action) {
11073                 flow_dv_port_id_action_resource_release(dev,
11074                                                 act_res->rix_port_id_action);
11075                 act_res->rix_port_id_action = 0;
11076         }
11077         if (act_res->rix_tag) {
11078                 flow_dv_tag_release(dev, act_res->rix_tag);
11079                 act_res->rix_tag = 0;
11080         }
11081         if (act_res->rix_jump) {
11082                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11083                 act_res->rix_jump = 0;
11084         }
11085 }
11086
11087 int
11088 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11089                         struct mlx5_list_entry *entry, void *cb_ctx)
11090 {
11091         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11092         struct rte_eth_dev *dev = ctx->dev;
11093         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11094         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11095                                                               typeof(*resource),
11096                                                               entry);
11097
11098         if (ctx_resource->ratio == resource->ratio &&
11099             ctx_resource->ft_type == resource->ft_type &&
11100             ctx_resource->ft_id == resource->ft_id &&
11101             ctx_resource->set_action == resource->set_action &&
11102             !memcmp((void *)&ctx_resource->sample_act,
11103                     (void *)&resource->sample_act,
11104                     sizeof(struct mlx5_flow_sub_actions_list))) {
11105                 /*
11106                  * Existing sample action should release the prepared
11107                  * sub-actions reference counter.
11108                  */
11109                 flow_dv_sample_sub_actions_release(dev,
11110                                                    &ctx_resource->sample_idx);
11111                 return 0;
11112         }
11113         return 1;
11114 }
11115
11116 struct mlx5_list_entry *
11117 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11118 {
11119         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11120         struct rte_eth_dev *dev = ctx->dev;
11121         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11122         void **sample_dv_actions = ctx_resource->sub_actions;
11123         struct mlx5_flow_dv_sample_resource *resource;
11124         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11125         struct mlx5_priv *priv = dev->data->dev_private;
11126         struct mlx5_dev_ctx_shared *sh = priv->sh;
11127         struct mlx5_flow_tbl_resource *tbl;
11128         uint32_t idx = 0;
11129         const uint32_t next_ft_step = 1;
11130         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11131         uint8_t is_egress = 0;
11132         uint8_t is_transfer = 0;
11133         struct rte_flow_error *error = ctx->error;
11134
11135         /* Register new sample resource. */
11136         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11137         if (!resource) {
11138                 rte_flow_error_set(error, ENOMEM,
11139                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11140                                           NULL,
11141                                           "cannot allocate resource memory");
11142                 return NULL;
11143         }
11144         *resource = *ctx_resource;
11145         /* Create normal path table level */
11146         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11147                 is_transfer = 1;
11148         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11149                 is_egress = 1;
11150         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11151                                         is_egress, is_transfer,
11152                                         true, NULL, 0, 0, 0, error);
11153         if (!tbl) {
11154                 rte_flow_error_set(error, ENOMEM,
11155                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11156                                           NULL,
11157                                           "fail to create normal path table "
11158                                           "for sample");
11159                 goto error;
11160         }
11161         resource->normal_path_tbl = tbl;
11162         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11163                 if (!sh->default_miss_action) {
11164                         rte_flow_error_set(error, ENOMEM,
11165                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11166                                                 NULL,
11167                                                 "default miss action was not "
11168                                                 "created");
11169                         goto error;
11170                 }
11171                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11172                                                 sh->default_miss_action;
11173         }
11174         /* Create a DR sample action */
11175         sampler_attr.sample_ratio = resource->ratio;
11176         sampler_attr.default_next_table = tbl->obj;
11177         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11178         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11179                                                         &sample_dv_actions[0];
11180         sampler_attr.action = resource->set_action;
11181         if (mlx5_os_flow_dr_create_flow_action_sampler
11182                         (&sampler_attr, &resource->verbs_action)) {
11183                 rte_flow_error_set(error, ENOMEM,
11184                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11185                                         NULL, "cannot create sample action");
11186                 goto error;
11187         }
11188         resource->idx = idx;
11189         resource->dev = dev;
11190         return &resource->entry;
11191 error:
11192         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11193                 flow_dv_sample_sub_actions_release(dev,
11194                                                    &resource->sample_idx);
11195         if (resource->normal_path_tbl)
11196                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11197                                 resource->normal_path_tbl);
11198         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11199         return NULL;
11200
11201 }
11202
11203 struct mlx5_list_entry *
11204 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11205                          struct mlx5_list_entry *entry __rte_unused,
11206                          void *cb_ctx)
11207 {
11208         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11209         struct rte_eth_dev *dev = ctx->dev;
11210         struct mlx5_flow_dv_sample_resource *resource;
11211         struct mlx5_priv *priv = dev->data->dev_private;
11212         struct mlx5_dev_ctx_shared *sh = priv->sh;
11213         uint32_t idx = 0;
11214
11215         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11216         if (!resource) {
11217                 rte_flow_error_set(ctx->error, ENOMEM,
11218                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11219                                           NULL,
11220                                           "cannot allocate resource memory");
11221                 return NULL;
11222         }
11223         memcpy(resource, entry, sizeof(*resource));
11224         resource->idx = idx;
11225         resource->dev = dev;
11226         return &resource->entry;
11227 }
11228
11229 void
11230 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11231                              struct mlx5_list_entry *entry)
11232 {
11233         struct mlx5_flow_dv_sample_resource *resource =
11234                                   container_of(entry, typeof(*resource), entry);
11235         struct rte_eth_dev *dev = resource->dev;
11236         struct mlx5_priv *priv = dev->data->dev_private;
11237
11238         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11239 }
11240
11241 /**
11242  * Find existing sample resource or create and register a new one.
11243  *
11244  * @param[in, out] dev
11245  *   Pointer to rte_eth_dev structure.
11246  * @param[in] ref
11247  *   Pointer to sample resource reference.
11248  * @parm[in, out] dev_flow
11249  *   Pointer to the dev_flow.
11250  * @param[out] error
11251  *   pointer to error structure.
11252  *
11253  * @return
11254  *   0 on success otherwise -errno and errno is set.
11255  */
11256 static int
11257 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11258                          struct mlx5_flow_dv_sample_resource *ref,
11259                          struct mlx5_flow *dev_flow,
11260                          struct rte_flow_error *error)
11261 {
11262         struct mlx5_flow_dv_sample_resource *resource;
11263         struct mlx5_list_entry *entry;
11264         struct mlx5_priv *priv = dev->data->dev_private;
11265         struct mlx5_flow_cb_ctx ctx = {
11266                 .dev = dev,
11267                 .error = error,
11268                 .data = ref,
11269         };
11270
11271         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11272         if (!entry)
11273                 return -rte_errno;
11274         resource = container_of(entry, typeof(*resource), entry);
11275         dev_flow->handle->dvh.rix_sample = resource->idx;
11276         dev_flow->dv.sample_res = resource;
11277         return 0;
11278 }
11279
11280 int
11281 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11282                             struct mlx5_list_entry *entry, void *cb_ctx)
11283 {
11284         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11285         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11286         struct rte_eth_dev *dev = ctx->dev;
11287         struct mlx5_flow_dv_dest_array_resource *resource =
11288                                   container_of(entry, typeof(*resource), entry);
11289         uint32_t idx = 0;
11290
11291         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11292             ctx_resource->ft_type == resource->ft_type &&
11293             !memcmp((void *)resource->sample_act,
11294                     (void *)ctx_resource->sample_act,
11295                    (ctx_resource->num_of_dest *
11296                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11297                 /*
11298                  * Existing sample action should release the prepared
11299                  * sub-actions reference counter.
11300                  */
11301                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11302                         flow_dv_sample_sub_actions_release(dev,
11303                                         &ctx_resource->sample_idx[idx]);
11304                 return 0;
11305         }
11306         return 1;
11307 }
11308
11309 struct mlx5_list_entry *
11310 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11311 {
11312         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11313         struct rte_eth_dev *dev = ctx->dev;
11314         struct mlx5_flow_dv_dest_array_resource *resource;
11315         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11316         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11317         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11318         struct mlx5_priv *priv = dev->data->dev_private;
11319         struct mlx5_dev_ctx_shared *sh = priv->sh;
11320         struct mlx5_flow_sub_actions_list *sample_act;
11321         struct mlx5dv_dr_domain *domain;
11322         uint32_t idx = 0, res_idx = 0;
11323         struct rte_flow_error *error = ctx->error;
11324         uint64_t action_flags;
11325         int ret;
11326
11327         /* Register new destination array resource. */
11328         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11329                                             &res_idx);
11330         if (!resource) {
11331                 rte_flow_error_set(error, ENOMEM,
11332                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11333                                           NULL,
11334                                           "cannot allocate resource memory");
11335                 return NULL;
11336         }
11337         *resource = *ctx_resource;
11338         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11339                 domain = sh->fdb_domain;
11340         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11341                 domain = sh->rx_domain;
11342         else
11343                 domain = sh->tx_domain;
11344         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11345                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11346                                  mlx5_malloc(MLX5_MEM_ZERO,
11347                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11348                                  0, SOCKET_ID_ANY);
11349                 if (!dest_attr[idx]) {
11350                         rte_flow_error_set(error, ENOMEM,
11351                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11352                                            NULL,
11353                                            "cannot allocate resource memory");
11354                         goto error;
11355                 }
11356                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11357                 sample_act = &ctx_resource->sample_act[idx];
11358                 action_flags = sample_act->action_flags;
11359                 switch (action_flags) {
11360                 case MLX5_FLOW_ACTION_QUEUE:
11361                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11362                         break;
11363                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11364                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11365                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11366                         dest_attr[idx]->dest_reformat->reformat =
11367                                         sample_act->dr_encap_action;
11368                         dest_attr[idx]->dest_reformat->dest =
11369                                         sample_act->dr_port_id_action;
11370                         break;
11371                 case MLX5_FLOW_ACTION_PORT_ID:
11372                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11373                         break;
11374                 case MLX5_FLOW_ACTION_JUMP:
11375                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11376                         break;
11377                 default:
11378                         rte_flow_error_set(error, EINVAL,
11379                                            RTE_FLOW_ERROR_TYPE_ACTION,
11380                                            NULL,
11381                                            "unsupported actions type");
11382                         goto error;
11383                 }
11384         }
11385         /* create a dest array actioin */
11386         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11387                                                 (domain,
11388                                                  resource->num_of_dest,
11389                                                  dest_attr,
11390                                                  &resource->action);
11391         if (ret) {
11392                 rte_flow_error_set(error, ENOMEM,
11393                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11394                                    NULL,
11395                                    "cannot create destination array action");
11396                 goto error;
11397         }
11398         resource->idx = res_idx;
11399         resource->dev = dev;
11400         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11401                 mlx5_free(dest_attr[idx]);
11402         return &resource->entry;
11403 error:
11404         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11405                 flow_dv_sample_sub_actions_release(dev,
11406                                                    &resource->sample_idx[idx]);
11407                 if (dest_attr[idx])
11408                         mlx5_free(dest_attr[idx]);
11409         }
11410         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11411         return NULL;
11412 }
11413
11414 struct mlx5_list_entry *
11415 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11416                             struct mlx5_list_entry *entry __rte_unused,
11417                             void *cb_ctx)
11418 {
11419         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11420         struct rte_eth_dev *dev = ctx->dev;
11421         struct mlx5_flow_dv_dest_array_resource *resource;
11422         struct mlx5_priv *priv = dev->data->dev_private;
11423         struct mlx5_dev_ctx_shared *sh = priv->sh;
11424         uint32_t res_idx = 0;
11425         struct rte_flow_error *error = ctx->error;
11426
11427         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11428                                       &res_idx);
11429         if (!resource) {
11430                 rte_flow_error_set(error, ENOMEM,
11431                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11432                                           NULL,
11433                                           "cannot allocate dest-array memory");
11434                 return NULL;
11435         }
11436         memcpy(resource, entry, sizeof(*resource));
11437         resource->idx = res_idx;
11438         resource->dev = dev;
11439         return &resource->entry;
11440 }
11441
11442 void
11443 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11444                                  struct mlx5_list_entry *entry)
11445 {
11446         struct mlx5_flow_dv_dest_array_resource *resource =
11447                         container_of(entry, typeof(*resource), entry);
11448         struct rte_eth_dev *dev = resource->dev;
11449         struct mlx5_priv *priv = dev->data->dev_private;
11450
11451         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11452 }
11453
11454 /**
11455  * Find existing destination array resource or create and register a new one.
11456  *
11457  * @param[in, out] dev
11458  *   Pointer to rte_eth_dev structure.
11459  * @param[in] ref
11460  *   Pointer to destination array resource reference.
11461  * @parm[in, out] dev_flow
11462  *   Pointer to the dev_flow.
11463  * @param[out] error
11464  *   pointer to error structure.
11465  *
11466  * @return
11467  *   0 on success otherwise -errno and errno is set.
11468  */
11469 static int
11470 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11471                          struct mlx5_flow_dv_dest_array_resource *ref,
11472                          struct mlx5_flow *dev_flow,
11473                          struct rte_flow_error *error)
11474 {
11475         struct mlx5_flow_dv_dest_array_resource *resource;
11476         struct mlx5_priv *priv = dev->data->dev_private;
11477         struct mlx5_list_entry *entry;
11478         struct mlx5_flow_cb_ctx ctx = {
11479                 .dev = dev,
11480                 .error = error,
11481                 .data = ref,
11482         };
11483
11484         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11485         if (!entry)
11486                 return -rte_errno;
11487         resource = container_of(entry, typeof(*resource), entry);
11488         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11489         dev_flow->dv.dest_array_res = resource;
11490         return 0;
11491 }
11492
11493 /**
11494  * Convert Sample action to DV specification.
11495  *
11496  * @param[in] dev
11497  *   Pointer to rte_eth_dev structure.
11498  * @param[in] action
11499  *   Pointer to sample action structure.
11500  * @param[in, out] dev_flow
11501  *   Pointer to the mlx5_flow.
11502  * @param[in] attr
11503  *   Pointer to the flow attributes.
11504  * @param[in, out] num_of_dest
11505  *   Pointer to the num of destination.
11506  * @param[in, out] sample_actions
11507  *   Pointer to sample actions list.
11508  * @param[in, out] res
11509  *   Pointer to sample resource.
11510  * @param[out] error
11511  *   Pointer to the error structure.
11512  *
11513  * @return
11514  *   0 on success, a negative errno value otherwise and rte_errno is set.
11515  */
11516 static int
11517 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11518                                 const struct rte_flow_action_sample *action,
11519                                 struct mlx5_flow *dev_flow,
11520                                 const struct rte_flow_attr *attr,
11521                                 uint32_t *num_of_dest,
11522                                 void **sample_actions,
11523                                 struct mlx5_flow_dv_sample_resource *res,
11524                                 struct rte_flow_error *error)
11525 {
11526         struct mlx5_priv *priv = dev->data->dev_private;
11527         const struct rte_flow_action *sub_actions;
11528         struct mlx5_flow_sub_actions_list *sample_act;
11529         struct mlx5_flow_sub_actions_idx *sample_idx;
11530         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11531         struct rte_flow *flow = dev_flow->flow;
11532         struct mlx5_flow_rss_desc *rss_desc;
11533         uint64_t action_flags = 0;
11534
11535         MLX5_ASSERT(wks);
11536         rss_desc = &wks->rss_desc;
11537         sample_act = &res->sample_act;
11538         sample_idx = &res->sample_idx;
11539         res->ratio = action->ratio;
11540         sub_actions = action->actions;
11541         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11542                 int type = sub_actions->type;
11543                 uint32_t pre_rix = 0;
11544                 void *pre_r;
11545                 switch (type) {
11546                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11547                 {
11548                         const struct rte_flow_action_queue *queue;
11549                         struct mlx5_hrxq *hrxq;
11550                         uint32_t hrxq_idx;
11551
11552                         queue = sub_actions->conf;
11553                         rss_desc->queue_num = 1;
11554                         rss_desc->queue[0] = queue->index;
11555                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11556                                                     rss_desc, &hrxq_idx);
11557                         if (!hrxq)
11558                                 return rte_flow_error_set
11559                                         (error, rte_errno,
11560                                          RTE_FLOW_ERROR_TYPE_ACTION,
11561                                          NULL,
11562                                          "cannot create fate queue");
11563                         sample_act->dr_queue_action = hrxq->action;
11564                         sample_idx->rix_hrxq = hrxq_idx;
11565                         sample_actions[sample_act->actions_num++] =
11566                                                 hrxq->action;
11567                         (*num_of_dest)++;
11568                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11569                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11570                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11571                         dev_flow->handle->fate_action =
11572                                         MLX5_FLOW_FATE_QUEUE;
11573                         break;
11574                 }
11575                 case RTE_FLOW_ACTION_TYPE_RSS:
11576                 {
11577                         struct mlx5_hrxq *hrxq;
11578                         uint32_t hrxq_idx;
11579                         const struct rte_flow_action_rss *rss;
11580                         const uint8_t *rss_key;
11581
11582                         rss = sub_actions->conf;
11583                         memcpy(rss_desc->queue, rss->queue,
11584                                rss->queue_num * sizeof(uint16_t));
11585                         rss_desc->queue_num = rss->queue_num;
11586                         /* NULL RSS key indicates default RSS key. */
11587                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11588                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11589                         /*
11590                          * rss->level and rss.types should be set in advance
11591                          * when expanding items for RSS.
11592                          */
11593                         flow_dv_hashfields_set(dev_flow, rss_desc);
11594                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11595                                                     rss_desc, &hrxq_idx);
11596                         if (!hrxq)
11597                                 return rte_flow_error_set
11598                                         (error, rte_errno,
11599                                          RTE_FLOW_ERROR_TYPE_ACTION,
11600                                          NULL,
11601                                          "cannot create fate queue");
11602                         sample_act->dr_queue_action = hrxq->action;
11603                         sample_idx->rix_hrxq = hrxq_idx;
11604                         sample_actions[sample_act->actions_num++] =
11605                                                 hrxq->action;
11606                         (*num_of_dest)++;
11607                         action_flags |= MLX5_FLOW_ACTION_RSS;
11608                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11609                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11610                         dev_flow->handle->fate_action =
11611                                         MLX5_FLOW_FATE_QUEUE;
11612                         break;
11613                 }
11614                 case RTE_FLOW_ACTION_TYPE_MARK:
11615                 {
11616                         uint32_t tag_be = mlx5_flow_mark_set
11617                                 (((const struct rte_flow_action_mark *)
11618                                 (sub_actions->conf))->id);
11619
11620                         dev_flow->handle->mark = 1;
11621                         pre_rix = dev_flow->handle->dvh.rix_tag;
11622                         /* Save the mark resource before sample */
11623                         pre_r = dev_flow->dv.tag_resource;
11624                         if (flow_dv_tag_resource_register(dev, tag_be,
11625                                                   dev_flow, error))
11626                                 return -rte_errno;
11627                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11628                         sample_act->dr_tag_action =
11629                                 dev_flow->dv.tag_resource->action;
11630                         sample_idx->rix_tag =
11631                                 dev_flow->handle->dvh.rix_tag;
11632                         sample_actions[sample_act->actions_num++] =
11633                                                 sample_act->dr_tag_action;
11634                         /* Recover the mark resource after sample */
11635                         dev_flow->dv.tag_resource = pre_r;
11636                         dev_flow->handle->dvh.rix_tag = pre_rix;
11637                         action_flags |= MLX5_FLOW_ACTION_MARK;
11638                         break;
11639                 }
11640                 case RTE_FLOW_ACTION_TYPE_COUNT:
11641                 {
11642                         if (!flow->counter) {
11643                                 flow->counter =
11644                                         flow_dv_translate_create_counter(dev,
11645                                                 dev_flow, sub_actions->conf,
11646                                                 0);
11647                                 if (!flow->counter)
11648                                         return rte_flow_error_set
11649                                                 (error, rte_errno,
11650                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11651                                                 NULL,
11652                                                 "cannot create counter"
11653                                                 " object.");
11654                         }
11655                         sample_act->dr_cnt_action =
11656                                   (flow_dv_counter_get_by_idx(dev,
11657                                   flow->counter, NULL))->action;
11658                         sample_actions[sample_act->actions_num++] =
11659                                                 sample_act->dr_cnt_action;
11660                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11661                         break;
11662                 }
11663                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11664                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11665                 {
11666                         struct mlx5_flow_dv_port_id_action_resource
11667                                         port_id_resource;
11668                         uint32_t port_id = 0;
11669
11670                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11671                         /* Save the port id resource before sample */
11672                         pre_rix = dev_flow->handle->rix_port_id_action;
11673                         pre_r = dev_flow->dv.port_id_action;
11674                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11675                                                              &port_id, error))
11676                                 return -rte_errno;
11677                         port_id_resource.port_id = port_id;
11678                         if (flow_dv_port_id_action_resource_register
11679                             (dev, &port_id_resource, dev_flow, error))
11680                                 return -rte_errno;
11681                         sample_act->dr_port_id_action =
11682                                 dev_flow->dv.port_id_action->action;
11683                         sample_idx->rix_port_id_action =
11684                                 dev_flow->handle->rix_port_id_action;
11685                         sample_actions[sample_act->actions_num++] =
11686                                                 sample_act->dr_port_id_action;
11687                         /* Recover the port id resource after sample */
11688                         dev_flow->dv.port_id_action = pre_r;
11689                         dev_flow->handle->rix_port_id_action = pre_rix;
11690                         (*num_of_dest)++;
11691                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11692                         break;
11693                 }
11694                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11695                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11696                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11697                         /* Save the encap resource before sample */
11698                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11699                         pre_r = dev_flow->dv.encap_decap;
11700                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11701                                                            dev_flow,
11702                                                            attr->transfer,
11703                                                            error))
11704                                 return -rte_errno;
11705                         sample_act->dr_encap_action =
11706                                 dev_flow->dv.encap_decap->action;
11707                         sample_idx->rix_encap_decap =
11708                                 dev_flow->handle->dvh.rix_encap_decap;
11709                         sample_actions[sample_act->actions_num++] =
11710                                                 sample_act->dr_encap_action;
11711                         /* Recover the encap resource after sample */
11712                         dev_flow->dv.encap_decap = pre_r;
11713                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11714                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11715                         break;
11716                 default:
11717                         return rte_flow_error_set(error, EINVAL,
11718                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11719                                 NULL,
11720                                 "Not support for sampler action");
11721                 }
11722         }
11723         sample_act->action_flags = action_flags;
11724         res->ft_id = dev_flow->dv.group;
11725         if (attr->transfer) {
11726                 union {
11727                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11728                         uint64_t set_action;
11729                 } action_ctx = { .set_action = 0 };
11730
11731                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11732                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11733                          MLX5_MODIFICATION_TYPE_SET);
11734                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11735                          MLX5_MODI_META_REG_C_0);
11736                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11737                          priv->vport_meta_tag);
11738                 res->set_action = action_ctx.set_action;
11739         } else if (attr->ingress) {
11740                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11741         } else {
11742                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11743         }
11744         return 0;
11745 }
11746
11747 /**
11748  * Convert Sample action to DV specification.
11749  *
11750  * @param[in] dev
11751  *   Pointer to rte_eth_dev structure.
11752  * @param[in, out] dev_flow
11753  *   Pointer to the mlx5_flow.
11754  * @param[in] num_of_dest
11755  *   The num of destination.
11756  * @param[in, out] res
11757  *   Pointer to sample resource.
11758  * @param[in, out] mdest_res
11759  *   Pointer to destination array resource.
11760  * @param[in] sample_actions
11761  *   Pointer to sample path actions list.
11762  * @param[in] action_flags
11763  *   Holds the actions detected until now.
11764  * @param[out] error
11765  *   Pointer to the error structure.
11766  *
11767  * @return
11768  *   0 on success, a negative errno value otherwise and rte_errno is set.
11769  */
11770 static int
11771 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11772                              struct mlx5_flow *dev_flow,
11773                              uint32_t num_of_dest,
11774                              struct mlx5_flow_dv_sample_resource *res,
11775                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11776                              void **sample_actions,
11777                              uint64_t action_flags,
11778                              struct rte_flow_error *error)
11779 {
11780         /* update normal path action resource into last index of array */
11781         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11782         struct mlx5_flow_sub_actions_list *sample_act =
11783                                         &mdest_res->sample_act[dest_index];
11784         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11785         struct mlx5_flow_rss_desc *rss_desc;
11786         uint32_t normal_idx = 0;
11787         struct mlx5_hrxq *hrxq;
11788         uint32_t hrxq_idx;
11789
11790         MLX5_ASSERT(wks);
11791         rss_desc = &wks->rss_desc;
11792         if (num_of_dest > 1) {
11793                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11794                         /* Handle QP action for mirroring */
11795                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11796                                                     rss_desc, &hrxq_idx);
11797                         if (!hrxq)
11798                                 return rte_flow_error_set
11799                                      (error, rte_errno,
11800                                       RTE_FLOW_ERROR_TYPE_ACTION,
11801                                       NULL,
11802                                       "cannot create rx queue");
11803                         normal_idx++;
11804                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11805                         sample_act->dr_queue_action = hrxq->action;
11806                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11807                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11808                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11809                 }
11810                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11811                         normal_idx++;
11812                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11813                                 dev_flow->handle->dvh.rix_encap_decap;
11814                         sample_act->dr_encap_action =
11815                                 dev_flow->dv.encap_decap->action;
11816                         dev_flow->handle->dvh.rix_encap_decap = 0;
11817                 }
11818                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11819                         normal_idx++;
11820                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11821                                 dev_flow->handle->rix_port_id_action;
11822                         sample_act->dr_port_id_action =
11823                                 dev_flow->dv.port_id_action->action;
11824                         dev_flow->handle->rix_port_id_action = 0;
11825                 }
11826                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11827                         normal_idx++;
11828                         mdest_res->sample_idx[dest_index].rix_jump =
11829                                 dev_flow->handle->rix_jump;
11830                         sample_act->dr_jump_action =
11831                                 dev_flow->dv.jump->action;
11832                         dev_flow->handle->rix_jump = 0;
11833                 }
11834                 sample_act->actions_num = normal_idx;
11835                 /* update sample action resource into first index of array */
11836                 mdest_res->ft_type = res->ft_type;
11837                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11838                                 sizeof(struct mlx5_flow_sub_actions_idx));
11839                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11840                                 sizeof(struct mlx5_flow_sub_actions_list));
11841                 mdest_res->num_of_dest = num_of_dest;
11842                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11843                                                          dev_flow, error))
11844                         return rte_flow_error_set(error, EINVAL,
11845                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11846                                                   NULL, "can't create sample "
11847                                                   "action");
11848         } else {
11849                 res->sub_actions = sample_actions;
11850                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11851                         return rte_flow_error_set(error, EINVAL,
11852                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11853                                                   NULL,
11854                                                   "can't create sample action");
11855         }
11856         return 0;
11857 }
11858
11859 /**
11860  * Remove an ASO age action from age actions list.
11861  *
11862  * @param[in] dev
11863  *   Pointer to the Ethernet device structure.
11864  * @param[in] age
11865  *   Pointer to the aso age action handler.
11866  */
11867 static void
11868 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11869                                 struct mlx5_aso_age_action *age)
11870 {
11871         struct mlx5_age_info *age_info;
11872         struct mlx5_age_param *age_param = &age->age_params;
11873         struct mlx5_priv *priv = dev->data->dev_private;
11874         uint16_t expected = AGE_CANDIDATE;
11875
11876         age_info = GET_PORT_AGE_INFO(priv);
11877         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11878                                          AGE_FREE, false, __ATOMIC_RELAXED,
11879                                          __ATOMIC_RELAXED)) {
11880                 /**
11881                  * We need the lock even it is age timeout,
11882                  * since age action may still in process.
11883                  */
11884                 rte_spinlock_lock(&age_info->aged_sl);
11885                 LIST_REMOVE(age, next);
11886                 rte_spinlock_unlock(&age_info->aged_sl);
11887                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11888         }
11889 }
11890
11891 /**
11892  * Release an ASO age action.
11893  *
11894  * @param[in] dev
11895  *   Pointer to the Ethernet device structure.
11896  * @param[in] age_idx
11897  *   Index of ASO age action to release.
11898  * @param[in] flow
11899  *   True if the release operation is during flow destroy operation.
11900  *   False if the release operation is during action destroy operation.
11901  *
11902  * @return
11903  *   0 when age action was removed, otherwise the number of references.
11904  */
11905 static int
11906 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11907 {
11908         struct mlx5_priv *priv = dev->data->dev_private;
11909         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11910         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11911         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11912
11913         if (!ret) {
11914                 flow_dv_aso_age_remove_from_age(dev, age);
11915                 rte_spinlock_lock(&mng->free_sl);
11916                 LIST_INSERT_HEAD(&mng->free, age, next);
11917                 rte_spinlock_unlock(&mng->free_sl);
11918         }
11919         return ret;
11920 }
11921
11922 /**
11923  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11924  *
11925  * @param[in] dev
11926  *   Pointer to the Ethernet device structure.
11927  *
11928  * @return
11929  *   0 on success, otherwise negative errno value and rte_errno is set.
11930  */
11931 static int
11932 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11933 {
11934         struct mlx5_priv *priv = dev->data->dev_private;
11935         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11936         void *old_pools = mng->pools;
11937         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11938         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11939         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11940
11941         if (!pools) {
11942                 rte_errno = ENOMEM;
11943                 return -ENOMEM;
11944         }
11945         if (old_pools) {
11946                 memcpy(pools, old_pools,
11947                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11948                 mlx5_free(old_pools);
11949         } else {
11950                 /* First ASO flow hit allocation - starting ASO data-path. */
11951                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11952
11953                 if (ret) {
11954                         mlx5_free(pools);
11955                         return ret;
11956                 }
11957         }
11958         mng->n = resize;
11959         mng->pools = pools;
11960         return 0;
11961 }
11962
11963 /**
11964  * Create and initialize a new ASO aging pool.
11965  *
11966  * @param[in] dev
11967  *   Pointer to the Ethernet device structure.
11968  * @param[out] age_free
11969  *   Where to put the pointer of a new age action.
11970  *
11971  * @return
11972  *   The age actions pool pointer and @p age_free is set on success,
11973  *   NULL otherwise and rte_errno is set.
11974  */
11975 static struct mlx5_aso_age_pool *
11976 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11977                         struct mlx5_aso_age_action **age_free)
11978 {
11979         struct mlx5_priv *priv = dev->data->dev_private;
11980         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11981         struct mlx5_aso_age_pool *pool = NULL;
11982         struct mlx5_devx_obj *obj = NULL;
11983         uint32_t i;
11984
11985         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
11986                                                     priv->sh->cdev->pdn);
11987         if (!obj) {
11988                 rte_errno = ENODATA;
11989                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11990                 return NULL;
11991         }
11992         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11993         if (!pool) {
11994                 claim_zero(mlx5_devx_cmd_destroy(obj));
11995                 rte_errno = ENOMEM;
11996                 return NULL;
11997         }
11998         pool->flow_hit_aso_obj = obj;
11999         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
12000         rte_rwlock_write_lock(&mng->resize_rwl);
12001         pool->index = mng->next;
12002         /* Resize pools array if there is no room for the new pool in it. */
12003         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
12004                 claim_zero(mlx5_devx_cmd_destroy(obj));
12005                 mlx5_free(pool);
12006                 rte_rwlock_write_unlock(&mng->resize_rwl);
12007                 return NULL;
12008         }
12009         mng->pools[pool->index] = pool;
12010         mng->next++;
12011         rte_rwlock_write_unlock(&mng->resize_rwl);
12012         /* Assign the first action in the new pool, the rest go to free list. */
12013         *age_free = &pool->actions[0];
12014         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
12015                 pool->actions[i].offset = i;
12016                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
12017         }
12018         return pool;
12019 }
12020
12021 /**
12022  * Allocate a ASO aging bit.
12023  *
12024  * @param[in] dev
12025  *   Pointer to the Ethernet device structure.
12026  * @param[out] error
12027  *   Pointer to the error structure.
12028  *
12029  * @return
12030  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
12031  */
12032 static uint32_t
12033 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12034 {
12035         struct mlx5_priv *priv = dev->data->dev_private;
12036         const struct mlx5_aso_age_pool *pool;
12037         struct mlx5_aso_age_action *age_free = NULL;
12038         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12039
12040         MLX5_ASSERT(mng);
12041         /* Try to get the next free age action bit. */
12042         rte_spinlock_lock(&mng->free_sl);
12043         age_free = LIST_FIRST(&mng->free);
12044         if (age_free) {
12045                 LIST_REMOVE(age_free, next);
12046         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12047                 rte_spinlock_unlock(&mng->free_sl);
12048                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12049                                    NULL, "failed to create ASO age pool");
12050                 return 0; /* 0 is an error. */
12051         }
12052         rte_spinlock_unlock(&mng->free_sl);
12053         pool = container_of
12054           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12055                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12056                                                                        actions);
12057         if (!age_free->dr_action) {
12058                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12059                                                  error);
12060
12061                 if (reg_c < 0) {
12062                         rte_flow_error_set(error, rte_errno,
12063                                            RTE_FLOW_ERROR_TYPE_ACTION,
12064                                            NULL, "failed to get reg_c "
12065                                            "for ASO flow hit");
12066                         return 0; /* 0 is an error. */
12067                 }
12068 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12069                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12070                                 (priv->sh->rx_domain,
12071                                  pool->flow_hit_aso_obj->obj, age_free->offset,
12072                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12073                                  (reg_c - REG_C_0));
12074 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12075                 if (!age_free->dr_action) {
12076                         rte_errno = errno;
12077                         rte_spinlock_lock(&mng->free_sl);
12078                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12079                         rte_spinlock_unlock(&mng->free_sl);
12080                         rte_flow_error_set(error, rte_errno,
12081                                            RTE_FLOW_ERROR_TYPE_ACTION,
12082                                            NULL, "failed to create ASO "
12083                                            "flow hit action");
12084                         return 0; /* 0 is an error. */
12085                 }
12086         }
12087         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12088         return pool->index | ((age_free->offset + 1) << 16);
12089 }
12090
12091 /**
12092  * Initialize flow ASO age parameters.
12093  *
12094  * @param[in] dev
12095  *   Pointer to rte_eth_dev structure.
12096  * @param[in] age_idx
12097  *   Index of ASO age action.
12098  * @param[in] context
12099  *   Pointer to flow counter age context.
12100  * @param[in] timeout
12101  *   Aging timeout in seconds.
12102  *
12103  */
12104 static void
12105 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12106                             uint32_t age_idx,
12107                             void *context,
12108                             uint32_t timeout)
12109 {
12110         struct mlx5_aso_age_action *aso_age;
12111
12112         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12113         MLX5_ASSERT(aso_age);
12114         aso_age->age_params.context = context;
12115         aso_age->age_params.timeout = timeout;
12116         aso_age->age_params.port_id = dev->data->port_id;
12117         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12118                          __ATOMIC_RELAXED);
12119         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12120                          __ATOMIC_RELAXED);
12121 }
12122
12123 static void
12124 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12125                                const struct rte_flow_item_integrity *value,
12126                                void *headers_m, void *headers_v)
12127 {
12128         if (mask->l4_ok) {
12129                 /* RTE l4_ok filter aggregates hardware l4_ok and
12130                  * l4_checksum_ok filters.
12131                  * Positive RTE l4_ok match requires hardware match on both L4
12132                  * hardware integrity bits.
12133                  * For negative match, check hardware l4_checksum_ok bit only,
12134                  * because hardware sets that bit to 0 for all packets
12135                  * with bad L4.
12136                  */
12137                 if (value->l4_ok) {
12138                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok, 1);
12139                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok, 1);
12140                 }
12141                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12142                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12143                          !!value->l4_ok);
12144         }
12145         if (mask->l4_csum_ok) {
12146                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12147                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12148                          value->l4_csum_ok);
12149         }
12150 }
12151
12152 static void
12153 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12154                                const struct rte_flow_item_integrity *value,
12155                                void *headers_m, void *headers_v, bool is_ipv4)
12156 {
12157         if (mask->l3_ok) {
12158                 /* RTE l3_ok filter aggregates for IPv4 hardware l3_ok and
12159                  * ipv4_csum_ok filters.
12160                  * Positive RTE l3_ok match requires hardware match on both L3
12161                  * hardware integrity bits.
12162                  * For negative match, check hardware l3_csum_ok bit only,
12163                  * because hardware sets that bit to 0 for all packets
12164                  * with bad L3.
12165                  */
12166                 if (is_ipv4) {
12167                         if (value->l3_ok) {
12168                                 MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12169                                          l3_ok, 1);
12170                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12171                                          l3_ok, 1);
12172                         }
12173                         MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12174                                  ipv4_checksum_ok, 1);
12175                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12176                                  ipv4_checksum_ok, !!value->l3_ok);
12177                 } else {
12178                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok, 1);
12179                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12180                                  value->l3_ok);
12181                 }
12182         }
12183         if (mask->ipv4_csum_ok) {
12184                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok, 1);
12185                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12186                          value->ipv4_csum_ok);
12187         }
12188 }
12189
12190 static void
12191 set_integrity_bits(void *headers_m, void *headers_v,
12192                    const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12193 {
12194         const struct rte_flow_item_integrity *spec = integrity_item->spec;
12195         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12196
12197         /* Integrity bits validation cleared spec pointer */
12198         MLX5_ASSERT(spec != NULL);
12199         if (!mask)
12200                 mask = &rte_flow_item_integrity_mask;
12201         flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12202                                        is_l3_ip4);
12203         flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12204 }
12205
12206 static void
12207 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12208                                       const
12209                                       struct rte_flow_item *integrity_items[2],
12210                                       uint64_t pattern_flags)
12211 {
12212         void *headers_m, *headers_v;
12213         bool is_l3_ip4;
12214
12215         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12216                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12217                                          inner_headers);
12218                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12219                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12220                             0;
12221                 set_integrity_bits(headers_m, headers_v,
12222                                    integrity_items[1], is_l3_ip4);
12223         }
12224         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12225                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12226                                          outer_headers);
12227                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12228                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12229                             0;
12230                 set_integrity_bits(headers_m, headers_v,
12231                                    integrity_items[0], is_l3_ip4);
12232         }
12233 }
12234
12235 static void
12236 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12237                                  const struct rte_flow_item *integrity_items[2],
12238                                  uint64_t *last_item)
12239 {
12240         const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12241
12242         /* integrity bits validation cleared spec pointer */
12243         MLX5_ASSERT(spec != NULL);
12244         if (spec->level > 1) {
12245                 integrity_items[1] = item;
12246                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12247         } else {
12248                 integrity_items[0] = item;
12249                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12250         }
12251 }
12252
12253 /**
12254  * Prepares DV flow counter with aging configuration.
12255  * Gets it by index when exists, creates a new one when doesn't.
12256  *
12257  * @param[in] dev
12258  *   Pointer to rte_eth_dev structure.
12259  * @param[in] dev_flow
12260  *   Pointer to the mlx5_flow.
12261  * @param[in, out] flow
12262  *   Pointer to the sub flow.
12263  * @param[in] count
12264  *   Pointer to the counter action configuration.
12265  * @param[in] age
12266  *   Pointer to the aging action configuration.
12267  * @param[out] error
12268  *   Pointer to the error structure.
12269  *
12270  * @return
12271  *   Pointer to the counter, NULL otherwise.
12272  */
12273 static struct mlx5_flow_counter *
12274 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12275                         struct mlx5_flow *dev_flow,
12276                         struct rte_flow *flow,
12277                         const struct rte_flow_action_count *count,
12278                         const struct rte_flow_action_age *age,
12279                         struct rte_flow_error *error)
12280 {
12281         if (!flow->counter) {
12282                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12283                                                                  count, age);
12284                 if (!flow->counter) {
12285                         rte_flow_error_set(error, rte_errno,
12286                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12287                                            "cannot create counter object.");
12288                         return NULL;
12289                 }
12290         }
12291         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12292 }
12293
12294 /*
12295  * Release an ASO CT action by its own device.
12296  *
12297  * @param[in] dev
12298  *   Pointer to the Ethernet device structure.
12299  * @param[in] idx
12300  *   Index of ASO CT action to release.
12301  *
12302  * @return
12303  *   0 when CT action was removed, otherwise the number of references.
12304  */
12305 static inline int
12306 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12307 {
12308         struct mlx5_priv *priv = dev->data->dev_private;
12309         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12310         uint32_t ret;
12311         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12312         enum mlx5_aso_ct_state state =
12313                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12314
12315         /* Cannot release when CT is in the ASO SQ. */
12316         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12317                 return -1;
12318         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12319         if (!ret) {
12320                 if (ct->dr_action_orig) {
12321 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12322                         claim_zero(mlx5_glue->destroy_flow_action
12323                                         (ct->dr_action_orig));
12324 #endif
12325                         ct->dr_action_orig = NULL;
12326                 }
12327                 if (ct->dr_action_rply) {
12328 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12329                         claim_zero(mlx5_glue->destroy_flow_action
12330                                         (ct->dr_action_rply));
12331 #endif
12332                         ct->dr_action_rply = NULL;
12333                 }
12334                 /* Clear the state to free, no need in 1st allocation. */
12335                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12336                 rte_spinlock_lock(&mng->ct_sl);
12337                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12338                 rte_spinlock_unlock(&mng->ct_sl);
12339         }
12340         return (int)ret;
12341 }
12342
12343 static inline int
12344 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12345                        struct rte_flow_error *error)
12346 {
12347         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12348         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12349         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12350         int ret;
12351
12352         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12353         if (dev->data->dev_started != 1)
12354                 return rte_flow_error_set(error, EAGAIN,
12355                                           RTE_FLOW_ERROR_TYPE_ACTION,
12356                                           NULL,
12357                                           "Indirect CT action cannot be destroyed when the port is stopped");
12358         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12359         if (ret < 0)
12360                 return rte_flow_error_set(error, EAGAIN,
12361                                           RTE_FLOW_ERROR_TYPE_ACTION,
12362                                           NULL,
12363                                           "Current state prevents indirect CT action from being destroyed");
12364         return ret;
12365 }
12366
12367 /*
12368  * Resize the ASO CT pools array by 64 pools.
12369  *
12370  * @param[in] dev
12371  *   Pointer to the Ethernet device structure.
12372  *
12373  * @return
12374  *   0 on success, otherwise negative errno value and rte_errno is set.
12375  */
12376 static int
12377 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12378 {
12379         struct mlx5_priv *priv = dev->data->dev_private;
12380         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12381         void *old_pools = mng->pools;
12382         /* Magic number now, need a macro. */
12383         uint32_t resize = mng->n + 64;
12384         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12385         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12386
12387         if (!pools) {
12388                 rte_errno = ENOMEM;
12389                 return -rte_errno;
12390         }
12391         rte_rwlock_write_lock(&mng->resize_rwl);
12392         /* ASO SQ/QP was already initialized in the startup. */
12393         if (old_pools) {
12394                 /* Realloc could be an alternative choice. */
12395                 rte_memcpy(pools, old_pools,
12396                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12397                 mlx5_free(old_pools);
12398         }
12399         mng->n = resize;
12400         mng->pools = pools;
12401         rte_rwlock_write_unlock(&mng->resize_rwl);
12402         return 0;
12403 }
12404
12405 /*
12406  * Create and initialize a new ASO CT pool.
12407  *
12408  * @param[in] dev
12409  *   Pointer to the Ethernet device structure.
12410  * @param[out] ct_free
12411  *   Where to put the pointer of a new CT action.
12412  *
12413  * @return
12414  *   The CT actions pool pointer and @p ct_free is set on success,
12415  *   NULL otherwise and rte_errno is set.
12416  */
12417 static struct mlx5_aso_ct_pool *
12418 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12419                        struct mlx5_aso_ct_action **ct_free)
12420 {
12421         struct mlx5_priv *priv = dev->data->dev_private;
12422         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12423         struct mlx5_aso_ct_pool *pool = NULL;
12424         struct mlx5_devx_obj *obj = NULL;
12425         uint32_t i;
12426         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12427
12428         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12429                                                           priv->sh->cdev->pdn,
12430                                                           log_obj_size);
12431         if (!obj) {
12432                 rte_errno = ENODATA;
12433                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12434                 return NULL;
12435         }
12436         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12437         if (!pool) {
12438                 rte_errno = ENOMEM;
12439                 claim_zero(mlx5_devx_cmd_destroy(obj));
12440                 return NULL;
12441         }
12442         pool->devx_obj = obj;
12443         pool->index = mng->next;
12444         /* Resize pools array if there is no room for the new pool in it. */
12445         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12446                 claim_zero(mlx5_devx_cmd_destroy(obj));
12447                 mlx5_free(pool);
12448                 return NULL;
12449         }
12450         mng->pools[pool->index] = pool;
12451         mng->next++;
12452         /* Assign the first action in the new pool, the rest go to free list. */
12453         *ct_free = &pool->actions[0];
12454         /* Lock outside, the list operation is safe here. */
12455         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12456                 /* refcnt is 0 when allocating the memory. */
12457                 pool->actions[i].offset = i;
12458                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12459         }
12460         return pool;
12461 }
12462
12463 /*
12464  * Allocate a ASO CT action from free list.
12465  *
12466  * @param[in] dev
12467  *   Pointer to the Ethernet device structure.
12468  * @param[out] error
12469  *   Pointer to the error structure.
12470  *
12471  * @return
12472  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12473  */
12474 static uint32_t
12475 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12476 {
12477         struct mlx5_priv *priv = dev->data->dev_private;
12478         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12479         struct mlx5_aso_ct_action *ct = NULL;
12480         struct mlx5_aso_ct_pool *pool;
12481         uint8_t reg_c;
12482         uint32_t ct_idx;
12483
12484         MLX5_ASSERT(mng);
12485         if (!priv->sh->devx) {
12486                 rte_errno = ENOTSUP;
12487                 return 0;
12488         }
12489         /* Get a free CT action, if no, a new pool will be created. */
12490         rte_spinlock_lock(&mng->ct_sl);
12491         ct = LIST_FIRST(&mng->free_cts);
12492         if (ct) {
12493                 LIST_REMOVE(ct, next);
12494         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12495                 rte_spinlock_unlock(&mng->ct_sl);
12496                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12497                                    NULL, "failed to create ASO CT pool");
12498                 return 0;
12499         }
12500         rte_spinlock_unlock(&mng->ct_sl);
12501         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12502         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12503         /* 0: inactive, 1: created, 2+: used by flows. */
12504         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12505         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12506         if (!ct->dr_action_orig) {
12507 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12508                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12509                         (priv->sh->rx_domain, pool->devx_obj->obj,
12510                          ct->offset,
12511                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12512                          reg_c - REG_C_0);
12513 #else
12514                 RTE_SET_USED(reg_c);
12515 #endif
12516                 if (!ct->dr_action_orig) {
12517                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12518                         rte_flow_error_set(error, rte_errno,
12519                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12520                                            "failed to create ASO CT action");
12521                         return 0;
12522                 }
12523         }
12524         if (!ct->dr_action_rply) {
12525 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12526                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12527                         (priv->sh->rx_domain, pool->devx_obj->obj,
12528                          ct->offset,
12529                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12530                          reg_c - REG_C_0);
12531 #endif
12532                 if (!ct->dr_action_rply) {
12533                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12534                         rte_flow_error_set(error, rte_errno,
12535                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12536                                            "failed to create ASO CT action");
12537                         return 0;
12538                 }
12539         }
12540         return ct_idx;
12541 }
12542
12543 /*
12544  * Create a conntrack object with context and actions by using ASO mechanism.
12545  *
12546  * @param[in] dev
12547  *   Pointer to rte_eth_dev structure.
12548  * @param[in] pro
12549  *   Pointer to conntrack information profile.
12550  * @param[out] error
12551  *   Pointer to the error structure.
12552  *
12553  * @return
12554  *   Index to conntrack object on success, 0 otherwise.
12555  */
12556 static uint32_t
12557 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12558                                    const struct rte_flow_action_conntrack *pro,
12559                                    struct rte_flow_error *error)
12560 {
12561         struct mlx5_priv *priv = dev->data->dev_private;
12562         struct mlx5_dev_ctx_shared *sh = priv->sh;
12563         struct mlx5_aso_ct_action *ct;
12564         uint32_t idx;
12565
12566         if (!sh->ct_aso_en)
12567                 return rte_flow_error_set(error, ENOTSUP,
12568                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12569                                           "Connection is not supported");
12570         idx = flow_dv_aso_ct_alloc(dev, error);
12571         if (!idx)
12572                 return rte_flow_error_set(error, rte_errno,
12573                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12574                                           "Failed to allocate CT object");
12575         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12576         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12577                 return rte_flow_error_set(error, EBUSY,
12578                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12579                                           "Failed to update CT");
12580         ct->is_original = !!pro->is_original_dir;
12581         ct->peer = pro->peer_port;
12582         return idx;
12583 }
12584
12585 /**
12586  * Fill the flow with DV spec, lock free
12587  * (mutex should be acquired by caller).
12588  *
12589  * @param[in] dev
12590  *   Pointer to rte_eth_dev structure.
12591  * @param[in, out] dev_flow
12592  *   Pointer to the sub flow.
12593  * @param[in] attr
12594  *   Pointer to the flow attributes.
12595  * @param[in] items
12596  *   Pointer to the list of items.
12597  * @param[in] actions
12598  *   Pointer to the list of actions.
12599  * @param[out] error
12600  *   Pointer to the error structure.
12601  *
12602  * @return
12603  *   0 on success, a negative errno value otherwise and rte_errno is set.
12604  */
12605 static int
12606 flow_dv_translate(struct rte_eth_dev *dev,
12607                   struct mlx5_flow *dev_flow,
12608                   const struct rte_flow_attr *attr,
12609                   const struct rte_flow_item items[],
12610                   const struct rte_flow_action actions[],
12611                   struct rte_flow_error *error)
12612 {
12613         struct mlx5_priv *priv = dev->data->dev_private;
12614         struct mlx5_dev_config *dev_conf = &priv->config;
12615         struct rte_flow *flow = dev_flow->flow;
12616         struct mlx5_flow_handle *handle = dev_flow->handle;
12617         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12618         struct mlx5_flow_rss_desc *rss_desc;
12619         uint64_t item_flags = 0;
12620         uint64_t last_item = 0;
12621         uint64_t action_flags = 0;
12622         struct mlx5_flow_dv_matcher matcher = {
12623                 .mask = {
12624                         .size = sizeof(matcher.mask.buf),
12625                 },
12626         };
12627         int actions_n = 0;
12628         bool actions_end = false;
12629         union {
12630                 struct mlx5_flow_dv_modify_hdr_resource res;
12631                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12632                             sizeof(struct mlx5_modification_cmd) *
12633                             (MLX5_MAX_MODIFY_NUM + 1)];
12634         } mhdr_dummy;
12635         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12636         const struct rte_flow_action_count *count = NULL;
12637         const struct rte_flow_action_age *non_shared_age = NULL;
12638         union flow_dv_attr flow_attr = { .attr = 0 };
12639         uint32_t tag_be;
12640         union mlx5_flow_tbl_key tbl_key;
12641         uint32_t modify_action_position = UINT32_MAX;
12642         void *match_mask = matcher.mask.buf;
12643         void *match_value = dev_flow->dv.value.buf;
12644         uint8_t next_protocol = 0xff;
12645         struct rte_vlan_hdr vlan = { 0 };
12646         struct mlx5_flow_dv_dest_array_resource mdest_res;
12647         struct mlx5_flow_dv_sample_resource sample_res;
12648         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12649         const struct rte_flow_action_sample *sample = NULL;
12650         struct mlx5_flow_sub_actions_list *sample_act;
12651         uint32_t sample_act_pos = UINT32_MAX;
12652         uint32_t age_act_pos = UINT32_MAX;
12653         uint32_t num_of_dest = 0;
12654         int tmp_actions_n = 0;
12655         uint32_t table;
12656         int ret = 0;
12657         const struct mlx5_flow_tunnel *tunnel = NULL;
12658         struct flow_grp_info grp_info = {
12659                 .external = !!dev_flow->external,
12660                 .transfer = !!attr->transfer,
12661                 .fdb_def_rule = !!priv->fdb_def_rule,
12662                 .skip_scale = dev_flow->skip_scale &
12663                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12664                 .std_tbl_fix = true,
12665         };
12666         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12667         const struct rte_flow_item *tunnel_item = NULL;
12668
12669         if (!wks)
12670                 return rte_flow_error_set(error, ENOMEM,
12671                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12672                                           NULL,
12673                                           "failed to push flow workspace");
12674         rss_desc = &wks->rss_desc;
12675         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12676         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12677         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12678                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12679         /* update normal path action resource into last index of array */
12680         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12681         if (is_tunnel_offload_active(dev)) {
12682                 if (dev_flow->tunnel) {
12683                         RTE_VERIFY(dev_flow->tof_type ==
12684                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12685                         tunnel = dev_flow->tunnel;
12686                 } else {
12687                         tunnel = mlx5_get_tof(items, actions,
12688                                               &dev_flow->tof_type);
12689                         dev_flow->tunnel = tunnel;
12690                 }
12691                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12692                                         (dev, attr, tunnel, dev_flow->tof_type);
12693         }
12694         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12695                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12696         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12697                                        &grp_info, error);
12698         if (ret)
12699                 return ret;
12700         dev_flow->dv.group = table;
12701         if (attr->transfer)
12702                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12703         /* number of actions must be set to 0 in case of dirty stack. */
12704         mhdr_res->actions_num = 0;
12705         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12706                 /*
12707                  * do not add decap action if match rule drops packet
12708                  * HW rejects rules with decap & drop
12709                  *
12710                  * if tunnel match rule was inserted before matching tunnel set
12711                  * rule flow table used in the match rule must be registered.
12712                  * current implementation handles that in the
12713                  * flow_dv_match_register() at the function end.
12714                  */
12715                 bool add_decap = true;
12716                 const struct rte_flow_action *ptr = actions;
12717
12718                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12719                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12720                                 add_decap = false;
12721                                 break;
12722                         }
12723                 }
12724                 if (add_decap) {
12725                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12726                                                            attr->transfer,
12727                                                            error))
12728                                 return -rte_errno;
12729                         dev_flow->dv.actions[actions_n++] =
12730                                         dev_flow->dv.encap_decap->action;
12731                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12732                 }
12733         }
12734         for (; !actions_end ; actions++) {
12735                 const struct rte_flow_action_queue *queue;
12736                 const struct rte_flow_action_rss *rss;
12737                 const struct rte_flow_action *action = actions;
12738                 const uint8_t *rss_key;
12739                 struct mlx5_flow_tbl_resource *tbl;
12740                 struct mlx5_aso_age_action *age_act;
12741                 struct mlx5_flow_counter *cnt_act;
12742                 uint32_t port_id = 0;
12743                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12744                 int action_type = actions->type;
12745                 const struct rte_flow_action *found_action = NULL;
12746                 uint32_t jump_group = 0;
12747                 uint32_t owner_idx;
12748                 struct mlx5_aso_ct_action *ct;
12749
12750                 if (!mlx5_flow_os_action_supported(action_type))
12751                         return rte_flow_error_set(error, ENOTSUP,
12752                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12753                                                   actions,
12754                                                   "action not supported");
12755                 switch (action_type) {
12756                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12757                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12758                         break;
12759                 case RTE_FLOW_ACTION_TYPE_VOID:
12760                         break;
12761                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12762                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12763                         if (flow_dv_translate_action_port_id(dev, action,
12764                                                              &port_id, error))
12765                                 return -rte_errno;
12766                         port_id_resource.port_id = port_id;
12767                         MLX5_ASSERT(!handle->rix_port_id_action);
12768                         if (flow_dv_port_id_action_resource_register
12769                             (dev, &port_id_resource, dev_flow, error))
12770                                 return -rte_errno;
12771                         dev_flow->dv.actions[actions_n++] =
12772                                         dev_flow->dv.port_id_action->action;
12773                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12774                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12775                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12776                         num_of_dest++;
12777                         break;
12778                 case RTE_FLOW_ACTION_TYPE_FLAG:
12779                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12780                         dev_flow->handle->mark = 1;
12781                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12782                                 struct rte_flow_action_mark mark = {
12783                                         .id = MLX5_FLOW_MARK_DEFAULT,
12784                                 };
12785
12786                                 if (flow_dv_convert_action_mark(dev, &mark,
12787                                                                 mhdr_res,
12788                                                                 error))
12789                                         return -rte_errno;
12790                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12791                                 break;
12792                         }
12793                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12794                         /*
12795                          * Only one FLAG or MARK is supported per device flow
12796                          * right now. So the pointer to the tag resource must be
12797                          * zero before the register process.
12798                          */
12799                         MLX5_ASSERT(!handle->dvh.rix_tag);
12800                         if (flow_dv_tag_resource_register(dev, tag_be,
12801                                                           dev_flow, error))
12802                                 return -rte_errno;
12803                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12804                         dev_flow->dv.actions[actions_n++] =
12805                                         dev_flow->dv.tag_resource->action;
12806                         break;
12807                 case RTE_FLOW_ACTION_TYPE_MARK:
12808                         action_flags |= MLX5_FLOW_ACTION_MARK;
12809                         dev_flow->handle->mark = 1;
12810                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12811                                 const struct rte_flow_action_mark *mark =
12812                                         (const struct rte_flow_action_mark *)
12813                                                 actions->conf;
12814
12815                                 if (flow_dv_convert_action_mark(dev, mark,
12816                                                                 mhdr_res,
12817                                                                 error))
12818                                         return -rte_errno;
12819                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12820                                 break;
12821                         }
12822                         /* Fall-through */
12823                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12824                         /* Legacy (non-extensive) MARK action. */
12825                         tag_be = mlx5_flow_mark_set
12826                               (((const struct rte_flow_action_mark *)
12827                                (actions->conf))->id);
12828                         MLX5_ASSERT(!handle->dvh.rix_tag);
12829                         if (flow_dv_tag_resource_register(dev, tag_be,
12830                                                           dev_flow, error))
12831                                 return -rte_errno;
12832                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12833                         dev_flow->dv.actions[actions_n++] =
12834                                         dev_flow->dv.tag_resource->action;
12835                         break;
12836                 case RTE_FLOW_ACTION_TYPE_SET_META:
12837                         if (flow_dv_convert_action_set_meta
12838                                 (dev, mhdr_res, attr,
12839                                  (const struct rte_flow_action_set_meta *)
12840                                   actions->conf, error))
12841                                 return -rte_errno;
12842                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12843                         break;
12844                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12845                         if (flow_dv_convert_action_set_tag
12846                                 (dev, mhdr_res,
12847                                  (const struct rte_flow_action_set_tag *)
12848                                   actions->conf, error))
12849                                 return -rte_errno;
12850                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12851                         break;
12852                 case RTE_FLOW_ACTION_TYPE_DROP:
12853                         action_flags |= MLX5_FLOW_ACTION_DROP;
12854                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12855                         break;
12856                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12857                         queue = actions->conf;
12858                         rss_desc->queue_num = 1;
12859                         rss_desc->queue[0] = queue->index;
12860                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12861                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12862                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12863                         num_of_dest++;
12864                         break;
12865                 case RTE_FLOW_ACTION_TYPE_RSS:
12866                         rss = actions->conf;
12867                         memcpy(rss_desc->queue, rss->queue,
12868                                rss->queue_num * sizeof(uint16_t));
12869                         rss_desc->queue_num = rss->queue_num;
12870                         /* NULL RSS key indicates default RSS key. */
12871                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12872                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12873                         /*
12874                          * rss->level and rss.types should be set in advance
12875                          * when expanding items for RSS.
12876                          */
12877                         action_flags |= MLX5_FLOW_ACTION_RSS;
12878                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12879                                 MLX5_FLOW_FATE_SHARED_RSS :
12880                                 MLX5_FLOW_FATE_QUEUE;
12881                         break;
12882                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12883                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12884                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
12885                         if (flow->age == 0) {
12886                                 flow->age = owner_idx;
12887                                 __atomic_fetch_add(&age_act->refcnt, 1,
12888                                                    __ATOMIC_RELAXED);
12889                         }
12890                         age_act_pos = actions_n++;
12891                         action_flags |= MLX5_FLOW_ACTION_AGE;
12892                         break;
12893                 case RTE_FLOW_ACTION_TYPE_AGE:
12894                         non_shared_age = action->conf;
12895                         age_act_pos = actions_n++;
12896                         action_flags |= MLX5_FLOW_ACTION_AGE;
12897                         break;
12898                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12899                         owner_idx = (uint32_t)(uintptr_t)action->conf;
12900                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
12901                                                              NULL);
12902                         MLX5_ASSERT(cnt_act != NULL);
12903                         /**
12904                          * When creating meter drop flow in drop table, the
12905                          * counter should not overwrite the rte flow counter.
12906                          */
12907                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12908                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12909                                 dev_flow->dv.actions[actions_n++] =
12910                                                         cnt_act->action;
12911                         } else {
12912                                 if (flow->counter == 0) {
12913                                         flow->counter = owner_idx;
12914                                         __atomic_fetch_add
12915                                                 (&cnt_act->shared_info.refcnt,
12916                                                  1, __ATOMIC_RELAXED);
12917                                 }
12918                                 /* Save information first, will apply later. */
12919                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
12920                         }
12921                         break;
12922                 case RTE_FLOW_ACTION_TYPE_COUNT:
12923                         if (!priv->sh->devx) {
12924                                 return rte_flow_error_set
12925                                               (error, ENOTSUP,
12926                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12927                                                NULL,
12928                                                "count action not supported");
12929                         }
12930                         /* Save information first, will apply later. */
12931                         count = action->conf;
12932                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12933                         break;
12934                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12935                         dev_flow->dv.actions[actions_n++] =
12936                                                 priv->sh->pop_vlan_action;
12937                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12938                         break;
12939                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12940                         if (!(action_flags &
12941                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12942                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12943                         vlan.eth_proto = rte_be_to_cpu_16
12944                              ((((const struct rte_flow_action_of_push_vlan *)
12945                                                    actions->conf)->ethertype));
12946                         found_action = mlx5_flow_find_action
12947                                         (actions + 1,
12948                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12949                         if (found_action)
12950                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12951                         found_action = mlx5_flow_find_action
12952                                         (actions + 1,
12953                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12954                         if (found_action)
12955                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12956                         if (flow_dv_create_action_push_vlan
12957                                             (dev, attr, &vlan, dev_flow, error))
12958                                 return -rte_errno;
12959                         dev_flow->dv.actions[actions_n++] =
12960                                         dev_flow->dv.push_vlan_res->action;
12961                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12962                         break;
12963                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12964                         /* of_vlan_push action handled this action */
12965                         MLX5_ASSERT(action_flags &
12966                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12967                         break;
12968                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12969                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12970                                 break;
12971                         flow_dev_get_vlan_info_from_items(items, &vlan);
12972                         mlx5_update_vlan_vid_pcp(actions, &vlan);
12973                         /* If no VLAN push - this is a modify header action */
12974                         if (flow_dv_convert_action_modify_vlan_vid
12975                                                 (mhdr_res, actions, error))
12976                                 return -rte_errno;
12977                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12978                         break;
12979                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12980                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12981                         if (flow_dv_create_action_l2_encap(dev, actions,
12982                                                            dev_flow,
12983                                                            attr->transfer,
12984                                                            error))
12985                                 return -rte_errno;
12986                         dev_flow->dv.actions[actions_n++] =
12987                                         dev_flow->dv.encap_decap->action;
12988                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12989                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12990                                 sample_act->action_flags |=
12991                                                         MLX5_FLOW_ACTION_ENCAP;
12992                         break;
12993                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12994                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12995                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12996                                                            attr->transfer,
12997                                                            error))
12998                                 return -rte_errno;
12999                         dev_flow->dv.actions[actions_n++] =
13000                                         dev_flow->dv.encap_decap->action;
13001                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13002                         break;
13003                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
13004                         /* Handle encap with preceding decap. */
13005                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
13006                                 if (flow_dv_create_action_raw_encap
13007                                         (dev, actions, dev_flow, attr, error))
13008                                         return -rte_errno;
13009                                 dev_flow->dv.actions[actions_n++] =
13010                                         dev_flow->dv.encap_decap->action;
13011                         } else {
13012                                 /* Handle encap without preceding decap. */
13013                                 if (flow_dv_create_action_l2_encap
13014                                     (dev, actions, dev_flow, attr->transfer,
13015                                      error))
13016                                         return -rte_errno;
13017                                 dev_flow->dv.actions[actions_n++] =
13018                                         dev_flow->dv.encap_decap->action;
13019                         }
13020                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13021                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13022                                 sample_act->action_flags |=
13023                                                         MLX5_FLOW_ACTION_ENCAP;
13024                         break;
13025                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
13026                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
13027                                 ;
13028                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
13029                                 if (flow_dv_create_action_l2_decap
13030                                     (dev, dev_flow, attr->transfer, error))
13031                                         return -rte_errno;
13032                                 dev_flow->dv.actions[actions_n++] =
13033                                         dev_flow->dv.encap_decap->action;
13034                         }
13035                         /* If decap is followed by encap, handle it at encap. */
13036                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13037                         break;
13038                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
13039                         dev_flow->dv.actions[actions_n++] =
13040                                 (void *)(uintptr_t)action->conf;
13041                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13042                         break;
13043                 case RTE_FLOW_ACTION_TYPE_JUMP:
13044                         jump_group = ((const struct rte_flow_action_jump *)
13045                                                         action->conf)->group;
13046                         grp_info.std_tbl_fix = 0;
13047                         if (dev_flow->skip_scale &
13048                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
13049                                 grp_info.skip_scale = 1;
13050                         else
13051                                 grp_info.skip_scale = 0;
13052                         ret = mlx5_flow_group_to_table(dev, tunnel,
13053                                                        jump_group,
13054                                                        &table,
13055                                                        &grp_info, error);
13056                         if (ret)
13057                                 return ret;
13058                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
13059                                                        attr->transfer,
13060                                                        !!dev_flow->external,
13061                                                        tunnel, jump_group, 0,
13062                                                        0, error);
13063                         if (!tbl)
13064                                 return rte_flow_error_set
13065                                                 (error, errno,
13066                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13067                                                  NULL,
13068                                                  "cannot create jump action.");
13069                         if (flow_dv_jump_tbl_resource_register
13070                             (dev, tbl, dev_flow, error)) {
13071                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
13072                                 return rte_flow_error_set
13073                                                 (error, errno,
13074                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13075                                                  NULL,
13076                                                  "cannot create jump action.");
13077                         }
13078                         dev_flow->dv.actions[actions_n++] =
13079                                         dev_flow->dv.jump->action;
13080                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13081                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13082                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13083                         num_of_dest++;
13084                         break;
13085                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13086                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13087                         if (flow_dv_convert_action_modify_mac
13088                                         (mhdr_res, actions, error))
13089                                 return -rte_errno;
13090                         action_flags |= actions->type ==
13091                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13092                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
13093                                         MLX5_FLOW_ACTION_SET_MAC_DST;
13094                         break;
13095                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13096                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13097                         if (flow_dv_convert_action_modify_ipv4
13098                                         (mhdr_res, actions, error))
13099                                 return -rte_errno;
13100                         action_flags |= actions->type ==
13101                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13102                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13103                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13104                         break;
13105                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13106                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13107                         if (flow_dv_convert_action_modify_ipv6
13108                                         (mhdr_res, actions, error))
13109                                 return -rte_errno;
13110                         action_flags |= actions->type ==
13111                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13112                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13113                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13114                         break;
13115                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13116                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13117                         if (flow_dv_convert_action_modify_tp
13118                                         (mhdr_res, actions, items,
13119                                          &flow_attr, dev_flow, !!(action_flags &
13120                                          MLX5_FLOW_ACTION_DECAP), error))
13121                                 return -rte_errno;
13122                         action_flags |= actions->type ==
13123                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13124                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13125                                         MLX5_FLOW_ACTION_SET_TP_DST;
13126                         break;
13127                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13128                         if (flow_dv_convert_action_modify_dec_ttl
13129                                         (mhdr_res, items, &flow_attr, dev_flow,
13130                                          !!(action_flags &
13131                                          MLX5_FLOW_ACTION_DECAP), error))
13132                                 return -rte_errno;
13133                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13134                         break;
13135                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13136                         if (flow_dv_convert_action_modify_ttl
13137                                         (mhdr_res, actions, items, &flow_attr,
13138                                          dev_flow, !!(action_flags &
13139                                          MLX5_FLOW_ACTION_DECAP), error))
13140                                 return -rte_errno;
13141                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13142                         break;
13143                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13144                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13145                         if (flow_dv_convert_action_modify_tcp_seq
13146                                         (mhdr_res, actions, error))
13147                                 return -rte_errno;
13148                         action_flags |= actions->type ==
13149                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13150                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13151                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13152                         break;
13153
13154                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13155                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13156                         if (flow_dv_convert_action_modify_tcp_ack
13157                                         (mhdr_res, actions, error))
13158                                 return -rte_errno;
13159                         action_flags |= actions->type ==
13160                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13161                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13162                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13163                         break;
13164                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13165                         if (flow_dv_convert_action_set_reg
13166                                         (mhdr_res, actions, error))
13167                                 return -rte_errno;
13168                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13169                         break;
13170                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13171                         if (flow_dv_convert_action_copy_mreg
13172                                         (dev, mhdr_res, actions, error))
13173                                 return -rte_errno;
13174                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13175                         break;
13176                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13177                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13178                         dev_flow->handle->fate_action =
13179                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13180                         break;
13181                 case RTE_FLOW_ACTION_TYPE_METER:
13182                         if (!wks->fm)
13183                                 return rte_flow_error_set(error, rte_errno,
13184                                         RTE_FLOW_ERROR_TYPE_ACTION,
13185                                         NULL, "Failed to get meter in flow.");
13186                         /* Set the meter action. */
13187                         dev_flow->dv.actions[actions_n++] =
13188                                 wks->fm->meter_action;
13189                         action_flags |= MLX5_FLOW_ACTION_METER;
13190                         break;
13191                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13192                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13193                                                               actions, error))
13194                                 return -rte_errno;
13195                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13196                         break;
13197                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13198                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13199                                                               actions, error))
13200                                 return -rte_errno;
13201                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13202                         break;
13203                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13204                         sample_act_pos = actions_n;
13205                         sample = (const struct rte_flow_action_sample *)
13206                                  action->conf;
13207                         actions_n++;
13208                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13209                         /* put encap action into group if work with port id */
13210                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13211                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13212                                 sample_act->action_flags |=
13213                                                         MLX5_FLOW_ACTION_ENCAP;
13214                         break;
13215                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13216                         if (flow_dv_convert_action_modify_field
13217                                         (dev, mhdr_res, actions, attr, error))
13218                                 return -rte_errno;
13219                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13220                         break;
13221                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13222                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13223                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13224                         if (!ct)
13225                                 return rte_flow_error_set(error, EINVAL,
13226                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13227                                                 NULL,
13228                                                 "Failed to get CT object.");
13229                         if (mlx5_aso_ct_available(priv->sh, ct))
13230                                 return rte_flow_error_set(error, rte_errno,
13231                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13232                                                 NULL,
13233                                                 "CT is unavailable.");
13234                         if (ct->is_original)
13235                                 dev_flow->dv.actions[actions_n] =
13236                                                         ct->dr_action_orig;
13237                         else
13238                                 dev_flow->dv.actions[actions_n] =
13239                                                         ct->dr_action_rply;
13240                         if (flow->ct == 0) {
13241                                 flow->indirect_type =
13242                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13243                                 flow->ct = owner_idx;
13244                                 __atomic_fetch_add(&ct->refcnt, 1,
13245                                                    __ATOMIC_RELAXED);
13246                         }
13247                         actions_n++;
13248                         action_flags |= MLX5_FLOW_ACTION_CT;
13249                         break;
13250                 case RTE_FLOW_ACTION_TYPE_END:
13251                         actions_end = true;
13252                         if (mhdr_res->actions_num) {
13253                                 /* create modify action if needed. */
13254                                 if (flow_dv_modify_hdr_resource_register
13255                                         (dev, mhdr_res, dev_flow, error))
13256                                         return -rte_errno;
13257                                 dev_flow->dv.actions[modify_action_position] =
13258                                         handle->dvh.modify_hdr->action;
13259                         }
13260                         /*
13261                          * Handle AGE and COUNT action by single HW counter
13262                          * when they are not shared.
13263                          */
13264                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13265                                 if ((non_shared_age && count) ||
13266                                     !(priv->sh->flow_hit_aso_en &&
13267                                       (attr->group || attr->transfer))) {
13268                                         /* Creates age by counters. */
13269                                         cnt_act = flow_dv_prepare_counter
13270                                                                 (dev, dev_flow,
13271                                                                  flow, count,
13272                                                                  non_shared_age,
13273                                                                  error);
13274                                         if (!cnt_act)
13275                                                 return -rte_errno;
13276                                         dev_flow->dv.actions[age_act_pos] =
13277                                                                 cnt_act->action;
13278                                         break;
13279                                 }
13280                                 if (!flow->age && non_shared_age) {
13281                                         flow->age = flow_dv_aso_age_alloc
13282                                                                 (dev, error);
13283                                         if (!flow->age)
13284                                                 return -rte_errno;
13285                                         flow_dv_aso_age_params_init
13286                                                     (dev, flow->age,
13287                                                      non_shared_age->context ?
13288                                                      non_shared_age->context :
13289                                                      (void *)(uintptr_t)
13290                                                      (dev_flow->flow_idx),
13291                                                      non_shared_age->timeout);
13292                                 }
13293                                 age_act = flow_aso_age_get_by_idx(dev,
13294                                                                   flow->age);
13295                                 dev_flow->dv.actions[age_act_pos] =
13296                                                              age_act->dr_action;
13297                         }
13298                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13299                                 /*
13300                                  * Create one count action, to be used
13301                                  * by all sub-flows.
13302                                  */
13303                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13304                                                                   flow, count,
13305                                                                   NULL, error);
13306                                 if (!cnt_act)
13307                                         return -rte_errno;
13308                                 dev_flow->dv.actions[actions_n++] =
13309                                                                 cnt_act->action;
13310                         }
13311                 default:
13312                         break;
13313                 }
13314                 if (mhdr_res->actions_num &&
13315                     modify_action_position == UINT32_MAX)
13316                         modify_action_position = actions_n++;
13317         }
13318         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13319                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13320                 int item_type = items->type;
13321
13322                 if (!mlx5_flow_os_item_supported(item_type))
13323                         return rte_flow_error_set(error, ENOTSUP,
13324                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13325                                                   NULL, "item not supported");
13326                 switch (item_type) {
13327                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13328                         flow_dv_translate_item_port_id
13329                                 (dev, match_mask, match_value, items, attr);
13330                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13331                         break;
13332                 case RTE_FLOW_ITEM_TYPE_ETH:
13333                         flow_dv_translate_item_eth(match_mask, match_value,
13334                                                    items, tunnel,
13335                                                    dev_flow->dv.group);
13336                         matcher.priority = action_flags &
13337                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13338                                         !dev_flow->external ?
13339                                         MLX5_PRIORITY_MAP_L3 :
13340                                         MLX5_PRIORITY_MAP_L2;
13341                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13342                                              MLX5_FLOW_LAYER_OUTER_L2;
13343                         break;
13344                 case RTE_FLOW_ITEM_TYPE_VLAN:
13345                         flow_dv_translate_item_vlan(dev_flow,
13346                                                     match_mask, match_value,
13347                                                     items, tunnel,
13348                                                     dev_flow->dv.group);
13349                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13350                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13351                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13352                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13353                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13354                         break;
13355                 case RTE_FLOW_ITEM_TYPE_IPV4:
13356                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13357                                                   &item_flags, &tunnel);
13358                         flow_dv_translate_item_ipv4(match_mask, match_value,
13359                                                     items, tunnel,
13360                                                     dev_flow->dv.group);
13361                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13362                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13363                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13364                         if (items->mask != NULL &&
13365                             ((const struct rte_flow_item_ipv4 *)
13366                              items->mask)->hdr.next_proto_id) {
13367                                 next_protocol =
13368                                         ((const struct rte_flow_item_ipv4 *)
13369                                          (items->spec))->hdr.next_proto_id;
13370                                 next_protocol &=
13371                                         ((const struct rte_flow_item_ipv4 *)
13372                                          (items->mask))->hdr.next_proto_id;
13373                         } else {
13374                                 /* Reset for inner layer. */
13375                                 next_protocol = 0xff;
13376                         }
13377                         break;
13378                 case RTE_FLOW_ITEM_TYPE_IPV6:
13379                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13380                                                   &item_flags, &tunnel);
13381                         flow_dv_translate_item_ipv6(match_mask, match_value,
13382                                                     items, tunnel,
13383                                                     dev_flow->dv.group);
13384                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13385                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13386                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13387                         if (items->mask != NULL &&
13388                             ((const struct rte_flow_item_ipv6 *)
13389                              items->mask)->hdr.proto) {
13390                                 next_protocol =
13391                                         ((const struct rte_flow_item_ipv6 *)
13392                                          items->spec)->hdr.proto;
13393                                 next_protocol &=
13394                                         ((const struct rte_flow_item_ipv6 *)
13395                                          items->mask)->hdr.proto;
13396                         } else {
13397                                 /* Reset for inner layer. */
13398                                 next_protocol = 0xff;
13399                         }
13400                         break;
13401                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13402                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13403                                                              match_value,
13404                                                              items, tunnel);
13405                         last_item = tunnel ?
13406                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13407                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13408                         if (items->mask != NULL &&
13409                             ((const struct rte_flow_item_ipv6_frag_ext *)
13410                              items->mask)->hdr.next_header) {
13411                                 next_protocol =
13412                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13413                                  items->spec)->hdr.next_header;
13414                                 next_protocol &=
13415                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13416                                  items->mask)->hdr.next_header;
13417                         } else {
13418                                 /* Reset for inner layer. */
13419                                 next_protocol = 0xff;
13420                         }
13421                         break;
13422                 case RTE_FLOW_ITEM_TYPE_TCP:
13423                         flow_dv_translate_item_tcp(match_mask, match_value,
13424                                                    items, tunnel);
13425                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13426                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13427                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13428                         break;
13429                 case RTE_FLOW_ITEM_TYPE_UDP:
13430                         flow_dv_translate_item_udp(match_mask, match_value,
13431                                                    items, tunnel);
13432                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13433                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13434                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13435                         break;
13436                 case RTE_FLOW_ITEM_TYPE_GRE:
13437                         flow_dv_translate_item_gre(match_mask, match_value,
13438                                                    items, tunnel);
13439                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13440                         last_item = MLX5_FLOW_LAYER_GRE;
13441                         break;
13442                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13443                         flow_dv_translate_item_gre_key(match_mask,
13444                                                        match_value, items);
13445                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13446                         break;
13447                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13448                         flow_dv_translate_item_nvgre(match_mask, match_value,
13449                                                      items, tunnel);
13450                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13451                         last_item = MLX5_FLOW_LAYER_GRE;
13452                         break;
13453                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13454                         flow_dv_translate_item_vxlan(dev, attr,
13455                                                      match_mask, match_value,
13456                                                      items, tunnel);
13457                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13458                         last_item = MLX5_FLOW_LAYER_VXLAN;
13459                         break;
13460                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13461                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13462                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13463                         tunnel_item = items;
13464                         break;
13465                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13466                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13467                         last_item = MLX5_FLOW_LAYER_GENEVE;
13468                         tunnel_item = items;
13469                         break;
13470                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13471                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13472                                                           match_value,
13473                                                           items, error);
13474                         if (ret)
13475                                 return rte_flow_error_set(error, -ret,
13476                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13477                                         "cannot create GENEVE TLV option");
13478                         flow->geneve_tlv_option = 1;
13479                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13480                         break;
13481                 case RTE_FLOW_ITEM_TYPE_MPLS:
13482                         flow_dv_translate_item_mpls(match_mask, match_value,
13483                                                     items, last_item, tunnel);
13484                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13485                         last_item = MLX5_FLOW_LAYER_MPLS;
13486                         break;
13487                 case RTE_FLOW_ITEM_TYPE_MARK:
13488                         flow_dv_translate_item_mark(dev, match_mask,
13489                                                     match_value, items);
13490                         last_item = MLX5_FLOW_ITEM_MARK;
13491                         break;
13492                 case RTE_FLOW_ITEM_TYPE_META:
13493                         flow_dv_translate_item_meta(dev, match_mask,
13494                                                     match_value, attr, items);
13495                         last_item = MLX5_FLOW_ITEM_METADATA;
13496                         break;
13497                 case RTE_FLOW_ITEM_TYPE_ICMP:
13498                         flow_dv_translate_item_icmp(match_mask, match_value,
13499                                                     items, tunnel);
13500                         last_item = MLX5_FLOW_LAYER_ICMP;
13501                         break;
13502                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13503                         flow_dv_translate_item_icmp6(match_mask, match_value,
13504                                                       items, tunnel);
13505                         last_item = MLX5_FLOW_LAYER_ICMP6;
13506                         break;
13507                 case RTE_FLOW_ITEM_TYPE_TAG:
13508                         flow_dv_translate_item_tag(dev, match_mask,
13509                                                    match_value, items);
13510                         last_item = MLX5_FLOW_ITEM_TAG;
13511                         break;
13512                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13513                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13514                                                         match_value, items);
13515                         last_item = MLX5_FLOW_ITEM_TAG;
13516                         break;
13517                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13518                         flow_dv_translate_item_tx_queue(dev, match_mask,
13519                                                         match_value,
13520                                                         items);
13521                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13522                         break;
13523                 case RTE_FLOW_ITEM_TYPE_GTP:
13524                         flow_dv_translate_item_gtp(match_mask, match_value,
13525                                                    items, tunnel);
13526                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13527                         last_item = MLX5_FLOW_LAYER_GTP;
13528                         break;
13529                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13530                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13531                                                           match_value,
13532                                                           items);
13533                         if (ret)
13534                                 return rte_flow_error_set(error, -ret,
13535                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13536                                         "cannot create GTP PSC item");
13537                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13538                         break;
13539                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13540                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13541                                 /* Create it only the first time to be used. */
13542                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13543                                 if (ret)
13544                                         return rte_flow_error_set
13545                                                 (error, -ret,
13546                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13547                                                 NULL,
13548                                                 "cannot create eCPRI parser");
13549                         }
13550                         flow_dv_translate_item_ecpri(dev, match_mask,
13551                                                      match_value, items,
13552                                                      last_item);
13553                         /* No other protocol should follow eCPRI layer. */
13554                         last_item = MLX5_FLOW_LAYER_ECPRI;
13555                         break;
13556                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13557                         flow_dv_translate_item_integrity(items, integrity_items,
13558                                                          &last_item);
13559                         break;
13560                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13561                         flow_dv_translate_item_aso_ct(dev, match_mask,
13562                                                       match_value, items);
13563                         break;
13564                 case RTE_FLOW_ITEM_TYPE_FLEX:
13565                         flow_dv_translate_item_flex(dev, match_mask,
13566                                                     match_value, items,
13567                                                     dev_flow, tunnel != 0);
13568                         last_item = tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
13569                                     MLX5_FLOW_ITEM_OUTER_FLEX;
13570                         break;
13571                 default:
13572                         break;
13573                 }
13574                 item_flags |= last_item;
13575         }
13576         /*
13577          * When E-Switch mode is enabled, we have two cases where we need to
13578          * set the source port manually.
13579          * The first one, is in case of Nic steering rule, and the second is
13580          * E-Switch rule where no port_id item was found. In both cases
13581          * the source port is set according the current port in use.
13582          */
13583         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13584             (priv->representor || priv->master)) {
13585                 if (flow_dv_translate_item_port_id(dev, match_mask,
13586                                                    match_value, NULL, attr))
13587                         return -rte_errno;
13588         }
13589         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13590                 flow_dv_translate_item_integrity_post(match_mask, match_value,
13591                                                       integrity_items,
13592                                                       item_flags);
13593         }
13594         if (item_flags & MLX5_FLOW_LAYER_VXLAN_GPE)
13595                 flow_dv_translate_item_vxlan_gpe(match_mask, match_value,
13596                                                  tunnel_item, item_flags);
13597         else if (item_flags & MLX5_FLOW_LAYER_GENEVE)
13598                 flow_dv_translate_item_geneve(match_mask, match_value,
13599                                               tunnel_item, item_flags);
13600 #ifdef RTE_LIBRTE_MLX5_DEBUG
13601         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13602                                               dev_flow->dv.value.buf));
13603 #endif
13604         /*
13605          * Layers may be already initialized from prefix flow if this dev_flow
13606          * is the suffix flow.
13607          */
13608         handle->layers |= item_flags;
13609         if (action_flags & MLX5_FLOW_ACTION_RSS)
13610                 flow_dv_hashfields_set(dev_flow, rss_desc);
13611         /* If has RSS action in the sample action, the Sample/Mirror resource
13612          * should be registered after the hash filed be update.
13613          */
13614         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13615                 ret = flow_dv_translate_action_sample(dev,
13616                                                       sample,
13617                                                       dev_flow, attr,
13618                                                       &num_of_dest,
13619                                                       sample_actions,
13620                                                       &sample_res,
13621                                                       error);
13622                 if (ret < 0)
13623                         return ret;
13624                 ret = flow_dv_create_action_sample(dev,
13625                                                    dev_flow,
13626                                                    num_of_dest,
13627                                                    &sample_res,
13628                                                    &mdest_res,
13629                                                    sample_actions,
13630                                                    action_flags,
13631                                                    error);
13632                 if (ret < 0)
13633                         return rte_flow_error_set
13634                                                 (error, rte_errno,
13635                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13636                                                 NULL,
13637                                                 "cannot create sample action");
13638                 if (num_of_dest > 1) {
13639                         dev_flow->dv.actions[sample_act_pos] =
13640                         dev_flow->dv.dest_array_res->action;
13641                 } else {
13642                         dev_flow->dv.actions[sample_act_pos] =
13643                         dev_flow->dv.sample_res->verbs_action;
13644                 }
13645         }
13646         /*
13647          * For multiple destination (sample action with ratio=1), the encap
13648          * action and port id action will be combined into group action.
13649          * So need remove the original these actions in the flow and only
13650          * use the sample action instead of.
13651          */
13652         if (num_of_dest > 1 &&
13653             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13654                 int i;
13655                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13656
13657                 for (i = 0; i < actions_n; i++) {
13658                         if ((sample_act->dr_encap_action &&
13659                                 sample_act->dr_encap_action ==
13660                                 dev_flow->dv.actions[i]) ||
13661                                 (sample_act->dr_port_id_action &&
13662                                 sample_act->dr_port_id_action ==
13663                                 dev_flow->dv.actions[i]) ||
13664                                 (sample_act->dr_jump_action &&
13665                                 sample_act->dr_jump_action ==
13666                                 dev_flow->dv.actions[i]))
13667                                 continue;
13668                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13669                 }
13670                 memcpy((void *)dev_flow->dv.actions,
13671                                 (void *)temp_actions,
13672                                 tmp_actions_n * sizeof(void *));
13673                 actions_n = tmp_actions_n;
13674         }
13675         dev_flow->dv.actions_n = actions_n;
13676         dev_flow->act_flags = action_flags;
13677         if (wks->skip_matcher_reg)
13678                 return 0;
13679         /* Register matcher. */
13680         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13681                                     matcher.mask.size);
13682         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13683                                                      matcher.priority,
13684                                                      dev_flow->external);
13685         /**
13686          * When creating meter drop flow in drop table, using original
13687          * 5-tuple match, the matcher priority should be lower than
13688          * mtr_id matcher.
13689          */
13690         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13691             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13692             matcher.priority <= MLX5_REG_BITS)
13693                 matcher.priority += MLX5_REG_BITS;
13694         /* reserved field no needs to be set to 0 here. */
13695         tbl_key.is_fdb = attr->transfer;
13696         tbl_key.is_egress = attr->egress;
13697         tbl_key.level = dev_flow->dv.group;
13698         tbl_key.id = dev_flow->dv.table_id;
13699         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13700                                      tunnel, attr->group, error))
13701                 return -rte_errno;
13702         return 0;
13703 }
13704
13705 /**
13706  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13707  * and tunnel.
13708  *
13709  * @param[in, out] action
13710  *   Shred RSS action holding hash RX queue objects.
13711  * @param[in] hash_fields
13712  *   Defines combination of packet fields to participate in RX hash.
13713  * @param[in] tunnel
13714  *   Tunnel type
13715  * @param[in] hrxq_idx
13716  *   Hash RX queue index to set.
13717  *
13718  * @return
13719  *   0 on success, otherwise negative errno value.
13720  */
13721 static int
13722 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13723                               const uint64_t hash_fields,
13724                               uint32_t hrxq_idx)
13725 {
13726         uint32_t *hrxqs = action->hrxq;
13727
13728         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13729         case MLX5_RSS_HASH_IPV4:
13730                 /* fall-through. */
13731         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13732                 /* fall-through. */
13733         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13734                 hrxqs[0] = hrxq_idx;
13735                 return 0;
13736         case MLX5_RSS_HASH_IPV4_TCP:
13737                 /* fall-through. */
13738         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13739                 /* fall-through. */
13740         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13741                 hrxqs[1] = hrxq_idx;
13742                 return 0;
13743         case MLX5_RSS_HASH_IPV4_UDP:
13744                 /* fall-through. */
13745         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13746                 /* fall-through. */
13747         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13748                 hrxqs[2] = hrxq_idx;
13749                 return 0;
13750         case MLX5_RSS_HASH_IPV6:
13751                 /* fall-through. */
13752         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13753                 /* fall-through. */
13754         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13755                 hrxqs[3] = hrxq_idx;
13756                 return 0;
13757         case MLX5_RSS_HASH_IPV6_TCP:
13758                 /* fall-through. */
13759         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13760                 /* fall-through. */
13761         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13762                 hrxqs[4] = hrxq_idx;
13763                 return 0;
13764         case MLX5_RSS_HASH_IPV6_UDP:
13765                 /* fall-through. */
13766         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13767                 /* fall-through. */
13768         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13769                 hrxqs[5] = hrxq_idx;
13770                 return 0;
13771         case MLX5_RSS_HASH_NONE:
13772                 hrxqs[6] = hrxq_idx;
13773                 return 0;
13774         default:
13775                 return -1;
13776         }
13777 }
13778
13779 /**
13780  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13781  * and tunnel.
13782  *
13783  * @param[in] dev
13784  *   Pointer to the Ethernet device structure.
13785  * @param[in] idx
13786  *   Shared RSS action ID holding hash RX queue objects.
13787  * @param[in] hash_fields
13788  *   Defines combination of packet fields to participate in RX hash.
13789  * @param[in] tunnel
13790  *   Tunnel type
13791  *
13792  * @return
13793  *   Valid hash RX queue index, otherwise 0.
13794  */
13795 static uint32_t
13796 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13797                                  const uint64_t hash_fields)
13798 {
13799         struct mlx5_priv *priv = dev->data->dev_private;
13800         struct mlx5_shared_action_rss *shared_rss =
13801             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13802         const uint32_t *hrxqs = shared_rss->hrxq;
13803
13804         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13805         case MLX5_RSS_HASH_IPV4:
13806                 /* fall-through. */
13807         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13808                 /* fall-through. */
13809         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13810                 return hrxqs[0];
13811         case MLX5_RSS_HASH_IPV4_TCP:
13812                 /* fall-through. */
13813         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13814                 /* fall-through. */
13815         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13816                 return hrxqs[1];
13817         case MLX5_RSS_HASH_IPV4_UDP:
13818                 /* fall-through. */
13819         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13820                 /* fall-through. */
13821         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13822                 return hrxqs[2];
13823         case MLX5_RSS_HASH_IPV6:
13824                 /* fall-through. */
13825         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13826                 /* fall-through. */
13827         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13828                 return hrxqs[3];
13829         case MLX5_RSS_HASH_IPV6_TCP:
13830                 /* fall-through. */
13831         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13832                 /* fall-through. */
13833         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13834                 return hrxqs[4];
13835         case MLX5_RSS_HASH_IPV6_UDP:
13836                 /* fall-through. */
13837         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13838                 /* fall-through. */
13839         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13840                 return hrxqs[5];
13841         case MLX5_RSS_HASH_NONE:
13842                 return hrxqs[6];
13843         default:
13844                 return 0;
13845         }
13846
13847 }
13848
13849 /**
13850  * Apply the flow to the NIC, lock free,
13851  * (mutex should be acquired by caller).
13852  *
13853  * @param[in] dev
13854  *   Pointer to the Ethernet device structure.
13855  * @param[in, out] flow
13856  *   Pointer to flow structure.
13857  * @param[out] error
13858  *   Pointer to error structure.
13859  *
13860  * @return
13861  *   0 on success, a negative errno value otherwise and rte_errno is set.
13862  */
13863 static int
13864 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13865               struct rte_flow_error *error)
13866 {
13867         struct mlx5_flow_dv_workspace *dv;
13868         struct mlx5_flow_handle *dh;
13869         struct mlx5_flow_handle_dv *dv_h;
13870         struct mlx5_flow *dev_flow;
13871         struct mlx5_priv *priv = dev->data->dev_private;
13872         uint32_t handle_idx;
13873         int n;
13874         int err;
13875         int idx;
13876         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13877         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13878         uint8_t misc_mask;
13879
13880         MLX5_ASSERT(wks);
13881         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13882                 dev_flow = &wks->flows[idx];
13883                 dv = &dev_flow->dv;
13884                 dh = dev_flow->handle;
13885                 dv_h = &dh->dvh;
13886                 n = dv->actions_n;
13887                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13888                         if (dv->transfer) {
13889                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13890                                 dv->actions[n++] = priv->sh->dr_drop_action;
13891                         } else {
13892 #ifdef HAVE_MLX5DV_DR
13893                                 /* DR supports drop action placeholder. */
13894                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13895                                 dv->actions[n++] = dv->group ?
13896                                         priv->sh->dr_drop_action :
13897                                         priv->root_drop_action;
13898 #else
13899                                 /* For DV we use the explicit drop queue. */
13900                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13901                                 dv->actions[n++] =
13902                                                 priv->drop_queue.hrxq->action;
13903 #endif
13904                         }
13905                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13906                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13907                         struct mlx5_hrxq *hrxq;
13908                         uint32_t hrxq_idx;
13909
13910                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13911                                                     &hrxq_idx);
13912                         if (!hrxq) {
13913                                 rte_flow_error_set
13914                                         (error, rte_errno,
13915                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13916                                          "cannot get hash queue");
13917                                 goto error;
13918                         }
13919                         dh->rix_hrxq = hrxq_idx;
13920                         dv->actions[n++] = hrxq->action;
13921                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13922                         struct mlx5_hrxq *hrxq = NULL;
13923                         uint32_t hrxq_idx;
13924
13925                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13926                                                 rss_desc->shared_rss,
13927                                                 dev_flow->hash_fields);
13928                         if (hrxq_idx)
13929                                 hrxq = mlx5_ipool_get
13930                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13931                                          hrxq_idx);
13932                         if (!hrxq) {
13933                                 rte_flow_error_set
13934                                         (error, rte_errno,
13935                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13936                                          "cannot get hash queue");
13937                                 goto error;
13938                         }
13939                         dh->rix_srss = rss_desc->shared_rss;
13940                         dv->actions[n++] = hrxq->action;
13941                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13942                         if (!priv->sh->default_miss_action) {
13943                                 rte_flow_error_set
13944                                         (error, rte_errno,
13945                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13946                                          "default miss action not be created.");
13947                                 goto error;
13948                         }
13949                         dv->actions[n++] = priv->sh->default_miss_action;
13950                 }
13951                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13952                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13953                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13954                                                (void *)&dv->value, n,
13955                                                dv->actions, &dh->drv_flow);
13956                 if (err) {
13957                         rte_flow_error_set
13958                                 (error, errno,
13959                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13960                                 NULL,
13961                                 (!priv->config.allow_duplicate_pattern &&
13962                                 errno == EEXIST) ?
13963                                 "duplicating pattern is not allowed" :
13964                                 "hardware refuses to create flow");
13965                         goto error;
13966                 }
13967                 if (priv->vmwa_context &&
13968                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
13969                         /*
13970                          * The rule contains the VLAN pattern.
13971                          * For VF we are going to create VLAN
13972                          * interface to make hypervisor set correct
13973                          * e-Switch vport context.
13974                          */
13975                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13976                 }
13977         }
13978         return 0;
13979 error:
13980         err = rte_errno; /* Save rte_errno before cleanup. */
13981         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13982                        handle_idx, dh, next) {
13983                 /* hrxq is union, don't clear it if the flag is not set. */
13984                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13985                         mlx5_hrxq_release(dev, dh->rix_hrxq);
13986                         dh->rix_hrxq = 0;
13987                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13988                         dh->rix_srss = 0;
13989                 }
13990                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13991                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13992         }
13993         rte_errno = err; /* Restore rte_errno. */
13994         return -rte_errno;
13995 }
13996
13997 void
13998 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13999                           struct mlx5_list_entry *entry)
14000 {
14001         struct mlx5_flow_dv_matcher *resource = container_of(entry,
14002                                                              typeof(*resource),
14003                                                              entry);
14004
14005         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
14006         mlx5_free(resource);
14007 }
14008
14009 /**
14010  * Release the flow matcher.
14011  *
14012  * @param dev
14013  *   Pointer to Ethernet device.
14014  * @param port_id
14015  *   Index to port ID action resource.
14016  *
14017  * @return
14018  *   1 while a reference on it exists, 0 when freed.
14019  */
14020 static int
14021 flow_dv_matcher_release(struct rte_eth_dev *dev,
14022                         struct mlx5_flow_handle *handle)
14023 {
14024         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
14025         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
14026                                                             typeof(*tbl), tbl);
14027         int ret;
14028
14029         MLX5_ASSERT(matcher->matcher_object);
14030         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
14031         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
14032         return ret;
14033 }
14034
14035 void
14036 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14037 {
14038         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14039         struct mlx5_flow_dv_encap_decap_resource *res =
14040                                        container_of(entry, typeof(*res), entry);
14041
14042         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14043         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
14044 }
14045
14046 /**
14047  * Release an encap/decap resource.
14048  *
14049  * @param dev
14050  *   Pointer to Ethernet device.
14051  * @param encap_decap_idx
14052  *   Index of encap decap resource.
14053  *
14054  * @return
14055  *   1 while a reference on it exists, 0 when freed.
14056  */
14057 static int
14058 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
14059                                      uint32_t encap_decap_idx)
14060 {
14061         struct mlx5_priv *priv = dev->data->dev_private;
14062         struct mlx5_flow_dv_encap_decap_resource *resource;
14063
14064         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
14065                                   encap_decap_idx);
14066         if (!resource)
14067                 return 0;
14068         MLX5_ASSERT(resource->action);
14069         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
14070 }
14071
14072 /**
14073  * Release an jump to table action resource.
14074  *
14075  * @param dev
14076  *   Pointer to Ethernet device.
14077  * @param rix_jump
14078  *   Index to the jump action resource.
14079  *
14080  * @return
14081  *   1 while a reference on it exists, 0 when freed.
14082  */
14083 static int
14084 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
14085                                   uint32_t rix_jump)
14086 {
14087         struct mlx5_priv *priv = dev->data->dev_private;
14088         struct mlx5_flow_tbl_data_entry *tbl_data;
14089
14090         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
14091                                   rix_jump);
14092         if (!tbl_data)
14093                 return 0;
14094         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14095 }
14096
14097 void
14098 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14099 {
14100         struct mlx5_flow_dv_modify_hdr_resource *res =
14101                 container_of(entry, typeof(*res), entry);
14102         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14103
14104         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14105         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14106 }
14107
14108 /**
14109  * Release a modify-header resource.
14110  *
14111  * @param dev
14112  *   Pointer to Ethernet device.
14113  * @param handle
14114  *   Pointer to mlx5_flow_handle.
14115  *
14116  * @return
14117  *   1 while a reference on it exists, 0 when freed.
14118  */
14119 static int
14120 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14121                                     struct mlx5_flow_handle *handle)
14122 {
14123         struct mlx5_priv *priv = dev->data->dev_private;
14124         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14125
14126         MLX5_ASSERT(entry->action);
14127         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14128 }
14129
14130 void
14131 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14132 {
14133         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14134         struct mlx5_flow_dv_port_id_action_resource *resource =
14135                                   container_of(entry, typeof(*resource), entry);
14136
14137         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14138         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14139 }
14140
14141 /**
14142  * Release port ID action resource.
14143  *
14144  * @param dev
14145  *   Pointer to Ethernet device.
14146  * @param handle
14147  *   Pointer to mlx5_flow_handle.
14148  *
14149  * @return
14150  *   1 while a reference on it exists, 0 when freed.
14151  */
14152 static int
14153 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14154                                         uint32_t port_id)
14155 {
14156         struct mlx5_priv *priv = dev->data->dev_private;
14157         struct mlx5_flow_dv_port_id_action_resource *resource;
14158
14159         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14160         if (!resource)
14161                 return 0;
14162         MLX5_ASSERT(resource->action);
14163         return mlx5_list_unregister(priv->sh->port_id_action_list,
14164                                     &resource->entry);
14165 }
14166
14167 /**
14168  * Release shared RSS action resource.
14169  *
14170  * @param dev
14171  *   Pointer to Ethernet device.
14172  * @param srss
14173  *   Shared RSS action index.
14174  */
14175 static void
14176 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14177 {
14178         struct mlx5_priv *priv = dev->data->dev_private;
14179         struct mlx5_shared_action_rss *shared_rss;
14180
14181         shared_rss = mlx5_ipool_get
14182                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14183         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14184 }
14185
14186 void
14187 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14188 {
14189         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14190         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14191                         container_of(entry, typeof(*resource), entry);
14192
14193         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14194         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14195 }
14196
14197 /**
14198  * Release push vlan action resource.
14199  *
14200  * @param dev
14201  *   Pointer to Ethernet device.
14202  * @param handle
14203  *   Pointer to mlx5_flow_handle.
14204  *
14205  * @return
14206  *   1 while a reference on it exists, 0 when freed.
14207  */
14208 static int
14209 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14210                                           struct mlx5_flow_handle *handle)
14211 {
14212         struct mlx5_priv *priv = dev->data->dev_private;
14213         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14214         uint32_t idx = handle->dvh.rix_push_vlan;
14215
14216         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14217         if (!resource)
14218                 return 0;
14219         MLX5_ASSERT(resource->action);
14220         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14221                                     &resource->entry);
14222 }
14223
14224 /**
14225  * Release the fate resource.
14226  *
14227  * @param dev
14228  *   Pointer to Ethernet device.
14229  * @param handle
14230  *   Pointer to mlx5_flow_handle.
14231  */
14232 static void
14233 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14234                                struct mlx5_flow_handle *handle)
14235 {
14236         if (!handle->rix_fate)
14237                 return;
14238         switch (handle->fate_action) {
14239         case MLX5_FLOW_FATE_QUEUE:
14240                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14241                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14242                 break;
14243         case MLX5_FLOW_FATE_JUMP:
14244                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14245                 break;
14246         case MLX5_FLOW_FATE_PORT_ID:
14247                 flow_dv_port_id_action_resource_release(dev,
14248                                 handle->rix_port_id_action);
14249                 break;
14250         default:
14251                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14252                 break;
14253         }
14254         handle->rix_fate = 0;
14255 }
14256
14257 void
14258 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14259                          struct mlx5_list_entry *entry)
14260 {
14261         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14262                                                               typeof(*resource),
14263                                                               entry);
14264         struct rte_eth_dev *dev = resource->dev;
14265         struct mlx5_priv *priv = dev->data->dev_private;
14266
14267         if (resource->verbs_action)
14268                 claim_zero(mlx5_flow_os_destroy_flow_action
14269                                                       (resource->verbs_action));
14270         if (resource->normal_path_tbl)
14271                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14272                                              resource->normal_path_tbl);
14273         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14274         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14275         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14276 }
14277
14278 /**
14279  * Release an sample resource.
14280  *
14281  * @param dev
14282  *   Pointer to Ethernet device.
14283  * @param handle
14284  *   Pointer to mlx5_flow_handle.
14285  *
14286  * @return
14287  *   1 while a reference on it exists, 0 when freed.
14288  */
14289 static int
14290 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14291                                      struct mlx5_flow_handle *handle)
14292 {
14293         struct mlx5_priv *priv = dev->data->dev_private;
14294         struct mlx5_flow_dv_sample_resource *resource;
14295
14296         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14297                                   handle->dvh.rix_sample);
14298         if (!resource)
14299                 return 0;
14300         MLX5_ASSERT(resource->verbs_action);
14301         return mlx5_list_unregister(priv->sh->sample_action_list,
14302                                     &resource->entry);
14303 }
14304
14305 void
14306 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14307                              struct mlx5_list_entry *entry)
14308 {
14309         struct mlx5_flow_dv_dest_array_resource *resource =
14310                         container_of(entry, typeof(*resource), entry);
14311         struct rte_eth_dev *dev = resource->dev;
14312         struct mlx5_priv *priv = dev->data->dev_private;
14313         uint32_t i = 0;
14314
14315         MLX5_ASSERT(resource->action);
14316         if (resource->action)
14317                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14318         for (; i < resource->num_of_dest; i++)
14319                 flow_dv_sample_sub_actions_release(dev,
14320                                                    &resource->sample_idx[i]);
14321         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14322         DRV_LOG(DEBUG, "destination array resource %p: removed",
14323                 (void *)resource);
14324 }
14325
14326 /**
14327  * Release an destination array resource.
14328  *
14329  * @param dev
14330  *   Pointer to Ethernet device.
14331  * @param handle
14332  *   Pointer to mlx5_flow_handle.
14333  *
14334  * @return
14335  *   1 while a reference on it exists, 0 when freed.
14336  */
14337 static int
14338 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14339                                     struct mlx5_flow_handle *handle)
14340 {
14341         struct mlx5_priv *priv = dev->data->dev_private;
14342         struct mlx5_flow_dv_dest_array_resource *resource;
14343
14344         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14345                                   handle->dvh.rix_dest_array);
14346         if (!resource)
14347                 return 0;
14348         MLX5_ASSERT(resource->action);
14349         return mlx5_list_unregister(priv->sh->dest_array_list,
14350                                     &resource->entry);
14351 }
14352
14353 static void
14354 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14355 {
14356         struct mlx5_priv *priv = dev->data->dev_private;
14357         struct mlx5_dev_ctx_shared *sh = priv->sh;
14358         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14359                                 sh->geneve_tlv_option_resource;
14360         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14361         if (geneve_opt_resource) {
14362                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14363                                          __ATOMIC_RELAXED))) {
14364                         claim_zero(mlx5_devx_cmd_destroy
14365                                         (geneve_opt_resource->obj));
14366                         mlx5_free(sh->geneve_tlv_option_resource);
14367                         sh->geneve_tlv_option_resource = NULL;
14368                 }
14369         }
14370         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14371 }
14372
14373 /**
14374  * Remove the flow from the NIC but keeps it in memory.
14375  * Lock free, (mutex should be acquired by caller).
14376  *
14377  * @param[in] dev
14378  *   Pointer to Ethernet device.
14379  * @param[in, out] flow
14380  *   Pointer to flow structure.
14381  */
14382 static void
14383 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14384 {
14385         struct mlx5_flow_handle *dh;
14386         uint32_t handle_idx;
14387         struct mlx5_priv *priv = dev->data->dev_private;
14388
14389         if (!flow)
14390                 return;
14391         handle_idx = flow->dev_handles;
14392         while (handle_idx) {
14393                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14394                                     handle_idx);
14395                 if (!dh)
14396                         return;
14397                 if (dh->drv_flow) {
14398                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14399                         dh->drv_flow = NULL;
14400                 }
14401                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14402                         flow_dv_fate_resource_release(dev, dh);
14403                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14404                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14405                 handle_idx = dh->next.next;
14406         }
14407 }
14408
14409 /**
14410  * Remove the flow from the NIC and the memory.
14411  * Lock free, (mutex should be acquired by caller).
14412  *
14413  * @param[in] dev
14414  *   Pointer to the Ethernet device structure.
14415  * @param[in, out] flow
14416  *   Pointer to flow structure.
14417  */
14418 static void
14419 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14420 {
14421         struct mlx5_flow_handle *dev_handle;
14422         struct mlx5_priv *priv = dev->data->dev_private;
14423         struct mlx5_flow_meter_info *fm = NULL;
14424         uint32_t srss = 0;
14425
14426         if (!flow)
14427                 return;
14428         flow_dv_remove(dev, flow);
14429         if (flow->counter) {
14430                 flow_dv_counter_free(dev, flow->counter);
14431                 flow->counter = 0;
14432         }
14433         if (flow->meter) {
14434                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14435                 if (fm)
14436                         mlx5_flow_meter_detach(priv, fm);
14437                 flow->meter = 0;
14438         }
14439         /* Keep the current age handling by default. */
14440         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14441                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14442         else if (flow->age)
14443                 flow_dv_aso_age_release(dev, flow->age);
14444         if (flow->geneve_tlv_option) {
14445                 flow_dv_geneve_tlv_option_resource_release(dev);
14446                 flow->geneve_tlv_option = 0;
14447         }
14448         while (flow->dev_handles) {
14449                 uint32_t tmp_idx = flow->dev_handles;
14450
14451                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14452                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14453                 if (!dev_handle)
14454                         return;
14455                 flow->dev_handles = dev_handle->next.next;
14456                 while (dev_handle->flex_item) {
14457                         int index = rte_bsf32(dev_handle->flex_item);
14458
14459                         mlx5_flex_release_index(dev, index);
14460                         dev_handle->flex_item &= ~RTE_BIT32(index);
14461                 }
14462                 if (dev_handle->dvh.matcher)
14463                         flow_dv_matcher_release(dev, dev_handle);
14464                 if (dev_handle->dvh.rix_sample)
14465                         flow_dv_sample_resource_release(dev, dev_handle);
14466                 if (dev_handle->dvh.rix_dest_array)
14467                         flow_dv_dest_array_resource_release(dev, dev_handle);
14468                 if (dev_handle->dvh.rix_encap_decap)
14469                         flow_dv_encap_decap_resource_release(dev,
14470                                 dev_handle->dvh.rix_encap_decap);
14471                 if (dev_handle->dvh.modify_hdr)
14472                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14473                 if (dev_handle->dvh.rix_push_vlan)
14474                         flow_dv_push_vlan_action_resource_release(dev,
14475                                                                   dev_handle);
14476                 if (dev_handle->dvh.rix_tag)
14477                         flow_dv_tag_release(dev,
14478                                             dev_handle->dvh.rix_tag);
14479                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14480                         flow_dv_fate_resource_release(dev, dev_handle);
14481                 else if (!srss)
14482                         srss = dev_handle->rix_srss;
14483                 if (fm && dev_handle->is_meter_flow_id &&
14484                     dev_handle->split_flow_id)
14485                         mlx5_ipool_free(fm->flow_ipool,
14486                                         dev_handle->split_flow_id);
14487                 else if (dev_handle->split_flow_id &&
14488                     !dev_handle->is_meter_flow_id)
14489                         mlx5_ipool_free(priv->sh->ipool
14490                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14491                                         dev_handle->split_flow_id);
14492                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14493                            tmp_idx);
14494         }
14495         if (srss)
14496                 flow_dv_shared_rss_action_release(dev, srss);
14497 }
14498
14499 /**
14500  * Release array of hash RX queue objects.
14501  * Helper function.
14502  *
14503  * @param[in] dev
14504  *   Pointer to the Ethernet device structure.
14505  * @param[in, out] hrxqs
14506  *   Array of hash RX queue objects.
14507  *
14508  * @return
14509  *   Total number of references to hash RX queue objects in *hrxqs* array
14510  *   after this operation.
14511  */
14512 static int
14513 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14514                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14515 {
14516         size_t i;
14517         int remaining = 0;
14518
14519         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14520                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14521
14522                 if (!ret)
14523                         (*hrxqs)[i] = 0;
14524                 remaining += ret;
14525         }
14526         return remaining;
14527 }
14528
14529 /**
14530  * Release all hash RX queue objects representing shared RSS action.
14531  *
14532  * @param[in] dev
14533  *   Pointer to the Ethernet device structure.
14534  * @param[in, out] action
14535  *   Shared RSS action to remove hash RX queue objects from.
14536  *
14537  * @return
14538  *   Total number of references to hash RX queue objects stored in *action*
14539  *   after this operation.
14540  *   Expected to be 0 if no external references held.
14541  */
14542 static int
14543 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14544                                  struct mlx5_shared_action_rss *shared_rss)
14545 {
14546         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14547 }
14548
14549 /**
14550  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14551  * user input.
14552  *
14553  * Only one hash value is available for one L3+L4 combination:
14554  * for example:
14555  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14556  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14557  * same slot in mlx5_rss_hash_fields.
14558  *
14559  * @param[in] rss
14560  *   Pointer to the shared action RSS conf.
14561  * @param[in, out] hash_field
14562  *   hash_field variable needed to be adjusted.
14563  *
14564  * @return
14565  *   void
14566  */
14567 static void
14568 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14569                                      uint64_t *hash_field)
14570 {
14571         uint64_t rss_types = rss->origin.types;
14572
14573         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14574         case MLX5_RSS_HASH_IPV4:
14575                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14576                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14577                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14578                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14579                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14580                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14581                         else
14582                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14583                 }
14584                 return;
14585         case MLX5_RSS_HASH_IPV6:
14586                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14587                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14588                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14589                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14590                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14591                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14592                         else
14593                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14594                 }
14595                 return;
14596         case MLX5_RSS_HASH_IPV4_UDP:
14597                 /* fall-through. */
14598         case MLX5_RSS_HASH_IPV6_UDP:
14599                 if (rss_types & RTE_ETH_RSS_UDP) {
14600                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14601                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14602                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14603                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14604                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14605                         else
14606                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14607                 }
14608                 return;
14609         case MLX5_RSS_HASH_IPV4_TCP:
14610                 /* fall-through. */
14611         case MLX5_RSS_HASH_IPV6_TCP:
14612                 if (rss_types & RTE_ETH_RSS_TCP) {
14613                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14614                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14615                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14616                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14617                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14618                         else
14619                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14620                 }
14621                 return;
14622         default:
14623                 return;
14624         }
14625 }
14626
14627 /**
14628  * Setup shared RSS action.
14629  * Prepare set of hash RX queue objects sufficient to handle all valid
14630  * hash_fields combinations (see enum ibv_rx_hash_fields).
14631  *
14632  * @param[in] dev
14633  *   Pointer to the Ethernet device structure.
14634  * @param[in] action_idx
14635  *   Shared RSS action ipool index.
14636  * @param[in, out] action
14637  *   Partially initialized shared RSS action.
14638  * @param[out] error
14639  *   Perform verbose error reporting if not NULL. Initialized in case of
14640  *   error only.
14641  *
14642  * @return
14643  *   0 on success, otherwise negative errno value.
14644  */
14645 static int
14646 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14647                            uint32_t action_idx,
14648                            struct mlx5_shared_action_rss *shared_rss,
14649                            struct rte_flow_error *error)
14650 {
14651         struct mlx5_flow_rss_desc rss_desc = { 0 };
14652         size_t i;
14653         int err;
14654
14655         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14656                 return rte_flow_error_set(error, rte_errno,
14657                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14658                                           "cannot setup indirection table");
14659         }
14660         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14661         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14662         rss_desc.const_q = shared_rss->origin.queue;
14663         rss_desc.queue_num = shared_rss->origin.queue_num;
14664         /* Set non-zero value to indicate a shared RSS. */
14665         rss_desc.shared_rss = action_idx;
14666         rss_desc.ind_tbl = shared_rss->ind_tbl;
14667         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14668                 uint32_t hrxq_idx;
14669                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14670                 int tunnel = 0;
14671
14672                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14673                 if (shared_rss->origin.level > 1) {
14674                         hash_fields |= IBV_RX_HASH_INNER;
14675                         tunnel = 1;
14676                 }
14677                 rss_desc.tunnel = tunnel;
14678                 rss_desc.hash_fields = hash_fields;
14679                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14680                 if (!hrxq_idx) {
14681                         rte_flow_error_set
14682                                 (error, rte_errno,
14683                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14684                                  "cannot get hash queue");
14685                         goto error_hrxq_new;
14686                 }
14687                 err = __flow_dv_action_rss_hrxq_set
14688                         (shared_rss, hash_fields, hrxq_idx);
14689                 MLX5_ASSERT(!err);
14690         }
14691         return 0;
14692 error_hrxq_new:
14693         err = rte_errno;
14694         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14695         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14696                 shared_rss->ind_tbl = NULL;
14697         rte_errno = err;
14698         return -rte_errno;
14699 }
14700
14701 /**
14702  * Create shared RSS action.
14703  *
14704  * @param[in] dev
14705  *   Pointer to the Ethernet device structure.
14706  * @param[in] conf
14707  *   Shared action configuration.
14708  * @param[in] rss
14709  *   RSS action specification used to create shared action.
14710  * @param[out] error
14711  *   Perform verbose error reporting if not NULL. Initialized in case of
14712  *   error only.
14713  *
14714  * @return
14715  *   A valid shared action ID in case of success, 0 otherwise and
14716  *   rte_errno is set.
14717  */
14718 static uint32_t
14719 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14720                             const struct rte_flow_indir_action_conf *conf,
14721                             const struct rte_flow_action_rss *rss,
14722                             struct rte_flow_error *error)
14723 {
14724         struct mlx5_priv *priv = dev->data->dev_private;
14725         struct mlx5_shared_action_rss *shared_rss = NULL;
14726         void *queue = NULL;
14727         struct rte_flow_action_rss *origin;
14728         const uint8_t *rss_key;
14729         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14730         uint32_t idx;
14731
14732         RTE_SET_USED(conf);
14733         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14734                             0, SOCKET_ID_ANY);
14735         shared_rss = mlx5_ipool_zmalloc
14736                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14737         if (!shared_rss || !queue) {
14738                 rte_flow_error_set(error, ENOMEM,
14739                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14740                                    "cannot allocate resource memory");
14741                 goto error_rss_init;
14742         }
14743         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14744                 rte_flow_error_set(error, E2BIG,
14745                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14746                                    "rss action number out of range");
14747                 goto error_rss_init;
14748         }
14749         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14750                                           sizeof(*shared_rss->ind_tbl),
14751                                           0, SOCKET_ID_ANY);
14752         if (!shared_rss->ind_tbl) {
14753                 rte_flow_error_set(error, ENOMEM,
14754                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14755                                    "cannot allocate resource memory");
14756                 goto error_rss_init;
14757         }
14758         memcpy(queue, rss->queue, queue_size);
14759         shared_rss->ind_tbl->queues = queue;
14760         shared_rss->ind_tbl->queues_n = rss->queue_num;
14761         origin = &shared_rss->origin;
14762         origin->func = rss->func;
14763         origin->level = rss->level;
14764         /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14765         origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14766         /* NULL RSS key indicates default RSS key. */
14767         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14768         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14769         origin->key = &shared_rss->key[0];
14770         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14771         origin->queue = queue;
14772         origin->queue_num = rss->queue_num;
14773         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14774                 goto error_rss_init;
14775         rte_spinlock_init(&shared_rss->action_rss_sl);
14776         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14777         rte_spinlock_lock(&priv->shared_act_sl);
14778         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14779                      &priv->rss_shared_actions, idx, shared_rss, next);
14780         rte_spinlock_unlock(&priv->shared_act_sl);
14781         return idx;
14782 error_rss_init:
14783         if (shared_rss) {
14784                 if (shared_rss->ind_tbl)
14785                         mlx5_free(shared_rss->ind_tbl);
14786                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14787                                 idx);
14788         }
14789         if (queue)
14790                 mlx5_free(queue);
14791         return 0;
14792 }
14793
14794 /**
14795  * Destroy the shared RSS action.
14796  * Release related hash RX queue objects.
14797  *
14798  * @param[in] dev
14799  *   Pointer to the Ethernet device structure.
14800  * @param[in] idx
14801  *   The shared RSS action object ID to be removed.
14802  * @param[out] error
14803  *   Perform verbose error reporting if not NULL. Initialized in case of
14804  *   error only.
14805  *
14806  * @return
14807  *   0 on success, otherwise negative errno value.
14808  */
14809 static int
14810 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14811                              struct rte_flow_error *error)
14812 {
14813         struct mlx5_priv *priv = dev->data->dev_private;
14814         struct mlx5_shared_action_rss *shared_rss =
14815             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14816         uint32_t old_refcnt = 1;
14817         int remaining;
14818         uint16_t *queue = NULL;
14819
14820         if (!shared_rss)
14821                 return rte_flow_error_set(error, EINVAL,
14822                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14823                                           "invalid shared action");
14824         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14825                                          0, 0, __ATOMIC_ACQUIRE,
14826                                          __ATOMIC_RELAXED))
14827                 return rte_flow_error_set(error, EBUSY,
14828                                           RTE_FLOW_ERROR_TYPE_ACTION,
14829                                           NULL,
14830                                           "shared rss has references");
14831         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14832         if (remaining)
14833                 return rte_flow_error_set(error, EBUSY,
14834                                           RTE_FLOW_ERROR_TYPE_ACTION,
14835                                           NULL,
14836                                           "shared rss hrxq has references");
14837         queue = shared_rss->ind_tbl->queues;
14838         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14839         if (remaining)
14840                 return rte_flow_error_set(error, EBUSY,
14841                                           RTE_FLOW_ERROR_TYPE_ACTION,
14842                                           NULL,
14843                                           "shared rss indirection table has"
14844                                           " references");
14845         mlx5_free(queue);
14846         rte_spinlock_lock(&priv->shared_act_sl);
14847         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14848                      &priv->rss_shared_actions, idx, shared_rss, next);
14849         rte_spinlock_unlock(&priv->shared_act_sl);
14850         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14851                         idx);
14852         return 0;
14853 }
14854
14855 /**
14856  * Create indirect action, lock free,
14857  * (mutex should be acquired by caller).
14858  * Dispatcher for action type specific call.
14859  *
14860  * @param[in] dev
14861  *   Pointer to the Ethernet device structure.
14862  * @param[in] conf
14863  *   Shared action configuration.
14864  * @param[in] action
14865  *   Action specification used to create indirect action.
14866  * @param[out] error
14867  *   Perform verbose error reporting if not NULL. Initialized in case of
14868  *   error only.
14869  *
14870  * @return
14871  *   A valid shared action handle in case of success, NULL otherwise and
14872  *   rte_errno is set.
14873  */
14874 static struct rte_flow_action_handle *
14875 flow_dv_action_create(struct rte_eth_dev *dev,
14876                       const struct rte_flow_indir_action_conf *conf,
14877                       const struct rte_flow_action *action,
14878                       struct rte_flow_error *err)
14879 {
14880         struct mlx5_priv *priv = dev->data->dev_private;
14881         uint32_t age_idx = 0;
14882         uint32_t idx = 0;
14883         uint32_t ret = 0;
14884
14885         switch (action->type) {
14886         case RTE_FLOW_ACTION_TYPE_RSS:
14887                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14888                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14889                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14890                 break;
14891         case RTE_FLOW_ACTION_TYPE_AGE:
14892                 age_idx = flow_dv_aso_age_alloc(dev, err);
14893                 if (!age_idx) {
14894                         ret = -rte_errno;
14895                         break;
14896                 }
14897                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14898                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14899                 flow_dv_aso_age_params_init(dev, age_idx,
14900                                         ((const struct rte_flow_action_age *)
14901                                                 action->conf)->context ?
14902                                         ((const struct rte_flow_action_age *)
14903                                                 action->conf)->context :
14904                                         (void *)(uintptr_t)idx,
14905                                         ((const struct rte_flow_action_age *)
14906                                                 action->conf)->timeout);
14907                 ret = age_idx;
14908                 break;
14909         case RTE_FLOW_ACTION_TYPE_COUNT:
14910                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14911                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14912                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14913                 break;
14914         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14915                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14916                                                          err);
14917                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14918                 break;
14919         default:
14920                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14921                                    NULL, "action type not supported");
14922                 break;
14923         }
14924         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14925 }
14926
14927 /**
14928  * Destroy the indirect action.
14929  * Release action related resources on the NIC and the memory.
14930  * Lock free, (mutex should be acquired by caller).
14931  * Dispatcher for action type specific call.
14932  *
14933  * @param[in] dev
14934  *   Pointer to the Ethernet device structure.
14935  * @param[in] handle
14936  *   The indirect action object handle to be removed.
14937  * @param[out] error
14938  *   Perform verbose error reporting if not NULL. Initialized in case of
14939  *   error only.
14940  *
14941  * @return
14942  *   0 on success, otherwise negative errno value.
14943  */
14944 static int
14945 flow_dv_action_destroy(struct rte_eth_dev *dev,
14946                        struct rte_flow_action_handle *handle,
14947                        struct rte_flow_error *error)
14948 {
14949         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14950         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14951         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14952         struct mlx5_flow_counter *cnt;
14953         uint32_t no_flow_refcnt = 1;
14954         int ret;
14955
14956         switch (type) {
14957         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14958                 return __flow_dv_action_rss_release(dev, idx, error);
14959         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14960                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14961                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14962                                                  &no_flow_refcnt, 1, false,
14963                                                  __ATOMIC_ACQUIRE,
14964                                                  __ATOMIC_RELAXED))
14965                         return rte_flow_error_set(error, EBUSY,
14966                                                   RTE_FLOW_ERROR_TYPE_ACTION,
14967                                                   NULL,
14968                                                   "Indirect count action has references");
14969                 flow_dv_counter_free(dev, idx);
14970                 return 0;
14971         case MLX5_INDIRECT_ACTION_TYPE_AGE:
14972                 ret = flow_dv_aso_age_release(dev, idx);
14973                 if (ret)
14974                         /*
14975                          * In this case, the last flow has a reference will
14976                          * actually release the age action.
14977                          */
14978                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14979                                 " released with references %d.", idx, ret);
14980                 return 0;
14981         case MLX5_INDIRECT_ACTION_TYPE_CT:
14982                 ret = flow_dv_aso_ct_release(dev, idx, error);
14983                 if (ret < 0)
14984                         return ret;
14985                 if (ret > 0)
14986                         DRV_LOG(DEBUG, "Connection tracking object %u still "
14987                                 "has references %d.", idx, ret);
14988                 return 0;
14989         default:
14990                 return rte_flow_error_set(error, ENOTSUP,
14991                                           RTE_FLOW_ERROR_TYPE_ACTION,
14992                                           NULL,
14993                                           "action type not supported");
14994         }
14995 }
14996
14997 /**
14998  * Updates in place shared RSS action configuration.
14999  *
15000  * @param[in] dev
15001  *   Pointer to the Ethernet device structure.
15002  * @param[in] idx
15003  *   The shared RSS action object ID to be updated.
15004  * @param[in] action_conf
15005  *   RSS action specification used to modify *shared_rss*.
15006  * @param[out] error
15007  *   Perform verbose error reporting if not NULL. Initialized in case of
15008  *   error only.
15009  *
15010  * @return
15011  *   0 on success, otherwise negative errno value.
15012  * @note: currently only support update of RSS queues.
15013  */
15014 static int
15015 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
15016                             const struct rte_flow_action_rss *action_conf,
15017                             struct rte_flow_error *error)
15018 {
15019         struct mlx5_priv *priv = dev->data->dev_private;
15020         struct mlx5_shared_action_rss *shared_rss =
15021             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15022         int ret = 0;
15023         void *queue = NULL;
15024         uint16_t *queue_old = NULL;
15025         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
15026
15027         if (!shared_rss)
15028                 return rte_flow_error_set(error, EINVAL,
15029                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15030                                           "invalid shared action to update");
15031         if (priv->obj_ops.ind_table_modify == NULL)
15032                 return rte_flow_error_set(error, ENOTSUP,
15033                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15034                                           "cannot modify indirection table");
15035         queue = mlx5_malloc(MLX5_MEM_ZERO,
15036                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
15037                             0, SOCKET_ID_ANY);
15038         if (!queue)
15039                 return rte_flow_error_set(error, ENOMEM,
15040                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15041                                           NULL,
15042                                           "cannot allocate resource memory");
15043         memcpy(queue, action_conf->queue, queue_size);
15044         MLX5_ASSERT(shared_rss->ind_tbl);
15045         rte_spinlock_lock(&shared_rss->action_rss_sl);
15046         queue_old = shared_rss->ind_tbl->queues;
15047         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
15048                                         queue, action_conf->queue_num, true);
15049         if (ret) {
15050                 mlx5_free(queue);
15051                 ret = rte_flow_error_set(error, rte_errno,
15052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15053                                           "cannot update indirection table");
15054         } else {
15055                 mlx5_free(queue_old);
15056                 shared_rss->origin.queue = queue;
15057                 shared_rss->origin.queue_num = action_conf->queue_num;
15058         }
15059         rte_spinlock_unlock(&shared_rss->action_rss_sl);
15060         return ret;
15061 }
15062
15063 /*
15064  * Updates in place conntrack context or direction.
15065  * Context update should be synchronized.
15066  *
15067  * @param[in] dev
15068  *   Pointer to the Ethernet device structure.
15069  * @param[in] idx
15070  *   The conntrack object ID to be updated.
15071  * @param[in] update
15072  *   Pointer to the structure of information to update.
15073  * @param[out] error
15074  *   Perform verbose error reporting if not NULL. Initialized in case of
15075  *   error only.
15076  *
15077  * @return
15078  *   0 on success, otherwise negative errno value.
15079  */
15080 static int
15081 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
15082                            const struct rte_flow_modify_conntrack *update,
15083                            struct rte_flow_error *error)
15084 {
15085         struct mlx5_priv *priv = dev->data->dev_private;
15086         struct mlx5_aso_ct_action *ct;
15087         const struct rte_flow_action_conntrack *new_prf;
15088         int ret = 0;
15089         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15090         uint32_t dev_idx;
15091
15092         if (PORT_ID(priv) != owner)
15093                 return rte_flow_error_set(error, EACCES,
15094                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15095                                           NULL,
15096                                           "CT object owned by another port");
15097         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15098         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15099         if (!ct->refcnt)
15100                 return rte_flow_error_set(error, ENOMEM,
15101                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15102                                           NULL,
15103                                           "CT object is inactive");
15104         new_prf = &update->new_ct;
15105         if (update->direction)
15106                 ct->is_original = !!new_prf->is_original_dir;
15107         if (update->state) {
15108                 /* Only validate the profile when it needs to be updated. */
15109                 ret = mlx5_validate_action_ct(dev, new_prf, error);
15110                 if (ret)
15111                         return ret;
15112                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15113                 if (ret)
15114                         return rte_flow_error_set(error, EIO,
15115                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15116                                         NULL,
15117                                         "Failed to send CT context update WQE");
15118                 /* Block until ready or a failure. */
15119                 ret = mlx5_aso_ct_available(priv->sh, ct);
15120                 if (ret)
15121                         rte_flow_error_set(error, rte_errno,
15122                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15123                                            NULL,
15124                                            "Timeout to get the CT update");
15125         }
15126         return ret;
15127 }
15128
15129 /**
15130  * Updates in place shared action configuration, lock free,
15131  * (mutex should be acquired by caller).
15132  *
15133  * @param[in] dev
15134  *   Pointer to the Ethernet device structure.
15135  * @param[in] handle
15136  *   The indirect action object handle to be updated.
15137  * @param[in] update
15138  *   Action specification used to modify the action pointed by *handle*.
15139  *   *update* could be of same type with the action pointed by the *handle*
15140  *   handle argument, or some other structures like a wrapper, depending on
15141  *   the indirect action type.
15142  * @param[out] error
15143  *   Perform verbose error reporting if not NULL. Initialized in case of
15144  *   error only.
15145  *
15146  * @return
15147  *   0 on success, otherwise negative errno value.
15148  */
15149 static int
15150 flow_dv_action_update(struct rte_eth_dev *dev,
15151                         struct rte_flow_action_handle *handle,
15152                         const void *update,
15153                         struct rte_flow_error *err)
15154 {
15155         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15156         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15157         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15158         const void *action_conf;
15159
15160         switch (type) {
15161         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15162                 action_conf = ((const struct rte_flow_action *)update)->conf;
15163                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15164         case MLX5_INDIRECT_ACTION_TYPE_CT:
15165                 return __flow_dv_action_ct_update(dev, idx, update, err);
15166         default:
15167                 return rte_flow_error_set(err, ENOTSUP,
15168                                           RTE_FLOW_ERROR_TYPE_ACTION,
15169                                           NULL,
15170                                           "action type update not supported");
15171         }
15172 }
15173
15174 /**
15175  * Destroy the meter sub policy table rules.
15176  * Lock free, (mutex should be acquired by caller).
15177  *
15178  * @param[in] dev
15179  *   Pointer to Ethernet device.
15180  * @param[in] sub_policy
15181  *   Pointer to meter sub policy table.
15182  */
15183 static void
15184 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15185                              struct mlx5_flow_meter_sub_policy *sub_policy)
15186 {
15187         struct mlx5_priv *priv = dev->data->dev_private;
15188         struct mlx5_flow_tbl_data_entry *tbl;
15189         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15190         struct mlx5_flow_meter_info *next_fm;
15191         struct mlx5_sub_policy_color_rule *color_rule;
15192         void *tmp;
15193         uint32_t i;
15194
15195         for (i = 0; i < RTE_COLORS; i++) {
15196                 next_fm = NULL;
15197                 if (i == RTE_COLOR_GREEN && policy &&
15198                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15199                         next_fm = mlx5_flow_meter_find(priv,
15200                                         policy->act_cnt[i].next_mtr_id, NULL);
15201                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15202                                    next_port, tmp) {
15203                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15204                         tbl = container_of(color_rule->matcher->tbl,
15205                                            typeof(*tbl), tbl);
15206                         mlx5_list_unregister(tbl->matchers,
15207                                              &color_rule->matcher->entry);
15208                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15209                                      color_rule, next_port);
15210                         mlx5_free(color_rule);
15211                         if (next_fm)
15212                                 mlx5_flow_meter_detach(priv, next_fm);
15213                 }
15214         }
15215         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15216                 if (sub_policy->rix_hrxq[i]) {
15217                         if (policy && !policy->is_hierarchy)
15218                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15219                         sub_policy->rix_hrxq[i] = 0;
15220                 }
15221                 if (sub_policy->jump_tbl[i]) {
15222                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15223                                                      sub_policy->jump_tbl[i]);
15224                         sub_policy->jump_tbl[i] = NULL;
15225                 }
15226         }
15227         if (sub_policy->tbl_rsc) {
15228                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15229                                              sub_policy->tbl_rsc);
15230                 sub_policy->tbl_rsc = NULL;
15231         }
15232 }
15233
15234 /**
15235  * Destroy policy rules, lock free,
15236  * (mutex should be acquired by caller).
15237  * Dispatcher for action type specific call.
15238  *
15239  * @param[in] dev
15240  *   Pointer to the Ethernet device structure.
15241  * @param[in] mtr_policy
15242  *   Meter policy struct.
15243  */
15244 static void
15245 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15246                              struct mlx5_flow_meter_policy *mtr_policy)
15247 {
15248         uint32_t i, j;
15249         struct mlx5_flow_meter_sub_policy *sub_policy;
15250         uint16_t sub_policy_num;
15251
15252         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15253                 sub_policy_num = (mtr_policy->sub_policy_num >>
15254                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15255                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15256                 for (j = 0; j < sub_policy_num; j++) {
15257                         sub_policy = mtr_policy->sub_policys[i][j];
15258                         if (sub_policy)
15259                                 __flow_dv_destroy_sub_policy_rules(dev,
15260                                                                    sub_policy);
15261                 }
15262         }
15263 }
15264
15265 /**
15266  * Destroy policy action, lock free,
15267  * (mutex should be acquired by caller).
15268  * Dispatcher for action type specific call.
15269  *
15270  * @param[in] dev
15271  *   Pointer to the Ethernet device structure.
15272  * @param[in] mtr_policy
15273  *   Meter policy struct.
15274  */
15275 static void
15276 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15277                       struct mlx5_flow_meter_policy *mtr_policy)
15278 {
15279         struct rte_flow_action *rss_action;
15280         struct mlx5_flow_handle dev_handle;
15281         uint32_t i, j;
15282
15283         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15284                 if (mtr_policy->act_cnt[i].rix_mark) {
15285                         flow_dv_tag_release(dev,
15286                                 mtr_policy->act_cnt[i].rix_mark);
15287                         mtr_policy->act_cnt[i].rix_mark = 0;
15288                 }
15289                 if (mtr_policy->act_cnt[i].modify_hdr) {
15290                         dev_handle.dvh.modify_hdr =
15291                                 mtr_policy->act_cnt[i].modify_hdr;
15292                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15293                 }
15294                 switch (mtr_policy->act_cnt[i].fate_action) {
15295                 case MLX5_FLOW_FATE_SHARED_RSS:
15296                         rss_action = mtr_policy->act_cnt[i].rss;
15297                         mlx5_free(rss_action);
15298                         break;
15299                 case MLX5_FLOW_FATE_PORT_ID:
15300                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15301                                 flow_dv_port_id_action_resource_release(dev,
15302                                 mtr_policy->act_cnt[i].rix_port_id_action);
15303                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15304                         }
15305                         break;
15306                 case MLX5_FLOW_FATE_DROP:
15307                 case MLX5_FLOW_FATE_JUMP:
15308                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15309                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15310                                                 NULL;
15311                         break;
15312                 default:
15313                         /*Queue action do nothing*/
15314                         break;
15315                 }
15316         }
15317         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15318                 mtr_policy->dr_drop_action[j] = NULL;
15319 }
15320
15321 /**
15322  * Create policy action per domain, lock free,
15323  * (mutex should be acquired by caller).
15324  * Dispatcher for action type specific call.
15325  *
15326  * @param[in] dev
15327  *   Pointer to the Ethernet device structure.
15328  * @param[in] mtr_policy
15329  *   Meter policy struct.
15330  * @param[in] action
15331  *   Action specification used to create meter actions.
15332  * @param[out] error
15333  *   Perform verbose error reporting if not NULL. Initialized in case of
15334  *   error only.
15335  *
15336  * @return
15337  *   0 on success, otherwise negative errno value.
15338  */
15339 static int
15340 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15341                         struct mlx5_flow_meter_policy *mtr_policy,
15342                         const struct rte_flow_action *actions[RTE_COLORS],
15343                         enum mlx5_meter_domain domain,
15344                         struct rte_mtr_error *error)
15345 {
15346         struct mlx5_priv *priv = dev->data->dev_private;
15347         struct rte_flow_error flow_err;
15348         const struct rte_flow_action *act;
15349         uint64_t action_flags;
15350         struct mlx5_flow_handle dh;
15351         struct mlx5_flow dev_flow;
15352         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15353         int i, ret;
15354         uint8_t egress, transfer;
15355         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15356         union {
15357                 struct mlx5_flow_dv_modify_hdr_resource res;
15358                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15359                             sizeof(struct mlx5_modification_cmd) *
15360                             (MLX5_MAX_MODIFY_NUM + 1)];
15361         } mhdr_dummy;
15362         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15363
15364         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15365         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15366         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15367         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15368         memset(&port_id_action, 0,
15369                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15370         memset(mhdr_res, 0, sizeof(*mhdr_res));
15371         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15372                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15373                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15374         dev_flow.handle = &dh;
15375         dev_flow.dv.port_id_action = &port_id_action;
15376         dev_flow.external = true;
15377         for (i = 0; i < RTE_COLORS; i++) {
15378                 if (i < MLX5_MTR_RTE_COLORS)
15379                         act_cnt = &mtr_policy->act_cnt[i];
15380                 /* Skip the color policy actions creation. */
15381                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15382                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15383                         continue;
15384                 action_flags = 0;
15385                 for (act = actions[i];
15386                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15387                         switch (act->type) {
15388                         case RTE_FLOW_ACTION_TYPE_MARK:
15389                         {
15390                                 uint32_t tag_be = mlx5_flow_mark_set
15391                                         (((const struct rte_flow_action_mark *)
15392                                         (act->conf))->id);
15393
15394                                 if (i >= MLX5_MTR_RTE_COLORS)
15395                                         return -rte_mtr_error_set(error,
15396                                           ENOTSUP,
15397                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15398                                           NULL,
15399                                           "cannot create policy "
15400                                           "mark action for this color");
15401                                 dev_flow.handle->mark = 1;
15402                                 if (flow_dv_tag_resource_register(dev, tag_be,
15403                                                   &dev_flow, &flow_err))
15404                                         return -rte_mtr_error_set(error,
15405                                         ENOTSUP,
15406                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15407                                         NULL,
15408                                         "cannot setup policy mark action");
15409                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15410                                 act_cnt->rix_mark =
15411                                         dev_flow.handle->dvh.rix_tag;
15412                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15413                                 break;
15414                         }
15415                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15416                                 if (i >= MLX5_MTR_RTE_COLORS)
15417                                         return -rte_mtr_error_set(error,
15418                                           ENOTSUP,
15419                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15420                                           NULL,
15421                                           "cannot create policy "
15422                                           "set tag action for this color");
15423                                 if (flow_dv_convert_action_set_tag
15424                                 (dev, mhdr_res,
15425                                 (const struct rte_flow_action_set_tag *)
15426                                 act->conf,  &flow_err))
15427                                         return -rte_mtr_error_set(error,
15428                                         ENOTSUP,
15429                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15430                                         NULL, "cannot convert policy "
15431                                         "set tag action");
15432                                 if (!mhdr_res->actions_num)
15433                                         return -rte_mtr_error_set(error,
15434                                         ENOTSUP,
15435                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15436                                         NULL, "cannot find policy "
15437                                         "set tag action");
15438                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15439                                 break;
15440                         case RTE_FLOW_ACTION_TYPE_DROP:
15441                         {
15442                                 struct mlx5_flow_mtr_mng *mtrmng =
15443                                                 priv->sh->mtrmng;
15444                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15445
15446                                 /*
15447                                  * Create the drop table with
15448                                  * METER DROP level.
15449                                  */
15450                                 if (!mtrmng->drop_tbl[domain]) {
15451                                         mtrmng->drop_tbl[domain] =
15452                                         flow_dv_tbl_resource_get(dev,
15453                                         MLX5_FLOW_TABLE_LEVEL_METER,
15454                                         egress, transfer, false, NULL, 0,
15455                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15456                                         if (!mtrmng->drop_tbl[domain])
15457                                                 return -rte_mtr_error_set
15458                                         (error, ENOTSUP,
15459                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15460                                         NULL,
15461                                         "Failed to create meter drop table");
15462                                 }
15463                                 tbl_data = container_of
15464                                 (mtrmng->drop_tbl[domain],
15465                                 struct mlx5_flow_tbl_data_entry, tbl);
15466                                 if (i < MLX5_MTR_RTE_COLORS) {
15467                                         act_cnt->dr_jump_action[domain] =
15468                                                 tbl_data->jump.action;
15469                                         act_cnt->fate_action =
15470                                                 MLX5_FLOW_FATE_DROP;
15471                                 }
15472                                 if (i == RTE_COLOR_RED)
15473                                         mtr_policy->dr_drop_action[domain] =
15474                                                 tbl_data->jump.action;
15475                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15476                                 break;
15477                         }
15478                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15479                         {
15480                                 if (i >= MLX5_MTR_RTE_COLORS)
15481                                         return -rte_mtr_error_set(error,
15482                                         ENOTSUP,
15483                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15484                                         NULL, "cannot create policy "
15485                                         "fate queue for this color");
15486                                 act_cnt->queue =
15487                                 ((const struct rte_flow_action_queue *)
15488                                         (act->conf))->index;
15489                                 act_cnt->fate_action =
15490                                         MLX5_FLOW_FATE_QUEUE;
15491                                 dev_flow.handle->fate_action =
15492                                         MLX5_FLOW_FATE_QUEUE;
15493                                 mtr_policy->is_queue = 1;
15494                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15495                                 break;
15496                         }
15497                         case RTE_FLOW_ACTION_TYPE_RSS:
15498                         {
15499                                 int rss_size;
15500
15501                                 if (i >= MLX5_MTR_RTE_COLORS)
15502                                         return -rte_mtr_error_set(error,
15503                                           ENOTSUP,
15504                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15505                                           NULL,
15506                                           "cannot create policy "
15507                                           "rss action for this color");
15508                                 /*
15509                                  * Save RSS conf into policy struct
15510                                  * for translate stage.
15511                                  */
15512                                 rss_size = (int)rte_flow_conv
15513                                         (RTE_FLOW_CONV_OP_ACTION,
15514                                         NULL, 0, act, &flow_err);
15515                                 if (rss_size <= 0)
15516                                         return -rte_mtr_error_set(error,
15517                                           ENOTSUP,
15518                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15519                                           NULL, "Get the wrong "
15520                                           "rss action struct size");
15521                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15522                                                 rss_size, 0, SOCKET_ID_ANY);
15523                                 if (!act_cnt->rss)
15524                                         return -rte_mtr_error_set(error,
15525                                           ENOTSUP,
15526                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15527                                           NULL,
15528                                           "Fail to malloc rss action memory");
15529                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15530                                         act_cnt->rss, rss_size,
15531                                         act, &flow_err);
15532                                 if (ret < 0)
15533                                         return -rte_mtr_error_set(error,
15534                                           ENOTSUP,
15535                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15536                                           NULL, "Fail to save "
15537                                           "rss action into policy struct");
15538                                 act_cnt->fate_action =
15539                                         MLX5_FLOW_FATE_SHARED_RSS;
15540                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15541                                 break;
15542                         }
15543                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15544                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15545                         {
15546                                 struct mlx5_flow_dv_port_id_action_resource
15547                                         port_id_resource;
15548                                 uint32_t port_id = 0;
15549
15550                                 if (i >= MLX5_MTR_RTE_COLORS)
15551                                         return -rte_mtr_error_set(error,
15552                                         ENOTSUP,
15553                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15554                                         NULL, "cannot create policy "
15555                                         "port action for this color");
15556                                 memset(&port_id_resource, 0,
15557                                         sizeof(port_id_resource));
15558                                 if (flow_dv_translate_action_port_id(dev, act,
15559                                                 &port_id, &flow_err))
15560                                         return -rte_mtr_error_set(error,
15561                                         ENOTSUP,
15562                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15563                                         NULL, "cannot translate "
15564                                         "policy port action");
15565                                 port_id_resource.port_id = port_id;
15566                                 if (flow_dv_port_id_action_resource_register
15567                                         (dev, &port_id_resource,
15568                                         &dev_flow, &flow_err))
15569                                         return -rte_mtr_error_set(error,
15570                                         ENOTSUP,
15571                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15572                                         NULL, "cannot setup "
15573                                         "policy port action");
15574                                 act_cnt->rix_port_id_action =
15575                                         dev_flow.handle->rix_port_id_action;
15576                                 act_cnt->fate_action =
15577                                         MLX5_FLOW_FATE_PORT_ID;
15578                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15579                                 break;
15580                         }
15581                         case RTE_FLOW_ACTION_TYPE_JUMP:
15582                         {
15583                                 uint32_t jump_group = 0;
15584                                 uint32_t table = 0;
15585                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15586                                 struct flow_grp_info grp_info = {
15587                                         .external = !!dev_flow.external,
15588                                         .transfer = !!transfer,
15589                                         .fdb_def_rule = !!priv->fdb_def_rule,
15590                                         .std_tbl_fix = 0,
15591                                         .skip_scale = dev_flow.skip_scale &
15592                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15593                                 };
15594                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15595                                         mtr_policy->sub_policys[domain][0];
15596
15597                                 if (i >= MLX5_MTR_RTE_COLORS)
15598                                         return -rte_mtr_error_set(error,
15599                                           ENOTSUP,
15600                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15601                                           NULL,
15602                                           "cannot create policy "
15603                                           "jump action for this color");
15604                                 jump_group =
15605                                 ((const struct rte_flow_action_jump *)
15606                                                         act->conf)->group;
15607                                 if (mlx5_flow_group_to_table(dev, NULL,
15608                                                        jump_group,
15609                                                        &table,
15610                                                        &grp_info, &flow_err))
15611                                         return -rte_mtr_error_set(error,
15612                                         ENOTSUP,
15613                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15614                                         NULL, "cannot setup "
15615                                         "policy jump action");
15616                                 sub_policy->jump_tbl[i] =
15617                                 flow_dv_tbl_resource_get(dev,
15618                                         table, egress,
15619                                         transfer,
15620                                         !!dev_flow.external,
15621                                         NULL, jump_group, 0,
15622                                         0, &flow_err);
15623                                 if
15624                                 (!sub_policy->jump_tbl[i])
15625                                         return  -rte_mtr_error_set(error,
15626                                         ENOTSUP,
15627                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15628                                         NULL, "cannot create jump action.");
15629                                 tbl_data = container_of
15630                                 (sub_policy->jump_tbl[i],
15631                                 struct mlx5_flow_tbl_data_entry, tbl);
15632                                 act_cnt->dr_jump_action[domain] =
15633                                         tbl_data->jump.action;
15634                                 act_cnt->fate_action =
15635                                         MLX5_FLOW_FATE_JUMP;
15636                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15637                                 break;
15638                         }
15639                         /*
15640                          * No need to check meter hierarchy for Y or R colors
15641                          * here since it is done in the validation stage.
15642                          */
15643                         case RTE_FLOW_ACTION_TYPE_METER:
15644                         {
15645                                 const struct rte_flow_action_meter *mtr;
15646                                 struct mlx5_flow_meter_info *next_fm;
15647                                 struct mlx5_flow_meter_policy *next_policy;
15648                                 struct rte_flow_action tag_action;
15649                                 struct mlx5_rte_flow_action_set_tag set_tag;
15650                                 uint32_t next_mtr_idx = 0;
15651
15652                                 mtr = act->conf;
15653                                 next_fm = mlx5_flow_meter_find(priv,
15654                                                         mtr->mtr_id,
15655                                                         &next_mtr_idx);
15656                                 if (!next_fm)
15657                                         return -rte_mtr_error_set(error, EINVAL,
15658                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15659                                                 "Fail to find next meter.");
15660                                 if (next_fm->def_policy)
15661                                         return -rte_mtr_error_set(error, EINVAL,
15662                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15663                                 "Hierarchy only supports termination meter.");
15664                                 next_policy = mlx5_flow_meter_policy_find(dev,
15665                                                 next_fm->policy_id, NULL);
15666                                 MLX5_ASSERT(next_policy);
15667                                 if (next_fm->drop_cnt) {
15668                                         set_tag.id =
15669                                                 (enum modify_reg)
15670                                                 mlx5_flow_get_reg_id(dev,
15671                                                 MLX5_MTR_ID,
15672                                                 0,
15673                                                 (struct rte_flow_error *)error);
15674                                         set_tag.offset = (priv->mtr_reg_share ?
15675                                                 MLX5_MTR_COLOR_BITS : 0);
15676                                         set_tag.length = (priv->mtr_reg_share ?
15677                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15678                                                MLX5_REG_BITS);
15679                                         set_tag.data = next_mtr_idx;
15680                                         tag_action.type =
15681                                                 (enum rte_flow_action_type)
15682                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15683                                         tag_action.conf = &set_tag;
15684                                         if (flow_dv_convert_action_set_reg
15685                                                 (mhdr_res, &tag_action,
15686                                                 (struct rte_flow_error *)error))
15687                                                 return -rte_errno;
15688                                         action_flags |=
15689                                                 MLX5_FLOW_ACTION_SET_TAG;
15690                                 }
15691                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15692                                 act_cnt->next_mtr_id = next_fm->meter_id;
15693                                 act_cnt->next_sub_policy = NULL;
15694                                 mtr_policy->is_hierarchy = 1;
15695                                 mtr_policy->dev = next_policy->dev;
15696                                 action_flags |=
15697                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15698                                 break;
15699                         }
15700                         default:
15701                                 return -rte_mtr_error_set(error, ENOTSUP,
15702                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15703                                           NULL, "action type not supported");
15704                         }
15705                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15706                                 /* create modify action if needed. */
15707                                 dev_flow.dv.group = 1;
15708                                 if (flow_dv_modify_hdr_resource_register
15709                                         (dev, mhdr_res, &dev_flow, &flow_err))
15710                                         return -rte_mtr_error_set(error,
15711                                                 ENOTSUP,
15712                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15713                                                 NULL, "cannot register policy "
15714                                                 "set tag action");
15715                                 act_cnt->modify_hdr =
15716                                         dev_flow.handle->dvh.modify_hdr;
15717                         }
15718                 }
15719         }
15720         return 0;
15721 }
15722
15723 /**
15724  * Create policy action per domain, lock free,
15725  * (mutex should be acquired by caller).
15726  * Dispatcher for action type specific call.
15727  *
15728  * @param[in] dev
15729  *   Pointer to the Ethernet device structure.
15730  * @param[in] mtr_policy
15731  *   Meter policy struct.
15732  * @param[in] action
15733  *   Action specification used to create meter actions.
15734  * @param[out] error
15735  *   Perform verbose error reporting if not NULL. Initialized in case of
15736  *   error only.
15737  *
15738  * @return
15739  *   0 on success, otherwise negative errno value.
15740  */
15741 static int
15742 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15743                       struct mlx5_flow_meter_policy *mtr_policy,
15744                       const struct rte_flow_action *actions[RTE_COLORS],
15745                       struct rte_mtr_error *error)
15746 {
15747         int ret, i;
15748         uint16_t sub_policy_num;
15749
15750         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15751                 sub_policy_num = (mtr_policy->sub_policy_num >>
15752                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15753                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15754                 if (sub_policy_num) {
15755                         ret = __flow_dv_create_domain_policy_acts(dev,
15756                                 mtr_policy, actions,
15757                                 (enum mlx5_meter_domain)i, error);
15758                         /* Cleaning resource is done in the caller level. */
15759                         if (ret)
15760                                 return ret;
15761                 }
15762         }
15763         return 0;
15764 }
15765
15766 /**
15767  * Query a DV flow rule for its statistics via DevX.
15768  *
15769  * @param[in] dev
15770  *   Pointer to Ethernet device.
15771  * @param[in] cnt_idx
15772  *   Index to the flow counter.
15773  * @param[out] data
15774  *   Data retrieved by the query.
15775  * @param[out] error
15776  *   Perform verbose error reporting if not NULL.
15777  *
15778  * @return
15779  *   0 on success, a negative errno value otherwise and rte_errno is set.
15780  */
15781 int
15782 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15783                     struct rte_flow_error *error)
15784 {
15785         struct mlx5_priv *priv = dev->data->dev_private;
15786         struct rte_flow_query_count *qc = data;
15787
15788         if (!priv->sh->devx)
15789                 return rte_flow_error_set(error, ENOTSUP,
15790                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15791                                           NULL,
15792                                           "counters are not supported");
15793         if (cnt_idx) {
15794                 uint64_t pkts, bytes;
15795                 struct mlx5_flow_counter *cnt;
15796                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15797
15798                 if (err)
15799                         return rte_flow_error_set(error, -err,
15800                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15801                                         NULL, "cannot read counters");
15802                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15803                 qc->hits_set = 1;
15804                 qc->bytes_set = 1;
15805                 qc->hits = pkts - cnt->hits;
15806                 qc->bytes = bytes - cnt->bytes;
15807                 if (qc->reset) {
15808                         cnt->hits = pkts;
15809                         cnt->bytes = bytes;
15810                 }
15811                 return 0;
15812         }
15813         return rte_flow_error_set(error, EINVAL,
15814                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15815                                   NULL,
15816                                   "counters are not available");
15817 }
15818
15819
15820 /**
15821  * Query counter's action pointer for a DV flow rule via DevX.
15822  *
15823  * @param[in] dev
15824  *   Pointer to Ethernet device.
15825  * @param[in] cnt_idx
15826  *   Index to the flow counter.
15827  * @param[out] action_ptr
15828  *   Action pointer for counter.
15829  * @param[out] error
15830  *   Perform verbose error reporting if not NULL.
15831  *
15832  * @return
15833  *   0 on success, a negative errno value otherwise and rte_errno is set.
15834  */
15835 int
15836 flow_dv_query_count_ptr(struct rte_eth_dev *dev, uint32_t cnt_idx,
15837         void **action_ptr, struct rte_flow_error *error)
15838 {
15839         struct mlx5_priv *priv = dev->data->dev_private;
15840
15841         if (!priv->sh->devx || !action_ptr)
15842                 return rte_flow_error_set(error, ENOTSUP,
15843                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15844                                           NULL,
15845                                           "counters are not supported");
15846
15847         if (cnt_idx) {
15848                 struct mlx5_flow_counter *cnt = NULL;
15849                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15850                 if (cnt) {
15851                         *action_ptr = cnt->action;
15852                         return 0;
15853                 }
15854         }
15855         return rte_flow_error_set(error, EINVAL,
15856                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15857                                   NULL,
15858                                   "counters are not available");
15859 }
15860
15861 static int
15862 flow_dv_action_query(struct rte_eth_dev *dev,
15863                      const struct rte_flow_action_handle *handle, void *data,
15864                      struct rte_flow_error *error)
15865 {
15866         struct mlx5_age_param *age_param;
15867         struct rte_flow_query_age *resp;
15868         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15869         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15870         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15871         struct mlx5_priv *priv = dev->data->dev_private;
15872         struct mlx5_aso_ct_action *ct;
15873         uint16_t owner;
15874         uint32_t dev_idx;
15875
15876         switch (type) {
15877         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15878                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15879                 resp = data;
15880                 resp->aged = __atomic_load_n(&age_param->state,
15881                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
15882                                                                           1 : 0;
15883                 resp->sec_since_last_hit_valid = !resp->aged;
15884                 if (resp->sec_since_last_hit_valid)
15885                         resp->sec_since_last_hit = __atomic_load_n
15886                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15887                 return 0;
15888         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15889                 return flow_dv_query_count(dev, idx, data, error);
15890         case MLX5_INDIRECT_ACTION_TYPE_CT:
15891                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15892                 if (owner != PORT_ID(priv))
15893                         return rte_flow_error_set(error, EACCES,
15894                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15895                                         NULL,
15896                                         "CT object owned by another port");
15897                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15898                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15899                 MLX5_ASSERT(ct);
15900                 if (!ct->refcnt)
15901                         return rte_flow_error_set(error, EFAULT,
15902                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15903                                         NULL,
15904                                         "CT object is inactive");
15905                 ((struct rte_flow_action_conntrack *)data)->peer_port =
15906                                                         ct->peer;
15907                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15908                                                         ct->is_original;
15909                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15910                         return rte_flow_error_set(error, EIO,
15911                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15912                                         NULL,
15913                                         "Failed to query CT context");
15914                 return 0;
15915         default:
15916                 return rte_flow_error_set(error, ENOTSUP,
15917                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15918                                           "action type query not supported");
15919         }
15920 }
15921
15922 /**
15923  * Query a flow rule AGE action for aging information.
15924  *
15925  * @param[in] dev
15926  *   Pointer to Ethernet device.
15927  * @param[in] flow
15928  *   Pointer to the sub flow.
15929  * @param[out] data
15930  *   data retrieved by the query.
15931  * @param[out] error
15932  *   Perform verbose error reporting if not NULL.
15933  *
15934  * @return
15935  *   0 on success, a negative errno value otherwise and rte_errno is set.
15936  */
15937 static int
15938 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15939                   void *data, struct rte_flow_error *error)
15940 {
15941         struct rte_flow_query_age *resp = data;
15942         struct mlx5_age_param *age_param;
15943
15944         if (flow->age) {
15945                 struct mlx5_aso_age_action *act =
15946                                      flow_aso_age_get_by_idx(dev, flow->age);
15947
15948                 age_param = &act->age_params;
15949         } else if (flow->counter) {
15950                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15951
15952                 if (!age_param || !age_param->timeout)
15953                         return rte_flow_error_set
15954                                         (error, EINVAL,
15955                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15956                                          NULL, "cannot read age data");
15957         } else {
15958                 return rte_flow_error_set(error, EINVAL,
15959                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15960                                           NULL, "age data not available");
15961         }
15962         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15963                                      AGE_TMOUT ? 1 : 0;
15964         resp->sec_since_last_hit_valid = !resp->aged;
15965         if (resp->sec_since_last_hit_valid)
15966                 resp->sec_since_last_hit = __atomic_load_n
15967                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15968         return 0;
15969 }
15970
15971 /**
15972  * Query a flow.
15973  *
15974  * @see rte_flow_query()
15975  * @see rte_flow_ops
15976  */
15977 static int
15978 flow_dv_query(struct rte_eth_dev *dev,
15979               struct rte_flow *flow __rte_unused,
15980               const struct rte_flow_action *actions __rte_unused,
15981               void *data __rte_unused,
15982               struct rte_flow_error *error __rte_unused)
15983 {
15984         int ret = -EINVAL;
15985
15986         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15987                 switch (actions->type) {
15988                 case RTE_FLOW_ACTION_TYPE_VOID:
15989                         break;
15990                 case RTE_FLOW_ACTION_TYPE_COUNT:
15991                         ret = flow_dv_query_count(dev, flow->counter, data,
15992                                                   error);
15993                         break;
15994                 case RTE_FLOW_ACTION_TYPE_AGE:
15995                         ret = flow_dv_query_age(dev, flow, data, error);
15996                         break;
15997                 default:
15998                         return rte_flow_error_set(error, ENOTSUP,
15999                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16000                                                   actions,
16001                                                   "action not supported");
16002                 }
16003         }
16004         return ret;
16005 }
16006
16007 /**
16008  * Destroy the meter table set.
16009  * Lock free, (mutex should be acquired by caller).
16010  *
16011  * @param[in] dev
16012  *   Pointer to Ethernet device.
16013  * @param[in] fm
16014  *   Meter information table.
16015  */
16016 static void
16017 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
16018                         struct mlx5_flow_meter_info *fm)
16019 {
16020         struct mlx5_priv *priv = dev->data->dev_private;
16021         int i;
16022
16023         if (!fm || !priv->config.dv_flow_en)
16024                 return;
16025         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16026                 if (fm->drop_rule[i]) {
16027                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
16028                         fm->drop_rule[i] = NULL;
16029                 }
16030         }
16031 }
16032
16033 static void
16034 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
16035 {
16036         struct mlx5_priv *priv = dev->data->dev_private;
16037         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16038         struct mlx5_flow_tbl_data_entry *tbl;
16039         int i, j;
16040
16041         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16042                 if (mtrmng->def_rule[i]) {
16043                         claim_zero(mlx5_flow_os_destroy_flow
16044                                         (mtrmng->def_rule[i]));
16045                         mtrmng->def_rule[i] = NULL;
16046                 }
16047                 if (mtrmng->def_matcher[i]) {
16048                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
16049                                 struct mlx5_flow_tbl_data_entry, tbl);
16050                         mlx5_list_unregister(tbl->matchers,
16051                                              &mtrmng->def_matcher[i]->entry);
16052                         mtrmng->def_matcher[i] = NULL;
16053                 }
16054                 for (j = 0; j < MLX5_REG_BITS; j++) {
16055                         if (mtrmng->drop_matcher[i][j]) {
16056                                 tbl =
16057                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
16058                                              struct mlx5_flow_tbl_data_entry,
16059                                              tbl);
16060                                 mlx5_list_unregister(tbl->matchers,
16061                                             &mtrmng->drop_matcher[i][j]->entry);
16062                                 mtrmng->drop_matcher[i][j] = NULL;
16063                         }
16064                 }
16065                 if (mtrmng->drop_tbl[i]) {
16066                         flow_dv_tbl_resource_release(MLX5_SH(dev),
16067                                 mtrmng->drop_tbl[i]);
16068                         mtrmng->drop_tbl[i] = NULL;
16069                 }
16070         }
16071 }
16072
16073 /* Number of meter flow actions, count and jump or count and drop. */
16074 #define METER_ACTIONS 2
16075
16076 static void
16077 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
16078                                     enum mlx5_meter_domain domain)
16079 {
16080         struct mlx5_priv *priv = dev->data->dev_private;
16081         struct mlx5_flow_meter_def_policy *def_policy =
16082                         priv->sh->mtrmng->def_policy[domain];
16083
16084         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
16085         mlx5_free(def_policy);
16086         priv->sh->mtrmng->def_policy[domain] = NULL;
16087 }
16088
16089 /**
16090  * Destroy the default policy table set.
16091  *
16092  * @param[in] dev
16093  *   Pointer to Ethernet device.
16094  */
16095 static void
16096 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
16097 {
16098         struct mlx5_priv *priv = dev->data->dev_private;
16099         int i;
16100
16101         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
16102                 if (priv->sh->mtrmng->def_policy[i])
16103                         __flow_dv_destroy_domain_def_policy(dev,
16104                                         (enum mlx5_meter_domain)i);
16105         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
16106 }
16107
16108 static int
16109 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
16110                         uint32_t color_reg_c_idx,
16111                         enum rte_color color, void *matcher_object,
16112                         int actions_n, void *actions,
16113                         bool match_src_port, const struct rte_flow_item *item,
16114                         void **rule, const struct rte_flow_attr *attr)
16115 {
16116         int ret;
16117         struct mlx5_flow_dv_match_params value = {
16118                 .size = sizeof(value.buf),
16119         };
16120         struct mlx5_flow_dv_match_params matcher = {
16121                 .size = sizeof(matcher.buf),
16122         };
16123         struct mlx5_priv *priv = dev->data->dev_private;
16124         uint8_t misc_mask;
16125
16126         if (match_src_port && (priv->representor || priv->master)) {
16127                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
16128                                                    value.buf, item, attr)) {
16129                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
16130                                 " value with port.", color);
16131                         return -1;
16132                 }
16133         }
16134         flow_dv_match_meta_reg(matcher.buf, value.buf,
16135                                (enum modify_reg)color_reg_c_idx,
16136                                rte_col_2_mlx5_col(color), UINT32_MAX);
16137         misc_mask = flow_dv_matcher_enable(value.buf);
16138         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16139         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
16140                                        actions_n, actions, rule);
16141         if (ret) {
16142                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16143                 return -1;
16144         }
16145         return 0;
16146 }
16147
16148 static int
16149 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16150                         uint32_t color_reg_c_idx,
16151                         uint16_t priority,
16152                         struct mlx5_flow_meter_sub_policy *sub_policy,
16153                         const struct rte_flow_attr *attr,
16154                         bool match_src_port,
16155                         const struct rte_flow_item *item,
16156                         struct mlx5_flow_dv_matcher **policy_matcher,
16157                         struct rte_flow_error *error)
16158 {
16159         struct mlx5_list_entry *entry;
16160         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16161         struct mlx5_flow_dv_matcher matcher = {
16162                 .mask = {
16163                         .size = sizeof(matcher.mask.buf),
16164                 },
16165                 .tbl = tbl_rsc,
16166         };
16167         struct mlx5_flow_dv_match_params value = {
16168                 .size = sizeof(value.buf),
16169         };
16170         struct mlx5_flow_cb_ctx ctx = {
16171                 .error = error,
16172                 .data = &matcher,
16173         };
16174         struct mlx5_flow_tbl_data_entry *tbl_data;
16175         struct mlx5_priv *priv = dev->data->dev_private;
16176         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16177
16178         if (match_src_port && (priv->representor || priv->master)) {
16179                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16180                                                    value.buf, item, attr)) {
16181                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16182                                 " with port.", priority);
16183                         return -1;
16184                 }
16185         }
16186         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16187         if (priority < RTE_COLOR_RED)
16188                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16189                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16190         matcher.priority = priority;
16191         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16192                                     matcher.mask.size);
16193         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16194         if (!entry) {
16195                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16196                 return -1;
16197         }
16198         *policy_matcher =
16199                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16200         return 0;
16201 }
16202
16203 /**
16204  * Create the policy rules per domain.
16205  *
16206  * @param[in] dev
16207  *   Pointer to Ethernet device.
16208  * @param[in] sub_policy
16209  *    Pointer to sub policy table..
16210  * @param[in] egress
16211  *   Direction of the table.
16212  * @param[in] transfer
16213  *   E-Switch or NIC flow.
16214  * @param[in] acts
16215  *   Pointer to policy action list per color.
16216  *
16217  * @return
16218  *   0 on success, -1 otherwise.
16219  */
16220 static int
16221 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16222                 struct mlx5_flow_meter_sub_policy *sub_policy,
16223                 uint8_t egress, uint8_t transfer, bool match_src_port,
16224                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16225 {
16226         struct mlx5_priv *priv = dev->data->dev_private;
16227         struct rte_flow_error flow_err;
16228         uint32_t color_reg_c_idx;
16229         struct rte_flow_attr attr = {
16230                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16231                 .priority = 0,
16232                 .ingress = 0,
16233                 .egress = !!egress,
16234                 .transfer = !!transfer,
16235                 .reserved = 0,
16236         };
16237         int i;
16238         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16239         struct mlx5_sub_policy_color_rule *color_rule;
16240         bool svport_match;
16241         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16242
16243         if (ret < 0)
16244                 return -1;
16245         /* Create policy table with POLICY level. */
16246         if (!sub_policy->tbl_rsc)
16247                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16248                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16249                                 egress, transfer, false, NULL, 0, 0,
16250                                 sub_policy->idx, &flow_err);
16251         if (!sub_policy->tbl_rsc) {
16252                 DRV_LOG(ERR,
16253                         "Failed to create meter sub policy table.");
16254                 return -1;
16255         }
16256         /* Prepare matchers. */
16257         color_reg_c_idx = ret;
16258         for (i = 0; i < RTE_COLORS; i++) {
16259                 TAILQ_INIT(&sub_policy->color_rules[i]);
16260                 if (!acts[i].actions_n)
16261                         continue;
16262                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16263                                 sizeof(struct mlx5_sub_policy_color_rule),
16264                                 0, SOCKET_ID_ANY);
16265                 if (!color_rule) {
16266                         DRV_LOG(ERR, "No memory to create color rule.");
16267                         goto err_exit;
16268                 }
16269                 tmp_rules[i] = color_rule;
16270                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16271                                   color_rule, next_port);
16272                 color_rule->src_port = priv->representor_id;
16273                 /* No use. */
16274                 attr.priority = i;
16275                 /* Create matchers for colors. */
16276                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16277                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16278                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16279                                 &attr, svport_match, NULL,
16280                                 &color_rule->matcher, &flow_err)) {
16281                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16282                         goto err_exit;
16283                 }
16284                 /* Create flow, matching color. */
16285                 if (__flow_dv_create_policy_flow(dev,
16286                                 color_reg_c_idx, (enum rte_color)i,
16287                                 color_rule->matcher->matcher_object,
16288                                 acts[i].actions_n, acts[i].dv_actions,
16289                                 svport_match, NULL, &color_rule->rule,
16290                                 &attr)) {
16291                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16292                         goto err_exit;
16293                 }
16294         }
16295         return 0;
16296 err_exit:
16297         /* All the policy rules will be cleared. */
16298         do {
16299                 color_rule = tmp_rules[i];
16300                 if (color_rule) {
16301                         if (color_rule->rule)
16302                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16303                         if (color_rule->matcher) {
16304                                 struct mlx5_flow_tbl_data_entry *tbl =
16305                                         container_of(color_rule->matcher->tbl,
16306                                                      typeof(*tbl), tbl);
16307                                 mlx5_list_unregister(tbl->matchers,
16308                                                 &color_rule->matcher->entry);
16309                         }
16310                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16311                                      color_rule, next_port);
16312                         mlx5_free(color_rule);
16313                 }
16314         } while (i--);
16315         return -1;
16316 }
16317
16318 static int
16319 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16320                         struct mlx5_flow_meter_policy *mtr_policy,
16321                         struct mlx5_flow_meter_sub_policy *sub_policy,
16322                         uint32_t domain)
16323 {
16324         struct mlx5_priv *priv = dev->data->dev_private;
16325         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16326         struct mlx5_flow_dv_tag_resource *tag;
16327         struct mlx5_flow_dv_port_id_action_resource *port_action;
16328         struct mlx5_hrxq *hrxq;
16329         struct mlx5_flow_meter_info *next_fm = NULL;
16330         struct mlx5_flow_meter_policy *next_policy;
16331         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16332         struct mlx5_flow_tbl_data_entry *tbl_data;
16333         struct rte_flow_error error;
16334         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16335         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16336         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16337         bool match_src_port = false;
16338         int i;
16339
16340         /* If RSS or Queue, no previous actions / rules is created. */
16341         for (i = 0; i < RTE_COLORS; i++) {
16342                 acts[i].actions_n = 0;
16343                 if (i == RTE_COLOR_RED) {
16344                         /* Only support drop on red. */
16345                         acts[i].dv_actions[0] =
16346                                 mtr_policy->dr_drop_action[domain];
16347                         acts[i].actions_n = 1;
16348                         continue;
16349                 }
16350                 if (i == RTE_COLOR_GREEN &&
16351                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16352                         struct rte_flow_attr attr = {
16353                                 .transfer = transfer
16354                         };
16355
16356                         next_fm = mlx5_flow_meter_find(priv,
16357                                         mtr_policy->act_cnt[i].next_mtr_id,
16358                                         NULL);
16359                         if (!next_fm) {
16360                                 DRV_LOG(ERR,
16361                                         "Failed to get next hierarchy meter.");
16362                                 goto err_exit;
16363                         }
16364                         if (mlx5_flow_meter_attach(priv, next_fm,
16365                                                    &attr, &error)) {
16366                                 DRV_LOG(ERR, "%s", error.message);
16367                                 next_fm = NULL;
16368                                 goto err_exit;
16369                         }
16370                         /* Meter action must be the first for TX. */
16371                         if (mtr_first) {
16372                                 acts[i].dv_actions[acts[i].actions_n] =
16373                                         next_fm->meter_action;
16374                                 acts[i].actions_n++;
16375                         }
16376                 }
16377                 if (mtr_policy->act_cnt[i].rix_mark) {
16378                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16379                                         mtr_policy->act_cnt[i].rix_mark);
16380                         if (!tag) {
16381                                 DRV_LOG(ERR, "Failed to find "
16382                                 "mark action for policy.");
16383                                 goto err_exit;
16384                         }
16385                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16386                         acts[i].actions_n++;
16387                 }
16388                 if (mtr_policy->act_cnt[i].modify_hdr) {
16389                         acts[i].dv_actions[acts[i].actions_n] =
16390                                 mtr_policy->act_cnt[i].modify_hdr->action;
16391                         acts[i].actions_n++;
16392                 }
16393                 if (mtr_policy->act_cnt[i].fate_action) {
16394                         switch (mtr_policy->act_cnt[i].fate_action) {
16395                         case MLX5_FLOW_FATE_PORT_ID:
16396                                 port_action = mlx5_ipool_get
16397                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16398                                 mtr_policy->act_cnt[i].rix_port_id_action);
16399                                 if (!port_action) {
16400                                         DRV_LOG(ERR, "Failed to find "
16401                                                 "port action for policy.");
16402                                         goto err_exit;
16403                                 }
16404                                 acts[i].dv_actions[acts[i].actions_n] =
16405                                         port_action->action;
16406                                 acts[i].actions_n++;
16407                                 mtr_policy->dev = dev;
16408                                 match_src_port = true;
16409                                 break;
16410                         case MLX5_FLOW_FATE_DROP:
16411                         case MLX5_FLOW_FATE_JUMP:
16412                                 acts[i].dv_actions[acts[i].actions_n] =
16413                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16414                                 acts[i].actions_n++;
16415                                 break;
16416                         case MLX5_FLOW_FATE_SHARED_RSS:
16417                         case MLX5_FLOW_FATE_QUEUE:
16418                                 hrxq = mlx5_ipool_get
16419                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16420                                          sub_policy->rix_hrxq[i]);
16421                                 if (!hrxq) {
16422                                         DRV_LOG(ERR, "Failed to find "
16423                                                 "queue action for policy.");
16424                                         goto err_exit;
16425                                 }
16426                                 acts[i].dv_actions[acts[i].actions_n] =
16427                                         hrxq->action;
16428                                 acts[i].actions_n++;
16429                                 break;
16430                         case MLX5_FLOW_FATE_MTR:
16431                                 if (!next_fm) {
16432                                         DRV_LOG(ERR,
16433                                                 "No next hierarchy meter.");
16434                                         goto err_exit;
16435                                 }
16436                                 if (!mtr_first) {
16437                                         acts[i].dv_actions[acts[i].actions_n] =
16438                                                         next_fm->meter_action;
16439                                         acts[i].actions_n++;
16440                                 }
16441                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16442                                         next_sub_policy =
16443                                         mtr_policy->act_cnt[i].next_sub_policy;
16444                                 } else {
16445                                         next_policy =
16446                                                 mlx5_flow_meter_policy_find(dev,
16447                                                 next_fm->policy_id, NULL);
16448                                         MLX5_ASSERT(next_policy);
16449                                         next_sub_policy =
16450                                         next_policy->sub_policys[domain][0];
16451                                 }
16452                                 tbl_data =
16453                                         container_of(next_sub_policy->tbl_rsc,
16454                                         struct mlx5_flow_tbl_data_entry, tbl);
16455                                 acts[i].dv_actions[acts[i].actions_n++] =
16456                                                         tbl_data->jump.action;
16457                                 if (mtr_policy->act_cnt[i].modify_hdr)
16458                                         match_src_port = !!transfer;
16459                                 break;
16460                         default:
16461                                 /*Queue action do nothing*/
16462                                 break;
16463                         }
16464                 }
16465         }
16466         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16467                                 egress, transfer, match_src_port, acts)) {
16468                 DRV_LOG(ERR,
16469                         "Failed to create policy rules per domain.");
16470                 goto err_exit;
16471         }
16472         return 0;
16473 err_exit:
16474         if (next_fm)
16475                 mlx5_flow_meter_detach(priv, next_fm);
16476         return -1;
16477 }
16478
16479 /**
16480  * Create the policy rules.
16481  *
16482  * @param[in] dev
16483  *   Pointer to Ethernet device.
16484  * @param[in,out] mtr_policy
16485  *   Pointer to meter policy table.
16486  *
16487  * @return
16488  *   0 on success, -1 otherwise.
16489  */
16490 static int
16491 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16492                              struct mlx5_flow_meter_policy *mtr_policy)
16493 {
16494         int i;
16495         uint16_t sub_policy_num;
16496
16497         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16498                 sub_policy_num = (mtr_policy->sub_policy_num >>
16499                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16500                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16501                 if (!sub_policy_num)
16502                         continue;
16503                 /* Prepare actions list and create policy rules. */
16504                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16505                         mtr_policy->sub_policys[i][0], i)) {
16506                         DRV_LOG(ERR, "Failed to create policy action "
16507                                 "list per domain.");
16508                         return -1;
16509                 }
16510         }
16511         return 0;
16512 }
16513
16514 static int
16515 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16516 {
16517         struct mlx5_priv *priv = dev->data->dev_private;
16518         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16519         struct mlx5_flow_meter_def_policy *def_policy;
16520         struct mlx5_flow_tbl_resource *jump_tbl;
16521         struct mlx5_flow_tbl_data_entry *tbl_data;
16522         uint8_t egress, transfer;
16523         struct rte_flow_error error;
16524         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16525         int ret;
16526
16527         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16528         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16529         def_policy = mtrmng->def_policy[domain];
16530         if (!def_policy) {
16531                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16532                         sizeof(struct mlx5_flow_meter_def_policy),
16533                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16534                 if (!def_policy) {
16535                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16536                         goto def_policy_error;
16537                 }
16538                 mtrmng->def_policy[domain] = def_policy;
16539                 /* Create the meter suffix table with SUFFIX level. */
16540                 jump_tbl = flow_dv_tbl_resource_get(dev,
16541                                 MLX5_FLOW_TABLE_LEVEL_METER,
16542                                 egress, transfer, false, NULL, 0,
16543                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16544                 if (!jump_tbl) {
16545                         DRV_LOG(ERR,
16546                                 "Failed to create meter suffix table.");
16547                         goto def_policy_error;
16548                 }
16549                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16550                 tbl_data = container_of(jump_tbl,
16551                                         struct mlx5_flow_tbl_data_entry, tbl);
16552                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16553                                                 tbl_data->jump.action;
16554                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16555                 acts[RTE_COLOR_GREEN].actions_n = 1;
16556                 /*
16557                  * YELLOW has the same default policy as GREEN does.
16558                  * G & Y share the same table and action. The 2nd time of table
16559                  * resource getting is just to update the reference count for
16560                  * the releasing stage.
16561                  */
16562                 jump_tbl = flow_dv_tbl_resource_get(dev,
16563                                 MLX5_FLOW_TABLE_LEVEL_METER,
16564                                 egress, transfer, false, NULL, 0,
16565                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16566                 if (!jump_tbl) {
16567                         DRV_LOG(ERR,
16568                                 "Failed to get meter suffix table.");
16569                         goto def_policy_error;
16570                 }
16571                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16572                 tbl_data = container_of(jump_tbl,
16573                                         struct mlx5_flow_tbl_data_entry, tbl);
16574                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16575                                                 tbl_data->jump.action;
16576                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16577                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16578                 /* Create jump action to the drop table. */
16579                 if (!mtrmng->drop_tbl[domain]) {
16580                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16581                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16582                                  egress, transfer, false, NULL, 0,
16583                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16584                         if (!mtrmng->drop_tbl[domain]) {
16585                                 DRV_LOG(ERR, "Failed to create meter "
16586                                         "drop table for default policy.");
16587                                 goto def_policy_error;
16588                         }
16589                 }
16590                 /* all RED: unique Drop table for jump action. */
16591                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16592                                         struct mlx5_flow_tbl_data_entry, tbl);
16593                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16594                                                 tbl_data->jump.action;
16595                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16596                 acts[RTE_COLOR_RED].actions_n = 1;
16597                 /* Create default policy rules. */
16598                 ret = __flow_dv_create_domain_policy_rules(dev,
16599                                         &def_policy->sub_policy,
16600                                         egress, transfer, false, acts);
16601                 if (ret) {
16602                         DRV_LOG(ERR, "Failed to create default policy rules.");
16603                         goto def_policy_error;
16604                 }
16605         }
16606         return 0;
16607 def_policy_error:
16608         __flow_dv_destroy_domain_def_policy(dev,
16609                                             (enum mlx5_meter_domain)domain);
16610         return -1;
16611 }
16612
16613 /**
16614  * Create the default policy table set.
16615  *
16616  * @param[in] dev
16617  *   Pointer to Ethernet device.
16618  * @return
16619  *   0 on success, -1 otherwise.
16620  */
16621 static int
16622 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16623 {
16624         struct mlx5_priv *priv = dev->data->dev_private;
16625         int i;
16626
16627         /* Non-termination policy table. */
16628         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16629                 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16630                         continue;
16631                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16632                         DRV_LOG(ERR, "Failed to create default policy");
16633                         /* Rollback the created default policies for others. */
16634                         flow_dv_destroy_def_policy(dev);
16635                         return -1;
16636                 }
16637         }
16638         return 0;
16639 }
16640
16641 /**
16642  * Create the needed meter tables.
16643  * Lock free, (mutex should be acquired by caller).
16644  *
16645  * @param[in] dev
16646  *   Pointer to Ethernet device.
16647  * @param[in] fm
16648  *   Meter information table.
16649  * @param[in] mtr_idx
16650  *   Meter index.
16651  * @param[in] domain_bitmap
16652  *   Domain bitmap.
16653  * @return
16654  *   0 on success, -1 otherwise.
16655  */
16656 static int
16657 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16658                         struct mlx5_flow_meter_info *fm,
16659                         uint32_t mtr_idx,
16660                         uint8_t domain_bitmap)
16661 {
16662         struct mlx5_priv *priv = dev->data->dev_private;
16663         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16664         struct rte_flow_error error;
16665         struct mlx5_flow_tbl_data_entry *tbl_data;
16666         uint8_t egress, transfer;
16667         void *actions[METER_ACTIONS];
16668         int domain, ret, i;
16669         struct mlx5_flow_counter *cnt;
16670         struct mlx5_flow_dv_match_params value = {
16671                 .size = sizeof(value.buf),
16672         };
16673         struct mlx5_flow_dv_match_params matcher_para = {
16674                 .size = sizeof(matcher_para.buf),
16675         };
16676         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16677                                                      0, &error);
16678         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16679         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16680         struct mlx5_list_entry *entry;
16681         struct mlx5_flow_dv_matcher matcher = {
16682                 .mask = {
16683                         .size = sizeof(matcher.mask.buf),
16684                 },
16685         };
16686         struct mlx5_flow_dv_matcher *drop_matcher;
16687         struct mlx5_flow_cb_ctx ctx = {
16688                 .error = &error,
16689                 .data = &matcher,
16690         };
16691         uint8_t misc_mask;
16692
16693         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16694                 rte_errno = ENOTSUP;
16695                 return -1;
16696         }
16697         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16698                 if (!(domain_bitmap & (1 << domain)) ||
16699                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16700                         continue;
16701                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16702                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16703                 /* Create the drop table with METER DROP level. */
16704                 if (!mtrmng->drop_tbl[domain]) {
16705                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16706                                         MLX5_FLOW_TABLE_LEVEL_METER,
16707                                         egress, transfer, false, NULL, 0,
16708                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16709                         if (!mtrmng->drop_tbl[domain]) {
16710                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16711                                 goto policy_error;
16712                         }
16713                 }
16714                 /* Create default matcher in drop table. */
16715                 matcher.tbl = mtrmng->drop_tbl[domain],
16716                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16717                                 struct mlx5_flow_tbl_data_entry, tbl);
16718                 if (!mtrmng->def_matcher[domain]) {
16719                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16720                                        (enum modify_reg)mtr_id_reg_c,
16721                                        0, 0);
16722                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16723                         matcher.crc = rte_raw_cksum
16724                                         ((const void *)matcher.mask.buf,
16725                                         matcher.mask.size);
16726                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16727                         if (!entry) {
16728                                 DRV_LOG(ERR, "Failed to register meter "
16729                                 "drop default matcher.");
16730                                 goto policy_error;
16731                         }
16732                         mtrmng->def_matcher[domain] = container_of(entry,
16733                         struct mlx5_flow_dv_matcher, entry);
16734                 }
16735                 /* Create default rule in drop table. */
16736                 if (!mtrmng->def_rule[domain]) {
16737                         i = 0;
16738                         actions[i++] = priv->sh->dr_drop_action;
16739                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16740                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16741                         misc_mask = flow_dv_matcher_enable(value.buf);
16742                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16743                         ret = mlx5_flow_os_create_flow
16744                                 (mtrmng->def_matcher[domain]->matcher_object,
16745                                 (void *)&value, i, actions,
16746                                 &mtrmng->def_rule[domain]);
16747                         if (ret) {
16748                                 DRV_LOG(ERR, "Failed to create meter "
16749                                 "default drop rule for drop table.");
16750                                 goto policy_error;
16751                         }
16752                 }
16753                 if (!fm->drop_cnt)
16754                         continue;
16755                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16756                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16757                         /* Create matchers for Drop. */
16758                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16759                                         (enum modify_reg)mtr_id_reg_c, 0,
16760                                         (mtr_id_mask << mtr_id_offset));
16761                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16762                         matcher.crc = rte_raw_cksum
16763                                         ((const void *)matcher.mask.buf,
16764                                         matcher.mask.size);
16765                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16766                         if (!entry) {
16767                                 DRV_LOG(ERR,
16768                                 "Failed to register meter drop matcher.");
16769                                 goto policy_error;
16770                         }
16771                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16772                                 container_of(entry, struct mlx5_flow_dv_matcher,
16773                                              entry);
16774                 }
16775                 drop_matcher =
16776                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16777                 /* Create drop rule, matching meter_id only. */
16778                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16779                                 (enum modify_reg)mtr_id_reg_c,
16780                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16781                 i = 0;
16782                 cnt = flow_dv_counter_get_by_idx(dev,
16783                                         fm->drop_cnt, NULL);
16784                 actions[i++] = cnt->action;
16785                 actions[i++] = priv->sh->dr_drop_action;
16786                 misc_mask = flow_dv_matcher_enable(value.buf);
16787                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16788                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16789                                                (void *)&value, i, actions,
16790                                                &fm->drop_rule[domain]);
16791                 if (ret) {
16792                         DRV_LOG(ERR, "Failed to create meter "
16793                                 "drop rule for drop table.");
16794                                 goto policy_error;
16795                 }
16796         }
16797         return 0;
16798 policy_error:
16799         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16800                 if (fm->drop_rule[i]) {
16801                         claim_zero(mlx5_flow_os_destroy_flow
16802                                 (fm->drop_rule[i]));
16803                         fm->drop_rule[i] = NULL;
16804                 }
16805         }
16806         return -1;
16807 }
16808
16809 static struct mlx5_flow_meter_sub_policy *
16810 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16811                 struct mlx5_flow_meter_policy *mtr_policy,
16812                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16813                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16814                 bool *is_reuse)
16815 {
16816         struct mlx5_priv *priv = dev->data->dev_private;
16817         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16818         uint32_t sub_policy_idx = 0;
16819         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16820         uint32_t i, j;
16821         struct mlx5_hrxq *hrxq;
16822         struct mlx5_flow_handle dh;
16823         struct mlx5_meter_policy_action_container *act_cnt;
16824         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16825         uint16_t sub_policy_num;
16826
16827         rte_spinlock_lock(&mtr_policy->sl);
16828         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16829                 if (!rss_desc[i])
16830                         continue;
16831                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16832                 if (!hrxq_idx[i]) {
16833                         rte_spinlock_unlock(&mtr_policy->sl);
16834                         return NULL;
16835                 }
16836         }
16837         sub_policy_num = (mtr_policy->sub_policy_num >>
16838                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16839                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16840         for (j = 0; j < sub_policy_num; j++) {
16841                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16842                         if (rss_desc[i] &&
16843                             hrxq_idx[i] !=
16844                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16845                                 break;
16846                 }
16847                 if (i >= MLX5_MTR_RTE_COLORS) {
16848                         /*
16849                          * Found the sub policy table with
16850                          * the same queue per color.
16851                          */
16852                         rte_spinlock_unlock(&mtr_policy->sl);
16853                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16854                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16855                         *is_reuse = true;
16856                         return mtr_policy->sub_policys[domain][j];
16857                 }
16858         }
16859         /* Create sub policy. */
16860         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16861                 /* Reuse the first pre-allocated sub_policy. */
16862                 sub_policy = mtr_policy->sub_policys[domain][0];
16863                 sub_policy_idx = sub_policy->idx;
16864         } else {
16865                 sub_policy = mlx5_ipool_zmalloc
16866                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16867                                  &sub_policy_idx);
16868                 if (!sub_policy ||
16869                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16870                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16871                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16872                         goto rss_sub_policy_error;
16873                 }
16874                 sub_policy->idx = sub_policy_idx;
16875                 sub_policy->main_policy = mtr_policy;
16876         }
16877         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16878                 if (!rss_desc[i])
16879                         continue;
16880                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16881                 if (mtr_policy->is_hierarchy) {
16882                         act_cnt = &mtr_policy->act_cnt[i];
16883                         act_cnt->next_sub_policy = next_sub_policy;
16884                         mlx5_hrxq_release(dev, hrxq_idx[i]);
16885                 } else {
16886                         /*
16887                          * Overwrite the last action from
16888                          * RSS action to Queue action.
16889                          */
16890                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16891                                               hrxq_idx[i]);
16892                         if (!hrxq) {
16893                                 DRV_LOG(ERR, "Failed to get policy hrxq");
16894                                 goto rss_sub_policy_error;
16895                         }
16896                         act_cnt = &mtr_policy->act_cnt[i];
16897                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16898                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16899                                 if (act_cnt->rix_mark)
16900                                         dh.mark = 1;
16901                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16902                                 dh.rix_hrxq = hrxq_idx[i];
16903                                 flow_drv_rxq_flags_set(dev, &dh);
16904                         }
16905                 }
16906         }
16907         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16908                                                sub_policy, domain)) {
16909                 DRV_LOG(ERR, "Failed to create policy "
16910                         "rules for ingress domain.");
16911                 goto rss_sub_policy_error;
16912         }
16913         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16914                 i = (mtr_policy->sub_policy_num >>
16915                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16916                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16917                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16918                         DRV_LOG(ERR, "No free sub-policy slot.");
16919                         goto rss_sub_policy_error;
16920                 }
16921                 mtr_policy->sub_policys[domain][i] = sub_policy;
16922                 i++;
16923                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16924                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16925                 mtr_policy->sub_policy_num |=
16926                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16927                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16928         }
16929         rte_spinlock_unlock(&mtr_policy->sl);
16930         *is_reuse = false;
16931         return sub_policy;
16932 rss_sub_policy_error:
16933         if (sub_policy) {
16934                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16935                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16936                         i = (mtr_policy->sub_policy_num >>
16937                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16938                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16939                         mtr_policy->sub_policys[domain][i] = NULL;
16940                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16941                                         sub_policy->idx);
16942                 }
16943         }
16944         rte_spinlock_unlock(&mtr_policy->sl);
16945         return NULL;
16946 }
16947
16948 /**
16949  * Find the policy table for prefix table with RSS.
16950  *
16951  * @param[in] dev
16952  *   Pointer to Ethernet device.
16953  * @param[in] mtr_policy
16954  *   Pointer to meter policy table.
16955  * @param[in] rss_desc
16956  *   Pointer to rss_desc
16957  * @return
16958  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
16959  */
16960 static struct mlx5_flow_meter_sub_policy *
16961 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16962                 struct mlx5_flow_meter_policy *mtr_policy,
16963                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16964 {
16965         struct mlx5_priv *priv = dev->data->dev_private;
16966         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16967         struct mlx5_flow_meter_info *next_fm;
16968         struct mlx5_flow_meter_policy *next_policy;
16969         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16970         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16971         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16972         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16973         bool reuse_sub_policy;
16974         uint32_t i = 0;
16975         uint32_t j = 0;
16976
16977         while (true) {
16978                 /* Iterate hierarchy to get all policies in this hierarchy. */
16979                 policies[i++] = mtr_policy;
16980                 if (!mtr_policy->is_hierarchy)
16981                         break;
16982                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16983                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16984                         return NULL;
16985                 }
16986                 next_fm = mlx5_flow_meter_find(priv,
16987                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16988                 if (!next_fm) {
16989                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16990                         return NULL;
16991                 }
16992                 next_policy =
16993                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16994                                                     NULL);
16995                 MLX5_ASSERT(next_policy);
16996                 mtr_policy = next_policy;
16997         }
16998         while (i) {
16999                 /**
17000                  * From last policy to the first one in hierarchy,
17001                  * create / get the sub policy for each of them.
17002                  */
17003                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
17004                                                         policies[--i],
17005                                                         rss_desc,
17006                                                         next_sub_policy,
17007                                                         &reuse_sub_policy);
17008                 if (!sub_policy) {
17009                         DRV_LOG(ERR, "Failed to get the sub policy.");
17010                         goto err_exit;
17011                 }
17012                 if (!reuse_sub_policy)
17013                         sub_policies[j++] = sub_policy;
17014                 next_sub_policy = sub_policy;
17015         }
17016         return sub_policy;
17017 err_exit:
17018         while (j) {
17019                 uint16_t sub_policy_num;
17020
17021                 sub_policy = sub_policies[--j];
17022                 mtr_policy = sub_policy->main_policy;
17023                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17024                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17025                         sub_policy_num = (mtr_policy->sub_policy_num >>
17026                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17027                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
17028                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
17029                                                                         NULL;
17030                         sub_policy_num--;
17031                         mtr_policy->sub_policy_num &=
17032                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17033                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
17034                         mtr_policy->sub_policy_num |=
17035                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17036                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
17037                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17038                                         sub_policy->idx);
17039                 }
17040         }
17041         return NULL;
17042 }
17043
17044 /**
17045  * Create the sub policy tag rule for all meters in hierarchy.
17046  *
17047  * @param[in] dev
17048  *   Pointer to Ethernet device.
17049  * @param[in] fm
17050  *   Meter information table.
17051  * @param[in] src_port
17052  *   The src port this extra rule should use.
17053  * @param[in] item
17054  *   The src port match item.
17055  * @param[out] error
17056  *   Perform verbose error reporting if not NULL.
17057  * @return
17058  *   0 on success, a negative errno value otherwise and rte_errno is set.
17059  */
17060 static int
17061 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
17062                                 struct mlx5_flow_meter_info *fm,
17063                                 int32_t src_port,
17064                                 const struct rte_flow_item *item,
17065                                 struct rte_flow_error *error)
17066 {
17067         struct mlx5_priv *priv = dev->data->dev_private;
17068         struct mlx5_flow_meter_policy *mtr_policy;
17069         struct mlx5_flow_meter_sub_policy *sub_policy;
17070         struct mlx5_flow_meter_info *next_fm = NULL;
17071         struct mlx5_flow_meter_policy *next_policy;
17072         struct mlx5_flow_meter_sub_policy *next_sub_policy;
17073         struct mlx5_flow_tbl_data_entry *tbl_data;
17074         struct mlx5_sub_policy_color_rule *color_rule;
17075         struct mlx5_meter_policy_acts acts;
17076         uint32_t color_reg_c_idx;
17077         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
17078         struct rte_flow_attr attr = {
17079                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
17080                 .priority = 0,
17081                 .ingress = 0,
17082                 .egress = 0,
17083                 .transfer = 1,
17084                 .reserved = 0,
17085         };
17086         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17087         int i;
17088
17089         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17090         MLX5_ASSERT(mtr_policy);
17091         if (!mtr_policy->is_hierarchy)
17092                 return 0;
17093         next_fm = mlx5_flow_meter_find(priv,
17094                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17095         if (!next_fm) {
17096                 return rte_flow_error_set(error, EINVAL,
17097                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
17098                                 "Failed to find next meter in hierarchy.");
17099         }
17100         if (!next_fm->drop_cnt)
17101                 goto exit;
17102         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
17103         sub_policy = mtr_policy->sub_policys[domain][0];
17104         for (i = 0; i < RTE_COLORS; i++) {
17105                 bool rule_exist = false;
17106                 struct mlx5_meter_policy_action_container *act_cnt;
17107
17108                 if (i >= RTE_COLOR_YELLOW)
17109                         break;
17110                 TAILQ_FOREACH(color_rule,
17111                               &sub_policy->color_rules[i], next_port)
17112                         if (color_rule->src_port == src_port) {
17113                                 rule_exist = true;
17114                                 break;
17115                         }
17116                 if (rule_exist)
17117                         continue;
17118                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
17119                                 sizeof(struct mlx5_sub_policy_color_rule),
17120                                 0, SOCKET_ID_ANY);
17121                 if (!color_rule)
17122                         return rte_flow_error_set(error, ENOMEM,
17123                                 RTE_FLOW_ERROR_TYPE_ACTION,
17124                                 NULL, "No memory to create tag color rule.");
17125                 color_rule->src_port = src_port;
17126                 attr.priority = i;
17127                 next_policy = mlx5_flow_meter_policy_find(dev,
17128                                                 next_fm->policy_id, NULL);
17129                 MLX5_ASSERT(next_policy);
17130                 next_sub_policy = next_policy->sub_policys[domain][0];
17131                 tbl_data = container_of(next_sub_policy->tbl_rsc,
17132                                         struct mlx5_flow_tbl_data_entry, tbl);
17133                 act_cnt = &mtr_policy->act_cnt[i];
17134                 if (mtr_first) {
17135                         acts.dv_actions[0] = next_fm->meter_action;
17136                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
17137                 } else {
17138                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
17139                         acts.dv_actions[1] = next_fm->meter_action;
17140                 }
17141                 acts.dv_actions[2] = tbl_data->jump.action;
17142                 acts.actions_n = 3;
17143                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17144                         next_fm = NULL;
17145                         goto err_exit;
17146                 }
17147                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17148                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17149                                 &attr, true, item,
17150                                 &color_rule->matcher, error)) {
17151                         rte_flow_error_set(error, errno,
17152                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17153                                 "Failed to create hierarchy meter matcher.");
17154                         goto err_exit;
17155                 }
17156                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17157                                         (enum rte_color)i,
17158                                         color_rule->matcher->matcher_object,
17159                                         acts.actions_n, acts.dv_actions,
17160                                         true, item,
17161                                         &color_rule->rule, &attr)) {
17162                         rte_flow_error_set(error, errno,
17163                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17164                                 "Failed to create hierarchy meter rule.");
17165                         goto err_exit;
17166                 }
17167                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17168                                   color_rule, next_port);
17169         }
17170 exit:
17171         /**
17172          * Recursive call to iterate all meters in hierarchy and
17173          * create needed rules.
17174          */
17175         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17176                                                 src_port, item, error);
17177 err_exit:
17178         if (color_rule) {
17179                 if (color_rule->rule)
17180                         mlx5_flow_os_destroy_flow(color_rule->rule);
17181                 if (color_rule->matcher) {
17182                         struct mlx5_flow_tbl_data_entry *tbl =
17183                                 container_of(color_rule->matcher->tbl,
17184                                                 typeof(*tbl), tbl);
17185                         mlx5_list_unregister(tbl->matchers,
17186                                                 &color_rule->matcher->entry);
17187                 }
17188                 mlx5_free(color_rule);
17189         }
17190         if (next_fm)
17191                 mlx5_flow_meter_detach(priv, next_fm);
17192         return -rte_errno;
17193 }
17194
17195 /**
17196  * Destroy the sub policy table with RX queue.
17197  *
17198  * @param[in] dev
17199  *   Pointer to Ethernet device.
17200  * @param[in] mtr_policy
17201  *   Pointer to meter policy table.
17202  */
17203 static void
17204 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17205                                     struct mlx5_flow_meter_policy *mtr_policy)
17206 {
17207         struct mlx5_priv *priv = dev->data->dev_private;
17208         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17209         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17210         uint32_t i, j;
17211         uint16_t sub_policy_num, new_policy_num;
17212
17213         rte_spinlock_lock(&mtr_policy->sl);
17214         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17215                 switch (mtr_policy->act_cnt[i].fate_action) {
17216                 case MLX5_FLOW_FATE_SHARED_RSS:
17217                         sub_policy_num = (mtr_policy->sub_policy_num >>
17218                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17219                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17220                         new_policy_num = sub_policy_num;
17221                         for (j = 0; j < sub_policy_num; j++) {
17222                                 sub_policy =
17223                                         mtr_policy->sub_policys[domain][j];
17224                                 if (sub_policy) {
17225                                         __flow_dv_destroy_sub_policy_rules(dev,
17226                                                 sub_policy);
17227                                 if (sub_policy !=
17228                                         mtr_policy->sub_policys[domain][0]) {
17229                                         mtr_policy->sub_policys[domain][j] =
17230                                                                 NULL;
17231                                         mlx5_ipool_free
17232                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17233                                                 sub_policy->idx);
17234                                                 new_policy_num--;
17235                                         }
17236                                 }
17237                         }
17238                         if (new_policy_num != sub_policy_num) {
17239                                 mtr_policy->sub_policy_num &=
17240                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17241                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17242                                 mtr_policy->sub_policy_num |=
17243                                 (new_policy_num &
17244                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17245                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17246                         }
17247                         break;
17248                 case MLX5_FLOW_FATE_QUEUE:
17249                         sub_policy = mtr_policy->sub_policys[domain][0];
17250                         __flow_dv_destroy_sub_policy_rules(dev,
17251                                                            sub_policy);
17252                         break;
17253                 default:
17254                         /*Other actions without queue and do nothing*/
17255                         break;
17256                 }
17257         }
17258         rte_spinlock_unlock(&mtr_policy->sl);
17259 }
17260 /**
17261  * Check whether the DR drop action is supported on the root table or not.
17262  *
17263  * Create a simple flow with DR drop action on root table to validate
17264  * if DR drop action on root table is supported or not.
17265  *
17266  * @param[in] dev
17267  *   Pointer to rte_eth_dev structure.
17268  *
17269  * @return
17270  *   0 on success, a negative errno value otherwise and rte_errno is set.
17271  */
17272 int
17273 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17274 {
17275         struct mlx5_priv *priv = dev->data->dev_private;
17276         struct mlx5_dev_ctx_shared *sh = priv->sh;
17277         struct mlx5_flow_dv_match_params mask = {
17278                 .size = sizeof(mask.buf),
17279         };
17280         struct mlx5_flow_dv_match_params value = {
17281                 .size = sizeof(value.buf),
17282         };
17283         struct mlx5dv_flow_matcher_attr dv_attr = {
17284                 .type = IBV_FLOW_ATTR_NORMAL,
17285                 .priority = 0,
17286                 .match_criteria_enable = 0,
17287                 .match_mask = (void *)&mask,
17288         };
17289         struct mlx5_flow_tbl_resource *tbl = NULL;
17290         void *matcher = NULL;
17291         void *flow = NULL;
17292         int ret = -1;
17293
17294         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17295                                         0, 0, 0, NULL);
17296         if (!tbl)
17297                 goto err;
17298         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17299         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17300         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17301                                                tbl->obj, &matcher);
17302         if (ret)
17303                 goto err;
17304         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17305         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17306                                        &sh->dr_drop_action, &flow);
17307 err:
17308         /*
17309          * If DR drop action is not supported on root table, flow create will
17310          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17311          */
17312         if (!flow) {
17313                 if (matcher &&
17314                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17315                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17316                 else
17317                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17318                 ret = -1;
17319         } else {
17320                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17321         }
17322         if (matcher)
17323                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17324         if (tbl)
17325                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17326         return ret;
17327 }
17328
17329 /**
17330  * Validate the batch counter support in root table.
17331  *
17332  * Create a simple flow with invalid counter and drop action on root table to
17333  * validate if batch counter with offset on root table is supported or not.
17334  *
17335  * @param[in] dev
17336  *   Pointer to rte_eth_dev structure.
17337  *
17338  * @return
17339  *   0 on success, a negative errno value otherwise and rte_errno is set.
17340  */
17341 int
17342 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17343 {
17344         struct mlx5_priv *priv = dev->data->dev_private;
17345         struct mlx5_dev_ctx_shared *sh = priv->sh;
17346         struct mlx5_flow_dv_match_params mask = {
17347                 .size = sizeof(mask.buf),
17348         };
17349         struct mlx5_flow_dv_match_params value = {
17350                 .size = sizeof(value.buf),
17351         };
17352         struct mlx5dv_flow_matcher_attr dv_attr = {
17353                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17354                 .priority = 0,
17355                 .match_criteria_enable = 0,
17356                 .match_mask = (void *)&mask,
17357         };
17358         void *actions[2] = { 0 };
17359         struct mlx5_flow_tbl_resource *tbl = NULL;
17360         struct mlx5_devx_obj *dcs = NULL;
17361         void *matcher = NULL;
17362         void *flow = NULL;
17363         int ret = -1;
17364
17365         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17366                                         0, 0, 0, NULL);
17367         if (!tbl)
17368                 goto err;
17369         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17370         if (!dcs)
17371                 goto err;
17372         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17373                                                     &actions[0]);
17374         if (ret)
17375                 goto err;
17376         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17377         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17378         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17379                                                tbl->obj, &matcher);
17380         if (ret)
17381                 goto err;
17382         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17383         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17384                                        actions, &flow);
17385 err:
17386         /*
17387          * If batch counter with offset is not supported, the driver will not
17388          * validate the invalid offset value, flow create should success.
17389          * In this case, it means batch counter is not supported in root table.
17390          *
17391          * Otherwise, if flow create is failed, counter offset is supported.
17392          */
17393         if (flow) {
17394                 DRV_LOG(INFO, "Batch counter is not supported in root "
17395                               "table. Switch to fallback mode.");
17396                 rte_errno = ENOTSUP;
17397                 ret = -rte_errno;
17398                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17399         } else {
17400                 /* Check matcher to make sure validate fail at flow create. */
17401                 if (!matcher || (matcher && errno != EINVAL))
17402                         DRV_LOG(ERR, "Unexpected error in counter offset "
17403                                      "support detection");
17404                 ret = 0;
17405         }
17406         if (actions[0])
17407                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17408         if (matcher)
17409                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17410         if (tbl)
17411                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17412         if (dcs)
17413                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17414         return ret;
17415 }
17416
17417 /**
17418  * Query a devx counter.
17419  *
17420  * @param[in] dev
17421  *   Pointer to the Ethernet device structure.
17422  * @param[in] cnt
17423  *   Index to the flow counter.
17424  * @param[in] clear
17425  *   Set to clear the counter statistics.
17426  * @param[out] pkts
17427  *   The statistics value of packets.
17428  * @param[out] bytes
17429  *   The statistics value of bytes.
17430  *
17431  * @return
17432  *   0 on success, otherwise return -1.
17433  */
17434 static int
17435 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17436                       uint64_t *pkts, uint64_t *bytes)
17437 {
17438         struct mlx5_priv *priv = dev->data->dev_private;
17439         struct mlx5_flow_counter *cnt;
17440         uint64_t inn_pkts, inn_bytes;
17441         int ret;
17442
17443         if (!priv->sh->devx)
17444                 return -1;
17445
17446         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17447         if (ret)
17448                 return -1;
17449         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17450         *pkts = inn_pkts - cnt->hits;
17451         *bytes = inn_bytes - cnt->bytes;
17452         if (clear) {
17453                 cnt->hits = inn_pkts;
17454                 cnt->bytes = inn_bytes;
17455         }
17456         return 0;
17457 }
17458
17459 /**
17460  * Get aged-out flows.
17461  *
17462  * @param[in] dev
17463  *   Pointer to the Ethernet device structure.
17464  * @param[in] context
17465  *   The address of an array of pointers to the aged-out flows contexts.
17466  * @param[in] nb_contexts
17467  *   The length of context array pointers.
17468  * @param[out] error
17469  *   Perform verbose error reporting if not NULL. Initialized in case of
17470  *   error only.
17471  *
17472  * @return
17473  *   how many contexts get in success, otherwise negative errno value.
17474  *   if nb_contexts is 0, return the amount of all aged contexts.
17475  *   if nb_contexts is not 0 , return the amount of aged flows reported
17476  *   in the context array.
17477  * @note: only stub for now
17478  */
17479 static int
17480 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17481                     void **context,
17482                     uint32_t nb_contexts,
17483                     struct rte_flow_error *error)
17484 {
17485         struct mlx5_priv *priv = dev->data->dev_private;
17486         struct mlx5_age_info *age_info;
17487         struct mlx5_age_param *age_param;
17488         struct mlx5_flow_counter *counter;
17489         struct mlx5_aso_age_action *act;
17490         int nb_flows = 0;
17491
17492         if (nb_contexts && !context)
17493                 return rte_flow_error_set(error, EINVAL,
17494                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17495                                           NULL, "empty context");
17496         age_info = GET_PORT_AGE_INFO(priv);
17497         rte_spinlock_lock(&age_info->aged_sl);
17498         LIST_FOREACH(act, &age_info->aged_aso, next) {
17499                 nb_flows++;
17500                 if (nb_contexts) {
17501                         context[nb_flows - 1] =
17502                                                 act->age_params.context;
17503                         if (!(--nb_contexts))
17504                                 break;
17505                 }
17506         }
17507         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17508                 nb_flows++;
17509                 if (nb_contexts) {
17510                         age_param = MLX5_CNT_TO_AGE(counter);
17511                         context[nb_flows - 1] = age_param->context;
17512                         if (!(--nb_contexts))
17513                                 break;
17514                 }
17515         }
17516         rte_spinlock_unlock(&age_info->aged_sl);
17517         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17518         return nb_flows;
17519 }
17520
17521 /*
17522  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17523  */
17524 static uint32_t
17525 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17526 {
17527         return flow_dv_counter_alloc(dev, 0);
17528 }
17529
17530 /**
17531  * Validate indirect action.
17532  * Dispatcher for action type specific validation.
17533  *
17534  * @param[in] dev
17535  *   Pointer to the Ethernet device structure.
17536  * @param[in] conf
17537  *   Indirect action configuration.
17538  * @param[in] action
17539  *   The indirect action object to validate.
17540  * @param[out] error
17541  *   Perform verbose error reporting if not NULL. Initialized in case of
17542  *   error only.
17543  *
17544  * @return
17545  *   0 on success, otherwise negative errno value.
17546  */
17547 static int
17548 flow_dv_action_validate(struct rte_eth_dev *dev,
17549                         const struct rte_flow_indir_action_conf *conf,
17550                         const struct rte_flow_action *action,
17551                         struct rte_flow_error *err)
17552 {
17553         struct mlx5_priv *priv = dev->data->dev_private;
17554
17555         RTE_SET_USED(conf);
17556         switch (action->type) {
17557         case RTE_FLOW_ACTION_TYPE_RSS:
17558                 /*
17559                  * priv->obj_ops is set according to driver capabilities.
17560                  * When DevX capabilities are
17561                  * sufficient, it is set to devx_obj_ops.
17562                  * Otherwise, it is set to ibv_obj_ops.
17563                  * ibv_obj_ops doesn't support ind_table_modify operation.
17564                  * In this case the indirect RSS action can't be used.
17565                  */
17566                 if (priv->obj_ops.ind_table_modify == NULL)
17567                         return rte_flow_error_set
17568                                         (err, ENOTSUP,
17569                                          RTE_FLOW_ERROR_TYPE_ACTION,
17570                                          NULL,
17571                                          "Indirect RSS action not supported");
17572                 return mlx5_validate_action_rss(dev, action, err);
17573         case RTE_FLOW_ACTION_TYPE_AGE:
17574                 if (!priv->sh->aso_age_mng)
17575                         return rte_flow_error_set(err, ENOTSUP,
17576                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17577                                                 NULL,
17578                                                 "Indirect age action not supported");
17579                 return flow_dv_validate_action_age(0, action, dev, err);
17580         case RTE_FLOW_ACTION_TYPE_COUNT:
17581                 return flow_dv_validate_action_count(dev, true, 0, err);
17582         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17583                 if (!priv->sh->ct_aso_en)
17584                         return rte_flow_error_set(err, ENOTSUP,
17585                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17586                                         "ASO CT is not supported");
17587                 return mlx5_validate_action_ct(dev, action->conf, err);
17588         default:
17589                 return rte_flow_error_set(err, ENOTSUP,
17590                                           RTE_FLOW_ERROR_TYPE_ACTION,
17591                                           NULL,
17592                                           "action type not supported");
17593         }
17594 }
17595
17596 /*
17597  * Check if the RSS configurations for colors of a meter policy match
17598  * each other, except the queues.
17599  *
17600  * @param[in] r1
17601  *   Pointer to the first RSS flow action.
17602  * @param[in] r2
17603  *   Pointer to the second RSS flow action.
17604  *
17605  * @return
17606  *   0 on match, 1 on conflict.
17607  */
17608 static inline int
17609 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17610                                const struct rte_flow_action_rss *r2)
17611 {
17612         if (r1 == NULL || r2 == NULL)
17613                 return 0;
17614         if (!(r1->level <= 1 && r2->level <= 1) &&
17615             !(r1->level > 1 && r2->level > 1))
17616                 return 1;
17617         if (r1->types != r2->types &&
17618             !((r1->types == 0 || r1->types == RTE_ETH_RSS_IP) &&
17619               (r2->types == 0 || r2->types == RTE_ETH_RSS_IP)))
17620                 return 1;
17621         if (r1->key || r2->key) {
17622                 const void *key1 = r1->key ? r1->key : rss_hash_default_key;
17623                 const void *key2 = r2->key ? r2->key : rss_hash_default_key;
17624
17625                 if (memcmp(key1, key2, MLX5_RSS_HASH_KEY_LEN))
17626                         return 1;
17627         }
17628         return 0;
17629 }
17630
17631 /**
17632  * Validate the meter hierarchy chain for meter policy.
17633  *
17634  * @param[in] dev
17635  *   Pointer to the Ethernet device structure.
17636  * @param[in] meter_id
17637  *   Meter id.
17638  * @param[in] action_flags
17639  *   Holds the actions detected until now.
17640  * @param[out] is_rss
17641  *   Is RSS or not.
17642  * @param[out] hierarchy_domain
17643  *   The domain bitmap for hierarchy policy.
17644  * @param[out] error
17645  *   Perform verbose error reporting if not NULL. Initialized in case of
17646  *   error only.
17647  *
17648  * @return
17649  *   0 on success, otherwise negative errno value with error set.
17650  */
17651 static int
17652 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17653                                   uint32_t meter_id,
17654                                   uint64_t action_flags,
17655                                   bool *is_rss,
17656                                   uint8_t *hierarchy_domain,
17657                                   struct rte_mtr_error *error)
17658 {
17659         struct mlx5_priv *priv = dev->data->dev_private;
17660         struct mlx5_flow_meter_info *fm;
17661         struct mlx5_flow_meter_policy *policy;
17662         uint8_t cnt = 1;
17663
17664         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17665                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17666                 return -rte_mtr_error_set(error, EINVAL,
17667                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17668                                         NULL,
17669                                         "Multiple fate actions not supported.");
17670         *hierarchy_domain = 0;
17671         while (true) {
17672                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17673                 if (!fm)
17674                         return -rte_mtr_error_set(error, EINVAL,
17675                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17676                                         "Meter not found in meter hierarchy.");
17677                 if (fm->def_policy)
17678                         return -rte_mtr_error_set(error, EINVAL,
17679                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17680                         "Non termination meter not supported in hierarchy.");
17681                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17682                 MLX5_ASSERT(policy);
17683                 /**
17684                  * Only inherit the supported domains of the first meter in
17685                  * hierarchy.
17686                  * One meter supports at least one domain.
17687                  */
17688                 if (!*hierarchy_domain) {
17689                         if (policy->transfer)
17690                                 *hierarchy_domain |=
17691                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17692                         if (policy->ingress)
17693                                 *hierarchy_domain |=
17694                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17695                         if (policy->egress)
17696                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17697                 }
17698                 if (!policy->is_hierarchy) {
17699                         *is_rss = policy->is_rss;
17700                         break;
17701                 }
17702                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17703                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17704                         return -rte_mtr_error_set(error, EINVAL,
17705                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17706                                         "Exceed max hierarchy meter number.");
17707         }
17708         return 0;
17709 }
17710
17711 /**
17712  * Validate meter policy actions.
17713  * Dispatcher for action type specific validation.
17714  *
17715  * @param[in] dev
17716  *   Pointer to the Ethernet device structure.
17717  * @param[in] action
17718  *   The meter policy action object to validate.
17719  * @param[in] attr
17720  *   Attributes of flow to determine steering domain.
17721  * @param[out] error
17722  *   Perform verbose error reporting if not NULL. Initialized in case of
17723  *   error only.
17724  *
17725  * @return
17726  *   0 on success, otherwise negative errno value.
17727  */
17728 static int
17729 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17730                         const struct rte_flow_action *actions[RTE_COLORS],
17731                         struct rte_flow_attr *attr,
17732                         bool *is_rss,
17733                         uint8_t *domain_bitmap,
17734                         uint8_t *policy_mode,
17735                         struct rte_mtr_error *error)
17736 {
17737         struct mlx5_priv *priv = dev->data->dev_private;
17738         struct mlx5_dev_config *dev_conf = &priv->config;
17739         const struct rte_flow_action *act;
17740         uint64_t action_flags[RTE_COLORS] = {0};
17741         int actions_n;
17742         int i, ret;
17743         struct rte_flow_error flow_err;
17744         uint8_t domain_color[RTE_COLORS] = {0};
17745         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17746         uint8_t hierarchy_domain = 0;
17747         const struct rte_flow_action_meter *mtr;
17748         bool def_green = false;
17749         bool def_yellow = false;
17750         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17751
17752         if (!priv->config.dv_esw_en)
17753                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17754         *domain_bitmap = def_domain;
17755         /* Red color could only support DROP action. */
17756         if (!actions[RTE_COLOR_RED] ||
17757             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17758                 return -rte_mtr_error_set(error, ENOTSUP,
17759                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17760                                 NULL, "Red color only supports drop action.");
17761         /*
17762          * Check default policy actions:
17763          * Green / Yellow: no action, Red: drop action
17764          * Either G or Y will trigger default policy actions to be created.
17765          */
17766         if (!actions[RTE_COLOR_GREEN] ||
17767             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17768                 def_green = true;
17769         if (!actions[RTE_COLOR_YELLOW] ||
17770             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17771                 def_yellow = true;
17772         if (def_green && def_yellow) {
17773                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17774                 return 0;
17775         } else if (!def_green && def_yellow) {
17776                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17777         } else if (def_green && !def_yellow) {
17778                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17779         } else {
17780                 *policy_mode = MLX5_MTR_POLICY_MODE_ALL;
17781         }
17782         /* Set to empty string in case of NULL pointer access by user. */
17783         flow_err.message = "";
17784         for (i = 0; i < RTE_COLORS; i++) {
17785                 act = actions[i];
17786                 for (action_flags[i] = 0, actions_n = 0;
17787                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17788                      act++) {
17789                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17790                                 return -rte_mtr_error_set(error, ENOTSUP,
17791                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17792                                           NULL, "too many actions");
17793                         switch (act->type) {
17794                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17795                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17796                                 if (!priv->config.dv_esw_en)
17797                                         return -rte_mtr_error_set(error,
17798                                         ENOTSUP,
17799                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17800                                         NULL, "PORT action validate check"
17801                                         " fail for ESW disable");
17802                                 ret = flow_dv_validate_action_port_id(dev,
17803                                                 action_flags[i],
17804                                                 act, attr, &flow_err);
17805                                 if (ret)
17806                                         return -rte_mtr_error_set(error,
17807                                         ENOTSUP,
17808                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17809                                         NULL, flow_err.message ?
17810                                         flow_err.message :
17811                                         "PORT action validate check fail");
17812                                 ++actions_n;
17813                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17814                                 break;
17815                         case RTE_FLOW_ACTION_TYPE_MARK:
17816                                 ret = flow_dv_validate_action_mark(dev, act,
17817                                                            action_flags[i],
17818                                                            attr, &flow_err);
17819                                 if (ret < 0)
17820                                         return -rte_mtr_error_set(error,
17821                                         ENOTSUP,
17822                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17823                                         NULL, flow_err.message ?
17824                                         flow_err.message :
17825                                         "Mark action validate check fail");
17826                                 if (dev_conf->dv_xmeta_en !=
17827                                         MLX5_XMETA_MODE_LEGACY)
17828                                         return -rte_mtr_error_set(error,
17829                                         ENOTSUP,
17830                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17831                                         NULL, "Extend MARK action is "
17832                                         "not supported. Please try use "
17833                                         "default policy for meter.");
17834                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17835                                 ++actions_n;
17836                                 break;
17837                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17838                                 ret = flow_dv_validate_action_set_tag(dev,
17839                                                         act, action_flags[i],
17840                                                         attr, &flow_err);
17841                                 if (ret)
17842                                         return -rte_mtr_error_set(error,
17843                                         ENOTSUP,
17844                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17845                                         NULL, flow_err.message ?
17846                                         flow_err.message :
17847                                         "Set tag action validate check fail");
17848                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17849                                 ++actions_n;
17850                                 break;
17851                         case RTE_FLOW_ACTION_TYPE_DROP:
17852                                 ret = mlx5_flow_validate_action_drop
17853                                         (action_flags[i], attr, &flow_err);
17854                                 if (ret < 0)
17855                                         return -rte_mtr_error_set(error,
17856                                         ENOTSUP,
17857                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17858                                         NULL, flow_err.message ?
17859                                         flow_err.message :
17860                                         "Drop action validate check fail");
17861                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17862                                 ++actions_n;
17863                                 break;
17864                         case RTE_FLOW_ACTION_TYPE_QUEUE:
17865                                 /*
17866                                  * Check whether extensive
17867                                  * metadata feature is engaged.
17868                                  */
17869                                 if (dev_conf->dv_flow_en &&
17870                                     (dev_conf->dv_xmeta_en !=
17871                                      MLX5_XMETA_MODE_LEGACY) &&
17872                                     mlx5_flow_ext_mreg_supported(dev))
17873                                         return -rte_mtr_error_set(error,
17874                                           ENOTSUP,
17875                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17876                                           NULL, "Queue action with meta "
17877                                           "is not supported. Please try use "
17878                                           "default policy for meter.");
17879                                 ret = mlx5_flow_validate_action_queue(act,
17880                                                         action_flags[i], dev,
17881                                                         attr, &flow_err);
17882                                 if (ret < 0)
17883                                         return -rte_mtr_error_set(error,
17884                                           ENOTSUP,
17885                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17886                                           NULL, flow_err.message ?
17887                                           flow_err.message :
17888                                           "Queue action validate check fail");
17889                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17890                                 ++actions_n;
17891                                 break;
17892                         case RTE_FLOW_ACTION_TYPE_RSS:
17893                                 if (dev_conf->dv_flow_en &&
17894                                     (dev_conf->dv_xmeta_en !=
17895                                      MLX5_XMETA_MODE_LEGACY) &&
17896                                     mlx5_flow_ext_mreg_supported(dev))
17897                                         return -rte_mtr_error_set(error,
17898                                           ENOTSUP,
17899                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17900                                           NULL, "RSS action with meta "
17901                                           "is not supported. Please try use "
17902                                           "default policy for meter.");
17903                                 ret = mlx5_validate_action_rss(dev, act,
17904                                                                &flow_err);
17905                                 if (ret < 0)
17906                                         return -rte_mtr_error_set(error,
17907                                           ENOTSUP,
17908                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17909                                           NULL, flow_err.message ?
17910                                           flow_err.message :
17911                                           "RSS action validate check fail");
17912                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17913                                 ++actions_n;
17914                                 /* Either G or Y will set the RSS. */
17915                                 rss_color[i] = act->conf;
17916                                 break;
17917                         case RTE_FLOW_ACTION_TYPE_JUMP:
17918                                 ret = flow_dv_validate_action_jump(dev,
17919                                         NULL, act, action_flags[i],
17920                                         attr, true, &flow_err);
17921                                 if (ret)
17922                                         return -rte_mtr_error_set(error,
17923                                           ENOTSUP,
17924                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17925                                           NULL, flow_err.message ?
17926                                           flow_err.message :
17927                                           "Jump action validate check fail");
17928                                 ++actions_n;
17929                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17930                                 break;
17931                         /*
17932                          * Only the last meter in the hierarchy will support
17933                          * the YELLOW color steering. Then in the meter policy
17934                          * actions list, there should be no other meter inside.
17935                          */
17936                         case RTE_FLOW_ACTION_TYPE_METER:
17937                                 if (i != RTE_COLOR_GREEN)
17938                                         return -rte_mtr_error_set(error,
17939                                                 ENOTSUP,
17940                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17941                                                 NULL,
17942                                                 "Meter hierarchy only supports GREEN color.");
17943                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17944                                         return -rte_mtr_error_set(error,
17945                                                 ENOTSUP,
17946                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17947                                                 NULL,
17948                                                 "No yellow policy should be provided in meter hierarchy.");
17949                                 mtr = act->conf;
17950                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17951                                                         mtr->mtr_id,
17952                                                         action_flags[i],
17953                                                         is_rss,
17954                                                         &hierarchy_domain,
17955                                                         error);
17956                                 if (ret)
17957                                         return ret;
17958                                 ++actions_n;
17959                                 action_flags[i] |=
17960                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17961                                 break;
17962                         default:
17963                                 return -rte_mtr_error_set(error, ENOTSUP,
17964                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17965                                         NULL,
17966                                         "Doesn't support optional action");
17967                         }
17968                 }
17969                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
17970                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17971                 } else if ((action_flags[i] &
17972                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17973                           (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
17974                         /*
17975                          * Only support MLX5_XMETA_MODE_LEGACY
17976                          * so MARK action is only in ingress domain.
17977                          */
17978                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17979                 } else {
17980                         domain_color[i] = def_domain;
17981                         if (action_flags[i] &&
17982                             !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17983                                 domain_color[i] &=
17984                                 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17985                 }
17986                 if (action_flags[i] &
17987                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17988                         domain_color[i] &= hierarchy_domain;
17989                 /*
17990                  * Non-termination actions only support NIC Tx domain.
17991                  * The adjustion should be skipped when there is no
17992                  * action or only END is provided. The default domains
17993                  * bit-mask is set to find the MIN intersection.
17994                  * The action flags checking should also be skipped.
17995                  */
17996                 if ((def_green && i == RTE_COLOR_GREEN) ||
17997                     (def_yellow && i == RTE_COLOR_YELLOW))
17998                         continue;
17999                 /*
18000                  * Validate the drop action mutual exclusion
18001                  * with other actions. Drop action is mutually-exclusive
18002                  * with any other action, except for Count action.
18003                  */
18004                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
18005                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
18006                         return -rte_mtr_error_set(error, ENOTSUP,
18007                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18008                                 NULL, "Drop action is mutually-exclusive "
18009                                 "with any other action");
18010                 }
18011                 /* Eswitch has few restrictions on using items and actions */
18012                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
18013                         if (!mlx5_flow_ext_mreg_supported(dev) &&
18014                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
18015                                 return -rte_mtr_error_set(error, ENOTSUP,
18016                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18017                                         NULL, "unsupported action MARK");
18018                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
18019                                 return -rte_mtr_error_set(error, ENOTSUP,
18020                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18021                                         NULL, "unsupported action QUEUE");
18022                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
18023                                 return -rte_mtr_error_set(error, ENOTSUP,
18024                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18025                                         NULL, "unsupported action RSS");
18026                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18027                                 return -rte_mtr_error_set(error, ENOTSUP,
18028                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18029                                         NULL, "no fate action is found");
18030                 } else {
18031                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
18032                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
18033                                 if ((domain_color[i] &
18034                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
18035                                         domain_color[i] =
18036                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
18037                                 else
18038                                         return -rte_mtr_error_set(error,
18039                                                 ENOTSUP,
18040                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18041                                                 NULL,
18042                                                 "no fate action is found");
18043                         }
18044                 }
18045         }
18046         /* If both colors have RSS, the attributes should be the same. */
18047         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
18048                                            rss_color[RTE_COLOR_YELLOW]))
18049                 return -rte_mtr_error_set(error, EINVAL,
18050                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18051                                           NULL, "policy RSS attr conflict");
18052         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
18053                 *is_rss = true;
18054         /* "domain_color[C]" is non-zero for each color, default is ALL. */
18055         if (!def_green && !def_yellow &&
18056             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
18057             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
18058             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
18059                 return -rte_mtr_error_set(error, EINVAL,
18060                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18061                                           NULL, "policy domains conflict");
18062         /*
18063          * At least one color policy is listed in the actions, the domains
18064          * to be supported should be the intersection.
18065          */
18066         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
18067                          domain_color[RTE_COLOR_YELLOW];
18068         return 0;
18069 }
18070
18071 static int
18072 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
18073 {
18074         struct mlx5_priv *priv = dev->data->dev_private;
18075         int ret = 0;
18076
18077         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
18078                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
18079                                                 flags);
18080                 if (ret != 0)
18081                         return ret;
18082         }
18083         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
18084                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
18085                 if (ret != 0)
18086                         return ret;
18087         }
18088         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
18089                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
18090                 if (ret != 0)
18091                         return ret;
18092         }
18093         return 0;
18094 }
18095
18096 /**
18097  * Discover the number of available flow priorities
18098  * by trying to create a flow with the highest priority value
18099  * for each possible number.
18100  *
18101  * @param[in] dev
18102  *   Ethernet device.
18103  * @param[in] vprio
18104  *   List of possible number of available priorities.
18105  * @param[in] vprio_n
18106  *   Size of @p vprio array.
18107  * @return
18108  *   On success, number of available flow priorities.
18109  *   On failure, a negative errno-style code and rte_errno is set.
18110  */
18111 static int
18112 flow_dv_discover_priorities(struct rte_eth_dev *dev,
18113                             const uint16_t *vprio, int vprio_n)
18114 {
18115         struct mlx5_priv *priv = dev->data->dev_private;
18116         struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
18117         struct rte_flow_item_eth eth;
18118         struct rte_flow_item item = {
18119                 .type = RTE_FLOW_ITEM_TYPE_ETH,
18120                 .spec = &eth,
18121                 .mask = &eth,
18122         };
18123         struct mlx5_flow_dv_matcher matcher = {
18124                 .mask = {
18125                         .size = sizeof(matcher.mask.buf),
18126                 },
18127         };
18128         union mlx5_flow_tbl_key tbl_key;
18129         struct mlx5_flow flow;
18130         void *action;
18131         struct rte_flow_error error;
18132         uint8_t misc_mask;
18133         int i, err, ret = -ENOTSUP;
18134
18135         /*
18136          * Prepare a flow with a catch-all pattern and a drop action.
18137          * Use drop queue, because shared drop action may be unavailable.
18138          */
18139         action = priv->drop_queue.hrxq->action;
18140         if (action == NULL) {
18141                 DRV_LOG(ERR, "Priority discovery requires a drop action");
18142                 rte_errno = ENOTSUP;
18143                 return -rte_errno;
18144         }
18145         memset(&flow, 0, sizeof(flow));
18146         flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
18147         if (flow.handle == NULL) {
18148                 DRV_LOG(ERR, "Cannot create flow handle");
18149                 rte_errno = ENOMEM;
18150                 return -rte_errno;
18151         }
18152         flow.ingress = true;
18153         flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
18154         flow.dv.actions[0] = action;
18155         flow.dv.actions_n = 1;
18156         memset(&eth, 0, sizeof(eth));
18157         flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
18158                                    &item, /* inner */ false, /* group */ 0);
18159         matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
18160         for (i = 0; i < vprio_n; i++) {
18161                 /* Configure the next proposed maximum priority. */
18162                 matcher.priority = vprio[i] - 1;
18163                 memset(&tbl_key, 0, sizeof(tbl_key));
18164                 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18165                                                /* tunnel */ NULL,
18166                                                /* group */ 0,
18167                                                &error);
18168                 if (err != 0) {
18169                         /* This action is pure SW and must always succeed. */
18170                         DRV_LOG(ERR, "Cannot register matcher");
18171                         ret = -rte_errno;
18172                         break;
18173                 }
18174                 /* Try to apply the flow to HW. */
18175                 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18176                 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18177                 err = mlx5_flow_os_create_flow
18178                                 (flow.handle->dvh.matcher->matcher_object,
18179                                  (void *)&flow.dv.value, flow.dv.actions_n,
18180                                  flow.dv.actions, &flow.handle->drv_flow);
18181                 if (err == 0) {
18182                         claim_zero(mlx5_flow_os_destroy_flow
18183                                                 (flow.handle->drv_flow));
18184                         flow.handle->drv_flow = NULL;
18185                 }
18186                 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18187                 if (err != 0)
18188                         break;
18189                 ret = vprio[i];
18190         }
18191         mlx5_ipool_free(pool, flow.handle_idx);
18192         /* Set rte_errno if no expected priority value matched. */
18193         if (ret < 0)
18194                 rte_errno = -ret;
18195         return ret;
18196 }
18197
18198 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18199         .validate = flow_dv_validate,
18200         .prepare = flow_dv_prepare,
18201         .translate = flow_dv_translate,
18202         .apply = flow_dv_apply,
18203         .remove = flow_dv_remove,
18204         .destroy = flow_dv_destroy,
18205         .query = flow_dv_query,
18206         .create_mtr_tbls = flow_dv_create_mtr_tbls,
18207         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18208         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18209         .create_meter = flow_dv_mtr_alloc,
18210         .free_meter = flow_dv_aso_mtr_release_to_pool,
18211         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18212         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18213         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18214         .create_policy_rules = flow_dv_create_policy_rules,
18215         .destroy_policy_rules = flow_dv_destroy_policy_rules,
18216         .create_def_policy = flow_dv_create_def_policy,
18217         .destroy_def_policy = flow_dv_destroy_def_policy,
18218         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18219         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18220         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18221         .counter_alloc = flow_dv_counter_allocate,
18222         .counter_free = flow_dv_counter_free,
18223         .counter_query = flow_dv_counter_query,
18224         .get_aged_flows = flow_dv_get_aged_flows,
18225         .action_validate = flow_dv_action_validate,
18226         .action_create = flow_dv_action_create,
18227         .action_destroy = flow_dv_action_destroy,
18228         .action_update = flow_dv_action_update,
18229         .action_query = flow_dv_action_query,
18230         .sync_domain = flow_dv_sync_domain,
18231         .discover_priorities = flow_dv_discover_priorities,
18232         .item_create = flow_dv_item_create,
18233         .item_release = flow_dv_item_release,
18234 };
18235
18236 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
18237