drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_bus_pci.h>
  19 #include <rte_ip.h>
  20 #include <rte_gre.h>
  21 #include <rte_vxlan.h>
  22 #include <rte_gtp.h>
  23 #include <rte_eal_paging.h>
  24 #include <rte_mpls.h>
  25 #include <rte_mtr.h>
  26 #include <rte_mtr_driver.h>
  27 #include <rte_tailq.h>
  28
  29 #include <mlx5_glue.h>
  30 #include <mlx5_devx_cmds.h>
  31 #include <mlx5_prm.h>
  32 #include <mlx5_malloc.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_common_os.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_flow_os.h"
  39 #include "mlx5_rx.h"
  40 #include "mlx5_tx.h"
  41 #include "rte_pmd_mlx5.h"
  42
  43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  44
  45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR_ESWITCH
  50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  52 #endif
  53 #endif
  54
  55 #ifndef HAVE_MLX5DV_DR
  56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  57 #endif
  58
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 static int
  79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  80                              struct mlx5_flow_tbl_resource *tbl);
  81
  82 static int
  83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  84                                      uint32_t encap_decap_idx);
  85
  86 static int
  87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  88                                         uint32_t port_id);
  89 static void
  90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  91
  92 static int
  93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  94                                   uint32_t rix_jump);
  95
  96 static int16_t
  97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
  98 {
  99         struct mlx5_priv *priv = dev->data->dev_private;
 100         struct mlx5_common_device *cdev = priv->sh->cdev;
 101
 102         if (cdev->config.hca_attr.esw_mgr_vport_id_valid)
 103                 return (int16_t)cdev->config.hca_attr.esw_mgr_vport_id;
 104
 105         if (priv->pci_dev == NULL)
 106                 return 0;
 107         switch (priv->pci_dev->id.device_id) {
 108         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
 109         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
 110         case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
 111                 return (int16_t)0xfffe;
 112         default:
 113                 return 0;
 114         }
 115 }
 116
 117 /**
 118  * Initialize flow attributes structure according to flow items' types.
 119  *
 120  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
 121  * mode. For tunnel mode, the items to be modified are the outermost ones.
 122  *
 123  * @param[in] item
 124  *   Pointer to item specification.
 125  * @param[out] attr
 126  *   Pointer to flow attributes structure.
 127  * @param[in] dev_flow
 128  *   Pointer to the sub flow.
 129  * @param[in] tunnel_decap
 130  *   Whether action is after tunnel decapsulation.
 131  */
 132 static void
 133 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 134                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 135 {
 136         uint64_t layers = dev_flow->handle->layers;
 137
 138         /*
 139          * If layers is already initialized, it means this dev_flow is the
 140          * suffix flow, the layers flags is set by the prefix flow. Need to
 141          * use the layer flags from prefix flow as the suffix flow may not
 142          * have the user defined items as the flow is split.
 143          */
 144         if (layers) {
 145                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 146                         attr->ipv4 = 1;
 147                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 148                         attr->ipv6 = 1;
 149                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 150                         attr->tcp = 1;
 151                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 152                         attr->udp = 1;
 153                 attr->valid = 1;
 154                 return;
 155         }
 156         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 157                 uint8_t next_protocol = 0xff;
 158                 switch (item->type) {
 159                 case RTE_FLOW_ITEM_TYPE_GRE:
 160                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 161                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 162                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 163                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 164                 case RTE_FLOW_ITEM_TYPE_MPLS:
 165                         if (tunnel_decap)
 166                                 attr->attr = 0;
 167                         break;
 168                 case RTE_FLOW_ITEM_TYPE_IPV4:
 169                         if (!attr->ipv6)
 170                                 attr->ipv4 = 1;
 171                         if (item->mask != NULL &&
 172                             ((const struct rte_flow_item_ipv4 *)
 173                             item->mask)->hdr.next_proto_id)
 174                                 next_protocol =
 175                                     ((const struct rte_flow_item_ipv4 *)
 176                                       (item->spec))->hdr.next_proto_id &
 177                                     ((const struct rte_flow_item_ipv4 *)
 178                                       (item->mask))->hdr.next_proto_id;
 179                         if ((next_protocol == IPPROTO_IPIP ||
 180                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 181                                 attr->attr = 0;
 182                         break;
 183                 case RTE_FLOW_ITEM_TYPE_IPV6:
 184                         if (!attr->ipv4)
 185                                 attr->ipv6 = 1;
 186                         if (item->mask != NULL &&
 187                             ((const struct rte_flow_item_ipv6 *)
 188                             item->mask)->hdr.proto)
 189                                 next_protocol =
 190                                     ((const struct rte_flow_item_ipv6 *)
 191                                       (item->spec))->hdr.proto &
 192                                     ((const struct rte_flow_item_ipv6 *)
 193                                       (item->mask))->hdr.proto;
 194                         if ((next_protocol == IPPROTO_IPIP ||
 195                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 196                                 attr->attr = 0;
 197                         break;
 198                 case RTE_FLOW_ITEM_TYPE_UDP:
 199                         if (!attr->tcp)
 200                                 attr->udp = 1;
 201                         break;
 202                 case RTE_FLOW_ITEM_TYPE_TCP:
 203                         if (!attr->udp)
 204                                 attr->tcp = 1;
 205                         break;
 206                 default:
 207                         break;
 208                 }
 209         }
 210         attr->valid = 1;
 211 }
 212
 213 /*
 214  * Convert rte_mtr_color to mlx5 color.
 215  *
 216  * @param[in] rcol
 217  *   rte_mtr_color.
 218  *
 219  * @return
 220  *   mlx5 color.
 221  */
 222 static inline int
 223 rte_col_2_mlx5_col(enum rte_color rcol)
 224 {
 225         switch (rcol) {
 226         case RTE_COLOR_GREEN:
 227                 return MLX5_FLOW_COLOR_GREEN;
 228         case RTE_COLOR_YELLOW:
 229                 return MLX5_FLOW_COLOR_YELLOW;
 230         case RTE_COLOR_RED:
 231                 return MLX5_FLOW_COLOR_RED;
 232         default:
 233                 break;
 234         }
 235         return MLX5_FLOW_COLOR_UNDEFINED;
 236 }
 237
 238 struct field_modify_info {
 239         uint32_t size; /* Size of field in protocol header, in bytes. */
 240         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 241         enum mlx5_modification_field id;
 242 };
 243
 244 struct field_modify_info modify_eth[] = {
 245         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 246         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 247         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 248         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 249         {0, 0, 0},
 250 };
 251
 252 struct field_modify_info modify_vlan_out_first_vid[] = {
 253         /* Size in bits !!! */
 254         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 255         {0, 0, 0},
 256 };
 257
 258 struct field_modify_info modify_ipv4[] = {
 259         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 260         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 261         {4, 12, MLX5_MODI_OUT_SIPV4},
 262         {4, 16, MLX5_MODI_OUT_DIPV4},
 263         {0, 0, 0},
 264 };
 265
 266 struct field_modify_info modify_ipv6[] = {
 267         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 268         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 269         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 270         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 271         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 272         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 273         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 274         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 275         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 276         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 277         {0, 0, 0},
 278 };
 279
 280 struct field_modify_info modify_udp[] = {
 281         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 282         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 283         {0, 0, 0},
 284 };
 285
 286 struct field_modify_info modify_tcp[] = {
 287         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 288         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 289         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 290         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 291         {0, 0, 0},
 292 };
 293
 294 static void
 295 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 296                           uint8_t next_protocol, uint64_t *item_flags,
 297                           int *tunnel)
 298 {
 299         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 300                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 301         if (next_protocol == IPPROTO_IPIP) {
 302                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 303                 *tunnel = 1;
 304         }
 305         if (next_protocol == IPPROTO_IPV6) {
 306                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 307                 *tunnel = 1;
 308         }
 309 }
 310
 311 static inline struct mlx5_hlist *
 312 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 313                      const char *name, uint32_t size, bool direct_key,
 314                      bool lcores_share, void *ctx,
 315                      mlx5_list_create_cb cb_create,
 316                      mlx5_list_match_cb cb_match,
 317                      mlx5_list_remove_cb cb_remove,
 318                      mlx5_list_clone_cb cb_clone,
 319                      mlx5_list_clone_free_cb cb_clone_free,
 320                      struct rte_flow_error *error)
 321 {
 322         struct mlx5_hlist *hl;
 323         struct mlx5_hlist *expected = NULL;
 324         char s[MLX5_NAME_SIZE];
 325
 326         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 327         if (likely(hl))
 328                 return hl;
 329         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 330         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 331                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 332                         cb_clone_free);
 333         if (!hl) {
 334                 DRV_LOG(ERR, "%s hash creation failed", name);
 335                 rte_flow_error_set(error, ENOMEM,
 336                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 337                                    "cannot allocate resource memory");
 338                 return NULL;
 339         }
 340         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 341                                          __ATOMIC_SEQ_CST,
 342                                          __ATOMIC_SEQ_CST)) {
 343                 mlx5_hlist_destroy(hl);
 344                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 345         }
 346         return hl;
 347 }
 348
 349 /* Update VLAN's VID/PCP based on input rte_flow_action.
 350  *
 351  * @param[in] action
 352  *   Pointer to struct rte_flow_action.
 353  * @param[out] vlan
 354  *   Pointer to struct rte_vlan_hdr.
 355  */
 356 static void
 357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 358                          struct rte_vlan_hdr *vlan)
 359 {
 360         uint16_t vlan_tci;
 361         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 362                 vlan_tci =
 363                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 364                                                action->conf)->vlan_pcp;
 365                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 366                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 367                 vlan->vlan_tci |= vlan_tci;
 368         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 369                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 370                 vlan->vlan_tci |= rte_be_to_cpu_16
 371                     (((const struct rte_flow_action_of_set_vlan_vid *)
 372                                              action->conf)->vlan_vid);
 373         }
 374 }
 375
 376 /**
 377  * Fetch 1, 2, 3 or 4 byte field from the byte array
 378  * and return as unsigned integer in host-endian format.
 379  *
 380  * @param[in] data
 381  *   Pointer to data array.
 382  * @param[in] size
 383  *   Size of field to extract.
 384  *
 385  * @return
 386  *   converted field in host endian format.
 387  */
 388 static inline uint32_t
 389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 390 {
 391         uint32_t ret;
 392
 393         switch (size) {
 394         case 1:
 395                 ret = *data;
 396                 break;
 397         case 2:
 398                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 399                 break;
 400         case 3:
 401                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 402                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 403                 break;
 404         case 4:
 405                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 406                 break;
 407         default:
 408                 MLX5_ASSERT(false);
 409                 ret = 0;
 410                 break;
 411         }
 412         return ret;
 413 }
 414
 415 /**
 416  * Convert modify-header action to DV specification.
 417  *
 418  * Data length of each action is determined by provided field description
 419  * and the item mask. Data bit offset and width of each action is determined
 420  * by provided item mask.
 421  *
 422  * @param[in] item
 423  *   Pointer to item specification.
 424  * @param[in] field
 425  *   Pointer to field modification information.
 426  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 427  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 428  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 429  * @param[in] dcopy
 430  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 431  *   Negative offset value sets the same offset as source offset.
 432  *   size field is ignored, value is taken from source field.
 433  * @param[in,out] resource
 434  *   Pointer to the modify-header resource.
 435  * @param[in] type
 436  *   Type of modification.
 437  * @param[out] error
 438  *   Pointer to the error structure.
 439  *
 440  * @return
 441  *   0 on success, a negative errno value otherwise and rte_errno is set.
 442  */
 443 static int
 444 flow_dv_convert_modify_action(struct rte_flow_item *item,
 445                               struct field_modify_info *field,
 446                               struct field_modify_info *dcopy,
 447                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 448                               uint32_t type, struct rte_flow_error *error)
 449 {
 450         uint32_t i = resource->actions_num;
 451         struct mlx5_modification_cmd *actions = resource->actions;
 452         uint32_t carry_b = 0;
 453
 454         /*
 455          * The item and mask are provided in big-endian format.
 456          * The fields should be presented as in big-endian format either.
 457          * Mask must be always present, it defines the actual field width.
 458          */
 459         MLX5_ASSERT(item->mask);
 460         MLX5_ASSERT(field->size);
 461         do {
 462                 uint32_t size_b;
 463                 uint32_t off_b;
 464                 uint32_t mask;
 465                 uint32_t data;
 466                 bool next_field = true;
 467                 bool next_dcopy = true;
 468
 469                 if (i >= MLX5_MAX_MODIFY_NUM)
 470                         return rte_flow_error_set(error, EINVAL,
 471                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                  "too many items to modify");
 473                 /* Fetch variable byte size mask from the array. */
 474                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 475                                            field->offset, field->size);
 476                 if (!mask) {
 477                         ++field;
 478                         continue;
 479                 }
 480                 /* Deduce actual data width in bits from mask value. */
 481                 off_b = rte_bsf32(mask) + carry_b;
 482                 size_b = sizeof(uint32_t) * CHAR_BIT -
 483                          off_b - __builtin_clz(mask);
 484                 MLX5_ASSERT(size_b);
 485                 actions[i] = (struct mlx5_modification_cmd) {
 486                         .action_type = type,
 487                         .field = field->id,
 488                         .offset = off_b,
 489                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 490                                 0 : size_b,
 491                 };
 492                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 493                         MLX5_ASSERT(dcopy);
 494                         actions[i].dst_field = dcopy->id;
 495                         actions[i].dst_offset =
 496                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 497                         /* Convert entire record to big-endian format. */
 498                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 499                         /*
 500                          * Destination field overflow. Copy leftovers of
 501                          * a source field to the next destination field.
 502                          */
 503                         carry_b = 0;
 504                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 505                             dcopy->size != 0) {
 506                                 actions[i].length =
 507                                         dcopy->size * CHAR_BIT - dcopy->offset;
 508                                 carry_b = actions[i].length;
 509                                 next_field = false;
 510                         }
 511                         /*
 512                          * Not enough bits in a source filed to fill a
 513                          * destination field. Switch to the next source.
 514                          */
 515                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 516                             (size_b == field->size * CHAR_BIT - off_b)) {
 517                                 actions[i].length =
 518                                         field->size * CHAR_BIT - off_b;
 519                                 dcopy->offset += actions[i].length;
 520                                 next_dcopy = false;
 521                         }
 522                         if (next_dcopy)
 523                                 ++dcopy;
 524                 } else {
 525                         MLX5_ASSERT(item->spec);
 526                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 527                                                    field->offset, field->size);
 528                         /* Shift out the trailing masked bits from data. */
 529                         data = (data & mask) >> off_b;
 530                         actions[i].data1 = rte_cpu_to_be_32(data);
 531                 }
 532                 /* Convert entire record to expected big-endian format. */
 533                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 534                 if (next_field)
 535                         ++field;
 536                 ++i;
 537         } while (field->size);
 538         if (resource->actions_num == i)
 539                 return rte_flow_error_set(error, EINVAL,
 540                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 541                                           "invalid modification flow item");
 542         resource->actions_num = i;
 543         return 0;
 544 }
 545
 546 /**
 547  * Convert modify-header set IPv4 address action to DV specification.
 548  *
 549  * @param[in,out] resource
 550  *   Pointer to the modify-header resource.
 551  * @param[in] action
 552  *   Pointer to action specification.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_ipv4
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_action *action,
 563                          struct rte_flow_error *error)
 564 {
 565         const struct rte_flow_action_set_ipv4 *conf =
 566                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 567         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 568         struct rte_flow_item_ipv4 ipv4;
 569         struct rte_flow_item_ipv4 ipv4_mask;
 570
 571         memset(&ipv4, 0, sizeof(ipv4));
 572         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 573         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 574                 ipv4.hdr.src_addr = conf->ipv4_addr;
 575                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 576         } else {
 577                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 578                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 579         }
 580         item.spec = &ipv4;
 581         item.mask = &ipv4_mask;
 582         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 583                                              MLX5_MODIFICATION_TYPE_SET, error);
 584 }
 585
 586 /**
 587  * Convert modify-header set IPv6 address action to DV specification.
 588  *
 589  * @param[in,out] resource
 590  *   Pointer to the modify-header resource.
 591  * @param[in] action
 592  *   Pointer to action specification.
 593  * @param[out] error
 594  *   Pointer to the error structure.
 595  *
 596  * @return
 597  *   0 on success, a negative errno value otherwise and rte_errno is set.
 598  */
 599 static int
 600 flow_dv_convert_action_modify_ipv6
 601                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 602                          const struct rte_flow_action *action,
 603                          struct rte_flow_error *error)
 604 {
 605         const struct rte_flow_action_set_ipv6 *conf =
 606                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 607         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 608         struct rte_flow_item_ipv6 ipv6;
 609         struct rte_flow_item_ipv6 ipv6_mask;
 610
 611         memset(&ipv6, 0, sizeof(ipv6));
 612         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 613         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 614                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 615                        sizeof(ipv6.hdr.src_addr));
 616                 memcpy(&ipv6_mask.hdr.src_addr,
 617                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 618                        sizeof(ipv6.hdr.src_addr));
 619         } else {
 620                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 621                        sizeof(ipv6.hdr.dst_addr));
 622                 memcpy(&ipv6_mask.hdr.dst_addr,
 623                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 624                        sizeof(ipv6.hdr.dst_addr));
 625         }
 626         item.spec = &ipv6;
 627         item.mask = &ipv6_mask;
 628         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 629                                              MLX5_MODIFICATION_TYPE_SET, error);
 630 }
 631
 632 /**
 633  * Convert modify-header set MAC address action to DV specification.
 634  *
 635  * @param[in,out] resource
 636  *   Pointer to the modify-header resource.
 637  * @param[in] action
 638  *   Pointer to action specification.
 639  * @param[out] error
 640  *   Pointer to the error structure.
 641  *
 642  * @return
 643  *   0 on success, a negative errno value otherwise and rte_errno is set.
 644  */
 645 static int
 646 flow_dv_convert_action_modify_mac
 647                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 648                          const struct rte_flow_action *action,
 649                          struct rte_flow_error *error)
 650 {
 651         const struct rte_flow_action_set_mac *conf =
 652                 (const struct rte_flow_action_set_mac *)(action->conf);
 653         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 654         struct rte_flow_item_eth eth;
 655         struct rte_flow_item_eth eth_mask;
 656
 657         memset(&eth, 0, sizeof(eth));
 658         memset(&eth_mask, 0, sizeof(eth_mask));
 659         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 660                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 661                        sizeof(eth.src.addr_bytes));
 662                 memcpy(&eth_mask.src.addr_bytes,
 663                        &rte_flow_item_eth_mask.src.addr_bytes,
 664                        sizeof(eth_mask.src.addr_bytes));
 665         } else {
 666                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 667                        sizeof(eth.dst.addr_bytes));
 668                 memcpy(&eth_mask.dst.addr_bytes,
 669                        &rte_flow_item_eth_mask.dst.addr_bytes,
 670                        sizeof(eth_mask.dst.addr_bytes));
 671         }
 672         item.spec = &eth;
 673         item.mask = &eth_mask;
 674         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 675                                              MLX5_MODIFICATION_TYPE_SET, error);
 676 }
 677
 678 /**
 679  * Convert modify-header set VLAN VID action to DV specification.
 680  *
 681  * @param[in,out] resource
 682  *   Pointer to the modify-header resource.
 683  * @param[in] action
 684  *   Pointer to action specification.
 685  * @param[out] error
 686  *   Pointer to the error structure.
 687  *
 688  * @return
 689  *   0 on success, a negative errno value otherwise and rte_errno is set.
 690  */
 691 static int
 692 flow_dv_convert_action_modify_vlan_vid
 693                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 694                          const struct rte_flow_action *action,
 695                          struct rte_flow_error *error)
 696 {
 697         const struct rte_flow_action_of_set_vlan_vid *conf =
 698                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 699         int i = resource->actions_num;
 700         struct mlx5_modification_cmd *actions = resource->actions;
 701         struct field_modify_info *field = modify_vlan_out_first_vid;
 702
 703         if (i >= MLX5_MAX_MODIFY_NUM)
 704                 return rte_flow_error_set(error, EINVAL,
 705                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 706                          "too many items to modify");
 707         actions[i] = (struct mlx5_modification_cmd) {
 708                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 709                 .field = field->id,
 710                 .length = field->size,
 711                 .offset = field->offset,
 712         };
 713         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 714         actions[i].data1 = conf->vlan_vid;
 715         actions[i].data1 = actions[i].data1 << 16;
 716         resource->actions_num = ++i;
 717         return 0;
 718 }
 719
 720 /**
 721  * Convert modify-header set TP action to DV specification.
 722  *
 723  * @param[in,out] resource
 724  *   Pointer to the modify-header resource.
 725  * @param[in] action
 726  *   Pointer to action specification.
 727  * @param[in] items
 728  *   Pointer to rte_flow_item objects list.
 729  * @param[in] attr
 730  *   Pointer to flow attributes structure.
 731  * @param[in] dev_flow
 732  *   Pointer to the sub flow.
 733  * @param[in] tunnel_decap
 734  *   Whether action is after tunnel decapsulation.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_tp
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_action *action,
 745                          const struct rte_flow_item *items,
 746                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 747                          bool tunnel_decap, struct rte_flow_error *error)
 748 {
 749         const struct rte_flow_action_set_tp *conf =
 750                 (const struct rte_flow_action_set_tp *)(action->conf);
 751         struct rte_flow_item item;
 752         struct rte_flow_item_udp udp;
 753         struct rte_flow_item_udp udp_mask;
 754         struct rte_flow_item_tcp tcp;
 755         struct rte_flow_item_tcp tcp_mask;
 756         struct field_modify_info *field;
 757
 758         if (!attr->valid)
 759                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 760         if (attr->udp) {
 761                 memset(&udp, 0, sizeof(udp));
 762                 memset(&udp_mask, 0, sizeof(udp_mask));
 763                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 764                         udp.hdr.src_port = conf->port;
 765                         udp_mask.hdr.src_port =
 766                                         rte_flow_item_udp_mask.hdr.src_port;
 767                 } else {
 768                         udp.hdr.dst_port = conf->port;
 769                         udp_mask.hdr.dst_port =
 770                                         rte_flow_item_udp_mask.hdr.dst_port;
 771                 }
 772                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 773                 item.spec = &udp;
 774                 item.mask = &udp_mask;
 775                 field = modify_udp;
 776         } else {
 777                 MLX5_ASSERT(attr->tcp);
 778                 memset(&tcp, 0, sizeof(tcp));
 779                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 780                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 781                         tcp.hdr.src_port = conf->port;
 782                         tcp_mask.hdr.src_port =
 783                                         rte_flow_item_tcp_mask.hdr.src_port;
 784                 } else {
 785                         tcp.hdr.dst_port = conf->port;
 786                         tcp_mask.hdr.dst_port =
 787                                         rte_flow_item_tcp_mask.hdr.dst_port;
 788                 }
 789                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 790                 item.spec = &tcp;
 791                 item.mask = &tcp_mask;
 792                 field = modify_tcp;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header set TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_action *action,
 823                          const struct rte_flow_item *items,
 824                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 825                          bool tunnel_decap, struct rte_flow_error *error)
 826 {
 827         const struct rte_flow_action_set_ttl *conf =
 828                 (const struct rte_flow_action_set_ttl *)(action->conf);
 829         struct rte_flow_item item;
 830         struct rte_flow_item_ipv4 ipv4;
 831         struct rte_flow_item_ipv4 ipv4_mask;
 832         struct rte_flow_item_ipv6 ipv6;
 833         struct rte_flow_item_ipv6 ipv6_mask;
 834         struct field_modify_info *field;
 835
 836         if (!attr->valid)
 837                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 838         if (attr->ipv4) {
 839                 memset(&ipv4, 0, sizeof(ipv4));
 840                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 841                 ipv4.hdr.time_to_live = conf->ttl_value;
 842                 ipv4_mask.hdr.time_to_live = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 844                 item.spec = &ipv4;
 845                 item.mask = &ipv4_mask;
 846                 field = modify_ipv4;
 847         } else {
 848                 MLX5_ASSERT(attr->ipv6);
 849                 memset(&ipv6, 0, sizeof(ipv6));
 850                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 851                 ipv6.hdr.hop_limits = conf->ttl_value;
 852                 ipv6_mask.hdr.hop_limits = 0xFF;
 853                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 854                 item.spec = &ipv6;
 855                 item.mask = &ipv6_mask;
 856                 field = modify_ipv6;
 857         }
 858         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 859                                              MLX5_MODIFICATION_TYPE_SET, error);
 860 }
 861
 862 /**
 863  * Convert modify-header decrement TTL action to DV specification.
 864  *
 865  * @param[in,out] resource
 866  *   Pointer to the modify-header resource.
 867  * @param[in] action
 868  *   Pointer to action specification.
 869  * @param[in] items
 870  *   Pointer to rte_flow_item objects list.
 871  * @param[in] attr
 872  *   Pointer to flow attributes structure.
 873  * @param[in] dev_flow
 874  *   Pointer to the sub flow.
 875  * @param[in] tunnel_decap
 876  *   Whether action is after tunnel decapsulation.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_dec_ttl
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_item *items,
 887                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 888                          bool tunnel_decap, struct rte_flow_error *error)
 889 {
 890         struct rte_flow_item item;
 891         struct rte_flow_item_ipv4 ipv4;
 892         struct rte_flow_item_ipv4 ipv4_mask;
 893         struct rte_flow_item_ipv6 ipv6;
 894         struct rte_flow_item_ipv6 ipv6_mask;
 895         struct field_modify_info *field;
 896
 897         if (!attr->valid)
 898                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 899         if (attr->ipv4) {
 900                 memset(&ipv4, 0, sizeof(ipv4));
 901                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 902                 ipv4.hdr.time_to_live = 0xFF;
 903                 ipv4_mask.hdr.time_to_live = 0xFF;
 904                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 905                 item.spec = &ipv4;
 906                 item.mask = &ipv4_mask;
 907                 field = modify_ipv4;
 908         } else {
 909                 MLX5_ASSERT(attr->ipv6);
 910                 memset(&ipv6, 0, sizeof(ipv6));
 911                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 912                 ipv6.hdr.hop_limits = 0xFF;
 913                 ipv6_mask.hdr.hop_limits = 0xFF;
 914                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 915                 item.spec = &ipv6;
 916                 item.mask = &ipv6_mask;
 917                 field = modify_ipv6;
 918         }
 919         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 920                                              MLX5_MODIFICATION_TYPE_ADD, error);
 921 }
 922
 923 /**
 924  * Convert modify-header increment/decrement TCP Sequence number
 925  * to DV specification.
 926  *
 927  * @param[in,out] resource
 928  *   Pointer to the modify-header resource.
 929  * @param[in] action
 930  *   Pointer to action specification.
 931  * @param[out] error
 932  *   Pointer to the error structure.
 933  *
 934  * @return
 935  *   0 on success, a negative errno value otherwise and rte_errno is set.
 936  */
 937 static int
 938 flow_dv_convert_action_modify_tcp_seq
 939                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 940                          const struct rte_flow_action *action,
 941                          struct rte_flow_error *error)
 942 {
 943         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 944         uint64_t value = rte_be_to_cpu_32(*conf);
 945         struct rte_flow_item item;
 946         struct rte_flow_item_tcp tcp;
 947         struct rte_flow_item_tcp tcp_mask;
 948
 949         memset(&tcp, 0, sizeof(tcp));
 950         memset(&tcp_mask, 0, sizeof(tcp_mask));
 951         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 952                 /*
 953                  * The HW has no decrement operation, only increment operation.
 954                  * To simulate decrement X from Y using increment operation
 955                  * we need to add UINT32_MAX X times to Y.
 956                  * Each adding of UINT32_MAX decrements Y by 1.
 957                  */
 958                 value *= UINT32_MAX;
 959         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 960         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 961         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 962         item.spec = &tcp;
 963         item.mask = &tcp_mask;
 964         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 965                                              MLX5_MODIFICATION_TYPE_ADD, error);
 966 }
 967
 968 /**
 969  * Convert modify-header increment/decrement TCP Acknowledgment number
 970  * to DV specification.
 971  *
 972  * @param[in,out] resource
 973  *   Pointer to the modify-header resource.
 974  * @param[in] action
 975  *   Pointer to action specification.
 976  * @param[out] error
 977  *   Pointer to the error structure.
 978  *
 979  * @return
 980  *   0 on success, a negative errno value otherwise and rte_errno is set.
 981  */
 982 static int
 983 flow_dv_convert_action_modify_tcp_ack
 984                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 985                          const struct rte_flow_action *action,
 986                          struct rte_flow_error *error)
 987 {
 988         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 989         uint64_t value = rte_be_to_cpu_32(*conf);
 990         struct rte_flow_item item;
 991         struct rte_flow_item_tcp tcp;
 992         struct rte_flow_item_tcp tcp_mask;
 993
 994         memset(&tcp, 0, sizeof(tcp));
 995         memset(&tcp_mask, 0, sizeof(tcp_mask));
 996         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 997                 /*
 998                  * The HW has no decrement operation, only increment operation.
 999                  * To simulate decrement X from Y using increment operation
1000                  * we need to add UINT32_MAX X times to Y.
1001                  * Each adding of UINT32_MAX decrements Y by 1.
1002                  */
1003                 value *= UINT32_MAX;
1004         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1007         item.spec = &tcp;
1008         item.mask = &tcp_mask;
1009         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010                                              MLX5_MODIFICATION_TYPE_ADD, error);
1011 }
1012
1013 static enum mlx5_modification_field reg_to_field[] = {
1014         [REG_NON] = MLX5_MODI_OUT_NONE,
1015         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1025 };
1026
1027 /**
1028  * Convert register set to DV specification.
1029  *
1030  * @param[in,out] resource
1031  *   Pointer to the modify-header resource.
1032  * @param[in] action
1033  *   Pointer to action specification.
1034  * @param[out] error
1035  *   Pointer to the error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 static int
1041 flow_dv_convert_action_set_reg
1042                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043                          const struct rte_flow_action *action,
1044                          struct rte_flow_error *error)
1045 {
1046         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047         struct mlx5_modification_cmd *actions = resource->actions;
1048         uint32_t i = resource->actions_num;
1049
1050         if (i >= MLX5_MAX_MODIFY_NUM)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053                                           "too many items to modify");
1054         MLX5_ASSERT(conf->id != REG_NON);
1055         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056         actions[i] = (struct mlx5_modification_cmd) {
1057                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058                 .field = reg_to_field[conf->id],
1059                 .offset = conf->offset,
1060                 .length = conf->length,
1061         };
1062         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1064         ++i;
1065         resource->actions_num = i;
1066         return 0;
1067 }
1068
1069 /**
1070  * Convert SET_TAG action to DV specification.
1071  *
1072  * @param[in] dev
1073  *   Pointer to the rte_eth_dev structure.
1074  * @param[in,out] resource
1075  *   Pointer to the modify-header resource.
1076  * @param[in] conf
1077  *   Pointer to action specification.
1078  * @param[out] error
1079  *   Pointer to the error structure.
1080  *
1081  * @return
1082  *   0 on success, a negative errno value otherwise and rte_errno is set.
1083  */
1084 static int
1085 flow_dv_convert_action_set_tag
1086                         (struct rte_eth_dev *dev,
1087                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1088                          const struct rte_flow_action_set_tag *conf,
1089                          struct rte_flow_error *error)
1090 {
1091         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093         struct rte_flow_item item = {
1094                 .spec = &data,
1095                 .mask = &mask,
1096         };
1097         struct field_modify_info reg_c_x[] = {
1098                 [1] = {0, 0, 0},
1099         };
1100         enum mlx5_modification_field reg_type;
1101         int ret;
1102
1103         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1104         if (ret < 0)
1105                 return ret;
1106         MLX5_ASSERT(ret != REG_NON);
1107         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108         reg_type = reg_to_field[ret];
1109         MLX5_ASSERT(reg_type > 0);
1110         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112                                              MLX5_MODIFICATION_TYPE_SET, error);
1113 }
1114
1115 /**
1116  * Convert internal COPY_REG action to DV specification.
1117  *
1118  * @param[in] dev
1119  *   Pointer to the rte_eth_dev structure.
1120  * @param[in,out] res
1121  *   Pointer to the modify-header resource.
1122  * @param[in] action
1123  *   Pointer to action specification.
1124  * @param[out] error
1125  *   Pointer to the error structure.
1126  *
1127  * @return
1128  *   0 on success, a negative errno value otherwise and rte_errno is set.
1129  */
1130 static int
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1133                                  const struct rte_flow_action *action,
1134                                  struct rte_flow_error *error)
1135 {
1136         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138         struct rte_flow_item item = {
1139                 .spec = NULL,
1140                 .mask = &mask,
1141         };
1142         struct field_modify_info reg_src[] = {
1143                 {4, 0, reg_to_field[conf->src]},
1144                 {0, 0, 0},
1145         };
1146         struct field_modify_info reg_dst = {
1147                 .offset = 0,
1148                 .id = reg_to_field[conf->dst],
1149         };
1150         /* Adjust reg_c[0] usage according to reported mask. */
1151         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152                 struct mlx5_priv *priv = dev->data->dev_private;
1153                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1154
1155                 MLX5_ASSERT(reg_c0);
1156                 MLX5_ASSERT(priv->sh->config.dv_xmeta_en !=
1157                             MLX5_XMETA_MODE_LEGACY);
1158                 if (conf->dst == REG_C_0) {
1159                         /* Copy to reg_c[0], within mask only. */
1160                         reg_dst.offset = rte_bsf32(reg_c0);
1161                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1162                 } else {
1163                         reg_dst.offset = 0;
1164                         mask = rte_cpu_to_be_32(reg_c0);
1165                 }
1166         }
1167         return flow_dv_convert_modify_action(&item,
1168                                              reg_src, &reg_dst, res,
1169                                              MLX5_MODIFICATION_TYPE_COPY,
1170                                              error);
1171 }
1172
1173 /**
1174  * Convert MARK action to DV specification. This routine is used
1175  * in extensive metadata only and requires metadata register to be
1176  * handled. In legacy mode hardware tag resource is engaged.
1177  *
1178  * @param[in] dev
1179  *   Pointer to the rte_eth_dev structure.
1180  * @param[in] conf
1181  *   Pointer to MARK action specification.
1182  * @param[in,out] resource
1183  *   Pointer to the modify-header resource.
1184  * @param[out] error
1185  *   Pointer to the error structure.
1186  *
1187  * @return
1188  *   0 on success, a negative errno value otherwise and rte_errno is set.
1189  */
1190 static int
1191 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1192                             const struct rte_flow_action_mark *conf,
1193                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1194                             struct rte_flow_error *error)
1195 {
1196         struct mlx5_priv *priv = dev->data->dev_private;
1197         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1198                                            priv->sh->dv_mark_mask);
1199         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1200         struct rte_flow_item item = {
1201                 .spec = &data,
1202                 .mask = &mask,
1203         };
1204         struct field_modify_info reg_c_x[] = {
1205                 [1] = {0, 0, 0},
1206         };
1207         int reg;
1208
1209         if (!mask)
1210                 return rte_flow_error_set(error, EINVAL,
1211                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1212                                           NULL, "zero mark action mask");
1213         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1214         if (reg < 0)
1215                 return reg;
1216         MLX5_ASSERT(reg > 0);
1217         if (reg == REG_C_0) {
1218                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1219                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1220
1221                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1222                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1223                 mask = rte_cpu_to_be_32(mask << shl_c0);
1224         }
1225         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1226         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1227                                              MLX5_MODIFICATION_TYPE_SET, error);
1228 }
1229
1230 /**
1231  * Get metadata register index for specified steering domain.
1232  *
1233  * @param[in] dev
1234  *   Pointer to the rte_eth_dev structure.
1235  * @param[in] attr
1236  *   Attributes of flow to determine steering domain.
1237  * @param[out] error
1238  *   Pointer to the error structure.
1239  *
1240  * @return
1241  *   positive index on success, a negative errno value otherwise
1242  *   and rte_errno is set.
1243  */
1244 static enum modify_reg
1245 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1246                          const struct rte_flow_attr *attr,
1247                          struct rte_flow_error *error)
1248 {
1249         int reg =
1250                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1251                                           MLX5_METADATA_FDB :
1252                                             attr->egress ?
1253                                             MLX5_METADATA_TX :
1254                                             MLX5_METADATA_RX, 0, error);
1255         if (reg < 0)
1256                 return rte_flow_error_set(error,
1257                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1258                                           NULL, "unavailable "
1259                                           "metadata register");
1260         return reg;
1261 }
1262
1263 /**
1264  * Convert SET_META action to DV specification.
1265  *
1266  * @param[in] dev
1267  *   Pointer to the rte_eth_dev structure.
1268  * @param[in,out] resource
1269  *   Pointer to the modify-header resource.
1270  * @param[in] attr
1271  *   Attributes of flow that includes this item.
1272  * @param[in] conf
1273  *   Pointer to action specification.
1274  * @param[out] error
1275  *   Pointer to the error structure.
1276  *
1277  * @return
1278  *   0 on success, a negative errno value otherwise and rte_errno is set.
1279  */
1280 static int
1281 flow_dv_convert_action_set_meta
1282                         (struct rte_eth_dev *dev,
1283                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1284                          const struct rte_flow_attr *attr,
1285                          const struct rte_flow_action_set_meta *conf,
1286                          struct rte_flow_error *error)
1287 {
1288         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1289         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1290         struct rte_flow_item item = {
1291                 .spec = &data,
1292                 .mask = &mask,
1293         };
1294         struct field_modify_info reg_c_x[] = {
1295                 [1] = {0, 0, 0},
1296         };
1297         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1298
1299         if (reg < 0)
1300                 return reg;
1301         MLX5_ASSERT(reg != REG_NON);
1302         if (reg == REG_C_0) {
1303                 struct mlx5_priv *priv = dev->data->dev_private;
1304                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1305                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1306
1307                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1308                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1309                 mask = rte_cpu_to_be_32(mask << shl_c0);
1310         }
1311         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1312         /* The routine expects parameters in memory as big-endian ones. */
1313         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1314                                              MLX5_MODIFICATION_TYPE_SET, error);
1315 }
1316
1317 /**
1318  * Convert modify-header set IPv4 DSCP action to DV specification.
1319  *
1320  * @param[in,out] resource
1321  *   Pointer to the modify-header resource.
1322  * @param[in] action
1323  *   Pointer to action specification.
1324  * @param[out] error
1325  *   Pointer to the error structure.
1326  *
1327  * @return
1328  *   0 on success, a negative errno value otherwise and rte_errno is set.
1329  */
1330 static int
1331 flow_dv_convert_action_modify_ipv4_dscp
1332                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1333                          const struct rte_flow_action *action,
1334                          struct rte_flow_error *error)
1335 {
1336         const struct rte_flow_action_set_dscp *conf =
1337                 (const struct rte_flow_action_set_dscp *)(action->conf);
1338         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1339         struct rte_flow_item_ipv4 ipv4;
1340         struct rte_flow_item_ipv4 ipv4_mask;
1341
1342         memset(&ipv4, 0, sizeof(ipv4));
1343         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1344         ipv4.hdr.type_of_service = conf->dscp;
1345         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1346         item.spec = &ipv4;
1347         item.mask = &ipv4_mask;
1348         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1349                                              MLX5_MODIFICATION_TYPE_SET, error);
1350 }
1351
1352 /**
1353  * Convert modify-header set IPv6 DSCP action to DV specification.
1354  *
1355  * @param[in,out] resource
1356  *   Pointer to the modify-header resource.
1357  * @param[in] action
1358  *   Pointer to action specification.
1359  * @param[out] error
1360  *   Pointer to the error structure.
1361  *
1362  * @return
1363  *   0 on success, a negative errno value otherwise and rte_errno is set.
1364  */
1365 static int
1366 flow_dv_convert_action_modify_ipv6_dscp
1367                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1368                          const struct rte_flow_action *action,
1369                          struct rte_flow_error *error)
1370 {
1371         const struct rte_flow_action_set_dscp *conf =
1372                 (const struct rte_flow_action_set_dscp *)(action->conf);
1373         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1374         struct rte_flow_item_ipv6 ipv6;
1375         struct rte_flow_item_ipv6 ipv6_mask;
1376
1377         memset(&ipv6, 0, sizeof(ipv6));
1378         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1379         /*
1380          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1381          * rdma-core only accept the DSCP bits byte aligned start from
1382          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1383          * bits in IPv6 case as rdma-core requires byte aligned value.
1384          */
1385         ipv6.hdr.vtc_flow = conf->dscp;
1386         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1387         item.spec = &ipv6;
1388         item.mask = &ipv6_mask;
1389         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1390                                              MLX5_MODIFICATION_TYPE_SET, error);
1391 }
1392
1393 static int
1394 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1395                            enum rte_flow_field_id field, int inherit,
1396                            const struct rte_flow_attr *attr,
1397                            struct rte_flow_error *error)
1398 {
1399         struct mlx5_priv *priv = dev->data->dev_private;
1400
1401         switch (field) {
1402         case RTE_FLOW_FIELD_START:
1403                 return 32;
1404         case RTE_FLOW_FIELD_MAC_DST:
1405         case RTE_FLOW_FIELD_MAC_SRC:
1406                 return 48;
1407         case RTE_FLOW_FIELD_VLAN_TYPE:
1408                 return 16;
1409         case RTE_FLOW_FIELD_VLAN_ID:
1410                 return 12;
1411         case RTE_FLOW_FIELD_MAC_TYPE:
1412                 return 16;
1413         case RTE_FLOW_FIELD_IPV4_DSCP:
1414                 return 6;
1415         case RTE_FLOW_FIELD_IPV4_TTL:
1416                 return 8;
1417         case RTE_FLOW_FIELD_IPV4_SRC:
1418         case RTE_FLOW_FIELD_IPV4_DST:
1419                 return 32;
1420         case RTE_FLOW_FIELD_IPV6_DSCP:
1421                 return 6;
1422         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1423                 return 8;
1424         case RTE_FLOW_FIELD_IPV6_SRC:
1425         case RTE_FLOW_FIELD_IPV6_DST:
1426                 return 128;
1427         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1428         case RTE_FLOW_FIELD_TCP_PORT_DST:
1429                 return 16;
1430         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1431         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1432                 return 32;
1433         case RTE_FLOW_FIELD_TCP_FLAGS:
1434                 return 9;
1435         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1436         case RTE_FLOW_FIELD_UDP_PORT_DST:
1437                 return 16;
1438         case RTE_FLOW_FIELD_VXLAN_VNI:
1439         case RTE_FLOW_FIELD_GENEVE_VNI:
1440                 return 24;
1441         case RTE_FLOW_FIELD_GTP_TEID:
1442         case RTE_FLOW_FIELD_TAG:
1443                 return 32;
1444         case RTE_FLOW_FIELD_MARK:
1445                 return __builtin_popcount(priv->sh->dv_mark_mask);
1446         case RTE_FLOW_FIELD_META:
1447                 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1448                         __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1449         case RTE_FLOW_FIELD_POINTER:
1450         case RTE_FLOW_FIELD_VALUE:
1451                 return inherit < 0 ? 0 : inherit;
1452         default:
1453                 MLX5_ASSERT(false);
1454         }
1455         return 0;
1456 }
1457
1458 static void
1459 mlx5_flow_field_id_to_modify_info
1460                 (const struct rte_flow_action_modify_data *data,
1461                  struct field_modify_info *info, uint32_t *mask,
1462                  uint32_t width, struct rte_eth_dev *dev,
1463                  const struct rte_flow_attr *attr, struct rte_flow_error *error)
1464 {
1465         struct mlx5_priv *priv = dev->data->dev_private;
1466         uint32_t idx = 0;
1467         uint32_t off = 0;
1468
1469         switch (data->field) {
1470         case RTE_FLOW_FIELD_START:
1471                 /* not supported yet */
1472                 MLX5_ASSERT(false);
1473                 break;
1474         case RTE_FLOW_FIELD_MAC_DST:
1475                 off = data->offset > 16 ? data->offset - 16 : 0;
1476                 if (mask) {
1477                         if (data->offset < 16) {
1478                                 info[idx] = (struct field_modify_info){2, 4,
1479                                                 MLX5_MODI_OUT_DMAC_15_0};
1480                                 if (width < 16) {
1481                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1482                                                                  (16 - width));
1483                                         width = 0;
1484                                 } else {
1485                                         mask[1] = RTE_BE16(0xffff);
1486                                         width -= 16;
1487                                 }
1488                                 if (!width)
1489                                         break;
1490                                 ++idx;
1491                         }
1492                         info[idx] = (struct field_modify_info){4, 0,
1493                                                 MLX5_MODI_OUT_DMAC_47_16};
1494                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1495                                                     (32 - width)) << off);
1496                 } else {
1497                         if (data->offset < 16)
1498                                 info[idx++] = (struct field_modify_info){2, 0,
1499                                                 MLX5_MODI_OUT_DMAC_15_0};
1500                         info[idx] = (struct field_modify_info){4, off,
1501                                                 MLX5_MODI_OUT_DMAC_47_16};
1502                 }
1503                 break;
1504         case RTE_FLOW_FIELD_MAC_SRC:
1505                 off = data->offset > 16 ? data->offset - 16 : 0;
1506                 if (mask) {
1507                         if (data->offset < 16) {
1508                                 info[idx] = (struct field_modify_info){2, 4,
1509                                                 MLX5_MODI_OUT_SMAC_15_0};
1510                                 if (width < 16) {
1511                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1512                                                                  (16 - width));
1513                                         width = 0;
1514                                 } else {
1515                                         mask[1] = RTE_BE16(0xffff);
1516                                         width -= 16;
1517                                 }
1518                                 if (!width)
1519                                         break;
1520                                 ++idx;
1521                         }
1522                         info[idx] = (struct field_modify_info){4, 0,
1523                                                 MLX5_MODI_OUT_SMAC_47_16};
1524                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1525                                                     (32 - width)) << off);
1526                 } else {
1527                         if (data->offset < 16)
1528                                 info[idx++] = (struct field_modify_info){2, 0,
1529                                                 MLX5_MODI_OUT_SMAC_15_0};
1530                         info[idx] = (struct field_modify_info){4, off,
1531                                                 MLX5_MODI_OUT_SMAC_47_16};
1532                 }
1533                 break;
1534         case RTE_FLOW_FIELD_VLAN_TYPE:
1535                 /* not supported yet */
1536                 break;
1537         case RTE_FLOW_FIELD_VLAN_ID:
1538                 info[idx] = (struct field_modify_info){2, 0,
1539                                         MLX5_MODI_OUT_FIRST_VID};
1540                 if (mask)
1541                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1542                 break;
1543         case RTE_FLOW_FIELD_MAC_TYPE:
1544                 info[idx] = (struct field_modify_info){2, 0,
1545                                         MLX5_MODI_OUT_ETHERTYPE};
1546                 if (mask)
1547                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1548                 break;
1549         case RTE_FLOW_FIELD_IPV4_DSCP:
1550                 info[idx] = (struct field_modify_info){1, 0,
1551                                         MLX5_MODI_OUT_IP_DSCP};
1552                 if (mask)
1553                         mask[idx] = 0x3f >> (6 - width);
1554                 break;
1555         case RTE_FLOW_FIELD_IPV4_TTL:
1556                 info[idx] = (struct field_modify_info){1, 0,
1557                                         MLX5_MODI_OUT_IPV4_TTL};
1558                 if (mask)
1559                         mask[idx] = 0xff >> (8 - width);
1560                 break;
1561         case RTE_FLOW_FIELD_IPV4_SRC:
1562                 info[idx] = (struct field_modify_info){4, 0,
1563                                         MLX5_MODI_OUT_SIPV4};
1564                 if (mask)
1565                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1566                                                      (32 - width));
1567                 break;
1568         case RTE_FLOW_FIELD_IPV4_DST:
1569                 info[idx] = (struct field_modify_info){4, 0,
1570                                         MLX5_MODI_OUT_DIPV4};
1571                 if (mask)
1572                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1573                                                      (32 - width));
1574                 break;
1575         case RTE_FLOW_FIELD_IPV6_DSCP:
1576                 info[idx] = (struct field_modify_info){1, 0,
1577                                         MLX5_MODI_OUT_IP_DSCP};
1578                 if (mask)
1579                         mask[idx] = 0x3f >> (6 - width);
1580                 break;
1581         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1582                 info[idx] = (struct field_modify_info){1, 0,
1583                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1584                 if (mask)
1585                         mask[idx] = 0xff >> (8 - width);
1586                 break;
1587         case RTE_FLOW_FIELD_IPV6_SRC:
1588                 if (mask) {
1589                         if (data->offset < 32) {
1590                                 info[idx] = (struct field_modify_info){4, 12,
1591                                                 MLX5_MODI_OUT_SIPV6_31_0};
1592                                 if (width < 32) {
1593                                         mask[3] =
1594                                                 rte_cpu_to_be_32(0xffffffff >>
1595                                                                  (32 - width));
1596                                         width = 0;
1597                                 } else {
1598                                         mask[3] = RTE_BE32(0xffffffff);
1599                                         width -= 32;
1600                                 }
1601                                 if (!width)
1602                                         break;
1603                                 ++idx;
1604                         }
1605                         if (data->offset < 64) {
1606                                 info[idx] = (struct field_modify_info){4, 8,
1607                                                 MLX5_MODI_OUT_SIPV6_63_32};
1608                                 if (width < 32) {
1609                                         mask[2] =
1610                                                 rte_cpu_to_be_32(0xffffffff >>
1611                                                                  (32 - width));
1612                                         width = 0;
1613                                 } else {
1614                                         mask[2] = RTE_BE32(0xffffffff);
1615                                         width -= 32;
1616                                 }
1617                                 if (!width)
1618                                         break;
1619                                 ++idx;
1620                         }
1621                         if (data->offset < 96) {
1622                                 info[idx] = (struct field_modify_info){4, 4,
1623                                                 MLX5_MODI_OUT_SIPV6_95_64};
1624                                 if (width < 32) {
1625                                         mask[1] =
1626                                                 rte_cpu_to_be_32(0xffffffff >>
1627                                                                  (32 - width));
1628                                         width = 0;
1629                                 } else {
1630                                         mask[1] = RTE_BE32(0xffffffff);
1631                                         width -= 32;
1632                                 }
1633                                 if (!width)
1634                                         break;
1635                                 ++idx;
1636                         }
1637                         info[idx] = (struct field_modify_info){4, 0,
1638                                                 MLX5_MODI_OUT_SIPV6_127_96};
1639                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1640                 } else {
1641                         if (data->offset < 32)
1642                                 info[idx++] = (struct field_modify_info){4, 0,
1643                                                 MLX5_MODI_OUT_SIPV6_31_0};
1644                         if (data->offset < 64)
1645                                 info[idx++] = (struct field_modify_info){4, 0,
1646                                                 MLX5_MODI_OUT_SIPV6_63_32};
1647                         if (data->offset < 96)
1648                                 info[idx++] = (struct field_modify_info){4, 0,
1649                                                 MLX5_MODI_OUT_SIPV6_95_64};
1650                         if (data->offset < 128)
1651                                 info[idx++] = (struct field_modify_info){4, 0,
1652                                                 MLX5_MODI_OUT_SIPV6_127_96};
1653                 }
1654                 break;
1655         case RTE_FLOW_FIELD_IPV6_DST:
1656                 if (mask) {
1657                         if (data->offset < 32) {
1658                                 info[idx] = (struct field_modify_info){4, 12,
1659                                                 MLX5_MODI_OUT_DIPV6_31_0};
1660                                 if (width < 32) {
1661                                         mask[3] =
1662                                                 rte_cpu_to_be_32(0xffffffff >>
1663                                                                  (32 - width));
1664                                         width = 0;
1665                                 } else {
1666                                         mask[3] = RTE_BE32(0xffffffff);
1667                                         width -= 32;
1668                                 }
1669                                 if (!width)
1670                                         break;
1671                                 ++idx;
1672                         }
1673                         if (data->offset < 64) {
1674                                 info[idx] = (struct field_modify_info){4, 8,
1675                                                 MLX5_MODI_OUT_DIPV6_63_32};
1676                                 if (width < 32) {
1677                                         mask[2] =
1678                                                 rte_cpu_to_be_32(0xffffffff >>
1679                                                                  (32 - width));
1680                                         width = 0;
1681                                 } else {
1682                                         mask[2] = RTE_BE32(0xffffffff);
1683                                         width -= 32;
1684                                 }
1685                                 if (!width)
1686                                         break;
1687                                 ++idx;
1688                         }
1689                         if (data->offset < 96) {
1690                                 info[idx] = (struct field_modify_info){4, 4,
1691                                                 MLX5_MODI_OUT_DIPV6_95_64};
1692                                 if (width < 32) {
1693                                         mask[1] =
1694                                                 rte_cpu_to_be_32(0xffffffff >>
1695                                                                  (32 - width));
1696                                         width = 0;
1697                                 } else {
1698                                         mask[1] = RTE_BE32(0xffffffff);
1699                                         width -= 32;
1700                                 }
1701                                 if (!width)
1702                                         break;
1703                                 ++idx;
1704                         }
1705                         info[idx] = (struct field_modify_info){4, 0,
1706                                                 MLX5_MODI_OUT_DIPV6_127_96};
1707                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1708                 } else {
1709                         if (data->offset < 32)
1710                                 info[idx++] = (struct field_modify_info){4, 0,
1711                                                 MLX5_MODI_OUT_DIPV6_31_0};
1712                         if (data->offset < 64)
1713                                 info[idx++] = (struct field_modify_info){4, 0,
1714                                                 MLX5_MODI_OUT_DIPV6_63_32};
1715                         if (data->offset < 96)
1716                                 info[idx++] = (struct field_modify_info){4, 0,
1717                                                 MLX5_MODI_OUT_DIPV6_95_64};
1718                         if (data->offset < 128)
1719                                 info[idx++] = (struct field_modify_info){4, 0,
1720                                                 MLX5_MODI_OUT_DIPV6_127_96};
1721                 }
1722                 break;
1723         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1724                 info[idx] = (struct field_modify_info){2, 0,
1725                                         MLX5_MODI_OUT_TCP_SPORT};
1726                 if (mask)
1727                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1728                 break;
1729         case RTE_FLOW_FIELD_TCP_PORT_DST:
1730                 info[idx] = (struct field_modify_info){2, 0,
1731                                         MLX5_MODI_OUT_TCP_DPORT};
1732                 if (mask)
1733                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1734                 break;
1735         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1736                 info[idx] = (struct field_modify_info){4, 0,
1737                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1738                 if (mask)
1739                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1740                                                      (32 - width));
1741                 break;
1742         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1743                 info[idx] = (struct field_modify_info){4, 0,
1744                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1745                 if (mask)
1746                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1747                                                      (32 - width));
1748                 break;
1749         case RTE_FLOW_FIELD_TCP_FLAGS:
1750                 info[idx] = (struct field_modify_info){2, 0,
1751                                         MLX5_MODI_OUT_TCP_FLAGS};
1752                 if (mask)
1753                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1754                 break;
1755         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1756                 info[idx] = (struct field_modify_info){2, 0,
1757                                         MLX5_MODI_OUT_UDP_SPORT};
1758                 if (mask)
1759                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1760                 break;
1761         case RTE_FLOW_FIELD_UDP_PORT_DST:
1762                 info[idx] = (struct field_modify_info){2, 0,
1763                                         MLX5_MODI_OUT_UDP_DPORT};
1764                 if (mask)
1765                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1766                 break;
1767         case RTE_FLOW_FIELD_VXLAN_VNI:
1768                 /* not supported yet */
1769                 break;
1770         case RTE_FLOW_FIELD_GENEVE_VNI:
1771                 /* not supported yet*/
1772                 break;
1773         case RTE_FLOW_FIELD_GTP_TEID:
1774                 info[idx] = (struct field_modify_info){4, 0,
1775                                         MLX5_MODI_GTP_TEID};
1776                 if (mask)
1777                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1778                                                      (32 - width));
1779                 break;
1780         case RTE_FLOW_FIELD_TAG:
1781                 {
1782                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1783                                                    data->level, error);
1784                         if (reg < 0)
1785                                 return;
1786                         MLX5_ASSERT(reg != REG_NON);
1787                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1788                         info[idx] = (struct field_modify_info){4, 0,
1789                                                 reg_to_field[reg]};
1790                         if (mask)
1791                                 mask[idx] =
1792                                         rte_cpu_to_be_32(0xffffffff >>
1793                                                          (32 - width));
1794                 }
1795                 break;
1796         case RTE_FLOW_FIELD_MARK:
1797                 {
1798                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1799                         uint32_t mark_count = __builtin_popcount(mark_mask);
1800                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1801                                                        0, error);
1802                         if (reg < 0)
1803                                 return;
1804                         MLX5_ASSERT(reg != REG_NON);
1805                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1806                         info[idx] = (struct field_modify_info){4, 0,
1807                                                 reg_to_field[reg]};
1808                         if (mask)
1809                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1810                                          (mark_count - width)) & mark_mask);
1811                 }
1812                 break;
1813         case RTE_FLOW_FIELD_META:
1814                 {
1815                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1816                         uint32_t meta_count = __builtin_popcount(meta_mask);
1817                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1818                         if (reg < 0)
1819                                 return;
1820                         MLX5_ASSERT(reg != REG_NON);
1821                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1822                         info[idx] = (struct field_modify_info){4, 0,
1823                                                 reg_to_field[reg]};
1824                         if (mask)
1825                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1826                                         (meta_count - width)) & meta_mask);
1827                 }
1828                 break;
1829         case RTE_FLOW_FIELD_POINTER:
1830         case RTE_FLOW_FIELD_VALUE:
1831         default:
1832                 MLX5_ASSERT(false);
1833                 break;
1834         }
1835 }
1836
1837 /**
1838  * Convert modify_field action to DV specification.
1839  *
1840  * @param[in] dev
1841  *   Pointer to the rte_eth_dev structure.
1842  * @param[in,out] resource
1843  *   Pointer to the modify-header resource.
1844  * @param[in] action
1845  *   Pointer to action specification.
1846  * @param[in] attr
1847  *   Attributes of flow that includes this item.
1848  * @param[out] error
1849  *   Pointer to the error structure.
1850  *
1851  * @return
1852  *   0 on success, a negative errno value otherwise and rte_errno is set.
1853  */
1854 static int
1855 flow_dv_convert_action_modify_field
1856                         (struct rte_eth_dev *dev,
1857                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1858                          const struct rte_flow_action *action,
1859                          const struct rte_flow_attr *attr,
1860                          struct rte_flow_error *error)
1861 {
1862         const struct rte_flow_action_modify_field *conf =
1863                 (const struct rte_flow_action_modify_field *)(action->conf);
1864         struct rte_flow_item item = {
1865                 .spec = NULL,
1866                 .mask = NULL
1867         };
1868         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1869                                                                 {0, 0, 0} };
1870         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1871                                                                 {0, 0, 0} };
1872         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1873         uint32_t type, meta = 0;
1874
1875         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1876             conf->src.field == RTE_FLOW_FIELD_VALUE) {
1877                 type = MLX5_MODIFICATION_TYPE_SET;
1878                 /** For SET fill the destination field (field) first. */
1879                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1880                                                   conf->width, dev,
1881                                                   attr, error);
1882                 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1883                                         (void *)(uintptr_t)conf->src.pvalue :
1884                                         (void *)(uintptr_t)&conf->src.value;
1885                 if (conf->dst.field == RTE_FLOW_FIELD_META) {
1886                         meta = *(const unaligned_uint32_t *)item.spec;
1887                         meta = rte_cpu_to_be_32(meta);
1888                         item.spec = &meta;
1889                 }
1890         } else {
1891                 type = MLX5_MODIFICATION_TYPE_COPY;
1892                 /** For COPY fill the destination field (dcopy) without mask. */
1893                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1894                                                   conf->width, dev,
1895                                                   attr, error);
1896                 /** Then construct the source field (field) with mask. */
1897                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1898                                                   conf->width, dev,
1899                                                   attr, error);
1900         }
1901         item.mask = &mask;
1902         return flow_dv_convert_modify_action(&item,
1903                         field, dcopy, resource, type, error);
1904 }
1905
1906 /**
1907  * Validate MARK item.
1908  *
1909  * @param[in] dev
1910  *   Pointer to the rte_eth_dev structure.
1911  * @param[in] item
1912  *   Item specification.
1913  * @param[in] attr
1914  *   Attributes of flow that includes this item.
1915  * @param[out] error
1916  *   Pointer to error structure.
1917  *
1918  * @return
1919  *   0 on success, a negative errno value otherwise and rte_errno is set.
1920  */
1921 static int
1922 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1923                            const struct rte_flow_item *item,
1924                            const struct rte_flow_attr *attr __rte_unused,
1925                            struct rte_flow_error *error)
1926 {
1927         struct mlx5_priv *priv = dev->data->dev_private;
1928         struct mlx5_sh_config *config = &priv->sh->config;
1929         const struct rte_flow_item_mark *spec = item->spec;
1930         const struct rte_flow_item_mark *mask = item->mask;
1931         const struct rte_flow_item_mark nic_mask = {
1932                 .id = priv->sh->dv_mark_mask,
1933         };
1934         int ret;
1935
1936         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1937                 return rte_flow_error_set(error, ENOTSUP,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "extended metadata feature"
1940                                           " isn't enabled");
1941         if (!mlx5_flow_ext_mreg_supported(dev))
1942                 return rte_flow_error_set(error, ENOTSUP,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "extended metadata register"
1945                                           " isn't supported");
1946         if (!nic_mask.id)
1947                 return rte_flow_error_set(error, ENOTSUP,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "extended metadata register"
1950                                           " isn't available");
1951         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1952         if (ret < 0)
1953                 return ret;
1954         if (!spec)
1955                 return rte_flow_error_set(error, EINVAL,
1956                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1957                                           item->spec,
1958                                           "data cannot be empty");
1959         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1960                 return rte_flow_error_set(error, EINVAL,
1961                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1962                                           &spec->id,
1963                                           "mark id exceeds the limit");
1964         if (!mask)
1965                 mask = &nic_mask;
1966         if (!mask->id)
1967                 return rte_flow_error_set(error, EINVAL,
1968                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1969                                         "mask cannot be zero");
1970
1971         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1972                                         (const uint8_t *)&nic_mask,
1973                                         sizeof(struct rte_flow_item_mark),
1974                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1975         if (ret < 0)
1976                 return ret;
1977         return 0;
1978 }
1979
1980 /**
1981  * Validate META item.
1982  *
1983  * @param[in] dev
1984  *   Pointer to the rte_eth_dev structure.
1985  * @param[in] item
1986  *   Item specification.
1987  * @param[in] attr
1988  *   Attributes of flow that includes this item.
1989  * @param[out] error
1990  *   Pointer to error structure.
1991  *
1992  * @return
1993  *   0 on success, a negative errno value otherwise and rte_errno is set.
1994  */
1995 static int
1996 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1997                            const struct rte_flow_item *item,
1998                            const struct rte_flow_attr *attr,
1999                            struct rte_flow_error *error)
2000 {
2001         struct mlx5_priv *priv = dev->data->dev_private;
2002         struct mlx5_sh_config *config = &priv->sh->config;
2003         const struct rte_flow_item_meta *spec = item->spec;
2004         const struct rte_flow_item_meta *mask = item->mask;
2005         struct rte_flow_item_meta nic_mask = {
2006                 .data = UINT32_MAX
2007         };
2008         int reg;
2009         int ret;
2010
2011         if (!spec)
2012                 return rte_flow_error_set(error, EINVAL,
2013                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2014                                           item->spec,
2015                                           "data cannot be empty");
2016         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2017                 if (!mlx5_flow_ext_mreg_supported(dev))
2018                         return rte_flow_error_set(error, ENOTSUP,
2019                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2020                                           "extended metadata register"
2021                                           " isn't supported");
2022                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2023                 if (reg < 0)
2024                         return reg;
2025                 if (reg == REG_NON)
2026                         return rte_flow_error_set(error, ENOTSUP,
2027                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2028                                         "unavailable extended metadata register");
2029                 if (reg == REG_B)
2030                         return rte_flow_error_set(error, ENOTSUP,
2031                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2032                                           "match on reg_b "
2033                                           "isn't supported");
2034                 if (reg != REG_A)
2035                         nic_mask.data = priv->sh->dv_meta_mask;
2036         } else {
2037                 if (attr->transfer)
2038                         return rte_flow_error_set(error, ENOTSUP,
2039                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2040                                         "extended metadata feature "
2041                                         "should be enabled when "
2042                                         "meta item is requested "
2043                                         "with e-switch mode ");
2044                 if (attr->ingress)
2045                         return rte_flow_error_set(error, ENOTSUP,
2046                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2047                                         "match on metadata for ingress "
2048                                         "is not supported in legacy "
2049                                         "metadata mode");
2050         }
2051         if (!mask)
2052                 mask = &rte_flow_item_meta_mask;
2053         if (!mask->data)
2054                 return rte_flow_error_set(error, EINVAL,
2055                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2056                                         "mask cannot be zero");
2057
2058         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2059                                         (const uint8_t *)&nic_mask,
2060                                         sizeof(struct rte_flow_item_meta),
2061                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2062         return ret;
2063 }
2064
2065 /**
2066  * Validate TAG item.
2067  *
2068  * @param[in] dev
2069  *   Pointer to the rte_eth_dev structure.
2070  * @param[in] item
2071  *   Item specification.
2072  * @param[in] attr
2073  *   Attributes of flow that includes this item.
2074  * @param[out] error
2075  *   Pointer to error structure.
2076  *
2077  * @return
2078  *   0 on success, a negative errno value otherwise and rte_errno is set.
2079  */
2080 static int
2081 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2082                           const struct rte_flow_item *item,
2083                           const struct rte_flow_attr *attr __rte_unused,
2084                           struct rte_flow_error *error)
2085 {
2086         const struct rte_flow_item_tag *spec = item->spec;
2087         const struct rte_flow_item_tag *mask = item->mask;
2088         const struct rte_flow_item_tag nic_mask = {
2089                 .data = RTE_BE32(UINT32_MAX),
2090                 .index = 0xff,
2091         };
2092         int ret;
2093
2094         if (!mlx5_flow_ext_mreg_supported(dev))
2095                 return rte_flow_error_set(error, ENOTSUP,
2096                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2097                                           "extensive metadata register"
2098                                           " isn't supported");
2099         if (!spec)
2100                 return rte_flow_error_set(error, EINVAL,
2101                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2102                                           item->spec,
2103                                           "data cannot be empty");
2104         if (!mask)
2105                 mask = &rte_flow_item_tag_mask;
2106         if (!mask->data)
2107                 return rte_flow_error_set(error, EINVAL,
2108                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2109                                         "mask cannot be zero");
2110
2111         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2112                                         (const uint8_t *)&nic_mask,
2113                                         sizeof(struct rte_flow_item_tag),
2114                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2115         if (ret < 0)
2116                 return ret;
2117         if (mask->index != 0xff)
2118                 return rte_flow_error_set(error, EINVAL,
2119                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2120                                           "partial mask for tag index"
2121                                           " is not supported");
2122         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2123         if (ret < 0)
2124                 return ret;
2125         MLX5_ASSERT(ret != REG_NON);
2126         return 0;
2127 }
2128
2129 /**
2130  * Validate vport item.
2131  *
2132  * @param[in] dev
2133  *   Pointer to the rte_eth_dev structure.
2134  * @param[in] item
2135  *   Item specification.
2136  * @param[in] attr
2137  *   Attributes of flow that includes this item.
2138  * @param[in] item_flags
2139  *   Bit-fields that holds the items detected until now.
2140  * @param[out] error
2141  *   Pointer to error structure.
2142  *
2143  * @return
2144  *   0 on success, a negative errno value otherwise and rte_errno is set.
2145  */
2146 static int
2147 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2148                               const struct rte_flow_item *item,
2149                               const struct rte_flow_attr *attr,
2150                               uint64_t item_flags,
2151                               struct rte_flow_error *error)
2152 {
2153         const struct rte_flow_item_port_id *spec = item->spec;
2154         const struct rte_flow_item_port_id *mask = item->mask;
2155         const struct rte_flow_item_port_id switch_mask = {
2156                         .id = 0xffffffff,
2157         };
2158         struct mlx5_priv *esw_priv;
2159         struct mlx5_priv *dev_priv;
2160         int ret;
2161
2162         if (!attr->transfer)
2163                 return rte_flow_error_set(error, EINVAL,
2164                                           RTE_FLOW_ERROR_TYPE_ITEM,
2165                                           NULL,
2166                                           "match on port id is valid only"
2167                                           " when transfer flag is enabled");
2168         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2169                 return rte_flow_error_set(error, ENOTSUP,
2170                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2171                                           "multiple source ports are not"
2172                                           " supported");
2173         if (!mask)
2174                 mask = &switch_mask;
2175         if (mask->id != 0xffffffff)
2176                 return rte_flow_error_set(error, ENOTSUP,
2177                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2178                                            mask,
2179                                            "no support for partial mask on"
2180                                            " \"id\" field");
2181         ret = mlx5_flow_item_acceptable
2182                                 (item, (const uint8_t *)mask,
2183                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2184                                  sizeof(struct rte_flow_item_port_id),
2185                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2186         if (ret)
2187                 return ret;
2188         if (!spec)
2189                 return 0;
2190         if (spec->id == MLX5_PORT_ESW_MGR)
2191                 return 0;
2192         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2193         if (!esw_priv)
2194                 return rte_flow_error_set(error, rte_errno,
2195                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2196                                           "failed to obtain E-Switch info for"
2197                                           " port");
2198         dev_priv = mlx5_dev_to_eswitch_info(dev);
2199         if (!dev_priv)
2200                 return rte_flow_error_set(error, rte_errno,
2201                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2202                                           NULL,
2203                                           "failed to obtain E-Switch info");
2204         if (esw_priv->domain_id != dev_priv->domain_id)
2205                 return rte_flow_error_set(error, EINVAL,
2206                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2207                                           "cannot match on a port from a"
2208                                           " different E-Switch");
2209         return 0;
2210 }
2211
2212 /**
2213  * Validate VLAN item.
2214  *
2215  * @param[in] item
2216  *   Item specification.
2217  * @param[in] item_flags
2218  *   Bit-fields that holds the items detected until now.
2219  * @param[in] dev
2220  *   Ethernet device flow is being created on.
2221  * @param[out] error
2222  *   Pointer to error structure.
2223  *
2224  * @return
2225  *   0 on success, a negative errno value otherwise and rte_errno is set.
2226  */
2227 static int
2228 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2229                            uint64_t item_flags,
2230                            struct rte_eth_dev *dev,
2231                            struct rte_flow_error *error)
2232 {
2233         const struct rte_flow_item_vlan *mask = item->mask;
2234         const struct rte_flow_item_vlan nic_mask = {
2235                 .tci = RTE_BE16(UINT16_MAX),
2236                 .inner_type = RTE_BE16(UINT16_MAX),
2237                 .has_more_vlan = 1,
2238         };
2239         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2240         int ret;
2241         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2242                                         MLX5_FLOW_LAYER_INNER_L4) :
2243                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2244                                         MLX5_FLOW_LAYER_OUTER_L4);
2245         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2246                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2247
2248         if (item_flags & vlanm)
2249                 return rte_flow_error_set(error, EINVAL,
2250                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2251                                           "multiple VLAN layers not supported");
2252         else if ((item_flags & l34m) != 0)
2253                 return rte_flow_error_set(error, EINVAL,
2254                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2255                                           "VLAN cannot follow L3/L4 layer");
2256         if (!mask)
2257                 mask = &rte_flow_item_vlan_mask;
2258         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2259                                         (const uint8_t *)&nic_mask,
2260                                         sizeof(struct rte_flow_item_vlan),
2261                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2262         if (ret)
2263                 return ret;
2264         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2265                 struct mlx5_priv *priv = dev->data->dev_private;
2266
2267                 if (priv->vmwa_context) {
2268                         /*
2269                          * Non-NULL context means we have a virtual machine
2270                          * and SR-IOV enabled, we have to create VLAN interface
2271                          * to make hypervisor to setup E-Switch vport
2272                          * context correctly. We avoid creating the multiple
2273                          * VLAN interfaces, so we cannot support VLAN tag mask.
2274                          */
2275                         return rte_flow_error_set(error, EINVAL,
2276                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2277                                                   item,
2278                                                   "VLAN tag mask is not"
2279                                                   " supported in virtual"
2280                                                   " environment");
2281                 }
2282         }
2283         return 0;
2284 }
2285
2286 /*
2287  * GTP flags are contained in 1 byte of the format:
2288  * -------------------------------------------
2289  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2290  * |-----------------------------------------|
2291  * | value | Version | PT | Res | E | S | PN |
2292  * -------------------------------------------
2293  *
2294  * Matching is supported only for GTP flags E, S, PN.
2295  */
2296 #define MLX5_GTP_FLAGS_MASK     0x07
2297
2298 /**
2299  * Validate GTP item.
2300  *
2301  * @param[in] dev
2302  *   Pointer to the rte_eth_dev structure.
2303  * @param[in] item
2304  *   Item specification.
2305  * @param[in] item_flags
2306  *   Bit-fields that holds the items detected until now.
2307  * @param[out] error
2308  *   Pointer to error structure.
2309  *
2310  * @return
2311  *   0 on success, a negative errno value otherwise and rte_errno is set.
2312  */
2313 static int
2314 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2315                           const struct rte_flow_item *item,
2316                           uint64_t item_flags,
2317                           struct rte_flow_error *error)
2318 {
2319         struct mlx5_priv *priv = dev->data->dev_private;
2320         const struct rte_flow_item_gtp *spec = item->spec;
2321         const struct rte_flow_item_gtp *mask = item->mask;
2322         const struct rte_flow_item_gtp nic_mask = {
2323                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2324                 .msg_type = 0xff,
2325                 .teid = RTE_BE32(0xffffffff),
2326         };
2327
2328         if (!priv->sh->cdev->config.hca_attr.tunnel_stateless_gtp)
2329                 return rte_flow_error_set(error, ENOTSUP,
2330                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2331                                           "GTP support is not enabled");
2332         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2333                 return rte_flow_error_set(error, ENOTSUP,
2334                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2335                                           "multiple tunnel layers not"
2336                                           " supported");
2337         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2338                 return rte_flow_error_set(error, EINVAL,
2339                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2340                                           "no outer UDP layer found");
2341         if (!mask)
2342                 mask = &rte_flow_item_gtp_mask;
2343         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2344                 return rte_flow_error_set(error, ENOTSUP,
2345                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2346                                           "Match is supported for GTP"
2347                                           " flags only");
2348         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2349                                          (const uint8_t *)&nic_mask,
2350                                          sizeof(struct rte_flow_item_gtp),
2351                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2352 }
2353
2354 /**
2355  * Validate GTP PSC item.
2356  *
2357  * @param[in] item
2358  *   Item specification.
2359  * @param[in] last_item
2360  *   Previous validated item in the pattern items.
2361  * @param[in] gtp_item
2362  *   Previous GTP item specification.
2363  * @param[in] attr
2364  *   Pointer to flow attributes.
2365  * @param[out] error
2366  *   Pointer to error structure.
2367  *
2368  * @return
2369  *   0 on success, a negative errno value otherwise and rte_errno is set.
2370  */
2371 static int
2372 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2373                               uint64_t last_item,
2374                               const struct rte_flow_item *gtp_item,
2375                               const struct rte_flow_attr *attr,
2376                               struct rte_flow_error *error)
2377 {
2378         const struct rte_flow_item_gtp *gtp_spec;
2379         const struct rte_flow_item_gtp *gtp_mask;
2380         const struct rte_flow_item_gtp_psc *mask;
2381         const struct rte_flow_item_gtp_psc nic_mask = {
2382                 .hdr.type = 0xF,
2383                 .hdr.qfi = 0x3F,
2384         };
2385
2386         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2387                 return rte_flow_error_set
2388                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2389                          "GTP PSC item must be preceded with GTP item");
2390         gtp_spec = gtp_item->spec;
2391         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2392         /* GTP spec and E flag is requested to match zero. */
2393         if (gtp_spec &&
2394                 (gtp_mask->v_pt_rsv_flags &
2395                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2396                 return rte_flow_error_set
2397                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2398                          "GTP E flag must be 1 to match GTP PSC");
2399         /* Check the flow is not created in group zero. */
2400         if (!attr->transfer && !attr->group)
2401                 return rte_flow_error_set
2402                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2403                          "GTP PSC is not supported for group 0");
2404         /* GTP spec is here and E flag is requested to match zero. */
2405         if (!item->spec)
2406                 return 0;
2407         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2408         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2409                                          (const uint8_t *)&nic_mask,
2410                                          sizeof(struct rte_flow_item_gtp_psc),
2411                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2412 }
2413
2414 /**
2415  * Validate IPV4 item.
2416  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2417  * add specific validation of fragment_offset field,
2418  *
2419  * @param[in] item
2420  *   Item specification.
2421  * @param[in] item_flags
2422  *   Bit-fields that holds the items detected until now.
2423  * @param[out] error
2424  *   Pointer to error structure.
2425  *
2426  * @return
2427  *   0 on success, a negative errno value otherwise and rte_errno is set.
2428  */
2429 static int
2430 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2431                            const struct rte_flow_item *item,
2432                            uint64_t item_flags, uint64_t last_item,
2433                            uint16_t ether_type, struct rte_flow_error *error)
2434 {
2435         int ret;
2436         struct mlx5_priv *priv = dev->data->dev_private;
2437         struct mlx5_hca_attr *attr = &priv->sh->cdev->config.hca_attr;
2438         const struct rte_flow_item_ipv4 *spec = item->spec;
2439         const struct rte_flow_item_ipv4 *last = item->last;
2440         const struct rte_flow_item_ipv4 *mask = item->mask;
2441         rte_be16_t fragment_offset_spec = 0;
2442         rte_be16_t fragment_offset_last = 0;
2443         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2444                 .hdr = {
2445                         .src_addr = RTE_BE32(0xffffffff),
2446                         .dst_addr = RTE_BE32(0xffffffff),
2447                         .type_of_service = 0xff,
2448                         .fragment_offset = RTE_BE16(0xffff),
2449                         .next_proto_id = 0xff,
2450                         .time_to_live = 0xff,
2451                 },
2452         };
2453
2454         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2455                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2456                 bool ihl_cap = !tunnel ?
2457                                attr->outer_ipv4_ihl : attr->inner_ipv4_ihl;
2458                 if (!ihl_cap)
2459                         return rte_flow_error_set(error, ENOTSUP,
2460                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2461                                                   item,
2462                                                   "IPV4 ihl offload not supported");
2463                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2464         }
2465         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2466                                            ether_type, &nic_ipv4_mask,
2467                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2468         if (ret < 0)
2469                 return ret;
2470         if (spec && mask)
2471                 fragment_offset_spec = spec->hdr.fragment_offset &
2472                                        mask->hdr.fragment_offset;
2473         if (!fragment_offset_spec)
2474                 return 0;
2475         /*
2476          * spec and mask are valid, enforce using full mask to make sure the
2477          * complete value is used correctly.
2478          */
2479         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2480                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2481                 return rte_flow_error_set(error, EINVAL,
2482                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2483                                           item, "must use full mask for"
2484                                           " fragment_offset");
2485         /*
2486          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2487          * indicating this is 1st fragment of fragmented packet.
2488          * This is not yet supported in MLX5, return appropriate error message.
2489          */
2490         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2491                 return rte_flow_error_set(error, ENOTSUP,
2492                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2493                                           "match on first fragment not "
2494                                           "supported");
2495         if (fragment_offset_spec && !last)
2496                 return rte_flow_error_set(error, ENOTSUP,
2497                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2498                                           "specified value not supported");
2499         /* spec and last are valid, validate the specified range. */
2500         fragment_offset_last = last->hdr.fragment_offset &
2501                                mask->hdr.fragment_offset;
2502         /*
2503          * Match on fragment_offset spec 0x2001 and last 0x3fff
2504          * means MF is 1 and frag-offset is > 0.
2505          * This packet is fragment 2nd and onward, excluding last.
2506          * This is not yet supported in MLX5, return appropriate
2507          * error message.
2508          */
2509         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2510             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2511                 return rte_flow_error_set(error, ENOTSUP,
2512                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2513                                           last, "match on following "
2514                                           "fragments not supported");
2515         /*
2516          * Match on fragment_offset spec 0x0001 and last 0x1fff
2517          * means MF is 0 and frag-offset is > 0.
2518          * This packet is last fragment of fragmented packet.
2519          * This is not yet supported in MLX5, return appropriate
2520          * error message.
2521          */
2522         if (fragment_offset_spec == RTE_BE16(1) &&
2523             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2524                 return rte_flow_error_set(error, ENOTSUP,
2525                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2526                                           last, "match on last "
2527                                           "fragment not supported");
2528         /*
2529          * Match on fragment_offset spec 0x0001 and last 0x3fff
2530          * means MF and/or frag-offset is not 0.
2531          * This is a fragmented packet.
2532          * Other range values are invalid and rejected.
2533          */
2534         if (!(fragment_offset_spec == RTE_BE16(1) &&
2535               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2536                 return rte_flow_error_set(error, ENOTSUP,
2537                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2538                                           "specified range not supported");
2539         return 0;
2540 }
2541
2542 /**
2543  * Validate IPV6 fragment extension item.
2544  *
2545  * @param[in] item
2546  *   Item specification.
2547  * @param[in] item_flags
2548  *   Bit-fields that holds the items detected until now.
2549  * @param[out] error
2550  *   Pointer to error structure.
2551  *
2552  * @return
2553  *   0 on success, a negative errno value otherwise and rte_errno is set.
2554  */
2555 static int
2556 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2557                                     uint64_t item_flags,
2558                                     struct rte_flow_error *error)
2559 {
2560         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2561         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2562         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2563         rte_be16_t frag_data_spec = 0;
2564         rte_be16_t frag_data_last = 0;
2565         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2566         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2567                                       MLX5_FLOW_LAYER_OUTER_L4;
2568         int ret = 0;
2569         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2570                 .hdr = {
2571                         .next_header = 0xff,
2572                         .frag_data = RTE_BE16(0xffff),
2573                 },
2574         };
2575
2576         if (item_flags & l4m)
2577                 return rte_flow_error_set(error, EINVAL,
2578                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2579                                           "ipv6 fragment extension item cannot "
2580                                           "follow L4 item.");
2581         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2582             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2585                                           "ipv6 fragment extension item must "
2586                                           "follow ipv6 item");
2587         if (spec && mask)
2588                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2589         if (!frag_data_spec)
2590                 return 0;
2591         /*
2592          * spec and mask are valid, enforce using full mask to make sure the
2593          * complete value is used correctly.
2594          */
2595         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2596                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2597                 return rte_flow_error_set(error, EINVAL,
2598                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2599                                           item, "must use full mask for"
2600                                           " frag_data");
2601         /*
2602          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2603          * This is 1st fragment of fragmented packet.
2604          */
2605         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2606                 return rte_flow_error_set(error, ENOTSUP,
2607                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2608                                           "match on first fragment not "
2609                                           "supported");
2610         if (frag_data_spec && !last)
2611                 return rte_flow_error_set(error, EINVAL,
2612                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2613                                           "specified value not supported");
2614         ret = mlx5_flow_item_acceptable
2615                                 (item, (const uint8_t *)mask,
2616                                  (const uint8_t *)&nic_mask,
2617                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2618                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2619         if (ret)
2620                 return ret;
2621         /* spec and last are valid, validate the specified range. */
2622         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2623         /*
2624          * Match on frag_data spec 0x0009 and last 0xfff9
2625          * means M is 1 and frag-offset is > 0.
2626          * This packet is fragment 2nd and onward, excluding last.
2627          * This is not yet supported in MLX5, return appropriate
2628          * error message.
2629          */
2630         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2631                                        RTE_IPV6_EHDR_MF_MASK) &&
2632             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2633                 return rte_flow_error_set(error, ENOTSUP,
2634                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2635                                           last, "match on following "
2636                                           "fragments not supported");
2637         /*
2638          * Match on frag_data spec 0x0008 and last 0xfff8
2639          * means M is 0 and frag-offset is > 0.
2640          * This packet is last fragment of fragmented packet.
2641          * This is not yet supported in MLX5, return appropriate
2642          * error message.
2643          */
2644         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2645             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2646                 return rte_flow_error_set(error, ENOTSUP,
2647                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2648                                           last, "match on last "
2649                                           "fragment not supported");
2650         /* Other range values are invalid and rejected. */
2651         return rte_flow_error_set(error, EINVAL,
2652                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2653                                   "specified range not supported");
2654 }
2655
2656 /*
2657  * Validate ASO CT item.
2658  *
2659  * @param[in] dev
2660  *   Pointer to the rte_eth_dev structure.
2661  * @param[in] item
2662  *   Item specification.
2663  * @param[in] item_flags
2664  *   Pointer to bit-fields that holds the items detected until now.
2665  * @param[out] error
2666  *   Pointer to error structure.
2667  *
2668  * @return
2669  *   0 on success, a negative errno value otherwise and rte_errno is set.
2670  */
2671 static int
2672 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2673                              const struct rte_flow_item *item,
2674                              uint64_t *item_flags,
2675                              struct rte_flow_error *error)
2676 {
2677         const struct rte_flow_item_conntrack *spec = item->spec;
2678         const struct rte_flow_item_conntrack *mask = item->mask;
2679         RTE_SET_USED(dev);
2680         uint32_t flags;
2681
2682         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2683                 return rte_flow_error_set(error, EINVAL,
2684                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2685                                           "Only one CT is supported");
2686         if (!mask)
2687                 mask = &rte_flow_item_conntrack_mask;
2688         flags = spec->flags & mask->flags;
2689         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2690             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2691              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2692              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2693                 return rte_flow_error_set(error, EINVAL,
2694                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2695                                           "Conflict status bits");
2696         /* State change also needs to be considered. */
2697         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2698         return 0;
2699 }
2700
2701 /**
2702  * Validate the pop VLAN action.
2703  *
2704  * @param[in] dev
2705  *   Pointer to the rte_eth_dev structure.
2706  * @param[in] action_flags
2707  *   Holds the actions detected until now.
2708  * @param[in] action
2709  *   Pointer to the pop vlan action.
2710  * @param[in] item_flags
2711  *   The items found in this flow rule.
2712  * @param[in] attr
2713  *   Pointer to flow attributes.
2714  * @param[out] error
2715  *   Pointer to error structure.
2716  *
2717  * @return
2718  *   0 on success, a negative errno value otherwise and rte_errno is set.
2719  */
2720 static int
2721 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2722                                  uint64_t action_flags,
2723                                  const struct rte_flow_action *action,
2724                                  uint64_t item_flags,
2725                                  const struct rte_flow_attr *attr,
2726                                  struct rte_flow_error *error)
2727 {
2728         const struct mlx5_priv *priv = dev->data->dev_private;
2729         struct mlx5_dev_ctx_shared *sh = priv->sh;
2730         bool direction_error = false;
2731
2732         if (!priv->sh->pop_vlan_action)
2733                 return rte_flow_error_set(error, ENOTSUP,
2734                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2735                                           NULL,
2736                                           "pop vlan action is not supported");
2737         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2738         if (attr->transfer) {
2739                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2740                 bool is_cx5 = sh->steering_format_version ==
2741                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2742
2743                 if (fdb_tx && is_cx5)
2744                         direction_error = true;
2745         } else if (attr->egress) {
2746                 direction_error = true;
2747         }
2748         if (direction_error)
2749                 return rte_flow_error_set(error, ENOTSUP,
2750                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2751                                           NULL,
2752                                           "pop vlan action not supported for egress");
2753         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2754                 return rte_flow_error_set(error, ENOTSUP,
2755                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2756                                           "no support for multiple VLAN "
2757                                           "actions");
2758         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2759         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2760             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2761                 return rte_flow_error_set(error, ENOTSUP,
2762                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2763                                           NULL,
2764                                           "cannot pop vlan after decap without "
2765                                           "match on inner vlan in the flow");
2766         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2767         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2768             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2769                 return rte_flow_error_set(error, ENOTSUP,
2770                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2771                                           NULL,
2772                                           "cannot pop vlan without a "
2773                                           "match on (outer) vlan in the flow");
2774         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2775                 return rte_flow_error_set(error, EINVAL,
2776                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2777                                           "wrong action order, port_id should "
2778                                           "be after pop VLAN action");
2779         if (!attr->transfer && priv->representor)
2780                 return rte_flow_error_set(error, ENOTSUP,
2781                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2782                                           "pop vlan action for VF representor "
2783                                           "not supported on NIC table");
2784         return 0;
2785 }
2786
2787 /**
2788  * Get VLAN default info from vlan match info.
2789  *
2790  * @param[in] items
2791  *   the list of item specifications.
2792  * @param[out] vlan
2793  *   pointer VLAN info to fill to.
2794  *
2795  * @return
2796  *   0 on success, a negative errno value otherwise and rte_errno is set.
2797  */
2798 static void
2799 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2800                                   struct rte_vlan_hdr *vlan)
2801 {
2802         const struct rte_flow_item_vlan nic_mask = {
2803                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2804                                 MLX5DV_FLOW_VLAN_VID_MASK),
2805                 .inner_type = RTE_BE16(0xffff),
2806         };
2807
2808         if (items == NULL)
2809                 return;
2810         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2811                 int type = items->type;
2812
2813                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2814                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2815                         break;
2816         }
2817         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2818                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2819                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2820
2821                 /* If VLAN item in pattern doesn't contain data, return here. */
2822                 if (!vlan_v)
2823                         return;
2824                 if (!vlan_m)
2825                         vlan_m = &nic_mask;
2826                 /* Only full match values are accepted */
2827                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2828                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2829                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2830                         vlan->vlan_tci |=
2831                                 rte_be_to_cpu_16(vlan_v->tci &
2832                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2833                 }
2834                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2835                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2836                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2837                         vlan->vlan_tci |=
2838                                 rte_be_to_cpu_16(vlan_v->tci &
2839                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2840                 }
2841                 if (vlan_m->inner_type == nic_mask.inner_type)
2842                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2843                                                            vlan_m->inner_type);
2844         }
2845 }
2846
2847 /**
2848  * Validate the push VLAN action.
2849  *
2850  * @param[in] dev
2851  *   Pointer to the rte_eth_dev structure.
2852  * @param[in] action_flags
2853  *   Holds the actions detected until now.
2854  * @param[in] item_flags
2855  *   The items found in this flow rule.
2856  * @param[in] action
2857  *   Pointer to the action structure.
2858  * @param[in] attr
2859  *   Pointer to flow attributes
2860  * @param[out] error
2861  *   Pointer to error structure.
2862  *
2863  * @return
2864  *   0 on success, a negative errno value otherwise and rte_errno is set.
2865  */
2866 static int
2867 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2868                                   uint64_t action_flags,
2869                                   const struct rte_flow_item_vlan *vlan_m,
2870                                   const struct rte_flow_action *action,
2871                                   const struct rte_flow_attr *attr,
2872                                   struct rte_flow_error *error)
2873 {
2874         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2875         const struct mlx5_priv *priv = dev->data->dev_private;
2876         struct mlx5_dev_ctx_shared *sh = priv->sh;
2877         bool direction_error = false;
2878
2879         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2880             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2881                 return rte_flow_error_set(error, EINVAL,
2882                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2883                                           "invalid vlan ethertype");
2884         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2885                 return rte_flow_error_set(error, EINVAL,
2886                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2887                                           "wrong action order, port_id should "
2888                                           "be after push VLAN");
2889         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2890         if (attr->transfer) {
2891                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2892                 bool is_cx5 = sh->steering_format_version ==
2893                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2894
2895                 if (!fdb_tx && is_cx5)
2896                         direction_error = true;
2897         } else if (attr->ingress) {
2898                 direction_error = true;
2899         }
2900         if (direction_error)
2901                 return rte_flow_error_set(error, ENOTSUP,
2902                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2903                                           NULL,
2904                                           "push vlan action not supported for ingress");
2905         if (!attr->transfer && priv->representor)
2906                 return rte_flow_error_set(error, ENOTSUP,
2907                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2908                                           "push vlan action for VF representor "
2909                                           "not supported on NIC table");
2910         if (vlan_m &&
2911             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2912             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2913                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2914             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2915             !(mlx5_flow_find_action
2916                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2917                 return rte_flow_error_set(error, EINVAL,
2918                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2919                                           "not full match mask on VLAN PCP and "
2920                                           "there is no of_set_vlan_pcp action, "
2921                                           "push VLAN action cannot figure out "
2922                                           "PCP value");
2923         if (vlan_m &&
2924             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2925             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2926                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2927             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2928             !(mlx5_flow_find_action
2929                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2930                 return rte_flow_error_set(error, EINVAL,
2931                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2932                                           "not full match mask on VLAN VID and "
2933                                           "there is no of_set_vlan_vid action, "
2934                                           "push VLAN action cannot figure out "
2935                                           "VID value");
2936         (void)attr;
2937         return 0;
2938 }
2939
2940 /**
2941  * Validate the set VLAN PCP.
2942  *
2943  * @param[in] action_flags
2944  *   Holds the actions detected until now.
2945  * @param[in] actions
2946  *   Pointer to the list of actions remaining in the flow rule.
2947  * @param[out] error
2948  *   Pointer to error structure.
2949  *
2950  * @return
2951  *   0 on success, a negative errno value otherwise and rte_errno is set.
2952  */
2953 static int
2954 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2955                                      const struct rte_flow_action actions[],
2956                                      struct rte_flow_error *error)
2957 {
2958         const struct rte_flow_action *action = actions;
2959         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2960
2961         if (conf->vlan_pcp > 7)
2962                 return rte_flow_error_set(error, EINVAL,
2963                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2964                                           "VLAN PCP value is too big");
2965         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2966                 return rte_flow_error_set(error, ENOTSUP,
2967                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2968                                           "set VLAN PCP action must follow "
2969                                           "the push VLAN action");
2970         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2971                 return rte_flow_error_set(error, ENOTSUP,
2972                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2973                                           "Multiple VLAN PCP modification are "
2974                                           "not supported");
2975         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2976                 return rte_flow_error_set(error, EINVAL,
2977                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2978                                           "wrong action order, port_id should "
2979                                           "be after set VLAN PCP");
2980         return 0;
2981 }
2982
2983 /**
2984  * Validate the set VLAN VID.
2985  *
2986  * @param[in] item_flags
2987  *   Holds the items detected in this rule.
2988  * @param[in] action_flags
2989  *   Holds the actions detected until now.
2990  * @param[in] actions
2991  *   Pointer to the list of actions remaining in the flow rule.
2992  * @param[out] error
2993  *   Pointer to error structure.
2994  *
2995  * @return
2996  *   0 on success, a negative errno value otherwise and rte_errno is set.
2997  */
2998 static int
2999 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3000                                      uint64_t action_flags,
3001                                      const struct rte_flow_action actions[],
3002                                      struct rte_flow_error *error)
3003 {
3004         const struct rte_flow_action *action = actions;
3005         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3006
3007         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3008                 return rte_flow_error_set(error, EINVAL,
3009                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3010                                           "VLAN VID value is too big");
3011         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3012             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3013                 return rte_flow_error_set(error, ENOTSUP,
3014                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3015                                           "set VLAN VID action must follow push"
3016                                           " VLAN action or match on VLAN item");
3017         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3018                 return rte_flow_error_set(error, ENOTSUP,
3019                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3020                                           "Multiple VLAN VID modifications are "
3021                                           "not supported");
3022         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3023                 return rte_flow_error_set(error, EINVAL,
3024                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3025                                           "wrong action order, port_id should "
3026                                           "be after set VLAN VID");
3027         return 0;
3028 }
3029
3030 /*
3031  * Validate the FLAG action.
3032  *
3033  * @param[in] dev
3034  *   Pointer to the rte_eth_dev structure.
3035  * @param[in] action_flags
3036  *   Holds the actions detected until now.
3037  * @param[in] attr
3038  *   Pointer to flow attributes
3039  * @param[out] error
3040  *   Pointer to error structure.
3041  *
3042  * @return
3043  *   0 on success, a negative errno value otherwise and rte_errno is set.
3044  */
3045 static int
3046 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3047                              uint64_t action_flags,
3048                              const struct rte_flow_attr *attr,
3049                              struct rte_flow_error *error)
3050 {
3051         struct mlx5_priv *priv = dev->data->dev_private;
3052         struct mlx5_sh_config *config = &priv->sh->config;
3053         int ret;
3054
3055         /* Fall back if no extended metadata register support. */
3056         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3057                 return mlx5_flow_validate_action_flag(action_flags, attr,
3058                                                       error);
3059         /* Extensive metadata mode requires registers. */
3060         if (!mlx5_flow_ext_mreg_supported(dev))
3061                 return rte_flow_error_set(error, ENOTSUP,
3062                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3063                                           "no metadata registers "
3064                                           "to support flag action");
3065         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3066                 return rte_flow_error_set(error, ENOTSUP,
3067                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3068                                           "extended metadata register"
3069                                           " isn't available");
3070         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3071         if (ret < 0)
3072                 return ret;
3073         MLX5_ASSERT(ret > 0);
3074         if (action_flags & MLX5_FLOW_ACTION_MARK)
3075                 return rte_flow_error_set(error, EINVAL,
3076                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3077                                           "can't mark and flag in same flow");
3078         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3079                 return rte_flow_error_set(error, EINVAL,
3080                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3081                                           "can't have 2 flag"
3082                                           " actions in same flow");
3083         return 0;
3084 }
3085
3086 /**
3087  * Validate MARK action.
3088  *
3089  * @param[in] dev
3090  *   Pointer to the rte_eth_dev structure.
3091  * @param[in] action
3092  *   Pointer to action.
3093  * @param[in] action_flags
3094  *   Holds the actions detected until now.
3095  * @param[in] attr
3096  *   Pointer to flow attributes
3097  * @param[out] error
3098  *   Pointer to error structure.
3099  *
3100  * @return
3101  *   0 on success, a negative errno value otherwise and rte_errno is set.
3102  */
3103 static int
3104 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3105                              const struct rte_flow_action *action,
3106                              uint64_t action_flags,
3107                              const struct rte_flow_attr *attr,
3108                              struct rte_flow_error *error)
3109 {
3110         struct mlx5_priv *priv = dev->data->dev_private;
3111         struct mlx5_sh_config *config = &priv->sh->config;
3112         const struct rte_flow_action_mark *mark = action->conf;
3113         int ret;
3114
3115         if (is_tunnel_offload_active(dev))
3116                 return rte_flow_error_set(error, ENOTSUP,
3117                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3118                                           "no mark action "
3119                                           "if tunnel offload active");
3120         /* Fall back if no extended metadata register support. */
3121         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3122                 return mlx5_flow_validate_action_mark(action, action_flags,
3123                                                       attr, error);
3124         /* Extensive metadata mode requires registers. */
3125         if (!mlx5_flow_ext_mreg_supported(dev))
3126                 return rte_flow_error_set(error, ENOTSUP,
3127                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3128                                           "no metadata registers "
3129                                           "to support mark action");
3130         if (!priv->sh->dv_mark_mask)
3131                 return rte_flow_error_set(error, ENOTSUP,
3132                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3133                                           "extended metadata register"
3134                                           " isn't available");
3135         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3136         if (ret < 0)
3137                 return ret;
3138         MLX5_ASSERT(ret > 0);
3139         if (!mark)
3140                 return rte_flow_error_set(error, EINVAL,
3141                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3142                                           "configuration cannot be null");
3143         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3144                 return rte_flow_error_set(error, EINVAL,
3145                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3146                                           &mark->id,
3147                                           "mark id exceeds the limit");
3148         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3149                 return rte_flow_error_set(error, EINVAL,
3150                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3151                                           "can't flag and mark in same flow");
3152         if (action_flags & MLX5_FLOW_ACTION_MARK)
3153                 return rte_flow_error_set(error, EINVAL,
3154                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3155                                           "can't have 2 mark actions in same"
3156                                           " flow");
3157         return 0;
3158 }
3159
3160 /**
3161  * Validate SET_META action.
3162  *
3163  * @param[in] dev
3164  *   Pointer to the rte_eth_dev structure.
3165  * @param[in] action
3166  *   Pointer to the action structure.
3167  * @param[in] action_flags
3168  *   Holds the actions detected until now.
3169  * @param[in] attr
3170  *   Pointer to flow attributes
3171  * @param[out] error
3172  *   Pointer to error structure.
3173  *
3174  * @return
3175  *   0 on success, a negative errno value otherwise and rte_errno is set.
3176  */
3177 static int
3178 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3179                                  const struct rte_flow_action *action,
3180                                  uint64_t action_flags __rte_unused,
3181                                  const struct rte_flow_attr *attr,
3182                                  struct rte_flow_error *error)
3183 {
3184         struct mlx5_priv *priv = dev->data->dev_private;
3185         struct mlx5_sh_config *config = &priv->sh->config;
3186         const struct rte_flow_action_set_meta *conf;
3187         uint32_t nic_mask = UINT32_MAX;
3188         int reg;
3189
3190         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3191             !mlx5_flow_ext_mreg_supported(dev))
3192                 return rte_flow_error_set(error, ENOTSUP,
3193                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3194                                           "extended metadata register"
3195                                           " isn't supported");
3196         reg = flow_dv_get_metadata_reg(dev, attr, error);
3197         if (reg < 0)
3198                 return reg;
3199         if (reg == REG_NON)
3200                 return rte_flow_error_set(error, ENOTSUP,
3201                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3202                                           "unavailable extended metadata register");
3203         if (reg != REG_A && reg != REG_B) {
3204                 struct mlx5_priv *priv = dev->data->dev_private;
3205
3206                 nic_mask = priv->sh->dv_meta_mask;
3207         }
3208         if (!(action->conf))
3209                 return rte_flow_error_set(error, EINVAL,
3210                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3211                                           "configuration cannot be null");
3212         conf = (const struct rte_flow_action_set_meta *)action->conf;
3213         if (!conf->mask)
3214                 return rte_flow_error_set(error, EINVAL,
3215                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3216                                           "zero mask doesn't have any effect");
3217         if (conf->mask & ~nic_mask)
3218                 return rte_flow_error_set(error, EINVAL,
3219                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3220                                           "meta data must be within reg C0");
3221         return 0;
3222 }
3223
3224 /**
3225  * Validate SET_TAG action.
3226  *
3227  * @param[in] dev
3228  *   Pointer to the rte_eth_dev structure.
3229  * @param[in] action
3230  *   Pointer to the action structure.
3231  * @param[in] action_flags
3232  *   Holds the actions detected until now.
3233  * @param[in] attr
3234  *   Pointer to flow attributes
3235  * @param[out] error
3236  *   Pointer to error structure.
3237  *
3238  * @return
3239  *   0 on success, a negative errno value otherwise and rte_errno is set.
3240  */
3241 static int
3242 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3243                                 const struct rte_flow_action *action,
3244                                 uint64_t action_flags,
3245                                 const struct rte_flow_attr *attr,
3246                                 struct rte_flow_error *error)
3247 {
3248         const struct rte_flow_action_set_tag *conf;
3249         const uint64_t terminal_action_flags =
3250                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3251                 MLX5_FLOW_ACTION_RSS;
3252         int ret;
3253
3254         if (!mlx5_flow_ext_mreg_supported(dev))
3255                 return rte_flow_error_set(error, ENOTSUP,
3256                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3257                                           "extensive metadata register"
3258                                           " isn't supported");
3259         if (!(action->conf))
3260                 return rte_flow_error_set(error, EINVAL,
3261                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3262                                           "configuration cannot be null");
3263         conf = (const struct rte_flow_action_set_tag *)action->conf;
3264         if (!conf->mask)
3265                 return rte_flow_error_set(error, EINVAL,
3266                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3267                                           "zero mask doesn't have any effect");
3268         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3269         if (ret < 0)
3270                 return ret;
3271         if (!attr->transfer && attr->ingress &&
3272             (action_flags & terminal_action_flags))
3273                 return rte_flow_error_set(error, EINVAL,
3274                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3275                                           "set_tag has no effect"
3276                                           " with terminal actions");
3277         return 0;
3278 }
3279
3280 /**
3281  * Validate count action.
3282  *
3283  * @param[in] dev
3284  *   Pointer to rte_eth_dev structure.
3285  * @param[in] shared
3286  *   Indicator if action is shared.
3287  * @param[in] action_flags
3288  *   Holds the actions detected until now.
3289  * @param[out] error
3290  *   Pointer to error structure.
3291  *
3292  * @return
3293  *   0 on success, a negative errno value otherwise and rte_errno is set.
3294  */
3295 static int
3296 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3297                               uint64_t action_flags,
3298                               struct rte_flow_error *error)
3299 {
3300         struct mlx5_priv *priv = dev->data->dev_private;
3301
3302         if (!priv->sh->cdev->config.devx)
3303                 goto notsup_err;
3304         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3305                 return rte_flow_error_set(error, EINVAL,
3306                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3307                                           "duplicate count actions set");
3308         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3309             !priv->sh->flow_hit_aso_en)
3310                 return rte_flow_error_set(error, EINVAL,
3311                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3312                                           "old age and shared count combination is not supported");
3313 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3314         return 0;
3315 #endif
3316 notsup_err:
3317         return rte_flow_error_set
3318                       (error, ENOTSUP,
3319                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3320                        NULL,
3321                        "count action not supported");
3322 }
3323
3324 /**
3325  * Validate the L2 encap action.
3326  *
3327  * @param[in] dev
3328  *   Pointer to the rte_eth_dev structure.
3329  * @param[in] action_flags
3330  *   Holds the actions detected until now.
3331  * @param[in] action
3332  *   Pointer to the action structure.
3333  * @param[in] attr
3334  *   Pointer to flow attributes.
3335  * @param[out] error
3336  *   Pointer to error structure.
3337  *
3338  * @return
3339  *   0 on success, a negative errno value otherwise and rte_errno is set.
3340  */
3341 static int
3342 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3343                                  uint64_t action_flags,
3344                                  const struct rte_flow_action *action,
3345                                  const struct rte_flow_attr *attr,
3346                                  struct rte_flow_error *error)
3347 {
3348         const struct mlx5_priv *priv = dev->data->dev_private;
3349
3350         if (!(action->conf))
3351                 return rte_flow_error_set(error, EINVAL,
3352                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3353                                           "configuration cannot be null");
3354         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3355                 return rte_flow_error_set(error, EINVAL,
3356                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3357                                           "can only have a single encap action "
3358                                           "in a flow");
3359         if (!attr->transfer && priv->representor)
3360                 return rte_flow_error_set(error, ENOTSUP,
3361                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3362                                           "encap action for VF representor "
3363                                           "not supported on NIC table");
3364         return 0;
3365 }
3366
3367 /**
3368  * Validate a decap action.
3369  *
3370  * @param[in] dev
3371  *   Pointer to the rte_eth_dev structure.
3372  * @param[in] action_flags
3373  *   Holds the actions detected until now.
3374  * @param[in] action
3375  *   Pointer to the action structure.
3376  * @param[in] item_flags
3377  *   Holds the items detected.
3378  * @param[in] attr
3379  *   Pointer to flow attributes
3380  * @param[out] error
3381  *   Pointer to error structure.
3382  *
3383  * @return
3384  *   0 on success, a negative errno value otherwise and rte_errno is set.
3385  */
3386 static int
3387 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3388                               uint64_t action_flags,
3389                               const struct rte_flow_action *action,
3390                               const uint64_t item_flags,
3391                               const struct rte_flow_attr *attr,
3392                               struct rte_flow_error *error)
3393 {
3394         const struct mlx5_priv *priv = dev->data->dev_private;
3395
3396         if (priv->sh->cdev->config.hca_attr.scatter_fcs_w_decap_disable &&
3397             !priv->sh->config.decap_en)
3398                 return rte_flow_error_set(error, ENOTSUP,
3399                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3400                                           "decap is not enabled");
3401         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3402                 return rte_flow_error_set(error, ENOTSUP,
3403                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3404                                           action_flags &
3405                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3406                                           "have a single decap action" : "decap "
3407                                           "after encap is not supported");
3408         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3409                 return rte_flow_error_set(error, EINVAL,
3410                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3411                                           "can't have decap action after"
3412                                           " modify action");
3413         if (attr->egress)
3414                 return rte_flow_error_set(error, ENOTSUP,
3415                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3416                                           NULL,
3417                                           "decap action not supported for "
3418                                           "egress");
3419         if (!attr->transfer && priv->representor)
3420                 return rte_flow_error_set(error, ENOTSUP,
3421                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3422                                           "decap action for VF representor "
3423                                           "not supported on NIC table");
3424         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3425             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3426                 return rte_flow_error_set(error, ENOTSUP,
3427                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3428                                 "VXLAN item should be present for VXLAN decap");
3429         return 0;
3430 }
3431
3432 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3433
3434 /**
3435  * Validate the raw encap and decap actions.
3436  *
3437  * @param[in] dev
3438  *   Pointer to the rte_eth_dev structure.
3439  * @param[in] decap
3440  *   Pointer to the decap action.
3441  * @param[in] encap
3442  *   Pointer to the encap action.
3443  * @param[in] attr
3444  *   Pointer to flow attributes
3445  * @param[in/out] action_flags
3446  *   Holds the actions detected until now.
3447  * @param[out] actions_n
3448  *   pointer to the number of actions counter.
3449  * @param[in] action
3450  *   Pointer to the action structure.
3451  * @param[in] item_flags
3452  *   Holds the items detected.
3453  * @param[out] error
3454  *   Pointer to error structure.
3455  *
3456  * @return
3457  *   0 on success, a negative errno value otherwise and rte_errno is set.
3458  */
3459 static int
3460 flow_dv_validate_action_raw_encap_decap
3461         (struct rte_eth_dev *dev,
3462          const struct rte_flow_action_raw_decap *decap,
3463          const struct rte_flow_action_raw_encap *encap,
3464          const struct rte_flow_attr *attr, uint64_t *action_flags,
3465          int *actions_n, const struct rte_flow_action *action,
3466          uint64_t item_flags, struct rte_flow_error *error)
3467 {
3468         const struct mlx5_priv *priv = dev->data->dev_private;
3469         int ret;
3470
3471         if (encap && (!encap->size || !encap->data))
3472                 return rte_flow_error_set(error, EINVAL,
3473                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3474                                           "raw encap data cannot be empty");
3475         if (decap && encap) {
3476                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3477                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3478                         /* L3 encap. */
3479                         decap = NULL;
3480                 else if (encap->size <=
3481                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3482                            decap->size >
3483                            MLX5_ENCAPSULATION_DECISION_SIZE)
3484                         /* L3 decap. */
3485                         encap = NULL;
3486                 else if (encap->size >
3487                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3488                            decap->size >
3489                            MLX5_ENCAPSULATION_DECISION_SIZE)
3490                         /* 2 L2 actions: encap and decap. */
3491                         ;
3492                 else
3493                         return rte_flow_error_set(error,
3494                                 ENOTSUP,
3495                                 RTE_FLOW_ERROR_TYPE_ACTION,
3496                                 NULL, "unsupported too small "
3497                                 "raw decap and too small raw "
3498                                 "encap combination");
3499         }
3500         if (decap) {
3501                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3502                                                     item_flags, attr, error);
3503                 if (ret < 0)
3504                         return ret;
3505                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3506                 ++(*actions_n);
3507         }
3508         if (encap) {
3509                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3510                         return rte_flow_error_set(error, ENOTSUP,
3511                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3512                                                   NULL,
3513                                                   "small raw encap size");
3514                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3515                         return rte_flow_error_set(error, EINVAL,
3516                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3517                                                   NULL,
3518                                                   "more than one encap action");
3519                 if (!attr->transfer && priv->representor)
3520                         return rte_flow_error_set
3521                                         (error, ENOTSUP,
3522                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3523                                          "encap action for VF representor "
3524                                          "not supported on NIC table");
3525                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3526                 ++(*actions_n);
3527         }
3528         return 0;
3529 }
3530
3531 /*
3532  * Validate the ASO CT action.
3533  *
3534  * @param[in] dev
3535  *   Pointer to the rte_eth_dev structure.
3536  * @param[in] action_flags
3537  *   Holds the actions detected until now.
3538  * @param[in] item_flags
3539  *   The items found in this flow rule.
3540  * @param[in] attr
3541  *   Pointer to flow attributes.
3542  * @param[out] error
3543  *   Pointer to error structure.
3544  *
3545  * @return
3546  *   0 on success, a negative errno value otherwise and rte_errno is set.
3547  */
3548 static int
3549 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3550                                uint64_t action_flags,
3551                                uint64_t item_flags,
3552                                const struct rte_flow_attr *attr,
3553                                struct rte_flow_error *error)
3554 {
3555         RTE_SET_USED(dev);
3556
3557         if (attr->group == 0 && !attr->transfer)
3558                 return rte_flow_error_set(error, ENOTSUP,
3559                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3560                                           NULL,
3561                                           "Only support non-root table");
3562         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3563                 return rte_flow_error_set(error, ENOTSUP,
3564                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3565                                           "CT cannot follow a fate action");
3566         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3567             (action_flags & MLX5_FLOW_ACTION_AGE))
3568                 return rte_flow_error_set(error, EINVAL,
3569                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3570                                           "Only one ASO action is supported");
3571         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3572                 return rte_flow_error_set(error, EINVAL,
3573                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3574                                           "Encap cannot exist before CT");
3575         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3576                 return rte_flow_error_set(error, EINVAL,
3577                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3578                                           "Not a outer TCP packet");
3579         return 0;
3580 }
3581
3582 int
3583 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3584                              struct mlx5_list_entry *entry, void *cb_ctx)
3585 {
3586         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3587         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3588         struct mlx5_flow_dv_encap_decap_resource *resource;
3589
3590         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3591                                 entry);
3592         if (resource->reformat_type == ctx_resource->reformat_type &&
3593             resource->ft_type == ctx_resource->ft_type &&
3594             resource->flags == ctx_resource->flags &&
3595             resource->size == ctx_resource->size &&
3596             !memcmp((const void *)resource->buf,
3597                     (const void *)ctx_resource->buf,
3598                     resource->size))
3599                 return 0;
3600         return -1;
3601 }
3602
3603 struct mlx5_list_entry *
3604 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3605 {
3606         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3607         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3608         struct mlx5dv_dr_domain *domain;
3609         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3610         struct mlx5_flow_dv_encap_decap_resource *resource;
3611         uint32_t idx;
3612         int ret;
3613
3614         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3615                 domain = sh->fdb_domain;
3616         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3617                 domain = sh->rx_domain;
3618         else
3619                 domain = sh->tx_domain;
3620         /* Register new encap/decap resource. */
3621         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3622         if (!resource) {
3623                 rte_flow_error_set(ctx->error, ENOMEM,
3624                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3625                                    "cannot allocate resource memory");
3626                 return NULL;
3627         }
3628         *resource = *ctx_resource;
3629         resource->idx = idx;
3630         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3631                                                               domain, resource,
3632                                                              &resource->action);
3633         if (ret) {
3634                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3635                 rte_flow_error_set(ctx->error, ENOMEM,
3636                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3637                                    NULL, "cannot create action");
3638                 return NULL;
3639         }
3640
3641         return &resource->entry;
3642 }
3643
3644 struct mlx5_list_entry *
3645 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3646                              void *cb_ctx)
3647 {
3648         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3649         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3650         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3651         uint32_t idx;
3652
3653         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3654                                            &idx);
3655         if (!cache_resource) {
3656                 rte_flow_error_set(ctx->error, ENOMEM,
3657                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3658                                    "cannot allocate resource memory");
3659                 return NULL;
3660         }
3661         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3662         cache_resource->idx = idx;
3663         return &cache_resource->entry;
3664 }
3665
3666 void
3667 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3668 {
3669         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3670         struct mlx5_flow_dv_encap_decap_resource *res =
3671                                        container_of(entry, typeof(*res), entry);
3672
3673         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3674 }
3675
3676 /**
3677  * Find existing encap/decap resource or create and register a new one.
3678  *
3679  * @param[in, out] dev
3680  *   Pointer to rte_eth_dev structure.
3681  * @param[in, out] resource
3682  *   Pointer to encap/decap resource.
3683  * @parm[in, out] dev_flow
3684  *   Pointer to the dev_flow.
3685  * @param[out] error
3686  *   pointer to error structure.
3687  *
3688  * @return
3689  *   0 on success otherwise -errno and errno is set.
3690  */
3691 static int
3692 flow_dv_encap_decap_resource_register
3693                         (struct rte_eth_dev *dev,
3694                          struct mlx5_flow_dv_encap_decap_resource *resource,
3695                          struct mlx5_flow *dev_flow,
3696                          struct rte_flow_error *error)
3697 {
3698         struct mlx5_priv *priv = dev->data->dev_private;
3699         struct mlx5_dev_ctx_shared *sh = priv->sh;
3700         struct mlx5_list_entry *entry;
3701         union {
3702                 struct {
3703                         uint32_t ft_type:8;
3704                         uint32_t refmt_type:8;
3705                         /*
3706                          * Header reformat actions can be shared between
3707                          * non-root tables. One bit to indicate non-root
3708                          * table or not.
3709                          */
3710                         uint32_t is_root:1;
3711                         uint32_t reserve:15;
3712                 };
3713                 uint32_t v32;
3714         } encap_decap_key = {
3715                 {
3716                         .ft_type = resource->ft_type,
3717                         .refmt_type = resource->reformat_type,
3718                         .is_root = !!dev_flow->dv.group,
3719                         .reserve = 0,
3720                 }
3721         };
3722         struct mlx5_flow_cb_ctx ctx = {
3723                 .error = error,
3724                 .data = resource,
3725         };
3726         struct mlx5_hlist *encaps_decaps;
3727         uint64_t key64;
3728
3729         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3730                                 "encaps_decaps",
3731                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3732                                 true, true, sh,
3733                                 flow_dv_encap_decap_create_cb,
3734                                 flow_dv_encap_decap_match_cb,
3735                                 flow_dv_encap_decap_remove_cb,
3736                                 flow_dv_encap_decap_clone_cb,
3737                                 flow_dv_encap_decap_clone_free_cb,
3738                                 error);
3739         if (unlikely(!encaps_decaps))
3740                 return -rte_errno;
3741         resource->flags = dev_flow->dv.group ? 0 : 1;
3742         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3743                                  sizeof(encap_decap_key.v32), 0);
3744         if (resource->reformat_type !=
3745             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3746             resource->size)
3747                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3748         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3749         if (!entry)
3750                 return -rte_errno;
3751         resource = container_of(entry, typeof(*resource), entry);
3752         dev_flow->dv.encap_decap = resource;
3753         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3754         return 0;
3755 }
3756
3757 /**
3758  * Find existing table jump resource or create and register a new one.
3759  *
3760  * @param[in, out] dev
3761  *   Pointer to rte_eth_dev structure.
3762  * @param[in, out] tbl
3763  *   Pointer to flow table resource.
3764  * @parm[in, out] dev_flow
3765  *   Pointer to the dev_flow.
3766  * @param[out] error
3767  *   pointer to error structure.
3768  *
3769  * @return
3770  *   0 on success otherwise -errno and errno is set.
3771  */
3772 static int
3773 flow_dv_jump_tbl_resource_register
3774                         (struct rte_eth_dev *dev __rte_unused,
3775                          struct mlx5_flow_tbl_resource *tbl,
3776                          struct mlx5_flow *dev_flow,
3777                          struct rte_flow_error *error __rte_unused)
3778 {
3779         struct mlx5_flow_tbl_data_entry *tbl_data =
3780                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3781
3782         MLX5_ASSERT(tbl);
3783         MLX5_ASSERT(tbl_data->jump.action);
3784         dev_flow->handle->rix_jump = tbl_data->idx;
3785         dev_flow->dv.jump = &tbl_data->jump;
3786         return 0;
3787 }
3788
3789 int
3790 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3791                          struct mlx5_list_entry *entry, void *cb_ctx)
3792 {
3793         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3794         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3795         struct mlx5_flow_dv_port_id_action_resource *res =
3796                                        container_of(entry, typeof(*res), entry);
3797
3798         return ref->port_id != res->port_id;
3799 }
3800
3801 struct mlx5_list_entry *
3802 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3803 {
3804         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3805         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3806         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3807         struct mlx5_flow_dv_port_id_action_resource *resource;
3808         uint32_t idx;
3809         int ret;
3810
3811         /* Register new port id action resource. */
3812         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3813         if (!resource) {
3814                 rte_flow_error_set(ctx->error, ENOMEM,
3815                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3816                                    "cannot allocate port_id action memory");
3817                 return NULL;
3818         }
3819         *resource = *ref;
3820         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3821                                                         ref->port_id,
3822                                                         &resource->action);
3823         if (ret) {
3824                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3825                 rte_flow_error_set(ctx->error, ENOMEM,
3826                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3827                                    "cannot create action");
3828                 return NULL;
3829         }
3830         resource->idx = idx;
3831         return &resource->entry;
3832 }
3833
3834 struct mlx5_list_entry *
3835 flow_dv_port_id_clone_cb(void *tool_ctx,
3836                          struct mlx5_list_entry *entry __rte_unused,
3837                          void *cb_ctx)
3838 {
3839         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3840         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3841         struct mlx5_flow_dv_port_id_action_resource *resource;
3842         uint32_t idx;
3843
3844         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3845         if (!resource) {
3846                 rte_flow_error_set(ctx->error, ENOMEM,
3847                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3848                                    "cannot allocate port_id action memory");
3849                 return NULL;
3850         }
3851         memcpy(resource, entry, sizeof(*resource));
3852         resource->idx = idx;
3853         return &resource->entry;
3854 }
3855
3856 void
3857 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3858 {
3859         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3860         struct mlx5_flow_dv_port_id_action_resource *resource =
3861                                   container_of(entry, typeof(*resource), entry);
3862
3863         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3864 }
3865
3866 /**
3867  * Find existing table port ID resource or create and register a new one.
3868  *
3869  * @param[in, out] dev
3870  *   Pointer to rte_eth_dev structure.
3871  * @param[in, out] ref
3872  *   Pointer to port ID action resource reference.
3873  * @parm[in, out] dev_flow
3874  *   Pointer to the dev_flow.
3875  * @param[out] error
3876  *   pointer to error structure.
3877  *
3878  * @return
3879  *   0 on success otherwise -errno and errno is set.
3880  */
3881 static int
3882 flow_dv_port_id_action_resource_register
3883                         (struct rte_eth_dev *dev,
3884                          struct mlx5_flow_dv_port_id_action_resource *ref,
3885                          struct mlx5_flow *dev_flow,
3886                          struct rte_flow_error *error)
3887 {
3888         struct mlx5_priv *priv = dev->data->dev_private;
3889         struct mlx5_list_entry *entry;
3890         struct mlx5_flow_dv_port_id_action_resource *resource;
3891         struct mlx5_flow_cb_ctx ctx = {
3892                 .error = error,
3893                 .data = ref,
3894         };
3895
3896         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3897         if (!entry)
3898                 return -rte_errno;
3899         resource = container_of(entry, typeof(*resource), entry);
3900         dev_flow->dv.port_id_action = resource;
3901         dev_flow->handle->rix_port_id_action = resource->idx;
3902         return 0;
3903 }
3904
3905 int
3906 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3907                            struct mlx5_list_entry *entry, void *cb_ctx)
3908 {
3909         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3910         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3911         struct mlx5_flow_dv_push_vlan_action_resource *res =
3912                                        container_of(entry, typeof(*res), entry);
3913
3914         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3915 }
3916
3917 struct mlx5_list_entry *
3918 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3919 {
3920         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3921         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3922         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3923         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3924         struct mlx5dv_dr_domain *domain;
3925         uint32_t idx;
3926         int ret;
3927
3928         /* Register new port id action resource. */
3929         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3930         if (!resource) {
3931                 rte_flow_error_set(ctx->error, ENOMEM,
3932                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3933                                    "cannot allocate push_vlan action memory");
3934                 return NULL;
3935         }
3936         *resource = *ref;
3937         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3938                 domain = sh->fdb_domain;
3939         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3940                 domain = sh->rx_domain;
3941         else
3942                 domain = sh->tx_domain;
3943         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3944                                                         &resource->action);
3945         if (ret) {
3946                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3947                 rte_flow_error_set(ctx->error, ENOMEM,
3948                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3949                                    "cannot create push vlan action");
3950                 return NULL;
3951         }
3952         resource->idx = idx;
3953         return &resource->entry;
3954 }
3955
3956 struct mlx5_list_entry *
3957 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3958                            struct mlx5_list_entry *entry __rte_unused,
3959                            void *cb_ctx)
3960 {
3961         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3962         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3963         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3964         uint32_t idx;
3965
3966         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3967         if (!resource) {
3968                 rte_flow_error_set(ctx->error, ENOMEM,
3969                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3970                                    "cannot allocate push_vlan action memory");
3971                 return NULL;
3972         }
3973         memcpy(resource, entry, sizeof(*resource));
3974         resource->idx = idx;
3975         return &resource->entry;
3976 }
3977
3978 void
3979 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3980 {
3981         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3982         struct mlx5_flow_dv_push_vlan_action_resource *resource =
3983                                   container_of(entry, typeof(*resource), entry);
3984
3985         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3986 }
3987
3988 /**
3989  * Find existing push vlan resource or create and register a new one.
3990  *
3991  * @param [in, out] dev
3992  *   Pointer to rte_eth_dev structure.
3993  * @param[in, out] ref
3994  *   Pointer to port ID action resource reference.
3995  * @parm[in, out] dev_flow
3996  *   Pointer to the dev_flow.
3997  * @param[out] error
3998  *   pointer to error structure.
3999  *
4000  * @return
4001  *   0 on success otherwise -errno and errno is set.
4002  */
4003 static int
4004 flow_dv_push_vlan_action_resource_register
4005                        (struct rte_eth_dev *dev,
4006                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4007                         struct mlx5_flow *dev_flow,
4008                         struct rte_flow_error *error)
4009 {
4010         struct mlx5_priv *priv = dev->data->dev_private;
4011         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4012         struct mlx5_list_entry *entry;
4013         struct mlx5_flow_cb_ctx ctx = {
4014                 .error = error,
4015                 .data = ref,
4016         };
4017
4018         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4019         if (!entry)
4020                 return -rte_errno;
4021         resource = container_of(entry, typeof(*resource), entry);
4022
4023         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4024         dev_flow->dv.push_vlan_res = resource;
4025         return 0;
4026 }
4027
4028 /**
4029  * Get the size of specific rte_flow_item_type hdr size
4030  *
4031  * @param[in] item_type
4032  *   Tested rte_flow_item_type.
4033  *
4034  * @return
4035  *   sizeof struct item_type, 0 if void or irrelevant.
4036  */
4037 size_t
4038 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4039 {
4040         size_t retval;
4041
4042         switch (item_type) {
4043         case RTE_FLOW_ITEM_TYPE_ETH:
4044                 retval = sizeof(struct rte_ether_hdr);
4045                 break;
4046         case RTE_FLOW_ITEM_TYPE_VLAN:
4047                 retval = sizeof(struct rte_vlan_hdr);
4048                 break;
4049         case RTE_FLOW_ITEM_TYPE_IPV4:
4050                 retval = sizeof(struct rte_ipv4_hdr);
4051                 break;
4052         case RTE_FLOW_ITEM_TYPE_IPV6:
4053                 retval = sizeof(struct rte_ipv6_hdr);
4054                 break;
4055         case RTE_FLOW_ITEM_TYPE_UDP:
4056                 retval = sizeof(struct rte_udp_hdr);
4057                 break;
4058         case RTE_FLOW_ITEM_TYPE_TCP:
4059                 retval = sizeof(struct rte_tcp_hdr);
4060                 break;
4061         case RTE_FLOW_ITEM_TYPE_VXLAN:
4062         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4063                 retval = sizeof(struct rte_vxlan_hdr);
4064                 break;
4065         case RTE_FLOW_ITEM_TYPE_GRE:
4066         case RTE_FLOW_ITEM_TYPE_NVGRE:
4067                 retval = sizeof(struct rte_gre_hdr);
4068                 break;
4069         case RTE_FLOW_ITEM_TYPE_MPLS:
4070                 retval = sizeof(struct rte_mpls_hdr);
4071                 break;
4072         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4073         default:
4074                 retval = 0;
4075                 break;
4076         }
4077         return retval;
4078 }
4079
4080 #define MLX5_ENCAP_IPV4_VERSION         0x40
4081 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4082 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4083 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4084 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4085 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4086 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4087
4088 /**
4089  * Convert the encap action data from list of rte_flow_item to raw buffer
4090  *
4091  * @param[in] items
4092  *   Pointer to rte_flow_item objects list.
4093  * @param[out] buf
4094  *   Pointer to the output buffer.
4095  * @param[out] size
4096  *   Pointer to the output buffer size.
4097  * @param[out] error
4098  *   Pointer to the error structure.
4099  *
4100  * @return
4101  *   0 on success, a negative errno value otherwise and rte_errno is set.
4102  */
4103 int
4104 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4105                            size_t *size, struct rte_flow_error *error)
4106 {
4107         struct rte_ether_hdr *eth = NULL;
4108         struct rte_vlan_hdr *vlan = NULL;
4109         struct rte_ipv4_hdr *ipv4 = NULL;
4110         struct rte_ipv6_hdr *ipv6 = NULL;
4111         struct rte_udp_hdr *udp = NULL;
4112         struct rte_vxlan_hdr *vxlan = NULL;
4113         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4114         struct rte_gre_hdr *gre = NULL;
4115         size_t len;
4116         size_t temp_size = 0;
4117
4118         if (!items)
4119                 return rte_flow_error_set(error, EINVAL,
4120                                           RTE_FLOW_ERROR_TYPE_ACTION,
4121                                           NULL, "invalid empty data");
4122         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4123                 len = flow_dv_get_item_hdr_len(items->type);
4124                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4125                         return rte_flow_error_set(error, EINVAL,
4126                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4127                                                   (void *)items->type,
4128                                                   "items total size is too big"
4129                                                   " for encap action");
4130                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4131                 switch (items->type) {
4132                 case RTE_FLOW_ITEM_TYPE_ETH:
4133                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4134                         break;
4135                 case RTE_FLOW_ITEM_TYPE_VLAN:
4136                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4137                         if (!eth)
4138                                 return rte_flow_error_set(error, EINVAL,
4139                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4140                                                 (void *)items->type,
4141                                                 "eth header not found");
4142                         if (!eth->ether_type)
4143                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4144                         break;
4145                 case RTE_FLOW_ITEM_TYPE_IPV4:
4146                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4147                         if (!vlan && !eth)
4148                                 return rte_flow_error_set(error, EINVAL,
4149                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4150                                                 (void *)items->type,
4151                                                 "neither eth nor vlan"
4152                                                 " header found");
4153                         if (vlan && !vlan->eth_proto)
4154                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4155                         else if (eth && !eth->ether_type)
4156                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4157                         if (!ipv4->version_ihl)
4158                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4159                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4160                         if (!ipv4->time_to_live)
4161                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4162                         break;
4163                 case RTE_FLOW_ITEM_TYPE_IPV6:
4164                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4165                         if (!vlan && !eth)
4166                                 return rte_flow_error_set(error, EINVAL,
4167                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4168                                                 (void *)items->type,
4169                                                 "neither eth nor vlan"
4170                                                 " header found");
4171                         if (vlan && !vlan->eth_proto)
4172                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4173                         else if (eth && !eth->ether_type)
4174                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4175                         if (!ipv6->vtc_flow)
4176                                 ipv6->vtc_flow =
4177                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4178                         if (!ipv6->hop_limits)
4179                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4180                         break;
4181                 case RTE_FLOW_ITEM_TYPE_UDP:
4182                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4183                         if (!ipv4 && !ipv6)
4184                                 return rte_flow_error_set(error, EINVAL,
4185                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4186                                                 (void *)items->type,
4187                                                 "ip header not found");
4188                         if (ipv4 && !ipv4->next_proto_id)
4189                                 ipv4->next_proto_id = IPPROTO_UDP;
4190                         else if (ipv6 && !ipv6->proto)
4191                                 ipv6->proto = IPPROTO_UDP;
4192                         break;
4193                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4194                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4195                         if (!udp)
4196                                 return rte_flow_error_set(error, EINVAL,
4197                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4198                                                 (void *)items->type,
4199                                                 "udp header not found");
4200                         if (!udp->dst_port)
4201                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4202                         if (!vxlan->vx_flags)
4203                                 vxlan->vx_flags =
4204                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4205                         break;
4206                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4207                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4208                         if (!udp)
4209                                 return rte_flow_error_set(error, EINVAL,
4210                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4211                                                 (void *)items->type,
4212                                                 "udp header not found");
4213                         if (!vxlan_gpe->proto)
4214                                 return rte_flow_error_set(error, EINVAL,
4215                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4216                                                 (void *)items->type,
4217                                                 "next protocol not found");
4218                         if (!udp->dst_port)
4219                                 udp->dst_port =
4220                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4221                         if (!vxlan_gpe->vx_flags)
4222                                 vxlan_gpe->vx_flags =
4223                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4224                         break;
4225                 case RTE_FLOW_ITEM_TYPE_GRE:
4226                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4227                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4228                         if (!gre->proto)
4229                                 return rte_flow_error_set(error, EINVAL,
4230                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4231                                                 (void *)items->type,
4232                                                 "next protocol not found");
4233                         if (!ipv4 && !ipv6)
4234                                 return rte_flow_error_set(error, EINVAL,
4235                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4236                                                 (void *)items->type,
4237                                                 "ip header not found");
4238                         if (ipv4 && !ipv4->next_proto_id)
4239                                 ipv4->next_proto_id = IPPROTO_GRE;
4240                         else if (ipv6 && !ipv6->proto)
4241                                 ipv6->proto = IPPROTO_GRE;
4242                         break;
4243                 case RTE_FLOW_ITEM_TYPE_VOID:
4244                         break;
4245                 default:
4246                         return rte_flow_error_set(error, EINVAL,
4247                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4248                                                   (void *)items->type,
4249                                                   "unsupported item type");
4250                         break;
4251                 }
4252                 temp_size += len;
4253         }
4254         *size = temp_size;
4255         return 0;
4256 }
4257
4258 static int
4259 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4260 {
4261         struct rte_ether_hdr *eth = NULL;
4262         struct rte_vlan_hdr *vlan = NULL;
4263         struct rte_ipv6_hdr *ipv6 = NULL;
4264         struct rte_udp_hdr *udp = NULL;
4265         char *next_hdr;
4266         uint16_t proto;
4267
4268         eth = (struct rte_ether_hdr *)data;
4269         next_hdr = (char *)(eth + 1);
4270         proto = RTE_BE16(eth->ether_type);
4271
4272         /* VLAN skipping */
4273         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4274                 vlan = (struct rte_vlan_hdr *)next_hdr;
4275                 proto = RTE_BE16(vlan->eth_proto);
4276                 next_hdr += sizeof(struct rte_vlan_hdr);
4277         }
4278
4279         /* HW calculates IPv4 csum. no need to proceed */
4280         if (proto == RTE_ETHER_TYPE_IPV4)
4281                 return 0;
4282
4283         /* non IPv4/IPv6 header. not supported */
4284         if (proto != RTE_ETHER_TYPE_IPV6) {
4285                 return rte_flow_error_set(error, ENOTSUP,
4286                                           RTE_FLOW_ERROR_TYPE_ACTION,
4287                                           NULL, "Cannot offload non IPv4/IPv6");
4288         }
4289
4290         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4291
4292         /* ignore non UDP */
4293         if (ipv6->proto != IPPROTO_UDP)
4294                 return 0;
4295
4296         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4297         udp->dgram_cksum = 0;
4298
4299         return 0;
4300 }
4301
4302 /**
4303  * Convert L2 encap action to DV specification.
4304  *
4305  * @param[in] dev
4306  *   Pointer to rte_eth_dev structure.
4307  * @param[in] action
4308  *   Pointer to action structure.
4309  * @param[in, out] dev_flow
4310  *   Pointer to the mlx5_flow.
4311  * @param[in] transfer
4312  *   Mark if the flow is E-Switch flow.
4313  * @param[out] error
4314  *   Pointer to the error structure.
4315  *
4316  * @return
4317  *   0 on success, a negative errno value otherwise and rte_errno is set.
4318  */
4319 static int
4320 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4321                                const struct rte_flow_action *action,
4322                                struct mlx5_flow *dev_flow,
4323                                uint8_t transfer,
4324                                struct rte_flow_error *error)
4325 {
4326         const struct rte_flow_item *encap_data;
4327         const struct rte_flow_action_raw_encap *raw_encap_data;
4328         struct mlx5_flow_dv_encap_decap_resource res = {
4329                 .reformat_type =
4330                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4331                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4332                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4333         };
4334
4335         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4336                 raw_encap_data =
4337                         (const struct rte_flow_action_raw_encap *)action->conf;
4338                 res.size = raw_encap_data->size;
4339                 memcpy(res.buf, raw_encap_data->data, res.size);
4340         } else {
4341                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4342                         encap_data =
4343                                 ((const struct rte_flow_action_vxlan_encap *)
4344                                                 action->conf)->definition;
4345                 else
4346                         encap_data =
4347                                 ((const struct rte_flow_action_nvgre_encap *)
4348                                                 action->conf)->definition;
4349                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4350                                                &res.size, error))
4351                         return -rte_errno;
4352         }
4353         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4354                 return -rte_errno;
4355         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4356                 return rte_flow_error_set(error, EINVAL,
4357                                           RTE_FLOW_ERROR_TYPE_ACTION,
4358                                           NULL, "can't create L2 encap action");
4359         return 0;
4360 }
4361
4362 /**
4363  * Convert L2 decap action to DV specification.
4364  *
4365  * @param[in] dev
4366  *   Pointer to rte_eth_dev structure.
4367  * @param[in, out] dev_flow
4368  *   Pointer to the mlx5_flow.
4369  * @param[in] transfer
4370  *   Mark if the flow is E-Switch flow.
4371  * @param[out] error
4372  *   Pointer to the error structure.
4373  *
4374  * @return
4375  *   0 on success, a negative errno value otherwise and rte_errno is set.
4376  */
4377 static int
4378 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4379                                struct mlx5_flow *dev_flow,
4380                                uint8_t transfer,
4381                                struct rte_flow_error *error)
4382 {
4383         struct mlx5_flow_dv_encap_decap_resource res = {
4384                 .size = 0,
4385                 .reformat_type =
4386                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4387                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4388                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4389         };
4390
4391         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4392                 return rte_flow_error_set(error, EINVAL,
4393                                           RTE_FLOW_ERROR_TYPE_ACTION,
4394                                           NULL, "can't create L2 decap action");
4395         return 0;
4396 }
4397
4398 /**
4399  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4400  *
4401  * @param[in] dev
4402  *   Pointer to rte_eth_dev structure.
4403  * @param[in] action
4404  *   Pointer to action structure.
4405  * @param[in, out] dev_flow
4406  *   Pointer to the mlx5_flow.
4407  * @param[in] attr
4408  *   Pointer to the flow attributes.
4409  * @param[out] error
4410  *   Pointer to the error structure.
4411  *
4412  * @return
4413  *   0 on success, a negative errno value otherwise and rte_errno is set.
4414  */
4415 static int
4416 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4417                                 const struct rte_flow_action *action,
4418                                 struct mlx5_flow *dev_flow,
4419                                 const struct rte_flow_attr *attr,
4420                                 struct rte_flow_error *error)
4421 {
4422         const struct rte_flow_action_raw_encap *encap_data;
4423         struct mlx5_flow_dv_encap_decap_resource res;
4424
4425         memset(&res, 0, sizeof(res));
4426         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4427         res.size = encap_data->size;
4428         memcpy(res.buf, encap_data->data, res.size);
4429         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4430                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4431                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4432         if (attr->transfer)
4433                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4434         else
4435                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4436                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4437         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4438                 return rte_flow_error_set(error, EINVAL,
4439                                           RTE_FLOW_ERROR_TYPE_ACTION,
4440                                           NULL, "can't create encap action");
4441         return 0;
4442 }
4443
4444 /**
4445  * Create action push VLAN.
4446  *
4447  * @param[in] dev
4448  *   Pointer to rte_eth_dev structure.
4449  * @param[in] attr
4450  *   Pointer to the flow attributes.
4451  * @param[in] vlan
4452  *   Pointer to the vlan to push to the Ethernet header.
4453  * @param[in, out] dev_flow
4454  *   Pointer to the mlx5_flow.
4455  * @param[out] error
4456  *   Pointer to the error structure.
4457  *
4458  * @return
4459  *   0 on success, a negative errno value otherwise and rte_errno is set.
4460  */
4461 static int
4462 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4463                                 const struct rte_flow_attr *attr,
4464                                 const struct rte_vlan_hdr *vlan,
4465                                 struct mlx5_flow *dev_flow,
4466                                 struct rte_flow_error *error)
4467 {
4468         struct mlx5_flow_dv_push_vlan_action_resource res;
4469
4470         memset(&res, 0, sizeof(res));
4471         res.vlan_tag =
4472                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4473                                  vlan->vlan_tci);
4474         if (attr->transfer)
4475                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4476         else
4477                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4478                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4479         return flow_dv_push_vlan_action_resource_register
4480                                             (dev, &res, dev_flow, error);
4481 }
4482
4483 /**
4484  * Validate the modify-header actions.
4485  *
4486  * @param[in] action_flags
4487  *   Holds the actions detected until now.
4488  * @param[in] action
4489  *   Pointer to the modify action.
4490  * @param[out] error
4491  *   Pointer to error structure.
4492  *
4493  * @return
4494  *   0 on success, a negative errno value otherwise and rte_errno is set.
4495  */
4496 static int
4497 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4498                                    const struct rte_flow_action *action,
4499                                    struct rte_flow_error *error)
4500 {
4501         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4502                 return rte_flow_error_set(error, EINVAL,
4503                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4504                                           NULL, "action configuration not set");
4505         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4506                 return rte_flow_error_set(error, EINVAL,
4507                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4508                                           "can't have encap action before"
4509                                           " modify action");
4510         return 0;
4511 }
4512
4513 /**
4514  * Validate the modify-header MAC address actions.
4515  *
4516  * @param[in] action_flags
4517  *   Holds the actions detected until now.
4518  * @param[in] action
4519  *   Pointer to the modify action.
4520  * @param[in] item_flags
4521  *   Holds the items detected.
4522  * @param[out] error
4523  *   Pointer to error structure.
4524  *
4525  * @return
4526  *   0 on success, a negative errno value otherwise and rte_errno is set.
4527  */
4528 static int
4529 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4530                                    const struct rte_flow_action *action,
4531                                    const uint64_t item_flags,
4532                                    struct rte_flow_error *error)
4533 {
4534         int ret = 0;
4535
4536         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4537         if (!ret) {
4538                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4539                         return rte_flow_error_set(error, EINVAL,
4540                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4541                                                   NULL,
4542                                                   "no L2 item in pattern");
4543         }
4544         return ret;
4545 }
4546
4547 /**
4548  * Validate the modify-header IPv4 address actions.
4549  *
4550  * @param[in] action_flags
4551  *   Holds the actions detected until now.
4552  * @param[in] action
4553  *   Pointer to the modify action.
4554  * @param[in] item_flags
4555  *   Holds the items detected.
4556  * @param[out] error
4557  *   Pointer to error structure.
4558  *
4559  * @return
4560  *   0 on success, a negative errno value otherwise and rte_errno is set.
4561  */
4562 static int
4563 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4564                                     const struct rte_flow_action *action,
4565                                     const uint64_t item_flags,
4566                                     struct rte_flow_error *error)
4567 {
4568         int ret = 0;
4569         uint64_t layer;
4570
4571         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4572         if (!ret) {
4573                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4574                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4575                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4576                 if (!(item_flags & layer))
4577                         return rte_flow_error_set(error, EINVAL,
4578                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4579                                                   NULL,
4580                                                   "no ipv4 item in pattern");
4581         }
4582         return ret;
4583 }
4584
4585 /**
4586  * Validate the modify-header IPv6 address actions.
4587  *
4588  * @param[in] action_flags
4589  *   Holds the actions detected until now.
4590  * @param[in] action
4591  *   Pointer to the modify action.
4592  * @param[in] item_flags
4593  *   Holds the items detected.
4594  * @param[out] error
4595  *   Pointer to error structure.
4596  *
4597  * @return
4598  *   0 on success, a negative errno value otherwise and rte_errno is set.
4599  */
4600 static int
4601 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4602                                     const struct rte_flow_action *action,
4603                                     const uint64_t item_flags,
4604                                     struct rte_flow_error *error)
4605 {
4606         int ret = 0;
4607         uint64_t layer;
4608
4609         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4610         if (!ret) {
4611                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4612                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4613                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4614                 if (!(item_flags & layer))
4615                         return rte_flow_error_set(error, EINVAL,
4616                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4617                                                   NULL,
4618                                                   "no ipv6 item in pattern");
4619         }
4620         return ret;
4621 }
4622
4623 /**
4624  * Validate the modify-header TP actions.
4625  *
4626  * @param[in] action_flags
4627  *   Holds the actions detected until now.
4628  * @param[in] action
4629  *   Pointer to the modify action.
4630  * @param[in] item_flags
4631  *   Holds the items detected.
4632  * @param[out] error
4633  *   Pointer to error structure.
4634  *
4635  * @return
4636  *   0 on success, a negative errno value otherwise and rte_errno is set.
4637  */
4638 static int
4639 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4640                                   const struct rte_flow_action *action,
4641                                   const uint64_t item_flags,
4642                                   struct rte_flow_error *error)
4643 {
4644         int ret = 0;
4645         uint64_t layer;
4646
4647         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4648         if (!ret) {
4649                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4650                                  MLX5_FLOW_LAYER_INNER_L4 :
4651                                  MLX5_FLOW_LAYER_OUTER_L4;
4652                 if (!(item_flags & layer))
4653                         return rte_flow_error_set(error, EINVAL,
4654                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4655                                                   NULL, "no transport layer "
4656                                                   "in pattern");
4657         }
4658         return ret;
4659 }
4660
4661 /**
4662  * Validate the modify-header actions of increment/decrement
4663  * TCP Sequence-number.
4664  *
4665  * @param[in] action_flags
4666  *   Holds the actions detected until now.
4667  * @param[in] action
4668  *   Pointer to the modify action.
4669  * @param[in] item_flags
4670  *   Holds the items detected.
4671  * @param[out] error
4672  *   Pointer to error structure.
4673  *
4674  * @return
4675  *   0 on success, a negative errno value otherwise and rte_errno is set.
4676  */
4677 static int
4678 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4679                                        const struct rte_flow_action *action,
4680                                        const uint64_t item_flags,
4681                                        struct rte_flow_error *error)
4682 {
4683         int ret = 0;
4684         uint64_t layer;
4685
4686         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4687         if (!ret) {
4688                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4689                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4690                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4691                 if (!(item_flags & layer))
4692                         return rte_flow_error_set(error, EINVAL,
4693                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4694                                                   NULL, "no TCP item in"
4695                                                   " pattern");
4696                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4697                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4698                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4699                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4700                         return rte_flow_error_set(error, EINVAL,
4701                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4702                                                   NULL,
4703                                                   "cannot decrease and increase"
4704                                                   " TCP sequence number"
4705                                                   " at the same time");
4706         }
4707         return ret;
4708 }
4709
4710 /**
4711  * Validate the modify-header actions of increment/decrement
4712  * TCP Acknowledgment number.
4713  *
4714  * @param[in] action_flags
4715  *   Holds the actions detected until now.
4716  * @param[in] action
4717  *   Pointer to the modify action.
4718  * @param[in] item_flags
4719  *   Holds the items detected.
4720  * @param[out] error
4721  *   Pointer to error structure.
4722  *
4723  * @return
4724  *   0 on success, a negative errno value otherwise and rte_errno is set.
4725  */
4726 static int
4727 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4728                                        const struct rte_flow_action *action,
4729                                        const uint64_t item_flags,
4730                                        struct rte_flow_error *error)
4731 {
4732         int ret = 0;
4733         uint64_t layer;
4734
4735         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4736         if (!ret) {
4737                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4738                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4739                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4740                 if (!(item_flags & layer))
4741                         return rte_flow_error_set(error, EINVAL,
4742                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4743                                                   NULL, "no TCP item in"
4744                                                   " pattern");
4745                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4746                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4747                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4748                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4749                         return rte_flow_error_set(error, EINVAL,
4750                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4751                                                   NULL,
4752                                                   "cannot decrease and increase"
4753                                                   " TCP acknowledgment number"
4754                                                   " at the same time");
4755         }
4756         return ret;
4757 }
4758
4759 /**
4760  * Validate the modify-header TTL actions.
4761  *
4762  * @param[in] action_flags
4763  *   Holds the actions detected until now.
4764  * @param[in] action
4765  *   Pointer to the modify action.
4766  * @param[in] item_flags
4767  *   Holds the items detected.
4768  * @param[out] error
4769  *   Pointer to error structure.
4770  *
4771  * @return
4772  *   0 on success, a negative errno value otherwise and rte_errno is set.
4773  */
4774 static int
4775 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4776                                    const struct rte_flow_action *action,
4777                                    const uint64_t item_flags,
4778                                    struct rte_flow_error *error)
4779 {
4780         int ret = 0;
4781         uint64_t layer;
4782
4783         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4784         if (!ret) {
4785                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4786                                  MLX5_FLOW_LAYER_INNER_L3 :
4787                                  MLX5_FLOW_LAYER_OUTER_L3;
4788                 if (!(item_flags & layer))
4789                         return rte_flow_error_set(error, EINVAL,
4790                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4791                                                   NULL,
4792                                                   "no IP protocol in pattern");
4793         }
4794         return ret;
4795 }
4796
4797 /**
4798  * Validate the generic modify field actions.
4799  * @param[in] dev
4800  *   Pointer to the rte_eth_dev structure.
4801  * @param[in] action_flags
4802  *   Holds the actions detected until now.
4803  * @param[in] action
4804  *   Pointer to the modify action.
4805  * @param[in] attr
4806  *   Pointer to the flow attributes.
4807  * @param[out] error
4808  *   Pointer to error structure.
4809  *
4810  * @return
4811  *   Number of header fields to modify (0 or more) on success,
4812  *   a negative errno value otherwise and rte_errno is set.
4813  */
4814 static int
4815 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4816                                    const uint64_t action_flags,
4817                                    const struct rte_flow_action *action,
4818                                    const struct rte_flow_attr *attr,
4819                                    struct rte_flow_error *error)
4820 {
4821         int ret = 0;
4822         struct mlx5_priv *priv = dev->data->dev_private;
4823         struct mlx5_sh_config *config = &priv->sh->config;
4824         const struct rte_flow_action_modify_field *action_modify_field =
4825                 action->conf;
4826         uint32_t dst_width = mlx5_flow_item_field_width(dev,
4827                                 action_modify_field->dst.field,
4828                                 -1, attr, error);
4829         uint32_t src_width = mlx5_flow_item_field_width(dev,
4830                                 action_modify_field->src.field,
4831                                 dst_width, attr, error);
4832
4833         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4834         if (ret)
4835                 return ret;
4836
4837         if (action_modify_field->width == 0)
4838                 return rte_flow_error_set(error, EINVAL,
4839                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4840                                 "no bits are requested to be modified");
4841         else if (action_modify_field->width > dst_width ||
4842                  action_modify_field->width > src_width)
4843                 return rte_flow_error_set(error, EINVAL,
4844                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4845                                 "cannot modify more bits than"
4846                                 " the width of a field");
4847         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4848             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4849                 if ((action_modify_field->dst.offset +
4850                      action_modify_field->width > dst_width) ||
4851                     (action_modify_field->dst.offset % 32))
4852                         return rte_flow_error_set(error, EINVAL,
4853                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4854                                         "destination offset is too big"
4855                                         " or not aligned to 4 bytes");
4856                 if (action_modify_field->dst.level &&
4857                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4858                         return rte_flow_error_set(error, ENOTSUP,
4859                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4860                                         "inner header fields modification"
4861                                         " is not supported");
4862         }
4863         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4864             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4865                 if (!attr->transfer && !attr->group)
4866                         return rte_flow_error_set(error, ENOTSUP,
4867                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4868                                         "modify field action is not"
4869                                         " supported for group 0");
4870                 if ((action_modify_field->src.offset +
4871                      action_modify_field->width > src_width) ||
4872                     (action_modify_field->src.offset % 32))
4873                         return rte_flow_error_set(error, EINVAL,
4874                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4875                                         "source offset is too big"
4876                                         " or not aligned to 4 bytes");
4877                 if (action_modify_field->src.level &&
4878                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4879                         return rte_flow_error_set(error, ENOTSUP,
4880                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4881                                         "inner header fields modification"
4882                                         " is not supported");
4883         }
4884         if ((action_modify_field->dst.field ==
4885              action_modify_field->src.field) &&
4886             (action_modify_field->dst.level ==
4887              action_modify_field->src.level))
4888                 return rte_flow_error_set(error, EINVAL,
4889                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4890                                 "source and destination fields"
4891                                 " cannot be the same");
4892         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4893             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4894             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4895                 return rte_flow_error_set(error, EINVAL,
4896                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4897                                 "mark, immediate value or a pointer to it"
4898                                 " cannot be used as a destination");
4899         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4900             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4901                 return rte_flow_error_set(error, ENOTSUP,
4902                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4903                                 "modifications of an arbitrary"
4904                                 " place in a packet is not supported");
4905         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4906             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4907                 return rte_flow_error_set(error, ENOTSUP,
4908                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4909                                 "modifications of the 802.1Q Tag"
4910                                 " Identifier is not supported");
4911         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4912             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4913                 return rte_flow_error_set(error, ENOTSUP,
4914                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4915                                 "modifications of the VXLAN Network"
4916                                 " Identifier is not supported");
4917         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4918             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4919                 return rte_flow_error_set(error, ENOTSUP,
4920                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4921                                 "modifications of the GENEVE Network"
4922                                 " Identifier is not supported");
4923         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4924             action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4925                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4926                     !mlx5_flow_ext_mreg_supported(dev))
4927                         return rte_flow_error_set(error, ENOTSUP,
4928                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4929                                         "cannot modify mark in legacy mode"
4930                                         " or without extensive registers");
4931         if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4932             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4933                 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4934                     !mlx5_flow_ext_mreg_supported(dev))
4935                         return rte_flow_error_set(error, ENOTSUP,
4936                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4937                                         "cannot modify meta without"
4938                                         " extensive registers support");
4939                 ret = flow_dv_get_metadata_reg(dev, attr, error);
4940                 if (ret < 0 || ret == REG_NON)
4941                         return rte_flow_error_set(error, ENOTSUP,
4942                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4943                                         "cannot modify meta without"
4944                                         " extensive registers available");
4945         }
4946         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4947                 return rte_flow_error_set(error, ENOTSUP,
4948                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4949                                 "add and sub operations"
4950                                 " are not supported");
4951         return (action_modify_field->width / 32) +
4952                !!(action_modify_field->width % 32);
4953 }
4954
4955 /**
4956  * Validate jump action.
4957  *
4958  * @param[in] action
4959  *   Pointer to the jump action.
4960  * @param[in] action_flags
4961  *   Holds the actions detected until now.
4962  * @param[in] attributes
4963  *   Pointer to flow attributes
4964  * @param[in] external
4965  *   Action belongs to flow rule created by request external to PMD.
4966  * @param[out] error
4967  *   Pointer to error structure.
4968  *
4969  * @return
4970  *   0 on success, a negative errno value otherwise and rte_errno is set.
4971  */
4972 static int
4973 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4974                              const struct mlx5_flow_tunnel *tunnel,
4975                              const struct rte_flow_action *action,
4976                              uint64_t action_flags,
4977                              const struct rte_flow_attr *attributes,
4978                              bool external, struct rte_flow_error *error)
4979 {
4980         uint32_t target_group, table = 0;
4981         int ret = 0;
4982         struct flow_grp_info grp_info = {
4983                 .external = !!external,
4984                 .transfer = !!attributes->transfer,
4985                 .fdb_def_rule = 1,
4986                 .std_tbl_fix = 0
4987         };
4988         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4989                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4990                 return rte_flow_error_set(error, EINVAL,
4991                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4992                                           "can't have 2 fate actions in"
4993                                           " same flow");
4994         if (!action->conf)
4995                 return rte_flow_error_set(error, EINVAL,
4996                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4997                                           NULL, "action configuration not set");
4998         target_group =
4999                 ((const struct rte_flow_action_jump *)action->conf)->group;
5000         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5001                                        &grp_info, error);
5002         if (ret)
5003                 return ret;
5004         if (attributes->group == target_group &&
5005             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5006                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5007                 return rte_flow_error_set(error, EINVAL,
5008                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5009                                           "target group must be other than"
5010                                           " the current flow group");
5011         if (table == 0)
5012                 return rte_flow_error_set(error, EINVAL,
5013                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5014                                           NULL, "root table shouldn't be destination");
5015         return 0;
5016 }
5017
5018 /*
5019  * Validate action PORT_ID / REPRESENTED_PORT.
5020  *
5021  * @param[in] dev
5022  *   Pointer to rte_eth_dev structure.
5023  * @param[in] action_flags
5024  *   Bit-fields that holds the actions detected until now.
5025  * @param[in] action
5026  *   PORT_ID / REPRESENTED_PORT action structure.
5027  * @param[in] attr
5028  *   Attributes of flow that includes this action.
5029  * @param[out] error
5030  *   Pointer to error structure.
5031  *
5032  * @return
5033  *   0 on success, a negative errno value otherwise and rte_errno is set.
5034  */
5035 static int
5036 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5037                                 uint64_t action_flags,
5038                                 const struct rte_flow_action *action,
5039                                 const struct rte_flow_attr *attr,
5040                                 struct rte_flow_error *error)
5041 {
5042         const struct rte_flow_action_port_id *port_id;
5043         const struct rte_flow_action_ethdev *ethdev;
5044         struct mlx5_priv *act_priv;
5045         struct mlx5_priv *dev_priv;
5046         uint16_t port;
5047
5048         if (!attr->transfer)
5049                 return rte_flow_error_set(error, ENOTSUP,
5050                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5051                                           NULL,
5052                                           "port action is valid in transfer"
5053                                           " mode only");
5054         if (!action || !action->conf)
5055                 return rte_flow_error_set(error, ENOTSUP,
5056                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5057                                           NULL,
5058                                           "port action parameters must be"
5059                                           " specified");
5060         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5061                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5062                 return rte_flow_error_set(error, EINVAL,
5063                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5064                                           "can have only one fate actions in"
5065                                           " a flow");
5066         dev_priv = mlx5_dev_to_eswitch_info(dev);
5067         if (!dev_priv)
5068                 return rte_flow_error_set(error, rte_errno,
5069                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5070                                           NULL,
5071                                           "failed to obtain E-Switch info");
5072         switch (action->type) {
5073         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5074                 port_id = action->conf;
5075                 port = port_id->original ? dev->data->port_id : port_id->id;
5076                 break;
5077         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5078                 ethdev = action->conf;
5079                 port = ethdev->port_id;
5080                 break;
5081         default:
5082                 MLX5_ASSERT(false);
5083                 return rte_flow_error_set
5084                                 (error, EINVAL,
5085                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5086                                  "unknown E-Switch action");
5087         }
5088         act_priv = mlx5_port_to_eswitch_info(port, false);
5089         if (!act_priv)
5090                 return rte_flow_error_set
5091                                 (error, rte_errno,
5092                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5093                                  "failed to obtain E-Switch port id for port");
5094         if (act_priv->domain_id != dev_priv->domain_id)
5095                 return rte_flow_error_set
5096                                 (error, EINVAL,
5097                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5098                                  "port does not belong to"
5099                                  " E-Switch being configured");
5100         return 0;
5101 }
5102
5103 /**
5104  * Get the maximum number of modify header actions.
5105  *
5106  * @param dev
5107  *   Pointer to rte_eth_dev structure.
5108  * @param root
5109  *   Whether action is on root table.
5110  *
5111  * @return
5112  *   Max number of modify header actions device can support.
5113  */
5114 static inline unsigned int
5115 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5116                               bool root)
5117 {
5118         /*
5119          * There's no way to directly query the max capacity from FW.
5120          * The maximal value on root table should be assumed to be supported.
5121          */
5122         if (!root)
5123                 return MLX5_MAX_MODIFY_NUM;
5124         else
5125                 return MLX5_ROOT_TBL_MODIFY_NUM;
5126 }
5127
5128 /**
5129  * Validate the meter action.
5130  *
5131  * @param[in] dev
5132  *   Pointer to rte_eth_dev structure.
5133  * @param[in] action_flags
5134  *   Bit-fields that holds the actions detected until now.
5135  * @param[in] item_flags
5136  *   Holds the items detected.
5137  * @param[in] action
5138  *   Pointer to the meter action.
5139  * @param[in] attr
5140  *   Attributes of flow that includes this action.
5141  * @param[in] port_id_item
5142  *   Pointer to item indicating port id.
5143  * @param[out] error
5144  *   Pointer to error structure.
5145  *
5146  * @return
5147  *   0 on success, a negative errno value otherwise and rte_errno is set.
5148  */
5149 static int
5150 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5151                                 uint64_t action_flags, uint64_t item_flags,
5152                                 const struct rte_flow_action *action,
5153                                 const struct rte_flow_attr *attr,
5154                                 const struct rte_flow_item *port_id_item,
5155                                 bool *def_policy,
5156                                 struct rte_flow_error *error)
5157 {
5158         struct mlx5_priv *priv = dev->data->dev_private;
5159         const struct rte_flow_action_meter *am = action->conf;
5160         struct mlx5_flow_meter_info *fm;
5161         struct mlx5_flow_meter_policy *mtr_policy;
5162         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5163
5164         if (!am)
5165                 return rte_flow_error_set(error, EINVAL,
5166                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5167                                           "meter action conf is NULL");
5168
5169         if (action_flags & MLX5_FLOW_ACTION_METER)
5170                 return rte_flow_error_set(error, ENOTSUP,
5171                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5172                                           "meter chaining not support");
5173         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5174                 return rte_flow_error_set(error, ENOTSUP,
5175                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5176                                           "meter with jump not support");
5177         if (!priv->mtr_en)
5178                 return rte_flow_error_set(error, ENOTSUP,
5179                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5180                                           NULL,
5181                                           "meter action not supported");
5182         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5183         if (!fm)
5184                 return rte_flow_error_set(error, EINVAL,
5185                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5186                                           "Meter not found");
5187         /* aso meter can always be shared by different domains */
5188         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5189             !(fm->transfer == attr->transfer ||
5190               (!fm->ingress && !attr->ingress && attr->egress) ||
5191               (!fm->egress && !attr->egress && attr->ingress)))
5192                 return rte_flow_error_set(error, EINVAL,
5193                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5194                         "Flow attributes domain are either invalid "
5195                         "or have a domain conflict with current "
5196                         "meter attributes");
5197         if (fm->def_policy) {
5198                 if (!((attr->transfer &&
5199                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5200                         (attr->egress &&
5201                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5202                         (attr->ingress &&
5203                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5204                         return rte_flow_error_set(error, EINVAL,
5205                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5206                                           "Flow attributes domain "
5207                                           "have a conflict with current "
5208                                           "meter domain attributes");
5209                 *def_policy = true;
5210         } else {
5211                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5212                                                 fm->policy_id, NULL);
5213                 if (!mtr_policy)
5214                         return rte_flow_error_set(error, EINVAL,
5215                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5216                                           "Invalid policy id for meter ");
5217                 if (!((attr->transfer && mtr_policy->transfer) ||
5218                         (attr->egress && mtr_policy->egress) ||
5219                         (attr->ingress && mtr_policy->ingress)))
5220                         return rte_flow_error_set(error, EINVAL,
5221                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5222                                           "Flow attributes domain "
5223                                           "have a conflict with current "
5224                                           "meter domain attributes");
5225                 if (attr->transfer && mtr_policy->dev) {
5226                         /**
5227                          * When policy has fate action of port_id,
5228                          * the flow should have the same src port as policy.
5229                          */
5230                         struct mlx5_priv *policy_port_priv =
5231                                         mtr_policy->dev->data->dev_private;
5232                         int32_t flow_src_port = priv->representor_id;
5233
5234                         if (port_id_item) {
5235                                 const struct rte_flow_item_port_id *spec =
5236                                                         port_id_item->spec;
5237                                 struct mlx5_priv *port_priv =
5238                                         mlx5_port_to_eswitch_info(spec->id,
5239                                                                   false);
5240                                 if (!port_priv)
5241                                         return rte_flow_error_set(error,
5242                                                 rte_errno,
5243                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5244                                                 spec,
5245                                                 "Failed to get port info.");
5246                                 flow_src_port = port_priv->representor_id;
5247                         }
5248                         if (flow_src_port != policy_port_priv->representor_id)
5249                                 return rte_flow_error_set(error,
5250                                                 rte_errno,
5251                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5252                                                 NULL,
5253                                                 "Flow and meter policy "
5254                                                 "have different src port.");
5255                 } else if (mtr_policy->is_rss) {
5256                         struct mlx5_flow_meter_policy *fp;
5257                         struct mlx5_meter_policy_action_container *acg;
5258                         struct mlx5_meter_policy_action_container *acy;
5259                         const struct rte_flow_action *rss_act;
5260                         int ret;
5261
5262                         fp = mlx5_flow_meter_hierarchy_get_final_policy(dev,
5263                                                                 mtr_policy);
5264                         if (fp == NULL)
5265                                 return rte_flow_error_set(error, EINVAL,
5266                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5267                                                   "Unable to get the final "
5268                                                   "policy in the hierarchy");
5269                         acg = &fp->act_cnt[RTE_COLOR_GREEN];
5270                         acy = &fp->act_cnt[RTE_COLOR_YELLOW];
5271                         MLX5_ASSERT(acg->fate_action ==
5272                                     MLX5_FLOW_FATE_SHARED_RSS ||
5273                                     acy->fate_action ==
5274                                     MLX5_FLOW_FATE_SHARED_RSS);
5275                         if (acg->fate_action == MLX5_FLOW_FATE_SHARED_RSS)
5276                                 rss_act = acg->rss;
5277                         else
5278                                 rss_act = acy->rss;
5279                         ret = mlx5_flow_validate_action_rss(rss_act,
5280                                         action_flags, dev, attr,
5281                                         item_flags, error);
5282                         if (ret)
5283                                 return ret;
5284                 }
5285                 *def_policy = false;
5286         }
5287         return 0;
5288 }
5289
5290 /**
5291  * Validate the age action.
5292  *
5293  * @param[in] action_flags
5294  *   Holds the actions detected until now.
5295  * @param[in] action
5296  *   Pointer to the age action.
5297  * @param[in] dev
5298  *   Pointer to the Ethernet device structure.
5299  * @param[out] error
5300  *   Pointer to error structure.
5301  *
5302  * @return
5303  *   0 on success, a negative errno value otherwise and rte_errno is set.
5304  */
5305 static int
5306 flow_dv_validate_action_age(uint64_t action_flags,
5307                             const struct rte_flow_action *action,
5308                             struct rte_eth_dev *dev,
5309                             struct rte_flow_error *error)
5310 {
5311         struct mlx5_priv *priv = dev->data->dev_private;
5312         const struct rte_flow_action_age *age = action->conf;
5313
5314         if (!priv->sh->cdev->config.devx ||
5315             (priv->sh->cmng.counter_fallback && !priv->sh->aso_age_mng))
5316                 return rte_flow_error_set(error, ENOTSUP,
5317                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5318                                           NULL,
5319                                           "age action not supported");
5320         if (!(action->conf))
5321                 return rte_flow_error_set(error, EINVAL,
5322                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5323                                           "configuration cannot be null");
5324         if (!(age->timeout))
5325                 return rte_flow_error_set(error, EINVAL,
5326                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5327                                           "invalid timeout value 0");
5328         if (action_flags & MLX5_FLOW_ACTION_AGE)
5329                 return rte_flow_error_set(error, EINVAL,
5330                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5331                                           "duplicate age actions set");
5332         return 0;
5333 }
5334
5335 /**
5336  * Validate the modify-header IPv4 DSCP actions.
5337  *
5338  * @param[in] action_flags
5339  *   Holds the actions detected until now.
5340  * @param[in] action
5341  *   Pointer to the modify action.
5342  * @param[in] item_flags
5343  *   Holds the items detected.
5344  * @param[out] error
5345  *   Pointer to error structure.
5346  *
5347  * @return
5348  *   0 on success, a negative errno value otherwise and rte_errno is set.
5349  */
5350 static int
5351 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5352                                          const struct rte_flow_action *action,
5353                                          const uint64_t item_flags,
5354                                          struct rte_flow_error *error)
5355 {
5356         int ret = 0;
5357
5358         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5359         if (!ret) {
5360                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5361                         return rte_flow_error_set(error, EINVAL,
5362                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5363                                                   NULL,
5364                                                   "no ipv4 item in pattern");
5365         }
5366         return ret;
5367 }
5368
5369 /**
5370  * Validate the modify-header IPv6 DSCP actions.
5371  *
5372  * @param[in] action_flags
5373  *   Holds the actions detected until now.
5374  * @param[in] action
5375  *   Pointer to the modify action.
5376  * @param[in] item_flags
5377  *   Holds the items detected.
5378  * @param[out] error
5379  *   Pointer to error structure.
5380  *
5381  * @return
5382  *   0 on success, a negative errno value otherwise and rte_errno is set.
5383  */
5384 static int
5385 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5386                                          const struct rte_flow_action *action,
5387                                          const uint64_t item_flags,
5388                                          struct rte_flow_error *error)
5389 {
5390         int ret = 0;
5391
5392         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5393         if (!ret) {
5394                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5395                         return rte_flow_error_set(error, EINVAL,
5396                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5397                                                   NULL,
5398                                                   "no ipv6 item in pattern");
5399         }
5400         return ret;
5401 }
5402
5403 int
5404 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5405                         struct mlx5_list_entry *entry, void *cb_ctx)
5406 {
5407         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5408         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5409         struct mlx5_flow_dv_modify_hdr_resource *resource =
5410                                   container_of(entry, typeof(*resource), entry);
5411         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5412
5413         key_len += ref->actions_num * sizeof(ref->actions[0]);
5414         return ref->actions_num != resource->actions_num ||
5415                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5416 }
5417
5418 static struct mlx5_indexed_pool *
5419 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5420 {
5421         struct mlx5_indexed_pool *ipool = __atomic_load_n
5422                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5423
5424         if (!ipool) {
5425                 struct mlx5_indexed_pool *expected = NULL;
5426                 struct mlx5_indexed_pool_config cfg =
5427                     (struct mlx5_indexed_pool_config) {
5428                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5429                                                                    (index + 1) *
5430                                            sizeof(struct mlx5_modification_cmd),
5431                        .trunk_size = 64,
5432                        .grow_trunk = 3,
5433                        .grow_shift = 2,
5434                        .need_lock = 1,
5435                        .release_mem_en = !!sh->config.reclaim_mode,
5436                        .per_core_cache =
5437                                        sh->config.reclaim_mode ? 0 : (1 << 16),
5438                        .malloc = mlx5_malloc,
5439                        .free = mlx5_free,
5440                        .type = "mlx5_modify_action_resource",
5441                 };
5442
5443                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5444                 ipool = mlx5_ipool_create(&cfg);
5445                 if (!ipool)
5446                         return NULL;
5447                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5448                                                  &expected, ipool, false,
5449                                                  __ATOMIC_SEQ_CST,
5450                                                  __ATOMIC_SEQ_CST)) {
5451                         mlx5_ipool_destroy(ipool);
5452                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5453                                                 __ATOMIC_SEQ_CST);
5454                 }
5455         }
5456         return ipool;
5457 }
5458
5459 struct mlx5_list_entry *
5460 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5461 {
5462         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5463         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5464         struct mlx5dv_dr_domain *ns;
5465         struct mlx5_flow_dv_modify_hdr_resource *entry;
5466         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5467         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5468                                                           ref->actions_num - 1);
5469         int ret;
5470         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5471         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5472         uint32_t idx;
5473
5474         if (unlikely(!ipool)) {
5475                 rte_flow_error_set(ctx->error, ENOMEM,
5476                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5477                                    NULL, "cannot allocate modify ipool");
5478                 return NULL;
5479         }
5480         entry = mlx5_ipool_zmalloc(ipool, &idx);
5481         if (!entry) {
5482                 rte_flow_error_set(ctx->error, ENOMEM,
5483                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5484                                    "cannot allocate resource memory");
5485                 return NULL;
5486         }
5487         rte_memcpy(&entry->ft_type,
5488                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5489                    key_len + data_len);
5490         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5491                 ns = sh->fdb_domain;
5492         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5493                 ns = sh->tx_domain;
5494         else
5495                 ns = sh->rx_domain;
5496         ret = mlx5_flow_os_create_flow_action_modify_header
5497                                         (sh->cdev->ctx, ns, entry,
5498                                          data_len, &entry->action);
5499         if (ret) {
5500                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5501                 rte_flow_error_set(ctx->error, ENOMEM,
5502                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5503                                    NULL, "cannot create modification action");
5504                 return NULL;
5505         }
5506         entry->idx = idx;
5507         return &entry->entry;
5508 }
5509
5510 struct mlx5_list_entry *
5511 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5512                         void *cb_ctx)
5513 {
5514         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5515         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5516         struct mlx5_flow_dv_modify_hdr_resource *entry;
5517         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5518         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5519         uint32_t idx;
5520
5521         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5522                                   &idx);
5523         if (!entry) {
5524                 rte_flow_error_set(ctx->error, ENOMEM,
5525                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5526                                    "cannot allocate resource memory");
5527                 return NULL;
5528         }
5529         memcpy(entry, oentry, sizeof(*entry) + data_len);
5530         entry->idx = idx;
5531         return &entry->entry;
5532 }
5533
5534 void
5535 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5536 {
5537         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5538         struct mlx5_flow_dv_modify_hdr_resource *res =
5539                 container_of(entry, typeof(*res), entry);
5540
5541         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5542 }
5543
5544 /**
5545  * Validate the sample action.
5546  *
5547  * @param[in, out] action_flags
5548  *   Holds the actions detected until now.
5549  * @param[in] action
5550  *   Pointer to the sample action.
5551  * @param[in] dev
5552  *   Pointer to the Ethernet device structure.
5553  * @param[in] attr
5554  *   Attributes of flow that includes this action.
5555  * @param[in] item_flags
5556  *   Holds the items detected.
5557  * @param[in] rss
5558  *   Pointer to the RSS action.
5559  * @param[out] sample_rss
5560  *   Pointer to the RSS action in sample action list.
5561  * @param[out] count
5562  *   Pointer to the COUNT action in sample action list.
5563  * @param[out] fdb_mirror_limit
5564  *   Pointer to the FDB mirror limitation flag.
5565  * @param[out] error
5566  *   Pointer to error structure.
5567  *
5568  * @return
5569  *   0 on success, a negative errno value otherwise and rte_errno is set.
5570  */
5571 static int
5572 flow_dv_validate_action_sample(uint64_t *action_flags,
5573                                const struct rte_flow_action *action,
5574                                struct rte_eth_dev *dev,
5575                                const struct rte_flow_attr *attr,
5576                                uint64_t item_flags,
5577                                const struct rte_flow_action_rss *rss,
5578                                const struct rte_flow_action_rss **sample_rss,
5579                                const struct rte_flow_action_count **count,
5580                                int *fdb_mirror_limit,
5581                                struct rte_flow_error *error)
5582 {
5583         struct mlx5_priv *priv = dev->data->dev_private;
5584         struct mlx5_sh_config *dev_conf = &priv->sh->config;
5585         const struct rte_flow_action_sample *sample = action->conf;
5586         const struct rte_flow_action *act;
5587         uint64_t sub_action_flags = 0;
5588         uint16_t queue_index = 0xFFFF;
5589         int actions_n = 0;
5590         int ret;
5591
5592         if (!sample)
5593                 return rte_flow_error_set(error, EINVAL,
5594                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5595                                           "configuration cannot be NULL");
5596         if (sample->ratio == 0)
5597                 return rte_flow_error_set(error, EINVAL,
5598                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5599                                           "ratio value starts from 1");
5600         if (!priv->sh->cdev->config.devx ||
5601             (sample->ratio > 0 && !priv->sampler_en))
5602                 return rte_flow_error_set(error, ENOTSUP,
5603                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5604                                           NULL,
5605                                           "sample action not supported");
5606         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5607                 return rte_flow_error_set(error, EINVAL,
5608                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5609                                           "Multiple sample actions not "
5610                                           "supported");
5611         if (*action_flags & MLX5_FLOW_ACTION_METER)
5612                 return rte_flow_error_set(error, EINVAL,
5613                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5614                                           "wrong action order, meter should "
5615                                           "be after sample action");
5616         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5617                 return rte_flow_error_set(error, EINVAL,
5618                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5619                                           "wrong action order, jump should "
5620                                           "be after sample action");
5621         if (*action_flags & MLX5_FLOW_ACTION_CT)
5622                 return rte_flow_error_set(error, EINVAL,
5623                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5624                                           "Sample after CT not supported");
5625         act = sample->actions;
5626         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5627                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5628                         return rte_flow_error_set(error, ENOTSUP,
5629                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5630                                                   act, "too many actions");
5631                 switch (act->type) {
5632                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5633                         ret = mlx5_flow_validate_action_queue(act,
5634                                                               sub_action_flags,
5635                                                               dev,
5636                                                               attr, error);
5637                         if (ret < 0)
5638                                 return ret;
5639                         queue_index = ((const struct rte_flow_action_queue *)
5640                                                         (act->conf))->index;
5641                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5642                         ++actions_n;
5643                         break;
5644                 case RTE_FLOW_ACTION_TYPE_RSS:
5645                         *sample_rss = act->conf;
5646                         ret = mlx5_flow_validate_action_rss(act,
5647                                                             sub_action_flags,
5648                                                             dev, attr,
5649                                                             item_flags,
5650                                                             error);
5651                         if (ret < 0)
5652                                 return ret;
5653                         if (rss && *sample_rss &&
5654                             ((*sample_rss)->level != rss->level ||
5655                             (*sample_rss)->types != rss->types))
5656                                 return rte_flow_error_set(error, ENOTSUP,
5657                                         RTE_FLOW_ERROR_TYPE_ACTION,
5658                                         NULL,
5659                                         "Can't use the different RSS types "
5660                                         "or level in the same flow");
5661                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5662                                 queue_index = (*sample_rss)->queue[0];
5663                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5664                         ++actions_n;
5665                         break;
5666                 case RTE_FLOW_ACTION_TYPE_MARK:
5667                         ret = flow_dv_validate_action_mark(dev, act,
5668                                                            sub_action_flags,
5669                                                            attr, error);
5670                         if (ret < 0)
5671                                 return ret;
5672                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5673                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5674                                                 MLX5_FLOW_ACTION_MARK_EXT;
5675                         else
5676                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5677                         ++actions_n;
5678                         break;
5679                 case RTE_FLOW_ACTION_TYPE_COUNT:
5680                         ret = flow_dv_validate_action_count
5681                                 (dev, false, *action_flags | sub_action_flags,
5682                                  error);
5683                         if (ret < 0)
5684                                 return ret;
5685                         *count = act->conf;
5686                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5687                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5688                         ++actions_n;
5689                         break;
5690                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5691                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5692                         ret = flow_dv_validate_action_port_id(dev,
5693                                                               sub_action_flags,
5694                                                               act,
5695                                                               attr,
5696                                                               error);
5697                         if (ret)
5698                                 return ret;
5699                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5700                         ++actions_n;
5701                         break;
5702                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5703                         ret = flow_dv_validate_action_raw_encap_decap
5704                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5705                                  &actions_n, action, item_flags, error);
5706                         if (ret < 0)
5707                                 return ret;
5708                         ++actions_n;
5709                         break;
5710                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5711                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5712                         ret = flow_dv_validate_action_l2_encap(dev,
5713                                                                sub_action_flags,
5714                                                                act, attr,
5715                                                                error);
5716                         if (ret < 0)
5717                                 return ret;
5718                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5719                         ++actions_n;
5720                         break;
5721                 default:
5722                         return rte_flow_error_set(error, ENOTSUP,
5723                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5724                                                   NULL,
5725                                                   "Doesn't support optional "
5726                                                   "action");
5727                 }
5728         }
5729         if (attr->ingress && !attr->transfer) {
5730                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5731                                           MLX5_FLOW_ACTION_RSS)))
5732                         return rte_flow_error_set(error, EINVAL,
5733                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5734                                                   NULL,
5735                                                   "Ingress must has a dest "
5736                                                   "QUEUE for Sample");
5737         } else if (attr->egress && !attr->transfer) {
5738                 return rte_flow_error_set(error, ENOTSUP,
5739                                           RTE_FLOW_ERROR_TYPE_ACTION,
5740                                           NULL,
5741                                           "Sample Only support Ingress "
5742                                           "or E-Switch");
5743         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5744                 MLX5_ASSERT(attr->transfer);
5745                 if (sample->ratio > 1)
5746                         return rte_flow_error_set(error, ENOTSUP,
5747                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5748                                                   NULL,
5749                                                   "E-Switch doesn't support "
5750                                                   "any optional action "
5751                                                   "for sampling");
5752                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5753                         return rte_flow_error_set(error, ENOTSUP,
5754                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5755                                                   NULL,
5756                                                   "unsupported action QUEUE");
5757                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5758                         return rte_flow_error_set(error, ENOTSUP,
5759                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5760                                                   NULL,
5761                                                   "unsupported action QUEUE");
5762                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5763                         return rte_flow_error_set(error, EINVAL,
5764                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5765                                                   NULL,
5766                                                   "E-Switch must has a dest "
5767                                                   "port for mirroring");
5768                 if (!priv->sh->cdev->config.hca_attr.reg_c_preserve &&
5769                      priv->representor_id != UINT16_MAX)
5770                         *fdb_mirror_limit = 1;
5771         }
5772         /* Continue validation for Xcap actions.*/
5773         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5774             (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index))) {
5775                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5776                      MLX5_FLOW_XCAP_ACTIONS)
5777                         return rte_flow_error_set(error, ENOTSUP,
5778                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5779                                                   NULL, "encap and decap "
5780                                                   "combination aren't "
5781                                                   "supported");
5782                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5783                                                         MLX5_FLOW_ACTION_ENCAP))
5784                         return rte_flow_error_set(error, ENOTSUP,
5785                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5786                                                   NULL, "encap is not supported"
5787                                                   " for ingress traffic");
5788         }
5789         return 0;
5790 }
5791
5792 /**
5793  * Find existing modify-header resource or create and register a new one.
5794  *
5795  * @param dev[in, out]
5796  *   Pointer to rte_eth_dev structure.
5797  * @param[in, out] resource
5798  *   Pointer to modify-header resource.
5799  * @parm[in, out] dev_flow
5800  *   Pointer to the dev_flow.
5801  * @param[out] error
5802  *   pointer to error structure.
5803  *
5804  * @return
5805  *   0 on success otherwise -errno and errno is set.
5806  */
5807 static int
5808 flow_dv_modify_hdr_resource_register
5809                         (struct rte_eth_dev *dev,
5810                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5811                          struct mlx5_flow *dev_flow,
5812                          struct rte_flow_error *error)
5813 {
5814         struct mlx5_priv *priv = dev->data->dev_private;
5815         struct mlx5_dev_ctx_shared *sh = priv->sh;
5816         uint32_t key_len = sizeof(*resource) -
5817                            offsetof(typeof(*resource), ft_type) +
5818                            resource->actions_num * sizeof(resource->actions[0]);
5819         struct mlx5_list_entry *entry;
5820         struct mlx5_flow_cb_ctx ctx = {
5821                 .error = error,
5822                 .data = resource,
5823         };
5824         struct mlx5_hlist *modify_cmds;
5825         uint64_t key64;
5826
5827         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5828                                 "hdr_modify",
5829                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5830                                 true, false, sh,
5831                                 flow_dv_modify_create_cb,
5832                                 flow_dv_modify_match_cb,
5833                                 flow_dv_modify_remove_cb,
5834                                 flow_dv_modify_clone_cb,
5835                                 flow_dv_modify_clone_free_cb,
5836                                 error);
5837         if (unlikely(!modify_cmds))
5838                 return -rte_errno;
5839         resource->root = !dev_flow->dv.group;
5840         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5841                                                                 resource->root))
5842                 return rte_flow_error_set(error, EOVERFLOW,
5843                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5844                                           "too many modify header items");
5845         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5846         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5847         if (!entry)
5848                 return -rte_errno;
5849         resource = container_of(entry, typeof(*resource), entry);
5850         dev_flow->handle->dvh.modify_hdr = resource;
5851         return 0;
5852 }
5853
5854 /**
5855  * Get DV flow counter by index.
5856  *
5857  * @param[in] dev
5858  *   Pointer to the Ethernet device structure.
5859  * @param[in] idx
5860  *   mlx5 flow counter index in the container.
5861  * @param[out] ppool
5862  *   mlx5 flow counter pool in the container.
5863  *
5864  * @return
5865  *   Pointer to the counter, NULL otherwise.
5866  */
5867 static struct mlx5_flow_counter *
5868 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5869                            uint32_t idx,
5870                            struct mlx5_flow_counter_pool **ppool)
5871 {
5872         struct mlx5_priv *priv = dev->data->dev_private;
5873         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5874         struct mlx5_flow_counter_pool *pool;
5875
5876         /* Decrease to original index and clear shared bit. */
5877         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5878         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5879         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5880         MLX5_ASSERT(pool);
5881         if (ppool)
5882                 *ppool = pool;
5883         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5884 }
5885
5886 /**
5887  * Check the devx counter belongs to the pool.
5888  *
5889  * @param[in] pool
5890  *   Pointer to the counter pool.
5891  * @param[in] id
5892  *   The counter devx ID.
5893  *
5894  * @return
5895  *   True if counter belongs to the pool, false otherwise.
5896  */
5897 static bool
5898 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5899 {
5900         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5901                    MLX5_COUNTERS_PER_POOL;
5902
5903         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5904                 return true;
5905         return false;
5906 }
5907
5908 /**
5909  * Get a pool by devx counter ID.
5910  *
5911  * @param[in] cmng
5912  *   Pointer to the counter management.
5913  * @param[in] id
5914  *   The counter devx ID.
5915  *
5916  * @return
5917  *   The counter pool pointer if exists, NULL otherwise,
5918  */
5919 static struct mlx5_flow_counter_pool *
5920 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5921 {
5922         uint32_t i;
5923         struct mlx5_flow_counter_pool *pool = NULL;
5924
5925         rte_spinlock_lock(&cmng->pool_update_sl);
5926         /* Check last used pool. */
5927         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5928             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5929                 pool = cmng->pools[cmng->last_pool_idx];
5930                 goto out;
5931         }
5932         /* ID out of range means no suitable pool in the container. */
5933         if (id > cmng->max_id || id < cmng->min_id)
5934                 goto out;
5935         /*
5936          * Find the pool from the end of the container, since mostly counter
5937          * ID is sequence increasing, and the last pool should be the needed
5938          * one.
5939          */
5940         i = cmng->n_valid;
5941         while (i--) {
5942                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5943
5944                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5945                         pool = pool_tmp;
5946                         break;
5947                 }
5948         }
5949 out:
5950         rte_spinlock_unlock(&cmng->pool_update_sl);
5951         return pool;
5952 }
5953
5954 /**
5955  * Resize a counter container.
5956  *
5957  * @param[in] dev
5958  *   Pointer to the Ethernet device structure.
5959  *
5960  * @return
5961  *   0 on success, otherwise negative errno value and rte_errno is set.
5962  */
5963 static int
5964 flow_dv_container_resize(struct rte_eth_dev *dev)
5965 {
5966         struct mlx5_priv *priv = dev->data->dev_private;
5967         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5968         void *old_pools = cmng->pools;
5969         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5970         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5971         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5972
5973         if (!pools) {
5974                 rte_errno = ENOMEM;
5975                 return -ENOMEM;
5976         }
5977         if (old_pools)
5978                 memcpy(pools, old_pools, cmng->n *
5979                                        sizeof(struct mlx5_flow_counter_pool *));
5980         cmng->n = resize;
5981         cmng->pools = pools;
5982         if (old_pools)
5983                 mlx5_free(old_pools);
5984         return 0;
5985 }
5986
5987 /**
5988  * Query a devx flow counter.
5989  *
5990  * @param[in] dev
5991  *   Pointer to the Ethernet device structure.
5992  * @param[in] counter
5993  *   Index to the flow counter.
5994  * @param[out] pkts
5995  *   The statistics value of packets.
5996  * @param[out] bytes
5997  *   The statistics value of bytes.
5998  *
5999  * @return
6000  *   0 on success, otherwise a negative errno value and rte_errno is set.
6001  */
6002 static inline int
6003 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
6004                      uint64_t *bytes)
6005 {
6006         struct mlx5_priv *priv = dev->data->dev_private;
6007         struct mlx5_flow_counter_pool *pool = NULL;
6008         struct mlx5_flow_counter *cnt;
6009         int offset;
6010
6011         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6012         MLX5_ASSERT(pool);
6013         if (priv->sh->cmng.counter_fallback)
6014                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6015                                         0, pkts, bytes, 0, NULL, NULL, 0);
6016         rte_spinlock_lock(&pool->sl);
6017         if (!pool->raw) {
6018                 *pkts = 0;
6019                 *bytes = 0;
6020         } else {
6021                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6022                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6023                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6024         }
6025         rte_spinlock_unlock(&pool->sl);
6026         return 0;
6027 }
6028
6029 /**
6030  * Create and initialize a new counter pool.
6031  *
6032  * @param[in] dev
6033  *   Pointer to the Ethernet device structure.
6034  * @param[out] dcs
6035  *   The devX counter handle.
6036  * @param[in] age
6037  *   Whether the pool is for counter that was allocated for aging.
6038  * @param[in/out] cont_cur
6039  *   Pointer to the container pointer, it will be update in pool resize.
6040  *
6041  * @return
6042  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6043  */
6044 static struct mlx5_flow_counter_pool *
6045 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6046                     uint32_t age)
6047 {
6048         struct mlx5_priv *priv = dev->data->dev_private;
6049         struct mlx5_flow_counter_pool *pool;
6050         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6051         bool fallback = priv->sh->cmng.counter_fallback;
6052         uint32_t size = sizeof(*pool);
6053
6054         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6055         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6056         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6057         if (!pool) {
6058                 rte_errno = ENOMEM;
6059                 return NULL;
6060         }
6061         pool->raw = NULL;
6062         pool->is_aged = !!age;
6063         pool->query_gen = 0;
6064         pool->min_dcs = dcs;
6065         rte_spinlock_init(&pool->sl);
6066         rte_spinlock_init(&pool->csl);
6067         TAILQ_INIT(&pool->counters[0]);
6068         TAILQ_INIT(&pool->counters[1]);
6069         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6070         rte_spinlock_lock(&cmng->pool_update_sl);
6071         pool->index = cmng->n_valid;
6072         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6073                 mlx5_free(pool);
6074                 rte_spinlock_unlock(&cmng->pool_update_sl);
6075                 return NULL;
6076         }
6077         cmng->pools[pool->index] = pool;
6078         cmng->n_valid++;
6079         if (unlikely(fallback)) {
6080                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6081
6082                 if (base < cmng->min_id)
6083                         cmng->min_id = base;
6084                 if (base > cmng->max_id)
6085                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6086                 cmng->last_pool_idx = pool->index;
6087         }
6088         rte_spinlock_unlock(&cmng->pool_update_sl);
6089         return pool;
6090 }
6091
6092 /**
6093  * Prepare a new counter and/or a new counter pool.
6094  *
6095  * @param[in] dev
6096  *   Pointer to the Ethernet device structure.
6097  * @param[out] cnt_free
6098  *   Where to put the pointer of a new counter.
6099  * @param[in] age
6100  *   Whether the pool is for counter that was allocated for aging.
6101  *
6102  * @return
6103  *   The counter pool pointer and @p cnt_free is set on success,
6104  *   NULL otherwise and rte_errno is set.
6105  */
6106 static struct mlx5_flow_counter_pool *
6107 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6108                              struct mlx5_flow_counter **cnt_free,
6109                              uint32_t age)
6110 {
6111         struct mlx5_priv *priv = dev->data->dev_private;
6112         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6113         struct mlx5_flow_counter_pool *pool;
6114         struct mlx5_counters tmp_tq;
6115         struct mlx5_devx_obj *dcs = NULL;
6116         struct mlx5_flow_counter *cnt;
6117         enum mlx5_counter_type cnt_type =
6118                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6119         bool fallback = priv->sh->cmng.counter_fallback;
6120         uint32_t i;
6121
6122         if (fallback) {
6123                 /* bulk_bitmap must be 0 for single counter allocation. */
6124                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6125                 if (!dcs)
6126                         return NULL;
6127                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6128                 if (!pool) {
6129                         pool = flow_dv_pool_create(dev, dcs, age);
6130                         if (!pool) {
6131                                 mlx5_devx_cmd_destroy(dcs);
6132                                 return NULL;
6133                         }
6134                 }
6135                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6136                 cnt = MLX5_POOL_GET_CNT(pool, i);
6137                 cnt->pool = pool;
6138                 cnt->dcs_when_free = dcs;
6139                 *cnt_free = cnt;
6140                 return pool;
6141         }
6142         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6143         if (!dcs) {
6144                 rte_errno = ENODATA;
6145                 return NULL;
6146         }
6147         pool = flow_dv_pool_create(dev, dcs, age);
6148         if (!pool) {
6149                 mlx5_devx_cmd_destroy(dcs);
6150                 return NULL;
6151         }
6152         TAILQ_INIT(&tmp_tq);
6153         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6154                 cnt = MLX5_POOL_GET_CNT(pool, i);
6155                 cnt->pool = pool;
6156                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6157         }
6158         rte_spinlock_lock(&cmng->csl[cnt_type]);
6159         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6160         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6161         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6162         (*cnt_free)->pool = pool;
6163         return pool;
6164 }
6165
6166 /**
6167  * Allocate a flow counter.
6168  *
6169  * @param[in] dev
6170  *   Pointer to the Ethernet device structure.
6171  * @param[in] age
6172  *   Whether the counter was allocated for aging.
6173  *
6174  * @return
6175  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6176  */
6177 static uint32_t
6178 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6179 {
6180         struct mlx5_priv *priv = dev->data->dev_private;
6181         struct mlx5_flow_counter_pool *pool = NULL;
6182         struct mlx5_flow_counter *cnt_free = NULL;
6183         bool fallback = priv->sh->cmng.counter_fallback;
6184         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6185         enum mlx5_counter_type cnt_type =
6186                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6187         uint32_t cnt_idx;
6188
6189         if (!priv->sh->cdev->config.devx) {
6190                 rte_errno = ENOTSUP;
6191                 return 0;
6192         }
6193         /* Get free counters from container. */
6194         rte_spinlock_lock(&cmng->csl[cnt_type]);
6195         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6196         if (cnt_free)
6197                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6198         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6199         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6200                 goto err;
6201         pool = cnt_free->pool;
6202         if (fallback)
6203                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6204         /* Create a DV counter action only in the first time usage. */
6205         if (!cnt_free->action) {
6206                 uint16_t offset;
6207                 struct mlx5_devx_obj *dcs;
6208                 int ret;
6209
6210                 if (!fallback) {
6211                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6212                         dcs = pool->min_dcs;
6213                 } else {
6214                         offset = 0;
6215                         dcs = cnt_free->dcs_when_free;
6216                 }
6217                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6218                                                             &cnt_free->action);
6219                 if (ret) {
6220                         rte_errno = errno;
6221                         goto err;
6222                 }
6223         }
6224         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6225                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6226         /* Update the counter reset values. */
6227         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6228                                  &cnt_free->bytes))
6229                 goto err;
6230         if (!fallback && !priv->sh->cmng.query_thread_on)
6231                 /* Start the asynchronous batch query by the host thread. */
6232                 mlx5_set_query_alarm(priv->sh);
6233         /*
6234          * When the count action isn't shared (by ID), shared_info field is
6235          * used for indirect action API's refcnt.
6236          * When the counter action is not shared neither by ID nor by indirect
6237          * action API, shared info must be 1.
6238          */
6239         cnt_free->shared_info.refcnt = 1;
6240         return cnt_idx;
6241 err:
6242         if (cnt_free) {
6243                 cnt_free->pool = pool;
6244                 if (fallback)
6245                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6246                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6247                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6248                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6249         }
6250         return 0;
6251 }
6252
6253 /**
6254  * Get age param from counter index.
6255  *
6256  * @param[in] dev
6257  *   Pointer to the Ethernet device structure.
6258  * @param[in] counter
6259  *   Index to the counter handler.
6260  *
6261  * @return
6262  *   The aging parameter specified for the counter index.
6263  */
6264 static struct mlx5_age_param*
6265 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6266                                 uint32_t counter)
6267 {
6268         struct mlx5_flow_counter *cnt;
6269         struct mlx5_flow_counter_pool *pool = NULL;
6270
6271         flow_dv_counter_get_by_idx(dev, counter, &pool);
6272         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6273         cnt = MLX5_POOL_GET_CNT(pool, counter);
6274         return MLX5_CNT_TO_AGE(cnt);
6275 }
6276
6277 /**
6278  * Remove a flow counter from aged counter list.
6279  *
6280  * @param[in] dev
6281  *   Pointer to the Ethernet device structure.
6282  * @param[in] counter
6283  *   Index to the counter handler.
6284  * @param[in] cnt
6285  *   Pointer to the counter handler.
6286  */
6287 static void
6288 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6289                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6290 {
6291         struct mlx5_age_info *age_info;
6292         struct mlx5_age_param *age_param;
6293         struct mlx5_priv *priv = dev->data->dev_private;
6294         uint16_t expected = AGE_CANDIDATE;
6295
6296         age_info = GET_PORT_AGE_INFO(priv);
6297         age_param = flow_dv_counter_idx_get_age(dev, counter);
6298         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6299                                          AGE_FREE, false, __ATOMIC_RELAXED,
6300                                          __ATOMIC_RELAXED)) {
6301                 /**
6302                  * We need the lock even it is age timeout,
6303                  * since counter may still in process.
6304                  */
6305                 rte_spinlock_lock(&age_info->aged_sl);
6306                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6307                 rte_spinlock_unlock(&age_info->aged_sl);
6308                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6309         }
6310 }
6311
6312 /**
6313  * Release a flow counter.
6314  *
6315  * @param[in] dev
6316  *   Pointer to the Ethernet device structure.
6317  * @param[in] counter
6318  *   Index to the counter handler.
6319  */
6320 static void
6321 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6322 {
6323         struct mlx5_priv *priv = dev->data->dev_private;
6324         struct mlx5_flow_counter_pool *pool = NULL;
6325         struct mlx5_flow_counter *cnt;
6326         enum mlx5_counter_type cnt_type;
6327
6328         if (!counter)
6329                 return;
6330         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6331         MLX5_ASSERT(pool);
6332         if (pool->is_aged) {
6333                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6334         } else {
6335                 /*
6336                  * If the counter action is shared by indirect action API,
6337                  * the atomic function reduces its references counter.
6338                  * If after the reduction the action is still referenced, the
6339                  * function returns here and does not release it.
6340                  * When the counter action is not shared by
6341                  * indirect action API, shared info is 1 before the reduction,
6342                  * so this condition is failed and function doesn't return here.
6343                  */
6344                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6345                                        __ATOMIC_RELAXED))
6346                         return;
6347         }
6348         cnt->pool = pool;
6349         /*
6350          * Put the counter back to list to be updated in none fallback mode.
6351          * Currently, we are using two list alternately, while one is in query,
6352          * add the freed counter to the other list based on the pool query_gen
6353          * value. After query finishes, add counter the list to the global
6354          * container counter list. The list changes while query starts. In
6355          * this case, lock will not be needed as query callback and release
6356          * function both operate with the different list.
6357          */
6358         if (!priv->sh->cmng.counter_fallback) {
6359                 rte_spinlock_lock(&pool->csl);
6360                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6361                 rte_spinlock_unlock(&pool->csl);
6362         } else {
6363                 cnt->dcs_when_free = cnt->dcs_when_active;
6364                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6365                                            MLX5_COUNTER_TYPE_ORIGIN;
6366                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6367                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6368                                   cnt, next);
6369                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6370         }
6371 }
6372
6373 /**
6374  * Resize a meter id container.
6375  *
6376  * @param[in] dev
6377  *   Pointer to the Ethernet device structure.
6378  *
6379  * @return
6380  *   0 on success, otherwise negative errno value and rte_errno is set.
6381  */
6382 static int
6383 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6384 {
6385         struct mlx5_priv *priv = dev->data->dev_private;
6386         struct mlx5_aso_mtr_pools_mng *pools_mng =
6387                                 &priv->sh->mtrmng->pools_mng;
6388         void *old_pools = pools_mng->pools;
6389         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6390         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6391         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6392
6393         if (!pools) {
6394                 rte_errno = ENOMEM;
6395                 return -ENOMEM;
6396         }
6397         if (!pools_mng->n)
6398                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6399                         mlx5_free(pools);
6400                         return -ENOMEM;
6401                 }
6402         if (old_pools)
6403                 memcpy(pools, old_pools, pools_mng->n *
6404                                        sizeof(struct mlx5_aso_mtr_pool *));
6405         pools_mng->n = resize;
6406         pools_mng->pools = pools;
6407         if (old_pools)
6408                 mlx5_free(old_pools);
6409         return 0;
6410 }
6411
6412 /**
6413  * Prepare a new meter and/or a new meter pool.
6414  *
6415  * @param[in] dev
6416  *   Pointer to the Ethernet device structure.
6417  * @param[out] mtr_free
6418  *   Where to put the pointer of a new meter.g.
6419  *
6420  * @return
6421  *   The meter pool pointer and @mtr_free is set on success,
6422  *   NULL otherwise and rte_errno is set.
6423  */
6424 static struct mlx5_aso_mtr_pool *
6425 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6426 {
6427         struct mlx5_priv *priv = dev->data->dev_private;
6428         struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6429         struct mlx5_aso_mtr_pool *pool = NULL;
6430         struct mlx5_devx_obj *dcs = NULL;
6431         uint32_t i;
6432         uint32_t log_obj_size;
6433
6434         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6435         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6436                                                       priv->sh->cdev->pdn,
6437                                                       log_obj_size);
6438         if (!dcs) {
6439                 rte_errno = ENODATA;
6440                 return NULL;
6441         }
6442         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6443         if (!pool) {
6444                 rte_errno = ENOMEM;
6445                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6446                 return NULL;
6447         }
6448         pool->devx_obj = dcs;
6449         rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6450         pool->index = pools_mng->n_valid;
6451         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6452                 mlx5_free(pool);
6453                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6454                 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6455                 return NULL;
6456         }
6457         pools_mng->pools[pool->index] = pool;
6458         pools_mng->n_valid++;
6459         rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6460         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6461                 pool->mtrs[i].offset = i;
6462                 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6463         }
6464         pool->mtrs[0].offset = 0;
6465         *mtr_free = &pool->mtrs[0];
6466         return pool;
6467 }
6468
6469 /**
6470  * Release a flow meter into pool.
6471  *
6472  * @param[in] dev
6473  *   Pointer to the Ethernet device structure.
6474  * @param[in] mtr_idx
6475  *   Index to aso flow meter.
6476  */
6477 static void
6478 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6479 {
6480         struct mlx5_priv *priv = dev->data->dev_private;
6481         struct mlx5_aso_mtr_pools_mng *pools_mng =
6482                                 &priv->sh->mtrmng->pools_mng;
6483         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6484
6485         MLX5_ASSERT(aso_mtr);
6486         rte_spinlock_lock(&pools_mng->mtrsl);
6487         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6488         aso_mtr->state = ASO_METER_FREE;
6489         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6490         rte_spinlock_unlock(&pools_mng->mtrsl);
6491 }
6492
6493 /**
6494  * Allocate a aso flow meter.
6495  *
6496  * @param[in] dev
6497  *   Pointer to the Ethernet device structure.
6498  *
6499  * @return
6500  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6501  */
6502 static uint32_t
6503 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6504 {
6505         struct mlx5_priv *priv = dev->data->dev_private;
6506         struct mlx5_aso_mtr *mtr_free = NULL;
6507         struct mlx5_aso_mtr_pools_mng *pools_mng =
6508                                 &priv->sh->mtrmng->pools_mng;
6509         struct mlx5_aso_mtr_pool *pool;
6510         uint32_t mtr_idx = 0;
6511
6512         if (!priv->sh->cdev->config.devx) {
6513                 rte_errno = ENOTSUP;
6514                 return 0;
6515         }
6516         /* Allocate the flow meter memory. */
6517         /* Get free meters from management. */
6518         rte_spinlock_lock(&pools_mng->mtrsl);
6519         mtr_free = LIST_FIRST(&pools_mng->meters);
6520         if (mtr_free)
6521                 LIST_REMOVE(mtr_free, next);
6522         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6523                 rte_spinlock_unlock(&pools_mng->mtrsl);
6524                 return 0;
6525         }
6526         mtr_free->state = ASO_METER_WAIT;
6527         rte_spinlock_unlock(&pools_mng->mtrsl);
6528         pool = container_of(mtr_free,
6529                         struct mlx5_aso_mtr_pool,
6530                         mtrs[mtr_free->offset]);
6531         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6532         if (!mtr_free->fm.meter_action) {
6533 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6534                 struct rte_flow_error error;
6535                 uint8_t reg_id;
6536
6537                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6538                 mtr_free->fm.meter_action =
6539                         mlx5_glue->dv_create_flow_action_aso
6540                                                 (priv->sh->rx_domain,
6541                                                  pool->devx_obj->obj,
6542                                                  mtr_free->offset,
6543                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6544                                                  reg_id - REG_C_0);
6545 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6546                 if (!mtr_free->fm.meter_action) {
6547                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6548                         return 0;
6549                 }
6550         }
6551         return mtr_idx;
6552 }
6553
6554 /**
6555  * Verify the @p attributes will be correctly understood by the NIC and store
6556  * them in the @p flow if everything is correct.
6557  *
6558  * @param[in] dev
6559  *   Pointer to dev struct.
6560  * @param[in] attributes
6561  *   Pointer to flow attributes
6562  * @param[in] external
6563  *   This flow rule is created by request external to PMD.
6564  * @param[out] error
6565  *   Pointer to error structure.
6566  *
6567  * @return
6568  *   - 0 on success and non root table.
6569  *   - 1 on success and root table.
6570  *   - a negative errno value otherwise and rte_errno is set.
6571  */
6572 static int
6573 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6574                             const struct mlx5_flow_tunnel *tunnel,
6575                             const struct rte_flow_attr *attributes,
6576                             const struct flow_grp_info *grp_info,
6577                             struct rte_flow_error *error)
6578 {
6579         struct mlx5_priv *priv = dev->data->dev_private;
6580         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6581         int ret = 0;
6582
6583 #ifndef HAVE_MLX5DV_DR
6584         RTE_SET_USED(tunnel);
6585         RTE_SET_USED(grp_info);
6586         if (attributes->group)
6587                 return rte_flow_error_set(error, ENOTSUP,
6588                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6589                                           NULL,
6590                                           "groups are not supported");
6591 #else
6592         uint32_t table = 0;
6593
6594         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6595                                        grp_info, error);
6596         if (ret)
6597                 return ret;
6598         if (!table)
6599                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6600 #endif
6601         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6602             attributes->priority > lowest_priority)
6603                 return rte_flow_error_set(error, ENOTSUP,
6604                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6605                                           NULL,
6606                                           "priority out of range");
6607         if (attributes->transfer) {
6608                 if (!priv->sh->config.dv_esw_en)
6609                         return rte_flow_error_set
6610                                 (error, ENOTSUP,
6611                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6612                                  "E-Switch dr is not supported");
6613                 if (attributes->egress)
6614                         return rte_flow_error_set
6615                                 (error, ENOTSUP,
6616                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6617                                  "egress is not supported");
6618         }
6619         if (!(attributes->egress ^ attributes->ingress))
6620                 return rte_flow_error_set(error, ENOTSUP,
6621                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6622                                           "must specify exactly one of "
6623                                           "ingress or egress");
6624         return ret;
6625 }
6626
6627 static int
6628 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6629                         int64_t pattern_flags, uint64_t l3_flags,
6630                         uint64_t l4_flags, uint64_t ip4_flag,
6631                         struct rte_flow_error *error)
6632 {
6633         if (mask->l3_ok && !(pattern_flags & l3_flags))
6634                 return rte_flow_error_set(error, EINVAL,
6635                                           RTE_FLOW_ERROR_TYPE_ITEM,
6636                                           NULL, "missing L3 protocol");
6637
6638         if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6639                 return rte_flow_error_set(error, EINVAL,
6640                                           RTE_FLOW_ERROR_TYPE_ITEM,
6641                                           NULL, "missing IPv4 protocol");
6642
6643         if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6644                 return rte_flow_error_set(error, EINVAL,
6645                                           RTE_FLOW_ERROR_TYPE_ITEM,
6646                                           NULL, "missing L4 protocol");
6647
6648         return 0;
6649 }
6650
6651 static int
6652 flow_dv_validate_item_integrity_post(const struct
6653                                      rte_flow_item *integrity_items[2],
6654                                      int64_t pattern_flags,
6655                                      struct rte_flow_error *error)
6656 {
6657         const struct rte_flow_item_integrity *mask;
6658         int ret;
6659
6660         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6661                 mask = (typeof(mask))integrity_items[0]->mask;
6662                 ret = validate_integrity_bits(mask, pattern_flags,
6663                                               MLX5_FLOW_LAYER_OUTER_L3,
6664                                               MLX5_FLOW_LAYER_OUTER_L4,
6665                                               MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6666                                               error);
6667                 if (ret)
6668                         return ret;
6669         }
6670         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6671                 mask = (typeof(mask))integrity_items[1]->mask;
6672                 ret = validate_integrity_bits(mask, pattern_flags,
6673                                               MLX5_FLOW_LAYER_INNER_L3,
6674                                               MLX5_FLOW_LAYER_INNER_L4,
6675                                               MLX5_FLOW_LAYER_INNER_L3_IPV4,
6676                                               error);
6677                 if (ret)
6678                         return ret;
6679         }
6680         return 0;
6681 }
6682
6683 static int
6684 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6685                                 const struct rte_flow_item *integrity_item,
6686                                 uint64_t pattern_flags, uint64_t *last_item,
6687                                 const struct rte_flow_item *integrity_items[2],
6688                                 struct rte_flow_error *error)
6689 {
6690         struct mlx5_priv *priv = dev->data->dev_private;
6691         const struct rte_flow_item_integrity *mask = (typeof(mask))
6692                                                      integrity_item->mask;
6693         const struct rte_flow_item_integrity *spec = (typeof(spec))
6694                                                      integrity_item->spec;
6695
6696         if (!priv->sh->cdev->config.hca_attr.pkt_integrity_match)
6697                 return rte_flow_error_set(error, ENOTSUP,
6698                                           RTE_FLOW_ERROR_TYPE_ITEM,
6699                                           integrity_item,
6700                                           "packet integrity integrity_item not supported");
6701         if (!spec)
6702                 return rte_flow_error_set(error, ENOTSUP,
6703                                           RTE_FLOW_ERROR_TYPE_ITEM,
6704                                           integrity_item,
6705                                           "no spec for integrity item");
6706         if (!mask)
6707                 mask = &rte_flow_item_integrity_mask;
6708         if (!mlx5_validate_integrity_item(mask))
6709                 return rte_flow_error_set(error, ENOTSUP,
6710                                           RTE_FLOW_ERROR_TYPE_ITEM,
6711                                           integrity_item,
6712                                           "unsupported integrity filter");
6713         if (spec->level > 1) {
6714                 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6715                         return rte_flow_error_set
6716                                 (error, ENOTSUP,
6717                                  RTE_FLOW_ERROR_TYPE_ITEM,
6718                                  NULL, "multiple inner integrity items not supported");
6719                 integrity_items[1] = integrity_item;
6720                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6721         } else {
6722                 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6723                         return rte_flow_error_set
6724                                 (error, ENOTSUP,
6725                                  RTE_FLOW_ERROR_TYPE_ITEM,
6726                                  NULL, "multiple outer integrity items not supported");
6727                 integrity_items[0] = integrity_item;
6728                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6729         }
6730         return 0;
6731 }
6732
6733 static int
6734 flow_dv_validate_item_flex(struct rte_eth_dev *dev,
6735                            const struct rte_flow_item *item,
6736                            uint64_t item_flags,
6737                            uint64_t *last_item,
6738                            bool is_inner,
6739                            struct rte_flow_error *error)
6740 {
6741         const struct rte_flow_item_flex *flow_spec = item->spec;
6742         const struct rte_flow_item_flex *flow_mask = item->mask;
6743         struct mlx5_flex_item *flex;
6744
6745         if (!flow_spec)
6746                 return rte_flow_error_set(error, EINVAL,
6747                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6748                                           "flex flow item spec cannot be NULL");
6749         if (!flow_mask)
6750                 return rte_flow_error_set(error, EINVAL,
6751                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6752                                           "flex flow item mask cannot be NULL");
6753         if (item->last)
6754                 return rte_flow_error_set(error, ENOTSUP,
6755                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6756                                           "flex flow item last not supported");
6757         if (mlx5_flex_acquire_index(dev, flow_spec->handle, false) < 0)
6758                 return rte_flow_error_set(error, EINVAL,
6759                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6760                                           "invalid flex flow item handle");
6761         flex = (struct mlx5_flex_item *)flow_spec->handle;
6762         switch (flex->tunnel_mode) {
6763         case FLEX_TUNNEL_MODE_SINGLE:
6764                 if (item_flags &
6765                     (MLX5_FLOW_ITEM_OUTER_FLEX | MLX5_FLOW_ITEM_INNER_FLEX))
6766                         rte_flow_error_set(error, EINVAL,
6767                                            RTE_FLOW_ERROR_TYPE_ITEM,
6768                                            NULL, "multiple flex items not supported");
6769                 break;
6770         case FLEX_TUNNEL_MODE_OUTER:
6771                 if (is_inner)
6772                         rte_flow_error_set(error, EINVAL,
6773                                            RTE_FLOW_ERROR_TYPE_ITEM,
6774                                            NULL, "inner flex item was not configured");
6775                 if (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX)
6776                         rte_flow_error_set(error, ENOTSUP,
6777                                            RTE_FLOW_ERROR_TYPE_ITEM,
6778                                            NULL, "multiple flex items not supported");
6779                 break;
6780         case FLEX_TUNNEL_MODE_INNER:
6781                 if (!is_inner)
6782                         rte_flow_error_set(error, EINVAL,
6783                                            RTE_FLOW_ERROR_TYPE_ITEM,
6784                                            NULL, "outer flex item was not configured");
6785                 if (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)
6786                         rte_flow_error_set(error, EINVAL,
6787                                            RTE_FLOW_ERROR_TYPE_ITEM,
6788                                            NULL, "multiple flex items not supported");
6789                 break;
6790         case FLEX_TUNNEL_MODE_MULTI:
6791                 if ((is_inner && (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)) ||
6792                     (!is_inner && (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX))) {
6793                         rte_flow_error_set(error, EINVAL,
6794                                            RTE_FLOW_ERROR_TYPE_ITEM,
6795                                            NULL, "multiple flex items not supported");
6796                 }
6797                 break;
6798         case FLEX_TUNNEL_MODE_TUNNEL:
6799                 if (is_inner || (item_flags & MLX5_FLOW_ITEM_FLEX_TUNNEL))
6800                         rte_flow_error_set(error, EINVAL,
6801                                            RTE_FLOW_ERROR_TYPE_ITEM,
6802                                            NULL, "multiple flex tunnel items not supported");
6803                 break;
6804         default:
6805                 rte_flow_error_set(error, EINVAL,
6806                                    RTE_FLOW_ERROR_TYPE_ITEM,
6807                                    NULL, "invalid flex item configuration");
6808         }
6809         *last_item = flex->tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ?
6810                      MLX5_FLOW_ITEM_FLEX_TUNNEL : is_inner ?
6811                      MLX5_FLOW_ITEM_INNER_FLEX : MLX5_FLOW_ITEM_OUTER_FLEX;
6812         return 0;
6813 }
6814
6815 /**
6816  * Internal validation function. For validating both actions and items.
6817  *
6818  * @param[in] dev
6819  *   Pointer to the rte_eth_dev structure.
6820  * @param[in] attr
6821  *   Pointer to the flow attributes.
6822  * @param[in] items
6823  *   Pointer to the list of items.
6824  * @param[in] actions
6825  *   Pointer to the list of actions.
6826  * @param[in] external
6827  *   This flow rule is created by request external to PMD.
6828  * @param[in] hairpin
6829  *   Number of hairpin TX actions, 0 means classic flow.
6830  * @param[out] error
6831  *   Pointer to the error structure.
6832  *
6833  * @return
6834  *   0 on success, a negative errno value otherwise and rte_errno is set.
6835  */
6836 static int
6837 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6838                  const struct rte_flow_item items[],
6839                  const struct rte_flow_action actions[],
6840                  bool external, int hairpin, struct rte_flow_error *error)
6841 {
6842         int ret;
6843         uint64_t action_flags = 0;
6844         uint64_t item_flags = 0;
6845         uint64_t last_item = 0;
6846         uint8_t next_protocol = 0xff;
6847         uint16_t ether_type = 0;
6848         int actions_n = 0;
6849         uint8_t item_ipv6_proto = 0;
6850         int fdb_mirror_limit = 0;
6851         int modify_after_mirror = 0;
6852         const struct rte_flow_item *geneve_item = NULL;
6853         const struct rte_flow_item *gre_item = NULL;
6854         const struct rte_flow_item *gtp_item = NULL;
6855         const struct rte_flow_action_raw_decap *decap;
6856         const struct rte_flow_action_raw_encap *encap;
6857         const struct rte_flow_action_rss *rss = NULL;
6858         const struct rte_flow_action_rss *sample_rss = NULL;
6859         const struct rte_flow_action_count *sample_count = NULL;
6860         const struct rte_flow_item_tcp nic_tcp_mask = {
6861                 .hdr = {
6862                         .tcp_flags = 0xFF,
6863                         .src_port = RTE_BE16(UINT16_MAX),
6864                         .dst_port = RTE_BE16(UINT16_MAX),
6865                 }
6866         };
6867         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6868                 .hdr = {
6869                         .src_addr =
6870                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6871                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6872                         .dst_addr =
6873                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6874                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6875                         .vtc_flow = RTE_BE32(0xffffffff),
6876                         .proto = 0xff,
6877                         .hop_limits = 0xff,
6878                 },
6879                 .has_frag_ext = 1,
6880         };
6881         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6882                 .hdr = {
6883                         .common = {
6884                                 .u32 =
6885                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6886                                         .type = 0xFF,
6887                                         }).u32),
6888                         },
6889                         .dummy[0] = 0xffffffff,
6890                 },
6891         };
6892         struct mlx5_priv *priv = dev->data->dev_private;
6893         struct mlx5_sh_config *dev_conf = &priv->sh->config;
6894         uint16_t queue_index = 0xFFFF;
6895         const struct rte_flow_item_vlan *vlan_m = NULL;
6896         uint32_t rw_act_num = 0;
6897         uint64_t is_root;
6898         const struct mlx5_flow_tunnel *tunnel;
6899         enum mlx5_tof_rule_type tof_rule_type;
6900         struct flow_grp_info grp_info = {
6901                 .external = !!external,
6902                 .transfer = !!attr->transfer,
6903                 .fdb_def_rule = !!priv->fdb_def_rule,
6904                 .std_tbl_fix = true,
6905         };
6906         const struct rte_eth_hairpin_conf *conf;
6907         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6908         const struct rte_flow_item *port_id_item = NULL;
6909         bool def_policy = false;
6910         uint16_t udp_dport = 0;
6911
6912         if (items == NULL)
6913                 return -1;
6914         tunnel = is_tunnel_offload_active(dev) ?
6915                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6916         if (tunnel) {
6917                 if (!dev_conf->dv_flow_en)
6918                         return rte_flow_error_set
6919                                 (error, ENOTSUP,
6920                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6921                                  NULL, "tunnel offload requires DV flow interface");
6922                 if (priv->representor)
6923                         return rte_flow_error_set
6924                                 (error, ENOTSUP,
6925                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6926                                  NULL, "decap not supported for VF representor");
6927                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6928                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6929                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6930                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6931                                         MLX5_FLOW_ACTION_DECAP;
6932                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6933                                         (dev, attr, tunnel, tof_rule_type);
6934         }
6935         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6936         if (ret < 0)
6937                 return ret;
6938         is_root = (uint64_t)ret;
6939         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6940                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6941                 int type = items->type;
6942
6943                 if (!mlx5_flow_os_item_supported(type))
6944                         return rte_flow_error_set(error, ENOTSUP,
6945                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6946                                                   NULL, "item not supported");
6947                 switch (type) {
6948                 case RTE_FLOW_ITEM_TYPE_VOID:
6949                         break;
6950                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6951                         ret = flow_dv_validate_item_port_id
6952                                         (dev, items, attr, item_flags, error);
6953                         if (ret < 0)
6954                                 return ret;
6955                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6956                         port_id_item = items;
6957                         break;
6958                 case RTE_FLOW_ITEM_TYPE_ETH:
6959                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6960                                                           true, error);
6961                         if (ret < 0)
6962                                 return ret;
6963                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6964                                              MLX5_FLOW_LAYER_OUTER_L2;
6965                         if (items->mask != NULL && items->spec != NULL) {
6966                                 ether_type =
6967                                         ((const struct rte_flow_item_eth *)
6968                                          items->spec)->type;
6969                                 ether_type &=
6970                                         ((const struct rte_flow_item_eth *)
6971                                          items->mask)->type;
6972                                 ether_type = rte_be_to_cpu_16(ether_type);
6973                         } else {
6974                                 ether_type = 0;
6975                         }
6976                         break;
6977                 case RTE_FLOW_ITEM_TYPE_VLAN:
6978                         ret = flow_dv_validate_item_vlan(items, item_flags,
6979                                                          dev, error);
6980                         if (ret < 0)
6981                                 return ret;
6982                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6983                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6984                         if (items->mask != NULL && items->spec != NULL) {
6985                                 ether_type =
6986                                         ((const struct rte_flow_item_vlan *)
6987                                          items->spec)->inner_type;
6988                                 ether_type &=
6989                                         ((const struct rte_flow_item_vlan *)
6990                                          items->mask)->inner_type;
6991                                 ether_type = rte_be_to_cpu_16(ether_type);
6992                         } else {
6993                                 ether_type = 0;
6994                         }
6995                         /* Store outer VLAN mask for of_push_vlan action. */
6996                         if (!tunnel)
6997                                 vlan_m = items->mask;
6998                         break;
6999                 case RTE_FLOW_ITEM_TYPE_IPV4:
7000                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7001                                                   &item_flags, &tunnel);
7002                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7003                                                          last_item, ether_type,
7004                                                          error);
7005                         if (ret < 0)
7006                                 return ret;
7007                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7008                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7009                         if (items->mask != NULL &&
7010                             ((const struct rte_flow_item_ipv4 *)
7011                              items->mask)->hdr.next_proto_id) {
7012                                 next_protocol =
7013                                         ((const struct rte_flow_item_ipv4 *)
7014                                          (items->spec))->hdr.next_proto_id;
7015                                 next_protocol &=
7016                                         ((const struct rte_flow_item_ipv4 *)
7017                                          (items->mask))->hdr.next_proto_id;
7018                         } else {
7019                                 /* Reset for inner layer. */
7020                                 next_protocol = 0xff;
7021                         }
7022                         break;
7023                 case RTE_FLOW_ITEM_TYPE_IPV6:
7024                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7025                                                   &item_flags, &tunnel);
7026                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7027                                                            last_item,
7028                                                            ether_type,
7029                                                            &nic_ipv6_mask,
7030                                                            error);
7031                         if (ret < 0)
7032                                 return ret;
7033                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7034                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7035                         if (items->mask != NULL &&
7036                             ((const struct rte_flow_item_ipv6 *)
7037                              items->mask)->hdr.proto) {
7038                                 item_ipv6_proto =
7039                                         ((const struct rte_flow_item_ipv6 *)
7040                                          items->spec)->hdr.proto;
7041                                 next_protocol =
7042                                         ((const struct rte_flow_item_ipv6 *)
7043                                          items->spec)->hdr.proto;
7044                                 next_protocol &=
7045                                         ((const struct rte_flow_item_ipv6 *)
7046                                          items->mask)->hdr.proto;
7047                         } else {
7048                                 /* Reset for inner layer. */
7049                                 next_protocol = 0xff;
7050                         }
7051                         break;
7052                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7053                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
7054                                                                   item_flags,
7055                                                                   error);
7056                         if (ret < 0)
7057                                 return ret;
7058                         last_item = tunnel ?
7059                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7060                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7061                         if (items->mask != NULL &&
7062                             ((const struct rte_flow_item_ipv6_frag_ext *)
7063                              items->mask)->hdr.next_header) {
7064                                 next_protocol =
7065                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7066                                  items->spec)->hdr.next_header;
7067                                 next_protocol &=
7068                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7069                                  items->mask)->hdr.next_header;
7070                         } else {
7071                                 /* Reset for inner layer. */
7072                                 next_protocol = 0xff;
7073                         }
7074                         break;
7075                 case RTE_FLOW_ITEM_TYPE_TCP:
7076                         ret = mlx5_flow_validate_item_tcp
7077                                                 (items, item_flags,
7078                                                  next_protocol,
7079                                                  &nic_tcp_mask,
7080                                                  error);
7081                         if (ret < 0)
7082                                 return ret;
7083                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7084                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7085                         break;
7086                 case RTE_FLOW_ITEM_TYPE_UDP:
7087                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7088                                                           next_protocol,
7089                                                           error);
7090                         const struct rte_flow_item_udp *spec = items->spec;
7091                         const struct rte_flow_item_udp *mask = items->mask;
7092                         if (!mask)
7093                                 mask = &rte_flow_item_udp_mask;
7094                         if (spec != NULL)
7095                                 udp_dport = rte_be_to_cpu_16
7096                                                 (spec->hdr.dst_port &
7097                                                  mask->hdr.dst_port);
7098                         if (ret < 0)
7099                                 return ret;
7100                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7101                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7102                         break;
7103                 case RTE_FLOW_ITEM_TYPE_GRE:
7104                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7105                                                           next_protocol, error);
7106                         if (ret < 0)
7107                                 return ret;
7108                         gre_item = items;
7109                         last_item = MLX5_FLOW_LAYER_GRE;
7110                         break;
7111                 case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
7112                         ret = mlx5_flow_validate_item_gre_option(dev, items, item_flags,
7113                                                           attr, gre_item, error);
7114                         if (ret < 0)
7115                                 return ret;
7116                         last_item = MLX5_FLOW_LAYER_GRE;
7117                         break;
7118                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7119                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7120                                                             next_protocol,
7121                                                             error);
7122                         if (ret < 0)
7123                                 return ret;
7124                         last_item = MLX5_FLOW_LAYER_NVGRE;
7125                         break;
7126                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7127                         ret = mlx5_flow_validate_item_gre_key
7128                                 (items, item_flags, gre_item, error);
7129                         if (ret < 0)
7130                                 return ret;
7131                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7132                         break;
7133                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7134                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7135                                                             items, item_flags,
7136                                                             attr, error);
7137                         if (ret < 0)
7138                                 return ret;
7139                         last_item = MLX5_FLOW_LAYER_VXLAN;
7140                         break;
7141                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7142                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7143                                                                 item_flags, dev,
7144                                                                 error);
7145                         if (ret < 0)
7146                                 return ret;
7147                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7148                         break;
7149                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7150                         ret = mlx5_flow_validate_item_geneve(items,
7151                                                              item_flags, dev,
7152                                                              error);
7153                         if (ret < 0)
7154                                 return ret;
7155                         geneve_item = items;
7156                         last_item = MLX5_FLOW_LAYER_GENEVE;
7157                         break;
7158                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7159                         ret = mlx5_flow_validate_item_geneve_opt(items,
7160                                                                  last_item,
7161                                                                  geneve_item,
7162                                                                  dev,
7163                                                                  error);
7164                         if (ret < 0)
7165                                 return ret;
7166                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7167                         break;
7168                 case RTE_FLOW_ITEM_TYPE_MPLS:
7169                         ret = mlx5_flow_validate_item_mpls(dev, items,
7170                                                            item_flags,
7171                                                            last_item, error);
7172                         if (ret < 0)
7173                                 return ret;
7174                         last_item = MLX5_FLOW_LAYER_MPLS;
7175                         break;
7176
7177                 case RTE_FLOW_ITEM_TYPE_MARK:
7178                         ret = flow_dv_validate_item_mark(dev, items, attr,
7179                                                          error);
7180                         if (ret < 0)
7181                                 return ret;
7182                         last_item = MLX5_FLOW_ITEM_MARK;
7183                         break;
7184                 case RTE_FLOW_ITEM_TYPE_META:
7185                         ret = flow_dv_validate_item_meta(dev, items, attr,
7186                                                          error);
7187                         if (ret < 0)
7188                                 return ret;
7189                         last_item = MLX5_FLOW_ITEM_METADATA;
7190                         break;
7191                 case RTE_FLOW_ITEM_TYPE_ICMP:
7192                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7193                                                            next_protocol,
7194                                                            error);
7195                         if (ret < 0)
7196                                 return ret;
7197                         last_item = MLX5_FLOW_LAYER_ICMP;
7198                         break;
7199                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7200                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7201                                                             next_protocol,
7202                                                             error);
7203                         if (ret < 0)
7204                                 return ret;
7205                         item_ipv6_proto = IPPROTO_ICMPV6;
7206                         last_item = MLX5_FLOW_LAYER_ICMP6;
7207                         break;
7208                 case RTE_FLOW_ITEM_TYPE_TAG:
7209                         ret = flow_dv_validate_item_tag(dev, items,
7210                                                         attr, error);
7211                         if (ret < 0)
7212                                 return ret;
7213                         last_item = MLX5_FLOW_ITEM_TAG;
7214                         break;
7215                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7216                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7217                         break;
7218                 case RTE_FLOW_ITEM_TYPE_GTP:
7219                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7220                                                         error);
7221                         if (ret < 0)
7222                                 return ret;
7223                         gtp_item = items;
7224                         last_item = MLX5_FLOW_LAYER_GTP;
7225                         break;
7226                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7227                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7228                                                             gtp_item, attr,
7229                                                             error);
7230                         if (ret < 0)
7231                                 return ret;
7232                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7233                         break;
7234                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7235                         /* Capacity will be checked in the translate stage. */
7236                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7237                                                             last_item,
7238                                                             ether_type,
7239                                                             &nic_ecpri_mask,
7240                                                             error);
7241                         if (ret < 0)
7242                                 return ret;
7243                         last_item = MLX5_FLOW_LAYER_ECPRI;
7244                         break;
7245                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7246                         ret = flow_dv_validate_item_integrity(dev, items,
7247                                                               item_flags,
7248                                                               &last_item,
7249                                                               integrity_items,
7250                                                               error);
7251                         if (ret < 0)
7252                                 return ret;
7253                         break;
7254                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7255                         ret = flow_dv_validate_item_aso_ct(dev, items,
7256                                                            &item_flags, error);
7257                         if (ret < 0)
7258                                 return ret;
7259                         break;
7260                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7261                         /* tunnel offload item was processed before
7262                          * list it here as a supported type
7263                          */
7264                         break;
7265                 case RTE_FLOW_ITEM_TYPE_FLEX:
7266                         ret = flow_dv_validate_item_flex(dev, items, item_flags,
7267                                                          &last_item,
7268                                                          tunnel != 0, error);
7269                         if (ret < 0)
7270                                 return ret;
7271                         break;
7272                 default:
7273                         return rte_flow_error_set(error, ENOTSUP,
7274                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7275                                                   NULL, "item not supported");
7276                 }
7277                 item_flags |= last_item;
7278         }
7279         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7280                 ret = flow_dv_validate_item_integrity_post(integrity_items,
7281                                                            item_flags, error);
7282                 if (ret)
7283                         return ret;
7284         }
7285         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7286                 int type = actions->type;
7287                 bool shared_count = false;
7288
7289                 if (!mlx5_flow_os_action_supported(type))
7290                         return rte_flow_error_set(error, ENOTSUP,
7291                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7292                                                   actions,
7293                                                   "action not supported");
7294                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7295                         return rte_flow_error_set(error, ENOTSUP,
7296                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7297                                                   actions, "too many actions");
7298                 if (action_flags &
7299                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7300                         return rte_flow_error_set(error, ENOTSUP,
7301                                 RTE_FLOW_ERROR_TYPE_ACTION,
7302                                 NULL, "meter action with policy "
7303                                 "must be the last action");
7304                 switch (type) {
7305                 case RTE_FLOW_ACTION_TYPE_VOID:
7306                         break;
7307                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7308                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7309                         ret = flow_dv_validate_action_port_id(dev,
7310                                                               action_flags,
7311                                                               actions,
7312                                                               attr,
7313                                                               error);
7314                         if (ret)
7315                                 return ret;
7316                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7317                         ++actions_n;
7318                         break;
7319                 case RTE_FLOW_ACTION_TYPE_FLAG:
7320                         ret = flow_dv_validate_action_flag(dev, action_flags,
7321                                                            attr, error);
7322                         if (ret < 0)
7323                                 return ret;
7324                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7325                                 /* Count all modify-header actions as one. */
7326                                 if (!(action_flags &
7327                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7328                                         ++actions_n;
7329                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7330                                                 MLX5_FLOW_ACTION_MARK_EXT;
7331                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7332                                         modify_after_mirror = 1;
7333
7334                         } else {
7335                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7336                                 ++actions_n;
7337                         }
7338                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7339                         break;
7340                 case RTE_FLOW_ACTION_TYPE_MARK:
7341                         ret = flow_dv_validate_action_mark(dev, actions,
7342                                                            action_flags,
7343                                                            attr, error);
7344                         if (ret < 0)
7345                                 return ret;
7346                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7347                                 /* Count all modify-header actions as one. */
7348                                 if (!(action_flags &
7349                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7350                                         ++actions_n;
7351                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7352                                                 MLX5_FLOW_ACTION_MARK_EXT;
7353                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7354                                         modify_after_mirror = 1;
7355                         } else {
7356                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7357                                 ++actions_n;
7358                         }
7359                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7360                         break;
7361                 case RTE_FLOW_ACTION_TYPE_SET_META:
7362                         ret = flow_dv_validate_action_set_meta(dev, actions,
7363                                                                action_flags,
7364                                                                attr, error);
7365                         if (ret < 0)
7366                                 return ret;
7367                         /* Count all modify-header actions as one action. */
7368                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7369                                 ++actions_n;
7370                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7371                                 modify_after_mirror = 1;
7372                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7373                         rw_act_num += MLX5_ACT_NUM_SET_META;
7374                         break;
7375                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7376                         ret = flow_dv_validate_action_set_tag(dev, actions,
7377                                                               action_flags,
7378                                                               attr, error);
7379                         if (ret < 0)
7380                                 return ret;
7381                         /* Count all modify-header actions as one action. */
7382                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7383                                 ++actions_n;
7384                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7385                                 modify_after_mirror = 1;
7386                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7387                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7388                         break;
7389                 case RTE_FLOW_ACTION_TYPE_DROP:
7390                         ret = mlx5_flow_validate_action_drop(action_flags,
7391                                                              attr, error);
7392                         if (ret < 0)
7393                                 return ret;
7394                         action_flags |= MLX5_FLOW_ACTION_DROP;
7395                         ++actions_n;
7396                         break;
7397                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7398                         ret = mlx5_flow_validate_action_queue(actions,
7399                                                               action_flags, dev,
7400                                                               attr, error);
7401                         if (ret < 0)
7402                                 return ret;
7403                         queue_index = ((const struct rte_flow_action_queue *)
7404                                                         (actions->conf))->index;
7405                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7406                         ++actions_n;
7407                         break;
7408                 case RTE_FLOW_ACTION_TYPE_RSS:
7409                         rss = actions->conf;
7410                         ret = mlx5_flow_validate_action_rss(actions,
7411                                                             action_flags, dev,
7412                                                             attr, item_flags,
7413                                                             error);
7414                         if (ret < 0)
7415                                 return ret;
7416                         if (rss && sample_rss &&
7417                             (sample_rss->level != rss->level ||
7418                             sample_rss->types != rss->types))
7419                                 return rte_flow_error_set(error, ENOTSUP,
7420                                         RTE_FLOW_ERROR_TYPE_ACTION,
7421                                         NULL,
7422                                         "Can't use the different RSS types "
7423                                         "or level in the same flow");
7424                         if (rss != NULL && rss->queue_num)
7425                                 queue_index = rss->queue[0];
7426                         action_flags |= MLX5_FLOW_ACTION_RSS;
7427                         ++actions_n;
7428                         break;
7429                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7430                         ret =
7431                         mlx5_flow_validate_action_default_miss(action_flags,
7432                                         attr, error);
7433                         if (ret < 0)
7434                                 return ret;
7435                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7436                         ++actions_n;
7437                         break;
7438                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7439                         shared_count = true;
7440                         /* fall-through. */
7441                 case RTE_FLOW_ACTION_TYPE_COUNT:
7442                         ret = flow_dv_validate_action_count(dev, shared_count,
7443                                                             action_flags,
7444                                                             error);
7445                         if (ret < 0)
7446                                 return ret;
7447                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7448                         ++actions_n;
7449                         break;
7450                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7451                         if (flow_dv_validate_action_pop_vlan(dev,
7452                                                              action_flags,
7453                                                              actions,
7454                                                              item_flags, attr,
7455                                                              error))
7456                                 return -rte_errno;
7457                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7458                                 modify_after_mirror = 1;
7459                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7460                         ++actions_n;
7461                         break;
7462                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7463                         ret = flow_dv_validate_action_push_vlan(dev,
7464                                                                 action_flags,
7465                                                                 vlan_m,
7466                                                                 actions, attr,
7467                                                                 error);
7468                         if (ret < 0)
7469                                 return ret;
7470                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7471                                 modify_after_mirror = 1;
7472                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7473                         ++actions_n;
7474                         break;
7475                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7476                         ret = flow_dv_validate_action_set_vlan_pcp
7477                                                 (action_flags, actions, error);
7478                         if (ret < 0)
7479                                 return ret;
7480                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7481                                 modify_after_mirror = 1;
7482                         /* Count PCP with push_vlan command. */
7483                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7484                         break;
7485                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7486                         ret = flow_dv_validate_action_set_vlan_vid
7487                                                 (item_flags, action_flags,
7488                                                  actions, error);
7489                         if (ret < 0)
7490                                 return ret;
7491                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7492                                 modify_after_mirror = 1;
7493                         /* Count VID with push_vlan command. */
7494                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7495                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7496                         break;
7497                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7498                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7499                         ret = flow_dv_validate_action_l2_encap(dev,
7500                                                                action_flags,
7501                                                                actions, attr,
7502                                                                error);
7503                         if (ret < 0)
7504                                 return ret;
7505                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7506                         ++actions_n;
7507                         break;
7508                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7509                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7510                         ret = flow_dv_validate_action_decap(dev, action_flags,
7511                                                             actions, item_flags,
7512                                                             attr, error);
7513                         if (ret < 0)
7514                                 return ret;
7515                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7516                                 modify_after_mirror = 1;
7517                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7518                         ++actions_n;
7519                         break;
7520                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7521                         ret = flow_dv_validate_action_raw_encap_decap
7522                                 (dev, NULL, actions->conf, attr, &action_flags,
7523                                  &actions_n, actions, item_flags, error);
7524                         if (ret < 0)
7525                                 return ret;
7526                         break;
7527                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7528                         decap = actions->conf;
7529                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7530                                 ;
7531                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7532                                 encap = NULL;
7533                                 actions--;
7534                         } else {
7535                                 encap = actions->conf;
7536                         }
7537                         ret = flow_dv_validate_action_raw_encap_decap
7538                                            (dev,
7539                                             decap ? decap : &empty_decap, encap,
7540                                             attr, &action_flags, &actions_n,
7541                                             actions, item_flags, error);
7542                         if (ret < 0)
7543                                 return ret;
7544                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7545                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7546                                 modify_after_mirror = 1;
7547                         break;
7548                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7549                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7550                         ret = flow_dv_validate_action_modify_mac(action_flags,
7551                                                                  actions,
7552                                                                  item_flags,
7553                                                                  error);
7554                         if (ret < 0)
7555                                 return ret;
7556                         /* Count all modify-header actions as one action. */
7557                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7558                                 ++actions_n;
7559                         action_flags |= actions->type ==
7560                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7561                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7562                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7563                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7564                                 modify_after_mirror = 1;
7565                         /*
7566                          * Even if the source and destination MAC addresses have
7567                          * overlap in the header with 4B alignment, the convert
7568                          * function will handle them separately and 4 SW actions
7569                          * will be created. And 2 actions will be added each
7570                          * time no matter how many bytes of address will be set.
7571                          */
7572                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7573                         break;
7574                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7575                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7576                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7577                                                                   actions,
7578                                                                   item_flags,
7579                                                                   error);
7580                         if (ret < 0)
7581                                 return ret;
7582                         /* Count all modify-header actions as one action. */
7583                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7584                                 ++actions_n;
7585                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7586                                 modify_after_mirror = 1;
7587                         action_flags |= actions->type ==
7588                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7589                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7590                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7591                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7592                         break;
7593                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7594                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7595                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7596                                                                   actions,
7597                                                                   item_flags,
7598                                                                   error);
7599                         if (ret < 0)
7600                                 return ret;
7601                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7602                                 return rte_flow_error_set(error, ENOTSUP,
7603                                         RTE_FLOW_ERROR_TYPE_ACTION,
7604                                         actions,
7605                                         "Can't change header "
7606                                         "with ICMPv6 proto");
7607                         /* Count all modify-header actions as one action. */
7608                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7609                                 ++actions_n;
7610                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7611                                 modify_after_mirror = 1;
7612                         action_flags |= actions->type ==
7613                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7614                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7615                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7616                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7617                         break;
7618                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7619                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7620                         ret = flow_dv_validate_action_modify_tp(action_flags,
7621                                                                 actions,
7622                                                                 item_flags,
7623                                                                 error);
7624                         if (ret < 0)
7625                                 return ret;
7626                         /* Count all modify-header actions as one action. */
7627                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7628                                 ++actions_n;
7629                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7630                                 modify_after_mirror = 1;
7631                         action_flags |= actions->type ==
7632                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7633                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7634                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7635                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7636                         break;
7637                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7638                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7639                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7640                                                                  actions,
7641                                                                  item_flags,
7642                                                                  error);
7643                         if (ret < 0)
7644                                 return ret;
7645                         /* Count all modify-header actions as one action. */
7646                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7647                                 ++actions_n;
7648                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7649                                 modify_after_mirror = 1;
7650                         action_flags |= actions->type ==
7651                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7652                                                 MLX5_FLOW_ACTION_SET_TTL :
7653                                                 MLX5_FLOW_ACTION_DEC_TTL;
7654                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7655                         break;
7656                 case RTE_FLOW_ACTION_TYPE_JUMP:
7657                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7658                                                            action_flags,
7659                                                            attr, external,
7660                                                            error);
7661                         if (ret)
7662                                 return ret;
7663                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7664                             fdb_mirror_limit)
7665                                 return rte_flow_error_set(error, EINVAL,
7666                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7667                                                   NULL,
7668                                                   "sample and jump action combination is not supported");
7669                         ++actions_n;
7670                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7671                         break;
7672                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7673                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7674                         ret = flow_dv_validate_action_modify_tcp_seq
7675                                                                 (action_flags,
7676                                                                  actions,
7677                                                                  item_flags,
7678                                                                  error);
7679                         if (ret < 0)
7680                                 return ret;
7681                         /* Count all modify-header actions as one action. */
7682                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7683                                 ++actions_n;
7684                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7685                                 modify_after_mirror = 1;
7686                         action_flags |= actions->type ==
7687                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7688                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7689                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7690                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7691                         break;
7692                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7693                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7694                         ret = flow_dv_validate_action_modify_tcp_ack
7695                                                                 (action_flags,
7696                                                                  actions,
7697                                                                  item_flags,
7698                                                                  error);
7699                         if (ret < 0)
7700                                 return ret;
7701                         /* Count all modify-header actions as one action. */
7702                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7703                                 ++actions_n;
7704                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7705                                 modify_after_mirror = 1;
7706                         action_flags |= actions->type ==
7707                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7708                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7709                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7710                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7711                         break;
7712                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7713                         break;
7714                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7715                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7716                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7717                         break;
7718                 case RTE_FLOW_ACTION_TYPE_METER:
7719                         ret = mlx5_flow_validate_action_meter(dev,
7720                                                               action_flags,
7721                                                               item_flags,
7722                                                               actions, attr,
7723                                                               port_id_item,
7724                                                               &def_policy,
7725                                                               error);
7726                         if (ret < 0)
7727                                 return ret;
7728                         action_flags |= MLX5_FLOW_ACTION_METER;
7729                         if (!def_policy)
7730                                 action_flags |=
7731                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7732                         ++actions_n;
7733                         /* Meter action will add one more TAG action. */
7734                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7735                         break;
7736                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7737                         if (!attr->transfer && !attr->group)
7738                                 return rte_flow_error_set(error, ENOTSUP,
7739                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7740                                                                            NULL,
7741                           "Shared ASO age action is not supported for group 0");
7742                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7743                                 return rte_flow_error_set
7744                                                   (error, EINVAL,
7745                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7746                                                    NULL,
7747                                                    "duplicate age actions set");
7748                         action_flags |= MLX5_FLOW_ACTION_AGE;
7749                         ++actions_n;
7750                         break;
7751                 case RTE_FLOW_ACTION_TYPE_AGE:
7752                         ret = flow_dv_validate_action_age(action_flags,
7753                                                           actions, dev,
7754                                                           error);
7755                         if (ret < 0)
7756                                 return ret;
7757                         /*
7758                          * Validate the regular AGE action (using counter)
7759                          * mutual exclusion with share counter actions.
7760                          */
7761                         if (!priv->sh->flow_hit_aso_en) {
7762                                 if (shared_count)
7763                                         return rte_flow_error_set
7764                                                 (error, EINVAL,
7765                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7766                                                 NULL,
7767                                                 "old age and shared count combination is not supported");
7768                                 if (sample_count)
7769                                         return rte_flow_error_set
7770                                                 (error, EINVAL,
7771                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7772                                                 NULL,
7773                                                 "old age action and count must be in the same sub flow");
7774                         }
7775                         action_flags |= MLX5_FLOW_ACTION_AGE;
7776                         ++actions_n;
7777                         break;
7778                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7779                         ret = flow_dv_validate_action_modify_ipv4_dscp
7780                                                          (action_flags,
7781                                                           actions,
7782                                                           item_flags,
7783                                                           error);
7784                         if (ret < 0)
7785                                 return ret;
7786                         /* Count all modify-header actions as one action. */
7787                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7788                                 ++actions_n;
7789                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7790                                 modify_after_mirror = 1;
7791                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7792                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7793                         break;
7794                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7795                         ret = flow_dv_validate_action_modify_ipv6_dscp
7796                                                                 (action_flags,
7797                                                                  actions,
7798                                                                  item_flags,
7799                                                                  error);
7800                         if (ret < 0)
7801                                 return ret;
7802                         /* Count all modify-header actions as one action. */
7803                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7804                                 ++actions_n;
7805                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7806                                 modify_after_mirror = 1;
7807                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7808                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7809                         break;
7810                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7811                         ret = flow_dv_validate_action_sample(&action_flags,
7812                                                              actions, dev,
7813                                                              attr, item_flags,
7814                                                              rss, &sample_rss,
7815                                                              &sample_count,
7816                                                              &fdb_mirror_limit,
7817                                                              error);
7818                         if (ret < 0)
7819                                 return ret;
7820                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7821                         ++actions_n;
7822                         break;
7823                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7824                         ret = flow_dv_validate_action_modify_field(dev,
7825                                                                    action_flags,
7826                                                                    actions,
7827                                                                    attr,
7828                                                                    error);
7829                         if (ret < 0)
7830                                 return ret;
7831                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7832                                 modify_after_mirror = 1;
7833                         /* Count all modify-header actions as one action. */
7834                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7835                                 ++actions_n;
7836                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7837                         rw_act_num += ret;
7838                         break;
7839                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7840                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7841                                                              item_flags, attr,
7842                                                              error);
7843                         if (ret < 0)
7844                                 return ret;
7845                         action_flags |= MLX5_FLOW_ACTION_CT;
7846                         break;
7847                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7848                         /* tunnel offload action was processed before
7849                          * list it here as a supported type
7850                          */
7851                         break;
7852                 default:
7853                         return rte_flow_error_set(error, ENOTSUP,
7854                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7855                                                   actions,
7856                                                   "action not supported");
7857                 }
7858         }
7859         /*
7860          * Validate actions in flow rules
7861          * - Explicit decap action is prohibited by the tunnel offload API.
7862          * - Drop action in tunnel steer rule is prohibited by the API.
7863          * - Application cannot use MARK action because it's value can mask
7864          *   tunnel default miss notification.
7865          * - JUMP in tunnel match rule has no support in current PMD
7866          *   implementation.
7867          * - TAG & META are reserved for future uses.
7868          */
7869         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7870                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7871                                             MLX5_FLOW_ACTION_MARK     |
7872                                             MLX5_FLOW_ACTION_SET_TAG  |
7873                                             MLX5_FLOW_ACTION_SET_META |
7874                                             MLX5_FLOW_ACTION_DROP;
7875
7876                 if (action_flags & bad_actions_mask)
7877                         return rte_flow_error_set
7878                                         (error, EINVAL,
7879                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7880                                         "Invalid RTE action in tunnel "
7881                                         "set decap rule");
7882                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7883                         return rte_flow_error_set
7884                                         (error, EINVAL,
7885                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7886                                         "tunnel set decap rule must terminate "
7887                                         "with JUMP");
7888                 if (!attr->ingress)
7889                         return rte_flow_error_set
7890                                         (error, EINVAL,
7891                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7892                                         "tunnel flows for ingress traffic only");
7893         }
7894         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7895                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7896                                             MLX5_FLOW_ACTION_MARK    |
7897                                             MLX5_FLOW_ACTION_SET_TAG |
7898                                             MLX5_FLOW_ACTION_SET_META;
7899
7900                 if (action_flags & bad_actions_mask)
7901                         return rte_flow_error_set
7902                                         (error, EINVAL,
7903                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7904                                         "Invalid RTE action in tunnel "
7905                                         "set match rule");
7906         }
7907         /*
7908          * Validate the drop action mutual exclusion with other actions.
7909          * Drop action is mutually-exclusive with any other action, except for
7910          * Count action.
7911          * Drop action compatibility with tunnel offload was already validated.
7912          */
7913         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7914                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7915         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7916             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7917                 return rte_flow_error_set(error, EINVAL,
7918                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7919                                           "Drop action is mutually-exclusive "
7920                                           "with any other action, except for "
7921                                           "Count action");
7922         /* Eswitch has few restrictions on using items and actions */
7923         if (attr->transfer) {
7924                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7925                     action_flags & MLX5_FLOW_ACTION_FLAG)
7926                         return rte_flow_error_set(error, ENOTSUP,
7927                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7928                                                   NULL,
7929                                                   "unsupported action FLAG");
7930                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7931                     action_flags & MLX5_FLOW_ACTION_MARK)
7932                         return rte_flow_error_set(error, ENOTSUP,
7933                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7934                                                   NULL,
7935                                                   "unsupported action MARK");
7936                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7937                         return rte_flow_error_set(error, ENOTSUP,
7938                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7939                                                   NULL,
7940                                                   "unsupported action QUEUE");
7941                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7942                         return rte_flow_error_set(error, ENOTSUP,
7943                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7944                                                   NULL,
7945                                                   "unsupported action RSS");
7946                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7947                         return rte_flow_error_set(error, EINVAL,
7948                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7949                                                   actions,
7950                                                   "no fate action is found");
7951         } else {
7952                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7953                         return rte_flow_error_set(error, EINVAL,
7954                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7955                                                   actions,
7956                                                   "no fate action is found");
7957         }
7958         /*
7959          * Continue validation for Xcap and VLAN actions.
7960          * If hairpin is working in explicit TX rule mode, there is no actions
7961          * splitting and the validation of hairpin ingress flow should be the
7962          * same as other standard flows.
7963          */
7964         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7965                              MLX5_FLOW_VLAN_ACTIONS)) &&
7966             (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index) ||
7967              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7968              conf->tx_explicit != 0))) {
7969                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7970                     MLX5_FLOW_XCAP_ACTIONS)
7971                         return rte_flow_error_set(error, ENOTSUP,
7972                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7973                                                   NULL, "encap and decap "
7974                                                   "combination aren't supported");
7975                 if (!attr->transfer && attr->ingress) {
7976                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7977                                 return rte_flow_error_set
7978                                                 (error, ENOTSUP,
7979                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7980                                                  NULL, "encap is not supported"
7981                                                  " for ingress traffic");
7982                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7983                                 return rte_flow_error_set
7984                                                 (error, ENOTSUP,
7985                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7986                                                  NULL, "push VLAN action not "
7987                                                  "supported for ingress");
7988                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7989                                         MLX5_FLOW_VLAN_ACTIONS)
7990                                 return rte_flow_error_set
7991                                                 (error, ENOTSUP,
7992                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7993                                                  NULL, "no support for "
7994                                                  "multiple VLAN actions");
7995                 }
7996         }
7997         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7998                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7999                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
8000                         attr->ingress)
8001                         return rte_flow_error_set
8002                                 (error, ENOTSUP,
8003                                 RTE_FLOW_ERROR_TYPE_ACTION,
8004                                 NULL, "fate action not supported for "
8005                                 "meter with policy");
8006                 if (attr->egress) {
8007                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
8008                                 return rte_flow_error_set
8009                                         (error, ENOTSUP,
8010                                         RTE_FLOW_ERROR_TYPE_ACTION,
8011                                         NULL, "modify header action in egress "
8012                                         "cannot be done before meter action");
8013                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8014                                 return rte_flow_error_set
8015                                         (error, ENOTSUP,
8016                                         RTE_FLOW_ERROR_TYPE_ACTION,
8017                                         NULL, "encap action in egress "
8018                                         "cannot be done before meter action");
8019                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8020                                 return rte_flow_error_set
8021                                         (error, ENOTSUP,
8022                                         RTE_FLOW_ERROR_TYPE_ACTION,
8023                                         NULL, "push vlan action in egress "
8024                                         "cannot be done before meter action");
8025                 }
8026         }
8027         /*
8028          * Hairpin flow will add one more TAG action in TX implicit mode.
8029          * In TX explicit mode, there will be no hairpin flow ID.
8030          */
8031         if (hairpin > 0)
8032                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8033         /* extra metadata enabled: one more TAG action will be add. */
8034         if (dev_conf->dv_flow_en &&
8035             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8036             mlx5_flow_ext_mreg_supported(dev))
8037                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8038         if (rw_act_num >
8039                         flow_dv_modify_hdr_action_max(dev, is_root)) {
8040                 return rte_flow_error_set(error, ENOTSUP,
8041                                           RTE_FLOW_ERROR_TYPE_ACTION,
8042                                           NULL, "too many header modify"
8043                                           " actions to support");
8044         }
8045         /* Eswitch egress mirror and modify flow has limitation on CX5 */
8046         if (fdb_mirror_limit && modify_after_mirror)
8047                 return rte_flow_error_set(error, EINVAL,
8048                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8049                                 "sample before modify action is not supported");
8050         return 0;
8051 }
8052
8053 /**
8054  * Internal preparation function. Allocates the DV flow size,
8055  * this size is constant.
8056  *
8057  * @param[in] dev
8058  *   Pointer to the rte_eth_dev structure.
8059  * @param[in] attr
8060  *   Pointer to the flow attributes.
8061  * @param[in] items
8062  *   Pointer to the list of items.
8063  * @param[in] actions
8064  *   Pointer to the list of actions.
8065  * @param[out] error
8066  *   Pointer to the error structure.
8067  *
8068  * @return
8069  *   Pointer to mlx5_flow object on success,
8070  *   otherwise NULL and rte_errno is set.
8071  */
8072 static struct mlx5_flow *
8073 flow_dv_prepare(struct rte_eth_dev *dev,
8074                 const struct rte_flow_attr *attr __rte_unused,
8075                 const struct rte_flow_item items[] __rte_unused,
8076                 const struct rte_flow_action actions[] __rte_unused,
8077                 struct rte_flow_error *error)
8078 {
8079         uint32_t handle_idx = 0;
8080         struct mlx5_flow *dev_flow;
8081         struct mlx5_flow_handle *dev_handle;
8082         struct mlx5_priv *priv = dev->data->dev_private;
8083         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8084
8085         MLX5_ASSERT(wks);
8086         wks->skip_matcher_reg = 0;
8087         wks->policy = NULL;
8088         wks->final_policy = NULL;
8089         /* In case of corrupting the memory. */
8090         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8091                 rte_flow_error_set(error, ENOSPC,
8092                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8093                                    "not free temporary device flow");
8094                 return NULL;
8095         }
8096         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8097                                    &handle_idx);
8098         if (!dev_handle) {
8099                 rte_flow_error_set(error, ENOMEM,
8100                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8101                                    "not enough memory to create flow handle");
8102                 return NULL;
8103         }
8104         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8105         dev_flow = &wks->flows[wks->flow_idx++];
8106         memset(dev_flow, 0, sizeof(*dev_flow));
8107         dev_flow->handle = dev_handle;
8108         dev_flow->handle_idx = handle_idx;
8109         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8110         dev_flow->ingress = attr->ingress;
8111         dev_flow->dv.transfer = attr->transfer;
8112         return dev_flow;
8113 }
8114
8115 #ifdef RTE_LIBRTE_MLX5_DEBUG
8116 /**
8117  * Sanity check for match mask and value. Similar to check_valid_spec() in
8118  * kernel driver. If unmasked bit is present in value, it returns failure.
8119  *
8120  * @param match_mask
8121  *   pointer to match mask buffer.
8122  * @param match_value
8123  *   pointer to match value buffer.
8124  *
8125  * @return
8126  *   0 if valid, -EINVAL otherwise.
8127  */
8128 static int
8129 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8130 {
8131         uint8_t *m = match_mask;
8132         uint8_t *v = match_value;
8133         unsigned int i;
8134
8135         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8136                 if (v[i] & ~m[i]) {
8137                         DRV_LOG(ERR,
8138                                 "match_value differs from match_criteria"
8139                                 " %p[%u] != %p[%u]",
8140                                 match_value, i, match_mask, i);
8141                         return -EINVAL;
8142                 }
8143         }
8144         return 0;
8145 }
8146 #endif
8147
8148 /**
8149  * Add match of ip_version.
8150  *
8151  * @param[in] group
8152  *   Flow group.
8153  * @param[in] headers_v
8154  *   Values header pointer.
8155  * @param[in] headers_m
8156  *   Masks header pointer.
8157  * @param[in] ip_version
8158  *   The IP version to set.
8159  */
8160 static inline void
8161 flow_dv_set_match_ip_version(uint32_t group,
8162                              void *headers_v,
8163                              void *headers_m,
8164                              uint8_t ip_version)
8165 {
8166         if (group == 0)
8167                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8168         else
8169                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8170                          ip_version);
8171         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8172         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8173         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8174 }
8175
8176 /**
8177  * Add Ethernet item to matcher and to the value.
8178  *
8179  * @param[in, out] matcher
8180  *   Flow matcher.
8181  * @param[in, out] key
8182  *   Flow matcher value.
8183  * @param[in] item
8184  *   Flow pattern to translate.
8185  * @param[in] inner
8186  *   Item is inner pattern.
8187  */
8188 static void
8189 flow_dv_translate_item_eth(void *matcher, void *key,
8190                            const struct rte_flow_item *item, int inner,
8191                            uint32_t group)
8192 {
8193         const struct rte_flow_item_eth *eth_m = item->mask;
8194         const struct rte_flow_item_eth *eth_v = item->spec;
8195         const struct rte_flow_item_eth nic_mask = {
8196                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8197                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8198                 .type = RTE_BE16(0xffff),
8199                 .has_vlan = 0,
8200         };
8201         void *hdrs_m;
8202         void *hdrs_v;
8203         char *l24_v;
8204         unsigned int i;
8205
8206         if (!eth_v)
8207                 return;
8208         if (!eth_m)
8209                 eth_m = &nic_mask;
8210         if (inner) {
8211                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8212                                          inner_headers);
8213                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8214         } else {
8215                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8216                                          outer_headers);
8217                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8218         }
8219         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8220                &eth_m->dst, sizeof(eth_m->dst));
8221         /* The value must be in the range of the mask. */
8222         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8223         for (i = 0; i < sizeof(eth_m->dst); ++i)
8224                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8225         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8226                &eth_m->src, sizeof(eth_m->src));
8227         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8228         /* The value must be in the range of the mask. */
8229         for (i = 0; i < sizeof(eth_m->dst); ++i)
8230                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8231         /*
8232          * HW supports match on one Ethertype, the Ethertype following the last
8233          * VLAN tag of the packet (see PRM).
8234          * Set match on ethertype only if ETH header is not followed by VLAN.
8235          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8236          * ethertype, and use ip_version field instead.
8237          * eCPRI over Ether layer will use type value 0xAEFE.
8238          */
8239         if (eth_m->type == 0xFFFF) {
8240                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8241                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8242                 switch (eth_v->type) {
8243                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8244                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8245                         return;
8246                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8247                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8248                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8249                         return;
8250                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8251                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8252                         return;
8253                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8254                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8255                         return;
8256                 default:
8257                         break;
8258                 }
8259         }
8260         if (eth_m->has_vlan) {
8261                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8262                 if (eth_v->has_vlan) {
8263                         /*
8264                          * Here, when also has_more_vlan field in VLAN item is
8265                          * not set, only single-tagged packets will be matched.
8266                          */
8267                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8268                         return;
8269                 }
8270         }
8271         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8272                  rte_be_to_cpu_16(eth_m->type));
8273         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8274         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8275 }
8276
8277 /**
8278  * Add VLAN item to matcher and to the value.
8279  *
8280  * @param[in, out] dev_flow
8281  *   Flow descriptor.
8282  * @param[in, out] matcher
8283  *   Flow matcher.
8284  * @param[in, out] key
8285  *   Flow matcher value.
8286  * @param[in] item
8287  *   Flow pattern to translate.
8288  * @param[in] inner
8289  *   Item is inner pattern.
8290  */
8291 static void
8292 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8293                             void *matcher, void *key,
8294                             const struct rte_flow_item *item,
8295                             int inner, uint32_t group)
8296 {
8297         const struct rte_flow_item_vlan *vlan_m = item->mask;
8298         const struct rte_flow_item_vlan *vlan_v = item->spec;
8299         void *hdrs_m;
8300         void *hdrs_v;
8301         uint16_t tci_m;
8302         uint16_t tci_v;
8303
8304         if (inner) {
8305                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8306                                          inner_headers);
8307                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8308         } else {
8309                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8310                                          outer_headers);
8311                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8312                 /*
8313                  * This is workaround, masks are not supported,
8314                  * and pre-validated.
8315                  */
8316                 if (vlan_v)
8317                         dev_flow->handle->vf_vlan.tag =
8318                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8319         }
8320         /*
8321          * When VLAN item exists in flow, mark packet as tagged,
8322          * even if TCI is not specified.
8323          */
8324         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8325                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8326                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8327         }
8328         if (!vlan_v)
8329                 return;
8330         if (!vlan_m)
8331                 vlan_m = &rte_flow_item_vlan_mask;
8332         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8333         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8334         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8335         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8336         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8337         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8338         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8339         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8340         /*
8341          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8342          * ethertype, and use ip_version field instead.
8343          */
8344         if (vlan_m->inner_type == 0xFFFF) {
8345                 switch (vlan_v->inner_type) {
8346                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8347                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8348                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8349                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8350                         return;
8351                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8352                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8353                         return;
8354                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8355                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8356                         return;
8357                 default:
8358                         break;
8359                 }
8360         }
8361         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8362                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8363                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8364                 /* Only one vlan_tag bit can be set. */
8365                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8366                 return;
8367         }
8368         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8369                  rte_be_to_cpu_16(vlan_m->inner_type));
8370         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8371                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8372 }
8373
8374 /**
8375  * Add IPV4 item to matcher and to the value.
8376  *
8377  * @param[in, out] matcher
8378  *   Flow matcher.
8379  * @param[in, out] key
8380  *   Flow matcher value.
8381  * @param[in] item
8382  *   Flow pattern to translate.
8383  * @param[in] inner
8384  *   Item is inner pattern.
8385  * @param[in] group
8386  *   The group to insert the rule.
8387  */
8388 static void
8389 flow_dv_translate_item_ipv4(void *matcher, void *key,
8390                             const struct rte_flow_item *item,
8391                             int inner, uint32_t group)
8392 {
8393         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8394         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8395         const struct rte_flow_item_ipv4 nic_mask = {
8396                 .hdr = {
8397                         .src_addr = RTE_BE32(0xffffffff),
8398                         .dst_addr = RTE_BE32(0xffffffff),
8399                         .type_of_service = 0xff,
8400                         .next_proto_id = 0xff,
8401                         .time_to_live = 0xff,
8402                 },
8403         };
8404         void *headers_m;
8405         void *headers_v;
8406         char *l24_m;
8407         char *l24_v;
8408         uint8_t tos, ihl_m, ihl_v;
8409
8410         if (inner) {
8411                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8412                                          inner_headers);
8413                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8414         } else {
8415                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8416                                          outer_headers);
8417                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8418         }
8419         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8420         if (!ipv4_v)
8421                 return;
8422         if (!ipv4_m)
8423                 ipv4_m = &nic_mask;
8424         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8425                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8426         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8427                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8428         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8429         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8430         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8431                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8432         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8433                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8434         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8435         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8436         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8437         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8438         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8439         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8440         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8441         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8442                  ipv4_m->hdr.type_of_service);
8443         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8444         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8445                  ipv4_m->hdr.type_of_service >> 2);
8446         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8447         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8448                  ipv4_m->hdr.next_proto_id);
8449         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8450                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8451         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8452                  ipv4_m->hdr.time_to_live);
8453         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8454                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8455         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8456                  !!(ipv4_m->hdr.fragment_offset));
8457         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8458                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8459 }
8460
8461 /**
8462  * Add IPV6 item to matcher and to the value.
8463  *
8464  * @param[in, out] matcher
8465  *   Flow matcher.
8466  * @param[in, out] key
8467  *   Flow matcher value.
8468  * @param[in] item
8469  *   Flow pattern to translate.
8470  * @param[in] inner
8471  *   Item is inner pattern.
8472  * @param[in] group
8473  *   The group to insert the rule.
8474  */
8475 static void
8476 flow_dv_translate_item_ipv6(void *matcher, void *key,
8477                             const struct rte_flow_item *item,
8478                             int inner, uint32_t group)
8479 {
8480         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8481         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8482         const struct rte_flow_item_ipv6 nic_mask = {
8483                 .hdr = {
8484                         .src_addr =
8485                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8486                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8487                         .dst_addr =
8488                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8489                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8490                         .vtc_flow = RTE_BE32(0xffffffff),
8491                         .proto = 0xff,
8492                         .hop_limits = 0xff,
8493                 },
8494         };
8495         void *headers_m;
8496         void *headers_v;
8497         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8498         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8499         char *l24_m;
8500         char *l24_v;
8501         uint32_t vtc_m;
8502         uint32_t vtc_v;
8503         int i;
8504         int size;
8505
8506         if (inner) {
8507                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8508                                          inner_headers);
8509                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8510         } else {
8511                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8512                                          outer_headers);
8513                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8514         }
8515         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8516         if (!ipv6_v)
8517                 return;
8518         if (!ipv6_m)
8519                 ipv6_m = &nic_mask;
8520         size = sizeof(ipv6_m->hdr.dst_addr);
8521         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8522                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8523         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8524                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8525         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8526         for (i = 0; i < size; ++i)
8527                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8528         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8529                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8530         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8531                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8532         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8533         for (i = 0; i < size; ++i)
8534                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8535         /* TOS. */
8536         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8537         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8538         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8539         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8540         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8541         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8542         /* Label. */
8543         if (inner) {
8544                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8545                          vtc_m);
8546                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8547                          vtc_v);
8548         } else {
8549                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8550                          vtc_m);
8551                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8552                          vtc_v);
8553         }
8554         /* Protocol. */
8555         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8556                  ipv6_m->hdr.proto);
8557         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8558                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8559         /* Hop limit. */
8560         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8561                  ipv6_m->hdr.hop_limits);
8562         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8563                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8564         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8565                  !!(ipv6_m->has_frag_ext));
8566         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8567                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8568 }
8569
8570 /**
8571  * Add IPV6 fragment extension item to matcher and to the value.
8572  *
8573  * @param[in, out] matcher
8574  *   Flow matcher.
8575  * @param[in, out] key
8576  *   Flow matcher value.
8577  * @param[in] item
8578  *   Flow pattern to translate.
8579  * @param[in] inner
8580  *   Item is inner pattern.
8581  */
8582 static void
8583 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8584                                      const struct rte_flow_item *item,
8585                                      int inner)
8586 {
8587         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8588         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8589         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8590                 .hdr = {
8591                         .next_header = 0xff,
8592                         .frag_data = RTE_BE16(0xffff),
8593                 },
8594         };
8595         void *headers_m;
8596         void *headers_v;
8597
8598         if (inner) {
8599                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8600                                          inner_headers);
8601                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8602         } else {
8603                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8604                                          outer_headers);
8605                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8606         }
8607         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8608         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8609         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8610         if (!ipv6_frag_ext_v)
8611                 return;
8612         if (!ipv6_frag_ext_m)
8613                 ipv6_frag_ext_m = &nic_mask;
8614         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8615                  ipv6_frag_ext_m->hdr.next_header);
8616         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8617                  ipv6_frag_ext_v->hdr.next_header &
8618                  ipv6_frag_ext_m->hdr.next_header);
8619 }
8620
8621 /**
8622  * Add TCP item to matcher and to the value.
8623  *
8624  * @param[in, out] matcher
8625  *   Flow matcher.
8626  * @param[in, out] key
8627  *   Flow matcher value.
8628  * @param[in] item
8629  *   Flow pattern to translate.
8630  * @param[in] inner
8631  *   Item is inner pattern.
8632  */
8633 static void
8634 flow_dv_translate_item_tcp(void *matcher, void *key,
8635                            const struct rte_flow_item *item,
8636                            int inner)
8637 {
8638         const struct rte_flow_item_tcp *tcp_m = item->mask;
8639         const struct rte_flow_item_tcp *tcp_v = item->spec;
8640         void *headers_m;
8641         void *headers_v;
8642
8643         if (inner) {
8644                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8645                                          inner_headers);
8646                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8647         } else {
8648                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8649                                          outer_headers);
8650                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8651         }
8652         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8653         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8654         if (!tcp_v)
8655                 return;
8656         if (!tcp_m)
8657                 tcp_m = &rte_flow_item_tcp_mask;
8658         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8659                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8660         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8661                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8662         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8663                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8664         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8665                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8666         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8667                  tcp_m->hdr.tcp_flags);
8668         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8669                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8670 }
8671
8672 /**
8673  * Add UDP item to matcher and to the value.
8674  *
8675  * @param[in, out] matcher
8676  *   Flow matcher.
8677  * @param[in, out] key
8678  *   Flow matcher value.
8679  * @param[in] item
8680  *   Flow pattern to translate.
8681  * @param[in] inner
8682  *   Item is inner pattern.
8683  */
8684 static void
8685 flow_dv_translate_item_udp(void *matcher, void *key,
8686                            const struct rte_flow_item *item,
8687                            int inner)
8688 {
8689         const struct rte_flow_item_udp *udp_m = item->mask;
8690         const struct rte_flow_item_udp *udp_v = item->spec;
8691         void *headers_m;
8692         void *headers_v;
8693
8694         if (inner) {
8695                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8696                                          inner_headers);
8697                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8698         } else {
8699                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8700                                          outer_headers);
8701                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8702         }
8703         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8704         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8705         if (!udp_v)
8706                 return;
8707         if (!udp_m)
8708                 udp_m = &rte_flow_item_udp_mask;
8709         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8710                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8711         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8712                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8713         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8714                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8715         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8716                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8717 }
8718
8719 /**
8720  * Add GRE optional Key item to matcher and to the value.
8721  *
8722  * @param[in, out] matcher
8723  *   Flow matcher.
8724  * @param[in, out] key
8725  *   Flow matcher value.
8726  * @param[in] item
8727  *   Flow pattern to translate.
8728  * @param[in] inner
8729  *   Item is inner pattern.
8730  */
8731 static void
8732 flow_dv_translate_item_gre_key(void *matcher, void *key,
8733                                    const struct rte_flow_item *item)
8734 {
8735         const rte_be32_t *key_m = item->mask;
8736         const rte_be32_t *key_v = item->spec;
8737         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8738         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8739         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8740
8741         /* GRE K bit must be on and should already be validated */
8742         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8743         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8744         if (!key_v)
8745                 return;
8746         if (!key_m)
8747                 key_m = &gre_key_default_mask;
8748         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8749                  rte_be_to_cpu_32(*key_m) >> 8);
8750         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8751                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8752         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8753                  rte_be_to_cpu_32(*key_m) & 0xFF);
8754         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8755                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8756 }
8757
8758 /**
8759  * Add GRE item to matcher and to the value.
8760  *
8761  * @param[in, out] matcher
8762  *   Flow matcher.
8763  * @param[in, out] key
8764  *   Flow matcher value.
8765  * @param[in] item
8766  *   Flow pattern to translate.
8767  * @param[in] pattern_flags
8768  *   Accumulated pattern flags.
8769  */
8770 static void
8771 flow_dv_translate_item_gre(void *matcher, void *key,
8772                            const struct rte_flow_item *item,
8773                            uint64_t pattern_flags)
8774 {
8775         static const struct rte_flow_item_gre empty_gre = {0,};
8776         const struct rte_flow_item_gre *gre_m = item->mask;
8777         const struct rte_flow_item_gre *gre_v = item->spec;
8778         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8779         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8780         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8781         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8782         struct {
8783                 union {
8784                         __extension__
8785                         struct {
8786                                 uint16_t version:3;
8787                                 uint16_t rsvd0:9;
8788                                 uint16_t s_present:1;
8789                                 uint16_t k_present:1;
8790                                 uint16_t rsvd_bit1:1;
8791                                 uint16_t c_present:1;
8792                         };
8793                         uint16_t value;
8794                 };
8795         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8796         uint16_t protocol_m, protocol_v;
8797
8798         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8799         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8800         if (!gre_v) {
8801                 gre_v = &empty_gre;
8802                 gre_m = &empty_gre;
8803         } else {
8804                 if (!gre_m)
8805                         gre_m = &rte_flow_item_gre_mask;
8806         }
8807         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8808         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8809         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8810                  gre_crks_rsvd0_ver_m.c_present);
8811         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8812                  gre_crks_rsvd0_ver_v.c_present &
8813                  gre_crks_rsvd0_ver_m.c_present);
8814         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8815                  gre_crks_rsvd0_ver_m.k_present);
8816         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8817                  gre_crks_rsvd0_ver_v.k_present &
8818                  gre_crks_rsvd0_ver_m.k_present);
8819         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8820                  gre_crks_rsvd0_ver_m.s_present);
8821         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8822                  gre_crks_rsvd0_ver_v.s_present &
8823                  gre_crks_rsvd0_ver_m.s_present);
8824         protocol_m = rte_be_to_cpu_16(gre_m->protocol);
8825         protocol_v = rte_be_to_cpu_16(gre_v->protocol);
8826         if (!protocol_m) {
8827                 /* Force next protocol to prevent matchers duplication */
8828                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
8829                 if (protocol_v)
8830                         protocol_m = 0xFFFF;
8831         }
8832         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, protocol_m);
8833         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8834                  protocol_m & protocol_v);
8835 }
8836
8837 /**
8838  * Add GRE optional items to matcher and to the value.
8839  *
8840  * @param[in, out] matcher
8841  *   Flow matcher.
8842  * @param[in, out] key
8843  *   Flow matcher value.
8844  * @param[in] item
8845  *   Flow pattern to translate.
8846  * @param[in] gre_item
8847  *   Pointer to gre_item.
8848  * @param[in] pattern_flags
8849  *   Accumulated pattern flags.
8850  */
8851 static void
8852 flow_dv_translate_item_gre_option(void *matcher, void *key,
8853                                   const struct rte_flow_item *item,
8854                                   const struct rte_flow_item *gre_item,
8855                                   uint64_t pattern_flags)
8856 {
8857         const struct rte_flow_item_gre_opt *option_m = item->mask;
8858         const struct rte_flow_item_gre_opt *option_v = item->spec;
8859         const struct rte_flow_item_gre *gre_m = gre_item->mask;
8860         const struct rte_flow_item_gre *gre_v = gre_item->spec;
8861         static const struct rte_flow_item_gre empty_gre = {0};
8862         struct rte_flow_item gre_key_item;
8863         uint16_t c_rsvd0_ver_m, c_rsvd0_ver_v;
8864         uint16_t protocol_m, protocol_v;
8865         void *misc5_m;
8866         void *misc5_v;
8867
8868         /*
8869          * If only match key field, keep using misc for matching.
8870          * If need to match checksum or sequence, using misc5 and do
8871          * not need using misc.
8872          */
8873         if (!(option_m->sequence.sequence ||
8874               option_m->checksum_rsvd.checksum)) {
8875                 flow_dv_translate_item_gre(matcher, key, gre_item,
8876                                            pattern_flags);
8877                 gre_key_item.spec = &option_v->key.key;
8878                 gre_key_item.mask = &option_m->key.key;
8879                 flow_dv_translate_item_gre_key(matcher, key, &gre_key_item);
8880                 return;
8881         }
8882         if (!gre_v) {
8883                 gre_v = &empty_gre;
8884                 gre_m = &empty_gre;
8885         } else {
8886                 if (!gre_m)
8887                         gre_m = &rte_flow_item_gre_mask;
8888         }
8889         protocol_v = gre_v->protocol;
8890         protocol_m = gre_m->protocol;
8891         if (!protocol_m) {
8892                 /* Force next protocol to prevent matchers duplication */
8893                 uint16_t ether_type =
8894                         mlx5_translate_tunnel_etypes(pattern_flags);
8895                 if (ether_type) {
8896                         protocol_v = rte_be_to_cpu_16(ether_type);
8897                         protocol_m = UINT16_MAX;
8898                 }
8899         }
8900         c_rsvd0_ver_v = gre_v->c_rsvd0_ver;
8901         c_rsvd0_ver_m = gre_m->c_rsvd0_ver;
8902         if (option_m->sequence.sequence) {
8903                 c_rsvd0_ver_v |= RTE_BE16(0x1000);
8904                 c_rsvd0_ver_m |= RTE_BE16(0x1000);
8905         }
8906         if (option_m->key.key) {
8907                 c_rsvd0_ver_v |= RTE_BE16(0x2000);
8908                 c_rsvd0_ver_m |= RTE_BE16(0x2000);
8909         }
8910         if (option_m->checksum_rsvd.checksum) {
8911                 c_rsvd0_ver_v |= RTE_BE16(0x8000);
8912                 c_rsvd0_ver_m |= RTE_BE16(0x8000);
8913         }
8914         /*
8915          * Hardware parses GRE optional field into the fixed location,
8916          * do not need to adjust the tunnel dword indices.
8917          */
8918         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8919         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8920         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_0,
8921                  rte_be_to_cpu_32((c_rsvd0_ver_v | protocol_v << 16) &
8922                                   (c_rsvd0_ver_m | protocol_m << 16)));
8923         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_0,
8924                  rte_be_to_cpu_32(c_rsvd0_ver_m | protocol_m << 16));
8925         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_1,
8926                  rte_be_to_cpu_32(option_v->checksum_rsvd.checksum &
8927                                   option_m->checksum_rsvd.checksum));
8928         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_1,
8929                  rte_be_to_cpu_32(option_m->checksum_rsvd.checksum));
8930         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_2,
8931                  rte_be_to_cpu_32(option_v->key.key & option_m->key.key));
8932         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_2,
8933                  rte_be_to_cpu_32(option_m->key.key));
8934         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_3,
8935                  rte_be_to_cpu_32(option_v->sequence.sequence &
8936                                   option_m->sequence.sequence));
8937         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_3,
8938                  rte_be_to_cpu_32(option_m->sequence.sequence));
8939 }
8940
8941 /**
8942  * Add NVGRE item to matcher and to the value.
8943  *
8944  * @param[in, out] matcher
8945  *   Flow matcher.
8946  * @param[in, out] key
8947  *   Flow matcher value.
8948  * @param[in] item
8949  *   Flow pattern to translate.
8950  * @param[in] pattern_flags
8951  *   Accumulated pattern flags.
8952  */
8953 static void
8954 flow_dv_translate_item_nvgre(void *matcher, void *key,
8955                              const struct rte_flow_item *item,
8956                              unsigned long pattern_flags)
8957 {
8958         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8959         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8960         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8961         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8962         const char *tni_flow_id_m;
8963         const char *tni_flow_id_v;
8964         char *gre_key_m;
8965         char *gre_key_v;
8966         int size;
8967         int i;
8968
8969         /* For NVGRE, GRE header fields must be set with defined values. */
8970         const struct rte_flow_item_gre gre_spec = {
8971                 .c_rsvd0_ver = RTE_BE16(0x2000),
8972                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8973         };
8974         const struct rte_flow_item_gre gre_mask = {
8975                 .c_rsvd0_ver = RTE_BE16(0xB000),
8976                 .protocol = RTE_BE16(UINT16_MAX),
8977         };
8978         const struct rte_flow_item gre_item = {
8979                 .spec = &gre_spec,
8980                 .mask = &gre_mask,
8981                 .last = NULL,
8982         };
8983         flow_dv_translate_item_gre(matcher, key, &gre_item, pattern_flags);
8984         if (!nvgre_v)
8985                 return;
8986         if (!nvgre_m)
8987                 nvgre_m = &rte_flow_item_nvgre_mask;
8988         tni_flow_id_m = (const char *)nvgre_m->tni;
8989         tni_flow_id_v = (const char *)nvgre_v->tni;
8990         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8991         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8992         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8993         memcpy(gre_key_m, tni_flow_id_m, size);
8994         for (i = 0; i < size; ++i)
8995                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8996 }
8997
8998 /**
8999  * Add VXLAN item to matcher and to the value.
9000  *
9001  * @param[in] dev
9002  *   Pointer to the Ethernet device structure.
9003  * @param[in] attr
9004  *   Flow rule attributes.
9005  * @param[in, out] matcher
9006  *   Flow matcher.
9007  * @param[in, out] key
9008  *   Flow matcher value.
9009  * @param[in] item
9010  *   Flow pattern to translate.
9011  * @param[in] inner
9012  *   Item is inner pattern.
9013  */
9014 static void
9015 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
9016                              const struct rte_flow_attr *attr,
9017                              void *matcher, void *key,
9018                              const struct rte_flow_item *item,
9019                              int inner)
9020 {
9021         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
9022         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
9023         void *headers_m;
9024         void *headers_v;
9025         void *misc5_m;
9026         void *misc5_v;
9027         uint32_t *tunnel_header_v;
9028         uint32_t *tunnel_header_m;
9029         uint16_t dport;
9030         struct mlx5_priv *priv = dev->data->dev_private;
9031         const struct rte_flow_item_vxlan nic_mask = {
9032                 .vni = "\xff\xff\xff",
9033                 .rsvd1 = 0xff,
9034         };
9035
9036         if (inner) {
9037                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9038                                          inner_headers);
9039                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9040         } else {
9041                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9042                                          outer_headers);
9043                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9044         }
9045         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
9046                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
9047         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9048                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9049                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9050         }
9051         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
9052         if (!vxlan_v)
9053                 return;
9054         if (!vxlan_m) {
9055                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
9056                     (attr->group && !priv->sh->misc5_cap))
9057                         vxlan_m = &rte_flow_item_vxlan_mask;
9058                 else
9059                         vxlan_m = &nic_mask;
9060         }
9061         if ((priv->sh->steering_format_version ==
9062             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
9063             dport != MLX5_UDP_PORT_VXLAN) ||
9064             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
9065             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
9066                 void *misc_m;
9067                 void *misc_v;
9068                 char *vni_m;
9069                 char *vni_v;
9070                 int size;
9071                 int i;
9072                 misc_m = MLX5_ADDR_OF(fte_match_param,
9073                                       matcher, misc_parameters);
9074                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9075                 size = sizeof(vxlan_m->vni);
9076                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
9077                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
9078                 memcpy(vni_m, vxlan_m->vni, size);
9079                 for (i = 0; i < size; ++i)
9080                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9081                 return;
9082         }
9083         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
9084         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
9085         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
9086                                                    misc5_v,
9087                                                    tunnel_header_1);
9088         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
9089                                                    misc5_m,
9090                                                    tunnel_header_1);
9091         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
9092                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
9093                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
9094         if (*tunnel_header_v)
9095                 *tunnel_header_m = vxlan_m->vni[0] |
9096                         vxlan_m->vni[1] << 8 |
9097                         vxlan_m->vni[2] << 16;
9098         else
9099                 *tunnel_header_m = 0x0;
9100         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
9101         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
9102                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
9103 }
9104
9105 /**
9106  * Add VXLAN-GPE item to matcher and to the value.
9107  *
9108  * @param[in, out] matcher
9109  *   Flow matcher.
9110  * @param[in, out] key
9111  *   Flow matcher value.
9112  * @param[in] item
9113  *   Flow pattern to translate.
9114  * @param[in] inner
9115  *   Item is inner pattern.
9116  */
9117
9118 static void
9119 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
9120                                  const struct rte_flow_item *item,
9121                                  const uint64_t pattern_flags)
9122 {
9123         static const struct rte_flow_item_vxlan_gpe dummy_vxlan_gpe_hdr = {0, };
9124         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
9125         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9126         /* The item was validated to be on the outer side */
9127         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9128         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9129         void *misc_m =
9130                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9131         void *misc_v =
9132                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9133         char *vni_m =
9134                 MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9135         char *vni_v =
9136                 MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9137         int i, size = sizeof(vxlan_m->vni);
9138         uint8_t flags_m = 0xff;
9139         uint8_t flags_v = 0xc;
9140         uint8_t m_protocol, v_protocol;
9141
9142         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9143                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9144                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9145                          MLX5_UDP_PORT_VXLAN_GPE);
9146         }
9147         if (!vxlan_v) {
9148                 vxlan_v = &dummy_vxlan_gpe_hdr;
9149                 vxlan_m = &dummy_vxlan_gpe_hdr;
9150         } else {
9151                 if (!vxlan_m)
9152                         vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9153         }
9154         memcpy(vni_m, vxlan_m->vni, size);
9155         for (i = 0; i < size; ++i)
9156                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9157         if (vxlan_m->flags) {
9158                 flags_m = vxlan_m->flags;
9159                 flags_v = vxlan_v->flags;
9160         }
9161         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9162         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9163         m_protocol = vxlan_m->protocol;
9164         v_protocol = vxlan_v->protocol;
9165         if (!m_protocol) {
9166                 /* Force next protocol to ensure next headers parsing. */
9167                 if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
9168                         v_protocol = RTE_VXLAN_GPE_TYPE_ETH;
9169                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
9170                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV4;
9171                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
9172                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV6;
9173                 if (v_protocol)
9174                         m_protocol = 0xFF;
9175         }
9176         MLX5_SET(fte_match_set_misc3, misc_m,
9177                  outer_vxlan_gpe_next_protocol, m_protocol);
9178         MLX5_SET(fte_match_set_misc3, misc_v,
9179                  outer_vxlan_gpe_next_protocol, m_protocol & v_protocol);
9180 }
9181
9182 /**
9183  * Add Geneve item to matcher and to the value.
9184  *
9185  * @param[in, out] matcher
9186  *   Flow matcher.
9187  * @param[in, out] key
9188  *   Flow matcher value.
9189  * @param[in] item
9190  *   Flow pattern to translate.
9191  * @param[in] inner
9192  *   Item is inner pattern.
9193  */
9194
9195 static void
9196 flow_dv_translate_item_geneve(void *matcher, void *key,
9197                               const struct rte_flow_item *item,
9198                               uint64_t pattern_flags)
9199 {
9200         static const struct rte_flow_item_geneve empty_geneve = {0,};
9201         const struct rte_flow_item_geneve *geneve_m = item->mask;
9202         const struct rte_flow_item_geneve *geneve_v = item->spec;
9203         /* GENEVE flow item validation allows single tunnel item */
9204         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9205         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9206         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9207         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9208         uint16_t gbhdr_m;
9209         uint16_t gbhdr_v;
9210         char *vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9211         char *vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9212         size_t size = sizeof(geneve_m->vni), i;
9213         uint16_t protocol_m, protocol_v;
9214
9215         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9216                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9217                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9218                          MLX5_UDP_PORT_GENEVE);
9219         }
9220         if (!geneve_v) {
9221                 geneve_v = &empty_geneve;
9222                 geneve_m = &empty_geneve;
9223         } else {
9224                 if (!geneve_m)
9225                         geneve_m = &rte_flow_item_geneve_mask;
9226         }
9227         memcpy(vni_m, geneve_m->vni, size);
9228         for (i = 0; i < size; ++i)
9229                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9230         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9231         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9232         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9233                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9234         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9235                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9236         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9237                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9238         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9239                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9240                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9241         protocol_m = rte_be_to_cpu_16(geneve_m->protocol);
9242         protocol_v = rte_be_to_cpu_16(geneve_v->protocol);
9243         if (!protocol_m) {
9244                 /* Force next protocol to prevent matchers duplication */
9245                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
9246                 if (protocol_v)
9247                         protocol_m = 0xFFFF;
9248         }
9249         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);
9250         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9251                  protocol_m & protocol_v);
9252 }
9253
9254 /**
9255  * Create Geneve TLV option resource.
9256  *
9257  * @param dev[in, out]
9258  *   Pointer to rte_eth_dev structure.
9259  * @param[in, out] tag_be24
9260  *   Tag value in big endian then R-shift 8.
9261  * @parm[in, out] dev_flow
9262  *   Pointer to the dev_flow.
9263  * @param[out] error
9264  *   pointer to error structure.
9265  *
9266  * @return
9267  *   0 on success otherwise -errno and errno is set.
9268  */
9269
9270 int
9271 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9272                                              const struct rte_flow_item *item,
9273                                              struct rte_flow_error *error)
9274 {
9275         struct mlx5_priv *priv = dev->data->dev_private;
9276         struct mlx5_dev_ctx_shared *sh = priv->sh;
9277         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9278                         sh->geneve_tlv_option_resource;
9279         struct mlx5_devx_obj *obj;
9280         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9281         int ret = 0;
9282
9283         if (!geneve_opt_v)
9284                 return -1;
9285         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9286         if (geneve_opt_resource != NULL) {
9287                 if (geneve_opt_resource->option_class ==
9288                         geneve_opt_v->option_class &&
9289                         geneve_opt_resource->option_type ==
9290                         geneve_opt_v->option_type &&
9291                         geneve_opt_resource->length ==
9292                         geneve_opt_v->option_len) {
9293                         /* We already have GENEVE TLV option obj allocated. */
9294                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9295                                            __ATOMIC_RELAXED);
9296                 } else {
9297                         ret = rte_flow_error_set(error, ENOMEM,
9298                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9299                                 "Only one GENEVE TLV option supported");
9300                         goto exit;
9301                 }
9302         } else {
9303                 /* Create a GENEVE TLV object and resource. */
9304                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9305                                 geneve_opt_v->option_class,
9306                                 geneve_opt_v->option_type,
9307                                 geneve_opt_v->option_len);
9308                 if (!obj) {
9309                         ret = rte_flow_error_set(error, ENODATA,
9310                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9311                                 "Failed to create GENEVE TLV Devx object");
9312                         goto exit;
9313                 }
9314                 sh->geneve_tlv_option_resource =
9315                                 mlx5_malloc(MLX5_MEM_ZERO,
9316                                                 sizeof(*geneve_opt_resource),
9317                                                 0, SOCKET_ID_ANY);
9318                 if (!sh->geneve_tlv_option_resource) {
9319                         claim_zero(mlx5_devx_cmd_destroy(obj));
9320                         ret = rte_flow_error_set(error, ENOMEM,
9321                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9322                                 "GENEVE TLV object memory allocation failed");
9323                         goto exit;
9324                 }
9325                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9326                 geneve_opt_resource->obj = obj;
9327                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9328                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9329                 geneve_opt_resource->length = geneve_opt_v->option_len;
9330                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9331                                 __ATOMIC_RELAXED);
9332         }
9333 exit:
9334         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9335         return ret;
9336 }
9337
9338 /**
9339  * Add Geneve TLV option item to matcher.
9340  *
9341  * @param[in, out] dev
9342  *   Pointer to rte_eth_dev structure.
9343  * @param[in, out] matcher
9344  *   Flow matcher.
9345  * @param[in, out] key
9346  *   Flow matcher value.
9347  * @param[in] item
9348  *   Flow pattern to translate.
9349  * @param[out] error
9350  *   Pointer to error structure.
9351  */
9352 static int
9353 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9354                                   void *key, const struct rte_flow_item *item,
9355                                   struct rte_flow_error *error)
9356 {
9357         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9358         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9359         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9360         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9361         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9362                         misc_parameters_3);
9363         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9364         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9365         int ret = 0;
9366
9367         if (!geneve_opt_v)
9368                 return -1;
9369         if (!geneve_opt_m)
9370                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9371         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9372                                                            error);
9373         if (ret) {
9374                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9375                 return ret;
9376         }
9377         /*
9378          * Set the option length in GENEVE header if not requested.
9379          * The GENEVE TLV option length is expressed by the option length field
9380          * in the GENEVE header.
9381          * If the option length was not requested but the GENEVE TLV option item
9382          * is present we set the option length field implicitly.
9383          */
9384         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9385                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9386                          MLX5_GENEVE_OPTLEN_MASK);
9387                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9388                          geneve_opt_v->option_len + 1);
9389         }
9390         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9391         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9392         /* Set the data. */
9393         if (geneve_opt_v->data) {
9394                 memcpy(&opt_data_key, geneve_opt_v->data,
9395                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9396                                 sizeof(opt_data_key)));
9397                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9398                                 sizeof(opt_data_key));
9399                 memcpy(&opt_data_mask, geneve_opt_m->data,
9400                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9401                                 sizeof(opt_data_mask)));
9402                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9403                                 sizeof(opt_data_mask));
9404                 MLX5_SET(fte_match_set_misc3, misc3_m,
9405                                 geneve_tlv_option_0_data,
9406                                 rte_be_to_cpu_32(opt_data_mask));
9407                 MLX5_SET(fte_match_set_misc3, misc3_v,
9408                                 geneve_tlv_option_0_data,
9409                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9410         }
9411         return ret;
9412 }
9413
9414 /**
9415  * Add MPLS item to matcher and to the value.
9416  *
9417  * @param[in, out] matcher
9418  *   Flow matcher.
9419  * @param[in, out] key
9420  *   Flow matcher value.
9421  * @param[in] item
9422  *   Flow pattern to translate.
9423  * @param[in] prev_layer
9424  *   The protocol layer indicated in previous item.
9425  * @param[in] inner
9426  *   Item is inner pattern.
9427  */
9428 static void
9429 flow_dv_translate_item_mpls(void *matcher, void *key,
9430                             const struct rte_flow_item *item,
9431                             uint64_t prev_layer,
9432                             int inner)
9433 {
9434         const uint32_t *in_mpls_m = item->mask;
9435         const uint32_t *in_mpls_v = item->spec;
9436         uint32_t *out_mpls_m = 0;
9437         uint32_t *out_mpls_v = 0;
9438         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9439         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9440         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9441                                      misc_parameters_2);
9442         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9443         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9444         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9445
9446         switch (prev_layer) {
9447         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9448                 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9449                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
9450                                  0xffff);
9451                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9452                                  MLX5_UDP_PORT_MPLS);
9453                 }
9454                 break;
9455         case MLX5_FLOW_LAYER_GRE:
9456                 /* Fall-through. */
9457         case MLX5_FLOW_LAYER_GRE_KEY:
9458                 if (!MLX5_GET16(fte_match_set_misc, misc_v, gre_protocol)) {
9459                         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
9460                                  0xffff);
9461                         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9462                                  RTE_ETHER_TYPE_MPLS);
9463                 }
9464                 break;
9465         default:
9466                 break;
9467         }
9468         if (!in_mpls_v)
9469                 return;
9470         if (!in_mpls_m)
9471                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9472         switch (prev_layer) {
9473         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9474                 out_mpls_m =
9475                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9476                                                  outer_first_mpls_over_udp);
9477                 out_mpls_v =
9478                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9479                                                  outer_first_mpls_over_udp);
9480                 break;
9481         case MLX5_FLOW_LAYER_GRE:
9482                 out_mpls_m =
9483                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9484                                                  outer_first_mpls_over_gre);
9485                 out_mpls_v =
9486                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9487                                                  outer_first_mpls_over_gre);
9488                 break;
9489         default:
9490                 /* Inner MPLS not over GRE is not supported. */
9491                 if (!inner) {
9492                         out_mpls_m =
9493                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9494                                                          misc2_m,
9495                                                          outer_first_mpls);
9496                         out_mpls_v =
9497                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9498                                                          misc2_v,
9499                                                          outer_first_mpls);
9500                 }
9501                 break;
9502         }
9503         if (out_mpls_m && out_mpls_v) {
9504                 *out_mpls_m = *in_mpls_m;
9505                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9506         }
9507 }
9508
9509 /**
9510  * Add metadata register item to matcher
9511  *
9512  * @param[in, out] matcher
9513  *   Flow matcher.
9514  * @param[in, out] key
9515  *   Flow matcher value.
9516  * @param[in] reg_type
9517  *   Type of device metadata register
9518  * @param[in] value
9519  *   Register value
9520  * @param[in] mask
9521  *   Register mask
9522  */
9523 static void
9524 flow_dv_match_meta_reg(void *matcher, void *key,
9525                        enum modify_reg reg_type,
9526                        uint32_t data, uint32_t mask)
9527 {
9528         void *misc2_m =
9529                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9530         void *misc2_v =
9531                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9532         uint32_t temp;
9533
9534         data &= mask;
9535         switch (reg_type) {
9536         case REG_A:
9537                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9538                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9539                 break;
9540         case REG_B:
9541                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9542                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9543                 break;
9544         case REG_C_0:
9545                 /*
9546                  * The metadata register C0 field might be divided into
9547                  * source vport index and META item value, we should set
9548                  * this field according to specified mask, not as whole one.
9549                  */
9550                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9551                 temp |= mask;
9552                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9553                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9554                 temp &= ~mask;
9555                 temp |= data;
9556                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9557                 break;
9558         case REG_C_1:
9559                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9560                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9561                 break;
9562         case REG_C_2:
9563                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9564                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9565                 break;
9566         case REG_C_3:
9567                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9568                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9569                 break;
9570         case REG_C_4:
9571                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9572                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9573                 break;
9574         case REG_C_5:
9575                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9576                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9577                 break;
9578         case REG_C_6:
9579                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9580                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9581                 break;
9582         case REG_C_7:
9583                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9584                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9585                 break;
9586         default:
9587                 MLX5_ASSERT(false);
9588                 break;
9589         }
9590 }
9591
9592 /**
9593  * Add MARK item to matcher
9594  *
9595  * @param[in] dev
9596  *   The device to configure through.
9597  * @param[in, out] matcher
9598  *   Flow matcher.
9599  * @param[in, out] key
9600  *   Flow matcher value.
9601  * @param[in] item
9602  *   Flow pattern to translate.
9603  */
9604 static void
9605 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9606                             void *matcher, void *key,
9607                             const struct rte_flow_item *item)
9608 {
9609         struct mlx5_priv *priv = dev->data->dev_private;
9610         const struct rte_flow_item_mark *mark;
9611         uint32_t value;
9612         uint32_t mask;
9613
9614         mark = item->mask ? (const void *)item->mask :
9615                             &rte_flow_item_mark_mask;
9616         mask = mark->id & priv->sh->dv_mark_mask;
9617         mark = (const void *)item->spec;
9618         MLX5_ASSERT(mark);
9619         value = mark->id & priv->sh->dv_mark_mask & mask;
9620         if (mask) {
9621                 enum modify_reg reg;
9622
9623                 /* Get the metadata register index for the mark. */
9624                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9625                 MLX5_ASSERT(reg > 0);
9626                 if (reg == REG_C_0) {
9627                         struct mlx5_priv *priv = dev->data->dev_private;
9628                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9629                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9630
9631                         mask &= msk_c0;
9632                         mask <<= shl_c0;
9633                         value <<= shl_c0;
9634                 }
9635                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9636         }
9637 }
9638
9639 /**
9640  * Add META item to matcher
9641  *
9642  * @param[in] dev
9643  *   The devich to configure through.
9644  * @param[in, out] matcher
9645  *   Flow matcher.
9646  * @param[in, out] key
9647  *   Flow matcher value.
9648  * @param[in] attr
9649  *   Attributes of flow that includes this item.
9650  * @param[in] item
9651  *   Flow pattern to translate.
9652  */
9653 static void
9654 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9655                             void *matcher, void *key,
9656                             const struct rte_flow_attr *attr,
9657                             const struct rte_flow_item *item)
9658 {
9659         const struct rte_flow_item_meta *meta_m;
9660         const struct rte_flow_item_meta *meta_v;
9661
9662         meta_m = (const void *)item->mask;
9663         if (!meta_m)
9664                 meta_m = &rte_flow_item_meta_mask;
9665         meta_v = (const void *)item->spec;
9666         if (meta_v) {
9667                 int reg;
9668                 uint32_t value = meta_v->data;
9669                 uint32_t mask = meta_m->data;
9670
9671                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9672                 if (reg < 0)
9673                         return;
9674                 MLX5_ASSERT(reg != REG_NON);
9675                 if (reg == REG_C_0) {
9676                         struct mlx5_priv *priv = dev->data->dev_private;
9677                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9678                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9679
9680                         mask &= msk_c0;
9681                         mask <<= shl_c0;
9682                         value <<= shl_c0;
9683                 }
9684                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9685         }
9686 }
9687
9688 /**
9689  * Add vport metadata Reg C0 item to matcher
9690  *
9691  * @param[in, out] matcher
9692  *   Flow matcher.
9693  * @param[in, out] key
9694  *   Flow matcher value.
9695  * @param[in] reg
9696  *   Flow pattern to translate.
9697  */
9698 static void
9699 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9700                                   uint32_t value, uint32_t mask)
9701 {
9702         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9703 }
9704
9705 /**
9706  * Add tag item to matcher
9707  *
9708  * @param[in] dev
9709  *   The devich to configure through.
9710  * @param[in, out] matcher
9711  *   Flow matcher.
9712  * @param[in, out] key
9713  *   Flow matcher value.
9714  * @param[in] item
9715  *   Flow pattern to translate.
9716  */
9717 static void
9718 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9719                                 void *matcher, void *key,
9720                                 const struct rte_flow_item *item)
9721 {
9722         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9723         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9724         uint32_t mask, value;
9725
9726         MLX5_ASSERT(tag_v);
9727         value = tag_v->data;
9728         mask = tag_m ? tag_m->data : UINT32_MAX;
9729         if (tag_v->id == REG_C_0) {
9730                 struct mlx5_priv *priv = dev->data->dev_private;
9731                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9732                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9733
9734                 mask &= msk_c0;
9735                 mask <<= shl_c0;
9736                 value <<= shl_c0;
9737         }
9738         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9739 }
9740
9741 /**
9742  * Add TAG item to matcher
9743  *
9744  * @param[in] dev
9745  *   The devich to configure through.
9746  * @param[in, out] matcher
9747  *   Flow matcher.
9748  * @param[in, out] key
9749  *   Flow matcher value.
9750  * @param[in] item
9751  *   Flow pattern to translate.
9752  */
9753 static void
9754 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9755                            void *matcher, void *key,
9756                            const struct rte_flow_item *item)
9757 {
9758         const struct rte_flow_item_tag *tag_v = item->spec;
9759         const struct rte_flow_item_tag *tag_m = item->mask;
9760         enum modify_reg reg;
9761
9762         MLX5_ASSERT(tag_v);
9763         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9764         /* Get the metadata register index for the tag. */
9765         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9766         MLX5_ASSERT(reg > 0);
9767         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9768 }
9769
9770 /**
9771  * Add source vport match to the specified matcher.
9772  *
9773  * @param[in, out] matcher
9774  *   Flow matcher.
9775  * @param[in, out] key
9776  *   Flow matcher value.
9777  * @param[in] port
9778  *   Source vport value to match
9779  * @param[in] mask
9780  *   Mask
9781  */
9782 static void
9783 flow_dv_translate_item_source_vport(void *matcher, void *key,
9784                                     int16_t port, uint16_t mask)
9785 {
9786         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9787         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9788
9789         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9790         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9791 }
9792
9793 /**
9794  * Translate port-id item to eswitch match on  port-id.
9795  *
9796  * @param[in] dev
9797  *   The devich to configure through.
9798  * @param[in, out] matcher
9799  *   Flow matcher.
9800  * @param[in, out] key
9801  *   Flow matcher value.
9802  * @param[in] item
9803  *   Flow pattern to translate.
9804  * @param[in]
9805  *   Flow attributes.
9806  *
9807  * @return
9808  *   0 on success, a negative errno value otherwise.
9809  */
9810 static int
9811 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9812                                void *key, const struct rte_flow_item *item,
9813                                const struct rte_flow_attr *attr)
9814 {
9815         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9816         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9817         struct mlx5_priv *priv;
9818         uint16_t mask, id;
9819
9820         if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9821                 flow_dv_translate_item_source_vport(matcher, key,
9822                         flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9823                 return 0;
9824         }
9825         mask = pid_m ? pid_m->id : 0xffff;
9826         id = pid_v ? pid_v->id : dev->data->port_id;
9827         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9828         if (!priv)
9829                 return -rte_errno;
9830         /*
9831          * Translate to vport field or to metadata, depending on mode.
9832          * Kernel can use either misc.source_port or half of C0 metadata
9833          * register.
9834          */
9835         if (priv->vport_meta_mask) {
9836                 /*
9837                  * Provide the hint for SW steering library
9838                  * to insert the flow into ingress domain and
9839                  * save the extra vport match.
9840                  */
9841                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9842                     priv->pf_bond < 0 && attr->transfer)
9843                         flow_dv_translate_item_source_vport
9844                                 (matcher, key, priv->vport_id, mask);
9845                 /*
9846                  * We should always set the vport metadata register,
9847                  * otherwise the SW steering library can drop
9848                  * the rule if wire vport metadata value is not zero,
9849                  * it depends on kernel configuration.
9850                  */
9851                 flow_dv_translate_item_meta_vport(matcher, key,
9852                                                   priv->vport_meta_tag,
9853                                                   priv->vport_meta_mask);
9854         } else {
9855                 flow_dv_translate_item_source_vport(matcher, key,
9856                                                     priv->vport_id, mask);
9857         }
9858         return 0;
9859 }
9860
9861 /**
9862  * Add ICMP6 item to matcher and to the value.
9863  *
9864  * @param[in, out] matcher
9865  *   Flow matcher.
9866  * @param[in, out] key
9867  *   Flow matcher value.
9868  * @param[in] item
9869  *   Flow pattern to translate.
9870  * @param[in] inner
9871  *   Item is inner pattern.
9872  */
9873 static void
9874 flow_dv_translate_item_icmp6(void *matcher, void *key,
9875                               const struct rte_flow_item *item,
9876                               int inner)
9877 {
9878         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9879         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9880         void *headers_m;
9881         void *headers_v;
9882         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9883                                      misc_parameters_3);
9884         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9885         if (inner) {
9886                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9887                                          inner_headers);
9888                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9889         } else {
9890                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9891                                          outer_headers);
9892                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9893         }
9894         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9895         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9896         if (!icmp6_v)
9897                 return;
9898         if (!icmp6_m)
9899                 icmp6_m = &rte_flow_item_icmp6_mask;
9900         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9901         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9902                  icmp6_v->type & icmp6_m->type);
9903         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9904         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9905                  icmp6_v->code & icmp6_m->code);
9906 }
9907
9908 /**
9909  * Add ICMP item to matcher and to the value.
9910  *
9911  * @param[in, out] matcher
9912  *   Flow matcher.
9913  * @param[in, out] key
9914  *   Flow matcher value.
9915  * @param[in] item
9916  *   Flow pattern to translate.
9917  * @param[in] inner
9918  *   Item is inner pattern.
9919  */
9920 static void
9921 flow_dv_translate_item_icmp(void *matcher, void *key,
9922                             const struct rte_flow_item *item,
9923                             int inner)
9924 {
9925         const struct rte_flow_item_icmp *icmp_m = item->mask;
9926         const struct rte_flow_item_icmp *icmp_v = item->spec;
9927         uint32_t icmp_header_data_m = 0;
9928         uint32_t icmp_header_data_v = 0;
9929         void *headers_m;
9930         void *headers_v;
9931         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9932                                      misc_parameters_3);
9933         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9934         if (inner) {
9935                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9936                                          inner_headers);
9937                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9938         } else {
9939                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9940                                          outer_headers);
9941                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9942         }
9943         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9944         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9945         if (!icmp_v)
9946                 return;
9947         if (!icmp_m)
9948                 icmp_m = &rte_flow_item_icmp_mask;
9949         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9950                  icmp_m->hdr.icmp_type);
9951         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9952                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9953         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9954                  icmp_m->hdr.icmp_code);
9955         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9956                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9957         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9958         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9959         if (icmp_header_data_m) {
9960                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9961                 icmp_header_data_v |=
9962                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9963                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9964                          icmp_header_data_m);
9965                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9966                          icmp_header_data_v & icmp_header_data_m);
9967         }
9968 }
9969
9970 /**
9971  * Add GTP item to matcher and to the value.
9972  *
9973  * @param[in, out] matcher
9974  *   Flow matcher.
9975  * @param[in, out] key
9976  *   Flow matcher value.
9977  * @param[in] item
9978  *   Flow pattern to translate.
9979  * @param[in] inner
9980  *   Item is inner pattern.
9981  */
9982 static void
9983 flow_dv_translate_item_gtp(void *matcher, void *key,
9984                            const struct rte_flow_item *item, int inner)
9985 {
9986         const struct rte_flow_item_gtp *gtp_m = item->mask;
9987         const struct rte_flow_item_gtp *gtp_v = item->spec;
9988         void *headers_m;
9989         void *headers_v;
9990         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9991                                      misc_parameters_3);
9992         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9993         uint16_t dport = RTE_GTPU_UDP_PORT;
9994
9995         if (inner) {
9996                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9997                                          inner_headers);
9998                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9999         } else {
10000                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10001                                          outer_headers);
10002                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10003         }
10004         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
10005                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
10006                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
10007         }
10008         if (!gtp_v)
10009                 return;
10010         if (!gtp_m)
10011                 gtp_m = &rte_flow_item_gtp_mask;
10012         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
10013                  gtp_m->v_pt_rsv_flags);
10014         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
10015                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
10016         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
10017         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
10018                  gtp_v->msg_type & gtp_m->msg_type);
10019         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
10020                  rte_be_to_cpu_32(gtp_m->teid));
10021         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
10022                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
10023 }
10024
10025 /**
10026  * Add GTP PSC item to matcher.
10027  *
10028  * @param[in, out] matcher
10029  *   Flow matcher.
10030  * @param[in, out] key
10031  *   Flow matcher value.
10032  * @param[in] item
10033  *   Flow pattern to translate.
10034  */
10035 static int
10036 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
10037                                const struct rte_flow_item *item)
10038 {
10039         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
10040         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
10041         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
10042                         misc_parameters_3);
10043         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
10044         union {
10045                 uint32_t w32;
10046                 struct {
10047                         uint16_t seq_num;
10048                         uint8_t npdu_num;
10049                         uint8_t next_ext_header_type;
10050                 };
10051         } dw_2;
10052         uint8_t gtp_flags;
10053
10054         /* Always set E-flag match on one, regardless of GTP item settings. */
10055         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
10056         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
10057         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
10058         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
10059         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
10060         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
10061         /*Set next extension header type. */
10062         dw_2.seq_num = 0;
10063         dw_2.npdu_num = 0;
10064         dw_2.next_ext_header_type = 0xff;
10065         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
10066                  rte_cpu_to_be_32(dw_2.w32));
10067         dw_2.seq_num = 0;
10068         dw_2.npdu_num = 0;
10069         dw_2.next_ext_header_type = 0x85;
10070         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
10071                  rte_cpu_to_be_32(dw_2.w32));
10072         if (gtp_psc_v) {
10073                 union {
10074                         uint32_t w32;
10075                         struct {
10076                                 uint8_t len;
10077                                 uint8_t type_flags;
10078                                 uint8_t qfi;
10079                                 uint8_t reserved;
10080                         };
10081                 } dw_0;
10082
10083                 /*Set extension header PDU type and Qos. */
10084                 if (!gtp_psc_m)
10085                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
10086                 dw_0.w32 = 0;
10087                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
10088                 dw_0.qfi = gtp_psc_m->hdr.qfi;
10089                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
10090                          rte_cpu_to_be_32(dw_0.w32));
10091                 dw_0.w32 = 0;
10092                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
10093                                                         gtp_psc_m->hdr.type);
10094                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
10095                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
10096                          rte_cpu_to_be_32(dw_0.w32));
10097         }
10098         return 0;
10099 }
10100
10101 /**
10102  * Add eCPRI item to matcher and to the value.
10103  *
10104  * @param[in] dev
10105  *   The devich to configure through.
10106  * @param[in, out] matcher
10107  *   Flow matcher.
10108  * @param[in, out] key
10109  *   Flow matcher value.
10110  * @param[in] item
10111  *   Flow pattern to translate.
10112  * @param[in] last_item
10113  *   Last item flags.
10114  */
10115 static void
10116 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
10117                              void *key, const struct rte_flow_item *item,
10118                              uint64_t last_item)
10119 {
10120         struct mlx5_priv *priv = dev->data->dev_private;
10121         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
10122         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
10123         struct rte_ecpri_common_hdr common;
10124         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
10125                                      misc_parameters_4);
10126         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
10127         uint32_t *samples;
10128         void *dw_m;
10129         void *dw_v;
10130
10131         /*
10132          * In case of eCPRI over Ethernet, if EtherType is not specified,
10133          * match on eCPRI EtherType implicitly.
10134          */
10135         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
10136                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
10137
10138                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
10139                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10140                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
10141                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
10142                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
10143                         *(uint16_t *)l2m = UINT16_MAX;
10144                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
10145                 }
10146         }
10147         if (!ecpri_v)
10148                 return;
10149         if (!ecpri_m)
10150                 ecpri_m = &rte_flow_item_ecpri_mask;
10151         /*
10152          * Maximal four DW samples are supported in a single matching now.
10153          * Two are used now for a eCPRI matching:
10154          * 1. Type: one byte, mask should be 0x00ff0000 in network order
10155          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10156          *    if any.
10157          */
10158         if (!ecpri_m->hdr.common.u32)
10159                 return;
10160         samples = priv->sh->ecpri_parser.ids;
10161         /* Need to take the whole DW as the mask to fill the entry. */
10162         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10163                             prog_sample_field_value_0);
10164         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10165                             prog_sample_field_value_0);
10166         /* Already big endian (network order) in the header. */
10167         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10168         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10169         /* Sample#0, used for matching type, offset 0. */
10170         MLX5_SET(fte_match_set_misc4, misc4_m,
10171                  prog_sample_field_id_0, samples[0]);
10172         /* It makes no sense to set the sample ID in the mask field. */
10173         MLX5_SET(fte_match_set_misc4, misc4_v,
10174                  prog_sample_field_id_0, samples[0]);
10175         /*
10176          * Checking if message body part needs to be matched.
10177          * Some wildcard rules only matching type field should be supported.
10178          */
10179         if (ecpri_m->hdr.dummy[0]) {
10180                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10181                 switch (common.type) {
10182                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10183                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10184                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10185                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10186                                             prog_sample_field_value_1);
10187                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10188                                             prog_sample_field_value_1);
10189                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10190                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10191                                             ecpri_m->hdr.dummy[0];
10192                         /* Sample#1, to match message body, offset 4. */
10193                         MLX5_SET(fte_match_set_misc4, misc4_m,
10194                                  prog_sample_field_id_1, samples[1]);
10195                         MLX5_SET(fte_match_set_misc4, misc4_v,
10196                                  prog_sample_field_id_1, samples[1]);
10197                         break;
10198                 default:
10199                         /* Others, do not match any sample ID. */
10200                         break;
10201                 }
10202         }
10203 }
10204
10205 /*
10206  * Add connection tracking status item to matcher
10207  *
10208  * @param[in] dev
10209  *   The devich to configure through.
10210  * @param[in, out] matcher
10211  *   Flow matcher.
10212  * @param[in, out] key
10213  *   Flow matcher value.
10214  * @param[in] item
10215  *   Flow pattern to translate.
10216  */
10217 static void
10218 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10219                               void *matcher, void *key,
10220                               const struct rte_flow_item *item)
10221 {
10222         uint32_t reg_value = 0;
10223         int reg_id;
10224         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10225         uint32_t reg_mask = 0;
10226         const struct rte_flow_item_conntrack *spec = item->spec;
10227         const struct rte_flow_item_conntrack *mask = item->mask;
10228         uint32_t flags;
10229         struct rte_flow_error error;
10230
10231         if (!mask)
10232                 mask = &rte_flow_item_conntrack_mask;
10233         if (!spec || !mask->flags)
10234                 return;
10235         flags = spec->flags & mask->flags;
10236         /* The conflict should be checked in the validation. */
10237         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10238                 reg_value |= MLX5_CT_SYNDROME_VALID;
10239         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10240                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10241         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10242                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10243         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10244                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10245         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10246                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10247         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10248                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10249                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10250                 reg_mask |= 0xc0;
10251         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10252                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10253         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10254                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10255         /* The REG_C_x value could be saved during startup. */
10256         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10257         if (reg_id == REG_NON)
10258                 return;
10259         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10260                                reg_value, reg_mask);
10261 }
10262
10263 static void
10264 flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,
10265                             const struct rte_flow_item *item,
10266                             struct mlx5_flow *dev_flow, bool is_inner)
10267 {
10268         const struct rte_flow_item_flex *spec =
10269                 (const struct rte_flow_item_flex *)item->spec;
10270         int index = mlx5_flex_acquire_index(dev, spec->handle, false);
10271
10272         MLX5_ASSERT(index >= 0 && index <= (int)(sizeof(uint32_t) * CHAR_BIT));
10273         if (index < 0)
10274                 return;
10275         if (!(dev_flow->handle->flex_item & RTE_BIT32(index))) {
10276                 /* Don't count both inner and outer flex items in one rule. */
10277                 if (mlx5_flex_acquire_index(dev, spec->handle, true) != index)
10278                         MLX5_ASSERT(false);
10279                 dev_flow->handle->flex_item |= RTE_BIT32(index);
10280         }
10281         mlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);
10282 }
10283
10284 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10285
10286 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10287         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10288                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10289
10290 /**
10291  * Calculate flow matcher enable bitmap.
10292  *
10293  * @param match_criteria
10294  *   Pointer to flow matcher criteria.
10295  *
10296  * @return
10297  *   Bitmap of enabled fields.
10298  */
10299 static uint8_t
10300 flow_dv_matcher_enable(uint32_t *match_criteria)
10301 {
10302         uint8_t match_criteria_enable;
10303
10304         match_criteria_enable =
10305                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10306                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10307         match_criteria_enable |=
10308                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10309                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10310         match_criteria_enable |=
10311                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10312                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10313         match_criteria_enable |=
10314                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10315                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10316         match_criteria_enable |=
10317                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10318                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10319         match_criteria_enable |=
10320                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10321                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10322         match_criteria_enable |=
10323                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10324                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10325         return match_criteria_enable;
10326 }
10327
10328 static void
10329 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10330 {
10331         /*
10332          * Check flow matching criteria first, subtract misc5/4 length if flow
10333          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10334          * misc5/4 are not supported, and matcher creation failure is expected
10335          * w/o subtraction. If misc5 is provided, misc4 must be counted in since
10336          * misc5 is right after misc4.
10337          */
10338         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10339                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10340                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10341                 if (!(match_criteria & (1 <<
10342                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10343                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10344                 }
10345         }
10346 }
10347
10348 static struct mlx5_list_entry *
10349 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10350                          struct mlx5_list_entry *entry, void *cb_ctx)
10351 {
10352         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10353         struct mlx5_flow_dv_matcher *ref = ctx->data;
10354         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10355                                                             typeof(*tbl), tbl);
10356         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10357                                                             sizeof(*resource),
10358                                                             0, SOCKET_ID_ANY);
10359
10360         if (!resource) {
10361                 rte_flow_error_set(ctx->error, ENOMEM,
10362                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10363                                    "cannot create matcher");
10364                 return NULL;
10365         }
10366         memcpy(resource, entry, sizeof(*resource));
10367         resource->tbl = &tbl->tbl;
10368         return &resource->entry;
10369 }
10370
10371 static void
10372 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10373                              struct mlx5_list_entry *entry)
10374 {
10375         mlx5_free(entry);
10376 }
10377
10378 struct mlx5_list_entry *
10379 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10380 {
10381         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10382         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10383         struct rte_eth_dev *dev = ctx->dev;
10384         struct mlx5_flow_tbl_data_entry *tbl_data;
10385         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10386         struct rte_flow_error *error = ctx->error;
10387         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10388         struct mlx5_flow_tbl_resource *tbl;
10389         void *domain;
10390         uint32_t idx = 0;
10391         int ret;
10392
10393         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10394         if (!tbl_data) {
10395                 rte_flow_error_set(error, ENOMEM,
10396                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10397                                    NULL,
10398                                    "cannot allocate flow table data entry");
10399                 return NULL;
10400         }
10401         tbl_data->idx = idx;
10402         tbl_data->tunnel = tt_prm->tunnel;
10403         tbl_data->group_id = tt_prm->group_id;
10404         tbl_data->external = !!tt_prm->external;
10405         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10406         tbl_data->is_egress = !!key.is_egress;
10407         tbl_data->is_transfer = !!key.is_fdb;
10408         tbl_data->dummy = !!key.dummy;
10409         tbl_data->level = key.level;
10410         tbl_data->id = key.id;
10411         tbl = &tbl_data->tbl;
10412         if (key.dummy)
10413                 return &tbl_data->entry;
10414         if (key.is_fdb)
10415                 domain = sh->fdb_domain;
10416         else if (key.is_egress)
10417                 domain = sh->tx_domain;
10418         else
10419                 domain = sh->rx_domain;
10420         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10421         if (ret) {
10422                 rte_flow_error_set(error, ENOMEM,
10423                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10424                                    NULL, "cannot create flow table object");
10425                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10426                 return NULL;
10427         }
10428         if (key.level != 0) {
10429                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10430                                         (tbl->obj, &tbl_data->jump.action);
10431                 if (ret) {
10432                         rte_flow_error_set(error, ENOMEM,
10433                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10434                                            NULL,
10435                                            "cannot create flow jump action");
10436                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10437                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10438                         return NULL;
10439                 }
10440         }
10441         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10442               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10443               key.level, key.id);
10444         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10445                                               flow_dv_matcher_create_cb,
10446                                               flow_dv_matcher_match_cb,
10447                                               flow_dv_matcher_remove_cb,
10448                                               flow_dv_matcher_clone_cb,
10449                                               flow_dv_matcher_clone_free_cb);
10450         if (!tbl_data->matchers) {
10451                 rte_flow_error_set(error, ENOMEM,
10452                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10453                                    NULL,
10454                                    "cannot create tbl matcher list");
10455                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10456                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10457                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10458                 return NULL;
10459         }
10460         return &tbl_data->entry;
10461 }
10462
10463 int
10464 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10465                      void *cb_ctx)
10466 {
10467         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10468         struct mlx5_flow_tbl_data_entry *tbl_data =
10469                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10470         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10471
10472         return tbl_data->level != key.level ||
10473                tbl_data->id != key.id ||
10474                tbl_data->dummy != key.dummy ||
10475                tbl_data->is_transfer != !!key.is_fdb ||
10476                tbl_data->is_egress != !!key.is_egress;
10477 }
10478
10479 struct mlx5_list_entry *
10480 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10481                       void *cb_ctx)
10482 {
10483         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10484         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10485         struct mlx5_flow_tbl_data_entry *tbl_data;
10486         struct rte_flow_error *error = ctx->error;
10487         uint32_t idx = 0;
10488
10489         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10490         if (!tbl_data) {
10491                 rte_flow_error_set(error, ENOMEM,
10492                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10493                                    NULL,
10494                                    "cannot allocate flow table data entry");
10495                 return NULL;
10496         }
10497         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10498         tbl_data->idx = idx;
10499         return &tbl_data->entry;
10500 }
10501
10502 void
10503 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10504 {
10505         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10506         struct mlx5_flow_tbl_data_entry *tbl_data =
10507                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10508
10509         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10510 }
10511
10512 /**
10513  * Get a flow table.
10514  *
10515  * @param[in, out] dev
10516  *   Pointer to rte_eth_dev structure.
10517  * @param[in] table_level
10518  *   Table level to use.
10519  * @param[in] egress
10520  *   Direction of the table.
10521  * @param[in] transfer
10522  *   E-Switch or NIC flow.
10523  * @param[in] dummy
10524  *   Dummy entry for dv API.
10525  * @param[in] table_id
10526  *   Table id to use.
10527  * @param[out] error
10528  *   pointer to error structure.
10529  *
10530  * @return
10531  *   Returns tables resource based on the index, NULL in case of failed.
10532  */
10533 struct mlx5_flow_tbl_resource *
10534 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10535                          uint32_t table_level, uint8_t egress,
10536                          uint8_t transfer,
10537                          bool external,
10538                          const struct mlx5_flow_tunnel *tunnel,
10539                          uint32_t group_id, uint8_t dummy,
10540                          uint32_t table_id,
10541                          struct rte_flow_error *error)
10542 {
10543         struct mlx5_priv *priv = dev->data->dev_private;
10544         union mlx5_flow_tbl_key table_key = {
10545                 {
10546                         .level = table_level,
10547                         .id = table_id,
10548                         .reserved = 0,
10549                         .dummy = !!dummy,
10550                         .is_fdb = !!transfer,
10551                         .is_egress = !!egress,
10552                 }
10553         };
10554         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10555                 .tunnel = tunnel,
10556                 .group_id = group_id,
10557                 .external = external,
10558         };
10559         struct mlx5_flow_cb_ctx ctx = {
10560                 .dev = dev,
10561                 .error = error,
10562                 .data = &table_key.v64,
10563                 .data2 = &tt_prm,
10564         };
10565         struct mlx5_list_entry *entry;
10566         struct mlx5_flow_tbl_data_entry *tbl_data;
10567
10568         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10569         if (!entry) {
10570                 rte_flow_error_set(error, ENOMEM,
10571                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10572                                    "cannot get table");
10573                 return NULL;
10574         }
10575         DRV_LOG(DEBUG, "table_level %u table_id %u "
10576                 "tunnel %u group %u registered.",
10577                 table_level, table_id,
10578                 tunnel ? tunnel->tunnel_id : 0, group_id);
10579         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10580         return &tbl_data->tbl;
10581 }
10582
10583 void
10584 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10585 {
10586         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10587         struct mlx5_flow_tbl_data_entry *tbl_data =
10588                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10589
10590         MLX5_ASSERT(entry && sh);
10591         if (tbl_data->jump.action)
10592                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10593         if (tbl_data->tbl.obj)
10594                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10595         if (tbl_data->tunnel_offload && tbl_data->external) {
10596                 struct mlx5_list_entry *he;
10597                 struct mlx5_hlist *tunnel_grp_hash;
10598                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10599                 union tunnel_tbl_key tunnel_key = {
10600                         .tunnel_id = tbl_data->tunnel ?
10601                                         tbl_data->tunnel->tunnel_id : 0,
10602                         .group = tbl_data->group_id
10603                 };
10604                 uint32_t table_level = tbl_data->level;
10605                 struct mlx5_flow_cb_ctx ctx = {
10606                         .data = (void *)&tunnel_key.val,
10607                 };
10608
10609                 tunnel_grp_hash = tbl_data->tunnel ?
10610                                         tbl_data->tunnel->groups :
10611                                         thub->groups;
10612                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10613                 if (he)
10614                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10615                 DRV_LOG(DEBUG,
10616                         "table_level %u id %u tunnel %u group %u released.",
10617                         table_level,
10618                         tbl_data->id,
10619                         tbl_data->tunnel ?
10620                         tbl_data->tunnel->tunnel_id : 0,
10621                         tbl_data->group_id);
10622         }
10623         if (tbl_data->matchers)
10624                 mlx5_list_destroy(tbl_data->matchers);
10625         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10626 }
10627
10628 /**
10629  * Release a flow table.
10630  *
10631  * @param[in] sh
10632  *   Pointer to device shared structure.
10633  * @param[in] tbl
10634  *   Table resource to be released.
10635  *
10636  * @return
10637  *   Returns 0 if table was released, else return 1;
10638  */
10639 static int
10640 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10641                              struct mlx5_flow_tbl_resource *tbl)
10642 {
10643         struct mlx5_flow_tbl_data_entry *tbl_data =
10644                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10645
10646         if (!tbl)
10647                 return 0;
10648         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10649 }
10650
10651 int
10652 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10653                          struct mlx5_list_entry *entry, void *cb_ctx)
10654 {
10655         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10656         struct mlx5_flow_dv_matcher *ref = ctx->data;
10657         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10658                                                         entry);
10659
10660         return cur->crc != ref->crc ||
10661                cur->priority != ref->priority ||
10662                memcmp((const void *)cur->mask.buf,
10663                       (const void *)ref->mask.buf, ref->mask.size);
10664 }
10665
10666 struct mlx5_list_entry *
10667 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10668 {
10669         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10670         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10671         struct mlx5_flow_dv_matcher *ref = ctx->data;
10672         struct mlx5_flow_dv_matcher *resource;
10673         struct mlx5dv_flow_matcher_attr dv_attr = {
10674                 .type = IBV_FLOW_ATTR_NORMAL,
10675                 .match_mask = (void *)&ref->mask,
10676         };
10677         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10678                                                             typeof(*tbl), tbl);
10679         int ret;
10680
10681         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10682                                SOCKET_ID_ANY);
10683         if (!resource) {
10684                 rte_flow_error_set(ctx->error, ENOMEM,
10685                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10686                                    "cannot create matcher");
10687                 return NULL;
10688         }
10689         *resource = *ref;
10690         dv_attr.match_criteria_enable =
10691                 flow_dv_matcher_enable(resource->mask.buf);
10692         __flow_dv_adjust_buf_size(&ref->mask.size,
10693                                   dv_attr.match_criteria_enable);
10694         dv_attr.priority = ref->priority;
10695         if (tbl->is_egress)
10696                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10697         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10698                                                tbl->tbl.obj,
10699                                                &resource->matcher_object);
10700         if (ret) {
10701                 mlx5_free(resource);
10702                 rte_flow_error_set(ctx->error, ENOMEM,
10703                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10704                                    "cannot create matcher");
10705                 return NULL;
10706         }
10707         return &resource->entry;
10708 }
10709
10710 /**
10711  * Register the flow matcher.
10712  *
10713  * @param[in, out] dev
10714  *   Pointer to rte_eth_dev structure.
10715  * @param[in, out] matcher
10716  *   Pointer to flow matcher.
10717  * @param[in, out] key
10718  *   Pointer to flow table key.
10719  * @parm[in, out] dev_flow
10720  *   Pointer to the dev_flow.
10721  * @param[out] error
10722  *   pointer to error structure.
10723  *
10724  * @return
10725  *   0 on success otherwise -errno and errno is set.
10726  */
10727 static int
10728 flow_dv_matcher_register(struct rte_eth_dev *dev,
10729                          struct mlx5_flow_dv_matcher *ref,
10730                          union mlx5_flow_tbl_key *key,
10731                          struct mlx5_flow *dev_flow,
10732                          const struct mlx5_flow_tunnel *tunnel,
10733                          uint32_t group_id,
10734                          struct rte_flow_error *error)
10735 {
10736         struct mlx5_list_entry *entry;
10737         struct mlx5_flow_dv_matcher *resource;
10738         struct mlx5_flow_tbl_resource *tbl;
10739         struct mlx5_flow_tbl_data_entry *tbl_data;
10740         struct mlx5_flow_cb_ctx ctx = {
10741                 .error = error,
10742                 .data = ref,
10743         };
10744         /**
10745          * tunnel offload API requires this registration for cases when
10746          * tunnel match rule was inserted before tunnel set rule.
10747          */
10748         tbl = flow_dv_tbl_resource_get(dev, key->level,
10749                                        key->is_egress, key->is_fdb,
10750                                        dev_flow->external, tunnel,
10751                                        group_id, 0, key->id, error);
10752         if (!tbl)
10753                 return -rte_errno;      /* No need to refill the error info */
10754         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10755         ref->tbl = tbl;
10756         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10757         if (!entry) {
10758                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10759                 return rte_flow_error_set(error, ENOMEM,
10760                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10761                                           "cannot allocate ref memory");
10762         }
10763         resource = container_of(entry, typeof(*resource), entry);
10764         dev_flow->handle->dvh.matcher = resource;
10765         return 0;
10766 }
10767
10768 struct mlx5_list_entry *
10769 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10770 {
10771         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10772         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10773         struct mlx5_flow_dv_tag_resource *entry;
10774         uint32_t idx = 0;
10775         int ret;
10776
10777         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10778         if (!entry) {
10779                 rte_flow_error_set(ctx->error, ENOMEM,
10780                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10781                                    "cannot allocate resource memory");
10782                 return NULL;
10783         }
10784         entry->idx = idx;
10785         entry->tag_id = *(uint32_t *)(ctx->data);
10786         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10787                                                   &entry->action);
10788         if (ret) {
10789                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10790                 rte_flow_error_set(ctx->error, ENOMEM,
10791                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10792                                    NULL, "cannot create action");
10793                 return NULL;
10794         }
10795         return &entry->entry;
10796 }
10797
10798 int
10799 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10800                      void *cb_ctx)
10801 {
10802         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10803         struct mlx5_flow_dv_tag_resource *tag =
10804                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10805
10806         return *(uint32_t *)(ctx->data) != tag->tag_id;
10807 }
10808
10809 struct mlx5_list_entry *
10810 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10811                      void *cb_ctx)
10812 {
10813         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10814         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10815         struct mlx5_flow_dv_tag_resource *entry;
10816         uint32_t idx = 0;
10817
10818         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10819         if (!entry) {
10820                 rte_flow_error_set(ctx->error, ENOMEM,
10821                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10822                                    "cannot allocate tag resource memory");
10823                 return NULL;
10824         }
10825         memcpy(entry, oentry, sizeof(*entry));
10826         entry->idx = idx;
10827         return &entry->entry;
10828 }
10829
10830 void
10831 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10832 {
10833         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10834         struct mlx5_flow_dv_tag_resource *tag =
10835                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10836
10837         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10838 }
10839
10840 /**
10841  * Find existing tag resource or create and register a new one.
10842  *
10843  * @param dev[in, out]
10844  *   Pointer to rte_eth_dev structure.
10845  * @param[in, out] tag_be24
10846  *   Tag value in big endian then R-shift 8.
10847  * @parm[in, out] dev_flow
10848  *   Pointer to the dev_flow.
10849  * @param[out] error
10850  *   pointer to error structure.
10851  *
10852  * @return
10853  *   0 on success otherwise -errno and errno is set.
10854  */
10855 static int
10856 flow_dv_tag_resource_register
10857                         (struct rte_eth_dev *dev,
10858                          uint32_t tag_be24,
10859                          struct mlx5_flow *dev_flow,
10860                          struct rte_flow_error *error)
10861 {
10862         struct mlx5_priv *priv = dev->data->dev_private;
10863         struct mlx5_flow_dv_tag_resource *resource;
10864         struct mlx5_list_entry *entry;
10865         struct mlx5_flow_cb_ctx ctx = {
10866                                         .error = error,
10867                                         .data = &tag_be24,
10868                                         };
10869         struct mlx5_hlist *tag_table;
10870
10871         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10872                                       "tags",
10873                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10874                                       false, false, priv->sh,
10875                                       flow_dv_tag_create_cb,
10876                                       flow_dv_tag_match_cb,
10877                                       flow_dv_tag_remove_cb,
10878                                       flow_dv_tag_clone_cb,
10879                                       flow_dv_tag_clone_free_cb,
10880                                       error);
10881         if (unlikely(!tag_table))
10882                 return -rte_errno;
10883         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10884         if (entry) {
10885                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10886                                         entry);
10887                 dev_flow->handle->dvh.rix_tag = resource->idx;
10888                 dev_flow->dv.tag_resource = resource;
10889                 return 0;
10890         }
10891         return -rte_errno;
10892 }
10893
10894 void
10895 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10896 {
10897         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10898         struct mlx5_flow_dv_tag_resource *tag =
10899                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10900
10901         MLX5_ASSERT(tag && sh && tag->action);
10902         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10903         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10904         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10905 }
10906
10907 /**
10908  * Release the tag.
10909  *
10910  * @param dev
10911  *   Pointer to Ethernet device.
10912  * @param tag_idx
10913  *   Tag index.
10914  *
10915  * @return
10916  *   1 while a reference on it exists, 0 when freed.
10917  */
10918 static int
10919 flow_dv_tag_release(struct rte_eth_dev *dev,
10920                     uint32_t tag_idx)
10921 {
10922         struct mlx5_priv *priv = dev->data->dev_private;
10923         struct mlx5_flow_dv_tag_resource *tag;
10924
10925         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10926         if (!tag)
10927                 return 0;
10928         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10929                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10930         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10931 }
10932
10933 /**
10934  * Translate action PORT_ID / REPRESENTED_PORT to vport.
10935  *
10936  * @param[in] dev
10937  *   Pointer to rte_eth_dev structure.
10938  * @param[in] action
10939  *   Pointer to action PORT_ID / REPRESENTED_PORT.
10940  * @param[out] dst_port_id
10941  *   The target port ID.
10942  * @param[out] error
10943  *   Pointer to the error structure.
10944  *
10945  * @return
10946  *   0 on success, a negative errno value otherwise and rte_errno is set.
10947  */
10948 static int
10949 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10950                                  const struct rte_flow_action *action,
10951                                  uint32_t *dst_port_id,
10952                                  struct rte_flow_error *error)
10953 {
10954         uint32_t port;
10955         struct mlx5_priv *priv;
10956
10957         switch (action->type) {
10958         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10959                 const struct rte_flow_action_port_id *conf;
10960
10961                 conf = (const struct rte_flow_action_port_id *)action->conf;
10962                 port = conf->original ? dev->data->port_id : conf->id;
10963                 break;
10964         }
10965         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10966                 const struct rte_flow_action_ethdev *ethdev;
10967
10968                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10969                 port = ethdev->port_id;
10970                 break;
10971         }
10972         default:
10973                 MLX5_ASSERT(false);
10974                 return rte_flow_error_set(error, EINVAL,
10975                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
10976                                           "unknown E-Switch action");
10977         }
10978
10979         priv = mlx5_port_to_eswitch_info(port, false);
10980         if (!priv)
10981                 return rte_flow_error_set(error, -rte_errno,
10982                                           RTE_FLOW_ERROR_TYPE_ACTION,
10983                                           NULL,
10984                                           "No eswitch info was found for port");
10985 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10986         /*
10987          * This parameter is transferred to
10988          * mlx5dv_dr_action_create_dest_ib_port().
10989          */
10990         *dst_port_id = priv->dev_port;
10991 #else
10992         /*
10993          * Legacy mode, no LAG configurations is supported.
10994          * This parameter is transferred to
10995          * mlx5dv_dr_action_create_dest_vport().
10996          */
10997         *dst_port_id = priv->vport_id;
10998 #endif
10999         return 0;
11000 }
11001
11002 /**
11003  * Create a counter with aging configuration.
11004  *
11005  * @param[in] dev
11006  *   Pointer to rte_eth_dev structure.
11007  * @param[in] dev_flow
11008  *   Pointer to the mlx5_flow.
11009  * @param[out] count
11010  *   Pointer to the counter action configuration.
11011  * @param[in] age
11012  *   Pointer to the aging action configuration.
11013  *
11014  * @return
11015  *   Index to flow counter on success, 0 otherwise.
11016  */
11017 static uint32_t
11018 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
11019                                 struct mlx5_flow *dev_flow,
11020                                 const struct rte_flow_action_count *count
11021                                         __rte_unused,
11022                                 const struct rte_flow_action_age *age)
11023 {
11024         uint32_t counter;
11025         struct mlx5_age_param *age_param;
11026
11027         counter = flow_dv_counter_alloc(dev, !!age);
11028         if (!counter || age == NULL)
11029                 return counter;
11030         age_param = flow_dv_counter_idx_get_age(dev, counter);
11031         age_param->context = age->context ? age->context :
11032                 (void *)(uintptr_t)(dev_flow->flow_idx);
11033         age_param->timeout = age->timeout;
11034         age_param->port_id = dev->data->port_id;
11035         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
11036         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
11037         return counter;
11038 }
11039
11040 /**
11041  * Add Tx queue matcher
11042  *
11043  * @param[in] dev
11044  *   Pointer to the dev struct.
11045  * @param[in, out] matcher
11046  *   Flow matcher.
11047  * @param[in, out] key
11048  *   Flow matcher value.
11049  * @param[in] item
11050  *   Flow pattern to translate.
11051  * @param[in] inner
11052  *   Item is inner pattern.
11053  */
11054 static void
11055 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
11056                                 void *matcher, void *key,
11057                                 const struct rte_flow_item *item)
11058 {
11059         const struct mlx5_rte_flow_item_tx_queue *queue_m;
11060         const struct mlx5_rte_flow_item_tx_queue *queue_v;
11061         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
11062         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
11063         struct mlx5_txq_ctrl *txq;
11064         uint32_t queue, mask;
11065
11066         queue_m = (const void *)item->mask;
11067         queue_v = (const void *)item->spec;
11068         if (!queue_v)
11069                 return;
11070         txq = mlx5_txq_get(dev, queue_v->queue);
11071         if (!txq)
11072                 return;
11073         if (txq->is_hairpin)
11074                 queue = txq->obj->sq->id;
11075         else
11076                 queue = txq->obj->sq_obj.sq->id;
11077         mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
11078         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
11079         MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
11080         mlx5_txq_release(dev, queue_v->queue);
11081 }
11082
11083 /**
11084  * Set the hash fields according to the @p flow information.
11085  *
11086  * @param[in] item_flags
11087  *   The match pattern item flags.
11088  * @param[in] rss_desc
11089  *   Pointer to the mlx5_flow_rss_desc.
11090  * @param[out] hash_fields
11091  *   Pointer to the RSS hash fields.
11092  */
11093 void
11094 flow_dv_hashfields_set(uint64_t item_flags,
11095                        struct mlx5_flow_rss_desc *rss_desc,
11096                        uint64_t *hash_fields)
11097 {
11098         uint64_t items = item_flags;
11099         uint64_t fields = 0;
11100         int rss_inner = 0;
11101         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
11102
11103         *hash_fields = 0;
11104 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
11105         if (rss_desc->level >= 2)
11106                 rss_inner = 1;
11107 #endif
11108         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
11109             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4)) ||
11110              !items) {
11111                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
11112                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11113                                 fields |= IBV_RX_HASH_SRC_IPV4;
11114                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11115                                 fields |= IBV_RX_HASH_DST_IPV4;
11116                         else
11117                                 fields |= MLX5_IPV4_IBV_RX_HASH;
11118                 }
11119         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
11120                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6)) ||
11121                    !items) {
11122                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
11123                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11124                                 fields |= IBV_RX_HASH_SRC_IPV6;
11125                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11126                                 fields |= IBV_RX_HASH_DST_IPV6;
11127                         else
11128                                 fields |= MLX5_IPV6_IBV_RX_HASH;
11129                 }
11130         }
11131         if (fields == 0)
11132                 /*
11133                  * There is no match between the RSS types and the
11134                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
11135                  */
11136                 return;
11137         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
11138             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP)) ||
11139             !items) {
11140                 if (rss_types & RTE_ETH_RSS_UDP) {
11141                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11142                                 fields |= IBV_RX_HASH_SRC_PORT_UDP;
11143                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11144                                 fields |= IBV_RX_HASH_DST_PORT_UDP;
11145                         else
11146                                 fields |= MLX5_UDP_IBV_RX_HASH;
11147                 }
11148         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
11149                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP)) ||
11150                    !items) {
11151                 if (rss_types & RTE_ETH_RSS_TCP) {
11152                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11153                                 fields |= IBV_RX_HASH_SRC_PORT_TCP;
11154                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11155                                 fields |= IBV_RX_HASH_DST_PORT_TCP;
11156                         else
11157                                 fields |= MLX5_TCP_IBV_RX_HASH;
11158                 }
11159         }
11160         if (rss_inner)
11161                 fields |= IBV_RX_HASH_INNER;
11162         *hash_fields = fields;
11163 }
11164
11165 /**
11166  * Prepare an Rx Hash queue.
11167  *
11168  * @param dev
11169  *   Pointer to Ethernet device.
11170  * @param[in] dev_flow
11171  *   Pointer to the mlx5_flow.
11172  * @param[in] rss_desc
11173  *   Pointer to the mlx5_flow_rss_desc.
11174  * @param[out] hrxq_idx
11175  *   Hash Rx queue index.
11176  *
11177  * @return
11178  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
11179  */
11180 static struct mlx5_hrxq *
11181 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
11182                      struct mlx5_flow *dev_flow,
11183                      struct mlx5_flow_rss_desc *rss_desc,
11184                      uint32_t *hrxq_idx)
11185 {
11186         struct mlx5_flow_handle *dh = dev_flow->handle;
11187         struct mlx5_hrxq *hrxq;
11188
11189         MLX5_ASSERT(rss_desc->queue_num);
11190         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
11191         rss_desc->hash_fields = dev_flow->hash_fields;
11192         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11193         rss_desc->shared_rss = 0;
11194         if (rss_desc->hash_fields == 0)
11195                 rss_desc->queue_num = 1;
11196         hrxq = mlx5_hrxq_get(dev, rss_desc);
11197         *hrxq_idx = hrxq ? hrxq->idx : 0;
11198         return hrxq;
11199 }
11200
11201 /**
11202  * Release sample sub action resource.
11203  *
11204  * @param[in, out] dev
11205  *   Pointer to rte_eth_dev structure.
11206  * @param[in] act_res
11207  *   Pointer to sample sub action resource.
11208  */
11209 static void
11210 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11211                                    struct mlx5_flow_sub_actions_idx *act_res)
11212 {
11213         if (act_res->rix_hrxq) {
11214                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11215                 act_res->rix_hrxq = 0;
11216         }
11217         if (act_res->rix_encap_decap) {
11218                 flow_dv_encap_decap_resource_release(dev,
11219                                                      act_res->rix_encap_decap);
11220                 act_res->rix_encap_decap = 0;
11221         }
11222         if (act_res->rix_port_id_action) {
11223                 flow_dv_port_id_action_resource_release(dev,
11224                                                 act_res->rix_port_id_action);
11225                 act_res->rix_port_id_action = 0;
11226         }
11227         if (act_res->rix_tag) {
11228                 flow_dv_tag_release(dev, act_res->rix_tag);
11229                 act_res->rix_tag = 0;
11230         }
11231         if (act_res->rix_jump) {
11232                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11233                 act_res->rix_jump = 0;
11234         }
11235 }
11236
11237 int
11238 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11239                         struct mlx5_list_entry *entry, void *cb_ctx)
11240 {
11241         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11242         struct rte_eth_dev *dev = ctx->dev;
11243         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11244         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11245                                                               typeof(*resource),
11246                                                               entry);
11247
11248         if (ctx_resource->ratio == resource->ratio &&
11249             ctx_resource->ft_type == resource->ft_type &&
11250             ctx_resource->ft_id == resource->ft_id &&
11251             ctx_resource->set_action == resource->set_action &&
11252             !memcmp((void *)&ctx_resource->sample_act,
11253                     (void *)&resource->sample_act,
11254                     sizeof(struct mlx5_flow_sub_actions_list))) {
11255                 /*
11256                  * Existing sample action should release the prepared
11257                  * sub-actions reference counter.
11258                  */
11259                 flow_dv_sample_sub_actions_release(dev,
11260                                                    &ctx_resource->sample_idx);
11261                 return 0;
11262         }
11263         return 1;
11264 }
11265
11266 struct mlx5_list_entry *
11267 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11268 {
11269         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11270         struct rte_eth_dev *dev = ctx->dev;
11271         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11272         void **sample_dv_actions = ctx_resource->sub_actions;
11273         struct mlx5_flow_dv_sample_resource *resource;
11274         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11275         struct mlx5_priv *priv = dev->data->dev_private;
11276         struct mlx5_dev_ctx_shared *sh = priv->sh;
11277         struct mlx5_flow_tbl_resource *tbl;
11278         uint32_t idx = 0;
11279         const uint32_t next_ft_step = 1;
11280         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11281         uint8_t is_egress = 0;
11282         uint8_t is_transfer = 0;
11283         struct rte_flow_error *error = ctx->error;
11284
11285         /* Register new sample resource. */
11286         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11287         if (!resource) {
11288                 rte_flow_error_set(error, ENOMEM,
11289                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11290                                           NULL,
11291                                           "cannot allocate resource memory");
11292                 return NULL;
11293         }
11294         *resource = *ctx_resource;
11295         /* Create normal path table level */
11296         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11297                 is_transfer = 1;
11298         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11299                 is_egress = 1;
11300         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11301                                         is_egress, is_transfer,
11302                                         true, NULL, 0, 0, 0, error);
11303         if (!tbl) {
11304                 rte_flow_error_set(error, ENOMEM,
11305                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11306                                           NULL,
11307                                           "fail to create normal path table "
11308                                           "for sample");
11309                 goto error;
11310         }
11311         resource->normal_path_tbl = tbl;
11312         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11313                 if (!sh->default_miss_action) {
11314                         rte_flow_error_set(error, ENOMEM,
11315                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11316                                                 NULL,
11317                                                 "default miss action was not "
11318                                                 "created");
11319                         goto error;
11320                 }
11321                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11322                                                 sh->default_miss_action;
11323         }
11324         /* Create a DR sample action */
11325         sampler_attr.sample_ratio = resource->ratio;
11326         sampler_attr.default_next_table = tbl->obj;
11327         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11328         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11329                                                         &sample_dv_actions[0];
11330         sampler_attr.action = resource->set_action;
11331         if (mlx5_os_flow_dr_create_flow_action_sampler
11332                         (&sampler_attr, &resource->verbs_action)) {
11333                 rte_flow_error_set(error, ENOMEM,
11334                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11335                                         NULL, "cannot create sample action");
11336                 goto error;
11337         }
11338         resource->idx = idx;
11339         resource->dev = dev;
11340         return &resource->entry;
11341 error:
11342         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11343                 flow_dv_sample_sub_actions_release(dev,
11344                                                    &resource->sample_idx);
11345         if (resource->normal_path_tbl)
11346                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11347                                 resource->normal_path_tbl);
11348         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11349         return NULL;
11350
11351 }
11352
11353 struct mlx5_list_entry *
11354 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11355                          struct mlx5_list_entry *entry __rte_unused,
11356                          void *cb_ctx)
11357 {
11358         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11359         struct rte_eth_dev *dev = ctx->dev;
11360         struct mlx5_flow_dv_sample_resource *resource;
11361         struct mlx5_priv *priv = dev->data->dev_private;
11362         struct mlx5_dev_ctx_shared *sh = priv->sh;
11363         uint32_t idx = 0;
11364
11365         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11366         if (!resource) {
11367                 rte_flow_error_set(ctx->error, ENOMEM,
11368                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11369                                           NULL,
11370                                           "cannot allocate resource memory");
11371                 return NULL;
11372         }
11373         memcpy(resource, entry, sizeof(*resource));
11374         resource->idx = idx;
11375         resource->dev = dev;
11376         return &resource->entry;
11377 }
11378
11379 void
11380 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11381                              struct mlx5_list_entry *entry)
11382 {
11383         struct mlx5_flow_dv_sample_resource *resource =
11384                                   container_of(entry, typeof(*resource), entry);
11385         struct rte_eth_dev *dev = resource->dev;
11386         struct mlx5_priv *priv = dev->data->dev_private;
11387
11388         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11389 }
11390
11391 /**
11392  * Find existing sample resource or create and register a new one.
11393  *
11394  * @param[in, out] dev
11395  *   Pointer to rte_eth_dev structure.
11396  * @param[in] ref
11397  *   Pointer to sample resource reference.
11398  * @parm[in, out] dev_flow
11399  *   Pointer to the dev_flow.
11400  * @param[out] error
11401  *   pointer to error structure.
11402  *
11403  * @return
11404  *   0 on success otherwise -errno and errno is set.
11405  */
11406 static int
11407 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11408                          struct mlx5_flow_dv_sample_resource *ref,
11409                          struct mlx5_flow *dev_flow,
11410                          struct rte_flow_error *error)
11411 {
11412         struct mlx5_flow_dv_sample_resource *resource;
11413         struct mlx5_list_entry *entry;
11414         struct mlx5_priv *priv = dev->data->dev_private;
11415         struct mlx5_flow_cb_ctx ctx = {
11416                 .dev = dev,
11417                 .error = error,
11418                 .data = ref,
11419         };
11420
11421         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11422         if (!entry)
11423                 return -rte_errno;
11424         resource = container_of(entry, typeof(*resource), entry);
11425         dev_flow->handle->dvh.rix_sample = resource->idx;
11426         dev_flow->dv.sample_res = resource;
11427         return 0;
11428 }
11429
11430 int
11431 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11432                             struct mlx5_list_entry *entry, void *cb_ctx)
11433 {
11434         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11435         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11436         struct rte_eth_dev *dev = ctx->dev;
11437         struct mlx5_flow_dv_dest_array_resource *resource =
11438                                   container_of(entry, typeof(*resource), entry);
11439         uint32_t idx = 0;
11440
11441         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11442             ctx_resource->ft_type == resource->ft_type &&
11443             !memcmp((void *)resource->sample_act,
11444                     (void *)ctx_resource->sample_act,
11445                    (ctx_resource->num_of_dest *
11446                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11447                 /*
11448                  * Existing sample action should release the prepared
11449                  * sub-actions reference counter.
11450                  */
11451                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11452                         flow_dv_sample_sub_actions_release(dev,
11453                                         &ctx_resource->sample_idx[idx]);
11454                 return 0;
11455         }
11456         return 1;
11457 }
11458
11459 struct mlx5_list_entry *
11460 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11461 {
11462         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11463         struct rte_eth_dev *dev = ctx->dev;
11464         struct mlx5_flow_dv_dest_array_resource *resource;
11465         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11466         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11467         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11468         struct mlx5_priv *priv = dev->data->dev_private;
11469         struct mlx5_dev_ctx_shared *sh = priv->sh;
11470         struct mlx5_flow_sub_actions_list *sample_act;
11471         struct mlx5dv_dr_domain *domain;
11472         uint32_t idx = 0, res_idx = 0;
11473         struct rte_flow_error *error = ctx->error;
11474         uint64_t action_flags;
11475         int ret;
11476
11477         /* Register new destination array resource. */
11478         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11479                                             &res_idx);
11480         if (!resource) {
11481                 rte_flow_error_set(error, ENOMEM,
11482                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11483                                           NULL,
11484                                           "cannot allocate resource memory");
11485                 return NULL;
11486         }
11487         *resource = *ctx_resource;
11488         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11489                 domain = sh->fdb_domain;
11490         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11491                 domain = sh->rx_domain;
11492         else
11493                 domain = sh->tx_domain;
11494         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11495                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11496                                  mlx5_malloc(MLX5_MEM_ZERO,
11497                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11498                                  0, SOCKET_ID_ANY);
11499                 if (!dest_attr[idx]) {
11500                         rte_flow_error_set(error, ENOMEM,
11501                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11502                                            NULL,
11503                                            "cannot allocate resource memory");
11504                         goto error;
11505                 }
11506                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11507                 sample_act = &ctx_resource->sample_act[idx];
11508                 action_flags = sample_act->action_flags;
11509                 switch (action_flags) {
11510                 case MLX5_FLOW_ACTION_QUEUE:
11511                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11512                         break;
11513                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11514                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11515                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11516                         dest_attr[idx]->dest_reformat->reformat =
11517                                         sample_act->dr_encap_action;
11518                         dest_attr[idx]->dest_reformat->dest =
11519                                         sample_act->dr_port_id_action;
11520                         break;
11521                 case MLX5_FLOW_ACTION_PORT_ID:
11522                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11523                         break;
11524                 case MLX5_FLOW_ACTION_JUMP:
11525                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11526                         break;
11527                 default:
11528                         rte_flow_error_set(error, EINVAL,
11529                                            RTE_FLOW_ERROR_TYPE_ACTION,
11530                                            NULL,
11531                                            "unsupported actions type");
11532                         goto error;
11533                 }
11534         }
11535         /* create a dest array action */
11536         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11537                                                 (domain,
11538                                                  resource->num_of_dest,
11539                                                  dest_attr,
11540                                                  &resource->action);
11541         if (ret) {
11542                 rte_flow_error_set(error, ENOMEM,
11543                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11544                                    NULL,
11545                                    "cannot create destination array action");
11546                 goto error;
11547         }
11548         resource->idx = res_idx;
11549         resource->dev = dev;
11550         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11551                 mlx5_free(dest_attr[idx]);
11552         return &resource->entry;
11553 error:
11554         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11555                 flow_dv_sample_sub_actions_release(dev,
11556                                                    &resource->sample_idx[idx]);
11557                 if (dest_attr[idx])
11558                         mlx5_free(dest_attr[idx]);
11559         }
11560         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11561         return NULL;
11562 }
11563
11564 struct mlx5_list_entry *
11565 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11566                             struct mlx5_list_entry *entry __rte_unused,
11567                             void *cb_ctx)
11568 {
11569         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11570         struct rte_eth_dev *dev = ctx->dev;
11571         struct mlx5_flow_dv_dest_array_resource *resource;
11572         struct mlx5_priv *priv = dev->data->dev_private;
11573         struct mlx5_dev_ctx_shared *sh = priv->sh;
11574         uint32_t res_idx = 0;
11575         struct rte_flow_error *error = ctx->error;
11576
11577         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11578                                       &res_idx);
11579         if (!resource) {
11580                 rte_flow_error_set(error, ENOMEM,
11581                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11582                                           NULL,
11583                                           "cannot allocate dest-array memory");
11584                 return NULL;
11585         }
11586         memcpy(resource, entry, sizeof(*resource));
11587         resource->idx = res_idx;
11588         resource->dev = dev;
11589         return &resource->entry;
11590 }
11591
11592 void
11593 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11594                                  struct mlx5_list_entry *entry)
11595 {
11596         struct mlx5_flow_dv_dest_array_resource *resource =
11597                         container_of(entry, typeof(*resource), entry);
11598         struct rte_eth_dev *dev = resource->dev;
11599         struct mlx5_priv *priv = dev->data->dev_private;
11600
11601         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11602 }
11603
11604 /**
11605  * Find existing destination array resource or create and register a new one.
11606  *
11607  * @param[in, out] dev
11608  *   Pointer to rte_eth_dev structure.
11609  * @param[in] ref
11610  *   Pointer to destination array resource reference.
11611  * @parm[in, out] dev_flow
11612  *   Pointer to the dev_flow.
11613  * @param[out] error
11614  *   pointer to error structure.
11615  *
11616  * @return
11617  *   0 on success otherwise -errno and errno is set.
11618  */
11619 static int
11620 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11621                          struct mlx5_flow_dv_dest_array_resource *ref,
11622                          struct mlx5_flow *dev_flow,
11623                          struct rte_flow_error *error)
11624 {
11625         struct mlx5_flow_dv_dest_array_resource *resource;
11626         struct mlx5_priv *priv = dev->data->dev_private;
11627         struct mlx5_list_entry *entry;
11628         struct mlx5_flow_cb_ctx ctx = {
11629                 .dev = dev,
11630                 .error = error,
11631                 .data = ref,
11632         };
11633
11634         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11635         if (!entry)
11636                 return -rte_errno;
11637         resource = container_of(entry, typeof(*resource), entry);
11638         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11639         dev_flow->dv.dest_array_res = resource;
11640         return 0;
11641 }
11642
11643 /**
11644  * Convert Sample action to DV specification.
11645  *
11646  * @param[in] dev
11647  *   Pointer to rte_eth_dev structure.
11648  * @param[in] action
11649  *   Pointer to sample action structure.
11650  * @param[in, out] dev_flow
11651  *   Pointer to the mlx5_flow.
11652  * @param[in] attr
11653  *   Pointer to the flow attributes.
11654  * @param[in, out] num_of_dest
11655  *   Pointer to the num of destination.
11656  * @param[in, out] sample_actions
11657  *   Pointer to sample actions list.
11658  * @param[in, out] res
11659  *   Pointer to sample resource.
11660  * @param[out] error
11661  *   Pointer to the error structure.
11662  *
11663  * @return
11664  *   0 on success, a negative errno value otherwise and rte_errno is set.
11665  */
11666 static int
11667 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11668                                 const struct rte_flow_action_sample *action,
11669                                 struct mlx5_flow *dev_flow,
11670                                 const struct rte_flow_attr *attr,
11671                                 uint32_t *num_of_dest,
11672                                 void **sample_actions,
11673                                 struct mlx5_flow_dv_sample_resource *res,
11674                                 struct rte_flow_error *error)
11675 {
11676         struct mlx5_priv *priv = dev->data->dev_private;
11677         const struct rte_flow_action *sub_actions;
11678         struct mlx5_flow_sub_actions_list *sample_act;
11679         struct mlx5_flow_sub_actions_idx *sample_idx;
11680         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11681         struct rte_flow *flow = dev_flow->flow;
11682         struct mlx5_flow_rss_desc *rss_desc;
11683         uint64_t action_flags = 0;
11684
11685         MLX5_ASSERT(wks);
11686         rss_desc = &wks->rss_desc;
11687         sample_act = &res->sample_act;
11688         sample_idx = &res->sample_idx;
11689         res->ratio = action->ratio;
11690         sub_actions = action->actions;
11691         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11692                 int type = sub_actions->type;
11693                 uint32_t pre_rix = 0;
11694                 void *pre_r;
11695                 switch (type) {
11696                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11697                 {
11698                         const struct rte_flow_action_queue *queue;
11699                         struct mlx5_hrxq *hrxq;
11700                         uint32_t hrxq_idx;
11701
11702                         queue = sub_actions->conf;
11703                         rss_desc->queue_num = 1;
11704                         rss_desc->queue[0] = queue->index;
11705                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11706                                                     rss_desc, &hrxq_idx);
11707                         if (!hrxq)
11708                                 return rte_flow_error_set
11709                                         (error, rte_errno,
11710                                          RTE_FLOW_ERROR_TYPE_ACTION,
11711                                          NULL,
11712                                          "cannot create fate queue");
11713                         sample_act->dr_queue_action = hrxq->action;
11714                         sample_idx->rix_hrxq = hrxq_idx;
11715                         sample_actions[sample_act->actions_num++] =
11716                                                 hrxq->action;
11717                         (*num_of_dest)++;
11718                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11719                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11720                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11721                         dev_flow->handle->fate_action =
11722                                         MLX5_FLOW_FATE_QUEUE;
11723                         break;
11724                 }
11725                 case RTE_FLOW_ACTION_TYPE_RSS:
11726                 {
11727                         struct mlx5_hrxq *hrxq;
11728                         uint32_t hrxq_idx;
11729                         const struct rte_flow_action_rss *rss;
11730                         const uint8_t *rss_key;
11731
11732                         rss = sub_actions->conf;
11733                         memcpy(rss_desc->queue, rss->queue,
11734                                rss->queue_num * sizeof(uint16_t));
11735                         rss_desc->queue_num = rss->queue_num;
11736                         /* NULL RSS key indicates default RSS key. */
11737                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11738                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11739                         /*
11740                          * rss->level and rss.types should be set in advance
11741                          * when expanding items for RSS.
11742                          */
11743                         flow_dv_hashfields_set(dev_flow->handle->layers,
11744                                                rss_desc,
11745                                                &dev_flow->hash_fields);
11746                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11747                                                     rss_desc, &hrxq_idx);
11748                         if (!hrxq)
11749                                 return rte_flow_error_set
11750                                         (error, rte_errno,
11751                                          RTE_FLOW_ERROR_TYPE_ACTION,
11752                                          NULL,
11753                                          "cannot create fate queue");
11754                         sample_act->dr_queue_action = hrxq->action;
11755                         sample_idx->rix_hrxq = hrxq_idx;
11756                         sample_actions[sample_act->actions_num++] =
11757                                                 hrxq->action;
11758                         (*num_of_dest)++;
11759                         action_flags |= MLX5_FLOW_ACTION_RSS;
11760                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11761                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11762                         dev_flow->handle->fate_action =
11763                                         MLX5_FLOW_FATE_QUEUE;
11764                         break;
11765                 }
11766                 case RTE_FLOW_ACTION_TYPE_MARK:
11767                 {
11768                         uint32_t tag_be = mlx5_flow_mark_set
11769                                 (((const struct rte_flow_action_mark *)
11770                                 (sub_actions->conf))->id);
11771
11772                         wks->mark = 1;
11773                         pre_rix = dev_flow->handle->dvh.rix_tag;
11774                         /* Save the mark resource before sample */
11775                         pre_r = dev_flow->dv.tag_resource;
11776                         if (flow_dv_tag_resource_register(dev, tag_be,
11777                                                   dev_flow, error))
11778                                 return -rte_errno;
11779                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11780                         sample_act->dr_tag_action =
11781                                 dev_flow->dv.tag_resource->action;
11782                         sample_idx->rix_tag =
11783                                 dev_flow->handle->dvh.rix_tag;
11784                         sample_actions[sample_act->actions_num++] =
11785                                                 sample_act->dr_tag_action;
11786                         /* Recover the mark resource after sample */
11787                         dev_flow->dv.tag_resource = pre_r;
11788                         dev_flow->handle->dvh.rix_tag = pre_rix;
11789                         action_flags |= MLX5_FLOW_ACTION_MARK;
11790                         break;
11791                 }
11792                 case RTE_FLOW_ACTION_TYPE_COUNT:
11793                 {
11794                         if (!flow->counter) {
11795                                 flow->counter =
11796                                         flow_dv_translate_create_counter(dev,
11797                                                 dev_flow, sub_actions->conf,
11798                                                 0);
11799                                 if (!flow->counter)
11800                                         return rte_flow_error_set
11801                                                 (error, rte_errno,
11802                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11803                                                 NULL,
11804                                                 "cannot create counter"
11805                                                 " object.");
11806                         }
11807                         sample_act->dr_cnt_action =
11808                                   (flow_dv_counter_get_by_idx(dev,
11809                                   flow->counter, NULL))->action;
11810                         sample_actions[sample_act->actions_num++] =
11811                                                 sample_act->dr_cnt_action;
11812                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11813                         break;
11814                 }
11815                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11816                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11817                 {
11818                         struct mlx5_flow_dv_port_id_action_resource
11819                                         port_id_resource;
11820                         uint32_t port_id = 0;
11821
11822                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11823                         /* Save the port id resource before sample */
11824                         pre_rix = dev_flow->handle->rix_port_id_action;
11825                         pre_r = dev_flow->dv.port_id_action;
11826                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11827                                                              &port_id, error))
11828                                 return -rte_errno;
11829                         port_id_resource.port_id = port_id;
11830                         if (flow_dv_port_id_action_resource_register
11831                             (dev, &port_id_resource, dev_flow, error))
11832                                 return -rte_errno;
11833                         sample_act->dr_port_id_action =
11834                                 dev_flow->dv.port_id_action->action;
11835                         sample_idx->rix_port_id_action =
11836                                 dev_flow->handle->rix_port_id_action;
11837                         sample_actions[sample_act->actions_num++] =
11838                                                 sample_act->dr_port_id_action;
11839                         /* Recover the port id resource after sample */
11840                         dev_flow->dv.port_id_action = pre_r;
11841                         dev_flow->handle->rix_port_id_action = pre_rix;
11842                         (*num_of_dest)++;
11843                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11844                         break;
11845                 }
11846                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11847                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11848                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11849                         /* Save the encap resource before sample */
11850                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11851                         pre_r = dev_flow->dv.encap_decap;
11852                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11853                                                            dev_flow,
11854                                                            attr->transfer,
11855                                                            error))
11856                                 return -rte_errno;
11857                         sample_act->dr_encap_action =
11858                                 dev_flow->dv.encap_decap->action;
11859                         sample_idx->rix_encap_decap =
11860                                 dev_flow->handle->dvh.rix_encap_decap;
11861                         sample_actions[sample_act->actions_num++] =
11862                                                 sample_act->dr_encap_action;
11863                         /* Recover the encap resource after sample */
11864                         dev_flow->dv.encap_decap = pre_r;
11865                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11866                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11867                         break;
11868                 default:
11869                         return rte_flow_error_set(error, EINVAL,
11870                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11871                                 NULL,
11872                                 "Not support for sampler action");
11873                 }
11874         }
11875         sample_act->action_flags = action_flags;
11876         res->ft_id = dev_flow->dv.group;
11877         if (attr->transfer) {
11878                 union {
11879                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11880                         uint64_t set_action;
11881                 } action_ctx = { .set_action = 0 };
11882
11883                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11884                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11885                          MLX5_MODIFICATION_TYPE_SET);
11886                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11887                          MLX5_MODI_META_REG_C_0);
11888                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11889                          priv->vport_meta_tag);
11890                 res->set_action = action_ctx.set_action;
11891         } else if (attr->ingress) {
11892                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11893         } else {
11894                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11895         }
11896         return 0;
11897 }
11898
11899 /**
11900  * Convert Sample action to DV specification.
11901  *
11902  * @param[in] dev
11903  *   Pointer to rte_eth_dev structure.
11904  * @param[in, out] dev_flow
11905  *   Pointer to the mlx5_flow.
11906  * @param[in] num_of_dest
11907  *   The num of destination.
11908  * @param[in, out] res
11909  *   Pointer to sample resource.
11910  * @param[in, out] mdest_res
11911  *   Pointer to destination array resource.
11912  * @param[in] sample_actions
11913  *   Pointer to sample path actions list.
11914  * @param[in] action_flags
11915  *   Holds the actions detected until now.
11916  * @param[out] error
11917  *   Pointer to the error structure.
11918  *
11919  * @return
11920  *   0 on success, a negative errno value otherwise and rte_errno is set.
11921  */
11922 static int
11923 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11924                              struct mlx5_flow *dev_flow,
11925                              uint32_t num_of_dest,
11926                              struct mlx5_flow_dv_sample_resource *res,
11927                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11928                              void **sample_actions,
11929                              uint64_t action_flags,
11930                              struct rte_flow_error *error)
11931 {
11932         /* update normal path action resource into last index of array */
11933         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11934         struct mlx5_flow_sub_actions_list *sample_act =
11935                                         &mdest_res->sample_act[dest_index];
11936         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11937         struct mlx5_flow_rss_desc *rss_desc;
11938         uint32_t normal_idx = 0;
11939         struct mlx5_hrxq *hrxq;
11940         uint32_t hrxq_idx;
11941
11942         MLX5_ASSERT(wks);
11943         rss_desc = &wks->rss_desc;
11944         if (num_of_dest > 1) {
11945                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11946                         /* Handle QP action for mirroring */
11947                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11948                                                     rss_desc, &hrxq_idx);
11949                         if (!hrxq)
11950                                 return rte_flow_error_set
11951                                      (error, rte_errno,
11952                                       RTE_FLOW_ERROR_TYPE_ACTION,
11953                                       NULL,
11954                                       "cannot create rx queue");
11955                         normal_idx++;
11956                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11957                         sample_act->dr_queue_action = hrxq->action;
11958                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11959                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11960                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11961                 }
11962                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11963                         normal_idx++;
11964                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11965                                 dev_flow->handle->dvh.rix_encap_decap;
11966                         sample_act->dr_encap_action =
11967                                 dev_flow->dv.encap_decap->action;
11968                         dev_flow->handle->dvh.rix_encap_decap = 0;
11969                 }
11970                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11971                         normal_idx++;
11972                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11973                                 dev_flow->handle->rix_port_id_action;
11974                         sample_act->dr_port_id_action =
11975                                 dev_flow->dv.port_id_action->action;
11976                         dev_flow->handle->rix_port_id_action = 0;
11977                 }
11978                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11979                         normal_idx++;
11980                         mdest_res->sample_idx[dest_index].rix_jump =
11981                                 dev_flow->handle->rix_jump;
11982                         sample_act->dr_jump_action =
11983                                 dev_flow->dv.jump->action;
11984                         dev_flow->handle->rix_jump = 0;
11985                 }
11986                 sample_act->actions_num = normal_idx;
11987                 /* update sample action resource into first index of array */
11988                 mdest_res->ft_type = res->ft_type;
11989                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11990                                 sizeof(struct mlx5_flow_sub_actions_idx));
11991                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11992                                 sizeof(struct mlx5_flow_sub_actions_list));
11993                 mdest_res->num_of_dest = num_of_dest;
11994                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11995                                                          dev_flow, error))
11996                         return rte_flow_error_set(error, EINVAL,
11997                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11998                                                   NULL, "can't create sample "
11999                                                   "action");
12000         } else {
12001                 res->sub_actions = sample_actions;
12002                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
12003                         return rte_flow_error_set(error, EINVAL,
12004                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12005                                                   NULL,
12006                                                   "can't create sample action");
12007         }
12008         return 0;
12009 }
12010
12011 /**
12012  * Remove an ASO age action from age actions list.
12013  *
12014  * @param[in] dev
12015  *   Pointer to the Ethernet device structure.
12016  * @param[in] age
12017  *   Pointer to the aso age action handler.
12018  */
12019 static void
12020 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
12021                                 struct mlx5_aso_age_action *age)
12022 {
12023         struct mlx5_age_info *age_info;
12024         struct mlx5_age_param *age_param = &age->age_params;
12025         struct mlx5_priv *priv = dev->data->dev_private;
12026         uint16_t expected = AGE_CANDIDATE;
12027
12028         age_info = GET_PORT_AGE_INFO(priv);
12029         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
12030                                          AGE_FREE, false, __ATOMIC_RELAXED,
12031                                          __ATOMIC_RELAXED)) {
12032                 /**
12033                  * We need the lock even it is age timeout,
12034                  * since age action may still in process.
12035                  */
12036                 rte_spinlock_lock(&age_info->aged_sl);
12037                 LIST_REMOVE(age, next);
12038                 rte_spinlock_unlock(&age_info->aged_sl);
12039                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
12040         }
12041 }
12042
12043 /**
12044  * Release an ASO age action.
12045  *
12046  * @param[in] dev
12047  *   Pointer to the Ethernet device structure.
12048  * @param[in] age_idx
12049  *   Index of ASO age action to release.
12050  * @param[in] flow
12051  *   True if the release operation is during flow destroy operation.
12052  *   False if the release operation is during action destroy operation.
12053  *
12054  * @return
12055  *   0 when age action was removed, otherwise the number of references.
12056  */
12057 static int
12058 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
12059 {
12060         struct mlx5_priv *priv = dev->data->dev_private;
12061         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12062         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
12063         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
12064
12065         if (!ret) {
12066                 flow_dv_aso_age_remove_from_age(dev, age);
12067                 rte_spinlock_lock(&mng->free_sl);
12068                 LIST_INSERT_HEAD(&mng->free, age, next);
12069                 rte_spinlock_unlock(&mng->free_sl);
12070         }
12071         return ret;
12072 }
12073
12074 /**
12075  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
12076  *
12077  * @param[in] dev
12078  *   Pointer to the Ethernet device structure.
12079  *
12080  * @return
12081  *   0 on success, otherwise negative errno value and rte_errno is set.
12082  */
12083 static int
12084 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
12085 {
12086         struct mlx5_priv *priv = dev->data->dev_private;
12087         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12088         void *old_pools = mng->pools;
12089         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
12090         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
12091         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12092
12093         if (!pools) {
12094                 rte_errno = ENOMEM;
12095                 return -ENOMEM;
12096         }
12097         if (old_pools) {
12098                 memcpy(pools, old_pools,
12099                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
12100                 mlx5_free(old_pools);
12101         } else {
12102                 /* First ASO flow hit allocation - starting ASO data-path. */
12103                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
12104
12105                 if (ret) {
12106                         mlx5_free(pools);
12107                         return ret;
12108                 }
12109         }
12110         mng->n = resize;
12111         mng->pools = pools;
12112         return 0;
12113 }
12114
12115 /**
12116  * Create and initialize a new ASO aging pool.
12117  *
12118  * @param[in] dev
12119  *   Pointer to the Ethernet device structure.
12120  * @param[out] age_free
12121  *   Where to put the pointer of a new age action.
12122  *
12123  * @return
12124  *   The age actions pool pointer and @p age_free is set on success,
12125  *   NULL otherwise and rte_errno is set.
12126  */
12127 static struct mlx5_aso_age_pool *
12128 flow_dv_age_pool_create(struct rte_eth_dev *dev,
12129                         struct mlx5_aso_age_action **age_free)
12130 {
12131         struct mlx5_priv *priv = dev->data->dev_private;
12132         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12133         struct mlx5_aso_age_pool *pool = NULL;
12134         struct mlx5_devx_obj *obj = NULL;
12135         uint32_t i;
12136
12137         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
12138                                                     priv->sh->cdev->pdn);
12139         if (!obj) {
12140                 rte_errno = ENODATA;
12141                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
12142                 return NULL;
12143         }
12144         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12145         if (!pool) {
12146                 claim_zero(mlx5_devx_cmd_destroy(obj));
12147                 rte_errno = ENOMEM;
12148                 return NULL;
12149         }
12150         pool->flow_hit_aso_obj = obj;
12151         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
12152         rte_rwlock_write_lock(&mng->resize_rwl);
12153         pool->index = mng->next;
12154         /* Resize pools array if there is no room for the new pool in it. */
12155         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
12156                 claim_zero(mlx5_devx_cmd_destroy(obj));
12157                 mlx5_free(pool);
12158                 rte_rwlock_write_unlock(&mng->resize_rwl);
12159                 return NULL;
12160         }
12161         mng->pools[pool->index] = pool;
12162         mng->next++;
12163         rte_rwlock_write_unlock(&mng->resize_rwl);
12164         /* Assign the first action in the new pool, the rest go to free list. */
12165         *age_free = &pool->actions[0];
12166         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
12167                 pool->actions[i].offset = i;
12168                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
12169         }
12170         return pool;
12171 }
12172
12173 /**
12174  * Allocate a ASO aging bit.
12175  *
12176  * @param[in] dev
12177  *   Pointer to the Ethernet device structure.
12178  * @param[out] error
12179  *   Pointer to the error structure.
12180  *
12181  * @return
12182  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
12183  */
12184 static uint32_t
12185 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12186 {
12187         struct mlx5_priv *priv = dev->data->dev_private;
12188         const struct mlx5_aso_age_pool *pool;
12189         struct mlx5_aso_age_action *age_free = NULL;
12190         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12191
12192         MLX5_ASSERT(mng);
12193         /* Try to get the next free age action bit. */
12194         rte_spinlock_lock(&mng->free_sl);
12195         age_free = LIST_FIRST(&mng->free);
12196         if (age_free) {
12197                 LIST_REMOVE(age_free, next);
12198         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12199                 rte_spinlock_unlock(&mng->free_sl);
12200                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12201                                    NULL, "failed to create ASO age pool");
12202                 return 0; /* 0 is an error. */
12203         }
12204         rte_spinlock_unlock(&mng->free_sl);
12205         pool = container_of
12206           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12207                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12208                                                                        actions);
12209         if (!age_free->dr_action) {
12210                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12211                                                  error);
12212
12213                 if (reg_c < 0) {
12214                         rte_flow_error_set(error, rte_errno,
12215                                            RTE_FLOW_ERROR_TYPE_ACTION,
12216                                            NULL, "failed to get reg_c "
12217                                            "for ASO flow hit");
12218                         return 0; /* 0 is an error. */
12219                 }
12220 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12221                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12222                                 (priv->sh->rx_domain,
12223                                  pool->flow_hit_aso_obj->obj, age_free->offset,
12224                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12225                                  (reg_c - REG_C_0));
12226 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12227                 if (!age_free->dr_action) {
12228                         rte_errno = errno;
12229                         rte_spinlock_lock(&mng->free_sl);
12230                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12231                         rte_spinlock_unlock(&mng->free_sl);
12232                         rte_flow_error_set(error, rte_errno,
12233                                            RTE_FLOW_ERROR_TYPE_ACTION,
12234                                            NULL, "failed to create ASO "
12235                                            "flow hit action");
12236                         return 0; /* 0 is an error. */
12237                 }
12238         }
12239         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12240         return pool->index | ((age_free->offset + 1) << 16);
12241 }
12242
12243 /**
12244  * Initialize flow ASO age parameters.
12245  *
12246  * @param[in] dev
12247  *   Pointer to rte_eth_dev structure.
12248  * @param[in] age_idx
12249  *   Index of ASO age action.
12250  * @param[in] context
12251  *   Pointer to flow counter age context.
12252  * @param[in] timeout
12253  *   Aging timeout in seconds.
12254  *
12255  */
12256 static void
12257 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12258                             uint32_t age_idx,
12259                             void *context,
12260                             uint32_t timeout)
12261 {
12262         struct mlx5_aso_age_action *aso_age;
12263
12264         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12265         MLX5_ASSERT(aso_age);
12266         aso_age->age_params.context = context;
12267         aso_age->age_params.timeout = timeout;
12268         aso_age->age_params.port_id = dev->data->port_id;
12269         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12270                          __ATOMIC_RELAXED);
12271         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12272                          __ATOMIC_RELAXED);
12273 }
12274
12275 static void
12276 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12277                                const struct rte_flow_item_integrity *value,
12278                                void *headers_m, void *headers_v)
12279 {
12280         if (mask->l4_ok) {
12281                 /* RTE l4_ok filter aggregates hardware l4_ok and
12282                  * l4_checksum_ok filters.
12283                  * Positive RTE l4_ok match requires hardware match on both L4
12284                  * hardware integrity bits.
12285                  * For negative match, check hardware l4_checksum_ok bit only,
12286                  * because hardware sets that bit to 0 for all packets
12287                  * with bad L4.
12288                  */
12289                 if (value->l4_ok) {
12290                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok, 1);
12291                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok, 1);
12292                 }
12293                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12294                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12295                          !!value->l4_ok);
12296         }
12297         if (mask->l4_csum_ok) {
12298                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12299                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12300                          value->l4_csum_ok);
12301         }
12302 }
12303
12304 static void
12305 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12306                                const struct rte_flow_item_integrity *value,
12307                                void *headers_m, void *headers_v, bool is_ipv4)
12308 {
12309         if (mask->l3_ok) {
12310                 /* RTE l3_ok filter aggregates for IPv4 hardware l3_ok and
12311                  * ipv4_csum_ok filters.
12312                  * Positive RTE l3_ok match requires hardware match on both L3
12313                  * hardware integrity bits.
12314                  * For negative match, check hardware l3_csum_ok bit only,
12315                  * because hardware sets that bit to 0 for all packets
12316                  * with bad L3.
12317                  */
12318                 if (is_ipv4) {
12319                         if (value->l3_ok) {
12320                                 MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12321                                          l3_ok, 1);
12322                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12323                                          l3_ok, 1);
12324                         }
12325                         MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12326                                  ipv4_checksum_ok, 1);
12327                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12328                                  ipv4_checksum_ok, !!value->l3_ok);
12329                 } else {
12330                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok, 1);
12331                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12332                                  value->l3_ok);
12333                 }
12334         }
12335         if (mask->ipv4_csum_ok) {
12336                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok, 1);
12337                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12338                          value->ipv4_csum_ok);
12339         }
12340 }
12341
12342 static void
12343 set_integrity_bits(void *headers_m, void *headers_v,
12344                    const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12345 {
12346         const struct rte_flow_item_integrity *spec = integrity_item->spec;
12347         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12348
12349         /* Integrity bits validation cleared spec pointer */
12350         MLX5_ASSERT(spec != NULL);
12351         if (!mask)
12352                 mask = &rte_flow_item_integrity_mask;
12353         flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12354                                        is_l3_ip4);
12355         flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12356 }
12357
12358 static void
12359 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12360                                       const
12361                                       struct rte_flow_item *integrity_items[2],
12362                                       uint64_t pattern_flags)
12363 {
12364         void *headers_m, *headers_v;
12365         bool is_l3_ip4;
12366
12367         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12368                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12369                                          inner_headers);
12370                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12371                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12372                             0;
12373                 set_integrity_bits(headers_m, headers_v,
12374                                    integrity_items[1], is_l3_ip4);
12375         }
12376         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12377                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12378                                          outer_headers);
12379                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12380                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12381                             0;
12382                 set_integrity_bits(headers_m, headers_v,
12383                                    integrity_items[0], is_l3_ip4);
12384         }
12385 }
12386
12387 static void
12388 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12389                                  const struct rte_flow_item *integrity_items[2],
12390                                  uint64_t *last_item)
12391 {
12392         const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12393
12394         /* integrity bits validation cleared spec pointer */
12395         MLX5_ASSERT(spec != NULL);
12396         if (spec->level > 1) {
12397                 integrity_items[1] = item;
12398                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12399         } else {
12400                 integrity_items[0] = item;
12401                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12402         }
12403 }
12404
12405 /**
12406  * Prepares DV flow counter with aging configuration.
12407  * Gets it by index when exists, creates a new one when doesn't.
12408  *
12409  * @param[in] dev
12410  *   Pointer to rte_eth_dev structure.
12411  * @param[in] dev_flow
12412  *   Pointer to the mlx5_flow.
12413  * @param[in, out] flow
12414  *   Pointer to the sub flow.
12415  * @param[in] count
12416  *   Pointer to the counter action configuration.
12417  * @param[in] age
12418  *   Pointer to the aging action configuration.
12419  * @param[out] error
12420  *   Pointer to the error structure.
12421  *
12422  * @return
12423  *   Pointer to the counter, NULL otherwise.
12424  */
12425 static struct mlx5_flow_counter *
12426 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12427                         struct mlx5_flow *dev_flow,
12428                         struct rte_flow *flow,
12429                         const struct rte_flow_action_count *count,
12430                         const struct rte_flow_action_age *age,
12431                         struct rte_flow_error *error)
12432 {
12433         if (!flow->counter) {
12434                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12435                                                                  count, age);
12436                 if (!flow->counter) {
12437                         rte_flow_error_set(error, rte_errno,
12438                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12439                                            "cannot create counter object.");
12440                         return NULL;
12441                 }
12442         }
12443         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12444 }
12445
12446 /*
12447  * Release an ASO CT action by its own device.
12448  *
12449  * @param[in] dev
12450  *   Pointer to the Ethernet device structure.
12451  * @param[in] idx
12452  *   Index of ASO CT action to release.
12453  *
12454  * @return
12455  *   0 when CT action was removed, otherwise the number of references.
12456  */
12457 static inline int
12458 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12459 {
12460         struct mlx5_priv *priv = dev->data->dev_private;
12461         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12462         uint32_t ret;
12463         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12464         enum mlx5_aso_ct_state state =
12465                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12466
12467         /* Cannot release when CT is in the ASO SQ. */
12468         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12469                 return -1;
12470         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12471         if (!ret) {
12472                 if (ct->dr_action_orig) {
12473 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12474                         claim_zero(mlx5_glue->destroy_flow_action
12475                                         (ct->dr_action_orig));
12476 #endif
12477                         ct->dr_action_orig = NULL;
12478                 }
12479                 if (ct->dr_action_rply) {
12480 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12481                         claim_zero(mlx5_glue->destroy_flow_action
12482                                         (ct->dr_action_rply));
12483 #endif
12484                         ct->dr_action_rply = NULL;
12485                 }
12486                 /* Clear the state to free, no need in 1st allocation. */
12487                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12488                 rte_spinlock_lock(&mng->ct_sl);
12489                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12490                 rte_spinlock_unlock(&mng->ct_sl);
12491         }
12492         return (int)ret;
12493 }
12494
12495 static inline int
12496 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12497                        struct rte_flow_error *error)
12498 {
12499         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12500         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12501         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12502         int ret;
12503
12504         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12505         if (dev->data->dev_started != 1)
12506                 return rte_flow_error_set(error, EAGAIN,
12507                                           RTE_FLOW_ERROR_TYPE_ACTION,
12508                                           NULL,
12509                                           "Indirect CT action cannot be destroyed when the port is stopped");
12510         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12511         if (ret < 0)
12512                 return rte_flow_error_set(error, EAGAIN,
12513                                           RTE_FLOW_ERROR_TYPE_ACTION,
12514                                           NULL,
12515                                           "Current state prevents indirect CT action from being destroyed");
12516         return ret;
12517 }
12518
12519 /*
12520  * Resize the ASO CT pools array by 64 pools.
12521  *
12522  * @param[in] dev
12523  *   Pointer to the Ethernet device structure.
12524  *
12525  * @return
12526  *   0 on success, otherwise negative errno value and rte_errno is set.
12527  */
12528 static int
12529 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12530 {
12531         struct mlx5_priv *priv = dev->data->dev_private;
12532         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12533         void *old_pools = mng->pools;
12534         /* Magic number now, need a macro. */
12535         uint32_t resize = mng->n + 64;
12536         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12537         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12538
12539         if (!pools) {
12540                 rte_errno = ENOMEM;
12541                 return -rte_errno;
12542         }
12543         rte_rwlock_write_lock(&mng->resize_rwl);
12544         /* ASO SQ/QP was already initialized in the startup. */
12545         if (old_pools) {
12546                 /* Realloc could be an alternative choice. */
12547                 rte_memcpy(pools, old_pools,
12548                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12549                 mlx5_free(old_pools);
12550         }
12551         mng->n = resize;
12552         mng->pools = pools;
12553         rte_rwlock_write_unlock(&mng->resize_rwl);
12554         return 0;
12555 }
12556
12557 /*
12558  * Create and initialize a new ASO CT pool.
12559  *
12560  * @param[in] dev
12561  *   Pointer to the Ethernet device structure.
12562  * @param[out] ct_free
12563  *   Where to put the pointer of a new CT action.
12564  *
12565  * @return
12566  *   The CT actions pool pointer and @p ct_free is set on success,
12567  *   NULL otherwise and rte_errno is set.
12568  */
12569 static struct mlx5_aso_ct_pool *
12570 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12571                        struct mlx5_aso_ct_action **ct_free)
12572 {
12573         struct mlx5_priv *priv = dev->data->dev_private;
12574         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12575         struct mlx5_aso_ct_pool *pool = NULL;
12576         struct mlx5_devx_obj *obj = NULL;
12577         uint32_t i;
12578         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12579
12580         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12581                                                           priv->sh->cdev->pdn,
12582                                                           log_obj_size);
12583         if (!obj) {
12584                 rte_errno = ENODATA;
12585                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12586                 return NULL;
12587         }
12588         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12589         if (!pool) {
12590                 rte_errno = ENOMEM;
12591                 claim_zero(mlx5_devx_cmd_destroy(obj));
12592                 return NULL;
12593         }
12594         pool->devx_obj = obj;
12595         pool->index = mng->next;
12596         /* Resize pools array if there is no room for the new pool in it. */
12597         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12598                 claim_zero(mlx5_devx_cmd_destroy(obj));
12599                 mlx5_free(pool);
12600                 return NULL;
12601         }
12602         mng->pools[pool->index] = pool;
12603         mng->next++;
12604         /* Assign the first action in the new pool, the rest go to free list. */
12605         *ct_free = &pool->actions[0];
12606         /* Lock outside, the list operation is safe here. */
12607         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12608                 /* refcnt is 0 when allocating the memory. */
12609                 pool->actions[i].offset = i;
12610                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12611         }
12612         return pool;
12613 }
12614
12615 /*
12616  * Allocate a ASO CT action from free list.
12617  *
12618  * @param[in] dev
12619  *   Pointer to the Ethernet device structure.
12620  * @param[out] error
12621  *   Pointer to the error structure.
12622  *
12623  * @return
12624  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12625  */
12626 static uint32_t
12627 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12628 {
12629         struct mlx5_priv *priv = dev->data->dev_private;
12630         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12631         struct mlx5_aso_ct_action *ct = NULL;
12632         struct mlx5_aso_ct_pool *pool;
12633         uint8_t reg_c;
12634         uint32_t ct_idx;
12635
12636         MLX5_ASSERT(mng);
12637         if (!priv->sh->cdev->config.devx) {
12638                 rte_errno = ENOTSUP;
12639                 return 0;
12640         }
12641         /* Get a free CT action, if no, a new pool will be created. */
12642         rte_spinlock_lock(&mng->ct_sl);
12643         ct = LIST_FIRST(&mng->free_cts);
12644         if (ct) {
12645                 LIST_REMOVE(ct, next);
12646         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12647                 rte_spinlock_unlock(&mng->ct_sl);
12648                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12649                                    NULL, "failed to create ASO CT pool");
12650                 return 0;
12651         }
12652         rte_spinlock_unlock(&mng->ct_sl);
12653         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12654         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12655         /* 0: inactive, 1: created, 2+: used by flows. */
12656         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12657         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12658         if (!ct->dr_action_orig) {
12659 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12660                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12661                         (priv->sh->rx_domain, pool->devx_obj->obj,
12662                          ct->offset,
12663                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12664                          reg_c - REG_C_0);
12665 #else
12666                 RTE_SET_USED(reg_c);
12667 #endif
12668                 if (!ct->dr_action_orig) {
12669                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12670                         rte_flow_error_set(error, rte_errno,
12671                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12672                                            "failed to create ASO CT action");
12673                         return 0;
12674                 }
12675         }
12676         if (!ct->dr_action_rply) {
12677 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12678                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12679                         (priv->sh->rx_domain, pool->devx_obj->obj,
12680                          ct->offset,
12681                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12682                          reg_c - REG_C_0);
12683 #endif
12684                 if (!ct->dr_action_rply) {
12685                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12686                         rte_flow_error_set(error, rte_errno,
12687                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12688                                            "failed to create ASO CT action");
12689                         return 0;
12690                 }
12691         }
12692         return ct_idx;
12693 }
12694
12695 /*
12696  * Create a conntrack object with context and actions by using ASO mechanism.
12697  *
12698  * @param[in] dev
12699  *   Pointer to rte_eth_dev structure.
12700  * @param[in] pro
12701  *   Pointer to conntrack information profile.
12702  * @param[out] error
12703  *   Pointer to the error structure.
12704  *
12705  * @return
12706  *   Index to conntrack object on success, 0 otherwise.
12707  */
12708 static uint32_t
12709 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12710                                    const struct rte_flow_action_conntrack *pro,
12711                                    struct rte_flow_error *error)
12712 {
12713         struct mlx5_priv *priv = dev->data->dev_private;
12714         struct mlx5_dev_ctx_shared *sh = priv->sh;
12715         struct mlx5_aso_ct_action *ct;
12716         uint32_t idx;
12717
12718         if (!sh->ct_aso_en)
12719                 return rte_flow_error_set(error, ENOTSUP,
12720                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12721                                           "Connection is not supported");
12722         idx = flow_dv_aso_ct_alloc(dev, error);
12723         if (!idx)
12724                 return rte_flow_error_set(error, rte_errno,
12725                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12726                                           "Failed to allocate CT object");
12727         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12728         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12729                 return rte_flow_error_set(error, EBUSY,
12730                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12731                                           "Failed to update CT");
12732         ct->is_original = !!pro->is_original_dir;
12733         ct->peer = pro->peer_port;
12734         return idx;
12735 }
12736
12737 /**
12738  * Fill the flow with DV spec, lock free
12739  * (mutex should be acquired by caller).
12740  *
12741  * @param[in] dev
12742  *   Pointer to rte_eth_dev structure.
12743  * @param[in, out] dev_flow
12744  *   Pointer to the sub flow.
12745  * @param[in] attr
12746  *   Pointer to the flow attributes.
12747  * @param[in] items
12748  *   Pointer to the list of items.
12749  * @param[in] actions
12750  *   Pointer to the list of actions.
12751  * @param[out] error
12752  *   Pointer to the error structure.
12753  *
12754  * @return
12755  *   0 on success, a negative errno value otherwise and rte_errno is set.
12756  */
12757 static int
12758 flow_dv_translate(struct rte_eth_dev *dev,
12759                   struct mlx5_flow *dev_flow,
12760                   const struct rte_flow_attr *attr,
12761                   const struct rte_flow_item items[],
12762                   const struct rte_flow_action actions[],
12763                   struct rte_flow_error *error)
12764 {
12765         struct mlx5_priv *priv = dev->data->dev_private;
12766         struct mlx5_sh_config *dev_conf = &priv->sh->config;
12767         struct rte_flow *flow = dev_flow->flow;
12768         struct mlx5_flow_handle *handle = dev_flow->handle;
12769         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12770         struct mlx5_flow_rss_desc *rss_desc;
12771         uint64_t item_flags = 0;
12772         uint64_t last_item = 0;
12773         uint64_t action_flags = 0;
12774         struct mlx5_flow_dv_matcher matcher = {
12775                 .mask = {
12776                         .size = sizeof(matcher.mask.buf),
12777                 },
12778         };
12779         int actions_n = 0;
12780         bool actions_end = false;
12781         union {
12782                 struct mlx5_flow_dv_modify_hdr_resource res;
12783                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12784                             sizeof(struct mlx5_modification_cmd) *
12785                             (MLX5_MAX_MODIFY_NUM + 1)];
12786         } mhdr_dummy;
12787         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12788         const struct rte_flow_action_count *count = NULL;
12789         const struct rte_flow_action_age *non_shared_age = NULL;
12790         union flow_dv_attr flow_attr = { .attr = 0 };
12791         uint32_t tag_be;
12792         union mlx5_flow_tbl_key tbl_key;
12793         uint32_t modify_action_position = UINT32_MAX;
12794         void *match_mask = matcher.mask.buf;
12795         void *match_value = dev_flow->dv.value.buf;
12796         uint8_t next_protocol = 0xff;
12797         struct rte_vlan_hdr vlan = { 0 };
12798         struct mlx5_flow_dv_dest_array_resource mdest_res;
12799         struct mlx5_flow_dv_sample_resource sample_res;
12800         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12801         const struct rte_flow_action_sample *sample = NULL;
12802         struct mlx5_flow_sub_actions_list *sample_act;
12803         uint32_t sample_act_pos = UINT32_MAX;
12804         uint32_t age_act_pos = UINT32_MAX;
12805         uint32_t num_of_dest = 0;
12806         int tmp_actions_n = 0;
12807         uint32_t table;
12808         int ret = 0;
12809         const struct mlx5_flow_tunnel *tunnel = NULL;
12810         struct flow_grp_info grp_info = {
12811                 .external = !!dev_flow->external,
12812                 .transfer = !!attr->transfer,
12813                 .fdb_def_rule = !!priv->fdb_def_rule,
12814                 .skip_scale = dev_flow->skip_scale &
12815                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12816                 .std_tbl_fix = true,
12817         };
12818         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12819         const struct rte_flow_item *tunnel_item = NULL;
12820         const struct rte_flow_item *gre_item = NULL;
12821
12822         if (!wks)
12823                 return rte_flow_error_set(error, ENOMEM,
12824                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12825                                           NULL,
12826                                           "failed to push flow workspace");
12827         rss_desc = &wks->rss_desc;
12828         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12829         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12830         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12831                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12832         /* update normal path action resource into last index of array */
12833         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12834         if (is_tunnel_offload_active(dev)) {
12835                 if (dev_flow->tunnel) {
12836                         RTE_VERIFY(dev_flow->tof_type ==
12837                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12838                         tunnel = dev_flow->tunnel;
12839                 } else {
12840                         tunnel = mlx5_get_tof(items, actions,
12841                                               &dev_flow->tof_type);
12842                         dev_flow->tunnel = tunnel;
12843                 }
12844                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12845                                         (dev, attr, tunnel, dev_flow->tof_type);
12846         }
12847         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12848                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12849         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12850                                        &grp_info, error);
12851         if (ret)
12852                 return ret;
12853         dev_flow->dv.group = table;
12854         if (attr->transfer)
12855                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12856         /* number of actions must be set to 0 in case of dirty stack. */
12857         mhdr_res->actions_num = 0;
12858         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12859                 /*
12860                  * do not add decap action if match rule drops packet
12861                  * HW rejects rules with decap & drop
12862                  *
12863                  * if tunnel match rule was inserted before matching tunnel set
12864                  * rule flow table used in the match rule must be registered.
12865                  * current implementation handles that in the
12866                  * flow_dv_match_register() at the function end.
12867                  */
12868                 bool add_decap = true;
12869                 const struct rte_flow_action *ptr = actions;
12870
12871                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12872                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12873                                 add_decap = false;
12874                                 break;
12875                         }
12876                 }
12877                 if (add_decap) {
12878                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12879                                                            attr->transfer,
12880                                                            error))
12881                                 return -rte_errno;
12882                         dev_flow->dv.actions[actions_n++] =
12883                                         dev_flow->dv.encap_decap->action;
12884                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12885                 }
12886         }
12887         for (; !actions_end ; actions++) {
12888                 const struct rte_flow_action_queue *queue;
12889                 const struct rte_flow_action_rss *rss;
12890                 const struct rte_flow_action *action = actions;
12891                 const uint8_t *rss_key;
12892                 struct mlx5_flow_tbl_resource *tbl;
12893                 struct mlx5_aso_age_action *age_act;
12894                 struct mlx5_flow_counter *cnt_act;
12895                 uint32_t port_id = 0;
12896                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12897                 int action_type = actions->type;
12898                 const struct rte_flow_action *found_action = NULL;
12899                 uint32_t jump_group = 0;
12900                 uint32_t owner_idx;
12901                 struct mlx5_aso_ct_action *ct;
12902
12903                 if (!mlx5_flow_os_action_supported(action_type))
12904                         return rte_flow_error_set(error, ENOTSUP,
12905                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12906                                                   actions,
12907                                                   "action not supported");
12908                 switch (action_type) {
12909                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12910                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12911                         break;
12912                 case RTE_FLOW_ACTION_TYPE_VOID:
12913                         break;
12914                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12915                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12916                         if (flow_dv_translate_action_port_id(dev, action,
12917                                                              &port_id, error))
12918                                 return -rte_errno;
12919                         port_id_resource.port_id = port_id;
12920                         MLX5_ASSERT(!handle->rix_port_id_action);
12921                         if (flow_dv_port_id_action_resource_register
12922                             (dev, &port_id_resource, dev_flow, error))
12923                                 return -rte_errno;
12924                         dev_flow->dv.actions[actions_n++] =
12925                                         dev_flow->dv.port_id_action->action;
12926                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12927                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12928                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12929                         num_of_dest++;
12930                         break;
12931                 case RTE_FLOW_ACTION_TYPE_FLAG:
12932                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12933                         wks->mark = 1;
12934                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12935                                 struct rte_flow_action_mark mark = {
12936                                         .id = MLX5_FLOW_MARK_DEFAULT,
12937                                 };
12938
12939                                 if (flow_dv_convert_action_mark(dev, &mark,
12940                                                                 mhdr_res,
12941                                                                 error))
12942                                         return -rte_errno;
12943                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12944                                 break;
12945                         }
12946                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12947                         /*
12948                          * Only one FLAG or MARK is supported per device flow
12949                          * right now. So the pointer to the tag resource must be
12950                          * zero before the register process.
12951                          */
12952                         MLX5_ASSERT(!handle->dvh.rix_tag);
12953                         if (flow_dv_tag_resource_register(dev, tag_be,
12954                                                           dev_flow, error))
12955                                 return -rte_errno;
12956                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12957                         dev_flow->dv.actions[actions_n++] =
12958                                         dev_flow->dv.tag_resource->action;
12959                         break;
12960                 case RTE_FLOW_ACTION_TYPE_MARK:
12961                         action_flags |= MLX5_FLOW_ACTION_MARK;
12962                         wks->mark = 1;
12963                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12964                                 const struct rte_flow_action_mark *mark =
12965                                         (const struct rte_flow_action_mark *)
12966                                                 actions->conf;
12967
12968                                 if (flow_dv_convert_action_mark(dev, mark,
12969                                                                 mhdr_res,
12970                                                                 error))
12971                                         return -rte_errno;
12972                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12973                                 break;
12974                         }
12975                         /* Fall-through */
12976                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12977                         /* Legacy (non-extensive) MARK action. */
12978                         tag_be = mlx5_flow_mark_set
12979                               (((const struct rte_flow_action_mark *)
12980                                (actions->conf))->id);
12981                         MLX5_ASSERT(!handle->dvh.rix_tag);
12982                         if (flow_dv_tag_resource_register(dev, tag_be,
12983                                                           dev_flow, error))
12984                                 return -rte_errno;
12985                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12986                         dev_flow->dv.actions[actions_n++] =
12987                                         dev_flow->dv.tag_resource->action;
12988                         break;
12989                 case RTE_FLOW_ACTION_TYPE_SET_META:
12990                         if (flow_dv_convert_action_set_meta
12991                                 (dev, mhdr_res, attr,
12992                                  (const struct rte_flow_action_set_meta *)
12993                                   actions->conf, error))
12994                                 return -rte_errno;
12995                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12996                         break;
12997                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12998                         if (flow_dv_convert_action_set_tag
12999                                 (dev, mhdr_res,
13000                                  (const struct rte_flow_action_set_tag *)
13001                                   actions->conf, error))
13002                                 return -rte_errno;
13003                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13004                         break;
13005                 case RTE_FLOW_ACTION_TYPE_DROP:
13006                         action_flags |= MLX5_FLOW_ACTION_DROP;
13007                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
13008                         break;
13009                 case RTE_FLOW_ACTION_TYPE_QUEUE:
13010                         queue = actions->conf;
13011                         rss_desc->queue_num = 1;
13012                         rss_desc->queue[0] = queue->index;
13013                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
13014                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
13015                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
13016                         num_of_dest++;
13017                         break;
13018                 case RTE_FLOW_ACTION_TYPE_RSS:
13019                         rss = actions->conf;
13020                         memcpy(rss_desc->queue, rss->queue,
13021                                rss->queue_num * sizeof(uint16_t));
13022                         rss_desc->queue_num = rss->queue_num;
13023                         /* NULL RSS key indicates default RSS key. */
13024                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
13025                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
13026                         /*
13027                          * rss->level and rss.types should be set in advance
13028                          * when expanding items for RSS.
13029                          */
13030                         action_flags |= MLX5_FLOW_ACTION_RSS;
13031                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
13032                                 MLX5_FLOW_FATE_SHARED_RSS :
13033                                 MLX5_FLOW_FATE_QUEUE;
13034                         break;
13035                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
13036                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13037                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
13038                         if (flow->age == 0) {
13039                                 flow->age = owner_idx;
13040                                 __atomic_fetch_add(&age_act->refcnt, 1,
13041                                                    __ATOMIC_RELAXED);
13042                         }
13043                         age_act_pos = actions_n++;
13044                         action_flags |= MLX5_FLOW_ACTION_AGE;
13045                         break;
13046                 case RTE_FLOW_ACTION_TYPE_AGE:
13047                         non_shared_age = action->conf;
13048                         age_act_pos = actions_n++;
13049                         action_flags |= MLX5_FLOW_ACTION_AGE;
13050                         break;
13051                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
13052                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13053                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
13054                                                              NULL);
13055                         MLX5_ASSERT(cnt_act != NULL);
13056                         /**
13057                          * When creating meter drop flow in drop table, the
13058                          * counter should not overwrite the rte flow counter.
13059                          */
13060                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13061                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
13062                                 dev_flow->dv.actions[actions_n++] =
13063                                                         cnt_act->action;
13064                         } else {
13065                                 if (flow->counter == 0) {
13066                                         flow->counter = owner_idx;
13067                                         __atomic_fetch_add
13068                                                 (&cnt_act->shared_info.refcnt,
13069                                                  1, __ATOMIC_RELAXED);
13070                                 }
13071                                 /* Save information first, will apply later. */
13072                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
13073                         }
13074                         break;
13075                 case RTE_FLOW_ACTION_TYPE_COUNT:
13076                         if (!priv->sh->cdev->config.devx) {
13077                                 return rte_flow_error_set
13078                                               (error, ENOTSUP,
13079                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13080                                                NULL,
13081                                                "count action not supported");
13082                         }
13083                         /* Save information first, will apply later. */
13084                         count = action->conf;
13085                         action_flags |= MLX5_FLOW_ACTION_COUNT;
13086                         break;
13087                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
13088                         dev_flow->dv.actions[actions_n++] =
13089                                                 priv->sh->pop_vlan_action;
13090                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
13091                         break;
13092                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
13093                         if (!(action_flags &
13094                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
13095                                 flow_dev_get_vlan_info_from_items(items, &vlan);
13096                         vlan.eth_proto = rte_be_to_cpu_16
13097                              ((((const struct rte_flow_action_of_push_vlan *)
13098                                                    actions->conf)->ethertype));
13099                         found_action = mlx5_flow_find_action
13100                                         (actions + 1,
13101                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
13102                         if (found_action)
13103                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
13104                         found_action = mlx5_flow_find_action
13105                                         (actions + 1,
13106                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
13107                         if (found_action)
13108                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
13109                         if (flow_dv_create_action_push_vlan
13110                                             (dev, attr, &vlan, dev_flow, error))
13111                                 return -rte_errno;
13112                         dev_flow->dv.actions[actions_n++] =
13113                                         dev_flow->dv.push_vlan_res->action;
13114                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
13115                         break;
13116                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
13117                         /* of_vlan_push action handled this action */
13118                         MLX5_ASSERT(action_flags &
13119                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
13120                         break;
13121                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
13122                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
13123                                 break;
13124                         flow_dev_get_vlan_info_from_items(items, &vlan);
13125                         mlx5_update_vlan_vid_pcp(actions, &vlan);
13126                         /* If no VLAN push - this is a modify header action */
13127                         if (flow_dv_convert_action_modify_vlan_vid
13128                                                 (mhdr_res, actions, error))
13129                                 return -rte_errno;
13130                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
13131                         break;
13132                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
13133                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
13134                         if (flow_dv_create_action_l2_encap(dev, actions,
13135                                                            dev_flow,
13136                                                            attr->transfer,
13137                                                            error))
13138                                 return -rte_errno;
13139                         dev_flow->dv.actions[actions_n++] =
13140                                         dev_flow->dv.encap_decap->action;
13141                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13142                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13143                                 sample_act->action_flags |=
13144                                                         MLX5_FLOW_ACTION_ENCAP;
13145                         break;
13146                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
13147                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
13148                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
13149                                                            attr->transfer,
13150                                                            error))
13151                                 return -rte_errno;
13152                         dev_flow->dv.actions[actions_n++] =
13153                                         dev_flow->dv.encap_decap->action;
13154                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13155                         break;
13156                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
13157                         /* Handle encap with preceding decap. */
13158                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
13159                                 if (flow_dv_create_action_raw_encap
13160                                         (dev, actions, dev_flow, attr, error))
13161                                         return -rte_errno;
13162                                 dev_flow->dv.actions[actions_n++] =
13163                                         dev_flow->dv.encap_decap->action;
13164                         } else {
13165                                 /* Handle encap without preceding decap. */
13166                                 if (flow_dv_create_action_l2_encap
13167                                     (dev, actions, dev_flow, attr->transfer,
13168                                      error))
13169                                         return -rte_errno;
13170                                 dev_flow->dv.actions[actions_n++] =
13171                                         dev_flow->dv.encap_decap->action;
13172                         }
13173                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13174                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13175                                 sample_act->action_flags |=
13176                                                         MLX5_FLOW_ACTION_ENCAP;
13177                         break;
13178                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
13179                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
13180                                 ;
13181                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
13182                                 if (flow_dv_create_action_l2_decap
13183                                     (dev, dev_flow, attr->transfer, error))
13184                                         return -rte_errno;
13185                                 dev_flow->dv.actions[actions_n++] =
13186                                         dev_flow->dv.encap_decap->action;
13187                         }
13188                         /* If decap is followed by encap, handle it at encap. */
13189                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13190                         break;
13191                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
13192                         dev_flow->dv.actions[actions_n++] =
13193                                 (void *)(uintptr_t)action->conf;
13194                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13195                         break;
13196                 case RTE_FLOW_ACTION_TYPE_JUMP:
13197                         jump_group = ((const struct rte_flow_action_jump *)
13198                                                         action->conf)->group;
13199                         grp_info.std_tbl_fix = 0;
13200                         if (dev_flow->skip_scale &
13201                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
13202                                 grp_info.skip_scale = 1;
13203                         else
13204                                 grp_info.skip_scale = 0;
13205                         ret = mlx5_flow_group_to_table(dev, tunnel,
13206                                                        jump_group,
13207                                                        &table,
13208                                                        &grp_info, error);
13209                         if (ret)
13210                                 return ret;
13211                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
13212                                                        attr->transfer,
13213                                                        !!dev_flow->external,
13214                                                        tunnel, jump_group, 0,
13215                                                        0, error);
13216                         if (!tbl)
13217                                 return rte_flow_error_set
13218                                                 (error, errno,
13219                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13220                                                  NULL,
13221                                                  "cannot create jump action.");
13222                         if (flow_dv_jump_tbl_resource_register
13223                             (dev, tbl, dev_flow, error)) {
13224                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
13225                                 return rte_flow_error_set
13226                                                 (error, errno,
13227                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13228                                                  NULL,
13229                                                  "cannot create jump action.");
13230                         }
13231                         dev_flow->dv.actions[actions_n++] =
13232                                         dev_flow->dv.jump->action;
13233                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13234                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13235                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13236                         num_of_dest++;
13237                         break;
13238                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13239                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13240                         if (flow_dv_convert_action_modify_mac
13241                                         (mhdr_res, actions, error))
13242                                 return -rte_errno;
13243                         action_flags |= actions->type ==
13244                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13245                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
13246                                         MLX5_FLOW_ACTION_SET_MAC_DST;
13247                         break;
13248                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13249                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13250                         if (flow_dv_convert_action_modify_ipv4
13251                                         (mhdr_res, actions, error))
13252                                 return -rte_errno;
13253                         action_flags |= actions->type ==
13254                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13255                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13256                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13257                         break;
13258                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13259                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13260                         if (flow_dv_convert_action_modify_ipv6
13261                                         (mhdr_res, actions, error))
13262                                 return -rte_errno;
13263                         action_flags |= actions->type ==
13264                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13265                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13266                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13267                         break;
13268                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13269                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13270                         if (flow_dv_convert_action_modify_tp
13271                                         (mhdr_res, actions, items,
13272                                          &flow_attr, dev_flow, !!(action_flags &
13273                                          MLX5_FLOW_ACTION_DECAP), error))
13274                                 return -rte_errno;
13275                         action_flags |= actions->type ==
13276                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13277                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13278                                         MLX5_FLOW_ACTION_SET_TP_DST;
13279                         break;
13280                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13281                         if (flow_dv_convert_action_modify_dec_ttl
13282                                         (mhdr_res, items, &flow_attr, dev_flow,
13283                                          !!(action_flags &
13284                                          MLX5_FLOW_ACTION_DECAP), error))
13285                                 return -rte_errno;
13286                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13287                         break;
13288                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13289                         if (flow_dv_convert_action_modify_ttl
13290                                         (mhdr_res, actions, items, &flow_attr,
13291                                          dev_flow, !!(action_flags &
13292                                          MLX5_FLOW_ACTION_DECAP), error))
13293                                 return -rte_errno;
13294                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13295                         break;
13296                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13297                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13298                         if (flow_dv_convert_action_modify_tcp_seq
13299                                         (mhdr_res, actions, error))
13300                                 return -rte_errno;
13301                         action_flags |= actions->type ==
13302                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13303                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13304                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13305                         break;
13306
13307                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13308                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13309                         if (flow_dv_convert_action_modify_tcp_ack
13310                                         (mhdr_res, actions, error))
13311                                 return -rte_errno;
13312                         action_flags |= actions->type ==
13313                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13314                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13315                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13316                         break;
13317                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13318                         if (flow_dv_convert_action_set_reg
13319                                         (mhdr_res, actions, error))
13320                                 return -rte_errno;
13321                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13322                         break;
13323                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13324                         if (flow_dv_convert_action_copy_mreg
13325                                         (dev, mhdr_res, actions, error))
13326                                 return -rte_errno;
13327                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13328                         break;
13329                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13330                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13331                         dev_flow->handle->fate_action =
13332                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13333                         break;
13334                 case RTE_FLOW_ACTION_TYPE_METER:
13335                         if (!wks->fm)
13336                                 return rte_flow_error_set(error, rte_errno,
13337                                         RTE_FLOW_ERROR_TYPE_ACTION,
13338                                         NULL, "Failed to get meter in flow.");
13339                         /* Set the meter action. */
13340                         dev_flow->dv.actions[actions_n++] =
13341                                 wks->fm->meter_action;
13342                         action_flags |= MLX5_FLOW_ACTION_METER;
13343                         break;
13344                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13345                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13346                                                               actions, error))
13347                                 return -rte_errno;
13348                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13349                         break;
13350                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13351                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13352                                                               actions, error))
13353                                 return -rte_errno;
13354                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13355                         break;
13356                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13357                         sample_act_pos = actions_n;
13358                         sample = (const struct rte_flow_action_sample *)
13359                                  action->conf;
13360                         actions_n++;
13361                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13362                         /* put encap action into group if work with port id */
13363                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13364                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13365                                 sample_act->action_flags |=
13366                                                         MLX5_FLOW_ACTION_ENCAP;
13367                         break;
13368                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13369                         if (flow_dv_convert_action_modify_field
13370                                         (dev, mhdr_res, actions, attr, error))
13371                                 return -rte_errno;
13372                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13373                         break;
13374                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13375                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13376                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13377                         if (!ct)
13378                                 return rte_flow_error_set(error, EINVAL,
13379                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13380                                                 NULL,
13381                                                 "Failed to get CT object.");
13382                         if (mlx5_aso_ct_available(priv->sh, ct))
13383                                 return rte_flow_error_set(error, rte_errno,
13384                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13385                                                 NULL,
13386                                                 "CT is unavailable.");
13387                         if (ct->is_original)
13388                                 dev_flow->dv.actions[actions_n] =
13389                                                         ct->dr_action_orig;
13390                         else
13391                                 dev_flow->dv.actions[actions_n] =
13392                                                         ct->dr_action_rply;
13393                         if (flow->ct == 0) {
13394                                 flow->indirect_type =
13395                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13396                                 flow->ct = owner_idx;
13397                                 __atomic_fetch_add(&ct->refcnt, 1,
13398                                                    __ATOMIC_RELAXED);
13399                         }
13400                         actions_n++;
13401                         action_flags |= MLX5_FLOW_ACTION_CT;
13402                         break;
13403                 case RTE_FLOW_ACTION_TYPE_END:
13404                         actions_end = true;
13405                         if (mhdr_res->actions_num) {
13406                                 /* create modify action if needed. */
13407                                 if (flow_dv_modify_hdr_resource_register
13408                                         (dev, mhdr_res, dev_flow, error))
13409                                         return -rte_errno;
13410                                 dev_flow->dv.actions[modify_action_position] =
13411                                         handle->dvh.modify_hdr->action;
13412                         }
13413                         /*
13414                          * Handle AGE and COUNT action by single HW counter
13415                          * when they are not shared.
13416                          */
13417                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13418                                 if ((non_shared_age && count) ||
13419                                     !(priv->sh->flow_hit_aso_en &&
13420                                       (attr->group || attr->transfer))) {
13421                                         /* Creates age by counters. */
13422                                         cnt_act = flow_dv_prepare_counter
13423                                                                 (dev, dev_flow,
13424                                                                  flow, count,
13425                                                                  non_shared_age,
13426                                                                  error);
13427                                         if (!cnt_act)
13428                                                 return -rte_errno;
13429                                         dev_flow->dv.actions[age_act_pos] =
13430                                                                 cnt_act->action;
13431                                         break;
13432                                 }
13433                                 if (!flow->age && non_shared_age) {
13434                                         flow->age = flow_dv_aso_age_alloc
13435                                                                 (dev, error);
13436                                         if (!flow->age)
13437                                                 return -rte_errno;
13438                                         flow_dv_aso_age_params_init
13439                                                     (dev, flow->age,
13440                                                      non_shared_age->context ?
13441                                                      non_shared_age->context :
13442                                                      (void *)(uintptr_t)
13443                                                      (dev_flow->flow_idx),
13444                                                      non_shared_age->timeout);
13445                                 }
13446                                 age_act = flow_aso_age_get_by_idx(dev,
13447                                                                   flow->age);
13448                                 dev_flow->dv.actions[age_act_pos] =
13449                                                              age_act->dr_action;
13450                         }
13451                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13452                                 /*
13453                                  * Create one count action, to be used
13454                                  * by all sub-flows.
13455                                  */
13456                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13457                                                                   flow, count,
13458                                                                   NULL, error);
13459                                 if (!cnt_act)
13460                                         return -rte_errno;
13461                                 dev_flow->dv.actions[actions_n++] =
13462                                                                 cnt_act->action;
13463                         }
13464                 default:
13465                         break;
13466                 }
13467                 if (mhdr_res->actions_num &&
13468                     modify_action_position == UINT32_MAX)
13469                         modify_action_position = actions_n++;
13470         }
13471         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13472                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13473                 int item_type = items->type;
13474
13475                 if (!mlx5_flow_os_item_supported(item_type))
13476                         return rte_flow_error_set(error, ENOTSUP,
13477                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13478                                                   NULL, "item not supported");
13479                 switch (item_type) {
13480                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13481                         flow_dv_translate_item_port_id
13482                                 (dev, match_mask, match_value, items, attr);
13483                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13484                         break;
13485                 case RTE_FLOW_ITEM_TYPE_ETH:
13486                         flow_dv_translate_item_eth(match_mask, match_value,
13487                                                    items, tunnel,
13488                                                    dev_flow->dv.group);
13489                         matcher.priority = action_flags &
13490                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13491                                         !dev_flow->external ?
13492                                         MLX5_PRIORITY_MAP_L3 :
13493                                         MLX5_PRIORITY_MAP_L2;
13494                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13495                                              MLX5_FLOW_LAYER_OUTER_L2;
13496                         break;
13497                 case RTE_FLOW_ITEM_TYPE_VLAN:
13498                         flow_dv_translate_item_vlan(dev_flow,
13499                                                     match_mask, match_value,
13500                                                     items, tunnel,
13501                                                     dev_flow->dv.group);
13502                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13503                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13504                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13505                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13506                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13507                         break;
13508                 case RTE_FLOW_ITEM_TYPE_IPV4:
13509                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13510                                                   &item_flags, &tunnel);
13511                         flow_dv_translate_item_ipv4(match_mask, match_value,
13512                                                     items, tunnel,
13513                                                     dev_flow->dv.group);
13514                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13515                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13516                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13517                         if (items->mask != NULL &&
13518                             ((const struct rte_flow_item_ipv4 *)
13519                              items->mask)->hdr.next_proto_id) {
13520                                 next_protocol =
13521                                         ((const struct rte_flow_item_ipv4 *)
13522                                          (items->spec))->hdr.next_proto_id;
13523                                 next_protocol &=
13524                                         ((const struct rte_flow_item_ipv4 *)
13525                                          (items->mask))->hdr.next_proto_id;
13526                         } else {
13527                                 /* Reset for inner layer. */
13528                                 next_protocol = 0xff;
13529                         }
13530                         break;
13531                 case RTE_FLOW_ITEM_TYPE_IPV6:
13532                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13533                                                   &item_flags, &tunnel);
13534                         flow_dv_translate_item_ipv6(match_mask, match_value,
13535                                                     items, tunnel,
13536                                                     dev_flow->dv.group);
13537                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13538                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13539                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13540                         if (items->mask != NULL &&
13541                             ((const struct rte_flow_item_ipv6 *)
13542                              items->mask)->hdr.proto) {
13543                                 next_protocol =
13544                                         ((const struct rte_flow_item_ipv6 *)
13545                                          items->spec)->hdr.proto;
13546                                 next_protocol &=
13547                                         ((const struct rte_flow_item_ipv6 *)
13548                                          items->mask)->hdr.proto;
13549                         } else {
13550                                 /* Reset for inner layer. */
13551                                 next_protocol = 0xff;
13552                         }
13553                         break;
13554                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13555                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13556                                                              match_value,
13557                                                              items, tunnel);
13558                         last_item = tunnel ?
13559                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13560                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13561                         if (items->mask != NULL &&
13562                             ((const struct rte_flow_item_ipv6_frag_ext *)
13563                              items->mask)->hdr.next_header) {
13564                                 next_protocol =
13565                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13566                                  items->spec)->hdr.next_header;
13567                                 next_protocol &=
13568                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13569                                  items->mask)->hdr.next_header;
13570                         } else {
13571                                 /* Reset for inner layer. */
13572                                 next_protocol = 0xff;
13573                         }
13574                         break;
13575                 case RTE_FLOW_ITEM_TYPE_TCP:
13576                         flow_dv_translate_item_tcp(match_mask, match_value,
13577                                                    items, tunnel);
13578                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13579                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13580                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13581                         break;
13582                 case RTE_FLOW_ITEM_TYPE_UDP:
13583                         flow_dv_translate_item_udp(match_mask, match_value,
13584                                                    items, tunnel);
13585                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13586                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13587                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13588                         break;
13589                 case RTE_FLOW_ITEM_TYPE_GRE:
13590                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13591                         last_item = MLX5_FLOW_LAYER_GRE;
13592                         tunnel_item = items;
13593                         gre_item = items;
13594                         break;
13595                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13596                         flow_dv_translate_item_gre_key(match_mask,
13597                                                        match_value, items);
13598                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13599                         break;
13600                 case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
13601                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13602                         last_item = MLX5_FLOW_LAYER_GRE;
13603                         tunnel_item = items;
13604                         break;
13605                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13606                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13607                         last_item = MLX5_FLOW_LAYER_GRE;
13608                         tunnel_item = items;
13609                         break;
13610                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13611                         flow_dv_translate_item_vxlan(dev, attr,
13612                                                      match_mask, match_value,
13613                                                      items, tunnel);
13614                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13615                         last_item = MLX5_FLOW_LAYER_VXLAN;
13616                         break;
13617                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13618                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13619                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13620                         tunnel_item = items;
13621                         break;
13622                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13623                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13624                         last_item = MLX5_FLOW_LAYER_GENEVE;
13625                         tunnel_item = items;
13626                         break;
13627                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13628                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13629                                                           match_value,
13630                                                           items, error);
13631                         if (ret)
13632                                 return rte_flow_error_set(error, -ret,
13633                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13634                                         "cannot create GENEVE TLV option");
13635                         flow->geneve_tlv_option = 1;
13636                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13637                         break;
13638                 case RTE_FLOW_ITEM_TYPE_MPLS:
13639                         flow_dv_translate_item_mpls(match_mask, match_value,
13640                                                     items, last_item, tunnel);
13641                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13642                         last_item = MLX5_FLOW_LAYER_MPLS;
13643                         break;
13644                 case RTE_FLOW_ITEM_TYPE_MARK:
13645                         flow_dv_translate_item_mark(dev, match_mask,
13646                                                     match_value, items);
13647                         last_item = MLX5_FLOW_ITEM_MARK;
13648                         break;
13649                 case RTE_FLOW_ITEM_TYPE_META:
13650                         flow_dv_translate_item_meta(dev, match_mask,
13651                                                     match_value, attr, items);
13652                         last_item = MLX5_FLOW_ITEM_METADATA;
13653                         break;
13654                 case RTE_FLOW_ITEM_TYPE_ICMP:
13655                         flow_dv_translate_item_icmp(match_mask, match_value,
13656                                                     items, tunnel);
13657                         last_item = MLX5_FLOW_LAYER_ICMP;
13658                         break;
13659                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13660                         flow_dv_translate_item_icmp6(match_mask, match_value,
13661                                                       items, tunnel);
13662                         last_item = MLX5_FLOW_LAYER_ICMP6;
13663                         break;
13664                 case RTE_FLOW_ITEM_TYPE_TAG:
13665                         flow_dv_translate_item_tag(dev, match_mask,
13666                                                    match_value, items);
13667                         last_item = MLX5_FLOW_ITEM_TAG;
13668                         break;
13669                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13670                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13671                                                         match_value, items);
13672                         last_item = MLX5_FLOW_ITEM_TAG;
13673                         break;
13674                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13675                         flow_dv_translate_item_tx_queue(dev, match_mask,
13676                                                         match_value,
13677                                                         items);
13678                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13679                         break;
13680                 case RTE_FLOW_ITEM_TYPE_GTP:
13681                         flow_dv_translate_item_gtp(match_mask, match_value,
13682                                                    items, tunnel);
13683                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13684                         last_item = MLX5_FLOW_LAYER_GTP;
13685                         break;
13686                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13687                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13688                                                           match_value,
13689                                                           items);
13690                         if (ret)
13691                                 return rte_flow_error_set(error, -ret,
13692                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13693                                         "cannot create GTP PSC item");
13694                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13695                         break;
13696                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13697                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13698                                 /* Create it only the first time to be used. */
13699                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13700                                 if (ret)
13701                                         return rte_flow_error_set
13702                                                 (error, -ret,
13703                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13704                                                 NULL,
13705                                                 "cannot create eCPRI parser");
13706                         }
13707                         flow_dv_translate_item_ecpri(dev, match_mask,
13708                                                      match_value, items,
13709                                                      last_item);
13710                         /* No other protocol should follow eCPRI layer. */
13711                         last_item = MLX5_FLOW_LAYER_ECPRI;
13712                         break;
13713                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13714                         flow_dv_translate_item_integrity(items, integrity_items,
13715                                                          &last_item);
13716                         break;
13717                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13718                         flow_dv_translate_item_aso_ct(dev, match_mask,
13719                                                       match_value, items);
13720                         break;
13721                 case RTE_FLOW_ITEM_TYPE_FLEX:
13722                         flow_dv_translate_item_flex(dev, match_mask,
13723                                                     match_value, items,
13724                                                     dev_flow, tunnel != 0);
13725                         last_item = tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
13726                                     MLX5_FLOW_ITEM_OUTER_FLEX;
13727                         break;
13728                 default:
13729                         break;
13730                 }
13731                 item_flags |= last_item;
13732         }
13733         /*
13734          * When E-Switch mode is enabled, we have two cases where we need to
13735          * set the source port manually.
13736          * The first one, is in case of Nic steering rule, and the second is
13737          * E-Switch rule where no port_id item was found. In both cases
13738          * the source port is set according the current port in use.
13739          */
13740         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode) {
13741                 if (flow_dv_translate_item_port_id(dev, match_mask,
13742                                                    match_value, NULL, attr))
13743                         return -rte_errno;
13744         }
13745         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13746                 flow_dv_translate_item_integrity_post(match_mask, match_value,
13747                                                       integrity_items,
13748                                                       item_flags);
13749         }
13750         if (item_flags & MLX5_FLOW_LAYER_VXLAN_GPE)
13751                 flow_dv_translate_item_vxlan_gpe(match_mask, match_value,
13752                                                  tunnel_item, item_flags);
13753         else if (item_flags & MLX5_FLOW_LAYER_GENEVE)
13754                 flow_dv_translate_item_geneve(match_mask, match_value,
13755                                               tunnel_item, item_flags);
13756         else if (item_flags & MLX5_FLOW_LAYER_GRE) {
13757                 if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE)
13758                         flow_dv_translate_item_gre(match_mask, match_value,
13759                                                    tunnel_item, item_flags);
13760                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_NVGRE)
13761                         flow_dv_translate_item_nvgre(match_mask, match_value,
13762                                                      tunnel_item, item_flags);
13763                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE_OPTION)
13764                         flow_dv_translate_item_gre_option(match_mask, match_value,
13765                                         tunnel_item, gre_item, item_flags);
13766                 else
13767                         MLX5_ASSERT(false);
13768         }
13769 #ifdef RTE_LIBRTE_MLX5_DEBUG
13770         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13771                                               dev_flow->dv.value.buf));
13772 #endif
13773         /*
13774          * Layers may be already initialized from prefix flow if this dev_flow
13775          * is the suffix flow.
13776          */
13777         handle->layers |= item_flags;
13778         if (action_flags & MLX5_FLOW_ACTION_RSS)
13779                 flow_dv_hashfields_set(dev_flow->handle->layers,
13780                                        rss_desc,
13781                                        &dev_flow->hash_fields);
13782         /* If has RSS action in the sample action, the Sample/Mirror resource
13783          * should be registered after the hash filed be update.
13784          */
13785         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13786                 ret = flow_dv_translate_action_sample(dev,
13787                                                       sample,
13788                                                       dev_flow, attr,
13789                                                       &num_of_dest,
13790                                                       sample_actions,
13791                                                       &sample_res,
13792                                                       error);
13793                 if (ret < 0)
13794                         return ret;
13795                 ret = flow_dv_create_action_sample(dev,
13796                                                    dev_flow,
13797                                                    num_of_dest,
13798                                                    &sample_res,
13799                                                    &mdest_res,
13800                                                    sample_actions,
13801                                                    action_flags,
13802                                                    error);
13803                 if (ret < 0)
13804                         return rte_flow_error_set
13805                                                 (error, rte_errno,
13806                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13807                                                 NULL,
13808                                                 "cannot create sample action");
13809                 if (num_of_dest > 1) {
13810                         dev_flow->dv.actions[sample_act_pos] =
13811                         dev_flow->dv.dest_array_res->action;
13812                 } else {
13813                         dev_flow->dv.actions[sample_act_pos] =
13814                         dev_flow->dv.sample_res->verbs_action;
13815                 }
13816         }
13817         /*
13818          * For multiple destination (sample action with ratio=1), the encap
13819          * action and port id action will be combined into group action.
13820          * So need remove the original these actions in the flow and only
13821          * use the sample action instead of.
13822          */
13823         if (num_of_dest > 1 &&
13824             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13825                 int i;
13826                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13827
13828                 for (i = 0; i < actions_n; i++) {
13829                         if ((sample_act->dr_encap_action &&
13830                                 sample_act->dr_encap_action ==
13831                                 dev_flow->dv.actions[i]) ||
13832                                 (sample_act->dr_port_id_action &&
13833                                 sample_act->dr_port_id_action ==
13834                                 dev_flow->dv.actions[i]) ||
13835                                 (sample_act->dr_jump_action &&
13836                                 sample_act->dr_jump_action ==
13837                                 dev_flow->dv.actions[i]))
13838                                 continue;
13839                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13840                 }
13841                 memcpy((void *)dev_flow->dv.actions,
13842                                 (void *)temp_actions,
13843                                 tmp_actions_n * sizeof(void *));
13844                 actions_n = tmp_actions_n;
13845         }
13846         dev_flow->dv.actions_n = actions_n;
13847         dev_flow->act_flags = action_flags;
13848         if (wks->skip_matcher_reg)
13849                 return 0;
13850         /* Register matcher. */
13851         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13852                                     matcher.mask.size);
13853         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13854                                                      matcher.priority,
13855                                                      dev_flow->external);
13856         /**
13857          * When creating meter drop flow in drop table, using original
13858          * 5-tuple match, the matcher priority should be lower than
13859          * mtr_id matcher.
13860          */
13861         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13862             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13863             matcher.priority <= MLX5_REG_BITS)
13864                 matcher.priority += MLX5_REG_BITS;
13865         /* reserved field no needs to be set to 0 here. */
13866         tbl_key.is_fdb = attr->transfer;
13867         tbl_key.is_egress = attr->egress;
13868         tbl_key.level = dev_flow->dv.group;
13869         tbl_key.id = dev_flow->dv.table_id;
13870         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13871                                      tunnel, attr->group, error))
13872                 return -rte_errno;
13873         return 0;
13874 }
13875
13876 /**
13877  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13878  * and tunnel.
13879  *
13880  * @param[in, out] action
13881  *   Shred RSS action holding hash RX queue objects.
13882  * @param[in] hash_fields
13883  *   Defines combination of packet fields to participate in RX hash.
13884  * @param[in] tunnel
13885  *   Tunnel type
13886  * @param[in] hrxq_idx
13887  *   Hash RX queue index to set.
13888  *
13889  * @return
13890  *   0 on success, otherwise negative errno value.
13891  */
13892 static int
13893 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13894                               const uint64_t hash_fields,
13895                               uint32_t hrxq_idx)
13896 {
13897         uint32_t *hrxqs = action->hrxq;
13898
13899         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13900         case MLX5_RSS_HASH_IPV4:
13901                 /* fall-through. */
13902         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13903                 /* fall-through. */
13904         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13905                 hrxqs[0] = hrxq_idx;
13906                 return 0;
13907         case MLX5_RSS_HASH_IPV4_TCP:
13908                 /* fall-through. */
13909         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13910                 /* fall-through. */
13911         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13912                 hrxqs[1] = hrxq_idx;
13913                 return 0;
13914         case MLX5_RSS_HASH_IPV4_UDP:
13915                 /* fall-through. */
13916         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13917                 /* fall-through. */
13918         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13919                 hrxqs[2] = hrxq_idx;
13920                 return 0;
13921         case MLX5_RSS_HASH_IPV6:
13922                 /* fall-through. */
13923         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13924                 /* fall-through. */
13925         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13926                 hrxqs[3] = hrxq_idx;
13927                 return 0;
13928         case MLX5_RSS_HASH_IPV6_TCP:
13929                 /* fall-through. */
13930         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13931                 /* fall-through. */
13932         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13933                 hrxqs[4] = hrxq_idx;
13934                 return 0;
13935         case MLX5_RSS_HASH_IPV6_UDP:
13936                 /* fall-through. */
13937         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13938                 /* fall-through. */
13939         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13940                 hrxqs[5] = hrxq_idx;
13941                 return 0;
13942         case MLX5_RSS_HASH_NONE:
13943                 hrxqs[6] = hrxq_idx;
13944                 return 0;
13945         default:
13946                 return -1;
13947         }
13948 }
13949
13950 /**
13951  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13952  * and tunnel.
13953  *
13954  * @param[in] dev
13955  *   Pointer to the Ethernet device structure.
13956  * @param[in] idx
13957  *   Shared RSS action ID holding hash RX queue objects.
13958  * @param[in] hash_fields
13959  *   Defines combination of packet fields to participate in RX hash.
13960  * @param[in] tunnel
13961  *   Tunnel type
13962  *
13963  * @return
13964  *   Valid hash RX queue index, otherwise 0.
13965  */
13966 uint32_t
13967 flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13968                                const uint64_t hash_fields)
13969 {
13970         struct mlx5_priv *priv = dev->data->dev_private;
13971         struct mlx5_shared_action_rss *shared_rss =
13972             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13973         const uint32_t *hrxqs = shared_rss->hrxq;
13974
13975         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13976         case MLX5_RSS_HASH_IPV4:
13977                 /* fall-through. */
13978         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13979                 /* fall-through. */
13980         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13981                 return hrxqs[0];
13982         case MLX5_RSS_HASH_IPV4_TCP:
13983                 /* fall-through. */
13984         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13985                 /* fall-through. */
13986         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13987                 return hrxqs[1];
13988         case MLX5_RSS_HASH_IPV4_UDP:
13989                 /* fall-through. */
13990         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13991                 /* fall-through. */
13992         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13993                 return hrxqs[2];
13994         case MLX5_RSS_HASH_IPV6:
13995                 /* fall-through. */
13996         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13997                 /* fall-through. */
13998         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13999                 return hrxqs[3];
14000         case MLX5_RSS_HASH_IPV6_TCP:
14001                 /* fall-through. */
14002         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
14003                 /* fall-through. */
14004         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
14005                 return hrxqs[4];
14006         case MLX5_RSS_HASH_IPV6_UDP:
14007                 /* fall-through. */
14008         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
14009                 /* fall-through. */
14010         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
14011                 return hrxqs[5];
14012         case MLX5_RSS_HASH_NONE:
14013                 return hrxqs[6];
14014         default:
14015                 return 0;
14016         }
14017
14018 }
14019
14020 /**
14021  * Apply the flow to the NIC, lock free,
14022  * (mutex should be acquired by caller).
14023  *
14024  * @param[in] dev
14025  *   Pointer to the Ethernet device structure.
14026  * @param[in, out] flow
14027  *   Pointer to flow structure.
14028  * @param[out] error
14029  *   Pointer to error structure.
14030  *
14031  * @return
14032  *   0 on success, a negative errno value otherwise and rte_errno is set.
14033  */
14034 static int
14035 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
14036               struct rte_flow_error *error)
14037 {
14038         struct mlx5_flow_dv_workspace *dv;
14039         struct mlx5_flow_handle *dh;
14040         struct mlx5_flow_handle_dv *dv_h;
14041         struct mlx5_flow *dev_flow;
14042         struct mlx5_priv *priv = dev->data->dev_private;
14043         uint32_t handle_idx;
14044         int n;
14045         int err;
14046         int idx;
14047         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
14048         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
14049         uint8_t misc_mask;
14050
14051         MLX5_ASSERT(wks);
14052         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
14053                 dev_flow = &wks->flows[idx];
14054                 dv = &dev_flow->dv;
14055                 dh = dev_flow->handle;
14056                 dv_h = &dh->dvh;
14057                 n = dv->actions_n;
14058                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
14059                         if (dv->transfer) {
14060                                 MLX5_ASSERT(priv->sh->dr_drop_action);
14061                                 dv->actions[n++] = priv->sh->dr_drop_action;
14062                         } else {
14063 #ifdef HAVE_MLX5DV_DR
14064                                 /* DR supports drop action placeholder. */
14065                                 MLX5_ASSERT(priv->sh->dr_drop_action);
14066                                 dv->actions[n++] = dv->group ?
14067                                         priv->sh->dr_drop_action :
14068                                         priv->root_drop_action;
14069 #else
14070                                 /* For DV we use the explicit drop queue. */
14071                                 MLX5_ASSERT(priv->drop_queue.hrxq);
14072                                 dv->actions[n++] =
14073                                                 priv->drop_queue.hrxq->action;
14074 #endif
14075                         }
14076                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
14077                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
14078                         struct mlx5_hrxq *hrxq;
14079                         uint32_t hrxq_idx;
14080
14081                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
14082                                                     &hrxq_idx);
14083                         if (!hrxq) {
14084                                 rte_flow_error_set
14085                                         (error, rte_errno,
14086                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14087                                          "cannot get hash queue");
14088                                 goto error;
14089                         }
14090                         dh->rix_hrxq = hrxq_idx;
14091                         dv->actions[n++] = hrxq->action;
14092                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14093                         struct mlx5_hrxq *hrxq = NULL;
14094                         uint32_t hrxq_idx;
14095
14096                         hrxq_idx = flow_dv_action_rss_hrxq_lookup(dev,
14097                                                 rss_desc->shared_rss,
14098                                                 dev_flow->hash_fields);
14099                         if (hrxq_idx)
14100                                 hrxq = mlx5_ipool_get
14101                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
14102                                          hrxq_idx);
14103                         if (!hrxq) {
14104                                 rte_flow_error_set
14105                                         (error, rte_errno,
14106                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14107                                          "cannot get hash queue");
14108                                 goto error;
14109                         }
14110                         dh->rix_srss = rss_desc->shared_rss;
14111                         dv->actions[n++] = hrxq->action;
14112                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
14113                         if (!priv->sh->default_miss_action) {
14114                                 rte_flow_error_set
14115                                         (error, rte_errno,
14116                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14117                                          "default miss action not be created.");
14118                                 goto error;
14119                         }
14120                         dv->actions[n++] = priv->sh->default_miss_action;
14121                 }
14122                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
14123                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
14124                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
14125                                                (void *)&dv->value, n,
14126                                                dv->actions, &dh->drv_flow);
14127                 if (err) {
14128                         rte_flow_error_set
14129                                 (error, errno,
14130                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14131                                 NULL,
14132                                 (!priv->sh->config.allow_duplicate_pattern &&
14133                                 errno == EEXIST) ?
14134                                 "duplicating pattern is not allowed" :
14135                                 "hardware refuses to create flow");
14136                         goto error;
14137                 }
14138                 if (priv->vmwa_context &&
14139                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
14140                         /*
14141                          * The rule contains the VLAN pattern.
14142                          * For VF we are going to create VLAN
14143                          * interface to make hypervisor set correct
14144                          * e-Switch vport context.
14145                          */
14146                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
14147                 }
14148         }
14149         return 0;
14150 error:
14151         err = rte_errno; /* Save rte_errno before cleanup. */
14152         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
14153                        handle_idx, dh, next) {
14154                 /* hrxq is union, don't clear it if the flag is not set. */
14155                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
14156                         mlx5_hrxq_release(dev, dh->rix_hrxq);
14157                         dh->rix_hrxq = 0;
14158                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14159                         dh->rix_srss = 0;
14160                 }
14161                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14162                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14163         }
14164         rte_errno = err; /* Restore rte_errno. */
14165         return -rte_errno;
14166 }
14167
14168 void
14169 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
14170                           struct mlx5_list_entry *entry)
14171 {
14172         struct mlx5_flow_dv_matcher *resource = container_of(entry,
14173                                                              typeof(*resource),
14174                                                              entry);
14175
14176         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
14177         mlx5_free(resource);
14178 }
14179
14180 /**
14181  * Release the flow matcher.
14182  *
14183  * @param dev
14184  *   Pointer to Ethernet device.
14185  * @param port_id
14186  *   Index to port ID action resource.
14187  *
14188  * @return
14189  *   1 while a reference on it exists, 0 when freed.
14190  */
14191 static int
14192 flow_dv_matcher_release(struct rte_eth_dev *dev,
14193                         struct mlx5_flow_handle *handle)
14194 {
14195         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
14196         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
14197                                                             typeof(*tbl), tbl);
14198         int ret;
14199
14200         MLX5_ASSERT(matcher->matcher_object);
14201         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
14202         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
14203         return ret;
14204 }
14205
14206 void
14207 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14208 {
14209         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14210         struct mlx5_flow_dv_encap_decap_resource *res =
14211                                        container_of(entry, typeof(*res), entry);
14212
14213         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14214         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
14215 }
14216
14217 /**
14218  * Release an encap/decap resource.
14219  *
14220  * @param dev
14221  *   Pointer to Ethernet device.
14222  * @param encap_decap_idx
14223  *   Index of encap decap resource.
14224  *
14225  * @return
14226  *   1 while a reference on it exists, 0 when freed.
14227  */
14228 static int
14229 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
14230                                      uint32_t encap_decap_idx)
14231 {
14232         struct mlx5_priv *priv = dev->data->dev_private;
14233         struct mlx5_flow_dv_encap_decap_resource *resource;
14234
14235         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
14236                                   encap_decap_idx);
14237         if (!resource)
14238                 return 0;
14239         MLX5_ASSERT(resource->action);
14240         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
14241 }
14242
14243 /**
14244  * Release an jump to table action resource.
14245  *
14246  * @param dev
14247  *   Pointer to Ethernet device.
14248  * @param rix_jump
14249  *   Index to the jump action resource.
14250  *
14251  * @return
14252  *   1 while a reference on it exists, 0 when freed.
14253  */
14254 static int
14255 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
14256                                   uint32_t rix_jump)
14257 {
14258         struct mlx5_priv *priv = dev->data->dev_private;
14259         struct mlx5_flow_tbl_data_entry *tbl_data;
14260
14261         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
14262                                   rix_jump);
14263         if (!tbl_data)
14264                 return 0;
14265         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14266 }
14267
14268 void
14269 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14270 {
14271         struct mlx5_flow_dv_modify_hdr_resource *res =
14272                 container_of(entry, typeof(*res), entry);
14273         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14274
14275         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14276         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14277 }
14278
14279 /**
14280  * Release a modify-header resource.
14281  *
14282  * @param dev
14283  *   Pointer to Ethernet device.
14284  * @param handle
14285  *   Pointer to mlx5_flow_handle.
14286  *
14287  * @return
14288  *   1 while a reference on it exists, 0 when freed.
14289  */
14290 static int
14291 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14292                                     struct mlx5_flow_handle *handle)
14293 {
14294         struct mlx5_priv *priv = dev->data->dev_private;
14295         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14296
14297         MLX5_ASSERT(entry->action);
14298         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14299 }
14300
14301 void
14302 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14303 {
14304         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14305         struct mlx5_flow_dv_port_id_action_resource *resource =
14306                                   container_of(entry, typeof(*resource), entry);
14307
14308         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14309         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14310 }
14311
14312 /**
14313  * Release port ID action resource.
14314  *
14315  * @param dev
14316  *   Pointer to Ethernet device.
14317  * @param handle
14318  *   Pointer to mlx5_flow_handle.
14319  *
14320  * @return
14321  *   1 while a reference on it exists, 0 when freed.
14322  */
14323 static int
14324 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14325                                         uint32_t port_id)
14326 {
14327         struct mlx5_priv *priv = dev->data->dev_private;
14328         struct mlx5_flow_dv_port_id_action_resource *resource;
14329
14330         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14331         if (!resource)
14332                 return 0;
14333         MLX5_ASSERT(resource->action);
14334         return mlx5_list_unregister(priv->sh->port_id_action_list,
14335                                     &resource->entry);
14336 }
14337
14338 /**
14339  * Release shared RSS action resource.
14340  *
14341  * @param dev
14342  *   Pointer to Ethernet device.
14343  * @param srss
14344  *   Shared RSS action index.
14345  */
14346 static void
14347 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14348 {
14349         struct mlx5_priv *priv = dev->data->dev_private;
14350         struct mlx5_shared_action_rss *shared_rss;
14351
14352         shared_rss = mlx5_ipool_get
14353                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14354         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14355 }
14356
14357 void
14358 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14359 {
14360         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14361         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14362                         container_of(entry, typeof(*resource), entry);
14363
14364         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14365         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14366 }
14367
14368 /**
14369  * Release push vlan action resource.
14370  *
14371  * @param dev
14372  *   Pointer to Ethernet device.
14373  * @param handle
14374  *   Pointer to mlx5_flow_handle.
14375  *
14376  * @return
14377  *   1 while a reference on it exists, 0 when freed.
14378  */
14379 static int
14380 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14381                                           struct mlx5_flow_handle *handle)
14382 {
14383         struct mlx5_priv *priv = dev->data->dev_private;
14384         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14385         uint32_t idx = handle->dvh.rix_push_vlan;
14386
14387         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14388         if (!resource)
14389                 return 0;
14390         MLX5_ASSERT(resource->action);
14391         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14392                                     &resource->entry);
14393 }
14394
14395 /**
14396  * Release the fate resource.
14397  *
14398  * @param dev
14399  *   Pointer to Ethernet device.
14400  * @param handle
14401  *   Pointer to mlx5_flow_handle.
14402  */
14403 static void
14404 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14405                                struct mlx5_flow_handle *handle)
14406 {
14407         if (!handle->rix_fate)
14408                 return;
14409         switch (handle->fate_action) {
14410         case MLX5_FLOW_FATE_QUEUE:
14411                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14412                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14413                 break;
14414         case MLX5_FLOW_FATE_JUMP:
14415                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14416                 break;
14417         case MLX5_FLOW_FATE_PORT_ID:
14418                 flow_dv_port_id_action_resource_release(dev,
14419                                 handle->rix_port_id_action);
14420                 break;
14421         default:
14422                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14423                 break;
14424         }
14425         handle->rix_fate = 0;
14426 }
14427
14428 void
14429 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14430                          struct mlx5_list_entry *entry)
14431 {
14432         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14433                                                               typeof(*resource),
14434                                                               entry);
14435         struct rte_eth_dev *dev = resource->dev;
14436         struct mlx5_priv *priv = dev->data->dev_private;
14437
14438         if (resource->verbs_action)
14439                 claim_zero(mlx5_flow_os_destroy_flow_action
14440                                                       (resource->verbs_action));
14441         if (resource->normal_path_tbl)
14442                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14443                                              resource->normal_path_tbl);
14444         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14445         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14446         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14447 }
14448
14449 /**
14450  * Release an sample resource.
14451  *
14452  * @param dev
14453  *   Pointer to Ethernet device.
14454  * @param handle
14455  *   Pointer to mlx5_flow_handle.
14456  *
14457  * @return
14458  *   1 while a reference on it exists, 0 when freed.
14459  */
14460 static int
14461 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14462                                      struct mlx5_flow_handle *handle)
14463 {
14464         struct mlx5_priv *priv = dev->data->dev_private;
14465         struct mlx5_flow_dv_sample_resource *resource;
14466
14467         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14468                                   handle->dvh.rix_sample);
14469         if (!resource)
14470                 return 0;
14471         MLX5_ASSERT(resource->verbs_action);
14472         return mlx5_list_unregister(priv->sh->sample_action_list,
14473                                     &resource->entry);
14474 }
14475
14476 void
14477 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14478                              struct mlx5_list_entry *entry)
14479 {
14480         struct mlx5_flow_dv_dest_array_resource *resource =
14481                         container_of(entry, typeof(*resource), entry);
14482         struct rte_eth_dev *dev = resource->dev;
14483         struct mlx5_priv *priv = dev->data->dev_private;
14484         uint32_t i = 0;
14485
14486         MLX5_ASSERT(resource->action);
14487         if (resource->action)
14488                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14489         for (; i < resource->num_of_dest; i++)
14490                 flow_dv_sample_sub_actions_release(dev,
14491                                                    &resource->sample_idx[i]);
14492         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14493         DRV_LOG(DEBUG, "destination array resource %p: removed",
14494                 (void *)resource);
14495 }
14496
14497 /**
14498  * Release an destination array resource.
14499  *
14500  * @param dev
14501  *   Pointer to Ethernet device.
14502  * @param handle
14503  *   Pointer to mlx5_flow_handle.
14504  *
14505  * @return
14506  *   1 while a reference on it exists, 0 when freed.
14507  */
14508 static int
14509 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14510                                     struct mlx5_flow_handle *handle)
14511 {
14512         struct mlx5_priv *priv = dev->data->dev_private;
14513         struct mlx5_flow_dv_dest_array_resource *resource;
14514
14515         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14516                                   handle->dvh.rix_dest_array);
14517         if (!resource)
14518                 return 0;
14519         MLX5_ASSERT(resource->action);
14520         return mlx5_list_unregister(priv->sh->dest_array_list,
14521                                     &resource->entry);
14522 }
14523
14524 static void
14525 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14526 {
14527         struct mlx5_priv *priv = dev->data->dev_private;
14528         struct mlx5_dev_ctx_shared *sh = priv->sh;
14529         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14530                                 sh->geneve_tlv_option_resource;
14531         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14532         if (geneve_opt_resource) {
14533                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14534                                          __ATOMIC_RELAXED))) {
14535                         claim_zero(mlx5_devx_cmd_destroy
14536                                         (geneve_opt_resource->obj));
14537                         mlx5_free(sh->geneve_tlv_option_resource);
14538                         sh->geneve_tlv_option_resource = NULL;
14539                 }
14540         }
14541         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14542 }
14543
14544 /**
14545  * Remove the flow from the NIC but keeps it in memory.
14546  * Lock free, (mutex should be acquired by caller).
14547  *
14548  * @param[in] dev
14549  *   Pointer to Ethernet device.
14550  * @param[in, out] flow
14551  *   Pointer to flow structure.
14552  */
14553 static void
14554 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14555 {
14556         struct mlx5_flow_handle *dh;
14557         uint32_t handle_idx;
14558         struct mlx5_priv *priv = dev->data->dev_private;
14559
14560         if (!flow)
14561                 return;
14562         handle_idx = flow->dev_handles;
14563         while (handle_idx) {
14564                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14565                                     handle_idx);
14566                 if (!dh)
14567                         return;
14568                 if (dh->drv_flow) {
14569                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14570                         dh->drv_flow = NULL;
14571                 }
14572                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14573                         flow_dv_fate_resource_release(dev, dh);
14574                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14575                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14576                 handle_idx = dh->next.next;
14577         }
14578 }
14579
14580 /**
14581  * Remove the flow from the NIC and the memory.
14582  * Lock free, (mutex should be acquired by caller).
14583  *
14584  * @param[in] dev
14585  *   Pointer to the Ethernet device structure.
14586  * @param[in, out] flow
14587  *   Pointer to flow structure.
14588  */
14589 static void
14590 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14591 {
14592         struct mlx5_flow_handle *dev_handle;
14593         struct mlx5_priv *priv = dev->data->dev_private;
14594         struct mlx5_flow_meter_info *fm = NULL;
14595         uint32_t srss = 0;
14596
14597         if (!flow)
14598                 return;
14599         flow_dv_remove(dev, flow);
14600         if (flow->counter) {
14601                 flow_dv_counter_free(dev, flow->counter);
14602                 flow->counter = 0;
14603         }
14604         if (flow->meter) {
14605                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14606                 if (fm)
14607                         mlx5_flow_meter_detach(priv, fm);
14608                 flow->meter = 0;
14609         }
14610         /* Keep the current age handling by default. */
14611         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14612                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14613         else if (flow->age)
14614                 flow_dv_aso_age_release(dev, flow->age);
14615         if (flow->geneve_tlv_option) {
14616                 flow_dv_geneve_tlv_option_resource_release(dev);
14617                 flow->geneve_tlv_option = 0;
14618         }
14619         while (flow->dev_handles) {
14620                 uint32_t tmp_idx = flow->dev_handles;
14621
14622                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14623                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14624                 if (!dev_handle)
14625                         return;
14626                 flow->dev_handles = dev_handle->next.next;
14627                 while (dev_handle->flex_item) {
14628                         int index = rte_bsf32(dev_handle->flex_item);
14629
14630                         mlx5_flex_release_index(dev, index);
14631                         dev_handle->flex_item &= ~RTE_BIT32(index);
14632                 }
14633                 if (dev_handle->dvh.matcher)
14634                         flow_dv_matcher_release(dev, dev_handle);
14635                 if (dev_handle->dvh.rix_sample)
14636                         flow_dv_sample_resource_release(dev, dev_handle);
14637                 if (dev_handle->dvh.rix_dest_array)
14638                         flow_dv_dest_array_resource_release(dev, dev_handle);
14639                 if (dev_handle->dvh.rix_encap_decap)
14640                         flow_dv_encap_decap_resource_release(dev,
14641                                 dev_handle->dvh.rix_encap_decap);
14642                 if (dev_handle->dvh.modify_hdr)
14643                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14644                 if (dev_handle->dvh.rix_push_vlan)
14645                         flow_dv_push_vlan_action_resource_release(dev,
14646                                                                   dev_handle);
14647                 if (dev_handle->dvh.rix_tag)
14648                         flow_dv_tag_release(dev,
14649                                             dev_handle->dvh.rix_tag);
14650                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14651                         flow_dv_fate_resource_release(dev, dev_handle);
14652                 else if (!srss)
14653                         srss = dev_handle->rix_srss;
14654                 if (fm && dev_handle->is_meter_flow_id &&
14655                     dev_handle->split_flow_id)
14656                         mlx5_ipool_free(fm->flow_ipool,
14657                                         dev_handle->split_flow_id);
14658                 else if (dev_handle->split_flow_id &&
14659                     !dev_handle->is_meter_flow_id)
14660                         mlx5_ipool_free(priv->sh->ipool
14661                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14662                                         dev_handle->split_flow_id);
14663                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14664                            tmp_idx);
14665         }
14666         if (srss)
14667                 flow_dv_shared_rss_action_release(dev, srss);
14668 }
14669
14670 /**
14671  * Release array of hash RX queue objects.
14672  * Helper function.
14673  *
14674  * @param[in] dev
14675  *   Pointer to the Ethernet device structure.
14676  * @param[in, out] hrxqs
14677  *   Array of hash RX queue objects.
14678  *
14679  * @return
14680  *   Total number of references to hash RX queue objects in *hrxqs* array
14681  *   after this operation.
14682  */
14683 static int
14684 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14685                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14686 {
14687         size_t i;
14688         int remaining = 0;
14689
14690         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14691                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14692
14693                 if (!ret)
14694                         (*hrxqs)[i] = 0;
14695                 remaining += ret;
14696         }
14697         return remaining;
14698 }
14699
14700 /**
14701  * Release all hash RX queue objects representing shared RSS action.
14702  *
14703  * @param[in] dev
14704  *   Pointer to the Ethernet device structure.
14705  * @param[in, out] action
14706  *   Shared RSS action to remove hash RX queue objects from.
14707  *
14708  * @return
14709  *   Total number of references to hash RX queue objects stored in *action*
14710  *   after this operation.
14711  *   Expected to be 0 if no external references held.
14712  */
14713 static int
14714 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14715                                  struct mlx5_shared_action_rss *shared_rss)
14716 {
14717         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14718 }
14719
14720 /**
14721  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14722  * user input.
14723  *
14724  * Only one hash value is available for one L3+L4 combination:
14725  * for example:
14726  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14727  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14728  * same slot in mlx5_rss_hash_fields.
14729  *
14730  * @param[in] rss_types
14731  *   RSS type.
14732  * @param[in, out] hash_field
14733  *   hash_field variable needed to be adjusted.
14734  *
14735  * @return
14736  *   void
14737  */
14738 void
14739 flow_dv_action_rss_l34_hash_adjust(uint64_t rss_types,
14740                                    uint64_t *hash_field)
14741 {
14742         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14743         case MLX5_RSS_HASH_IPV4:
14744                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14745                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14746                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14747                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14748                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14749                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14750                         else
14751                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14752                 }
14753                 return;
14754         case MLX5_RSS_HASH_IPV6:
14755                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14756                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14757                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14758                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14759                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14760                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14761                         else
14762                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14763                 }
14764                 return;
14765         case MLX5_RSS_HASH_IPV4_UDP:
14766                 /* fall-through. */
14767         case MLX5_RSS_HASH_IPV6_UDP:
14768                 if (rss_types & RTE_ETH_RSS_UDP) {
14769                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14770                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14771                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14772                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14773                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14774                         else
14775                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14776                 }
14777                 return;
14778         case MLX5_RSS_HASH_IPV4_TCP:
14779                 /* fall-through. */
14780         case MLX5_RSS_HASH_IPV6_TCP:
14781                 if (rss_types & RTE_ETH_RSS_TCP) {
14782                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14783                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14784                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14785                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14786                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14787                         else
14788                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14789                 }
14790                 return;
14791         default:
14792                 return;
14793         }
14794 }
14795
14796 /**
14797  * Setup shared RSS action.
14798  * Prepare set of hash RX queue objects sufficient to handle all valid
14799  * hash_fields combinations (see enum ibv_rx_hash_fields).
14800  *
14801  * @param[in] dev
14802  *   Pointer to the Ethernet device structure.
14803  * @param[in] action_idx
14804  *   Shared RSS action ipool index.
14805  * @param[in, out] action
14806  *   Partially initialized shared RSS action.
14807  * @param[out] error
14808  *   Perform verbose error reporting if not NULL. Initialized in case of
14809  *   error only.
14810  *
14811  * @return
14812  *   0 on success, otherwise negative errno value.
14813  */
14814 static int
14815 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14816                            uint32_t action_idx,
14817                            struct mlx5_shared_action_rss *shared_rss,
14818                            struct rte_flow_error *error)
14819 {
14820         struct mlx5_priv *priv = dev->data->dev_private;
14821         struct mlx5_flow_rss_desc rss_desc = { 0 };
14822         size_t i;
14823         int err;
14824
14825         shared_rss->ind_tbl = mlx5_ind_table_obj_new
14826                               (dev, shared_rss->origin.queue,
14827                                shared_rss->origin.queue_num,
14828                                true,
14829                                !!dev->data->dev_started);
14830         if (!shared_rss->ind_tbl)
14831                 return rte_flow_error_set(error, rte_errno,
14832                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14833                                           "cannot setup indirection table");
14834         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14835         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14836         rss_desc.const_q = shared_rss->origin.queue;
14837         rss_desc.queue_num = shared_rss->origin.queue_num;
14838         /* Set non-zero value to indicate a shared RSS. */
14839         rss_desc.shared_rss = action_idx;
14840         rss_desc.ind_tbl = shared_rss->ind_tbl;
14841         if (priv->sh->config.dv_flow_en == 2)
14842                 rss_desc.hws_flags = MLX5DR_ACTION_FLAG_HWS_RX;
14843         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14844                 struct mlx5_hrxq *hrxq;
14845                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14846                 int tunnel = 0;
14847
14848                 flow_dv_action_rss_l34_hash_adjust(shared_rss->origin.types,
14849                                                    &hash_fields);
14850                 if (shared_rss->origin.level > 1) {
14851                         hash_fields |= IBV_RX_HASH_INNER;
14852                         tunnel = 1;
14853                 }
14854                 rss_desc.tunnel = tunnel;
14855                 rss_desc.hash_fields = hash_fields;
14856                 hrxq = mlx5_hrxq_get(dev, &rss_desc);
14857                 if (!hrxq) {
14858                         rte_flow_error_set
14859                                 (error, rte_errno,
14860                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14861                                  "cannot get hash queue");
14862                         goto error_hrxq_new;
14863                 }
14864                 err = __flow_dv_action_rss_hrxq_set
14865                         (shared_rss, hash_fields, hrxq->idx);
14866                 MLX5_ASSERT(!err);
14867         }
14868         return 0;
14869 error_hrxq_new:
14870         err = rte_errno;
14871         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14872         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14873                 shared_rss->ind_tbl = NULL;
14874         rte_errno = err;
14875         return -rte_errno;
14876 }
14877
14878 /**
14879  * Create shared RSS action.
14880  *
14881  * @param[in] dev
14882  *   Pointer to the Ethernet device structure.
14883  * @param[in] conf
14884  *   Shared action configuration.
14885  * @param[in] rss
14886  *   RSS action specification used to create shared action.
14887  * @param[out] error
14888  *   Perform verbose error reporting if not NULL. Initialized in case of
14889  *   error only.
14890  *
14891  * @return
14892  *   A valid shared action ID in case of success, 0 otherwise and
14893  *   rte_errno is set.
14894  */
14895 static uint32_t
14896 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14897                             const struct rte_flow_indir_action_conf *conf,
14898                             const struct rte_flow_action_rss *rss,
14899                             struct rte_flow_error *error)
14900 {
14901         struct mlx5_priv *priv = dev->data->dev_private;
14902         struct mlx5_shared_action_rss *shared_rss = NULL;
14903         struct rte_flow_action_rss *origin;
14904         const uint8_t *rss_key;
14905         uint32_t idx;
14906
14907         RTE_SET_USED(conf);
14908         shared_rss = mlx5_ipool_zmalloc
14909                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14910         if (!shared_rss) {
14911                 rte_flow_error_set(error, ENOMEM,
14912                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14913                                    "cannot allocate resource memory");
14914                 goto error_rss_init;
14915         }
14916         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14917                 rte_flow_error_set(error, E2BIG,
14918                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14919                                    "rss action number out of range");
14920                 goto error_rss_init;
14921         }
14922         origin = &shared_rss->origin;
14923         origin->func = rss->func;
14924         origin->level = rss->level;
14925         /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14926         origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14927         /* NULL RSS key indicates default RSS key. */
14928         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14929         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14930         origin->key = &shared_rss->key[0];
14931         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14932         origin->queue = rss->queue;
14933         origin->queue_num = rss->queue_num;
14934         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14935                 goto error_rss_init;
14936         /* Update queue with indirect table queue memoyr. */
14937         origin->queue = shared_rss->ind_tbl->queues;
14938         rte_spinlock_init(&shared_rss->action_rss_sl);
14939         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14940         rte_spinlock_lock(&priv->shared_act_sl);
14941         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14942                      &priv->rss_shared_actions, idx, shared_rss, next);
14943         rte_spinlock_unlock(&priv->shared_act_sl);
14944         return idx;
14945 error_rss_init:
14946         if (shared_rss) {
14947                 if (shared_rss->ind_tbl)
14948                         mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl,
14949                                                    !!dev->data->dev_started);
14950                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14951                                 idx);
14952         }
14953         return 0;
14954 }
14955
14956 /**
14957  * Destroy the shared RSS action.
14958  * Release related hash RX queue objects.
14959  *
14960  * @param[in] dev
14961  *   Pointer to the Ethernet device structure.
14962  * @param[in] idx
14963  *   The shared RSS action object ID to be removed.
14964  * @param[out] error
14965  *   Perform verbose error reporting if not NULL. Initialized in case of
14966  *   error only.
14967  *
14968  * @return
14969  *   0 on success, otherwise negative errno value.
14970  */
14971 static int
14972 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14973                              struct rte_flow_error *error)
14974 {
14975         struct mlx5_priv *priv = dev->data->dev_private;
14976         struct mlx5_shared_action_rss *shared_rss =
14977             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14978         uint32_t old_refcnt = 1;
14979         int remaining;
14980
14981         if (!shared_rss)
14982                 return rte_flow_error_set(error, EINVAL,
14983                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14984                                           "invalid shared action");
14985         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14986                                          0, 0, __ATOMIC_ACQUIRE,
14987                                          __ATOMIC_RELAXED))
14988                 return rte_flow_error_set(error, EBUSY,
14989                                           RTE_FLOW_ERROR_TYPE_ACTION,
14990                                           NULL,
14991                                           "shared rss has references");
14992         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14993         if (remaining)
14994                 return rte_flow_error_set(error, EBUSY,
14995                                           RTE_FLOW_ERROR_TYPE_ACTION,
14996                                           NULL,
14997                                           "shared rss hrxq has references");
14998         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl,
14999                                                !!dev->data->dev_started);
15000         if (remaining)
15001                 return rte_flow_error_set(error, EBUSY,
15002                                           RTE_FLOW_ERROR_TYPE_ACTION,
15003                                           NULL,
15004                                           "shared rss indirection table has"
15005                                           " references");
15006         rte_spinlock_lock(&priv->shared_act_sl);
15007         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15008                      &priv->rss_shared_actions, idx, shared_rss, next);
15009         rte_spinlock_unlock(&priv->shared_act_sl);
15010         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15011                         idx);
15012         return 0;
15013 }
15014
15015 /**
15016  * Create indirect action, lock free,
15017  * (mutex should be acquired by caller).
15018  * Dispatcher for action type specific call.
15019  *
15020  * @param[in] dev
15021  *   Pointer to the Ethernet device structure.
15022  * @param[in] conf
15023  *   Shared action configuration.
15024  * @param[in] action
15025  *   Action specification used to create indirect action.
15026  * @param[out] error
15027  *   Perform verbose error reporting if not NULL. Initialized in case of
15028  *   error only.
15029  *
15030  * @return
15031  *   A valid shared action handle in case of success, NULL otherwise and
15032  *   rte_errno is set.
15033  */
15034 struct rte_flow_action_handle *
15035 flow_dv_action_create(struct rte_eth_dev *dev,
15036                       const struct rte_flow_indir_action_conf *conf,
15037                       const struct rte_flow_action *action,
15038                       struct rte_flow_error *err)
15039 {
15040         struct mlx5_priv *priv = dev->data->dev_private;
15041         uint32_t age_idx = 0;
15042         uint32_t idx = 0;
15043         uint32_t ret = 0;
15044
15045         switch (action->type) {
15046         case RTE_FLOW_ACTION_TYPE_RSS:
15047                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
15048                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
15049                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
15050                 break;
15051         case RTE_FLOW_ACTION_TYPE_AGE:
15052                 age_idx = flow_dv_aso_age_alloc(dev, err);
15053                 if (!age_idx) {
15054                         ret = -rte_errno;
15055                         break;
15056                 }
15057                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
15058                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
15059                 flow_dv_aso_age_params_init(dev, age_idx,
15060                                         ((const struct rte_flow_action_age *)
15061                                                 action->conf)->context ?
15062                                         ((const struct rte_flow_action_age *)
15063                                                 action->conf)->context :
15064                                         (void *)(uintptr_t)idx,
15065                                         ((const struct rte_flow_action_age *)
15066                                                 action->conf)->timeout);
15067                 ret = age_idx;
15068                 break;
15069         case RTE_FLOW_ACTION_TYPE_COUNT:
15070                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
15071                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
15072                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
15073                 break;
15074         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
15075                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
15076                                                          err);
15077                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
15078                 break;
15079         default:
15080                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
15081                                    NULL, "action type not supported");
15082                 break;
15083         }
15084         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
15085 }
15086
15087 /**
15088  * Destroy the indirect action.
15089  * Release action related resources on the NIC and the memory.
15090  * Lock free, (mutex should be acquired by caller).
15091  * Dispatcher for action type specific call.
15092  *
15093  * @param[in] dev
15094  *   Pointer to the Ethernet device structure.
15095  * @param[in] handle
15096  *   The indirect action object handle to be removed.
15097  * @param[out] error
15098  *   Perform verbose error reporting if not NULL. Initialized in case of
15099  *   error only.
15100  *
15101  * @return
15102  *   0 on success, otherwise negative errno value.
15103  */
15104 int
15105 flow_dv_action_destroy(struct rte_eth_dev *dev,
15106                        struct rte_flow_action_handle *handle,
15107                        struct rte_flow_error *error)
15108 {
15109         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15110         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15111         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15112         struct mlx5_flow_counter *cnt;
15113         uint32_t no_flow_refcnt = 1;
15114         int ret;
15115
15116         switch (type) {
15117         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15118                 return __flow_dv_action_rss_release(dev, idx, error);
15119         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15120                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
15121                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
15122                                                  &no_flow_refcnt, 1, false,
15123                                                  __ATOMIC_ACQUIRE,
15124                                                  __ATOMIC_RELAXED))
15125                         return rte_flow_error_set(error, EBUSY,
15126                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15127                                                   NULL,
15128                                                   "Indirect count action has references");
15129                 flow_dv_counter_free(dev, idx);
15130                 return 0;
15131         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15132                 ret = flow_dv_aso_age_release(dev, idx);
15133                 if (ret)
15134                         /*
15135                          * In this case, the last flow has a reference will
15136                          * actually release the age action.
15137                          */
15138                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
15139                                 " released with references %d.", idx, ret);
15140                 return 0;
15141         case MLX5_INDIRECT_ACTION_TYPE_CT:
15142                 ret = flow_dv_aso_ct_release(dev, idx, error);
15143                 if (ret < 0)
15144                         return ret;
15145                 if (ret > 0)
15146                         DRV_LOG(DEBUG, "Connection tracking object %u still "
15147                                 "has references %d.", idx, ret);
15148                 return 0;
15149         default:
15150                 return rte_flow_error_set(error, ENOTSUP,
15151                                           RTE_FLOW_ERROR_TYPE_ACTION,
15152                                           NULL,
15153                                           "action type not supported");
15154         }
15155 }
15156
15157 /**
15158  * Updates in place shared RSS action configuration.
15159  *
15160  * @param[in] dev
15161  *   Pointer to the Ethernet device structure.
15162  * @param[in] idx
15163  *   The shared RSS action object ID to be updated.
15164  * @param[in] action_conf
15165  *   RSS action specification used to modify *shared_rss*.
15166  * @param[out] error
15167  *   Perform verbose error reporting if not NULL. Initialized in case of
15168  *   error only.
15169  *
15170  * @return
15171  *   0 on success, otherwise negative errno value.
15172  * @note: currently only support update of RSS queues.
15173  */
15174 static int
15175 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
15176                             const struct rte_flow_action_rss *action_conf,
15177                             struct rte_flow_error *error)
15178 {
15179         struct mlx5_priv *priv = dev->data->dev_private;
15180         struct mlx5_shared_action_rss *shared_rss =
15181             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15182         int ret = 0;
15183         void *queue = NULL;
15184         void *queue_i = NULL;
15185         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
15186         bool dev_started = !!dev->data->dev_started;
15187
15188         if (!shared_rss)
15189                 return rte_flow_error_set(error, EINVAL,
15190                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15191                                           "invalid shared action to update");
15192         if (priv->obj_ops.ind_table_modify == NULL)
15193                 return rte_flow_error_set(error, ENOTSUP,
15194                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15195                                           "cannot modify indirection table");
15196         queue = mlx5_malloc(MLX5_MEM_ZERO,
15197                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
15198                             0, SOCKET_ID_ANY);
15199         if (!queue)
15200                 return rte_flow_error_set(error, ENOMEM,
15201                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15202                                           NULL,
15203                                           "cannot allocate resource memory");
15204         memcpy(queue, action_conf->queue, queue_size);
15205         MLX5_ASSERT(shared_rss->ind_tbl);
15206         rte_spinlock_lock(&shared_rss->action_rss_sl);
15207         queue_i = shared_rss->ind_tbl->queues;
15208         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
15209                                         queue, action_conf->queue_num,
15210                                         true /* standalone */,
15211                                         dev_started /* ref_new_qs */,
15212                                         dev_started /* deref_old_qs */);
15213         if (ret) {
15214                 ret = rte_flow_error_set(error, rte_errno,
15215                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15216                                           "cannot update indirection table");
15217         } else {
15218                 /* Restore the queue to indirect table internal queue. */
15219                 memcpy(queue_i, queue, queue_size);
15220                 shared_rss->ind_tbl->queues = queue_i;
15221                 shared_rss->origin.queue_num = action_conf->queue_num;
15222         }
15223         mlx5_free(queue);
15224         rte_spinlock_unlock(&shared_rss->action_rss_sl);
15225         return ret;
15226 }
15227
15228 /*
15229  * Updates in place conntrack context or direction.
15230  * Context update should be synchronized.
15231  *
15232  * @param[in] dev
15233  *   Pointer to the Ethernet device structure.
15234  * @param[in] idx
15235  *   The conntrack object ID to be updated.
15236  * @param[in] update
15237  *   Pointer to the structure of information to update.
15238  * @param[out] error
15239  *   Perform verbose error reporting if not NULL. Initialized in case of
15240  *   error only.
15241  *
15242  * @return
15243  *   0 on success, otherwise negative errno value.
15244  */
15245 static int
15246 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
15247                            const struct rte_flow_modify_conntrack *update,
15248                            struct rte_flow_error *error)
15249 {
15250         struct mlx5_priv *priv = dev->data->dev_private;
15251         struct mlx5_aso_ct_action *ct;
15252         const struct rte_flow_action_conntrack *new_prf;
15253         int ret = 0;
15254         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15255         uint32_t dev_idx;
15256
15257         if (PORT_ID(priv) != owner)
15258                 return rte_flow_error_set(error, EACCES,
15259                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15260                                           NULL,
15261                                           "CT object owned by another port");
15262         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15263         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15264         if (!ct->refcnt)
15265                 return rte_flow_error_set(error, ENOMEM,
15266                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15267                                           NULL,
15268                                           "CT object is inactive");
15269         new_prf = &update->new_ct;
15270         if (update->direction)
15271                 ct->is_original = !!new_prf->is_original_dir;
15272         if (update->state) {
15273                 /* Only validate the profile when it needs to be updated. */
15274                 ret = mlx5_validate_action_ct(dev, new_prf, error);
15275                 if (ret)
15276                         return ret;
15277                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15278                 if (ret)
15279                         return rte_flow_error_set(error, EIO,
15280                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15281                                         NULL,
15282                                         "Failed to send CT context update WQE");
15283                 /* Block until ready or a failure. */
15284                 ret = mlx5_aso_ct_available(priv->sh, ct);
15285                 if (ret)
15286                         rte_flow_error_set(error, rte_errno,
15287                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15288                                            NULL,
15289                                            "Timeout to get the CT update");
15290         }
15291         return ret;
15292 }
15293
15294 /**
15295  * Updates in place shared action configuration, lock free,
15296  * (mutex should be acquired by caller).
15297  *
15298  * @param[in] dev
15299  *   Pointer to the Ethernet device structure.
15300  * @param[in] handle
15301  *   The indirect action object handle to be updated.
15302  * @param[in] update
15303  *   Action specification used to modify the action pointed by *handle*.
15304  *   *update* could be of same type with the action pointed by the *handle*
15305  *   handle argument, or some other structures like a wrapper, depending on
15306  *   the indirect action type.
15307  * @param[out] error
15308  *   Perform verbose error reporting if not NULL. Initialized in case of
15309  *   error only.
15310  *
15311  * @return
15312  *   0 on success, otherwise negative errno value.
15313  */
15314 int
15315 flow_dv_action_update(struct rte_eth_dev *dev,
15316                         struct rte_flow_action_handle *handle,
15317                         const void *update,
15318                         struct rte_flow_error *err)
15319 {
15320         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15321         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15322         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15323         const void *action_conf;
15324
15325         switch (type) {
15326         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15327                 action_conf = ((const struct rte_flow_action *)update)->conf;
15328                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15329         case MLX5_INDIRECT_ACTION_TYPE_CT:
15330                 return __flow_dv_action_ct_update(dev, idx, update, err);
15331         default:
15332                 return rte_flow_error_set(err, ENOTSUP,
15333                                           RTE_FLOW_ERROR_TYPE_ACTION,
15334                                           NULL,
15335                                           "action type update not supported");
15336         }
15337 }
15338
15339 /**
15340  * Destroy the meter sub policy table rules.
15341  * Lock free, (mutex should be acquired by caller).
15342  *
15343  * @param[in] dev
15344  *   Pointer to Ethernet device.
15345  * @param[in] sub_policy
15346  *   Pointer to meter sub policy table.
15347  */
15348 static void
15349 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15350                              struct mlx5_flow_meter_sub_policy *sub_policy)
15351 {
15352         struct mlx5_priv *priv = dev->data->dev_private;
15353         struct mlx5_flow_tbl_data_entry *tbl;
15354         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15355         struct mlx5_flow_meter_info *next_fm;
15356         struct mlx5_sub_policy_color_rule *color_rule;
15357         void *tmp;
15358         uint32_t i;
15359
15360         for (i = 0; i < RTE_COLORS; i++) {
15361                 next_fm = NULL;
15362                 if (i == RTE_COLOR_GREEN && policy &&
15363                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15364                         next_fm = mlx5_flow_meter_find(priv,
15365                                         policy->act_cnt[i].next_mtr_id, NULL);
15366                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15367                                    next_port, tmp) {
15368                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15369                         tbl = container_of(color_rule->matcher->tbl,
15370                                            typeof(*tbl), tbl);
15371                         mlx5_list_unregister(tbl->matchers,
15372                                              &color_rule->matcher->entry);
15373                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15374                                      color_rule, next_port);
15375                         mlx5_free(color_rule);
15376                         if (next_fm)
15377                                 mlx5_flow_meter_detach(priv, next_fm);
15378                 }
15379         }
15380         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15381                 if (sub_policy->rix_hrxq[i]) {
15382                         if (policy && !policy->is_hierarchy)
15383                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15384                         sub_policy->rix_hrxq[i] = 0;
15385                 }
15386                 if (sub_policy->jump_tbl[i]) {
15387                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15388                                                      sub_policy->jump_tbl[i]);
15389                         sub_policy->jump_tbl[i] = NULL;
15390                 }
15391         }
15392         if (sub_policy->tbl_rsc) {
15393                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15394                                              sub_policy->tbl_rsc);
15395                 sub_policy->tbl_rsc = NULL;
15396         }
15397 }
15398
15399 /**
15400  * Destroy policy rules, lock free,
15401  * (mutex should be acquired by caller).
15402  * Dispatcher for action type specific call.
15403  *
15404  * @param[in] dev
15405  *   Pointer to the Ethernet device structure.
15406  * @param[in] mtr_policy
15407  *   Meter policy struct.
15408  */
15409 static void
15410 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15411                              struct mlx5_flow_meter_policy *mtr_policy)
15412 {
15413         uint32_t i, j;
15414         struct mlx5_flow_meter_sub_policy *sub_policy;
15415         uint16_t sub_policy_num;
15416
15417         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15418                 sub_policy_num = (mtr_policy->sub_policy_num >>
15419                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15420                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15421                 for (j = 0; j < sub_policy_num; j++) {
15422                         sub_policy = mtr_policy->sub_policys[i][j];
15423                         if (sub_policy)
15424                                 __flow_dv_destroy_sub_policy_rules(dev,
15425                                                                    sub_policy);
15426                 }
15427         }
15428 }
15429
15430 /**
15431  * Destroy policy action, lock free,
15432  * (mutex should be acquired by caller).
15433  * Dispatcher for action type specific call.
15434  *
15435  * @param[in] dev
15436  *   Pointer to the Ethernet device structure.
15437  * @param[in] mtr_policy
15438  *   Meter policy struct.
15439  */
15440 static void
15441 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15442                       struct mlx5_flow_meter_policy *mtr_policy)
15443 {
15444         struct rte_flow_action *rss_action;
15445         struct mlx5_flow_handle dev_handle;
15446         uint32_t i, j;
15447
15448         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15449                 if (mtr_policy->act_cnt[i].rix_mark) {
15450                         flow_dv_tag_release(dev,
15451                                 mtr_policy->act_cnt[i].rix_mark);
15452                         mtr_policy->act_cnt[i].rix_mark = 0;
15453                 }
15454                 if (mtr_policy->act_cnt[i].modify_hdr) {
15455                         dev_handle.dvh.modify_hdr =
15456                                 mtr_policy->act_cnt[i].modify_hdr;
15457                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15458                 }
15459                 switch (mtr_policy->act_cnt[i].fate_action) {
15460                 case MLX5_FLOW_FATE_SHARED_RSS:
15461                         rss_action = mtr_policy->act_cnt[i].rss;
15462                         mlx5_free(rss_action);
15463                         break;
15464                 case MLX5_FLOW_FATE_PORT_ID:
15465                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15466                                 flow_dv_port_id_action_resource_release(dev,
15467                                 mtr_policy->act_cnt[i].rix_port_id_action);
15468                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15469                         }
15470                         break;
15471                 case MLX5_FLOW_FATE_DROP:
15472                 case MLX5_FLOW_FATE_JUMP:
15473                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15474                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15475                                                 NULL;
15476                         break;
15477                 default:
15478                         /*Queue action do nothing*/
15479                         break;
15480                 }
15481         }
15482         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15483                 mtr_policy->dr_drop_action[j] = NULL;
15484 }
15485
15486 /**
15487  * Create policy action per domain, lock free,
15488  * (mutex should be acquired by caller).
15489  * Dispatcher for action type specific call.
15490  *
15491  * @param[in] dev
15492  *   Pointer to the Ethernet device structure.
15493  * @param[in] mtr_policy
15494  *   Meter policy struct.
15495  * @param[in] action
15496  *   Action specification used to create meter actions.
15497  * @param[out] error
15498  *   Perform verbose error reporting if not NULL. Initialized in case of
15499  *   error only.
15500  *
15501  * @return
15502  *   0 on success, otherwise negative errno value.
15503  */
15504 static int
15505 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15506                         struct mlx5_flow_meter_policy *mtr_policy,
15507                         const struct rte_flow_action *actions[RTE_COLORS],
15508                         enum mlx5_meter_domain domain,
15509                         struct rte_mtr_error *error)
15510 {
15511         struct mlx5_priv *priv = dev->data->dev_private;
15512         struct rte_flow_error flow_err;
15513         const struct rte_flow_action *act;
15514         uint64_t action_flags;
15515         struct mlx5_flow_handle dh;
15516         struct mlx5_flow dev_flow;
15517         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15518         int i, ret;
15519         uint8_t egress, transfer;
15520         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15521         union {
15522                 struct mlx5_flow_dv_modify_hdr_resource res;
15523                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15524                             sizeof(struct mlx5_modification_cmd) *
15525                             (MLX5_MAX_MODIFY_NUM + 1)];
15526         } mhdr_dummy;
15527         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15528         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
15529
15530         MLX5_ASSERT(wks);
15531         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15532         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15533         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15534         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15535         memset(&port_id_action, 0,
15536                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15537         memset(mhdr_res, 0, sizeof(*mhdr_res));
15538         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15539                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15540                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15541         dev_flow.handle = &dh;
15542         dev_flow.dv.port_id_action = &port_id_action;
15543         dev_flow.external = true;
15544         for (i = 0; i < RTE_COLORS; i++) {
15545                 if (i < MLX5_MTR_RTE_COLORS)
15546                         act_cnt = &mtr_policy->act_cnt[i];
15547                 /* Skip the color policy actions creation. */
15548                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15549                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15550                         continue;
15551                 action_flags = 0;
15552                 for (act = actions[i];
15553                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15554                         switch (act->type) {
15555                         case RTE_FLOW_ACTION_TYPE_MARK:
15556                         {
15557                                 uint32_t tag_be = mlx5_flow_mark_set
15558                                         (((const struct rte_flow_action_mark *)
15559                                         (act->conf))->id);
15560
15561                                 if (i >= MLX5_MTR_RTE_COLORS)
15562                                         return -rte_mtr_error_set(error,
15563                                           ENOTSUP,
15564                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15565                                           NULL,
15566                                           "cannot create policy "
15567                                           "mark action for this color");
15568                                 wks->mark = 1;
15569                                 if (flow_dv_tag_resource_register(dev, tag_be,
15570                                                   &dev_flow, &flow_err))
15571                                         return -rte_mtr_error_set(error,
15572                                         ENOTSUP,
15573                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15574                                         NULL,
15575                                         "cannot setup policy mark action");
15576                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15577                                 act_cnt->rix_mark =
15578                                         dev_flow.handle->dvh.rix_tag;
15579                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15580                                 break;
15581                         }
15582                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15583                                 if (i >= MLX5_MTR_RTE_COLORS)
15584                                         return -rte_mtr_error_set(error,
15585                                           ENOTSUP,
15586                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15587                                           NULL,
15588                                           "cannot create policy "
15589                                           "set tag action for this color");
15590                                 if (flow_dv_convert_action_set_tag
15591                                 (dev, mhdr_res,
15592                                 (const struct rte_flow_action_set_tag *)
15593                                 act->conf,  &flow_err))
15594                                         return -rte_mtr_error_set(error,
15595                                         ENOTSUP,
15596                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15597                                         NULL, "cannot convert policy "
15598                                         "set tag action");
15599                                 if (!mhdr_res->actions_num)
15600                                         return -rte_mtr_error_set(error,
15601                                         ENOTSUP,
15602                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15603                                         NULL, "cannot find policy "
15604                                         "set tag action");
15605                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15606                                 break;
15607                         case RTE_FLOW_ACTION_TYPE_DROP:
15608                         {
15609                                 struct mlx5_flow_mtr_mng *mtrmng =
15610                                                 priv->sh->mtrmng;
15611                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15612
15613                                 /*
15614                                  * Create the drop table with
15615                                  * METER DROP level.
15616                                  */
15617                                 if (!mtrmng->drop_tbl[domain]) {
15618                                         mtrmng->drop_tbl[domain] =
15619                                         flow_dv_tbl_resource_get(dev,
15620                                         MLX5_FLOW_TABLE_LEVEL_METER,
15621                                         egress, transfer, false, NULL, 0,
15622                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15623                                         if (!mtrmng->drop_tbl[domain])
15624                                                 return -rte_mtr_error_set
15625                                         (error, ENOTSUP,
15626                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15627                                         NULL,
15628                                         "Failed to create meter drop table");
15629                                 }
15630                                 tbl_data = container_of
15631                                 (mtrmng->drop_tbl[domain],
15632                                 struct mlx5_flow_tbl_data_entry, tbl);
15633                                 if (i < MLX5_MTR_RTE_COLORS) {
15634                                         act_cnt->dr_jump_action[domain] =
15635                                                 tbl_data->jump.action;
15636                                         act_cnt->fate_action =
15637                                                 MLX5_FLOW_FATE_DROP;
15638                                 }
15639                                 if (i == RTE_COLOR_RED)
15640                                         mtr_policy->dr_drop_action[domain] =
15641                                                 tbl_data->jump.action;
15642                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15643                                 break;
15644                         }
15645                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15646                         {
15647                                 if (i >= MLX5_MTR_RTE_COLORS)
15648                                         return -rte_mtr_error_set(error,
15649                                         ENOTSUP,
15650                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15651                                         NULL, "cannot create policy "
15652                                         "fate queue for this color");
15653                                 act_cnt->queue =
15654                                 ((const struct rte_flow_action_queue *)
15655                                         (act->conf))->index;
15656                                 act_cnt->fate_action =
15657                                         MLX5_FLOW_FATE_QUEUE;
15658                                 dev_flow.handle->fate_action =
15659                                         MLX5_FLOW_FATE_QUEUE;
15660                                 mtr_policy->is_queue = 1;
15661                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15662                                 break;
15663                         }
15664                         case RTE_FLOW_ACTION_TYPE_RSS:
15665                         {
15666                                 int rss_size;
15667
15668                                 if (i >= MLX5_MTR_RTE_COLORS)
15669                                         return -rte_mtr_error_set(error,
15670                                           ENOTSUP,
15671                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15672                                           NULL,
15673                                           "cannot create policy "
15674                                           "rss action for this color");
15675                                 /*
15676                                  * Save RSS conf into policy struct
15677                                  * for translate stage.
15678                                  */
15679                                 rss_size = (int)rte_flow_conv
15680                                         (RTE_FLOW_CONV_OP_ACTION,
15681                                         NULL, 0, act, &flow_err);
15682                                 if (rss_size <= 0)
15683                                         return -rte_mtr_error_set(error,
15684                                           ENOTSUP,
15685                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15686                                           NULL, "Get the wrong "
15687                                           "rss action struct size");
15688                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15689                                                 rss_size, 0, SOCKET_ID_ANY);
15690                                 if (!act_cnt->rss)
15691                                         return -rte_mtr_error_set(error,
15692                                           ENOTSUP,
15693                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15694                                           NULL,
15695                                           "Fail to malloc rss action memory");
15696                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15697                                         act_cnt->rss, rss_size,
15698                                         act, &flow_err);
15699                                 if (ret < 0)
15700                                         return -rte_mtr_error_set(error,
15701                                           ENOTSUP,
15702                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15703                                           NULL, "Fail to save "
15704                                           "rss action into policy struct");
15705                                 act_cnt->fate_action =
15706                                         MLX5_FLOW_FATE_SHARED_RSS;
15707                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15708                                 break;
15709                         }
15710                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15711                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15712                         {
15713                                 struct mlx5_flow_dv_port_id_action_resource
15714                                         port_id_resource;
15715                                 uint32_t port_id = 0;
15716
15717                                 if (i >= MLX5_MTR_RTE_COLORS)
15718                                         return -rte_mtr_error_set(error,
15719                                         ENOTSUP,
15720                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15721                                         NULL, "cannot create policy "
15722                                         "port action for this color");
15723                                 memset(&port_id_resource, 0,
15724                                         sizeof(port_id_resource));
15725                                 if (flow_dv_translate_action_port_id(dev, act,
15726                                                 &port_id, &flow_err))
15727                                         return -rte_mtr_error_set(error,
15728                                         ENOTSUP,
15729                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15730                                         NULL, "cannot translate "
15731                                         "policy port action");
15732                                 port_id_resource.port_id = port_id;
15733                                 if (flow_dv_port_id_action_resource_register
15734                                         (dev, &port_id_resource,
15735                                         &dev_flow, &flow_err))
15736                                         return -rte_mtr_error_set(error,
15737                                         ENOTSUP,
15738                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15739                                         NULL, "cannot setup "
15740                                         "policy port action");
15741                                 act_cnt->rix_port_id_action =
15742                                         dev_flow.handle->rix_port_id_action;
15743                                 act_cnt->fate_action =
15744                                         MLX5_FLOW_FATE_PORT_ID;
15745                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15746                                 break;
15747                         }
15748                         case RTE_FLOW_ACTION_TYPE_JUMP:
15749                         {
15750                                 uint32_t jump_group = 0;
15751                                 uint32_t table = 0;
15752                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15753                                 struct flow_grp_info grp_info = {
15754                                         .external = !!dev_flow.external,
15755                                         .transfer = !!transfer,
15756                                         .fdb_def_rule = !!priv->fdb_def_rule,
15757                                         .std_tbl_fix = 0,
15758                                         .skip_scale = dev_flow.skip_scale &
15759                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15760                                 };
15761                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15762                                         mtr_policy->sub_policys[domain][0];
15763
15764                                 if (i >= MLX5_MTR_RTE_COLORS)
15765                                         return -rte_mtr_error_set(error,
15766                                           ENOTSUP,
15767                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15768                                           NULL,
15769                                           "cannot create policy "
15770                                           "jump action for this color");
15771                                 jump_group =
15772                                 ((const struct rte_flow_action_jump *)
15773                                                         act->conf)->group;
15774                                 if (mlx5_flow_group_to_table(dev, NULL,
15775                                                        jump_group,
15776                                                        &table,
15777                                                        &grp_info, &flow_err))
15778                                         return -rte_mtr_error_set(error,
15779                                         ENOTSUP,
15780                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15781                                         NULL, "cannot setup "
15782                                         "policy jump action");
15783                                 sub_policy->jump_tbl[i] =
15784                                 flow_dv_tbl_resource_get(dev,
15785                                         table, egress,
15786                                         transfer,
15787                                         !!dev_flow.external,
15788                                         NULL, jump_group, 0,
15789                                         0, &flow_err);
15790                                 if
15791                                 (!sub_policy->jump_tbl[i])
15792                                         return  -rte_mtr_error_set(error,
15793                                         ENOTSUP,
15794                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15795                                         NULL, "cannot create jump action.");
15796                                 tbl_data = container_of
15797                                 (sub_policy->jump_tbl[i],
15798                                 struct mlx5_flow_tbl_data_entry, tbl);
15799                                 act_cnt->dr_jump_action[domain] =
15800                                         tbl_data->jump.action;
15801                                 act_cnt->fate_action =
15802                                         MLX5_FLOW_FATE_JUMP;
15803                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15804                                 break;
15805                         }
15806                         /*
15807                          * No need to check meter hierarchy for Y or R colors
15808                          * here since it is done in the validation stage.
15809                          */
15810                         case RTE_FLOW_ACTION_TYPE_METER:
15811                         {
15812                                 const struct rte_flow_action_meter *mtr;
15813                                 struct mlx5_flow_meter_info *next_fm;
15814                                 struct mlx5_flow_meter_policy *next_policy;
15815                                 struct rte_flow_action tag_action;
15816                                 struct mlx5_rte_flow_action_set_tag set_tag;
15817                                 uint32_t next_mtr_idx = 0;
15818
15819                                 mtr = act->conf;
15820                                 next_fm = mlx5_flow_meter_find(priv,
15821                                                         mtr->mtr_id,
15822                                                         &next_mtr_idx);
15823                                 if (!next_fm)
15824                                         return -rte_mtr_error_set(error, EINVAL,
15825                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15826                                                 "Fail to find next meter.");
15827                                 if (next_fm->def_policy)
15828                                         return -rte_mtr_error_set(error, EINVAL,
15829                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15830                                 "Hierarchy only supports termination meter.");
15831                                 next_policy = mlx5_flow_meter_policy_find(dev,
15832                                                 next_fm->policy_id, NULL);
15833                                 MLX5_ASSERT(next_policy);
15834                                 if (next_fm->drop_cnt) {
15835                                         set_tag.id =
15836                                                 (enum modify_reg)
15837                                                 mlx5_flow_get_reg_id(dev,
15838                                                 MLX5_MTR_ID,
15839                                                 0,
15840                                                 (struct rte_flow_error *)error);
15841                                         set_tag.offset = (priv->mtr_reg_share ?
15842                                                 MLX5_MTR_COLOR_BITS : 0);
15843                                         set_tag.length = (priv->mtr_reg_share ?
15844                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15845                                                MLX5_REG_BITS);
15846                                         set_tag.data = next_mtr_idx;
15847                                         tag_action.type =
15848                                                 (enum rte_flow_action_type)
15849                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15850                                         tag_action.conf = &set_tag;
15851                                         if (flow_dv_convert_action_set_reg
15852                                                 (mhdr_res, &tag_action,
15853                                                 (struct rte_flow_error *)error))
15854                                                 return -rte_errno;
15855                                         action_flags |=
15856                                                 MLX5_FLOW_ACTION_SET_TAG;
15857                                 }
15858                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15859                                 act_cnt->next_mtr_id = next_fm->meter_id;
15860                                 act_cnt->next_sub_policy = NULL;
15861                                 mtr_policy->is_hierarchy = 1;
15862                                 mtr_policy->dev = next_policy->dev;
15863                                 action_flags |=
15864                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15865                                 break;
15866                         }
15867                         default:
15868                                 return -rte_mtr_error_set(error, ENOTSUP,
15869                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15870                                           NULL, "action type not supported");
15871                         }
15872                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15873                                 /* create modify action if needed. */
15874                                 dev_flow.dv.group = 1;
15875                                 if (flow_dv_modify_hdr_resource_register
15876                                         (dev, mhdr_res, &dev_flow, &flow_err))
15877                                         return -rte_mtr_error_set(error,
15878                                                 ENOTSUP,
15879                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15880                                                 NULL, "cannot register policy "
15881                                                 "set tag action");
15882                                 act_cnt->modify_hdr =
15883                                         dev_flow.handle->dvh.modify_hdr;
15884                         }
15885                 }
15886         }
15887         return 0;
15888 }
15889
15890 /**
15891  * Create policy action per domain, lock free,
15892  * (mutex should be acquired by caller).
15893  * Dispatcher for action type specific call.
15894  *
15895  * @param[in] dev
15896  *   Pointer to the Ethernet device structure.
15897  * @param[in] mtr_policy
15898  *   Meter policy struct.
15899  * @param[in] action
15900  *   Action specification used to create meter actions.
15901  * @param[out] error
15902  *   Perform verbose error reporting if not NULL. Initialized in case of
15903  *   error only.
15904  *
15905  * @return
15906  *   0 on success, otherwise negative errno value.
15907  */
15908 static int
15909 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15910                       struct mlx5_flow_meter_policy *mtr_policy,
15911                       const struct rte_flow_action *actions[RTE_COLORS],
15912                       struct rte_mtr_error *error)
15913 {
15914         int ret, i;
15915         uint16_t sub_policy_num;
15916
15917         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15918                 sub_policy_num = (mtr_policy->sub_policy_num >>
15919                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15920                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15921                 if (sub_policy_num) {
15922                         ret = __flow_dv_create_domain_policy_acts(dev,
15923                                 mtr_policy, actions,
15924                                 (enum mlx5_meter_domain)i, error);
15925                         /* Cleaning resource is done in the caller level. */
15926                         if (ret)
15927                                 return ret;
15928                 }
15929         }
15930         return 0;
15931 }
15932
15933 /**
15934  * Query a DV flow rule for its statistics via DevX.
15935  *
15936  * @param[in] dev
15937  *   Pointer to Ethernet device.
15938  * @param[in] cnt_idx
15939  *   Index to the flow counter.
15940  * @param[out] data
15941  *   Data retrieved by the query.
15942  * @param[out] error
15943  *   Perform verbose error reporting if not NULL.
15944  *
15945  * @return
15946  *   0 on success, a negative errno value otherwise and rte_errno is set.
15947  */
15948 static int
15949 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15950                     struct rte_flow_error *error)
15951 {
15952         struct mlx5_priv *priv = dev->data->dev_private;
15953         struct rte_flow_query_count *qc = data;
15954
15955         if (!priv->sh->cdev->config.devx)
15956                 return rte_flow_error_set(error, ENOTSUP,
15957                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15958                                           NULL,
15959                                           "counters are not supported");
15960         if (cnt_idx) {
15961                 uint64_t pkts, bytes;
15962                 struct mlx5_flow_counter *cnt;
15963                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15964
15965                 if (err)
15966                         return rte_flow_error_set(error, -err,
15967                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15968                                         NULL, "cannot read counters");
15969                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15970                 qc->hits_set = 1;
15971                 qc->bytes_set = 1;
15972                 qc->hits = pkts - cnt->hits;
15973                 qc->bytes = bytes - cnt->bytes;
15974                 if (qc->reset) {
15975                         cnt->hits = pkts;
15976                         cnt->bytes = bytes;
15977                 }
15978                 return 0;
15979         }
15980         return rte_flow_error_set(error, EINVAL,
15981                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15982                                   NULL,
15983                                   "counters are not available");
15984 }
15985
15986 int
15987 flow_dv_action_query(struct rte_eth_dev *dev,
15988                      const struct rte_flow_action_handle *handle, void *data,
15989                      struct rte_flow_error *error)
15990 {
15991         struct mlx5_age_param *age_param;
15992         struct rte_flow_query_age *resp;
15993         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15994         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15995         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15996         struct mlx5_priv *priv = dev->data->dev_private;
15997         struct mlx5_aso_ct_action *ct;
15998         uint16_t owner;
15999         uint32_t dev_idx;
16000
16001         switch (type) {
16002         case MLX5_INDIRECT_ACTION_TYPE_AGE:
16003                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
16004                 resp = data;
16005                 resp->aged = __atomic_load_n(&age_param->state,
16006                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
16007                                                                           1 : 0;
16008                 resp->sec_since_last_hit_valid = !resp->aged;
16009                 if (resp->sec_since_last_hit_valid)
16010                         resp->sec_since_last_hit = __atomic_load_n
16011                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16012                 return 0;
16013         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
16014                 return flow_dv_query_count(dev, idx, data, error);
16015         case MLX5_INDIRECT_ACTION_TYPE_CT:
16016                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
16017                 if (owner != PORT_ID(priv))
16018                         return rte_flow_error_set(error, EACCES,
16019                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16020                                         NULL,
16021                                         "CT object owned by another port");
16022                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
16023                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
16024                 MLX5_ASSERT(ct);
16025                 if (!ct->refcnt)
16026                         return rte_flow_error_set(error, EFAULT,
16027                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16028                                         NULL,
16029                                         "CT object is inactive");
16030                 ((struct rte_flow_action_conntrack *)data)->peer_port =
16031                                                         ct->peer;
16032                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
16033                                                         ct->is_original;
16034                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
16035                         return rte_flow_error_set(error, EIO,
16036                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16037                                         NULL,
16038                                         "Failed to query CT context");
16039                 return 0;
16040         default:
16041                 return rte_flow_error_set(error, ENOTSUP,
16042                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16043                                           "action type query not supported");
16044         }
16045 }
16046
16047 /**
16048  * Query a flow rule AGE action for aging information.
16049  *
16050  * @param[in] dev
16051  *   Pointer to Ethernet device.
16052  * @param[in] flow
16053  *   Pointer to the sub flow.
16054  * @param[out] data
16055  *   data retrieved by the query.
16056  * @param[out] error
16057  *   Perform verbose error reporting if not NULL.
16058  *
16059  * @return
16060  *   0 on success, a negative errno value otherwise and rte_errno is set.
16061  */
16062 static int
16063 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
16064                   void *data, struct rte_flow_error *error)
16065 {
16066         struct rte_flow_query_age *resp = data;
16067         struct mlx5_age_param *age_param;
16068
16069         if (flow->age) {
16070                 struct mlx5_aso_age_action *act =
16071                                      flow_aso_age_get_by_idx(dev, flow->age);
16072
16073                 age_param = &act->age_params;
16074         } else if (flow->counter) {
16075                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
16076
16077                 if (!age_param || !age_param->timeout)
16078                         return rte_flow_error_set
16079                                         (error, EINVAL,
16080                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16081                                          NULL, "cannot read age data");
16082         } else {
16083                 return rte_flow_error_set(error, EINVAL,
16084                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16085                                           NULL, "age data not available");
16086         }
16087         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
16088                                      AGE_TMOUT ? 1 : 0;
16089         resp->sec_since_last_hit_valid = !resp->aged;
16090         if (resp->sec_since_last_hit_valid)
16091                 resp->sec_since_last_hit = __atomic_load_n
16092                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16093         return 0;
16094 }
16095
16096 /**
16097  * Query a flow.
16098  *
16099  * @see rte_flow_query()
16100  * @see rte_flow_ops
16101  */
16102 static int
16103 flow_dv_query(struct rte_eth_dev *dev,
16104               struct rte_flow *flow __rte_unused,
16105               const struct rte_flow_action *actions __rte_unused,
16106               void *data __rte_unused,
16107               struct rte_flow_error *error __rte_unused)
16108 {
16109         int ret = -EINVAL;
16110
16111         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
16112                 switch (actions->type) {
16113                 case RTE_FLOW_ACTION_TYPE_VOID:
16114                         break;
16115                 case RTE_FLOW_ACTION_TYPE_COUNT:
16116                         ret = flow_dv_query_count(dev, flow->counter, data,
16117                                                   error);
16118                         break;
16119                 case RTE_FLOW_ACTION_TYPE_AGE:
16120                         ret = flow_dv_query_age(dev, flow, data, error);
16121                         break;
16122                 default:
16123                         return rte_flow_error_set(error, ENOTSUP,
16124                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16125                                                   actions,
16126                                                   "action not supported");
16127                 }
16128         }
16129         return ret;
16130 }
16131
16132 /**
16133  * Destroy the meter table set.
16134  * Lock free, (mutex should be acquired by caller).
16135  *
16136  * @param[in] dev
16137  *   Pointer to Ethernet device.
16138  * @param[in] fm
16139  *   Meter information table.
16140  */
16141 static void
16142 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
16143                         struct mlx5_flow_meter_info *fm)
16144 {
16145         struct mlx5_priv *priv = dev->data->dev_private;
16146         int i;
16147
16148         if (!fm || !priv->sh->config.dv_flow_en)
16149                 return;
16150         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16151                 if (fm->drop_rule[i]) {
16152                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
16153                         fm->drop_rule[i] = NULL;
16154                 }
16155         }
16156 }
16157
16158 static void
16159 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
16160 {
16161         struct mlx5_priv *priv = dev->data->dev_private;
16162         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16163         struct mlx5_flow_tbl_data_entry *tbl;
16164         int i, j;
16165
16166         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16167                 if (mtrmng->def_rule[i]) {
16168                         claim_zero(mlx5_flow_os_destroy_flow
16169                                         (mtrmng->def_rule[i]));
16170                         mtrmng->def_rule[i] = NULL;
16171                 }
16172                 if (mtrmng->def_matcher[i]) {
16173                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
16174                                 struct mlx5_flow_tbl_data_entry, tbl);
16175                         mlx5_list_unregister(tbl->matchers,
16176                                              &mtrmng->def_matcher[i]->entry);
16177                         mtrmng->def_matcher[i] = NULL;
16178                 }
16179                 for (j = 0; j < MLX5_REG_BITS; j++) {
16180                         if (mtrmng->drop_matcher[i][j]) {
16181                                 tbl =
16182                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
16183                                              struct mlx5_flow_tbl_data_entry,
16184                                              tbl);
16185                                 mlx5_list_unregister(tbl->matchers,
16186                                             &mtrmng->drop_matcher[i][j]->entry);
16187                                 mtrmng->drop_matcher[i][j] = NULL;
16188                         }
16189                 }
16190                 if (mtrmng->drop_tbl[i]) {
16191                         flow_dv_tbl_resource_release(MLX5_SH(dev),
16192                                 mtrmng->drop_tbl[i]);
16193                         mtrmng->drop_tbl[i] = NULL;
16194                 }
16195         }
16196 }
16197
16198 /* Number of meter flow actions, count and jump or count and drop. */
16199 #define METER_ACTIONS 2
16200
16201 static void
16202 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
16203                                     enum mlx5_meter_domain domain)
16204 {
16205         struct mlx5_priv *priv = dev->data->dev_private;
16206         struct mlx5_flow_meter_def_policy *def_policy =
16207                         priv->sh->mtrmng->def_policy[domain];
16208
16209         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
16210         mlx5_free(def_policy);
16211         priv->sh->mtrmng->def_policy[domain] = NULL;
16212 }
16213
16214 /**
16215  * Destroy the default policy table set.
16216  *
16217  * @param[in] dev
16218  *   Pointer to Ethernet device.
16219  */
16220 static void
16221 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
16222 {
16223         struct mlx5_priv *priv = dev->data->dev_private;
16224         int i;
16225
16226         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
16227                 if (priv->sh->mtrmng->def_policy[i])
16228                         __flow_dv_destroy_domain_def_policy(dev,
16229                                         (enum mlx5_meter_domain)i);
16230         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
16231 }
16232
16233 static int
16234 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
16235                         uint32_t color_reg_c_idx,
16236                         enum rte_color color, void *matcher_object,
16237                         int actions_n, void *actions,
16238                         bool match_src_port, const struct rte_flow_item *item,
16239                         void **rule, const struct rte_flow_attr *attr)
16240 {
16241         int ret;
16242         struct mlx5_flow_dv_match_params value = {
16243                 .size = sizeof(value.buf),
16244         };
16245         struct mlx5_flow_dv_match_params matcher = {
16246                 .size = sizeof(matcher.buf),
16247         };
16248         struct mlx5_priv *priv = dev->data->dev_private;
16249         uint8_t misc_mask;
16250
16251         if (match_src_port && priv->sh->esw_mode) {
16252                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
16253                                                    value.buf, item, attr)) {
16254                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
16255                                 " value with port.", color);
16256                         return -1;
16257                 }
16258         }
16259         flow_dv_match_meta_reg(matcher.buf, value.buf,
16260                                (enum modify_reg)color_reg_c_idx,
16261                                rte_col_2_mlx5_col(color), UINT32_MAX);
16262         misc_mask = flow_dv_matcher_enable(value.buf);
16263         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16264         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
16265                                        actions_n, actions, rule);
16266         if (ret) {
16267                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16268                 return -1;
16269         }
16270         return 0;
16271 }
16272
16273 static int
16274 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16275                         uint32_t color_reg_c_idx,
16276                         uint16_t priority,
16277                         struct mlx5_flow_meter_sub_policy *sub_policy,
16278                         const struct rte_flow_attr *attr,
16279                         bool match_src_port,
16280                         const struct rte_flow_item *item,
16281                         struct mlx5_flow_dv_matcher **policy_matcher,
16282                         struct rte_flow_error *error)
16283 {
16284         struct mlx5_list_entry *entry;
16285         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16286         struct mlx5_flow_dv_matcher matcher = {
16287                 .mask = {
16288                         .size = sizeof(matcher.mask.buf),
16289                 },
16290                 .tbl = tbl_rsc,
16291         };
16292         struct mlx5_flow_dv_match_params value = {
16293                 .size = sizeof(value.buf),
16294         };
16295         struct mlx5_flow_cb_ctx ctx = {
16296                 .error = error,
16297                 .data = &matcher,
16298         };
16299         struct mlx5_flow_tbl_data_entry *tbl_data;
16300         struct mlx5_priv *priv = dev->data->dev_private;
16301         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16302
16303         if (match_src_port && priv->sh->esw_mode) {
16304                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16305                                                    value.buf, item, attr)) {
16306                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16307                                 " with port.", priority);
16308                         return -1;
16309                 }
16310         }
16311         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16312         if (priority < RTE_COLOR_RED)
16313                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16314                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16315         matcher.priority = priority;
16316         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16317                                     matcher.mask.size);
16318         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16319         if (!entry) {
16320                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16321                 return -1;
16322         }
16323         *policy_matcher =
16324                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16325         return 0;
16326 }
16327
16328 /**
16329  * Create the policy rules per domain.
16330  *
16331  * @param[in] dev
16332  *   Pointer to Ethernet device.
16333  * @param[in] sub_policy
16334  *    Pointer to sub policy table..
16335  * @param[in] egress
16336  *   Direction of the table.
16337  * @param[in] transfer
16338  *   E-Switch or NIC flow.
16339  * @param[in] acts
16340  *   Pointer to policy action list per color.
16341  *
16342  * @return
16343  *   0 on success, -1 otherwise.
16344  */
16345 static int
16346 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16347                 struct mlx5_flow_meter_sub_policy *sub_policy,
16348                 uint8_t egress, uint8_t transfer, bool match_src_port,
16349                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16350 {
16351         struct mlx5_priv *priv = dev->data->dev_private;
16352         struct rte_flow_error flow_err;
16353         uint32_t color_reg_c_idx;
16354         struct rte_flow_attr attr = {
16355                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16356                 .priority = 0,
16357                 .ingress = 0,
16358                 .egress = !!egress,
16359                 .transfer = !!transfer,
16360                 .reserved = 0,
16361         };
16362         int i;
16363         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16364         struct mlx5_sub_policy_color_rule *color_rule;
16365         bool svport_match;
16366         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16367
16368         if (ret < 0)
16369                 return -1;
16370         /* Create policy table with POLICY level. */
16371         if (!sub_policy->tbl_rsc)
16372                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16373                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16374                                 egress, transfer, false, NULL, 0, 0,
16375                                 sub_policy->idx, &flow_err);
16376         if (!sub_policy->tbl_rsc) {
16377                 DRV_LOG(ERR,
16378                         "Failed to create meter sub policy table.");
16379                 return -1;
16380         }
16381         /* Prepare matchers. */
16382         color_reg_c_idx = ret;
16383         for (i = 0; i < RTE_COLORS; i++) {
16384                 TAILQ_INIT(&sub_policy->color_rules[i]);
16385                 if (!acts[i].actions_n)
16386                         continue;
16387                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16388                                 sizeof(struct mlx5_sub_policy_color_rule),
16389                                 0, SOCKET_ID_ANY);
16390                 if (!color_rule) {
16391                         DRV_LOG(ERR, "No memory to create color rule.");
16392                         goto err_exit;
16393                 }
16394                 tmp_rules[i] = color_rule;
16395                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16396                                   color_rule, next_port);
16397                 color_rule->src_port = priv->representor_id;
16398                 /* No use. */
16399                 attr.priority = i;
16400                 /* Create matchers for colors. */
16401                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16402                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16403                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16404                                 &attr, svport_match, NULL,
16405                                 &color_rule->matcher, &flow_err)) {
16406                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16407                         goto err_exit;
16408                 }
16409                 /* Create flow, matching color. */
16410                 if (__flow_dv_create_policy_flow(dev,
16411                                 color_reg_c_idx, (enum rte_color)i,
16412                                 color_rule->matcher->matcher_object,
16413                                 acts[i].actions_n, acts[i].dv_actions,
16414                                 svport_match, NULL, &color_rule->rule,
16415                                 &attr)) {
16416                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16417                         goto err_exit;
16418                 }
16419         }
16420         return 0;
16421 err_exit:
16422         /* All the policy rules will be cleared. */
16423         do {
16424                 color_rule = tmp_rules[i];
16425                 if (color_rule) {
16426                         if (color_rule->rule)
16427                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16428                         if (color_rule->matcher) {
16429                                 struct mlx5_flow_tbl_data_entry *tbl =
16430                                         container_of(color_rule->matcher->tbl,
16431                                                      typeof(*tbl), tbl);
16432                                 mlx5_list_unregister(tbl->matchers,
16433                                                 &color_rule->matcher->entry);
16434                         }
16435                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16436                                      color_rule, next_port);
16437                         mlx5_free(color_rule);
16438                 }
16439         } while (i--);
16440         return -1;
16441 }
16442
16443 static int
16444 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16445                         struct mlx5_flow_meter_policy *mtr_policy,
16446                         struct mlx5_flow_meter_sub_policy *sub_policy,
16447                         uint32_t domain)
16448 {
16449         struct mlx5_priv *priv = dev->data->dev_private;
16450         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16451         struct mlx5_flow_dv_tag_resource *tag;
16452         struct mlx5_flow_dv_port_id_action_resource *port_action;
16453         struct mlx5_hrxq *hrxq;
16454         struct mlx5_flow_meter_info *next_fm = NULL;
16455         struct mlx5_flow_meter_policy *next_policy;
16456         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16457         struct mlx5_flow_tbl_data_entry *tbl_data;
16458         struct rte_flow_error error;
16459         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16460         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16461         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16462         bool match_src_port = false;
16463         int i;
16464
16465         /* If RSS or Queue, no previous actions / rules is created. */
16466         for (i = 0; i < RTE_COLORS; i++) {
16467                 acts[i].actions_n = 0;
16468                 if (i == RTE_COLOR_RED) {
16469                         /* Only support drop on red. */
16470                         acts[i].dv_actions[0] =
16471                                 mtr_policy->dr_drop_action[domain];
16472                         acts[i].actions_n = 1;
16473                         continue;
16474                 }
16475                 if (i == RTE_COLOR_GREEN &&
16476                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16477                         struct rte_flow_attr attr = {
16478                                 .transfer = transfer
16479                         };
16480
16481                         next_fm = mlx5_flow_meter_find(priv,
16482                                         mtr_policy->act_cnt[i].next_mtr_id,
16483                                         NULL);
16484                         if (!next_fm) {
16485                                 DRV_LOG(ERR,
16486                                         "Failed to get next hierarchy meter.");
16487                                 goto err_exit;
16488                         }
16489                         if (mlx5_flow_meter_attach(priv, next_fm,
16490                                                    &attr, &error)) {
16491                                 DRV_LOG(ERR, "%s", error.message);
16492                                 next_fm = NULL;
16493                                 goto err_exit;
16494                         }
16495                         /* Meter action must be the first for TX. */
16496                         if (mtr_first) {
16497                                 acts[i].dv_actions[acts[i].actions_n] =
16498                                         next_fm->meter_action;
16499                                 acts[i].actions_n++;
16500                         }
16501                 }
16502                 if (mtr_policy->act_cnt[i].rix_mark) {
16503                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16504                                         mtr_policy->act_cnt[i].rix_mark);
16505                         if (!tag) {
16506                                 DRV_LOG(ERR, "Failed to find "
16507                                 "mark action for policy.");
16508                                 goto err_exit;
16509                         }
16510                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16511                         acts[i].actions_n++;
16512                 }
16513                 if (mtr_policy->act_cnt[i].modify_hdr) {
16514                         acts[i].dv_actions[acts[i].actions_n] =
16515                                 mtr_policy->act_cnt[i].modify_hdr->action;
16516                         acts[i].actions_n++;
16517                 }
16518                 if (mtr_policy->act_cnt[i].fate_action) {
16519                         switch (mtr_policy->act_cnt[i].fate_action) {
16520                         case MLX5_FLOW_FATE_PORT_ID:
16521                                 port_action = mlx5_ipool_get
16522                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16523                                 mtr_policy->act_cnt[i].rix_port_id_action);
16524                                 if (!port_action) {
16525                                         DRV_LOG(ERR, "Failed to find "
16526                                                 "port action for policy.");
16527                                         goto err_exit;
16528                                 }
16529                                 acts[i].dv_actions[acts[i].actions_n] =
16530                                         port_action->action;
16531                                 acts[i].actions_n++;
16532                                 mtr_policy->dev = dev;
16533                                 match_src_port = true;
16534                                 break;
16535                         case MLX5_FLOW_FATE_DROP:
16536                         case MLX5_FLOW_FATE_JUMP:
16537                                 acts[i].dv_actions[acts[i].actions_n] =
16538                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16539                                 acts[i].actions_n++;
16540                                 break;
16541                         case MLX5_FLOW_FATE_SHARED_RSS:
16542                         case MLX5_FLOW_FATE_QUEUE:
16543                                 hrxq = mlx5_ipool_get
16544                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16545                                          sub_policy->rix_hrxq[i]);
16546                                 if (!hrxq) {
16547                                         DRV_LOG(ERR, "Failed to find "
16548                                                 "queue action for policy.");
16549                                         goto err_exit;
16550                                 }
16551                                 acts[i].dv_actions[acts[i].actions_n] =
16552                                         hrxq->action;
16553                                 acts[i].actions_n++;
16554                                 break;
16555                         case MLX5_FLOW_FATE_MTR:
16556                                 if (!next_fm) {
16557                                         DRV_LOG(ERR,
16558                                                 "No next hierarchy meter.");
16559                                         goto err_exit;
16560                                 }
16561                                 if (!mtr_first) {
16562                                         acts[i].dv_actions[acts[i].actions_n] =
16563                                                         next_fm->meter_action;
16564                                         acts[i].actions_n++;
16565                                 }
16566                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16567                                         next_sub_policy =
16568                                         mtr_policy->act_cnt[i].next_sub_policy;
16569                                 } else {
16570                                         next_policy =
16571                                                 mlx5_flow_meter_policy_find(dev,
16572                                                 next_fm->policy_id, NULL);
16573                                         MLX5_ASSERT(next_policy);
16574                                         next_sub_policy =
16575                                         next_policy->sub_policys[domain][0];
16576                                 }
16577                                 tbl_data =
16578                                         container_of(next_sub_policy->tbl_rsc,
16579                                         struct mlx5_flow_tbl_data_entry, tbl);
16580                                 acts[i].dv_actions[acts[i].actions_n++] =
16581                                                         tbl_data->jump.action;
16582                                 if (mtr_policy->act_cnt[i].modify_hdr)
16583                                         match_src_port = !!transfer;
16584                                 break;
16585                         default:
16586                                 /*Queue action do nothing*/
16587                                 break;
16588                         }
16589                 }
16590         }
16591         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16592                                 egress, transfer, match_src_port, acts)) {
16593                 DRV_LOG(ERR,
16594                         "Failed to create policy rules per domain.");
16595                 goto err_exit;
16596         }
16597         return 0;
16598 err_exit:
16599         if (next_fm)
16600                 mlx5_flow_meter_detach(priv, next_fm);
16601         return -1;
16602 }
16603
16604 /**
16605  * Create the policy rules.
16606  *
16607  * @param[in] dev
16608  *   Pointer to Ethernet device.
16609  * @param[in,out] mtr_policy
16610  *   Pointer to meter policy table.
16611  *
16612  * @return
16613  *   0 on success, -1 otherwise.
16614  */
16615 static int
16616 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16617                              struct mlx5_flow_meter_policy *mtr_policy)
16618 {
16619         int i;
16620         uint16_t sub_policy_num;
16621
16622         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16623                 sub_policy_num = (mtr_policy->sub_policy_num >>
16624                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16625                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16626                 if (!sub_policy_num)
16627                         continue;
16628                 /* Prepare actions list and create policy rules. */
16629                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16630                         mtr_policy->sub_policys[i][0], i)) {
16631                         DRV_LOG(ERR, "Failed to create policy action "
16632                                 "list per domain.");
16633                         return -1;
16634                 }
16635         }
16636         return 0;
16637 }
16638
16639 static int
16640 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16641 {
16642         struct mlx5_priv *priv = dev->data->dev_private;
16643         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16644         struct mlx5_flow_meter_def_policy *def_policy;
16645         struct mlx5_flow_tbl_resource *jump_tbl;
16646         struct mlx5_flow_tbl_data_entry *tbl_data;
16647         uint8_t egress, transfer;
16648         struct rte_flow_error error;
16649         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16650         int ret;
16651
16652         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16653         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16654         def_policy = mtrmng->def_policy[domain];
16655         if (!def_policy) {
16656                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16657                         sizeof(struct mlx5_flow_meter_def_policy),
16658                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16659                 if (!def_policy) {
16660                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16661                         goto def_policy_error;
16662                 }
16663                 mtrmng->def_policy[domain] = def_policy;
16664                 /* Create the meter suffix table with SUFFIX level. */
16665                 jump_tbl = flow_dv_tbl_resource_get(dev,
16666                                 MLX5_FLOW_TABLE_LEVEL_METER,
16667                                 egress, transfer, false, NULL, 0,
16668                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16669                 if (!jump_tbl) {
16670                         DRV_LOG(ERR,
16671                                 "Failed to create meter suffix table.");
16672                         goto def_policy_error;
16673                 }
16674                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16675                 tbl_data = container_of(jump_tbl,
16676                                         struct mlx5_flow_tbl_data_entry, tbl);
16677                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16678                                                 tbl_data->jump.action;
16679                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16680                 acts[RTE_COLOR_GREEN].actions_n = 1;
16681                 /*
16682                  * YELLOW has the same default policy as GREEN does.
16683                  * G & Y share the same table and action. The 2nd time of table
16684                  * resource getting is just to update the reference count for
16685                  * the releasing stage.
16686                  */
16687                 jump_tbl = flow_dv_tbl_resource_get(dev,
16688                                 MLX5_FLOW_TABLE_LEVEL_METER,
16689                                 egress, transfer, false, NULL, 0,
16690                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16691                 if (!jump_tbl) {
16692                         DRV_LOG(ERR,
16693                                 "Failed to get meter suffix table.");
16694                         goto def_policy_error;
16695                 }
16696                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16697                 tbl_data = container_of(jump_tbl,
16698                                         struct mlx5_flow_tbl_data_entry, tbl);
16699                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16700                                                 tbl_data->jump.action;
16701                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16702                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16703                 /* Create jump action to the drop table. */
16704                 if (!mtrmng->drop_tbl[domain]) {
16705                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16706                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16707                                  egress, transfer, false, NULL, 0,
16708                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16709                         if (!mtrmng->drop_tbl[domain]) {
16710                                 DRV_LOG(ERR, "Failed to create meter "
16711                                         "drop table for default policy.");
16712                                 goto def_policy_error;
16713                         }
16714                 }
16715                 /* all RED: unique Drop table for jump action. */
16716                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16717                                         struct mlx5_flow_tbl_data_entry, tbl);
16718                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16719                                                 tbl_data->jump.action;
16720                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16721                 acts[RTE_COLOR_RED].actions_n = 1;
16722                 /* Create default policy rules. */
16723                 ret = __flow_dv_create_domain_policy_rules(dev,
16724                                         &def_policy->sub_policy,
16725                                         egress, transfer, false, acts);
16726                 if (ret) {
16727                         DRV_LOG(ERR, "Failed to create default policy rules.");
16728                         goto def_policy_error;
16729                 }
16730         }
16731         return 0;
16732 def_policy_error:
16733         __flow_dv_destroy_domain_def_policy(dev,
16734                                             (enum mlx5_meter_domain)domain);
16735         return -1;
16736 }
16737
16738 /**
16739  * Create the default policy table set.
16740  *
16741  * @param[in] dev
16742  *   Pointer to Ethernet device.
16743  * @return
16744  *   0 on success, -1 otherwise.
16745  */
16746 static int
16747 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16748 {
16749         struct mlx5_priv *priv = dev->data->dev_private;
16750         int i;
16751
16752         /* Non-termination policy table. */
16753         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16754                 if (!priv->sh->config.dv_esw_en &&
16755                     i == MLX5_MTR_DOMAIN_TRANSFER)
16756                         continue;
16757                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16758                         DRV_LOG(ERR, "Failed to create default policy");
16759                         /* Rollback the created default policies for others. */
16760                         flow_dv_destroy_def_policy(dev);
16761                         return -1;
16762                 }
16763         }
16764         return 0;
16765 }
16766
16767 /**
16768  * Create the needed meter tables.
16769  * Lock free, (mutex should be acquired by caller).
16770  *
16771  * @param[in] dev
16772  *   Pointer to Ethernet device.
16773  * @param[in] fm
16774  *   Meter information table.
16775  * @param[in] mtr_idx
16776  *   Meter index.
16777  * @param[in] domain_bitmap
16778  *   Domain bitmap.
16779  * @return
16780  *   0 on success, -1 otherwise.
16781  */
16782 static int
16783 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16784                         struct mlx5_flow_meter_info *fm,
16785                         uint32_t mtr_idx,
16786                         uint8_t domain_bitmap)
16787 {
16788         struct mlx5_priv *priv = dev->data->dev_private;
16789         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16790         struct rte_flow_error error;
16791         struct mlx5_flow_tbl_data_entry *tbl_data;
16792         uint8_t egress, transfer;
16793         void *actions[METER_ACTIONS];
16794         int domain, ret, i;
16795         struct mlx5_flow_counter *cnt;
16796         struct mlx5_flow_dv_match_params value = {
16797                 .size = sizeof(value.buf),
16798         };
16799         struct mlx5_flow_dv_match_params matcher_para = {
16800                 .size = sizeof(matcher_para.buf),
16801         };
16802         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16803                                                      0, &error);
16804         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16805         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16806         struct mlx5_list_entry *entry;
16807         struct mlx5_flow_dv_matcher matcher = {
16808                 .mask = {
16809                         .size = sizeof(matcher.mask.buf),
16810                 },
16811         };
16812         struct mlx5_flow_dv_matcher *drop_matcher;
16813         struct mlx5_flow_cb_ctx ctx = {
16814                 .error = &error,
16815                 .data = &matcher,
16816         };
16817         uint8_t misc_mask;
16818
16819         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16820                 rte_errno = ENOTSUP;
16821                 return -1;
16822         }
16823         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16824                 if (!(domain_bitmap & (1 << domain)) ||
16825                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16826                         continue;
16827                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16828                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16829                 /* Create the drop table with METER DROP level. */
16830                 if (!mtrmng->drop_tbl[domain]) {
16831                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16832                                         MLX5_FLOW_TABLE_LEVEL_METER,
16833                                         egress, transfer, false, NULL, 0,
16834                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16835                         if (!mtrmng->drop_tbl[domain]) {
16836                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16837                                 goto policy_error;
16838                         }
16839                 }
16840                 /* Create default matcher in drop table. */
16841                 matcher.tbl = mtrmng->drop_tbl[domain],
16842                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16843                                 struct mlx5_flow_tbl_data_entry, tbl);
16844                 if (!mtrmng->def_matcher[domain]) {
16845                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16846                                        (enum modify_reg)mtr_id_reg_c,
16847                                        0, 0);
16848                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16849                         matcher.crc = rte_raw_cksum
16850                                         ((const void *)matcher.mask.buf,
16851                                         matcher.mask.size);
16852                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16853                         if (!entry) {
16854                                 DRV_LOG(ERR, "Failed to register meter "
16855                                 "drop default matcher.");
16856                                 goto policy_error;
16857                         }
16858                         mtrmng->def_matcher[domain] = container_of(entry,
16859                         struct mlx5_flow_dv_matcher, entry);
16860                 }
16861                 /* Create default rule in drop table. */
16862                 if (!mtrmng->def_rule[domain]) {
16863                         i = 0;
16864                         actions[i++] = priv->sh->dr_drop_action;
16865                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16866                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16867                         misc_mask = flow_dv_matcher_enable(value.buf);
16868                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16869                         ret = mlx5_flow_os_create_flow
16870                                 (mtrmng->def_matcher[domain]->matcher_object,
16871                                 (void *)&value, i, actions,
16872                                 &mtrmng->def_rule[domain]);
16873                         if (ret) {
16874                                 DRV_LOG(ERR, "Failed to create meter "
16875                                 "default drop rule for drop table.");
16876                                 goto policy_error;
16877                         }
16878                 }
16879                 if (!fm->drop_cnt)
16880                         continue;
16881                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16882                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16883                         /* Create matchers for Drop. */
16884                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16885                                         (enum modify_reg)mtr_id_reg_c, 0,
16886                                         (mtr_id_mask << mtr_id_offset));
16887                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16888                         matcher.crc = rte_raw_cksum
16889                                         ((const void *)matcher.mask.buf,
16890                                         matcher.mask.size);
16891                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16892                         if (!entry) {
16893                                 DRV_LOG(ERR,
16894                                 "Failed to register meter drop matcher.");
16895                                 goto policy_error;
16896                         }
16897                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16898                                 container_of(entry, struct mlx5_flow_dv_matcher,
16899                                              entry);
16900                 }
16901                 drop_matcher =
16902                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16903                 /* Create drop rule, matching meter_id only. */
16904                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16905                                 (enum modify_reg)mtr_id_reg_c,
16906                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16907                 i = 0;
16908                 cnt = flow_dv_counter_get_by_idx(dev,
16909                                         fm->drop_cnt, NULL);
16910                 actions[i++] = cnt->action;
16911                 actions[i++] = priv->sh->dr_drop_action;
16912                 misc_mask = flow_dv_matcher_enable(value.buf);
16913                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16914                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16915                                                (void *)&value, i, actions,
16916                                                &fm->drop_rule[domain]);
16917                 if (ret) {
16918                         DRV_LOG(ERR, "Failed to create meter "
16919                                 "drop rule for drop table.");
16920                                 goto policy_error;
16921                 }
16922         }
16923         return 0;
16924 policy_error:
16925         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16926                 if (fm->drop_rule[i]) {
16927                         claim_zero(mlx5_flow_os_destroy_flow
16928                                 (fm->drop_rule[i]));
16929                         fm->drop_rule[i] = NULL;
16930                 }
16931         }
16932         return -1;
16933 }
16934
16935 static struct mlx5_flow_meter_sub_policy *
16936 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16937                 struct mlx5_flow_meter_policy *mtr_policy,
16938                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16939                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16940                 bool *is_reuse)
16941 {
16942         struct mlx5_priv *priv = dev->data->dev_private;
16943         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16944         uint32_t sub_policy_idx = 0;
16945         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16946         uint32_t i, j;
16947         struct mlx5_hrxq *hrxq;
16948         struct mlx5_flow_handle dh;
16949         struct mlx5_meter_policy_action_container *act_cnt;
16950         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16951         uint16_t sub_policy_num;
16952         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
16953
16954         MLX5_ASSERT(wks);
16955         rte_spinlock_lock(&mtr_policy->sl);
16956         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16957                 if (!rss_desc[i])
16958                         continue;
16959                 hrxq = mlx5_hrxq_get(dev, rss_desc[i]);
16960                 if (!hrxq) {
16961                         rte_spinlock_unlock(&mtr_policy->sl);
16962                         return NULL;
16963                 }
16964                 hrxq_idx[i] = hrxq->idx;
16965         }
16966         sub_policy_num = (mtr_policy->sub_policy_num >>
16967                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16968                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16969         for (j = 0; j < sub_policy_num; j++) {
16970                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16971                         if (rss_desc[i] &&
16972                             hrxq_idx[i] !=
16973                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16974                                 break;
16975                 }
16976                 if (i >= MLX5_MTR_RTE_COLORS) {
16977                         /*
16978                          * Found the sub policy table with
16979                          * the same queue per color.
16980                          */
16981                         rte_spinlock_unlock(&mtr_policy->sl);
16982                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16983                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16984                         *is_reuse = true;
16985                         return mtr_policy->sub_policys[domain][j];
16986                 }
16987         }
16988         /* Create sub policy. */
16989         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16990                 /* Reuse the first pre-allocated sub_policy. */
16991                 sub_policy = mtr_policy->sub_policys[domain][0];
16992                 sub_policy_idx = sub_policy->idx;
16993         } else {
16994                 sub_policy = mlx5_ipool_zmalloc
16995                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16996                                  &sub_policy_idx);
16997                 if (!sub_policy ||
16998                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16999                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
17000                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
17001                         goto rss_sub_policy_error;
17002                 }
17003                 sub_policy->idx = sub_policy_idx;
17004                 sub_policy->main_policy = mtr_policy;
17005         }
17006         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17007                 if (!rss_desc[i])
17008                         continue;
17009                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
17010                 if (mtr_policy->is_hierarchy) {
17011                         act_cnt = &mtr_policy->act_cnt[i];
17012                         act_cnt->next_sub_policy = next_sub_policy;
17013                         mlx5_hrxq_release(dev, hrxq_idx[i]);
17014                 } else {
17015                         /*
17016                          * Overwrite the last action from
17017                          * RSS action to Queue action.
17018                          */
17019                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
17020                                               hrxq_idx[i]);
17021                         if (!hrxq) {
17022                                 DRV_LOG(ERR, "Failed to get policy hrxq");
17023                                 goto rss_sub_policy_error;
17024                         }
17025                         act_cnt = &mtr_policy->act_cnt[i];
17026                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
17027                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
17028                                 if (act_cnt->rix_mark)
17029                                         wks->mark = 1;
17030                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
17031                                 dh.rix_hrxq = hrxq_idx[i];
17032                                 flow_drv_rxq_flags_set(dev, &dh);
17033                         }
17034                 }
17035         }
17036         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
17037                                                sub_policy, domain)) {
17038                 DRV_LOG(ERR, "Failed to create policy "
17039                         "rules for ingress domain.");
17040                 goto rss_sub_policy_error;
17041         }
17042         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17043                 i = (mtr_policy->sub_policy_num >>
17044                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17045                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17046                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
17047                         DRV_LOG(ERR, "No free sub-policy slot.");
17048                         goto rss_sub_policy_error;
17049                 }
17050                 mtr_policy->sub_policys[domain][i] = sub_policy;
17051                 i++;
17052                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17053                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17054                 mtr_policy->sub_policy_num |=
17055                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17056                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17057         }
17058         rte_spinlock_unlock(&mtr_policy->sl);
17059         *is_reuse = false;
17060         return sub_policy;
17061 rss_sub_policy_error:
17062         if (sub_policy) {
17063                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17064                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17065                         i = (mtr_policy->sub_policy_num >>
17066                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17067                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17068                         mtr_policy->sub_policys[domain][i] = NULL;
17069                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17070                                         sub_policy->idx);
17071                 }
17072         }
17073         rte_spinlock_unlock(&mtr_policy->sl);
17074         return NULL;
17075 }
17076
17077 /**
17078  * Find the policy table for prefix table with RSS.
17079  *
17080  * @param[in] dev
17081  *   Pointer to Ethernet device.
17082  * @param[in] mtr_policy
17083  *   Pointer to meter policy table.
17084  * @param[in] rss_desc
17085  *   Pointer to rss_desc
17086  * @return
17087  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
17088  */
17089 static struct mlx5_flow_meter_sub_policy *
17090 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
17091                 struct mlx5_flow_meter_policy *mtr_policy,
17092                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
17093 {
17094         struct mlx5_priv *priv = dev->data->dev_private;
17095         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17096         struct mlx5_flow_meter_info *next_fm;
17097         struct mlx5_flow_meter_policy *next_policy;
17098         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
17099         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
17100         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
17101         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17102         bool reuse_sub_policy;
17103         uint32_t i = 0;
17104         uint32_t j = 0;
17105
17106         while (true) {
17107                 /* Iterate hierarchy to get all policies in this hierarchy. */
17108                 policies[i++] = mtr_policy;
17109                 if (!mtr_policy->is_hierarchy)
17110                         break;
17111                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
17112                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
17113                         return NULL;
17114                 }
17115                 next_fm = mlx5_flow_meter_find(priv,
17116                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17117                 if (!next_fm) {
17118                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
17119                         return NULL;
17120                 }
17121                 next_policy =
17122                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
17123                                                     NULL);
17124                 MLX5_ASSERT(next_policy);
17125                 mtr_policy = next_policy;
17126         }
17127         while (i) {
17128                 /**
17129                  * From last policy to the first one in hierarchy,
17130                  * create / get the sub policy for each of them.
17131                  */
17132                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
17133                                                         policies[--i],
17134                                                         rss_desc,
17135                                                         next_sub_policy,
17136                                                         &reuse_sub_policy);
17137                 if (!sub_policy) {
17138                         DRV_LOG(ERR, "Failed to get the sub policy.");
17139                         goto err_exit;
17140                 }
17141                 if (!reuse_sub_policy)
17142                         sub_policies[j++] = sub_policy;
17143                 next_sub_policy = sub_policy;
17144         }
17145         return sub_policy;
17146 err_exit:
17147         while (j) {
17148                 uint16_t sub_policy_num;
17149
17150                 sub_policy = sub_policies[--j];
17151                 mtr_policy = sub_policy->main_policy;
17152                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17153                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17154                         sub_policy_num = (mtr_policy->sub_policy_num >>
17155                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17156                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
17157                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
17158                                                                         NULL;
17159                         sub_policy_num--;
17160                         mtr_policy->sub_policy_num &=
17161                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17162                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
17163                         mtr_policy->sub_policy_num |=
17164                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17165                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
17166                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17167                                         sub_policy->idx);
17168                 }
17169         }
17170         return NULL;
17171 }
17172
17173 /**
17174  * Create the sub policy tag rule for all meters in hierarchy.
17175  *
17176  * @param[in] dev
17177  *   Pointer to Ethernet device.
17178  * @param[in] fm
17179  *   Meter information table.
17180  * @param[in] src_port
17181  *   The src port this extra rule should use.
17182  * @param[in] item
17183  *   The src port match item.
17184  * @param[out] error
17185  *   Perform verbose error reporting if not NULL.
17186  * @return
17187  *   0 on success, a negative errno value otherwise and rte_errno is set.
17188  */
17189 static int
17190 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
17191                                 struct mlx5_flow_meter_info *fm,
17192                                 int32_t src_port,
17193                                 const struct rte_flow_item *item,
17194                                 struct rte_flow_error *error)
17195 {
17196         struct mlx5_priv *priv = dev->data->dev_private;
17197         struct mlx5_flow_meter_policy *mtr_policy;
17198         struct mlx5_flow_meter_sub_policy *sub_policy;
17199         struct mlx5_flow_meter_info *next_fm = NULL;
17200         struct mlx5_flow_meter_policy *next_policy;
17201         struct mlx5_flow_meter_sub_policy *next_sub_policy;
17202         struct mlx5_flow_tbl_data_entry *tbl_data;
17203         struct mlx5_sub_policy_color_rule *color_rule;
17204         struct mlx5_meter_policy_acts acts;
17205         uint32_t color_reg_c_idx;
17206         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
17207         struct rte_flow_attr attr = {
17208                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
17209                 .priority = 0,
17210                 .ingress = 0,
17211                 .egress = 0,
17212                 .transfer = 1,
17213                 .reserved = 0,
17214         };
17215         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17216         int i;
17217
17218         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17219         MLX5_ASSERT(mtr_policy);
17220         if (!mtr_policy->is_hierarchy)
17221                 return 0;
17222         next_fm = mlx5_flow_meter_find(priv,
17223                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17224         if (!next_fm) {
17225                 return rte_flow_error_set(error, EINVAL,
17226                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
17227                                 "Failed to find next meter in hierarchy.");
17228         }
17229         if (!next_fm->drop_cnt)
17230                 goto exit;
17231         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
17232         sub_policy = mtr_policy->sub_policys[domain][0];
17233         for (i = 0; i < RTE_COLORS; i++) {
17234                 bool rule_exist = false;
17235                 struct mlx5_meter_policy_action_container *act_cnt;
17236
17237                 if (i >= RTE_COLOR_YELLOW)
17238                         break;
17239                 TAILQ_FOREACH(color_rule,
17240                               &sub_policy->color_rules[i], next_port)
17241                         if (color_rule->src_port == src_port) {
17242                                 rule_exist = true;
17243                                 break;
17244                         }
17245                 if (rule_exist)
17246                         continue;
17247                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
17248                                 sizeof(struct mlx5_sub_policy_color_rule),
17249                                 0, SOCKET_ID_ANY);
17250                 if (!color_rule)
17251                         return rte_flow_error_set(error, ENOMEM,
17252                                 RTE_FLOW_ERROR_TYPE_ACTION,
17253                                 NULL, "No memory to create tag color rule.");
17254                 color_rule->src_port = src_port;
17255                 attr.priority = i;
17256                 next_policy = mlx5_flow_meter_policy_find(dev,
17257                                                 next_fm->policy_id, NULL);
17258                 MLX5_ASSERT(next_policy);
17259                 next_sub_policy = next_policy->sub_policys[domain][0];
17260                 tbl_data = container_of(next_sub_policy->tbl_rsc,
17261                                         struct mlx5_flow_tbl_data_entry, tbl);
17262                 act_cnt = &mtr_policy->act_cnt[i];
17263                 if (mtr_first) {
17264                         acts.dv_actions[0] = next_fm->meter_action;
17265                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
17266                 } else {
17267                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
17268                         acts.dv_actions[1] = next_fm->meter_action;
17269                 }
17270                 acts.dv_actions[2] = tbl_data->jump.action;
17271                 acts.actions_n = 3;
17272                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17273                         next_fm = NULL;
17274                         goto err_exit;
17275                 }
17276                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17277                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17278                                 &attr, true, item,
17279                                 &color_rule->matcher, error)) {
17280                         rte_flow_error_set(error, errno,
17281                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17282                                 "Failed to create hierarchy meter matcher.");
17283                         goto err_exit;
17284                 }
17285                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17286                                         (enum rte_color)i,
17287                                         color_rule->matcher->matcher_object,
17288                                         acts.actions_n, acts.dv_actions,
17289                                         true, item,
17290                                         &color_rule->rule, &attr)) {
17291                         rte_flow_error_set(error, errno,
17292                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17293                                 "Failed to create hierarchy meter rule.");
17294                         goto err_exit;
17295                 }
17296                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17297                                   color_rule, next_port);
17298         }
17299 exit:
17300         /**
17301          * Recursive call to iterate all meters in hierarchy and
17302          * create needed rules.
17303          */
17304         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17305                                                 src_port, item, error);
17306 err_exit:
17307         if (color_rule) {
17308                 if (color_rule->rule)
17309                         mlx5_flow_os_destroy_flow(color_rule->rule);
17310                 if (color_rule->matcher) {
17311                         struct mlx5_flow_tbl_data_entry *tbl =
17312                                 container_of(color_rule->matcher->tbl,
17313                                                 typeof(*tbl), tbl);
17314                         mlx5_list_unregister(tbl->matchers,
17315                                                 &color_rule->matcher->entry);
17316                 }
17317                 mlx5_free(color_rule);
17318         }
17319         if (next_fm)
17320                 mlx5_flow_meter_detach(priv, next_fm);
17321         return -rte_errno;
17322 }
17323
17324 /**
17325  * Destroy the sub policy table with RX queue.
17326  *
17327  * @param[in] dev
17328  *   Pointer to Ethernet device.
17329  * @param[in] mtr_policy
17330  *   Pointer to meter policy table.
17331  */
17332 static void
17333 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17334                                     struct mlx5_flow_meter_policy *mtr_policy)
17335 {
17336         struct mlx5_priv *priv = dev->data->dev_private;
17337         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17338         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17339         uint32_t i, j;
17340         uint16_t sub_policy_num, new_policy_num;
17341
17342         rte_spinlock_lock(&mtr_policy->sl);
17343         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17344                 switch (mtr_policy->act_cnt[i].fate_action) {
17345                 case MLX5_FLOW_FATE_SHARED_RSS:
17346                         sub_policy_num = (mtr_policy->sub_policy_num >>
17347                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17348                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17349                         new_policy_num = sub_policy_num;
17350                         for (j = 0; j < sub_policy_num; j++) {
17351                                 sub_policy =
17352                                         mtr_policy->sub_policys[domain][j];
17353                                 if (sub_policy) {
17354                                         __flow_dv_destroy_sub_policy_rules(dev,
17355                                                 sub_policy);
17356                                 if (sub_policy !=
17357                                         mtr_policy->sub_policys[domain][0]) {
17358                                         mtr_policy->sub_policys[domain][j] =
17359                                                                 NULL;
17360                                         mlx5_ipool_free
17361                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17362                                                 sub_policy->idx);
17363                                                 new_policy_num--;
17364                                         }
17365                                 }
17366                         }
17367                         if (new_policy_num != sub_policy_num) {
17368                                 mtr_policy->sub_policy_num &=
17369                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17370                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17371                                 mtr_policy->sub_policy_num |=
17372                                 (new_policy_num &
17373                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17374                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17375                         }
17376                         break;
17377                 case MLX5_FLOW_FATE_QUEUE:
17378                         sub_policy = mtr_policy->sub_policys[domain][0];
17379                         __flow_dv_destroy_sub_policy_rules(dev,
17380                                                            sub_policy);
17381                         break;
17382                 default:
17383                         /*Other actions without queue and do nothing*/
17384                         break;
17385                 }
17386         }
17387         rte_spinlock_unlock(&mtr_policy->sl);
17388 }
17389 /**
17390  * Check whether the DR drop action is supported on the root table or not.
17391  *
17392  * Create a simple flow with DR drop action on root table to validate
17393  * if DR drop action on root table is supported or not.
17394  *
17395  * @param[in] dev
17396  *   Pointer to rte_eth_dev structure.
17397  *
17398  * @return
17399  *   0 on success, a negative errno value otherwise and rte_errno is set.
17400  */
17401 int
17402 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17403 {
17404         struct mlx5_priv *priv = dev->data->dev_private;
17405         struct mlx5_dev_ctx_shared *sh = priv->sh;
17406         struct mlx5_flow_dv_match_params mask = {
17407                 .size = sizeof(mask.buf),
17408         };
17409         struct mlx5_flow_dv_match_params value = {
17410                 .size = sizeof(value.buf),
17411         };
17412         struct mlx5dv_flow_matcher_attr dv_attr = {
17413                 .type = IBV_FLOW_ATTR_NORMAL,
17414                 .priority = 0,
17415                 .match_criteria_enable = 0,
17416                 .match_mask = (void *)&mask,
17417         };
17418         struct mlx5_flow_tbl_resource *tbl = NULL;
17419         void *matcher = NULL;
17420         void *flow = NULL;
17421         int ret = -1;
17422
17423         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17424                                         0, 0, 0, NULL);
17425         if (!tbl)
17426                 goto err;
17427         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17428         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17429         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17430                                                tbl->obj, &matcher);
17431         if (ret)
17432                 goto err;
17433         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17434         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17435                                        &sh->dr_drop_action, &flow);
17436 err:
17437         /*
17438          * If DR drop action is not supported on root table, flow create will
17439          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17440          */
17441         if (!flow) {
17442                 if (matcher &&
17443                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17444                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17445                 else
17446                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17447                 ret = -1;
17448         } else {
17449                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17450         }
17451         if (matcher)
17452                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17453         if (tbl)
17454                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17455         return ret;
17456 }
17457
17458 /**
17459  * Validate the batch counter support in root table.
17460  *
17461  * Create a simple flow with invalid counter and drop action on root table to
17462  * validate if batch counter with offset on root table is supported or not.
17463  *
17464  * @param[in] dev
17465  *   Pointer to rte_eth_dev structure.
17466  *
17467  * @return
17468  *   0 on success, a negative errno value otherwise and rte_errno is set.
17469  */
17470 int
17471 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17472 {
17473         struct mlx5_priv *priv = dev->data->dev_private;
17474         struct mlx5_dev_ctx_shared *sh = priv->sh;
17475         struct mlx5_flow_dv_match_params mask = {
17476                 .size = sizeof(mask.buf),
17477         };
17478         struct mlx5_flow_dv_match_params value = {
17479                 .size = sizeof(value.buf),
17480         };
17481         struct mlx5dv_flow_matcher_attr dv_attr = {
17482                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17483                 .priority = 0,
17484                 .match_criteria_enable = 0,
17485                 .match_mask = (void *)&mask,
17486         };
17487         void *actions[2] = { 0 };
17488         struct mlx5_flow_tbl_resource *tbl = NULL;
17489         struct mlx5_devx_obj *dcs = NULL;
17490         void *matcher = NULL;
17491         void *flow = NULL;
17492         int ret = -1;
17493
17494         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17495                                         0, 0, 0, NULL);
17496         if (!tbl)
17497                 goto err;
17498         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17499         if (!dcs)
17500                 goto err;
17501         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17502                                                     &actions[0]);
17503         if (ret)
17504                 goto err;
17505         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17506         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17507         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17508                                                tbl->obj, &matcher);
17509         if (ret)
17510                 goto err;
17511         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17512         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17513                                        actions, &flow);
17514 err:
17515         /*
17516          * If batch counter with offset is not supported, the driver will not
17517          * validate the invalid offset value, flow create should success.
17518          * In this case, it means batch counter is not supported in root table.
17519          *
17520          * Otherwise, if flow create is failed, counter offset is supported.
17521          */
17522         if (flow) {
17523                 DRV_LOG(INFO, "Batch counter is not supported in root "
17524                               "table. Switch to fallback mode.");
17525                 rte_errno = ENOTSUP;
17526                 ret = -rte_errno;
17527                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17528         } else {
17529                 /* Check matcher to make sure validate fail at flow create. */
17530                 if (!matcher || (matcher && errno != EINVAL))
17531                         DRV_LOG(ERR, "Unexpected error in counter offset "
17532                                      "support detection");
17533                 ret = 0;
17534         }
17535         if (actions[0])
17536                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17537         if (matcher)
17538                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17539         if (tbl)
17540                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17541         if (dcs)
17542                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17543         return ret;
17544 }
17545
17546 /**
17547  * Query a devx counter.
17548  *
17549  * @param[in] dev
17550  *   Pointer to the Ethernet device structure.
17551  * @param[in] cnt
17552  *   Index to the flow counter.
17553  * @param[in] clear
17554  *   Set to clear the counter statistics.
17555  * @param[out] pkts
17556  *   The statistics value of packets.
17557  * @param[out] bytes
17558  *   The statistics value of bytes.
17559  *
17560  * @return
17561  *   0 on success, otherwise return -1.
17562  */
17563 static int
17564 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17565                       uint64_t *pkts, uint64_t *bytes, void **action)
17566 {
17567         struct mlx5_priv *priv = dev->data->dev_private;
17568         struct mlx5_flow_counter *cnt;
17569         uint64_t inn_pkts, inn_bytes;
17570         int ret;
17571
17572         if (!priv->sh->cdev->config.devx)
17573                 return -1;
17574
17575         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17576         if (ret)
17577                 return -1;
17578         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17579         if (cnt && action)
17580                 *action = cnt->action;
17581
17582         *pkts = inn_pkts - cnt->hits;
17583         *bytes = inn_bytes - cnt->bytes;
17584         if (clear) {
17585                 cnt->hits = inn_pkts;
17586                 cnt->bytes = inn_bytes;
17587         }
17588         return 0;
17589 }
17590
17591 /**
17592  * Get aged-out flows.
17593  *
17594  * @param[in] dev
17595  *   Pointer to the Ethernet device structure.
17596  * @param[in] context
17597  *   The address of an array of pointers to the aged-out flows contexts.
17598  * @param[in] nb_contexts
17599  *   The length of context array pointers.
17600  * @param[out] error
17601  *   Perform verbose error reporting if not NULL. Initialized in case of
17602  *   error only.
17603  *
17604  * @return
17605  *   how many contexts get in success, otherwise negative errno value.
17606  *   if nb_contexts is 0, return the amount of all aged contexts.
17607  *   if nb_contexts is not 0 , return the amount of aged flows reported
17608  *   in the context array.
17609  * @note: only stub for now
17610  */
17611 static int
17612 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17613                     void **context,
17614                     uint32_t nb_contexts,
17615                     struct rte_flow_error *error)
17616 {
17617         struct mlx5_priv *priv = dev->data->dev_private;
17618         struct mlx5_age_info *age_info;
17619         struct mlx5_age_param *age_param;
17620         struct mlx5_flow_counter *counter;
17621         struct mlx5_aso_age_action *act;
17622         int nb_flows = 0;
17623
17624         if (nb_contexts && !context)
17625                 return rte_flow_error_set(error, EINVAL,
17626                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17627                                           NULL, "empty context");
17628         age_info = GET_PORT_AGE_INFO(priv);
17629         rte_spinlock_lock(&age_info->aged_sl);
17630         LIST_FOREACH(act, &age_info->aged_aso, next) {
17631                 nb_flows++;
17632                 if (nb_contexts) {
17633                         context[nb_flows - 1] =
17634                                                 act->age_params.context;
17635                         if (!(--nb_contexts))
17636                                 break;
17637                 }
17638         }
17639         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17640                 nb_flows++;
17641                 if (nb_contexts) {
17642                         age_param = MLX5_CNT_TO_AGE(counter);
17643                         context[nb_flows - 1] = age_param->context;
17644                         if (!(--nb_contexts))
17645                                 break;
17646                 }
17647         }
17648         rte_spinlock_unlock(&age_info->aged_sl);
17649         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17650         return nb_flows;
17651 }
17652
17653 /*
17654  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17655  */
17656 static uint32_t
17657 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17658 {
17659         return flow_dv_counter_alloc(dev, 0);
17660 }
17661
17662 /**
17663  * Validate indirect action.
17664  * Dispatcher for action type specific validation.
17665  *
17666  * @param[in] dev
17667  *   Pointer to the Ethernet device structure.
17668  * @param[in] conf
17669  *   Indirect action configuration.
17670  * @param[in] action
17671  *   The indirect action object to validate.
17672  * @param[out] error
17673  *   Perform verbose error reporting if not NULL. Initialized in case of
17674  *   error only.
17675  *
17676  * @return
17677  *   0 on success, otherwise negative errno value.
17678  */
17679 int
17680 flow_dv_action_validate(struct rte_eth_dev *dev,
17681                         const struct rte_flow_indir_action_conf *conf,
17682                         const struct rte_flow_action *action,
17683                         struct rte_flow_error *err)
17684 {
17685         struct mlx5_priv *priv = dev->data->dev_private;
17686
17687         RTE_SET_USED(conf);
17688         switch (action->type) {
17689         case RTE_FLOW_ACTION_TYPE_RSS:
17690                 /*
17691                  * priv->obj_ops is set according to driver capabilities.
17692                  * When DevX capabilities are
17693                  * sufficient, it is set to devx_obj_ops.
17694                  * Otherwise, it is set to ibv_obj_ops.
17695                  * ibv_obj_ops doesn't support ind_table_modify operation.
17696                  * In this case the indirect RSS action can't be used.
17697                  */
17698                 if (priv->obj_ops.ind_table_modify == NULL)
17699                         return rte_flow_error_set
17700                                         (err, ENOTSUP,
17701                                          RTE_FLOW_ERROR_TYPE_ACTION,
17702                                          NULL,
17703                                          "Indirect RSS action not supported");
17704                 return mlx5_validate_action_rss(dev, action, err);
17705         case RTE_FLOW_ACTION_TYPE_AGE:
17706                 if (!priv->sh->aso_age_mng)
17707                         return rte_flow_error_set(err, ENOTSUP,
17708                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17709                                                 NULL,
17710                                                 "Indirect age action not supported");
17711                 return flow_dv_validate_action_age(0, action, dev, err);
17712         case RTE_FLOW_ACTION_TYPE_COUNT:
17713                 return flow_dv_validate_action_count(dev, true, 0, err);
17714         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17715                 if (!priv->sh->ct_aso_en)
17716                         return rte_flow_error_set(err, ENOTSUP,
17717                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17718                                         "ASO CT is not supported");
17719                 return mlx5_validate_action_ct(dev, action->conf, err);
17720         default:
17721                 return rte_flow_error_set(err, ENOTSUP,
17722                                           RTE_FLOW_ERROR_TYPE_ACTION,
17723                                           NULL,
17724                                           "action type not supported");
17725         }
17726 }
17727
17728 /*
17729  * Check if the RSS configurations for colors of a meter policy match
17730  * each other, except the queues.
17731  *
17732  * @param[in] r1
17733  *   Pointer to the first RSS flow action.
17734  * @param[in] r2
17735  *   Pointer to the second RSS flow action.
17736  *
17737  * @return
17738  *   0 on match, 1 on conflict.
17739  */
17740 static inline int
17741 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17742                                const struct rte_flow_action_rss *r2)
17743 {
17744         if (r1 == NULL || r2 == NULL)
17745                 return 0;
17746         if (!(r1->level <= 1 && r2->level <= 1) &&
17747             !(r1->level > 1 && r2->level > 1))
17748                 return 1;
17749         if (r1->types != r2->types &&
17750             !((r1->types == 0 || r1->types == RTE_ETH_RSS_IP) &&
17751               (r2->types == 0 || r2->types == RTE_ETH_RSS_IP)))
17752                 return 1;
17753         if (r1->key || r2->key) {
17754                 const void *key1 = r1->key ? r1->key : rss_hash_default_key;
17755                 const void *key2 = r2->key ? r2->key : rss_hash_default_key;
17756
17757                 if (memcmp(key1, key2, MLX5_RSS_HASH_KEY_LEN))
17758                         return 1;
17759         }
17760         return 0;
17761 }
17762
17763 /**
17764  * Validate the meter hierarchy chain for meter policy.
17765  *
17766  * @param[in] dev
17767  *   Pointer to the Ethernet device structure.
17768  * @param[in] meter_id
17769  *   Meter id.
17770  * @param[in] action_flags
17771  *   Holds the actions detected until now.
17772  * @param[out] is_rss
17773  *   Is RSS or not.
17774  * @param[out] hierarchy_domain
17775  *   The domain bitmap for hierarchy policy.
17776  * @param[out] error
17777  *   Perform verbose error reporting if not NULL. Initialized in case of
17778  *   error only.
17779  *
17780  * @return
17781  *   0 on success, otherwise negative errno value with error set.
17782  */
17783 static int
17784 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17785                                   uint32_t meter_id,
17786                                   uint64_t action_flags,
17787                                   bool *is_rss,
17788                                   uint8_t *hierarchy_domain,
17789                                   struct rte_mtr_error *error)
17790 {
17791         struct mlx5_priv *priv = dev->data->dev_private;
17792         struct mlx5_flow_meter_info *fm;
17793         struct mlx5_flow_meter_policy *policy;
17794         uint8_t cnt = 1;
17795
17796         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17797                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17798                 return -rte_mtr_error_set(error, EINVAL,
17799                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17800                                         NULL,
17801                                         "Multiple fate actions not supported.");
17802         *hierarchy_domain = 0;
17803         while (true) {
17804                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17805                 if (!fm)
17806                         return -rte_mtr_error_set(error, EINVAL,
17807                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17808                                         "Meter not found in meter hierarchy.");
17809                 if (fm->def_policy)
17810                         return -rte_mtr_error_set(error, EINVAL,
17811                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17812                         "Non termination meter not supported in hierarchy.");
17813                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17814                 MLX5_ASSERT(policy);
17815                 /**
17816                  * Only inherit the supported domains of the first meter in
17817                  * hierarchy.
17818                  * One meter supports at least one domain.
17819                  */
17820                 if (!*hierarchy_domain) {
17821                         if (policy->transfer)
17822                                 *hierarchy_domain |=
17823                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17824                         if (policy->ingress)
17825                                 *hierarchy_domain |=
17826                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17827                         if (policy->egress)
17828                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17829                 }
17830                 if (!policy->is_hierarchy) {
17831                         *is_rss = policy->is_rss;
17832                         break;
17833                 }
17834                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17835                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17836                         return -rte_mtr_error_set(error, EINVAL,
17837                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17838                                         "Exceed max hierarchy meter number.");
17839         }
17840         return 0;
17841 }
17842
17843 /**
17844  * Validate meter policy actions.
17845  * Dispatcher for action type specific validation.
17846  *
17847  * @param[in] dev
17848  *   Pointer to the Ethernet device structure.
17849  * @param[in] action
17850  *   The meter policy action object to validate.
17851  * @param[in] attr
17852  *   Attributes of flow to determine steering domain.
17853  * @param[out] error
17854  *   Perform verbose error reporting if not NULL. Initialized in case of
17855  *   error only.
17856  *
17857  * @return
17858  *   0 on success, otherwise negative errno value.
17859  */
17860 static int
17861 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17862                         const struct rte_flow_action *actions[RTE_COLORS],
17863                         struct rte_flow_attr *attr,
17864                         bool *is_rss,
17865                         uint8_t *domain_bitmap,
17866                         uint8_t *policy_mode,
17867                         struct rte_mtr_error *error)
17868 {
17869         struct mlx5_priv *priv = dev->data->dev_private;
17870         struct mlx5_sh_config *dev_conf = &priv->sh->config;
17871         const struct rte_flow_action *act;
17872         uint64_t action_flags[RTE_COLORS] = {0};
17873         int actions_n;
17874         int i, ret;
17875         struct rte_flow_error flow_err;
17876         uint8_t domain_color[RTE_COLORS] = {0};
17877         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17878         uint8_t hierarchy_domain = 0;
17879         const struct rte_flow_action_meter *mtr;
17880         bool def_green = false;
17881         bool def_yellow = false;
17882         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17883
17884         if (!dev_conf->dv_esw_en)
17885                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17886         *domain_bitmap = def_domain;
17887         /* Red color could only support DROP action. */
17888         if (!actions[RTE_COLOR_RED] ||
17889             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17890                 return -rte_mtr_error_set(error, ENOTSUP,
17891                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17892                                 NULL, "Red color only supports drop action.");
17893         /*
17894          * Check default policy actions:
17895          * Green / Yellow: no action, Red: drop action
17896          * Either G or Y will trigger default policy actions to be created.
17897          */
17898         if (!actions[RTE_COLOR_GREEN] ||
17899             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17900                 def_green = true;
17901         if (!actions[RTE_COLOR_YELLOW] ||
17902             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17903                 def_yellow = true;
17904         if (def_green && def_yellow) {
17905                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17906                 return 0;
17907         } else if (!def_green && def_yellow) {
17908                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17909         } else if (def_green && !def_yellow) {
17910                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17911         } else {
17912                 *policy_mode = MLX5_MTR_POLICY_MODE_ALL;
17913         }
17914         /* Set to empty string in case of NULL pointer access by user. */
17915         flow_err.message = "";
17916         for (i = 0; i < RTE_COLORS; i++) {
17917                 act = actions[i];
17918                 for (action_flags[i] = 0, actions_n = 0;
17919                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17920                      act++) {
17921                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17922                                 return -rte_mtr_error_set(error, ENOTSUP,
17923                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17924                                           NULL, "too many actions");
17925                         switch (act->type) {
17926                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17927                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17928                                 if (!dev_conf->dv_esw_en)
17929                                         return -rte_mtr_error_set(error,
17930                                         ENOTSUP,
17931                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17932                                         NULL, "PORT action validate check"
17933                                         " fail for ESW disable");
17934                                 ret = flow_dv_validate_action_port_id(dev,
17935                                                 action_flags[i],
17936                                                 act, attr, &flow_err);
17937                                 if (ret)
17938                                         return -rte_mtr_error_set(error,
17939                                         ENOTSUP,
17940                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17941                                         NULL, flow_err.message ?
17942                                         flow_err.message :
17943                                         "PORT action validate check fail");
17944                                 ++actions_n;
17945                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17946                                 break;
17947                         case RTE_FLOW_ACTION_TYPE_MARK:
17948                                 ret = flow_dv_validate_action_mark(dev, act,
17949                                                            action_flags[i],
17950                                                            attr, &flow_err);
17951                                 if (ret < 0)
17952                                         return -rte_mtr_error_set(error,
17953                                         ENOTSUP,
17954                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17955                                         NULL, flow_err.message ?
17956                                         flow_err.message :
17957                                         "Mark action validate check fail");
17958                                 if (dev_conf->dv_xmeta_en !=
17959                                         MLX5_XMETA_MODE_LEGACY)
17960                                         return -rte_mtr_error_set(error,
17961                                         ENOTSUP,
17962                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17963                                         NULL, "Extend MARK action is "
17964                                         "not supported. Please try use "
17965                                         "default policy for meter.");
17966                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17967                                 ++actions_n;
17968                                 break;
17969                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17970                                 ret = flow_dv_validate_action_set_tag(dev,
17971                                                         act, action_flags[i],
17972                                                         attr, &flow_err);
17973                                 if (ret)
17974                                         return -rte_mtr_error_set(error,
17975                                         ENOTSUP,
17976                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17977                                         NULL, flow_err.message ?
17978                                         flow_err.message :
17979                                         "Set tag action validate check fail");
17980                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17981                                 ++actions_n;
17982                                 break;
17983                         case RTE_FLOW_ACTION_TYPE_DROP:
17984                                 ret = mlx5_flow_validate_action_drop
17985                                         (action_flags[i], attr, &flow_err);
17986                                 if (ret < 0)
17987                                         return -rte_mtr_error_set(error,
17988                                         ENOTSUP,
17989                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17990                                         NULL, flow_err.message ?
17991                                         flow_err.message :
17992                                         "Drop action validate check fail");
17993                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17994                                 ++actions_n;
17995                                 break;
17996                         case RTE_FLOW_ACTION_TYPE_QUEUE:
17997                                 /*
17998                                  * Check whether extensive
17999                                  * metadata feature is engaged.
18000                                  */
18001                                 if (dev_conf->dv_flow_en &&
18002                                     (dev_conf->dv_xmeta_en !=
18003                                      MLX5_XMETA_MODE_LEGACY) &&
18004                                     mlx5_flow_ext_mreg_supported(dev))
18005                                         return -rte_mtr_error_set(error,
18006                                           ENOTSUP,
18007                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18008                                           NULL, "Queue action with meta "
18009                                           "is not supported. Please try use "
18010                                           "default policy for meter.");
18011                                 ret = mlx5_flow_validate_action_queue(act,
18012                                                         action_flags[i], dev,
18013                                                         attr, &flow_err);
18014                                 if (ret < 0)
18015                                         return -rte_mtr_error_set(error,
18016                                           ENOTSUP,
18017                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18018                                           NULL, flow_err.message ?
18019                                           flow_err.message :
18020                                           "Queue action validate check fail");
18021                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
18022                                 ++actions_n;
18023                                 break;
18024                         case RTE_FLOW_ACTION_TYPE_RSS:
18025                                 if (dev_conf->dv_flow_en &&
18026                                     (dev_conf->dv_xmeta_en !=
18027                                      MLX5_XMETA_MODE_LEGACY) &&
18028                                     mlx5_flow_ext_mreg_supported(dev))
18029                                         return -rte_mtr_error_set(error,
18030                                           ENOTSUP,
18031                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18032                                           NULL, "RSS action with meta "
18033                                           "is not supported. Please try use "
18034                                           "default policy for meter.");
18035                                 ret = mlx5_validate_action_rss(dev, act,
18036                                                                &flow_err);
18037                                 if (ret < 0)
18038                                         return -rte_mtr_error_set(error,
18039                                           ENOTSUP,
18040                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18041                                           NULL, flow_err.message ?
18042                                           flow_err.message :
18043                                           "RSS action validate check fail");
18044                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
18045                                 ++actions_n;
18046                                 /* Either G or Y will set the RSS. */
18047                                 rss_color[i] = act->conf;
18048                                 break;
18049                         case RTE_FLOW_ACTION_TYPE_JUMP:
18050                                 ret = flow_dv_validate_action_jump(dev,
18051                                         NULL, act, action_flags[i],
18052                                         attr, true, &flow_err);
18053                                 if (ret)
18054                                         return -rte_mtr_error_set(error,
18055                                           ENOTSUP,
18056                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18057                                           NULL, flow_err.message ?
18058                                           flow_err.message :
18059                                           "Jump action validate check fail");
18060                                 ++actions_n;
18061                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
18062                                 break;
18063                         /*
18064                          * Only the last meter in the hierarchy will support
18065                          * the YELLOW color steering. Then in the meter policy
18066                          * actions list, there should be no other meter inside.
18067                          */
18068                         case RTE_FLOW_ACTION_TYPE_METER:
18069                                 if (i != RTE_COLOR_GREEN)
18070                                         return -rte_mtr_error_set(error,
18071                                                 ENOTSUP,
18072                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18073                                                 NULL,
18074                                                 "Meter hierarchy only supports GREEN color.");
18075                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
18076                                         return -rte_mtr_error_set(error,
18077                                                 ENOTSUP,
18078                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18079                                                 NULL,
18080                                                 "No yellow policy should be provided in meter hierarchy.");
18081                                 mtr = act->conf;
18082                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
18083                                                         mtr->mtr_id,
18084                                                         action_flags[i],
18085                                                         is_rss,
18086                                                         &hierarchy_domain,
18087                                                         error);
18088                                 if (ret)
18089                                         return ret;
18090                                 ++actions_n;
18091                                 action_flags[i] |=
18092                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
18093                                 break;
18094                         default:
18095                                 return -rte_mtr_error_set(error, ENOTSUP,
18096                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18097                                         NULL,
18098                                         "Doesn't support optional action");
18099                         }
18100                 }
18101                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
18102                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
18103                 } else if ((action_flags[i] &
18104                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
18105                           (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
18106                         /*
18107                          * Only support MLX5_XMETA_MODE_LEGACY
18108                          * so MARK action is only in ingress domain.
18109                          */
18110                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
18111                 } else {
18112                         domain_color[i] = def_domain;
18113                         if (action_flags[i] &&
18114                             !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18115                                 domain_color[i] &=
18116                                 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
18117                 }
18118                 if (action_flags[i] &
18119                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
18120                         domain_color[i] &= hierarchy_domain;
18121                 /*
18122                  * Non-termination actions only support NIC Tx domain.
18123                  * The adjustion should be skipped when there is no
18124                  * action or only END is provided. The default domains
18125                  * bit-mask is set to find the MIN intersection.
18126                  * The action flags checking should also be skipped.
18127                  */
18128                 if ((def_green && i == RTE_COLOR_GREEN) ||
18129                     (def_yellow && i == RTE_COLOR_YELLOW))
18130                         continue;
18131                 /*
18132                  * Validate the drop action mutual exclusion
18133                  * with other actions. Drop action is mutually-exclusive
18134                  * with any other action, except for Count action.
18135                  */
18136                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
18137                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
18138                         return -rte_mtr_error_set(error, ENOTSUP,
18139                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18140                                 NULL, "Drop action is mutually-exclusive "
18141                                 "with any other action");
18142                 }
18143                 /* Eswitch has few restrictions on using items and actions */
18144                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
18145                         if (!mlx5_flow_ext_mreg_supported(dev) &&
18146                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
18147                                 return -rte_mtr_error_set(error, ENOTSUP,
18148                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18149                                         NULL, "unsupported action MARK");
18150                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
18151                                 return -rte_mtr_error_set(error, ENOTSUP,
18152                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18153                                         NULL, "unsupported action QUEUE");
18154                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
18155                                 return -rte_mtr_error_set(error, ENOTSUP,
18156                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18157                                         NULL, "unsupported action RSS");
18158                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18159                                 return -rte_mtr_error_set(error, ENOTSUP,
18160                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18161                                         NULL, "no fate action is found");
18162                 } else {
18163                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
18164                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
18165                                 if ((domain_color[i] &
18166                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
18167                                         domain_color[i] =
18168                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
18169                                 else
18170                                         return -rte_mtr_error_set(error,
18171                                                 ENOTSUP,
18172                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18173                                                 NULL,
18174                                                 "no fate action is found");
18175                         }
18176                 }
18177         }
18178         /* If both colors have RSS, the attributes should be the same. */
18179         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
18180                                            rss_color[RTE_COLOR_YELLOW]))
18181                 return -rte_mtr_error_set(error, EINVAL,
18182                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18183                                           NULL, "policy RSS attr conflict");
18184         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
18185                 *is_rss = true;
18186         /* "domain_color[C]" is non-zero for each color, default is ALL. */
18187         if (!def_green && !def_yellow &&
18188             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
18189             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
18190             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
18191                 return -rte_mtr_error_set(error, EINVAL,
18192                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18193                                           NULL, "policy domains conflict");
18194         /*
18195          * At least one color policy is listed in the actions, the domains
18196          * to be supported should be the intersection.
18197          */
18198         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
18199                          domain_color[RTE_COLOR_YELLOW];
18200         return 0;
18201 }
18202
18203 static int
18204 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
18205 {
18206         struct mlx5_priv *priv = dev->data->dev_private;
18207         int ret = 0;
18208
18209         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
18210                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
18211                                                 flags);
18212                 if (ret != 0)
18213                         return ret;
18214         }
18215         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
18216                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
18217                 if (ret != 0)
18218                         return ret;
18219         }
18220         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
18221                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
18222                 if (ret != 0)
18223                         return ret;
18224         }
18225         return 0;
18226 }
18227
18228 /**
18229  * Discover the number of available flow priorities
18230  * by trying to create a flow with the highest priority value
18231  * for each possible number.
18232  *
18233  * @param[in] dev
18234  *   Ethernet device.
18235  * @param[in] vprio
18236  *   List of possible number of available priorities.
18237  * @param[in] vprio_n
18238  *   Size of @p vprio array.
18239  * @return
18240  *   On success, number of available flow priorities.
18241  *   On failure, a negative errno-style code and rte_errno is set.
18242  */
18243 static int
18244 flow_dv_discover_priorities(struct rte_eth_dev *dev,
18245                             const uint16_t *vprio, int vprio_n)
18246 {
18247         struct mlx5_priv *priv = dev->data->dev_private;
18248         struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
18249         struct rte_flow_item_eth eth;
18250         struct rte_flow_item item = {
18251                 .type = RTE_FLOW_ITEM_TYPE_ETH,
18252                 .spec = &eth,
18253                 .mask = &eth,
18254         };
18255         struct mlx5_flow_dv_matcher matcher = {
18256                 .mask = {
18257                         .size = sizeof(matcher.mask.buf),
18258                 },
18259         };
18260         union mlx5_flow_tbl_key tbl_key;
18261         struct mlx5_flow flow;
18262         void *action;
18263         struct rte_flow_error error;
18264         uint8_t misc_mask;
18265         int i, err, ret = -ENOTSUP;
18266
18267         /*
18268          * Prepare a flow with a catch-all pattern and a drop action.
18269          * Use drop queue, because shared drop action may be unavailable.
18270          */
18271         action = priv->drop_queue.hrxq->action;
18272         if (action == NULL) {
18273                 DRV_LOG(ERR, "Priority discovery requires a drop action");
18274                 rte_errno = ENOTSUP;
18275                 return -rte_errno;
18276         }
18277         memset(&flow, 0, sizeof(flow));
18278         flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
18279         if (flow.handle == NULL) {
18280                 DRV_LOG(ERR, "Cannot create flow handle");
18281                 rte_errno = ENOMEM;
18282                 return -rte_errno;
18283         }
18284         flow.ingress = true;
18285         flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
18286         flow.dv.actions[0] = action;
18287         flow.dv.actions_n = 1;
18288         memset(&eth, 0, sizeof(eth));
18289         flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
18290                                    &item, /* inner */ false, /* group */ 0);
18291         matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
18292         for (i = 0; i < vprio_n; i++) {
18293                 /* Configure the next proposed maximum priority. */
18294                 matcher.priority = vprio[i] - 1;
18295                 memset(&tbl_key, 0, sizeof(tbl_key));
18296                 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18297                                                /* tunnel */ NULL,
18298                                                /* group */ 0,
18299                                                &error);
18300                 if (err != 0) {
18301                         /* This action is pure SW and must always succeed. */
18302                         DRV_LOG(ERR, "Cannot register matcher");
18303                         ret = -rte_errno;
18304                         break;
18305                 }
18306                 /* Try to apply the flow to HW. */
18307                 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18308                 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18309                 err = mlx5_flow_os_create_flow
18310                                 (flow.handle->dvh.matcher->matcher_object,
18311                                  (void *)&flow.dv.value, flow.dv.actions_n,
18312                                  flow.dv.actions, &flow.handle->drv_flow);
18313                 if (err == 0) {
18314                         claim_zero(mlx5_flow_os_destroy_flow
18315                                                 (flow.handle->drv_flow));
18316                         flow.handle->drv_flow = NULL;
18317                 }
18318                 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18319                 if (err != 0)
18320                         break;
18321                 ret = vprio[i];
18322         }
18323         mlx5_ipool_free(pool, flow.handle_idx);
18324         /* Set rte_errno if no expected priority value matched. */
18325         if (ret < 0)
18326                 rte_errno = -ret;
18327         return ret;
18328 }
18329
18330 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18331         .validate = flow_dv_validate,
18332         .prepare = flow_dv_prepare,
18333         .translate = flow_dv_translate,
18334         .apply = flow_dv_apply,
18335         .remove = flow_dv_remove,
18336         .destroy = flow_dv_destroy,
18337         .query = flow_dv_query,
18338         .create_mtr_tbls = flow_dv_create_mtr_tbls,
18339         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18340         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18341         .create_meter = flow_dv_mtr_alloc,
18342         .free_meter = flow_dv_aso_mtr_release_to_pool,
18343         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18344         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18345         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18346         .create_policy_rules = flow_dv_create_policy_rules,
18347         .destroy_policy_rules = flow_dv_destroy_policy_rules,
18348         .create_def_policy = flow_dv_create_def_policy,
18349         .destroy_def_policy = flow_dv_destroy_def_policy,
18350         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18351         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18352         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18353         .counter_alloc = flow_dv_counter_allocate,
18354         .counter_free = flow_dv_counter_free,
18355         .counter_query = flow_dv_counter_query,
18356         .get_aged_flows = flow_dv_get_aged_flows,
18357         .action_validate = flow_dv_action_validate,
18358         .action_create = flow_dv_action_create,
18359         .action_destroy = flow_dv_action_destroy,
18360         .action_update = flow_dv_action_update,
18361         .action_query = flow_dv_action_query,
18362         .sync_domain = flow_dv_sync_domain,
18363         .discover_priorities = flow_dv_discover_priorities,
18364         .item_create = flow_dv_item_create,
18365         .item_release = flow_dv_item_release,
18366 };
18367
18368 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */