1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
14 #pragma GCC diagnostic ignored "-Wpedantic"
16 #include <infiniband/verbs.h>
18 #pragma GCC diagnostic error "-Wpedantic"
21 #include <rte_common.h>
22 #include <rte_ether.h>
23 #include <rte_ethdev_driver.h>
25 #include <rte_flow_driver.h>
26 #include <rte_malloc.h>
29 #include <rte_vxlan.h>
32 #include "mlx5_defs.h"
33 #include "mlx5_glue.h"
34 #include "mlx5_flow.h"
36 #include "mlx5_rxtx.h"
38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
44 #ifndef HAVE_MLX5DV_DR_ESWITCH
45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
50 #ifndef HAVE_MLX5DV_DR
51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
54 /* VLAN header definitions */
55 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
56 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
57 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
58 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
59 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
74 * Initialize flow attributes structure according to flow items' types.
77 * Pointer to item specification.
79 * Pointer to flow attributes structure.
82 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
84 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
86 case RTE_FLOW_ITEM_TYPE_IPV4:
89 case RTE_FLOW_ITEM_TYPE_IPV6:
92 case RTE_FLOW_ITEM_TYPE_UDP:
95 case RTE_FLOW_ITEM_TYPE_TCP:
106 * Convert rte_mtr_color to mlx5 color.
115 rte_col_2_mlx5_col(enum rte_color rcol)
118 case RTE_COLOR_GREEN:
119 return MLX5_FLOW_COLOR_GREEN;
120 case RTE_COLOR_YELLOW:
121 return MLX5_FLOW_COLOR_YELLOW;
123 return MLX5_FLOW_COLOR_RED;
127 return MLX5_FLOW_COLOR_UNDEFINED;
130 struct field_modify_info {
131 uint32_t size; /* Size of field in protocol header, in bytes. */
132 uint32_t offset; /* Offset of field in protocol header, in bytes. */
133 enum mlx5_modification_field id;
136 struct field_modify_info modify_eth[] = {
137 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
138 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
139 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
140 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
144 struct field_modify_info modify_vlan_out_first_vid[] = {
145 /* Size in bits !!! */
146 {12, 0, MLX5_MODI_OUT_FIRST_VID},
150 struct field_modify_info modify_ipv4[] = {
151 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
152 {4, 12, MLX5_MODI_OUT_SIPV4},
153 {4, 16, MLX5_MODI_OUT_DIPV4},
157 struct field_modify_info modify_ipv6[] = {
158 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
159 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
160 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
161 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
162 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
163 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
164 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
165 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
166 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
170 struct field_modify_info modify_udp[] = {
171 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
172 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
176 struct field_modify_info modify_tcp[] = {
177 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
178 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
179 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
180 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
185 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
186 uint8_t next_protocol, uint64_t *item_flags,
189 assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
190 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
191 if (next_protocol == IPPROTO_IPIP) {
192 *item_flags |= MLX5_FLOW_LAYER_IPIP;
195 if (next_protocol == IPPROTO_IPV6) {
196 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
202 * Acquire the synchronizing object to protect multithreaded access
203 * to shared dv context. Lock occurs only if context is actually
204 * shared, i.e. we have multiport IB device and representors are
208 * Pointer to the rte_eth_dev structure.
211 flow_dv_shared_lock(struct rte_eth_dev *dev)
213 struct mlx5_priv *priv = dev->data->dev_private;
214 struct mlx5_ibv_shared *sh = priv->sh;
216 if (sh->dv_refcnt > 1) {
219 ret = pthread_mutex_lock(&sh->dv_mutex);
226 flow_dv_shared_unlock(struct rte_eth_dev *dev)
228 struct mlx5_priv *priv = dev->data->dev_private;
229 struct mlx5_ibv_shared *sh = priv->sh;
231 if (sh->dv_refcnt > 1) {
234 ret = pthread_mutex_unlock(&sh->dv_mutex);
240 /* Update VLAN's VID/PCP based on input rte_flow_action.
243 * Pointer to struct rte_flow_action.
245 * Pointer to struct rte_vlan_hdr.
248 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
249 struct rte_vlan_hdr *vlan)
252 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
254 ((const struct rte_flow_action_of_set_vlan_pcp *)
255 action->conf)->vlan_pcp;
256 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
257 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
258 vlan->vlan_tci |= vlan_tci;
259 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
260 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
261 vlan->vlan_tci |= rte_be_to_cpu_16
262 (((const struct rte_flow_action_of_set_vlan_vid *)
263 action->conf)->vlan_vid);
268 * Fetch 1, 2, 3 or 4 byte field from the byte array
269 * and return as unsigned integer in host-endian format.
272 * Pointer to data array.
274 * Size of field to extract.
277 * converted field in host endian format.
279 static inline uint32_t
280 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
289 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
292 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
293 ret = (ret << 8) | *(data + sizeof(uint16_t));
296 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
307 * Convert modify-header action to DV specification.
309 * Data length of each action is determined by provided field description
310 * and the item mask. Data bit offset and width of each action is determined
311 * by provided item mask.
314 * Pointer to item specification.
316 * Pointer to field modification information.
317 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
318 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
319 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
321 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
322 * Negative offset value sets the same offset as source offset.
323 * size field is ignored, value is taken from source field.
324 * @param[in,out] resource
325 * Pointer to the modify-header resource.
327 * Type of modification.
329 * Pointer to the error structure.
332 * 0 on success, a negative errno value otherwise and rte_errno is set.
335 flow_dv_convert_modify_action(struct rte_flow_item *item,
336 struct field_modify_info *field,
337 struct field_modify_info *dcopy,
338 struct mlx5_flow_dv_modify_hdr_resource *resource,
339 uint32_t type, struct rte_flow_error *error)
341 uint32_t i = resource->actions_num;
342 struct mlx5_modification_cmd *actions = resource->actions;
345 * The item and mask are provided in big-endian format.
346 * The fields should be presented as in big-endian format either.
347 * Mask must be always present, it defines the actual field width.
357 if (i >= MLX5_MODIFY_NUM)
358 return rte_flow_error_set(error, EINVAL,
359 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
360 "too many items to modify");
361 /* Fetch variable byte size mask from the array. */
362 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
363 field->offset, field->size);
368 /* Deduce actual data width in bits from mask value. */
369 off_b = rte_bsf32(mask);
370 size_b = sizeof(uint32_t) * CHAR_BIT -
371 off_b - __builtin_clz(mask);
373 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
374 actions[i].action_type = type;
375 actions[i].field = field->id;
376 actions[i].offset = off_b;
377 actions[i].length = size_b;
378 /* Convert entire record to expected big-endian format. */
379 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
380 if (type == MLX5_MODIFICATION_TYPE_COPY) {
382 actions[i].dst_field = dcopy->id;
383 actions[i].dst_offset =
384 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
385 /* Convert entire record to big-endian format. */
386 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
389 data = flow_dv_fetch_field((const uint8_t *)item->spec +
390 field->offset, field->size);
391 /* Shift out the trailing masked bits from data. */
392 data = (data & mask) >> off_b;
393 actions[i].data1 = rte_cpu_to_be_32(data);
397 } while (field->size);
398 resource->actions_num = i;
399 if (!resource->actions_num)
400 return rte_flow_error_set(error, EINVAL,
401 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
402 "invalid modification flow item");
407 * Convert modify-header set IPv4 address action to DV specification.
409 * @param[in,out] resource
410 * Pointer to the modify-header resource.
412 * Pointer to action specification.
414 * Pointer to the error structure.
417 * 0 on success, a negative errno value otherwise and rte_errno is set.
420 flow_dv_convert_action_modify_ipv4
421 (struct mlx5_flow_dv_modify_hdr_resource *resource,
422 const struct rte_flow_action *action,
423 struct rte_flow_error *error)
425 const struct rte_flow_action_set_ipv4 *conf =
426 (const struct rte_flow_action_set_ipv4 *)(action->conf);
427 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
428 struct rte_flow_item_ipv4 ipv4;
429 struct rte_flow_item_ipv4 ipv4_mask;
431 memset(&ipv4, 0, sizeof(ipv4));
432 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
433 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
434 ipv4.hdr.src_addr = conf->ipv4_addr;
435 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
437 ipv4.hdr.dst_addr = conf->ipv4_addr;
438 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
441 item.mask = &ipv4_mask;
442 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
443 MLX5_MODIFICATION_TYPE_SET, error);
447 * Convert modify-header set IPv6 address action to DV specification.
449 * @param[in,out] resource
450 * Pointer to the modify-header resource.
452 * Pointer to action specification.
454 * Pointer to the error structure.
457 * 0 on success, a negative errno value otherwise and rte_errno is set.
460 flow_dv_convert_action_modify_ipv6
461 (struct mlx5_flow_dv_modify_hdr_resource *resource,
462 const struct rte_flow_action *action,
463 struct rte_flow_error *error)
465 const struct rte_flow_action_set_ipv6 *conf =
466 (const struct rte_flow_action_set_ipv6 *)(action->conf);
467 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
468 struct rte_flow_item_ipv6 ipv6;
469 struct rte_flow_item_ipv6 ipv6_mask;
471 memset(&ipv6, 0, sizeof(ipv6));
472 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
473 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
474 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
475 sizeof(ipv6.hdr.src_addr));
476 memcpy(&ipv6_mask.hdr.src_addr,
477 &rte_flow_item_ipv6_mask.hdr.src_addr,
478 sizeof(ipv6.hdr.src_addr));
480 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
481 sizeof(ipv6.hdr.dst_addr));
482 memcpy(&ipv6_mask.hdr.dst_addr,
483 &rte_flow_item_ipv6_mask.hdr.dst_addr,
484 sizeof(ipv6.hdr.dst_addr));
487 item.mask = &ipv6_mask;
488 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
489 MLX5_MODIFICATION_TYPE_SET, error);
493 * Convert modify-header set MAC address action to DV specification.
495 * @param[in,out] resource
496 * Pointer to the modify-header resource.
498 * Pointer to action specification.
500 * Pointer to the error structure.
503 * 0 on success, a negative errno value otherwise and rte_errno is set.
506 flow_dv_convert_action_modify_mac
507 (struct mlx5_flow_dv_modify_hdr_resource *resource,
508 const struct rte_flow_action *action,
509 struct rte_flow_error *error)
511 const struct rte_flow_action_set_mac *conf =
512 (const struct rte_flow_action_set_mac *)(action->conf);
513 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
514 struct rte_flow_item_eth eth;
515 struct rte_flow_item_eth eth_mask;
517 memset(ð, 0, sizeof(eth));
518 memset(ð_mask, 0, sizeof(eth_mask));
519 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
520 memcpy(ð.src.addr_bytes, &conf->mac_addr,
521 sizeof(eth.src.addr_bytes));
522 memcpy(ð_mask.src.addr_bytes,
523 &rte_flow_item_eth_mask.src.addr_bytes,
524 sizeof(eth_mask.src.addr_bytes));
526 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
527 sizeof(eth.dst.addr_bytes));
528 memcpy(ð_mask.dst.addr_bytes,
529 &rte_flow_item_eth_mask.dst.addr_bytes,
530 sizeof(eth_mask.dst.addr_bytes));
533 item.mask = ð_mask;
534 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
535 MLX5_MODIFICATION_TYPE_SET, error);
539 * Convert modify-header set VLAN VID action to DV specification.
541 * @param[in,out] resource
542 * Pointer to the modify-header resource.
544 * Pointer to action specification.
546 * Pointer to the error structure.
549 * 0 on success, a negative errno value otherwise and rte_errno is set.
552 flow_dv_convert_action_modify_vlan_vid
553 (struct mlx5_flow_dv_modify_hdr_resource *resource,
554 const struct rte_flow_action *action,
555 struct rte_flow_error *error)
557 const struct rte_flow_action_of_set_vlan_vid *conf =
558 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
559 int i = resource->actions_num;
560 struct mlx5_modification_cmd *actions = &resource->actions[i];
561 struct field_modify_info *field = modify_vlan_out_first_vid;
563 if (i >= MLX5_MODIFY_NUM)
564 return rte_flow_error_set(error, EINVAL,
565 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
566 "too many items to modify");
567 actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
568 actions[i].field = field->id;
569 actions[i].length = field->size;
570 actions[i].offset = field->offset;
571 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
572 actions[i].data1 = conf->vlan_vid;
573 actions[i].data1 = actions[i].data1 << 16;
574 resource->actions_num = ++i;
579 * Convert modify-header set TP action to DV specification.
581 * @param[in,out] resource
582 * Pointer to the modify-header resource.
584 * Pointer to action specification.
586 * Pointer to rte_flow_item objects list.
588 * Pointer to flow attributes structure.
590 * Pointer to the error structure.
593 * 0 on success, a negative errno value otherwise and rte_errno is set.
596 flow_dv_convert_action_modify_tp
597 (struct mlx5_flow_dv_modify_hdr_resource *resource,
598 const struct rte_flow_action *action,
599 const struct rte_flow_item *items,
600 union flow_dv_attr *attr,
601 struct rte_flow_error *error)
603 const struct rte_flow_action_set_tp *conf =
604 (const struct rte_flow_action_set_tp *)(action->conf);
605 struct rte_flow_item item;
606 struct rte_flow_item_udp udp;
607 struct rte_flow_item_udp udp_mask;
608 struct rte_flow_item_tcp tcp;
609 struct rte_flow_item_tcp tcp_mask;
610 struct field_modify_info *field;
613 flow_dv_attr_init(items, attr);
615 memset(&udp, 0, sizeof(udp));
616 memset(&udp_mask, 0, sizeof(udp_mask));
617 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
618 udp.hdr.src_port = conf->port;
619 udp_mask.hdr.src_port =
620 rte_flow_item_udp_mask.hdr.src_port;
622 udp.hdr.dst_port = conf->port;
623 udp_mask.hdr.dst_port =
624 rte_flow_item_udp_mask.hdr.dst_port;
626 item.type = RTE_FLOW_ITEM_TYPE_UDP;
628 item.mask = &udp_mask;
632 memset(&tcp, 0, sizeof(tcp));
633 memset(&tcp_mask, 0, sizeof(tcp_mask));
634 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
635 tcp.hdr.src_port = conf->port;
636 tcp_mask.hdr.src_port =
637 rte_flow_item_tcp_mask.hdr.src_port;
639 tcp.hdr.dst_port = conf->port;
640 tcp_mask.hdr.dst_port =
641 rte_flow_item_tcp_mask.hdr.dst_port;
643 item.type = RTE_FLOW_ITEM_TYPE_TCP;
645 item.mask = &tcp_mask;
648 return flow_dv_convert_modify_action(&item, field, NULL, resource,
649 MLX5_MODIFICATION_TYPE_SET, error);
653 * Convert modify-header set TTL action to DV specification.
655 * @param[in,out] resource
656 * Pointer to the modify-header resource.
658 * Pointer to action specification.
660 * Pointer to rte_flow_item objects list.
662 * Pointer to flow attributes structure.
664 * Pointer to the error structure.
667 * 0 on success, a negative errno value otherwise and rte_errno is set.
670 flow_dv_convert_action_modify_ttl
671 (struct mlx5_flow_dv_modify_hdr_resource *resource,
672 const struct rte_flow_action *action,
673 const struct rte_flow_item *items,
674 union flow_dv_attr *attr,
675 struct rte_flow_error *error)
677 const struct rte_flow_action_set_ttl *conf =
678 (const struct rte_flow_action_set_ttl *)(action->conf);
679 struct rte_flow_item item;
680 struct rte_flow_item_ipv4 ipv4;
681 struct rte_flow_item_ipv4 ipv4_mask;
682 struct rte_flow_item_ipv6 ipv6;
683 struct rte_flow_item_ipv6 ipv6_mask;
684 struct field_modify_info *field;
687 flow_dv_attr_init(items, attr);
689 memset(&ipv4, 0, sizeof(ipv4));
690 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
691 ipv4.hdr.time_to_live = conf->ttl_value;
692 ipv4_mask.hdr.time_to_live = 0xFF;
693 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
695 item.mask = &ipv4_mask;
699 memset(&ipv6, 0, sizeof(ipv6));
700 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
701 ipv6.hdr.hop_limits = conf->ttl_value;
702 ipv6_mask.hdr.hop_limits = 0xFF;
703 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
705 item.mask = &ipv6_mask;
708 return flow_dv_convert_modify_action(&item, field, NULL, resource,
709 MLX5_MODIFICATION_TYPE_SET, error);
713 * Convert modify-header decrement TTL action to DV specification.
715 * @param[in,out] resource
716 * Pointer to the modify-header resource.
718 * Pointer to action specification.
720 * Pointer to rte_flow_item objects list.
722 * Pointer to flow attributes structure.
724 * Pointer to the error structure.
727 * 0 on success, a negative errno value otherwise and rte_errno is set.
730 flow_dv_convert_action_modify_dec_ttl
731 (struct mlx5_flow_dv_modify_hdr_resource *resource,
732 const struct rte_flow_item *items,
733 union flow_dv_attr *attr,
734 struct rte_flow_error *error)
736 struct rte_flow_item item;
737 struct rte_flow_item_ipv4 ipv4;
738 struct rte_flow_item_ipv4 ipv4_mask;
739 struct rte_flow_item_ipv6 ipv6;
740 struct rte_flow_item_ipv6 ipv6_mask;
741 struct field_modify_info *field;
744 flow_dv_attr_init(items, attr);
746 memset(&ipv4, 0, sizeof(ipv4));
747 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
748 ipv4.hdr.time_to_live = 0xFF;
749 ipv4_mask.hdr.time_to_live = 0xFF;
750 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
752 item.mask = &ipv4_mask;
756 memset(&ipv6, 0, sizeof(ipv6));
757 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
758 ipv6.hdr.hop_limits = 0xFF;
759 ipv6_mask.hdr.hop_limits = 0xFF;
760 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
762 item.mask = &ipv6_mask;
765 return flow_dv_convert_modify_action(&item, field, NULL, resource,
766 MLX5_MODIFICATION_TYPE_ADD, error);
770 * Convert modify-header increment/decrement TCP Sequence number
771 * to DV specification.
773 * @param[in,out] resource
774 * Pointer to the modify-header resource.
776 * Pointer to action specification.
778 * Pointer to the error structure.
781 * 0 on success, a negative errno value otherwise and rte_errno is set.
784 flow_dv_convert_action_modify_tcp_seq
785 (struct mlx5_flow_dv_modify_hdr_resource *resource,
786 const struct rte_flow_action *action,
787 struct rte_flow_error *error)
789 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
790 uint64_t value = rte_be_to_cpu_32(*conf);
791 struct rte_flow_item item;
792 struct rte_flow_item_tcp tcp;
793 struct rte_flow_item_tcp tcp_mask;
795 memset(&tcp, 0, sizeof(tcp));
796 memset(&tcp_mask, 0, sizeof(tcp_mask));
797 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
799 * The HW has no decrement operation, only increment operation.
800 * To simulate decrement X from Y using increment operation
801 * we need to add UINT32_MAX X times to Y.
802 * Each adding of UINT32_MAX decrements Y by 1.
805 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
806 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
807 item.type = RTE_FLOW_ITEM_TYPE_TCP;
809 item.mask = &tcp_mask;
810 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
811 MLX5_MODIFICATION_TYPE_ADD, error);
815 * Convert modify-header increment/decrement TCP Acknowledgment number
816 * to DV specification.
818 * @param[in,out] resource
819 * Pointer to the modify-header resource.
821 * Pointer to action specification.
823 * Pointer to the error structure.
826 * 0 on success, a negative errno value otherwise and rte_errno is set.
829 flow_dv_convert_action_modify_tcp_ack
830 (struct mlx5_flow_dv_modify_hdr_resource *resource,
831 const struct rte_flow_action *action,
832 struct rte_flow_error *error)
834 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
835 uint64_t value = rte_be_to_cpu_32(*conf);
836 struct rte_flow_item item;
837 struct rte_flow_item_tcp tcp;
838 struct rte_flow_item_tcp tcp_mask;
840 memset(&tcp, 0, sizeof(tcp));
841 memset(&tcp_mask, 0, sizeof(tcp_mask));
842 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
844 * The HW has no decrement operation, only increment operation.
845 * To simulate decrement X from Y using increment operation
846 * we need to add UINT32_MAX X times to Y.
847 * Each adding of UINT32_MAX decrements Y by 1.
850 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
851 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
852 item.type = RTE_FLOW_ITEM_TYPE_TCP;
854 item.mask = &tcp_mask;
855 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
856 MLX5_MODIFICATION_TYPE_ADD, error);
859 static enum mlx5_modification_field reg_to_field[] = {
860 [REG_NONE] = MLX5_MODI_OUT_NONE,
861 [REG_A] = MLX5_MODI_META_DATA_REG_A,
862 [REG_B] = MLX5_MODI_META_DATA_REG_B,
863 [REG_C_0] = MLX5_MODI_META_REG_C_0,
864 [REG_C_1] = MLX5_MODI_META_REG_C_1,
865 [REG_C_2] = MLX5_MODI_META_REG_C_2,
866 [REG_C_3] = MLX5_MODI_META_REG_C_3,
867 [REG_C_4] = MLX5_MODI_META_REG_C_4,
868 [REG_C_5] = MLX5_MODI_META_REG_C_5,
869 [REG_C_6] = MLX5_MODI_META_REG_C_6,
870 [REG_C_7] = MLX5_MODI_META_REG_C_7,
874 * Convert register set to DV specification.
876 * @param[in,out] resource
877 * Pointer to the modify-header resource.
879 * Pointer to action specification.
881 * Pointer to the error structure.
884 * 0 on success, a negative errno value otherwise and rte_errno is set.
887 flow_dv_convert_action_set_reg
888 (struct mlx5_flow_dv_modify_hdr_resource *resource,
889 const struct rte_flow_action *action,
890 struct rte_flow_error *error)
892 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
893 struct mlx5_modification_cmd *actions = resource->actions;
894 uint32_t i = resource->actions_num;
896 if (i >= MLX5_MODIFY_NUM)
897 return rte_flow_error_set(error, EINVAL,
898 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
899 "too many items to modify");
900 assert(conf->id != REG_NONE);
901 assert(conf->id < RTE_DIM(reg_to_field));
902 actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
903 actions[i].field = reg_to_field[conf->id];
904 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
905 actions[i].data1 = rte_cpu_to_be_32(conf->data);
907 resource->actions_num = i;
908 if (!resource->actions_num)
909 return rte_flow_error_set(error, EINVAL,
910 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
911 "invalid modification flow item");
916 * Convert SET_TAG action to DV specification.
919 * Pointer to the rte_eth_dev structure.
920 * @param[in,out] resource
921 * Pointer to the modify-header resource.
923 * Pointer to action specification.
925 * Pointer to the error structure.
928 * 0 on success, a negative errno value otherwise and rte_errno is set.
931 flow_dv_convert_action_set_tag
932 (struct rte_eth_dev *dev,
933 struct mlx5_flow_dv_modify_hdr_resource *resource,
934 const struct rte_flow_action_set_tag *conf,
935 struct rte_flow_error *error)
937 rte_be32_t data = rte_cpu_to_be_32(conf->data);
938 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
939 struct rte_flow_item item = {
943 struct field_modify_info reg_c_x[] = {
946 enum mlx5_modification_field reg_type;
949 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
952 assert(ret != REG_NONE);
953 assert((unsigned int)ret < RTE_DIM(reg_to_field));
954 reg_type = reg_to_field[ret];
955 assert(reg_type > 0);
956 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
957 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
958 MLX5_MODIFICATION_TYPE_SET, error);
962 * Convert internal COPY_REG action to DV specification.
965 * Pointer to the rte_eth_dev structure.
967 * Pointer to the modify-header resource.
969 * Pointer to action specification.
971 * Pointer to the error structure.
974 * 0 on success, a negative errno value otherwise and rte_errno is set.
977 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
978 struct mlx5_flow_dv_modify_hdr_resource *res,
979 const struct rte_flow_action *action,
980 struct rte_flow_error *error)
982 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
983 rte_be32_t mask = RTE_BE32(UINT32_MAX);
984 struct rte_flow_item item = {
988 struct field_modify_info reg_src[] = {
989 {4, 0, reg_to_field[conf->src]},
992 struct field_modify_info reg_dst = {
994 .id = reg_to_field[conf->dst],
996 /* Adjust reg_c[0] usage according to reported mask. */
997 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
998 struct mlx5_priv *priv = dev->data->dev_private;
999 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1002 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1003 if (conf->dst == REG_C_0) {
1004 /* Copy to reg_c[0], within mask only. */
1005 reg_dst.offset = rte_bsf32(reg_c0);
1007 * Mask is ignoring the enianness, because
1008 * there is no conversion in datapath.
1010 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1011 /* Copy from destination lower bits to reg_c[0]. */
1012 mask = reg_c0 >> reg_dst.offset;
1014 /* Copy from destination upper bits to reg_c[0]. */
1015 mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1016 rte_fls_u32(reg_c0));
1019 mask = rte_cpu_to_be_32(reg_c0);
1020 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1021 /* Copy from reg_c[0] to destination lower bits. */
1024 /* Copy from reg_c[0] to destination upper bits. */
1025 reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1026 (rte_fls_u32(reg_c0) -
1031 return flow_dv_convert_modify_action(&item,
1032 reg_src, ®_dst, res,
1033 MLX5_MODIFICATION_TYPE_COPY,
1038 * Convert MARK action to DV specification. This routine is used
1039 * in extensive metadata only and requires metadata register to be
1040 * handled. In legacy mode hardware tag resource is engaged.
1043 * Pointer to the rte_eth_dev structure.
1045 * Pointer to MARK action specification.
1046 * @param[in,out] resource
1047 * Pointer to the modify-header resource.
1049 * Pointer to the error structure.
1052 * 0 on success, a negative errno value otherwise and rte_errno is set.
1055 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1056 const struct rte_flow_action_mark *conf,
1057 struct mlx5_flow_dv_modify_hdr_resource *resource,
1058 struct rte_flow_error *error)
1060 struct mlx5_priv *priv = dev->data->dev_private;
1061 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1062 priv->sh->dv_mark_mask);
1063 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1064 struct rte_flow_item item = {
1068 struct field_modify_info reg_c_x[] = {
1069 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1072 enum modify_reg reg;
1075 return rte_flow_error_set(error, EINVAL,
1076 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1077 NULL, "zero mark action mask");
1078 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1082 reg_c_x[0].id = reg_to_field[reg];
1083 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1084 MLX5_MODIFICATION_TYPE_SET, error);
1088 * Get metadata register index for specified steering domain.
1091 * Pointer to the rte_eth_dev structure.
1093 * Attributes of flow to determine steering domain.
1095 * Pointer to the error structure.
1098 * positive index on success, a negative errno value otherwise
1099 * and rte_errno is set.
1101 static enum modify_reg
1102 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1103 const struct rte_flow_attr *attr,
1104 struct rte_flow_error *error)
1106 enum modify_reg reg =
1107 mlx5_flow_get_reg_id(dev, attr->transfer ?
1111 MLX5_METADATA_RX, 0, error);
1113 return rte_flow_error_set(error,
1114 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1115 NULL, "unavailable "
1116 "metadata register");
1121 * Convert SET_META action to DV specification.
1124 * Pointer to the rte_eth_dev structure.
1125 * @param[in,out] resource
1126 * Pointer to the modify-header resource.
1128 * Attributes of flow that includes this item.
1130 * Pointer to action specification.
1132 * Pointer to the error structure.
1135 * 0 on success, a negative errno value otherwise and rte_errno is set.
1138 flow_dv_convert_action_set_meta
1139 (struct rte_eth_dev *dev,
1140 struct mlx5_flow_dv_modify_hdr_resource *resource,
1141 const struct rte_flow_attr *attr,
1142 const struct rte_flow_action_set_meta *conf,
1143 struct rte_flow_error *error)
1145 uint32_t data = conf->data;
1146 uint32_t mask = conf->mask;
1147 struct rte_flow_item item = {
1151 struct field_modify_info reg_c_x[] = {
1154 enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1159 * In datapath code there is no endianness
1160 * coversions for perfromance reasons, all
1161 * pattern conversions are done in rte_flow.
1163 if (reg == REG_C_0) {
1164 struct mlx5_priv *priv = dev->data->dev_private;
1165 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1169 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1170 shl_c0 = rte_bsf32(msk_c0);
1172 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1176 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1178 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1179 /* The routine expects parameters in memory as big-endian ones. */
1180 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1181 MLX5_MODIFICATION_TYPE_SET, error);
1185 * Validate MARK item.
1188 * Pointer to the rte_eth_dev structure.
1190 * Item specification.
1192 * Attributes of flow that includes this item.
1194 * Pointer to error structure.
1197 * 0 on success, a negative errno value otherwise and rte_errno is set.
1200 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1201 const struct rte_flow_item *item,
1202 const struct rte_flow_attr *attr __rte_unused,
1203 struct rte_flow_error *error)
1205 struct mlx5_priv *priv = dev->data->dev_private;
1206 struct mlx5_dev_config *config = &priv->config;
1207 const struct rte_flow_item_mark *spec = item->spec;
1208 const struct rte_flow_item_mark *mask = item->mask;
1209 const struct rte_flow_item_mark nic_mask = {
1210 .id = priv->sh->dv_mark_mask,
1214 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1215 return rte_flow_error_set(error, ENOTSUP,
1216 RTE_FLOW_ERROR_TYPE_ITEM, item,
1217 "extended metadata feature"
1219 if (!mlx5_flow_ext_mreg_supported(dev))
1220 return rte_flow_error_set(error, ENOTSUP,
1221 RTE_FLOW_ERROR_TYPE_ITEM, item,
1222 "extended metadata register"
1223 " isn't supported");
1225 return rte_flow_error_set(error, ENOTSUP,
1226 RTE_FLOW_ERROR_TYPE_ITEM, item,
1227 "extended metadata register"
1228 " isn't available");
1229 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1233 return rte_flow_error_set(error, EINVAL,
1234 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1236 "data cannot be empty");
1237 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1238 return rte_flow_error_set(error, EINVAL,
1239 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1241 "mark id exceeds the limit");
1244 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1245 (const uint8_t *)&nic_mask,
1246 sizeof(struct rte_flow_item_mark),
1254 * Validate META item.
1257 * Pointer to the rte_eth_dev structure.
1259 * Item specification.
1261 * Attributes of flow that includes this item.
1263 * Pointer to error structure.
1266 * 0 on success, a negative errno value otherwise and rte_errno is set.
1269 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1270 const struct rte_flow_item *item,
1271 const struct rte_flow_attr *attr,
1272 struct rte_flow_error *error)
1274 struct mlx5_priv *priv = dev->data->dev_private;
1275 struct mlx5_dev_config *config = &priv->config;
1276 const struct rte_flow_item_meta *spec = item->spec;
1277 const struct rte_flow_item_meta *mask = item->mask;
1278 struct rte_flow_item_meta nic_mask = {
1281 enum modify_reg reg;
1285 return rte_flow_error_set(error, EINVAL,
1286 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1288 "data cannot be empty");
1290 return rte_flow_error_set(error, EINVAL,
1291 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1292 "data cannot be zero");
1293 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1294 if (!mlx5_flow_ext_mreg_supported(dev))
1295 return rte_flow_error_set(error, ENOTSUP,
1296 RTE_FLOW_ERROR_TYPE_ITEM, item,
1297 "extended metadata register"
1298 " isn't supported");
1299 reg = flow_dv_get_metadata_reg(dev, attr, error);
1303 return rte_flow_error_set(error, ENOTSUP,
1304 RTE_FLOW_ERROR_TYPE_ITEM, item,
1308 nic_mask.data = priv->sh->dv_meta_mask;
1311 mask = &rte_flow_item_meta_mask;
1312 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1313 (const uint8_t *)&nic_mask,
1314 sizeof(struct rte_flow_item_meta),
1320 * Validate TAG item.
1323 * Pointer to the rte_eth_dev structure.
1325 * Item specification.
1327 * Attributes of flow that includes this item.
1329 * Pointer to error structure.
1332 * 0 on success, a negative errno value otherwise and rte_errno is set.
1335 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1336 const struct rte_flow_item *item,
1337 const struct rte_flow_attr *attr __rte_unused,
1338 struct rte_flow_error *error)
1340 const struct rte_flow_item_tag *spec = item->spec;
1341 const struct rte_flow_item_tag *mask = item->mask;
1342 const struct rte_flow_item_tag nic_mask = {
1343 .data = RTE_BE32(UINT32_MAX),
1348 if (!mlx5_flow_ext_mreg_supported(dev))
1349 return rte_flow_error_set(error, ENOTSUP,
1350 RTE_FLOW_ERROR_TYPE_ITEM, item,
1351 "extensive metadata register"
1352 " isn't supported");
1354 return rte_flow_error_set(error, EINVAL,
1355 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1357 "data cannot be empty");
1359 mask = &rte_flow_item_tag_mask;
1360 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1361 (const uint8_t *)&nic_mask,
1362 sizeof(struct rte_flow_item_tag),
1366 if (mask->index != 0xff)
1367 return rte_flow_error_set(error, EINVAL,
1368 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1369 "partial mask for tag index"
1370 " is not supported");
1371 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1374 assert(ret != REG_NONE);
1379 * Validate vport item.
1382 * Pointer to the rte_eth_dev structure.
1384 * Item specification.
1386 * Attributes of flow that includes this item.
1387 * @param[in] item_flags
1388 * Bit-fields that holds the items detected until now.
1390 * Pointer to error structure.
1393 * 0 on success, a negative errno value otherwise and rte_errno is set.
1396 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1397 const struct rte_flow_item *item,
1398 const struct rte_flow_attr *attr,
1399 uint64_t item_flags,
1400 struct rte_flow_error *error)
1402 const struct rte_flow_item_port_id *spec = item->spec;
1403 const struct rte_flow_item_port_id *mask = item->mask;
1404 const struct rte_flow_item_port_id switch_mask = {
1407 struct mlx5_priv *esw_priv;
1408 struct mlx5_priv *dev_priv;
1411 if (!attr->transfer)
1412 return rte_flow_error_set(error, EINVAL,
1413 RTE_FLOW_ERROR_TYPE_ITEM,
1415 "match on port id is valid only"
1416 " when transfer flag is enabled");
1417 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1418 return rte_flow_error_set(error, ENOTSUP,
1419 RTE_FLOW_ERROR_TYPE_ITEM, item,
1420 "multiple source ports are not"
1423 mask = &switch_mask;
1424 if (mask->id != 0xffffffff)
1425 return rte_flow_error_set(error, ENOTSUP,
1426 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1428 "no support for partial mask on"
1430 ret = mlx5_flow_item_acceptable
1431 (item, (const uint8_t *)mask,
1432 (const uint8_t *)&rte_flow_item_port_id_mask,
1433 sizeof(struct rte_flow_item_port_id),
1439 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1441 return rte_flow_error_set(error, rte_errno,
1442 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1443 "failed to obtain E-Switch info for"
1445 dev_priv = mlx5_dev_to_eswitch_info(dev);
1447 return rte_flow_error_set(error, rte_errno,
1448 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1450 "failed to obtain E-Switch info");
1451 if (esw_priv->domain_id != dev_priv->domain_id)
1452 return rte_flow_error_set(error, EINVAL,
1453 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1454 "cannot match on a port from a"
1455 " different E-Switch");
1460 * Validate the pop VLAN action.
1463 * Pointer to the rte_eth_dev structure.
1464 * @param[in] action_flags
1465 * Holds the actions detected until now.
1467 * Pointer to the pop vlan action.
1468 * @param[in] item_flags
1469 * The items found in this flow rule.
1471 * Pointer to flow attributes.
1473 * Pointer to error structure.
1476 * 0 on success, a negative errno value otherwise and rte_errno is set.
1479 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1480 uint64_t action_flags,
1481 const struct rte_flow_action *action,
1482 uint64_t item_flags,
1483 const struct rte_flow_attr *attr,
1484 struct rte_flow_error *error)
1486 struct mlx5_priv *priv = dev->data->dev_private;
1490 if (!priv->sh->pop_vlan_action)
1491 return rte_flow_error_set(error, ENOTSUP,
1492 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1494 "pop vlan action is not supported");
1496 * Check for inconsistencies:
1497 * fail strip_vlan in a flow that matches packets without VLAN tags.
1498 * fail strip_vlan in a flow that matches packets without explicitly a
1499 * matching on VLAN tag ?
1501 if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1502 return rte_flow_error_set(error, ENOTSUP,
1503 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1505 "no support for multiple vlan pop "
1507 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1508 return rte_flow_error_set(error, ENOTSUP,
1509 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1511 "cannot pop vlan without a "
1512 "match on (outer) vlan in the flow");
1513 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1514 return rte_flow_error_set(error, EINVAL,
1515 RTE_FLOW_ERROR_TYPE_ACTION, action,
1516 "wrong action order, port_id should "
1517 "be after pop VLAN action");
1522 * Get VLAN default info from vlan match info.
1525 * Pointer to the rte_eth_dev structure.
1527 * the list of item specifications.
1529 * pointer VLAN info to fill to.
1531 * Pointer to error structure.
1534 * 0 on success, a negative errno value otherwise and rte_errno is set.
1537 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1538 struct rte_vlan_hdr *vlan)
1540 const struct rte_flow_item_vlan nic_mask = {
1541 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1542 MLX5DV_FLOW_VLAN_VID_MASK),
1543 .inner_type = RTE_BE16(0xffff),
1548 for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1549 items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1551 if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1552 const struct rte_flow_item_vlan *vlan_m = items->mask;
1553 const struct rte_flow_item_vlan *vlan_v = items->spec;
1557 /* Only full match values are accepted */
1558 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1559 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1560 vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1562 rte_be_to_cpu_16(vlan_v->tci &
1563 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1565 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1566 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1567 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1569 rte_be_to_cpu_16(vlan_v->tci &
1570 MLX5DV_FLOW_VLAN_VID_MASK_BE);
1572 if (vlan_m->inner_type == nic_mask.inner_type)
1573 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1574 vlan_m->inner_type);
1579 * Validate the push VLAN action.
1581 * @param[in] action_flags
1582 * Holds the actions detected until now.
1584 * Pointer to the encap action.
1586 * Pointer to flow attributes
1588 * Pointer to error structure.
1591 * 0 on success, a negative errno value otherwise and rte_errno is set.
1594 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1595 uint64_t item_flags,
1596 const struct rte_flow_action *action,
1597 const struct rte_flow_attr *attr,
1598 struct rte_flow_error *error)
1600 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1602 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1603 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1604 return rte_flow_error_set(error, EINVAL,
1605 RTE_FLOW_ERROR_TYPE_ACTION, action,
1606 "invalid vlan ethertype");
1608 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1609 return rte_flow_error_set(error, ENOTSUP,
1610 RTE_FLOW_ERROR_TYPE_ACTION, action,
1611 "no support for multiple VLAN "
1613 if (!mlx5_flow_find_action
1614 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1615 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1616 return rte_flow_error_set(error, ENOTSUP,
1617 RTE_FLOW_ERROR_TYPE_ACTION, action,
1618 "push VLAN needs to match on VLAN in order to "
1619 "get VLAN VID information because there is "
1620 "no followed set VLAN VID action");
1621 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1622 return rte_flow_error_set(error, EINVAL,
1623 RTE_FLOW_ERROR_TYPE_ACTION, action,
1624 "wrong action order, port_id should "
1625 "be after push VLAN");
1631 * Validate the set VLAN PCP.
1633 * @param[in] action_flags
1634 * Holds the actions detected until now.
1635 * @param[in] actions
1636 * Pointer to the list of actions remaining in the flow rule.
1638 * Pointer to flow attributes
1640 * Pointer to error structure.
1643 * 0 on success, a negative errno value otherwise and rte_errno is set.
1646 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1647 const struct rte_flow_action actions[],
1648 struct rte_flow_error *error)
1650 const struct rte_flow_action *action = actions;
1651 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1653 if (conf->vlan_pcp > 7)
1654 return rte_flow_error_set(error, EINVAL,
1655 RTE_FLOW_ERROR_TYPE_ACTION, action,
1656 "VLAN PCP value is too big");
1657 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1658 return rte_flow_error_set(error, ENOTSUP,
1659 RTE_FLOW_ERROR_TYPE_ACTION, action,
1660 "set VLAN PCP action must follow "
1661 "the push VLAN action");
1662 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1663 return rte_flow_error_set(error, ENOTSUP,
1664 RTE_FLOW_ERROR_TYPE_ACTION, action,
1665 "Multiple VLAN PCP modification are "
1667 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1668 return rte_flow_error_set(error, EINVAL,
1669 RTE_FLOW_ERROR_TYPE_ACTION, action,
1670 "wrong action order, port_id should "
1671 "be after set VLAN PCP");
1676 * Validate the set VLAN VID.
1678 * @param[in] item_flags
1679 * Holds the items detected in this rule.
1680 * @param[in] actions
1681 * Pointer to the list of actions remaining in the flow rule.
1683 * Pointer to flow attributes
1685 * Pointer to error structure.
1688 * 0 on success, a negative errno value otherwise and rte_errno is set.
1691 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1692 uint64_t action_flags,
1693 const struct rte_flow_action actions[],
1694 struct rte_flow_error *error)
1696 const struct rte_flow_action *action = actions;
1697 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1699 if (conf->vlan_vid > RTE_BE16(0xFFE))
1700 return rte_flow_error_set(error, EINVAL,
1701 RTE_FLOW_ERROR_TYPE_ACTION, action,
1702 "VLAN VID value is too big");
1703 /* there is an of_push_vlan action before us */
1704 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1705 if (mlx5_flow_find_action(actions + 1,
1706 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1707 return rte_flow_error_set(error, ENOTSUP,
1708 RTE_FLOW_ERROR_TYPE_ACTION, action,
1709 "Multiple VLAN VID modifications are "
1716 * Action is on an existing VLAN header:
1717 * Need to verify this is a single modify CID action.
1718 * Rule mast include a match on outer VLAN.
1720 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1721 return rte_flow_error_set(error, ENOTSUP,
1722 RTE_FLOW_ERROR_TYPE_ACTION, action,
1723 "Multiple VLAN VID modifications are "
1725 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1726 return rte_flow_error_set(error, EINVAL,
1727 RTE_FLOW_ERROR_TYPE_ACTION, action,
1728 "match on VLAN is required in order "
1730 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1731 return rte_flow_error_set(error, EINVAL,
1732 RTE_FLOW_ERROR_TYPE_ACTION, action,
1733 "wrong action order, port_id should "
1734 "be after set VLAN VID");
1739 * Validate the FLAG action.
1742 * Pointer to the rte_eth_dev structure.
1743 * @param[in] action_flags
1744 * Holds the actions detected until now.
1746 * Pointer to flow attributes
1748 * Pointer to error structure.
1751 * 0 on success, a negative errno value otherwise and rte_errno is set.
1754 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1755 uint64_t action_flags,
1756 const struct rte_flow_attr *attr,
1757 struct rte_flow_error *error)
1759 struct mlx5_priv *priv = dev->data->dev_private;
1760 struct mlx5_dev_config *config = &priv->config;
1763 /* Fall back if no extended metadata register support. */
1764 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1765 return mlx5_flow_validate_action_flag(action_flags, attr,
1767 /* Extensive metadata mode requires registers. */
1768 if (!mlx5_flow_ext_mreg_supported(dev))
1769 return rte_flow_error_set(error, ENOTSUP,
1770 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1771 "no metadata registers "
1772 "to support flag action");
1773 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1774 return rte_flow_error_set(error, ENOTSUP,
1775 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1776 "extended metadata register"
1777 " isn't available");
1778 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1782 if (action_flags & MLX5_FLOW_ACTION_DROP)
1783 return rte_flow_error_set(error, EINVAL,
1784 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1785 "can't drop and flag in same flow");
1786 if (action_flags & MLX5_FLOW_ACTION_MARK)
1787 return rte_flow_error_set(error, EINVAL,
1788 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1789 "can't mark and flag in same flow");
1790 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1791 return rte_flow_error_set(error, EINVAL,
1792 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1794 " actions in same flow");
1799 * Validate MARK action.
1802 * Pointer to the rte_eth_dev structure.
1804 * Pointer to action.
1805 * @param[in] action_flags
1806 * Holds the actions detected until now.
1808 * Pointer to flow attributes
1810 * Pointer to error structure.
1813 * 0 on success, a negative errno value otherwise and rte_errno is set.
1816 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1817 const struct rte_flow_action *action,
1818 uint64_t action_flags,
1819 const struct rte_flow_attr *attr,
1820 struct rte_flow_error *error)
1822 struct mlx5_priv *priv = dev->data->dev_private;
1823 struct mlx5_dev_config *config = &priv->config;
1824 const struct rte_flow_action_mark *mark = action->conf;
1827 /* Fall back if no extended metadata register support. */
1828 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1829 return mlx5_flow_validate_action_mark(action, action_flags,
1831 /* Extensive metadata mode requires registers. */
1832 if (!mlx5_flow_ext_mreg_supported(dev))
1833 return rte_flow_error_set(error, ENOTSUP,
1834 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1835 "no metadata registers "
1836 "to support mark action");
1837 if (!priv->sh->dv_mark_mask)
1838 return rte_flow_error_set(error, ENOTSUP,
1839 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1840 "extended metadata register"
1841 " isn't available");
1842 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1847 return rte_flow_error_set(error, EINVAL,
1848 RTE_FLOW_ERROR_TYPE_ACTION, action,
1849 "configuration cannot be null");
1850 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1851 return rte_flow_error_set(error, EINVAL,
1852 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1854 "mark id exceeds the limit");
1855 if (action_flags & MLX5_FLOW_ACTION_DROP)
1856 return rte_flow_error_set(error, EINVAL,
1857 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1858 "can't drop and mark in same flow");
1859 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1860 return rte_flow_error_set(error, EINVAL,
1861 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1862 "can't flag and mark in same flow");
1863 if (action_flags & MLX5_FLOW_ACTION_MARK)
1864 return rte_flow_error_set(error, EINVAL,
1865 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1866 "can't have 2 mark actions in same"
1872 * Validate SET_META action.
1875 * Pointer to the rte_eth_dev structure.
1877 * Pointer to the encap action.
1878 * @param[in] action_flags
1879 * Holds the actions detected until now.
1881 * Pointer to flow attributes
1883 * Pointer to error structure.
1886 * 0 on success, a negative errno value otherwise and rte_errno is set.
1889 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
1890 const struct rte_flow_action *action,
1891 uint64_t action_flags __rte_unused,
1892 const struct rte_flow_attr *attr,
1893 struct rte_flow_error *error)
1895 const struct rte_flow_action_set_meta *conf;
1896 uint32_t nic_mask = UINT32_MAX;
1897 enum modify_reg reg;
1899 if (!mlx5_flow_ext_mreg_supported(dev))
1900 return rte_flow_error_set(error, ENOTSUP,
1901 RTE_FLOW_ERROR_TYPE_ACTION, action,
1902 "extended metadata register"
1903 " isn't supported");
1904 reg = flow_dv_get_metadata_reg(dev, attr, error);
1907 if (reg != REG_A && reg != REG_B) {
1908 struct mlx5_priv *priv = dev->data->dev_private;
1910 nic_mask = priv->sh->dv_meta_mask;
1912 if (!(action->conf))
1913 return rte_flow_error_set(error, EINVAL,
1914 RTE_FLOW_ERROR_TYPE_ACTION, action,
1915 "configuration cannot be null");
1916 conf = (const struct rte_flow_action_set_meta *)action->conf;
1918 return rte_flow_error_set(error, EINVAL,
1919 RTE_FLOW_ERROR_TYPE_ACTION, action,
1920 "zero mask doesn't have any effect");
1921 if (conf->mask & ~nic_mask)
1922 return rte_flow_error_set(error, EINVAL,
1923 RTE_FLOW_ERROR_TYPE_ACTION, action,
1924 "meta data must be within reg C0");
1925 if (!(conf->data & conf->mask))
1926 return rte_flow_error_set(error, EINVAL,
1927 RTE_FLOW_ERROR_TYPE_ACTION, action,
1928 "zero value has no effect");
1933 * Validate SET_TAG action.
1936 * Pointer to the rte_eth_dev structure.
1938 * Pointer to the encap action.
1939 * @param[in] action_flags
1940 * Holds the actions detected until now.
1942 * Pointer to flow attributes
1944 * Pointer to error structure.
1947 * 0 on success, a negative errno value otherwise and rte_errno is set.
1950 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
1951 const struct rte_flow_action *action,
1952 uint64_t action_flags,
1953 const struct rte_flow_attr *attr,
1954 struct rte_flow_error *error)
1956 const struct rte_flow_action_set_tag *conf;
1957 const uint64_t terminal_action_flags =
1958 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
1959 MLX5_FLOW_ACTION_RSS;
1962 if (!mlx5_flow_ext_mreg_supported(dev))
1963 return rte_flow_error_set(error, ENOTSUP,
1964 RTE_FLOW_ERROR_TYPE_ACTION, action,
1965 "extensive metadata register"
1966 " isn't supported");
1967 if (!(action->conf))
1968 return rte_flow_error_set(error, EINVAL,
1969 RTE_FLOW_ERROR_TYPE_ACTION, action,
1970 "configuration cannot be null");
1971 conf = (const struct rte_flow_action_set_tag *)action->conf;
1973 return rte_flow_error_set(error, EINVAL,
1974 RTE_FLOW_ERROR_TYPE_ACTION, action,
1975 "zero mask doesn't have any effect");
1976 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1979 if (!attr->transfer && attr->ingress &&
1980 (action_flags & terminal_action_flags))
1981 return rte_flow_error_set(error, EINVAL,
1982 RTE_FLOW_ERROR_TYPE_ACTION, action,
1983 "set_tag has no effect"
1984 " with terminal actions");
1989 * Validate count action.
1994 * Pointer to error structure.
1997 * 0 on success, a negative errno value otherwise and rte_errno is set.
2000 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2001 struct rte_flow_error *error)
2003 struct mlx5_priv *priv = dev->data->dev_private;
2005 if (!priv->config.devx)
2007 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2011 return rte_flow_error_set
2013 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2015 "count action not supported");
2019 * Validate the L2 encap action.
2021 * @param[in] action_flags
2022 * Holds the actions detected until now.
2024 * Pointer to the encap action.
2026 * Pointer to flow attributes
2028 * Pointer to error structure.
2031 * 0 on success, a negative errno value otherwise and rte_errno is set.
2034 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2035 const struct rte_flow_action *action,
2036 const struct rte_flow_attr *attr,
2037 struct rte_flow_error *error)
2039 if (!(action->conf))
2040 return rte_flow_error_set(error, EINVAL,
2041 RTE_FLOW_ERROR_TYPE_ACTION, action,
2042 "configuration cannot be null");
2043 if (action_flags & MLX5_FLOW_ACTION_DROP)
2044 return rte_flow_error_set(error, EINVAL,
2045 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2046 "can't drop and encap in same flow");
2047 if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2048 return rte_flow_error_set(error, EINVAL,
2049 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2050 "can only have a single encap or"
2051 " decap action in a flow");
2052 if (!attr->transfer && attr->ingress)
2053 return rte_flow_error_set(error, ENOTSUP,
2054 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2056 "encap action not supported for "
2062 * Validate the L2 decap action.
2064 * @param[in] action_flags
2065 * Holds the actions detected until now.
2067 * Pointer to flow attributes
2069 * Pointer to error structure.
2072 * 0 on success, a negative errno value otherwise and rte_errno is set.
2075 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2076 const struct rte_flow_attr *attr,
2077 struct rte_flow_error *error)
2079 if (action_flags & MLX5_FLOW_ACTION_DROP)
2080 return rte_flow_error_set(error, EINVAL,
2081 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2082 "can't drop and decap in same flow");
2083 if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2084 return rte_flow_error_set(error, EINVAL,
2085 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2086 "can only have a single encap or"
2087 " decap action in a flow");
2088 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2089 return rte_flow_error_set(error, EINVAL,
2090 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2091 "can't have decap action after"
2094 return rte_flow_error_set(error, ENOTSUP,
2095 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2097 "decap action not supported for "
2103 * Validate the raw encap action.
2105 * @param[in] action_flags
2106 * Holds the actions detected until now.
2108 * Pointer to the encap action.
2110 * Pointer to flow attributes
2112 * Pointer to error structure.
2115 * 0 on success, a negative errno value otherwise and rte_errno is set.
2118 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2119 const struct rte_flow_action *action,
2120 const struct rte_flow_attr *attr,
2121 struct rte_flow_error *error)
2123 const struct rte_flow_action_raw_encap *raw_encap =
2124 (const struct rte_flow_action_raw_encap *)action->conf;
2125 if (!(action->conf))
2126 return rte_flow_error_set(error, EINVAL,
2127 RTE_FLOW_ERROR_TYPE_ACTION, action,
2128 "configuration cannot be null");
2129 if (action_flags & MLX5_FLOW_ACTION_DROP)
2130 return rte_flow_error_set(error, EINVAL,
2131 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2132 "can't drop and encap in same flow");
2133 if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2134 return rte_flow_error_set(error, EINVAL,
2135 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2136 "can only have a single encap"
2137 " action in a flow");
2138 /* encap without preceding decap is not supported for ingress */
2139 if (!attr->transfer && attr->ingress &&
2140 !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2141 return rte_flow_error_set(error, ENOTSUP,
2142 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2144 "encap action not supported for "
2146 if (!raw_encap->size || !raw_encap->data)
2147 return rte_flow_error_set(error, EINVAL,
2148 RTE_FLOW_ERROR_TYPE_ACTION, action,
2149 "raw encap data cannot be empty");
2154 * Validate the raw decap action.
2156 * @param[in] action_flags
2157 * Holds the actions detected until now.
2159 * Pointer to the encap action.
2161 * Pointer to flow attributes
2163 * Pointer to error structure.
2166 * 0 on success, a negative errno value otherwise and rte_errno is set.
2169 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2170 const struct rte_flow_action *action,
2171 const struct rte_flow_attr *attr,
2172 struct rte_flow_error *error)
2174 if (action_flags & MLX5_FLOW_ACTION_DROP)
2175 return rte_flow_error_set(error, EINVAL,
2176 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2177 "can't drop and decap in same flow");
2178 if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2179 return rte_flow_error_set(error, EINVAL,
2180 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2181 "can't have encap action before"
2183 if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2184 return rte_flow_error_set(error, EINVAL,
2185 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2186 "can only have a single decap"
2187 " action in a flow");
2188 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2189 return rte_flow_error_set(error, EINVAL,
2190 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2191 "can't have decap action after"
2193 /* decap action is valid on egress only if it is followed by encap */
2195 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
2196 action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
2199 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
2200 return rte_flow_error_set
2202 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2203 NULL, "decap action not supported"
2210 * Find existing encap/decap resource or create and register a new one.
2212 * @param[in, out] dev
2213 * Pointer to rte_eth_dev structure.
2214 * @param[in, out] resource
2215 * Pointer to encap/decap resource.
2216 * @parm[in, out] dev_flow
2217 * Pointer to the dev_flow.
2219 * pointer to error structure.
2222 * 0 on success otherwise -errno and errno is set.
2225 flow_dv_encap_decap_resource_register
2226 (struct rte_eth_dev *dev,
2227 struct mlx5_flow_dv_encap_decap_resource *resource,
2228 struct mlx5_flow *dev_flow,
2229 struct rte_flow_error *error)
2231 struct mlx5_priv *priv = dev->data->dev_private;
2232 struct mlx5_ibv_shared *sh = priv->sh;
2233 struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2234 struct mlx5dv_dr_domain *domain;
2236 resource->flags = dev_flow->group ? 0 : 1;
2237 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2238 domain = sh->fdb_domain;
2239 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2240 domain = sh->rx_domain;
2242 domain = sh->tx_domain;
2244 /* Lookup a matching resource from cache. */
2245 LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2246 if (resource->reformat_type == cache_resource->reformat_type &&
2247 resource->ft_type == cache_resource->ft_type &&
2248 resource->flags == cache_resource->flags &&
2249 resource->size == cache_resource->size &&
2250 !memcmp((const void *)resource->buf,
2251 (const void *)cache_resource->buf,
2253 DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2254 (void *)cache_resource,
2255 rte_atomic32_read(&cache_resource->refcnt));
2256 rte_atomic32_inc(&cache_resource->refcnt);
2257 dev_flow->dv.encap_decap = cache_resource;
2261 /* Register new encap/decap resource. */
2262 cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2263 if (!cache_resource)
2264 return rte_flow_error_set(error, ENOMEM,
2265 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2266 "cannot allocate resource memory");
2267 *cache_resource = *resource;
2268 cache_resource->verbs_action =
2269 mlx5_glue->dv_create_flow_action_packet_reformat
2270 (sh->ctx, cache_resource->reformat_type,
2271 cache_resource->ft_type, domain, cache_resource->flags,
2272 cache_resource->size,
2273 (cache_resource->size ? cache_resource->buf : NULL));
2274 if (!cache_resource->verbs_action) {
2275 rte_free(cache_resource);
2276 return rte_flow_error_set(error, ENOMEM,
2277 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2278 NULL, "cannot create action");
2280 rte_atomic32_init(&cache_resource->refcnt);
2281 rte_atomic32_inc(&cache_resource->refcnt);
2282 LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2283 dev_flow->dv.encap_decap = cache_resource;
2284 DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2285 (void *)cache_resource,
2286 rte_atomic32_read(&cache_resource->refcnt));
2291 * Find existing table jump resource or create and register a new one.
2293 * @param[in, out] dev
2294 * Pointer to rte_eth_dev structure.
2295 * @param[in, out] tbl
2296 * Pointer to flow table resource.
2297 * @parm[in, out] dev_flow
2298 * Pointer to the dev_flow.
2300 * pointer to error structure.
2303 * 0 on success otherwise -errno and errno is set.
2306 flow_dv_jump_tbl_resource_register
2307 (struct rte_eth_dev *dev __rte_unused,
2308 struct mlx5_flow_tbl_resource *tbl,
2309 struct mlx5_flow *dev_flow,
2310 struct rte_flow_error *error)
2312 struct mlx5_flow_tbl_data_entry *tbl_data =
2313 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2317 cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2319 tbl_data->jump.action =
2320 mlx5_glue->dr_create_flow_action_dest_flow_tbl
2322 if (!tbl_data->jump.action)
2323 return rte_flow_error_set(error, ENOMEM,
2324 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2325 NULL, "cannot create jump action");
2326 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2327 (void *)&tbl_data->jump, cnt);
2329 assert(tbl_data->jump.action);
2330 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2331 (void *)&tbl_data->jump, cnt);
2333 rte_atomic32_inc(&tbl_data->jump.refcnt);
2334 dev_flow->dv.jump = &tbl_data->jump;
2339 * Find existing table port ID resource or create and register a new one.
2341 * @param[in, out] dev
2342 * Pointer to rte_eth_dev structure.
2343 * @param[in, out] resource
2344 * Pointer to port ID action resource.
2345 * @parm[in, out] dev_flow
2346 * Pointer to the dev_flow.
2348 * pointer to error structure.
2351 * 0 on success otherwise -errno and errno is set.
2354 flow_dv_port_id_action_resource_register
2355 (struct rte_eth_dev *dev,
2356 struct mlx5_flow_dv_port_id_action_resource *resource,
2357 struct mlx5_flow *dev_flow,
2358 struct rte_flow_error *error)
2360 struct mlx5_priv *priv = dev->data->dev_private;
2361 struct mlx5_ibv_shared *sh = priv->sh;
2362 struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2364 /* Lookup a matching resource from cache. */
2365 LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2366 if (resource->port_id == cache_resource->port_id) {
2367 DRV_LOG(DEBUG, "port id action resource resource %p: "
2369 (void *)cache_resource,
2370 rte_atomic32_read(&cache_resource->refcnt));
2371 rte_atomic32_inc(&cache_resource->refcnt);
2372 dev_flow->dv.port_id_action = cache_resource;
2376 /* Register new port id action resource. */
2377 cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2378 if (!cache_resource)
2379 return rte_flow_error_set(error, ENOMEM,
2380 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2381 "cannot allocate resource memory");
2382 *cache_resource = *resource;
2383 cache_resource->action =
2384 mlx5_glue->dr_create_flow_action_dest_vport
2385 (priv->sh->fdb_domain, resource->port_id);
2386 if (!cache_resource->action) {
2387 rte_free(cache_resource);
2388 return rte_flow_error_set(error, ENOMEM,
2389 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2390 NULL, "cannot create action");
2392 rte_atomic32_init(&cache_resource->refcnt);
2393 rte_atomic32_inc(&cache_resource->refcnt);
2394 LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2395 dev_flow->dv.port_id_action = cache_resource;
2396 DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2397 (void *)cache_resource,
2398 rte_atomic32_read(&cache_resource->refcnt));
2403 * Find existing push vlan resource or create and register a new one.
2405 * @param [in, out] dev
2406 * Pointer to rte_eth_dev structure.
2407 * @param[in, out] resource
2408 * Pointer to port ID action resource.
2409 * @parm[in, out] dev_flow
2410 * Pointer to the dev_flow.
2412 * pointer to error structure.
2415 * 0 on success otherwise -errno and errno is set.
2418 flow_dv_push_vlan_action_resource_register
2419 (struct rte_eth_dev *dev,
2420 struct mlx5_flow_dv_push_vlan_action_resource *resource,
2421 struct mlx5_flow *dev_flow,
2422 struct rte_flow_error *error)
2424 struct mlx5_priv *priv = dev->data->dev_private;
2425 struct mlx5_ibv_shared *sh = priv->sh;
2426 struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2427 struct mlx5dv_dr_domain *domain;
2429 /* Lookup a matching resource from cache. */
2430 LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2431 if (resource->vlan_tag == cache_resource->vlan_tag &&
2432 resource->ft_type == cache_resource->ft_type) {
2433 DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2435 (void *)cache_resource,
2436 rte_atomic32_read(&cache_resource->refcnt));
2437 rte_atomic32_inc(&cache_resource->refcnt);
2438 dev_flow->dv.push_vlan_res = cache_resource;
2442 /* Register new push_vlan action resource. */
2443 cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2444 if (!cache_resource)
2445 return rte_flow_error_set(error, ENOMEM,
2446 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2447 "cannot allocate resource memory");
2448 *cache_resource = *resource;
2449 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2450 domain = sh->fdb_domain;
2451 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2452 domain = sh->rx_domain;
2454 domain = sh->tx_domain;
2455 cache_resource->action =
2456 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2457 resource->vlan_tag);
2458 if (!cache_resource->action) {
2459 rte_free(cache_resource);
2460 return rte_flow_error_set(error, ENOMEM,
2461 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2462 NULL, "cannot create action");
2464 rte_atomic32_init(&cache_resource->refcnt);
2465 rte_atomic32_inc(&cache_resource->refcnt);
2466 LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2467 dev_flow->dv.push_vlan_res = cache_resource;
2468 DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2469 (void *)cache_resource,
2470 rte_atomic32_read(&cache_resource->refcnt));
2474 * Get the size of specific rte_flow_item_type
2476 * @param[in] item_type
2477 * Tested rte_flow_item_type.
2480 * sizeof struct item_type, 0 if void or irrelevant.
2483 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2487 switch (item_type) {
2488 case RTE_FLOW_ITEM_TYPE_ETH:
2489 retval = sizeof(struct rte_flow_item_eth);
2491 case RTE_FLOW_ITEM_TYPE_VLAN:
2492 retval = sizeof(struct rte_flow_item_vlan);
2494 case RTE_FLOW_ITEM_TYPE_IPV4:
2495 retval = sizeof(struct rte_flow_item_ipv4);
2497 case RTE_FLOW_ITEM_TYPE_IPV6:
2498 retval = sizeof(struct rte_flow_item_ipv6);
2500 case RTE_FLOW_ITEM_TYPE_UDP:
2501 retval = sizeof(struct rte_flow_item_udp);
2503 case RTE_FLOW_ITEM_TYPE_TCP:
2504 retval = sizeof(struct rte_flow_item_tcp);
2506 case RTE_FLOW_ITEM_TYPE_VXLAN:
2507 retval = sizeof(struct rte_flow_item_vxlan);
2509 case RTE_FLOW_ITEM_TYPE_GRE:
2510 retval = sizeof(struct rte_flow_item_gre);
2512 case RTE_FLOW_ITEM_TYPE_NVGRE:
2513 retval = sizeof(struct rte_flow_item_nvgre);
2515 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2516 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2518 case RTE_FLOW_ITEM_TYPE_MPLS:
2519 retval = sizeof(struct rte_flow_item_mpls);
2521 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2529 #define MLX5_ENCAP_IPV4_VERSION 0x40
2530 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
2531 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
2532 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
2533 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
2534 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
2535 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
2538 * Convert the encap action data from list of rte_flow_item to raw buffer
2541 * Pointer to rte_flow_item objects list.
2543 * Pointer to the output buffer.
2545 * Pointer to the output buffer size.
2547 * Pointer to the error structure.
2550 * 0 on success, a negative errno value otherwise and rte_errno is set.
2553 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2554 size_t *size, struct rte_flow_error *error)
2556 struct rte_ether_hdr *eth = NULL;
2557 struct rte_vlan_hdr *vlan = NULL;
2558 struct rte_ipv4_hdr *ipv4 = NULL;
2559 struct rte_ipv6_hdr *ipv6 = NULL;
2560 struct rte_udp_hdr *udp = NULL;
2561 struct rte_vxlan_hdr *vxlan = NULL;
2562 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2563 struct rte_gre_hdr *gre = NULL;
2565 size_t temp_size = 0;
2568 return rte_flow_error_set(error, EINVAL,
2569 RTE_FLOW_ERROR_TYPE_ACTION,
2570 NULL, "invalid empty data");
2571 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2572 len = flow_dv_get_item_len(items->type);
2573 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2574 return rte_flow_error_set(error, EINVAL,
2575 RTE_FLOW_ERROR_TYPE_ACTION,
2576 (void *)items->type,
2577 "items total size is too big"
2578 " for encap action");
2579 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2580 switch (items->type) {
2581 case RTE_FLOW_ITEM_TYPE_ETH:
2582 eth = (struct rte_ether_hdr *)&buf[temp_size];
2584 case RTE_FLOW_ITEM_TYPE_VLAN:
2585 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2587 return rte_flow_error_set(error, EINVAL,
2588 RTE_FLOW_ERROR_TYPE_ACTION,
2589 (void *)items->type,
2590 "eth header not found");
2591 if (!eth->ether_type)
2592 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2594 case RTE_FLOW_ITEM_TYPE_IPV4:
2595 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2597 return rte_flow_error_set(error, EINVAL,
2598 RTE_FLOW_ERROR_TYPE_ACTION,
2599 (void *)items->type,
2600 "neither eth nor vlan"
2602 if (vlan && !vlan->eth_proto)
2603 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2604 else if (eth && !eth->ether_type)
2605 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2606 if (!ipv4->version_ihl)
2607 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2608 MLX5_ENCAP_IPV4_IHL_MIN;
2609 if (!ipv4->time_to_live)
2610 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2612 case RTE_FLOW_ITEM_TYPE_IPV6:
2613 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2615 return rte_flow_error_set(error, EINVAL,
2616 RTE_FLOW_ERROR_TYPE_ACTION,
2617 (void *)items->type,
2618 "neither eth nor vlan"
2620 if (vlan && !vlan->eth_proto)
2621 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2622 else if (eth && !eth->ether_type)
2623 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2624 if (!ipv6->vtc_flow)
2626 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2627 if (!ipv6->hop_limits)
2628 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2630 case RTE_FLOW_ITEM_TYPE_UDP:
2631 udp = (struct rte_udp_hdr *)&buf[temp_size];
2633 return rte_flow_error_set(error, EINVAL,
2634 RTE_FLOW_ERROR_TYPE_ACTION,
2635 (void *)items->type,
2636 "ip header not found");
2637 if (ipv4 && !ipv4->next_proto_id)
2638 ipv4->next_proto_id = IPPROTO_UDP;
2639 else if (ipv6 && !ipv6->proto)
2640 ipv6->proto = IPPROTO_UDP;
2642 case RTE_FLOW_ITEM_TYPE_VXLAN:
2643 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2645 return rte_flow_error_set(error, EINVAL,
2646 RTE_FLOW_ERROR_TYPE_ACTION,
2647 (void *)items->type,
2648 "udp header not found");
2650 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2651 if (!vxlan->vx_flags)
2653 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2655 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2656 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2658 return rte_flow_error_set(error, EINVAL,
2659 RTE_FLOW_ERROR_TYPE_ACTION,
2660 (void *)items->type,
2661 "udp header not found");
2662 if (!vxlan_gpe->proto)
2663 return rte_flow_error_set(error, EINVAL,
2664 RTE_FLOW_ERROR_TYPE_ACTION,
2665 (void *)items->type,
2666 "next protocol not found");
2669 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2670 if (!vxlan_gpe->vx_flags)
2671 vxlan_gpe->vx_flags =
2672 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2674 case RTE_FLOW_ITEM_TYPE_GRE:
2675 case RTE_FLOW_ITEM_TYPE_NVGRE:
2676 gre = (struct rte_gre_hdr *)&buf[temp_size];
2678 return rte_flow_error_set(error, EINVAL,
2679 RTE_FLOW_ERROR_TYPE_ACTION,
2680 (void *)items->type,
2681 "next protocol not found");
2683 return rte_flow_error_set(error, EINVAL,
2684 RTE_FLOW_ERROR_TYPE_ACTION,
2685 (void *)items->type,
2686 "ip header not found");
2687 if (ipv4 && !ipv4->next_proto_id)
2688 ipv4->next_proto_id = IPPROTO_GRE;
2689 else if (ipv6 && !ipv6->proto)
2690 ipv6->proto = IPPROTO_GRE;
2692 case RTE_FLOW_ITEM_TYPE_VOID:
2695 return rte_flow_error_set(error, EINVAL,
2696 RTE_FLOW_ERROR_TYPE_ACTION,
2697 (void *)items->type,
2698 "unsupported item type");
2708 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2710 struct rte_ether_hdr *eth = NULL;
2711 struct rte_vlan_hdr *vlan = NULL;
2712 struct rte_ipv6_hdr *ipv6 = NULL;
2713 struct rte_udp_hdr *udp = NULL;
2717 eth = (struct rte_ether_hdr *)data;
2718 next_hdr = (char *)(eth + 1);
2719 proto = RTE_BE16(eth->ether_type);
2722 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2723 vlan = (struct rte_vlan_hdr *)next_hdr;
2724 proto = RTE_BE16(vlan->eth_proto);
2725 next_hdr += sizeof(struct rte_vlan_hdr);
2728 /* HW calculates IPv4 csum. no need to proceed */
2729 if (proto == RTE_ETHER_TYPE_IPV4)
2732 /* non IPv4/IPv6 header. not supported */
2733 if (proto != RTE_ETHER_TYPE_IPV6) {
2734 return rte_flow_error_set(error, ENOTSUP,
2735 RTE_FLOW_ERROR_TYPE_ACTION,
2736 NULL, "Cannot offload non IPv4/IPv6");
2739 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2741 /* ignore non UDP */
2742 if (ipv6->proto != IPPROTO_UDP)
2745 udp = (struct rte_udp_hdr *)(ipv6 + 1);
2746 udp->dgram_cksum = 0;
2752 * Convert L2 encap action to DV specification.
2755 * Pointer to rte_eth_dev structure.
2757 * Pointer to action structure.
2758 * @param[in, out] dev_flow
2759 * Pointer to the mlx5_flow.
2760 * @param[in] transfer
2761 * Mark if the flow is E-Switch flow.
2763 * Pointer to the error structure.
2766 * 0 on success, a negative errno value otherwise and rte_errno is set.
2769 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2770 const struct rte_flow_action *action,
2771 struct mlx5_flow *dev_flow,
2773 struct rte_flow_error *error)
2775 const struct rte_flow_item *encap_data;
2776 const struct rte_flow_action_raw_encap *raw_encap_data;
2777 struct mlx5_flow_dv_encap_decap_resource res = {
2779 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2780 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2781 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2784 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2786 (const struct rte_flow_action_raw_encap *)action->conf;
2787 res.size = raw_encap_data->size;
2788 memcpy(res.buf, raw_encap_data->data, res.size);
2789 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2792 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2794 ((const struct rte_flow_action_vxlan_encap *)
2795 action->conf)->definition;
2798 ((const struct rte_flow_action_nvgre_encap *)
2799 action->conf)->definition;
2800 if (flow_dv_convert_encap_data(encap_data, res.buf,
2804 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2805 return rte_flow_error_set(error, EINVAL,
2806 RTE_FLOW_ERROR_TYPE_ACTION,
2807 NULL, "can't create L2 encap action");
2812 * Convert L2 decap action to DV specification.
2815 * Pointer to rte_eth_dev structure.
2816 * @param[in, out] dev_flow
2817 * Pointer to the mlx5_flow.
2818 * @param[in] transfer
2819 * Mark if the flow is E-Switch flow.
2821 * Pointer to the error structure.
2824 * 0 on success, a negative errno value otherwise and rte_errno is set.
2827 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2828 struct mlx5_flow *dev_flow,
2830 struct rte_flow_error *error)
2832 struct mlx5_flow_dv_encap_decap_resource res = {
2835 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2836 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2837 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2840 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2841 return rte_flow_error_set(error, EINVAL,
2842 RTE_FLOW_ERROR_TYPE_ACTION,
2843 NULL, "can't create L2 decap action");
2848 * Convert raw decap/encap (L3 tunnel) action to DV specification.
2851 * Pointer to rte_eth_dev structure.
2853 * Pointer to action structure.
2854 * @param[in, out] dev_flow
2855 * Pointer to the mlx5_flow.
2857 * Pointer to the flow attributes.
2859 * Pointer to the error structure.
2862 * 0 on success, a negative errno value otherwise and rte_errno is set.
2865 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2866 const struct rte_flow_action *action,
2867 struct mlx5_flow *dev_flow,
2868 const struct rte_flow_attr *attr,
2869 struct rte_flow_error *error)
2871 const struct rte_flow_action_raw_encap *encap_data;
2872 struct mlx5_flow_dv_encap_decap_resource res;
2874 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2875 res.size = encap_data->size;
2876 memcpy(res.buf, encap_data->data, res.size);
2877 res.reformat_type = attr->egress ?
2878 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
2879 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
2881 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2883 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2884 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2885 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2886 return rte_flow_error_set(error, EINVAL,
2887 RTE_FLOW_ERROR_TYPE_ACTION,
2888 NULL, "can't create encap action");
2893 * Create action push VLAN.
2896 * Pointer to rte_eth_dev structure.
2897 * @param[in] vlan_tag
2898 * the vlan tag to push to the Ethernet header.
2899 * @param[in, out] dev_flow
2900 * Pointer to the mlx5_flow.
2902 * Pointer to the flow attributes.
2904 * Pointer to the error structure.
2907 * 0 on success, a negative errno value otherwise and rte_errno is set.
2910 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
2911 const struct rte_flow_attr *attr,
2912 const struct rte_vlan_hdr *vlan,
2913 struct mlx5_flow *dev_flow,
2914 struct rte_flow_error *error)
2916 struct mlx5_flow_dv_push_vlan_action_resource res;
2919 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
2922 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2924 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2925 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2926 return flow_dv_push_vlan_action_resource_register
2927 (dev, &res, dev_flow, error);
2931 * Validate the modify-header actions.
2933 * @param[in] action_flags
2934 * Holds the actions detected until now.
2936 * Pointer to the modify action.
2938 * Pointer to error structure.
2941 * 0 on success, a negative errno value otherwise and rte_errno is set.
2944 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
2945 const struct rte_flow_action *action,
2946 struct rte_flow_error *error)
2948 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
2949 return rte_flow_error_set(error, EINVAL,
2950 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2951 NULL, "action configuration not set");
2952 if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2953 return rte_flow_error_set(error, EINVAL,
2954 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2955 "can't have encap action before"
2961 * Validate the modify-header MAC address actions.
2963 * @param[in] action_flags
2964 * Holds the actions detected until now.
2966 * Pointer to the modify action.
2967 * @param[in] item_flags
2968 * Holds the items detected.
2970 * Pointer to error structure.
2973 * 0 on success, a negative errno value otherwise and rte_errno is set.
2976 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2977 const struct rte_flow_action *action,
2978 const uint64_t item_flags,
2979 struct rte_flow_error *error)
2983 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2985 if (!(item_flags & MLX5_FLOW_LAYER_L2))
2986 return rte_flow_error_set(error, EINVAL,
2987 RTE_FLOW_ERROR_TYPE_ACTION,
2989 "no L2 item in pattern");
2995 * Validate the modify-header IPv4 address actions.
2997 * @param[in] action_flags
2998 * Holds the actions detected until now.
3000 * Pointer to the modify action.
3001 * @param[in] item_flags
3002 * Holds the items detected.
3004 * Pointer to error structure.
3007 * 0 on success, a negative errno value otherwise and rte_errno is set.
3010 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3011 const struct rte_flow_action *action,
3012 const uint64_t item_flags,
3013 struct rte_flow_error *error)
3017 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3019 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3020 return rte_flow_error_set(error, EINVAL,
3021 RTE_FLOW_ERROR_TYPE_ACTION,
3023 "no ipv4 item in pattern");
3029 * Validate the modify-header IPv6 address actions.
3031 * @param[in] action_flags
3032 * Holds the actions detected until now.
3034 * Pointer to the modify action.
3035 * @param[in] item_flags
3036 * Holds the items detected.
3038 * Pointer to error structure.
3041 * 0 on success, a negative errno value otherwise and rte_errno is set.
3044 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3045 const struct rte_flow_action *action,
3046 const uint64_t item_flags,
3047 struct rte_flow_error *error)
3051 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3053 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3054 return rte_flow_error_set(error, EINVAL,
3055 RTE_FLOW_ERROR_TYPE_ACTION,
3057 "no ipv6 item in pattern");
3063 * Validate the modify-header TP actions.
3065 * @param[in] action_flags
3066 * Holds the actions detected until now.
3068 * Pointer to the modify action.
3069 * @param[in] item_flags
3070 * Holds the items detected.
3072 * Pointer to error structure.
3075 * 0 on success, a negative errno value otherwise and rte_errno is set.
3078 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3079 const struct rte_flow_action *action,
3080 const uint64_t item_flags,
3081 struct rte_flow_error *error)
3085 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3087 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3088 return rte_flow_error_set(error, EINVAL,
3089 RTE_FLOW_ERROR_TYPE_ACTION,
3090 NULL, "no transport layer "
3097 * Validate the modify-header actions of increment/decrement
3098 * TCP Sequence-number.
3100 * @param[in] action_flags
3101 * Holds the actions detected until now.
3103 * Pointer to the modify action.
3104 * @param[in] item_flags
3105 * Holds the items detected.
3107 * Pointer to error structure.
3110 * 0 on success, a negative errno value otherwise and rte_errno is set.
3113 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3114 const struct rte_flow_action *action,
3115 const uint64_t item_flags,
3116 struct rte_flow_error *error)
3120 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3122 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3123 return rte_flow_error_set(error, EINVAL,
3124 RTE_FLOW_ERROR_TYPE_ACTION,
3125 NULL, "no TCP item in"
3127 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3128 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3129 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3130 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3131 return rte_flow_error_set(error, EINVAL,
3132 RTE_FLOW_ERROR_TYPE_ACTION,
3134 "cannot decrease and increase"
3135 " TCP sequence number"
3136 " at the same time");
3142 * Validate the modify-header actions of increment/decrement
3143 * TCP Acknowledgment number.
3145 * @param[in] action_flags
3146 * Holds the actions detected until now.
3148 * Pointer to the modify action.
3149 * @param[in] item_flags
3150 * Holds the items detected.
3152 * Pointer to error structure.
3155 * 0 on success, a negative errno value otherwise and rte_errno is set.
3158 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3159 const struct rte_flow_action *action,
3160 const uint64_t item_flags,
3161 struct rte_flow_error *error)
3165 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3167 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3168 return rte_flow_error_set(error, EINVAL,
3169 RTE_FLOW_ERROR_TYPE_ACTION,
3170 NULL, "no TCP item in"
3172 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3173 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3174 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3175 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3176 return rte_flow_error_set(error, EINVAL,
3177 RTE_FLOW_ERROR_TYPE_ACTION,
3179 "cannot decrease and increase"
3180 " TCP acknowledgment number"
3181 " at the same time");
3187 * Validate the modify-header TTL actions.
3189 * @param[in] action_flags
3190 * Holds the actions detected until now.
3192 * Pointer to the modify action.
3193 * @param[in] item_flags
3194 * Holds the items detected.
3196 * Pointer to error structure.
3199 * 0 on success, a negative errno value otherwise and rte_errno is set.
3202 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3203 const struct rte_flow_action *action,
3204 const uint64_t item_flags,
3205 struct rte_flow_error *error)
3209 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3211 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3212 return rte_flow_error_set(error, EINVAL,
3213 RTE_FLOW_ERROR_TYPE_ACTION,
3215 "no IP protocol in pattern");
3221 * Validate jump action.
3224 * Pointer to the jump action.
3225 * @param[in] action_flags
3226 * Holds the actions detected until now.
3227 * @param[in] attributes
3228 * Pointer to flow attributes
3229 * @param[in] external
3230 * Action belongs to flow rule created by request external to PMD.
3232 * Pointer to error structure.
3235 * 0 on success, a negative errno value otherwise and rte_errno is set.
3238 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3239 uint64_t action_flags,
3240 const struct rte_flow_attr *attributes,
3241 bool external, struct rte_flow_error *error)
3243 uint32_t target_group, table;
3246 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3247 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3248 return rte_flow_error_set(error, EINVAL,
3249 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3250 "can't have 2 fate actions in"
3252 if (action_flags & MLX5_FLOW_ACTION_METER)
3253 return rte_flow_error_set(error, ENOTSUP,
3254 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3255 "jump with meter not support");
3257 return rte_flow_error_set(error, EINVAL,
3258 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3259 NULL, "action configuration not set");
3261 ((const struct rte_flow_action_jump *)action->conf)->group;
3262 ret = mlx5_flow_group_to_table(attributes, external, target_group,
3266 if (attributes->group == target_group)
3267 return rte_flow_error_set(error, EINVAL,
3268 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3269 "target group must be other than"
3270 " the current flow group");
3275 * Validate the port_id action.
3278 * Pointer to rte_eth_dev structure.
3279 * @param[in] action_flags
3280 * Bit-fields that holds the actions detected until now.
3282 * Port_id RTE action structure.
3284 * Attributes of flow that includes this action.
3286 * Pointer to error structure.
3289 * 0 on success, a negative errno value otherwise and rte_errno is set.
3292 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3293 uint64_t action_flags,
3294 const struct rte_flow_action *action,
3295 const struct rte_flow_attr *attr,
3296 struct rte_flow_error *error)
3298 const struct rte_flow_action_port_id *port_id;
3299 struct mlx5_priv *act_priv;
3300 struct mlx5_priv *dev_priv;
3303 if (!attr->transfer)
3304 return rte_flow_error_set(error, ENOTSUP,
3305 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3307 "port id action is valid in transfer"
3309 if (!action || !action->conf)
3310 return rte_flow_error_set(error, ENOTSUP,
3311 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3313 "port id action parameters must be"
3315 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3316 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3317 return rte_flow_error_set(error, EINVAL,
3318 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3319 "can have only one fate actions in"
3321 dev_priv = mlx5_dev_to_eswitch_info(dev);
3323 return rte_flow_error_set(error, rte_errno,
3324 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3326 "failed to obtain E-Switch info");
3327 port_id = action->conf;
3328 port = port_id->original ? dev->data->port_id : port_id->id;
3329 act_priv = mlx5_port_to_eswitch_info(port, false);
3331 return rte_flow_error_set
3333 RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3334 "failed to obtain E-Switch port id for port");
3335 if (act_priv->domain_id != dev_priv->domain_id)
3336 return rte_flow_error_set
3338 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3339 "port does not belong to"
3340 " E-Switch being configured");
3345 * Get the maximum number of modify header actions.
3348 * Pointer to rte_eth_dev structure.
3351 * Max number of modify header actions device can support.
3354 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev)
3357 * There's no way to directly query the max cap. Although it has to be
3358 * acquried by iterative trial, it is a safe assumption that more
3359 * actions are supported by FW if extensive metadata register is
3362 return mlx5_flow_ext_mreg_supported(dev) ? MLX5_MODIFY_NUM :
3363 MLX5_MODIFY_NUM_NO_MREG;
3367 * Validate the meter action.
3370 * Pointer to rte_eth_dev structure.
3371 * @param[in] action_flags
3372 * Bit-fields that holds the actions detected until now.
3374 * Pointer to the meter action.
3376 * Attributes of flow that includes this action.
3378 * Pointer to error structure.
3381 * 0 on success, a negative errno value otherwise and rte_ernno is set.
3384 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3385 uint64_t action_flags,
3386 const struct rte_flow_action *action,
3387 const struct rte_flow_attr *attr,
3388 struct rte_flow_error *error)
3390 struct mlx5_priv *priv = dev->data->dev_private;
3391 const struct rte_flow_action_meter *am = action->conf;
3392 struct mlx5_flow_meter *fm = mlx5_flow_meter_find(priv, am->mtr_id);
3394 if (action_flags & MLX5_FLOW_ACTION_METER)
3395 return rte_flow_error_set(error, ENOTSUP,
3396 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3397 "meter chaining not support");
3398 if (action_flags & MLX5_FLOW_ACTION_JUMP)
3399 return rte_flow_error_set(error, ENOTSUP,
3400 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3401 "meter with jump not support");
3403 return rte_flow_error_set(error, ENOTSUP,
3404 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3406 "meter action not supported");
3408 return rte_flow_error_set(error, EINVAL,
3409 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3411 if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3412 (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3413 (!fm->attr.egress && !attr->egress && attr->ingress))))
3414 return rte_flow_error_set(error, EINVAL,
3415 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3416 "Flow attributes are either invalid "
3417 "or have a conflict with current "
3418 "meter attributes");
3423 * Find existing modify-header resource or create and register a new one.
3425 * @param dev[in, out]
3426 * Pointer to rte_eth_dev structure.
3427 * @param[in, out] resource
3428 * Pointer to modify-header resource.
3429 * @parm[in, out] dev_flow
3430 * Pointer to the dev_flow.
3432 * pointer to error structure.
3435 * 0 on success otherwise -errno and errno is set.
3438 flow_dv_modify_hdr_resource_register
3439 (struct rte_eth_dev *dev,
3440 struct mlx5_flow_dv_modify_hdr_resource *resource,
3441 struct mlx5_flow *dev_flow,
3442 struct rte_flow_error *error)
3444 struct mlx5_priv *priv = dev->data->dev_private;
3445 struct mlx5_ibv_shared *sh = priv->sh;
3446 struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3447 struct mlx5dv_dr_domain *ns;
3449 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev))
3450 return rte_flow_error_set(error, EOVERFLOW,
3451 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3452 "too many modify header items");
3453 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3454 ns = sh->fdb_domain;
3455 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3460 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3461 /* Lookup a matching resource from cache. */
3462 LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3463 if (resource->ft_type == cache_resource->ft_type &&
3464 resource->actions_num == cache_resource->actions_num &&
3465 resource->flags == cache_resource->flags &&
3466 !memcmp((const void *)resource->actions,
3467 (const void *)cache_resource->actions,
3468 (resource->actions_num *
3469 sizeof(resource->actions[0])))) {
3470 DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3471 (void *)cache_resource,
3472 rte_atomic32_read(&cache_resource->refcnt));
3473 rte_atomic32_inc(&cache_resource->refcnt);
3474 dev_flow->dv.modify_hdr = cache_resource;
3478 /* Register new modify-header resource. */
3479 cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
3480 if (!cache_resource)
3481 return rte_flow_error_set(error, ENOMEM,
3482 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3483 "cannot allocate resource memory");
3484 *cache_resource = *resource;
3485 cache_resource->verbs_action =
3486 mlx5_glue->dv_create_flow_action_modify_header
3487 (sh->ctx, cache_resource->ft_type,
3488 ns, cache_resource->flags,
3489 cache_resource->actions_num *
3490 sizeof(cache_resource->actions[0]),
3491 (uint64_t *)cache_resource->actions);
3492 if (!cache_resource->verbs_action) {
3493 rte_free(cache_resource);
3494 return rte_flow_error_set(error, ENOMEM,
3495 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3496 NULL, "cannot create action");
3498 rte_atomic32_init(&cache_resource->refcnt);
3499 rte_atomic32_inc(&cache_resource->refcnt);
3500 LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3501 dev_flow->dv.modify_hdr = cache_resource;
3502 DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3503 (void *)cache_resource,
3504 rte_atomic32_read(&cache_resource->refcnt));
3508 #define MLX5_CNT_CONTAINER_RESIZE 64
3511 * Get or create a flow counter.
3514 * Pointer to the Ethernet device structure.
3516 * Indicate if this counter is shared with other flows.
3518 * Counter identifier.
3521 * pointer to flow counter on success, NULL otherwise and rte_errno is set.
3523 static struct mlx5_flow_counter *
3524 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3527 struct mlx5_priv *priv = dev->data->dev_private;
3528 struct mlx5_flow_counter *cnt = NULL;
3529 struct mlx5_devx_obj *dcs = NULL;
3531 if (!priv->config.devx) {
3532 rte_errno = ENOTSUP;
3536 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3537 if (cnt->shared && cnt->id == id) {
3543 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3546 cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3548 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3552 struct mlx5_flow_counter tmpl = {
3558 tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3560 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3566 TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3571 * Release a flow counter.
3574 * Pointer to the Ethernet device structure.
3575 * @param[in] counter
3576 * Pointer to the counter handler.
3579 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3580 struct mlx5_flow_counter *counter)
3582 struct mlx5_priv *priv = dev->data->dev_private;
3586 if (--counter->ref_cnt == 0) {
3587 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3588 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3594 * Query a devx flow counter.
3597 * Pointer to the Ethernet device structure.
3599 * Pointer to the flow counter.
3601 * The statistics value of packets.
3603 * The statistics value of bytes.
3606 * 0 on success, otherwise a negative errno value and rte_errno is set.
3609 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3610 struct mlx5_flow_counter *cnt, uint64_t *pkts,
3613 return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3618 * Get a pool by a counter.
3621 * Pointer to the counter.
3626 static struct mlx5_flow_counter_pool *
3627 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3630 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3631 return (struct mlx5_flow_counter_pool *)cnt - 1;
3637 * Get a pool by devx counter ID.
3640 * Pointer to the counter container.
3642 * The counter devx ID.
3645 * The counter pool pointer if exists, NULL otherwise,
3647 static struct mlx5_flow_counter_pool *
3648 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3650 struct mlx5_flow_counter_pool *pool;
3652 TAILQ_FOREACH(pool, &cont->pool_list, next) {
3653 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3654 MLX5_COUNTERS_PER_POOL;
3656 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3663 * Allocate a new memory for the counter values wrapped by all the needed
3667 * Pointer to the Ethernet device structure.
3669 * The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3672 * The new memory management pointer on success, otherwise NULL and rte_errno
3675 static struct mlx5_counter_stats_mem_mng *
3676 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3678 struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3679 (dev->data->dev_private))->sh;
3680 struct mlx5_devx_mkey_attr mkey_attr;
3681 struct mlx5_counter_stats_mem_mng *mem_mng;
3682 volatile struct flow_counter_stats *raw_data;
3683 int size = (sizeof(struct flow_counter_stats) *
3684 MLX5_COUNTERS_PER_POOL +
3685 sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3686 sizeof(struct mlx5_counter_stats_mem_mng);
3687 uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3694 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3695 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3696 mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3697 IBV_ACCESS_LOCAL_WRITE);
3698 if (!mem_mng->umem) {
3703 mkey_attr.addr = (uintptr_t)mem;
3704 mkey_attr.size = size;
3705 mkey_attr.umem_id = mem_mng->umem->umem_id;
3706 mkey_attr.pd = sh->pdn;
3707 mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3709 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3714 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3715 raw_data = (volatile struct flow_counter_stats *)mem;
3716 for (i = 0; i < raws_n; ++i) {
3717 mem_mng->raws[i].mem_mng = mem_mng;
3718 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3720 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3725 * Resize a counter container.
3728 * Pointer to the Ethernet device structure.
3730 * Whether the pool is for counter that was allocated by batch command.
3733 * The new container pointer on success, otherwise NULL and rte_errno is set.
3735 static struct mlx5_pools_container *
3736 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3738 struct mlx5_priv *priv = dev->data->dev_private;
3739 struct mlx5_pools_container *cont =
3740 MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3741 struct mlx5_pools_container *new_cont =
3742 MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3743 struct mlx5_counter_stats_mem_mng *mem_mng;
3744 uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3745 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3748 if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3749 /* The last resize still hasn't detected by the host thread. */
3753 new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3754 if (!new_cont->pools) {
3759 memcpy(new_cont->pools, cont->pools, cont->n *
3760 sizeof(struct mlx5_flow_counter_pool *));
3761 mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3762 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3764 rte_free(new_cont->pools);
3767 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3768 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3769 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3771 new_cont->n = resize;
3772 rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3773 TAILQ_INIT(&new_cont->pool_list);
3774 TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3775 new_cont->init_mem_mng = mem_mng;
3777 /* Flip the master container. */
3778 priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3783 * Query a devx flow counter.
3786 * Pointer to the Ethernet device structure.
3788 * Pointer to the flow counter.
3790 * The statistics value of packets.
3792 * The statistics value of bytes.
3795 * 0 on success, otherwise a negative errno value and rte_errno is set.
3798 _flow_dv_query_count(struct rte_eth_dev *dev,
3799 struct mlx5_flow_counter *cnt, uint64_t *pkts,
3802 struct mlx5_priv *priv = dev->data->dev_private;
3803 struct mlx5_flow_counter_pool *pool =
3804 flow_dv_counter_pool_get(cnt);
3805 int offset = cnt - &pool->counters_raw[0];
3807 if (priv->counter_fallback)
3808 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3810 rte_spinlock_lock(&pool->sl);
3812 * The single counters allocation may allocate smaller ID than the
3813 * current allocated in parallel to the host reading.
3814 * In this case the new counter values must be reported as 0.
3816 if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3820 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
3821 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
3823 rte_spinlock_unlock(&pool->sl);
3828 * Create and initialize a new counter pool.
3831 * Pointer to the Ethernet device structure.
3833 * The devX counter handle.
3835 * Whether the pool is for counter that was allocated by batch command.
3838 * A new pool pointer on success, NULL otherwise and rte_errno is set.
3840 static struct mlx5_flow_counter_pool *
3841 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
3844 struct mlx5_priv *priv = dev->data->dev_private;
3845 struct mlx5_flow_counter_pool *pool;
3846 struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3848 int16_t n_valid = rte_atomic16_read(&cont->n_valid);
3851 if (cont->n == n_valid) {
3852 cont = flow_dv_container_resize(dev, batch);
3856 size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
3857 sizeof(struct mlx5_flow_counter);
3858 pool = rte_calloc(__func__, 1, size, 0);
3863 pool->min_dcs = dcs;
3864 pool->raw = cont->init_mem_mng->raws + n_valid %
3865 MLX5_CNT_CONTAINER_RESIZE;
3866 pool->raw_hw = NULL;
3867 rte_spinlock_init(&pool->sl);
3869 * The generation of the new allocated counters in this pool is 0, 2 in
3870 * the pool generation makes all the counters valid for allocation.
3872 rte_atomic64_set(&pool->query_gen, 0x2);
3873 TAILQ_INIT(&pool->counters);
3874 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3875 cont->pools[n_valid] = pool;
3876 /* Pool initialization must be updated before host thread access. */
3878 rte_atomic16_add(&cont->n_valid, 1);
3883 * Prepare a new counter and/or a new counter pool.
3886 * Pointer to the Ethernet device structure.
3887 * @param[out] cnt_free
3888 * Where to put the pointer of a new counter.
3890 * Whether the pool is for counter that was allocated by batch command.
3893 * The free counter pool pointer and @p cnt_free is set on success,
3894 * NULL otherwise and rte_errno is set.
3896 static struct mlx5_flow_counter_pool *
3897 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
3898 struct mlx5_flow_counter **cnt_free,
3901 struct mlx5_priv *priv = dev->data->dev_private;
3902 struct mlx5_flow_counter_pool *pool;
3903 struct mlx5_devx_obj *dcs = NULL;
3904 struct mlx5_flow_counter *cnt;
3908 /* bulk_bitmap must be 0 for single counter allocation. */
3909 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3912 pool = flow_dv_find_pool_by_id
3913 (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
3915 pool = flow_dv_pool_create(dev, dcs, batch);
3917 mlx5_devx_cmd_destroy(dcs);
3920 } else if (dcs->id < pool->min_dcs->id) {
3921 rte_atomic64_set(&pool->a64_dcs,
3922 (int64_t)(uintptr_t)dcs);
3924 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
3925 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3930 /* bulk_bitmap is in 128 counters units. */
3931 if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
3932 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
3934 rte_errno = ENODATA;
3937 pool = flow_dv_pool_create(dev, dcs, batch);
3939 mlx5_devx_cmd_destroy(dcs);
3942 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3943 cnt = &pool->counters_raw[i];
3945 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3947 *cnt_free = &pool->counters_raw[0];
3952 * Search for existed shared counter.
3955 * Pointer to the relevant counter pool container.
3957 * The shared counter ID to search.
3960 * NULL if not existed, otherwise pointer to the shared counter.
3962 static struct mlx5_flow_counter *
3963 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
3966 static struct mlx5_flow_counter *cnt;
3967 struct mlx5_flow_counter_pool *pool;
3970 TAILQ_FOREACH(pool, &cont->pool_list, next) {
3971 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3972 cnt = &pool->counters_raw[i];
3973 if (cnt->ref_cnt && cnt->shared && cnt->id == id)
3981 * Allocate a flow counter.
3984 * Pointer to the Ethernet device structure.
3986 * Indicate if this counter is shared with other flows.
3988 * Counter identifier.
3990 * Counter flow group.
3993 * pointer to flow counter on success, NULL otherwise and rte_errno is set.
3995 static struct mlx5_flow_counter *
3996 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
3999 struct mlx5_priv *priv = dev->data->dev_private;
4000 struct mlx5_flow_counter_pool *pool = NULL;
4001 struct mlx5_flow_counter *cnt_free = NULL;
4003 * Currently group 0 flow counter cannot be assigned to a flow if it is
4004 * not the first one in the batch counter allocation, so it is better
4005 * to allocate counters one by one for these flows in a separate
4007 * A counter can be shared between different groups so need to take
4008 * shared counters from the single container.
4010 uint32_t batch = (group && !shared) ? 1 : 0;
4011 struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4014 if (priv->counter_fallback)
4015 return flow_dv_counter_alloc_fallback(dev, shared, id);
4016 if (!priv->config.devx) {
4017 rte_errno = ENOTSUP;
4021 cnt_free = flow_dv_counter_shared_search(cont, id);
4023 if (cnt_free->ref_cnt + 1 == 0) {
4027 cnt_free->ref_cnt++;
4031 /* Pools which has a free counters are in the start. */
4032 TAILQ_FOREACH(pool, &cont->pool_list, next) {
4034 * The free counter reset values must be updated between the
4035 * counter release to the counter allocation, so, at least one
4036 * query must be done in this time. ensure it by saving the
4037 * query generation in the release time.
4038 * The free list is sorted according to the generation - so if
4039 * the first one is not updated, all the others are not
4042 cnt_free = TAILQ_FIRST(&pool->counters);
4043 if (cnt_free && cnt_free->query_gen + 1 <
4044 rte_atomic64_read(&pool->query_gen))
4049 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4053 cnt_free->batch = batch;
4054 /* Create a DV counter action only in the first time usage. */
4055 if (!cnt_free->action) {
4057 struct mlx5_devx_obj *dcs;
4060 offset = cnt_free - &pool->counters_raw[0];
4061 dcs = pool->min_dcs;
4064 dcs = cnt_free->dcs;
4066 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4068 if (!cnt_free->action) {
4073 /* Update the counter reset values. */
4074 if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4077 cnt_free->shared = shared;
4078 cnt_free->ref_cnt = 1;
4080 if (!priv->sh->cmng.query_thread_on)
4081 /* Start the asynchronous batch query by the host thread. */
4082 mlx5_set_query_alarm(priv->sh);
4083 TAILQ_REMOVE(&pool->counters, cnt_free, next);
4084 if (TAILQ_EMPTY(&pool->counters)) {
4085 /* Move the pool to the end of the container pool list. */
4086 TAILQ_REMOVE(&cont->pool_list, pool, next);
4087 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4093 * Release a flow counter.
4096 * Pointer to the Ethernet device structure.
4097 * @param[in] counter
4098 * Pointer to the counter handler.
4101 flow_dv_counter_release(struct rte_eth_dev *dev,
4102 struct mlx5_flow_counter *counter)
4104 struct mlx5_priv *priv = dev->data->dev_private;
4108 if (priv->counter_fallback) {
4109 flow_dv_counter_release_fallback(dev, counter);
4112 if (--counter->ref_cnt == 0) {
4113 struct mlx5_flow_counter_pool *pool =
4114 flow_dv_counter_pool_get(counter);
4116 /* Put the counter in the end - the last updated one. */
4117 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4118 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4123 * Verify the @p attributes will be correctly understood by the NIC and store
4124 * them in the @p flow if everything is correct.
4127 * Pointer to dev struct.
4128 * @param[in] attributes
4129 * Pointer to flow attributes
4130 * @param[in] external
4131 * This flow rule is created by request external to PMD.
4133 * Pointer to error structure.
4136 * 0 on success, a negative errno value otherwise and rte_errno is set.
4139 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4140 const struct rte_flow_attr *attributes,
4141 bool external __rte_unused,
4142 struct rte_flow_error *error)
4144 struct mlx5_priv *priv = dev->data->dev_private;
4145 uint32_t priority_max = priv->config.flow_prio - 1;
4147 #ifndef HAVE_MLX5DV_DR
4148 if (attributes->group)
4149 return rte_flow_error_set(error, ENOTSUP,
4150 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4152 "groups are not supported");
4157 ret = mlx5_flow_group_to_table(attributes, external,
4163 if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4164 attributes->priority >= priority_max)
4165 return rte_flow_error_set(error, ENOTSUP,
4166 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4168 "priority out of range");
4169 if (attributes->transfer) {
4170 if (!priv->config.dv_esw_en)
4171 return rte_flow_error_set
4173 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4174 "E-Switch dr is not supported");
4175 if (!(priv->representor || priv->master))
4176 return rte_flow_error_set
4177 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4178 NULL, "E-Switch configuration can only be"
4179 " done by a master or a representor device");
4180 if (attributes->egress)
4181 return rte_flow_error_set
4183 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4184 "egress is not supported");
4186 if (!(attributes->egress ^ attributes->ingress))
4187 return rte_flow_error_set(error, ENOTSUP,
4188 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4189 "must specify exactly one of "
4190 "ingress or egress");
4195 * Internal validation function. For validating both actions and items.
4198 * Pointer to the rte_eth_dev structure.
4200 * Pointer to the flow attributes.
4202 * Pointer to the list of items.
4203 * @param[in] actions
4204 * Pointer to the list of actions.
4205 * @param[in] external
4206 * This flow rule is created by request external to PMD.
4208 * Pointer to the error structure.
4211 * 0 on success, a negative errno value otherwise and rte_errno is set.
4214 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4215 const struct rte_flow_item items[],
4216 const struct rte_flow_action actions[],
4217 bool external, struct rte_flow_error *error)
4220 uint64_t action_flags = 0;
4221 uint64_t item_flags = 0;
4222 uint64_t last_item = 0;
4223 uint8_t next_protocol = 0xff;
4224 uint16_t ether_type = 0;
4226 const struct rte_flow_item *gre_item = NULL;
4227 struct rte_flow_item_tcp nic_tcp_mask = {
4230 .src_port = RTE_BE16(UINT16_MAX),
4231 .dst_port = RTE_BE16(UINT16_MAX),
4234 struct mlx5_priv *priv = dev->data->dev_private;
4235 struct mlx5_dev_config *dev_conf = &priv->config;
4239 ret = flow_dv_validate_attributes(dev, attr, external, error);
4242 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4243 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4244 int type = items->type;
4247 case RTE_FLOW_ITEM_TYPE_VOID:
4249 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4250 ret = flow_dv_validate_item_port_id
4251 (dev, items, attr, item_flags, error);
4254 last_item = MLX5_FLOW_ITEM_PORT_ID;
4256 case RTE_FLOW_ITEM_TYPE_ETH:
4257 ret = mlx5_flow_validate_item_eth(items, item_flags,
4261 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4262 MLX5_FLOW_LAYER_OUTER_L2;
4263 if (items->mask != NULL && items->spec != NULL) {
4265 ((const struct rte_flow_item_eth *)
4268 ((const struct rte_flow_item_eth *)
4270 ether_type = rte_be_to_cpu_16(ether_type);
4275 case RTE_FLOW_ITEM_TYPE_VLAN:
4276 ret = mlx5_flow_validate_item_vlan(items, item_flags,
4280 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4281 MLX5_FLOW_LAYER_OUTER_VLAN;
4282 if (items->mask != NULL && items->spec != NULL) {
4284 ((const struct rte_flow_item_vlan *)
4285 items->spec)->inner_type;
4287 ((const struct rte_flow_item_vlan *)
4288 items->mask)->inner_type;
4289 ether_type = rte_be_to_cpu_16(ether_type);
4294 case RTE_FLOW_ITEM_TYPE_IPV4:
4295 mlx5_flow_tunnel_ip_check(items, next_protocol,
4296 &item_flags, &tunnel);
4297 ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4303 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4304 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4305 if (items->mask != NULL &&
4306 ((const struct rte_flow_item_ipv4 *)
4307 items->mask)->hdr.next_proto_id) {
4309 ((const struct rte_flow_item_ipv4 *)
4310 (items->spec))->hdr.next_proto_id;
4312 ((const struct rte_flow_item_ipv4 *)
4313 (items->mask))->hdr.next_proto_id;
4315 /* Reset for inner layer. */
4316 next_protocol = 0xff;
4319 case RTE_FLOW_ITEM_TYPE_IPV6:
4320 mlx5_flow_tunnel_ip_check(items, next_protocol,
4321 &item_flags, &tunnel);
4322 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4328 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4329 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4330 if (items->mask != NULL &&
4331 ((const struct rte_flow_item_ipv6 *)
4332 items->mask)->hdr.proto) {
4334 ((const struct rte_flow_item_ipv6 *)
4335 items->spec)->hdr.proto;
4337 ((const struct rte_flow_item_ipv6 *)
4338 items->mask)->hdr.proto;
4340 /* Reset for inner layer. */
4341 next_protocol = 0xff;
4344 case RTE_FLOW_ITEM_TYPE_TCP:
4345 ret = mlx5_flow_validate_item_tcp
4352 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4353 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4355 case RTE_FLOW_ITEM_TYPE_UDP:
4356 ret = mlx5_flow_validate_item_udp(items, item_flags,
4361 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4362 MLX5_FLOW_LAYER_OUTER_L4_UDP;
4364 case RTE_FLOW_ITEM_TYPE_GRE:
4365 ret = mlx5_flow_validate_item_gre(items, item_flags,
4366 next_protocol, error);
4370 last_item = MLX5_FLOW_LAYER_GRE;
4372 case RTE_FLOW_ITEM_TYPE_NVGRE:
4373 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4378 last_item = MLX5_FLOW_LAYER_NVGRE;
4380 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4381 ret = mlx5_flow_validate_item_gre_key
4382 (items, item_flags, gre_item, error);
4385 last_item = MLX5_FLOW_LAYER_GRE_KEY;
4387 case RTE_FLOW_ITEM_TYPE_VXLAN:
4388 ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4392 last_item = MLX5_FLOW_LAYER_VXLAN;
4394 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4395 ret = mlx5_flow_validate_item_vxlan_gpe(items,
4400 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4402 case RTE_FLOW_ITEM_TYPE_GENEVE:
4403 ret = mlx5_flow_validate_item_geneve(items,
4408 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4410 case RTE_FLOW_ITEM_TYPE_MPLS:
4411 ret = mlx5_flow_validate_item_mpls(dev, items,
4416 last_item = MLX5_FLOW_LAYER_MPLS;
4419 case RTE_FLOW_ITEM_TYPE_MARK:
4420 ret = flow_dv_validate_item_mark(dev, items, attr,
4424 last_item = MLX5_FLOW_ITEM_MARK;
4426 case RTE_FLOW_ITEM_TYPE_META:
4427 ret = flow_dv_validate_item_meta(dev, items, attr,
4431 last_item = MLX5_FLOW_ITEM_METADATA;
4433 case RTE_FLOW_ITEM_TYPE_ICMP:
4434 ret = mlx5_flow_validate_item_icmp(items, item_flags,
4439 last_item = MLX5_FLOW_LAYER_ICMP;
4441 case RTE_FLOW_ITEM_TYPE_ICMP6:
4442 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4447 last_item = MLX5_FLOW_LAYER_ICMP6;
4449 case RTE_FLOW_ITEM_TYPE_TAG:
4450 ret = flow_dv_validate_item_tag(dev, items,
4454 last_item = MLX5_FLOW_ITEM_TAG;
4456 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4457 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4460 return rte_flow_error_set(error, ENOTSUP,
4461 RTE_FLOW_ERROR_TYPE_ITEM,
4462 NULL, "item not supported");
4464 item_flags |= last_item;
4466 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4467 int type = actions->type;
4468 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4469 return rte_flow_error_set(error, ENOTSUP,
4470 RTE_FLOW_ERROR_TYPE_ACTION,
4471 actions, "too many actions");
4473 case RTE_FLOW_ACTION_TYPE_VOID:
4475 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4476 ret = flow_dv_validate_action_port_id(dev,
4483 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4486 case RTE_FLOW_ACTION_TYPE_FLAG:
4487 ret = flow_dv_validate_action_flag(dev, action_flags,
4491 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4492 /* Count all modify-header actions as one. */
4493 if (!(action_flags &
4494 MLX5_FLOW_MODIFY_HDR_ACTIONS))
4496 action_flags |= MLX5_FLOW_ACTION_FLAG |
4497 MLX5_FLOW_ACTION_MARK_EXT;
4499 action_flags |= MLX5_FLOW_ACTION_FLAG;
4503 case RTE_FLOW_ACTION_TYPE_MARK:
4504 ret = flow_dv_validate_action_mark(dev, actions,
4509 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4510 /* Count all modify-header actions as one. */
4511 if (!(action_flags &
4512 MLX5_FLOW_MODIFY_HDR_ACTIONS))
4514 action_flags |= MLX5_FLOW_ACTION_MARK |
4515 MLX5_FLOW_ACTION_MARK_EXT;
4517 action_flags |= MLX5_FLOW_ACTION_MARK;
4521 case RTE_FLOW_ACTION_TYPE_SET_META:
4522 ret = flow_dv_validate_action_set_meta(dev, actions,
4527 /* Count all modify-header actions as one action. */
4528 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4530 action_flags |= MLX5_FLOW_ACTION_SET_META;
4532 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4533 ret = flow_dv_validate_action_set_tag(dev, actions,
4538 /* Count all modify-header actions as one action. */
4539 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4541 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4543 case RTE_FLOW_ACTION_TYPE_DROP:
4544 ret = mlx5_flow_validate_action_drop(action_flags,
4548 action_flags |= MLX5_FLOW_ACTION_DROP;
4551 case RTE_FLOW_ACTION_TYPE_QUEUE:
4552 ret = mlx5_flow_validate_action_queue(actions,
4557 action_flags |= MLX5_FLOW_ACTION_QUEUE;
4560 case RTE_FLOW_ACTION_TYPE_RSS:
4561 ret = mlx5_flow_validate_action_rss(actions,
4567 action_flags |= MLX5_FLOW_ACTION_RSS;
4570 case RTE_FLOW_ACTION_TYPE_COUNT:
4571 ret = flow_dv_validate_action_count(dev, error);
4574 action_flags |= MLX5_FLOW_ACTION_COUNT;
4577 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4578 if (flow_dv_validate_action_pop_vlan(dev,
4584 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4587 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4588 ret = flow_dv_validate_action_push_vlan(action_flags,
4594 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4597 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4598 ret = flow_dv_validate_action_set_vlan_pcp
4599 (action_flags, actions, error);
4602 /* Count PCP with push_vlan command. */
4603 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4605 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4606 ret = flow_dv_validate_action_set_vlan_vid
4607 (item_flags, action_flags,
4611 /* Count VID with push_vlan command. */
4612 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4614 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4615 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4616 ret = flow_dv_validate_action_l2_encap(action_flags,
4621 action_flags |= actions->type ==
4622 RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4623 MLX5_FLOW_ACTION_VXLAN_ENCAP :
4624 MLX5_FLOW_ACTION_NVGRE_ENCAP;
4627 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4628 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4629 ret = flow_dv_validate_action_l2_decap(action_flags,
4633 action_flags |= actions->type ==
4634 RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4635 MLX5_FLOW_ACTION_VXLAN_DECAP :
4636 MLX5_FLOW_ACTION_NVGRE_DECAP;
4639 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4640 ret = flow_dv_validate_action_raw_encap(action_flags,
4645 action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4648 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4649 ret = flow_dv_validate_action_raw_decap(action_flags,
4654 action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4657 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4658 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4659 ret = flow_dv_validate_action_modify_mac(action_flags,
4665 /* Count all modify-header actions as one action. */
4666 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4668 action_flags |= actions->type ==
4669 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4670 MLX5_FLOW_ACTION_SET_MAC_SRC :
4671 MLX5_FLOW_ACTION_SET_MAC_DST;
4674 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4675 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4676 ret = flow_dv_validate_action_modify_ipv4(action_flags,
4682 /* Count all modify-header actions as one action. */
4683 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4685 action_flags |= actions->type ==
4686 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4687 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4688 MLX5_FLOW_ACTION_SET_IPV4_DST;
4690 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4691 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4692 ret = flow_dv_validate_action_modify_ipv6(action_flags,
4698 /* Count all modify-header actions as one action. */
4699 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4701 action_flags |= actions->type ==
4702 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4703 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4704 MLX5_FLOW_ACTION_SET_IPV6_DST;
4706 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4707 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4708 ret = flow_dv_validate_action_modify_tp(action_flags,
4714 /* Count all modify-header actions as one action. */
4715 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4717 action_flags |= actions->type ==
4718 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4719 MLX5_FLOW_ACTION_SET_TP_SRC :
4720 MLX5_FLOW_ACTION_SET_TP_DST;
4722 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4723 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4724 ret = flow_dv_validate_action_modify_ttl(action_flags,
4730 /* Count all modify-header actions as one action. */
4731 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4733 action_flags |= actions->type ==
4734 RTE_FLOW_ACTION_TYPE_SET_TTL ?
4735 MLX5_FLOW_ACTION_SET_TTL :
4736 MLX5_FLOW_ACTION_DEC_TTL;
4738 case RTE_FLOW_ACTION_TYPE_JUMP:
4739 ret = flow_dv_validate_action_jump(actions,
4746 action_flags |= MLX5_FLOW_ACTION_JUMP;
4748 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4749 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4750 ret = flow_dv_validate_action_modify_tcp_seq
4757 /* Count all modify-header actions as one action. */
4758 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4760 action_flags |= actions->type ==
4761 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4762 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4763 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4765 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4766 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4767 ret = flow_dv_validate_action_modify_tcp_ack
4774 /* Count all modify-header actions as one action. */
4775 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4777 action_flags |= actions->type ==
4778 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4779 MLX5_FLOW_ACTION_INC_TCP_ACK :
4780 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4782 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4783 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4784 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4786 case RTE_FLOW_ACTION_TYPE_METER:
4787 ret = mlx5_flow_validate_action_meter(dev,
4793 action_flags |= MLX5_FLOW_ACTION_METER;
4797 return rte_flow_error_set(error, ENOTSUP,
4798 RTE_FLOW_ERROR_TYPE_ACTION,
4800 "action not supported");
4803 if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
4804 (action_flags & MLX5_FLOW_VLAN_ACTIONS))
4805 return rte_flow_error_set(error, ENOTSUP,
4806 RTE_FLOW_ERROR_TYPE_ACTION,
4808 "can't have vxlan and vlan"
4809 " actions in the same rule");
4810 /* Eswitch has few restrictions on using items and actions */
4811 if (attr->transfer) {
4812 if (!mlx5_flow_ext_mreg_supported(dev) &&
4813 action_flags & MLX5_FLOW_ACTION_FLAG)
4814 return rte_flow_error_set(error, ENOTSUP,
4815 RTE_FLOW_ERROR_TYPE_ACTION,
4817 "unsupported action FLAG");
4818 if (!mlx5_flow_ext_mreg_supported(dev) &&
4819 action_flags & MLX5_FLOW_ACTION_MARK)
4820 return rte_flow_error_set(error, ENOTSUP,
4821 RTE_FLOW_ERROR_TYPE_ACTION,
4823 "unsupported action MARK");
4824 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
4825 return rte_flow_error_set(error, ENOTSUP,
4826 RTE_FLOW_ERROR_TYPE_ACTION,
4828 "unsupported action QUEUE");
4829 if (action_flags & MLX5_FLOW_ACTION_RSS)
4830 return rte_flow_error_set(error, ENOTSUP,
4831 RTE_FLOW_ERROR_TYPE_ACTION,
4833 "unsupported action RSS");
4834 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4835 return rte_flow_error_set(error, EINVAL,
4836 RTE_FLOW_ERROR_TYPE_ACTION,
4838 "no fate action is found");
4840 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
4841 return rte_flow_error_set(error, EINVAL,
4842 RTE_FLOW_ERROR_TYPE_ACTION,
4844 "no fate action is found");
4850 * Internal preparation function. Allocates the DV flow size,
4851 * this size is constant.
4854 * Pointer to the flow attributes.
4856 * Pointer to the list of items.
4857 * @param[in] actions
4858 * Pointer to the list of actions.
4860 * Pointer to the error structure.
4863 * Pointer to mlx5_flow object on success,
4864 * otherwise NULL and rte_errno is set.
4866 static struct mlx5_flow *
4867 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
4868 const struct rte_flow_item items[] __rte_unused,
4869 const struct rte_flow_action actions[] __rte_unused,
4870 struct rte_flow_error *error)
4872 size_t size = sizeof(struct mlx5_flow);
4873 struct mlx5_flow *dev_flow;
4875 dev_flow = rte_calloc(__func__, 1, size, 0);
4877 rte_flow_error_set(error, ENOMEM,
4878 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4879 "not enough memory to create flow");
4882 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
4883 dev_flow->ingress = attr->ingress;
4884 dev_flow->transfer = attr->transfer;
4890 * Sanity check for match mask and value. Similar to check_valid_spec() in
4891 * kernel driver. If unmasked bit is present in value, it returns failure.
4894 * pointer to match mask buffer.
4895 * @param match_value
4896 * pointer to match value buffer.
4899 * 0 if valid, -EINVAL otherwise.
4902 flow_dv_check_valid_spec(void *match_mask, void *match_value)
4904 uint8_t *m = match_mask;
4905 uint8_t *v = match_value;
4908 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
4911 "match_value differs from match_criteria"
4912 " %p[%u] != %p[%u]",
4913 match_value, i, match_mask, i);
4922 * Add Ethernet item to matcher and to the value.
4924 * @param[in, out] matcher
4926 * @param[in, out] key
4927 * Flow matcher value.
4929 * Flow pattern to translate.
4931 * Item is inner pattern.
4934 flow_dv_translate_item_eth(void *matcher, void *key,
4935 const struct rte_flow_item *item, int inner)
4937 const struct rte_flow_item_eth *eth_m = item->mask;
4938 const struct rte_flow_item_eth *eth_v = item->spec;
4939 const struct rte_flow_item_eth nic_mask = {
4940 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4941 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4942 .type = RTE_BE16(0xffff),
4954 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4956 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4958 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4960 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4962 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
4963 ð_m->dst, sizeof(eth_m->dst));
4964 /* The value must be in the range of the mask. */
4965 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
4966 for (i = 0; i < sizeof(eth_m->dst); ++i)
4967 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
4968 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
4969 ð_m->src, sizeof(eth_m->src));
4970 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
4971 /* The value must be in the range of the mask. */
4972 for (i = 0; i < sizeof(eth_m->dst); ++i)
4973 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
4974 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
4975 rte_be_to_cpu_16(eth_m->type));
4976 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
4977 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
4981 * Add VLAN item to matcher and to the value.
4983 * @param[in, out] dev_flow
4985 * @param[in, out] matcher
4987 * @param[in, out] key
4988 * Flow matcher value.
4990 * Flow pattern to translate.
4992 * Item is inner pattern.
4995 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
4996 void *matcher, void *key,
4997 const struct rte_flow_item *item,
5000 const struct rte_flow_item_vlan *vlan_m = item->mask;
5001 const struct rte_flow_item_vlan *vlan_v = item->spec;
5010 vlan_m = &rte_flow_item_vlan_mask;
5012 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5014 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5016 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5018 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5020 * This is workaround, masks are not supported,
5021 * and pre-validated.
5023 dev_flow->dv.vf_vlan.tag =
5024 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5026 tci_m = rte_be_to_cpu_16(vlan_m->tci);
5027 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5028 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5029 MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5030 MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5031 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5032 MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5033 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5034 MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5035 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5036 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5037 rte_be_to_cpu_16(vlan_m->inner_type));
5038 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5039 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5043 * Add IPV4 item to matcher and to the value.
5045 * @param[in, out] matcher
5047 * @param[in, out] key
5048 * Flow matcher value.
5050 * Flow pattern to translate.
5052 * Item is inner pattern.
5054 * The group to insert the rule.
5057 flow_dv_translate_item_ipv4(void *matcher, void *key,
5058 const struct rte_flow_item *item,
5059 int inner, uint32_t group)
5061 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5062 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5063 const struct rte_flow_item_ipv4 nic_mask = {
5065 .src_addr = RTE_BE32(0xffffffff),
5066 .dst_addr = RTE_BE32(0xffffffff),
5067 .type_of_service = 0xff,
5068 .next_proto_id = 0xff,
5078 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5080 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5082 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5084 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5087 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5089 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5090 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5095 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5096 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5097 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5098 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5099 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5100 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5101 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5102 src_ipv4_src_ipv6.ipv4_layout.ipv4);
5103 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5104 src_ipv4_src_ipv6.ipv4_layout.ipv4);
5105 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5106 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5107 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5108 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5109 ipv4_m->hdr.type_of_service);
5110 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5111 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5112 ipv4_m->hdr.type_of_service >> 2);
5113 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5114 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5115 ipv4_m->hdr.next_proto_id);
5116 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5117 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5121 * Add IPV6 item to matcher and to the value.
5123 * @param[in, out] matcher
5125 * @param[in, out] key
5126 * Flow matcher value.
5128 * Flow pattern to translate.
5130 * Item is inner pattern.
5132 * The group to insert the rule.
5135 flow_dv_translate_item_ipv6(void *matcher, void *key,
5136 const struct rte_flow_item *item,
5137 int inner, uint32_t group)
5139 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5140 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5141 const struct rte_flow_item_ipv6 nic_mask = {
5144 "\xff\xff\xff\xff\xff\xff\xff\xff"
5145 "\xff\xff\xff\xff\xff\xff\xff\xff",
5147 "\xff\xff\xff\xff\xff\xff\xff\xff"
5148 "\xff\xff\xff\xff\xff\xff\xff\xff",
5149 .vtc_flow = RTE_BE32(0xffffffff),
5156 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5157 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5166 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5168 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5170 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5172 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5175 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5177 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5178 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5183 size = sizeof(ipv6_m->hdr.dst_addr);
5184 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5185 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5186 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5187 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5188 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5189 for (i = 0; i < size; ++i)
5190 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5191 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5192 src_ipv4_src_ipv6.ipv6_layout.ipv6);
5193 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5194 src_ipv4_src_ipv6.ipv6_layout.ipv6);
5195 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5196 for (i = 0; i < size; ++i)
5197 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5199 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5200 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5201 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5202 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5203 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5204 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5207 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5209 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5212 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5214 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5218 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5220 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5221 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5225 * Add TCP item to matcher and to the value.
5227 * @param[in, out] matcher
5229 * @param[in, out] key
5230 * Flow matcher value.
5232 * Flow pattern to translate.
5234 * Item is inner pattern.
5237 flow_dv_translate_item_tcp(void *matcher, void *key,
5238 const struct rte_flow_item *item,
5241 const struct rte_flow_item_tcp *tcp_m = item->mask;
5242 const struct rte_flow_item_tcp *tcp_v = item->spec;
5247 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5249 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5251 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5253 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5255 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5256 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5260 tcp_m = &rte_flow_item_tcp_mask;
5261 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5262 rte_be_to_cpu_16(tcp_m->hdr.src_port));
5263 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5264 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5265 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5266 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5267 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5268 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5269 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5270 tcp_m->hdr.tcp_flags);
5271 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5272 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5276 * Add UDP item to matcher and to the value.
5278 * @param[in, out] matcher
5280 * @param[in, out] key
5281 * Flow matcher value.
5283 * Flow pattern to translate.
5285 * Item is inner pattern.
5288 flow_dv_translate_item_udp(void *matcher, void *key,
5289 const struct rte_flow_item *item,
5292 const struct rte_flow_item_udp *udp_m = item->mask;
5293 const struct rte_flow_item_udp *udp_v = item->spec;
5298 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5300 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5302 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5304 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5306 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5307 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5311 udp_m = &rte_flow_item_udp_mask;
5312 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5313 rte_be_to_cpu_16(udp_m->hdr.src_port));
5314 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5315 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5316 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5317 rte_be_to_cpu_16(udp_m->hdr.dst_port));
5318 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5319 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5323 * Add GRE optional Key item to matcher and to the value.
5325 * @param[in, out] matcher
5327 * @param[in, out] key
5328 * Flow matcher value.
5330 * Flow pattern to translate.
5332 * Item is inner pattern.
5335 flow_dv_translate_item_gre_key(void *matcher, void *key,
5336 const struct rte_flow_item *item)
5338 const rte_be32_t *key_m = item->mask;
5339 const rte_be32_t *key_v = item->spec;
5340 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5341 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5342 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5347 key_m = &gre_key_default_mask;
5348 /* GRE K bit must be on and should already be validated */
5349 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5350 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5351 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5352 rte_be_to_cpu_32(*key_m) >> 8);
5353 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5354 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5355 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5356 rte_be_to_cpu_32(*key_m) & 0xFF);
5357 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5358 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5362 * Add GRE item to matcher and to the value.
5364 * @param[in, out] matcher
5366 * @param[in, out] key
5367 * Flow matcher value.
5369 * Flow pattern to translate.
5371 * Item is inner pattern.
5374 flow_dv_translate_item_gre(void *matcher, void *key,
5375 const struct rte_flow_item *item,
5378 const struct rte_flow_item_gre *gre_m = item->mask;
5379 const struct rte_flow_item_gre *gre_v = item->spec;
5382 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5383 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5390 uint16_t s_present:1;
5391 uint16_t k_present:1;
5392 uint16_t rsvd_bit1:1;
5393 uint16_t c_present:1;
5397 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5400 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5402 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5404 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5406 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5408 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5409 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5413 gre_m = &rte_flow_item_gre_mask;
5414 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5415 rte_be_to_cpu_16(gre_m->protocol));
5416 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5417 rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5418 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5419 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5420 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5421 gre_crks_rsvd0_ver_m.c_present);
5422 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5423 gre_crks_rsvd0_ver_v.c_present &
5424 gre_crks_rsvd0_ver_m.c_present);
5425 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5426 gre_crks_rsvd0_ver_m.k_present);
5427 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5428 gre_crks_rsvd0_ver_v.k_present &
5429 gre_crks_rsvd0_ver_m.k_present);
5430 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5431 gre_crks_rsvd0_ver_m.s_present);
5432 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5433 gre_crks_rsvd0_ver_v.s_present &
5434 gre_crks_rsvd0_ver_m.s_present);
5438 * Add NVGRE item to matcher and to the value.
5440 * @param[in, out] matcher
5442 * @param[in, out] key
5443 * Flow matcher value.
5445 * Flow pattern to translate.
5447 * Item is inner pattern.
5450 flow_dv_translate_item_nvgre(void *matcher, void *key,
5451 const struct rte_flow_item *item,
5454 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5455 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5456 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5457 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5458 const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5459 const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5465 /* For NVGRE, GRE header fields must be set with defined values. */
5466 const struct rte_flow_item_gre gre_spec = {
5467 .c_rsvd0_ver = RTE_BE16(0x2000),
5468 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5470 const struct rte_flow_item_gre gre_mask = {
5471 .c_rsvd0_ver = RTE_BE16(0xB000),
5472 .protocol = RTE_BE16(UINT16_MAX),
5474 const struct rte_flow_item gre_item = {
5479 flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5483 nvgre_m = &rte_flow_item_nvgre_mask;
5484 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5485 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5486 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5487 memcpy(gre_key_m, tni_flow_id_m, size);
5488 for (i = 0; i < size; ++i)
5489 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5493 * Add VXLAN item to matcher and to the value.
5495 * @param[in, out] matcher
5497 * @param[in, out] key
5498 * Flow matcher value.
5500 * Flow pattern to translate.
5502 * Item is inner pattern.
5505 flow_dv_translate_item_vxlan(void *matcher, void *key,
5506 const struct rte_flow_item *item,
5509 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5510 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5513 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5514 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5522 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5524 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5526 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5528 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5530 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5531 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5532 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5533 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5534 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5539 vxlan_m = &rte_flow_item_vxlan_mask;
5540 size = sizeof(vxlan_m->vni);
5541 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5542 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5543 memcpy(vni_m, vxlan_m->vni, size);
5544 for (i = 0; i < size; ++i)
5545 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5549 * Add Geneve item to matcher and to the value.
5551 * @param[in, out] matcher
5553 * @param[in, out] key
5554 * Flow matcher value.
5556 * Flow pattern to translate.
5558 * Item is inner pattern.
5562 flow_dv_translate_item_geneve(void *matcher, void *key,
5563 const struct rte_flow_item *item, int inner)
5565 const struct rte_flow_item_geneve *geneve_m = item->mask;
5566 const struct rte_flow_item_geneve *geneve_v = item->spec;
5569 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5570 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5579 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5581 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5583 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5585 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5587 dport = MLX5_UDP_PORT_GENEVE;
5588 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5589 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5590 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5595 geneve_m = &rte_flow_item_geneve_mask;
5596 size = sizeof(geneve_m->vni);
5597 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5598 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5599 memcpy(vni_m, geneve_m->vni, size);
5600 for (i = 0; i < size; ++i)
5601 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5602 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5603 rte_be_to_cpu_16(geneve_m->protocol));
5604 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5605 rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5606 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5607 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5608 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5609 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5610 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5611 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5612 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5613 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5614 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5615 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5616 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5620 * Add MPLS item to matcher and to the value.
5622 * @param[in, out] matcher
5624 * @param[in, out] key
5625 * Flow matcher value.
5627 * Flow pattern to translate.
5628 * @param[in] prev_layer
5629 * The protocol layer indicated in previous item.
5631 * Item is inner pattern.
5634 flow_dv_translate_item_mpls(void *matcher, void *key,
5635 const struct rte_flow_item *item,
5636 uint64_t prev_layer,
5639 const uint32_t *in_mpls_m = item->mask;
5640 const uint32_t *in_mpls_v = item->spec;
5641 uint32_t *out_mpls_m = 0;
5642 uint32_t *out_mpls_v = 0;
5643 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5644 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5645 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5647 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5648 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5649 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5651 switch (prev_layer) {
5652 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5653 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5654 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5655 MLX5_UDP_PORT_MPLS);
5657 case MLX5_FLOW_LAYER_GRE:
5658 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5659 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5660 RTE_ETHER_TYPE_MPLS);
5663 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5664 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5671 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5672 switch (prev_layer) {
5673 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5675 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5676 outer_first_mpls_over_udp);
5678 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5679 outer_first_mpls_over_udp);
5681 case MLX5_FLOW_LAYER_GRE:
5683 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5684 outer_first_mpls_over_gre);
5686 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5687 outer_first_mpls_over_gre);
5690 /* Inner MPLS not over GRE is not supported. */
5693 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5697 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5703 if (out_mpls_m && out_mpls_v) {
5704 *out_mpls_m = *in_mpls_m;
5705 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5710 * Add metadata register item to matcher
5712 * @param[in, out] matcher
5714 * @param[in, out] key
5715 * Flow matcher value.
5716 * @param[in] reg_type
5717 * Type of device metadata register
5724 flow_dv_match_meta_reg(void *matcher, void *key,
5725 enum modify_reg reg_type,
5726 uint32_t data, uint32_t mask)
5729 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5731 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5736 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5737 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5740 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5741 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5744 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
5745 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, data);
5748 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5749 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5752 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5753 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5756 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5757 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5760 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5761 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5764 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5765 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5768 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
5769 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
5772 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
5773 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
5782 * Add MARK item to matcher
5785 * The device to configure through.
5786 * @param[in, out] matcher
5788 * @param[in, out] key
5789 * Flow matcher value.
5791 * Flow pattern to translate.
5794 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
5795 void *matcher, void *key,
5796 const struct rte_flow_item *item)
5798 struct mlx5_priv *priv = dev->data->dev_private;
5799 const struct rte_flow_item_mark *mark;
5803 mark = item->mask ? (const void *)item->mask :
5804 &rte_flow_item_mark_mask;
5805 mask = mark->id & priv->sh->dv_mark_mask;
5806 mark = (const void *)item->spec;
5808 value = mark->id & priv->sh->dv_mark_mask & mask;
5810 enum modify_reg reg;
5812 /* Get the metadata register index for the mark. */
5813 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
5815 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5820 * Add META item to matcher
5823 * The devich to configure through.
5824 * @param[in, out] matcher
5826 * @param[in, out] key
5827 * Flow matcher value.
5829 * Attributes of flow that includes this item.
5831 * Flow pattern to translate.
5834 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
5835 void *matcher, void *key,
5836 const struct rte_flow_attr *attr,
5837 const struct rte_flow_item *item)
5839 const struct rte_flow_item_meta *meta_m;
5840 const struct rte_flow_item_meta *meta_v;
5842 meta_m = (const void *)item->mask;
5844 meta_m = &rte_flow_item_meta_mask;
5845 meta_v = (const void *)item->spec;
5847 enum modify_reg reg;
5848 uint32_t value = meta_v->data;
5849 uint32_t mask = meta_m->data;
5851 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
5855 * In datapath code there is no endianness
5856 * coversions for perfromance reasons, all
5857 * pattern conversions are done in rte_flow.
5859 value = rte_cpu_to_be_32(value);
5860 mask = rte_cpu_to_be_32(mask);
5861 if (reg == REG_C_0) {
5862 struct mlx5_priv *priv = dev->data->dev_private;
5863 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
5864 uint32_t shl_c0 = rte_bsf32(msk_c0);
5866 msk_c0 = rte_cpu_to_be_32(msk_c0);
5870 assert(!(~msk_c0 & mask));
5872 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5877 * Add vport metadata Reg C0 item to matcher
5879 * @param[in, out] matcher
5881 * @param[in, out] key
5882 * Flow matcher value.
5884 * Flow pattern to translate.
5887 flow_dv_translate_item_meta_vport(void *matcher, void *key,
5888 uint32_t value, uint32_t mask)
5890 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
5894 * Add tag item to matcher
5896 * @param[in, out] matcher
5898 * @param[in, out] key
5899 * Flow matcher value.
5901 * Flow pattern to translate.
5904 flow_dv_translate_mlx5_item_tag(void *matcher, void *key,
5905 const struct rte_flow_item *item)
5907 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
5908 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
5911 flow_dv_match_meta_reg(matcher, key, tag_v->id, tag_v->data,
5912 tag_m ? tag_m->data : UINT32_MAX);
5916 * Add TAG item to matcher
5919 * The devich to configure through.
5920 * @param[in, out] matcher
5922 * @param[in, out] key
5923 * Flow matcher value.
5925 * Flow pattern to translate.
5928 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
5929 void *matcher, void *key,
5930 const struct rte_flow_item *item)
5932 const struct rte_flow_item_tag *tag_v = item->spec;
5933 const struct rte_flow_item_tag *tag_m = item->mask;
5934 enum modify_reg reg;
5937 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
5938 /* Get the metadata register index for the tag. */
5939 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
5941 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
5945 * Add source vport match to the specified matcher.
5947 * @param[in, out] matcher
5949 * @param[in, out] key
5950 * Flow matcher value.
5952 * Source vport value to match
5957 flow_dv_translate_item_source_vport(void *matcher, void *key,
5958 int16_t port, uint16_t mask)
5960 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5961 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5963 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
5964 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
5968 * Translate port-id item to eswitch match on port-id.
5971 * The devich to configure through.
5972 * @param[in, out] matcher
5974 * @param[in, out] key
5975 * Flow matcher value.
5977 * Flow pattern to translate.
5980 * 0 on success, a negative errno value otherwise.
5983 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
5984 void *key, const struct rte_flow_item *item)
5986 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
5987 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
5988 struct mlx5_priv *priv;
5991 mask = pid_m ? pid_m->id : 0xffff;
5992 id = pid_v ? pid_v->id : dev->data->port_id;
5993 priv = mlx5_port_to_eswitch_info(id, item == NULL);
5996 /* Translate to vport field or to metadata, depending on mode. */
5997 if (priv->vport_meta_mask)
5998 flow_dv_translate_item_meta_vport(matcher, key,
5999 priv->vport_meta_tag,
6000 priv->vport_meta_mask);
6002 flow_dv_translate_item_source_vport(matcher, key,
6003 priv->vport_id, mask);
6008 * Add ICMP6 item to matcher and to the value.
6010 * @param[in, out] matcher
6012 * @param[in, out] key
6013 * Flow matcher value.
6015 * Flow pattern to translate.
6017 * Item is inner pattern.
6020 flow_dv_translate_item_icmp6(void *matcher, void *key,
6021 const struct rte_flow_item *item,
6024 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6025 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6028 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6030 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6032 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6034 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6036 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6038 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6040 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6041 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6045 icmp6_m = &rte_flow_item_icmp6_mask;
6046 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6047 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6048 icmp6_v->type & icmp6_m->type);
6049 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6050 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6051 icmp6_v->code & icmp6_m->code);
6055 * Add ICMP item to matcher and to the value.
6057 * @param[in, out] matcher
6059 * @param[in, out] key
6060 * Flow matcher value.
6062 * Flow pattern to translate.
6064 * Item is inner pattern.
6067 flow_dv_translate_item_icmp(void *matcher, void *key,
6068 const struct rte_flow_item *item,
6071 const struct rte_flow_item_icmp *icmp_m = item->mask;
6072 const struct rte_flow_item_icmp *icmp_v = item->spec;
6075 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6077 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6079 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6081 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6083 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6085 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6087 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6088 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6092 icmp_m = &rte_flow_item_icmp_mask;
6093 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6094 icmp_m->hdr.icmp_type);
6095 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6096 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6097 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6098 icmp_m->hdr.icmp_code);
6099 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6100 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6103 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6105 #define HEADER_IS_ZERO(match_criteria, headers) \
6106 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
6107 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6110 * Calculate flow matcher enable bitmap.
6112 * @param match_criteria
6113 * Pointer to flow matcher criteria.
6116 * Bitmap of enabled fields.
6119 flow_dv_matcher_enable(uint32_t *match_criteria)
6121 uint8_t match_criteria_enable;
6123 match_criteria_enable =
6124 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6125 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6126 match_criteria_enable |=
6127 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6128 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6129 match_criteria_enable |=
6130 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6131 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6132 match_criteria_enable |=
6133 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6134 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6135 match_criteria_enable |=
6136 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6137 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6138 return match_criteria_enable;
6145 * @param[in, out] dev
6146 * Pointer to rte_eth_dev structure.
6147 * @param[in] table_id
6150 * Direction of the table.
6151 * @param[in] transfer
6152 * E-Switch or NIC flow.
6154 * pointer to error structure.
6157 * Returns tables resource based on the index, NULL in case of failed.
6159 static struct mlx5_flow_tbl_resource *
6160 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6161 uint32_t table_id, uint8_t egress,
6163 struct rte_flow_error *error)
6165 struct mlx5_priv *priv = dev->data->dev_private;
6166 struct mlx5_ibv_shared *sh = priv->sh;
6167 struct mlx5_flow_tbl_resource *tbl;
6168 union mlx5_flow_tbl_key table_key = {
6170 .table_id = table_id,
6172 .domain = !!transfer,
6173 .direction = !!egress,
6176 struct mlx5_hlist_entry *pos;
6177 struct mlx5_flow_tbl_data_entry *tbl_data;
6179 #ifdef HAVE_MLX5DV_DR
6183 pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
6185 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6187 tbl = &tbl_data->tbl;
6189 rte_flow_error_set(error, ENOKEY,
6190 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6191 NULL, "cannot find created table");
6194 rte_atomic32_inc(&tbl->refcnt);
6197 tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6199 rte_flow_error_set(error, ENOMEM,
6200 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6202 "cannot allocate flow table data entry");
6205 tbl = &tbl_data->tbl;
6206 pos = &tbl_data->entry;
6208 domain = sh->fdb_domain;
6210 domain = sh->tx_domain;
6212 domain = sh->rx_domain;
6213 tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6215 rte_flow_error_set(error, ENOMEM,
6216 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6217 NULL, "cannot create flow table object");
6222 * No multi-threads now, but still better to initialize the reference
6223 * count before insert it into the hash list.
6225 rte_atomic32_init(&tbl->refcnt);
6226 /* Jump action reference count is initialized here. */
6227 rte_atomic32_init(&tbl_data->jump.refcnt);
6228 pos->key = table_key.v64;
6229 ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6231 rte_flow_error_set(error, -ret,
6232 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6233 "cannot insert flow table data entry");
6234 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6237 rte_atomic32_inc(&tbl->refcnt);
6240 /* Just to make the compiling pass when no HAVE_MLX5DV_DR defined. */
6241 pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
6243 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6245 tbl = &tbl_data->tbl;
6247 rte_flow_error_set(error, ENOKEY,
6248 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6249 NULL, "cannot find created table");
6252 rte_atomic32_inc(&tbl->refcnt);
6260 * Release a flow table.
6263 * Pointer to rte_eth_dev structure.
6265 * Table resource to be released.
6268 * Returns 0 if table was released, else return 1;
6271 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6272 struct mlx5_flow_tbl_resource *tbl)
6274 struct mlx5_priv *priv = dev->data->dev_private;
6275 struct mlx5_ibv_shared *sh = priv->sh;
6276 struct mlx5_flow_tbl_data_entry *tbl_data =
6277 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6281 if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6282 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6284 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6286 /* remove the entry from the hash list and free memory. */
6287 mlx5_hlist_remove(sh->flow_tbls, pos);
6295 * Register the flow matcher.
6297 * @param[in, out] dev
6298 * Pointer to rte_eth_dev structure.
6299 * @param[in, out] matcher
6300 * Pointer to flow matcher.
6301 * @parm[in, out] dev_flow
6302 * Pointer to the dev_flow.
6304 * pointer to error structure.
6307 * 0 on success otherwise -errno and errno is set.
6310 flow_dv_matcher_register(struct rte_eth_dev *dev,
6311 struct mlx5_flow_dv_matcher *matcher,
6312 struct mlx5_flow *dev_flow,
6313 struct rte_flow_error *error)
6315 struct mlx5_priv *priv = dev->data->dev_private;
6316 struct mlx5_ibv_shared *sh = priv->sh;
6317 struct mlx5_flow_dv_matcher *cache_matcher;
6318 struct mlx5dv_flow_matcher_attr dv_attr = {
6319 .type = IBV_FLOW_ATTR_NORMAL,
6320 .match_mask = (void *)&matcher->mask,
6322 struct mlx5_flow_tbl_resource *tbl = NULL;
6324 /* Lookup from cache. */
6325 LIST_FOREACH(cache_matcher, &sh->matchers, next) {
6326 if (matcher->crc == cache_matcher->crc &&
6327 matcher->priority == cache_matcher->priority &&
6328 matcher->egress == cache_matcher->egress &&
6329 matcher->group == cache_matcher->group &&
6330 matcher->transfer == cache_matcher->transfer &&
6331 !memcmp((const void *)matcher->mask.buf,
6332 (const void *)cache_matcher->mask.buf,
6333 cache_matcher->mask.size)) {
6335 "priority %hd use %s matcher %p: refcnt %d++",
6336 cache_matcher->priority,
6337 cache_matcher->egress ? "tx" : "rx",
6338 (void *)cache_matcher,
6339 rte_atomic32_read(&cache_matcher->refcnt));
6340 rte_atomic32_inc(&cache_matcher->refcnt);
6341 dev_flow->dv.matcher = cache_matcher;
6345 /* Register new matcher. */
6346 cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6348 return rte_flow_error_set(error, ENOMEM,
6349 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6350 "cannot allocate matcher memory");
6351 tbl = flow_dv_tbl_resource_get(dev, matcher->group,
6352 matcher->egress, matcher->transfer,
6355 rte_free(cache_matcher);
6356 return rte_flow_error_set(error, ENOMEM,
6357 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6358 NULL, "cannot create table");
6360 *cache_matcher = *matcher;
6361 dv_attr.match_criteria_enable =
6362 flow_dv_matcher_enable(cache_matcher->mask.buf);
6363 dv_attr.priority = matcher->priority;
6364 if (matcher->egress)
6365 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6366 cache_matcher->matcher_object =
6367 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6368 if (!cache_matcher->matcher_object) {
6369 rte_free(cache_matcher);
6370 #ifdef HAVE_MLX5DV_DR
6371 flow_dv_tbl_resource_release(dev, tbl);
6373 return rte_flow_error_set(error, ENOMEM,
6374 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6375 NULL, "cannot create matcher");
6377 rte_atomic32_inc(&cache_matcher->refcnt);
6378 LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
6379 dev_flow->dv.matcher = cache_matcher;
6380 DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
6381 cache_matcher->priority,
6382 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
6383 rte_atomic32_read(&cache_matcher->refcnt));
6384 rte_atomic32_inc(&tbl->refcnt);
6389 * Find existing tag resource or create and register a new one.
6391 * @param dev[in, out]
6392 * Pointer to rte_eth_dev structure.
6393 * @param[in, out] resource
6394 * Pointer to tag resource.
6395 * @parm[in, out] dev_flow
6396 * Pointer to the dev_flow.
6398 * pointer to error structure.
6401 * 0 on success otherwise -errno and errno is set.
6404 flow_dv_tag_resource_register
6405 (struct rte_eth_dev *dev,
6406 struct mlx5_flow_dv_tag_resource *resource,
6407 struct mlx5_flow *dev_flow,
6408 struct rte_flow_error *error)
6410 struct mlx5_priv *priv = dev->data->dev_private;
6411 struct mlx5_ibv_shared *sh = priv->sh;
6412 struct mlx5_flow_dv_tag_resource *cache_resource;
6414 /* Lookup a matching resource from cache. */
6415 LIST_FOREACH(cache_resource, &sh->tags, next) {
6416 if (resource->tag == cache_resource->tag) {
6417 DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
6418 (void *)cache_resource,
6419 rte_atomic32_read(&cache_resource->refcnt));
6420 rte_atomic32_inc(&cache_resource->refcnt);
6421 dev_flow->dv.tag_resource = cache_resource;
6425 /* Register new resource. */
6426 cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6427 if (!cache_resource)
6428 return rte_flow_error_set(error, ENOMEM,
6429 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6430 "cannot allocate resource memory");
6431 *cache_resource = *resource;
6432 cache_resource->action = mlx5_glue->dv_create_flow_action_tag
6434 if (!cache_resource->action) {
6435 rte_free(cache_resource);
6436 return rte_flow_error_set(error, ENOMEM,
6437 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6438 NULL, "cannot create action");
6440 rte_atomic32_init(&cache_resource->refcnt);
6441 rte_atomic32_inc(&cache_resource->refcnt);
6442 LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
6443 dev_flow->dv.tag_resource = cache_resource;
6444 DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
6445 (void *)cache_resource,
6446 rte_atomic32_read(&cache_resource->refcnt));
6454 * Pointer to Ethernet device.
6456 * Pointer to mlx5_flow.
6459 * 1 while a reference on it exists, 0 when freed.
6462 flow_dv_tag_release(struct rte_eth_dev *dev,
6463 struct mlx5_flow_dv_tag_resource *tag)
6466 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6467 dev->data->port_id, (void *)tag,
6468 rte_atomic32_read(&tag->refcnt));
6469 if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6470 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6471 LIST_REMOVE(tag, next);
6472 DRV_LOG(DEBUG, "port %u tag %p: removed",
6473 dev->data->port_id, (void *)tag);
6481 * Translate port ID action to vport.
6484 * Pointer to rte_eth_dev structure.
6486 * Pointer to the port ID action.
6487 * @param[out] dst_port_id
6488 * The target port ID.
6490 * Pointer to the error structure.
6493 * 0 on success, a negative errno value otherwise and rte_errno is set.
6496 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6497 const struct rte_flow_action *action,
6498 uint32_t *dst_port_id,
6499 struct rte_flow_error *error)
6502 struct mlx5_priv *priv;
6503 const struct rte_flow_action_port_id *conf =
6504 (const struct rte_flow_action_port_id *)action->conf;
6506 port = conf->original ? dev->data->port_id : conf->id;
6507 priv = mlx5_port_to_eswitch_info(port, false);
6509 return rte_flow_error_set(error, -rte_errno,
6510 RTE_FLOW_ERROR_TYPE_ACTION,
6512 "No eswitch info was found for port");
6513 if (priv->vport_meta_mask)
6514 *dst_port_id = priv->vport_meta_tag;
6516 *dst_port_id = priv->vport_id;
6521 * Add Tx queue matcher
6524 * Pointer to the dev struct.
6525 * @param[in, out] matcher
6527 * @param[in, out] key
6528 * Flow matcher value.
6530 * Flow pattern to translate.
6532 * Item is inner pattern.
6535 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6536 void *matcher, void *key,
6537 const struct rte_flow_item *item)
6539 const struct mlx5_rte_flow_item_tx_queue *queue_m;
6540 const struct mlx5_rte_flow_item_tx_queue *queue_v;
6542 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6544 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6545 struct mlx5_txq_ctrl *txq;
6549 queue_m = (const void *)item->mask;
6552 queue_v = (const void *)item->spec;
6555 txq = mlx5_txq_get(dev, queue_v->queue);
6558 queue = txq->obj->sq->id;
6559 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6560 MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6561 queue & queue_m->queue);
6562 mlx5_txq_release(dev, queue_v->queue);
6566 * Fill the flow with DV spec, lock free
6567 * (mutex should be acquired by caller).
6570 * Pointer to rte_eth_dev structure.
6571 * @param[in, out] dev_flow
6572 * Pointer to the sub flow.
6574 * Pointer to the flow attributes.
6576 * Pointer to the list of items.
6577 * @param[in] actions
6578 * Pointer to the list of actions.
6580 * Pointer to the error structure.
6583 * 0 on success, a negative errno value otherwise and rte_errno is set.
6586 __flow_dv_translate(struct rte_eth_dev *dev,
6587 struct mlx5_flow *dev_flow,
6588 const struct rte_flow_attr *attr,
6589 const struct rte_flow_item items[],
6590 const struct rte_flow_action actions[],
6591 struct rte_flow_error *error)
6593 struct mlx5_priv *priv = dev->data->dev_private;
6594 struct mlx5_dev_config *dev_conf = &priv->config;
6595 struct rte_flow *flow = dev_flow->flow;
6596 uint64_t item_flags = 0;
6597 uint64_t last_item = 0;
6598 uint64_t action_flags = 0;
6599 uint64_t priority = attr->priority;
6600 struct mlx5_flow_dv_matcher matcher = {
6602 .size = sizeof(matcher.mask.buf),
6606 bool actions_end = false;
6607 struct mlx5_flow_dv_modify_hdr_resource mhdr_res = {
6608 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
6609 MLX5DV_FLOW_TABLE_TYPE_NIC_RX
6611 union flow_dv_attr flow_attr = { .attr = 0 };
6612 struct mlx5_flow_dv_tag_resource tag_resource;
6613 uint32_t modify_action_position = UINT32_MAX;
6614 void *match_mask = matcher.mask.buf;
6615 void *match_value = dev_flow->dv.value.buf;
6616 uint8_t next_protocol = 0xff;
6617 struct rte_vlan_hdr vlan = { 0 };
6621 ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
6625 dev_flow->group = table;
6627 mhdr_res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
6628 if (priority == MLX5_FLOW_PRIO_RSVD)
6629 priority = dev_conf->flow_prio - 1;
6630 for (; !actions_end ; actions++) {
6631 const struct rte_flow_action_queue *queue;
6632 const struct rte_flow_action_rss *rss;
6633 const struct rte_flow_action *action = actions;
6634 const struct rte_flow_action_count *count = action->conf;
6635 const uint8_t *rss_key;
6636 const struct rte_flow_action_jump *jump_data;
6637 const struct rte_flow_action_meter *mtr;
6638 struct mlx5_flow_tbl_resource *tbl;
6639 uint32_t port_id = 0;
6640 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
6641 int action_type = actions->type;
6642 const struct rte_flow_action *found_action = NULL;
6644 switch (action_type) {
6645 case RTE_FLOW_ACTION_TYPE_VOID:
6647 case RTE_FLOW_ACTION_TYPE_PORT_ID:
6648 if (flow_dv_translate_action_port_id(dev, action,
6651 port_id_resource.port_id = port_id;
6652 if (flow_dv_port_id_action_resource_register
6653 (dev, &port_id_resource, dev_flow, error))
6655 dev_flow->dv.actions[actions_n++] =
6656 dev_flow->dv.port_id_action->action;
6657 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
6659 case RTE_FLOW_ACTION_TYPE_FLAG:
6660 action_flags |= MLX5_FLOW_ACTION_FLAG;
6661 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6662 struct rte_flow_action_mark mark = {
6663 .id = MLX5_FLOW_MARK_DEFAULT,
6666 if (flow_dv_convert_action_mark(dev, &mark,
6670 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6674 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
6675 if (!dev_flow->dv.tag_resource)
6676 if (flow_dv_tag_resource_register
6677 (dev, &tag_resource, dev_flow, error))
6679 dev_flow->dv.actions[actions_n++] =
6680 dev_flow->dv.tag_resource->action;
6682 case RTE_FLOW_ACTION_TYPE_MARK:
6683 action_flags |= MLX5_FLOW_ACTION_MARK;
6684 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6685 const struct rte_flow_action_mark *mark =
6686 (const struct rte_flow_action_mark *)
6689 if (flow_dv_convert_action_mark(dev, mark,
6693 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6697 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
6698 /* Legacy (non-extensive) MARK action. */
6699 tag_resource.tag = mlx5_flow_mark_set
6700 (((const struct rte_flow_action_mark *)
6701 (actions->conf))->id);
6702 if (!dev_flow->dv.tag_resource)
6703 if (flow_dv_tag_resource_register
6704 (dev, &tag_resource, dev_flow, error))
6706 dev_flow->dv.actions[actions_n++] =
6707 dev_flow->dv.tag_resource->action;
6709 case RTE_FLOW_ACTION_TYPE_SET_META:
6710 if (flow_dv_convert_action_set_meta
6711 (dev, &mhdr_res, attr,
6712 (const struct rte_flow_action_set_meta *)
6713 actions->conf, error))
6715 action_flags |= MLX5_FLOW_ACTION_SET_META;
6717 case RTE_FLOW_ACTION_TYPE_SET_TAG:
6718 if (flow_dv_convert_action_set_tag
6720 (const struct rte_flow_action_set_tag *)
6721 actions->conf, error))
6723 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6725 case RTE_FLOW_ACTION_TYPE_DROP:
6726 action_flags |= MLX5_FLOW_ACTION_DROP;
6728 case RTE_FLOW_ACTION_TYPE_QUEUE:
6729 assert(flow->rss.queue);
6730 queue = actions->conf;
6731 flow->rss.queue_num = 1;
6732 (*flow->rss.queue)[0] = queue->index;
6733 action_flags |= MLX5_FLOW_ACTION_QUEUE;
6735 case RTE_FLOW_ACTION_TYPE_RSS:
6736 assert(flow->rss.queue);
6737 rss = actions->conf;
6738 if (flow->rss.queue)
6739 memcpy((*flow->rss.queue), rss->queue,
6740 rss->queue_num * sizeof(uint16_t));
6741 flow->rss.queue_num = rss->queue_num;
6742 /* NULL RSS key indicates default RSS key. */
6743 rss_key = !rss->key ? rss_hash_default_key : rss->key;
6744 memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
6746 * rss->level and rss.types should be set in advance
6747 * when expanding items for RSS.
6749 action_flags |= MLX5_FLOW_ACTION_RSS;
6751 case RTE_FLOW_ACTION_TYPE_COUNT:
6752 if (!dev_conf->devx) {
6753 rte_errno = ENOTSUP;
6756 flow->counter = flow_dv_counter_alloc(dev,
6760 if (flow->counter == NULL)
6762 dev_flow->dv.actions[actions_n++] =
6763 flow->counter->action;
6764 action_flags |= MLX5_FLOW_ACTION_COUNT;
6767 if (rte_errno == ENOTSUP)
6768 return rte_flow_error_set
6770 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6772 "count action not supported");
6774 return rte_flow_error_set
6776 RTE_FLOW_ERROR_TYPE_ACTION,
6778 "cannot create counter"
6781 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
6782 dev_flow->dv.actions[actions_n++] =
6783 priv->sh->pop_vlan_action;
6784 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
6786 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
6787 flow_dev_get_vlan_info_from_items(items, &vlan);
6788 vlan.eth_proto = rte_be_to_cpu_16
6789 ((((const struct rte_flow_action_of_push_vlan *)
6790 actions->conf)->ethertype));
6791 found_action = mlx5_flow_find_action
6793 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
6795 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6796 found_action = mlx5_flow_find_action
6798 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
6800 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6801 if (flow_dv_create_action_push_vlan
6802 (dev, attr, &vlan, dev_flow, error))
6804 dev_flow->dv.actions[actions_n++] =
6805 dev_flow->dv.push_vlan_res->action;
6806 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
6808 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
6809 /* of_vlan_push action handled this action */
6810 assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
6812 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
6813 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6815 flow_dev_get_vlan_info_from_items(items, &vlan);
6816 mlx5_update_vlan_vid_pcp(actions, &vlan);
6817 /* If no VLAN push - this is a modify header action */
6818 if (flow_dv_convert_action_modify_vlan_vid
6819 (&mhdr_res, actions, error))
6821 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
6823 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
6824 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
6825 if (flow_dv_create_action_l2_encap(dev, actions,
6830 dev_flow->dv.actions[actions_n++] =
6831 dev_flow->dv.encap_decap->verbs_action;
6832 action_flags |= actions->type ==
6833 RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
6834 MLX5_FLOW_ACTION_VXLAN_ENCAP :
6835 MLX5_FLOW_ACTION_NVGRE_ENCAP;
6837 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
6838 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
6839 if (flow_dv_create_action_l2_decap(dev, dev_flow,
6843 dev_flow->dv.actions[actions_n++] =
6844 dev_flow->dv.encap_decap->verbs_action;
6845 action_flags |= actions->type ==
6846 RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
6847 MLX5_FLOW_ACTION_VXLAN_DECAP :
6848 MLX5_FLOW_ACTION_NVGRE_DECAP;
6850 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
6851 /* Handle encap with preceding decap. */
6852 if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
6853 if (flow_dv_create_action_raw_encap
6854 (dev, actions, dev_flow, attr, error))
6856 dev_flow->dv.actions[actions_n++] =
6857 dev_flow->dv.encap_decap->verbs_action;
6859 /* Handle encap without preceding decap. */
6860 if (flow_dv_create_action_l2_encap
6861 (dev, actions, dev_flow, attr->transfer,
6864 dev_flow->dv.actions[actions_n++] =
6865 dev_flow->dv.encap_decap->verbs_action;
6867 action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
6869 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
6870 /* Check if this decap is followed by encap. */
6871 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
6872 action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
6875 /* Handle decap only if it isn't followed by encap. */
6876 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
6877 if (flow_dv_create_action_l2_decap
6878 (dev, dev_flow, attr->transfer, error))
6880 dev_flow->dv.actions[actions_n++] =
6881 dev_flow->dv.encap_decap->verbs_action;
6883 /* If decap is followed by encap, handle it at encap. */
6884 action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
6886 case RTE_FLOW_ACTION_TYPE_JUMP:
6887 jump_data = action->conf;
6888 ret = mlx5_flow_group_to_table(attr, dev_flow->external,
6889 jump_data->group, &table,
6893 tbl = flow_dv_tbl_resource_get(dev, table,
6895 attr->transfer, error);
6897 return rte_flow_error_set
6899 RTE_FLOW_ERROR_TYPE_ACTION,
6901 "cannot create jump action.");
6902 if (flow_dv_jump_tbl_resource_register
6903 (dev, tbl, dev_flow, error)) {
6904 flow_dv_tbl_resource_release(dev, tbl);
6905 return rte_flow_error_set
6907 RTE_FLOW_ERROR_TYPE_ACTION,
6909 "cannot create jump action.");
6911 dev_flow->dv.actions[actions_n++] =
6912 dev_flow->dv.jump->action;
6913 action_flags |= MLX5_FLOW_ACTION_JUMP;
6915 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
6916 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
6917 if (flow_dv_convert_action_modify_mac
6918 (&mhdr_res, actions, error))
6920 action_flags |= actions->type ==
6921 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
6922 MLX5_FLOW_ACTION_SET_MAC_SRC :
6923 MLX5_FLOW_ACTION_SET_MAC_DST;
6925 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
6926 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
6927 if (flow_dv_convert_action_modify_ipv4
6928 (&mhdr_res, actions, error))
6930 action_flags |= actions->type ==
6931 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
6932 MLX5_FLOW_ACTION_SET_IPV4_SRC :
6933 MLX5_FLOW_ACTION_SET_IPV4_DST;
6935 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
6936 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
6937 if (flow_dv_convert_action_modify_ipv6
6938 (&mhdr_res, actions, error))
6940 action_flags |= actions->type ==
6941 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
6942 MLX5_FLOW_ACTION_SET_IPV6_SRC :
6943 MLX5_FLOW_ACTION_SET_IPV6_DST;
6945 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
6946 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
6947 if (flow_dv_convert_action_modify_tp
6948 (&mhdr_res, actions, items,
6951 action_flags |= actions->type ==
6952 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
6953 MLX5_FLOW_ACTION_SET_TP_SRC :
6954 MLX5_FLOW_ACTION_SET_TP_DST;
6956 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
6957 if (flow_dv_convert_action_modify_dec_ttl
6958 (&mhdr_res, items, &flow_attr, error))
6960 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
6962 case RTE_FLOW_ACTION_TYPE_SET_TTL:
6963 if (flow_dv_convert_action_modify_ttl
6964 (&mhdr_res, actions, items,
6967 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
6969 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
6970 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
6971 if (flow_dv_convert_action_modify_tcp_seq
6972 (&mhdr_res, actions, error))
6974 action_flags |= actions->type ==
6975 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
6976 MLX5_FLOW_ACTION_INC_TCP_SEQ :
6977 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
6980 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
6981 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
6982 if (flow_dv_convert_action_modify_tcp_ack
6983 (&mhdr_res, actions, error))
6985 action_flags |= actions->type ==
6986 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
6987 MLX5_FLOW_ACTION_INC_TCP_ACK :
6988 MLX5_FLOW_ACTION_DEC_TCP_ACK;
6990 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
6991 if (flow_dv_convert_action_set_reg
6992 (&mhdr_res, actions, error))
6994 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6996 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
6997 if (flow_dv_convert_action_copy_mreg
6998 (dev, &mhdr_res, actions, error))
7000 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7002 case RTE_FLOW_ACTION_TYPE_METER:
7003 mtr = actions->conf;
7005 flow->meter = mlx5_flow_meter_attach(priv,
7009 return rte_flow_error_set(error,
7011 RTE_FLOW_ERROR_TYPE_ACTION,
7014 "or invalid parameters");
7016 /* Set the meter action. */
7017 dev_flow->dv.actions[actions_n++] =
7018 flow->meter->mfts->meter_action;
7019 action_flags |= MLX5_FLOW_ACTION_METER;
7021 case RTE_FLOW_ACTION_TYPE_END:
7023 if (mhdr_res.actions_num) {
7024 /* create modify action if needed. */
7025 if (flow_dv_modify_hdr_resource_register
7026 (dev, &mhdr_res, dev_flow, error))
7028 dev_flow->dv.actions[modify_action_position] =
7029 dev_flow->dv.modify_hdr->verbs_action;
7035 if (mhdr_res.actions_num &&
7036 modify_action_position == UINT32_MAX)
7037 modify_action_position = actions_n++;
7039 dev_flow->dv.actions_n = actions_n;
7040 dev_flow->actions = action_flags;
7041 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7042 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7043 int item_type = items->type;
7045 switch (item_type) {
7046 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7047 flow_dv_translate_item_port_id(dev, match_mask,
7048 match_value, items);
7049 last_item = MLX5_FLOW_ITEM_PORT_ID;
7051 case RTE_FLOW_ITEM_TYPE_ETH:
7052 flow_dv_translate_item_eth(match_mask, match_value,
7054 matcher.priority = MLX5_PRIORITY_MAP_L2;
7055 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7056 MLX5_FLOW_LAYER_OUTER_L2;
7058 case RTE_FLOW_ITEM_TYPE_VLAN:
7059 flow_dv_translate_item_vlan(dev_flow,
7060 match_mask, match_value,
7062 matcher.priority = MLX5_PRIORITY_MAP_L2;
7063 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7064 MLX5_FLOW_LAYER_INNER_VLAN) :
7065 (MLX5_FLOW_LAYER_OUTER_L2 |
7066 MLX5_FLOW_LAYER_OUTER_VLAN);
7068 case RTE_FLOW_ITEM_TYPE_IPV4:
7069 mlx5_flow_tunnel_ip_check(items, next_protocol,
7070 &item_flags, &tunnel);
7071 flow_dv_translate_item_ipv4(match_mask, match_value,
7074 matcher.priority = MLX5_PRIORITY_MAP_L3;
7075 dev_flow->hash_fields |=
7076 mlx5_flow_hashfields_adjust
7078 MLX5_IPV4_LAYER_TYPES,
7079 MLX5_IPV4_IBV_RX_HASH);
7080 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7081 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7082 if (items->mask != NULL &&
7083 ((const struct rte_flow_item_ipv4 *)
7084 items->mask)->hdr.next_proto_id) {
7086 ((const struct rte_flow_item_ipv4 *)
7087 (items->spec))->hdr.next_proto_id;
7089 ((const struct rte_flow_item_ipv4 *)
7090 (items->mask))->hdr.next_proto_id;
7092 /* Reset for inner layer. */
7093 next_protocol = 0xff;
7096 case RTE_FLOW_ITEM_TYPE_IPV6:
7097 mlx5_flow_tunnel_ip_check(items, next_protocol,
7098 &item_flags, &tunnel);
7099 flow_dv_translate_item_ipv6(match_mask, match_value,
7102 matcher.priority = MLX5_PRIORITY_MAP_L3;
7103 dev_flow->hash_fields |=
7104 mlx5_flow_hashfields_adjust
7106 MLX5_IPV6_LAYER_TYPES,
7107 MLX5_IPV6_IBV_RX_HASH);
7108 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7109 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7110 if (items->mask != NULL &&
7111 ((const struct rte_flow_item_ipv6 *)
7112 items->mask)->hdr.proto) {
7114 ((const struct rte_flow_item_ipv6 *)
7115 items->spec)->hdr.proto;
7117 ((const struct rte_flow_item_ipv6 *)
7118 items->mask)->hdr.proto;
7120 /* Reset for inner layer. */
7121 next_protocol = 0xff;
7124 case RTE_FLOW_ITEM_TYPE_TCP:
7125 flow_dv_translate_item_tcp(match_mask, match_value,
7127 matcher.priority = MLX5_PRIORITY_MAP_L4;
7128 dev_flow->hash_fields |=
7129 mlx5_flow_hashfields_adjust
7130 (dev_flow, tunnel, ETH_RSS_TCP,
7131 IBV_RX_HASH_SRC_PORT_TCP |
7132 IBV_RX_HASH_DST_PORT_TCP);
7133 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7134 MLX5_FLOW_LAYER_OUTER_L4_TCP;
7136 case RTE_FLOW_ITEM_TYPE_UDP:
7137 flow_dv_translate_item_udp(match_mask, match_value,
7139 matcher.priority = MLX5_PRIORITY_MAP_L4;
7140 dev_flow->hash_fields |=
7141 mlx5_flow_hashfields_adjust
7142 (dev_flow, tunnel, ETH_RSS_UDP,
7143 IBV_RX_HASH_SRC_PORT_UDP |
7144 IBV_RX_HASH_DST_PORT_UDP);
7145 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7146 MLX5_FLOW_LAYER_OUTER_L4_UDP;
7148 case RTE_FLOW_ITEM_TYPE_GRE:
7149 flow_dv_translate_item_gre(match_mask, match_value,
7151 last_item = MLX5_FLOW_LAYER_GRE;
7153 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7154 flow_dv_translate_item_gre_key(match_mask,
7155 match_value, items);
7156 last_item = MLX5_FLOW_LAYER_GRE_KEY;
7158 case RTE_FLOW_ITEM_TYPE_NVGRE:
7159 flow_dv_translate_item_nvgre(match_mask, match_value,
7161 last_item = MLX5_FLOW_LAYER_GRE;
7163 case RTE_FLOW_ITEM_TYPE_VXLAN:
7164 flow_dv_translate_item_vxlan(match_mask, match_value,
7166 last_item = MLX5_FLOW_LAYER_VXLAN;
7168 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7169 flow_dv_translate_item_vxlan(match_mask, match_value,
7171 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7173 case RTE_FLOW_ITEM_TYPE_GENEVE:
7174 flow_dv_translate_item_geneve(match_mask, match_value,
7176 last_item = MLX5_FLOW_LAYER_GENEVE;
7178 case RTE_FLOW_ITEM_TYPE_MPLS:
7179 flow_dv_translate_item_mpls(match_mask, match_value,
7180 items, last_item, tunnel);
7181 last_item = MLX5_FLOW_LAYER_MPLS;
7183 case RTE_FLOW_ITEM_TYPE_MARK:
7184 flow_dv_translate_item_mark(dev, match_mask,
7185 match_value, items);
7186 last_item = MLX5_FLOW_ITEM_MARK;
7188 case RTE_FLOW_ITEM_TYPE_META:
7189 flow_dv_translate_item_meta(dev, match_mask,
7190 match_value, attr, items);
7191 last_item = MLX5_FLOW_ITEM_METADATA;
7193 case RTE_FLOW_ITEM_TYPE_ICMP:
7194 flow_dv_translate_item_icmp(match_mask, match_value,
7196 last_item = MLX5_FLOW_LAYER_ICMP;
7198 case RTE_FLOW_ITEM_TYPE_ICMP6:
7199 flow_dv_translate_item_icmp6(match_mask, match_value,
7201 last_item = MLX5_FLOW_LAYER_ICMP6;
7203 case RTE_FLOW_ITEM_TYPE_TAG:
7204 flow_dv_translate_item_tag(dev, match_mask,
7205 match_value, items);
7206 last_item = MLX5_FLOW_ITEM_TAG;
7208 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7209 flow_dv_translate_mlx5_item_tag(match_mask,
7210 match_value, items);
7211 last_item = MLX5_FLOW_ITEM_TAG;
7213 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7214 flow_dv_translate_item_tx_queue(dev, match_mask,
7217 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7222 item_flags |= last_item;
7225 * In case of ingress traffic when E-Switch mode is enabled,
7226 * we have two cases where we need to set the source port manually.
7227 * The first one, is in case of Nic steering rule, and the second is
7228 * E-Switch rule where no port_id item was found. In both cases
7229 * the source port is set according the current port in use.
7231 if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7232 (priv->representor || priv->master)) {
7233 if (flow_dv_translate_item_port_id(dev, match_mask,
7237 assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7238 dev_flow->dv.value.buf));
7239 dev_flow->layers = item_flags;
7240 /* Register matcher. */
7241 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7243 matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7245 matcher.egress = attr->egress;
7246 matcher.group = dev_flow->group;
7247 matcher.transfer = attr->transfer;
7248 if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
7254 * Apply the flow to the NIC, lock free,
7255 * (mutex should be acquired by caller).
7258 * Pointer to the Ethernet device structure.
7259 * @param[in, out] flow
7260 * Pointer to flow structure.
7262 * Pointer to error structure.
7265 * 0 on success, a negative errno value otherwise and rte_errno is set.
7268 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7269 struct rte_flow_error *error)
7271 struct mlx5_flow_dv *dv;
7272 struct mlx5_flow *dev_flow;
7273 struct mlx5_priv *priv = dev->data->dev_private;
7277 LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7280 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7281 if (dev_flow->transfer) {
7282 dv->actions[n++] = priv->sh->esw_drop_action;
7284 dv->hrxq = mlx5_hrxq_drop_new(dev);
7288 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7290 "cannot get drop hash queue");
7293 dv->actions[n++] = dv->hrxq->action;
7295 } else if (dev_flow->actions &
7296 (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7297 struct mlx5_hrxq *hrxq;
7299 assert(flow->rss.queue);
7300 hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7301 MLX5_RSS_HASH_KEY_LEN,
7302 dev_flow->hash_fields,
7304 flow->rss.queue_num);
7306 hrxq = mlx5_hrxq_new
7307 (dev, flow->rss.key,
7308 MLX5_RSS_HASH_KEY_LEN,
7309 dev_flow->hash_fields,
7311 flow->rss.queue_num,
7312 !!(dev_flow->layers &
7313 MLX5_FLOW_LAYER_TUNNEL));
7318 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7319 "cannot get hash queue");
7323 dv->actions[n++] = dv->hrxq->action;
7326 mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7327 (void *)&dv->value, n,
7330 rte_flow_error_set(error, errno,
7331 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7333 "hardware refuses to create flow");
7336 if (priv->vmwa_context &&
7337 dev_flow->dv.vf_vlan.tag &&
7338 !dev_flow->dv.vf_vlan.created) {
7340 * The rule contains the VLAN pattern.
7341 * For VF we are going to create VLAN
7342 * interface to make hypervisor set correct
7343 * e-Switch vport context.
7345 mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7350 err = rte_errno; /* Save rte_errno before cleanup. */
7351 LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7352 struct mlx5_flow_dv *dv = &dev_flow->dv;
7354 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7355 mlx5_hrxq_drop_release(dev);
7357 mlx5_hrxq_release(dev, dv->hrxq);
7360 if (dev_flow->dv.vf_vlan.tag &&
7361 dev_flow->dv.vf_vlan.created)
7362 mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7364 rte_errno = err; /* Restore rte_errno. */
7369 * Release the flow matcher.
7372 * Pointer to Ethernet device.
7374 * Pointer to mlx5_flow.
7377 * 1 while a reference on it exists, 0 when freed.
7380 flow_dv_matcher_release(struct rte_eth_dev *dev,
7381 struct mlx5_flow *flow)
7383 struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7384 struct mlx5_priv *priv = dev->data->dev_private;
7385 struct mlx5_ibv_shared *sh = priv->sh;
7386 struct mlx5_flow_tbl_data_entry *tbl_data;
7388 assert(matcher->matcher_object);
7389 DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7390 dev->data->port_id, (void *)matcher,
7391 rte_atomic32_read(&matcher->refcnt));
7392 if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7393 struct mlx5_hlist_entry *pos;
7394 union mlx5_flow_tbl_key table_key = {
7396 .table_id = matcher->group,
7398 .domain = !!matcher->transfer,
7399 .direction = !!matcher->egress,
7402 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7403 (matcher->matcher_object));
7404 LIST_REMOVE(matcher, next);
7405 pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
7407 tbl_data = container_of(pos,
7408 struct mlx5_flow_tbl_data_entry, entry);
7409 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7412 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7413 dev->data->port_id, (void *)matcher);
7420 * Release an encap/decap resource.
7423 * Pointer to mlx5_flow.
7426 * 1 while a reference on it exists, 0 when freed.
7429 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7431 struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7432 flow->dv.encap_decap;
7434 assert(cache_resource->verbs_action);
7435 DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7436 (void *)cache_resource,
7437 rte_atomic32_read(&cache_resource->refcnt));
7438 if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7439 claim_zero(mlx5_glue->destroy_flow_action
7440 (cache_resource->verbs_action));
7441 LIST_REMOVE(cache_resource, next);
7442 rte_free(cache_resource);
7443 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7444 (void *)cache_resource);
7451 * Release an jump to table action resource.
7454 * Pointer to Ethernet device.
7456 * Pointer to mlx5_flow.
7459 * 1 while a reference on it exists, 0 when freed.
7462 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7463 struct mlx5_flow *flow)
7465 struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7466 struct mlx5_flow_tbl_data_entry *tbl_data =
7467 container_of(cache_resource,
7468 struct mlx5_flow_tbl_data_entry, jump);
7470 assert(cache_resource->action);
7471 DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7472 (void *)cache_resource,
7473 rte_atomic32_read(&cache_resource->refcnt));
7474 if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7475 claim_zero(mlx5_glue->destroy_flow_action
7476 (cache_resource->action));
7477 /* jump action memory free is inside the table release. */
7478 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7479 DRV_LOG(DEBUG, "jump table resource %p: removed",
7480 (void *)cache_resource);
7487 * Release a modify-header resource.
7490 * Pointer to mlx5_flow.
7493 * 1 while a reference on it exists, 0 when freed.
7496 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7498 struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7499 flow->dv.modify_hdr;
7501 assert(cache_resource->verbs_action);
7502 DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7503 (void *)cache_resource,
7504 rte_atomic32_read(&cache_resource->refcnt));
7505 if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7506 claim_zero(mlx5_glue->destroy_flow_action
7507 (cache_resource->verbs_action));
7508 LIST_REMOVE(cache_resource, next);
7509 rte_free(cache_resource);
7510 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7511 (void *)cache_resource);
7518 * Release port ID action resource.
7521 * Pointer to mlx5_flow.
7524 * 1 while a reference on it exists, 0 when freed.
7527 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7529 struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7530 flow->dv.port_id_action;
7532 assert(cache_resource->action);
7533 DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7534 (void *)cache_resource,
7535 rte_atomic32_read(&cache_resource->refcnt));
7536 if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7537 claim_zero(mlx5_glue->destroy_flow_action
7538 (cache_resource->action));
7539 LIST_REMOVE(cache_resource, next);
7540 rte_free(cache_resource);
7541 DRV_LOG(DEBUG, "port id action resource %p: removed",
7542 (void *)cache_resource);
7549 * Release push vlan action resource.
7552 * Pointer to mlx5_flow.
7555 * 1 while a reference on it exists, 0 when freed.
7558 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7560 struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7561 flow->dv.push_vlan_res;
7563 assert(cache_resource->action);
7564 DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7565 (void *)cache_resource,
7566 rte_atomic32_read(&cache_resource->refcnt));
7567 if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7568 claim_zero(mlx5_glue->destroy_flow_action
7569 (cache_resource->action));
7570 LIST_REMOVE(cache_resource, next);
7571 rte_free(cache_resource);
7572 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7573 (void *)cache_resource);
7580 * Remove the flow from the NIC but keeps it in memory.
7581 * Lock free, (mutex should be acquired by caller).
7584 * Pointer to Ethernet device.
7585 * @param[in, out] flow
7586 * Pointer to flow structure.
7589 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7591 struct mlx5_flow_dv *dv;
7592 struct mlx5_flow *dev_flow;
7596 LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7599 claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7603 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7604 mlx5_hrxq_drop_release(dev);
7606 mlx5_hrxq_release(dev, dv->hrxq);
7609 if (dev_flow->dv.vf_vlan.tag &&
7610 dev_flow->dv.vf_vlan.created)
7611 mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7616 * Remove the flow from the NIC and the memory.
7617 * Lock free, (mutex should be acquired by caller).
7620 * Pointer to the Ethernet device structure.
7621 * @param[in, out] flow
7622 * Pointer to flow structure.
7625 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7627 struct mlx5_flow *dev_flow;
7631 __flow_dv_remove(dev, flow);
7632 if (flow->counter) {
7633 flow_dv_counter_release(dev, flow->counter);
7634 flow->counter = NULL;
7637 mlx5_flow_meter_detach(flow->meter);
7640 while (!LIST_EMPTY(&flow->dev_flows)) {
7641 dev_flow = LIST_FIRST(&flow->dev_flows);
7642 LIST_REMOVE(dev_flow, next);
7643 if (dev_flow->dv.matcher)
7644 flow_dv_matcher_release(dev, dev_flow);
7645 if (dev_flow->dv.encap_decap)
7646 flow_dv_encap_decap_resource_release(dev_flow);
7647 if (dev_flow->dv.modify_hdr)
7648 flow_dv_modify_hdr_resource_release(dev_flow);
7649 if (dev_flow->dv.jump)
7650 flow_dv_jump_tbl_resource_release(dev, dev_flow);
7651 if (dev_flow->dv.port_id_action)
7652 flow_dv_port_id_action_resource_release(dev_flow);
7653 if (dev_flow->dv.push_vlan_res)
7654 flow_dv_push_vlan_action_resource_release(dev_flow);
7655 if (dev_flow->dv.tag_resource)
7656 flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
7662 * Query a dv flow rule for its statistics via devx.
7665 * Pointer to Ethernet device.
7667 * Pointer to the sub flow.
7669 * data retrieved by the query.
7671 * Perform verbose error reporting if not NULL.
7674 * 0 on success, a negative errno value otherwise and rte_errno is set.
7677 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
7678 void *data, struct rte_flow_error *error)
7680 struct mlx5_priv *priv = dev->data->dev_private;
7681 struct rte_flow_query_count *qc = data;
7683 if (!priv->config.devx)
7684 return rte_flow_error_set(error, ENOTSUP,
7685 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7687 "counters are not supported");
7688 if (flow->counter) {
7689 uint64_t pkts, bytes;
7690 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
7694 return rte_flow_error_set(error, -err,
7695 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7696 NULL, "cannot read counters");
7699 qc->hits = pkts - flow->counter->hits;
7700 qc->bytes = bytes - flow->counter->bytes;
7702 flow->counter->hits = pkts;
7703 flow->counter->bytes = bytes;
7707 return rte_flow_error_set(error, EINVAL,
7708 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7710 "counters are not available");
7716 * @see rte_flow_query()
7720 flow_dv_query(struct rte_eth_dev *dev,
7721 struct rte_flow *flow __rte_unused,
7722 const struct rte_flow_action *actions __rte_unused,
7723 void *data __rte_unused,
7724 struct rte_flow_error *error __rte_unused)
7728 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7729 switch (actions->type) {
7730 case RTE_FLOW_ACTION_TYPE_VOID:
7732 case RTE_FLOW_ACTION_TYPE_COUNT:
7733 ret = flow_dv_query_count(dev, flow, data, error);
7736 return rte_flow_error_set(error, ENOTSUP,
7737 RTE_FLOW_ERROR_TYPE_ACTION,
7739 "action not supported");
7746 * Destroy the meter table set.
7747 * Lock free, (mutex should be acquired by caller).
7750 * Pointer to Ethernet device.
7752 * Pointer to the meter table set.
7758 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
7759 struct mlx5_meter_domains_infos *tbl)
7761 struct mlx5_priv *priv = dev->data->dev_private;
7762 struct mlx5_meter_domains_infos *mtd =
7763 (struct mlx5_meter_domains_infos *)tbl;
7765 if (!mtd || !priv->config.dv_flow_en)
7767 if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
7768 claim_zero(mlx5_glue->dv_destroy_flow
7769 (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
7770 if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
7771 claim_zero(mlx5_glue->dv_destroy_flow
7772 (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
7773 if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
7774 claim_zero(mlx5_glue->dv_destroy_flow
7775 (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
7776 if (mtd->egress.color_matcher)
7777 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7778 (mtd->egress.color_matcher));
7779 if (mtd->egress.any_matcher)
7780 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7781 (mtd->egress.any_matcher));
7782 if (mtd->egress.tbl)
7783 claim_zero(flow_dv_tbl_resource_release(dev,
7785 if (mtd->ingress.color_matcher)
7786 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7787 (mtd->ingress.color_matcher));
7788 if (mtd->ingress.any_matcher)
7789 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7790 (mtd->ingress.any_matcher));
7791 if (mtd->ingress.tbl)
7792 claim_zero(flow_dv_tbl_resource_release(dev,
7794 if (mtd->transfer.color_matcher)
7795 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7796 (mtd->transfer.color_matcher));
7797 if (mtd->transfer.any_matcher)
7798 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7799 (mtd->transfer.any_matcher));
7800 if (mtd->transfer.tbl)
7801 claim_zero(flow_dv_tbl_resource_release(dev,
7802 mtd->transfer.tbl));
7804 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
7809 /* Number of meter flow actions, count and jump or count and drop. */
7810 #define METER_ACTIONS 2
7813 * Create specify domain meter table and suffix table.
7816 * Pointer to Ethernet device.
7817 * @param[in,out] mtb
7818 * Pointer to DV meter table set.
7821 * @param[in] transfer
7823 * @param[in] color_reg_c_idx
7824 * Reg C index for color match.
7827 * 0 on success, -1 otherwise and rte_errno is set.
7830 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
7831 struct mlx5_meter_domains_infos *mtb,
7832 uint8_t egress, uint8_t transfer,
7833 uint32_t color_reg_c_idx)
7835 struct mlx5_priv *priv = dev->data->dev_private;
7836 struct mlx5_ibv_shared *sh = priv->sh;
7837 struct mlx5_flow_dv_match_params mask = {
7838 .size = sizeof(mask.buf),
7840 struct mlx5_flow_dv_match_params value = {
7841 .size = sizeof(value.buf),
7843 struct mlx5dv_flow_matcher_attr dv_attr = {
7844 .type = IBV_FLOW_ATTR_NORMAL,
7846 .match_criteria_enable = 0,
7847 .match_mask = (void *)&mask,
7849 void *actions[METER_ACTIONS];
7850 struct mlx5_flow_tbl_resource **sfx_tbl;
7851 struct mlx5_meter_domain_info *dtb;
7852 struct rte_flow_error error;
7856 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
7857 dtb = &mtb->transfer;
7858 } else if (egress) {
7859 sfx_tbl = &sh->tx_mtr_sfx_tbl;
7862 sfx_tbl = &sh->rx_mtr_sfx_tbl;
7863 dtb = &mtb->ingress;
7865 /* If the suffix table in missing, create it. */
7867 *sfx_tbl = flow_dv_tbl_resource_get(dev,
7868 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
7869 egress, transfer, &error);
7871 DRV_LOG(ERR, "Failed to create meter suffix table.");
7875 /* Create the meter table with METER level. */
7876 dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
7877 egress, transfer, &error);
7879 DRV_LOG(ERR, "Failed to create meter policer table.");
7882 /* Create matchers, Any and Color. */
7883 dv_attr.priority = 3;
7884 dv_attr.match_criteria_enable = 0;
7885 dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7888 if (!dtb->any_matcher) {
7889 DRV_LOG(ERR, "Failed to create meter"
7890 " policer default matcher.");
7893 dv_attr.priority = 0;
7894 dv_attr.match_criteria_enable =
7895 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7896 flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
7897 rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
7898 dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7901 if (!dtb->color_matcher) {
7902 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
7905 if (mtb->count_actns[RTE_MTR_DROPPED])
7906 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
7907 actions[i++] = mtb->drop_actn;
7908 /* Default rule: lowest priority, match any, actions: drop. */
7909 dtb->policer_rules[RTE_MTR_DROPPED] =
7910 mlx5_glue->dv_create_flow(dtb->any_matcher,
7911 (void *)&value, i, actions);
7912 if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
7913 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
7922 * Create the needed meter and suffix tables.
7923 * Lock free, (mutex should be acquired by caller).
7926 * Pointer to Ethernet device.
7928 * Pointer to the flow meter.
7931 * Pointer to table set on success, NULL otherwise and rte_errno is set.
7933 static struct mlx5_meter_domains_infos *
7934 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
7935 const struct mlx5_flow_meter *fm)
7937 struct mlx5_priv *priv = dev->data->dev_private;
7938 struct mlx5_meter_domains_infos *mtb;
7942 if (!priv->mtr_en) {
7943 rte_errno = ENOTSUP;
7946 mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
7948 DRV_LOG(ERR, "Failed to allocate memory for meter.");
7951 /* Create meter count actions */
7952 for (i = 0; i <= RTE_MTR_DROPPED; i++) {
7953 if (!fm->policer_stats.cnt[i])
7955 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
7957 /* Create drop action. */
7958 mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
7959 if (!mtb->drop_actn) {
7960 DRV_LOG(ERR, "Failed to create drop action.");
7963 /* Egress meter table. */
7964 ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
7966 DRV_LOG(ERR, "Failed to prepare egress meter table.");
7969 /* Ingress meter table. */
7970 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
7972 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
7975 /* FDB meter table. */
7976 if (priv->config.dv_esw_en) {
7977 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
7978 priv->mtr_color_reg);
7980 DRV_LOG(ERR, "Failed to prepare fdb meter table.");
7986 flow_dv_destroy_mtr_tbl(dev, mtb);
7991 * Destroy domain policer rule.
7994 * Pointer to domain table.
7997 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8001 for (i = 0; i < RTE_MTR_DROPPED; i++) {
8002 if (dt->policer_rules[i]) {
8003 claim_zero(mlx5_glue->dv_destroy_flow
8004 (dt->policer_rules[i]));
8005 dt->policer_rules[i] = NULL;
8008 if (dt->jump_actn) {
8009 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8010 dt->jump_actn = NULL;
8015 * Destroy policer rules.
8018 * Pointer to Ethernet device.
8020 * Pointer to flow meter structure.
8022 * Pointer to flow attributes.
8028 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8029 const struct mlx5_flow_meter *fm,
8030 const struct rte_flow_attr *attr)
8032 struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8037 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8039 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8041 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8046 * Create specify domain meter policer rule.
8049 * Pointer to flow meter structure.
8051 * Pointer to DV meter table set.
8053 * Pointer to suffix table.
8054 * @param[in] mtr_reg_c
8055 * Color match REG_C.
8058 * 0 on success, -1 otherwise.
8061 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8062 struct mlx5_meter_domain_info *dtb,
8063 struct mlx5_flow_tbl_resource *sfx_tb,
8066 struct mlx5_flow_dv_match_params matcher = {
8067 .size = sizeof(matcher.buf),
8069 struct mlx5_flow_dv_match_params value = {
8070 .size = sizeof(value.buf),
8072 struct mlx5_meter_domains_infos *mtb = fm->mfts;
8073 void *actions[METER_ACTIONS];
8076 /* Create jump action. */
8079 if (!dtb->jump_actn)
8081 mlx5_glue->dr_create_flow_action_dest_flow_tbl
8083 if (!dtb->jump_actn) {
8084 DRV_LOG(ERR, "Failed to create policer jump action.");
8087 for (i = 0; i < RTE_MTR_DROPPED; i++) {
8090 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8091 rte_col_2_mlx5_col(i), UINT32_MAX);
8092 if (mtb->count_actns[i])
8093 actions[j++] = mtb->count_actns[i];
8094 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8095 actions[j++] = mtb->drop_actn;
8097 actions[j++] = dtb->jump_actn;
8098 dtb->policer_rules[i] =
8099 mlx5_glue->dv_create_flow(dtb->color_matcher,
8102 if (!dtb->policer_rules[i]) {
8103 DRV_LOG(ERR, "Failed to create policer rule.");
8114 * Create policer rules.
8117 * Pointer to Ethernet device.
8119 * Pointer to flow meter structure.
8121 * Pointer to flow attributes.
8124 * 0 on success, -1 otherwise.
8127 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8128 struct mlx5_flow_meter *fm,
8129 const struct rte_flow_attr *attr)
8131 struct mlx5_priv *priv = dev->data->dev_private;
8132 struct mlx5_meter_domains_infos *mtb = fm->mfts;
8136 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8137 priv->sh->tx_mtr_sfx_tbl,
8138 priv->mtr_color_reg);
8140 DRV_LOG(ERR, "Failed to create egress policer.");
8144 if (attr->ingress) {
8145 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8146 priv->sh->rx_mtr_sfx_tbl,
8147 priv->mtr_color_reg);
8149 DRV_LOG(ERR, "Failed to create ingress policer.");
8153 if (attr->transfer) {
8154 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8155 priv->sh->fdb_mtr_sfx_tbl,
8156 priv->mtr_color_reg);
8158 DRV_LOG(ERR, "Failed to create transfer policer.");
8164 flow_dv_destroy_policer_rules(dev, fm, attr);
8169 * Query a devx counter.
8172 * Pointer to the Ethernet device structure.
8174 * Pointer to the flow counter.
8176 * Set to clear the counter statistics.
8178 * The statistics value of packets.
8180 * The statistics value of bytes.
8183 * 0 on success, otherwise return -1.
8186 flow_dv_counter_query(struct rte_eth_dev *dev,
8187 struct mlx5_flow_counter *cnt, bool clear,
8188 uint64_t *pkts, uint64_t *bytes)
8190 struct mlx5_priv *priv = dev->data->dev_private;
8191 uint64_t inn_pkts, inn_bytes;
8194 if (!priv->config.devx)
8196 ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8199 *pkts = inn_pkts - cnt->hits;
8200 *bytes = inn_bytes - cnt->bytes;
8202 cnt->hits = inn_pkts;
8203 cnt->bytes = inn_bytes;
8209 * Mutex-protected thunk to lock-free __flow_dv_translate().
8212 flow_dv_translate(struct rte_eth_dev *dev,
8213 struct mlx5_flow *dev_flow,
8214 const struct rte_flow_attr *attr,
8215 const struct rte_flow_item items[],
8216 const struct rte_flow_action actions[],
8217 struct rte_flow_error *error)
8221 flow_dv_shared_lock(dev);
8222 ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8223 flow_dv_shared_unlock(dev);
8228 * Mutex-protected thunk to lock-free __flow_dv_apply().
8231 flow_dv_apply(struct rte_eth_dev *dev,
8232 struct rte_flow *flow,
8233 struct rte_flow_error *error)
8237 flow_dv_shared_lock(dev);
8238 ret = __flow_dv_apply(dev, flow, error);
8239 flow_dv_shared_unlock(dev);
8244 * Mutex-protected thunk to lock-free __flow_dv_remove().
8247 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8249 flow_dv_shared_lock(dev);
8250 __flow_dv_remove(dev, flow);
8251 flow_dv_shared_unlock(dev);
8255 * Mutex-protected thunk to lock-free __flow_dv_destroy().
8258 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8260 flow_dv_shared_lock(dev);
8261 __flow_dv_destroy(dev, flow);
8262 flow_dv_shared_unlock(dev);
8266 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8268 static struct mlx5_flow_counter *
8269 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8271 struct mlx5_flow_counter *cnt;
8273 flow_dv_shared_lock(dev);
8274 cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8275 flow_dv_shared_unlock(dev);
8280 * Mutex-protected thunk to lock-free flow_dv_counter_release().
8283 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8285 flow_dv_shared_lock(dev);
8286 flow_dv_counter_release(dev, cnt);
8287 flow_dv_shared_unlock(dev);
8290 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8291 .validate = flow_dv_validate,
8292 .prepare = flow_dv_prepare,
8293 .translate = flow_dv_translate,
8294 .apply = flow_dv_apply,
8295 .remove = flow_dv_remove,
8296 .destroy = flow_dv_destroy,
8297 .query = flow_dv_query,
8298 .create_mtr_tbls = flow_dv_create_mtr_tbl,
8299 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8300 .create_policer_rules = flow_dv_create_policer_rules,
8301 .destroy_policer_rules = flow_dv_destroy_policer_rules,
8302 .counter_alloc = flow_dv_counter_allocate,
8303 .counter_free = flow_dv_counter_free,
8304 .counter_query = flow_dv_counter_query,
8307 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */