drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include "mlx5.h"
  33 #include "mlx5_defs.h"
  34 #include "mlx5_glue.h"
  35 #include "mlx5_flow.h"
  36 #include "mlx5_prm.h"
  37 #include "mlx5_rxtx.h"
  38
  39 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  40
  41 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  42 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  43 #endif
  44
  45 #ifndef HAVE_MLX5DV_DR_ESWITCH
  46 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  47 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  48 #endif
  49 #endif
  50
  51 #ifndef HAVE_MLX5DV_DR
  52 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  53 #endif
  54
  55 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  56                                           sizeof(struct rte_flow_item_ipv4))
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  */
  87 static void
  88 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  89 {
  90         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  91                 switch (item->type) {
  92                 case RTE_FLOW_ITEM_TYPE_IPV4:
  93                         if (!attr->ipv6)
  94                                 attr->ipv4 = 1;
  95                         break;
  96                 case RTE_FLOW_ITEM_TYPE_IPV6:
  97                         if (!attr->ipv4)
  98                                 attr->ipv6 = 1;
  99                         break;
 100                 case RTE_FLOW_ITEM_TYPE_UDP:
 101                         if (!attr->tcp)
 102                                 attr->udp = 1;
 103                         break;
 104                 case RTE_FLOW_ITEM_TYPE_TCP:
 105                         if (!attr->udp)
 106                                 attr->tcp = 1;
 107                         break;
 108                 default:
 109                         break;
 110                 }
 111         }
 112         attr->valid = 1;
 113 }
 114
 115 /**
 116  * Convert rte_mtr_color to mlx5 color.
 117  *
 118  * @param[in] rcol
 119  *   rte_mtr_color.
 120  *
 121  * @return
 122  *   mlx5 color.
 123  */
 124 static int
 125 rte_col_2_mlx5_col(enum rte_color rcol)
 126 {
 127         switch (rcol) {
 128         case RTE_COLOR_GREEN:
 129                 return MLX5_FLOW_COLOR_GREEN;
 130         case RTE_COLOR_YELLOW:
 131                 return MLX5_FLOW_COLOR_YELLOW;
 132         case RTE_COLOR_RED:
 133                 return MLX5_FLOW_COLOR_RED;
 134         default:
 135                 break;
 136         }
 137         return MLX5_FLOW_COLOR_UNDEFINED;
 138 }
 139
 140 struct field_modify_info {
 141         uint32_t size; /* Size of field in protocol header, in bytes. */
 142         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 143         enum mlx5_modification_field id;
 144 };
 145
 146 struct field_modify_info modify_eth[] = {
 147         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 148         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 149         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 150         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 151         {0, 0, 0},
 152 };
 153
 154 struct field_modify_info modify_vlan_out_first_vid[] = {
 155         /* Size in bits !!! */
 156         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 157         {0, 0, 0},
 158 };
 159
 160 struct field_modify_info modify_ipv4[] = {
 161         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 162         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 163         {4, 12, MLX5_MODI_OUT_SIPV4},
 164         {4, 16, MLX5_MODI_OUT_DIPV4},
 165         {0, 0, 0},
 166 };
 167
 168 struct field_modify_info modify_ipv6[] = {
 169         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 170         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 171         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 172         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 173         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 174         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 175         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 176         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 177         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 178         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 179         {0, 0, 0},
 180 };
 181
 182 struct field_modify_info modify_udp[] = {
 183         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 184         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 185         {0, 0, 0},
 186 };
 187
 188 struct field_modify_info modify_tcp[] = {
 189         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 190         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 191         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 192         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 193         {0, 0, 0},
 194 };
 195
 196 static void
 197 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 198                           uint8_t next_protocol, uint64_t *item_flags,
 199                           int *tunnel)
 200 {
 201         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 202                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 203         if (next_protocol == IPPROTO_IPIP) {
 204                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 205                 *tunnel = 1;
 206         }
 207         if (next_protocol == IPPROTO_IPV6) {
 208                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 209                 *tunnel = 1;
 210         }
 211 }
 212
 213 /**
 214  * Acquire the synchronizing object to protect multithreaded access
 215  * to shared dv context. Lock occurs only if context is actually
 216  * shared, i.e. we have multiport IB device and representors are
 217  * created.
 218  *
 219  * @param[in] dev
 220  *   Pointer to the rte_eth_dev structure.
 221  */
 222 static void
 223 flow_dv_shared_lock(struct rte_eth_dev *dev)
 224 {
 225         struct mlx5_priv *priv = dev->data->dev_private;
 226         struct mlx5_ibv_shared *sh = priv->sh;
 227
 228         if (sh->dv_refcnt > 1) {
 229                 int ret;
 230
 231                 ret = pthread_mutex_lock(&sh->dv_mutex);
 232                 assert(!ret);
 233                 (void)ret;
 234         }
 235 }
 236
 237 static void
 238 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 239 {
 240         struct mlx5_priv *priv = dev->data->dev_private;
 241         struct mlx5_ibv_shared *sh = priv->sh;
 242
 243         if (sh->dv_refcnt > 1) {
 244                 int ret;
 245
 246                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 247                 assert(!ret);
 248                 (void)ret;
 249         }
 250 }
 251
 252 /* Update VLAN's VID/PCP based on input rte_flow_action.
 253  *
 254  * @param[in] action
 255  *   Pointer to struct rte_flow_action.
 256  * @param[out] vlan
 257  *   Pointer to struct rte_vlan_hdr.
 258  */
 259 static void
 260 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 261                          struct rte_vlan_hdr *vlan)
 262 {
 263         uint16_t vlan_tci;
 264         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 265                 vlan_tci =
 266                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 267                                                action->conf)->vlan_pcp;
 268                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 269                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 270                 vlan->vlan_tci |= vlan_tci;
 271         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 272                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 273                 vlan->vlan_tci |= rte_be_to_cpu_16
 274                     (((const struct rte_flow_action_of_set_vlan_vid *)
 275                                              action->conf)->vlan_vid);
 276         }
 277 }
 278
 279 /**
 280  * Fetch 1, 2, 3 or 4 byte field from the byte array
 281  * and return as unsigned integer in host-endian format.
 282  *
 283  * @param[in] data
 284  *   Pointer to data array.
 285  * @param[in] size
 286  *   Size of field to extract.
 287  *
 288  * @return
 289  *   converted field in host endian format.
 290  */
 291 static inline uint32_t
 292 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 293 {
 294         uint32_t ret;
 295
 296         switch (size) {
 297         case 1:
 298                 ret = *data;
 299                 break;
 300         case 2:
 301                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 302                 break;
 303         case 3:
 304                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 305                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 306                 break;
 307         case 4:
 308                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 309                 break;
 310         default:
 311                 assert(false);
 312                 ret = 0;
 313                 break;
 314         }
 315         return ret;
 316 }
 317
 318 /**
 319  * Convert modify-header action to DV specification.
 320  *
 321  * Data length of each action is determined by provided field description
 322  * and the item mask. Data bit offset and width of each action is determined
 323  * by provided item mask.
 324  *
 325  * @param[in] item
 326  *   Pointer to item specification.
 327  * @param[in] field
 328  *   Pointer to field modification information.
 329  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 330  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 331  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 332  * @param[in] dcopy
 333  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 334  *   Negative offset value sets the same offset as source offset.
 335  *   size field is ignored, value is taken from source field.
 336  * @param[in,out] resource
 337  *   Pointer to the modify-header resource.
 338  * @param[in] type
 339  *   Type of modification.
 340  * @param[out] error
 341  *   Pointer to the error structure.
 342  *
 343  * @return
 344  *   0 on success, a negative errno value otherwise and rte_errno is set.
 345  */
 346 static int
 347 flow_dv_convert_modify_action(struct rte_flow_item *item,
 348                               struct field_modify_info *field,
 349                               struct field_modify_info *dcopy,
 350                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 351                               uint32_t type, struct rte_flow_error *error)
 352 {
 353         uint32_t i = resource->actions_num;
 354         struct mlx5_modification_cmd *actions = resource->actions;
 355
 356         /*
 357          * The item and mask are provided in big-endian format.
 358          * The fields should be presented as in big-endian format either.
 359          * Mask must be always present, it defines the actual field width.
 360          */
 361         assert(item->mask);
 362         assert(field->size);
 363         do {
 364                 unsigned int size_b;
 365                 unsigned int off_b;
 366                 uint32_t mask;
 367                 uint32_t data;
 368
 369                 if (i >= MLX5_MAX_MODIFY_NUM)
 370                         return rte_flow_error_set(error, EINVAL,
 371                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 372                                  "too many items to modify");
 373                 /* Fetch variable byte size mask from the array. */
 374                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 375                                            field->offset, field->size);
 376                 if (!mask) {
 377                         ++field;
 378                         continue;
 379                 }
 380                 /* Deduce actual data width in bits from mask value. */
 381                 off_b = rte_bsf32(mask);
 382                 size_b = sizeof(uint32_t) * CHAR_BIT -
 383                          off_b - __builtin_clz(mask);
 384                 assert(size_b);
 385                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 386                 actions[i].action_type = type;
 387                 actions[i].field = field->id;
 388                 actions[i].offset = off_b;
 389                 actions[i].length = size_b;
 390                 /* Convert entire record to expected big-endian format. */
 391                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 392                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 393                         assert(dcopy);
 394                         actions[i].dst_field = dcopy->id;
 395                         actions[i].dst_offset =
 396                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 397                         /* Convert entire record to big-endian format. */
 398                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 399                 } else {
 400                         assert(item->spec);
 401                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 402                                                    field->offset, field->size);
 403                         /* Shift out the trailing masked bits from data. */
 404                         data = (data & mask) >> off_b;
 405                         actions[i].data1 = rte_cpu_to_be_32(data);
 406                 }
 407                 ++i;
 408                 ++field;
 409         } while (field->size);
 410         if (resource->actions_num == i)
 411                 return rte_flow_error_set(error, EINVAL,
 412                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 413                                           "invalid modification flow item");
 414         resource->actions_num = i;
 415         return 0;
 416 }
 417
 418 /**
 419  * Convert modify-header set IPv4 address action to DV specification.
 420  *
 421  * @param[in,out] resource
 422  *   Pointer to the modify-header resource.
 423  * @param[in] action
 424  *   Pointer to action specification.
 425  * @param[out] error
 426  *   Pointer to the error structure.
 427  *
 428  * @return
 429  *   0 on success, a negative errno value otherwise and rte_errno is set.
 430  */
 431 static int
 432 flow_dv_convert_action_modify_ipv4
 433                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 434                          const struct rte_flow_action *action,
 435                          struct rte_flow_error *error)
 436 {
 437         const struct rte_flow_action_set_ipv4 *conf =
 438                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 439         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 440         struct rte_flow_item_ipv4 ipv4;
 441         struct rte_flow_item_ipv4 ipv4_mask;
 442
 443         memset(&ipv4, 0, sizeof(ipv4));
 444         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 445         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 446                 ipv4.hdr.src_addr = conf->ipv4_addr;
 447                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 448         } else {
 449                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 450                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 451         }
 452         item.spec = &ipv4;
 453         item.mask = &ipv4_mask;
 454         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 455                                              MLX5_MODIFICATION_TYPE_SET, error);
 456 }
 457
 458 /**
 459  * Convert modify-header set IPv6 address action to DV specification.
 460  *
 461  * @param[in,out] resource
 462  *   Pointer to the modify-header resource.
 463  * @param[in] action
 464  *   Pointer to action specification.
 465  * @param[out] error
 466  *   Pointer to the error structure.
 467  *
 468  * @return
 469  *   0 on success, a negative errno value otherwise and rte_errno is set.
 470  */
 471 static int
 472 flow_dv_convert_action_modify_ipv6
 473                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 474                          const struct rte_flow_action *action,
 475                          struct rte_flow_error *error)
 476 {
 477         const struct rte_flow_action_set_ipv6 *conf =
 478                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 479         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 480         struct rte_flow_item_ipv6 ipv6;
 481         struct rte_flow_item_ipv6 ipv6_mask;
 482
 483         memset(&ipv6, 0, sizeof(ipv6));
 484         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 485         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 486                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 487                        sizeof(ipv6.hdr.src_addr));
 488                 memcpy(&ipv6_mask.hdr.src_addr,
 489                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 490                        sizeof(ipv6.hdr.src_addr));
 491         } else {
 492                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 493                        sizeof(ipv6.hdr.dst_addr));
 494                 memcpy(&ipv6_mask.hdr.dst_addr,
 495                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 496                        sizeof(ipv6.hdr.dst_addr));
 497         }
 498         item.spec = &ipv6;
 499         item.mask = &ipv6_mask;
 500         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 501                                              MLX5_MODIFICATION_TYPE_SET, error);
 502 }
 503
 504 /**
 505  * Convert modify-header set MAC address action to DV specification.
 506  *
 507  * @param[in,out] resource
 508  *   Pointer to the modify-header resource.
 509  * @param[in] action
 510  *   Pointer to action specification.
 511  * @param[out] error
 512  *   Pointer to the error structure.
 513  *
 514  * @return
 515  *   0 on success, a negative errno value otherwise and rte_errno is set.
 516  */
 517 static int
 518 flow_dv_convert_action_modify_mac
 519                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 520                          const struct rte_flow_action *action,
 521                          struct rte_flow_error *error)
 522 {
 523         const struct rte_flow_action_set_mac *conf =
 524                 (const struct rte_flow_action_set_mac *)(action->conf);
 525         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 526         struct rte_flow_item_eth eth;
 527         struct rte_flow_item_eth eth_mask;
 528
 529         memset(&eth, 0, sizeof(eth));
 530         memset(&eth_mask, 0, sizeof(eth_mask));
 531         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 532                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 533                        sizeof(eth.src.addr_bytes));
 534                 memcpy(&eth_mask.src.addr_bytes,
 535                        &rte_flow_item_eth_mask.src.addr_bytes,
 536                        sizeof(eth_mask.src.addr_bytes));
 537         } else {
 538                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 539                        sizeof(eth.dst.addr_bytes));
 540                 memcpy(&eth_mask.dst.addr_bytes,
 541                        &rte_flow_item_eth_mask.dst.addr_bytes,
 542                        sizeof(eth_mask.dst.addr_bytes));
 543         }
 544         item.spec = &eth;
 545         item.mask = &eth_mask;
 546         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 547                                              MLX5_MODIFICATION_TYPE_SET, error);
 548 }
 549
 550 /**
 551  * Convert modify-header set VLAN VID action to DV specification.
 552  *
 553  * @param[in,out] resource
 554  *   Pointer to the modify-header resource.
 555  * @param[in] action
 556  *   Pointer to action specification.
 557  * @param[out] error
 558  *   Pointer to the error structure.
 559  *
 560  * @return
 561  *   0 on success, a negative errno value otherwise and rte_errno is set.
 562  */
 563 static int
 564 flow_dv_convert_action_modify_vlan_vid
 565                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 566                          const struct rte_flow_action *action,
 567                          struct rte_flow_error *error)
 568 {
 569         const struct rte_flow_action_of_set_vlan_vid *conf =
 570                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 571         int i = resource->actions_num;
 572         struct mlx5_modification_cmd *actions = &resource->actions[i];
 573         struct field_modify_info *field = modify_vlan_out_first_vid;
 574
 575         if (i >= MLX5_MAX_MODIFY_NUM)
 576                 return rte_flow_error_set(error, EINVAL,
 577                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 578                          "too many items to modify");
 579         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 580         actions[i].field = field->id;
 581         actions[i].length = field->size;
 582         actions[i].offset = field->offset;
 583         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 584         actions[i].data1 = conf->vlan_vid;
 585         actions[i].data1 = actions[i].data1 << 16;
 586         resource->actions_num = ++i;
 587         return 0;
 588 }
 589
 590 /**
 591  * Convert modify-header set TP action to DV specification.
 592  *
 593  * @param[in,out] resource
 594  *   Pointer to the modify-header resource.
 595  * @param[in] action
 596  *   Pointer to action specification.
 597  * @param[in] items
 598  *   Pointer to rte_flow_item objects list.
 599  * @param[in] attr
 600  *   Pointer to flow attributes structure.
 601  * @param[out] error
 602  *   Pointer to the error structure.
 603  *
 604  * @return
 605  *   0 on success, a negative errno value otherwise and rte_errno is set.
 606  */
 607 static int
 608 flow_dv_convert_action_modify_tp
 609                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 610                          const struct rte_flow_action *action,
 611                          const struct rte_flow_item *items,
 612                          union flow_dv_attr *attr,
 613                          struct rte_flow_error *error)
 614 {
 615         const struct rte_flow_action_set_tp *conf =
 616                 (const struct rte_flow_action_set_tp *)(action->conf);
 617         struct rte_flow_item item;
 618         struct rte_flow_item_udp udp;
 619         struct rte_flow_item_udp udp_mask;
 620         struct rte_flow_item_tcp tcp;
 621         struct rte_flow_item_tcp tcp_mask;
 622         struct field_modify_info *field;
 623
 624         if (!attr->valid)
 625                 flow_dv_attr_init(items, attr);
 626         if (attr->udp) {
 627                 memset(&udp, 0, sizeof(udp));
 628                 memset(&udp_mask, 0, sizeof(udp_mask));
 629                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 630                         udp.hdr.src_port = conf->port;
 631                         udp_mask.hdr.src_port =
 632                                         rte_flow_item_udp_mask.hdr.src_port;
 633                 } else {
 634                         udp.hdr.dst_port = conf->port;
 635                         udp_mask.hdr.dst_port =
 636                                         rte_flow_item_udp_mask.hdr.dst_port;
 637                 }
 638                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 639                 item.spec = &udp;
 640                 item.mask = &udp_mask;
 641                 field = modify_udp;
 642         }
 643         if (attr->tcp) {
 644                 memset(&tcp, 0, sizeof(tcp));
 645                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 646                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 647                         tcp.hdr.src_port = conf->port;
 648                         tcp_mask.hdr.src_port =
 649                                         rte_flow_item_tcp_mask.hdr.src_port;
 650                 } else {
 651                         tcp.hdr.dst_port = conf->port;
 652                         tcp_mask.hdr.dst_port =
 653                                         rte_flow_item_tcp_mask.hdr.dst_port;
 654                 }
 655                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 656                 item.spec = &tcp;
 657                 item.mask = &tcp_mask;
 658                 field = modify_tcp;
 659         }
 660         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 661                                              MLX5_MODIFICATION_TYPE_SET, error);
 662 }
 663
 664 /**
 665  * Convert modify-header set TTL action to DV specification.
 666  *
 667  * @param[in,out] resource
 668  *   Pointer to the modify-header resource.
 669  * @param[in] action
 670  *   Pointer to action specification.
 671  * @param[in] items
 672  *   Pointer to rte_flow_item objects list.
 673  * @param[in] attr
 674  *   Pointer to flow attributes structure.
 675  * @param[out] error
 676  *   Pointer to the error structure.
 677  *
 678  * @return
 679  *   0 on success, a negative errno value otherwise and rte_errno is set.
 680  */
 681 static int
 682 flow_dv_convert_action_modify_ttl
 683                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 684                          const struct rte_flow_action *action,
 685                          const struct rte_flow_item *items,
 686                          union flow_dv_attr *attr,
 687                          struct rte_flow_error *error)
 688 {
 689         const struct rte_flow_action_set_ttl *conf =
 690                 (const struct rte_flow_action_set_ttl *)(action->conf);
 691         struct rte_flow_item item;
 692         struct rte_flow_item_ipv4 ipv4;
 693         struct rte_flow_item_ipv4 ipv4_mask;
 694         struct rte_flow_item_ipv6 ipv6;
 695         struct rte_flow_item_ipv6 ipv6_mask;
 696         struct field_modify_info *field;
 697
 698         if (!attr->valid)
 699                 flow_dv_attr_init(items, attr);
 700         if (attr->ipv4) {
 701                 memset(&ipv4, 0, sizeof(ipv4));
 702                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 703                 ipv4.hdr.time_to_live = conf->ttl_value;
 704                 ipv4_mask.hdr.time_to_live = 0xFF;
 705                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 706                 item.spec = &ipv4;
 707                 item.mask = &ipv4_mask;
 708                 field = modify_ipv4;
 709         }
 710         if (attr->ipv6) {
 711                 memset(&ipv6, 0, sizeof(ipv6));
 712                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 713                 ipv6.hdr.hop_limits = conf->ttl_value;
 714                 ipv6_mask.hdr.hop_limits = 0xFF;
 715                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 716                 item.spec = &ipv6;
 717                 item.mask = &ipv6_mask;
 718                 field = modify_ipv6;
 719         }
 720         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 721                                              MLX5_MODIFICATION_TYPE_SET, error);
 722 }
 723
 724 /**
 725  * Convert modify-header decrement TTL action to DV specification.
 726  *
 727  * @param[in,out] resource
 728  *   Pointer to the modify-header resource.
 729  * @param[in] action
 730  *   Pointer to action specification.
 731  * @param[in] items
 732  *   Pointer to rte_flow_item objects list.
 733  * @param[in] attr
 734  *   Pointer to flow attributes structure.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_dec_ttl
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_item *items,
 745                          union flow_dv_attr *attr,
 746                          struct rte_flow_error *error)
 747 {
 748         struct rte_flow_item item;
 749         struct rte_flow_item_ipv4 ipv4;
 750         struct rte_flow_item_ipv4 ipv4_mask;
 751         struct rte_flow_item_ipv6 ipv6;
 752         struct rte_flow_item_ipv6 ipv6_mask;
 753         struct field_modify_info *field;
 754
 755         if (!attr->valid)
 756                 flow_dv_attr_init(items, attr);
 757         if (attr->ipv4) {
 758                 memset(&ipv4, 0, sizeof(ipv4));
 759                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 760                 ipv4.hdr.time_to_live = 0xFF;
 761                 ipv4_mask.hdr.time_to_live = 0xFF;
 762                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 763                 item.spec = &ipv4;
 764                 item.mask = &ipv4_mask;
 765                 field = modify_ipv4;
 766         }
 767         if (attr->ipv6) {
 768                 memset(&ipv6, 0, sizeof(ipv6));
 769                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 770                 ipv6.hdr.hop_limits = 0xFF;
 771                 ipv6_mask.hdr.hop_limits = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 773                 item.spec = &ipv6;
 774                 item.mask = &ipv6_mask;
 775                 field = modify_ipv6;
 776         }
 777         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 778                                              MLX5_MODIFICATION_TYPE_ADD, error);
 779 }
 780
 781 /**
 782  * Convert modify-header increment/decrement TCP Sequence number
 783  * to DV specification.
 784  *
 785  * @param[in,out] resource
 786  *   Pointer to the modify-header resource.
 787  * @param[in] action
 788  *   Pointer to action specification.
 789  * @param[out] error
 790  *   Pointer to the error structure.
 791  *
 792  * @return
 793  *   0 on success, a negative errno value otherwise and rte_errno is set.
 794  */
 795 static int
 796 flow_dv_convert_action_modify_tcp_seq
 797                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 798                          const struct rte_flow_action *action,
 799                          struct rte_flow_error *error)
 800 {
 801         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 802         uint64_t value = rte_be_to_cpu_32(*conf);
 803         struct rte_flow_item item;
 804         struct rte_flow_item_tcp tcp;
 805         struct rte_flow_item_tcp tcp_mask;
 806
 807         memset(&tcp, 0, sizeof(tcp));
 808         memset(&tcp_mask, 0, sizeof(tcp_mask));
 809         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 810                 /*
 811                  * The HW has no decrement operation, only increment operation.
 812                  * To simulate decrement X from Y using increment operation
 813                  * we need to add UINT32_MAX X times to Y.
 814                  * Each adding of UINT32_MAX decrements Y by 1.
 815                  */
 816                 value *= UINT32_MAX;
 817         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 818         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 819         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 820         item.spec = &tcp;
 821         item.mask = &tcp_mask;
 822         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 823                                              MLX5_MODIFICATION_TYPE_ADD, error);
 824 }
 825
 826 /**
 827  * Convert modify-header increment/decrement TCP Acknowledgment number
 828  * to DV specification.
 829  *
 830  * @param[in,out] resource
 831  *   Pointer to the modify-header resource.
 832  * @param[in] action
 833  *   Pointer to action specification.
 834  * @param[out] error
 835  *   Pointer to the error structure.
 836  *
 837  * @return
 838  *   0 on success, a negative errno value otherwise and rte_errno is set.
 839  */
 840 static int
 841 flow_dv_convert_action_modify_tcp_ack
 842                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 843                          const struct rte_flow_action *action,
 844                          struct rte_flow_error *error)
 845 {
 846         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 847         uint64_t value = rte_be_to_cpu_32(*conf);
 848         struct rte_flow_item item;
 849         struct rte_flow_item_tcp tcp;
 850         struct rte_flow_item_tcp tcp_mask;
 851
 852         memset(&tcp, 0, sizeof(tcp));
 853         memset(&tcp_mask, 0, sizeof(tcp_mask));
 854         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 855                 /*
 856                  * The HW has no decrement operation, only increment operation.
 857                  * To simulate decrement X from Y using increment operation
 858                  * we need to add UINT32_MAX X times to Y.
 859                  * Each adding of UINT32_MAX decrements Y by 1.
 860                  */
 861                 value *= UINT32_MAX;
 862         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 863         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 864         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 865         item.spec = &tcp;
 866         item.mask = &tcp_mask;
 867         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 868                                              MLX5_MODIFICATION_TYPE_ADD, error);
 869 }
 870
 871 static enum mlx5_modification_field reg_to_field[] = {
 872         [REG_NONE] = MLX5_MODI_OUT_NONE,
 873         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 874         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 875         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 876         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 877         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 878         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 879         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 880         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 881         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 882         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 883 };
 884
 885 /**
 886  * Convert register set to DV specification.
 887  *
 888  * @param[in,out] resource
 889  *   Pointer to the modify-header resource.
 890  * @param[in] action
 891  *   Pointer to action specification.
 892  * @param[out] error
 893  *   Pointer to the error structure.
 894  *
 895  * @return
 896  *   0 on success, a negative errno value otherwise and rte_errno is set.
 897  */
 898 static int
 899 flow_dv_convert_action_set_reg
 900                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 901                          const struct rte_flow_action *action,
 902                          struct rte_flow_error *error)
 903 {
 904         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 905         struct mlx5_modification_cmd *actions = resource->actions;
 906         uint32_t i = resource->actions_num;
 907
 908         if (i >= MLX5_MAX_MODIFY_NUM)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "too many items to modify");
 912         assert(conf->id != REG_NONE);
 913         assert(conf->id < RTE_DIM(reg_to_field));
 914         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 915         actions[i].field = reg_to_field[conf->id];
 916         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 917         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 918         ++i;
 919         resource->actions_num = i;
 920         return 0;
 921 }
 922
 923 /**
 924  * Convert SET_TAG action to DV specification.
 925  *
 926  * @param[in] dev
 927  *   Pointer to the rte_eth_dev structure.
 928  * @param[in,out] resource
 929  *   Pointer to the modify-header resource.
 930  * @param[in] conf
 931  *   Pointer to action specification.
 932  * @param[out] error
 933  *   Pointer to the error structure.
 934  *
 935  * @return
 936  *   0 on success, a negative errno value otherwise and rte_errno is set.
 937  */
 938 static int
 939 flow_dv_convert_action_set_tag
 940                         (struct rte_eth_dev *dev,
 941                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 942                          const struct rte_flow_action_set_tag *conf,
 943                          struct rte_flow_error *error)
 944 {
 945         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 946         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 947         struct rte_flow_item item = {
 948                 .spec = &data,
 949                 .mask = &mask,
 950         };
 951         struct field_modify_info reg_c_x[] = {
 952                 [1] = {0, 0, 0},
 953         };
 954         enum mlx5_modification_field reg_type;
 955         int ret;
 956
 957         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 958         if (ret < 0)
 959                 return ret;
 960         assert(ret != REG_NONE);
 961         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 962         reg_type = reg_to_field[ret];
 963         assert(reg_type > 0);
 964         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 965         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 966                                              MLX5_MODIFICATION_TYPE_SET, error);
 967 }
 968
 969 /**
 970  * Convert internal COPY_REG action to DV specification.
 971  *
 972  * @param[in] dev
 973  *   Pointer to the rte_eth_dev structure.
 974  * @param[in,out] res
 975  *   Pointer to the modify-header resource.
 976  * @param[in] action
 977  *   Pointer to action specification.
 978  * @param[out] error
 979  *   Pointer to the error structure.
 980  *
 981  * @return
 982  *   0 on success, a negative errno value otherwise and rte_errno is set.
 983  */
 984 static int
 985 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 986                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 987                                  const struct rte_flow_action *action,
 988                                  struct rte_flow_error *error)
 989 {
 990         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 991         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 992         struct rte_flow_item item = {
 993                 .spec = NULL,
 994                 .mask = &mask,
 995         };
 996         struct field_modify_info reg_src[] = {
 997                 {4, 0, reg_to_field[conf->src]},
 998                 {0, 0, 0},
 999         };
1000         struct field_modify_info reg_dst = {
1001                 .offset = 0,
1002                 .id = reg_to_field[conf->dst],
1003         };
1004         /* Adjust reg_c[0] usage according to reported mask. */
1005         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1006                 struct mlx5_priv *priv = dev->data->dev_private;
1007                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1008
1009                 assert(reg_c0);
1010                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1011                 if (conf->dst == REG_C_0) {
1012                         /* Copy to reg_c[0], within mask only. */
1013                         reg_dst.offset = rte_bsf32(reg_c0);
1014                         /*
1015                          * Mask is ignoring the enianness, because
1016                          * there is no conversion in datapath.
1017                          */
1018 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1019                         /* Copy from destination lower bits to reg_c[0]. */
1020                         mask = reg_c0 >> reg_dst.offset;
1021 #else
1022                         /* Copy from destination upper bits to reg_c[0]. */
1023                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1024                                           rte_fls_u32(reg_c0));
1025 #endif
1026                 } else {
1027                         mask = rte_cpu_to_be_32(reg_c0);
1028 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1029                         /* Copy from reg_c[0] to destination lower bits. */
1030                         reg_dst.offset = 0;
1031 #else
1032                         /* Copy from reg_c[0] to destination upper bits. */
1033                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1034                                          (rte_fls_u32(reg_c0) -
1035                                           rte_bsf32(reg_c0));
1036 #endif
1037                 }
1038         }
1039         return flow_dv_convert_modify_action(&item,
1040                                              reg_src, &reg_dst, res,
1041                                              MLX5_MODIFICATION_TYPE_COPY,
1042                                              error);
1043 }
1044
1045 /**
1046  * Convert MARK action to DV specification. This routine is used
1047  * in extensive metadata only and requires metadata register to be
1048  * handled. In legacy mode hardware tag resource is engaged.
1049  *
1050  * @param[in] dev
1051  *   Pointer to the rte_eth_dev structure.
1052  * @param[in] conf
1053  *   Pointer to MARK action specification.
1054  * @param[in,out] resource
1055  *   Pointer to the modify-header resource.
1056  * @param[out] error
1057  *   Pointer to the error structure.
1058  *
1059  * @return
1060  *   0 on success, a negative errno value otherwise and rte_errno is set.
1061  */
1062 static int
1063 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1064                             const struct rte_flow_action_mark *conf,
1065                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1066                             struct rte_flow_error *error)
1067 {
1068         struct mlx5_priv *priv = dev->data->dev_private;
1069         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1070                                            priv->sh->dv_mark_mask);
1071         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1072         struct rte_flow_item item = {
1073                 .spec = &data,
1074                 .mask = &mask,
1075         };
1076         struct field_modify_info reg_c_x[] = {
1077                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1078                 {0, 0, 0},
1079         };
1080         enum modify_reg reg;
1081
1082         if (!mask)
1083                 return rte_flow_error_set(error, EINVAL,
1084                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1085                                           NULL, "zero mark action mask");
1086         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1087         if (reg < 0)
1088                 return reg;
1089         assert(reg > 0);
1090         if (reg == REG_C_0) {
1091                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1092                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1093
1094                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1095                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1096                 mask = rte_cpu_to_be_32(mask << shl_c0);
1097         }
1098         reg_c_x[0].id = reg_to_field[reg];
1099         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1100                                              MLX5_MODIFICATION_TYPE_SET, error);
1101 }
1102
1103 /**
1104  * Get metadata register index for specified steering domain.
1105  *
1106  * @param[in] dev
1107  *   Pointer to the rte_eth_dev structure.
1108  * @param[in] attr
1109  *   Attributes of flow to determine steering domain.
1110  * @param[out] error
1111  *   Pointer to the error structure.
1112  *
1113  * @return
1114  *   positive index on success, a negative errno value otherwise
1115  *   and rte_errno is set.
1116  */
1117 static enum modify_reg
1118 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1119                          const struct rte_flow_attr *attr,
1120                          struct rte_flow_error *error)
1121 {
1122         enum modify_reg reg =
1123                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1124                                           MLX5_METADATA_FDB :
1125                                             attr->egress ?
1126                                             MLX5_METADATA_TX :
1127                                             MLX5_METADATA_RX, 0, error);
1128         if (reg < 0)
1129                 return rte_flow_error_set(error,
1130                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1131                                           NULL, "unavailable "
1132                                           "metadata register");
1133         return reg;
1134 }
1135
1136 /**
1137  * Convert SET_META action to DV specification.
1138  *
1139  * @param[in] dev
1140  *   Pointer to the rte_eth_dev structure.
1141  * @param[in,out] resource
1142  *   Pointer to the modify-header resource.
1143  * @param[in] attr
1144  *   Attributes of flow that includes this item.
1145  * @param[in] conf
1146  *   Pointer to action specification.
1147  * @param[out] error
1148  *   Pointer to the error structure.
1149  *
1150  * @return
1151  *   0 on success, a negative errno value otherwise and rte_errno is set.
1152  */
1153 static int
1154 flow_dv_convert_action_set_meta
1155                         (struct rte_eth_dev *dev,
1156                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1157                          const struct rte_flow_attr *attr,
1158                          const struct rte_flow_action_set_meta *conf,
1159                          struct rte_flow_error *error)
1160 {
1161         uint32_t data = conf->data;
1162         uint32_t mask = conf->mask;
1163         struct rte_flow_item item = {
1164                 .spec = &data,
1165                 .mask = &mask,
1166         };
1167         struct field_modify_info reg_c_x[] = {
1168                 [1] = {0, 0, 0},
1169         };
1170         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1171
1172         if (reg < 0)
1173                 return reg;
1174         /*
1175          * In datapath code there is no endianness
1176          * coversions for perfromance reasons, all
1177          * pattern conversions are done in rte_flow.
1178          */
1179         if (reg == REG_C_0) {
1180                 struct mlx5_priv *priv = dev->data->dev_private;
1181                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1182                 uint32_t shl_c0;
1183
1184                 assert(msk_c0);
1185 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1186                 shl_c0 = rte_bsf32(msk_c0);
1187 #else
1188                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1189 #endif
1190                 mask <<= shl_c0;
1191                 data <<= shl_c0;
1192                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1193         }
1194         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1195         /* The routine expects parameters in memory as big-endian ones. */
1196         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1197                                              MLX5_MODIFICATION_TYPE_SET, error);
1198 }
1199
1200 /**
1201  * Convert modify-header set IPv4 DSCP action to DV specification.
1202  *
1203  * @param[in,out] resource
1204  *   Pointer to the modify-header resource.
1205  * @param[in] action
1206  *   Pointer to action specification.
1207  * @param[out] error
1208  *   Pointer to the error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 static int
1214 flow_dv_convert_action_modify_ipv4_dscp
1215                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1216                          const struct rte_flow_action *action,
1217                          struct rte_flow_error *error)
1218 {
1219         const struct rte_flow_action_set_dscp *conf =
1220                 (const struct rte_flow_action_set_dscp *)(action->conf);
1221         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1222         struct rte_flow_item_ipv4 ipv4;
1223         struct rte_flow_item_ipv4 ipv4_mask;
1224
1225         memset(&ipv4, 0, sizeof(ipv4));
1226         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1227         ipv4.hdr.type_of_service = conf->dscp;
1228         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1229         item.spec = &ipv4;
1230         item.mask = &ipv4_mask;
1231         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1232                                              MLX5_MODIFICATION_TYPE_SET, error);
1233 }
1234
1235 /**
1236  * Convert modify-header set IPv6 DSCP action to DV specification.
1237  *
1238  * @param[in,out] resource
1239  *   Pointer to the modify-header resource.
1240  * @param[in] action
1241  *   Pointer to action specification.
1242  * @param[out] error
1243  *   Pointer to the error structure.
1244  *
1245  * @return
1246  *   0 on success, a negative errno value otherwise and rte_errno is set.
1247  */
1248 static int
1249 flow_dv_convert_action_modify_ipv6_dscp
1250                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1251                          const struct rte_flow_action *action,
1252                          struct rte_flow_error *error)
1253 {
1254         const struct rte_flow_action_set_dscp *conf =
1255                 (const struct rte_flow_action_set_dscp *)(action->conf);
1256         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1257         struct rte_flow_item_ipv6 ipv6;
1258         struct rte_flow_item_ipv6 ipv6_mask;
1259
1260         memset(&ipv6, 0, sizeof(ipv6));
1261         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1262         /*
1263          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1264          * rdma-core only accept the DSCP bits byte aligned start from
1265          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1266          * bits in IPv6 case as rdma-core requires byte aligned value.
1267          */
1268         ipv6.hdr.vtc_flow = conf->dscp;
1269         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1270         item.spec = &ipv6;
1271         item.mask = &ipv6_mask;
1272         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1273                                              MLX5_MODIFICATION_TYPE_SET, error);
1274 }
1275
1276 /**
1277  * Validate MARK item.
1278  *
1279  * @param[in] dev
1280  *   Pointer to the rte_eth_dev structure.
1281  * @param[in] item
1282  *   Item specification.
1283  * @param[in] attr
1284  *   Attributes of flow that includes this item.
1285  * @param[out] error
1286  *   Pointer to error structure.
1287  *
1288  * @return
1289  *   0 on success, a negative errno value otherwise and rte_errno is set.
1290  */
1291 static int
1292 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1293                            const struct rte_flow_item *item,
1294                            const struct rte_flow_attr *attr __rte_unused,
1295                            struct rte_flow_error *error)
1296 {
1297         struct mlx5_priv *priv = dev->data->dev_private;
1298         struct mlx5_dev_config *config = &priv->config;
1299         const struct rte_flow_item_mark *spec = item->spec;
1300         const struct rte_flow_item_mark *mask = item->mask;
1301         const struct rte_flow_item_mark nic_mask = {
1302                 .id = priv->sh->dv_mark_mask,
1303         };
1304         int ret;
1305
1306         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1307                 return rte_flow_error_set(error, ENOTSUP,
1308                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1309                                           "extended metadata feature"
1310                                           " isn't enabled");
1311         if (!mlx5_flow_ext_mreg_supported(dev))
1312                 return rte_flow_error_set(error, ENOTSUP,
1313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1314                                           "extended metadata register"
1315                                           " isn't supported");
1316         if (!nic_mask.id)
1317                 return rte_flow_error_set(error, ENOTSUP,
1318                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1319                                           "extended metadata register"
1320                                           " isn't available");
1321         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1322         if (ret < 0)
1323                 return ret;
1324         if (!spec)
1325                 return rte_flow_error_set(error, EINVAL,
1326                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1327                                           item->spec,
1328                                           "data cannot be empty");
1329         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1330                 return rte_flow_error_set(error, EINVAL,
1331                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1332                                           &spec->id,
1333                                           "mark id exceeds the limit");
1334         if (!mask)
1335                 mask = &nic_mask;
1336         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1337                                         (const uint8_t *)&nic_mask,
1338                                         sizeof(struct rte_flow_item_mark),
1339                                         error);
1340         if (ret < 0)
1341                 return ret;
1342         return 0;
1343 }
1344
1345 /**
1346  * Validate META item.
1347  *
1348  * @param[in] dev
1349  *   Pointer to the rte_eth_dev structure.
1350  * @param[in] item
1351  *   Item specification.
1352  * @param[in] attr
1353  *   Attributes of flow that includes this item.
1354  * @param[out] error
1355  *   Pointer to error structure.
1356  *
1357  * @return
1358  *   0 on success, a negative errno value otherwise and rte_errno is set.
1359  */
1360 static int
1361 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1362                            const struct rte_flow_item *item,
1363                            const struct rte_flow_attr *attr,
1364                            struct rte_flow_error *error)
1365 {
1366         struct mlx5_priv *priv = dev->data->dev_private;
1367         struct mlx5_dev_config *config = &priv->config;
1368         const struct rte_flow_item_meta *spec = item->spec;
1369         const struct rte_flow_item_meta *mask = item->mask;
1370         struct rte_flow_item_meta nic_mask = {
1371                 .data = UINT32_MAX
1372         };
1373         enum modify_reg reg;
1374         int ret;
1375
1376         if (!spec)
1377                 return rte_flow_error_set(error, EINVAL,
1378                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1379                                           item->spec,
1380                                           "data cannot be empty");
1381         if (!spec->data)
1382                 return rte_flow_error_set(error, EINVAL,
1383                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1384                                           "data cannot be zero");
1385         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1386                 if (!mlx5_flow_ext_mreg_supported(dev))
1387                         return rte_flow_error_set(error, ENOTSUP,
1388                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1389                                           "extended metadata register"
1390                                           " isn't supported");
1391                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1392                 if (reg < 0)
1393                         return reg;
1394                 if (reg == REG_B)
1395                         return rte_flow_error_set(error, ENOTSUP,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "match on reg_b "
1398                                           "isn't supported");
1399                 if (reg != REG_A)
1400                         nic_mask.data = priv->sh->dv_meta_mask;
1401         }
1402         if (!mask)
1403                 mask = &rte_flow_item_meta_mask;
1404         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1405                                         (const uint8_t *)&nic_mask,
1406                                         sizeof(struct rte_flow_item_meta),
1407                                         error);
1408         return ret;
1409 }
1410
1411 /**
1412  * Validate TAG item.
1413  *
1414  * @param[in] dev
1415  *   Pointer to the rte_eth_dev structure.
1416  * @param[in] item
1417  *   Item specification.
1418  * @param[in] attr
1419  *   Attributes of flow that includes this item.
1420  * @param[out] error
1421  *   Pointer to error structure.
1422  *
1423  * @return
1424  *   0 on success, a negative errno value otherwise and rte_errno is set.
1425  */
1426 static int
1427 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1428                           const struct rte_flow_item *item,
1429                           const struct rte_flow_attr *attr __rte_unused,
1430                           struct rte_flow_error *error)
1431 {
1432         const struct rte_flow_item_tag *spec = item->spec;
1433         const struct rte_flow_item_tag *mask = item->mask;
1434         const struct rte_flow_item_tag nic_mask = {
1435                 .data = RTE_BE32(UINT32_MAX),
1436                 .index = 0xff,
1437         };
1438         int ret;
1439
1440         if (!mlx5_flow_ext_mreg_supported(dev))
1441                 return rte_flow_error_set(error, ENOTSUP,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1443                                           "extensive metadata register"
1444                                           " isn't supported");
1445         if (!spec)
1446                 return rte_flow_error_set(error, EINVAL,
1447                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1448                                           item->spec,
1449                                           "data cannot be empty");
1450         if (!mask)
1451                 mask = &rte_flow_item_tag_mask;
1452         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1453                                         (const uint8_t *)&nic_mask,
1454                                         sizeof(struct rte_flow_item_tag),
1455                                         error);
1456         if (ret < 0)
1457                 return ret;
1458         if (mask->index != 0xff)
1459                 return rte_flow_error_set(error, EINVAL,
1460                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1461                                           "partial mask for tag index"
1462                                           " is not supported");
1463         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1464         if (ret < 0)
1465                 return ret;
1466         assert(ret != REG_NONE);
1467         return 0;
1468 }
1469
1470 /**
1471  * Validate vport item.
1472  *
1473  * @param[in] dev
1474  *   Pointer to the rte_eth_dev structure.
1475  * @param[in] item
1476  *   Item specification.
1477  * @param[in] attr
1478  *   Attributes of flow that includes this item.
1479  * @param[in] item_flags
1480  *   Bit-fields that holds the items detected until now.
1481  * @param[out] error
1482  *   Pointer to error structure.
1483  *
1484  * @return
1485  *   0 on success, a negative errno value otherwise and rte_errno is set.
1486  */
1487 static int
1488 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1489                               const struct rte_flow_item *item,
1490                               const struct rte_flow_attr *attr,
1491                               uint64_t item_flags,
1492                               struct rte_flow_error *error)
1493 {
1494         const struct rte_flow_item_port_id *spec = item->spec;
1495         const struct rte_flow_item_port_id *mask = item->mask;
1496         const struct rte_flow_item_port_id switch_mask = {
1497                         .id = 0xffffffff,
1498         };
1499         struct mlx5_priv *esw_priv;
1500         struct mlx5_priv *dev_priv;
1501         int ret;
1502
1503         if (!attr->transfer)
1504                 return rte_flow_error_set(error, EINVAL,
1505                                           RTE_FLOW_ERROR_TYPE_ITEM,
1506                                           NULL,
1507                                           "match on port id is valid only"
1508                                           " when transfer flag is enabled");
1509         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1510                 return rte_flow_error_set(error, ENOTSUP,
1511                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1512                                           "multiple source ports are not"
1513                                           " supported");
1514         if (!mask)
1515                 mask = &switch_mask;
1516         if (mask->id != 0xffffffff)
1517                 return rte_flow_error_set(error, ENOTSUP,
1518                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1519                                            mask,
1520                                            "no support for partial mask on"
1521                                            " \"id\" field");
1522         ret = mlx5_flow_item_acceptable
1523                                 (item, (const uint8_t *)mask,
1524                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1525                                  sizeof(struct rte_flow_item_port_id),
1526                                  error);
1527         if (ret)
1528                 return ret;
1529         if (!spec)
1530                 return 0;
1531         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1532         if (!esw_priv)
1533                 return rte_flow_error_set(error, rte_errno,
1534                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1535                                           "failed to obtain E-Switch info for"
1536                                           " port");
1537         dev_priv = mlx5_dev_to_eswitch_info(dev);
1538         if (!dev_priv)
1539                 return rte_flow_error_set(error, rte_errno,
1540                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1541                                           NULL,
1542                                           "failed to obtain E-Switch info");
1543         if (esw_priv->domain_id != dev_priv->domain_id)
1544                 return rte_flow_error_set(error, EINVAL,
1545                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1546                                           "cannot match on a port from a"
1547                                           " different E-Switch");
1548         return 0;
1549 }
1550
1551 /**
1552  * Validate GTP item.
1553  *
1554  * @param[in] dev
1555  *   Pointer to the rte_eth_dev structure.
1556  * @param[in] item
1557  *   Item specification.
1558  * @param[in] item_flags
1559  *   Bit-fields that holds the items detected until now.
1560  * @param[out] error
1561  *   Pointer to error structure.
1562  *
1563  * @return
1564  *   0 on success, a negative errno value otherwise and rte_errno is set.
1565  */
1566 static int
1567 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1568                           const struct rte_flow_item *item,
1569                           uint64_t item_flags,
1570                           struct rte_flow_error *error)
1571 {
1572         struct mlx5_priv *priv = dev->data->dev_private;
1573         const struct rte_flow_item_gtp *mask = item->mask;
1574         const struct rte_flow_item_gtp nic_mask = {
1575                 .msg_type = 0xff,
1576                 .teid = RTE_BE32(0xffffffff),
1577         };
1578
1579         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1580                 return rte_flow_error_set(error, ENOTSUP,
1581                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1582                                           "GTP support is not enabled");
1583         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1584                 return rte_flow_error_set(error, ENOTSUP,
1585                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1586                                           "multiple tunnel layers not"
1587                                           " supported");
1588         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1591                                           "no outer UDP layer found");
1592         if (!mask)
1593                 mask = &rte_flow_item_gtp_mask;
1594         return mlx5_flow_item_acceptable
1595                 (item, (const uint8_t *)mask,
1596                  (const uint8_t *)&nic_mask,
1597                  sizeof(struct rte_flow_item_gtp),
1598                  error);
1599 }
1600
1601 /**
1602  * Validate the pop VLAN action.
1603  *
1604  * @param[in] dev
1605  *   Pointer to the rte_eth_dev structure.
1606  * @param[in] action_flags
1607  *   Holds the actions detected until now.
1608  * @param[in] action
1609  *   Pointer to the pop vlan action.
1610  * @param[in] item_flags
1611  *   The items found in this flow rule.
1612  * @param[in] attr
1613  *   Pointer to flow attributes.
1614  * @param[out] error
1615  *   Pointer to error structure.
1616  *
1617  * @return
1618  *   0 on success, a negative errno value otherwise and rte_errno is set.
1619  */
1620 static int
1621 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1622                                  uint64_t action_flags,
1623                                  const struct rte_flow_action *action,
1624                                  uint64_t item_flags,
1625                                  const struct rte_flow_attr *attr,
1626                                  struct rte_flow_error *error)
1627 {
1628         struct mlx5_priv *priv = dev->data->dev_private;
1629
1630         (void)action;
1631         (void)attr;
1632         if (!priv->sh->pop_vlan_action)
1633                 return rte_flow_error_set(error, ENOTSUP,
1634                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1635                                           NULL,
1636                                           "pop vlan action is not supported");
1637         if (attr->egress)
1638                 return rte_flow_error_set(error, ENOTSUP,
1639                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1640                                           NULL,
1641                                           "pop vlan action not supported for "
1642                                           "egress");
1643         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1644                 return rte_flow_error_set(error, ENOTSUP,
1645                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1646                                           "no support for multiple VLAN "
1647                                           "actions");
1648         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1649                 return rte_flow_error_set(error, ENOTSUP,
1650                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1651                                           NULL,
1652                                           "cannot pop vlan without a "
1653                                           "match on (outer) vlan in the flow");
1654         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1655                 return rte_flow_error_set(error, EINVAL,
1656                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1657                                           "wrong action order, port_id should "
1658                                           "be after pop VLAN action");
1659         return 0;
1660 }
1661
1662 /**
1663  * Get VLAN default info from vlan match info.
1664  *
1665  * @param[in] dev
1666  *   Pointer to the rte_eth_dev structure.
1667  * @param[in] item
1668  *   the list of item specifications.
1669  * @param[out] vlan
1670  *   pointer VLAN info to fill to.
1671  * @param[out] error
1672  *   Pointer to error structure.
1673  *
1674  * @return
1675  *   0 on success, a negative errno value otherwise and rte_errno is set.
1676  */
1677 static void
1678 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1679                                   struct rte_vlan_hdr *vlan)
1680 {
1681         const struct rte_flow_item_vlan nic_mask = {
1682                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1683                                 MLX5DV_FLOW_VLAN_VID_MASK),
1684                 .inner_type = RTE_BE16(0xffff),
1685         };
1686
1687         if (items == NULL)
1688                 return;
1689         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1690                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1691                 ;
1692         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1693                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1694                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1695
1696                 if (!vlan_m)
1697                         vlan_m = &nic_mask;
1698                 /* Only full match values are accepted */
1699                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1700                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1701                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1702                         vlan->vlan_tci |=
1703                                 rte_be_to_cpu_16(vlan_v->tci &
1704                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1705                 }
1706                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1707                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1708                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1709                         vlan->vlan_tci |=
1710                                 rte_be_to_cpu_16(vlan_v->tci &
1711                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1712                 }
1713                 if (vlan_m->inner_type == nic_mask.inner_type)
1714                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1715                                                            vlan_m->inner_type);
1716         }
1717 }
1718
1719 /**
1720  * Validate the push VLAN action.
1721  *
1722  * @param[in] action_flags
1723  *   Holds the actions detected until now.
1724  * @param[in] action
1725  *   Pointer to the encap action.
1726  * @param[in] attr
1727  *   Pointer to flow attributes
1728  * @param[out] error
1729  *   Pointer to error structure.
1730  *
1731  * @return
1732  *   0 on success, a negative errno value otherwise and rte_errno is set.
1733  */
1734 static int
1735 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1736                                   uint64_t item_flags __rte_unused,
1737                                   const struct rte_flow_action *action,
1738                                   const struct rte_flow_attr *attr,
1739                                   struct rte_flow_error *error)
1740 {
1741         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1742
1743         if (attr->ingress)
1744                 return rte_flow_error_set(error, ENOTSUP,
1745                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1746                                           NULL,
1747                                           "push VLAN action not supported for "
1748                                           "ingress");
1749         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1750             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1751                 return rte_flow_error_set(error, EINVAL,
1752                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1753                                           "invalid vlan ethertype");
1754         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1755                 return rte_flow_error_set(error, ENOTSUP,
1756                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1757                                           "no support for multiple VLAN "
1758                                           "actions");
1759         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1760                 return rte_flow_error_set(error, EINVAL,
1761                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1762                                           "wrong action order, port_id should "
1763                                           "be after push VLAN");
1764         (void)attr;
1765         return 0;
1766 }
1767
1768 /**
1769  * Validate the set VLAN PCP.
1770  *
1771  * @param[in] action_flags
1772  *   Holds the actions detected until now.
1773  * @param[in] actions
1774  *   Pointer to the list of actions remaining in the flow rule.
1775  * @param[in] attr
1776  *   Pointer to flow attributes
1777  * @param[out] error
1778  *   Pointer to error structure.
1779  *
1780  * @return
1781  *   0 on success, a negative errno value otherwise and rte_errno is set.
1782  */
1783 static int
1784 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1785                                      const struct rte_flow_action actions[],
1786                                      struct rte_flow_error *error)
1787 {
1788         const struct rte_flow_action *action = actions;
1789         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1790
1791         if (conf->vlan_pcp > 7)
1792                 return rte_flow_error_set(error, EINVAL,
1793                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1794                                           "VLAN PCP value is too big");
1795         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1796                 return rte_flow_error_set(error, ENOTSUP,
1797                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1798                                           "set VLAN PCP action must follow "
1799                                           "the push VLAN action");
1800         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1801                 return rte_flow_error_set(error, ENOTSUP,
1802                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1803                                           "Multiple VLAN PCP modification are "
1804                                           "not supported");
1805         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1806                 return rte_flow_error_set(error, EINVAL,
1807                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1808                                           "wrong action order, port_id should "
1809                                           "be after set VLAN PCP");
1810         return 0;
1811 }
1812
1813 /**
1814  * Validate the set VLAN VID.
1815  *
1816  * @param[in] item_flags
1817  *   Holds the items detected in this rule.
1818  * @param[in] actions
1819  *   Pointer to the list of actions remaining in the flow rule.
1820  * @param[in] attr
1821  *   Pointer to flow attributes
1822  * @param[out] error
1823  *   Pointer to error structure.
1824  *
1825  * @return
1826  *   0 on success, a negative errno value otherwise and rte_errno is set.
1827  */
1828 static int
1829 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1830                                      uint64_t action_flags,
1831                                      const struct rte_flow_action actions[],
1832                                      struct rte_flow_error *error)
1833 {
1834         const struct rte_flow_action *action = actions;
1835         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1836
1837         if (conf->vlan_vid > RTE_BE16(0xFFE))
1838                 return rte_flow_error_set(error, EINVAL,
1839                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1840                                           "VLAN VID value is too big");
1841         /* there is an of_push_vlan action before us */
1842         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1843                 if (mlx5_flow_find_action(actions + 1,
1844                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1845                         return rte_flow_error_set(error, ENOTSUP,
1846                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1847                                         "Multiple VLAN VID modifications are "
1848                                         "not supported");
1849                 else
1850                         return 0;
1851         }
1852
1853         /*
1854          * Action is on an existing VLAN header:
1855          *    Need to verify this is a single modify CID action.
1856          *   Rule mast include a match on outer VLAN.
1857          */
1858         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1859                 return rte_flow_error_set(error, ENOTSUP,
1860                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1861                                           "Multiple VLAN VID modifications are "
1862                                           "not supported");
1863         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1864                 return rte_flow_error_set(error, EINVAL,
1865                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1866                                           "match on VLAN is required in order "
1867                                           "to set VLAN VID");
1868         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1869                 return rte_flow_error_set(error, EINVAL,
1870                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1871                                           "wrong action order, port_id should "
1872                                           "be after set VLAN VID");
1873         return 0;
1874 }
1875
1876 /*
1877  * Validate the FLAG action.
1878  *
1879  * @param[in] dev
1880  *   Pointer to the rte_eth_dev structure.
1881  * @param[in] action_flags
1882  *   Holds the actions detected until now.
1883  * @param[in] attr
1884  *   Pointer to flow attributes
1885  * @param[out] error
1886  *   Pointer to error structure.
1887  *
1888  * @return
1889  *   0 on success, a negative errno value otherwise and rte_errno is set.
1890  */
1891 static int
1892 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1893                              uint64_t action_flags,
1894                              const struct rte_flow_attr *attr,
1895                              struct rte_flow_error *error)
1896 {
1897         struct mlx5_priv *priv = dev->data->dev_private;
1898         struct mlx5_dev_config *config = &priv->config;
1899         int ret;
1900
1901         /* Fall back if no extended metadata register support. */
1902         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1903                 return mlx5_flow_validate_action_flag(action_flags, attr,
1904                                                       error);
1905         /* Extensive metadata mode requires registers. */
1906         if (!mlx5_flow_ext_mreg_supported(dev))
1907                 return rte_flow_error_set(error, ENOTSUP,
1908                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1909                                           "no metadata registers "
1910                                           "to support flag action");
1911         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1912                 return rte_flow_error_set(error, ENOTSUP,
1913                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1914                                           "extended metadata register"
1915                                           " isn't available");
1916         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1917         if (ret < 0)
1918                 return ret;
1919         assert(ret > 0);
1920         if (action_flags & MLX5_FLOW_ACTION_MARK)
1921                 return rte_flow_error_set(error, EINVAL,
1922                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1923                                           "can't mark and flag in same flow");
1924         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1925                 return rte_flow_error_set(error, EINVAL,
1926                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1927                                           "can't have 2 flag"
1928                                           " actions in same flow");
1929         return 0;
1930 }
1931
1932 /**
1933  * Validate MARK action.
1934  *
1935  * @param[in] dev
1936  *   Pointer to the rte_eth_dev structure.
1937  * @param[in] action
1938  *   Pointer to action.
1939  * @param[in] action_flags
1940  *   Holds the actions detected until now.
1941  * @param[in] attr
1942  *   Pointer to flow attributes
1943  * @param[out] error
1944  *   Pointer to error structure.
1945  *
1946  * @return
1947  *   0 on success, a negative errno value otherwise and rte_errno is set.
1948  */
1949 static int
1950 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1951                              const struct rte_flow_action *action,
1952                              uint64_t action_flags,
1953                              const struct rte_flow_attr *attr,
1954                              struct rte_flow_error *error)
1955 {
1956         struct mlx5_priv *priv = dev->data->dev_private;
1957         struct mlx5_dev_config *config = &priv->config;
1958         const struct rte_flow_action_mark *mark = action->conf;
1959         int ret;
1960
1961         /* Fall back if no extended metadata register support. */
1962         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1963                 return mlx5_flow_validate_action_mark(action, action_flags,
1964                                                       attr, error);
1965         /* Extensive metadata mode requires registers. */
1966         if (!mlx5_flow_ext_mreg_supported(dev))
1967                 return rte_flow_error_set(error, ENOTSUP,
1968                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1969                                           "no metadata registers "
1970                                           "to support mark action");
1971         if (!priv->sh->dv_mark_mask)
1972                 return rte_flow_error_set(error, ENOTSUP,
1973                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1974                                           "extended metadata register"
1975                                           " isn't available");
1976         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1977         if (ret < 0)
1978                 return ret;
1979         assert(ret > 0);
1980         if (!mark)
1981                 return rte_flow_error_set(error, EINVAL,
1982                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1983                                           "configuration cannot be null");
1984         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1985                 return rte_flow_error_set(error, EINVAL,
1986                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1987                                           &mark->id,
1988                                           "mark id exceeds the limit");
1989         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1990                 return rte_flow_error_set(error, EINVAL,
1991                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1992                                           "can't flag and mark in same flow");
1993         if (action_flags & MLX5_FLOW_ACTION_MARK)
1994                 return rte_flow_error_set(error, EINVAL,
1995                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1996                                           "can't have 2 mark actions in same"
1997                                           " flow");
1998         return 0;
1999 }
2000
2001 /**
2002  * Validate SET_META action.
2003  *
2004  * @param[in] dev
2005  *   Pointer to the rte_eth_dev structure.
2006  * @param[in] action
2007  *   Pointer to the encap action.
2008  * @param[in] action_flags
2009  *   Holds the actions detected until now.
2010  * @param[in] attr
2011  *   Pointer to flow attributes
2012  * @param[out] error
2013  *   Pointer to error structure.
2014  *
2015  * @return
2016  *   0 on success, a negative errno value otherwise and rte_errno is set.
2017  */
2018 static int
2019 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2020                                  const struct rte_flow_action *action,
2021                                  uint64_t action_flags __rte_unused,
2022                                  const struct rte_flow_attr *attr,
2023                                  struct rte_flow_error *error)
2024 {
2025         const struct rte_flow_action_set_meta *conf;
2026         uint32_t nic_mask = UINT32_MAX;
2027         enum modify_reg reg;
2028
2029         if (!mlx5_flow_ext_mreg_supported(dev))
2030                 return rte_flow_error_set(error, ENOTSUP,
2031                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2032                                           "extended metadata register"
2033                                           " isn't supported");
2034         reg = flow_dv_get_metadata_reg(dev, attr, error);
2035         if (reg < 0)
2036                 return reg;
2037         if (reg != REG_A && reg != REG_B) {
2038                 struct mlx5_priv *priv = dev->data->dev_private;
2039
2040                 nic_mask = priv->sh->dv_meta_mask;
2041         }
2042         if (!(action->conf))
2043                 return rte_flow_error_set(error, EINVAL,
2044                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2045                                           "configuration cannot be null");
2046         conf = (const struct rte_flow_action_set_meta *)action->conf;
2047         if (!conf->mask)
2048                 return rte_flow_error_set(error, EINVAL,
2049                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2050                                           "zero mask doesn't have any effect");
2051         if (conf->mask & ~nic_mask)
2052                 return rte_flow_error_set(error, EINVAL,
2053                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2054                                           "meta data must be within reg C0");
2055         if (!(conf->data & conf->mask))
2056                 return rte_flow_error_set(error, EINVAL,
2057                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2058                                           "zero value has no effect");
2059         return 0;
2060 }
2061
2062 /**
2063  * Validate SET_TAG action.
2064  *
2065  * @param[in] dev
2066  *   Pointer to the rte_eth_dev structure.
2067  * @param[in] action
2068  *   Pointer to the encap action.
2069  * @param[in] action_flags
2070  *   Holds the actions detected until now.
2071  * @param[in] attr
2072  *   Pointer to flow attributes
2073  * @param[out] error
2074  *   Pointer to error structure.
2075  *
2076  * @return
2077  *   0 on success, a negative errno value otherwise and rte_errno is set.
2078  */
2079 static int
2080 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2081                                 const struct rte_flow_action *action,
2082                                 uint64_t action_flags,
2083                                 const struct rte_flow_attr *attr,
2084                                 struct rte_flow_error *error)
2085 {
2086         const struct rte_flow_action_set_tag *conf;
2087         const uint64_t terminal_action_flags =
2088                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2089                 MLX5_FLOW_ACTION_RSS;
2090         int ret;
2091
2092         if (!mlx5_flow_ext_mreg_supported(dev))
2093                 return rte_flow_error_set(error, ENOTSUP,
2094                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2095                                           "extensive metadata register"
2096                                           " isn't supported");
2097         if (!(action->conf))
2098                 return rte_flow_error_set(error, EINVAL,
2099                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2100                                           "configuration cannot be null");
2101         conf = (const struct rte_flow_action_set_tag *)action->conf;
2102         if (!conf->mask)
2103                 return rte_flow_error_set(error, EINVAL,
2104                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2105                                           "zero mask doesn't have any effect");
2106         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2107         if (ret < 0)
2108                 return ret;
2109         if (!attr->transfer && attr->ingress &&
2110             (action_flags & terminal_action_flags))
2111                 return rte_flow_error_set(error, EINVAL,
2112                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2113                                           "set_tag has no effect"
2114                                           " with terminal actions");
2115         return 0;
2116 }
2117
2118 /**
2119  * Validate count action.
2120  *
2121  * @param[in] dev
2122  *   device otr.
2123  * @param[out] error
2124  *   Pointer to error structure.
2125  *
2126  * @return
2127  *   0 on success, a negative errno value otherwise and rte_errno is set.
2128  */
2129 static int
2130 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2131                               struct rte_flow_error *error)
2132 {
2133         struct mlx5_priv *priv = dev->data->dev_private;
2134
2135         if (!priv->config.devx)
2136                 goto notsup_err;
2137 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2138         return 0;
2139 #endif
2140 notsup_err:
2141         return rte_flow_error_set
2142                       (error, ENOTSUP,
2143                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2144                        NULL,
2145                        "count action not supported");
2146 }
2147
2148 /**
2149  * Validate the L2 encap action.
2150  *
2151  * @param[in] action_flags
2152  *   Holds the actions detected until now.
2153  * @param[in] action
2154  *   Pointer to the encap action.
2155  * @param[in] attr
2156  *   Pointer to flow attributes
2157  * @param[out] error
2158  *   Pointer to error structure.
2159  *
2160  * @return
2161  *   0 on success, a negative errno value otherwise and rte_errno is set.
2162  */
2163 static int
2164 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2165                                  const struct rte_flow_action *action,
2166                                  const struct rte_flow_attr *attr,
2167                                  struct rte_flow_error *error)
2168 {
2169         if (!(action->conf))
2170                 return rte_flow_error_set(error, EINVAL,
2171                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2172                                           "configuration cannot be null");
2173         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2174                 return rte_flow_error_set(error, EINVAL,
2175                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2176                                           "can only have a single encap or"
2177                                           " decap action in a flow");
2178         if (!attr->transfer && attr->ingress)
2179                 return rte_flow_error_set(error, ENOTSUP,
2180                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2181                                           NULL,
2182                                           "encap action not supported for "
2183                                           "ingress");
2184         return 0;
2185 }
2186
2187 /**
2188  * Validate the L2 decap action.
2189  *
2190  * @param[in] action_flags
2191  *   Holds the actions detected until now.
2192  * @param[in] attr
2193  *   Pointer to flow attributes
2194  * @param[out] error
2195  *   Pointer to error structure.
2196  *
2197  * @return
2198  *   0 on success, a negative errno value otherwise and rte_errno is set.
2199  */
2200 static int
2201 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2202                                  const struct rte_flow_attr *attr,
2203                                  struct rte_flow_error *error)
2204 {
2205         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2206                 return rte_flow_error_set(error, EINVAL,
2207                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2208                                           "can only have a single encap or"
2209                                           " decap action in a flow");
2210         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2211                 return rte_flow_error_set(error, EINVAL,
2212                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2213                                           "can't have decap action after"
2214                                           " modify action");
2215         if (attr->egress)
2216                 return rte_flow_error_set(error, ENOTSUP,
2217                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2218                                           NULL,
2219                                           "decap action not supported for "
2220                                           "egress");
2221         return 0;
2222 }
2223
2224 /**
2225  * Validate the raw encap action.
2226  *
2227  * @param[in] action_flags
2228  *   Holds the actions detected until now.
2229  * @param[in] action
2230  *   Pointer to the encap action.
2231  * @param[in] attr
2232  *   Pointer to flow attributes
2233  * @param[out] error
2234  *   Pointer to error structure.
2235  *
2236  * @return
2237  *   0 on success, a negative errno value otherwise and rte_errno is set.
2238  */
2239 static int
2240 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2241                                   const struct rte_flow_action *action,
2242                                   const struct rte_flow_attr *attr,
2243                                   struct rte_flow_error *error)
2244 {
2245         const struct rte_flow_action_raw_encap *raw_encap =
2246                 (const struct rte_flow_action_raw_encap *)action->conf;
2247         if (!(action->conf))
2248                 return rte_flow_error_set(error, EINVAL,
2249                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2250                                           "configuration cannot be null");
2251         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2252                 return rte_flow_error_set(error, EINVAL,
2253                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2254                                           "can only have a single encap"
2255                                           " action in a flow");
2256         /* encap without preceding decap is not supported for ingress */
2257         if (!attr->transfer &&  attr->ingress &&
2258             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2259                 return rte_flow_error_set(error, ENOTSUP,
2260                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2261                                           NULL,
2262                                           "encap action not supported for "
2263                                           "ingress");
2264         if (!raw_encap->size || !raw_encap->data)
2265                 return rte_flow_error_set(error, EINVAL,
2266                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2267                                           "raw encap data cannot be empty");
2268         return 0;
2269 }
2270
2271 /**
2272  * Validate the raw decap action.
2273  *
2274  * @param[in] action_flags
2275  *   Holds the actions detected until now.
2276  * @param[in] action
2277  *   Pointer to the encap action.
2278  * @param[in] attr
2279  *   Pointer to flow attributes
2280  * @param[out] error
2281  *   Pointer to error structure.
2282  *
2283  * @return
2284  *   0 on success, a negative errno value otherwise and rte_errno is set.
2285  */
2286 static int
2287 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2288                                   const struct rte_flow_action *action,
2289                                   const struct rte_flow_attr *attr,
2290                                   struct rte_flow_error *error)
2291 {
2292         const struct rte_flow_action_raw_decap *decap   = action->conf;
2293
2294         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2295                 return rte_flow_error_set(error, EINVAL,
2296                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2297                                           "can't have encap action before"
2298                                           " decap action");
2299         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2300                 return rte_flow_error_set(error, EINVAL,
2301                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2302                                           "can only have a single decap"
2303                                           " action in a flow");
2304         /* decap action is valid on egress only if it is followed by encap */
2305         if (attr->egress && decap &&
2306             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2307                 return rte_flow_error_set(error, ENOTSUP,
2308                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2309                                           NULL, "decap action not supported"
2310                                           " for egress");
2311         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2312                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2313                 return rte_flow_error_set(error, EINVAL,
2314                                           RTE_FLOW_ERROR_TYPE_ACTION,
2315                                           NULL,
2316                                           "can't have decap action "
2317                                           "after modify action");
2318         }
2319         return 0;
2320 }
2321
2322 /**
2323  * Find existing encap/decap resource or create and register a new one.
2324  *
2325  * @param[in, out] dev
2326  *   Pointer to rte_eth_dev structure.
2327  * @param[in, out] resource
2328  *   Pointer to encap/decap resource.
2329  * @parm[in, out] dev_flow
2330  *   Pointer to the dev_flow.
2331  * @param[out] error
2332  *   pointer to error structure.
2333  *
2334  * @return
2335  *   0 on success otherwise -errno and errno is set.
2336  */
2337 static int
2338 flow_dv_encap_decap_resource_register
2339                         (struct rte_eth_dev *dev,
2340                          struct mlx5_flow_dv_encap_decap_resource *resource,
2341                          struct mlx5_flow *dev_flow,
2342                          struct rte_flow_error *error)
2343 {
2344         struct mlx5_priv *priv = dev->data->dev_private;
2345         struct mlx5_ibv_shared *sh = priv->sh;
2346         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2347         struct mlx5dv_dr_domain *domain;
2348
2349         resource->flags = dev_flow->group ? 0 : 1;
2350         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2351                 domain = sh->fdb_domain;
2352         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2353                 domain = sh->rx_domain;
2354         else
2355                 domain = sh->tx_domain;
2356         /* Lookup a matching resource from cache. */
2357         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2358                 if (resource->reformat_type == cache_resource->reformat_type &&
2359                     resource->ft_type == cache_resource->ft_type &&
2360                     resource->flags == cache_resource->flags &&
2361                     resource->size == cache_resource->size &&
2362                     !memcmp((const void *)resource->buf,
2363                             (const void *)cache_resource->buf,
2364                             resource->size)) {
2365                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2366                                 (void *)cache_resource,
2367                                 rte_atomic32_read(&cache_resource->refcnt));
2368                         rte_atomic32_inc(&cache_resource->refcnt);
2369                         dev_flow->dv.encap_decap = cache_resource;
2370                         return 0;
2371                 }
2372         }
2373         /* Register new encap/decap resource. */
2374         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2375         if (!cache_resource)
2376                 return rte_flow_error_set(error, ENOMEM,
2377                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2378                                           "cannot allocate resource memory");
2379         *cache_resource = *resource;
2380         cache_resource->verbs_action =
2381                 mlx5_glue->dv_create_flow_action_packet_reformat
2382                         (sh->ctx, cache_resource->reformat_type,
2383                          cache_resource->ft_type, domain, cache_resource->flags,
2384                          cache_resource->size,
2385                          (cache_resource->size ? cache_resource->buf : NULL));
2386         if (!cache_resource->verbs_action) {
2387                 rte_free(cache_resource);
2388                 return rte_flow_error_set(error, ENOMEM,
2389                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2390                                           NULL, "cannot create action");
2391         }
2392         rte_atomic32_init(&cache_resource->refcnt);
2393         rte_atomic32_inc(&cache_resource->refcnt);
2394         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2395         dev_flow->dv.encap_decap = cache_resource;
2396         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2397                 (void *)cache_resource,
2398                 rte_atomic32_read(&cache_resource->refcnt));
2399         return 0;
2400 }
2401
2402 /**
2403  * Find existing table jump resource or create and register a new one.
2404  *
2405  * @param[in, out] dev
2406  *   Pointer to rte_eth_dev structure.
2407  * @param[in, out] tbl
2408  *   Pointer to flow table resource.
2409  * @parm[in, out] dev_flow
2410  *   Pointer to the dev_flow.
2411  * @param[out] error
2412  *   pointer to error structure.
2413  *
2414  * @return
2415  *   0 on success otherwise -errno and errno is set.
2416  */
2417 static int
2418 flow_dv_jump_tbl_resource_register
2419                         (struct rte_eth_dev *dev __rte_unused,
2420                          struct mlx5_flow_tbl_resource *tbl,
2421                          struct mlx5_flow *dev_flow,
2422                          struct rte_flow_error *error)
2423 {
2424         struct mlx5_flow_tbl_data_entry *tbl_data =
2425                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2426         int cnt;
2427
2428         assert(tbl);
2429         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2430         if (!cnt) {
2431                 tbl_data->jump.action =
2432                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2433                         (tbl->obj);
2434                 if (!tbl_data->jump.action)
2435                         return rte_flow_error_set(error, ENOMEM,
2436                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2437                                         NULL, "cannot create jump action");
2438                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2439                         (void *)&tbl_data->jump, cnt);
2440         } else {
2441                 assert(tbl_data->jump.action);
2442                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2443                         (void *)&tbl_data->jump, cnt);
2444         }
2445         rte_atomic32_inc(&tbl_data->jump.refcnt);
2446         dev_flow->dv.jump = &tbl_data->jump;
2447         return 0;
2448 }
2449
2450 /**
2451  * Find existing table port ID resource or create and register a new one.
2452  *
2453  * @param[in, out] dev
2454  *   Pointer to rte_eth_dev structure.
2455  * @param[in, out] resource
2456  *   Pointer to port ID action resource.
2457  * @parm[in, out] dev_flow
2458  *   Pointer to the dev_flow.
2459  * @param[out] error
2460  *   pointer to error structure.
2461  *
2462  * @return
2463  *   0 on success otherwise -errno and errno is set.
2464  */
2465 static int
2466 flow_dv_port_id_action_resource_register
2467                         (struct rte_eth_dev *dev,
2468                          struct mlx5_flow_dv_port_id_action_resource *resource,
2469                          struct mlx5_flow *dev_flow,
2470                          struct rte_flow_error *error)
2471 {
2472         struct mlx5_priv *priv = dev->data->dev_private;
2473         struct mlx5_ibv_shared *sh = priv->sh;
2474         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2475
2476         /* Lookup a matching resource from cache. */
2477         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2478                 if (resource->port_id == cache_resource->port_id) {
2479                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2480                                 "refcnt %d++",
2481                                 (void *)cache_resource,
2482                                 rte_atomic32_read(&cache_resource->refcnt));
2483                         rte_atomic32_inc(&cache_resource->refcnt);
2484                         dev_flow->dv.port_id_action = cache_resource;
2485                         return 0;
2486                 }
2487         }
2488         /* Register new port id action resource. */
2489         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2490         if (!cache_resource)
2491                 return rte_flow_error_set(error, ENOMEM,
2492                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2493                                           "cannot allocate resource memory");
2494         *cache_resource = *resource;
2495         /*
2496          * Depending on rdma_core version the glue routine calls
2497          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2498          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2499          */
2500         cache_resource->action =
2501                 mlx5_glue->dr_create_flow_action_dest_port
2502                         (priv->sh->fdb_domain, resource->port_id);
2503         if (!cache_resource->action) {
2504                 rte_free(cache_resource);
2505                 return rte_flow_error_set(error, ENOMEM,
2506                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2507                                           NULL, "cannot create action");
2508         }
2509         rte_atomic32_init(&cache_resource->refcnt);
2510         rte_atomic32_inc(&cache_resource->refcnt);
2511         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2512         dev_flow->dv.port_id_action = cache_resource;
2513         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2514                 (void *)cache_resource,
2515                 rte_atomic32_read(&cache_resource->refcnt));
2516         return 0;
2517 }
2518
2519 /**
2520  * Find existing push vlan resource or create and register a new one.
2521  *
2522  * @param [in, out] dev
2523  *   Pointer to rte_eth_dev structure.
2524  * @param[in, out] resource
2525  *   Pointer to port ID action resource.
2526  * @parm[in, out] dev_flow
2527  *   Pointer to the dev_flow.
2528  * @param[out] error
2529  *   pointer to error structure.
2530  *
2531  * @return
2532  *   0 on success otherwise -errno and errno is set.
2533  */
2534 static int
2535 flow_dv_push_vlan_action_resource_register
2536                        (struct rte_eth_dev *dev,
2537                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2538                         struct mlx5_flow *dev_flow,
2539                         struct rte_flow_error *error)
2540 {
2541         struct mlx5_priv *priv = dev->data->dev_private;
2542         struct mlx5_ibv_shared *sh = priv->sh;
2543         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2544         struct mlx5dv_dr_domain *domain;
2545
2546         /* Lookup a matching resource from cache. */
2547         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2548                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2549                     resource->ft_type == cache_resource->ft_type) {
2550                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2551                                 "refcnt %d++",
2552                                 (void *)cache_resource,
2553                                 rte_atomic32_read(&cache_resource->refcnt));
2554                         rte_atomic32_inc(&cache_resource->refcnt);
2555                         dev_flow->dv.push_vlan_res = cache_resource;
2556                         return 0;
2557                 }
2558         }
2559         /* Register new push_vlan action resource. */
2560         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2561         if (!cache_resource)
2562                 return rte_flow_error_set(error, ENOMEM,
2563                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2564                                           "cannot allocate resource memory");
2565         *cache_resource = *resource;
2566         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2567                 domain = sh->fdb_domain;
2568         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2569                 domain = sh->rx_domain;
2570         else
2571                 domain = sh->tx_domain;
2572         cache_resource->action =
2573                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2574                                                            resource->vlan_tag);
2575         if (!cache_resource->action) {
2576                 rte_free(cache_resource);
2577                 return rte_flow_error_set(error, ENOMEM,
2578                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2579                                           NULL, "cannot create action");
2580         }
2581         rte_atomic32_init(&cache_resource->refcnt);
2582         rte_atomic32_inc(&cache_resource->refcnt);
2583         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2584         dev_flow->dv.push_vlan_res = cache_resource;
2585         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2586                 (void *)cache_resource,
2587                 rte_atomic32_read(&cache_resource->refcnt));
2588         return 0;
2589 }
2590 /**
2591  * Get the size of specific rte_flow_item_type
2592  *
2593  * @param[in] item_type
2594  *   Tested rte_flow_item_type.
2595  *
2596  * @return
2597  *   sizeof struct item_type, 0 if void or irrelevant.
2598  */
2599 static size_t
2600 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2601 {
2602         size_t retval;
2603
2604         switch (item_type) {
2605         case RTE_FLOW_ITEM_TYPE_ETH:
2606                 retval = sizeof(struct rte_flow_item_eth);
2607                 break;
2608         case RTE_FLOW_ITEM_TYPE_VLAN:
2609                 retval = sizeof(struct rte_flow_item_vlan);
2610                 break;
2611         case RTE_FLOW_ITEM_TYPE_IPV4:
2612                 retval = sizeof(struct rte_flow_item_ipv4);
2613                 break;
2614         case RTE_FLOW_ITEM_TYPE_IPV6:
2615                 retval = sizeof(struct rte_flow_item_ipv6);
2616                 break;
2617         case RTE_FLOW_ITEM_TYPE_UDP:
2618                 retval = sizeof(struct rte_flow_item_udp);
2619                 break;
2620         case RTE_FLOW_ITEM_TYPE_TCP:
2621                 retval = sizeof(struct rte_flow_item_tcp);
2622                 break;
2623         case RTE_FLOW_ITEM_TYPE_VXLAN:
2624                 retval = sizeof(struct rte_flow_item_vxlan);
2625                 break;
2626         case RTE_FLOW_ITEM_TYPE_GRE:
2627                 retval = sizeof(struct rte_flow_item_gre);
2628                 break;
2629         case RTE_FLOW_ITEM_TYPE_NVGRE:
2630                 retval = sizeof(struct rte_flow_item_nvgre);
2631                 break;
2632         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2633                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2634                 break;
2635         case RTE_FLOW_ITEM_TYPE_MPLS:
2636                 retval = sizeof(struct rte_flow_item_mpls);
2637                 break;
2638         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2639         default:
2640                 retval = 0;
2641                 break;
2642         }
2643         return retval;
2644 }
2645
2646 #define MLX5_ENCAP_IPV4_VERSION         0x40
2647 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2648 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2649 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2650 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2651 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2652 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2653
2654 /**
2655  * Convert the encap action data from list of rte_flow_item to raw buffer
2656  *
2657  * @param[in] items
2658  *   Pointer to rte_flow_item objects list.
2659  * @param[out] buf
2660  *   Pointer to the output buffer.
2661  * @param[out] size
2662  *   Pointer to the output buffer size.
2663  * @param[out] error
2664  *   Pointer to the error structure.
2665  *
2666  * @return
2667  *   0 on success, a negative errno value otherwise and rte_errno is set.
2668  */
2669 static int
2670 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2671                            size_t *size, struct rte_flow_error *error)
2672 {
2673         struct rte_ether_hdr *eth = NULL;
2674         struct rte_vlan_hdr *vlan = NULL;
2675         struct rte_ipv4_hdr *ipv4 = NULL;
2676         struct rte_ipv6_hdr *ipv6 = NULL;
2677         struct rte_udp_hdr *udp = NULL;
2678         struct rte_vxlan_hdr *vxlan = NULL;
2679         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2680         struct rte_gre_hdr *gre = NULL;
2681         size_t len;
2682         size_t temp_size = 0;
2683
2684         if (!items)
2685                 return rte_flow_error_set(error, EINVAL,
2686                                           RTE_FLOW_ERROR_TYPE_ACTION,
2687                                           NULL, "invalid empty data");
2688         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2689                 len = flow_dv_get_item_len(items->type);
2690                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2691                         return rte_flow_error_set(error, EINVAL,
2692                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2693                                                   (void *)items->type,
2694                                                   "items total size is too big"
2695                                                   " for encap action");
2696                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2697                 switch (items->type) {
2698                 case RTE_FLOW_ITEM_TYPE_ETH:
2699                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2700                         break;
2701                 case RTE_FLOW_ITEM_TYPE_VLAN:
2702                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2703                         if (!eth)
2704                                 return rte_flow_error_set(error, EINVAL,
2705                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2706                                                 (void *)items->type,
2707                                                 "eth header not found");
2708                         if (!eth->ether_type)
2709                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2710                         break;
2711                 case RTE_FLOW_ITEM_TYPE_IPV4:
2712                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2713                         if (!vlan && !eth)
2714                                 return rte_flow_error_set(error, EINVAL,
2715                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2716                                                 (void *)items->type,
2717                                                 "neither eth nor vlan"
2718                                                 " header found");
2719                         if (vlan && !vlan->eth_proto)
2720                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2721                         else if (eth && !eth->ether_type)
2722                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2723                         if (!ipv4->version_ihl)
2724                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2725                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2726                         if (!ipv4->time_to_live)
2727                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2728                         break;
2729                 case RTE_FLOW_ITEM_TYPE_IPV6:
2730                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2731                         if (!vlan && !eth)
2732                                 return rte_flow_error_set(error, EINVAL,
2733                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2734                                                 (void *)items->type,
2735                                                 "neither eth nor vlan"
2736                                                 " header found");
2737                         if (vlan && !vlan->eth_proto)
2738                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2739                         else if (eth && !eth->ether_type)
2740                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2741                         if (!ipv6->vtc_flow)
2742                                 ipv6->vtc_flow =
2743                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2744                         if (!ipv6->hop_limits)
2745                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2746                         break;
2747                 case RTE_FLOW_ITEM_TYPE_UDP:
2748                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2749                         if (!ipv4 && !ipv6)
2750                                 return rte_flow_error_set(error, EINVAL,
2751                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2752                                                 (void *)items->type,
2753                                                 "ip header not found");
2754                         if (ipv4 && !ipv4->next_proto_id)
2755                                 ipv4->next_proto_id = IPPROTO_UDP;
2756                         else if (ipv6 && !ipv6->proto)
2757                                 ipv6->proto = IPPROTO_UDP;
2758                         break;
2759                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2760                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2761                         if (!udp)
2762                                 return rte_flow_error_set(error, EINVAL,
2763                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2764                                                 (void *)items->type,
2765                                                 "udp header not found");
2766                         if (!udp->dst_port)
2767                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2768                         if (!vxlan->vx_flags)
2769                                 vxlan->vx_flags =
2770                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2771                         break;
2772                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2773                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2774                         if (!udp)
2775                                 return rte_flow_error_set(error, EINVAL,
2776                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2777                                                 (void *)items->type,
2778                                                 "udp header not found");
2779                         if (!vxlan_gpe->proto)
2780                                 return rte_flow_error_set(error, EINVAL,
2781                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2782                                                 (void *)items->type,
2783                                                 "next protocol not found");
2784                         if (!udp->dst_port)
2785                                 udp->dst_port =
2786                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2787                         if (!vxlan_gpe->vx_flags)
2788                                 vxlan_gpe->vx_flags =
2789                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2790                         break;
2791                 case RTE_FLOW_ITEM_TYPE_GRE:
2792                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2793                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2794                         if (!gre->proto)
2795                                 return rte_flow_error_set(error, EINVAL,
2796                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2797                                                 (void *)items->type,
2798                                                 "next protocol not found");
2799                         if (!ipv4 && !ipv6)
2800                                 return rte_flow_error_set(error, EINVAL,
2801                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2802                                                 (void *)items->type,
2803                                                 "ip header not found");
2804                         if (ipv4 && !ipv4->next_proto_id)
2805                                 ipv4->next_proto_id = IPPROTO_GRE;
2806                         else if (ipv6 && !ipv6->proto)
2807                                 ipv6->proto = IPPROTO_GRE;
2808                         break;
2809                 case RTE_FLOW_ITEM_TYPE_VOID:
2810                         break;
2811                 default:
2812                         return rte_flow_error_set(error, EINVAL,
2813                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2814                                                   (void *)items->type,
2815                                                   "unsupported item type");
2816                         break;
2817                 }
2818                 temp_size += len;
2819         }
2820         *size = temp_size;
2821         return 0;
2822 }
2823
2824 static int
2825 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2826 {
2827         struct rte_ether_hdr *eth = NULL;
2828         struct rte_vlan_hdr *vlan = NULL;
2829         struct rte_ipv6_hdr *ipv6 = NULL;
2830         struct rte_udp_hdr *udp = NULL;
2831         char *next_hdr;
2832         uint16_t proto;
2833
2834         eth = (struct rte_ether_hdr *)data;
2835         next_hdr = (char *)(eth + 1);
2836         proto = RTE_BE16(eth->ether_type);
2837
2838         /* VLAN skipping */
2839         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2840                 vlan = (struct rte_vlan_hdr *)next_hdr;
2841                 proto = RTE_BE16(vlan->eth_proto);
2842                 next_hdr += sizeof(struct rte_vlan_hdr);
2843         }
2844
2845         /* HW calculates IPv4 csum. no need to proceed */
2846         if (proto == RTE_ETHER_TYPE_IPV4)
2847                 return 0;
2848
2849         /* non IPv4/IPv6 header. not supported */
2850         if (proto != RTE_ETHER_TYPE_IPV6) {
2851                 return rte_flow_error_set(error, ENOTSUP,
2852                                           RTE_FLOW_ERROR_TYPE_ACTION,
2853                                           NULL, "Cannot offload non IPv4/IPv6");
2854         }
2855
2856         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2857
2858         /* ignore non UDP */
2859         if (ipv6->proto != IPPROTO_UDP)
2860                 return 0;
2861
2862         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2863         udp->dgram_cksum = 0;
2864
2865         return 0;
2866 }
2867
2868 /**
2869  * Convert L2 encap action to DV specification.
2870  *
2871  * @param[in] dev
2872  *   Pointer to rte_eth_dev structure.
2873  * @param[in] action
2874  *   Pointer to action structure.
2875  * @param[in, out] dev_flow
2876  *   Pointer to the mlx5_flow.
2877  * @param[in] transfer
2878  *   Mark if the flow is E-Switch flow.
2879  * @param[out] error
2880  *   Pointer to the error structure.
2881  *
2882  * @return
2883  *   0 on success, a negative errno value otherwise and rte_errno is set.
2884  */
2885 static int
2886 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2887                                const struct rte_flow_action *action,
2888                                struct mlx5_flow *dev_flow,
2889                                uint8_t transfer,
2890                                struct rte_flow_error *error)
2891 {
2892         const struct rte_flow_item *encap_data;
2893         const struct rte_flow_action_raw_encap *raw_encap_data;
2894         struct mlx5_flow_dv_encap_decap_resource res = {
2895                 .reformat_type =
2896                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2897                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2898                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2899         };
2900
2901         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2902                 raw_encap_data =
2903                         (const struct rte_flow_action_raw_encap *)action->conf;
2904                 res.size = raw_encap_data->size;
2905                 memcpy(res.buf, raw_encap_data->data, res.size);
2906                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2907                         return -rte_errno;
2908         } else {
2909                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2910                         encap_data =
2911                                 ((const struct rte_flow_action_vxlan_encap *)
2912                                                 action->conf)->definition;
2913                 else
2914                         encap_data =
2915                                 ((const struct rte_flow_action_nvgre_encap *)
2916                                                 action->conf)->definition;
2917                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2918                                                &res.size, error))
2919                         return -rte_errno;
2920         }
2921         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2922                 return rte_flow_error_set(error, EINVAL,
2923                                           RTE_FLOW_ERROR_TYPE_ACTION,
2924                                           NULL, "can't create L2 encap action");
2925         return 0;
2926 }
2927
2928 /**
2929  * Convert L2 decap action to DV specification.
2930  *
2931  * @param[in] dev
2932  *   Pointer to rte_eth_dev structure.
2933  * @param[in, out] dev_flow
2934  *   Pointer to the mlx5_flow.
2935  * @param[in] transfer
2936  *   Mark if the flow is E-Switch flow.
2937  * @param[out] error
2938  *   Pointer to the error structure.
2939  *
2940  * @return
2941  *   0 on success, a negative errno value otherwise and rte_errno is set.
2942  */
2943 static int
2944 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2945                                struct mlx5_flow *dev_flow,
2946                                uint8_t transfer,
2947                                struct rte_flow_error *error)
2948 {
2949         struct mlx5_flow_dv_encap_decap_resource res = {
2950                 .size = 0,
2951                 .reformat_type =
2952                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2953                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2954                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2955         };
2956
2957         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2958                 return rte_flow_error_set(error, EINVAL,
2959                                           RTE_FLOW_ERROR_TYPE_ACTION,
2960                                           NULL, "can't create L2 decap action");
2961         return 0;
2962 }
2963
2964 /**
2965  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2966  *
2967  * @param[in] dev
2968  *   Pointer to rte_eth_dev structure.
2969  * @param[in] action
2970  *   Pointer to action structure.
2971  * @param[in, out] dev_flow
2972  *   Pointer to the mlx5_flow.
2973  * @param[in] attr
2974  *   Pointer to the flow attributes.
2975  * @param[out] error
2976  *   Pointer to the error structure.
2977  *
2978  * @return
2979  *   0 on success, a negative errno value otherwise and rte_errno is set.
2980  */
2981 static int
2982 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2983                                 const struct rte_flow_action *action,
2984                                 struct mlx5_flow *dev_flow,
2985                                 const struct rte_flow_attr *attr,
2986                                 struct rte_flow_error *error)
2987 {
2988         const struct rte_flow_action_raw_encap *encap_data;
2989         struct mlx5_flow_dv_encap_decap_resource res;
2990
2991         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2992         res.size = encap_data->size;
2993         memcpy(res.buf, encap_data->data, res.size);
2994         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2995                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2996                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2997         if (attr->transfer)
2998                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2999         else
3000                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3001                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3002         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3003                 return rte_flow_error_set(error, EINVAL,
3004                                           RTE_FLOW_ERROR_TYPE_ACTION,
3005                                           NULL, "can't create encap action");
3006         return 0;
3007 }
3008
3009 /**
3010  * Create action push VLAN.
3011  *
3012  * @param[in] dev
3013  *   Pointer to rte_eth_dev structure.
3014  * @param[in] vlan_tag
3015  *   the vlan tag to push to the Ethernet header.
3016  * @param[in, out] dev_flow
3017  *   Pointer to the mlx5_flow.
3018  * @param[in] attr
3019  *   Pointer to the flow attributes.
3020  * @param[out] error
3021  *   Pointer to the error structure.
3022  *
3023  * @return
3024  *   0 on success, a negative errno value otherwise and rte_errno is set.
3025  */
3026 static int
3027 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3028                                 const struct rte_flow_attr *attr,
3029                                 const struct rte_vlan_hdr *vlan,
3030                                 struct mlx5_flow *dev_flow,
3031                                 struct rte_flow_error *error)
3032 {
3033         struct mlx5_flow_dv_push_vlan_action_resource res;
3034
3035         res.vlan_tag =
3036                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3037                                  vlan->vlan_tci);
3038         if (attr->transfer)
3039                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3040         else
3041                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3042                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3043         return flow_dv_push_vlan_action_resource_register
3044                                             (dev, &res, dev_flow, error);
3045 }
3046
3047 /**
3048  * Validate the modify-header actions.
3049  *
3050  * @param[in] action_flags
3051  *   Holds the actions detected until now.
3052  * @param[in] action
3053  *   Pointer to the modify action.
3054  * @param[out] error
3055  *   Pointer to error structure.
3056  *
3057  * @return
3058  *   0 on success, a negative errno value otherwise and rte_errno is set.
3059  */
3060 static int
3061 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3062                                    const struct rte_flow_action *action,
3063                                    struct rte_flow_error *error)
3064 {
3065         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3066                 return rte_flow_error_set(error, EINVAL,
3067                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3068                                           NULL, "action configuration not set");
3069         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3070                 return rte_flow_error_set(error, EINVAL,
3071                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3072                                           "can't have encap action before"
3073                                           " modify action");
3074         return 0;
3075 }
3076
3077 /**
3078  * Validate the modify-header MAC address actions.
3079  *
3080  * @param[in] action_flags
3081  *   Holds the actions detected until now.
3082  * @param[in] action
3083  *   Pointer to the modify action.
3084  * @param[in] item_flags
3085  *   Holds the items detected.
3086  * @param[out] error
3087  *   Pointer to error structure.
3088  *
3089  * @return
3090  *   0 on success, a negative errno value otherwise and rte_errno is set.
3091  */
3092 static int
3093 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3094                                    const struct rte_flow_action *action,
3095                                    const uint64_t item_flags,
3096                                    struct rte_flow_error *error)
3097 {
3098         int ret = 0;
3099
3100         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3101         if (!ret) {
3102                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3103                         return rte_flow_error_set(error, EINVAL,
3104                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3105                                                   NULL,
3106                                                   "no L2 item in pattern");
3107         }
3108         return ret;
3109 }
3110
3111 /**
3112  * Validate the modify-header IPv4 address actions.
3113  *
3114  * @param[in] action_flags
3115  *   Holds the actions detected until now.
3116  * @param[in] action
3117  *   Pointer to the modify action.
3118  * @param[in] item_flags
3119  *   Holds the items detected.
3120  * @param[out] error
3121  *   Pointer to error structure.
3122  *
3123  * @return
3124  *   0 on success, a negative errno value otherwise and rte_errno is set.
3125  */
3126 static int
3127 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3128                                     const struct rte_flow_action *action,
3129                                     const uint64_t item_flags,
3130                                     struct rte_flow_error *error)
3131 {
3132         int ret = 0;
3133
3134         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3135         if (!ret) {
3136                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3137                         return rte_flow_error_set(error, EINVAL,
3138                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3139                                                   NULL,
3140                                                   "no ipv4 item in pattern");
3141         }
3142         return ret;
3143 }
3144
3145 /**
3146  * Validate the modify-header IPv6 address actions.
3147  *
3148  * @param[in] action_flags
3149  *   Holds the actions detected until now.
3150  * @param[in] action
3151  *   Pointer to the modify action.
3152  * @param[in] item_flags
3153  *   Holds the items detected.
3154  * @param[out] error
3155  *   Pointer to error structure.
3156  *
3157  * @return
3158  *   0 on success, a negative errno value otherwise and rte_errno is set.
3159  */
3160 static int
3161 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3162                                     const struct rte_flow_action *action,
3163                                     const uint64_t item_flags,
3164                                     struct rte_flow_error *error)
3165 {
3166         int ret = 0;
3167
3168         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3169         if (!ret) {
3170                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3171                         return rte_flow_error_set(error, EINVAL,
3172                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3173                                                   NULL,
3174                                                   "no ipv6 item in pattern");
3175         }
3176         return ret;
3177 }
3178
3179 /**
3180  * Validate the modify-header TP actions.
3181  *
3182  * @param[in] action_flags
3183  *   Holds the actions detected until now.
3184  * @param[in] action
3185  *   Pointer to the modify action.
3186  * @param[in] item_flags
3187  *   Holds the items detected.
3188  * @param[out] error
3189  *   Pointer to error structure.
3190  *
3191  * @return
3192  *   0 on success, a negative errno value otherwise and rte_errno is set.
3193  */
3194 static int
3195 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3196                                   const struct rte_flow_action *action,
3197                                   const uint64_t item_flags,
3198                                   struct rte_flow_error *error)
3199 {
3200         int ret = 0;
3201
3202         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3203         if (!ret) {
3204                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3205                         return rte_flow_error_set(error, EINVAL,
3206                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3207                                                   NULL, "no transport layer "
3208                                                   "in pattern");
3209         }
3210         return ret;
3211 }
3212
3213 /**
3214  * Validate the modify-header actions of increment/decrement
3215  * TCP Sequence-number.
3216  *
3217  * @param[in] action_flags
3218  *   Holds the actions detected until now.
3219  * @param[in] action
3220  *   Pointer to the modify action.
3221  * @param[in] item_flags
3222  *   Holds the items detected.
3223  * @param[out] error
3224  *   Pointer to error structure.
3225  *
3226  * @return
3227  *   0 on success, a negative errno value otherwise and rte_errno is set.
3228  */
3229 static int
3230 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3231                                        const struct rte_flow_action *action,
3232                                        const uint64_t item_flags,
3233                                        struct rte_flow_error *error)
3234 {
3235         int ret = 0;
3236
3237         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3238         if (!ret) {
3239                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3240                         return rte_flow_error_set(error, EINVAL,
3241                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3242                                                   NULL, "no TCP item in"
3243                                                   " pattern");
3244                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3245                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3246                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3247                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3248                         return rte_flow_error_set(error, EINVAL,
3249                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3250                                                   NULL,
3251                                                   "cannot decrease and increase"
3252                                                   " TCP sequence number"
3253                                                   " at the same time");
3254         }
3255         return ret;
3256 }
3257
3258 /**
3259  * Validate the modify-header actions of increment/decrement
3260  * TCP Acknowledgment number.
3261  *
3262  * @param[in] action_flags
3263  *   Holds the actions detected until now.
3264  * @param[in] action
3265  *   Pointer to the modify action.
3266  * @param[in] item_flags
3267  *   Holds the items detected.
3268  * @param[out] error
3269  *   Pointer to error structure.
3270  *
3271  * @return
3272  *   0 on success, a negative errno value otherwise and rte_errno is set.
3273  */
3274 static int
3275 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3276                                        const struct rte_flow_action *action,
3277                                        const uint64_t item_flags,
3278                                        struct rte_flow_error *error)
3279 {
3280         int ret = 0;
3281
3282         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3283         if (!ret) {
3284                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3285                         return rte_flow_error_set(error, EINVAL,
3286                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3287                                                   NULL, "no TCP item in"
3288                                                   " pattern");
3289                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3290                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3291                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3292                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3293                         return rte_flow_error_set(error, EINVAL,
3294                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3295                                                   NULL,
3296                                                   "cannot decrease and increase"
3297                                                   " TCP acknowledgment number"
3298                                                   " at the same time");
3299         }
3300         return ret;
3301 }
3302
3303 /**
3304  * Validate the modify-header TTL actions.
3305  *
3306  * @param[in] action_flags
3307  *   Holds the actions detected until now.
3308  * @param[in] action
3309  *   Pointer to the modify action.
3310  * @param[in] item_flags
3311  *   Holds the items detected.
3312  * @param[out] error
3313  *   Pointer to error structure.
3314  *
3315  * @return
3316  *   0 on success, a negative errno value otherwise and rte_errno is set.
3317  */
3318 static int
3319 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3320                                    const struct rte_flow_action *action,
3321                                    const uint64_t item_flags,
3322                                    struct rte_flow_error *error)
3323 {
3324         int ret = 0;
3325
3326         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3327         if (!ret) {
3328                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3329                         return rte_flow_error_set(error, EINVAL,
3330                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3331                                                   NULL,
3332                                                   "no IP protocol in pattern");
3333         }
3334         return ret;
3335 }
3336
3337 /**
3338  * Validate jump action.
3339  *
3340  * @param[in] action
3341  *   Pointer to the jump action.
3342  * @param[in] action_flags
3343  *   Holds the actions detected until now.
3344  * @param[in] attributes
3345  *   Pointer to flow attributes
3346  * @param[in] external
3347  *   Action belongs to flow rule created by request external to PMD.
3348  * @param[out] error
3349  *   Pointer to error structure.
3350  *
3351  * @return
3352  *   0 on success, a negative errno value otherwise and rte_errno is set.
3353  */
3354 static int
3355 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3356                              uint64_t action_flags,
3357                              const struct rte_flow_attr *attributes,
3358                              bool external, struct rte_flow_error *error)
3359 {
3360         uint32_t target_group, table;
3361         int ret = 0;
3362
3363         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3364                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3365                 return rte_flow_error_set(error, EINVAL,
3366                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3367                                           "can't have 2 fate actions in"
3368                                           " same flow");
3369         if (action_flags & MLX5_FLOW_ACTION_METER)
3370                 return rte_flow_error_set(error, ENOTSUP,
3371                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3372                                           "jump with meter not support");
3373         if (!action->conf)
3374                 return rte_flow_error_set(error, EINVAL,
3375                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3376                                           NULL, "action configuration not set");
3377         target_group =
3378                 ((const struct rte_flow_action_jump *)action->conf)->group;
3379         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3380                                        &table, error);
3381         if (ret)
3382                 return ret;
3383         if (attributes->group == target_group)
3384                 return rte_flow_error_set(error, EINVAL,
3385                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3386                                           "target group must be other than"
3387                                           " the current flow group");
3388         return 0;
3389 }
3390
3391 /*
3392  * Validate the port_id action.
3393  *
3394  * @param[in] dev
3395  *   Pointer to rte_eth_dev structure.
3396  * @param[in] action_flags
3397  *   Bit-fields that holds the actions detected until now.
3398  * @param[in] action
3399  *   Port_id RTE action structure.
3400  * @param[in] attr
3401  *   Attributes of flow that includes this action.
3402  * @param[out] error
3403  *   Pointer to error structure.
3404  *
3405  * @return
3406  *   0 on success, a negative errno value otherwise and rte_errno is set.
3407  */
3408 static int
3409 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3410                                 uint64_t action_flags,
3411                                 const struct rte_flow_action *action,
3412                                 const struct rte_flow_attr *attr,
3413                                 struct rte_flow_error *error)
3414 {
3415         const struct rte_flow_action_port_id *port_id;
3416         struct mlx5_priv *act_priv;
3417         struct mlx5_priv *dev_priv;
3418         uint16_t port;
3419
3420         if (!attr->transfer)
3421                 return rte_flow_error_set(error, ENOTSUP,
3422                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3423                                           NULL,
3424                                           "port id action is valid in transfer"
3425                                           " mode only");
3426         if (!action || !action->conf)
3427                 return rte_flow_error_set(error, ENOTSUP,
3428                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3429                                           NULL,
3430                                           "port id action parameters must be"
3431                                           " specified");
3432         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3433                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3434                 return rte_flow_error_set(error, EINVAL,
3435                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3436                                           "can have only one fate actions in"
3437                                           " a flow");
3438         dev_priv = mlx5_dev_to_eswitch_info(dev);
3439         if (!dev_priv)
3440                 return rte_flow_error_set(error, rte_errno,
3441                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3442                                           NULL,
3443                                           "failed to obtain E-Switch info");
3444         port_id = action->conf;
3445         port = port_id->original ? dev->data->port_id : port_id->id;
3446         act_priv = mlx5_port_to_eswitch_info(port, false);
3447         if (!act_priv)
3448                 return rte_flow_error_set
3449                                 (error, rte_errno,
3450                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3451                                  "failed to obtain E-Switch port id for port");
3452         if (act_priv->domain_id != dev_priv->domain_id)
3453                 return rte_flow_error_set
3454                                 (error, EINVAL,
3455                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3456                                  "port does not belong to"
3457                                  " E-Switch being configured");
3458         return 0;
3459 }
3460
3461 /**
3462  * Get the maximum number of modify header actions.
3463  *
3464  * @param dev
3465  *   Pointer to rte_eth_dev structure.
3466  * @param flags
3467  *   Flags bits to check if root level.
3468  *
3469  * @return
3470  *   Max number of modify header actions device can support.
3471  */
3472 static unsigned int
3473 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3474 {
3475         /*
3476          * There's no way to directly query the max cap. Although it has to be
3477          * acquried by iterative trial, it is a safe assumption that more
3478          * actions are supported by FW if extensive metadata register is
3479          * supported. (Only in the root table)
3480          */
3481         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3482                 return MLX5_MAX_MODIFY_NUM;
3483         else
3484                 return mlx5_flow_ext_mreg_supported(dev) ?
3485                                         MLX5_ROOT_TBL_MODIFY_NUM :
3486                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3487 }
3488
3489 /**
3490  * Validate the meter action.
3491  *
3492  * @param[in] dev
3493  *   Pointer to rte_eth_dev structure.
3494  * @param[in] action_flags
3495  *   Bit-fields that holds the actions detected until now.
3496  * @param[in] action
3497  *   Pointer to the meter action.
3498  * @param[in] attr
3499  *   Attributes of flow that includes this action.
3500  * @param[out] error
3501  *   Pointer to error structure.
3502  *
3503  * @return
3504  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3505  */
3506 static int
3507 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3508                                 uint64_t action_flags,
3509                                 const struct rte_flow_action *action,
3510                                 const struct rte_flow_attr *attr,
3511                                 struct rte_flow_error *error)
3512 {
3513         struct mlx5_priv *priv = dev->data->dev_private;
3514         const struct rte_flow_action_meter *am = action->conf;
3515         struct mlx5_flow_meter *fm;
3516
3517         if (!am)
3518                 return rte_flow_error_set(error, EINVAL,
3519                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3520                                           "meter action conf is NULL");
3521
3522         if (action_flags & MLX5_FLOW_ACTION_METER)
3523                 return rte_flow_error_set(error, ENOTSUP,
3524                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3525                                           "meter chaining not support");
3526         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3527                 return rte_flow_error_set(error, ENOTSUP,
3528                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3529                                           "meter with jump not support");
3530         if (!priv->mtr_en)
3531                 return rte_flow_error_set(error, ENOTSUP,
3532                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3533                                           NULL,
3534                                           "meter action not supported");
3535         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3536         if (!fm)
3537                 return rte_flow_error_set(error, EINVAL,
3538                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3539                                           "Meter not found");
3540         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3541               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3542               (!fm->attr.egress && !attr->egress && attr->ingress))))
3543                 return rte_flow_error_set(error, EINVAL,
3544                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3545                                           "Flow attributes are either invalid "
3546                                           "or have a conflict with current "
3547                                           "meter attributes");
3548         return 0;
3549 }
3550
3551 /**
3552  * Validate the modify-header IPv4 DSCP actions.
3553  *
3554  * @param[in] action_flags
3555  *   Holds the actions detected until now.
3556  * @param[in] action
3557  *   Pointer to the modify action.
3558  * @param[in] item_flags
3559  *   Holds the items detected.
3560  * @param[out] error
3561  *   Pointer to error structure.
3562  *
3563  * @return
3564  *   0 on success, a negative errno value otherwise and rte_errno is set.
3565  */
3566 static int
3567 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3568                                          const struct rte_flow_action *action,
3569                                          const uint64_t item_flags,
3570                                          struct rte_flow_error *error)
3571 {
3572         int ret = 0;
3573
3574         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3575         if (!ret) {
3576                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3577                         return rte_flow_error_set(error, EINVAL,
3578                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3579                                                   NULL,
3580                                                   "no ipv4 item in pattern");
3581         }
3582         return ret;
3583 }
3584
3585 /**
3586  * Validate the modify-header IPv6 DSCP actions.
3587  *
3588  * @param[in] action_flags
3589  *   Holds the actions detected until now.
3590  * @param[in] action
3591  *   Pointer to the modify action.
3592  * @param[in] item_flags
3593  *   Holds the items detected.
3594  * @param[out] error
3595  *   Pointer to error structure.
3596  *
3597  * @return
3598  *   0 on success, a negative errno value otherwise and rte_errno is set.
3599  */
3600 static int
3601 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3602                                          const struct rte_flow_action *action,
3603                                          const uint64_t item_flags,
3604                                          struct rte_flow_error *error)
3605 {
3606         int ret = 0;
3607
3608         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3609         if (!ret) {
3610                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3611                         return rte_flow_error_set(error, EINVAL,
3612                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3613                                                   NULL,
3614                                                   "no ipv6 item in pattern");
3615         }
3616         return ret;
3617 }
3618
3619 /**
3620  * Find existing modify-header resource or create and register a new one.
3621  *
3622  * @param dev[in, out]
3623  *   Pointer to rte_eth_dev structure.
3624  * @param[in, out] resource
3625  *   Pointer to modify-header resource.
3626  * @parm[in, out] dev_flow
3627  *   Pointer to the dev_flow.
3628  * @param[out] error
3629  *   pointer to error structure.
3630  *
3631  * @return
3632  *   0 on success otherwise -errno and errno is set.
3633  */
3634 static int
3635 flow_dv_modify_hdr_resource_register
3636                         (struct rte_eth_dev *dev,
3637                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3638                          struct mlx5_flow *dev_flow,
3639                          struct rte_flow_error *error)
3640 {
3641         struct mlx5_priv *priv = dev->data->dev_private;
3642         struct mlx5_ibv_shared *sh = priv->sh;
3643         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3644         struct mlx5dv_dr_domain *ns;
3645         uint32_t actions_len;
3646
3647         resource->flags =
3648                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3649         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3650                                     resource->flags))
3651                 return rte_flow_error_set(error, EOVERFLOW,
3652                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3653                                           "too many modify header items");
3654         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3655                 ns = sh->fdb_domain;
3656         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3657                 ns = sh->tx_domain;
3658         else
3659                 ns = sh->rx_domain;
3660         /* Lookup a matching resource from cache. */
3661         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3662         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3663                 if (resource->ft_type == cache_resource->ft_type &&
3664                     resource->actions_num == cache_resource->actions_num &&
3665                     resource->flags == cache_resource->flags &&
3666                     !memcmp((const void *)resource->actions,
3667                             (const void *)cache_resource->actions,
3668                             actions_len)) {
3669                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3670                                 (void *)cache_resource,
3671                                 rte_atomic32_read(&cache_resource->refcnt));
3672                         rte_atomic32_inc(&cache_resource->refcnt);
3673                         dev_flow->dv.modify_hdr = cache_resource;
3674                         return 0;
3675                 }
3676         }
3677         /* Register new modify-header resource. */
3678         cache_resource = rte_calloc(__func__, 1,
3679                                     sizeof(*cache_resource) + actions_len, 0);
3680         if (!cache_resource)
3681                 return rte_flow_error_set(error, ENOMEM,
3682                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3683                                           "cannot allocate resource memory");
3684         *cache_resource = *resource;
3685         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3686         cache_resource->verbs_action =
3687                 mlx5_glue->dv_create_flow_action_modify_header
3688                                         (sh->ctx, cache_resource->ft_type, ns,
3689                                          cache_resource->flags, actions_len,
3690                                          (uint64_t *)cache_resource->actions);
3691         if (!cache_resource->verbs_action) {
3692                 rte_free(cache_resource);
3693                 return rte_flow_error_set(error, ENOMEM,
3694                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3695                                           NULL, "cannot create action");
3696         }
3697         rte_atomic32_init(&cache_resource->refcnt);
3698         rte_atomic32_inc(&cache_resource->refcnt);
3699         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3700         dev_flow->dv.modify_hdr = cache_resource;
3701         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3702                 (void *)cache_resource,
3703                 rte_atomic32_read(&cache_resource->refcnt));
3704         return 0;
3705 }
3706
3707 #define MLX5_CNT_CONTAINER_RESIZE 64
3708
3709 /**
3710  * Get or create a flow counter.
3711  *
3712  * @param[in] dev
3713  *   Pointer to the Ethernet device structure.
3714  * @param[in] shared
3715  *   Indicate if this counter is shared with other flows.
3716  * @param[in] id
3717  *   Counter identifier.
3718  *
3719  * @return
3720  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3721  */
3722 static struct mlx5_flow_counter *
3723 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3724                                uint32_t id)
3725 {
3726         struct mlx5_priv *priv = dev->data->dev_private;
3727         struct mlx5_flow_counter *cnt = NULL;
3728         struct mlx5_devx_obj *dcs = NULL;
3729
3730         if (!priv->config.devx) {
3731                 rte_errno = ENOTSUP;
3732                 return NULL;
3733         }
3734         if (shared) {
3735                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3736                         if (cnt->shared && cnt->id == id) {
3737                                 cnt->ref_cnt++;
3738                                 return cnt;
3739                         }
3740                 }
3741         }
3742         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3743         if (!dcs)
3744                 return NULL;
3745         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3746         if (!cnt) {
3747                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3748                 rte_errno = ENOMEM;
3749                 return NULL;
3750         }
3751         struct mlx5_flow_counter tmpl = {
3752                 .shared = shared,
3753                 .ref_cnt = 1,
3754                 .id = id,
3755                 .dcs = dcs,
3756         };
3757         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3758         if (!tmpl.action) {
3759                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3760                 rte_errno = errno;
3761                 rte_free(cnt);
3762                 return NULL;
3763         }
3764         *cnt = tmpl;
3765         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3766         return cnt;
3767 }
3768
3769 /**
3770  * Release a flow counter.
3771  *
3772  * @param[in] dev
3773  *   Pointer to the Ethernet device structure.
3774  * @param[in] counter
3775  *   Pointer to the counter handler.
3776  */
3777 static void
3778 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3779                                  struct mlx5_flow_counter *counter)
3780 {
3781         struct mlx5_priv *priv = dev->data->dev_private;
3782
3783         if (!counter)
3784                 return;
3785         if (--counter->ref_cnt == 0) {
3786                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3787                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3788                 rte_free(counter);
3789         }
3790 }
3791
3792 /**
3793  * Query a devx flow counter.
3794  *
3795  * @param[in] dev
3796  *   Pointer to the Ethernet device structure.
3797  * @param[in] cnt
3798  *   Pointer to the flow counter.
3799  * @param[out] pkts
3800  *   The statistics value of packets.
3801  * @param[out] bytes
3802  *   The statistics value of bytes.
3803  *
3804  * @return
3805  *   0 on success, otherwise a negative errno value and rte_errno is set.
3806  */
3807 static inline int
3808 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3809                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3810                      uint64_t *bytes)
3811 {
3812         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3813                                                 0, NULL, NULL, 0);
3814 }
3815
3816 /**
3817  * Get a pool by a counter.
3818  *
3819  * @param[in] cnt
3820  *   Pointer to the counter.
3821  *
3822  * @return
3823  *   The counter pool.
3824  */
3825 static struct mlx5_flow_counter_pool *
3826 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3827 {
3828         if (!cnt->batch) {
3829                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3830                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3831         }
3832         return cnt->pool;
3833 }
3834
3835 /**
3836  * Get a pool by devx counter ID.
3837  *
3838  * @param[in] cont
3839  *   Pointer to the counter container.
3840  * @param[in] id
3841  *   The counter devx ID.
3842  *
3843  * @return
3844  *   The counter pool pointer if exists, NULL otherwise,
3845  */
3846 static struct mlx5_flow_counter_pool *
3847 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3848 {
3849         struct mlx5_flow_counter_pool *pool;
3850
3851         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3852                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3853                                 MLX5_COUNTERS_PER_POOL;
3854
3855                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3856                         return pool;
3857         };
3858         return NULL;
3859 }
3860
3861 /**
3862  * Allocate a new memory for the counter values wrapped by all the needed
3863  * management.
3864  *
3865  * @param[in] dev
3866  *   Pointer to the Ethernet device structure.
3867  * @param[in] raws_n
3868  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3869  *
3870  * @return
3871  *   The new memory management pointer on success, otherwise NULL and rte_errno
3872  *   is set.
3873  */
3874 static struct mlx5_counter_stats_mem_mng *
3875 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3876 {
3877         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3878                                         (dev->data->dev_private))->sh;
3879         struct mlx5_devx_mkey_attr mkey_attr;
3880         struct mlx5_counter_stats_mem_mng *mem_mng;
3881         volatile struct flow_counter_stats *raw_data;
3882         int size = (sizeof(struct flow_counter_stats) *
3883                         MLX5_COUNTERS_PER_POOL +
3884                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3885                         sizeof(struct mlx5_counter_stats_mem_mng);
3886         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3887         int i;
3888
3889         if (!mem) {
3890                 rte_errno = ENOMEM;
3891                 return NULL;
3892         }
3893         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3894         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3895         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3896                                                  IBV_ACCESS_LOCAL_WRITE);
3897         if (!mem_mng->umem) {
3898                 rte_errno = errno;
3899                 rte_free(mem);
3900                 return NULL;
3901         }
3902         mkey_attr.addr = (uintptr_t)mem;
3903         mkey_attr.size = size;
3904         mkey_attr.umem_id = mem_mng->umem->umem_id;
3905         mkey_attr.pd = sh->pdn;
3906         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3907         if (!mem_mng->dm) {
3908                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3909                 rte_errno = errno;
3910                 rte_free(mem);
3911                 return NULL;
3912         }
3913         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3914         raw_data = (volatile struct flow_counter_stats *)mem;
3915         for (i = 0; i < raws_n; ++i) {
3916                 mem_mng->raws[i].mem_mng = mem_mng;
3917                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3918         }
3919         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3920         return mem_mng;
3921 }
3922
3923 /**
3924  * Resize a counter container.
3925  *
3926  * @param[in] dev
3927  *   Pointer to the Ethernet device structure.
3928  * @param[in] batch
3929  *   Whether the pool is for counter that was allocated by batch command.
3930  *
3931  * @return
3932  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3933  */
3934 static struct mlx5_pools_container *
3935 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3936 {
3937         struct mlx5_priv *priv = dev->data->dev_private;
3938         struct mlx5_pools_container *cont =
3939                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3940         struct mlx5_pools_container *new_cont =
3941                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3942         struct mlx5_counter_stats_mem_mng *mem_mng;
3943         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3944         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3945         int i;
3946
3947         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3948                 /* The last resize still hasn't detected by the host thread. */
3949                 rte_errno = EAGAIN;
3950                 return NULL;
3951         }
3952         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3953         if (!new_cont->pools) {
3954                 rte_errno = ENOMEM;
3955                 return NULL;
3956         }
3957         if (cont->n)
3958                 memcpy(new_cont->pools, cont->pools, cont->n *
3959                        sizeof(struct mlx5_flow_counter_pool *));
3960         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3961                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3962         if (!mem_mng) {
3963                 rte_free(new_cont->pools);
3964                 return NULL;
3965         }
3966         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3967                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3968                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3969                                  i, next);
3970         new_cont->n = resize;
3971         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3972         TAILQ_INIT(&new_cont->pool_list);
3973         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3974         new_cont->init_mem_mng = mem_mng;
3975         rte_cio_wmb();
3976          /* Flip the master container. */
3977         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3978         return new_cont;
3979 }
3980
3981 /**
3982  * Query a devx flow counter.
3983  *
3984  * @param[in] dev
3985  *   Pointer to the Ethernet device structure.
3986  * @param[in] cnt
3987  *   Pointer to the flow counter.
3988  * @param[out] pkts
3989  *   The statistics value of packets.
3990  * @param[out] bytes
3991  *   The statistics value of bytes.
3992  *
3993  * @return
3994  *   0 on success, otherwise a negative errno value and rte_errno is set.
3995  */
3996 static inline int
3997 _flow_dv_query_count(struct rte_eth_dev *dev,
3998                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3999                      uint64_t *bytes)
4000 {
4001         struct mlx5_priv *priv = dev->data->dev_private;
4002         struct mlx5_flow_counter_pool *pool =
4003                         flow_dv_counter_pool_get(cnt);
4004         int offset = cnt - &pool->counters_raw[0];
4005
4006         if (priv->counter_fallback)
4007                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4008
4009         rte_spinlock_lock(&pool->sl);
4010         /*
4011          * The single counters allocation may allocate smaller ID than the
4012          * current allocated in parallel to the host reading.
4013          * In this case the new counter values must be reported as 0.
4014          */
4015         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4016                 *pkts = 0;
4017                 *bytes = 0;
4018         } else {
4019                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4020                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4021         }
4022         rte_spinlock_unlock(&pool->sl);
4023         return 0;
4024 }
4025
4026 /**
4027  * Create and initialize a new counter pool.
4028  *
4029  * @param[in] dev
4030  *   Pointer to the Ethernet device structure.
4031  * @param[out] dcs
4032  *   The devX counter handle.
4033  * @param[in] batch
4034  *   Whether the pool is for counter that was allocated by batch command.
4035  *
4036  * @return
4037  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4038  */
4039 static struct mlx5_flow_counter_pool *
4040 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4041                     uint32_t batch)
4042 {
4043         struct mlx5_priv *priv = dev->data->dev_private;
4044         struct mlx5_flow_counter_pool *pool;
4045         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4046                                                                0);
4047         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4048         uint32_t size;
4049
4050         if (cont->n == n_valid) {
4051                 cont = flow_dv_container_resize(dev, batch);
4052                 if (!cont)
4053                         return NULL;
4054         }
4055         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4056                         sizeof(struct mlx5_flow_counter);
4057         pool = rte_calloc(__func__, 1, size, 0);
4058         if (!pool) {
4059                 rte_errno = ENOMEM;
4060                 return NULL;
4061         }
4062         pool->min_dcs = dcs;
4063         pool->raw = cont->init_mem_mng->raws + n_valid %
4064                                                      MLX5_CNT_CONTAINER_RESIZE;
4065         pool->raw_hw = NULL;
4066         rte_spinlock_init(&pool->sl);
4067         /*
4068          * The generation of the new allocated counters in this pool is 0, 2 in
4069          * the pool generation makes all the counters valid for allocation.
4070          */
4071         rte_atomic64_set(&pool->query_gen, 0x2);
4072         TAILQ_INIT(&pool->counters);
4073         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4074         cont->pools[n_valid] = pool;
4075         /* Pool initialization must be updated before host thread access. */
4076         rte_cio_wmb();
4077         rte_atomic16_add(&cont->n_valid, 1);
4078         return pool;
4079 }
4080
4081 /**
4082  * Prepare a new counter and/or a new counter pool.
4083  *
4084  * @param[in] dev
4085  *   Pointer to the Ethernet device structure.
4086  * @param[out] cnt_free
4087  *   Where to put the pointer of a new counter.
4088  * @param[in] batch
4089  *   Whether the pool is for counter that was allocated by batch command.
4090  *
4091  * @return
4092  *   The free counter pool pointer and @p cnt_free is set on success,
4093  *   NULL otherwise and rte_errno is set.
4094  */
4095 static struct mlx5_flow_counter_pool *
4096 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4097                              struct mlx5_flow_counter **cnt_free,
4098                              uint32_t batch)
4099 {
4100         struct mlx5_priv *priv = dev->data->dev_private;
4101         struct mlx5_flow_counter_pool *pool;
4102         struct mlx5_devx_obj *dcs = NULL;
4103         struct mlx5_flow_counter *cnt;
4104         uint32_t i;
4105
4106         if (!batch) {
4107                 /* bulk_bitmap must be 0 for single counter allocation. */
4108                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4109                 if (!dcs)
4110                         return NULL;
4111                 pool = flow_dv_find_pool_by_id
4112                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4113                 if (!pool) {
4114                         pool = flow_dv_pool_create(dev, dcs, batch);
4115                         if (!pool) {
4116                                 mlx5_devx_cmd_destroy(dcs);
4117                                 return NULL;
4118                         }
4119                 } else if (dcs->id < pool->min_dcs->id) {
4120                         rte_atomic64_set(&pool->a64_dcs,
4121                                          (int64_t)(uintptr_t)dcs);
4122                 }
4123                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4124                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4125                 cnt->dcs = dcs;
4126                 *cnt_free = cnt;
4127                 return pool;
4128         }
4129         /* bulk_bitmap is in 128 counters units. */
4130         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4131                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4132         if (!dcs) {
4133                 rte_errno = ENODATA;
4134                 return NULL;
4135         }
4136         pool = flow_dv_pool_create(dev, dcs, batch);
4137         if (!pool) {
4138                 mlx5_devx_cmd_destroy(dcs);
4139                 return NULL;
4140         }
4141         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4142                 cnt = &pool->counters_raw[i];
4143                 cnt->pool = pool;
4144                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4145         }
4146         *cnt_free = &pool->counters_raw[0];
4147         return pool;
4148 }
4149
4150 /**
4151  * Search for existed shared counter.
4152  *
4153  * @param[in] cont
4154  *   Pointer to the relevant counter pool container.
4155  * @param[in] id
4156  *   The shared counter ID to search.
4157  *
4158  * @return
4159  *   NULL if not existed, otherwise pointer to the shared counter.
4160  */
4161 static struct mlx5_flow_counter *
4162 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4163                               uint32_t id)
4164 {
4165         static struct mlx5_flow_counter *cnt;
4166         struct mlx5_flow_counter_pool *pool;
4167         int i;
4168
4169         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4170                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4171                         cnt = &pool->counters_raw[i];
4172                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4173                                 return cnt;
4174                 }
4175         }
4176         return NULL;
4177 }
4178
4179 /**
4180  * Allocate a flow counter.
4181  *
4182  * @param[in] dev
4183  *   Pointer to the Ethernet device structure.
4184  * @param[in] shared
4185  *   Indicate if this counter is shared with other flows.
4186  * @param[in] id
4187  *   Counter identifier.
4188  * @param[in] group
4189  *   Counter flow group.
4190  *
4191  * @return
4192  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4193  */
4194 static struct mlx5_flow_counter *
4195 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4196                       uint16_t group)
4197 {
4198         struct mlx5_priv *priv = dev->data->dev_private;
4199         struct mlx5_flow_counter_pool *pool = NULL;
4200         struct mlx5_flow_counter *cnt_free = NULL;
4201         /*
4202          * Currently group 0 flow counter cannot be assigned to a flow if it is
4203          * not the first one in the batch counter allocation, so it is better
4204          * to allocate counters one by one for these flows in a separate
4205          * container.
4206          * A counter can be shared between different groups so need to take
4207          * shared counters from the single container.
4208          */
4209         uint32_t batch = (group && !shared) ? 1 : 0;
4210         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4211                                                                0);
4212
4213         if (priv->counter_fallback)
4214                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4215         if (!priv->config.devx) {
4216                 rte_errno = ENOTSUP;
4217                 return NULL;
4218         }
4219         if (shared) {
4220                 cnt_free = flow_dv_counter_shared_search(cont, id);
4221                 if (cnt_free) {
4222                         if (cnt_free->ref_cnt + 1 == 0) {
4223                                 rte_errno = E2BIG;
4224                                 return NULL;
4225                         }
4226                         cnt_free->ref_cnt++;
4227                         return cnt_free;
4228                 }
4229         }
4230         /* Pools which has a free counters are in the start. */
4231         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4232                 /*
4233                  * The free counter reset values must be updated between the
4234                  * counter release to the counter allocation, so, at least one
4235                  * query must be done in this time. ensure it by saving the
4236                  * query generation in the release time.
4237                  * The free list is sorted according to the generation - so if
4238                  * the first one is not updated, all the others are not
4239                  * updated too.
4240                  */
4241                 cnt_free = TAILQ_FIRST(&pool->counters);
4242                 if (cnt_free && cnt_free->query_gen + 1 <
4243                     rte_atomic64_read(&pool->query_gen))
4244                         break;
4245                 cnt_free = NULL;
4246         }
4247         if (!cnt_free) {
4248                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4249                 if (!pool)
4250                         return NULL;
4251         }
4252         cnt_free->batch = batch;
4253         /* Create a DV counter action only in the first time usage. */
4254         if (!cnt_free->action) {
4255                 uint16_t offset;
4256                 struct mlx5_devx_obj *dcs;
4257
4258                 if (batch) {
4259                         offset = cnt_free - &pool->counters_raw[0];
4260                         dcs = pool->min_dcs;
4261                 } else {
4262                         offset = 0;
4263                         dcs = cnt_free->dcs;
4264                 }
4265                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4266                                         (dcs->obj, offset);
4267                 if (!cnt_free->action) {
4268                         rte_errno = errno;
4269                         return NULL;
4270                 }
4271         }
4272         /* Update the counter reset values. */
4273         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4274                                  &cnt_free->bytes))
4275                 return NULL;
4276         cnt_free->shared = shared;
4277         cnt_free->ref_cnt = 1;
4278         cnt_free->id = id;
4279         if (!priv->sh->cmng.query_thread_on)
4280                 /* Start the asynchronous batch query by the host thread. */
4281                 mlx5_set_query_alarm(priv->sh);
4282         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4283         if (TAILQ_EMPTY(&pool->counters)) {
4284                 /* Move the pool to the end of the container pool list. */
4285                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4286                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4287         }
4288         return cnt_free;
4289 }
4290
4291 /**
4292  * Release a flow counter.
4293  *
4294  * @param[in] dev
4295  *   Pointer to the Ethernet device structure.
4296  * @param[in] counter
4297  *   Pointer to the counter handler.
4298  */
4299 static void
4300 flow_dv_counter_release(struct rte_eth_dev *dev,
4301                         struct mlx5_flow_counter *counter)
4302 {
4303         struct mlx5_priv *priv = dev->data->dev_private;
4304
4305         if (!counter)
4306                 return;
4307         if (priv->counter_fallback) {
4308                 flow_dv_counter_release_fallback(dev, counter);
4309                 return;
4310         }
4311         if (--counter->ref_cnt == 0) {
4312                 struct mlx5_flow_counter_pool *pool =
4313                                 flow_dv_counter_pool_get(counter);
4314
4315                 /* Put the counter in the end - the last updated one. */
4316                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4317                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4318         }
4319 }
4320
4321 /**
4322  * Verify the @p attributes will be correctly understood by the NIC and store
4323  * them in the @p flow if everything is correct.
4324  *
4325  * @param[in] dev
4326  *   Pointer to dev struct.
4327  * @param[in] attributes
4328  *   Pointer to flow attributes
4329  * @param[in] external
4330  *   This flow rule is created by request external to PMD.
4331  * @param[out] error
4332  *   Pointer to error structure.
4333  *
4334  * @return
4335  *   0 on success, a negative errno value otherwise and rte_errno is set.
4336  */
4337 static int
4338 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4339                             const struct rte_flow_attr *attributes,
4340                             bool external __rte_unused,
4341                             struct rte_flow_error *error)
4342 {
4343         struct mlx5_priv *priv = dev->data->dev_private;
4344         uint32_t priority_max = priv->config.flow_prio - 1;
4345
4346 #ifndef HAVE_MLX5DV_DR
4347         if (attributes->group)
4348                 return rte_flow_error_set(error, ENOTSUP,
4349                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4350                                           NULL,
4351                                           "groups are not supported");
4352 #else
4353         uint32_t table;
4354         int ret;
4355
4356         ret = mlx5_flow_group_to_table(attributes, external,
4357                                        attributes->group,
4358                                        &table, error);
4359         if (ret)
4360                 return ret;
4361 #endif
4362         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4363             attributes->priority >= priority_max)
4364                 return rte_flow_error_set(error, ENOTSUP,
4365                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4366                                           NULL,
4367                                           "priority out of range");
4368         if (attributes->transfer) {
4369                 if (!priv->config.dv_esw_en)
4370                         return rte_flow_error_set
4371                                 (error, ENOTSUP,
4372                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4373                                  "E-Switch dr is not supported");
4374                 if (!(priv->representor || priv->master))
4375                         return rte_flow_error_set
4376                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4377                                  NULL, "E-Switch configuration can only be"
4378                                  " done by a master or a representor device");
4379                 if (attributes->egress)
4380                         return rte_flow_error_set
4381                                 (error, ENOTSUP,
4382                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4383                                  "egress is not supported");
4384         }
4385         if (!(attributes->egress ^ attributes->ingress))
4386                 return rte_flow_error_set(error, ENOTSUP,
4387                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4388                                           "must specify exactly one of "
4389                                           "ingress or egress");
4390         return 0;
4391 }
4392
4393 /**
4394  * Internal validation function. For validating both actions and items.
4395  *
4396  * @param[in] dev
4397  *   Pointer to the rte_eth_dev structure.
4398  * @param[in] attr
4399  *   Pointer to the flow attributes.
4400  * @param[in] items
4401  *   Pointer to the list of items.
4402  * @param[in] actions
4403  *   Pointer to the list of actions.
4404  * @param[in] external
4405  *   This flow rule is created by request external to PMD.
4406  * @param[out] error
4407  *   Pointer to the error structure.
4408  *
4409  * @return
4410  *   0 on success, a negative errno value otherwise and rte_errno is set.
4411  */
4412 static int
4413 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4414                  const struct rte_flow_item items[],
4415                  const struct rte_flow_action actions[],
4416                  bool external, struct rte_flow_error *error)
4417 {
4418         int ret;
4419         uint64_t action_flags = 0;
4420         uint64_t item_flags = 0;
4421         uint64_t last_item = 0;
4422         uint8_t next_protocol = 0xff;
4423         uint16_t ether_type = 0;
4424         int actions_n = 0;
4425         const struct rte_flow_item *gre_item = NULL;
4426         struct rte_flow_item_tcp nic_tcp_mask = {
4427                 .hdr = {
4428                         .tcp_flags = 0xFF,
4429                         .src_port = RTE_BE16(UINT16_MAX),
4430                         .dst_port = RTE_BE16(UINT16_MAX),
4431                 }
4432         };
4433         struct mlx5_priv *priv = dev->data->dev_private;
4434         struct mlx5_dev_config *dev_conf = &priv->config;
4435
4436         if (items == NULL)
4437                 return -1;
4438         ret = flow_dv_validate_attributes(dev, attr, external, error);
4439         if (ret < 0)
4440                 return ret;
4441         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4442                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4443                 int type = items->type;
4444
4445                 switch (type) {
4446                 case RTE_FLOW_ITEM_TYPE_VOID:
4447                         break;
4448                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4449                         ret = flow_dv_validate_item_port_id
4450                                         (dev, items, attr, item_flags, error);
4451                         if (ret < 0)
4452                                 return ret;
4453                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4454                         break;
4455                 case RTE_FLOW_ITEM_TYPE_ETH:
4456                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4457                                                           error);
4458                         if (ret < 0)
4459                                 return ret;
4460                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4461                                              MLX5_FLOW_LAYER_OUTER_L2;
4462                         if (items->mask != NULL && items->spec != NULL) {
4463                                 ether_type =
4464                                         ((const struct rte_flow_item_eth *)
4465                                          items->spec)->type;
4466                                 ether_type &=
4467                                         ((const struct rte_flow_item_eth *)
4468                                          items->mask)->type;
4469                                 ether_type = rte_be_to_cpu_16(ether_type);
4470                         } else {
4471                                 ether_type = 0;
4472                         }
4473                         break;
4474                 case RTE_FLOW_ITEM_TYPE_VLAN:
4475                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4476                                                            dev, error);
4477                         if (ret < 0)
4478                                 return ret;
4479                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4480                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4481                         if (items->mask != NULL && items->spec != NULL) {
4482                                 ether_type =
4483                                         ((const struct rte_flow_item_vlan *)
4484                                          items->spec)->inner_type;
4485                                 ether_type &=
4486                                         ((const struct rte_flow_item_vlan *)
4487                                          items->mask)->inner_type;
4488                                 ether_type = rte_be_to_cpu_16(ether_type);
4489                         } else {
4490                                 ether_type = 0;
4491                         }
4492                         break;
4493                 case RTE_FLOW_ITEM_TYPE_IPV4:
4494                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4495                                                   &item_flags, &tunnel);
4496                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4497                                                            last_item,
4498                                                            ether_type, NULL,
4499                                                            error);
4500                         if (ret < 0)
4501                                 return ret;
4502                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4503                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4504                         if (items->mask != NULL &&
4505                             ((const struct rte_flow_item_ipv4 *)
4506                              items->mask)->hdr.next_proto_id) {
4507                                 next_protocol =
4508                                         ((const struct rte_flow_item_ipv4 *)
4509                                          (items->spec))->hdr.next_proto_id;
4510                                 next_protocol &=
4511                                         ((const struct rte_flow_item_ipv4 *)
4512                                          (items->mask))->hdr.next_proto_id;
4513                         } else {
4514                                 /* Reset for inner layer. */
4515                                 next_protocol = 0xff;
4516                         }
4517                         break;
4518                 case RTE_FLOW_ITEM_TYPE_IPV6:
4519                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4520                                                   &item_flags, &tunnel);
4521                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4522                                                            last_item,
4523                                                            ether_type, NULL,
4524                                                            error);
4525                         if (ret < 0)
4526                                 return ret;
4527                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4528                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4529                         if (items->mask != NULL &&
4530                             ((const struct rte_flow_item_ipv6 *)
4531                              items->mask)->hdr.proto) {
4532                                 next_protocol =
4533                                         ((const struct rte_flow_item_ipv6 *)
4534                                          items->spec)->hdr.proto;
4535                                 next_protocol &=
4536                                         ((const struct rte_flow_item_ipv6 *)
4537                                          items->mask)->hdr.proto;
4538                         } else {
4539                                 /* Reset for inner layer. */
4540                                 next_protocol = 0xff;
4541                         }
4542                         break;
4543                 case RTE_FLOW_ITEM_TYPE_TCP:
4544                         ret = mlx5_flow_validate_item_tcp
4545                                                 (items, item_flags,
4546                                                  next_protocol,
4547                                                  &nic_tcp_mask,
4548                                                  error);
4549                         if (ret < 0)
4550                                 return ret;
4551                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4552                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4553                         break;
4554                 case RTE_FLOW_ITEM_TYPE_UDP:
4555                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4556                                                           next_protocol,
4557                                                           error);
4558                         if (ret < 0)
4559                                 return ret;
4560                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4561                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4562                         break;
4563                 case RTE_FLOW_ITEM_TYPE_GRE:
4564                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4565                                                           next_protocol, error);
4566                         if (ret < 0)
4567                                 return ret;
4568                         gre_item = items;
4569                         last_item = MLX5_FLOW_LAYER_GRE;
4570                         break;
4571                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4572                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4573                                                             next_protocol,
4574                                                             error);
4575                         if (ret < 0)
4576                                 return ret;
4577                         last_item = MLX5_FLOW_LAYER_NVGRE;
4578                         break;
4579                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4580                         ret = mlx5_flow_validate_item_gre_key
4581                                 (items, item_flags, gre_item, error);
4582                         if (ret < 0)
4583                                 return ret;
4584                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4585                         break;
4586                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4587                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4588                                                             error);
4589                         if (ret < 0)
4590                                 return ret;
4591                         last_item = MLX5_FLOW_LAYER_VXLAN;
4592                         break;
4593                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4594                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4595                                                                 item_flags, dev,
4596                                                                 error);
4597                         if (ret < 0)
4598                                 return ret;
4599                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4600                         break;
4601                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4602                         ret = mlx5_flow_validate_item_geneve(items,
4603                                                              item_flags, dev,
4604                                                              error);
4605                         if (ret < 0)
4606                                 return ret;
4607                         last_item = MLX5_FLOW_LAYER_GENEVE;
4608                         break;
4609                 case RTE_FLOW_ITEM_TYPE_MPLS:
4610                         ret = mlx5_flow_validate_item_mpls(dev, items,
4611                                                            item_flags,
4612                                                            last_item, error);
4613                         if (ret < 0)
4614                                 return ret;
4615                         last_item = MLX5_FLOW_LAYER_MPLS;
4616                         break;
4617
4618                 case RTE_FLOW_ITEM_TYPE_MARK:
4619                         ret = flow_dv_validate_item_mark(dev, items, attr,
4620                                                          error);
4621                         if (ret < 0)
4622                                 return ret;
4623                         last_item = MLX5_FLOW_ITEM_MARK;
4624                         break;
4625                 case RTE_FLOW_ITEM_TYPE_META:
4626                         ret = flow_dv_validate_item_meta(dev, items, attr,
4627                                                          error);
4628                         if (ret < 0)
4629                                 return ret;
4630                         last_item = MLX5_FLOW_ITEM_METADATA;
4631                         break;
4632                 case RTE_FLOW_ITEM_TYPE_ICMP:
4633                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4634                                                            next_protocol,
4635                                                            error);
4636                         if (ret < 0)
4637                                 return ret;
4638                         last_item = MLX5_FLOW_LAYER_ICMP;
4639                         break;
4640                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4641                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4642                                                             next_protocol,
4643                                                             error);
4644                         if (ret < 0)
4645                                 return ret;
4646                         last_item = MLX5_FLOW_LAYER_ICMP6;
4647                         break;
4648                 case RTE_FLOW_ITEM_TYPE_TAG:
4649                         ret = flow_dv_validate_item_tag(dev, items,
4650                                                         attr, error);
4651                         if (ret < 0)
4652                                 return ret;
4653                         last_item = MLX5_FLOW_ITEM_TAG;
4654                         break;
4655                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4656                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4657                         break;
4658                 case RTE_FLOW_ITEM_TYPE_GTP:
4659                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4660                                                         error);
4661                         if (ret < 0)
4662                                 return ret;
4663                         last_item = MLX5_FLOW_LAYER_GTP;
4664                         break;
4665                 default:
4666                         return rte_flow_error_set(error, ENOTSUP,
4667                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4668                                                   NULL, "item not supported");
4669                 }
4670                 item_flags |= last_item;
4671         }
4672         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4673                 int type = actions->type;
4674                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4675                         return rte_flow_error_set(error, ENOTSUP,
4676                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4677                                                   actions, "too many actions");
4678                 switch (type) {
4679                 case RTE_FLOW_ACTION_TYPE_VOID:
4680                         break;
4681                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4682                         ret = flow_dv_validate_action_port_id(dev,
4683                                                               action_flags,
4684                                                               actions,
4685                                                               attr,
4686                                                               error);
4687                         if (ret)
4688                                 return ret;
4689                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4690                         ++actions_n;
4691                         break;
4692                 case RTE_FLOW_ACTION_TYPE_FLAG:
4693                         ret = flow_dv_validate_action_flag(dev, action_flags,
4694                                                            attr, error);
4695                         if (ret < 0)
4696                                 return ret;
4697                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4698                                 /* Count all modify-header actions as one. */
4699                                 if (!(action_flags &
4700                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4701                                         ++actions_n;
4702                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4703                                                 MLX5_FLOW_ACTION_MARK_EXT;
4704                         } else {
4705                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4706                                 ++actions_n;
4707                         }
4708                         break;
4709                 case RTE_FLOW_ACTION_TYPE_MARK:
4710                         ret = flow_dv_validate_action_mark(dev, actions,
4711                                                            action_flags,
4712                                                            attr, error);
4713                         if (ret < 0)
4714                                 return ret;
4715                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4716                                 /* Count all modify-header actions as one. */
4717                                 if (!(action_flags &
4718                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4719                                         ++actions_n;
4720                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4721                                                 MLX5_FLOW_ACTION_MARK_EXT;
4722                         } else {
4723                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4724                                 ++actions_n;
4725                         }
4726                         break;
4727                 case RTE_FLOW_ACTION_TYPE_SET_META:
4728                         ret = flow_dv_validate_action_set_meta(dev, actions,
4729                                                                action_flags,
4730                                                                attr, error);
4731                         if (ret < 0)
4732                                 return ret;
4733                         /* Count all modify-header actions as one action. */
4734                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4735                                 ++actions_n;
4736                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4737                         break;
4738                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4739                         ret = flow_dv_validate_action_set_tag(dev, actions,
4740                                                               action_flags,
4741                                                               attr, error);
4742                         if (ret < 0)
4743                                 return ret;
4744                         /* Count all modify-header actions as one action. */
4745                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4746                                 ++actions_n;
4747                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4748                         break;
4749                 case RTE_FLOW_ACTION_TYPE_DROP:
4750                         ret = mlx5_flow_validate_action_drop(action_flags,
4751                                                              attr, error);
4752                         if (ret < 0)
4753                                 return ret;
4754                         action_flags |= MLX5_FLOW_ACTION_DROP;
4755                         ++actions_n;
4756                         break;
4757                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4758                         ret = mlx5_flow_validate_action_queue(actions,
4759                                                               action_flags, dev,
4760                                                               attr, error);
4761                         if (ret < 0)
4762                                 return ret;
4763                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4764                         ++actions_n;
4765                         break;
4766                 case RTE_FLOW_ACTION_TYPE_RSS:
4767                         ret = mlx5_flow_validate_action_rss(actions,
4768                                                             action_flags, dev,
4769                                                             attr, item_flags,
4770                                                             error);
4771                         if (ret < 0)
4772                                 return ret;
4773                         action_flags |= MLX5_FLOW_ACTION_RSS;
4774                         ++actions_n;
4775                         break;
4776                 case RTE_FLOW_ACTION_TYPE_COUNT:
4777                         ret = flow_dv_validate_action_count(dev, error);
4778                         if (ret < 0)
4779                                 return ret;
4780                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4781                         ++actions_n;
4782                         break;
4783                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4784                         if (flow_dv_validate_action_pop_vlan(dev,
4785                                                              action_flags,
4786                                                              actions,
4787                                                              item_flags, attr,
4788                                                              error))
4789                                 return -rte_errno;
4790                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4791                         ++actions_n;
4792                         break;
4793                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4794                         ret = flow_dv_validate_action_push_vlan(action_flags,
4795                                                                 item_flags,
4796                                                                 actions, attr,
4797                                                                 error);
4798                         if (ret < 0)
4799                                 return ret;
4800                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4801                         ++actions_n;
4802                         break;
4803                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4804                         ret = flow_dv_validate_action_set_vlan_pcp
4805                                                 (action_flags, actions, error);
4806                         if (ret < 0)
4807                                 return ret;
4808                         /* Count PCP with push_vlan command. */
4809                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4810                         break;
4811                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4812                         ret = flow_dv_validate_action_set_vlan_vid
4813                                                 (item_flags, action_flags,
4814                                                  actions, error);
4815                         if (ret < 0)
4816                                 return ret;
4817                         /* Count VID with push_vlan command. */
4818                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4819                         break;
4820                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4821                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4822                         ret = flow_dv_validate_action_l2_encap(action_flags,
4823                                                                actions, attr,
4824                                                                error);
4825                         if (ret < 0)
4826                                 return ret;
4827                         action_flags |= actions->type ==
4828                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4829                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4830                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4831                         ++actions_n;
4832                         break;
4833                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4834                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4835                         ret = flow_dv_validate_action_l2_decap(action_flags,
4836                                                                attr, error);
4837                         if (ret < 0)
4838                                 return ret;
4839                         action_flags |= actions->type ==
4840                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4841                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4842                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4843                         ++actions_n;
4844                         break;
4845                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4846                         ret = flow_dv_validate_action_raw_encap(action_flags,
4847                                                                 actions, attr,
4848                                                                 error);
4849                         if (ret < 0)
4850                                 return ret;
4851                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4852                         ++actions_n;
4853                         break;
4854                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4855                         ret = flow_dv_validate_action_raw_decap(action_flags,
4856                                                                 actions, attr,
4857                                                                 error);
4858                         if (ret < 0)
4859                                 return ret;
4860                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4861                         ++actions_n;
4862                         break;
4863                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4864                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4865                         ret = flow_dv_validate_action_modify_mac(action_flags,
4866                                                                  actions,
4867                                                                  item_flags,
4868                                                                  error);
4869                         if (ret < 0)
4870                                 return ret;
4871                         /* Count all modify-header actions as one action. */
4872                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4873                                 ++actions_n;
4874                         action_flags |= actions->type ==
4875                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4876                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4877                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4878                         break;
4879
4880                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4881                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4882                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4883                                                                   actions,
4884                                                                   item_flags,
4885                                                                   error);
4886                         if (ret < 0)
4887                                 return ret;
4888                         /* Count all modify-header actions as one action. */
4889                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4890                                 ++actions_n;
4891                         action_flags |= actions->type ==
4892                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4893                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4894                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4895                         break;
4896                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4897                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4898                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4899                                                                   actions,
4900                                                                   item_flags,
4901                                                                   error);
4902                         if (ret < 0)
4903                                 return ret;
4904                         /* Count all modify-header actions as one action. */
4905                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4906                                 ++actions_n;
4907                         action_flags |= actions->type ==
4908                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4909                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4910                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4911                         break;
4912                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4913                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4914                         ret = flow_dv_validate_action_modify_tp(action_flags,
4915                                                                 actions,
4916                                                                 item_flags,
4917                                                                 error);
4918                         if (ret < 0)
4919                                 return ret;
4920                         /* Count all modify-header actions as one action. */
4921                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4922                                 ++actions_n;
4923                         action_flags |= actions->type ==
4924                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4925                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4926                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4927                         break;
4928                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4929                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4930                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4931                                                                  actions,
4932                                                                  item_flags,
4933                                                                  error);
4934                         if (ret < 0)
4935                                 return ret;
4936                         /* Count all modify-header actions as one action. */
4937                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4938                                 ++actions_n;
4939                         action_flags |= actions->type ==
4940                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4941                                                 MLX5_FLOW_ACTION_SET_TTL :
4942                                                 MLX5_FLOW_ACTION_DEC_TTL;
4943                         break;
4944                 case RTE_FLOW_ACTION_TYPE_JUMP:
4945                         ret = flow_dv_validate_action_jump(actions,
4946                                                            action_flags,
4947                                                            attr, external,
4948                                                            error);
4949                         if (ret)
4950                                 return ret;
4951                         ++actions_n;
4952                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4953                         break;
4954                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4955                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4956                         ret = flow_dv_validate_action_modify_tcp_seq
4957                                                                 (action_flags,
4958                                                                  actions,
4959                                                                  item_flags,
4960                                                                  error);
4961                         if (ret < 0)
4962                                 return ret;
4963                         /* Count all modify-header actions as one action. */
4964                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4965                                 ++actions_n;
4966                         action_flags |= actions->type ==
4967                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4968                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4969                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4970                         break;
4971                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4972                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4973                         ret = flow_dv_validate_action_modify_tcp_ack
4974                                                                 (action_flags,
4975                                                                  actions,
4976                                                                  item_flags,
4977                                                                  error);
4978                         if (ret < 0)
4979                                 return ret;
4980                         /* Count all modify-header actions as one action. */
4981                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4982                                 ++actions_n;
4983                         action_flags |= actions->type ==
4984                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4985                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4986                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4987                         break;
4988                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4989                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4990                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4991                         break;
4992                 case RTE_FLOW_ACTION_TYPE_METER:
4993                         ret = mlx5_flow_validate_action_meter(dev,
4994                                                               action_flags,
4995                                                               actions, attr,
4996                                                               error);
4997                         if (ret < 0)
4998                                 return ret;
4999                         action_flags |= MLX5_FLOW_ACTION_METER;
5000                         ++actions_n;
5001                         break;
5002                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5003                         ret = flow_dv_validate_action_modify_ipv4_dscp
5004                                                          (action_flags,
5005                                                           actions,
5006                                                           item_flags,
5007                                                           error);
5008                         if (ret < 0)
5009                                 return ret;
5010                         /* Count all modify-header actions as one action. */
5011                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5012                                 ++actions_n;
5013                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5014                         break;
5015                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5016                         ret = flow_dv_validate_action_modify_ipv6_dscp
5017                                                                 (action_flags,
5018                                                                  actions,
5019                                                                  item_flags,
5020                                                                  error);
5021                         if (ret < 0)
5022                                 return ret;
5023                         /* Count all modify-header actions as one action. */
5024                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5025                                 ++actions_n;
5026                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5027                         break;
5028                 default:
5029                         return rte_flow_error_set(error, ENOTSUP,
5030                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5031                                                   actions,
5032                                                   "action not supported");
5033                 }
5034         }
5035         /*
5036          * Validate the drop action mutual exclusion with other actions.
5037          * Drop action is mutually-exclusive with any other action, except for
5038          * Count action.
5039          */
5040         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5041             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5042                 return rte_flow_error_set(error, EINVAL,
5043                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5044                                           "Drop action is mutually-exclusive "
5045                                           "with any other action, except for "
5046                                           "Count action");
5047         /* Eswitch has few restrictions on using items and actions */
5048         if (attr->transfer) {
5049                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5050                     action_flags & MLX5_FLOW_ACTION_FLAG)
5051                         return rte_flow_error_set(error, ENOTSUP,
5052                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5053                                                   NULL,
5054                                                   "unsupported action FLAG");
5055                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5056                     action_flags & MLX5_FLOW_ACTION_MARK)
5057                         return rte_flow_error_set(error, ENOTSUP,
5058                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5059                                                   NULL,
5060                                                   "unsupported action MARK");
5061                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5062                         return rte_flow_error_set(error, ENOTSUP,
5063                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5064                                                   NULL,
5065                                                   "unsupported action QUEUE");
5066                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5067                         return rte_flow_error_set(error, ENOTSUP,
5068                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5069                                                   NULL,
5070                                                   "unsupported action RSS");
5071                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5072                         return rte_flow_error_set(error, EINVAL,
5073                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5074                                                   actions,
5075                                                   "no fate action is found");
5076         } else {
5077                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5078                         return rte_flow_error_set(error, EINVAL,
5079                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5080                                                   actions,
5081                                                   "no fate action is found");
5082         }
5083         return 0;
5084 }
5085
5086 /**
5087  * Internal preparation function. Allocates the DV flow size,
5088  * this size is constant.
5089  *
5090  * @param[in] attr
5091  *   Pointer to the flow attributes.
5092  * @param[in] items
5093  *   Pointer to the list of items.
5094  * @param[in] actions
5095  *   Pointer to the list of actions.
5096  * @param[out] error
5097  *   Pointer to the error structure.
5098  *
5099  * @return
5100  *   Pointer to mlx5_flow object on success,
5101  *   otherwise NULL and rte_errno is set.
5102  */
5103 static struct mlx5_flow *
5104 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5105                 const struct rte_flow_item items[] __rte_unused,
5106                 const struct rte_flow_action actions[] __rte_unused,
5107                 struct rte_flow_error *error)
5108 {
5109         size_t size = sizeof(struct mlx5_flow);
5110         struct mlx5_flow *dev_flow;
5111
5112         dev_flow = rte_calloc(__func__, 1, size, 0);
5113         if (!dev_flow) {
5114                 rte_flow_error_set(error, ENOMEM,
5115                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5116                                    "not enough memory to create flow");
5117                 return NULL;
5118         }
5119         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5120         dev_flow->ingress = attr->ingress;
5121         dev_flow->transfer = attr->transfer;
5122         return dev_flow;
5123 }
5124
5125 #ifndef NDEBUG
5126 /**
5127  * Sanity check for match mask and value. Similar to check_valid_spec() in
5128  * kernel driver. If unmasked bit is present in value, it returns failure.
5129  *
5130  * @param match_mask
5131  *   pointer to match mask buffer.
5132  * @param match_value
5133  *   pointer to match value buffer.
5134  *
5135  * @return
5136  *   0 if valid, -EINVAL otherwise.
5137  */
5138 static int
5139 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5140 {
5141         uint8_t *m = match_mask;
5142         uint8_t *v = match_value;
5143         unsigned int i;
5144
5145         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5146                 if (v[i] & ~m[i]) {
5147                         DRV_LOG(ERR,
5148                                 "match_value differs from match_criteria"
5149                                 " %p[%u] != %p[%u]",
5150                                 match_value, i, match_mask, i);
5151                         return -EINVAL;
5152                 }
5153         }
5154         return 0;
5155 }
5156 #endif
5157
5158 /**
5159  * Add Ethernet item to matcher and to the value.
5160  *
5161  * @param[in, out] matcher
5162  *   Flow matcher.
5163  * @param[in, out] key
5164  *   Flow matcher value.
5165  * @param[in] item
5166  *   Flow pattern to translate.
5167  * @param[in] inner
5168  *   Item is inner pattern.
5169  */
5170 static void
5171 flow_dv_translate_item_eth(void *matcher, void *key,
5172                            const struct rte_flow_item *item, int inner)
5173 {
5174         const struct rte_flow_item_eth *eth_m = item->mask;
5175         const struct rte_flow_item_eth *eth_v = item->spec;
5176         const struct rte_flow_item_eth nic_mask = {
5177                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5178                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5179                 .type = RTE_BE16(0xffff),
5180         };
5181         void *headers_m;
5182         void *headers_v;
5183         char *l24_v;
5184         unsigned int i;
5185
5186         if (!eth_v)
5187                 return;
5188         if (!eth_m)
5189                 eth_m = &nic_mask;
5190         if (inner) {
5191                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5192                                          inner_headers);
5193                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5194         } else {
5195                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5196                                          outer_headers);
5197                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5198         }
5199         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5200                &eth_m->dst, sizeof(eth_m->dst));
5201         /* The value must be in the range of the mask. */
5202         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5203         for (i = 0; i < sizeof(eth_m->dst); ++i)
5204                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5205         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5206                &eth_m->src, sizeof(eth_m->src));
5207         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5208         /* The value must be in the range of the mask. */
5209         for (i = 0; i < sizeof(eth_m->dst); ++i)
5210                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5211         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5212                  rte_be_to_cpu_16(eth_m->type));
5213         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5214         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5215 }
5216
5217 /**
5218  * Add VLAN item to matcher and to the value.
5219  *
5220  * @param[in, out] dev_flow
5221  *   Flow descriptor.
5222  * @param[in, out] matcher
5223  *   Flow matcher.
5224  * @param[in, out] key
5225  *   Flow matcher value.
5226  * @param[in] item
5227  *   Flow pattern to translate.
5228  * @param[in] inner
5229  *   Item is inner pattern.
5230  */
5231 static void
5232 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5233                             void *matcher, void *key,
5234                             const struct rte_flow_item *item,
5235                             int inner)
5236 {
5237         const struct rte_flow_item_vlan *vlan_m = item->mask;
5238         const struct rte_flow_item_vlan *vlan_v = item->spec;
5239         void *headers_m;
5240         void *headers_v;
5241         uint16_t tci_m;
5242         uint16_t tci_v;
5243
5244         if (!vlan_v)
5245                 return;
5246         if (!vlan_m)
5247                 vlan_m = &rte_flow_item_vlan_mask;
5248         if (inner) {
5249                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5250                                          inner_headers);
5251                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5252         } else {
5253                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5254                                          outer_headers);
5255                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5256                 /*
5257                  * This is workaround, masks are not supported,
5258                  * and pre-validated.
5259                  */
5260                 dev_flow->dv.vf_vlan.tag =
5261                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5262         }
5263         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5264         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5265         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5266         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5267         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5268         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5269         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5270         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5271         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5272         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5273         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5274                  rte_be_to_cpu_16(vlan_m->inner_type));
5275         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5276                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5277 }
5278
5279 /**
5280  * Add IPV4 item to matcher and to the value.
5281  *
5282  * @param[in, out] matcher
5283  *   Flow matcher.
5284  * @param[in, out] key
5285  *   Flow matcher value.
5286  * @param[in] item
5287  *   Flow pattern to translate.
5288  * @param[in] inner
5289  *   Item is inner pattern.
5290  * @param[in] group
5291  *   The group to insert the rule.
5292  */
5293 static void
5294 flow_dv_translate_item_ipv4(void *matcher, void *key,
5295                             const struct rte_flow_item *item,
5296                             int inner, uint32_t group)
5297 {
5298         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5299         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5300         const struct rte_flow_item_ipv4 nic_mask = {
5301                 .hdr = {
5302                         .src_addr = RTE_BE32(0xffffffff),
5303                         .dst_addr = RTE_BE32(0xffffffff),
5304                         .type_of_service = 0xff,
5305                         .next_proto_id = 0xff,
5306                 },
5307         };
5308         void *headers_m;
5309         void *headers_v;
5310         char *l24_m;
5311         char *l24_v;
5312         uint8_t tos;
5313
5314         if (inner) {
5315                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5316                                          inner_headers);
5317                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5318         } else {
5319                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5320                                          outer_headers);
5321                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5322         }
5323         if (group == 0)
5324                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5325         else
5326                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5327         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5328         if (!ipv4_v)
5329                 return;
5330         if (!ipv4_m)
5331                 ipv4_m = &nic_mask;
5332         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5333                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5334         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5335                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5336         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5337         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5338         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5339                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5340         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5341                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5342         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5343         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5344         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5345         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5346                  ipv4_m->hdr.type_of_service);
5347         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5348         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5349                  ipv4_m->hdr.type_of_service >> 2);
5350         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5351         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5352                  ipv4_m->hdr.next_proto_id);
5353         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5354                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5355 }
5356
5357 /**
5358  * Add IPV6 item to matcher and to the value.
5359  *
5360  * @param[in, out] matcher
5361  *   Flow matcher.
5362  * @param[in, out] key
5363  *   Flow matcher value.
5364  * @param[in] item
5365  *   Flow pattern to translate.
5366  * @param[in] inner
5367  *   Item is inner pattern.
5368  * @param[in] group
5369  *   The group to insert the rule.
5370  */
5371 static void
5372 flow_dv_translate_item_ipv6(void *matcher, void *key,
5373                             const struct rte_flow_item *item,
5374                             int inner, uint32_t group)
5375 {
5376         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5377         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5378         const struct rte_flow_item_ipv6 nic_mask = {
5379                 .hdr = {
5380                         .src_addr =
5381                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5382                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5383                         .dst_addr =
5384                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5385                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5386                         .vtc_flow = RTE_BE32(0xffffffff),
5387                         .proto = 0xff,
5388                         .hop_limits = 0xff,
5389                 },
5390         };
5391         void *headers_m;
5392         void *headers_v;
5393         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5394         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5395         char *l24_m;
5396         char *l24_v;
5397         uint32_t vtc_m;
5398         uint32_t vtc_v;
5399         int i;
5400         int size;
5401
5402         if (inner) {
5403                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5404                                          inner_headers);
5405                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5406         } else {
5407                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5408                                          outer_headers);
5409                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5410         }
5411         if (group == 0)
5412                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5413         else
5414                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5415         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5416         if (!ipv6_v)
5417                 return;
5418         if (!ipv6_m)
5419                 ipv6_m = &nic_mask;
5420         size = sizeof(ipv6_m->hdr.dst_addr);
5421         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5422                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5423         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5424                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5425         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5426         for (i = 0; i < size; ++i)
5427                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5428         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5429                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5430         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5431                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5432         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5433         for (i = 0; i < size; ++i)
5434                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5435         /* TOS. */
5436         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5437         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5438         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5439         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5440         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5441         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5442         /* Label. */
5443         if (inner) {
5444                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5445                          vtc_m);
5446                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5447                          vtc_v);
5448         } else {
5449                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5450                          vtc_m);
5451                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5452                          vtc_v);
5453         }
5454         /* Protocol. */
5455         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5456                  ipv6_m->hdr.proto);
5457         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5458                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5459 }
5460
5461 /**
5462  * Add TCP item to matcher and to the value.
5463  *
5464  * @param[in, out] matcher
5465  *   Flow matcher.
5466  * @param[in, out] key
5467  *   Flow matcher value.
5468  * @param[in] item
5469  *   Flow pattern to translate.
5470  * @param[in] inner
5471  *   Item is inner pattern.
5472  */
5473 static void
5474 flow_dv_translate_item_tcp(void *matcher, void *key,
5475                            const struct rte_flow_item *item,
5476                            int inner)
5477 {
5478         const struct rte_flow_item_tcp *tcp_m = item->mask;
5479         const struct rte_flow_item_tcp *tcp_v = item->spec;
5480         void *headers_m;
5481         void *headers_v;
5482
5483         if (inner) {
5484                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5485                                          inner_headers);
5486                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5487         } else {
5488                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5489                                          outer_headers);
5490                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5491         }
5492         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5493         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5494         if (!tcp_v)
5495                 return;
5496         if (!tcp_m)
5497                 tcp_m = &rte_flow_item_tcp_mask;
5498         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5499                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5500         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5501                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5502         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5503                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5504         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5505                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5506         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5507                  tcp_m->hdr.tcp_flags);
5508         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5509                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5510 }
5511
5512 /**
5513  * Add UDP item to matcher and to the value.
5514  *
5515  * @param[in, out] matcher
5516  *   Flow matcher.
5517  * @param[in, out] key
5518  *   Flow matcher value.
5519  * @param[in] item
5520  *   Flow pattern to translate.
5521  * @param[in] inner
5522  *   Item is inner pattern.
5523  */
5524 static void
5525 flow_dv_translate_item_udp(void *matcher, void *key,
5526                            const struct rte_flow_item *item,
5527                            int inner)
5528 {
5529         const struct rte_flow_item_udp *udp_m = item->mask;
5530         const struct rte_flow_item_udp *udp_v = item->spec;
5531         void *headers_m;
5532         void *headers_v;
5533
5534         if (inner) {
5535                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5536                                          inner_headers);
5537                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5538         } else {
5539                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5540                                          outer_headers);
5541                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5542         }
5543         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5544         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5545         if (!udp_v)
5546                 return;
5547         if (!udp_m)
5548                 udp_m = &rte_flow_item_udp_mask;
5549         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5550                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5551         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5552                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5553         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5554                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5555         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5556                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5557 }
5558
5559 /**
5560  * Add GRE optional Key item to matcher and to the value.
5561  *
5562  * @param[in, out] matcher
5563  *   Flow matcher.
5564  * @param[in, out] key
5565  *   Flow matcher value.
5566  * @param[in] item
5567  *   Flow pattern to translate.
5568  * @param[in] inner
5569  *   Item is inner pattern.
5570  */
5571 static void
5572 flow_dv_translate_item_gre_key(void *matcher, void *key,
5573                                    const struct rte_flow_item *item)
5574 {
5575         const rte_be32_t *key_m = item->mask;
5576         const rte_be32_t *key_v = item->spec;
5577         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5578         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5579         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5580
5581         if (!key_v)
5582                 return;
5583         if (!key_m)
5584                 key_m = &gre_key_default_mask;
5585         /* GRE K bit must be on and should already be validated */
5586         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5587         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5588         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5589                  rte_be_to_cpu_32(*key_m) >> 8);
5590         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5591                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5592         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5593                  rte_be_to_cpu_32(*key_m) & 0xFF);
5594         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5595                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5596 }
5597
5598 /**
5599  * Add GRE item to matcher and to the value.
5600  *
5601  * @param[in, out] matcher
5602  *   Flow matcher.
5603  * @param[in, out] key
5604  *   Flow matcher value.
5605  * @param[in] item
5606  *   Flow pattern to translate.
5607  * @param[in] inner
5608  *   Item is inner pattern.
5609  */
5610 static void
5611 flow_dv_translate_item_gre(void *matcher, void *key,
5612                            const struct rte_flow_item *item,
5613                            int inner)
5614 {
5615         const struct rte_flow_item_gre *gre_m = item->mask;
5616         const struct rte_flow_item_gre *gre_v = item->spec;
5617         void *headers_m;
5618         void *headers_v;
5619         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5620         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5621         struct {
5622                 union {
5623                         __extension__
5624                         struct {
5625                                 uint16_t version:3;
5626                                 uint16_t rsvd0:9;
5627                                 uint16_t s_present:1;
5628                                 uint16_t k_present:1;
5629                                 uint16_t rsvd_bit1:1;
5630                                 uint16_t c_present:1;
5631                         };
5632                         uint16_t value;
5633                 };
5634         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5635
5636         if (inner) {
5637                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5638                                          inner_headers);
5639                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5640         } else {
5641                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5642                                          outer_headers);
5643                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5644         }
5645         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5646         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5647         if (!gre_v)
5648                 return;
5649         if (!gre_m)
5650                 gre_m = &rte_flow_item_gre_mask;
5651         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5652                  rte_be_to_cpu_16(gre_m->protocol));
5653         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5654                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5655         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5656         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5657         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5658                  gre_crks_rsvd0_ver_m.c_present);
5659         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5660                  gre_crks_rsvd0_ver_v.c_present &
5661                  gre_crks_rsvd0_ver_m.c_present);
5662         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5663                  gre_crks_rsvd0_ver_m.k_present);
5664         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5665                  gre_crks_rsvd0_ver_v.k_present &
5666                  gre_crks_rsvd0_ver_m.k_present);
5667         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5668                  gre_crks_rsvd0_ver_m.s_present);
5669         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5670                  gre_crks_rsvd0_ver_v.s_present &
5671                  gre_crks_rsvd0_ver_m.s_present);
5672 }
5673
5674 /**
5675  * Add NVGRE item to matcher and to the value.
5676  *
5677  * @param[in, out] matcher
5678  *   Flow matcher.
5679  * @param[in, out] key
5680  *   Flow matcher value.
5681  * @param[in] item
5682  *   Flow pattern to translate.
5683  * @param[in] inner
5684  *   Item is inner pattern.
5685  */
5686 static void
5687 flow_dv_translate_item_nvgre(void *matcher, void *key,
5688                              const struct rte_flow_item *item,
5689                              int inner)
5690 {
5691         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5692         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5693         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5694         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5695         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5696         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5697         char *gre_key_m;
5698         char *gre_key_v;
5699         int size;
5700         int i;
5701
5702         /* For NVGRE, GRE header fields must be set with defined values. */
5703         const struct rte_flow_item_gre gre_spec = {
5704                 .c_rsvd0_ver = RTE_BE16(0x2000),
5705                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5706         };
5707         const struct rte_flow_item_gre gre_mask = {
5708                 .c_rsvd0_ver = RTE_BE16(0xB000),
5709                 .protocol = RTE_BE16(UINT16_MAX),
5710         };
5711         const struct rte_flow_item gre_item = {
5712                 .spec = &gre_spec,
5713                 .mask = &gre_mask,
5714                 .last = NULL,
5715         };
5716         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5717         if (!nvgre_v)
5718                 return;
5719         if (!nvgre_m)
5720                 nvgre_m = &rte_flow_item_nvgre_mask;
5721         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5722         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5723         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5724         memcpy(gre_key_m, tni_flow_id_m, size);
5725         for (i = 0; i < size; ++i)
5726                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5727 }
5728
5729 /**
5730  * Add VXLAN item to matcher and to the value.
5731  *
5732  * @param[in, out] matcher
5733  *   Flow matcher.
5734  * @param[in, out] key
5735  *   Flow matcher value.
5736  * @param[in] item
5737  *   Flow pattern to translate.
5738  * @param[in] inner
5739  *   Item is inner pattern.
5740  */
5741 static void
5742 flow_dv_translate_item_vxlan(void *matcher, void *key,
5743                              const struct rte_flow_item *item,
5744                              int inner)
5745 {
5746         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5747         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5748         void *headers_m;
5749         void *headers_v;
5750         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5751         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5752         char *vni_m;
5753         char *vni_v;
5754         uint16_t dport;
5755         int size;
5756         int i;
5757
5758         if (inner) {
5759                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5760                                          inner_headers);
5761                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5762         } else {
5763                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5764                                          outer_headers);
5765                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5766         }
5767         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5768                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5769         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5770                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5771                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5772         }
5773         if (!vxlan_v)
5774                 return;
5775         if (!vxlan_m)
5776                 vxlan_m = &rte_flow_item_vxlan_mask;
5777         size = sizeof(vxlan_m->vni);
5778         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5779         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5780         memcpy(vni_m, vxlan_m->vni, size);
5781         for (i = 0; i < size; ++i)
5782                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5783 }
5784
5785 /**
5786  * Add Geneve item to matcher and to the value.
5787  *
5788  * @param[in, out] matcher
5789  *   Flow matcher.
5790  * @param[in, out] key
5791  *   Flow matcher value.
5792  * @param[in] item
5793  *   Flow pattern to translate.
5794  * @param[in] inner
5795  *   Item is inner pattern.
5796  */
5797
5798 static void
5799 flow_dv_translate_item_geneve(void *matcher, void *key,
5800                               const struct rte_flow_item *item, int inner)
5801 {
5802         const struct rte_flow_item_geneve *geneve_m = item->mask;
5803         const struct rte_flow_item_geneve *geneve_v = item->spec;
5804         void *headers_m;
5805         void *headers_v;
5806         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5807         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5808         uint16_t dport;
5809         uint16_t gbhdr_m;
5810         uint16_t gbhdr_v;
5811         char *vni_m;
5812         char *vni_v;
5813         size_t size, i;
5814
5815         if (inner) {
5816                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5817                                          inner_headers);
5818                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5819         } else {
5820                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5821                                          outer_headers);
5822                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5823         }
5824         dport = MLX5_UDP_PORT_GENEVE;
5825         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5826                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5827                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5828         }
5829         if (!geneve_v)
5830                 return;
5831         if (!geneve_m)
5832                 geneve_m = &rte_flow_item_geneve_mask;
5833         size = sizeof(geneve_m->vni);
5834         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5835         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5836         memcpy(vni_m, geneve_m->vni, size);
5837         for (i = 0; i < size; ++i)
5838                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5839         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5840                  rte_be_to_cpu_16(geneve_m->protocol));
5841         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5842                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5843         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5844         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5845         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5846                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5847         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5848                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5849         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5850                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5851         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5852                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5853                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5854 }
5855
5856 /**
5857  * Add MPLS item to matcher and to the value.
5858  *
5859  * @param[in, out] matcher
5860  *   Flow matcher.
5861  * @param[in, out] key
5862  *   Flow matcher value.
5863  * @param[in] item
5864  *   Flow pattern to translate.
5865  * @param[in] prev_layer
5866  *   The protocol layer indicated in previous item.
5867  * @param[in] inner
5868  *   Item is inner pattern.
5869  */
5870 static void
5871 flow_dv_translate_item_mpls(void *matcher, void *key,
5872                             const struct rte_flow_item *item,
5873                             uint64_t prev_layer,
5874                             int inner)
5875 {
5876         const uint32_t *in_mpls_m = item->mask;
5877         const uint32_t *in_mpls_v = item->spec;
5878         uint32_t *out_mpls_m = 0;
5879         uint32_t *out_mpls_v = 0;
5880         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5881         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5882         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5883                                      misc_parameters_2);
5884         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5885         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5886         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5887
5888         switch (prev_layer) {
5889         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5890                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5891                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5892                          MLX5_UDP_PORT_MPLS);
5893                 break;
5894         case MLX5_FLOW_LAYER_GRE:
5895                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5896                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5897                          RTE_ETHER_TYPE_MPLS);
5898                 break;
5899         default:
5900                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5901                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5902                          IPPROTO_MPLS);
5903                 break;
5904         }
5905         if (!in_mpls_v)
5906                 return;
5907         if (!in_mpls_m)
5908                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5909         switch (prev_layer) {
5910         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5911                 out_mpls_m =
5912                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5913                                                  outer_first_mpls_over_udp);
5914                 out_mpls_v =
5915                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5916                                                  outer_first_mpls_over_udp);
5917                 break;
5918         case MLX5_FLOW_LAYER_GRE:
5919                 out_mpls_m =
5920                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5921                                                  outer_first_mpls_over_gre);
5922                 out_mpls_v =
5923                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5924                                                  outer_first_mpls_over_gre);
5925                 break;
5926         default:
5927                 /* Inner MPLS not over GRE is not supported. */
5928                 if (!inner) {
5929                         out_mpls_m =
5930                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5931                                                          misc2_m,
5932                                                          outer_first_mpls);
5933                         out_mpls_v =
5934                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5935                                                          misc2_v,
5936                                                          outer_first_mpls);
5937                 }
5938                 break;
5939         }
5940         if (out_mpls_m && out_mpls_v) {
5941                 *out_mpls_m = *in_mpls_m;
5942                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5943         }
5944 }
5945
5946 /**
5947  * Add metadata register item to matcher
5948  *
5949  * @param[in, out] matcher
5950  *   Flow matcher.
5951  * @param[in, out] key
5952  *   Flow matcher value.
5953  * @param[in] reg_type
5954  *   Type of device metadata register
5955  * @param[in] value
5956  *   Register value
5957  * @param[in] mask
5958  *   Register mask
5959  */
5960 static void
5961 flow_dv_match_meta_reg(void *matcher, void *key,
5962                        enum modify_reg reg_type,
5963                        uint32_t data, uint32_t mask)
5964 {
5965         void *misc2_m =
5966                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5967         void *misc2_v =
5968                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5969         uint32_t temp;
5970
5971         data &= mask;
5972         switch (reg_type) {
5973         case REG_A:
5974                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5975                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5976                 break;
5977         case REG_B:
5978                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5979                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5980                 break;
5981         case REG_C_0:
5982                 /*
5983                  * The metadata register C0 field might be divided into
5984                  * source vport index and META item value, we should set
5985                  * this field according to specified mask, not as whole one.
5986                  */
5987                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
5988                 temp |= mask;
5989                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
5990                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
5991                 temp &= ~mask;
5992                 temp |= data;
5993                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
5994                 break;
5995         case REG_C_1:
5996                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5997                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5998                 break;
5999         case REG_C_2:
6000                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6001                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6002                 break;
6003         case REG_C_3:
6004                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6005                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6006                 break;
6007         case REG_C_4:
6008                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6009                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6010                 break;
6011         case REG_C_5:
6012                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6013                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6014                 break;
6015         case REG_C_6:
6016                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6017                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6018                 break;
6019         case REG_C_7:
6020                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6021                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6022                 break;
6023         default:
6024                 assert(false);
6025                 break;
6026         }
6027 }
6028
6029 /**
6030  * Add MARK item to matcher
6031  *
6032  * @param[in] dev
6033  *   The device to configure through.
6034  * @param[in, out] matcher
6035  *   Flow matcher.
6036  * @param[in, out] key
6037  *   Flow matcher value.
6038  * @param[in] item
6039  *   Flow pattern to translate.
6040  */
6041 static void
6042 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6043                             void *matcher, void *key,
6044                             const struct rte_flow_item *item)
6045 {
6046         struct mlx5_priv *priv = dev->data->dev_private;
6047         const struct rte_flow_item_mark *mark;
6048         uint32_t value;
6049         uint32_t mask;
6050
6051         mark = item->mask ? (const void *)item->mask :
6052                             &rte_flow_item_mark_mask;
6053         mask = mark->id & priv->sh->dv_mark_mask;
6054         mark = (const void *)item->spec;
6055         assert(mark);
6056         value = mark->id & priv->sh->dv_mark_mask & mask;
6057         if (mask) {
6058                 enum modify_reg reg;
6059
6060                 /* Get the metadata register index for the mark. */
6061                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6062                 assert(reg > 0);
6063                 if (reg == REG_C_0) {
6064                         struct mlx5_priv *priv = dev->data->dev_private;
6065                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6066                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6067
6068                         mask &= msk_c0;
6069                         mask <<= shl_c0;
6070                         value <<= shl_c0;
6071                 }
6072                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6073         }
6074 }
6075
6076 /**
6077  * Add META item to matcher
6078  *
6079  * @param[in] dev
6080  *   The devich to configure through.
6081  * @param[in, out] matcher
6082  *   Flow matcher.
6083  * @param[in, out] key
6084  *   Flow matcher value.
6085  * @param[in] attr
6086  *   Attributes of flow that includes this item.
6087  * @param[in] item
6088  *   Flow pattern to translate.
6089  */
6090 static void
6091 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6092                             void *matcher, void *key,
6093                             const struct rte_flow_attr *attr,
6094                             const struct rte_flow_item *item)
6095 {
6096         const struct rte_flow_item_meta *meta_m;
6097         const struct rte_flow_item_meta *meta_v;
6098
6099         meta_m = (const void *)item->mask;
6100         if (!meta_m)
6101                 meta_m = &rte_flow_item_meta_mask;
6102         meta_v = (const void *)item->spec;
6103         if (meta_v) {
6104                 enum modify_reg reg;
6105                 uint32_t value = meta_v->data;
6106                 uint32_t mask = meta_m->data;
6107
6108                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6109                 if (reg < 0)
6110                         return;
6111                 /*
6112                  * In datapath code there is no endianness
6113                  * coversions for perfromance reasons, all
6114                  * pattern conversions are done in rte_flow.
6115                  */
6116                 value = rte_cpu_to_be_32(value);
6117                 mask = rte_cpu_to_be_32(mask);
6118                 if (reg == REG_C_0) {
6119                         struct mlx5_priv *priv = dev->data->dev_private;
6120                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6121                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6122 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6123                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6124
6125                         value >>= shr_c0;
6126                         mask >>= shr_c0;
6127 #endif
6128                         value <<= shl_c0;
6129                         mask <<= shl_c0;
6130                         assert(msk_c0);
6131                         assert(!(~msk_c0 & mask));
6132                 }
6133                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6134         }
6135 }
6136
6137 /**
6138  * Add vport metadata Reg C0 item to matcher
6139  *
6140  * @param[in, out] matcher
6141  *   Flow matcher.
6142  * @param[in, out] key
6143  *   Flow matcher value.
6144  * @param[in] reg
6145  *   Flow pattern to translate.
6146  */
6147 static void
6148 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6149                                   uint32_t value, uint32_t mask)
6150 {
6151         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6152 }
6153
6154 /**
6155  * Add tag item to matcher
6156  *
6157  * @param[in] dev
6158  *   The devich to configure through.
6159  * @param[in, out] matcher
6160  *   Flow matcher.
6161  * @param[in, out] key
6162  *   Flow matcher value.
6163  * @param[in] item
6164  *   Flow pattern to translate.
6165  */
6166 static void
6167 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6168                                 void *matcher, void *key,
6169                                 const struct rte_flow_item *item)
6170 {
6171         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6172         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6173         uint32_t mask, value;
6174
6175         assert(tag_v);
6176         value = tag_v->data;
6177         mask = tag_m ? tag_m->data : UINT32_MAX;
6178         if (tag_v->id == REG_C_0) {
6179                 struct mlx5_priv *priv = dev->data->dev_private;
6180                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6181                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6182
6183                 mask &= msk_c0;
6184                 mask <<= shl_c0;
6185                 value <<= shl_c0;
6186         }
6187         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6188 }
6189
6190 /**
6191  * Add TAG item to matcher
6192  *
6193  * @param[in] dev
6194  *   The devich to configure through.
6195  * @param[in, out] matcher
6196  *   Flow matcher.
6197  * @param[in, out] key
6198  *   Flow matcher value.
6199  * @param[in] item
6200  *   Flow pattern to translate.
6201  */
6202 static void
6203 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6204                            void *matcher, void *key,
6205                            const struct rte_flow_item *item)
6206 {
6207         const struct rte_flow_item_tag *tag_v = item->spec;
6208         const struct rte_flow_item_tag *tag_m = item->mask;
6209         enum modify_reg reg;
6210
6211         assert(tag_v);
6212         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6213         /* Get the metadata register index for the tag. */
6214         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6215         assert(reg > 0);
6216         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6217 }
6218
6219 /**
6220  * Add source vport match to the specified matcher.
6221  *
6222  * @param[in, out] matcher
6223  *   Flow matcher.
6224  * @param[in, out] key
6225  *   Flow matcher value.
6226  * @param[in] port
6227  *   Source vport value to match
6228  * @param[in] mask
6229  *   Mask
6230  */
6231 static void
6232 flow_dv_translate_item_source_vport(void *matcher, void *key,
6233                                     int16_t port, uint16_t mask)
6234 {
6235         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6236         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6237
6238         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6239         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6240 }
6241
6242 /**
6243  * Translate port-id item to eswitch match on  port-id.
6244  *
6245  * @param[in] dev
6246  *   The devich to configure through.
6247  * @param[in, out] matcher
6248  *   Flow matcher.
6249  * @param[in, out] key
6250  *   Flow matcher value.
6251  * @param[in] item
6252  *   Flow pattern to translate.
6253  *
6254  * @return
6255  *   0 on success, a negative errno value otherwise.
6256  */
6257 static int
6258 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6259                                void *key, const struct rte_flow_item *item)
6260 {
6261         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6262         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6263         struct mlx5_priv *priv;
6264         uint16_t mask, id;
6265
6266         mask = pid_m ? pid_m->id : 0xffff;
6267         id = pid_v ? pid_v->id : dev->data->port_id;
6268         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6269         if (!priv)
6270                 return -rte_errno;
6271         /* Translate to vport field or to metadata, depending on mode. */
6272         if (priv->vport_meta_mask)
6273                 flow_dv_translate_item_meta_vport(matcher, key,
6274                                                   priv->vport_meta_tag,
6275                                                   priv->vport_meta_mask);
6276         else
6277                 flow_dv_translate_item_source_vport(matcher, key,
6278                                                     priv->vport_id, mask);
6279         return 0;
6280 }
6281
6282 /**
6283  * Add ICMP6 item to matcher and to the value.
6284  *
6285  * @param[in, out] matcher
6286  *   Flow matcher.
6287  * @param[in, out] key
6288  *   Flow matcher value.
6289  * @param[in] item
6290  *   Flow pattern to translate.
6291  * @param[in] inner
6292  *   Item is inner pattern.
6293  */
6294 static void
6295 flow_dv_translate_item_icmp6(void *matcher, void *key,
6296                               const struct rte_flow_item *item,
6297                               int inner)
6298 {
6299         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6300         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6301         void *headers_m;
6302         void *headers_v;
6303         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6304                                      misc_parameters_3);
6305         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6306         if (inner) {
6307                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6308                                          inner_headers);
6309                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6310         } else {
6311                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6312                                          outer_headers);
6313                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6314         }
6315         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6316         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6317         if (!icmp6_v)
6318                 return;
6319         if (!icmp6_m)
6320                 icmp6_m = &rte_flow_item_icmp6_mask;
6321         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6322         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6323                  icmp6_v->type & icmp6_m->type);
6324         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6325         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6326                  icmp6_v->code & icmp6_m->code);
6327 }
6328
6329 /**
6330  * Add ICMP item to matcher and to the value.
6331  *
6332  * @param[in, out] matcher
6333  *   Flow matcher.
6334  * @param[in, out] key
6335  *   Flow matcher value.
6336  * @param[in] item
6337  *   Flow pattern to translate.
6338  * @param[in] inner
6339  *   Item is inner pattern.
6340  */
6341 static void
6342 flow_dv_translate_item_icmp(void *matcher, void *key,
6343                             const struct rte_flow_item *item,
6344                             int inner)
6345 {
6346         const struct rte_flow_item_icmp *icmp_m = item->mask;
6347         const struct rte_flow_item_icmp *icmp_v = item->spec;
6348         void *headers_m;
6349         void *headers_v;
6350         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6351                                      misc_parameters_3);
6352         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6353         if (inner) {
6354                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6355                                          inner_headers);
6356                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6357         } else {
6358                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6359                                          outer_headers);
6360                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6361         }
6362         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6363         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6364         if (!icmp_v)
6365                 return;
6366         if (!icmp_m)
6367                 icmp_m = &rte_flow_item_icmp_mask;
6368         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6369                  icmp_m->hdr.icmp_type);
6370         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6371                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6372         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6373                  icmp_m->hdr.icmp_code);
6374         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6375                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6376 }
6377
6378 /**
6379  * Add GTP item to matcher and to the value.
6380  *
6381  * @param[in, out] matcher
6382  *   Flow matcher.
6383  * @param[in, out] key
6384  *   Flow matcher value.
6385  * @param[in] item
6386  *   Flow pattern to translate.
6387  * @param[in] inner
6388  *   Item is inner pattern.
6389  */
6390 static void
6391 flow_dv_translate_item_gtp(void *matcher, void *key,
6392                            const struct rte_flow_item *item, int inner)
6393 {
6394         const struct rte_flow_item_gtp *gtp_m = item->mask;
6395         const struct rte_flow_item_gtp *gtp_v = item->spec;
6396         void *headers_m;
6397         void *headers_v;
6398         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6399                                      misc_parameters_3);
6400         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6401         uint16_t dport = RTE_GTPU_UDP_PORT;
6402
6403         if (inner) {
6404                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6405                                          inner_headers);
6406                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6407         } else {
6408                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6409                                          outer_headers);
6410                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6411         }
6412         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6413                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6414                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6415         }
6416         if (!gtp_v)
6417                 return;
6418         if (!gtp_m)
6419                 gtp_m = &rte_flow_item_gtp_mask;
6420         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6421         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6422                  gtp_v->msg_type & gtp_m->msg_type);
6423         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6424                  rte_be_to_cpu_32(gtp_m->teid));
6425         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6426                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6427 }
6428
6429 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6430
6431 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6432         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6433                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6434
6435 /**
6436  * Calculate flow matcher enable bitmap.
6437  *
6438  * @param match_criteria
6439  *   Pointer to flow matcher criteria.
6440  *
6441  * @return
6442  *   Bitmap of enabled fields.
6443  */
6444 static uint8_t
6445 flow_dv_matcher_enable(uint32_t *match_criteria)
6446 {
6447         uint8_t match_criteria_enable;
6448
6449         match_criteria_enable =
6450                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6451                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6452         match_criteria_enable |=
6453                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6454                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6455         match_criteria_enable |=
6456                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6457                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6458         match_criteria_enable |=
6459                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6460                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6461         match_criteria_enable |=
6462                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6463                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6464         return match_criteria_enable;
6465 }
6466
6467
6468 /**
6469  * Get a flow table.
6470  *
6471  * @param[in, out] dev
6472  *   Pointer to rte_eth_dev structure.
6473  * @param[in] table_id
6474  *   Table id to use.
6475  * @param[in] egress
6476  *   Direction of the table.
6477  * @param[in] transfer
6478  *   E-Switch or NIC flow.
6479  * @param[out] error
6480  *   pointer to error structure.
6481  *
6482  * @return
6483  *   Returns tables resource based on the index, NULL in case of failed.
6484  */
6485 static struct mlx5_flow_tbl_resource *
6486 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6487                          uint32_t table_id, uint8_t egress,
6488                          uint8_t transfer,
6489                          struct rte_flow_error *error)
6490 {
6491         struct mlx5_priv *priv = dev->data->dev_private;
6492         struct mlx5_ibv_shared *sh = priv->sh;
6493         struct mlx5_flow_tbl_resource *tbl;
6494         union mlx5_flow_tbl_key table_key = {
6495                 {
6496                         .table_id = table_id,
6497                         .reserved = 0,
6498                         .domain = !!transfer,
6499                         .direction = !!egress,
6500                 }
6501         };
6502         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6503                                                          table_key.v64);
6504         struct mlx5_flow_tbl_data_entry *tbl_data;
6505         int ret;
6506         void *domain;
6507
6508         if (pos) {
6509                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6510                                         entry);
6511                 tbl = &tbl_data->tbl;
6512                 rte_atomic32_inc(&tbl->refcnt);
6513                 return tbl;
6514         }
6515         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6516         if (!tbl_data) {
6517                 rte_flow_error_set(error, ENOMEM,
6518                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6519                                    NULL,
6520                                    "cannot allocate flow table data entry");
6521                 return NULL;
6522         }
6523         tbl = &tbl_data->tbl;
6524         pos = &tbl_data->entry;
6525         if (transfer)
6526                 domain = sh->fdb_domain;
6527         else if (egress)
6528                 domain = sh->tx_domain;
6529         else
6530                 domain = sh->rx_domain;
6531         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6532         if (!tbl->obj) {
6533                 rte_flow_error_set(error, ENOMEM,
6534                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6535                                    NULL, "cannot create flow table object");
6536                 rte_free(tbl_data);
6537                 return NULL;
6538         }
6539         /*
6540          * No multi-threads now, but still better to initialize the reference
6541          * count before insert it into the hash list.
6542          */
6543         rte_atomic32_init(&tbl->refcnt);
6544         /* Jump action reference count is initialized here. */
6545         rte_atomic32_init(&tbl_data->jump.refcnt);
6546         pos->key = table_key.v64;
6547         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6548         if (ret < 0) {
6549                 rte_flow_error_set(error, -ret,
6550                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6551                                    "cannot insert flow table data entry");
6552                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6553                 rte_free(tbl_data);
6554         }
6555         rte_atomic32_inc(&tbl->refcnt);
6556         return tbl;
6557 }
6558
6559 /**
6560  * Release a flow table.
6561  *
6562  * @param[in] dev
6563  *   Pointer to rte_eth_dev structure.
6564  * @param[in] tbl
6565  *   Table resource to be released.
6566  *
6567  * @return
6568  *   Returns 0 if table was released, else return 1;
6569  */
6570 static int
6571 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6572                              struct mlx5_flow_tbl_resource *tbl)
6573 {
6574         struct mlx5_priv *priv = dev->data->dev_private;
6575         struct mlx5_ibv_shared *sh = priv->sh;
6576         struct mlx5_flow_tbl_data_entry *tbl_data =
6577                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6578
6579         if (!tbl)
6580                 return 0;
6581         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6582                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6583
6584                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6585                 tbl->obj = NULL;
6586                 /* remove the entry from the hash list and free memory. */
6587                 mlx5_hlist_remove(sh->flow_tbls, pos);
6588                 rte_free(tbl_data);
6589                 return 0;
6590         }
6591         return 1;
6592 }
6593
6594 /**
6595  * Register the flow matcher.
6596  *
6597  * @param[in, out] dev
6598  *   Pointer to rte_eth_dev structure.
6599  * @param[in, out] matcher
6600  *   Pointer to flow matcher.
6601  * @param[in, out] key
6602  *   Pointer to flow table key.
6603  * @parm[in, out] dev_flow
6604  *   Pointer to the dev_flow.
6605  * @param[out] error
6606  *   pointer to error structure.
6607  *
6608  * @return
6609  *   0 on success otherwise -errno and errno is set.
6610  */
6611 static int
6612 flow_dv_matcher_register(struct rte_eth_dev *dev,
6613                          struct mlx5_flow_dv_matcher *matcher,
6614                          union mlx5_flow_tbl_key *key,
6615                          struct mlx5_flow *dev_flow,
6616                          struct rte_flow_error *error)
6617 {
6618         struct mlx5_priv *priv = dev->data->dev_private;
6619         struct mlx5_ibv_shared *sh = priv->sh;
6620         struct mlx5_flow_dv_matcher *cache_matcher;
6621         struct mlx5dv_flow_matcher_attr dv_attr = {
6622                 .type = IBV_FLOW_ATTR_NORMAL,
6623                 .match_mask = (void *)&matcher->mask,
6624         };
6625         struct mlx5_flow_tbl_resource *tbl;
6626         struct mlx5_flow_tbl_data_entry *tbl_data;
6627
6628         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6629                                        key->domain, error);
6630         if (!tbl)
6631                 return -rte_errno;      /* No need to refill the error info */
6632         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6633         /* Lookup from cache. */
6634         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6635                 if (matcher->crc == cache_matcher->crc &&
6636                     matcher->priority == cache_matcher->priority &&
6637                     !memcmp((const void *)matcher->mask.buf,
6638                             (const void *)cache_matcher->mask.buf,
6639                             cache_matcher->mask.size)) {
6640                         DRV_LOG(DEBUG,
6641                                 "%s group %u priority %hd use %s "
6642                                 "matcher %p: refcnt %d++",
6643                                 key->domain ? "FDB" : "NIC", key->table_id,
6644                                 cache_matcher->priority,
6645                                 key->direction ? "tx" : "rx",
6646                                 (void *)cache_matcher,
6647                                 rte_atomic32_read(&cache_matcher->refcnt));
6648                         rte_atomic32_inc(&cache_matcher->refcnt);
6649                         dev_flow->dv.matcher = cache_matcher;
6650                         /* old matcher should not make the table ref++. */
6651                         flow_dv_tbl_resource_release(dev, tbl);
6652                         return 0;
6653                 }
6654         }
6655         /* Register new matcher. */
6656         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6657         if (!cache_matcher) {
6658                 flow_dv_tbl_resource_release(dev, tbl);
6659                 return rte_flow_error_set(error, ENOMEM,
6660                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6661                                           "cannot allocate matcher memory");
6662         }
6663         *cache_matcher = *matcher;
6664         dv_attr.match_criteria_enable =
6665                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6666         dv_attr.priority = matcher->priority;
6667         if (key->direction)
6668                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6669         cache_matcher->matcher_object =
6670                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6671         if (!cache_matcher->matcher_object) {
6672                 rte_free(cache_matcher);
6673 #ifdef HAVE_MLX5DV_DR
6674                 flow_dv_tbl_resource_release(dev, tbl);
6675 #endif
6676                 return rte_flow_error_set(error, ENOMEM,
6677                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6678                                           NULL, "cannot create matcher");
6679         }
6680         /* Save the table information */
6681         cache_matcher->tbl = tbl;
6682         rte_atomic32_init(&cache_matcher->refcnt);
6683         /* only matcher ref++, table ref++ already done above in get API. */
6684         rte_atomic32_inc(&cache_matcher->refcnt);
6685         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6686         dev_flow->dv.matcher = cache_matcher;
6687         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6688                 key->domain ? "FDB" : "NIC", key->table_id,
6689                 cache_matcher->priority,
6690                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6691                 rte_atomic32_read(&cache_matcher->refcnt));
6692         return 0;
6693 }
6694
6695 /**
6696  * Find existing tag resource or create and register a new one.
6697  *
6698  * @param dev[in, out]
6699  *   Pointer to rte_eth_dev structure.
6700  * @param[in, out] tag_be24
6701  *   Tag value in big endian then R-shift 8.
6702  * @parm[in, out] dev_flow
6703  *   Pointer to the dev_flow.
6704  * @param[out] error
6705  *   pointer to error structure.
6706  *
6707  * @return
6708  *   0 on success otherwise -errno and errno is set.
6709  */
6710 static int
6711 flow_dv_tag_resource_register
6712                         (struct rte_eth_dev *dev,
6713                          uint32_t tag_be24,
6714                          struct mlx5_flow *dev_flow,
6715                          struct rte_flow_error *error)
6716 {
6717         struct mlx5_priv *priv = dev->data->dev_private;
6718         struct mlx5_ibv_shared *sh = priv->sh;
6719         struct mlx5_flow_dv_tag_resource *cache_resource;
6720         struct mlx5_hlist_entry *entry;
6721
6722         /* Lookup a matching resource from cache. */
6723         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6724         if (entry) {
6725                 cache_resource = container_of
6726                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6727                 rte_atomic32_inc(&cache_resource->refcnt);
6728                 dev_flow->dv.tag_resource = cache_resource;
6729                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6730                         (void *)cache_resource,
6731                         rte_atomic32_read(&cache_resource->refcnt));
6732                 return 0;
6733         }
6734         /* Register new resource. */
6735         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6736         if (!cache_resource)
6737                 return rte_flow_error_set(error, ENOMEM,
6738                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6739                                           "cannot allocate resource memory");
6740         cache_resource->entry.key = (uint64_t)tag_be24;
6741         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6742         if (!cache_resource->action) {
6743                 rte_free(cache_resource);
6744                 return rte_flow_error_set(error, ENOMEM,
6745                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6746                                           NULL, "cannot create action");
6747         }
6748         rte_atomic32_init(&cache_resource->refcnt);
6749         rte_atomic32_inc(&cache_resource->refcnt);
6750         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6751                 mlx5_glue->destroy_flow_action(cache_resource->action);
6752                 rte_free(cache_resource);
6753                 return rte_flow_error_set(error, EEXIST,
6754                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6755                                           NULL, "cannot insert tag");
6756         }
6757         dev_flow->dv.tag_resource = cache_resource;
6758         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6759                 (void *)cache_resource,
6760                 rte_atomic32_read(&cache_resource->refcnt));
6761         return 0;
6762 }
6763
6764 /**
6765  * Release the tag.
6766  *
6767  * @param dev
6768  *   Pointer to Ethernet device.
6769  * @param flow
6770  *   Pointer to mlx5_flow.
6771  *
6772  * @return
6773  *   1 while a reference on it exists, 0 when freed.
6774  */
6775 static int
6776 flow_dv_tag_release(struct rte_eth_dev *dev,
6777                     struct mlx5_flow_dv_tag_resource *tag)
6778 {
6779         struct mlx5_priv *priv = dev->data->dev_private;
6780         struct mlx5_ibv_shared *sh = priv->sh;
6781
6782         assert(tag);
6783         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6784                 dev->data->port_id, (void *)tag,
6785                 rte_atomic32_read(&tag->refcnt));
6786         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6787                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6788                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6789                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6790                         dev->data->port_id, (void *)tag);
6791                 rte_free(tag);
6792                 return 0;
6793         }
6794         return 1;
6795 }
6796
6797 /**
6798  * Translate port ID action to vport.
6799  *
6800  * @param[in] dev
6801  *   Pointer to rte_eth_dev structure.
6802  * @param[in] action
6803  *   Pointer to the port ID action.
6804  * @param[out] dst_port_id
6805  *   The target port ID.
6806  * @param[out] error
6807  *   Pointer to the error structure.
6808  *
6809  * @return
6810  *   0 on success, a negative errno value otherwise and rte_errno is set.
6811  */
6812 static int
6813 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6814                                  const struct rte_flow_action *action,
6815                                  uint32_t *dst_port_id,
6816                                  struct rte_flow_error *error)
6817 {
6818         uint32_t port;
6819         struct mlx5_priv *priv;
6820         const struct rte_flow_action_port_id *conf =
6821                         (const struct rte_flow_action_port_id *)action->conf;
6822
6823         port = conf->original ? dev->data->port_id : conf->id;
6824         priv = mlx5_port_to_eswitch_info(port, false);
6825         if (!priv)
6826                 return rte_flow_error_set(error, -rte_errno,
6827                                           RTE_FLOW_ERROR_TYPE_ACTION,
6828                                           NULL,
6829                                           "No eswitch info was found for port");
6830 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6831         /*
6832          * This parameter is transferred to
6833          * mlx5dv_dr_action_create_dest_ib_port().
6834          */
6835         *dst_port_id = priv->ibv_port;
6836 #else
6837         /*
6838          * Legacy mode, no LAG configurations is supported.
6839          * This parameter is transferred to
6840          * mlx5dv_dr_action_create_dest_vport().
6841          */
6842         *dst_port_id = priv->vport_id;
6843 #endif
6844         return 0;
6845 }
6846
6847 /**
6848  * Add Tx queue matcher
6849  *
6850  * @param[in] dev
6851  *   Pointer to the dev struct.
6852  * @param[in, out] matcher
6853  *   Flow matcher.
6854  * @param[in, out] key
6855  *   Flow matcher value.
6856  * @param[in] item
6857  *   Flow pattern to translate.
6858  * @param[in] inner
6859  *   Item is inner pattern.
6860  */
6861 static void
6862 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6863                                 void *matcher, void *key,
6864                                 const struct rte_flow_item *item)
6865 {
6866         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6867         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6868         void *misc_m =
6869                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6870         void *misc_v =
6871                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6872         struct mlx5_txq_ctrl *txq;
6873         uint32_t queue;
6874
6875
6876         queue_m = (const void *)item->mask;
6877         if (!queue_m)
6878                 return;
6879         queue_v = (const void *)item->spec;
6880         if (!queue_v)
6881                 return;
6882         txq = mlx5_txq_get(dev, queue_v->queue);
6883         if (!txq)
6884                 return;
6885         queue = txq->obj->sq->id;
6886         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6887         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6888                  queue & queue_m->queue);
6889         mlx5_txq_release(dev, queue_v->queue);
6890 }
6891
6892 /**
6893  * Set the hash fields according to the @p flow information.
6894  *
6895  * @param[in] dev_flow
6896  *   Pointer to the mlx5_flow.
6897  */
6898 static void
6899 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6900 {
6901         struct rte_flow *flow = dev_flow->flow;
6902         uint64_t items = dev_flow->layers;
6903         int rss_inner = 0;
6904         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6905
6906         dev_flow->hash_fields = 0;
6907 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6908         if (flow->rss.level >= 2) {
6909                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6910                 rss_inner = 1;
6911         }
6912 #endif
6913         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6914             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6915                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6916                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6917                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6918                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6919                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6920                         else
6921                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6922                 }
6923         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6924                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6925                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6926                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6927                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6928                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6929                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6930                         else
6931                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6932                 }
6933         }
6934         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6935             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6936                 if (rss_types & ETH_RSS_UDP) {
6937                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6938                                 dev_flow->hash_fields |=
6939                                                 IBV_RX_HASH_SRC_PORT_UDP;
6940                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6941                                 dev_flow->hash_fields |=
6942                                                 IBV_RX_HASH_DST_PORT_UDP;
6943                         else
6944                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6945                 }
6946         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6947                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6948                 if (rss_types & ETH_RSS_TCP) {
6949                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6950                                 dev_flow->hash_fields |=
6951                                                 IBV_RX_HASH_SRC_PORT_TCP;
6952                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6953                                 dev_flow->hash_fields |=
6954                                                 IBV_RX_HASH_DST_PORT_TCP;
6955                         else
6956                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6957                 }
6958         }
6959 }
6960
6961 /**
6962  * Fill the flow with DV spec, lock free
6963  * (mutex should be acquired by caller).
6964  *
6965  * @param[in] dev
6966  *   Pointer to rte_eth_dev structure.
6967  * @param[in, out] dev_flow
6968  *   Pointer to the sub flow.
6969  * @param[in] attr
6970  *   Pointer to the flow attributes.
6971  * @param[in] items
6972  *   Pointer to the list of items.
6973  * @param[in] actions
6974  *   Pointer to the list of actions.
6975  * @param[out] error
6976  *   Pointer to the error structure.
6977  *
6978  * @return
6979  *   0 on success, a negative errno value otherwise and rte_errno is set.
6980  */
6981 static int
6982 __flow_dv_translate(struct rte_eth_dev *dev,
6983                     struct mlx5_flow *dev_flow,
6984                     const struct rte_flow_attr *attr,
6985                     const struct rte_flow_item items[],
6986                     const struct rte_flow_action actions[],
6987                     struct rte_flow_error *error)
6988 {
6989         struct mlx5_priv *priv = dev->data->dev_private;
6990         struct mlx5_dev_config *dev_conf = &priv->config;
6991         struct rte_flow *flow = dev_flow->flow;
6992         uint64_t item_flags = 0;
6993         uint64_t last_item = 0;
6994         uint64_t action_flags = 0;
6995         uint64_t priority = attr->priority;
6996         struct mlx5_flow_dv_matcher matcher = {
6997                 .mask = {
6998                         .size = sizeof(matcher.mask.buf),
6999                 },
7000         };
7001         int actions_n = 0;
7002         bool actions_end = false;
7003         union {
7004                 struct mlx5_flow_dv_modify_hdr_resource res;
7005                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7006                             sizeof(struct mlx5_modification_cmd) *
7007                             (MLX5_MAX_MODIFY_NUM + 1)];
7008         } mhdr_dummy;
7009         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7010         union flow_dv_attr flow_attr = { .attr = 0 };
7011         uint32_t tag_be;
7012         union mlx5_flow_tbl_key tbl_key;
7013         uint32_t modify_action_position = UINT32_MAX;
7014         void *match_mask = matcher.mask.buf;
7015         void *match_value = dev_flow->dv.value.buf;
7016         uint8_t next_protocol = 0xff;
7017         struct rte_vlan_hdr vlan = { 0 };
7018         uint32_t table;
7019         int ret = 0;
7020
7021         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7022                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7023         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7024                                        &table, error);
7025         if (ret)
7026                 return ret;
7027         dev_flow->group = table;
7028         if (attr->transfer)
7029                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7030         if (priority == MLX5_FLOW_PRIO_RSVD)
7031                 priority = dev_conf->flow_prio - 1;
7032         /* number of actions must be set to 0 in case of dirty stack. */
7033         mhdr_res->actions_num = 0;
7034         for (; !actions_end ; actions++) {
7035                 const struct rte_flow_action_queue *queue;
7036                 const struct rte_flow_action_rss *rss;
7037                 const struct rte_flow_action *action = actions;
7038                 const struct rte_flow_action_count *count = action->conf;
7039                 const uint8_t *rss_key;
7040                 const struct rte_flow_action_jump *jump_data;
7041                 const struct rte_flow_action_meter *mtr;
7042                 struct mlx5_flow_tbl_resource *tbl;
7043                 uint32_t port_id = 0;
7044                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7045                 int action_type = actions->type;
7046                 const struct rte_flow_action *found_action = NULL;
7047
7048                 switch (action_type) {
7049                 case RTE_FLOW_ACTION_TYPE_VOID:
7050                         break;
7051                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7052                         if (flow_dv_translate_action_port_id(dev, action,
7053                                                              &port_id, error))
7054                                 return -rte_errno;
7055                         port_id_resource.port_id = port_id;
7056                         if (flow_dv_port_id_action_resource_register
7057                             (dev, &port_id_resource, dev_flow, error))
7058                                 return -rte_errno;
7059                         dev_flow->dv.actions[actions_n++] =
7060                                 dev_flow->dv.port_id_action->action;
7061                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7062                         break;
7063                 case RTE_FLOW_ACTION_TYPE_FLAG:
7064                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7065                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7066                                 struct rte_flow_action_mark mark = {
7067                                         .id = MLX5_FLOW_MARK_DEFAULT,
7068                                 };
7069
7070                                 if (flow_dv_convert_action_mark(dev, &mark,
7071                                                                 mhdr_res,
7072                                                                 error))
7073                                         return -rte_errno;
7074                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7075                                 break;
7076                         }
7077                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7078                         if (!dev_flow->dv.tag_resource)
7079                                 if (flow_dv_tag_resource_register
7080                                     (dev, tag_be, dev_flow, error))
7081                                         return -rte_errno;
7082                         dev_flow->dv.actions[actions_n++] =
7083                                 dev_flow->dv.tag_resource->action;
7084                         break;
7085                 case RTE_FLOW_ACTION_TYPE_MARK:
7086                         action_flags |= MLX5_FLOW_ACTION_MARK;
7087                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7088                                 const struct rte_flow_action_mark *mark =
7089                                         (const struct rte_flow_action_mark *)
7090                                                 actions->conf;
7091
7092                                 if (flow_dv_convert_action_mark(dev, mark,
7093                                                                 mhdr_res,
7094                                                                 error))
7095                                         return -rte_errno;
7096                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7097                                 break;
7098                         }
7099                         /* Fall-through */
7100                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7101                         /* Legacy (non-extensive) MARK action. */
7102                         tag_be = mlx5_flow_mark_set
7103                               (((const struct rte_flow_action_mark *)
7104                                (actions->conf))->id);
7105                         if (!dev_flow->dv.tag_resource)
7106                                 if (flow_dv_tag_resource_register
7107                                     (dev, tag_be, dev_flow, error))
7108                                         return -rte_errno;
7109                         dev_flow->dv.actions[actions_n++] =
7110                                 dev_flow->dv.tag_resource->action;
7111                         break;
7112                 case RTE_FLOW_ACTION_TYPE_SET_META:
7113                         if (flow_dv_convert_action_set_meta
7114                                 (dev, mhdr_res, attr,
7115                                  (const struct rte_flow_action_set_meta *)
7116                                   actions->conf, error))
7117                                 return -rte_errno;
7118                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7119                         break;
7120                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7121                         if (flow_dv_convert_action_set_tag
7122                                 (dev, mhdr_res,
7123                                  (const struct rte_flow_action_set_tag *)
7124                                   actions->conf, error))
7125                                 return -rte_errno;
7126                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7127                         break;
7128                 case RTE_FLOW_ACTION_TYPE_DROP:
7129                         action_flags |= MLX5_FLOW_ACTION_DROP;
7130                         break;
7131                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7132                         assert(flow->rss.queue);
7133                         queue = actions->conf;
7134                         flow->rss.queue_num = 1;
7135                         (*flow->rss.queue)[0] = queue->index;
7136                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7137                         break;
7138                 case RTE_FLOW_ACTION_TYPE_RSS:
7139                         assert(flow->rss.queue);
7140                         rss = actions->conf;
7141                         if (flow->rss.queue)
7142                                 memcpy((*flow->rss.queue), rss->queue,
7143                                        rss->queue_num * sizeof(uint16_t));
7144                         flow->rss.queue_num = rss->queue_num;
7145                         /* NULL RSS key indicates default RSS key. */
7146                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7147                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7148                         /*
7149                          * rss->level and rss.types should be set in advance
7150                          * when expanding items for RSS.
7151                          */
7152                         action_flags |= MLX5_FLOW_ACTION_RSS;
7153                         break;
7154                 case RTE_FLOW_ACTION_TYPE_COUNT:
7155                         if (!dev_conf->devx) {
7156                                 rte_errno = ENOTSUP;
7157                                 goto cnt_err;
7158                         }
7159                         flow->counter = flow_dv_counter_alloc(dev,
7160                                                               count->shared,
7161                                                               count->id,
7162                                                               dev_flow->group);
7163                         if (flow->counter == NULL)
7164                                 goto cnt_err;
7165                         dev_flow->dv.actions[actions_n++] =
7166                                 flow->counter->action;
7167                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7168                         break;
7169 cnt_err:
7170                         if (rte_errno == ENOTSUP)
7171                                 return rte_flow_error_set
7172                                               (error, ENOTSUP,
7173                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7174                                                NULL,
7175                                                "count action not supported");
7176                         else
7177                                 return rte_flow_error_set
7178                                                 (error, rte_errno,
7179                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7180                                                  action,
7181                                                  "cannot create counter"
7182                                                   " object.");
7183                         break;
7184                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7185                         dev_flow->dv.actions[actions_n++] =
7186                                                 priv->sh->pop_vlan_action;
7187                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7188                         break;
7189                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7190                         flow_dev_get_vlan_info_from_items(items, &vlan);
7191                         vlan.eth_proto = rte_be_to_cpu_16
7192                              ((((const struct rte_flow_action_of_push_vlan *)
7193                                                    actions->conf)->ethertype));
7194                         found_action = mlx5_flow_find_action
7195                                         (actions + 1,
7196                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7197                         if (found_action)
7198                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7199                         found_action = mlx5_flow_find_action
7200                                         (actions + 1,
7201                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7202                         if (found_action)
7203                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7204                         if (flow_dv_create_action_push_vlan
7205                                             (dev, attr, &vlan, dev_flow, error))
7206                                 return -rte_errno;
7207                         dev_flow->dv.actions[actions_n++] =
7208                                            dev_flow->dv.push_vlan_res->action;
7209                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7210                         break;
7211                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7212                         /* of_vlan_push action handled this action */
7213                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7214                         break;
7215                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7216                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7217                                 break;
7218                         flow_dev_get_vlan_info_from_items(items, &vlan);
7219                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7220                         /* If no VLAN push - this is a modify header action */
7221                         if (flow_dv_convert_action_modify_vlan_vid
7222                                                 (mhdr_res, actions, error))
7223                                 return -rte_errno;
7224                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7225                         break;
7226                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7227                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7228                         if (flow_dv_create_action_l2_encap(dev, actions,
7229                                                            dev_flow,
7230                                                            attr->transfer,
7231                                                            error))
7232                                 return -rte_errno;
7233                         dev_flow->dv.actions[actions_n++] =
7234                                 dev_flow->dv.encap_decap->verbs_action;
7235                         action_flags |= actions->type ==
7236                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7237                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7238                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7239                         break;
7240                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7241                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7242                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7243                                                            attr->transfer,
7244                                                            error))
7245                                 return -rte_errno;
7246                         dev_flow->dv.actions[actions_n++] =
7247                                 dev_flow->dv.encap_decap->verbs_action;
7248                         action_flags |= actions->type ==
7249                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7250                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7251                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7252                         break;
7253                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7254                         /* Handle encap with preceding decap. */
7255                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7256                                 if (flow_dv_create_action_raw_encap
7257                                         (dev, actions, dev_flow, attr, error))
7258                                         return -rte_errno;
7259                                 dev_flow->dv.actions[actions_n++] =
7260                                         dev_flow->dv.encap_decap->verbs_action;
7261                         } else {
7262                                 /* Handle encap without preceding decap. */
7263                                 if (flow_dv_create_action_l2_encap
7264                                     (dev, actions, dev_flow, attr->transfer,
7265                                      error))
7266                                         return -rte_errno;
7267                                 dev_flow->dv.actions[actions_n++] =
7268                                         dev_flow->dv.encap_decap->verbs_action;
7269                         }
7270                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7271                         break;
7272                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7273                         /* Check if this decap is followed by encap. */
7274                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7275                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7276                                action++) {
7277                         }
7278                         /* Handle decap only if it isn't followed by encap. */
7279                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7280                                 if (flow_dv_create_action_l2_decap
7281                                     (dev, dev_flow, attr->transfer, error))
7282                                         return -rte_errno;
7283                                 dev_flow->dv.actions[actions_n++] =
7284                                         dev_flow->dv.encap_decap->verbs_action;
7285                         }
7286                         /* If decap is followed by encap, handle it at encap. */
7287                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7288                         break;
7289                 case RTE_FLOW_ACTION_TYPE_JUMP:
7290                         jump_data = action->conf;
7291                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7292                                                        jump_data->group, &table,
7293                                                        error);
7294                         if (ret)
7295                                 return ret;
7296                         tbl = flow_dv_tbl_resource_get(dev, table,
7297                                                        attr->egress,
7298                                                        attr->transfer, error);
7299                         if (!tbl)
7300                                 return rte_flow_error_set
7301                                                 (error, errno,
7302                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7303                                                  NULL,
7304                                                  "cannot create jump action.");
7305                         if (flow_dv_jump_tbl_resource_register
7306                             (dev, tbl, dev_flow, error)) {
7307                                 flow_dv_tbl_resource_release(dev, tbl);
7308                                 return rte_flow_error_set
7309                                                 (error, errno,
7310                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7311                                                  NULL,
7312                                                  "cannot create jump action.");
7313                         }
7314                         dev_flow->dv.actions[actions_n++] =
7315                                 dev_flow->dv.jump->action;
7316                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7317                         break;
7318                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7319                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7320                         if (flow_dv_convert_action_modify_mac
7321                                         (mhdr_res, actions, error))
7322                                 return -rte_errno;
7323                         action_flags |= actions->type ==
7324                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7325                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7326                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7327                         break;
7328                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7329                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7330                         if (flow_dv_convert_action_modify_ipv4
7331                                         (mhdr_res, actions, error))
7332                                 return -rte_errno;
7333                         action_flags |= actions->type ==
7334                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7335                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7336                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7337                         break;
7338                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7339                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7340                         if (flow_dv_convert_action_modify_ipv6
7341                                         (mhdr_res, actions, error))
7342                                 return -rte_errno;
7343                         action_flags |= actions->type ==
7344                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7345                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7346                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7347                         break;
7348                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7349                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7350                         if (flow_dv_convert_action_modify_tp
7351                                         (mhdr_res, actions, items,
7352                                          &flow_attr, error))
7353                                 return -rte_errno;
7354                         action_flags |= actions->type ==
7355                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7356                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7357                                         MLX5_FLOW_ACTION_SET_TP_DST;
7358                         break;
7359                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7360                         if (flow_dv_convert_action_modify_dec_ttl
7361                                         (mhdr_res, items, &flow_attr, error))
7362                                 return -rte_errno;
7363                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7364                         break;
7365                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7366                         if (flow_dv_convert_action_modify_ttl
7367                                         (mhdr_res, actions, items,
7368                                          &flow_attr, error))
7369                                 return -rte_errno;
7370                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7371                         break;
7372                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7373                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7374                         if (flow_dv_convert_action_modify_tcp_seq
7375                                         (mhdr_res, actions, error))
7376                                 return -rte_errno;
7377                         action_flags |= actions->type ==
7378                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7379                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7380                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7381                         break;
7382
7383                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7384                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7385                         if (flow_dv_convert_action_modify_tcp_ack
7386                                         (mhdr_res, actions, error))
7387                                 return -rte_errno;
7388                         action_flags |= actions->type ==
7389                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7390                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7391                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7392                         break;
7393                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7394                         if (flow_dv_convert_action_set_reg
7395                                         (mhdr_res, actions, error))
7396                                 return -rte_errno;
7397                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7398                         break;
7399                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7400                         if (flow_dv_convert_action_copy_mreg
7401                                         (dev, mhdr_res, actions, error))
7402                                 return -rte_errno;
7403                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7404                         break;
7405                 case RTE_FLOW_ACTION_TYPE_METER:
7406                         mtr = actions->conf;
7407                         if (!flow->meter) {
7408                                 flow->meter = mlx5_flow_meter_attach(priv,
7409                                                         mtr->mtr_id, attr,
7410                                                         error);
7411                                 if (!flow->meter)
7412                                         return rte_flow_error_set(error,
7413                                                 rte_errno,
7414                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7415                                                 NULL,
7416                                                 "meter not found "
7417                                                 "or invalid parameters");
7418                         }
7419                         /* Set the meter action. */
7420                         dev_flow->dv.actions[actions_n++] =
7421                                 flow->meter->mfts->meter_action;
7422                         action_flags |= MLX5_FLOW_ACTION_METER;
7423                         break;
7424                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7425                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7426                                                               actions, error))
7427                                 return -rte_errno;
7428                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7429                         break;
7430                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7431                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7432                                                               actions, error))
7433                                 return -rte_errno;
7434                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7435                         break;
7436                 case RTE_FLOW_ACTION_TYPE_END:
7437                         actions_end = true;
7438                         if (mhdr_res->actions_num) {
7439                                 /* create modify action if needed. */
7440                                 if (flow_dv_modify_hdr_resource_register
7441                                         (dev, mhdr_res, dev_flow, error))
7442                                         return -rte_errno;
7443                                 dev_flow->dv.actions[modify_action_position] =
7444                                         dev_flow->dv.modify_hdr->verbs_action;
7445                         }
7446                         break;
7447                 default:
7448                         break;
7449                 }
7450                 if (mhdr_res->actions_num &&
7451                     modify_action_position == UINT32_MAX)
7452                         modify_action_position = actions_n++;
7453         }
7454         dev_flow->dv.actions_n = actions_n;
7455         dev_flow->actions = action_flags;
7456         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7457                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7458                 int item_type = items->type;
7459
7460                 switch (item_type) {
7461                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7462                         flow_dv_translate_item_port_id(dev, match_mask,
7463                                                        match_value, items);
7464                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7465                         break;
7466                 case RTE_FLOW_ITEM_TYPE_ETH:
7467                         flow_dv_translate_item_eth(match_mask, match_value,
7468                                                    items, tunnel);
7469                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7470                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7471                                              MLX5_FLOW_LAYER_OUTER_L2;
7472                         break;
7473                 case RTE_FLOW_ITEM_TYPE_VLAN:
7474                         flow_dv_translate_item_vlan(dev_flow,
7475                                                     match_mask, match_value,
7476                                                     items, tunnel);
7477                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7478                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7479                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7480                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7481                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7482                         break;
7483                 case RTE_FLOW_ITEM_TYPE_IPV4:
7484                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7485                                                   &item_flags, &tunnel);
7486                         flow_dv_translate_item_ipv4(match_mask, match_value,
7487                                                     items, tunnel,
7488                                                     dev_flow->group);
7489                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7490                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7491                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7492                         if (items->mask != NULL &&
7493                             ((const struct rte_flow_item_ipv4 *)
7494                              items->mask)->hdr.next_proto_id) {
7495                                 next_protocol =
7496                                         ((const struct rte_flow_item_ipv4 *)
7497                                          (items->spec))->hdr.next_proto_id;
7498                                 next_protocol &=
7499                                         ((const struct rte_flow_item_ipv4 *)
7500                                          (items->mask))->hdr.next_proto_id;
7501                         } else {
7502                                 /* Reset for inner layer. */
7503                                 next_protocol = 0xff;
7504                         }
7505                         break;
7506                 case RTE_FLOW_ITEM_TYPE_IPV6:
7507                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7508                                                   &item_flags, &tunnel);
7509                         flow_dv_translate_item_ipv6(match_mask, match_value,
7510                                                     items, tunnel,
7511                                                     dev_flow->group);
7512                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7513                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7514                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7515                         if (items->mask != NULL &&
7516                             ((const struct rte_flow_item_ipv6 *)
7517                              items->mask)->hdr.proto) {
7518                                 next_protocol =
7519                                         ((const struct rte_flow_item_ipv6 *)
7520                                          items->spec)->hdr.proto;
7521                                 next_protocol &=
7522                                         ((const struct rte_flow_item_ipv6 *)
7523                                          items->mask)->hdr.proto;
7524                         } else {
7525                                 /* Reset for inner layer. */
7526                                 next_protocol = 0xff;
7527                         }
7528                         break;
7529                 case RTE_FLOW_ITEM_TYPE_TCP:
7530                         flow_dv_translate_item_tcp(match_mask, match_value,
7531                                                    items, tunnel);
7532                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7533                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7534                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7535                         break;
7536                 case RTE_FLOW_ITEM_TYPE_UDP:
7537                         flow_dv_translate_item_udp(match_mask, match_value,
7538                                                    items, tunnel);
7539                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7540                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7541                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7542                         break;
7543                 case RTE_FLOW_ITEM_TYPE_GRE:
7544                         flow_dv_translate_item_gre(match_mask, match_value,
7545                                                    items, tunnel);
7546                         last_item = MLX5_FLOW_LAYER_GRE;
7547                         break;
7548                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7549                         flow_dv_translate_item_gre_key(match_mask,
7550                                                        match_value, items);
7551                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7552                         break;
7553                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7554                         flow_dv_translate_item_nvgre(match_mask, match_value,
7555                                                      items, tunnel);
7556                         last_item = MLX5_FLOW_LAYER_GRE;
7557                         break;
7558                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7559                         flow_dv_translate_item_vxlan(match_mask, match_value,
7560                                                      items, tunnel);
7561                         last_item = MLX5_FLOW_LAYER_VXLAN;
7562                         break;
7563                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7564                         flow_dv_translate_item_vxlan(match_mask, match_value,
7565                                                      items, tunnel);
7566                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7567                         break;
7568                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7569                         flow_dv_translate_item_geneve(match_mask, match_value,
7570                                                       items, tunnel);
7571                         last_item = MLX5_FLOW_LAYER_GENEVE;
7572                         break;
7573                 case RTE_FLOW_ITEM_TYPE_MPLS:
7574                         flow_dv_translate_item_mpls(match_mask, match_value,
7575                                                     items, last_item, tunnel);
7576                         last_item = MLX5_FLOW_LAYER_MPLS;
7577                         break;
7578                 case RTE_FLOW_ITEM_TYPE_MARK:
7579                         flow_dv_translate_item_mark(dev, match_mask,
7580                                                     match_value, items);
7581                         last_item = MLX5_FLOW_ITEM_MARK;
7582                         break;
7583                 case RTE_FLOW_ITEM_TYPE_META:
7584                         flow_dv_translate_item_meta(dev, match_mask,
7585                                                     match_value, attr, items);
7586                         last_item = MLX5_FLOW_ITEM_METADATA;
7587                         break;
7588                 case RTE_FLOW_ITEM_TYPE_ICMP:
7589                         flow_dv_translate_item_icmp(match_mask, match_value,
7590                                                     items, tunnel);
7591                         last_item = MLX5_FLOW_LAYER_ICMP;
7592                         break;
7593                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7594                         flow_dv_translate_item_icmp6(match_mask, match_value,
7595                                                       items, tunnel);
7596                         last_item = MLX5_FLOW_LAYER_ICMP6;
7597                         break;
7598                 case RTE_FLOW_ITEM_TYPE_TAG:
7599                         flow_dv_translate_item_tag(dev, match_mask,
7600                                                    match_value, items);
7601                         last_item = MLX5_FLOW_ITEM_TAG;
7602                         break;
7603                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7604                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7605                                                         match_value, items);
7606                         last_item = MLX5_FLOW_ITEM_TAG;
7607                         break;
7608                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7609                         flow_dv_translate_item_tx_queue(dev, match_mask,
7610                                                         match_value,
7611                                                         items);
7612                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7613                         break;
7614                 case RTE_FLOW_ITEM_TYPE_GTP:
7615                         flow_dv_translate_item_gtp(match_mask, match_value,
7616                                                    items, tunnel);
7617                         last_item = MLX5_FLOW_LAYER_GTP;
7618                         break;
7619                 default:
7620                         break;
7621                 }
7622                 item_flags |= last_item;
7623         }
7624         /*
7625          * In case of ingress traffic when E-Switch mode is enabled,
7626          * we have two cases where we need to set the source port manually.
7627          * The first one, is in case of Nic steering rule, and the second is
7628          * E-Switch rule where no port_id item was found. In both cases
7629          * the source port is set according the current port in use.
7630          */
7631         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7632             (priv->representor || priv->master)) {
7633                 if (flow_dv_translate_item_port_id(dev, match_mask,
7634                                                    match_value, NULL))
7635                         return -rte_errno;
7636         }
7637         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7638                                          dev_flow->dv.value.buf));
7639         dev_flow->layers = item_flags;
7640         if (action_flags & MLX5_FLOW_ACTION_RSS)
7641                 flow_dv_hashfields_set(dev_flow);
7642         /* Register matcher. */
7643         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7644                                     matcher.mask.size);
7645         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7646                                                      matcher.priority);
7647         /* reserved field no needs to be set to 0 here. */
7648         tbl_key.domain = attr->transfer;
7649         tbl_key.direction = attr->egress;
7650         tbl_key.table_id = dev_flow->group;
7651         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7652                 return -rte_errno;
7653         return 0;
7654 }
7655
7656 /**
7657  * Apply the flow to the NIC, lock free,
7658  * (mutex should be acquired by caller).
7659  *
7660  * @param[in] dev
7661  *   Pointer to the Ethernet device structure.
7662  * @param[in, out] flow
7663  *   Pointer to flow structure.
7664  * @param[out] error
7665  *   Pointer to error structure.
7666  *
7667  * @return
7668  *   0 on success, a negative errno value otherwise and rte_errno is set.
7669  */
7670 static int
7671 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7672                 struct rte_flow_error *error)
7673 {
7674         struct mlx5_flow_dv *dv;
7675         struct mlx5_flow *dev_flow;
7676         struct mlx5_priv *priv = dev->data->dev_private;
7677         int n;
7678         int err;
7679
7680         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7681                 dv = &dev_flow->dv;
7682                 n = dv->actions_n;
7683                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7684                         if (dev_flow->transfer) {
7685                                 dv->actions[n++] = priv->sh->esw_drop_action;
7686                         } else {
7687                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7688                                 if (!dv->hrxq) {
7689                                         rte_flow_error_set
7690                                                 (error, errno,
7691                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7692                                                  NULL,
7693                                                  "cannot get drop hash queue");
7694                                         goto error;
7695                                 }
7696                                 dv->actions[n++] = dv->hrxq->action;
7697                         }
7698                 } else if (dev_flow->actions &
7699                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7700                         struct mlx5_hrxq *hrxq;
7701
7702                         assert(flow->rss.queue);
7703                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7704                                              MLX5_RSS_HASH_KEY_LEN,
7705                                              dev_flow->hash_fields,
7706                                              (*flow->rss.queue),
7707                                              flow->rss.queue_num);
7708                         if (!hrxq) {
7709                                 hrxq = mlx5_hrxq_new
7710                                         (dev, flow->rss.key,
7711                                          MLX5_RSS_HASH_KEY_LEN,
7712                                          dev_flow->hash_fields,
7713                                          (*flow->rss.queue),
7714                                          flow->rss.queue_num,
7715                                          !!(dev_flow->layers &
7716                                             MLX5_FLOW_LAYER_TUNNEL));
7717                         }
7718                         if (!hrxq) {
7719                                 rte_flow_error_set
7720                                         (error, rte_errno,
7721                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7722                                          "cannot get hash queue");
7723                                 goto error;
7724                         }
7725                         dv->hrxq = hrxq;
7726                         dv->actions[n++] = dv->hrxq->action;
7727                 }
7728                 dv->flow =
7729                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7730                                                   (void *)&dv->value, n,
7731                                                   dv->actions);
7732                 if (!dv->flow) {
7733                         rte_flow_error_set(error, errno,
7734                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7735                                            NULL,
7736                                            "hardware refuses to create flow");
7737                         goto error;
7738                 }
7739                 if (priv->vmwa_context &&
7740                     dev_flow->dv.vf_vlan.tag &&
7741                     !dev_flow->dv.vf_vlan.created) {
7742                         /*
7743                          * The rule contains the VLAN pattern.
7744                          * For VF we are going to create VLAN
7745                          * interface to make hypervisor set correct
7746                          * e-Switch vport context.
7747                          */
7748                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7749                 }
7750         }
7751         return 0;
7752 error:
7753         err = rte_errno; /* Save rte_errno before cleanup. */
7754         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7755                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7756                 if (dv->hrxq) {
7757                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7758                                 mlx5_hrxq_drop_release(dev);
7759                         else
7760                                 mlx5_hrxq_release(dev, dv->hrxq);
7761                         dv->hrxq = NULL;
7762                 }
7763                 if (dev_flow->dv.vf_vlan.tag &&
7764                     dev_flow->dv.vf_vlan.created)
7765                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7766         }
7767         rte_errno = err; /* Restore rte_errno. */
7768         return -rte_errno;
7769 }
7770
7771 /**
7772  * Release the flow matcher.
7773  *
7774  * @param dev
7775  *   Pointer to Ethernet device.
7776  * @param flow
7777  *   Pointer to mlx5_flow.
7778  *
7779  * @return
7780  *   1 while a reference on it exists, 0 when freed.
7781  */
7782 static int
7783 flow_dv_matcher_release(struct rte_eth_dev *dev,
7784                         struct mlx5_flow *flow)
7785 {
7786         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7787
7788         assert(matcher->matcher_object);
7789         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7790                 dev->data->port_id, (void *)matcher,
7791                 rte_atomic32_read(&matcher->refcnt));
7792         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7793                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7794                            (matcher->matcher_object));
7795                 LIST_REMOVE(matcher, next);
7796                 /* table ref-- in release interface. */
7797                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7798                 rte_free(matcher);
7799                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7800                         dev->data->port_id, (void *)matcher);
7801                 return 0;
7802         }
7803         return 1;
7804 }
7805
7806 /**
7807  * Release an encap/decap resource.
7808  *
7809  * @param flow
7810  *   Pointer to mlx5_flow.
7811  *
7812  * @return
7813  *   1 while a reference on it exists, 0 when freed.
7814  */
7815 static int
7816 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7817 {
7818         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7819                                                 flow->dv.encap_decap;
7820
7821         assert(cache_resource->verbs_action);
7822         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7823                 (void *)cache_resource,
7824                 rte_atomic32_read(&cache_resource->refcnt));
7825         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7826                 claim_zero(mlx5_glue->destroy_flow_action
7827                                 (cache_resource->verbs_action));
7828                 LIST_REMOVE(cache_resource, next);
7829                 rte_free(cache_resource);
7830                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7831                         (void *)cache_resource);
7832                 return 0;
7833         }
7834         return 1;
7835 }
7836
7837 /**
7838  * Release an jump to table action resource.
7839  *
7840  * @param dev
7841  *   Pointer to Ethernet device.
7842  * @param flow
7843  *   Pointer to mlx5_flow.
7844  *
7845  * @return
7846  *   1 while a reference on it exists, 0 when freed.
7847  */
7848 static int
7849 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7850                                   struct mlx5_flow *flow)
7851 {
7852         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7853         struct mlx5_flow_tbl_data_entry *tbl_data =
7854                         container_of(cache_resource,
7855                                      struct mlx5_flow_tbl_data_entry, jump);
7856
7857         assert(cache_resource->action);
7858         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7859                 (void *)cache_resource,
7860                 rte_atomic32_read(&cache_resource->refcnt));
7861         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7862                 claim_zero(mlx5_glue->destroy_flow_action
7863                                 (cache_resource->action));
7864                 /* jump action memory free is inside the table release. */
7865                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7866                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7867                         (void *)cache_resource);
7868                 return 0;
7869         }
7870         return 1;
7871 }
7872
7873 /**
7874  * Release a modify-header resource.
7875  *
7876  * @param flow
7877  *   Pointer to mlx5_flow.
7878  *
7879  * @return
7880  *   1 while a reference on it exists, 0 when freed.
7881  */
7882 static int
7883 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7884 {
7885         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7886                                                 flow->dv.modify_hdr;
7887
7888         assert(cache_resource->verbs_action);
7889         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7890                 (void *)cache_resource,
7891                 rte_atomic32_read(&cache_resource->refcnt));
7892         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7893                 claim_zero(mlx5_glue->destroy_flow_action
7894                                 (cache_resource->verbs_action));
7895                 LIST_REMOVE(cache_resource, next);
7896                 rte_free(cache_resource);
7897                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7898                         (void *)cache_resource);
7899                 return 0;
7900         }
7901         return 1;
7902 }
7903
7904 /**
7905  * Release port ID action resource.
7906  *
7907  * @param flow
7908  *   Pointer to mlx5_flow.
7909  *
7910  * @return
7911  *   1 while a reference on it exists, 0 when freed.
7912  */
7913 static int
7914 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7915 {
7916         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7917                 flow->dv.port_id_action;
7918
7919         assert(cache_resource->action);
7920         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7921                 (void *)cache_resource,
7922                 rte_atomic32_read(&cache_resource->refcnt));
7923         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7924                 claim_zero(mlx5_glue->destroy_flow_action
7925                                 (cache_resource->action));
7926                 LIST_REMOVE(cache_resource, next);
7927                 rte_free(cache_resource);
7928                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7929                         (void *)cache_resource);
7930                 return 0;
7931         }
7932         return 1;
7933 }
7934
7935 /**
7936  * Release push vlan action resource.
7937  *
7938  * @param flow
7939  *   Pointer to mlx5_flow.
7940  *
7941  * @return
7942  *   1 while a reference on it exists, 0 when freed.
7943  */
7944 static int
7945 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7946 {
7947         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7948                 flow->dv.push_vlan_res;
7949
7950         assert(cache_resource->action);
7951         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7952                 (void *)cache_resource,
7953                 rte_atomic32_read(&cache_resource->refcnt));
7954         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7955                 claim_zero(mlx5_glue->destroy_flow_action
7956                                 (cache_resource->action));
7957                 LIST_REMOVE(cache_resource, next);
7958                 rte_free(cache_resource);
7959                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7960                         (void *)cache_resource);
7961                 return 0;
7962         }
7963         return 1;
7964 }
7965
7966 /**
7967  * Remove the flow from the NIC but keeps it in memory.
7968  * Lock free, (mutex should be acquired by caller).
7969  *
7970  * @param[in] dev
7971  *   Pointer to Ethernet device.
7972  * @param[in, out] flow
7973  *   Pointer to flow structure.
7974  */
7975 static void
7976 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7977 {
7978         struct mlx5_flow_dv *dv;
7979         struct mlx5_flow *dev_flow;
7980
7981         if (!flow)
7982                 return;
7983         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7984                 dv = &dev_flow->dv;
7985                 if (dv->flow) {
7986                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7987                         dv->flow = NULL;
7988                 }
7989                 if (dv->hrxq) {
7990                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7991                                 mlx5_hrxq_drop_release(dev);
7992                         else
7993                                 mlx5_hrxq_release(dev, dv->hrxq);
7994                         dv->hrxq = NULL;
7995                 }
7996                 if (dev_flow->dv.vf_vlan.tag &&
7997                     dev_flow->dv.vf_vlan.created)
7998                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7999         }
8000 }
8001
8002 /**
8003  * Remove the flow from the NIC and the memory.
8004  * Lock free, (mutex should be acquired by caller).
8005  *
8006  * @param[in] dev
8007  *   Pointer to the Ethernet device structure.
8008  * @param[in, out] flow
8009  *   Pointer to flow structure.
8010  */
8011 static void
8012 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8013 {
8014         struct mlx5_flow *dev_flow;
8015
8016         if (!flow)
8017                 return;
8018         __flow_dv_remove(dev, flow);
8019         if (flow->counter) {
8020                 flow_dv_counter_release(dev, flow->counter);
8021                 flow->counter = NULL;
8022         }
8023         if (flow->meter) {
8024                 mlx5_flow_meter_detach(flow->meter);
8025                 flow->meter = NULL;
8026         }
8027         while (!LIST_EMPTY(&flow->dev_flows)) {
8028                 dev_flow = LIST_FIRST(&flow->dev_flows);
8029                 LIST_REMOVE(dev_flow, next);
8030                 if (dev_flow->dv.matcher)
8031                         flow_dv_matcher_release(dev, dev_flow);
8032                 if (dev_flow->dv.encap_decap)
8033                         flow_dv_encap_decap_resource_release(dev_flow);
8034                 if (dev_flow->dv.modify_hdr)
8035                         flow_dv_modify_hdr_resource_release(dev_flow);
8036                 if (dev_flow->dv.jump)
8037                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8038                 if (dev_flow->dv.port_id_action)
8039                         flow_dv_port_id_action_resource_release(dev_flow);
8040                 if (dev_flow->dv.push_vlan_res)
8041                         flow_dv_push_vlan_action_resource_release(dev_flow);
8042                 if (dev_flow->dv.tag_resource)
8043                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8044                 rte_free(dev_flow);
8045         }
8046 }
8047
8048 /**
8049  * Query a dv flow  rule for its statistics via devx.
8050  *
8051  * @param[in] dev
8052  *   Pointer to Ethernet device.
8053  * @param[in] flow
8054  *   Pointer to the sub flow.
8055  * @param[out] data
8056  *   data retrieved by the query.
8057  * @param[out] error
8058  *   Perform verbose error reporting if not NULL.
8059  *
8060  * @return
8061  *   0 on success, a negative errno value otherwise and rte_errno is set.
8062  */
8063 static int
8064 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8065                     void *data, struct rte_flow_error *error)
8066 {
8067         struct mlx5_priv *priv = dev->data->dev_private;
8068         struct rte_flow_query_count *qc = data;
8069
8070         if (!priv->config.devx)
8071                 return rte_flow_error_set(error, ENOTSUP,
8072                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8073                                           NULL,
8074                                           "counters are not supported");
8075         if (flow->counter) {
8076                 uint64_t pkts, bytes;
8077                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8078                                                &bytes);
8079
8080                 if (err)
8081                         return rte_flow_error_set(error, -err,
8082                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8083                                         NULL, "cannot read counters");
8084                 qc->hits_set = 1;
8085                 qc->bytes_set = 1;
8086                 qc->hits = pkts - flow->counter->hits;
8087                 qc->bytes = bytes - flow->counter->bytes;
8088                 if (qc->reset) {
8089                         flow->counter->hits = pkts;
8090                         flow->counter->bytes = bytes;
8091                 }
8092                 return 0;
8093         }
8094         return rte_flow_error_set(error, EINVAL,
8095                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8096                                   NULL,
8097                                   "counters are not available");
8098 }
8099
8100 /**
8101  * Query a flow.
8102  *
8103  * @see rte_flow_query()
8104  * @see rte_flow_ops
8105  */
8106 static int
8107 flow_dv_query(struct rte_eth_dev *dev,
8108               struct rte_flow *flow __rte_unused,
8109               const struct rte_flow_action *actions __rte_unused,
8110               void *data __rte_unused,
8111               struct rte_flow_error *error __rte_unused)
8112 {
8113         int ret = -EINVAL;
8114
8115         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8116                 switch (actions->type) {
8117                 case RTE_FLOW_ACTION_TYPE_VOID:
8118                         break;
8119                 case RTE_FLOW_ACTION_TYPE_COUNT:
8120                         ret = flow_dv_query_count(dev, flow, data, error);
8121                         break;
8122                 default:
8123                         return rte_flow_error_set(error, ENOTSUP,
8124                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8125                                                   actions,
8126                                                   "action not supported");
8127                 }
8128         }
8129         return ret;
8130 }
8131
8132 /**
8133  * Destroy the meter table set.
8134  * Lock free, (mutex should be acquired by caller).
8135  *
8136  * @param[in] dev
8137  *   Pointer to Ethernet device.
8138  * @param[in] tbl
8139  *   Pointer to the meter table set.
8140  *
8141  * @return
8142  *   Always 0.
8143  */
8144 static int
8145 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8146                         struct mlx5_meter_domains_infos *tbl)
8147 {
8148         struct mlx5_priv *priv = dev->data->dev_private;
8149         struct mlx5_meter_domains_infos *mtd =
8150                                 (struct mlx5_meter_domains_infos *)tbl;
8151
8152         if (!mtd || !priv->config.dv_flow_en)
8153                 return 0;
8154         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8155                 claim_zero(mlx5_glue->dv_destroy_flow
8156                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8157         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8158                 claim_zero(mlx5_glue->dv_destroy_flow
8159                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8160         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8161                 claim_zero(mlx5_glue->dv_destroy_flow
8162                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8163         if (mtd->egress.color_matcher)
8164                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8165                           (mtd->egress.color_matcher));
8166         if (mtd->egress.any_matcher)
8167                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8168                           (mtd->egress.any_matcher));
8169         if (mtd->egress.tbl)
8170                 claim_zero(flow_dv_tbl_resource_release(dev,
8171                                                         mtd->egress.tbl));
8172         if (mtd->ingress.color_matcher)
8173                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8174                           (mtd->ingress.color_matcher));
8175         if (mtd->ingress.any_matcher)
8176                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8177                           (mtd->ingress.any_matcher));
8178         if (mtd->ingress.tbl)
8179                 claim_zero(flow_dv_tbl_resource_release(dev,
8180                                                         mtd->ingress.tbl));
8181         if (mtd->transfer.color_matcher)
8182                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8183                           (mtd->transfer.color_matcher));
8184         if (mtd->transfer.any_matcher)
8185                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8186                           (mtd->transfer.any_matcher));
8187         if (mtd->transfer.tbl)
8188                 claim_zero(flow_dv_tbl_resource_release(dev,
8189                                                         mtd->transfer.tbl));
8190         if (mtd->drop_actn)
8191                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8192         rte_free(mtd);
8193         return 0;
8194 }
8195
8196 /* Number of meter flow actions, count and jump or count and drop. */
8197 #define METER_ACTIONS 2
8198
8199 /**
8200  * Create specify domain meter table and suffix table.
8201  *
8202  * @param[in] dev
8203  *   Pointer to Ethernet device.
8204  * @param[in,out] mtb
8205  *   Pointer to DV meter table set.
8206  * @param[in] egress
8207  *   Table attribute.
8208  * @param[in] transfer
8209  *   Table attribute.
8210  * @param[in] color_reg_c_idx
8211  *   Reg C index for color match.
8212  *
8213  * @return
8214  *   0 on success, -1 otherwise and rte_errno is set.
8215  */
8216 static int
8217 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8218                            struct mlx5_meter_domains_infos *mtb,
8219                            uint8_t egress, uint8_t transfer,
8220                            uint32_t color_reg_c_idx)
8221 {
8222         struct mlx5_priv *priv = dev->data->dev_private;
8223         struct mlx5_ibv_shared *sh = priv->sh;
8224         struct mlx5_flow_dv_match_params mask = {
8225                 .size = sizeof(mask.buf),
8226         };
8227         struct mlx5_flow_dv_match_params value = {
8228                 .size = sizeof(value.buf),
8229         };
8230         struct mlx5dv_flow_matcher_attr dv_attr = {
8231                 .type = IBV_FLOW_ATTR_NORMAL,
8232                 .priority = 0,
8233                 .match_criteria_enable = 0,
8234                 .match_mask = (void *)&mask,
8235         };
8236         void *actions[METER_ACTIONS];
8237         struct mlx5_flow_tbl_resource **sfx_tbl;
8238         struct mlx5_meter_domain_info *dtb;
8239         struct rte_flow_error error;
8240         int i = 0;
8241
8242         if (transfer) {
8243                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8244                 dtb = &mtb->transfer;
8245         } else if (egress) {
8246                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8247                 dtb = &mtb->egress;
8248         } else {
8249                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8250                 dtb = &mtb->ingress;
8251         }
8252         /* If the suffix table in missing, create it. */
8253         if (!(*sfx_tbl)) {
8254                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8255                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8256                                                 egress, transfer, &error);
8257                 if (!(*sfx_tbl)) {
8258                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8259                         return -1;
8260                 }
8261         }
8262         /* Create the meter table with METER level. */
8263         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8264                                             egress, transfer, &error);
8265         if (!dtb->tbl) {
8266                 DRV_LOG(ERR, "Failed to create meter policer table.");
8267                 return -1;
8268         }
8269         /* Create matchers, Any and Color. */
8270         dv_attr.priority = 3;
8271         dv_attr.match_criteria_enable = 0;
8272         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8273                                                              &dv_attr,
8274                                                              dtb->tbl->obj);
8275         if (!dtb->any_matcher) {
8276                 DRV_LOG(ERR, "Failed to create meter"
8277                              " policer default matcher.");
8278                 goto error_exit;
8279         }
8280         dv_attr.priority = 0;
8281         dv_attr.match_criteria_enable =
8282                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8283         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8284                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
8285         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8286                                                                &dv_attr,
8287                                                                dtb->tbl->obj);
8288         if (!dtb->color_matcher) {
8289                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8290                 goto error_exit;
8291         }
8292         if (mtb->count_actns[RTE_MTR_DROPPED])
8293                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8294         actions[i++] = mtb->drop_actn;
8295         /* Default rule: lowest priority, match any, actions: drop. */
8296         dtb->policer_rules[RTE_MTR_DROPPED] =
8297                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8298                                                  (void *)&value, i, actions);
8299         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8300                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8301                 goto error_exit;
8302         }
8303         return 0;
8304 error_exit:
8305         return -1;
8306 }
8307
8308 /**
8309  * Create the needed meter and suffix tables.
8310  * Lock free, (mutex should be acquired by caller).
8311  *
8312  * @param[in] dev
8313  *   Pointer to Ethernet device.
8314  * @param[in] fm
8315  *   Pointer to the flow meter.
8316  *
8317  * @return
8318  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8319  */
8320 static struct mlx5_meter_domains_infos *
8321 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8322                        const struct mlx5_flow_meter *fm)
8323 {
8324         struct mlx5_priv *priv = dev->data->dev_private;
8325         struct mlx5_meter_domains_infos *mtb;
8326         int ret;
8327         int i;
8328
8329         if (!priv->mtr_en) {
8330                 rte_errno = ENOTSUP;
8331                 return NULL;
8332         }
8333         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8334         if (!mtb) {
8335                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8336                 return NULL;
8337         }
8338         /* Create meter count actions */
8339         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8340                 if (!fm->policer_stats.cnt[i])
8341                         continue;
8342                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8343         }
8344         /* Create drop action. */
8345         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8346         if (!mtb->drop_actn) {
8347                 DRV_LOG(ERR, "Failed to create drop action.");
8348                 goto error_exit;
8349         }
8350         /* Egress meter table. */
8351         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8352         if (ret) {
8353                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8354                 goto error_exit;
8355         }
8356         /* Ingress meter table. */
8357         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8358         if (ret) {
8359                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8360                 goto error_exit;
8361         }
8362         /* FDB meter table. */
8363         if (priv->config.dv_esw_en) {
8364                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8365                                                  priv->mtr_color_reg);
8366                 if (ret) {
8367                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8368                         goto error_exit;
8369                 }
8370         }
8371         return mtb;
8372 error_exit:
8373         flow_dv_destroy_mtr_tbl(dev, mtb);
8374         return NULL;
8375 }
8376
8377 /**
8378  * Destroy domain policer rule.
8379  *
8380  * @param[in] dt
8381  *   Pointer to domain table.
8382  */
8383 static void
8384 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8385 {
8386         int i;
8387
8388         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8389                 if (dt->policer_rules[i]) {
8390                         claim_zero(mlx5_glue->dv_destroy_flow
8391                                   (dt->policer_rules[i]));
8392                         dt->policer_rules[i] = NULL;
8393                 }
8394         }
8395         if (dt->jump_actn) {
8396                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8397                 dt->jump_actn = NULL;
8398         }
8399 }
8400
8401 /**
8402  * Destroy policer rules.
8403  *
8404  * @param[in] dev
8405  *   Pointer to Ethernet device.
8406  * @param[in] fm
8407  *   Pointer to flow meter structure.
8408  * @param[in] attr
8409  *   Pointer to flow attributes.
8410  *
8411  * @return
8412  *   Always 0.
8413  */
8414 static int
8415 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8416                               const struct mlx5_flow_meter *fm,
8417                               const struct rte_flow_attr *attr)
8418 {
8419         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8420
8421         if (!mtb)
8422                 return 0;
8423         if (attr->egress)
8424                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8425         if (attr->ingress)
8426                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8427         if (attr->transfer)
8428                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8429         return 0;
8430 }
8431
8432 /**
8433  * Create specify domain meter policer rule.
8434  *
8435  * @param[in] fm
8436  *   Pointer to flow meter structure.
8437  * @param[in] mtb
8438  *   Pointer to DV meter table set.
8439  * @param[in] sfx_tb
8440  *   Pointer to suffix table.
8441  * @param[in] mtr_reg_c
8442  *   Color match REG_C.
8443  *
8444  * @return
8445  *   0 on success, -1 otherwise.
8446  */
8447 static int
8448 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8449                                     struct mlx5_meter_domain_info *dtb,
8450                                     struct mlx5_flow_tbl_resource *sfx_tb,
8451                                     uint8_t mtr_reg_c)
8452 {
8453         struct mlx5_flow_dv_match_params matcher = {
8454                 .size = sizeof(matcher.buf),
8455         };
8456         struct mlx5_flow_dv_match_params value = {
8457                 .size = sizeof(value.buf),
8458         };
8459         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8460         void *actions[METER_ACTIONS];
8461         int i;
8462
8463         /* Create jump action. */
8464         if (!sfx_tb)
8465                 return -1;
8466         if (!dtb->jump_actn)
8467                 dtb->jump_actn =
8468                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8469                                                         (sfx_tb->obj);
8470         if (!dtb->jump_actn) {
8471                 DRV_LOG(ERR, "Failed to create policer jump action.");
8472                 goto error;
8473         }
8474         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8475                 int j = 0;
8476
8477                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8478                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8479                 if (mtb->count_actns[i])
8480                         actions[j++] = mtb->count_actns[i];
8481                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8482                         actions[j++] = mtb->drop_actn;
8483                 else
8484                         actions[j++] = dtb->jump_actn;
8485                 dtb->policer_rules[i] =
8486                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8487                                                  (void *)&value,
8488                                                   j, actions);
8489                 if (!dtb->policer_rules[i]) {
8490                         DRV_LOG(ERR, "Failed to create policer rule.");
8491                         goto error;
8492                 }
8493         }
8494         return 0;
8495 error:
8496         rte_errno = errno;
8497         return -1;
8498 }
8499
8500 /**
8501  * Create policer rules.
8502  *
8503  * @param[in] dev
8504  *   Pointer to Ethernet device.
8505  * @param[in] fm
8506  *   Pointer to flow meter structure.
8507  * @param[in] attr
8508  *   Pointer to flow attributes.
8509  *
8510  * @return
8511  *   0 on success, -1 otherwise.
8512  */
8513 static int
8514 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8515                              struct mlx5_flow_meter *fm,
8516                              const struct rte_flow_attr *attr)
8517 {
8518         struct mlx5_priv *priv = dev->data->dev_private;
8519         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8520         int ret;
8521
8522         if (attr->egress) {
8523                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8524                                                 priv->sh->tx_mtr_sfx_tbl,
8525                                                 priv->mtr_color_reg);
8526                 if (ret) {
8527                         DRV_LOG(ERR, "Failed to create egress policer.");
8528                         goto error;
8529                 }
8530         }
8531         if (attr->ingress) {
8532                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8533                                                 priv->sh->rx_mtr_sfx_tbl,
8534                                                 priv->mtr_color_reg);
8535                 if (ret) {
8536                         DRV_LOG(ERR, "Failed to create ingress policer.");
8537                         goto error;
8538                 }
8539         }
8540         if (attr->transfer) {
8541                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8542                                                 priv->sh->fdb_mtr_sfx_tbl,
8543                                                 priv->mtr_color_reg);
8544                 if (ret) {
8545                         DRV_LOG(ERR, "Failed to create transfer policer.");
8546                         goto error;
8547                 }
8548         }
8549         return 0;
8550 error:
8551         flow_dv_destroy_policer_rules(dev, fm, attr);
8552         return -1;
8553 }
8554
8555 /**
8556  * Query a devx counter.
8557  *
8558  * @param[in] dev
8559  *   Pointer to the Ethernet device structure.
8560  * @param[in] cnt
8561  *   Pointer to the flow counter.
8562  * @param[in] clear
8563  *   Set to clear the counter statistics.
8564  * @param[out] pkts
8565  *   The statistics value of packets.
8566  * @param[out] bytes
8567  *   The statistics value of bytes.
8568  *
8569  * @return
8570  *   0 on success, otherwise return -1.
8571  */
8572 static int
8573 flow_dv_counter_query(struct rte_eth_dev *dev,
8574                       struct mlx5_flow_counter *cnt, bool clear,
8575                       uint64_t *pkts, uint64_t *bytes)
8576 {
8577         struct mlx5_priv *priv = dev->data->dev_private;
8578         uint64_t inn_pkts, inn_bytes;
8579         int ret;
8580
8581         if (!priv->config.devx)
8582                 return -1;
8583         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8584         if (ret)
8585                 return -1;
8586         *pkts = inn_pkts - cnt->hits;
8587         *bytes = inn_bytes - cnt->bytes;
8588         if (clear) {
8589                 cnt->hits = inn_pkts;
8590                 cnt->bytes = inn_bytes;
8591         }
8592         return 0;
8593 }
8594
8595 /*
8596  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8597  */
8598 static int
8599 flow_dv_translate(struct rte_eth_dev *dev,
8600                   struct mlx5_flow *dev_flow,
8601                   const struct rte_flow_attr *attr,
8602                   const struct rte_flow_item items[],
8603                   const struct rte_flow_action actions[],
8604                   struct rte_flow_error *error)
8605 {
8606         int ret;
8607
8608         flow_dv_shared_lock(dev);
8609         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8610         flow_dv_shared_unlock(dev);
8611         return ret;
8612 }
8613
8614 /*
8615  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8616  */
8617 static int
8618 flow_dv_apply(struct rte_eth_dev *dev,
8619               struct rte_flow *flow,
8620               struct rte_flow_error *error)
8621 {
8622         int ret;
8623
8624         flow_dv_shared_lock(dev);
8625         ret = __flow_dv_apply(dev, flow, error);
8626         flow_dv_shared_unlock(dev);
8627         return ret;
8628 }
8629
8630 /*
8631  * Mutex-protected thunk to lock-free __flow_dv_remove().
8632  */
8633 static void
8634 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8635 {
8636         flow_dv_shared_lock(dev);
8637         __flow_dv_remove(dev, flow);
8638         flow_dv_shared_unlock(dev);
8639 }
8640
8641 /*
8642  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8643  */
8644 static void
8645 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8646 {
8647         flow_dv_shared_lock(dev);
8648         __flow_dv_destroy(dev, flow);
8649         flow_dv_shared_unlock(dev);
8650 }
8651
8652 /*
8653  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8654  */
8655 static struct mlx5_flow_counter *
8656 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8657 {
8658         struct mlx5_flow_counter *cnt;
8659
8660         flow_dv_shared_lock(dev);
8661         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8662         flow_dv_shared_unlock(dev);
8663         return cnt;
8664 }
8665
8666 /*
8667  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8668  */
8669 static void
8670 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8671 {
8672         flow_dv_shared_lock(dev);
8673         flow_dv_counter_release(dev, cnt);
8674         flow_dv_shared_unlock(dev);
8675 }
8676
8677 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8678         .validate = flow_dv_validate,
8679         .prepare = flow_dv_prepare,
8680         .translate = flow_dv_translate,
8681         .apply = flow_dv_apply,
8682         .remove = flow_dv_remove,
8683         .destroy = flow_dv_destroy,
8684         .query = flow_dv_query,
8685         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8686         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8687         .create_policer_rules = flow_dv_create_policer_rules,
8688         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8689         .counter_alloc = flow_dv_counter_allocate,
8690         .counter_free = flow_dv_counter_free,
8691         .counter_query = flow_dv_counter_query,
8692 };
8693
8694 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */