1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
11 #include <rte_common.h>
12 #include <rte_ether.h>
13 #include <ethdev_driver.h>
15 #include <rte_flow_driver.h>
16 #include <rte_malloc.h>
17 #include <rte_cycles.h>
18 #include <rte_bus_pci.h>
21 #include <rte_vxlan.h>
23 #include <rte_eal_paging.h>
26 #include <rte_mtr_driver.h>
27 #include <rte_tailq.h>
29 #include <mlx5_glue.h>
30 #include <mlx5_devx_cmds.h>
32 #include <mlx5_malloc.h>
34 #include "mlx5_defs.h"
36 #include "mlx5_common_os.h"
37 #include "mlx5_flow.h"
38 #include "mlx5_flow_os.h"
41 #include "rte_pmd_mlx5.h"
43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
49 #ifndef HAVE_MLX5DV_DR_ESWITCH
50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
55 #ifndef HAVE_MLX5DV_DR
56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
59 /* VLAN header definitions */
60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
80 struct mlx5_flow_tbl_resource *tbl);
83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
84 uint32_t encap_decap_idx);
87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
99 struct mlx5_priv *priv = dev->data->dev_private;
101 if (priv->pci_dev == NULL)
103 switch (priv->pci_dev->id.device_id) {
104 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
105 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
106 case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
107 return (int16_t)0xfffe;
114 * Initialize flow attributes structure according to flow items' types.
116 * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
117 * mode. For tunnel mode, the items to be modified are the outermost ones.
120 * Pointer to item specification.
122 * Pointer to flow attributes structure.
123 * @param[in] dev_flow
124 * Pointer to the sub flow.
125 * @param[in] tunnel_decap
126 * Whether action is after tunnel decapsulation.
129 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
130 struct mlx5_flow *dev_flow, bool tunnel_decap)
132 uint64_t layers = dev_flow->handle->layers;
135 * If layers is already initialized, it means this dev_flow is the
136 * suffix flow, the layers flags is set by the prefix flow. Need to
137 * use the layer flags from prefix flow as the suffix flow may not
138 * have the user defined items as the flow is split.
141 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
143 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
145 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
147 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
152 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
153 uint8_t next_protocol = 0xff;
154 switch (item->type) {
155 case RTE_FLOW_ITEM_TYPE_GRE:
156 case RTE_FLOW_ITEM_TYPE_NVGRE:
157 case RTE_FLOW_ITEM_TYPE_VXLAN:
158 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
159 case RTE_FLOW_ITEM_TYPE_GENEVE:
160 case RTE_FLOW_ITEM_TYPE_MPLS:
164 case RTE_FLOW_ITEM_TYPE_IPV4:
167 if (item->mask != NULL &&
168 ((const struct rte_flow_item_ipv4 *)
169 item->mask)->hdr.next_proto_id)
171 ((const struct rte_flow_item_ipv4 *)
172 (item->spec))->hdr.next_proto_id &
173 ((const struct rte_flow_item_ipv4 *)
174 (item->mask))->hdr.next_proto_id;
175 if ((next_protocol == IPPROTO_IPIP ||
176 next_protocol == IPPROTO_IPV6) && tunnel_decap)
179 case RTE_FLOW_ITEM_TYPE_IPV6:
182 if (item->mask != NULL &&
183 ((const struct rte_flow_item_ipv6 *)
184 item->mask)->hdr.proto)
186 ((const struct rte_flow_item_ipv6 *)
187 (item->spec))->hdr.proto &
188 ((const struct rte_flow_item_ipv6 *)
189 (item->mask))->hdr.proto;
190 if ((next_protocol == IPPROTO_IPIP ||
191 next_protocol == IPPROTO_IPV6) && tunnel_decap)
194 case RTE_FLOW_ITEM_TYPE_UDP:
198 case RTE_FLOW_ITEM_TYPE_TCP:
210 * Convert rte_mtr_color to mlx5 color.
219 rte_col_2_mlx5_col(enum rte_color rcol)
222 case RTE_COLOR_GREEN:
223 return MLX5_FLOW_COLOR_GREEN;
224 case RTE_COLOR_YELLOW:
225 return MLX5_FLOW_COLOR_YELLOW;
227 return MLX5_FLOW_COLOR_RED;
231 return MLX5_FLOW_COLOR_UNDEFINED;
234 struct field_modify_info {
235 uint32_t size; /* Size of field in protocol header, in bytes. */
236 uint32_t offset; /* Offset of field in protocol header, in bytes. */
237 enum mlx5_modification_field id;
240 struct field_modify_info modify_eth[] = {
241 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
242 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
243 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
244 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
248 struct field_modify_info modify_vlan_out_first_vid[] = {
249 /* Size in bits !!! */
250 {12, 0, MLX5_MODI_OUT_FIRST_VID},
254 struct field_modify_info modify_ipv4[] = {
255 {1, 1, MLX5_MODI_OUT_IP_DSCP},
256 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
257 {4, 12, MLX5_MODI_OUT_SIPV4},
258 {4, 16, MLX5_MODI_OUT_DIPV4},
262 struct field_modify_info modify_ipv6[] = {
263 {1, 0, MLX5_MODI_OUT_IP_DSCP},
264 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
265 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
266 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
267 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
268 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
269 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
270 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
271 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
272 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
276 struct field_modify_info modify_udp[] = {
277 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
278 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
282 struct field_modify_info modify_tcp[] = {
283 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
284 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
285 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
286 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
290 static const struct rte_flow_item *
291 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
293 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
294 switch (item->type) {
297 case RTE_FLOW_ITEM_TYPE_VXLAN:
298 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
299 case RTE_FLOW_ITEM_TYPE_GRE:
300 case RTE_FLOW_ITEM_TYPE_MPLS:
301 case RTE_FLOW_ITEM_TYPE_NVGRE:
302 case RTE_FLOW_ITEM_TYPE_GENEVE:
304 case RTE_FLOW_ITEM_TYPE_IPV4:
305 case RTE_FLOW_ITEM_TYPE_IPV6:
306 if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
307 item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
316 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
317 uint8_t next_protocol, uint64_t *item_flags,
320 MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
321 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
322 if (next_protocol == IPPROTO_IPIP) {
323 *item_flags |= MLX5_FLOW_LAYER_IPIP;
326 if (next_protocol == IPPROTO_IPV6) {
327 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
332 static inline struct mlx5_hlist *
333 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
334 const char *name, uint32_t size, bool direct_key,
335 bool lcores_share, void *ctx,
336 mlx5_list_create_cb cb_create,
337 mlx5_list_match_cb cb_match,
338 mlx5_list_remove_cb cb_remove,
339 mlx5_list_clone_cb cb_clone,
340 mlx5_list_clone_free_cb cb_clone_free)
342 struct mlx5_hlist *hl;
343 struct mlx5_hlist *expected = NULL;
344 char s[MLX5_NAME_SIZE];
346 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
349 snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
350 hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
351 ctx, cb_create, cb_match, cb_remove, cb_clone,
354 DRV_LOG(ERR, "%s hash creation failed", name);
358 if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
361 mlx5_hlist_destroy(hl);
362 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
367 /* Update VLAN's VID/PCP based on input rte_flow_action.
370 * Pointer to struct rte_flow_action.
372 * Pointer to struct rte_vlan_hdr.
375 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
376 struct rte_vlan_hdr *vlan)
379 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
381 ((const struct rte_flow_action_of_set_vlan_pcp *)
382 action->conf)->vlan_pcp;
383 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
384 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
385 vlan->vlan_tci |= vlan_tci;
386 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
387 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
388 vlan->vlan_tci |= rte_be_to_cpu_16
389 (((const struct rte_flow_action_of_set_vlan_vid *)
390 action->conf)->vlan_vid);
395 * Fetch 1, 2, 3 or 4 byte field from the byte array
396 * and return as unsigned integer in host-endian format.
399 * Pointer to data array.
401 * Size of field to extract.
404 * converted field in host endian format.
406 static inline uint32_t
407 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
416 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
419 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
420 ret = (ret << 8) | *(data + sizeof(uint16_t));
423 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
434 * Convert modify-header action to DV specification.
436 * Data length of each action is determined by provided field description
437 * and the item mask. Data bit offset and width of each action is determined
438 * by provided item mask.
441 * Pointer to item specification.
443 * Pointer to field modification information.
444 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
445 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
446 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
448 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
449 * Negative offset value sets the same offset as source offset.
450 * size field is ignored, value is taken from source field.
451 * @param[in,out] resource
452 * Pointer to the modify-header resource.
454 * Type of modification.
456 * Pointer to the error structure.
459 * 0 on success, a negative errno value otherwise and rte_errno is set.
462 flow_dv_convert_modify_action(struct rte_flow_item *item,
463 struct field_modify_info *field,
464 struct field_modify_info *dcopy,
465 struct mlx5_flow_dv_modify_hdr_resource *resource,
466 uint32_t type, struct rte_flow_error *error)
468 uint32_t i = resource->actions_num;
469 struct mlx5_modification_cmd *actions = resource->actions;
470 uint32_t carry_b = 0;
473 * The item and mask are provided in big-endian format.
474 * The fields should be presented as in big-endian format either.
475 * Mask must be always present, it defines the actual field width.
477 MLX5_ASSERT(item->mask);
478 MLX5_ASSERT(field->size);
484 bool next_field = true;
485 bool next_dcopy = true;
487 if (i >= MLX5_MAX_MODIFY_NUM)
488 return rte_flow_error_set(error, EINVAL,
489 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
490 "too many items to modify");
491 /* Fetch variable byte size mask from the array. */
492 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
493 field->offset, field->size);
498 /* Deduce actual data width in bits from mask value. */
499 off_b = rte_bsf32(mask) + carry_b;
500 size_b = sizeof(uint32_t) * CHAR_BIT -
501 off_b - __builtin_clz(mask);
503 actions[i] = (struct mlx5_modification_cmd) {
507 .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
510 if (type == MLX5_MODIFICATION_TYPE_COPY) {
512 actions[i].dst_field = dcopy->id;
513 actions[i].dst_offset =
514 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
515 /* Convert entire record to big-endian format. */
516 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
518 * Destination field overflow. Copy leftovers of
519 * a source field to the next destination field.
522 if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
525 dcopy->size * CHAR_BIT - dcopy->offset;
526 carry_b = actions[i].length;
530 * Not enough bits in a source filed to fill a
531 * destination field. Switch to the next source.
533 if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
534 (size_b == field->size * CHAR_BIT - off_b)) {
536 field->size * CHAR_BIT - off_b;
537 dcopy->offset += actions[i].length;
543 MLX5_ASSERT(item->spec);
544 data = flow_dv_fetch_field((const uint8_t *)item->spec +
545 field->offset, field->size);
546 /* Shift out the trailing masked bits from data. */
547 data = (data & mask) >> off_b;
548 actions[i].data1 = rte_cpu_to_be_32(data);
550 /* Convert entire record to expected big-endian format. */
551 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
555 } while (field->size);
556 if (resource->actions_num == i)
557 return rte_flow_error_set(error, EINVAL,
558 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
559 "invalid modification flow item");
560 resource->actions_num = i;
565 * Convert modify-header set IPv4 address action to DV specification.
567 * @param[in,out] resource
568 * Pointer to the modify-header resource.
570 * Pointer to action specification.
572 * Pointer to the error structure.
575 * 0 on success, a negative errno value otherwise and rte_errno is set.
578 flow_dv_convert_action_modify_ipv4
579 (struct mlx5_flow_dv_modify_hdr_resource *resource,
580 const struct rte_flow_action *action,
581 struct rte_flow_error *error)
583 const struct rte_flow_action_set_ipv4 *conf =
584 (const struct rte_flow_action_set_ipv4 *)(action->conf);
585 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
586 struct rte_flow_item_ipv4 ipv4;
587 struct rte_flow_item_ipv4 ipv4_mask;
589 memset(&ipv4, 0, sizeof(ipv4));
590 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
591 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
592 ipv4.hdr.src_addr = conf->ipv4_addr;
593 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
595 ipv4.hdr.dst_addr = conf->ipv4_addr;
596 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
599 item.mask = &ipv4_mask;
600 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
601 MLX5_MODIFICATION_TYPE_SET, error);
605 * Convert modify-header set IPv6 address action to DV specification.
607 * @param[in,out] resource
608 * Pointer to the modify-header resource.
610 * Pointer to action specification.
612 * Pointer to the error structure.
615 * 0 on success, a negative errno value otherwise and rte_errno is set.
618 flow_dv_convert_action_modify_ipv6
619 (struct mlx5_flow_dv_modify_hdr_resource *resource,
620 const struct rte_flow_action *action,
621 struct rte_flow_error *error)
623 const struct rte_flow_action_set_ipv6 *conf =
624 (const struct rte_flow_action_set_ipv6 *)(action->conf);
625 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
626 struct rte_flow_item_ipv6 ipv6;
627 struct rte_flow_item_ipv6 ipv6_mask;
629 memset(&ipv6, 0, sizeof(ipv6));
630 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
631 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
632 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
633 sizeof(ipv6.hdr.src_addr));
634 memcpy(&ipv6_mask.hdr.src_addr,
635 &rte_flow_item_ipv6_mask.hdr.src_addr,
636 sizeof(ipv6.hdr.src_addr));
638 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
639 sizeof(ipv6.hdr.dst_addr));
640 memcpy(&ipv6_mask.hdr.dst_addr,
641 &rte_flow_item_ipv6_mask.hdr.dst_addr,
642 sizeof(ipv6.hdr.dst_addr));
645 item.mask = &ipv6_mask;
646 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
647 MLX5_MODIFICATION_TYPE_SET, error);
651 * Convert modify-header set MAC address action to DV specification.
653 * @param[in,out] resource
654 * Pointer to the modify-header resource.
656 * Pointer to action specification.
658 * Pointer to the error structure.
661 * 0 on success, a negative errno value otherwise and rte_errno is set.
664 flow_dv_convert_action_modify_mac
665 (struct mlx5_flow_dv_modify_hdr_resource *resource,
666 const struct rte_flow_action *action,
667 struct rte_flow_error *error)
669 const struct rte_flow_action_set_mac *conf =
670 (const struct rte_flow_action_set_mac *)(action->conf);
671 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
672 struct rte_flow_item_eth eth;
673 struct rte_flow_item_eth eth_mask;
675 memset(ð, 0, sizeof(eth));
676 memset(ð_mask, 0, sizeof(eth_mask));
677 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
678 memcpy(ð.src.addr_bytes, &conf->mac_addr,
679 sizeof(eth.src.addr_bytes));
680 memcpy(ð_mask.src.addr_bytes,
681 &rte_flow_item_eth_mask.src.addr_bytes,
682 sizeof(eth_mask.src.addr_bytes));
684 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
685 sizeof(eth.dst.addr_bytes));
686 memcpy(ð_mask.dst.addr_bytes,
687 &rte_flow_item_eth_mask.dst.addr_bytes,
688 sizeof(eth_mask.dst.addr_bytes));
691 item.mask = ð_mask;
692 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
693 MLX5_MODIFICATION_TYPE_SET, error);
697 * Convert modify-header set VLAN VID action to DV specification.
699 * @param[in,out] resource
700 * Pointer to the modify-header resource.
702 * Pointer to action specification.
704 * Pointer to the error structure.
707 * 0 on success, a negative errno value otherwise and rte_errno is set.
710 flow_dv_convert_action_modify_vlan_vid
711 (struct mlx5_flow_dv_modify_hdr_resource *resource,
712 const struct rte_flow_action *action,
713 struct rte_flow_error *error)
715 const struct rte_flow_action_of_set_vlan_vid *conf =
716 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
717 int i = resource->actions_num;
718 struct mlx5_modification_cmd *actions = resource->actions;
719 struct field_modify_info *field = modify_vlan_out_first_vid;
721 if (i >= MLX5_MAX_MODIFY_NUM)
722 return rte_flow_error_set(error, EINVAL,
723 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
724 "too many items to modify");
725 actions[i] = (struct mlx5_modification_cmd) {
726 .action_type = MLX5_MODIFICATION_TYPE_SET,
728 .length = field->size,
729 .offset = field->offset,
731 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
732 actions[i].data1 = conf->vlan_vid;
733 actions[i].data1 = actions[i].data1 << 16;
734 resource->actions_num = ++i;
739 * Convert modify-header set TP action to DV specification.
741 * @param[in,out] resource
742 * Pointer to the modify-header resource.
744 * Pointer to action specification.
746 * Pointer to rte_flow_item objects list.
748 * Pointer to flow attributes structure.
749 * @param[in] dev_flow
750 * Pointer to the sub flow.
751 * @param[in] tunnel_decap
752 * Whether action is after tunnel decapsulation.
754 * Pointer to the error structure.
757 * 0 on success, a negative errno value otherwise and rte_errno is set.
760 flow_dv_convert_action_modify_tp
761 (struct mlx5_flow_dv_modify_hdr_resource *resource,
762 const struct rte_flow_action *action,
763 const struct rte_flow_item *items,
764 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
765 bool tunnel_decap, struct rte_flow_error *error)
767 const struct rte_flow_action_set_tp *conf =
768 (const struct rte_flow_action_set_tp *)(action->conf);
769 struct rte_flow_item item;
770 struct rte_flow_item_udp udp;
771 struct rte_flow_item_udp udp_mask;
772 struct rte_flow_item_tcp tcp;
773 struct rte_flow_item_tcp tcp_mask;
774 struct field_modify_info *field;
777 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
779 memset(&udp, 0, sizeof(udp));
780 memset(&udp_mask, 0, sizeof(udp_mask));
781 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
782 udp.hdr.src_port = conf->port;
783 udp_mask.hdr.src_port =
784 rte_flow_item_udp_mask.hdr.src_port;
786 udp.hdr.dst_port = conf->port;
787 udp_mask.hdr.dst_port =
788 rte_flow_item_udp_mask.hdr.dst_port;
790 item.type = RTE_FLOW_ITEM_TYPE_UDP;
792 item.mask = &udp_mask;
795 MLX5_ASSERT(attr->tcp);
796 memset(&tcp, 0, sizeof(tcp));
797 memset(&tcp_mask, 0, sizeof(tcp_mask));
798 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
799 tcp.hdr.src_port = conf->port;
800 tcp_mask.hdr.src_port =
801 rte_flow_item_tcp_mask.hdr.src_port;
803 tcp.hdr.dst_port = conf->port;
804 tcp_mask.hdr.dst_port =
805 rte_flow_item_tcp_mask.hdr.dst_port;
807 item.type = RTE_FLOW_ITEM_TYPE_TCP;
809 item.mask = &tcp_mask;
812 return flow_dv_convert_modify_action(&item, field, NULL, resource,
813 MLX5_MODIFICATION_TYPE_SET, error);
817 * Convert modify-header set TTL action to DV specification.
819 * @param[in,out] resource
820 * Pointer to the modify-header resource.
822 * Pointer to action specification.
824 * Pointer to rte_flow_item objects list.
826 * Pointer to flow attributes structure.
827 * @param[in] dev_flow
828 * Pointer to the sub flow.
829 * @param[in] tunnel_decap
830 * Whether action is after tunnel decapsulation.
832 * Pointer to the error structure.
835 * 0 on success, a negative errno value otherwise and rte_errno is set.
838 flow_dv_convert_action_modify_ttl
839 (struct mlx5_flow_dv_modify_hdr_resource *resource,
840 const struct rte_flow_action *action,
841 const struct rte_flow_item *items,
842 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
843 bool tunnel_decap, struct rte_flow_error *error)
845 const struct rte_flow_action_set_ttl *conf =
846 (const struct rte_flow_action_set_ttl *)(action->conf);
847 struct rte_flow_item item;
848 struct rte_flow_item_ipv4 ipv4;
849 struct rte_flow_item_ipv4 ipv4_mask;
850 struct rte_flow_item_ipv6 ipv6;
851 struct rte_flow_item_ipv6 ipv6_mask;
852 struct field_modify_info *field;
855 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
857 memset(&ipv4, 0, sizeof(ipv4));
858 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
859 ipv4.hdr.time_to_live = conf->ttl_value;
860 ipv4_mask.hdr.time_to_live = 0xFF;
861 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
863 item.mask = &ipv4_mask;
866 MLX5_ASSERT(attr->ipv6);
867 memset(&ipv6, 0, sizeof(ipv6));
868 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
869 ipv6.hdr.hop_limits = conf->ttl_value;
870 ipv6_mask.hdr.hop_limits = 0xFF;
871 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
873 item.mask = &ipv6_mask;
876 return flow_dv_convert_modify_action(&item, field, NULL, resource,
877 MLX5_MODIFICATION_TYPE_SET, error);
881 * Convert modify-header decrement TTL action to DV specification.
883 * @param[in,out] resource
884 * Pointer to the modify-header resource.
886 * Pointer to action specification.
888 * Pointer to rte_flow_item objects list.
890 * Pointer to flow attributes structure.
891 * @param[in] dev_flow
892 * Pointer to the sub flow.
893 * @param[in] tunnel_decap
894 * Whether action is after tunnel decapsulation.
896 * Pointer to the error structure.
899 * 0 on success, a negative errno value otherwise and rte_errno is set.
902 flow_dv_convert_action_modify_dec_ttl
903 (struct mlx5_flow_dv_modify_hdr_resource *resource,
904 const struct rte_flow_item *items,
905 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
906 bool tunnel_decap, struct rte_flow_error *error)
908 struct rte_flow_item item;
909 struct rte_flow_item_ipv4 ipv4;
910 struct rte_flow_item_ipv4 ipv4_mask;
911 struct rte_flow_item_ipv6 ipv6;
912 struct rte_flow_item_ipv6 ipv6_mask;
913 struct field_modify_info *field;
916 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
918 memset(&ipv4, 0, sizeof(ipv4));
919 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
920 ipv4.hdr.time_to_live = 0xFF;
921 ipv4_mask.hdr.time_to_live = 0xFF;
922 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
924 item.mask = &ipv4_mask;
927 MLX5_ASSERT(attr->ipv6);
928 memset(&ipv6, 0, sizeof(ipv6));
929 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
930 ipv6.hdr.hop_limits = 0xFF;
931 ipv6_mask.hdr.hop_limits = 0xFF;
932 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
934 item.mask = &ipv6_mask;
937 return flow_dv_convert_modify_action(&item, field, NULL, resource,
938 MLX5_MODIFICATION_TYPE_ADD, error);
942 * Convert modify-header increment/decrement TCP Sequence number
943 * to DV specification.
945 * @param[in,out] resource
946 * Pointer to the modify-header resource.
948 * Pointer to action specification.
950 * Pointer to the error structure.
953 * 0 on success, a negative errno value otherwise and rte_errno is set.
956 flow_dv_convert_action_modify_tcp_seq
957 (struct mlx5_flow_dv_modify_hdr_resource *resource,
958 const struct rte_flow_action *action,
959 struct rte_flow_error *error)
961 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
962 uint64_t value = rte_be_to_cpu_32(*conf);
963 struct rte_flow_item item;
964 struct rte_flow_item_tcp tcp;
965 struct rte_flow_item_tcp tcp_mask;
967 memset(&tcp, 0, sizeof(tcp));
968 memset(&tcp_mask, 0, sizeof(tcp_mask));
969 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
971 * The HW has no decrement operation, only increment operation.
972 * To simulate decrement X from Y using increment operation
973 * we need to add UINT32_MAX X times to Y.
974 * Each adding of UINT32_MAX decrements Y by 1.
977 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
978 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
979 item.type = RTE_FLOW_ITEM_TYPE_TCP;
981 item.mask = &tcp_mask;
982 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
983 MLX5_MODIFICATION_TYPE_ADD, error);
987 * Convert modify-header increment/decrement TCP Acknowledgment number
988 * to DV specification.
990 * @param[in,out] resource
991 * Pointer to the modify-header resource.
993 * Pointer to action specification.
995 * Pointer to the error structure.
998 * 0 on success, a negative errno value otherwise and rte_errno is set.
1001 flow_dv_convert_action_modify_tcp_ack
1002 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1003 const struct rte_flow_action *action,
1004 struct rte_flow_error *error)
1006 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
1007 uint64_t value = rte_be_to_cpu_32(*conf);
1008 struct rte_flow_item item;
1009 struct rte_flow_item_tcp tcp;
1010 struct rte_flow_item_tcp tcp_mask;
1012 memset(&tcp, 0, sizeof(tcp));
1013 memset(&tcp_mask, 0, sizeof(tcp_mask));
1014 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
1016 * The HW has no decrement operation, only increment operation.
1017 * To simulate decrement X from Y using increment operation
1018 * we need to add UINT32_MAX X times to Y.
1019 * Each adding of UINT32_MAX decrements Y by 1.
1021 value *= UINT32_MAX;
1022 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1023 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1024 item.type = RTE_FLOW_ITEM_TYPE_TCP;
1026 item.mask = &tcp_mask;
1027 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1028 MLX5_MODIFICATION_TYPE_ADD, error);
1031 static enum mlx5_modification_field reg_to_field[] = {
1032 [REG_NON] = MLX5_MODI_OUT_NONE,
1033 [REG_A] = MLX5_MODI_META_DATA_REG_A,
1034 [REG_B] = MLX5_MODI_META_DATA_REG_B,
1035 [REG_C_0] = MLX5_MODI_META_REG_C_0,
1036 [REG_C_1] = MLX5_MODI_META_REG_C_1,
1037 [REG_C_2] = MLX5_MODI_META_REG_C_2,
1038 [REG_C_3] = MLX5_MODI_META_REG_C_3,
1039 [REG_C_4] = MLX5_MODI_META_REG_C_4,
1040 [REG_C_5] = MLX5_MODI_META_REG_C_5,
1041 [REG_C_6] = MLX5_MODI_META_REG_C_6,
1042 [REG_C_7] = MLX5_MODI_META_REG_C_7,
1046 * Convert register set to DV specification.
1048 * @param[in,out] resource
1049 * Pointer to the modify-header resource.
1051 * Pointer to action specification.
1053 * Pointer to the error structure.
1056 * 0 on success, a negative errno value otherwise and rte_errno is set.
1059 flow_dv_convert_action_set_reg
1060 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1061 const struct rte_flow_action *action,
1062 struct rte_flow_error *error)
1064 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1065 struct mlx5_modification_cmd *actions = resource->actions;
1066 uint32_t i = resource->actions_num;
1068 if (i >= MLX5_MAX_MODIFY_NUM)
1069 return rte_flow_error_set(error, EINVAL,
1070 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1071 "too many items to modify");
1072 MLX5_ASSERT(conf->id != REG_NON);
1073 MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1074 actions[i] = (struct mlx5_modification_cmd) {
1075 .action_type = MLX5_MODIFICATION_TYPE_SET,
1076 .field = reg_to_field[conf->id],
1077 .offset = conf->offset,
1078 .length = conf->length,
1080 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1081 actions[i].data1 = rte_cpu_to_be_32(conf->data);
1083 resource->actions_num = i;
1088 * Convert SET_TAG action to DV specification.
1091 * Pointer to the rte_eth_dev structure.
1092 * @param[in,out] resource
1093 * Pointer to the modify-header resource.
1095 * Pointer to action specification.
1097 * Pointer to the error structure.
1100 * 0 on success, a negative errno value otherwise and rte_errno is set.
1103 flow_dv_convert_action_set_tag
1104 (struct rte_eth_dev *dev,
1105 struct mlx5_flow_dv_modify_hdr_resource *resource,
1106 const struct rte_flow_action_set_tag *conf,
1107 struct rte_flow_error *error)
1109 rte_be32_t data = rte_cpu_to_be_32(conf->data);
1110 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1111 struct rte_flow_item item = {
1115 struct field_modify_info reg_c_x[] = {
1118 enum mlx5_modification_field reg_type;
1121 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1124 MLX5_ASSERT(ret != REG_NON);
1125 MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1126 reg_type = reg_to_field[ret];
1127 MLX5_ASSERT(reg_type > 0);
1128 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1129 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1130 MLX5_MODIFICATION_TYPE_SET, error);
1134 * Convert internal COPY_REG action to DV specification.
1137 * Pointer to the rte_eth_dev structure.
1138 * @param[in,out] res
1139 * Pointer to the modify-header resource.
1141 * Pointer to action specification.
1143 * Pointer to the error structure.
1146 * 0 on success, a negative errno value otherwise and rte_errno is set.
1149 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1150 struct mlx5_flow_dv_modify_hdr_resource *res,
1151 const struct rte_flow_action *action,
1152 struct rte_flow_error *error)
1154 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1155 rte_be32_t mask = RTE_BE32(UINT32_MAX);
1156 struct rte_flow_item item = {
1160 struct field_modify_info reg_src[] = {
1161 {4, 0, reg_to_field[conf->src]},
1164 struct field_modify_info reg_dst = {
1166 .id = reg_to_field[conf->dst],
1168 /* Adjust reg_c[0] usage according to reported mask. */
1169 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1170 struct mlx5_priv *priv = dev->data->dev_private;
1171 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1173 MLX5_ASSERT(reg_c0);
1174 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1175 if (conf->dst == REG_C_0) {
1176 /* Copy to reg_c[0], within mask only. */
1177 reg_dst.offset = rte_bsf32(reg_c0);
1178 mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1181 mask = rte_cpu_to_be_32(reg_c0);
1184 return flow_dv_convert_modify_action(&item,
1185 reg_src, ®_dst, res,
1186 MLX5_MODIFICATION_TYPE_COPY,
1191 * Convert MARK action to DV specification. This routine is used
1192 * in extensive metadata only and requires metadata register to be
1193 * handled. In legacy mode hardware tag resource is engaged.
1196 * Pointer to the rte_eth_dev structure.
1198 * Pointer to MARK action specification.
1199 * @param[in,out] resource
1200 * Pointer to the modify-header resource.
1202 * Pointer to the error structure.
1205 * 0 on success, a negative errno value otherwise and rte_errno is set.
1208 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1209 const struct rte_flow_action_mark *conf,
1210 struct mlx5_flow_dv_modify_hdr_resource *resource,
1211 struct rte_flow_error *error)
1213 struct mlx5_priv *priv = dev->data->dev_private;
1214 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1215 priv->sh->dv_mark_mask);
1216 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1217 struct rte_flow_item item = {
1221 struct field_modify_info reg_c_x[] = {
1227 return rte_flow_error_set(error, EINVAL,
1228 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1229 NULL, "zero mark action mask");
1230 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1233 MLX5_ASSERT(reg > 0);
1234 if (reg == REG_C_0) {
1235 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1236 uint32_t shl_c0 = rte_bsf32(msk_c0);
1238 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1239 mask = rte_cpu_to_be_32(mask) & msk_c0;
1240 mask = rte_cpu_to_be_32(mask << shl_c0);
1242 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1243 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1244 MLX5_MODIFICATION_TYPE_SET, error);
1248 * Get metadata register index for specified steering domain.
1251 * Pointer to the rte_eth_dev structure.
1253 * Attributes of flow to determine steering domain.
1255 * Pointer to the error structure.
1258 * positive index on success, a negative errno value otherwise
1259 * and rte_errno is set.
1261 static enum modify_reg
1262 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1263 const struct rte_flow_attr *attr,
1264 struct rte_flow_error *error)
1267 mlx5_flow_get_reg_id(dev, attr->transfer ?
1271 MLX5_METADATA_RX, 0, error);
1273 return rte_flow_error_set(error,
1274 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1275 NULL, "unavailable "
1276 "metadata register");
1281 * Convert SET_META action to DV specification.
1284 * Pointer to the rte_eth_dev structure.
1285 * @param[in,out] resource
1286 * Pointer to the modify-header resource.
1288 * Attributes of flow that includes this item.
1290 * Pointer to action specification.
1292 * Pointer to the error structure.
1295 * 0 on success, a negative errno value otherwise and rte_errno is set.
1298 flow_dv_convert_action_set_meta
1299 (struct rte_eth_dev *dev,
1300 struct mlx5_flow_dv_modify_hdr_resource *resource,
1301 const struct rte_flow_attr *attr,
1302 const struct rte_flow_action_set_meta *conf,
1303 struct rte_flow_error *error)
1305 uint32_t mask = rte_cpu_to_be_32(conf->mask);
1306 uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1307 struct rte_flow_item item = {
1311 struct field_modify_info reg_c_x[] = {
1314 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1318 MLX5_ASSERT(reg != REG_NON);
1319 if (reg == REG_C_0) {
1320 struct mlx5_priv *priv = dev->data->dev_private;
1321 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1322 uint32_t shl_c0 = rte_bsf32(msk_c0);
1324 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1325 mask = rte_cpu_to_be_32(mask) & msk_c0;
1326 mask = rte_cpu_to_be_32(mask << shl_c0);
1328 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1329 /* The routine expects parameters in memory as big-endian ones. */
1330 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1331 MLX5_MODIFICATION_TYPE_SET, error);
1335 * Convert modify-header set IPv4 DSCP action to DV specification.
1337 * @param[in,out] resource
1338 * Pointer to the modify-header resource.
1340 * Pointer to action specification.
1342 * Pointer to the error structure.
1345 * 0 on success, a negative errno value otherwise and rte_errno is set.
1348 flow_dv_convert_action_modify_ipv4_dscp
1349 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1350 const struct rte_flow_action *action,
1351 struct rte_flow_error *error)
1353 const struct rte_flow_action_set_dscp *conf =
1354 (const struct rte_flow_action_set_dscp *)(action->conf);
1355 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1356 struct rte_flow_item_ipv4 ipv4;
1357 struct rte_flow_item_ipv4 ipv4_mask;
1359 memset(&ipv4, 0, sizeof(ipv4));
1360 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1361 ipv4.hdr.type_of_service = conf->dscp;
1362 ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1364 item.mask = &ipv4_mask;
1365 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1366 MLX5_MODIFICATION_TYPE_SET, error);
1370 * Convert modify-header set IPv6 DSCP action to DV specification.
1372 * @param[in,out] resource
1373 * Pointer to the modify-header resource.
1375 * Pointer to action specification.
1377 * Pointer to the error structure.
1380 * 0 on success, a negative errno value otherwise and rte_errno is set.
1383 flow_dv_convert_action_modify_ipv6_dscp
1384 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1385 const struct rte_flow_action *action,
1386 struct rte_flow_error *error)
1388 const struct rte_flow_action_set_dscp *conf =
1389 (const struct rte_flow_action_set_dscp *)(action->conf);
1390 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1391 struct rte_flow_item_ipv6 ipv6;
1392 struct rte_flow_item_ipv6 ipv6_mask;
1394 memset(&ipv6, 0, sizeof(ipv6));
1395 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1397 * Even though the DSCP bits offset of IPv6 is not byte aligned,
1398 * rdma-core only accept the DSCP bits byte aligned start from
1399 * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1400 * bits in IPv6 case as rdma-core requires byte aligned value.
1402 ipv6.hdr.vtc_flow = conf->dscp;
1403 ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1405 item.mask = &ipv6_mask;
1406 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1407 MLX5_MODIFICATION_TYPE_SET, error);
1411 mlx5_flow_item_field_width(struct mlx5_priv *priv,
1412 enum rte_flow_field_id field, int inherit)
1415 case RTE_FLOW_FIELD_START:
1417 case RTE_FLOW_FIELD_MAC_DST:
1418 case RTE_FLOW_FIELD_MAC_SRC:
1420 case RTE_FLOW_FIELD_VLAN_TYPE:
1422 case RTE_FLOW_FIELD_VLAN_ID:
1424 case RTE_FLOW_FIELD_MAC_TYPE:
1426 case RTE_FLOW_FIELD_IPV4_DSCP:
1428 case RTE_FLOW_FIELD_IPV4_TTL:
1430 case RTE_FLOW_FIELD_IPV4_SRC:
1431 case RTE_FLOW_FIELD_IPV4_DST:
1433 case RTE_FLOW_FIELD_IPV6_DSCP:
1435 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1437 case RTE_FLOW_FIELD_IPV6_SRC:
1438 case RTE_FLOW_FIELD_IPV6_DST:
1440 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1441 case RTE_FLOW_FIELD_TCP_PORT_DST:
1443 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1444 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1446 case RTE_FLOW_FIELD_TCP_FLAGS:
1448 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1449 case RTE_FLOW_FIELD_UDP_PORT_DST:
1451 case RTE_FLOW_FIELD_VXLAN_VNI:
1452 case RTE_FLOW_FIELD_GENEVE_VNI:
1454 case RTE_FLOW_FIELD_GTP_TEID:
1455 case RTE_FLOW_FIELD_TAG:
1457 case RTE_FLOW_FIELD_MARK:
1458 return __builtin_popcount(priv->sh->dv_mark_mask);
1459 case RTE_FLOW_FIELD_META:
1460 return __builtin_popcount(priv->sh->dv_meta_mask);
1461 case RTE_FLOW_FIELD_POINTER:
1462 case RTE_FLOW_FIELD_VALUE:
1463 return inherit < 0 ? 0 : inherit;
1471 mlx5_flow_field_id_to_modify_info
1472 (const struct rte_flow_action_modify_data *data,
1473 struct field_modify_info *info, uint32_t *mask,
1474 uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
1475 const struct rte_flow_attr *attr, struct rte_flow_error *error)
1477 struct mlx5_priv *priv = dev->data->dev_private;
1481 switch (data->field) {
1482 case RTE_FLOW_FIELD_START:
1483 /* not supported yet */
1486 case RTE_FLOW_FIELD_MAC_DST:
1487 off = data->offset > 16 ? data->offset - 16 : 0;
1489 if (data->offset < 16) {
1490 info[idx] = (struct field_modify_info){2, 4,
1491 MLX5_MODI_OUT_DMAC_15_0};
1493 mask[idx] = rte_cpu_to_be_16(0xffff >>
1497 mask[idx] = RTE_BE16(0xffff);
1504 info[idx] = (struct field_modify_info){4, 0,
1505 MLX5_MODI_OUT_DMAC_47_16};
1506 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1507 (32 - width)) << off);
1509 if (data->offset < 16)
1510 info[idx++] = (struct field_modify_info){2, 4,
1511 MLX5_MODI_OUT_DMAC_15_0};
1512 info[idx] = (struct field_modify_info){4, 0,
1513 MLX5_MODI_OUT_DMAC_47_16};
1516 case RTE_FLOW_FIELD_MAC_SRC:
1517 off = data->offset > 16 ? data->offset - 16 : 0;
1519 if (data->offset < 16) {
1520 info[idx] = (struct field_modify_info){2, 4,
1521 MLX5_MODI_OUT_SMAC_15_0};
1523 mask[idx] = rte_cpu_to_be_16(0xffff >>
1527 mask[idx] = RTE_BE16(0xffff);
1534 info[idx] = (struct field_modify_info){4, 0,
1535 MLX5_MODI_OUT_SMAC_47_16};
1536 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1537 (32 - width)) << off);
1539 if (data->offset < 16)
1540 info[idx++] = (struct field_modify_info){2, 4,
1541 MLX5_MODI_OUT_SMAC_15_0};
1542 info[idx] = (struct field_modify_info){4, 0,
1543 MLX5_MODI_OUT_SMAC_47_16};
1546 case RTE_FLOW_FIELD_VLAN_TYPE:
1547 /* not supported yet */
1549 case RTE_FLOW_FIELD_VLAN_ID:
1550 info[idx] = (struct field_modify_info){2, 0,
1551 MLX5_MODI_OUT_FIRST_VID};
1553 mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1555 case RTE_FLOW_FIELD_MAC_TYPE:
1556 info[idx] = (struct field_modify_info){2, 0,
1557 MLX5_MODI_OUT_ETHERTYPE};
1559 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1561 case RTE_FLOW_FIELD_IPV4_DSCP:
1562 info[idx] = (struct field_modify_info){1, 0,
1563 MLX5_MODI_OUT_IP_DSCP};
1565 mask[idx] = 0x3f >> (6 - width);
1567 case RTE_FLOW_FIELD_IPV4_TTL:
1568 info[idx] = (struct field_modify_info){1, 0,
1569 MLX5_MODI_OUT_IPV4_TTL};
1571 mask[idx] = 0xff >> (8 - width);
1573 case RTE_FLOW_FIELD_IPV4_SRC:
1574 info[idx] = (struct field_modify_info){4, 0,
1575 MLX5_MODI_OUT_SIPV4};
1577 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1580 case RTE_FLOW_FIELD_IPV4_DST:
1581 info[idx] = (struct field_modify_info){4, 0,
1582 MLX5_MODI_OUT_DIPV4};
1584 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1587 case RTE_FLOW_FIELD_IPV6_DSCP:
1588 info[idx] = (struct field_modify_info){1, 0,
1589 MLX5_MODI_OUT_IP_DSCP};
1591 mask[idx] = 0x3f >> (6 - width);
1593 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1594 info[idx] = (struct field_modify_info){1, 0,
1595 MLX5_MODI_OUT_IPV6_HOPLIMIT};
1597 mask[idx] = 0xff >> (8 - width);
1599 case RTE_FLOW_FIELD_IPV6_SRC:
1601 if (data->offset < 32) {
1602 info[idx] = (struct field_modify_info){4, 12,
1603 MLX5_MODI_OUT_SIPV6_31_0};
1606 rte_cpu_to_be_32(0xffffffff >>
1610 mask[idx] = RTE_BE32(0xffffffff);
1617 if (data->offset < 64) {
1618 info[idx] = (struct field_modify_info){4, 8,
1619 MLX5_MODI_OUT_SIPV6_63_32};
1622 rte_cpu_to_be_32(0xffffffff >>
1626 mask[idx] = RTE_BE32(0xffffffff);
1633 if (data->offset < 96) {
1634 info[idx] = (struct field_modify_info){4, 4,
1635 MLX5_MODI_OUT_SIPV6_95_64};
1638 rte_cpu_to_be_32(0xffffffff >>
1642 mask[idx] = RTE_BE32(0xffffffff);
1649 info[idx] = (struct field_modify_info){4, 0,
1650 MLX5_MODI_OUT_SIPV6_127_96};
1651 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1654 if (data->offset < 32)
1655 info[idx++] = (struct field_modify_info){4, 12,
1656 MLX5_MODI_OUT_SIPV6_31_0};
1657 if (data->offset < 64)
1658 info[idx++] = (struct field_modify_info){4, 8,
1659 MLX5_MODI_OUT_SIPV6_63_32};
1660 if (data->offset < 96)
1661 info[idx++] = (struct field_modify_info){4, 4,
1662 MLX5_MODI_OUT_SIPV6_95_64};
1663 if (data->offset < 128)
1664 info[idx++] = (struct field_modify_info){4, 0,
1665 MLX5_MODI_OUT_SIPV6_127_96};
1668 case RTE_FLOW_FIELD_IPV6_DST:
1670 if (data->offset < 32) {
1671 info[idx] = (struct field_modify_info){4, 12,
1672 MLX5_MODI_OUT_DIPV6_31_0};
1675 rte_cpu_to_be_32(0xffffffff >>
1679 mask[idx] = RTE_BE32(0xffffffff);
1686 if (data->offset < 64) {
1687 info[idx] = (struct field_modify_info){4, 8,
1688 MLX5_MODI_OUT_DIPV6_63_32};
1691 rte_cpu_to_be_32(0xffffffff >>
1695 mask[idx] = RTE_BE32(0xffffffff);
1702 if (data->offset < 96) {
1703 info[idx] = (struct field_modify_info){4, 4,
1704 MLX5_MODI_OUT_DIPV6_95_64};
1707 rte_cpu_to_be_32(0xffffffff >>
1711 mask[idx] = RTE_BE32(0xffffffff);
1718 info[idx] = (struct field_modify_info){4, 0,
1719 MLX5_MODI_OUT_DIPV6_127_96};
1720 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1723 if (data->offset < 32)
1724 info[idx++] = (struct field_modify_info){4, 12,
1725 MLX5_MODI_OUT_DIPV6_31_0};
1726 if (data->offset < 64)
1727 info[idx++] = (struct field_modify_info){4, 8,
1728 MLX5_MODI_OUT_DIPV6_63_32};
1729 if (data->offset < 96)
1730 info[idx++] = (struct field_modify_info){4, 4,
1731 MLX5_MODI_OUT_DIPV6_95_64};
1732 if (data->offset < 128)
1733 info[idx++] = (struct field_modify_info){4, 0,
1734 MLX5_MODI_OUT_DIPV6_127_96};
1737 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1738 info[idx] = (struct field_modify_info){2, 0,
1739 MLX5_MODI_OUT_TCP_SPORT};
1741 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1743 case RTE_FLOW_FIELD_TCP_PORT_DST:
1744 info[idx] = (struct field_modify_info){2, 0,
1745 MLX5_MODI_OUT_TCP_DPORT};
1747 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1749 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1750 info[idx] = (struct field_modify_info){4, 0,
1751 MLX5_MODI_OUT_TCP_SEQ_NUM};
1753 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1756 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1757 info[idx] = (struct field_modify_info){4, 0,
1758 MLX5_MODI_OUT_TCP_ACK_NUM};
1760 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1763 case RTE_FLOW_FIELD_TCP_FLAGS:
1764 info[idx] = (struct field_modify_info){2, 0,
1765 MLX5_MODI_OUT_TCP_FLAGS};
1767 mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1769 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1770 info[idx] = (struct field_modify_info){2, 0,
1771 MLX5_MODI_OUT_UDP_SPORT};
1773 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1775 case RTE_FLOW_FIELD_UDP_PORT_DST:
1776 info[idx] = (struct field_modify_info){2, 0,
1777 MLX5_MODI_OUT_UDP_DPORT};
1779 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1781 case RTE_FLOW_FIELD_VXLAN_VNI:
1782 /* not supported yet */
1784 case RTE_FLOW_FIELD_GENEVE_VNI:
1785 /* not supported yet*/
1787 case RTE_FLOW_FIELD_GTP_TEID:
1788 info[idx] = (struct field_modify_info){4, 0,
1789 MLX5_MODI_GTP_TEID};
1791 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1794 case RTE_FLOW_FIELD_TAG:
1796 int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1797 data->level, error);
1800 MLX5_ASSERT(reg != REG_NON);
1801 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1802 info[idx] = (struct field_modify_info){4, 0,
1806 rte_cpu_to_be_32(0xffffffff >>
1810 case RTE_FLOW_FIELD_MARK:
1812 uint32_t mark_mask = priv->sh->dv_mark_mask;
1813 uint32_t mark_count = __builtin_popcount(mark_mask);
1814 int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1818 MLX5_ASSERT(reg != REG_NON);
1819 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1820 info[idx] = (struct field_modify_info){4, 0,
1823 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1824 (mark_count - width)) & mark_mask);
1827 case RTE_FLOW_FIELD_META:
1829 uint32_t meta_mask = priv->sh->dv_meta_mask;
1830 uint32_t meta_count = __builtin_popcount(meta_mask);
1832 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1833 uint32_t shl_c0 = rte_bsf32(msk_c0);
1834 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1837 MLX5_ASSERT(reg != REG_NON);
1838 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1841 info[idx] = (struct field_modify_info){4, 0,
1844 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1845 (meta_count - width)) & meta_mask);
1848 case RTE_FLOW_FIELD_POINTER:
1849 case RTE_FLOW_FIELD_VALUE:
1857 * Convert modify_field action to DV specification.
1860 * Pointer to the rte_eth_dev structure.
1861 * @param[in,out] resource
1862 * Pointer to the modify-header resource.
1864 * Pointer to action specification.
1866 * Attributes of flow that includes this item.
1868 * Pointer to the error structure.
1871 * 0 on success, a negative errno value otherwise and rte_errno is set.
1874 flow_dv_convert_action_modify_field
1875 (struct rte_eth_dev *dev,
1876 struct mlx5_flow_dv_modify_hdr_resource *resource,
1877 const struct rte_flow_action *action,
1878 const struct rte_flow_attr *attr,
1879 struct rte_flow_error *error)
1881 const struct rte_flow_action_modify_field *conf =
1882 (const struct rte_flow_action_modify_field *)(action->conf);
1883 struct rte_flow_item item = {
1887 struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1889 struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1891 uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1895 if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1896 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1897 type = MLX5_MODIFICATION_TYPE_SET;
1898 /** For SET fill the destination field (field) first. */
1899 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1900 conf->width, &shift, dev,
1902 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1903 (void *)(uintptr_t)conf->src.pvalue :
1904 (void *)(uintptr_t)&conf->src.value;
1906 type = MLX5_MODIFICATION_TYPE_COPY;
1907 /** For COPY fill the destination field (dcopy) without mask. */
1908 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1909 conf->width, &shift, dev,
1911 /** Then construct the source field (field) with mask. */
1912 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1913 conf->width, &shift,
1917 return flow_dv_convert_modify_action(&item,
1918 field, dcopy, resource, type, error);
1922 * Validate MARK item.
1925 * Pointer to the rte_eth_dev structure.
1927 * Item specification.
1929 * Attributes of flow that includes this item.
1931 * Pointer to error structure.
1934 * 0 on success, a negative errno value otherwise and rte_errno is set.
1937 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1938 const struct rte_flow_item *item,
1939 const struct rte_flow_attr *attr __rte_unused,
1940 struct rte_flow_error *error)
1942 struct mlx5_priv *priv = dev->data->dev_private;
1943 struct mlx5_dev_config *config = &priv->config;
1944 const struct rte_flow_item_mark *spec = item->spec;
1945 const struct rte_flow_item_mark *mask = item->mask;
1946 const struct rte_flow_item_mark nic_mask = {
1947 .id = priv->sh->dv_mark_mask,
1951 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1952 return rte_flow_error_set(error, ENOTSUP,
1953 RTE_FLOW_ERROR_TYPE_ITEM, item,
1954 "extended metadata feature"
1956 if (!mlx5_flow_ext_mreg_supported(dev))
1957 return rte_flow_error_set(error, ENOTSUP,
1958 RTE_FLOW_ERROR_TYPE_ITEM, item,
1959 "extended metadata register"
1960 " isn't supported");
1962 return rte_flow_error_set(error, ENOTSUP,
1963 RTE_FLOW_ERROR_TYPE_ITEM, item,
1964 "extended metadata register"
1965 " isn't available");
1966 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1970 return rte_flow_error_set(error, EINVAL,
1971 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1973 "data cannot be empty");
1974 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1975 return rte_flow_error_set(error, EINVAL,
1976 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1978 "mark id exceeds the limit");
1982 return rte_flow_error_set(error, EINVAL,
1983 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1984 "mask cannot be zero");
1986 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1987 (const uint8_t *)&nic_mask,
1988 sizeof(struct rte_flow_item_mark),
1989 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1996 * Validate META item.
1999 * Pointer to the rte_eth_dev structure.
2001 * Item specification.
2003 * Attributes of flow that includes this item.
2005 * Pointer to error structure.
2008 * 0 on success, a negative errno value otherwise and rte_errno is set.
2011 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2012 const struct rte_flow_item *item,
2013 const struct rte_flow_attr *attr,
2014 struct rte_flow_error *error)
2016 struct mlx5_priv *priv = dev->data->dev_private;
2017 struct mlx5_dev_config *config = &priv->config;
2018 const struct rte_flow_item_meta *spec = item->spec;
2019 const struct rte_flow_item_meta *mask = item->mask;
2020 struct rte_flow_item_meta nic_mask = {
2027 return rte_flow_error_set(error, EINVAL,
2028 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2030 "data cannot be empty");
2031 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2032 if (!mlx5_flow_ext_mreg_supported(dev))
2033 return rte_flow_error_set(error, ENOTSUP,
2034 RTE_FLOW_ERROR_TYPE_ITEM, item,
2035 "extended metadata register"
2036 " isn't supported");
2037 reg = flow_dv_get_metadata_reg(dev, attr, error);
2041 return rte_flow_error_set(error, ENOTSUP,
2042 RTE_FLOW_ERROR_TYPE_ITEM, item,
2043 "unavalable extended metadata register");
2045 return rte_flow_error_set(error, ENOTSUP,
2046 RTE_FLOW_ERROR_TYPE_ITEM, item,
2050 nic_mask.data = priv->sh->dv_meta_mask;
2053 return rte_flow_error_set(error, ENOTSUP,
2054 RTE_FLOW_ERROR_TYPE_ITEM, item,
2055 "extended metadata feature "
2056 "should be enabled when "
2057 "meta item is requested "
2058 "with e-switch mode ");
2060 return rte_flow_error_set(error, ENOTSUP,
2061 RTE_FLOW_ERROR_TYPE_ITEM, item,
2062 "match on metadata for ingress "
2063 "is not supported in legacy "
2067 mask = &rte_flow_item_meta_mask;
2069 return rte_flow_error_set(error, EINVAL,
2070 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2071 "mask cannot be zero");
2073 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2074 (const uint8_t *)&nic_mask,
2075 sizeof(struct rte_flow_item_meta),
2076 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2081 * Validate TAG item.
2084 * Pointer to the rte_eth_dev structure.
2086 * Item specification.
2088 * Attributes of flow that includes this item.
2090 * Pointer to error structure.
2093 * 0 on success, a negative errno value otherwise and rte_errno is set.
2096 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2097 const struct rte_flow_item *item,
2098 const struct rte_flow_attr *attr __rte_unused,
2099 struct rte_flow_error *error)
2101 const struct rte_flow_item_tag *spec = item->spec;
2102 const struct rte_flow_item_tag *mask = item->mask;
2103 const struct rte_flow_item_tag nic_mask = {
2104 .data = RTE_BE32(UINT32_MAX),
2109 if (!mlx5_flow_ext_mreg_supported(dev))
2110 return rte_flow_error_set(error, ENOTSUP,
2111 RTE_FLOW_ERROR_TYPE_ITEM, item,
2112 "extensive metadata register"
2113 " isn't supported");
2115 return rte_flow_error_set(error, EINVAL,
2116 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2118 "data cannot be empty");
2120 mask = &rte_flow_item_tag_mask;
2122 return rte_flow_error_set(error, EINVAL,
2123 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2124 "mask cannot be zero");
2126 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2127 (const uint8_t *)&nic_mask,
2128 sizeof(struct rte_flow_item_tag),
2129 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2132 if (mask->index != 0xff)
2133 return rte_flow_error_set(error, EINVAL,
2134 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2135 "partial mask for tag index"
2136 " is not supported");
2137 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2140 MLX5_ASSERT(ret != REG_NON);
2145 * Validate vport item.
2148 * Pointer to the rte_eth_dev structure.
2150 * Item specification.
2152 * Attributes of flow that includes this item.
2153 * @param[in] item_flags
2154 * Bit-fields that holds the items detected until now.
2156 * Pointer to error structure.
2159 * 0 on success, a negative errno value otherwise and rte_errno is set.
2162 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2163 const struct rte_flow_item *item,
2164 const struct rte_flow_attr *attr,
2165 uint64_t item_flags,
2166 struct rte_flow_error *error)
2168 const struct rte_flow_item_port_id *spec = item->spec;
2169 const struct rte_flow_item_port_id *mask = item->mask;
2170 const struct rte_flow_item_port_id switch_mask = {
2173 struct mlx5_priv *esw_priv;
2174 struct mlx5_priv *dev_priv;
2177 if (!attr->transfer)
2178 return rte_flow_error_set(error, EINVAL,
2179 RTE_FLOW_ERROR_TYPE_ITEM,
2181 "match on port id is valid only"
2182 " when transfer flag is enabled");
2183 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2184 return rte_flow_error_set(error, ENOTSUP,
2185 RTE_FLOW_ERROR_TYPE_ITEM, item,
2186 "multiple source ports are not"
2189 mask = &switch_mask;
2190 if (mask->id != 0xffffffff)
2191 return rte_flow_error_set(error, ENOTSUP,
2192 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2194 "no support for partial mask on"
2196 ret = mlx5_flow_item_acceptable
2197 (item, (const uint8_t *)mask,
2198 (const uint8_t *)&rte_flow_item_port_id_mask,
2199 sizeof(struct rte_flow_item_port_id),
2200 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2205 if (spec->id == MLX5_PORT_ESW_MGR)
2207 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2209 return rte_flow_error_set(error, rte_errno,
2210 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2211 "failed to obtain E-Switch info for"
2213 dev_priv = mlx5_dev_to_eswitch_info(dev);
2215 return rte_flow_error_set(error, rte_errno,
2216 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2218 "failed to obtain E-Switch info");
2219 if (esw_priv->domain_id != dev_priv->domain_id)
2220 return rte_flow_error_set(error, EINVAL,
2221 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2222 "cannot match on a port from a"
2223 " different E-Switch");
2228 * Validate VLAN item.
2231 * Item specification.
2232 * @param[in] item_flags
2233 * Bit-fields that holds the items detected until now.
2235 * Ethernet device flow is being created on.
2237 * Pointer to error structure.
2240 * 0 on success, a negative errno value otherwise and rte_errno is set.
2243 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2244 uint64_t item_flags,
2245 struct rte_eth_dev *dev,
2246 struct rte_flow_error *error)
2248 const struct rte_flow_item_vlan *mask = item->mask;
2249 const struct rte_flow_item_vlan nic_mask = {
2250 .tci = RTE_BE16(UINT16_MAX),
2251 .inner_type = RTE_BE16(UINT16_MAX),
2254 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2256 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2257 MLX5_FLOW_LAYER_INNER_L4) :
2258 (MLX5_FLOW_LAYER_OUTER_L3 |
2259 MLX5_FLOW_LAYER_OUTER_L4);
2260 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2261 MLX5_FLOW_LAYER_OUTER_VLAN;
2263 if (item_flags & vlanm)
2264 return rte_flow_error_set(error, EINVAL,
2265 RTE_FLOW_ERROR_TYPE_ITEM, item,
2266 "multiple VLAN layers not supported");
2267 else if ((item_flags & l34m) != 0)
2268 return rte_flow_error_set(error, EINVAL,
2269 RTE_FLOW_ERROR_TYPE_ITEM, item,
2270 "VLAN cannot follow L3/L4 layer");
2272 mask = &rte_flow_item_vlan_mask;
2273 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2274 (const uint8_t *)&nic_mask,
2275 sizeof(struct rte_flow_item_vlan),
2276 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2279 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2280 struct mlx5_priv *priv = dev->data->dev_private;
2282 if (priv->vmwa_context) {
2284 * Non-NULL context means we have a virtual machine
2285 * and SR-IOV enabled, we have to create VLAN interface
2286 * to make hypervisor to setup E-Switch vport
2287 * context correctly. We avoid creating the multiple
2288 * VLAN interfaces, so we cannot support VLAN tag mask.
2290 return rte_flow_error_set(error, EINVAL,
2291 RTE_FLOW_ERROR_TYPE_ITEM,
2293 "VLAN tag mask is not"
2294 " supported in virtual"
2302 * GTP flags are contained in 1 byte of the format:
2303 * -------------------------------------------
2304 * | bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
2305 * |-----------------------------------------|
2306 * | value | Version | PT | Res | E | S | PN |
2307 * -------------------------------------------
2309 * Matching is supported only for GTP flags E, S, PN.
2311 #define MLX5_GTP_FLAGS_MASK 0x07
2314 * Validate GTP item.
2317 * Pointer to the rte_eth_dev structure.
2319 * Item specification.
2320 * @param[in] item_flags
2321 * Bit-fields that holds the items detected until now.
2323 * Pointer to error structure.
2326 * 0 on success, a negative errno value otherwise and rte_errno is set.
2329 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2330 const struct rte_flow_item *item,
2331 uint64_t item_flags,
2332 struct rte_flow_error *error)
2334 struct mlx5_priv *priv = dev->data->dev_private;
2335 const struct rte_flow_item_gtp *spec = item->spec;
2336 const struct rte_flow_item_gtp *mask = item->mask;
2337 const struct rte_flow_item_gtp nic_mask = {
2338 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2340 .teid = RTE_BE32(0xffffffff),
2343 if (!priv->config.hca_attr.tunnel_stateless_gtp)
2344 return rte_flow_error_set(error, ENOTSUP,
2345 RTE_FLOW_ERROR_TYPE_ITEM, item,
2346 "GTP support is not enabled");
2347 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2348 return rte_flow_error_set(error, ENOTSUP,
2349 RTE_FLOW_ERROR_TYPE_ITEM, item,
2350 "multiple tunnel layers not"
2352 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2353 return rte_flow_error_set(error, EINVAL,
2354 RTE_FLOW_ERROR_TYPE_ITEM, item,
2355 "no outer UDP layer found");
2357 mask = &rte_flow_item_gtp_mask;
2358 if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2359 return rte_flow_error_set(error, ENOTSUP,
2360 RTE_FLOW_ERROR_TYPE_ITEM, item,
2361 "Match is supported for GTP"
2363 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2364 (const uint8_t *)&nic_mask,
2365 sizeof(struct rte_flow_item_gtp),
2366 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2370 * Validate GTP PSC item.
2373 * Item specification.
2374 * @param[in] last_item
2375 * Previous validated item in the pattern items.
2376 * @param[in] gtp_item
2377 * Previous GTP item specification.
2379 * Pointer to flow attributes.
2381 * Pointer to error structure.
2384 * 0 on success, a negative errno value otherwise and rte_errno is set.
2387 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2389 const struct rte_flow_item *gtp_item,
2390 const struct rte_flow_attr *attr,
2391 struct rte_flow_error *error)
2393 const struct rte_flow_item_gtp *gtp_spec;
2394 const struct rte_flow_item_gtp *gtp_mask;
2395 const struct rte_flow_item_gtp_psc *mask;
2396 const struct rte_flow_item_gtp_psc nic_mask = {
2401 if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2402 return rte_flow_error_set
2403 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2404 "GTP PSC item must be preceded with GTP item");
2405 gtp_spec = gtp_item->spec;
2406 gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2407 /* GTP spec and E flag is requested to match zero. */
2409 (gtp_mask->v_pt_rsv_flags &
2410 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2411 return rte_flow_error_set
2412 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2413 "GTP E flag must be 1 to match GTP PSC");
2414 /* Check the flow is not created in group zero. */
2415 if (!attr->transfer && !attr->group)
2416 return rte_flow_error_set
2417 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2418 "GTP PSC is not supported for group 0");
2419 /* GTP spec is here and E flag is requested to match zero. */
2422 mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2423 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2424 (const uint8_t *)&nic_mask,
2425 sizeof(struct rte_flow_item_gtp_psc),
2426 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2430 * Validate IPV4 item.
2431 * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2432 * add specific validation of fragment_offset field,
2435 * Item specification.
2436 * @param[in] item_flags
2437 * Bit-fields that holds the items detected until now.
2439 * Pointer to error structure.
2442 * 0 on success, a negative errno value otherwise and rte_errno is set.
2445 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2446 const struct rte_flow_item *item,
2447 uint64_t item_flags, uint64_t last_item,
2448 uint16_t ether_type, struct rte_flow_error *error)
2451 struct mlx5_priv *priv = dev->data->dev_private;
2452 const struct rte_flow_item_ipv4 *spec = item->spec;
2453 const struct rte_flow_item_ipv4 *last = item->last;
2454 const struct rte_flow_item_ipv4 *mask = item->mask;
2455 rte_be16_t fragment_offset_spec = 0;
2456 rte_be16_t fragment_offset_last = 0;
2457 struct rte_flow_item_ipv4 nic_ipv4_mask = {
2459 .src_addr = RTE_BE32(0xffffffff),
2460 .dst_addr = RTE_BE32(0xffffffff),
2461 .type_of_service = 0xff,
2462 .fragment_offset = RTE_BE16(0xffff),
2463 .next_proto_id = 0xff,
2464 .time_to_live = 0xff,
2468 if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2469 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2470 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2471 priv->config.hca_attr.inner_ipv4_ihl;
2473 return rte_flow_error_set(error, ENOTSUP,
2474 RTE_FLOW_ERROR_TYPE_ITEM,
2476 "IPV4 ihl offload not supported");
2477 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2479 ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2480 ether_type, &nic_ipv4_mask,
2481 MLX5_ITEM_RANGE_ACCEPTED, error);
2485 fragment_offset_spec = spec->hdr.fragment_offset &
2486 mask->hdr.fragment_offset;
2487 if (!fragment_offset_spec)
2490 * spec and mask are valid, enforce using full mask to make sure the
2491 * complete value is used correctly.
2493 if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2494 != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2495 return rte_flow_error_set(error, EINVAL,
2496 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2497 item, "must use full mask for"
2498 " fragment_offset");
2500 * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2501 * indicating this is 1st fragment of fragmented packet.
2502 * This is not yet supported in MLX5, return appropriate error message.
2504 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2505 return rte_flow_error_set(error, ENOTSUP,
2506 RTE_FLOW_ERROR_TYPE_ITEM, item,
2507 "match on first fragment not "
2509 if (fragment_offset_spec && !last)
2510 return rte_flow_error_set(error, ENOTSUP,
2511 RTE_FLOW_ERROR_TYPE_ITEM, item,
2512 "specified value not supported");
2513 /* spec and last are valid, validate the specified range. */
2514 fragment_offset_last = last->hdr.fragment_offset &
2515 mask->hdr.fragment_offset;
2517 * Match on fragment_offset spec 0x2001 and last 0x3fff
2518 * means MF is 1 and frag-offset is > 0.
2519 * This packet is fragment 2nd and onward, excluding last.
2520 * This is not yet supported in MLX5, return appropriate
2523 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2524 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2525 return rte_flow_error_set(error, ENOTSUP,
2526 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2527 last, "match on following "
2528 "fragments not supported");
2530 * Match on fragment_offset spec 0x0001 and last 0x1fff
2531 * means MF is 0 and frag-offset is > 0.
2532 * This packet is last fragment of fragmented packet.
2533 * This is not yet supported in MLX5, return appropriate
2536 if (fragment_offset_spec == RTE_BE16(1) &&
2537 fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2538 return rte_flow_error_set(error, ENOTSUP,
2539 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2540 last, "match on last "
2541 "fragment not supported");
2543 * Match on fragment_offset spec 0x0001 and last 0x3fff
2544 * means MF and/or frag-offset is not 0.
2545 * This is a fragmented packet.
2546 * Other range values are invalid and rejected.
2548 if (!(fragment_offset_spec == RTE_BE16(1) &&
2549 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2550 return rte_flow_error_set(error, ENOTSUP,
2551 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2552 "specified range not supported");
2557 * Validate IPV6 fragment extension item.
2560 * Item specification.
2561 * @param[in] item_flags
2562 * Bit-fields that holds the items detected until now.
2564 * Pointer to error structure.
2567 * 0 on success, a negative errno value otherwise and rte_errno is set.
2570 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2571 uint64_t item_flags,
2572 struct rte_flow_error *error)
2574 const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2575 const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2576 const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2577 rte_be16_t frag_data_spec = 0;
2578 rte_be16_t frag_data_last = 0;
2579 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2580 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2581 MLX5_FLOW_LAYER_OUTER_L4;
2583 struct rte_flow_item_ipv6_frag_ext nic_mask = {
2585 .next_header = 0xff,
2586 .frag_data = RTE_BE16(0xffff),
2590 if (item_flags & l4m)
2591 return rte_flow_error_set(error, EINVAL,
2592 RTE_FLOW_ERROR_TYPE_ITEM, item,
2593 "ipv6 fragment extension item cannot "
2595 if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2596 (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2597 return rte_flow_error_set(error, EINVAL,
2598 RTE_FLOW_ERROR_TYPE_ITEM, item,
2599 "ipv6 fragment extension item must "
2600 "follow ipv6 item");
2602 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2603 if (!frag_data_spec)
2606 * spec and mask are valid, enforce using full mask to make sure the
2607 * complete value is used correctly.
2609 if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2610 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2611 return rte_flow_error_set(error, EINVAL,
2612 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2613 item, "must use full mask for"
2616 * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2617 * This is 1st fragment of fragmented packet.
2619 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2620 return rte_flow_error_set(error, ENOTSUP,
2621 RTE_FLOW_ERROR_TYPE_ITEM, item,
2622 "match on first fragment not "
2624 if (frag_data_spec && !last)
2625 return rte_flow_error_set(error, EINVAL,
2626 RTE_FLOW_ERROR_TYPE_ITEM, item,
2627 "specified value not supported");
2628 ret = mlx5_flow_item_acceptable
2629 (item, (const uint8_t *)mask,
2630 (const uint8_t *)&nic_mask,
2631 sizeof(struct rte_flow_item_ipv6_frag_ext),
2632 MLX5_ITEM_RANGE_ACCEPTED, error);
2635 /* spec and last are valid, validate the specified range. */
2636 frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2638 * Match on frag_data spec 0x0009 and last 0xfff9
2639 * means M is 1 and frag-offset is > 0.
2640 * This packet is fragment 2nd and onward, excluding last.
2641 * This is not yet supported in MLX5, return appropriate
2644 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2645 RTE_IPV6_EHDR_MF_MASK) &&
2646 frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2647 return rte_flow_error_set(error, ENOTSUP,
2648 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2649 last, "match on following "
2650 "fragments not supported");
2652 * Match on frag_data spec 0x0008 and last 0xfff8
2653 * means M is 0 and frag-offset is > 0.
2654 * This packet is last fragment of fragmented packet.
2655 * This is not yet supported in MLX5, return appropriate
2658 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2659 frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2660 return rte_flow_error_set(error, ENOTSUP,
2661 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2662 last, "match on last "
2663 "fragment not supported");
2664 /* Other range values are invalid and rejected. */
2665 return rte_flow_error_set(error, EINVAL,
2666 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2667 "specified range not supported");
2671 * Validate ASO CT item.
2674 * Pointer to the rte_eth_dev structure.
2676 * Item specification.
2677 * @param[in] item_flags
2678 * Pointer to bit-fields that holds the items detected until now.
2680 * Pointer to error structure.
2683 * 0 on success, a negative errno value otherwise and rte_errno is set.
2686 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2687 const struct rte_flow_item *item,
2688 uint64_t *item_flags,
2689 struct rte_flow_error *error)
2691 const struct rte_flow_item_conntrack *spec = item->spec;
2692 const struct rte_flow_item_conntrack *mask = item->mask;
2696 if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2697 return rte_flow_error_set(error, EINVAL,
2698 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2699 "Only one CT is supported");
2701 mask = &rte_flow_item_conntrack_mask;
2702 flags = spec->flags & mask->flags;
2703 if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2704 ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2705 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2706 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2707 return rte_flow_error_set(error, EINVAL,
2708 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2709 "Conflict status bits");
2710 /* State change also needs to be considered. */
2711 *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2716 * Validate the pop VLAN action.
2719 * Pointer to the rte_eth_dev structure.
2720 * @param[in] action_flags
2721 * Holds the actions detected until now.
2723 * Pointer to the pop vlan action.
2724 * @param[in] item_flags
2725 * The items found in this flow rule.
2727 * Pointer to flow attributes.
2729 * Pointer to error structure.
2732 * 0 on success, a negative errno value otherwise and rte_errno is set.
2735 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2736 uint64_t action_flags,
2737 const struct rte_flow_action *action,
2738 uint64_t item_flags,
2739 const struct rte_flow_attr *attr,
2740 struct rte_flow_error *error)
2742 const struct mlx5_priv *priv = dev->data->dev_private;
2743 struct mlx5_dev_ctx_shared *sh = priv->sh;
2744 bool direction_error = false;
2746 if (!priv->sh->pop_vlan_action)
2747 return rte_flow_error_set(error, ENOTSUP,
2748 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2750 "pop vlan action is not supported");
2751 /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2752 if (attr->transfer) {
2753 bool fdb_tx = priv->representor_id != UINT16_MAX;
2754 bool is_cx5 = sh->steering_format_version ==
2755 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2757 if (fdb_tx && is_cx5)
2758 direction_error = true;
2759 } else if (attr->egress) {
2760 direction_error = true;
2762 if (direction_error)
2763 return rte_flow_error_set(error, ENOTSUP,
2764 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2766 "pop vlan action not supported for egress");
2767 if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2768 return rte_flow_error_set(error, ENOTSUP,
2769 RTE_FLOW_ERROR_TYPE_ACTION, action,
2770 "no support for multiple VLAN "
2772 /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2773 if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2774 !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2775 return rte_flow_error_set(error, ENOTSUP,
2776 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2778 "cannot pop vlan after decap without "
2779 "match on inner vlan in the flow");
2780 /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2781 if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2782 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2783 return rte_flow_error_set(error, ENOTSUP,
2784 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2786 "cannot pop vlan without a "
2787 "match on (outer) vlan in the flow");
2788 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2789 return rte_flow_error_set(error, EINVAL,
2790 RTE_FLOW_ERROR_TYPE_ACTION, action,
2791 "wrong action order, port_id should "
2792 "be after pop VLAN action");
2793 if (!attr->transfer && priv->representor)
2794 return rte_flow_error_set(error, ENOTSUP,
2795 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2796 "pop vlan action for VF representor "
2797 "not supported on NIC table");
2802 * Get VLAN default info from vlan match info.
2805 * the list of item specifications.
2807 * pointer VLAN info to fill to.
2810 * 0 on success, a negative errno value otherwise and rte_errno is set.
2813 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2814 struct rte_vlan_hdr *vlan)
2816 const struct rte_flow_item_vlan nic_mask = {
2817 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2818 MLX5DV_FLOW_VLAN_VID_MASK),
2819 .inner_type = RTE_BE16(0xffff),
2824 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2825 int type = items->type;
2827 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2828 type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2831 if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2832 const struct rte_flow_item_vlan *vlan_m = items->mask;
2833 const struct rte_flow_item_vlan *vlan_v = items->spec;
2835 /* If VLAN item in pattern doesn't contain data, return here. */
2840 /* Only full match values are accepted */
2841 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2842 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2843 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2845 rte_be_to_cpu_16(vlan_v->tci &
2846 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2848 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2849 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2850 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2852 rte_be_to_cpu_16(vlan_v->tci &
2853 MLX5DV_FLOW_VLAN_VID_MASK_BE);
2855 if (vlan_m->inner_type == nic_mask.inner_type)
2856 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2857 vlan_m->inner_type);
2862 * Validate the push VLAN action.
2865 * Pointer to the rte_eth_dev structure.
2866 * @param[in] action_flags
2867 * Holds the actions detected until now.
2868 * @param[in] item_flags
2869 * The items found in this flow rule.
2871 * Pointer to the action structure.
2873 * Pointer to flow attributes
2875 * Pointer to error structure.
2878 * 0 on success, a negative errno value otherwise and rte_errno is set.
2881 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2882 uint64_t action_flags,
2883 const struct rte_flow_item_vlan *vlan_m,
2884 const struct rte_flow_action *action,
2885 const struct rte_flow_attr *attr,
2886 struct rte_flow_error *error)
2888 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2889 const struct mlx5_priv *priv = dev->data->dev_private;
2890 struct mlx5_dev_ctx_shared *sh = priv->sh;
2891 bool direction_error = false;
2893 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2894 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2895 return rte_flow_error_set(error, EINVAL,
2896 RTE_FLOW_ERROR_TYPE_ACTION, action,
2897 "invalid vlan ethertype");
2898 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2899 return rte_flow_error_set(error, EINVAL,
2900 RTE_FLOW_ERROR_TYPE_ACTION, action,
2901 "wrong action order, port_id should "
2902 "be after push VLAN");
2903 /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2904 if (attr->transfer) {
2905 bool fdb_tx = priv->representor_id != UINT16_MAX;
2906 bool is_cx5 = sh->steering_format_version ==
2907 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2909 if (!fdb_tx && is_cx5)
2910 direction_error = true;
2911 } else if (attr->ingress) {
2912 direction_error = true;
2914 if (direction_error)
2915 return rte_flow_error_set(error, ENOTSUP,
2916 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2918 "push vlan action not supported for ingress");
2919 if (!attr->transfer && priv->representor)
2920 return rte_flow_error_set(error, ENOTSUP,
2921 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2922 "push vlan action for VF representor "
2923 "not supported on NIC table");
2925 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2926 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2927 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2928 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2929 !(mlx5_flow_find_action
2930 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2931 return rte_flow_error_set(error, EINVAL,
2932 RTE_FLOW_ERROR_TYPE_ACTION, action,
2933 "not full match mask on VLAN PCP and "
2934 "there is no of_set_vlan_pcp action, "
2935 "push VLAN action cannot figure out "
2938 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2939 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2940 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2941 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2942 !(mlx5_flow_find_action
2943 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2944 return rte_flow_error_set(error, EINVAL,
2945 RTE_FLOW_ERROR_TYPE_ACTION, action,
2946 "not full match mask on VLAN VID and "
2947 "there is no of_set_vlan_vid action, "
2948 "push VLAN action cannot figure out "
2955 * Validate the set VLAN PCP.
2957 * @param[in] action_flags
2958 * Holds the actions detected until now.
2959 * @param[in] actions
2960 * Pointer to the list of actions remaining in the flow rule.
2962 * Pointer to error structure.
2965 * 0 on success, a negative errno value otherwise and rte_errno is set.
2968 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2969 const struct rte_flow_action actions[],
2970 struct rte_flow_error *error)
2972 const struct rte_flow_action *action = actions;
2973 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2975 if (conf->vlan_pcp > 7)
2976 return rte_flow_error_set(error, EINVAL,
2977 RTE_FLOW_ERROR_TYPE_ACTION, action,
2978 "VLAN PCP value is too big");
2979 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2980 return rte_flow_error_set(error, ENOTSUP,
2981 RTE_FLOW_ERROR_TYPE_ACTION, action,
2982 "set VLAN PCP action must follow "
2983 "the push VLAN action");
2984 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2985 return rte_flow_error_set(error, ENOTSUP,
2986 RTE_FLOW_ERROR_TYPE_ACTION, action,
2987 "Multiple VLAN PCP modification are "
2989 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2990 return rte_flow_error_set(error, EINVAL,
2991 RTE_FLOW_ERROR_TYPE_ACTION, action,
2992 "wrong action order, port_id should "
2993 "be after set VLAN PCP");
2998 * Validate the set VLAN VID.
3000 * @param[in] item_flags
3001 * Holds the items detected in this rule.
3002 * @param[in] action_flags
3003 * Holds the actions detected until now.
3004 * @param[in] actions
3005 * Pointer to the list of actions remaining in the flow rule.
3007 * Pointer to error structure.
3010 * 0 on success, a negative errno value otherwise and rte_errno is set.
3013 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3014 uint64_t action_flags,
3015 const struct rte_flow_action actions[],
3016 struct rte_flow_error *error)
3018 const struct rte_flow_action *action = actions;
3019 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3021 if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3022 return rte_flow_error_set(error, EINVAL,
3023 RTE_FLOW_ERROR_TYPE_ACTION, action,
3024 "VLAN VID value is too big");
3025 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3026 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3027 return rte_flow_error_set(error, ENOTSUP,
3028 RTE_FLOW_ERROR_TYPE_ACTION, action,
3029 "set VLAN VID action must follow push"
3030 " VLAN action or match on VLAN item");
3031 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3032 return rte_flow_error_set(error, ENOTSUP,
3033 RTE_FLOW_ERROR_TYPE_ACTION, action,
3034 "Multiple VLAN VID modifications are "
3036 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3037 return rte_flow_error_set(error, EINVAL,
3038 RTE_FLOW_ERROR_TYPE_ACTION, action,
3039 "wrong action order, port_id should "
3040 "be after set VLAN VID");
3045 * Validate the FLAG action.
3048 * Pointer to the rte_eth_dev structure.
3049 * @param[in] action_flags
3050 * Holds the actions detected until now.
3052 * Pointer to flow attributes
3054 * Pointer to error structure.
3057 * 0 on success, a negative errno value otherwise and rte_errno is set.
3060 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3061 uint64_t action_flags,
3062 const struct rte_flow_attr *attr,
3063 struct rte_flow_error *error)
3065 struct mlx5_priv *priv = dev->data->dev_private;
3066 struct mlx5_dev_config *config = &priv->config;
3069 /* Fall back if no extended metadata register support. */
3070 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3071 return mlx5_flow_validate_action_flag(action_flags, attr,
3073 /* Extensive metadata mode requires registers. */
3074 if (!mlx5_flow_ext_mreg_supported(dev))
3075 return rte_flow_error_set(error, ENOTSUP,
3076 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3077 "no metadata registers "
3078 "to support flag action");
3079 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3080 return rte_flow_error_set(error, ENOTSUP,
3081 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3082 "extended metadata register"
3083 " isn't available");
3084 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3087 MLX5_ASSERT(ret > 0);
3088 if (action_flags & MLX5_FLOW_ACTION_MARK)
3089 return rte_flow_error_set(error, EINVAL,
3090 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3091 "can't mark and flag in same flow");
3092 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3093 return rte_flow_error_set(error, EINVAL,
3094 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3096 " actions in same flow");
3101 * Validate MARK action.
3104 * Pointer to the rte_eth_dev structure.
3106 * Pointer to action.
3107 * @param[in] action_flags
3108 * Holds the actions detected until now.
3110 * Pointer to flow attributes
3112 * Pointer to error structure.
3115 * 0 on success, a negative errno value otherwise and rte_errno is set.
3118 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3119 const struct rte_flow_action *action,
3120 uint64_t action_flags,
3121 const struct rte_flow_attr *attr,
3122 struct rte_flow_error *error)
3124 struct mlx5_priv *priv = dev->data->dev_private;
3125 struct mlx5_dev_config *config = &priv->config;
3126 const struct rte_flow_action_mark *mark = action->conf;
3129 if (is_tunnel_offload_active(dev))
3130 return rte_flow_error_set(error, ENOTSUP,
3131 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3133 "if tunnel offload active");
3134 /* Fall back if no extended metadata register support. */
3135 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3136 return mlx5_flow_validate_action_mark(action, action_flags,
3138 /* Extensive metadata mode requires registers. */
3139 if (!mlx5_flow_ext_mreg_supported(dev))
3140 return rte_flow_error_set(error, ENOTSUP,
3141 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3142 "no metadata registers "
3143 "to support mark action");
3144 if (!priv->sh->dv_mark_mask)
3145 return rte_flow_error_set(error, ENOTSUP,
3146 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3147 "extended metadata register"
3148 " isn't available");
3149 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3152 MLX5_ASSERT(ret > 0);
3154 return rte_flow_error_set(error, EINVAL,
3155 RTE_FLOW_ERROR_TYPE_ACTION, action,
3156 "configuration cannot be null");
3157 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3158 return rte_flow_error_set(error, EINVAL,
3159 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3161 "mark id exceeds the limit");
3162 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3163 return rte_flow_error_set(error, EINVAL,
3164 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3165 "can't flag and mark in same flow");
3166 if (action_flags & MLX5_FLOW_ACTION_MARK)
3167 return rte_flow_error_set(error, EINVAL,
3168 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3169 "can't have 2 mark actions in same"
3175 * Validate SET_META action.
3178 * Pointer to the rte_eth_dev structure.
3180 * Pointer to the action structure.
3181 * @param[in] action_flags
3182 * Holds the actions detected until now.
3184 * Pointer to flow attributes
3186 * Pointer to error structure.
3189 * 0 on success, a negative errno value otherwise and rte_errno is set.
3192 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3193 const struct rte_flow_action *action,
3194 uint64_t action_flags __rte_unused,
3195 const struct rte_flow_attr *attr,
3196 struct rte_flow_error *error)
3198 const struct rte_flow_action_set_meta *conf;
3199 uint32_t nic_mask = UINT32_MAX;
3202 if (!mlx5_flow_ext_mreg_supported(dev))
3203 return rte_flow_error_set(error, ENOTSUP,
3204 RTE_FLOW_ERROR_TYPE_ACTION, action,
3205 "extended metadata register"
3206 " isn't supported");
3207 reg = flow_dv_get_metadata_reg(dev, attr, error);
3211 return rte_flow_error_set(error, ENOTSUP,
3212 RTE_FLOW_ERROR_TYPE_ACTION, action,
3213 "unavalable extended metadata register");
3214 if (reg != REG_A && reg != REG_B) {
3215 struct mlx5_priv *priv = dev->data->dev_private;
3217 nic_mask = priv->sh->dv_meta_mask;
3219 if (!(action->conf))
3220 return rte_flow_error_set(error, EINVAL,
3221 RTE_FLOW_ERROR_TYPE_ACTION, action,
3222 "configuration cannot be null");
3223 conf = (const struct rte_flow_action_set_meta *)action->conf;
3225 return rte_flow_error_set(error, EINVAL,
3226 RTE_FLOW_ERROR_TYPE_ACTION, action,
3227 "zero mask doesn't have any effect");
3228 if (conf->mask & ~nic_mask)
3229 return rte_flow_error_set(error, EINVAL,
3230 RTE_FLOW_ERROR_TYPE_ACTION, action,
3231 "meta data must be within reg C0");
3236 * Validate SET_TAG action.
3239 * Pointer to the rte_eth_dev structure.
3241 * Pointer to the action structure.
3242 * @param[in] action_flags
3243 * Holds the actions detected until now.
3245 * Pointer to flow attributes
3247 * Pointer to error structure.
3250 * 0 on success, a negative errno value otherwise and rte_errno is set.
3253 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3254 const struct rte_flow_action *action,
3255 uint64_t action_flags,
3256 const struct rte_flow_attr *attr,
3257 struct rte_flow_error *error)
3259 const struct rte_flow_action_set_tag *conf;
3260 const uint64_t terminal_action_flags =
3261 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3262 MLX5_FLOW_ACTION_RSS;
3265 if (!mlx5_flow_ext_mreg_supported(dev))
3266 return rte_flow_error_set(error, ENOTSUP,
3267 RTE_FLOW_ERROR_TYPE_ACTION, action,
3268 "extensive metadata register"
3269 " isn't supported");
3270 if (!(action->conf))
3271 return rte_flow_error_set(error, EINVAL,
3272 RTE_FLOW_ERROR_TYPE_ACTION, action,
3273 "configuration cannot be null");
3274 conf = (const struct rte_flow_action_set_tag *)action->conf;
3276 return rte_flow_error_set(error, EINVAL,
3277 RTE_FLOW_ERROR_TYPE_ACTION, action,
3278 "zero mask doesn't have any effect");
3279 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3282 if (!attr->transfer && attr->ingress &&
3283 (action_flags & terminal_action_flags))
3284 return rte_flow_error_set(error, EINVAL,
3285 RTE_FLOW_ERROR_TYPE_ACTION, action,
3286 "set_tag has no effect"
3287 " with terminal actions");
3292 * Validate count action.
3295 * Pointer to rte_eth_dev structure.
3297 * Indicator if action is shared.
3298 * @param[in] action_flags
3299 * Holds the actions detected until now.
3301 * Pointer to error structure.
3304 * 0 on success, a negative errno value otherwise and rte_errno is set.
3307 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3308 uint64_t action_flags,
3309 struct rte_flow_error *error)
3311 struct mlx5_priv *priv = dev->data->dev_private;
3313 if (!priv->sh->devx)
3315 if (action_flags & MLX5_FLOW_ACTION_COUNT)
3316 return rte_flow_error_set(error, EINVAL,
3317 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3318 "duplicate count actions set");
3319 if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3320 !priv->sh->flow_hit_aso_en)
3321 return rte_flow_error_set(error, EINVAL,
3322 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3323 "old age and shared count combination is not supported");
3324 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3328 return rte_flow_error_set
3330 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3332 "count action not supported");
3336 * Validate the L2 encap action.
3339 * Pointer to the rte_eth_dev structure.
3340 * @param[in] action_flags
3341 * Holds the actions detected until now.
3343 * Pointer to the action structure.
3345 * Pointer to flow attributes.
3347 * Pointer to error structure.
3350 * 0 on success, a negative errno value otherwise and rte_errno is set.
3353 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3354 uint64_t action_flags,
3355 const struct rte_flow_action *action,
3356 const struct rte_flow_attr *attr,
3357 struct rte_flow_error *error)
3359 const struct mlx5_priv *priv = dev->data->dev_private;
3361 if (!(action->conf))
3362 return rte_flow_error_set(error, EINVAL,
3363 RTE_FLOW_ERROR_TYPE_ACTION, action,
3364 "configuration cannot be null");
3365 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3366 return rte_flow_error_set(error, EINVAL,
3367 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3368 "can only have a single encap action "
3370 if (!attr->transfer && priv->representor)
3371 return rte_flow_error_set(error, ENOTSUP,
3372 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3373 "encap action for VF representor "
3374 "not supported on NIC table");
3379 * Validate a decap action.
3382 * Pointer to the rte_eth_dev structure.
3383 * @param[in] action_flags
3384 * Holds the actions detected until now.
3386 * Pointer to the action structure.
3387 * @param[in] item_flags
3388 * Holds the items detected.
3390 * Pointer to flow attributes
3392 * Pointer to error structure.
3395 * 0 on success, a negative errno value otherwise and rte_errno is set.
3398 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3399 uint64_t action_flags,
3400 const struct rte_flow_action *action,
3401 const uint64_t item_flags,
3402 const struct rte_flow_attr *attr,
3403 struct rte_flow_error *error)
3405 const struct mlx5_priv *priv = dev->data->dev_private;
3407 if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3408 !priv->config.decap_en)
3409 return rte_flow_error_set(error, ENOTSUP,
3410 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3411 "decap is not enabled");
3412 if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3413 return rte_flow_error_set(error, ENOTSUP,
3414 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3416 MLX5_FLOW_ACTION_DECAP ? "can only "
3417 "have a single decap action" : "decap "
3418 "after encap is not supported");
3419 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3420 return rte_flow_error_set(error, EINVAL,
3421 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3422 "can't have decap action after"
3425 return rte_flow_error_set(error, ENOTSUP,
3426 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3428 "decap action not supported for "
3430 if (!attr->transfer && priv->representor)
3431 return rte_flow_error_set(error, ENOTSUP,
3432 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3433 "decap action for VF representor "
3434 "not supported on NIC table");
3435 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3436 !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3437 return rte_flow_error_set(error, ENOTSUP,
3438 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3439 "VXLAN item should be present for VXLAN decap");
3443 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3446 * Validate the raw encap and decap actions.
3449 * Pointer to the rte_eth_dev structure.
3451 * Pointer to the decap action.
3453 * Pointer to the encap action.
3455 * Pointer to flow attributes
3456 * @param[in/out] action_flags
3457 * Holds the actions detected until now.
3458 * @param[out] actions_n
3459 * pointer to the number of actions counter.
3461 * Pointer to the action structure.
3462 * @param[in] item_flags
3463 * Holds the items detected.
3465 * Pointer to error structure.
3468 * 0 on success, a negative errno value otherwise and rte_errno is set.
3471 flow_dv_validate_action_raw_encap_decap
3472 (struct rte_eth_dev *dev,
3473 const struct rte_flow_action_raw_decap *decap,
3474 const struct rte_flow_action_raw_encap *encap,
3475 const struct rte_flow_attr *attr, uint64_t *action_flags,
3476 int *actions_n, const struct rte_flow_action *action,
3477 uint64_t item_flags, struct rte_flow_error *error)
3479 const struct mlx5_priv *priv = dev->data->dev_private;
3482 if (encap && (!encap->size || !encap->data))
3483 return rte_flow_error_set(error, EINVAL,
3484 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3485 "raw encap data cannot be empty");
3486 if (decap && encap) {
3487 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3488 encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3491 else if (encap->size <=
3492 MLX5_ENCAPSULATION_DECISION_SIZE &&
3494 MLX5_ENCAPSULATION_DECISION_SIZE)
3497 else if (encap->size >
3498 MLX5_ENCAPSULATION_DECISION_SIZE &&
3500 MLX5_ENCAPSULATION_DECISION_SIZE)
3501 /* 2 L2 actions: encap and decap. */
3504 return rte_flow_error_set(error,
3506 RTE_FLOW_ERROR_TYPE_ACTION,
3507 NULL, "unsupported too small "
3508 "raw decap and too small raw "
3509 "encap combination");
3512 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3513 item_flags, attr, error);
3516 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3520 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3521 return rte_flow_error_set(error, ENOTSUP,
3522 RTE_FLOW_ERROR_TYPE_ACTION,
3524 "small raw encap size");
3525 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3526 return rte_flow_error_set(error, EINVAL,
3527 RTE_FLOW_ERROR_TYPE_ACTION,
3529 "more than one encap action");
3530 if (!attr->transfer && priv->representor)
3531 return rte_flow_error_set
3533 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3534 "encap action for VF representor "
3535 "not supported on NIC table");
3536 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3543 * Validate the ASO CT action.
3546 * Pointer to the rte_eth_dev structure.
3547 * @param[in] action_flags
3548 * Holds the actions detected until now.
3549 * @param[in] item_flags
3550 * The items found in this flow rule.
3552 * Pointer to flow attributes.
3554 * Pointer to error structure.
3557 * 0 on success, a negative errno value otherwise and rte_errno is set.
3560 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3561 uint64_t action_flags,
3562 uint64_t item_flags,
3563 const struct rte_flow_attr *attr,
3564 struct rte_flow_error *error)
3568 if (attr->group == 0 && !attr->transfer)
3569 return rte_flow_error_set(error, ENOTSUP,
3570 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3572 "Only support non-root table");
3573 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3574 return rte_flow_error_set(error, ENOTSUP,
3575 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3576 "CT cannot follow a fate action");
3577 if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3578 (action_flags & MLX5_FLOW_ACTION_AGE))
3579 return rte_flow_error_set(error, EINVAL,
3580 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3581 "Only one ASO action is supported");
3582 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3583 return rte_flow_error_set(error, EINVAL,
3584 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3585 "Encap cannot exist before CT");
3586 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3587 return rte_flow_error_set(error, EINVAL,
3588 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3589 "Not a outer TCP packet");
3594 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3595 struct mlx5_list_entry *entry, void *cb_ctx)
3597 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3598 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3599 struct mlx5_flow_dv_encap_decap_resource *resource;
3601 resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3603 if (resource->reformat_type == ctx_resource->reformat_type &&
3604 resource->ft_type == ctx_resource->ft_type &&
3605 resource->flags == ctx_resource->flags &&
3606 resource->size == ctx_resource->size &&
3607 !memcmp((const void *)resource->buf,
3608 (const void *)ctx_resource->buf,
3614 struct mlx5_list_entry *
3615 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3617 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3618 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3619 struct mlx5dv_dr_domain *domain;
3620 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3621 struct mlx5_flow_dv_encap_decap_resource *resource;
3625 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3626 domain = sh->fdb_domain;
3627 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3628 domain = sh->rx_domain;
3630 domain = sh->tx_domain;
3631 /* Register new encap/decap resource. */
3632 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3634 rte_flow_error_set(ctx->error, ENOMEM,
3635 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3636 "cannot allocate resource memory");
3639 *resource = *ctx_resource;
3640 resource->idx = idx;
3641 ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3645 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3646 rte_flow_error_set(ctx->error, ENOMEM,
3647 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3648 NULL, "cannot create action");
3652 return &resource->entry;
3655 struct mlx5_list_entry *
3656 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3659 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3660 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3661 struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3664 cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3666 if (!cache_resource) {
3667 rte_flow_error_set(ctx->error, ENOMEM,
3668 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3669 "cannot allocate resource memory");
3672 memcpy(cache_resource, oentry, sizeof(*cache_resource));
3673 cache_resource->idx = idx;
3674 return &cache_resource->entry;
3678 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3680 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3681 struct mlx5_flow_dv_encap_decap_resource *res =
3682 container_of(entry, typeof(*res), entry);
3684 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3688 * Find existing encap/decap resource or create and register a new one.
3690 * @param[in, out] dev
3691 * Pointer to rte_eth_dev structure.
3692 * @param[in, out] resource
3693 * Pointer to encap/decap resource.
3694 * @parm[in, out] dev_flow
3695 * Pointer to the dev_flow.
3697 * pointer to error structure.
3700 * 0 on success otherwise -errno and errno is set.
3703 flow_dv_encap_decap_resource_register
3704 (struct rte_eth_dev *dev,
3705 struct mlx5_flow_dv_encap_decap_resource *resource,
3706 struct mlx5_flow *dev_flow,
3707 struct rte_flow_error *error)
3709 struct mlx5_priv *priv = dev->data->dev_private;
3710 struct mlx5_dev_ctx_shared *sh = priv->sh;
3711 struct mlx5_list_entry *entry;
3715 uint32_t refmt_type:8;
3717 * Header reformat actions can be shared between
3718 * non-root tables. One bit to indicate non-root
3722 uint32_t reserve:15;
3725 } encap_decap_key = {
3727 .ft_type = resource->ft_type,
3728 .refmt_type = resource->reformat_type,
3729 .is_root = !!dev_flow->dv.group,
3733 struct mlx5_flow_cb_ctx ctx = {
3737 struct mlx5_hlist *encaps_decaps;
3740 encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3742 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3744 flow_dv_encap_decap_create_cb,
3745 flow_dv_encap_decap_match_cb,
3746 flow_dv_encap_decap_remove_cb,
3747 flow_dv_encap_decap_clone_cb,
3748 flow_dv_encap_decap_clone_free_cb);
3749 if (unlikely(!encaps_decaps))
3751 resource->flags = dev_flow->dv.group ? 0 : 1;
3752 key64 = __rte_raw_cksum(&encap_decap_key.v32,
3753 sizeof(encap_decap_key.v32), 0);
3754 if (resource->reformat_type !=
3755 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3757 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3758 entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3761 resource = container_of(entry, typeof(*resource), entry);
3762 dev_flow->dv.encap_decap = resource;
3763 dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3768 * Find existing table jump resource or create and register a new one.
3770 * @param[in, out] dev
3771 * Pointer to rte_eth_dev structure.
3772 * @param[in, out] tbl
3773 * Pointer to flow table resource.
3774 * @parm[in, out] dev_flow
3775 * Pointer to the dev_flow.
3777 * pointer to error structure.
3780 * 0 on success otherwise -errno and errno is set.
3783 flow_dv_jump_tbl_resource_register
3784 (struct rte_eth_dev *dev __rte_unused,
3785 struct mlx5_flow_tbl_resource *tbl,
3786 struct mlx5_flow *dev_flow,
3787 struct rte_flow_error *error __rte_unused)
3789 struct mlx5_flow_tbl_data_entry *tbl_data =
3790 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3793 MLX5_ASSERT(tbl_data->jump.action);
3794 dev_flow->handle->rix_jump = tbl_data->idx;
3795 dev_flow->dv.jump = &tbl_data->jump;
3800 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3801 struct mlx5_list_entry *entry, void *cb_ctx)
3803 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3804 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3805 struct mlx5_flow_dv_port_id_action_resource *res =
3806 container_of(entry, typeof(*res), entry);
3808 return ref->port_id != res->port_id;
3811 struct mlx5_list_entry *
3812 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3814 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3815 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3816 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3817 struct mlx5_flow_dv_port_id_action_resource *resource;
3821 /* Register new port id action resource. */
3822 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3824 rte_flow_error_set(ctx->error, ENOMEM,
3825 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3826 "cannot allocate port_id action memory");
3830 ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3834 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3835 rte_flow_error_set(ctx->error, ENOMEM,
3836 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3837 "cannot create action");
3840 resource->idx = idx;
3841 return &resource->entry;
3844 struct mlx5_list_entry *
3845 flow_dv_port_id_clone_cb(void *tool_ctx,
3846 struct mlx5_list_entry *entry __rte_unused,
3849 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3850 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3851 struct mlx5_flow_dv_port_id_action_resource *resource;
3854 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3856 rte_flow_error_set(ctx->error, ENOMEM,
3857 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3858 "cannot allocate port_id action memory");
3861 memcpy(resource, entry, sizeof(*resource));
3862 resource->idx = idx;
3863 return &resource->entry;
3867 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3869 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3870 struct mlx5_flow_dv_port_id_action_resource *resource =
3871 container_of(entry, typeof(*resource), entry);
3873 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3877 * Find existing table port ID resource or create and register a new one.
3879 * @param[in, out] dev
3880 * Pointer to rte_eth_dev structure.
3881 * @param[in, out] ref
3882 * Pointer to port ID action resource reference.
3883 * @parm[in, out] dev_flow
3884 * Pointer to the dev_flow.
3886 * pointer to error structure.
3889 * 0 on success otherwise -errno and errno is set.
3892 flow_dv_port_id_action_resource_register
3893 (struct rte_eth_dev *dev,
3894 struct mlx5_flow_dv_port_id_action_resource *ref,
3895 struct mlx5_flow *dev_flow,
3896 struct rte_flow_error *error)
3898 struct mlx5_priv *priv = dev->data->dev_private;
3899 struct mlx5_list_entry *entry;
3900 struct mlx5_flow_dv_port_id_action_resource *resource;
3901 struct mlx5_flow_cb_ctx ctx = {
3906 entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3909 resource = container_of(entry, typeof(*resource), entry);
3910 dev_flow->dv.port_id_action = resource;
3911 dev_flow->handle->rix_port_id_action = resource->idx;
3916 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3917 struct mlx5_list_entry *entry, void *cb_ctx)
3919 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3920 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3921 struct mlx5_flow_dv_push_vlan_action_resource *res =
3922 container_of(entry, typeof(*res), entry);
3924 return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3927 struct mlx5_list_entry *
3928 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3930 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3931 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3932 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3933 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3934 struct mlx5dv_dr_domain *domain;
3938 /* Register new port id action resource. */
3939 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3941 rte_flow_error_set(ctx->error, ENOMEM,
3942 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3943 "cannot allocate push_vlan action memory");
3947 if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3948 domain = sh->fdb_domain;
3949 else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3950 domain = sh->rx_domain;
3952 domain = sh->tx_domain;
3953 ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3956 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3957 rte_flow_error_set(ctx->error, ENOMEM,
3958 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3959 "cannot create push vlan action");
3962 resource->idx = idx;
3963 return &resource->entry;
3966 struct mlx5_list_entry *
3967 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3968 struct mlx5_list_entry *entry __rte_unused,
3971 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3972 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3973 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3976 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3978 rte_flow_error_set(ctx->error, ENOMEM,
3979 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3980 "cannot allocate push_vlan action memory");
3983 memcpy(resource, entry, sizeof(*resource));
3984 resource->idx = idx;
3985 return &resource->entry;
3989 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3991 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3992 struct mlx5_flow_dv_push_vlan_action_resource *resource =
3993 container_of(entry, typeof(*resource), entry);
3995 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3999 * Find existing push vlan resource or create and register a new one.
4001 * @param [in, out] dev
4002 * Pointer to rte_eth_dev structure.
4003 * @param[in, out] ref
4004 * Pointer to port ID action resource reference.
4005 * @parm[in, out] dev_flow
4006 * Pointer to the dev_flow.
4008 * pointer to error structure.
4011 * 0 on success otherwise -errno and errno is set.
4014 flow_dv_push_vlan_action_resource_register
4015 (struct rte_eth_dev *dev,
4016 struct mlx5_flow_dv_push_vlan_action_resource *ref,
4017 struct mlx5_flow *dev_flow,
4018 struct rte_flow_error *error)
4020 struct mlx5_priv *priv = dev->data->dev_private;
4021 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4022 struct mlx5_list_entry *entry;
4023 struct mlx5_flow_cb_ctx ctx = {
4028 entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4031 resource = container_of(entry, typeof(*resource), entry);
4033 dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4034 dev_flow->dv.push_vlan_res = resource;
4039 * Get the size of specific rte_flow_item_type hdr size
4041 * @param[in] item_type
4042 * Tested rte_flow_item_type.
4045 * sizeof struct item_type, 0 if void or irrelevant.
4048 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4052 switch (item_type) {
4053 case RTE_FLOW_ITEM_TYPE_ETH:
4054 retval = sizeof(struct rte_ether_hdr);
4056 case RTE_FLOW_ITEM_TYPE_VLAN:
4057 retval = sizeof(struct rte_vlan_hdr);
4059 case RTE_FLOW_ITEM_TYPE_IPV4:
4060 retval = sizeof(struct rte_ipv4_hdr);
4062 case RTE_FLOW_ITEM_TYPE_IPV6:
4063 retval = sizeof(struct rte_ipv6_hdr);
4065 case RTE_FLOW_ITEM_TYPE_UDP:
4066 retval = sizeof(struct rte_udp_hdr);
4068 case RTE_FLOW_ITEM_TYPE_TCP:
4069 retval = sizeof(struct rte_tcp_hdr);
4071 case RTE_FLOW_ITEM_TYPE_VXLAN:
4072 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4073 retval = sizeof(struct rte_vxlan_hdr);
4075 case RTE_FLOW_ITEM_TYPE_GRE:
4076 case RTE_FLOW_ITEM_TYPE_NVGRE:
4077 retval = sizeof(struct rte_gre_hdr);
4079 case RTE_FLOW_ITEM_TYPE_MPLS:
4080 retval = sizeof(struct rte_mpls_hdr);
4082 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4090 #define MLX5_ENCAP_IPV4_VERSION 0x40
4091 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
4092 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
4093 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
4094 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
4095 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
4096 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
4099 * Convert the encap action data from list of rte_flow_item to raw buffer
4102 * Pointer to rte_flow_item objects list.
4104 * Pointer to the output buffer.
4106 * Pointer to the output buffer size.
4108 * Pointer to the error structure.
4111 * 0 on success, a negative errno value otherwise and rte_errno is set.
4114 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4115 size_t *size, struct rte_flow_error *error)
4117 struct rte_ether_hdr *eth = NULL;
4118 struct rte_vlan_hdr *vlan = NULL;
4119 struct rte_ipv4_hdr *ipv4 = NULL;
4120 struct rte_ipv6_hdr *ipv6 = NULL;
4121 struct rte_udp_hdr *udp = NULL;
4122 struct rte_vxlan_hdr *vxlan = NULL;
4123 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4124 struct rte_gre_hdr *gre = NULL;
4126 size_t temp_size = 0;
4129 return rte_flow_error_set(error, EINVAL,
4130 RTE_FLOW_ERROR_TYPE_ACTION,
4131 NULL, "invalid empty data");
4132 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4133 len = flow_dv_get_item_hdr_len(items->type);
4134 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4135 return rte_flow_error_set(error, EINVAL,
4136 RTE_FLOW_ERROR_TYPE_ACTION,
4137 (void *)items->type,
4138 "items total size is too big"
4139 " for encap action");
4140 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4141 switch (items->type) {
4142 case RTE_FLOW_ITEM_TYPE_ETH:
4143 eth = (struct rte_ether_hdr *)&buf[temp_size];
4145 case RTE_FLOW_ITEM_TYPE_VLAN:
4146 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4148 return rte_flow_error_set(error, EINVAL,
4149 RTE_FLOW_ERROR_TYPE_ACTION,
4150 (void *)items->type,
4151 "eth header not found");
4152 if (!eth->ether_type)
4153 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4155 case RTE_FLOW_ITEM_TYPE_IPV4:
4156 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4158 return rte_flow_error_set(error, EINVAL,
4159 RTE_FLOW_ERROR_TYPE_ACTION,
4160 (void *)items->type,
4161 "neither eth nor vlan"
4163 if (vlan && !vlan->eth_proto)
4164 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4165 else if (eth && !eth->ether_type)
4166 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4167 if (!ipv4->version_ihl)
4168 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4169 MLX5_ENCAP_IPV4_IHL_MIN;
4170 if (!ipv4->time_to_live)
4171 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4173 case RTE_FLOW_ITEM_TYPE_IPV6:
4174 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4176 return rte_flow_error_set(error, EINVAL,
4177 RTE_FLOW_ERROR_TYPE_ACTION,
4178 (void *)items->type,
4179 "neither eth nor vlan"
4181 if (vlan && !vlan->eth_proto)
4182 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4183 else if (eth && !eth->ether_type)
4184 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4185 if (!ipv6->vtc_flow)
4187 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4188 if (!ipv6->hop_limits)
4189 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4191 case RTE_FLOW_ITEM_TYPE_UDP:
4192 udp = (struct rte_udp_hdr *)&buf[temp_size];
4194 return rte_flow_error_set(error, EINVAL,
4195 RTE_FLOW_ERROR_TYPE_ACTION,
4196 (void *)items->type,
4197 "ip header not found");
4198 if (ipv4 && !ipv4->next_proto_id)
4199 ipv4->next_proto_id = IPPROTO_UDP;
4200 else if (ipv6 && !ipv6->proto)
4201 ipv6->proto = IPPROTO_UDP;
4203 case RTE_FLOW_ITEM_TYPE_VXLAN:
4204 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4206 return rte_flow_error_set(error, EINVAL,
4207 RTE_FLOW_ERROR_TYPE_ACTION,
4208 (void *)items->type,
4209 "udp header not found");
4211 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4212 if (!vxlan->vx_flags)
4214 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4216 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4217 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4219 return rte_flow_error_set(error, EINVAL,
4220 RTE_FLOW_ERROR_TYPE_ACTION,
4221 (void *)items->type,
4222 "udp header not found");
4223 if (!vxlan_gpe->proto)
4224 return rte_flow_error_set(error, EINVAL,
4225 RTE_FLOW_ERROR_TYPE_ACTION,
4226 (void *)items->type,
4227 "next protocol not found");
4230 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4231 if (!vxlan_gpe->vx_flags)
4232 vxlan_gpe->vx_flags =
4233 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4235 case RTE_FLOW_ITEM_TYPE_GRE:
4236 case RTE_FLOW_ITEM_TYPE_NVGRE:
4237 gre = (struct rte_gre_hdr *)&buf[temp_size];
4239 return rte_flow_error_set(error, EINVAL,
4240 RTE_FLOW_ERROR_TYPE_ACTION,
4241 (void *)items->type,
4242 "next protocol not found");
4244 return rte_flow_error_set(error, EINVAL,
4245 RTE_FLOW_ERROR_TYPE_ACTION,
4246 (void *)items->type,
4247 "ip header not found");
4248 if (ipv4 && !ipv4->next_proto_id)
4249 ipv4->next_proto_id = IPPROTO_GRE;
4250 else if (ipv6 && !ipv6->proto)
4251 ipv6->proto = IPPROTO_GRE;
4253 case RTE_FLOW_ITEM_TYPE_VOID:
4256 return rte_flow_error_set(error, EINVAL,
4257 RTE_FLOW_ERROR_TYPE_ACTION,
4258 (void *)items->type,
4259 "unsupported item type");
4269 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4271 struct rte_ether_hdr *eth = NULL;
4272 struct rte_vlan_hdr *vlan = NULL;
4273 struct rte_ipv6_hdr *ipv6 = NULL;
4274 struct rte_udp_hdr *udp = NULL;
4278 eth = (struct rte_ether_hdr *)data;
4279 next_hdr = (char *)(eth + 1);
4280 proto = RTE_BE16(eth->ether_type);
4283 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4284 vlan = (struct rte_vlan_hdr *)next_hdr;
4285 proto = RTE_BE16(vlan->eth_proto);
4286 next_hdr += sizeof(struct rte_vlan_hdr);
4289 /* HW calculates IPv4 csum. no need to proceed */
4290 if (proto == RTE_ETHER_TYPE_IPV4)
4293 /* non IPv4/IPv6 header. not supported */
4294 if (proto != RTE_ETHER_TYPE_IPV6) {
4295 return rte_flow_error_set(error, ENOTSUP,
4296 RTE_FLOW_ERROR_TYPE_ACTION,
4297 NULL, "Cannot offload non IPv4/IPv6");
4300 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4302 /* ignore non UDP */
4303 if (ipv6->proto != IPPROTO_UDP)
4306 udp = (struct rte_udp_hdr *)(ipv6 + 1);
4307 udp->dgram_cksum = 0;
4313 * Convert L2 encap action to DV specification.
4316 * Pointer to rte_eth_dev structure.
4318 * Pointer to action structure.
4319 * @param[in, out] dev_flow
4320 * Pointer to the mlx5_flow.
4321 * @param[in] transfer
4322 * Mark if the flow is E-Switch flow.
4324 * Pointer to the error structure.
4327 * 0 on success, a negative errno value otherwise and rte_errno is set.
4330 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4331 const struct rte_flow_action *action,
4332 struct mlx5_flow *dev_flow,
4334 struct rte_flow_error *error)
4336 const struct rte_flow_item *encap_data;
4337 const struct rte_flow_action_raw_encap *raw_encap_data;
4338 struct mlx5_flow_dv_encap_decap_resource res = {
4340 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4341 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4342 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4345 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4347 (const struct rte_flow_action_raw_encap *)action->conf;
4348 res.size = raw_encap_data->size;
4349 memcpy(res.buf, raw_encap_data->data, res.size);
4351 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4353 ((const struct rte_flow_action_vxlan_encap *)
4354 action->conf)->definition;
4357 ((const struct rte_flow_action_nvgre_encap *)
4358 action->conf)->definition;
4359 if (flow_dv_convert_encap_data(encap_data, res.buf,
4363 if (flow_dv_zero_encap_udp_csum(res.buf, error))
4365 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4366 return rte_flow_error_set(error, EINVAL,
4367 RTE_FLOW_ERROR_TYPE_ACTION,
4368 NULL, "can't create L2 encap action");
4373 * Convert L2 decap action to DV specification.
4376 * Pointer to rte_eth_dev structure.
4377 * @param[in, out] dev_flow
4378 * Pointer to the mlx5_flow.
4379 * @param[in] transfer
4380 * Mark if the flow is E-Switch flow.
4382 * Pointer to the error structure.
4385 * 0 on success, a negative errno value otherwise and rte_errno is set.
4388 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4389 struct mlx5_flow *dev_flow,
4391 struct rte_flow_error *error)
4393 struct mlx5_flow_dv_encap_decap_resource res = {
4396 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4397 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4398 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4401 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4402 return rte_flow_error_set(error, EINVAL,
4403 RTE_FLOW_ERROR_TYPE_ACTION,
4404 NULL, "can't create L2 decap action");
4409 * Convert raw decap/encap (L3 tunnel) action to DV specification.
4412 * Pointer to rte_eth_dev structure.
4414 * Pointer to action structure.
4415 * @param[in, out] dev_flow
4416 * Pointer to the mlx5_flow.
4418 * Pointer to the flow attributes.
4420 * Pointer to the error structure.
4423 * 0 on success, a negative errno value otherwise and rte_errno is set.
4426 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4427 const struct rte_flow_action *action,
4428 struct mlx5_flow *dev_flow,
4429 const struct rte_flow_attr *attr,
4430 struct rte_flow_error *error)
4432 const struct rte_flow_action_raw_encap *encap_data;
4433 struct mlx5_flow_dv_encap_decap_resource res;
4435 memset(&res, 0, sizeof(res));
4436 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4437 res.size = encap_data->size;
4438 memcpy(res.buf, encap_data->data, res.size);
4439 res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4440 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4441 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4443 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4445 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4446 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4447 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4448 return rte_flow_error_set(error, EINVAL,
4449 RTE_FLOW_ERROR_TYPE_ACTION,
4450 NULL, "can't create encap action");
4455 * Create action push VLAN.
4458 * Pointer to rte_eth_dev structure.
4460 * Pointer to the flow attributes.
4462 * Pointer to the vlan to push to the Ethernet header.
4463 * @param[in, out] dev_flow
4464 * Pointer to the mlx5_flow.
4466 * Pointer to the error structure.
4469 * 0 on success, a negative errno value otherwise and rte_errno is set.
4472 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4473 const struct rte_flow_attr *attr,
4474 const struct rte_vlan_hdr *vlan,
4475 struct mlx5_flow *dev_flow,
4476 struct rte_flow_error *error)
4478 struct mlx5_flow_dv_push_vlan_action_resource res;
4480 memset(&res, 0, sizeof(res));
4482 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4485 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4487 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4488 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4489 return flow_dv_push_vlan_action_resource_register
4490 (dev, &res, dev_flow, error);
4494 * Validate the modify-header actions.
4496 * @param[in] action_flags
4497 * Holds the actions detected until now.
4499 * Pointer to the modify action.
4501 * Pointer to error structure.
4504 * 0 on success, a negative errno value otherwise and rte_errno is set.
4507 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4508 const struct rte_flow_action *action,
4509 struct rte_flow_error *error)
4511 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4512 return rte_flow_error_set(error, EINVAL,
4513 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4514 NULL, "action configuration not set");
4515 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4516 return rte_flow_error_set(error, EINVAL,
4517 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4518 "can't have encap action before"
4524 * Validate the modify-header MAC address actions.
4526 * @param[in] action_flags
4527 * Holds the actions detected until now.
4529 * Pointer to the modify action.
4530 * @param[in] item_flags
4531 * Holds the items detected.
4533 * Pointer to error structure.
4536 * 0 on success, a negative errno value otherwise and rte_errno is set.
4539 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4540 const struct rte_flow_action *action,
4541 const uint64_t item_flags,
4542 struct rte_flow_error *error)
4546 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4548 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4549 return rte_flow_error_set(error, EINVAL,
4550 RTE_FLOW_ERROR_TYPE_ACTION,
4552 "no L2 item in pattern");
4558 * Validate the modify-header IPv4 address actions.
4560 * @param[in] action_flags
4561 * Holds the actions detected until now.
4563 * Pointer to the modify action.
4564 * @param[in] item_flags
4565 * Holds the items detected.
4567 * Pointer to error structure.
4570 * 0 on success, a negative errno value otherwise and rte_errno is set.
4573 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4574 const struct rte_flow_action *action,
4575 const uint64_t item_flags,
4576 struct rte_flow_error *error)
4581 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4583 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4584 MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4585 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4586 if (!(item_flags & layer))
4587 return rte_flow_error_set(error, EINVAL,
4588 RTE_FLOW_ERROR_TYPE_ACTION,
4590 "no ipv4 item in pattern");
4596 * Validate the modify-header IPv6 address actions.
4598 * @param[in] action_flags
4599 * Holds the actions detected until now.
4601 * Pointer to the modify action.
4602 * @param[in] item_flags
4603 * Holds the items detected.
4605 * Pointer to error structure.
4608 * 0 on success, a negative errno value otherwise and rte_errno is set.
4611 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4612 const struct rte_flow_action *action,
4613 const uint64_t item_flags,
4614 struct rte_flow_error *error)
4619 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4621 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4622 MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4623 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4624 if (!(item_flags & layer))
4625 return rte_flow_error_set(error, EINVAL,
4626 RTE_FLOW_ERROR_TYPE_ACTION,
4628 "no ipv6 item in pattern");
4634 * Validate the modify-header TP actions.
4636 * @param[in] action_flags
4637 * Holds the actions detected until now.
4639 * Pointer to the modify action.
4640 * @param[in] item_flags
4641 * Holds the items detected.
4643 * Pointer to error structure.
4646 * 0 on success, a negative errno value otherwise and rte_errno is set.
4649 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4650 const struct rte_flow_action *action,
4651 const uint64_t item_flags,
4652 struct rte_flow_error *error)
4657 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4659 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4660 MLX5_FLOW_LAYER_INNER_L4 :
4661 MLX5_FLOW_LAYER_OUTER_L4;
4662 if (!(item_flags & layer))
4663 return rte_flow_error_set(error, EINVAL,
4664 RTE_FLOW_ERROR_TYPE_ACTION,
4665 NULL, "no transport layer "
4672 * Validate the modify-header actions of increment/decrement
4673 * TCP Sequence-number.
4675 * @param[in] action_flags
4676 * Holds the actions detected until now.
4678 * Pointer to the modify action.
4679 * @param[in] item_flags
4680 * Holds the items detected.
4682 * Pointer to error structure.
4685 * 0 on success, a negative errno value otherwise and rte_errno is set.
4688 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4689 const struct rte_flow_action *action,
4690 const uint64_t item_flags,
4691 struct rte_flow_error *error)
4696 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4698 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4699 MLX5_FLOW_LAYER_INNER_L4_TCP :
4700 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4701 if (!(item_flags & layer))
4702 return rte_flow_error_set(error, EINVAL,
4703 RTE_FLOW_ERROR_TYPE_ACTION,
4704 NULL, "no TCP item in"
4706 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4707 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4708 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4709 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4710 return rte_flow_error_set(error, EINVAL,
4711 RTE_FLOW_ERROR_TYPE_ACTION,
4713 "cannot decrease and increase"
4714 " TCP sequence number"
4715 " at the same time");
4721 * Validate the modify-header actions of increment/decrement
4722 * TCP Acknowledgment number.
4724 * @param[in] action_flags
4725 * Holds the actions detected until now.
4727 * Pointer to the modify action.
4728 * @param[in] item_flags
4729 * Holds the items detected.
4731 * Pointer to error structure.
4734 * 0 on success, a negative errno value otherwise and rte_errno is set.
4737 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4738 const struct rte_flow_action *action,
4739 const uint64_t item_flags,
4740 struct rte_flow_error *error)
4745 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4747 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4748 MLX5_FLOW_LAYER_INNER_L4_TCP :
4749 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4750 if (!(item_flags & layer))
4751 return rte_flow_error_set(error, EINVAL,
4752 RTE_FLOW_ERROR_TYPE_ACTION,
4753 NULL, "no TCP item in"
4755 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4756 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4757 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4758 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4759 return rte_flow_error_set(error, EINVAL,
4760 RTE_FLOW_ERROR_TYPE_ACTION,
4762 "cannot decrease and increase"
4763 " TCP acknowledgment number"
4764 " at the same time");
4770 * Validate the modify-header TTL actions.
4772 * @param[in] action_flags
4773 * Holds the actions detected until now.
4775 * Pointer to the modify action.
4776 * @param[in] item_flags
4777 * Holds the items detected.
4779 * Pointer to error structure.
4782 * 0 on success, a negative errno value otherwise and rte_errno is set.
4785 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4786 const struct rte_flow_action *action,
4787 const uint64_t item_flags,
4788 struct rte_flow_error *error)
4793 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4795 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4796 MLX5_FLOW_LAYER_INNER_L3 :
4797 MLX5_FLOW_LAYER_OUTER_L3;
4798 if (!(item_flags & layer))
4799 return rte_flow_error_set(error, EINVAL,
4800 RTE_FLOW_ERROR_TYPE_ACTION,
4802 "no IP protocol in pattern");
4808 * Validate the generic modify field actions.
4810 * Pointer to the rte_eth_dev structure.
4811 * @param[in] action_flags
4812 * Holds the actions detected until now.
4814 * Pointer to the modify action.
4816 * Pointer to the flow attributes.
4818 * Pointer to error structure.
4821 * Number of header fields to modify (0 or more) on success,
4822 * a negative errno value otherwise and rte_errno is set.
4825 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4826 const uint64_t action_flags,
4827 const struct rte_flow_action *action,
4828 const struct rte_flow_attr *attr,
4829 struct rte_flow_error *error)
4832 struct mlx5_priv *priv = dev->data->dev_private;
4833 struct mlx5_dev_config *config = &priv->config;
4834 const struct rte_flow_action_modify_field *action_modify_field =
4836 uint32_t dst_width = mlx5_flow_item_field_width(priv,
4837 action_modify_field->dst.field, -1);
4838 uint32_t src_width = mlx5_flow_item_field_width(priv,
4839 action_modify_field->src.field, dst_width);
4841 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4845 if (action_modify_field->width == 0)
4846 return rte_flow_error_set(error, EINVAL,
4847 RTE_FLOW_ERROR_TYPE_ACTION, action,
4848 "no bits are requested to be modified");
4849 else if (action_modify_field->width > dst_width ||
4850 action_modify_field->width > src_width)
4851 return rte_flow_error_set(error, EINVAL,
4852 RTE_FLOW_ERROR_TYPE_ACTION, action,
4853 "cannot modify more bits than"
4854 " the width of a field");
4855 if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4856 action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4857 if ((action_modify_field->dst.offset +
4858 action_modify_field->width > dst_width) ||
4859 (action_modify_field->dst.offset % 32))
4860 return rte_flow_error_set(error, EINVAL,
4861 RTE_FLOW_ERROR_TYPE_ACTION, action,
4862 "destination offset is too big"
4863 " or not aligned to 4 bytes");
4864 if (action_modify_field->dst.level &&
4865 action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4866 return rte_flow_error_set(error, ENOTSUP,
4867 RTE_FLOW_ERROR_TYPE_ACTION, action,
4868 "inner header fields modification"
4869 " is not supported");
4871 if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4872 action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4873 if (!attr->transfer && !attr->group)
4874 return rte_flow_error_set(error, ENOTSUP,
4875 RTE_FLOW_ERROR_TYPE_ACTION, action,
4876 "modify field action is not"
4877 " supported for group 0");
4878 if ((action_modify_field->src.offset +
4879 action_modify_field->width > src_width) ||
4880 (action_modify_field->src.offset % 32))
4881 return rte_flow_error_set(error, EINVAL,
4882 RTE_FLOW_ERROR_TYPE_ACTION, action,
4883 "source offset is too big"
4884 " or not aligned to 4 bytes");
4885 if (action_modify_field->src.level &&
4886 action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4887 return rte_flow_error_set(error, ENOTSUP,
4888 RTE_FLOW_ERROR_TYPE_ACTION, action,
4889 "inner header fields modification"
4890 " is not supported");
4892 if ((action_modify_field->dst.field ==
4893 action_modify_field->src.field) &&
4894 (action_modify_field->dst.level ==
4895 action_modify_field->src.level))
4896 return rte_flow_error_set(error, EINVAL,
4897 RTE_FLOW_ERROR_TYPE_ACTION, action,
4898 "source and destination fields"
4899 " cannot be the same");
4900 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4901 action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4902 action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4903 return rte_flow_error_set(error, EINVAL,
4904 RTE_FLOW_ERROR_TYPE_ACTION, action,
4905 "mark, immediate value or a pointer to it"
4906 " cannot be used as a destination");
4907 if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4908 action_modify_field->src.field == RTE_FLOW_FIELD_START)
4909 return rte_flow_error_set(error, ENOTSUP,
4910 RTE_FLOW_ERROR_TYPE_ACTION, action,
4911 "modifications of an arbitrary"
4912 " place in a packet is not supported");
4913 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4914 action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4915 return rte_flow_error_set(error, ENOTSUP,
4916 RTE_FLOW_ERROR_TYPE_ACTION, action,
4917 "modifications of the 802.1Q Tag"
4918 " Identifier is not supported");
4919 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4920 action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4921 return rte_flow_error_set(error, ENOTSUP,
4922 RTE_FLOW_ERROR_TYPE_ACTION, action,
4923 "modifications of the VXLAN Network"
4924 " Identifier is not supported");
4925 if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4926 action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4927 return rte_flow_error_set(error, ENOTSUP,
4928 RTE_FLOW_ERROR_TYPE_ACTION, action,
4929 "modifications of the GENEVE Network"
4930 " Identifier is not supported");
4931 if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4932 action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4933 action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4934 action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4935 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4936 !mlx5_flow_ext_mreg_supported(dev))
4937 return rte_flow_error_set(error, ENOTSUP,
4938 RTE_FLOW_ERROR_TYPE_ACTION, action,
4939 "cannot modify mark or metadata without"
4940 " extended metadata register support");
4942 if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4943 return rte_flow_error_set(error, ENOTSUP,
4944 RTE_FLOW_ERROR_TYPE_ACTION, action,
4945 "add and sub operations"
4946 " are not supported");
4947 return (action_modify_field->width / 32) +
4948 !!(action_modify_field->width % 32);
4952 * Validate jump action.
4955 * Pointer to the jump action.
4956 * @param[in] action_flags
4957 * Holds the actions detected until now.
4958 * @param[in] attributes
4959 * Pointer to flow attributes
4960 * @param[in] external
4961 * Action belongs to flow rule created by request external to PMD.
4963 * Pointer to error structure.
4966 * 0 on success, a negative errno value otherwise and rte_errno is set.
4969 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4970 const struct mlx5_flow_tunnel *tunnel,
4971 const struct rte_flow_action *action,
4972 uint64_t action_flags,
4973 const struct rte_flow_attr *attributes,
4974 bool external, struct rte_flow_error *error)
4976 uint32_t target_group, table;
4978 struct flow_grp_info grp_info = {
4979 .external = !!external,
4980 .transfer = !!attributes->transfer,
4984 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4985 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4986 return rte_flow_error_set(error, EINVAL,
4987 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4988 "can't have 2 fate actions in"
4991 return rte_flow_error_set(error, EINVAL,
4992 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4993 NULL, "action configuration not set");
4995 ((const struct rte_flow_action_jump *)action->conf)->group;
4996 ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5000 if (attributes->group == target_group &&
5001 !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5002 MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5003 return rte_flow_error_set(error, EINVAL,
5004 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5005 "target group must be other than"
5006 " the current flow group");
5011 * Validate action PORT_ID / REPRESENTED_PORT.
5014 * Pointer to rte_eth_dev structure.
5015 * @param[in] action_flags
5016 * Bit-fields that holds the actions detected until now.
5018 * PORT_ID / REPRESENTED_PORT action structure.
5020 * Attributes of flow that includes this action.
5022 * Pointer to error structure.
5025 * 0 on success, a negative errno value otherwise and rte_errno is set.
5028 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5029 uint64_t action_flags,
5030 const struct rte_flow_action *action,
5031 const struct rte_flow_attr *attr,
5032 struct rte_flow_error *error)
5034 const struct rte_flow_action_port_id *port_id;
5035 const struct rte_flow_action_ethdev *ethdev;
5036 struct mlx5_priv *act_priv;
5037 struct mlx5_priv *dev_priv;
5040 if (!attr->transfer)
5041 return rte_flow_error_set(error, ENOTSUP,
5042 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5044 "port action is valid in transfer"
5046 if (!action || !action->conf)
5047 return rte_flow_error_set(error, ENOTSUP,
5048 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5050 "port action parameters must be"
5052 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5053 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5054 return rte_flow_error_set(error, EINVAL,
5055 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5056 "can have only one fate actions in"
5058 dev_priv = mlx5_dev_to_eswitch_info(dev);
5060 return rte_flow_error_set(error, rte_errno,
5061 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5063 "failed to obtain E-Switch info");
5064 switch (action->type) {
5065 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5066 port_id = action->conf;
5067 port = port_id->original ? dev->data->port_id : port_id->id;
5069 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5070 ethdev = action->conf;
5071 port = ethdev->port_id;
5075 return rte_flow_error_set
5077 RTE_FLOW_ERROR_TYPE_ACTION, action,
5078 "unknown E-Switch action");
5080 act_priv = mlx5_port_to_eswitch_info(port, false);
5082 return rte_flow_error_set
5084 RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5085 "failed to obtain E-Switch port id for port");
5086 if (act_priv->domain_id != dev_priv->domain_id)
5087 return rte_flow_error_set
5089 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5090 "port does not belong to"
5091 " E-Switch being configured");
5096 * Get the maximum number of modify header actions.
5099 * Pointer to rte_eth_dev structure.
5101 * Whether action is on root table.
5104 * Max number of modify header actions device can support.
5106 static inline unsigned int
5107 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5111 * There's no way to directly query the max capacity from FW.
5112 * The maximal value on root table should be assumed to be supported.
5115 return MLX5_MAX_MODIFY_NUM;
5117 return MLX5_ROOT_TBL_MODIFY_NUM;
5121 * Validate the meter action.
5124 * Pointer to rte_eth_dev structure.
5125 * @param[in] action_flags
5126 * Bit-fields that holds the actions detected until now.
5128 * Pointer to the meter action.
5130 * Attributes of flow that includes this action.
5131 * @param[in] port_id_item
5132 * Pointer to item indicating port id.
5134 * Pointer to error structure.
5137 * 0 on success, a negative errno value otherwise and rte_ernno is set.
5140 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5141 uint64_t action_flags,
5142 const struct rte_flow_action *action,
5143 const struct rte_flow_attr *attr,
5144 const struct rte_flow_item *port_id_item,
5146 struct rte_flow_error *error)
5148 struct mlx5_priv *priv = dev->data->dev_private;
5149 const struct rte_flow_action_meter *am = action->conf;
5150 struct mlx5_flow_meter_info *fm;
5151 struct mlx5_flow_meter_policy *mtr_policy;
5152 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5155 return rte_flow_error_set(error, EINVAL,
5156 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5157 "meter action conf is NULL");
5159 if (action_flags & MLX5_FLOW_ACTION_METER)
5160 return rte_flow_error_set(error, ENOTSUP,
5161 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5162 "meter chaining not support");
5163 if (action_flags & MLX5_FLOW_ACTION_JUMP)
5164 return rte_flow_error_set(error, ENOTSUP,
5165 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5166 "meter with jump not support");
5168 return rte_flow_error_set(error, ENOTSUP,
5169 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5171 "meter action not supported");
5172 fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5174 return rte_flow_error_set(error, EINVAL,
5175 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5177 /* aso meter can always be shared by different domains */
5178 if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5179 !(fm->transfer == attr->transfer ||
5180 (!fm->ingress && !attr->ingress && attr->egress) ||
5181 (!fm->egress && !attr->egress && attr->ingress)))
5182 return rte_flow_error_set(error, EINVAL,
5183 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5184 "Flow attributes domain are either invalid "
5185 "or have a domain conflict with current "
5186 "meter attributes");
5187 if (fm->def_policy) {
5188 if (!((attr->transfer &&
5189 mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5191 mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5193 mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5194 return rte_flow_error_set(error, EINVAL,
5195 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5196 "Flow attributes domain "
5197 "have a conflict with current "
5198 "meter domain attributes");
5201 mtr_policy = mlx5_flow_meter_policy_find(dev,
5202 fm->policy_id, NULL);
5204 return rte_flow_error_set(error, EINVAL,
5205 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5206 "Invalid policy id for meter ");
5207 if (!((attr->transfer && mtr_policy->transfer) ||
5208 (attr->egress && mtr_policy->egress) ||
5209 (attr->ingress && mtr_policy->ingress)))
5210 return rte_flow_error_set(error, EINVAL,
5211 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5212 "Flow attributes domain "
5213 "have a conflict with current "
5214 "meter domain attributes");
5215 if (attr->transfer && mtr_policy->dev) {
5217 * When policy has fate action of port_id,
5218 * the flow should have the same src port as policy.
5220 struct mlx5_priv *policy_port_priv =
5221 mtr_policy->dev->data->dev_private;
5222 int32_t flow_src_port = priv->representor_id;
5225 const struct rte_flow_item_port_id *spec =
5227 struct mlx5_priv *port_priv =
5228 mlx5_port_to_eswitch_info(spec->id,
5231 return rte_flow_error_set(error,
5233 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5235 "Failed to get port info.");
5236 flow_src_port = port_priv->representor_id;
5238 if (flow_src_port != policy_port_priv->representor_id)
5239 return rte_flow_error_set(error,
5241 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5243 "Flow and meter policy "
5244 "have different src port.");
5246 *def_policy = false;
5252 * Validate the age action.
5254 * @param[in] action_flags
5255 * Holds the actions detected until now.
5257 * Pointer to the age action.
5259 * Pointer to the Ethernet device structure.
5261 * Pointer to error structure.
5264 * 0 on success, a negative errno value otherwise and rte_errno is set.
5267 flow_dv_validate_action_age(uint64_t action_flags,
5268 const struct rte_flow_action *action,
5269 struct rte_eth_dev *dev,
5270 struct rte_flow_error *error)
5272 struct mlx5_priv *priv = dev->data->dev_private;
5273 const struct rte_flow_action_age *age = action->conf;
5275 if (!priv->sh->devx || (priv->sh->cmng.counter_fallback &&
5276 !priv->sh->aso_age_mng))
5277 return rte_flow_error_set(error, ENOTSUP,
5278 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5280 "age action not supported");
5281 if (!(action->conf))
5282 return rte_flow_error_set(error, EINVAL,
5283 RTE_FLOW_ERROR_TYPE_ACTION, action,
5284 "configuration cannot be null");
5285 if (!(age->timeout))
5286 return rte_flow_error_set(error, EINVAL,
5287 RTE_FLOW_ERROR_TYPE_ACTION, action,
5288 "invalid timeout value 0");
5289 if (action_flags & MLX5_FLOW_ACTION_AGE)
5290 return rte_flow_error_set(error, EINVAL,
5291 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5292 "duplicate age actions set");
5297 * Validate the modify-header IPv4 DSCP actions.
5299 * @param[in] action_flags
5300 * Holds the actions detected until now.
5302 * Pointer to the modify action.
5303 * @param[in] item_flags
5304 * Holds the items detected.
5306 * Pointer to error structure.
5309 * 0 on success, a negative errno value otherwise and rte_errno is set.
5312 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5313 const struct rte_flow_action *action,
5314 const uint64_t item_flags,
5315 struct rte_flow_error *error)
5319 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5321 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5322 return rte_flow_error_set(error, EINVAL,
5323 RTE_FLOW_ERROR_TYPE_ACTION,
5325 "no ipv4 item in pattern");
5331 * Validate the modify-header IPv6 DSCP actions.
5333 * @param[in] action_flags
5334 * Holds the actions detected until now.
5336 * Pointer to the modify action.
5337 * @param[in] item_flags
5338 * Holds the items detected.
5340 * Pointer to error structure.
5343 * 0 on success, a negative errno value otherwise and rte_errno is set.
5346 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5347 const struct rte_flow_action *action,
5348 const uint64_t item_flags,
5349 struct rte_flow_error *error)
5353 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5355 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5356 return rte_flow_error_set(error, EINVAL,
5357 RTE_FLOW_ERROR_TYPE_ACTION,
5359 "no ipv6 item in pattern");
5365 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5366 struct mlx5_list_entry *entry, void *cb_ctx)
5368 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5369 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5370 struct mlx5_flow_dv_modify_hdr_resource *resource =
5371 container_of(entry, typeof(*resource), entry);
5372 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5374 key_len += ref->actions_num * sizeof(ref->actions[0]);
5375 return ref->actions_num != resource->actions_num ||
5376 memcmp(&ref->ft_type, &resource->ft_type, key_len);
5379 static struct mlx5_indexed_pool *
5380 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5382 struct mlx5_indexed_pool *ipool = __atomic_load_n
5383 (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5386 struct mlx5_indexed_pool *expected = NULL;
5387 struct mlx5_indexed_pool_config cfg =
5388 (struct mlx5_indexed_pool_config) {
5389 .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5391 sizeof(struct mlx5_modification_cmd),
5396 .release_mem_en = !!sh->reclaim_mode,
5397 .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5398 .malloc = mlx5_malloc,
5400 .type = "mlx5_modify_action_resource",
5403 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5404 ipool = mlx5_ipool_create(&cfg);
5407 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5408 &expected, ipool, false,
5410 __ATOMIC_SEQ_CST)) {
5411 mlx5_ipool_destroy(ipool);
5412 ipool = __atomic_load_n(&sh->mdh_ipools[index],
5419 struct mlx5_list_entry *
5420 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5422 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5423 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5424 struct mlx5dv_dr_domain *ns;
5425 struct mlx5_flow_dv_modify_hdr_resource *entry;
5426 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5427 struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5428 ref->actions_num - 1);
5430 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5431 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5434 if (unlikely(!ipool)) {
5435 rte_flow_error_set(ctx->error, ENOMEM,
5436 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5437 NULL, "cannot allocate modify ipool");
5440 entry = mlx5_ipool_zmalloc(ipool, &idx);
5442 rte_flow_error_set(ctx->error, ENOMEM,
5443 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5444 "cannot allocate resource memory");
5447 rte_memcpy(&entry->ft_type,
5448 RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5449 key_len + data_len);
5450 if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5451 ns = sh->fdb_domain;
5452 else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5456 ret = mlx5_flow_os_create_flow_action_modify_header
5457 (sh->cdev->ctx, ns, entry,
5458 data_len, &entry->action);
5460 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5461 rte_flow_error_set(ctx->error, ENOMEM,
5462 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5463 NULL, "cannot create modification action");
5467 return &entry->entry;
5470 struct mlx5_list_entry *
5471 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5474 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5475 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5476 struct mlx5_flow_dv_modify_hdr_resource *entry;
5477 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5478 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5481 entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5484 rte_flow_error_set(ctx->error, ENOMEM,
5485 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5486 "cannot allocate resource memory");
5489 memcpy(entry, oentry, sizeof(*entry) + data_len);
5491 return &entry->entry;
5495 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5497 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5498 struct mlx5_flow_dv_modify_hdr_resource *res =
5499 container_of(entry, typeof(*res), entry);
5501 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5505 * Validate the sample action.
5507 * @param[in, out] action_flags
5508 * Holds the actions detected until now.
5510 * Pointer to the sample action.
5512 * Pointer to the Ethernet device structure.
5514 * Attributes of flow that includes this action.
5515 * @param[in] item_flags
5516 * Holds the items detected.
5518 * Pointer to the RSS action.
5519 * @param[out] sample_rss
5520 * Pointer to the RSS action in sample action list.
5522 * Pointer to the COUNT action in sample action list.
5523 * @param[out] fdb_mirror_limit
5524 * Pointer to the FDB mirror limitation flag.
5526 * Pointer to error structure.
5529 * 0 on success, a negative errno value otherwise and rte_errno is set.
5532 flow_dv_validate_action_sample(uint64_t *action_flags,
5533 const struct rte_flow_action *action,
5534 struct rte_eth_dev *dev,
5535 const struct rte_flow_attr *attr,
5536 uint64_t item_flags,
5537 const struct rte_flow_action_rss *rss,
5538 const struct rte_flow_action_rss **sample_rss,
5539 const struct rte_flow_action_count **count,
5540 int *fdb_mirror_limit,
5541 struct rte_flow_error *error)
5543 struct mlx5_priv *priv = dev->data->dev_private;
5544 struct mlx5_dev_config *dev_conf = &priv->config;
5545 const struct rte_flow_action_sample *sample = action->conf;
5546 const struct rte_flow_action *act;
5547 uint64_t sub_action_flags = 0;
5548 uint16_t queue_index = 0xFFFF;
5553 return rte_flow_error_set(error, EINVAL,
5554 RTE_FLOW_ERROR_TYPE_ACTION, action,
5555 "configuration cannot be NULL");
5556 if (sample->ratio == 0)
5557 return rte_flow_error_set(error, EINVAL,
5558 RTE_FLOW_ERROR_TYPE_ACTION, action,
5559 "ratio value starts from 1");
5560 if (!priv->sh->devx || (sample->ratio > 0 && !priv->sampler_en))
5561 return rte_flow_error_set(error, ENOTSUP,
5562 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5564 "sample action not supported");
5565 if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5566 return rte_flow_error_set(error, EINVAL,
5567 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5568 "Multiple sample actions not "
5570 if (*action_flags & MLX5_FLOW_ACTION_METER)
5571 return rte_flow_error_set(error, EINVAL,
5572 RTE_FLOW_ERROR_TYPE_ACTION, action,
5573 "wrong action order, meter should "
5574 "be after sample action");
5575 if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5576 return rte_flow_error_set(error, EINVAL,
5577 RTE_FLOW_ERROR_TYPE_ACTION, action,
5578 "wrong action order, jump should "
5579 "be after sample action");
5580 act = sample->actions;
5581 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5582 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5583 return rte_flow_error_set(error, ENOTSUP,
5584 RTE_FLOW_ERROR_TYPE_ACTION,
5585 act, "too many actions");
5586 switch (act->type) {
5587 case RTE_FLOW_ACTION_TYPE_QUEUE:
5588 ret = mlx5_flow_validate_action_queue(act,
5594 queue_index = ((const struct rte_flow_action_queue *)
5595 (act->conf))->index;
5596 sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5599 case RTE_FLOW_ACTION_TYPE_RSS:
5600 *sample_rss = act->conf;
5601 ret = mlx5_flow_validate_action_rss(act,
5608 if (rss && *sample_rss &&
5609 ((*sample_rss)->level != rss->level ||
5610 (*sample_rss)->types != rss->types))
5611 return rte_flow_error_set(error, ENOTSUP,
5612 RTE_FLOW_ERROR_TYPE_ACTION,
5614 "Can't use the different RSS types "
5615 "or level in the same flow");
5616 if (*sample_rss != NULL && (*sample_rss)->queue_num)
5617 queue_index = (*sample_rss)->queue[0];
5618 sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5621 case RTE_FLOW_ACTION_TYPE_MARK:
5622 ret = flow_dv_validate_action_mark(dev, act,
5627 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5628 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5629 MLX5_FLOW_ACTION_MARK_EXT;
5631 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5634 case RTE_FLOW_ACTION_TYPE_COUNT:
5635 ret = flow_dv_validate_action_count
5636 (dev, false, *action_flags | sub_action_flags,
5641 sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5642 *action_flags |= MLX5_FLOW_ACTION_COUNT;
5645 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5646 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5647 ret = flow_dv_validate_action_port_id(dev,
5654 sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5657 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5658 ret = flow_dv_validate_action_raw_encap_decap
5659 (dev, NULL, act->conf, attr, &sub_action_flags,
5660 &actions_n, action, item_flags, error);
5665 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5666 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5667 ret = flow_dv_validate_action_l2_encap(dev,
5673 sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5677 return rte_flow_error_set(error, ENOTSUP,
5678 RTE_FLOW_ERROR_TYPE_ACTION,
5680 "Doesn't support optional "
5684 if (attr->ingress && !attr->transfer) {
5685 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5686 MLX5_FLOW_ACTION_RSS)))
5687 return rte_flow_error_set(error, EINVAL,
5688 RTE_FLOW_ERROR_TYPE_ACTION,
5690 "Ingress must has a dest "
5691 "QUEUE for Sample");
5692 } else if (attr->egress && !attr->transfer) {
5693 return rte_flow_error_set(error, ENOTSUP,
5694 RTE_FLOW_ERROR_TYPE_ACTION,
5696 "Sample Only support Ingress "
5698 } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5699 MLX5_ASSERT(attr->transfer);
5700 if (sample->ratio > 1)
5701 return rte_flow_error_set(error, ENOTSUP,
5702 RTE_FLOW_ERROR_TYPE_ACTION,
5704 "E-Switch doesn't support "
5705 "any optional action "
5707 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5708 return rte_flow_error_set(error, ENOTSUP,
5709 RTE_FLOW_ERROR_TYPE_ACTION,
5711 "unsupported action QUEUE");
5712 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5713 return rte_flow_error_set(error, ENOTSUP,
5714 RTE_FLOW_ERROR_TYPE_ACTION,
5716 "unsupported action QUEUE");
5717 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5718 return rte_flow_error_set(error, EINVAL,
5719 RTE_FLOW_ERROR_TYPE_ACTION,
5721 "E-Switch must has a dest "
5722 "port for mirroring");
5723 if (!priv->config.hca_attr.reg_c_preserve &&
5724 priv->representor_id != UINT16_MAX)
5725 *fdb_mirror_limit = 1;
5727 /* Continue validation for Xcap actions.*/
5728 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5729 (queue_index == 0xFFFF ||
5730 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5731 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5732 MLX5_FLOW_XCAP_ACTIONS)
5733 return rte_flow_error_set(error, ENOTSUP,
5734 RTE_FLOW_ERROR_TYPE_ACTION,
5735 NULL, "encap and decap "
5736 "combination aren't "
5738 if (!attr->transfer && attr->ingress && (sub_action_flags &
5739 MLX5_FLOW_ACTION_ENCAP))
5740 return rte_flow_error_set(error, ENOTSUP,
5741 RTE_FLOW_ERROR_TYPE_ACTION,
5742 NULL, "encap is not supported"
5743 " for ingress traffic");
5749 * Find existing modify-header resource or create and register a new one.
5751 * @param dev[in, out]
5752 * Pointer to rte_eth_dev structure.
5753 * @param[in, out] resource
5754 * Pointer to modify-header resource.
5755 * @parm[in, out] dev_flow
5756 * Pointer to the dev_flow.
5758 * pointer to error structure.
5761 * 0 on success otherwise -errno and errno is set.
5764 flow_dv_modify_hdr_resource_register
5765 (struct rte_eth_dev *dev,
5766 struct mlx5_flow_dv_modify_hdr_resource *resource,
5767 struct mlx5_flow *dev_flow,
5768 struct rte_flow_error *error)
5770 struct mlx5_priv *priv = dev->data->dev_private;
5771 struct mlx5_dev_ctx_shared *sh = priv->sh;
5772 uint32_t key_len = sizeof(*resource) -
5773 offsetof(typeof(*resource), ft_type) +
5774 resource->actions_num * sizeof(resource->actions[0]);
5775 struct mlx5_list_entry *entry;
5776 struct mlx5_flow_cb_ctx ctx = {
5780 struct mlx5_hlist *modify_cmds;
5783 modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5785 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5787 flow_dv_modify_create_cb,
5788 flow_dv_modify_match_cb,
5789 flow_dv_modify_remove_cb,
5790 flow_dv_modify_clone_cb,
5791 flow_dv_modify_clone_free_cb);
5792 if (unlikely(!modify_cmds))
5794 resource->root = !dev_flow->dv.group;
5795 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5797 return rte_flow_error_set(error, EOVERFLOW,
5798 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5799 "too many modify header items");
5800 key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5801 entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5804 resource = container_of(entry, typeof(*resource), entry);
5805 dev_flow->handle->dvh.modify_hdr = resource;
5810 * Get DV flow counter by index.
5813 * Pointer to the Ethernet device structure.
5815 * mlx5 flow counter index in the container.
5817 * mlx5 flow counter pool in the container.
5820 * Pointer to the counter, NULL otherwise.
5822 static struct mlx5_flow_counter *
5823 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5825 struct mlx5_flow_counter_pool **ppool)
5827 struct mlx5_priv *priv = dev->data->dev_private;
5828 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5829 struct mlx5_flow_counter_pool *pool;
5831 /* Decrease to original index and clear shared bit. */
5832 idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5833 MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5834 pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5838 return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5842 * Check the devx counter belongs to the pool.
5845 * Pointer to the counter pool.
5847 * The counter devx ID.
5850 * True if counter belongs to the pool, false otherwise.
5853 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5855 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5856 MLX5_COUNTERS_PER_POOL;
5858 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5864 * Get a pool by devx counter ID.
5867 * Pointer to the counter management.
5869 * The counter devx ID.
5872 * The counter pool pointer if exists, NULL otherwise,
5874 static struct mlx5_flow_counter_pool *
5875 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5878 struct mlx5_flow_counter_pool *pool = NULL;
5880 rte_spinlock_lock(&cmng->pool_update_sl);
5881 /* Check last used pool. */
5882 if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5883 flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5884 pool = cmng->pools[cmng->last_pool_idx];
5887 /* ID out of range means no suitable pool in the container. */
5888 if (id > cmng->max_id || id < cmng->min_id)
5891 * Find the pool from the end of the container, since mostly counter
5892 * ID is sequence increasing, and the last pool should be the needed
5897 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5899 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5905 rte_spinlock_unlock(&cmng->pool_update_sl);
5910 * Resize a counter container.
5913 * Pointer to the Ethernet device structure.
5916 * 0 on success, otherwise negative errno value and rte_errno is set.
5919 flow_dv_container_resize(struct rte_eth_dev *dev)
5921 struct mlx5_priv *priv = dev->data->dev_private;
5922 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5923 void *old_pools = cmng->pools;
5924 uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5925 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5926 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5933 memcpy(pools, old_pools, cmng->n *
5934 sizeof(struct mlx5_flow_counter_pool *));
5936 cmng->pools = pools;
5938 mlx5_free(old_pools);
5943 * Query a devx flow counter.
5946 * Pointer to the Ethernet device structure.
5947 * @param[in] counter
5948 * Index to the flow counter.
5950 * The statistics value of packets.
5952 * The statistics value of bytes.
5955 * 0 on success, otherwise a negative errno value and rte_errno is set.
5958 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5961 struct mlx5_priv *priv = dev->data->dev_private;
5962 struct mlx5_flow_counter_pool *pool = NULL;
5963 struct mlx5_flow_counter *cnt;
5966 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5968 if (priv->sh->cmng.counter_fallback)
5969 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5970 0, pkts, bytes, 0, NULL, NULL, 0);
5971 rte_spinlock_lock(&pool->sl);
5976 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5977 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5978 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5980 rte_spinlock_unlock(&pool->sl);
5985 * Create and initialize a new counter pool.
5988 * Pointer to the Ethernet device structure.
5990 * The devX counter handle.
5992 * Whether the pool is for counter that was allocated for aging.
5993 * @param[in/out] cont_cur
5994 * Pointer to the container pointer, it will be update in pool resize.
5997 * The pool container pointer on success, NULL otherwise and rte_errno is set.
5999 static struct mlx5_flow_counter_pool *
6000 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6003 struct mlx5_priv *priv = dev->data->dev_private;
6004 struct mlx5_flow_counter_pool *pool;
6005 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6006 bool fallback = priv->sh->cmng.counter_fallback;
6007 uint32_t size = sizeof(*pool);
6009 size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6010 size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6011 pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6017 pool->is_aged = !!age;
6018 pool->query_gen = 0;
6019 pool->min_dcs = dcs;
6020 rte_spinlock_init(&pool->sl);
6021 rte_spinlock_init(&pool->csl);
6022 TAILQ_INIT(&pool->counters[0]);
6023 TAILQ_INIT(&pool->counters[1]);
6024 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6025 rte_spinlock_lock(&cmng->pool_update_sl);
6026 pool->index = cmng->n_valid;
6027 if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6029 rte_spinlock_unlock(&cmng->pool_update_sl);
6032 cmng->pools[pool->index] = pool;
6034 if (unlikely(fallback)) {
6035 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6037 if (base < cmng->min_id)
6038 cmng->min_id = base;
6039 if (base > cmng->max_id)
6040 cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6041 cmng->last_pool_idx = pool->index;
6043 rte_spinlock_unlock(&cmng->pool_update_sl);
6048 * Prepare a new counter and/or a new counter pool.
6051 * Pointer to the Ethernet device structure.
6052 * @param[out] cnt_free
6053 * Where to put the pointer of a new counter.
6055 * Whether the pool is for counter that was allocated for aging.
6058 * The counter pool pointer and @p cnt_free is set on success,
6059 * NULL otherwise and rte_errno is set.
6061 static struct mlx5_flow_counter_pool *
6062 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6063 struct mlx5_flow_counter **cnt_free,
6066 struct mlx5_priv *priv = dev->data->dev_private;
6067 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6068 struct mlx5_flow_counter_pool *pool;
6069 struct mlx5_counters tmp_tq;
6070 struct mlx5_devx_obj *dcs = NULL;
6071 struct mlx5_flow_counter *cnt;
6072 enum mlx5_counter_type cnt_type =
6073 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6074 bool fallback = priv->sh->cmng.counter_fallback;
6078 /* bulk_bitmap must be 0 for single counter allocation. */
6079 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6082 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6084 pool = flow_dv_pool_create(dev, dcs, age);
6086 mlx5_devx_cmd_destroy(dcs);
6090 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6091 cnt = MLX5_POOL_GET_CNT(pool, i);
6093 cnt->dcs_when_free = dcs;
6097 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6099 rte_errno = ENODATA;
6102 pool = flow_dv_pool_create(dev, dcs, age);
6104 mlx5_devx_cmd_destroy(dcs);
6107 TAILQ_INIT(&tmp_tq);
6108 for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6109 cnt = MLX5_POOL_GET_CNT(pool, i);
6111 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6113 rte_spinlock_lock(&cmng->csl[cnt_type]);
6114 TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6115 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6116 *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6117 (*cnt_free)->pool = pool;
6122 * Allocate a flow counter.
6125 * Pointer to the Ethernet device structure.
6127 * Whether the counter was allocated for aging.
6130 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6133 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6135 struct mlx5_priv *priv = dev->data->dev_private;
6136 struct mlx5_flow_counter_pool *pool = NULL;
6137 struct mlx5_flow_counter *cnt_free = NULL;
6138 bool fallback = priv->sh->cmng.counter_fallback;
6139 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6140 enum mlx5_counter_type cnt_type =
6141 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6144 if (!priv->sh->devx) {
6145 rte_errno = ENOTSUP;
6148 /* Get free counters from container. */
6149 rte_spinlock_lock(&cmng->csl[cnt_type]);
6150 cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6152 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6153 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6154 if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6156 pool = cnt_free->pool;
6158 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6159 /* Create a DV counter action only in the first time usage. */
6160 if (!cnt_free->action) {
6162 struct mlx5_devx_obj *dcs;
6166 offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6167 dcs = pool->min_dcs;
6170 dcs = cnt_free->dcs_when_free;
6172 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6179 cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6180 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6181 /* Update the counter reset values. */
6182 if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6185 if (!fallback && !priv->sh->cmng.query_thread_on)
6186 /* Start the asynchronous batch query by the host thread. */
6187 mlx5_set_query_alarm(priv->sh);
6189 * When the count action isn't shared (by ID), shared_info field is
6190 * used for indirect action API's refcnt.
6191 * When the counter action is not shared neither by ID nor by indirect
6192 * action API, shared info must be 1.
6194 cnt_free->shared_info.refcnt = 1;
6198 cnt_free->pool = pool;
6200 cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6201 rte_spinlock_lock(&cmng->csl[cnt_type]);
6202 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6203 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6209 * Get age param from counter index.
6212 * Pointer to the Ethernet device structure.
6213 * @param[in] counter
6214 * Index to the counter handler.
6217 * The aging parameter specified for the counter index.
6219 static struct mlx5_age_param*
6220 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6223 struct mlx5_flow_counter *cnt;
6224 struct mlx5_flow_counter_pool *pool = NULL;
6226 flow_dv_counter_get_by_idx(dev, counter, &pool);
6227 counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6228 cnt = MLX5_POOL_GET_CNT(pool, counter);
6229 return MLX5_CNT_TO_AGE(cnt);
6233 * Remove a flow counter from aged counter list.
6236 * Pointer to the Ethernet device structure.
6237 * @param[in] counter
6238 * Index to the counter handler.
6240 * Pointer to the counter handler.
6243 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6244 uint32_t counter, struct mlx5_flow_counter *cnt)
6246 struct mlx5_age_info *age_info;
6247 struct mlx5_age_param *age_param;
6248 struct mlx5_priv *priv = dev->data->dev_private;
6249 uint16_t expected = AGE_CANDIDATE;
6251 age_info = GET_PORT_AGE_INFO(priv);
6252 age_param = flow_dv_counter_idx_get_age(dev, counter);
6253 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6254 AGE_FREE, false, __ATOMIC_RELAXED,
6255 __ATOMIC_RELAXED)) {
6257 * We need the lock even it is age timeout,
6258 * since counter may still in process.
6260 rte_spinlock_lock(&age_info->aged_sl);
6261 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6262 rte_spinlock_unlock(&age_info->aged_sl);
6263 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6268 * Release a flow counter.
6271 * Pointer to the Ethernet device structure.
6272 * @param[in] counter
6273 * Index to the counter handler.
6276 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6278 struct mlx5_priv *priv = dev->data->dev_private;
6279 struct mlx5_flow_counter_pool *pool = NULL;
6280 struct mlx5_flow_counter *cnt;
6281 enum mlx5_counter_type cnt_type;
6285 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6287 if (pool->is_aged) {
6288 flow_dv_counter_remove_from_age(dev, counter, cnt);
6291 * If the counter action is shared by indirect action API,
6292 * the atomic function reduces its references counter.
6293 * If after the reduction the action is still referenced, the
6294 * function returns here and does not release it.
6295 * When the counter action is not shared by
6296 * indirect action API, shared info is 1 before the reduction,
6297 * so this condition is failed and function doesn't return here.
6299 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6305 * Put the counter back to list to be updated in none fallback mode.
6306 * Currently, we are using two list alternately, while one is in query,
6307 * add the freed counter to the other list based on the pool query_gen
6308 * value. After query finishes, add counter the list to the global
6309 * container counter list. The list changes while query starts. In
6310 * this case, lock will not be needed as query callback and release
6311 * function both operate with the different list.
6313 if (!priv->sh->cmng.counter_fallback) {
6314 rte_spinlock_lock(&pool->csl);
6315 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6316 rte_spinlock_unlock(&pool->csl);
6318 cnt->dcs_when_free = cnt->dcs_when_active;
6319 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6320 MLX5_COUNTER_TYPE_ORIGIN;
6321 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6322 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6324 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6329 * Resize a meter id container.
6332 * Pointer to the Ethernet device structure.
6335 * 0 on success, otherwise negative errno value and rte_errno is set.
6338 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6340 struct mlx5_priv *priv = dev->data->dev_private;
6341 struct mlx5_aso_mtr_pools_mng *pools_mng =
6342 &priv->sh->mtrmng->pools_mng;
6343 void *old_pools = pools_mng->pools;
6344 uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6345 uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6346 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6353 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6358 memcpy(pools, old_pools, pools_mng->n *
6359 sizeof(struct mlx5_aso_mtr_pool *));
6360 pools_mng->n = resize;
6361 pools_mng->pools = pools;
6363 mlx5_free(old_pools);
6368 * Prepare a new meter and/or a new meter pool.
6371 * Pointer to the Ethernet device structure.
6372 * @param[out] mtr_free
6373 * Where to put the pointer of a new meter.g.
6376 * The meter pool pointer and @mtr_free is set on success,
6377 * NULL otherwise and rte_errno is set.
6379 static struct mlx5_aso_mtr_pool *
6380 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6382 struct mlx5_priv *priv = dev->data->dev_private;
6383 struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6384 struct mlx5_aso_mtr_pool *pool = NULL;
6385 struct mlx5_devx_obj *dcs = NULL;
6387 uint32_t log_obj_size;
6389 log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6390 dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6391 priv->sh->cdev->pdn,
6394 rte_errno = ENODATA;
6397 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6400 claim_zero(mlx5_devx_cmd_destroy(dcs));
6403 pool->devx_obj = dcs;
6404 pool->index = pools_mng->n_valid;
6405 if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6407 claim_zero(mlx5_devx_cmd_destroy(dcs));
6410 pools_mng->pools[pool->index] = pool;
6411 pools_mng->n_valid++;
6412 for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6413 pool->mtrs[i].offset = i;
6414 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6416 pool->mtrs[0].offset = 0;
6417 *mtr_free = &pool->mtrs[0];
6422 * Release a flow meter into pool.
6425 * Pointer to the Ethernet device structure.
6426 * @param[in] mtr_idx
6427 * Index to aso flow meter.
6430 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6432 struct mlx5_priv *priv = dev->data->dev_private;
6433 struct mlx5_aso_mtr_pools_mng *pools_mng =
6434 &priv->sh->mtrmng->pools_mng;
6435 struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6437 MLX5_ASSERT(aso_mtr);
6438 rte_spinlock_lock(&pools_mng->mtrsl);
6439 memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6440 aso_mtr->state = ASO_METER_FREE;
6441 LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6442 rte_spinlock_unlock(&pools_mng->mtrsl);
6446 * Allocate a aso flow meter.
6449 * Pointer to the Ethernet device structure.
6452 * Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6455 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6457 struct mlx5_priv *priv = dev->data->dev_private;
6458 struct mlx5_aso_mtr *mtr_free = NULL;
6459 struct mlx5_aso_mtr_pools_mng *pools_mng =
6460 &priv->sh->mtrmng->pools_mng;
6461 struct mlx5_aso_mtr_pool *pool;
6462 uint32_t mtr_idx = 0;
6464 if (!priv->sh->devx) {
6465 rte_errno = ENOTSUP;
6468 /* Allocate the flow meter memory. */
6469 /* Get free meters from management. */
6470 rte_spinlock_lock(&pools_mng->mtrsl);
6471 mtr_free = LIST_FIRST(&pools_mng->meters);
6473 LIST_REMOVE(mtr_free, next);
6474 if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6475 rte_spinlock_unlock(&pools_mng->mtrsl);
6478 mtr_free->state = ASO_METER_WAIT;
6479 rte_spinlock_unlock(&pools_mng->mtrsl);
6480 pool = container_of(mtr_free,
6481 struct mlx5_aso_mtr_pool,
6482 mtrs[mtr_free->offset]);
6483 mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6484 if (!mtr_free->fm.meter_action) {
6485 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6486 struct rte_flow_error error;
6489 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6490 mtr_free->fm.meter_action =
6491 mlx5_glue->dv_create_flow_action_aso
6492 (priv->sh->rx_domain,
6493 pool->devx_obj->obj,
6495 (1 << MLX5_FLOW_COLOR_GREEN),
6497 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6498 if (!mtr_free->fm.meter_action) {
6499 flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6507 * Verify the @p attributes will be correctly understood by the NIC and store
6508 * them in the @p flow if everything is correct.
6511 * Pointer to dev struct.
6512 * @param[in] attributes
6513 * Pointer to flow attributes
6514 * @param[in] external
6515 * This flow rule is created by request external to PMD.
6517 * Pointer to error structure.
6520 * - 0 on success and non root table.
6521 * - 1 on success and root table.
6522 * - a negative errno value otherwise and rte_errno is set.
6525 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6526 const struct mlx5_flow_tunnel *tunnel,
6527 const struct rte_flow_attr *attributes,
6528 const struct flow_grp_info *grp_info,
6529 struct rte_flow_error *error)
6531 struct mlx5_priv *priv = dev->data->dev_private;
6532 uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6535 #ifndef HAVE_MLX5DV_DR
6536 RTE_SET_USED(tunnel);
6537 RTE_SET_USED(grp_info);
6538 if (attributes->group)
6539 return rte_flow_error_set(error, ENOTSUP,
6540 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6542 "groups are not supported");
6546 ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6551 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6553 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6554 attributes->priority > lowest_priority)
6555 return rte_flow_error_set(error, ENOTSUP,
6556 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6558 "priority out of range");
6559 if (attributes->transfer) {
6560 if (!priv->config.dv_esw_en)
6561 return rte_flow_error_set
6563 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6564 "E-Switch dr is not supported");
6565 if (!(priv->representor || priv->master))
6566 return rte_flow_error_set
6567 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6568 NULL, "E-Switch configuration can only be"
6569 " done by a master or a representor device");
6570 if (attributes->egress)
6571 return rte_flow_error_set
6573 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6574 "egress is not supported");
6576 if (!(attributes->egress ^ attributes->ingress))
6577 return rte_flow_error_set(error, ENOTSUP,
6578 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6579 "must specify exactly one of "
6580 "ingress or egress");
6585 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6586 const struct rte_flow_item *end)
6588 const struct rte_flow_item *item = *head;
6589 uint16_t l3_protocol;
6591 for (; item != end; item++) {
6592 switch (item->type) {
6595 case RTE_FLOW_ITEM_TYPE_IPV4:
6596 l3_protocol = RTE_ETHER_TYPE_IPV4;
6598 case RTE_FLOW_ITEM_TYPE_IPV6:
6599 l3_protocol = RTE_ETHER_TYPE_IPV6;
6601 case RTE_FLOW_ITEM_TYPE_ETH:
6602 if (item->mask && item->spec) {
6603 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6606 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6607 l3_protocol == RTE_ETHER_TYPE_IPV6)
6611 case RTE_FLOW_ITEM_TYPE_VLAN:
6612 if (item->mask && item->spec) {
6613 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6616 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6617 l3_protocol == RTE_ETHER_TYPE_IPV6)
6630 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6631 const struct rte_flow_item *end)
6633 const struct rte_flow_item *item = *head;
6634 uint8_t l4_protocol;
6636 for (; item != end; item++) {
6637 switch (item->type) {
6640 case RTE_FLOW_ITEM_TYPE_TCP:
6641 l4_protocol = IPPROTO_TCP;
6643 case RTE_FLOW_ITEM_TYPE_UDP:
6644 l4_protocol = IPPROTO_UDP;
6646 case RTE_FLOW_ITEM_TYPE_IPV4:
6647 if (item->mask && item->spec) {
6648 const struct rte_flow_item_ipv4 *mask, *spec;
6650 mask = (typeof(mask))item->mask;
6651 spec = (typeof(spec))item->spec;
6652 l4_protocol = mask->hdr.next_proto_id &
6653 spec->hdr.next_proto_id;
6654 if (l4_protocol == IPPROTO_TCP ||
6655 l4_protocol == IPPROTO_UDP)
6659 case RTE_FLOW_ITEM_TYPE_IPV6:
6660 if (item->mask && item->spec) {
6661 const struct rte_flow_item_ipv6 *mask, *spec;
6662 mask = (typeof(mask))item->mask;
6663 spec = (typeof(spec))item->spec;
6664 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6665 if (l4_protocol == IPPROTO_TCP ||
6666 l4_protocol == IPPROTO_UDP)
6679 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6680 const struct rte_flow_item *rule_items,
6681 const struct rte_flow_item *integrity_item,
6682 struct rte_flow_error *error)
6684 struct mlx5_priv *priv = dev->data->dev_private;
6685 const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6686 const struct rte_flow_item_integrity *mask = (typeof(mask))
6687 integrity_item->mask;
6688 const struct rte_flow_item_integrity *spec = (typeof(spec))
6689 integrity_item->spec;
6692 if (!priv->config.hca_attr.pkt_integrity_match)
6693 return rte_flow_error_set(error, ENOTSUP,
6694 RTE_FLOW_ERROR_TYPE_ITEM,
6696 "packet integrity integrity_item not supported");
6698 mask = &rte_flow_item_integrity_mask;
6699 if (!mlx5_validate_integrity_item(mask))
6700 return rte_flow_error_set(error, ENOTSUP,
6701 RTE_FLOW_ERROR_TYPE_ITEM,
6703 "unsupported integrity filter");
6704 tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6705 if (spec->level > 1) {
6707 return rte_flow_error_set(error, ENOTSUP,
6708 RTE_FLOW_ERROR_TYPE_ITEM,
6710 "missing tunnel item");
6712 end_item = mlx5_find_end_item(tunnel_item);
6714 end_item = tunnel_item ? tunnel_item :
6715 mlx5_find_end_item(integrity_item);
6717 if (mask->l3_ok || mask->ipv4_csum_ok) {
6718 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6720 return rte_flow_error_set(error, EINVAL,
6721 RTE_FLOW_ERROR_TYPE_ITEM,
6723 "missing L3 protocol");
6725 if (mask->l4_ok || mask->l4_csum_ok) {
6726 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6728 return rte_flow_error_set(error, EINVAL,
6729 RTE_FLOW_ERROR_TYPE_ITEM,
6731 "missing L4 protocol");
6737 * Internal validation function. For validating both actions and items.
6740 * Pointer to the rte_eth_dev structure.
6742 * Pointer to the flow attributes.
6744 * Pointer to the list of items.
6745 * @param[in] actions
6746 * Pointer to the list of actions.
6747 * @param[in] external
6748 * This flow rule is created by request external to PMD.
6749 * @param[in] hairpin
6750 * Number of hairpin TX actions, 0 means classic flow.
6752 * Pointer to the error structure.
6755 * 0 on success, a negative errno value otherwise and rte_errno is set.
6758 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6759 const struct rte_flow_item items[],
6760 const struct rte_flow_action actions[],
6761 bool external, int hairpin, struct rte_flow_error *error)
6764 uint64_t action_flags = 0;
6765 uint64_t item_flags = 0;
6766 uint64_t last_item = 0;
6767 uint8_t next_protocol = 0xff;
6768 uint16_t ether_type = 0;
6770 uint8_t item_ipv6_proto = 0;
6771 int fdb_mirror_limit = 0;
6772 int modify_after_mirror = 0;
6773 const struct rte_flow_item *geneve_item = NULL;
6774 const struct rte_flow_item *gre_item = NULL;
6775 const struct rte_flow_item *gtp_item = NULL;
6776 const struct rte_flow_action_raw_decap *decap;
6777 const struct rte_flow_action_raw_encap *encap;
6778 const struct rte_flow_action_rss *rss = NULL;
6779 const struct rte_flow_action_rss *sample_rss = NULL;
6780 const struct rte_flow_action_count *sample_count = NULL;
6781 const struct rte_flow_item_tcp nic_tcp_mask = {
6784 .src_port = RTE_BE16(UINT16_MAX),
6785 .dst_port = RTE_BE16(UINT16_MAX),
6788 const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6791 "\xff\xff\xff\xff\xff\xff\xff\xff"
6792 "\xff\xff\xff\xff\xff\xff\xff\xff",
6794 "\xff\xff\xff\xff\xff\xff\xff\xff"
6795 "\xff\xff\xff\xff\xff\xff\xff\xff",
6796 .vtc_flow = RTE_BE32(0xffffffff),
6802 const struct rte_flow_item_ecpri nic_ecpri_mask = {
6806 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6810 .dummy[0] = 0xffffffff,
6813 struct mlx5_priv *priv = dev->data->dev_private;
6814 struct mlx5_dev_config *dev_conf = &priv->config;
6815 uint16_t queue_index = 0xFFFF;
6816 const struct rte_flow_item_vlan *vlan_m = NULL;
6817 uint32_t rw_act_num = 0;
6819 const struct mlx5_flow_tunnel *tunnel;
6820 enum mlx5_tof_rule_type tof_rule_type;
6821 struct flow_grp_info grp_info = {
6822 .external = !!external,
6823 .transfer = !!attr->transfer,
6824 .fdb_def_rule = !!priv->fdb_def_rule,
6825 .std_tbl_fix = true,
6827 const struct rte_eth_hairpin_conf *conf;
6828 const struct rte_flow_item *rule_items = items;
6829 const struct rte_flow_item *port_id_item = NULL;
6830 bool def_policy = false;
6831 uint16_t udp_dport = 0;
6835 tunnel = is_tunnel_offload_active(dev) ?
6836 mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6838 if (priv->representor)
6839 return rte_flow_error_set
6841 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6842 NULL, "decap not supported for VF representor");
6843 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6844 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6845 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6846 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6847 MLX5_FLOW_ACTION_DECAP;
6848 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6849 (dev, attr, tunnel, tof_rule_type);
6851 ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6854 is_root = (uint64_t)ret;
6855 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6856 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6857 int type = items->type;
6859 if (!mlx5_flow_os_item_supported(type))
6860 return rte_flow_error_set(error, ENOTSUP,
6861 RTE_FLOW_ERROR_TYPE_ITEM,
6862 NULL, "item not supported");
6864 case RTE_FLOW_ITEM_TYPE_VOID:
6866 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6867 ret = flow_dv_validate_item_port_id
6868 (dev, items, attr, item_flags, error);
6871 last_item = MLX5_FLOW_ITEM_PORT_ID;
6872 port_id_item = items;
6874 case RTE_FLOW_ITEM_TYPE_ETH:
6875 ret = mlx5_flow_validate_item_eth(items, item_flags,
6879 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6880 MLX5_FLOW_LAYER_OUTER_L2;
6881 if (items->mask != NULL && items->spec != NULL) {
6883 ((const struct rte_flow_item_eth *)
6886 ((const struct rte_flow_item_eth *)
6888 ether_type = rte_be_to_cpu_16(ether_type);
6893 case RTE_FLOW_ITEM_TYPE_VLAN:
6894 ret = flow_dv_validate_item_vlan(items, item_flags,
6898 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6899 MLX5_FLOW_LAYER_OUTER_VLAN;
6900 if (items->mask != NULL && items->spec != NULL) {
6902 ((const struct rte_flow_item_vlan *)
6903 items->spec)->inner_type;
6905 ((const struct rte_flow_item_vlan *)
6906 items->mask)->inner_type;
6907 ether_type = rte_be_to_cpu_16(ether_type);
6911 /* Store outer VLAN mask for of_push_vlan action. */
6913 vlan_m = items->mask;
6915 case RTE_FLOW_ITEM_TYPE_IPV4:
6916 mlx5_flow_tunnel_ip_check(items, next_protocol,
6917 &item_flags, &tunnel);
6918 ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
6919 last_item, ether_type,
6923 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6924 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6925 if (items->mask != NULL &&
6926 ((const struct rte_flow_item_ipv4 *)
6927 items->mask)->hdr.next_proto_id) {
6929 ((const struct rte_flow_item_ipv4 *)
6930 (items->spec))->hdr.next_proto_id;
6932 ((const struct rte_flow_item_ipv4 *)
6933 (items->mask))->hdr.next_proto_id;
6935 /* Reset for inner layer. */
6936 next_protocol = 0xff;
6939 case RTE_FLOW_ITEM_TYPE_IPV6:
6940 mlx5_flow_tunnel_ip_check(items, next_protocol,
6941 &item_flags, &tunnel);
6942 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6949 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6950 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6951 if (items->mask != NULL &&
6952 ((const struct rte_flow_item_ipv6 *)
6953 items->mask)->hdr.proto) {
6955 ((const struct rte_flow_item_ipv6 *)
6956 items->spec)->hdr.proto;
6958 ((const struct rte_flow_item_ipv6 *)
6959 items->spec)->hdr.proto;
6961 ((const struct rte_flow_item_ipv6 *)
6962 items->mask)->hdr.proto;
6964 /* Reset for inner layer. */
6965 next_protocol = 0xff;
6968 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6969 ret = flow_dv_validate_item_ipv6_frag_ext(items,
6974 last_item = tunnel ?
6975 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6976 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6977 if (items->mask != NULL &&
6978 ((const struct rte_flow_item_ipv6_frag_ext *)
6979 items->mask)->hdr.next_header) {
6981 ((const struct rte_flow_item_ipv6_frag_ext *)
6982 items->spec)->hdr.next_header;
6984 ((const struct rte_flow_item_ipv6_frag_ext *)
6985 items->mask)->hdr.next_header;
6987 /* Reset for inner layer. */
6988 next_protocol = 0xff;
6991 case RTE_FLOW_ITEM_TYPE_TCP:
6992 ret = mlx5_flow_validate_item_tcp
6999 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7000 MLX5_FLOW_LAYER_OUTER_L4_TCP;
7002 case RTE_FLOW_ITEM_TYPE_UDP:
7003 ret = mlx5_flow_validate_item_udp(items, item_flags,
7006 const struct rte_flow_item_udp *spec = items->spec;
7007 const struct rte_flow_item_udp *mask = items->mask;
7009 mask = &rte_flow_item_udp_mask;
7011 udp_dport = rte_be_to_cpu_16
7012 (spec->hdr.dst_port &
7013 mask->hdr.dst_port);
7016 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7017 MLX5_FLOW_LAYER_OUTER_L4_UDP;
7019 case RTE_FLOW_ITEM_TYPE_GRE:
7020 ret = mlx5_flow_validate_item_gre(items, item_flags,
7021 next_protocol, error);
7025 last_item = MLX5_FLOW_LAYER_GRE;
7027 case RTE_FLOW_ITEM_TYPE_NVGRE:
7028 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7033 last_item = MLX5_FLOW_LAYER_NVGRE;
7035 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7036 ret = mlx5_flow_validate_item_gre_key
7037 (items, item_flags, gre_item, error);
7040 last_item = MLX5_FLOW_LAYER_GRE_KEY;
7042 case RTE_FLOW_ITEM_TYPE_VXLAN:
7043 ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7048 last_item = MLX5_FLOW_LAYER_VXLAN;
7050 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7051 ret = mlx5_flow_validate_item_vxlan_gpe(items,
7056 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7058 case RTE_FLOW_ITEM_TYPE_GENEVE:
7059 ret = mlx5_flow_validate_item_geneve(items,
7064 geneve_item = items;
7065 last_item = MLX5_FLOW_LAYER_GENEVE;
7067 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7068 ret = mlx5_flow_validate_item_geneve_opt(items,
7075 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7077 case RTE_FLOW_ITEM_TYPE_MPLS:
7078 ret = mlx5_flow_validate_item_mpls(dev, items,
7083 last_item = MLX5_FLOW_LAYER_MPLS;
7086 case RTE_FLOW_ITEM_TYPE_MARK:
7087 ret = flow_dv_validate_item_mark(dev, items, attr,
7091 last_item = MLX5_FLOW_ITEM_MARK;
7093 case RTE_FLOW_ITEM_TYPE_META:
7094 ret = flow_dv_validate_item_meta(dev, items, attr,
7098 last_item = MLX5_FLOW_ITEM_METADATA;
7100 case RTE_FLOW_ITEM_TYPE_ICMP:
7101 ret = mlx5_flow_validate_item_icmp(items, item_flags,
7106 last_item = MLX5_FLOW_LAYER_ICMP;
7108 case RTE_FLOW_ITEM_TYPE_ICMP6:
7109 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7114 item_ipv6_proto = IPPROTO_ICMPV6;
7115 last_item = MLX5_FLOW_LAYER_ICMP6;
7117 case RTE_FLOW_ITEM_TYPE_TAG:
7118 ret = flow_dv_validate_item_tag(dev, items,
7122 last_item = MLX5_FLOW_ITEM_TAG;
7124 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7125 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7127 case RTE_FLOW_ITEM_TYPE_GTP:
7128 ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7133 last_item = MLX5_FLOW_LAYER_GTP;
7135 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7136 ret = flow_dv_validate_item_gtp_psc(items, last_item,
7141 last_item = MLX5_FLOW_LAYER_GTP_PSC;
7143 case RTE_FLOW_ITEM_TYPE_ECPRI:
7144 /* Capacity will be checked in the translate stage. */
7145 ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7152 last_item = MLX5_FLOW_LAYER_ECPRI;
7154 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7155 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7156 return rte_flow_error_set
7158 RTE_FLOW_ERROR_TYPE_ITEM,
7159 NULL, "multiple integrity items not supported");
7160 ret = flow_dv_validate_item_integrity(dev, rule_items,
7164 last_item = MLX5_FLOW_ITEM_INTEGRITY;
7166 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7167 ret = flow_dv_validate_item_aso_ct(dev, items,
7168 &item_flags, error);
7172 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7173 /* tunnel offload item was processed before
7174 * list it here as a supported type
7178 return rte_flow_error_set(error, ENOTSUP,
7179 RTE_FLOW_ERROR_TYPE_ITEM,
7180 NULL, "item not supported");
7182 item_flags |= last_item;
7184 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7185 int type = actions->type;
7186 bool shared_count = false;
7188 if (!mlx5_flow_os_action_supported(type))
7189 return rte_flow_error_set(error, ENOTSUP,
7190 RTE_FLOW_ERROR_TYPE_ACTION,
7192 "action not supported");
7193 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7194 return rte_flow_error_set(error, ENOTSUP,
7195 RTE_FLOW_ERROR_TYPE_ACTION,
7196 actions, "too many actions");
7198 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7199 return rte_flow_error_set(error, ENOTSUP,
7200 RTE_FLOW_ERROR_TYPE_ACTION,
7201 NULL, "meter action with policy "
7202 "must be the last action");
7204 case RTE_FLOW_ACTION_TYPE_VOID:
7206 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7207 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7208 ret = flow_dv_validate_action_port_id(dev,
7215 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7218 case RTE_FLOW_ACTION_TYPE_FLAG:
7219 ret = flow_dv_validate_action_flag(dev, action_flags,
7223 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7224 /* Count all modify-header actions as one. */
7225 if (!(action_flags &
7226 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7228 action_flags |= MLX5_FLOW_ACTION_FLAG |
7229 MLX5_FLOW_ACTION_MARK_EXT;
7230 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7231 modify_after_mirror = 1;
7234 action_flags |= MLX5_FLOW_ACTION_FLAG;
7237 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7239 case RTE_FLOW_ACTION_TYPE_MARK:
7240 ret = flow_dv_validate_action_mark(dev, actions,
7245 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7246 /* Count all modify-header actions as one. */
7247 if (!(action_flags &
7248 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7250 action_flags |= MLX5_FLOW_ACTION_MARK |
7251 MLX5_FLOW_ACTION_MARK_EXT;
7252 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7253 modify_after_mirror = 1;
7255 action_flags |= MLX5_FLOW_ACTION_MARK;
7258 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7260 case RTE_FLOW_ACTION_TYPE_SET_META:
7261 ret = flow_dv_validate_action_set_meta(dev, actions,
7266 /* Count all modify-header actions as one action. */
7267 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7269 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7270 modify_after_mirror = 1;
7271 action_flags |= MLX5_FLOW_ACTION_SET_META;
7272 rw_act_num += MLX5_ACT_NUM_SET_META;
7274 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7275 ret = flow_dv_validate_action_set_tag(dev, actions,
7280 /* Count all modify-header actions as one action. */
7281 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7283 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7284 modify_after_mirror = 1;
7285 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7286 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7288 case RTE_FLOW_ACTION_TYPE_DROP:
7289 ret = mlx5_flow_validate_action_drop(action_flags,
7293 action_flags |= MLX5_FLOW_ACTION_DROP;
7296 case RTE_FLOW_ACTION_TYPE_QUEUE:
7297 ret = mlx5_flow_validate_action_queue(actions,
7302 queue_index = ((const struct rte_flow_action_queue *)
7303 (actions->conf))->index;
7304 action_flags |= MLX5_FLOW_ACTION_QUEUE;
7307 case RTE_FLOW_ACTION_TYPE_RSS:
7308 rss = actions->conf;
7309 ret = mlx5_flow_validate_action_rss(actions,
7315 if (rss && sample_rss &&
7316 (sample_rss->level != rss->level ||
7317 sample_rss->types != rss->types))
7318 return rte_flow_error_set(error, ENOTSUP,
7319 RTE_FLOW_ERROR_TYPE_ACTION,
7321 "Can't use the different RSS types "
7322 "or level in the same flow");
7323 if (rss != NULL && rss->queue_num)
7324 queue_index = rss->queue[0];
7325 action_flags |= MLX5_FLOW_ACTION_RSS;
7328 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7330 mlx5_flow_validate_action_default_miss(action_flags,
7334 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7337 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7338 shared_count = true;
7340 case RTE_FLOW_ACTION_TYPE_COUNT:
7341 ret = flow_dv_validate_action_count(dev, shared_count,
7346 action_flags |= MLX5_FLOW_ACTION_COUNT;
7349 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7350 if (flow_dv_validate_action_pop_vlan(dev,
7356 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7357 modify_after_mirror = 1;
7358 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7361 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7362 ret = flow_dv_validate_action_push_vlan(dev,
7369 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7370 modify_after_mirror = 1;
7371 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7374 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7375 ret = flow_dv_validate_action_set_vlan_pcp
7376 (action_flags, actions, error);
7379 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7380 modify_after_mirror = 1;
7381 /* Count PCP with push_vlan command. */
7382 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7384 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7385 ret = flow_dv_validate_action_set_vlan_vid
7386 (item_flags, action_flags,
7390 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7391 modify_after_mirror = 1;
7392 /* Count VID with push_vlan command. */
7393 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7394 rw_act_num += MLX5_ACT_NUM_MDF_VID;
7396 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7397 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7398 ret = flow_dv_validate_action_l2_encap(dev,
7404 action_flags |= MLX5_FLOW_ACTION_ENCAP;
7407 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7408 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7409 ret = flow_dv_validate_action_decap(dev, action_flags,
7410 actions, item_flags,
7414 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7415 modify_after_mirror = 1;
7416 action_flags |= MLX5_FLOW_ACTION_DECAP;
7419 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7420 ret = flow_dv_validate_action_raw_encap_decap
7421 (dev, NULL, actions->conf, attr, &action_flags,
7422 &actions_n, actions, item_flags, error);
7426 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7427 decap = actions->conf;
7428 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7430 if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7434 encap = actions->conf;
7436 ret = flow_dv_validate_action_raw_encap_decap
7438 decap ? decap : &empty_decap, encap,
7439 attr, &action_flags, &actions_n,
7440 actions, item_flags, error);
7443 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7444 (action_flags & MLX5_FLOW_ACTION_DECAP))
7445 modify_after_mirror = 1;
7447 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7448 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7449 ret = flow_dv_validate_action_modify_mac(action_flags,
7455 /* Count all modify-header actions as one action. */
7456 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7458 action_flags |= actions->type ==
7459 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7460 MLX5_FLOW_ACTION_SET_MAC_SRC :
7461 MLX5_FLOW_ACTION_SET_MAC_DST;
7462 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7463 modify_after_mirror = 1;
7465 * Even if the source and destination MAC addresses have
7466 * overlap in the header with 4B alignment, the convert
7467 * function will handle them separately and 4 SW actions
7468 * will be created. And 2 actions will be added each
7469 * time no matter how many bytes of address will be set.
7471 rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7473 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7474 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7475 ret = flow_dv_validate_action_modify_ipv4(action_flags,
7481 /* Count all modify-header actions as one action. */
7482 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7484 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7485 modify_after_mirror = 1;
7486 action_flags |= actions->type ==
7487 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7488 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7489 MLX5_FLOW_ACTION_SET_IPV4_DST;
7490 rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7492 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7493 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7494 ret = flow_dv_validate_action_modify_ipv6(action_flags,
7500 if (item_ipv6_proto == IPPROTO_ICMPV6)
7501 return rte_flow_error_set(error, ENOTSUP,
7502 RTE_FLOW_ERROR_TYPE_ACTION,
7504 "Can't change header "
7505 "with ICMPv6 proto");
7506 /* Count all modify-header actions as one action. */
7507 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7509 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7510 modify_after_mirror = 1;
7511 action_flags |= actions->type ==
7512 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7513 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7514 MLX5_FLOW_ACTION_SET_IPV6_DST;
7515 rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7517 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7518 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7519 ret = flow_dv_validate_action_modify_tp(action_flags,
7525 /* Count all modify-header actions as one action. */
7526 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7528 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7529 modify_after_mirror = 1;
7530 action_flags |= actions->type ==
7531 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7532 MLX5_FLOW_ACTION_SET_TP_SRC :
7533 MLX5_FLOW_ACTION_SET_TP_DST;
7534 rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7536 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7537 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7538 ret = flow_dv_validate_action_modify_ttl(action_flags,
7544 /* Count all modify-header actions as one action. */
7545 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7547 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7548 modify_after_mirror = 1;
7549 action_flags |= actions->type ==
7550 RTE_FLOW_ACTION_TYPE_SET_TTL ?
7551 MLX5_FLOW_ACTION_SET_TTL :
7552 MLX5_FLOW_ACTION_DEC_TTL;
7553 rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7555 case RTE_FLOW_ACTION_TYPE_JUMP:
7556 ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7562 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7564 return rte_flow_error_set(error, EINVAL,
7565 RTE_FLOW_ERROR_TYPE_ACTION,
7567 "sample and jump action combination is not supported");
7569 action_flags |= MLX5_FLOW_ACTION_JUMP;
7571 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7572 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7573 ret = flow_dv_validate_action_modify_tcp_seq
7580 /* Count all modify-header actions as one action. */
7581 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7583 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7584 modify_after_mirror = 1;
7585 action_flags |= actions->type ==
7586 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7587 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7588 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7589 rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7591 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7592 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7593 ret = flow_dv_validate_action_modify_tcp_ack
7600 /* Count all modify-header actions as one action. */
7601 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7603 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7604 modify_after_mirror = 1;
7605 action_flags |= actions->type ==
7606 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7607 MLX5_FLOW_ACTION_INC_TCP_ACK :
7608 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7609 rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7611 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7613 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7614 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7615 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7617 case RTE_FLOW_ACTION_TYPE_METER:
7618 ret = mlx5_flow_validate_action_meter(dev,
7626 action_flags |= MLX5_FLOW_ACTION_METER;
7629 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7631 /* Meter action will add one more TAG action. */
7632 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7634 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7635 if (!attr->transfer && !attr->group)
7636 return rte_flow_error_set(error, ENOTSUP,
7637 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7639 "Shared ASO age action is not supported for group 0");
7640 if (action_flags & MLX5_FLOW_ACTION_AGE)
7641 return rte_flow_error_set
7643 RTE_FLOW_ERROR_TYPE_ACTION,
7645 "duplicate age actions set");
7646 action_flags |= MLX5_FLOW_ACTION_AGE;
7649 case RTE_FLOW_ACTION_TYPE_AGE:
7650 ret = flow_dv_validate_action_age(action_flags,
7656 * Validate the regular AGE action (using counter)
7657 * mutual exclusion with share counter actions.
7659 if (!priv->sh->flow_hit_aso_en) {
7661 return rte_flow_error_set
7663 RTE_FLOW_ERROR_TYPE_ACTION,
7665 "old age and shared count combination is not supported");
7667 return rte_flow_error_set
7669 RTE_FLOW_ERROR_TYPE_ACTION,
7671 "old age action and count must be in the same sub flow");
7673 action_flags |= MLX5_FLOW_ACTION_AGE;
7676 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7677 ret = flow_dv_validate_action_modify_ipv4_dscp
7684 /* Count all modify-header actions as one action. */
7685 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7687 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7688 modify_after_mirror = 1;
7689 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7690 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7692 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7693 ret = flow_dv_validate_action_modify_ipv6_dscp
7700 /* Count all modify-header actions as one action. */
7701 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7703 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7704 modify_after_mirror = 1;
7705 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7706 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7708 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7709 ret = flow_dv_validate_action_sample(&action_flags,
7718 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7721 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7722 ret = flow_dv_validate_action_modify_field(dev,
7729 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7730 modify_after_mirror = 1;
7731 /* Count all modify-header actions as one action. */
7732 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7734 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7737 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7738 ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7743 action_flags |= MLX5_FLOW_ACTION_CT;
7745 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7746 /* tunnel offload action was processed before
7747 * list it here as a supported type
7751 return rte_flow_error_set(error, ENOTSUP,
7752 RTE_FLOW_ERROR_TYPE_ACTION,
7754 "action not supported");
7758 * Validate actions in flow rules
7759 * - Explicit decap action is prohibited by the tunnel offload API.
7760 * - Drop action in tunnel steer rule is prohibited by the API.
7761 * - Application cannot use MARK action because it's value can mask
7762 * tunnel default miss nitification.
7763 * - JUMP in tunnel match rule has no support in current PMD
7765 * - TAG & META are reserved for future uses.
7767 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7768 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP |
7769 MLX5_FLOW_ACTION_MARK |
7770 MLX5_FLOW_ACTION_SET_TAG |
7771 MLX5_FLOW_ACTION_SET_META |
7772 MLX5_FLOW_ACTION_DROP;
7774 if (action_flags & bad_actions_mask)
7775 return rte_flow_error_set
7777 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7778 "Invalid RTE action in tunnel "
7780 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7781 return rte_flow_error_set
7783 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7784 "tunnel set decap rule must terminate "
7787 return rte_flow_error_set
7789 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7790 "tunnel flows for ingress traffic only");
7792 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7793 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP |
7794 MLX5_FLOW_ACTION_MARK |
7795 MLX5_FLOW_ACTION_SET_TAG |
7796 MLX5_FLOW_ACTION_SET_META;
7798 if (action_flags & bad_actions_mask)
7799 return rte_flow_error_set
7801 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7802 "Invalid RTE action in tunnel "
7806 * Validate the drop action mutual exclusion with other actions.
7807 * Drop action is mutually-exclusive with any other action, except for
7809 * Drop action compatibility with tunnel offload was already validated.
7811 if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7812 MLX5_FLOW_ACTION_TUNNEL_MATCH));
7813 else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7814 (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7815 return rte_flow_error_set(error, EINVAL,
7816 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7817 "Drop action is mutually-exclusive "
7818 "with any other action, except for "
7820 /* Eswitch has few restrictions on using items and actions */
7821 if (attr->transfer) {
7822 if (!mlx5_flow_ext_mreg_supported(dev) &&
7823 action_flags & MLX5_FLOW_ACTION_FLAG)
7824 return rte_flow_error_set(error, ENOTSUP,
7825 RTE_FLOW_ERROR_TYPE_ACTION,
7827 "unsupported action FLAG");
7828 if (!mlx5_flow_ext_mreg_supported(dev) &&
7829 action_flags & MLX5_FLOW_ACTION_MARK)
7830 return rte_flow_error_set(error, ENOTSUP,
7831 RTE_FLOW_ERROR_TYPE_ACTION,
7833 "unsupported action MARK");
7834 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7835 return rte_flow_error_set(error, ENOTSUP,
7836 RTE_FLOW_ERROR_TYPE_ACTION,
7838 "unsupported action QUEUE");
7839 if (action_flags & MLX5_FLOW_ACTION_RSS)
7840 return rte_flow_error_set(error, ENOTSUP,
7841 RTE_FLOW_ERROR_TYPE_ACTION,
7843 "unsupported action RSS");
7844 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7845 return rte_flow_error_set(error, EINVAL,
7846 RTE_FLOW_ERROR_TYPE_ACTION,
7848 "no fate action is found");
7850 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7851 return rte_flow_error_set(error, EINVAL,
7852 RTE_FLOW_ERROR_TYPE_ACTION,
7854 "no fate action is found");
7857 * Continue validation for Xcap and VLAN actions.
7858 * If hairpin is working in explicit TX rule mode, there is no actions
7859 * splitting and the validation of hairpin ingress flow should be the
7860 * same as other standard flows.
7862 if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7863 MLX5_FLOW_VLAN_ACTIONS)) &&
7864 (queue_index == 0xFFFF ||
7865 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7866 ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7867 conf->tx_explicit != 0))) {
7868 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7869 MLX5_FLOW_XCAP_ACTIONS)
7870 return rte_flow_error_set(error, ENOTSUP,
7871 RTE_FLOW_ERROR_TYPE_ACTION,
7872 NULL, "encap and decap "
7873 "combination aren't supported");
7874 if (!attr->transfer && attr->ingress) {
7875 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7876 return rte_flow_error_set
7878 RTE_FLOW_ERROR_TYPE_ACTION,
7879 NULL, "encap is not supported"
7880 " for ingress traffic");
7881 else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7882 return rte_flow_error_set
7884 RTE_FLOW_ERROR_TYPE_ACTION,
7885 NULL, "push VLAN action not "
7886 "supported for ingress");
7887 else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7888 MLX5_FLOW_VLAN_ACTIONS)
7889 return rte_flow_error_set
7891 RTE_FLOW_ERROR_TYPE_ACTION,
7892 NULL, "no support for "
7893 "multiple VLAN actions");
7896 if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7897 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7898 ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7900 return rte_flow_error_set
7902 RTE_FLOW_ERROR_TYPE_ACTION,
7903 NULL, "fate action not supported for "
7904 "meter with policy");
7906 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7907 return rte_flow_error_set
7909 RTE_FLOW_ERROR_TYPE_ACTION,
7910 NULL, "modify header action in egress "
7911 "cannot be done before meter action");
7912 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7913 return rte_flow_error_set
7915 RTE_FLOW_ERROR_TYPE_ACTION,
7916 NULL, "encap action in egress "
7917 "cannot be done before meter action");
7918 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7919 return rte_flow_error_set
7921 RTE_FLOW_ERROR_TYPE_ACTION,
7922 NULL, "push vlan action in egress "
7923 "cannot be done before meter action");
7927 * Hairpin flow will add one more TAG action in TX implicit mode.
7928 * In TX explicit mode, there will be no hairpin flow ID.
7931 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7932 /* extra metadata enabled: one more TAG action will be add. */
7933 if (dev_conf->dv_flow_en &&
7934 dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7935 mlx5_flow_ext_mreg_supported(dev))
7936 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7938 flow_dv_modify_hdr_action_max(dev, is_root)) {
7939 return rte_flow_error_set(error, ENOTSUP,
7940 RTE_FLOW_ERROR_TYPE_ACTION,
7941 NULL, "too many header modify"
7942 " actions to support");
7944 /* Eswitch egress mirror and modify flow has limitation on CX5 */
7945 if (fdb_mirror_limit && modify_after_mirror)
7946 return rte_flow_error_set(error, EINVAL,
7947 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7948 "sample before modify action is not supported");
7953 * Internal preparation function. Allocates the DV flow size,
7954 * this size is constant.
7957 * Pointer to the rte_eth_dev structure.
7959 * Pointer to the flow attributes.
7961 * Pointer to the list of items.
7962 * @param[in] actions
7963 * Pointer to the list of actions.
7965 * Pointer to the error structure.
7968 * Pointer to mlx5_flow object on success,
7969 * otherwise NULL and rte_errno is set.
7971 static struct mlx5_flow *
7972 flow_dv_prepare(struct rte_eth_dev *dev,
7973 const struct rte_flow_attr *attr __rte_unused,
7974 const struct rte_flow_item items[] __rte_unused,
7975 const struct rte_flow_action actions[] __rte_unused,
7976 struct rte_flow_error *error)
7978 uint32_t handle_idx = 0;
7979 struct mlx5_flow *dev_flow;
7980 struct mlx5_flow_handle *dev_handle;
7981 struct mlx5_priv *priv = dev->data->dev_private;
7982 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
7985 wks->skip_matcher_reg = 0;
7987 wks->final_policy = NULL;
7988 /* In case of corrupting the memory. */
7989 if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
7990 rte_flow_error_set(error, ENOSPC,
7991 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7992 "not free temporary device flow");
7995 dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7998 rte_flow_error_set(error, ENOMEM,
7999 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8000 "not enough memory to create flow handle");
8003 MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8004 dev_flow = &wks->flows[wks->flow_idx++];
8005 memset(dev_flow, 0, sizeof(*dev_flow));
8006 dev_flow->handle = dev_handle;
8007 dev_flow->handle_idx = handle_idx;
8008 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8009 dev_flow->ingress = attr->ingress;
8010 dev_flow->dv.transfer = attr->transfer;
8014 #ifdef RTE_LIBRTE_MLX5_DEBUG
8016 * Sanity check for match mask and value. Similar to check_valid_spec() in
8017 * kernel driver. If unmasked bit is present in value, it returns failure.
8020 * pointer to match mask buffer.
8021 * @param match_value
8022 * pointer to match value buffer.
8025 * 0 if valid, -EINVAL otherwise.
8028 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8030 uint8_t *m = match_mask;
8031 uint8_t *v = match_value;
8034 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8037 "match_value differs from match_criteria"
8038 " %p[%u] != %p[%u]",
8039 match_value, i, match_mask, i);
8048 * Add match of ip_version.
8052 * @param[in] headers_v
8053 * Values header pointer.
8054 * @param[in] headers_m
8055 * Masks header pointer.
8056 * @param[in] ip_version
8057 * The IP version to set.
8060 flow_dv_set_match_ip_version(uint32_t group,
8066 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8068 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8070 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8071 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8072 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8076 * Add Ethernet item to matcher and to the value.
8078 * @param[in, out] matcher
8080 * @param[in, out] key
8081 * Flow matcher value.
8083 * Flow pattern to translate.
8085 * Item is inner pattern.
8088 flow_dv_translate_item_eth(void *matcher, void *key,
8089 const struct rte_flow_item *item, int inner,
8092 const struct rte_flow_item_eth *eth_m = item->mask;
8093 const struct rte_flow_item_eth *eth_v = item->spec;
8094 const struct rte_flow_item_eth nic_mask = {
8095 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8096 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8097 .type = RTE_BE16(0xffff),
8110 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8112 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8114 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8116 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8118 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8119 ð_m->dst, sizeof(eth_m->dst));
8120 /* The value must be in the range of the mask. */
8121 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8122 for (i = 0; i < sizeof(eth_m->dst); ++i)
8123 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8124 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8125 ð_m->src, sizeof(eth_m->src));
8126 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8127 /* The value must be in the range of the mask. */
8128 for (i = 0; i < sizeof(eth_m->dst); ++i)
8129 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8131 * HW supports match on one Ethertype, the Ethertype following the last
8132 * VLAN tag of the packet (see PRM).
8133 * Set match on ethertype only if ETH header is not followed by VLAN.
8134 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8135 * ethertype, and use ip_version field instead.
8136 * eCPRI over Ether layer will use type value 0xAEFE.
8138 if (eth_m->type == 0xFFFF) {
8139 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8140 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8141 switch (eth_v->type) {
8142 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8143 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8145 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8146 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8147 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8149 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8150 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8152 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8153 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8159 if (eth_m->has_vlan) {
8160 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8161 if (eth_v->has_vlan) {
8163 * Here, when also has_more_vlan field in VLAN item is
8164 * not set, only single-tagged packets will be matched.
8166 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8170 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8171 rte_be_to_cpu_16(eth_m->type));
8172 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8173 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8177 * Add VLAN item to matcher and to the value.
8179 * @param[in, out] dev_flow
8181 * @param[in, out] matcher
8183 * @param[in, out] key
8184 * Flow matcher value.
8186 * Flow pattern to translate.
8188 * Item is inner pattern.
8191 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8192 void *matcher, void *key,
8193 const struct rte_flow_item *item,
8194 int inner, uint32_t group)
8196 const struct rte_flow_item_vlan *vlan_m = item->mask;
8197 const struct rte_flow_item_vlan *vlan_v = item->spec;
8204 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8206 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8208 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8210 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8212 * This is workaround, masks are not supported,
8213 * and pre-validated.
8216 dev_flow->handle->vf_vlan.tag =
8217 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8220 * When VLAN item exists in flow, mark packet as tagged,
8221 * even if TCI is not specified.
8223 if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8224 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8225 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8230 vlan_m = &rte_flow_item_vlan_mask;
8231 tci_m = rte_be_to_cpu_16(vlan_m->tci);
8232 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8233 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8234 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8235 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8236 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8237 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8238 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8240 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8241 * ethertype, and use ip_version field instead.
8243 if (vlan_m->inner_type == 0xFFFF) {
8244 switch (vlan_v->inner_type) {
8245 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8246 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8247 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8248 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8250 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8251 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8253 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8254 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8260 if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8261 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8262 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8263 /* Only one vlan_tag bit can be set. */
8264 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8267 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8268 rte_be_to_cpu_16(vlan_m->inner_type));
8269 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8270 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8274 * Add IPV4 item to matcher and to the value.
8276 * @param[in, out] matcher
8278 * @param[in, out] key
8279 * Flow matcher value.
8281 * Flow pattern to translate.
8283 * Item is inner pattern.
8285 * The group to insert the rule.
8288 flow_dv_translate_item_ipv4(void *matcher, void *key,
8289 const struct rte_flow_item *item,
8290 int inner, uint32_t group)
8292 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8293 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8294 const struct rte_flow_item_ipv4 nic_mask = {
8296 .src_addr = RTE_BE32(0xffffffff),
8297 .dst_addr = RTE_BE32(0xffffffff),
8298 .type_of_service = 0xff,
8299 .next_proto_id = 0xff,
8300 .time_to_live = 0xff,
8307 uint8_t tos, ihl_m, ihl_v;
8310 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8312 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8314 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8316 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8318 flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8323 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8324 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8325 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8326 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8327 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8328 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8329 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8330 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8331 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8332 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8333 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8334 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8335 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8336 ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8337 ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8338 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8339 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8340 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8341 ipv4_m->hdr.type_of_service);
8342 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8343 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8344 ipv4_m->hdr.type_of_service >> 2);
8345 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8346 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8347 ipv4_m->hdr.next_proto_id);
8348 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8349 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8350 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8351 ipv4_m->hdr.time_to_live);
8352 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8353 ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8354 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8355 !!(ipv4_m->hdr.fragment_offset));
8356 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8357 !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8361 * Add IPV6 item to matcher and to the value.
8363 * @param[in, out] matcher
8365 * @param[in, out] key
8366 * Flow matcher value.
8368 * Flow pattern to translate.
8370 * Item is inner pattern.
8372 * The group to insert the rule.
8375 flow_dv_translate_item_ipv6(void *matcher, void *key,
8376 const struct rte_flow_item *item,
8377 int inner, uint32_t group)
8379 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8380 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8381 const struct rte_flow_item_ipv6 nic_mask = {
8384 "\xff\xff\xff\xff\xff\xff\xff\xff"
8385 "\xff\xff\xff\xff\xff\xff\xff\xff",
8387 "\xff\xff\xff\xff\xff\xff\xff\xff"
8388 "\xff\xff\xff\xff\xff\xff\xff\xff",
8389 .vtc_flow = RTE_BE32(0xffffffff),
8396 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8397 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8406 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8408 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8410 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8412 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8414 flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8419 size = sizeof(ipv6_m->hdr.dst_addr);
8420 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8421 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8422 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8423 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8424 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8425 for (i = 0; i < size; ++i)
8426 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8427 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8428 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8429 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8430 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8431 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8432 for (i = 0; i < size; ++i)
8433 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8435 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8436 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8437 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8438 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8439 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8440 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8443 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8445 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8448 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8450 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8454 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8456 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8457 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8459 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8460 ipv6_m->hdr.hop_limits);
8461 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8462 ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8463 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8464 !!(ipv6_m->has_frag_ext));
8465 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8466 !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8470 * Add IPV6 fragment extension item to matcher and to the value.
8472 * @param[in, out] matcher
8474 * @param[in, out] key
8475 * Flow matcher value.
8477 * Flow pattern to translate.
8479 * Item is inner pattern.
8482 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8483 const struct rte_flow_item *item,
8486 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8487 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8488 const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8490 .next_header = 0xff,
8491 .frag_data = RTE_BE16(0xffff),
8498 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8500 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8502 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8504 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8506 /* IPv6 fragment extension item exists, so packet is IP fragment. */
8507 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8508 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8509 if (!ipv6_frag_ext_v)
8511 if (!ipv6_frag_ext_m)
8512 ipv6_frag_ext_m = &nic_mask;
8513 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8514 ipv6_frag_ext_m->hdr.next_header);
8515 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8516 ipv6_frag_ext_v->hdr.next_header &
8517 ipv6_frag_ext_m->hdr.next_header);
8521 * Add TCP item to matcher and to the value.
8523 * @param[in, out] matcher
8525 * @param[in, out] key
8526 * Flow matcher value.
8528 * Flow pattern to translate.
8530 * Item is inner pattern.
8533 flow_dv_translate_item_tcp(void *matcher, void *key,
8534 const struct rte_flow_item *item,
8537 const struct rte_flow_item_tcp *tcp_m = item->mask;
8538 const struct rte_flow_item_tcp *tcp_v = item->spec;
8543 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8545 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8547 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8549 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8551 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8552 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8556 tcp_m = &rte_flow_item_tcp_mask;
8557 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8558 rte_be_to_cpu_16(tcp_m->hdr.src_port));
8559 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8560 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8561 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8562 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8563 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8564 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8565 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8566 tcp_m->hdr.tcp_flags);
8567 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8568 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8572 * Add UDP item to matcher and to the value.
8574 * @param[in, out] matcher
8576 * @param[in, out] key
8577 * Flow matcher value.
8579 * Flow pattern to translate.
8581 * Item is inner pattern.
8584 flow_dv_translate_item_udp(void *matcher, void *key,
8585 const struct rte_flow_item *item,
8588 const struct rte_flow_item_udp *udp_m = item->mask;
8589 const struct rte_flow_item_udp *udp_v = item->spec;
8594 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8596 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8598 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8600 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8602 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8603 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8607 udp_m = &rte_flow_item_udp_mask;
8608 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8609 rte_be_to_cpu_16(udp_m->hdr.src_port));
8610 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8611 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8612 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8613 rte_be_to_cpu_16(udp_m->hdr.dst_port));
8614 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8615 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8619 * Add GRE optional Key item to matcher and to the value.
8621 * @param[in, out] matcher
8623 * @param[in, out] key
8624 * Flow matcher value.
8626 * Flow pattern to translate.
8628 * Item is inner pattern.
8631 flow_dv_translate_item_gre_key(void *matcher, void *key,
8632 const struct rte_flow_item *item)
8634 const rte_be32_t *key_m = item->mask;
8635 const rte_be32_t *key_v = item->spec;
8636 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8637 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8638 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8640 /* GRE K bit must be on and should already be validated */
8641 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8642 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8646 key_m = &gre_key_default_mask;
8647 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8648 rte_be_to_cpu_32(*key_m) >> 8);
8649 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8650 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8651 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8652 rte_be_to_cpu_32(*key_m) & 0xFF);
8653 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8654 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8658 * Add GRE item to matcher and to the value.
8660 * @param[in, out] matcher
8662 * @param[in, out] key
8663 * Flow matcher value.
8665 * Flow pattern to translate.
8667 * Item is inner pattern.
8670 flow_dv_translate_item_gre(void *matcher, void *key,
8671 const struct rte_flow_item *item,
8674 const struct rte_flow_item_gre *gre_m = item->mask;
8675 const struct rte_flow_item_gre *gre_v = item->spec;
8678 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8679 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8686 uint16_t s_present:1;
8687 uint16_t k_present:1;
8688 uint16_t rsvd_bit1:1;
8689 uint16_t c_present:1;
8693 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8696 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8698 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8700 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8702 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8704 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8705 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8709 gre_m = &rte_flow_item_gre_mask;
8710 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8711 rte_be_to_cpu_16(gre_m->protocol));
8712 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8713 rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8714 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8715 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8716 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8717 gre_crks_rsvd0_ver_m.c_present);
8718 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8719 gre_crks_rsvd0_ver_v.c_present &
8720 gre_crks_rsvd0_ver_m.c_present);
8721 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8722 gre_crks_rsvd0_ver_m.k_present);
8723 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8724 gre_crks_rsvd0_ver_v.k_present &
8725 gre_crks_rsvd0_ver_m.k_present);
8726 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8727 gre_crks_rsvd0_ver_m.s_present);
8728 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8729 gre_crks_rsvd0_ver_v.s_present &
8730 gre_crks_rsvd0_ver_m.s_present);
8734 * Add NVGRE item to matcher and to the value.
8736 * @param[in, out] matcher
8738 * @param[in, out] key
8739 * Flow matcher value.
8741 * Flow pattern to translate.
8743 * Item is inner pattern.
8746 flow_dv_translate_item_nvgre(void *matcher, void *key,
8747 const struct rte_flow_item *item,
8750 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8751 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8752 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8753 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8754 const char *tni_flow_id_m;
8755 const char *tni_flow_id_v;
8761 /* For NVGRE, GRE header fields must be set with defined values. */
8762 const struct rte_flow_item_gre gre_spec = {
8763 .c_rsvd0_ver = RTE_BE16(0x2000),
8764 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8766 const struct rte_flow_item_gre gre_mask = {
8767 .c_rsvd0_ver = RTE_BE16(0xB000),
8768 .protocol = RTE_BE16(UINT16_MAX),
8770 const struct rte_flow_item gre_item = {
8775 flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8779 nvgre_m = &rte_flow_item_nvgre_mask;
8780 tni_flow_id_m = (const char *)nvgre_m->tni;
8781 tni_flow_id_v = (const char *)nvgre_v->tni;
8782 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8783 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8784 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8785 memcpy(gre_key_m, tni_flow_id_m, size);
8786 for (i = 0; i < size; ++i)
8787 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8791 * Add VXLAN item to matcher and to the value.
8794 * Pointer to the Ethernet device structure.
8796 * Flow rule attributes.
8797 * @param[in, out] matcher
8799 * @param[in, out] key
8800 * Flow matcher value.
8802 * Flow pattern to translate.
8804 * Item is inner pattern.
8807 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8808 const struct rte_flow_attr *attr,
8809 void *matcher, void *key,
8810 const struct rte_flow_item *item,
8813 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8814 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8819 uint32_t *tunnel_header_v;
8820 uint32_t *tunnel_header_m;
8822 struct mlx5_priv *priv = dev->data->dev_private;
8823 const struct rte_flow_item_vxlan nic_mask = {
8824 .vni = "\xff\xff\xff",
8829 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8831 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8833 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8835 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8837 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8838 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8839 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8840 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8841 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8843 dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8847 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8848 (attr->group && !priv->sh->misc5_cap))
8849 vxlan_m = &rte_flow_item_vxlan_mask;
8851 vxlan_m = &nic_mask;
8853 if ((priv->sh->steering_format_version ==
8854 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8855 dport != MLX5_UDP_PORT_VXLAN) ||
8856 (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8857 ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8864 misc_m = MLX5_ADDR_OF(fte_match_param,
8865 matcher, misc_parameters);
8866 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8867 size = sizeof(vxlan_m->vni);
8868 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8869 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8870 memcpy(vni_m, vxlan_m->vni, size);
8871 for (i = 0; i < size; ++i)
8872 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8875 misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8876 misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8877 tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8880 tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8883 *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8884 (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8885 (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8886 if (*tunnel_header_v)
8887 *tunnel_header_m = vxlan_m->vni[0] |
8888 vxlan_m->vni[1] << 8 |
8889 vxlan_m->vni[2] << 16;
8891 *tunnel_header_m = 0x0;
8892 *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8893 if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8894 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8898 * Add VXLAN-GPE item to matcher and to the value.
8900 * @param[in, out] matcher
8902 * @param[in, out] key
8903 * Flow matcher value.
8905 * Flow pattern to translate.
8907 * Item is inner pattern.
8911 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8912 const struct rte_flow_item *item, int inner)
8914 const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8915 const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8919 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8921 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8927 uint8_t flags_m = 0xff;
8928 uint8_t flags_v = 0xc;
8931 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8933 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8935 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8937 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8939 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8940 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8941 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8942 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8943 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8948 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8949 size = sizeof(vxlan_m->vni);
8950 vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8951 vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8952 memcpy(vni_m, vxlan_m->vni, size);
8953 for (i = 0; i < size; ++i)
8954 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8955 if (vxlan_m->flags) {
8956 flags_m = vxlan_m->flags;
8957 flags_v = vxlan_v->flags;
8959 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8960 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8961 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8963 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8968 * Add Geneve item to matcher and to the value.
8970 * @param[in, out] matcher
8972 * @param[in, out] key
8973 * Flow matcher value.
8975 * Flow pattern to translate.
8977 * Item is inner pattern.
8981 flow_dv_translate_item_geneve(void *matcher, void *key,
8982 const struct rte_flow_item *item, int inner)
8984 const struct rte_flow_item_geneve *geneve_m = item->mask;
8985 const struct rte_flow_item_geneve *geneve_v = item->spec;
8988 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8989 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8998 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9000 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9002 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9004 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9006 dport = MLX5_UDP_PORT_GENEVE;
9007 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9008 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9009 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9014 geneve_m = &rte_flow_item_geneve_mask;
9015 size = sizeof(geneve_m->vni);
9016 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9017 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9018 memcpy(vni_m, geneve_m->vni, size);
9019 for (i = 0; i < size; ++i)
9020 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9021 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
9022 rte_be_to_cpu_16(geneve_m->protocol));
9023 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9024 rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
9025 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9026 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9027 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9028 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9029 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9030 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9031 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9032 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9033 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9034 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9035 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9039 * Create Geneve TLV option resource.
9041 * @param dev[in, out]
9042 * Pointer to rte_eth_dev structure.
9043 * @param[in, out] tag_be24
9044 * Tag value in big endian then R-shift 8.
9045 * @parm[in, out] dev_flow
9046 * Pointer to the dev_flow.
9048 * pointer to error structure.
9051 * 0 on success otherwise -errno and errno is set.
9055 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9056 const struct rte_flow_item *item,
9057 struct rte_flow_error *error)
9059 struct mlx5_priv *priv = dev->data->dev_private;
9060 struct mlx5_dev_ctx_shared *sh = priv->sh;
9061 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9062 sh->geneve_tlv_option_resource;
9063 struct mlx5_devx_obj *obj;
9064 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9069 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9070 if (geneve_opt_resource != NULL) {
9071 if (geneve_opt_resource->option_class ==
9072 geneve_opt_v->option_class &&
9073 geneve_opt_resource->option_type ==
9074 geneve_opt_v->option_type &&
9075 geneve_opt_resource->length ==
9076 geneve_opt_v->option_len) {
9077 /* We already have GENVE TLV option obj allocated. */
9078 __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9081 ret = rte_flow_error_set(error, ENOMEM,
9082 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9083 "Only one GENEVE TLV option supported");
9087 /* Create a GENEVE TLV object and resource. */
9088 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9089 geneve_opt_v->option_class,
9090 geneve_opt_v->option_type,
9091 geneve_opt_v->option_len);
9093 ret = rte_flow_error_set(error, ENODATA,
9094 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9095 "Failed to create GENEVE TLV Devx object");
9098 sh->geneve_tlv_option_resource =
9099 mlx5_malloc(MLX5_MEM_ZERO,
9100 sizeof(*geneve_opt_resource),
9102 if (!sh->geneve_tlv_option_resource) {
9103 claim_zero(mlx5_devx_cmd_destroy(obj));
9104 ret = rte_flow_error_set(error, ENOMEM,
9105 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9106 "GENEVE TLV object memory allocation failed");
9109 geneve_opt_resource = sh->geneve_tlv_option_resource;
9110 geneve_opt_resource->obj = obj;
9111 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9112 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9113 geneve_opt_resource->length = geneve_opt_v->option_len;
9114 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9118 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9123 * Add Geneve TLV option item to matcher.
9125 * @param[in, out] dev
9126 * Pointer to rte_eth_dev structure.
9127 * @param[in, out] matcher
9129 * @param[in, out] key
9130 * Flow matcher value.
9132 * Flow pattern to translate.
9134 * Pointer to error structure.
9137 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9138 void *key, const struct rte_flow_item *item,
9139 struct rte_flow_error *error)
9141 const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9142 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9143 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9144 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9145 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9147 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9148 rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9154 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9155 ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9158 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9162 * Set the option length in GENEVE header if not requested.
9163 * The GENEVE TLV option length is expressed by the option length field
9164 * in the GENEVE header.
9165 * If the option length was not requested but the GENEVE TLV option item
9166 * is present we set the option length field implicitly.
9168 if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9169 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9170 MLX5_GENEVE_OPTLEN_MASK);
9171 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9172 geneve_opt_v->option_len + 1);
9174 MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9175 MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9177 if (geneve_opt_v->data) {
9178 memcpy(&opt_data_key, geneve_opt_v->data,
9179 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9180 sizeof(opt_data_key)));
9181 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9182 sizeof(opt_data_key));
9183 memcpy(&opt_data_mask, geneve_opt_m->data,
9184 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9185 sizeof(opt_data_mask)));
9186 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9187 sizeof(opt_data_mask));
9188 MLX5_SET(fte_match_set_misc3, misc3_m,
9189 geneve_tlv_option_0_data,
9190 rte_be_to_cpu_32(opt_data_mask));
9191 MLX5_SET(fte_match_set_misc3, misc3_v,
9192 geneve_tlv_option_0_data,
9193 rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9199 * Add MPLS item to matcher and to the value.
9201 * @param[in, out] matcher
9203 * @param[in, out] key
9204 * Flow matcher value.
9206 * Flow pattern to translate.
9207 * @param[in] prev_layer
9208 * The protocol layer indicated in previous item.
9210 * Item is inner pattern.
9213 flow_dv_translate_item_mpls(void *matcher, void *key,
9214 const struct rte_flow_item *item,
9215 uint64_t prev_layer,
9218 const uint32_t *in_mpls_m = item->mask;
9219 const uint32_t *in_mpls_v = item->spec;
9220 uint32_t *out_mpls_m = 0;
9221 uint32_t *out_mpls_v = 0;
9222 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9223 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9224 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9226 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9227 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9228 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9230 switch (prev_layer) {
9231 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9232 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9233 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9234 MLX5_UDP_PORT_MPLS);
9236 case MLX5_FLOW_LAYER_GRE:
9238 case MLX5_FLOW_LAYER_GRE_KEY:
9239 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9240 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9241 RTE_ETHER_TYPE_MPLS);
9249 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9250 switch (prev_layer) {
9251 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9253 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9254 outer_first_mpls_over_udp);
9256 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9257 outer_first_mpls_over_udp);
9259 case MLX5_FLOW_LAYER_GRE:
9261 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9262 outer_first_mpls_over_gre);
9264 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9265 outer_first_mpls_over_gre);
9268 /* Inner MPLS not over GRE is not supported. */
9271 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9275 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9281 if (out_mpls_m && out_mpls_v) {
9282 *out_mpls_m = *in_mpls_m;
9283 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9288 * Add metadata register item to matcher
9290 * @param[in, out] matcher
9292 * @param[in, out] key
9293 * Flow matcher value.
9294 * @param[in] reg_type
9295 * Type of device metadata register
9302 flow_dv_match_meta_reg(void *matcher, void *key,
9303 enum modify_reg reg_type,
9304 uint32_t data, uint32_t mask)
9307 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9309 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9315 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9316 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9319 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9320 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9324 * The metadata register C0 field might be divided into
9325 * source vport index and META item value, we should set
9326 * this field according to specified mask, not as whole one.
9328 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9330 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9331 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9334 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9337 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9338 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9341 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9342 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9345 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9346 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9349 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9350 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9353 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9354 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9357 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9358 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9361 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9362 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9371 * Add MARK item to matcher
9374 * The device to configure through.
9375 * @param[in, out] matcher
9377 * @param[in, out] key
9378 * Flow matcher value.
9380 * Flow pattern to translate.
9383 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9384 void *matcher, void *key,
9385 const struct rte_flow_item *item)
9387 struct mlx5_priv *priv = dev->data->dev_private;
9388 const struct rte_flow_item_mark *mark;
9392 mark = item->mask ? (const void *)item->mask :
9393 &rte_flow_item_mark_mask;
9394 mask = mark->id & priv->sh->dv_mark_mask;
9395 mark = (const void *)item->spec;
9397 value = mark->id & priv->sh->dv_mark_mask & mask;
9399 enum modify_reg reg;
9401 /* Get the metadata register index for the mark. */
9402 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9403 MLX5_ASSERT(reg > 0);
9404 if (reg == REG_C_0) {
9405 struct mlx5_priv *priv = dev->data->dev_private;
9406 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9407 uint32_t shl_c0 = rte_bsf32(msk_c0);
9413 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9418 * Add META item to matcher
9421 * The devich to configure through.
9422 * @param[in, out] matcher
9424 * @param[in, out] key
9425 * Flow matcher value.
9427 * Attributes of flow that includes this item.
9429 * Flow pattern to translate.
9432 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9433 void *matcher, void *key,
9434 const struct rte_flow_attr *attr,
9435 const struct rte_flow_item *item)
9437 const struct rte_flow_item_meta *meta_m;
9438 const struct rte_flow_item_meta *meta_v;
9440 meta_m = (const void *)item->mask;
9442 meta_m = &rte_flow_item_meta_mask;
9443 meta_v = (const void *)item->spec;
9446 uint32_t value = meta_v->data;
9447 uint32_t mask = meta_m->data;
9449 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9452 MLX5_ASSERT(reg != REG_NON);
9453 if (reg == REG_C_0) {
9454 struct mlx5_priv *priv = dev->data->dev_private;
9455 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9456 uint32_t shl_c0 = rte_bsf32(msk_c0);
9462 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9467 * Add vport metadata Reg C0 item to matcher
9469 * @param[in, out] matcher
9471 * @param[in, out] key
9472 * Flow matcher value.
9474 * Flow pattern to translate.
9477 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9478 uint32_t value, uint32_t mask)
9480 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9484 * Add tag item to matcher
9487 * The devich to configure through.
9488 * @param[in, out] matcher
9490 * @param[in, out] key
9491 * Flow matcher value.
9493 * Flow pattern to translate.
9496 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9497 void *matcher, void *key,
9498 const struct rte_flow_item *item)
9500 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9501 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9502 uint32_t mask, value;
9505 value = tag_v->data;
9506 mask = tag_m ? tag_m->data : UINT32_MAX;
9507 if (tag_v->id == REG_C_0) {
9508 struct mlx5_priv *priv = dev->data->dev_private;
9509 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9510 uint32_t shl_c0 = rte_bsf32(msk_c0);
9516 flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9520 * Add TAG item to matcher
9523 * The devich to configure through.
9524 * @param[in, out] matcher
9526 * @param[in, out] key
9527 * Flow matcher value.
9529 * Flow pattern to translate.
9532 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9533 void *matcher, void *key,
9534 const struct rte_flow_item *item)
9536 const struct rte_flow_item_tag *tag_v = item->spec;
9537 const struct rte_flow_item_tag *tag_m = item->mask;
9538 enum modify_reg reg;
9541 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9542 /* Get the metadata register index for the tag. */
9543 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9544 MLX5_ASSERT(reg > 0);
9545 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9549 * Add source vport match to the specified matcher.
9551 * @param[in, out] matcher
9553 * @param[in, out] key
9554 * Flow matcher value.
9556 * Source vport value to match
9561 flow_dv_translate_item_source_vport(void *matcher, void *key,
9562 int16_t port, uint16_t mask)
9564 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9565 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9567 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9568 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9572 * Translate port-id item to eswitch match on port-id.
9575 * The devich to configure through.
9576 * @param[in, out] matcher
9578 * @param[in, out] key
9579 * Flow matcher value.
9581 * Flow pattern to translate.
9586 * 0 on success, a negative errno value otherwise.
9589 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9590 void *key, const struct rte_flow_item *item,
9591 const struct rte_flow_attr *attr)
9593 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9594 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9595 struct mlx5_priv *priv;
9598 if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9599 flow_dv_translate_item_source_vport(matcher, key,
9600 flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9603 mask = pid_m ? pid_m->id : 0xffff;
9604 id = pid_v ? pid_v->id : dev->data->port_id;
9605 priv = mlx5_port_to_eswitch_info(id, item == NULL);
9609 * Translate to vport field or to metadata, depending on mode.
9610 * Kernel can use either misc.source_port or half of C0 metadata
9613 if (priv->vport_meta_mask) {
9615 * Provide the hint for SW steering library
9616 * to insert the flow into ingress domain and
9617 * save the extra vport match.
9619 if (mask == 0xffff && priv->vport_id == 0xffff &&
9620 priv->pf_bond < 0 && attr->transfer)
9621 flow_dv_translate_item_source_vport
9622 (matcher, key, priv->vport_id, mask);
9624 * We should always set the vport metadata register,
9625 * otherwise the SW steering library can drop
9626 * the rule if wire vport metadata value is not zero,
9627 * it depends on kernel configuration.
9629 flow_dv_translate_item_meta_vport(matcher, key,
9630 priv->vport_meta_tag,
9631 priv->vport_meta_mask);
9633 flow_dv_translate_item_source_vport(matcher, key,
9634 priv->vport_id, mask);
9640 * Add ICMP6 item to matcher and to the value.
9642 * @param[in, out] matcher
9644 * @param[in, out] key
9645 * Flow matcher value.
9647 * Flow pattern to translate.
9649 * Item is inner pattern.
9652 flow_dv_translate_item_icmp6(void *matcher, void *key,
9653 const struct rte_flow_item *item,
9656 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9657 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9660 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9662 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9664 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9666 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9668 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9670 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9672 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9673 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9677 icmp6_m = &rte_flow_item_icmp6_mask;
9678 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9679 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9680 icmp6_v->type & icmp6_m->type);
9681 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9682 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9683 icmp6_v->code & icmp6_m->code);
9687 * Add ICMP item to matcher and to the value.
9689 * @param[in, out] matcher
9691 * @param[in, out] key
9692 * Flow matcher value.
9694 * Flow pattern to translate.
9696 * Item is inner pattern.
9699 flow_dv_translate_item_icmp(void *matcher, void *key,
9700 const struct rte_flow_item *item,
9703 const struct rte_flow_item_icmp *icmp_m = item->mask;
9704 const struct rte_flow_item_icmp *icmp_v = item->spec;
9705 uint32_t icmp_header_data_m = 0;
9706 uint32_t icmp_header_data_v = 0;
9709 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9711 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9713 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9715 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9717 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9719 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9721 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9722 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9726 icmp_m = &rte_flow_item_icmp_mask;
9727 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9728 icmp_m->hdr.icmp_type);
9729 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9730 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9731 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9732 icmp_m->hdr.icmp_code);
9733 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9734 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9735 icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9736 icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9737 if (icmp_header_data_m) {
9738 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9739 icmp_header_data_v |=
9740 rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9741 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9742 icmp_header_data_m);
9743 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9744 icmp_header_data_v & icmp_header_data_m);
9749 * Add GTP item to matcher and to the value.
9751 * @param[in, out] matcher
9753 * @param[in, out] key
9754 * Flow matcher value.
9756 * Flow pattern to translate.
9758 * Item is inner pattern.
9761 flow_dv_translate_item_gtp(void *matcher, void *key,
9762 const struct rte_flow_item *item, int inner)
9764 const struct rte_flow_item_gtp *gtp_m = item->mask;
9765 const struct rte_flow_item_gtp *gtp_v = item->spec;
9768 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9770 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9771 uint16_t dport = RTE_GTPU_UDP_PORT;
9774 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9776 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9778 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9780 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9782 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9783 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9784 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9789 gtp_m = &rte_flow_item_gtp_mask;
9790 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9791 gtp_m->v_pt_rsv_flags);
9792 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9793 gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9794 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9795 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9796 gtp_v->msg_type & gtp_m->msg_type);
9797 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9798 rte_be_to_cpu_32(gtp_m->teid));
9799 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9800 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9804 * Add GTP PSC item to matcher.
9806 * @param[in, out] matcher
9808 * @param[in, out] key
9809 * Flow matcher value.
9811 * Flow pattern to translate.
9814 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9815 const struct rte_flow_item *item)
9817 const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9818 const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9819 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9821 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9827 uint8_t next_ext_header_type;
9832 /* Always set E-flag match on one, regardless of GTP item settings. */
9833 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9834 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9835 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9836 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9837 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9838 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9839 /*Set next extension header type. */
9842 dw_2.next_ext_header_type = 0xff;
9843 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9844 rte_cpu_to_be_32(dw_2.w32));
9847 dw_2.next_ext_header_type = 0x85;
9848 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9849 rte_cpu_to_be_32(dw_2.w32));
9861 /*Set extension header PDU type and Qos. */
9863 gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9865 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
9866 dw_0.qfi = gtp_psc_m->hdr.qfi;
9867 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9868 rte_cpu_to_be_32(dw_0.w32));
9870 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
9871 gtp_psc_m->hdr.type);
9872 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
9873 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9874 rte_cpu_to_be_32(dw_0.w32));
9880 * Add eCPRI item to matcher and to the value.
9883 * The devich to configure through.
9884 * @param[in, out] matcher
9886 * @param[in, out] key
9887 * Flow matcher value.
9889 * Flow pattern to translate.
9890 * @param[in] last_item
9894 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9895 void *key, const struct rte_flow_item *item,
9898 struct mlx5_priv *priv = dev->data->dev_private;
9899 const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9900 const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9901 struct rte_ecpri_common_hdr common;
9902 void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9904 void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9910 * In case of eCPRI over Ethernet, if EtherType is not specified,
9911 * match on eCPRI EtherType implicitly.
9913 if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
9914 void *hdrs_m, *hdrs_v, *l2m, *l2v;
9916 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9917 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9918 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
9919 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
9920 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
9921 *(uint16_t *)l2m = UINT16_MAX;
9922 *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
9928 ecpri_m = &rte_flow_item_ecpri_mask;
9930 * Maximal four DW samples are supported in a single matching now.
9931 * Two are used now for a eCPRI matching:
9932 * 1. Type: one byte, mask should be 0x00ff0000 in network order
9933 * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9936 if (!ecpri_m->hdr.common.u32)
9938 samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9939 /* Need to take the whole DW as the mask to fill the entry. */
9940 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9941 prog_sample_field_value_0);
9942 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9943 prog_sample_field_value_0);
9944 /* Already big endian (network order) in the header. */
9945 *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9946 *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9947 /* Sample#0, used for matching type, offset 0. */
9948 MLX5_SET(fte_match_set_misc4, misc4_m,
9949 prog_sample_field_id_0, samples[0]);
9950 /* It makes no sense to set the sample ID in the mask field. */
9951 MLX5_SET(fte_match_set_misc4, misc4_v,
9952 prog_sample_field_id_0, samples[0]);
9954 * Checking if message body part needs to be matched.
9955 * Some wildcard rules only matching type field should be supported.
9957 if (ecpri_m->hdr.dummy[0]) {
9958 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9959 switch (common.type) {
9960 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9961 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9962 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9963 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9964 prog_sample_field_value_1);
9965 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9966 prog_sample_field_value_1);
9967 *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9968 *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9969 ecpri_m->hdr.dummy[0];
9970 /* Sample#1, to match message body, offset 4. */
9971 MLX5_SET(fte_match_set_misc4, misc4_m,
9972 prog_sample_field_id_1, samples[1]);
9973 MLX5_SET(fte_match_set_misc4, misc4_v,
9974 prog_sample_field_id_1, samples[1]);
9977 /* Others, do not match any sample ID. */
9984 * Add connection tracking status item to matcher
9987 * The devich to configure through.
9988 * @param[in, out] matcher
9990 * @param[in, out] key
9991 * Flow matcher value.
9993 * Flow pattern to translate.
9996 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
9997 void *matcher, void *key,
9998 const struct rte_flow_item *item)
10000 uint32_t reg_value = 0;
10002 /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10003 uint32_t reg_mask = 0;
10004 const struct rte_flow_item_conntrack *spec = item->spec;
10005 const struct rte_flow_item_conntrack *mask = item->mask;
10007 struct rte_flow_error error;
10010 mask = &rte_flow_item_conntrack_mask;
10011 if (!spec || !mask->flags)
10013 flags = spec->flags & mask->flags;
10014 /* The conflict should be checked in the validation. */
10015 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10016 reg_value |= MLX5_CT_SYNDROME_VALID;
10017 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10018 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10019 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10020 reg_value |= MLX5_CT_SYNDROME_INVALID;
10021 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10022 reg_value |= MLX5_CT_SYNDROME_TRAP;
10023 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10024 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10025 if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10026 RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10027 RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10029 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10030 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10031 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10032 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10033 /* The REG_C_x value could be saved during startup. */
10034 reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10035 if (reg_id == REG_NON)
10037 flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10038 reg_value, reg_mask);
10041 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10043 #define HEADER_IS_ZERO(match_criteria, headers) \
10044 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
10045 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10048 * Calculate flow matcher enable bitmap.
10050 * @param match_criteria
10051 * Pointer to flow matcher criteria.
10054 * Bitmap of enabled fields.
10057 flow_dv_matcher_enable(uint32_t *match_criteria)
10059 uint8_t match_criteria_enable;
10061 match_criteria_enable =
10062 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10063 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10064 match_criteria_enable |=
10065 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10066 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10067 match_criteria_enable |=
10068 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10069 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10070 match_criteria_enable |=
10071 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10072 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10073 match_criteria_enable |=
10074 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10075 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10076 match_criteria_enable |=
10077 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10078 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10079 match_criteria_enable |=
10080 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10081 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10082 return match_criteria_enable;
10086 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10089 * Check flow matching criteria first, subtract misc5/4 length if flow
10090 * doesn't own misc5/4 parameters. In some old rdma-core releases,
10091 * misc5/4 are not supported, and matcher creation failure is expected
10092 * w/o subtration. If misc5 is provided, misc4 must be counted in since
10093 * misc5 is right after misc4.
10095 if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10096 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10097 MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10098 if (!(match_criteria & (1 <<
10099 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10100 *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10105 static struct mlx5_list_entry *
10106 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10107 struct mlx5_list_entry *entry, void *cb_ctx)
10109 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10110 struct mlx5_flow_dv_matcher *ref = ctx->data;
10111 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10112 typeof(*tbl), tbl);
10113 struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10118 rte_flow_error_set(ctx->error, ENOMEM,
10119 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10120 "cannot create matcher");
10123 memcpy(resource, entry, sizeof(*resource));
10124 resource->tbl = &tbl->tbl;
10125 return &resource->entry;
10129 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10130 struct mlx5_list_entry *entry)
10135 struct mlx5_list_entry *
10136 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10138 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10139 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10140 struct rte_eth_dev *dev = ctx->dev;
10141 struct mlx5_flow_tbl_data_entry *tbl_data;
10142 struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10143 struct rte_flow_error *error = ctx->error;
10144 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10145 struct mlx5_flow_tbl_resource *tbl;
10150 tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10152 rte_flow_error_set(error, ENOMEM,
10153 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10155 "cannot allocate flow table data entry");
10158 tbl_data->idx = idx;
10159 tbl_data->tunnel = tt_prm->tunnel;
10160 tbl_data->group_id = tt_prm->group_id;
10161 tbl_data->external = !!tt_prm->external;
10162 tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10163 tbl_data->is_egress = !!key.is_egress;
10164 tbl_data->is_transfer = !!key.is_fdb;
10165 tbl_data->dummy = !!key.dummy;
10166 tbl_data->level = key.level;
10167 tbl_data->id = key.id;
10168 tbl = &tbl_data->tbl;
10170 return &tbl_data->entry;
10172 domain = sh->fdb_domain;
10173 else if (key.is_egress)
10174 domain = sh->tx_domain;
10176 domain = sh->rx_domain;
10177 ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10179 rte_flow_error_set(error, ENOMEM,
10180 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10181 NULL, "cannot create flow table object");
10182 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10185 if (key.level != 0) {
10186 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10187 (tbl->obj, &tbl_data->jump.action);
10189 rte_flow_error_set(error, ENOMEM,
10190 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10192 "cannot create flow jump action");
10193 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10194 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10198 MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10199 key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10200 key.level, key.id);
10201 tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10202 flow_dv_matcher_create_cb,
10203 flow_dv_matcher_match_cb,
10204 flow_dv_matcher_remove_cb,
10205 flow_dv_matcher_clone_cb,
10206 flow_dv_matcher_clone_free_cb);
10207 if (!tbl_data->matchers) {
10208 rte_flow_error_set(error, ENOMEM,
10209 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10211 "cannot create tbl matcher list");
10212 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10213 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10214 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10217 return &tbl_data->entry;
10221 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10224 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10225 struct mlx5_flow_tbl_data_entry *tbl_data =
10226 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10227 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10229 return tbl_data->level != key.level ||
10230 tbl_data->id != key.id ||
10231 tbl_data->dummy != key.dummy ||
10232 tbl_data->is_transfer != !!key.is_fdb ||
10233 tbl_data->is_egress != !!key.is_egress;
10236 struct mlx5_list_entry *
10237 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10240 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10241 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10242 struct mlx5_flow_tbl_data_entry *tbl_data;
10243 struct rte_flow_error *error = ctx->error;
10246 tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10248 rte_flow_error_set(error, ENOMEM,
10249 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10251 "cannot allocate flow table data entry");
10254 memcpy(tbl_data, oentry, sizeof(*tbl_data));
10255 tbl_data->idx = idx;
10256 return &tbl_data->entry;
10260 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10262 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10263 struct mlx5_flow_tbl_data_entry *tbl_data =
10264 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10266 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10270 * Get a flow table.
10272 * @param[in, out] dev
10273 * Pointer to rte_eth_dev structure.
10274 * @param[in] table_level
10275 * Table level to use.
10276 * @param[in] egress
10277 * Direction of the table.
10278 * @param[in] transfer
10279 * E-Switch or NIC flow.
10281 * Dummy entry for dv API.
10282 * @param[in] table_id
10284 * @param[out] error
10285 * pointer to error structure.
10288 * Returns tables resource based on the index, NULL in case of failed.
10290 struct mlx5_flow_tbl_resource *
10291 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10292 uint32_t table_level, uint8_t egress,
10295 const struct mlx5_flow_tunnel *tunnel,
10296 uint32_t group_id, uint8_t dummy,
10298 struct rte_flow_error *error)
10300 struct mlx5_priv *priv = dev->data->dev_private;
10301 union mlx5_flow_tbl_key table_key = {
10303 .level = table_level,
10307 .is_fdb = !!transfer,
10308 .is_egress = !!egress,
10311 struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10313 .group_id = group_id,
10314 .external = external,
10316 struct mlx5_flow_cb_ctx ctx = {
10319 .data = &table_key.v64,
10322 struct mlx5_list_entry *entry;
10323 struct mlx5_flow_tbl_data_entry *tbl_data;
10325 entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10327 rte_flow_error_set(error, ENOMEM,
10328 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10329 "cannot get table");
10332 DRV_LOG(DEBUG, "table_level %u table_id %u "
10333 "tunnel %u group %u registered.",
10334 table_level, table_id,
10335 tunnel ? tunnel->tunnel_id : 0, group_id);
10336 tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10337 return &tbl_data->tbl;
10341 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10343 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10344 struct mlx5_flow_tbl_data_entry *tbl_data =
10345 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10347 MLX5_ASSERT(entry && sh);
10348 if (tbl_data->jump.action)
10349 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10350 if (tbl_data->tbl.obj)
10351 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10352 if (tbl_data->tunnel_offload && tbl_data->external) {
10353 struct mlx5_list_entry *he;
10354 struct mlx5_hlist *tunnel_grp_hash;
10355 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10356 union tunnel_tbl_key tunnel_key = {
10357 .tunnel_id = tbl_data->tunnel ?
10358 tbl_data->tunnel->tunnel_id : 0,
10359 .group = tbl_data->group_id
10361 uint32_t table_level = tbl_data->level;
10362 struct mlx5_flow_cb_ctx ctx = {
10363 .data = (void *)&tunnel_key.val,
10366 tunnel_grp_hash = tbl_data->tunnel ?
10367 tbl_data->tunnel->groups :
10369 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10371 mlx5_hlist_unregister(tunnel_grp_hash, he);
10373 "table_level %u id %u tunnel %u group %u released.",
10377 tbl_data->tunnel->tunnel_id : 0,
10378 tbl_data->group_id);
10380 mlx5_list_destroy(tbl_data->matchers);
10381 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10385 * Release a flow table.
10388 * Pointer to device shared structure.
10390 * Table resource to be released.
10393 * Returns 0 if table was released, else return 1;
10396 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10397 struct mlx5_flow_tbl_resource *tbl)
10399 struct mlx5_flow_tbl_data_entry *tbl_data =
10400 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10404 return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10408 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10409 struct mlx5_list_entry *entry, void *cb_ctx)
10411 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10412 struct mlx5_flow_dv_matcher *ref = ctx->data;
10413 struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10416 return cur->crc != ref->crc ||
10417 cur->priority != ref->priority ||
10418 memcmp((const void *)cur->mask.buf,
10419 (const void *)ref->mask.buf, ref->mask.size);
10422 struct mlx5_list_entry *
10423 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10425 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10426 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10427 struct mlx5_flow_dv_matcher *ref = ctx->data;
10428 struct mlx5_flow_dv_matcher *resource;
10429 struct mlx5dv_flow_matcher_attr dv_attr = {
10430 .type = IBV_FLOW_ATTR_NORMAL,
10431 .match_mask = (void *)&ref->mask,
10433 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10434 typeof(*tbl), tbl);
10437 resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10440 rte_flow_error_set(ctx->error, ENOMEM,
10441 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10442 "cannot create matcher");
10446 dv_attr.match_criteria_enable =
10447 flow_dv_matcher_enable(resource->mask.buf);
10448 __flow_dv_adjust_buf_size(&ref->mask.size,
10449 dv_attr.match_criteria_enable);
10450 dv_attr.priority = ref->priority;
10451 if (tbl->is_egress)
10452 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10453 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10455 &resource->matcher_object);
10457 mlx5_free(resource);
10458 rte_flow_error_set(ctx->error, ENOMEM,
10459 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10460 "cannot create matcher");
10463 return &resource->entry;
10467 * Register the flow matcher.
10469 * @param[in, out] dev
10470 * Pointer to rte_eth_dev structure.
10471 * @param[in, out] matcher
10472 * Pointer to flow matcher.
10473 * @param[in, out] key
10474 * Pointer to flow table key.
10475 * @parm[in, out] dev_flow
10476 * Pointer to the dev_flow.
10477 * @param[out] error
10478 * pointer to error structure.
10481 * 0 on success otherwise -errno and errno is set.
10484 flow_dv_matcher_register(struct rte_eth_dev *dev,
10485 struct mlx5_flow_dv_matcher *ref,
10486 union mlx5_flow_tbl_key *key,
10487 struct mlx5_flow *dev_flow,
10488 const struct mlx5_flow_tunnel *tunnel,
10490 struct rte_flow_error *error)
10492 struct mlx5_list_entry *entry;
10493 struct mlx5_flow_dv_matcher *resource;
10494 struct mlx5_flow_tbl_resource *tbl;
10495 struct mlx5_flow_tbl_data_entry *tbl_data;
10496 struct mlx5_flow_cb_ctx ctx = {
10501 * tunnel offload API requires this registration for cases when
10502 * tunnel match rule was inserted before tunnel set rule.
10504 tbl = flow_dv_tbl_resource_get(dev, key->level,
10505 key->is_egress, key->is_fdb,
10506 dev_flow->external, tunnel,
10507 group_id, 0, key->id, error);
10509 return -rte_errno; /* No need to refill the error info */
10510 tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10512 entry = mlx5_list_register(tbl_data->matchers, &ctx);
10514 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10515 return rte_flow_error_set(error, ENOMEM,
10516 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10517 "cannot allocate ref memory");
10519 resource = container_of(entry, typeof(*resource), entry);
10520 dev_flow->handle->dvh.matcher = resource;
10524 struct mlx5_list_entry *
10525 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10527 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10528 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10529 struct mlx5_flow_dv_tag_resource *entry;
10533 entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10535 rte_flow_error_set(ctx->error, ENOMEM,
10536 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10537 "cannot allocate resource memory");
10541 entry->tag_id = *(uint32_t *)(ctx->data);
10542 ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10545 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10546 rte_flow_error_set(ctx->error, ENOMEM,
10547 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10548 NULL, "cannot create action");
10551 return &entry->entry;
10555 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10558 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10559 struct mlx5_flow_dv_tag_resource *tag =
10560 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10562 return *(uint32_t *)(ctx->data) != tag->tag_id;
10565 struct mlx5_list_entry *
10566 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10569 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10570 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10571 struct mlx5_flow_dv_tag_resource *entry;
10574 entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10576 rte_flow_error_set(ctx->error, ENOMEM,
10577 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10578 "cannot allocate tag resource memory");
10581 memcpy(entry, oentry, sizeof(*entry));
10583 return &entry->entry;
10587 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10589 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10590 struct mlx5_flow_dv_tag_resource *tag =
10591 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10593 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10597 * Find existing tag resource or create and register a new one.
10599 * @param dev[in, out]
10600 * Pointer to rte_eth_dev structure.
10601 * @param[in, out] tag_be24
10602 * Tag value in big endian then R-shift 8.
10603 * @parm[in, out] dev_flow
10604 * Pointer to the dev_flow.
10605 * @param[out] error
10606 * pointer to error structure.
10609 * 0 on success otherwise -errno and errno is set.
10612 flow_dv_tag_resource_register
10613 (struct rte_eth_dev *dev,
10615 struct mlx5_flow *dev_flow,
10616 struct rte_flow_error *error)
10618 struct mlx5_priv *priv = dev->data->dev_private;
10619 struct mlx5_flow_dv_tag_resource *resource;
10620 struct mlx5_list_entry *entry;
10621 struct mlx5_flow_cb_ctx ctx = {
10625 struct mlx5_hlist *tag_table;
10627 tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10629 MLX5_TAGS_HLIST_ARRAY_SIZE,
10630 false, false, priv->sh,
10631 flow_dv_tag_create_cb,
10632 flow_dv_tag_match_cb,
10633 flow_dv_tag_remove_cb,
10634 flow_dv_tag_clone_cb,
10635 flow_dv_tag_clone_free_cb);
10636 if (unlikely(!tag_table))
10638 entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10640 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10642 dev_flow->handle->dvh.rix_tag = resource->idx;
10643 dev_flow->dv.tag_resource = resource;
10650 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10652 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10653 struct mlx5_flow_dv_tag_resource *tag =
10654 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10656 MLX5_ASSERT(tag && sh && tag->action);
10657 claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10658 DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10659 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10666 * Pointer to Ethernet device.
10671 * 1 while a reference on it exists, 0 when freed.
10674 flow_dv_tag_release(struct rte_eth_dev *dev,
10677 struct mlx5_priv *priv = dev->data->dev_private;
10678 struct mlx5_flow_dv_tag_resource *tag;
10680 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10683 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10684 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10685 return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10689 * Translate action PORT_ID / REPRESENTED_PORT to vport.
10692 * Pointer to rte_eth_dev structure.
10693 * @param[in] action
10694 * Pointer to action PORT_ID / REPRESENTED_PORT.
10695 * @param[out] dst_port_id
10696 * The target port ID.
10697 * @param[out] error
10698 * Pointer to the error structure.
10701 * 0 on success, a negative errno value otherwise and rte_errno is set.
10704 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10705 const struct rte_flow_action *action,
10706 uint32_t *dst_port_id,
10707 struct rte_flow_error *error)
10710 struct mlx5_priv *priv;
10712 switch (action->type) {
10713 case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10714 const struct rte_flow_action_port_id *conf;
10716 conf = (const struct rte_flow_action_port_id *)action->conf;
10717 port = conf->original ? dev->data->port_id : conf->id;
10720 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10721 const struct rte_flow_action_ethdev *ethdev;
10723 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10724 port = ethdev->port_id;
10728 MLX5_ASSERT(false);
10729 return rte_flow_error_set(error, EINVAL,
10730 RTE_FLOW_ERROR_TYPE_ACTION, action,
10731 "unknown E-Switch action");
10734 priv = mlx5_port_to_eswitch_info(port, false);
10736 return rte_flow_error_set(error, -rte_errno,
10737 RTE_FLOW_ERROR_TYPE_ACTION,
10739 "No eswitch info was found for port");
10740 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10742 * This parameter is transferred to
10743 * mlx5dv_dr_action_create_dest_ib_port().
10745 *dst_port_id = priv->dev_port;
10748 * Legacy mode, no LAG configurations is supported.
10749 * This parameter is transferred to
10750 * mlx5dv_dr_action_create_dest_vport().
10752 *dst_port_id = priv->vport_id;
10758 * Create a counter with aging configuration.
10761 * Pointer to rte_eth_dev structure.
10762 * @param[in] dev_flow
10763 * Pointer to the mlx5_flow.
10764 * @param[out] count
10765 * Pointer to the counter action configuration.
10767 * Pointer to the aging action configuration.
10770 * Index to flow counter on success, 0 otherwise.
10773 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10774 struct mlx5_flow *dev_flow,
10775 const struct rte_flow_action_count *count
10777 const struct rte_flow_action_age *age)
10780 struct mlx5_age_param *age_param;
10782 counter = flow_dv_counter_alloc(dev, !!age);
10783 if (!counter || age == NULL)
10785 age_param = flow_dv_counter_idx_get_age(dev, counter);
10786 age_param->context = age->context ? age->context :
10787 (void *)(uintptr_t)(dev_flow->flow_idx);
10788 age_param->timeout = age->timeout;
10789 age_param->port_id = dev->data->port_id;
10790 __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10791 __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10796 * Add Tx queue matcher
10799 * Pointer to the dev struct.
10800 * @param[in, out] matcher
10802 * @param[in, out] key
10803 * Flow matcher value.
10805 * Flow pattern to translate.
10807 * Item is inner pattern.
10810 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10811 void *matcher, void *key,
10812 const struct rte_flow_item *item)
10814 const struct mlx5_rte_flow_item_tx_queue *queue_m;
10815 const struct mlx5_rte_flow_item_tx_queue *queue_v;
10817 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10819 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10820 struct mlx5_txq_ctrl *txq;
10821 uint32_t queue, mask;
10823 queue_m = (const void *)item->mask;
10824 queue_v = (const void *)item->spec;
10827 txq = mlx5_txq_get(dev, queue_v->queue);
10830 if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
10831 queue = txq->obj->sq->id;
10833 queue = txq->obj->sq_obj.sq->id;
10834 mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
10835 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
10836 MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
10837 mlx5_txq_release(dev, queue_v->queue);
10841 * Set the hash fields according to the @p flow information.
10843 * @param[in] dev_flow
10844 * Pointer to the mlx5_flow.
10845 * @param[in] rss_desc
10846 * Pointer to the mlx5_flow_rss_desc.
10849 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10850 struct mlx5_flow_rss_desc *rss_desc)
10852 uint64_t items = dev_flow->handle->layers;
10854 uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10856 dev_flow->hash_fields = 0;
10857 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10858 if (rss_desc->level >= 2)
10861 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10862 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10863 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10864 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10865 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10866 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10867 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10869 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10871 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10872 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10873 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10874 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10875 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10876 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10877 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10879 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10882 if (dev_flow->hash_fields == 0)
10884 * There is no match between the RSS types and the
10885 * L3 protocol (IPv4/IPv6) defined in the flow rule.
10888 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10889 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10890 if (rss_types & ETH_RSS_UDP) {
10891 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10892 dev_flow->hash_fields |=
10893 IBV_RX_HASH_SRC_PORT_UDP;
10894 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10895 dev_flow->hash_fields |=
10896 IBV_RX_HASH_DST_PORT_UDP;
10898 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10900 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10901 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10902 if (rss_types & ETH_RSS_TCP) {
10903 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10904 dev_flow->hash_fields |=
10905 IBV_RX_HASH_SRC_PORT_TCP;
10906 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10907 dev_flow->hash_fields |=
10908 IBV_RX_HASH_DST_PORT_TCP;
10910 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10914 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10918 * Prepare an Rx Hash queue.
10921 * Pointer to Ethernet device.
10922 * @param[in] dev_flow
10923 * Pointer to the mlx5_flow.
10924 * @param[in] rss_desc
10925 * Pointer to the mlx5_flow_rss_desc.
10926 * @param[out] hrxq_idx
10927 * Hash Rx queue index.
10930 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10932 static struct mlx5_hrxq *
10933 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10934 struct mlx5_flow *dev_flow,
10935 struct mlx5_flow_rss_desc *rss_desc,
10936 uint32_t *hrxq_idx)
10938 struct mlx5_priv *priv = dev->data->dev_private;
10939 struct mlx5_flow_handle *dh = dev_flow->handle;
10940 struct mlx5_hrxq *hrxq;
10942 MLX5_ASSERT(rss_desc->queue_num);
10943 rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10944 rss_desc->hash_fields = dev_flow->hash_fields;
10945 rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10946 rss_desc->shared_rss = 0;
10947 if (rss_desc->hash_fields == 0)
10948 rss_desc->queue_num = 1;
10949 *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10952 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10958 * Release sample sub action resource.
10960 * @param[in, out] dev
10961 * Pointer to rte_eth_dev structure.
10962 * @param[in] act_res
10963 * Pointer to sample sub action resource.
10966 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10967 struct mlx5_flow_sub_actions_idx *act_res)
10969 if (act_res->rix_hrxq) {
10970 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10971 act_res->rix_hrxq = 0;
10973 if (act_res->rix_encap_decap) {
10974 flow_dv_encap_decap_resource_release(dev,
10975 act_res->rix_encap_decap);
10976 act_res->rix_encap_decap = 0;
10978 if (act_res->rix_port_id_action) {
10979 flow_dv_port_id_action_resource_release(dev,
10980 act_res->rix_port_id_action);
10981 act_res->rix_port_id_action = 0;
10983 if (act_res->rix_tag) {
10984 flow_dv_tag_release(dev, act_res->rix_tag);
10985 act_res->rix_tag = 0;
10987 if (act_res->rix_jump) {
10988 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
10989 act_res->rix_jump = 0;
10994 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
10995 struct mlx5_list_entry *entry, void *cb_ctx)
10997 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10998 struct rte_eth_dev *dev = ctx->dev;
10999 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11000 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11004 if (ctx_resource->ratio == resource->ratio &&
11005 ctx_resource->ft_type == resource->ft_type &&
11006 ctx_resource->ft_id == resource->ft_id &&
11007 ctx_resource->set_action == resource->set_action &&
11008 !memcmp((void *)&ctx_resource->sample_act,
11009 (void *)&resource->sample_act,
11010 sizeof(struct mlx5_flow_sub_actions_list))) {
11012 * Existing sample action should release the prepared
11013 * sub-actions reference counter.
11015 flow_dv_sample_sub_actions_release(dev,
11016 &ctx_resource->sample_idx);
11022 struct mlx5_list_entry *
11023 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11025 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11026 struct rte_eth_dev *dev = ctx->dev;
11027 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11028 void **sample_dv_actions = ctx_resource->sub_actions;
11029 struct mlx5_flow_dv_sample_resource *resource;
11030 struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11031 struct mlx5_priv *priv = dev->data->dev_private;
11032 struct mlx5_dev_ctx_shared *sh = priv->sh;
11033 struct mlx5_flow_tbl_resource *tbl;
11035 const uint32_t next_ft_step = 1;
11036 uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11037 uint8_t is_egress = 0;
11038 uint8_t is_transfer = 0;
11039 struct rte_flow_error *error = ctx->error;
11041 /* Register new sample resource. */
11042 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11044 rte_flow_error_set(error, ENOMEM,
11045 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11047 "cannot allocate resource memory");
11050 *resource = *ctx_resource;
11051 /* Create normal path table level */
11052 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11054 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11056 tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11057 is_egress, is_transfer,
11058 true, NULL, 0, 0, 0, error);
11060 rte_flow_error_set(error, ENOMEM,
11061 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11063 "fail to create normal path table "
11067 resource->normal_path_tbl = tbl;
11068 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11069 if (!sh->default_miss_action) {
11070 rte_flow_error_set(error, ENOMEM,
11071 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11073 "default miss action was not "
11077 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11078 sh->default_miss_action;
11080 /* Create a DR sample action */
11081 sampler_attr.sample_ratio = resource->ratio;
11082 sampler_attr.default_next_table = tbl->obj;
11083 sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11084 sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11085 &sample_dv_actions[0];
11086 sampler_attr.action = resource->set_action;
11087 if (mlx5_os_flow_dr_create_flow_action_sampler
11088 (&sampler_attr, &resource->verbs_action)) {
11089 rte_flow_error_set(error, ENOMEM,
11090 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11091 NULL, "cannot create sample action");
11094 resource->idx = idx;
11095 resource->dev = dev;
11096 return &resource->entry;
11098 if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11099 flow_dv_sample_sub_actions_release(dev,
11100 &resource->sample_idx);
11101 if (resource->normal_path_tbl)
11102 flow_dv_tbl_resource_release(MLX5_SH(dev),
11103 resource->normal_path_tbl);
11104 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11109 struct mlx5_list_entry *
11110 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11111 struct mlx5_list_entry *entry __rte_unused,
11114 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11115 struct rte_eth_dev *dev = ctx->dev;
11116 struct mlx5_flow_dv_sample_resource *resource;
11117 struct mlx5_priv *priv = dev->data->dev_private;
11118 struct mlx5_dev_ctx_shared *sh = priv->sh;
11121 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11123 rte_flow_error_set(ctx->error, ENOMEM,
11124 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11126 "cannot allocate resource memory");
11129 memcpy(resource, entry, sizeof(*resource));
11130 resource->idx = idx;
11131 resource->dev = dev;
11132 return &resource->entry;
11136 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11137 struct mlx5_list_entry *entry)
11139 struct mlx5_flow_dv_sample_resource *resource =
11140 container_of(entry, typeof(*resource), entry);
11141 struct rte_eth_dev *dev = resource->dev;
11142 struct mlx5_priv *priv = dev->data->dev_private;
11144 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11148 * Find existing sample resource or create and register a new one.
11150 * @param[in, out] dev
11151 * Pointer to rte_eth_dev structure.
11153 * Pointer to sample resource reference.
11154 * @parm[in, out] dev_flow
11155 * Pointer to the dev_flow.
11156 * @param[out] error
11157 * pointer to error structure.
11160 * 0 on success otherwise -errno and errno is set.
11163 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11164 struct mlx5_flow_dv_sample_resource *ref,
11165 struct mlx5_flow *dev_flow,
11166 struct rte_flow_error *error)
11168 struct mlx5_flow_dv_sample_resource *resource;
11169 struct mlx5_list_entry *entry;
11170 struct mlx5_priv *priv = dev->data->dev_private;
11171 struct mlx5_flow_cb_ctx ctx = {
11177 entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11180 resource = container_of(entry, typeof(*resource), entry);
11181 dev_flow->handle->dvh.rix_sample = resource->idx;
11182 dev_flow->dv.sample_res = resource;
11187 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11188 struct mlx5_list_entry *entry, void *cb_ctx)
11190 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11191 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11192 struct rte_eth_dev *dev = ctx->dev;
11193 struct mlx5_flow_dv_dest_array_resource *resource =
11194 container_of(entry, typeof(*resource), entry);
11197 if (ctx_resource->num_of_dest == resource->num_of_dest &&
11198 ctx_resource->ft_type == resource->ft_type &&
11199 !memcmp((void *)resource->sample_act,
11200 (void *)ctx_resource->sample_act,
11201 (ctx_resource->num_of_dest *
11202 sizeof(struct mlx5_flow_sub_actions_list)))) {
11204 * Existing sample action should release the prepared
11205 * sub-actions reference counter.
11207 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11208 flow_dv_sample_sub_actions_release(dev,
11209 &ctx_resource->sample_idx[idx]);
11215 struct mlx5_list_entry *
11216 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11218 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11219 struct rte_eth_dev *dev = ctx->dev;
11220 struct mlx5_flow_dv_dest_array_resource *resource;
11221 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11222 struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11223 struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11224 struct mlx5_priv *priv = dev->data->dev_private;
11225 struct mlx5_dev_ctx_shared *sh = priv->sh;
11226 struct mlx5_flow_sub_actions_list *sample_act;
11227 struct mlx5dv_dr_domain *domain;
11228 uint32_t idx = 0, res_idx = 0;
11229 struct rte_flow_error *error = ctx->error;
11230 uint64_t action_flags;
11233 /* Register new destination array resource. */
11234 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11237 rte_flow_error_set(error, ENOMEM,
11238 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11240 "cannot allocate resource memory");
11243 *resource = *ctx_resource;
11244 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11245 domain = sh->fdb_domain;
11246 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11247 domain = sh->rx_domain;
11249 domain = sh->tx_domain;
11250 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11251 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11252 mlx5_malloc(MLX5_MEM_ZERO,
11253 sizeof(struct mlx5dv_dr_action_dest_attr),
11255 if (!dest_attr[idx]) {
11256 rte_flow_error_set(error, ENOMEM,
11257 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11259 "cannot allocate resource memory");
11262 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11263 sample_act = &ctx_resource->sample_act[idx];
11264 action_flags = sample_act->action_flags;
11265 switch (action_flags) {
11266 case MLX5_FLOW_ACTION_QUEUE:
11267 dest_attr[idx]->dest = sample_act->dr_queue_action;
11269 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11270 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11271 dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11272 dest_attr[idx]->dest_reformat->reformat =
11273 sample_act->dr_encap_action;
11274 dest_attr[idx]->dest_reformat->dest =
11275 sample_act->dr_port_id_action;
11277 case MLX5_FLOW_ACTION_PORT_ID:
11278 dest_attr[idx]->dest = sample_act->dr_port_id_action;
11280 case MLX5_FLOW_ACTION_JUMP:
11281 dest_attr[idx]->dest = sample_act->dr_jump_action;
11284 rte_flow_error_set(error, EINVAL,
11285 RTE_FLOW_ERROR_TYPE_ACTION,
11287 "unsupported actions type");
11291 /* create a dest array actioin */
11292 ret = mlx5_os_flow_dr_create_flow_action_dest_array
11294 resource->num_of_dest,
11296 &resource->action);
11298 rte_flow_error_set(error, ENOMEM,
11299 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11301 "cannot create destination array action");
11304 resource->idx = res_idx;
11305 resource->dev = dev;
11306 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11307 mlx5_free(dest_attr[idx]);
11308 return &resource->entry;
11310 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11311 flow_dv_sample_sub_actions_release(dev,
11312 &resource->sample_idx[idx]);
11313 if (dest_attr[idx])
11314 mlx5_free(dest_attr[idx]);
11316 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11320 struct mlx5_list_entry *
11321 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11322 struct mlx5_list_entry *entry __rte_unused,
11325 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11326 struct rte_eth_dev *dev = ctx->dev;
11327 struct mlx5_flow_dv_dest_array_resource *resource;
11328 struct mlx5_priv *priv = dev->data->dev_private;
11329 struct mlx5_dev_ctx_shared *sh = priv->sh;
11330 uint32_t res_idx = 0;
11331 struct rte_flow_error *error = ctx->error;
11333 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11336 rte_flow_error_set(error, ENOMEM,
11337 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11339 "cannot allocate dest-array memory");
11342 memcpy(resource, entry, sizeof(*resource));
11343 resource->idx = res_idx;
11344 resource->dev = dev;
11345 return &resource->entry;
11349 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11350 struct mlx5_list_entry *entry)
11352 struct mlx5_flow_dv_dest_array_resource *resource =
11353 container_of(entry, typeof(*resource), entry);
11354 struct rte_eth_dev *dev = resource->dev;
11355 struct mlx5_priv *priv = dev->data->dev_private;
11357 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11361 * Find existing destination array resource or create and register a new one.
11363 * @param[in, out] dev
11364 * Pointer to rte_eth_dev structure.
11366 * Pointer to destination array resource reference.
11367 * @parm[in, out] dev_flow
11368 * Pointer to the dev_flow.
11369 * @param[out] error
11370 * pointer to error structure.
11373 * 0 on success otherwise -errno and errno is set.
11376 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11377 struct mlx5_flow_dv_dest_array_resource *ref,
11378 struct mlx5_flow *dev_flow,
11379 struct rte_flow_error *error)
11381 struct mlx5_flow_dv_dest_array_resource *resource;
11382 struct mlx5_priv *priv = dev->data->dev_private;
11383 struct mlx5_list_entry *entry;
11384 struct mlx5_flow_cb_ctx ctx = {
11390 entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11393 resource = container_of(entry, typeof(*resource), entry);
11394 dev_flow->handle->dvh.rix_dest_array = resource->idx;
11395 dev_flow->dv.dest_array_res = resource;
11400 * Convert Sample action to DV specification.
11403 * Pointer to rte_eth_dev structure.
11404 * @param[in] action
11405 * Pointer to sample action structure.
11406 * @param[in, out] dev_flow
11407 * Pointer to the mlx5_flow.
11409 * Pointer to the flow attributes.
11410 * @param[in, out] num_of_dest
11411 * Pointer to the num of destination.
11412 * @param[in, out] sample_actions
11413 * Pointer to sample actions list.
11414 * @param[in, out] res
11415 * Pointer to sample resource.
11416 * @param[out] error
11417 * Pointer to the error structure.
11420 * 0 on success, a negative errno value otherwise and rte_errno is set.
11423 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11424 const struct rte_flow_action_sample *action,
11425 struct mlx5_flow *dev_flow,
11426 const struct rte_flow_attr *attr,
11427 uint32_t *num_of_dest,
11428 void **sample_actions,
11429 struct mlx5_flow_dv_sample_resource *res,
11430 struct rte_flow_error *error)
11432 struct mlx5_priv *priv = dev->data->dev_private;
11433 const struct rte_flow_action *sub_actions;
11434 struct mlx5_flow_sub_actions_list *sample_act;
11435 struct mlx5_flow_sub_actions_idx *sample_idx;
11436 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11437 struct rte_flow *flow = dev_flow->flow;
11438 struct mlx5_flow_rss_desc *rss_desc;
11439 uint64_t action_flags = 0;
11442 rss_desc = &wks->rss_desc;
11443 sample_act = &res->sample_act;
11444 sample_idx = &res->sample_idx;
11445 res->ratio = action->ratio;
11446 sub_actions = action->actions;
11447 for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11448 int type = sub_actions->type;
11449 uint32_t pre_rix = 0;
11452 case RTE_FLOW_ACTION_TYPE_QUEUE:
11454 const struct rte_flow_action_queue *queue;
11455 struct mlx5_hrxq *hrxq;
11458 queue = sub_actions->conf;
11459 rss_desc->queue_num = 1;
11460 rss_desc->queue[0] = queue->index;
11461 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11462 rss_desc, &hrxq_idx);
11464 return rte_flow_error_set
11466 RTE_FLOW_ERROR_TYPE_ACTION,
11468 "cannot create fate queue");
11469 sample_act->dr_queue_action = hrxq->action;
11470 sample_idx->rix_hrxq = hrxq_idx;
11471 sample_actions[sample_act->actions_num++] =
11474 action_flags |= MLX5_FLOW_ACTION_QUEUE;
11475 if (action_flags & MLX5_FLOW_ACTION_MARK)
11476 dev_flow->handle->rix_hrxq = hrxq_idx;
11477 dev_flow->handle->fate_action =
11478 MLX5_FLOW_FATE_QUEUE;
11481 case RTE_FLOW_ACTION_TYPE_RSS:
11483 struct mlx5_hrxq *hrxq;
11485 const struct rte_flow_action_rss *rss;
11486 const uint8_t *rss_key;
11488 rss = sub_actions->conf;
11489 memcpy(rss_desc->queue, rss->queue,
11490 rss->queue_num * sizeof(uint16_t));
11491 rss_desc->queue_num = rss->queue_num;
11492 /* NULL RSS key indicates default RSS key. */
11493 rss_key = !rss->key ? rss_hash_default_key : rss->key;
11494 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11496 * rss->level and rss.types should be set in advance
11497 * when expanding items for RSS.
11499 flow_dv_hashfields_set(dev_flow, rss_desc);
11500 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11501 rss_desc, &hrxq_idx);
11503 return rte_flow_error_set
11505 RTE_FLOW_ERROR_TYPE_ACTION,
11507 "cannot create fate queue");
11508 sample_act->dr_queue_action = hrxq->action;
11509 sample_idx->rix_hrxq = hrxq_idx;
11510 sample_actions[sample_act->actions_num++] =
11513 action_flags |= MLX5_FLOW_ACTION_RSS;
11514 if (action_flags & MLX5_FLOW_ACTION_MARK)
11515 dev_flow->handle->rix_hrxq = hrxq_idx;
11516 dev_flow->handle->fate_action =
11517 MLX5_FLOW_FATE_QUEUE;
11520 case RTE_FLOW_ACTION_TYPE_MARK:
11522 uint32_t tag_be = mlx5_flow_mark_set
11523 (((const struct rte_flow_action_mark *)
11524 (sub_actions->conf))->id);
11526 dev_flow->handle->mark = 1;
11527 pre_rix = dev_flow->handle->dvh.rix_tag;
11528 /* Save the mark resource before sample */
11529 pre_r = dev_flow->dv.tag_resource;
11530 if (flow_dv_tag_resource_register(dev, tag_be,
11533 MLX5_ASSERT(dev_flow->dv.tag_resource);
11534 sample_act->dr_tag_action =
11535 dev_flow->dv.tag_resource->action;
11536 sample_idx->rix_tag =
11537 dev_flow->handle->dvh.rix_tag;
11538 sample_actions[sample_act->actions_num++] =
11539 sample_act->dr_tag_action;
11540 /* Recover the mark resource after sample */
11541 dev_flow->dv.tag_resource = pre_r;
11542 dev_flow->handle->dvh.rix_tag = pre_rix;
11543 action_flags |= MLX5_FLOW_ACTION_MARK;
11546 case RTE_FLOW_ACTION_TYPE_COUNT:
11548 if (!flow->counter) {
11550 flow_dv_translate_create_counter(dev,
11551 dev_flow, sub_actions->conf,
11553 if (!flow->counter)
11554 return rte_flow_error_set
11556 RTE_FLOW_ERROR_TYPE_ACTION,
11558 "cannot create counter"
11561 sample_act->dr_cnt_action =
11562 (flow_dv_counter_get_by_idx(dev,
11563 flow->counter, NULL))->action;
11564 sample_actions[sample_act->actions_num++] =
11565 sample_act->dr_cnt_action;
11566 action_flags |= MLX5_FLOW_ACTION_COUNT;
11569 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11570 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11572 struct mlx5_flow_dv_port_id_action_resource
11574 uint32_t port_id = 0;
11576 memset(&port_id_resource, 0, sizeof(port_id_resource));
11577 /* Save the port id resource before sample */
11578 pre_rix = dev_flow->handle->rix_port_id_action;
11579 pre_r = dev_flow->dv.port_id_action;
11580 if (flow_dv_translate_action_port_id(dev, sub_actions,
11583 port_id_resource.port_id = port_id;
11584 if (flow_dv_port_id_action_resource_register
11585 (dev, &port_id_resource, dev_flow, error))
11587 sample_act->dr_port_id_action =
11588 dev_flow->dv.port_id_action->action;
11589 sample_idx->rix_port_id_action =
11590 dev_flow->handle->rix_port_id_action;
11591 sample_actions[sample_act->actions_num++] =
11592 sample_act->dr_port_id_action;
11593 /* Recover the port id resource after sample */
11594 dev_flow->dv.port_id_action = pre_r;
11595 dev_flow->handle->rix_port_id_action = pre_rix;
11597 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11600 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11601 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11602 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11603 /* Save the encap resource before sample */
11604 pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11605 pre_r = dev_flow->dv.encap_decap;
11606 if (flow_dv_create_action_l2_encap(dev, sub_actions,
11611 sample_act->dr_encap_action =
11612 dev_flow->dv.encap_decap->action;
11613 sample_idx->rix_encap_decap =
11614 dev_flow->handle->dvh.rix_encap_decap;
11615 sample_actions[sample_act->actions_num++] =
11616 sample_act->dr_encap_action;
11617 /* Recover the encap resource after sample */
11618 dev_flow->dv.encap_decap = pre_r;
11619 dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11620 action_flags |= MLX5_FLOW_ACTION_ENCAP;
11623 return rte_flow_error_set(error, EINVAL,
11624 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11626 "Not support for sampler action");
11629 sample_act->action_flags = action_flags;
11630 res->ft_id = dev_flow->dv.group;
11631 if (attr->transfer) {
11633 uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11634 uint64_t set_action;
11635 } action_ctx = { .set_action = 0 };
11637 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11638 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11639 MLX5_MODIFICATION_TYPE_SET);
11640 MLX5_SET(set_action_in, action_ctx.action_in, field,
11641 MLX5_MODI_META_REG_C_0);
11642 MLX5_SET(set_action_in, action_ctx.action_in, data,
11643 priv->vport_meta_tag);
11644 res->set_action = action_ctx.set_action;
11645 } else if (attr->ingress) {
11646 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11648 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11654 * Convert Sample action to DV specification.
11657 * Pointer to rte_eth_dev structure.
11658 * @param[in, out] dev_flow
11659 * Pointer to the mlx5_flow.
11660 * @param[in] num_of_dest
11661 * The num of destination.
11662 * @param[in, out] res
11663 * Pointer to sample resource.
11664 * @param[in, out] mdest_res
11665 * Pointer to destination array resource.
11666 * @param[in] sample_actions
11667 * Pointer to sample path actions list.
11668 * @param[in] action_flags
11669 * Holds the actions detected until now.
11670 * @param[out] error
11671 * Pointer to the error structure.
11674 * 0 on success, a negative errno value otherwise and rte_errno is set.
11677 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11678 struct mlx5_flow *dev_flow,
11679 uint32_t num_of_dest,
11680 struct mlx5_flow_dv_sample_resource *res,
11681 struct mlx5_flow_dv_dest_array_resource *mdest_res,
11682 void **sample_actions,
11683 uint64_t action_flags,
11684 struct rte_flow_error *error)
11686 /* update normal path action resource into last index of array */
11687 uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11688 struct mlx5_flow_sub_actions_list *sample_act =
11689 &mdest_res->sample_act[dest_index];
11690 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11691 struct mlx5_flow_rss_desc *rss_desc;
11692 uint32_t normal_idx = 0;
11693 struct mlx5_hrxq *hrxq;
11697 rss_desc = &wks->rss_desc;
11698 if (num_of_dest > 1) {
11699 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11700 /* Handle QP action for mirroring */
11701 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11702 rss_desc, &hrxq_idx);
11704 return rte_flow_error_set
11706 RTE_FLOW_ERROR_TYPE_ACTION,
11708 "cannot create rx queue");
11710 mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11711 sample_act->dr_queue_action = hrxq->action;
11712 if (action_flags & MLX5_FLOW_ACTION_MARK)
11713 dev_flow->handle->rix_hrxq = hrxq_idx;
11714 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11716 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11718 mdest_res->sample_idx[dest_index].rix_encap_decap =
11719 dev_flow->handle->dvh.rix_encap_decap;
11720 sample_act->dr_encap_action =
11721 dev_flow->dv.encap_decap->action;
11722 dev_flow->handle->dvh.rix_encap_decap = 0;
11724 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11726 mdest_res->sample_idx[dest_index].rix_port_id_action =
11727 dev_flow->handle->rix_port_id_action;
11728 sample_act->dr_port_id_action =
11729 dev_flow->dv.port_id_action->action;
11730 dev_flow->handle->rix_port_id_action = 0;
11732 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11734 mdest_res->sample_idx[dest_index].rix_jump =
11735 dev_flow->handle->rix_jump;
11736 sample_act->dr_jump_action =
11737 dev_flow->dv.jump->action;
11738 dev_flow->handle->rix_jump = 0;
11740 sample_act->actions_num = normal_idx;
11741 /* update sample action resource into first index of array */
11742 mdest_res->ft_type = res->ft_type;
11743 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11744 sizeof(struct mlx5_flow_sub_actions_idx));
11745 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11746 sizeof(struct mlx5_flow_sub_actions_list));
11747 mdest_res->num_of_dest = num_of_dest;
11748 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11750 return rte_flow_error_set(error, EINVAL,
11751 RTE_FLOW_ERROR_TYPE_ACTION,
11752 NULL, "can't create sample "
11755 res->sub_actions = sample_actions;
11756 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11757 return rte_flow_error_set(error, EINVAL,
11758 RTE_FLOW_ERROR_TYPE_ACTION,
11760 "can't create sample action");
11766 * Remove an ASO age action from age actions list.
11769 * Pointer to the Ethernet device structure.
11771 * Pointer to the aso age action handler.
11774 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11775 struct mlx5_aso_age_action *age)
11777 struct mlx5_age_info *age_info;
11778 struct mlx5_age_param *age_param = &age->age_params;
11779 struct mlx5_priv *priv = dev->data->dev_private;
11780 uint16_t expected = AGE_CANDIDATE;
11782 age_info = GET_PORT_AGE_INFO(priv);
11783 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11784 AGE_FREE, false, __ATOMIC_RELAXED,
11785 __ATOMIC_RELAXED)) {
11787 * We need the lock even it is age timeout,
11788 * since age action may still in process.
11790 rte_spinlock_lock(&age_info->aged_sl);
11791 LIST_REMOVE(age, next);
11792 rte_spinlock_unlock(&age_info->aged_sl);
11793 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11798 * Release an ASO age action.
11801 * Pointer to the Ethernet device structure.
11802 * @param[in] age_idx
11803 * Index of ASO age action to release.
11805 * True if the release operation is during flow destroy operation.
11806 * False if the release operation is during action destroy operation.
11809 * 0 when age action was removed, otherwise the number of references.
11812 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11814 struct mlx5_priv *priv = dev->data->dev_private;
11815 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11816 struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11817 uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11820 flow_dv_aso_age_remove_from_age(dev, age);
11821 rte_spinlock_lock(&mng->free_sl);
11822 LIST_INSERT_HEAD(&mng->free, age, next);
11823 rte_spinlock_unlock(&mng->free_sl);
11829 * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11832 * Pointer to the Ethernet device structure.
11835 * 0 on success, otherwise negative errno value and rte_errno is set.
11838 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11840 struct mlx5_priv *priv = dev->data->dev_private;
11841 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11842 void *old_pools = mng->pools;
11843 uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11844 uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11845 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11848 rte_errno = ENOMEM;
11852 memcpy(pools, old_pools,
11853 mng->n * sizeof(struct mlx5_flow_counter_pool *));
11854 mlx5_free(old_pools);
11856 /* First ASO flow hit allocation - starting ASO data-path. */
11857 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11865 mng->pools = pools;
11870 * Create and initialize a new ASO aging pool.
11873 * Pointer to the Ethernet device structure.
11874 * @param[out] age_free
11875 * Where to put the pointer of a new age action.
11878 * The age actions pool pointer and @p age_free is set on success,
11879 * NULL otherwise and rte_errno is set.
11881 static struct mlx5_aso_age_pool *
11882 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11883 struct mlx5_aso_age_action **age_free)
11885 struct mlx5_priv *priv = dev->data->dev_private;
11886 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11887 struct mlx5_aso_age_pool *pool = NULL;
11888 struct mlx5_devx_obj *obj = NULL;
11891 obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
11892 priv->sh->cdev->pdn);
11894 rte_errno = ENODATA;
11895 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11898 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11900 claim_zero(mlx5_devx_cmd_destroy(obj));
11901 rte_errno = ENOMEM;
11904 pool->flow_hit_aso_obj = obj;
11905 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11906 rte_spinlock_lock(&mng->resize_sl);
11907 pool->index = mng->next;
11908 /* Resize pools array if there is no room for the new pool in it. */
11909 if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11910 claim_zero(mlx5_devx_cmd_destroy(obj));
11912 rte_spinlock_unlock(&mng->resize_sl);
11915 mng->pools[pool->index] = pool;
11917 rte_spinlock_unlock(&mng->resize_sl);
11918 /* Assign the first action in the new pool, the rest go to free list. */
11919 *age_free = &pool->actions[0];
11920 for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11921 pool->actions[i].offset = i;
11922 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11928 * Allocate a ASO aging bit.
11931 * Pointer to the Ethernet device structure.
11932 * @param[out] error
11933 * Pointer to the error structure.
11936 * Index to ASO age action on success, 0 otherwise and rte_errno is set.
11939 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11941 struct mlx5_priv *priv = dev->data->dev_private;
11942 const struct mlx5_aso_age_pool *pool;
11943 struct mlx5_aso_age_action *age_free = NULL;
11944 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11947 /* Try to get the next free age action bit. */
11948 rte_spinlock_lock(&mng->free_sl);
11949 age_free = LIST_FIRST(&mng->free);
11951 LIST_REMOVE(age_free, next);
11952 } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11953 rte_spinlock_unlock(&mng->free_sl);
11954 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11955 NULL, "failed to create ASO age pool");
11956 return 0; /* 0 is an error. */
11958 rte_spinlock_unlock(&mng->free_sl);
11959 pool = container_of
11960 ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11961 (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11963 if (!age_free->dr_action) {
11964 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11968 rte_flow_error_set(error, rte_errno,
11969 RTE_FLOW_ERROR_TYPE_ACTION,
11970 NULL, "failed to get reg_c "
11971 "for ASO flow hit");
11972 return 0; /* 0 is an error. */
11974 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11975 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11976 (priv->sh->rx_domain,
11977 pool->flow_hit_aso_obj->obj, age_free->offset,
11978 MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11979 (reg_c - REG_C_0));
11980 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11981 if (!age_free->dr_action) {
11983 rte_spinlock_lock(&mng->free_sl);
11984 LIST_INSERT_HEAD(&mng->free, age_free, next);
11985 rte_spinlock_unlock(&mng->free_sl);
11986 rte_flow_error_set(error, rte_errno,
11987 RTE_FLOW_ERROR_TYPE_ACTION,
11988 NULL, "failed to create ASO "
11989 "flow hit action");
11990 return 0; /* 0 is an error. */
11993 __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
11994 return pool->index | ((age_free->offset + 1) << 16);
11998 * Initialize flow ASO age parameters.
12001 * Pointer to rte_eth_dev structure.
12002 * @param[in] age_idx
12003 * Index of ASO age action.
12004 * @param[in] context
12005 * Pointer to flow counter age context.
12006 * @param[in] timeout
12007 * Aging timeout in seconds.
12011 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12016 struct mlx5_aso_age_action *aso_age;
12018 aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12019 MLX5_ASSERT(aso_age);
12020 aso_age->age_params.context = context;
12021 aso_age->age_params.timeout = timeout;
12022 aso_age->age_params.port_id = dev->data->port_id;
12023 __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12025 __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12030 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12031 const struct rte_flow_item_integrity *value,
12032 void *headers_m, void *headers_v)
12035 /* application l4_ok filter aggregates all hardware l4 filters
12036 * therefore hw l4_checksum_ok must be implicitly added here.
12038 struct rte_flow_item_integrity local_item;
12040 local_item.l4_csum_ok = 1;
12041 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12042 local_item.l4_csum_ok);
12043 if (value->l4_ok) {
12044 /* application l4_ok = 1 matches sets both hw flags
12045 * l4_ok and l4_checksum_ok flags to 1.
12047 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12048 l4_checksum_ok, local_item.l4_csum_ok);
12049 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12051 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12054 /* application l4_ok = 0 matches on hw flag
12055 * l4_checksum_ok = 0 only.
12057 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12058 l4_checksum_ok, 0);
12060 } else if (mask->l4_csum_ok) {
12061 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12063 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12064 value->l4_csum_ok);
12069 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12070 const struct rte_flow_item_integrity *value,
12071 void *headers_m, void *headers_v,
12075 /* application l3_ok filter aggregates all hardware l3 filters
12076 * therefore hw ipv4_checksum_ok must be implicitly added here.
12078 struct rte_flow_item_integrity local_item;
12080 local_item.ipv4_csum_ok = !!is_ipv4;
12081 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12082 local_item.ipv4_csum_ok);
12083 if (value->l3_ok) {
12084 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12085 ipv4_checksum_ok, local_item.ipv4_csum_ok);
12086 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12088 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12091 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12092 ipv4_checksum_ok, 0);
12094 } else if (mask->ipv4_csum_ok) {
12095 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12096 mask->ipv4_csum_ok);
12097 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12098 value->ipv4_csum_ok);
12103 flow_dv_translate_item_integrity(void *matcher, void *key,
12104 const struct rte_flow_item *head_item,
12105 const struct rte_flow_item *integrity_item)
12107 const struct rte_flow_item_integrity *mask = integrity_item->mask;
12108 const struct rte_flow_item_integrity *value = integrity_item->spec;
12109 const struct rte_flow_item *tunnel_item, *end_item, *item;
12112 uint32_t l3_protocol;
12117 mask = &rte_flow_item_integrity_mask;
12118 if (value->level > 1) {
12119 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12121 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12123 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12125 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12127 tunnel_item = mlx5_flow_find_tunnel_item(head_item);
12128 if (value->level > 1) {
12129 /* tunnel item was verified during the item validation */
12130 item = tunnel_item;
12131 end_item = mlx5_find_end_item(tunnel_item);
12134 end_item = tunnel_item ? tunnel_item :
12135 mlx5_find_end_item(integrity_item);
12137 l3_protocol = mask->l3_ok ?
12138 mlx5_flow_locate_proto_l3(&item, end_item) : 0;
12139 flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
12140 l3_protocol == RTE_ETHER_TYPE_IPV4);
12141 flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
12145 * Prepares DV flow counter with aging configuration.
12146 * Gets it by index when exists, creates a new one when doesn't.
12149 * Pointer to rte_eth_dev structure.
12150 * @param[in] dev_flow
12151 * Pointer to the mlx5_flow.
12152 * @param[in, out] flow
12153 * Pointer to the sub flow.
12155 * Pointer to the counter action configuration.
12157 * Pointer to the aging action configuration.
12158 * @param[out] error
12159 * Pointer to the error structure.
12162 * Pointer to the counter, NULL otherwise.
12164 static struct mlx5_flow_counter *
12165 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12166 struct mlx5_flow *dev_flow,
12167 struct rte_flow *flow,
12168 const struct rte_flow_action_count *count,
12169 const struct rte_flow_action_age *age,
12170 struct rte_flow_error *error)
12172 if (!flow->counter) {
12173 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12175 if (!flow->counter) {
12176 rte_flow_error_set(error, rte_errno,
12177 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12178 "cannot create counter object.");
12182 return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12186 * Release an ASO CT action by its own device.
12189 * Pointer to the Ethernet device structure.
12191 * Index of ASO CT action to release.
12194 * 0 when CT action was removed, otherwise the number of references.
12197 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12199 struct mlx5_priv *priv = dev->data->dev_private;
12200 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12202 struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12203 enum mlx5_aso_ct_state state =
12204 __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12206 /* Cannot release when CT is in the ASO SQ. */
12207 if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12209 ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12211 if (ct->dr_action_orig) {
12212 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12213 claim_zero(mlx5_glue->destroy_flow_action
12214 (ct->dr_action_orig));
12216 ct->dr_action_orig = NULL;
12218 if (ct->dr_action_rply) {
12219 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12220 claim_zero(mlx5_glue->destroy_flow_action
12221 (ct->dr_action_rply));
12223 ct->dr_action_rply = NULL;
12225 /* Clear the state to free, no need in 1st allocation. */
12226 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12227 rte_spinlock_lock(&mng->ct_sl);
12228 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12229 rte_spinlock_unlock(&mng->ct_sl);
12235 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12236 struct rte_flow_error *error)
12238 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12239 uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12240 struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12243 MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12244 if (dev->data->dev_started != 1)
12245 return rte_flow_error_set(error, EAGAIN,
12246 RTE_FLOW_ERROR_TYPE_ACTION,
12248 "Indirect CT action cannot be destroyed when the port is stopped");
12249 ret = flow_dv_aso_ct_dev_release(owndev, idx);
12251 return rte_flow_error_set(error, EAGAIN,
12252 RTE_FLOW_ERROR_TYPE_ACTION,
12254 "Current state prevents indirect CT action from being destroyed");
12259 * Resize the ASO CT pools array by 64 pools.
12262 * Pointer to the Ethernet device structure.
12265 * 0 on success, otherwise negative errno value and rte_errno is set.
12268 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12270 struct mlx5_priv *priv = dev->data->dev_private;
12271 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12272 void *old_pools = mng->pools;
12273 /* Magic number now, need a macro. */
12274 uint32_t resize = mng->n + 64;
12275 uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12276 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12279 rte_errno = ENOMEM;
12282 rte_rwlock_write_lock(&mng->resize_rwl);
12283 /* ASO SQ/QP was already initialized in the startup. */
12285 /* Realloc could be an alternative choice. */
12286 rte_memcpy(pools, old_pools,
12287 mng->n * sizeof(struct mlx5_aso_ct_pool *));
12288 mlx5_free(old_pools);
12291 mng->pools = pools;
12292 rte_rwlock_write_unlock(&mng->resize_rwl);
12297 * Create and initialize a new ASO CT pool.
12300 * Pointer to the Ethernet device structure.
12301 * @param[out] ct_free
12302 * Where to put the pointer of a new CT action.
12305 * The CT actions pool pointer and @p ct_free is set on success,
12306 * NULL otherwise and rte_errno is set.
12308 static struct mlx5_aso_ct_pool *
12309 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12310 struct mlx5_aso_ct_action **ct_free)
12312 struct mlx5_priv *priv = dev->data->dev_private;
12313 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12314 struct mlx5_aso_ct_pool *pool = NULL;
12315 struct mlx5_devx_obj *obj = NULL;
12317 uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12319 obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12320 priv->sh->cdev->pdn,
12323 rte_errno = ENODATA;
12324 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12327 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12329 rte_errno = ENOMEM;
12330 claim_zero(mlx5_devx_cmd_destroy(obj));
12333 pool->devx_obj = obj;
12334 pool->index = mng->next;
12335 /* Resize pools array if there is no room for the new pool in it. */
12336 if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12337 claim_zero(mlx5_devx_cmd_destroy(obj));
12341 mng->pools[pool->index] = pool;
12343 /* Assign the first action in the new pool, the rest go to free list. */
12344 *ct_free = &pool->actions[0];
12345 /* Lock outside, the list operation is safe here. */
12346 for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12347 /* refcnt is 0 when allocating the memory. */
12348 pool->actions[i].offset = i;
12349 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12355 * Allocate a ASO CT action from free list.
12358 * Pointer to the Ethernet device structure.
12359 * @param[out] error
12360 * Pointer to the error structure.
12363 * Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12366 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12368 struct mlx5_priv *priv = dev->data->dev_private;
12369 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12370 struct mlx5_aso_ct_action *ct = NULL;
12371 struct mlx5_aso_ct_pool *pool;
12376 if (!priv->sh->devx) {
12377 rte_errno = ENOTSUP;
12380 /* Get a free CT action, if no, a new pool will be created. */
12381 rte_spinlock_lock(&mng->ct_sl);
12382 ct = LIST_FIRST(&mng->free_cts);
12384 LIST_REMOVE(ct, next);
12385 } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12386 rte_spinlock_unlock(&mng->ct_sl);
12387 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12388 NULL, "failed to create ASO CT pool");
12391 rte_spinlock_unlock(&mng->ct_sl);
12392 pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12393 ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12394 /* 0: inactive, 1: created, 2+: used by flows. */
12395 __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12396 reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12397 if (!ct->dr_action_orig) {
12398 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12399 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12400 (priv->sh->rx_domain, pool->devx_obj->obj,
12402 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12405 RTE_SET_USED(reg_c);
12407 if (!ct->dr_action_orig) {
12408 flow_dv_aso_ct_dev_release(dev, ct_idx);
12409 rte_flow_error_set(error, rte_errno,
12410 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12411 "failed to create ASO CT action");
12415 if (!ct->dr_action_rply) {
12416 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12417 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12418 (priv->sh->rx_domain, pool->devx_obj->obj,
12420 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12423 if (!ct->dr_action_rply) {
12424 flow_dv_aso_ct_dev_release(dev, ct_idx);
12425 rte_flow_error_set(error, rte_errno,
12426 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12427 "failed to create ASO CT action");
12435 * Create a conntrack object with context and actions by using ASO mechanism.
12438 * Pointer to rte_eth_dev structure.
12440 * Pointer to conntrack information profile.
12441 * @param[out] error
12442 * Pointer to the error structure.
12445 * Index to conntrack object on success, 0 otherwise.
12448 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12449 const struct rte_flow_action_conntrack *pro,
12450 struct rte_flow_error *error)
12452 struct mlx5_priv *priv = dev->data->dev_private;
12453 struct mlx5_dev_ctx_shared *sh = priv->sh;
12454 struct mlx5_aso_ct_action *ct;
12457 if (!sh->ct_aso_en)
12458 return rte_flow_error_set(error, ENOTSUP,
12459 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12460 "Connection is not supported");
12461 idx = flow_dv_aso_ct_alloc(dev, error);
12463 return rte_flow_error_set(error, rte_errno,
12464 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12465 "Failed to allocate CT object");
12466 ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12467 if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12468 return rte_flow_error_set(error, EBUSY,
12469 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12470 "Failed to update CT");
12471 ct->is_original = !!pro->is_original_dir;
12472 ct->peer = pro->peer_port;
12477 * Fill the flow with DV spec, lock free
12478 * (mutex should be acquired by caller).
12481 * Pointer to rte_eth_dev structure.
12482 * @param[in, out] dev_flow
12483 * Pointer to the sub flow.
12485 * Pointer to the flow attributes.
12487 * Pointer to the list of items.
12488 * @param[in] actions
12489 * Pointer to the list of actions.
12490 * @param[out] error
12491 * Pointer to the error structure.
12494 * 0 on success, a negative errno value otherwise and rte_errno is set.
12497 flow_dv_translate(struct rte_eth_dev *dev,
12498 struct mlx5_flow *dev_flow,
12499 const struct rte_flow_attr *attr,
12500 const struct rte_flow_item items[],
12501 const struct rte_flow_action actions[],
12502 struct rte_flow_error *error)
12504 struct mlx5_priv *priv = dev->data->dev_private;
12505 struct mlx5_dev_config *dev_conf = &priv->config;
12506 struct rte_flow *flow = dev_flow->flow;
12507 struct mlx5_flow_handle *handle = dev_flow->handle;
12508 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12509 struct mlx5_flow_rss_desc *rss_desc;
12510 uint64_t item_flags = 0;
12511 uint64_t last_item = 0;
12512 uint64_t action_flags = 0;
12513 struct mlx5_flow_dv_matcher matcher = {
12515 .size = sizeof(matcher.mask.buf),
12519 bool actions_end = false;
12521 struct mlx5_flow_dv_modify_hdr_resource res;
12522 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12523 sizeof(struct mlx5_modification_cmd) *
12524 (MLX5_MAX_MODIFY_NUM + 1)];
12526 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12527 const struct rte_flow_action_count *count = NULL;
12528 const struct rte_flow_action_age *non_shared_age = NULL;
12529 union flow_dv_attr flow_attr = { .attr = 0 };
12531 union mlx5_flow_tbl_key tbl_key;
12532 uint32_t modify_action_position = UINT32_MAX;
12533 void *match_mask = matcher.mask.buf;
12534 void *match_value = dev_flow->dv.value.buf;
12535 uint8_t next_protocol = 0xff;
12536 struct rte_vlan_hdr vlan = { 0 };
12537 struct mlx5_flow_dv_dest_array_resource mdest_res;
12538 struct mlx5_flow_dv_sample_resource sample_res;
12539 void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12540 const struct rte_flow_action_sample *sample = NULL;
12541 struct mlx5_flow_sub_actions_list *sample_act;
12542 uint32_t sample_act_pos = UINT32_MAX;
12543 uint32_t age_act_pos = UINT32_MAX;
12544 uint32_t num_of_dest = 0;
12545 int tmp_actions_n = 0;
12548 const struct mlx5_flow_tunnel *tunnel = NULL;
12549 struct flow_grp_info grp_info = {
12550 .external = !!dev_flow->external,
12551 .transfer = !!attr->transfer,
12552 .fdb_def_rule = !!priv->fdb_def_rule,
12553 .skip_scale = dev_flow->skip_scale &
12554 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12555 .std_tbl_fix = true,
12557 const struct rte_flow_item *head_item = items;
12560 return rte_flow_error_set(error, ENOMEM,
12561 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12563 "failed to push flow workspace");
12564 rss_desc = &wks->rss_desc;
12565 memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12566 memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12567 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12568 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12569 /* update normal path action resource into last index of array */
12570 sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12571 if (is_tunnel_offload_active(dev)) {
12572 if (dev_flow->tunnel) {
12573 RTE_VERIFY(dev_flow->tof_type ==
12574 MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12575 tunnel = dev_flow->tunnel;
12577 tunnel = mlx5_get_tof(items, actions,
12578 &dev_flow->tof_type);
12579 dev_flow->tunnel = tunnel;
12581 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12582 (dev, attr, tunnel, dev_flow->tof_type);
12584 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12585 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12586 ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12590 dev_flow->dv.group = table;
12591 if (attr->transfer)
12592 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12593 /* number of actions must be set to 0 in case of dirty stack. */
12594 mhdr_res->actions_num = 0;
12595 if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12597 * do not add decap action if match rule drops packet
12598 * HW rejects rules with decap & drop
12600 * if tunnel match rule was inserted before matching tunnel set
12601 * rule flow table used in the match rule must be registered.
12602 * current implementation handles that in the
12603 * flow_dv_match_register() at the function end.
12605 bool add_decap = true;
12606 const struct rte_flow_action *ptr = actions;
12608 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12609 if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12615 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12619 dev_flow->dv.actions[actions_n++] =
12620 dev_flow->dv.encap_decap->action;
12621 action_flags |= MLX5_FLOW_ACTION_DECAP;
12624 for (; !actions_end ; actions++) {
12625 const struct rte_flow_action_queue *queue;
12626 const struct rte_flow_action_rss *rss;
12627 const struct rte_flow_action *action = actions;
12628 const uint8_t *rss_key;
12629 struct mlx5_flow_tbl_resource *tbl;
12630 struct mlx5_aso_age_action *age_act;
12631 struct mlx5_flow_counter *cnt_act;
12632 uint32_t port_id = 0;
12633 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12634 int action_type = actions->type;
12635 const struct rte_flow_action *found_action = NULL;
12636 uint32_t jump_group = 0;
12637 uint32_t owner_idx;
12638 struct mlx5_aso_ct_action *ct;
12640 if (!mlx5_flow_os_action_supported(action_type))
12641 return rte_flow_error_set(error, ENOTSUP,
12642 RTE_FLOW_ERROR_TYPE_ACTION,
12644 "action not supported");
12645 switch (action_type) {
12646 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12647 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12649 case RTE_FLOW_ACTION_TYPE_VOID:
12651 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12652 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12653 if (flow_dv_translate_action_port_id(dev, action,
12656 port_id_resource.port_id = port_id;
12657 MLX5_ASSERT(!handle->rix_port_id_action);
12658 if (flow_dv_port_id_action_resource_register
12659 (dev, &port_id_resource, dev_flow, error))
12661 dev_flow->dv.actions[actions_n++] =
12662 dev_flow->dv.port_id_action->action;
12663 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12664 dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12665 sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12668 case RTE_FLOW_ACTION_TYPE_FLAG:
12669 action_flags |= MLX5_FLOW_ACTION_FLAG;
12670 dev_flow->handle->mark = 1;
12671 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12672 struct rte_flow_action_mark mark = {
12673 .id = MLX5_FLOW_MARK_DEFAULT,
12676 if (flow_dv_convert_action_mark(dev, &mark,
12680 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12683 tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12685 * Only one FLAG or MARK is supported per device flow
12686 * right now. So the pointer to the tag resource must be
12687 * zero before the register process.
12689 MLX5_ASSERT(!handle->dvh.rix_tag);
12690 if (flow_dv_tag_resource_register(dev, tag_be,
12693 MLX5_ASSERT(dev_flow->dv.tag_resource);
12694 dev_flow->dv.actions[actions_n++] =
12695 dev_flow->dv.tag_resource->action;
12697 case RTE_FLOW_ACTION_TYPE_MARK:
12698 action_flags |= MLX5_FLOW_ACTION_MARK;
12699 dev_flow->handle->mark = 1;
12700 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12701 const struct rte_flow_action_mark *mark =
12702 (const struct rte_flow_action_mark *)
12705 if (flow_dv_convert_action_mark(dev, mark,
12709 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12713 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12714 /* Legacy (non-extensive) MARK action. */
12715 tag_be = mlx5_flow_mark_set
12716 (((const struct rte_flow_action_mark *)
12717 (actions->conf))->id);
12718 MLX5_ASSERT(!handle->dvh.rix_tag);
12719 if (flow_dv_tag_resource_register(dev, tag_be,
12722 MLX5_ASSERT(dev_flow->dv.tag_resource);
12723 dev_flow->dv.actions[actions_n++] =
12724 dev_flow->dv.tag_resource->action;
12726 case RTE_FLOW_ACTION_TYPE_SET_META:
12727 if (flow_dv_convert_action_set_meta
12728 (dev, mhdr_res, attr,
12729 (const struct rte_flow_action_set_meta *)
12730 actions->conf, error))
12732 action_flags |= MLX5_FLOW_ACTION_SET_META;
12734 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12735 if (flow_dv_convert_action_set_tag
12737 (const struct rte_flow_action_set_tag *)
12738 actions->conf, error))
12740 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12742 case RTE_FLOW_ACTION_TYPE_DROP:
12743 action_flags |= MLX5_FLOW_ACTION_DROP;
12744 dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12746 case RTE_FLOW_ACTION_TYPE_QUEUE:
12747 queue = actions->conf;
12748 rss_desc->queue_num = 1;
12749 rss_desc->queue[0] = queue->index;
12750 action_flags |= MLX5_FLOW_ACTION_QUEUE;
12751 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12752 sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12755 case RTE_FLOW_ACTION_TYPE_RSS:
12756 rss = actions->conf;
12757 memcpy(rss_desc->queue, rss->queue,
12758 rss->queue_num * sizeof(uint16_t));
12759 rss_desc->queue_num = rss->queue_num;
12760 /* NULL RSS key indicates default RSS key. */
12761 rss_key = !rss->key ? rss_hash_default_key : rss->key;
12762 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12764 * rss->level and rss.types should be set in advance
12765 * when expanding items for RSS.
12767 action_flags |= MLX5_FLOW_ACTION_RSS;
12768 dev_flow->handle->fate_action = rss_desc->shared_rss ?
12769 MLX5_FLOW_FATE_SHARED_RSS :
12770 MLX5_FLOW_FATE_QUEUE;
12772 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12773 owner_idx = (uint32_t)(uintptr_t)action->conf;
12774 age_act = flow_aso_age_get_by_idx(dev, owner_idx);
12775 if (flow->age == 0) {
12776 flow->age = owner_idx;
12777 __atomic_fetch_add(&age_act->refcnt, 1,
12780 age_act_pos = actions_n++;
12781 action_flags |= MLX5_FLOW_ACTION_AGE;
12783 case RTE_FLOW_ACTION_TYPE_AGE:
12784 non_shared_age = action->conf;
12785 age_act_pos = actions_n++;
12786 action_flags |= MLX5_FLOW_ACTION_AGE;
12788 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12789 owner_idx = (uint32_t)(uintptr_t)action->conf;
12790 cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
12792 MLX5_ASSERT(cnt_act != NULL);
12794 * When creating meter drop flow in drop table, the
12795 * counter should not overwrite the rte flow counter.
12797 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12798 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12799 dev_flow->dv.actions[actions_n++] =
12802 if (flow->counter == 0) {
12803 flow->counter = owner_idx;
12805 (&cnt_act->shared_info.refcnt,
12806 1, __ATOMIC_RELAXED);
12808 /* Save information first, will apply later. */
12809 action_flags |= MLX5_FLOW_ACTION_COUNT;
12812 case RTE_FLOW_ACTION_TYPE_COUNT:
12813 if (!priv->sh->devx) {
12814 return rte_flow_error_set
12816 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12818 "count action not supported");
12820 /* Save information first, will apply later. */
12821 count = action->conf;
12822 action_flags |= MLX5_FLOW_ACTION_COUNT;
12824 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12825 dev_flow->dv.actions[actions_n++] =
12826 priv->sh->pop_vlan_action;
12827 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12829 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12830 if (!(action_flags &
12831 MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12832 flow_dev_get_vlan_info_from_items(items, &vlan);
12833 vlan.eth_proto = rte_be_to_cpu_16
12834 ((((const struct rte_flow_action_of_push_vlan *)
12835 actions->conf)->ethertype));
12836 found_action = mlx5_flow_find_action
12838 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12840 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12841 found_action = mlx5_flow_find_action
12843 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12845 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12846 if (flow_dv_create_action_push_vlan
12847 (dev, attr, &vlan, dev_flow, error))
12849 dev_flow->dv.actions[actions_n++] =
12850 dev_flow->dv.push_vlan_res->action;
12851 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12853 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12854 /* of_vlan_push action handled this action */
12855 MLX5_ASSERT(action_flags &
12856 MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12858 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12859 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12861 flow_dev_get_vlan_info_from_items(items, &vlan);
12862 mlx5_update_vlan_vid_pcp(actions, &vlan);
12863 /* If no VLAN push - this is a modify header action */
12864 if (flow_dv_convert_action_modify_vlan_vid
12865 (mhdr_res, actions, error))
12867 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12869 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12870 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12871 if (flow_dv_create_action_l2_encap(dev, actions,
12876 dev_flow->dv.actions[actions_n++] =
12877 dev_flow->dv.encap_decap->action;
12878 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12879 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12880 sample_act->action_flags |=
12881 MLX5_FLOW_ACTION_ENCAP;
12883 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12884 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12885 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12889 dev_flow->dv.actions[actions_n++] =
12890 dev_flow->dv.encap_decap->action;
12891 action_flags |= MLX5_FLOW_ACTION_DECAP;
12893 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12894 /* Handle encap with preceding decap. */
12895 if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12896 if (flow_dv_create_action_raw_encap
12897 (dev, actions, dev_flow, attr, error))
12899 dev_flow->dv.actions[actions_n++] =
12900 dev_flow->dv.encap_decap->action;
12902 /* Handle encap without preceding decap. */
12903 if (flow_dv_create_action_l2_encap
12904 (dev, actions, dev_flow, attr->transfer,
12907 dev_flow->dv.actions[actions_n++] =
12908 dev_flow->dv.encap_decap->action;
12910 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12911 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12912 sample_act->action_flags |=
12913 MLX5_FLOW_ACTION_ENCAP;
12915 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12916 while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12918 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12919 if (flow_dv_create_action_l2_decap
12920 (dev, dev_flow, attr->transfer, error))
12922 dev_flow->dv.actions[actions_n++] =
12923 dev_flow->dv.encap_decap->action;
12925 /* If decap is followed by encap, handle it at encap. */
12926 action_flags |= MLX5_FLOW_ACTION_DECAP;
12928 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12929 dev_flow->dv.actions[actions_n++] =
12930 (void *)(uintptr_t)action->conf;
12931 action_flags |= MLX5_FLOW_ACTION_JUMP;
12933 case RTE_FLOW_ACTION_TYPE_JUMP:
12934 jump_group = ((const struct rte_flow_action_jump *)
12935 action->conf)->group;
12936 grp_info.std_tbl_fix = 0;
12937 if (dev_flow->skip_scale &
12938 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12939 grp_info.skip_scale = 1;
12941 grp_info.skip_scale = 0;
12942 ret = mlx5_flow_group_to_table(dev, tunnel,
12948 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12950 !!dev_flow->external,
12951 tunnel, jump_group, 0,
12954 return rte_flow_error_set
12956 RTE_FLOW_ERROR_TYPE_ACTION,
12958 "cannot create jump action.");
12959 if (flow_dv_jump_tbl_resource_register
12960 (dev, tbl, dev_flow, error)) {
12961 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12962 return rte_flow_error_set
12964 RTE_FLOW_ERROR_TYPE_ACTION,
12966 "cannot create jump action.");
12968 dev_flow->dv.actions[actions_n++] =
12969 dev_flow->dv.jump->action;
12970 action_flags |= MLX5_FLOW_ACTION_JUMP;
12971 dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12972 sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12975 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12976 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12977 if (flow_dv_convert_action_modify_mac
12978 (mhdr_res, actions, error))
12980 action_flags |= actions->type ==
12981 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12982 MLX5_FLOW_ACTION_SET_MAC_SRC :
12983 MLX5_FLOW_ACTION_SET_MAC_DST;
12985 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12986 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12987 if (flow_dv_convert_action_modify_ipv4
12988 (mhdr_res, actions, error))
12990 action_flags |= actions->type ==
12991 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12992 MLX5_FLOW_ACTION_SET_IPV4_SRC :
12993 MLX5_FLOW_ACTION_SET_IPV4_DST;
12995 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12996 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12997 if (flow_dv_convert_action_modify_ipv6
12998 (mhdr_res, actions, error))
13000 action_flags |= actions->type ==
13001 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13002 MLX5_FLOW_ACTION_SET_IPV6_SRC :
13003 MLX5_FLOW_ACTION_SET_IPV6_DST;
13005 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13006 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13007 if (flow_dv_convert_action_modify_tp
13008 (mhdr_res, actions, items,
13009 &flow_attr, dev_flow, !!(action_flags &
13010 MLX5_FLOW_ACTION_DECAP), error))
13012 action_flags |= actions->type ==
13013 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13014 MLX5_FLOW_ACTION_SET_TP_SRC :
13015 MLX5_FLOW_ACTION_SET_TP_DST;
13017 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13018 if (flow_dv_convert_action_modify_dec_ttl
13019 (mhdr_res, items, &flow_attr, dev_flow,
13021 MLX5_FLOW_ACTION_DECAP), error))
13023 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13025 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13026 if (flow_dv_convert_action_modify_ttl
13027 (mhdr_res, actions, items, &flow_attr,
13028 dev_flow, !!(action_flags &
13029 MLX5_FLOW_ACTION_DECAP), error))
13031 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13033 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13034 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13035 if (flow_dv_convert_action_modify_tcp_seq
13036 (mhdr_res, actions, error))
13038 action_flags |= actions->type ==
13039 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13040 MLX5_FLOW_ACTION_INC_TCP_SEQ :
13041 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13044 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13045 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13046 if (flow_dv_convert_action_modify_tcp_ack
13047 (mhdr_res, actions, error))
13049 action_flags |= actions->type ==
13050 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13051 MLX5_FLOW_ACTION_INC_TCP_ACK :
13052 MLX5_FLOW_ACTION_DEC_TCP_ACK;
13054 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13055 if (flow_dv_convert_action_set_reg
13056 (mhdr_res, actions, error))
13058 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13060 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13061 if (flow_dv_convert_action_copy_mreg
13062 (dev, mhdr_res, actions, error))
13064 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13066 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13067 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13068 dev_flow->handle->fate_action =
13069 MLX5_FLOW_FATE_DEFAULT_MISS;
13071 case RTE_FLOW_ACTION_TYPE_METER:
13073 return rte_flow_error_set(error, rte_errno,
13074 RTE_FLOW_ERROR_TYPE_ACTION,
13075 NULL, "Failed to get meter in flow.");
13076 /* Set the meter action. */
13077 dev_flow->dv.actions[actions_n++] =
13078 wks->fm->meter_action;
13079 action_flags |= MLX5_FLOW_ACTION_METER;
13081 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13082 if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13085 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13087 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13088 if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13091 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13093 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13094 sample_act_pos = actions_n;
13095 sample = (const struct rte_flow_action_sample *)
13098 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13099 /* put encap action into group if work with port id */
13100 if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13101 (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13102 sample_act->action_flags |=
13103 MLX5_FLOW_ACTION_ENCAP;
13105 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13106 if (flow_dv_convert_action_modify_field
13107 (dev, mhdr_res, actions, attr, error))
13109 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13111 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13112 owner_idx = (uint32_t)(uintptr_t)action->conf;
13113 ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13115 return rte_flow_error_set(error, EINVAL,
13116 RTE_FLOW_ERROR_TYPE_ACTION,
13118 "Failed to get CT object.");
13119 if (mlx5_aso_ct_available(priv->sh, ct))
13120 return rte_flow_error_set(error, rte_errno,
13121 RTE_FLOW_ERROR_TYPE_ACTION,
13123 "CT is unavailable.");
13124 if (ct->is_original)
13125 dev_flow->dv.actions[actions_n] =
13126 ct->dr_action_orig;
13128 dev_flow->dv.actions[actions_n] =
13129 ct->dr_action_rply;
13130 if (flow->ct == 0) {
13131 flow->indirect_type =
13132 MLX5_INDIRECT_ACTION_TYPE_CT;
13133 flow->ct = owner_idx;
13134 __atomic_fetch_add(&ct->refcnt, 1,
13138 action_flags |= MLX5_FLOW_ACTION_CT;
13140 case RTE_FLOW_ACTION_TYPE_END:
13141 actions_end = true;
13142 if (mhdr_res->actions_num) {
13143 /* create modify action if needed. */
13144 if (flow_dv_modify_hdr_resource_register
13145 (dev, mhdr_res, dev_flow, error))
13147 dev_flow->dv.actions[modify_action_position] =
13148 handle->dvh.modify_hdr->action;
13151 * Handle AGE and COUNT action by single HW counter
13152 * when they are not shared.
13154 if (action_flags & MLX5_FLOW_ACTION_AGE) {
13155 if ((non_shared_age && count) ||
13156 !(priv->sh->flow_hit_aso_en &&
13157 (attr->group || attr->transfer))) {
13158 /* Creates age by counters. */
13159 cnt_act = flow_dv_prepare_counter
13166 dev_flow->dv.actions[age_act_pos] =
13170 if (!flow->age && non_shared_age) {
13171 flow->age = flow_dv_aso_age_alloc
13175 flow_dv_aso_age_params_init
13177 non_shared_age->context ?
13178 non_shared_age->context :
13179 (void *)(uintptr_t)
13180 (dev_flow->flow_idx),
13181 non_shared_age->timeout);
13183 age_act = flow_aso_age_get_by_idx(dev,
13185 dev_flow->dv.actions[age_act_pos] =
13186 age_act->dr_action;
13188 if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13190 * Create one count action, to be used
13191 * by all sub-flows.
13193 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13198 dev_flow->dv.actions[actions_n++] =
13204 if (mhdr_res->actions_num &&
13205 modify_action_position == UINT32_MAX)
13206 modify_action_position = actions_n++;
13208 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13209 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13210 int item_type = items->type;
13212 if (!mlx5_flow_os_item_supported(item_type))
13213 return rte_flow_error_set(error, ENOTSUP,
13214 RTE_FLOW_ERROR_TYPE_ITEM,
13215 NULL, "item not supported");
13216 switch (item_type) {
13217 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13218 flow_dv_translate_item_port_id
13219 (dev, match_mask, match_value, items, attr);
13220 last_item = MLX5_FLOW_ITEM_PORT_ID;
13222 case RTE_FLOW_ITEM_TYPE_ETH:
13223 flow_dv_translate_item_eth(match_mask, match_value,
13225 dev_flow->dv.group);
13226 matcher.priority = action_flags &
13227 MLX5_FLOW_ACTION_DEFAULT_MISS &&
13228 !dev_flow->external ?
13229 MLX5_PRIORITY_MAP_L3 :
13230 MLX5_PRIORITY_MAP_L2;
13231 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13232 MLX5_FLOW_LAYER_OUTER_L2;
13234 case RTE_FLOW_ITEM_TYPE_VLAN:
13235 flow_dv_translate_item_vlan(dev_flow,
13236 match_mask, match_value,
13238 dev_flow->dv.group);
13239 matcher.priority = MLX5_PRIORITY_MAP_L2;
13240 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13241 MLX5_FLOW_LAYER_INNER_VLAN) :
13242 (MLX5_FLOW_LAYER_OUTER_L2 |
13243 MLX5_FLOW_LAYER_OUTER_VLAN);
13245 case RTE_FLOW_ITEM_TYPE_IPV4:
13246 mlx5_flow_tunnel_ip_check(items, next_protocol,
13247 &item_flags, &tunnel);
13248 flow_dv_translate_item_ipv4(match_mask, match_value,
13250 dev_flow->dv.group);
13251 matcher.priority = MLX5_PRIORITY_MAP_L3;
13252 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13253 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13254 if (items->mask != NULL &&
13255 ((const struct rte_flow_item_ipv4 *)
13256 items->mask)->hdr.next_proto_id) {
13258 ((const struct rte_flow_item_ipv4 *)
13259 (items->spec))->hdr.next_proto_id;
13261 ((const struct rte_flow_item_ipv4 *)
13262 (items->mask))->hdr.next_proto_id;
13264 /* Reset for inner layer. */
13265 next_protocol = 0xff;
13268 case RTE_FLOW_ITEM_TYPE_IPV6:
13269 mlx5_flow_tunnel_ip_check(items, next_protocol,
13270 &item_flags, &tunnel);
13271 flow_dv_translate_item_ipv6(match_mask, match_value,
13273 dev_flow->dv.group);
13274 matcher.priority = MLX5_PRIORITY_MAP_L3;
13275 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13276 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13277 if (items->mask != NULL &&
13278 ((const struct rte_flow_item_ipv6 *)
13279 items->mask)->hdr.proto) {
13281 ((const struct rte_flow_item_ipv6 *)
13282 items->spec)->hdr.proto;
13284 ((const struct rte_flow_item_ipv6 *)
13285 items->mask)->hdr.proto;
13287 /* Reset for inner layer. */
13288 next_protocol = 0xff;
13291 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13292 flow_dv_translate_item_ipv6_frag_ext(match_mask,
13295 last_item = tunnel ?
13296 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13297 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13298 if (items->mask != NULL &&
13299 ((const struct rte_flow_item_ipv6_frag_ext *)
13300 items->mask)->hdr.next_header) {
13302 ((const struct rte_flow_item_ipv6_frag_ext *)
13303 items->spec)->hdr.next_header;
13305 ((const struct rte_flow_item_ipv6_frag_ext *)
13306 items->mask)->hdr.next_header;
13308 /* Reset for inner layer. */
13309 next_protocol = 0xff;
13312 case RTE_FLOW_ITEM_TYPE_TCP:
13313 flow_dv_translate_item_tcp(match_mask, match_value,
13315 matcher.priority = MLX5_PRIORITY_MAP_L4;
13316 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13317 MLX5_FLOW_LAYER_OUTER_L4_TCP;
13319 case RTE_FLOW_ITEM_TYPE_UDP:
13320 flow_dv_translate_item_udp(match_mask, match_value,
13322 matcher.priority = MLX5_PRIORITY_MAP_L4;
13323 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13324 MLX5_FLOW_LAYER_OUTER_L4_UDP;
13326 case RTE_FLOW_ITEM_TYPE_GRE:
13327 flow_dv_translate_item_gre(match_mask, match_value,
13329 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13330 last_item = MLX5_FLOW_LAYER_GRE;
13332 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13333 flow_dv_translate_item_gre_key(match_mask,
13334 match_value, items);
13335 last_item = MLX5_FLOW_LAYER_GRE_KEY;
13337 case RTE_FLOW_ITEM_TYPE_NVGRE:
13338 flow_dv_translate_item_nvgre(match_mask, match_value,
13340 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13341 last_item = MLX5_FLOW_LAYER_GRE;
13343 case RTE_FLOW_ITEM_TYPE_VXLAN:
13344 flow_dv_translate_item_vxlan(dev, attr,
13345 match_mask, match_value,
13347 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13348 last_item = MLX5_FLOW_LAYER_VXLAN;
13350 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13351 flow_dv_translate_item_vxlan_gpe(match_mask,
13352 match_value, items,
13354 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13355 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13357 case RTE_FLOW_ITEM_TYPE_GENEVE:
13358 flow_dv_translate_item_geneve(match_mask, match_value,
13360 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13361 last_item = MLX5_FLOW_LAYER_GENEVE;
13363 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13364 ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13368 return rte_flow_error_set(error, -ret,
13369 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13370 "cannot create GENEVE TLV option");
13371 flow->geneve_tlv_option = 1;
13372 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13374 case RTE_FLOW_ITEM_TYPE_MPLS:
13375 flow_dv_translate_item_mpls(match_mask, match_value,
13376 items, last_item, tunnel);
13377 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13378 last_item = MLX5_FLOW_LAYER_MPLS;
13380 case RTE_FLOW_ITEM_TYPE_MARK:
13381 flow_dv_translate_item_mark(dev, match_mask,
13382 match_value, items);
13383 last_item = MLX5_FLOW_ITEM_MARK;
13385 case RTE_FLOW_ITEM_TYPE_META:
13386 flow_dv_translate_item_meta(dev, match_mask,
13387 match_value, attr, items);
13388 last_item = MLX5_FLOW_ITEM_METADATA;
13390 case RTE_FLOW_ITEM_TYPE_ICMP:
13391 flow_dv_translate_item_icmp(match_mask, match_value,
13393 last_item = MLX5_FLOW_LAYER_ICMP;
13395 case RTE_FLOW_ITEM_TYPE_ICMP6:
13396 flow_dv_translate_item_icmp6(match_mask, match_value,
13398 last_item = MLX5_FLOW_LAYER_ICMP6;
13400 case RTE_FLOW_ITEM_TYPE_TAG:
13401 flow_dv_translate_item_tag(dev, match_mask,
13402 match_value, items);
13403 last_item = MLX5_FLOW_ITEM_TAG;
13405 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13406 flow_dv_translate_mlx5_item_tag(dev, match_mask,
13407 match_value, items);
13408 last_item = MLX5_FLOW_ITEM_TAG;
13410 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13411 flow_dv_translate_item_tx_queue(dev, match_mask,
13414 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13416 case RTE_FLOW_ITEM_TYPE_GTP:
13417 flow_dv_translate_item_gtp(match_mask, match_value,
13419 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13420 last_item = MLX5_FLOW_LAYER_GTP;
13422 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13423 ret = flow_dv_translate_item_gtp_psc(match_mask,
13427 return rte_flow_error_set(error, -ret,
13428 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13429 "cannot create GTP PSC item");
13430 last_item = MLX5_FLOW_LAYER_GTP_PSC;
13432 case RTE_FLOW_ITEM_TYPE_ECPRI:
13433 if (!mlx5_flex_parser_ecpri_exist(dev)) {
13434 /* Create it only the first time to be used. */
13435 ret = mlx5_flex_parser_ecpri_alloc(dev);
13437 return rte_flow_error_set
13439 RTE_FLOW_ERROR_TYPE_ITEM,
13441 "cannot create eCPRI parser");
13443 flow_dv_translate_item_ecpri(dev, match_mask,
13444 match_value, items,
13446 /* No other protocol should follow eCPRI layer. */
13447 last_item = MLX5_FLOW_LAYER_ECPRI;
13449 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13450 flow_dv_translate_item_integrity(match_mask,
13454 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13455 flow_dv_translate_item_aso_ct(dev, match_mask,
13456 match_value, items);
13461 item_flags |= last_item;
13464 * When E-Switch mode is enabled, we have two cases where we need to
13465 * set the source port manually.
13466 * The first one, is in case of Nic steering rule, and the second is
13467 * E-Switch rule where no port_id item was found. In both cases
13468 * the source port is set according the current port in use.
13470 if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13471 (priv->representor || priv->master)) {
13472 if (flow_dv_translate_item_port_id(dev, match_mask,
13473 match_value, NULL, attr))
13476 #ifdef RTE_LIBRTE_MLX5_DEBUG
13477 MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13478 dev_flow->dv.value.buf));
13481 * Layers may be already initialized from prefix flow if this dev_flow
13482 * is the suffix flow.
13484 handle->layers |= item_flags;
13485 if (action_flags & MLX5_FLOW_ACTION_RSS)
13486 flow_dv_hashfields_set(dev_flow, rss_desc);
13487 /* If has RSS action in the sample action, the Sample/Mirror resource
13488 * should be registered after the hash filed be update.
13490 if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13491 ret = flow_dv_translate_action_sample(dev,
13500 ret = flow_dv_create_action_sample(dev,
13509 return rte_flow_error_set
13511 RTE_FLOW_ERROR_TYPE_ACTION,
13513 "cannot create sample action");
13514 if (num_of_dest > 1) {
13515 dev_flow->dv.actions[sample_act_pos] =
13516 dev_flow->dv.dest_array_res->action;
13518 dev_flow->dv.actions[sample_act_pos] =
13519 dev_flow->dv.sample_res->verbs_action;
13523 * For multiple destination (sample action with ratio=1), the encap
13524 * action and port id action will be combined into group action.
13525 * So need remove the original these actions in the flow and only
13526 * use the sample action instead of.
13528 if (num_of_dest > 1 &&
13529 (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13531 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13533 for (i = 0; i < actions_n; i++) {
13534 if ((sample_act->dr_encap_action &&
13535 sample_act->dr_encap_action ==
13536 dev_flow->dv.actions[i]) ||
13537 (sample_act->dr_port_id_action &&
13538 sample_act->dr_port_id_action ==
13539 dev_flow->dv.actions[i]) ||
13540 (sample_act->dr_jump_action &&
13541 sample_act->dr_jump_action ==
13542 dev_flow->dv.actions[i]))
13544 temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13546 memcpy((void *)dev_flow->dv.actions,
13547 (void *)temp_actions,
13548 tmp_actions_n * sizeof(void *));
13549 actions_n = tmp_actions_n;
13551 dev_flow->dv.actions_n = actions_n;
13552 dev_flow->act_flags = action_flags;
13553 if (wks->skip_matcher_reg)
13555 /* Register matcher. */
13556 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13557 matcher.mask.size);
13558 matcher.priority = mlx5_get_matcher_priority(dev, attr,
13561 * When creating meter drop flow in drop table, using original
13562 * 5-tuple match, the matcher priority should be lower than
13565 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13566 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13567 matcher.priority <= MLX5_REG_BITS)
13568 matcher.priority += MLX5_REG_BITS;
13569 /* reserved field no needs to be set to 0 here. */
13570 tbl_key.is_fdb = attr->transfer;
13571 tbl_key.is_egress = attr->egress;
13572 tbl_key.level = dev_flow->dv.group;
13573 tbl_key.id = dev_flow->dv.table_id;
13574 if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13575 tunnel, attr->group, error))
13581 * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13584 * @param[in, out] action
13585 * Shred RSS action holding hash RX queue objects.
13586 * @param[in] hash_fields
13587 * Defines combination of packet fields to participate in RX hash.
13588 * @param[in] tunnel
13590 * @param[in] hrxq_idx
13591 * Hash RX queue index to set.
13594 * 0 on success, otherwise negative errno value.
13597 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13598 const uint64_t hash_fields,
13601 uint32_t *hrxqs = action->hrxq;
13603 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13604 case MLX5_RSS_HASH_IPV4:
13605 /* fall-through. */
13606 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13607 /* fall-through. */
13608 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13609 hrxqs[0] = hrxq_idx;
13611 case MLX5_RSS_HASH_IPV4_TCP:
13612 /* fall-through. */
13613 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13614 /* fall-through. */
13615 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13616 hrxqs[1] = hrxq_idx;
13618 case MLX5_RSS_HASH_IPV4_UDP:
13619 /* fall-through. */
13620 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13621 /* fall-through. */
13622 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13623 hrxqs[2] = hrxq_idx;
13625 case MLX5_RSS_HASH_IPV6:
13626 /* fall-through. */
13627 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13628 /* fall-through. */
13629 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13630 hrxqs[3] = hrxq_idx;
13632 case MLX5_RSS_HASH_IPV6_TCP:
13633 /* fall-through. */
13634 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13635 /* fall-through. */
13636 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13637 hrxqs[4] = hrxq_idx;
13639 case MLX5_RSS_HASH_IPV6_UDP:
13640 /* fall-through. */
13641 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13642 /* fall-through. */
13643 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13644 hrxqs[5] = hrxq_idx;
13646 case MLX5_RSS_HASH_NONE:
13647 hrxqs[6] = hrxq_idx;
13655 * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13659 * Pointer to the Ethernet device structure.
13661 * Shared RSS action ID holding hash RX queue objects.
13662 * @param[in] hash_fields
13663 * Defines combination of packet fields to participate in RX hash.
13664 * @param[in] tunnel
13668 * Valid hash RX queue index, otherwise 0.
13671 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13672 const uint64_t hash_fields)
13674 struct mlx5_priv *priv = dev->data->dev_private;
13675 struct mlx5_shared_action_rss *shared_rss =
13676 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13677 const uint32_t *hrxqs = shared_rss->hrxq;
13679 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13680 case MLX5_RSS_HASH_IPV4:
13681 /* fall-through. */
13682 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13683 /* fall-through. */
13684 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13686 case MLX5_RSS_HASH_IPV4_TCP:
13687 /* fall-through. */
13688 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13689 /* fall-through. */
13690 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13692 case MLX5_RSS_HASH_IPV4_UDP:
13693 /* fall-through. */
13694 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13695 /* fall-through. */
13696 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13698 case MLX5_RSS_HASH_IPV6:
13699 /* fall-through. */
13700 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13701 /* fall-through. */
13702 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13704 case MLX5_RSS_HASH_IPV6_TCP:
13705 /* fall-through. */
13706 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13707 /* fall-through. */
13708 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13710 case MLX5_RSS_HASH_IPV6_UDP:
13711 /* fall-through. */
13712 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13713 /* fall-through. */
13714 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13716 case MLX5_RSS_HASH_NONE:
13725 * Apply the flow to the NIC, lock free,
13726 * (mutex should be acquired by caller).
13729 * Pointer to the Ethernet device structure.
13730 * @param[in, out] flow
13731 * Pointer to flow structure.
13732 * @param[out] error
13733 * Pointer to error structure.
13736 * 0 on success, a negative errno value otherwise and rte_errno is set.
13739 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13740 struct rte_flow_error *error)
13742 struct mlx5_flow_dv_workspace *dv;
13743 struct mlx5_flow_handle *dh;
13744 struct mlx5_flow_handle_dv *dv_h;
13745 struct mlx5_flow *dev_flow;
13746 struct mlx5_priv *priv = dev->data->dev_private;
13747 uint32_t handle_idx;
13751 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13752 struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13756 for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13757 dev_flow = &wks->flows[idx];
13758 dv = &dev_flow->dv;
13759 dh = dev_flow->handle;
13762 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13763 if (dv->transfer) {
13764 MLX5_ASSERT(priv->sh->dr_drop_action);
13765 dv->actions[n++] = priv->sh->dr_drop_action;
13767 #ifdef HAVE_MLX5DV_DR
13768 /* DR supports drop action placeholder. */
13769 MLX5_ASSERT(priv->sh->dr_drop_action);
13770 dv->actions[n++] = dv->group ?
13771 priv->sh->dr_drop_action :
13772 priv->root_drop_action;
13774 /* For DV we use the explicit drop queue. */
13775 MLX5_ASSERT(priv->drop_queue.hrxq);
13777 priv->drop_queue.hrxq->action;
13780 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13781 !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13782 struct mlx5_hrxq *hrxq;
13785 hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13790 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13791 "cannot get hash queue");
13794 dh->rix_hrxq = hrxq_idx;
13795 dv->actions[n++] = hrxq->action;
13796 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13797 struct mlx5_hrxq *hrxq = NULL;
13800 hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13801 rss_desc->shared_rss,
13802 dev_flow->hash_fields);
13804 hrxq = mlx5_ipool_get
13805 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13810 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13811 "cannot get hash queue");
13814 dh->rix_srss = rss_desc->shared_rss;
13815 dv->actions[n++] = hrxq->action;
13816 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13817 if (!priv->sh->default_miss_action) {
13820 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13821 "default miss action not be created.");
13824 dv->actions[n++] = priv->sh->default_miss_action;
13826 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13827 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13828 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13829 (void *)&dv->value, n,
13830 dv->actions, &dh->drv_flow);
13834 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13836 (!priv->config.allow_duplicate_pattern &&
13838 "duplicating pattern is not allowed" :
13839 "hardware refuses to create flow");
13842 if (priv->vmwa_context &&
13843 dh->vf_vlan.tag && !dh->vf_vlan.created) {
13845 * The rule contains the VLAN pattern.
13846 * For VF we are going to create VLAN
13847 * interface to make hypervisor set correct
13848 * e-Switch vport context.
13850 mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13855 err = rte_errno; /* Save rte_errno before cleanup. */
13856 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13857 handle_idx, dh, next) {
13858 /* hrxq is union, don't clear it if the flag is not set. */
13859 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13860 mlx5_hrxq_release(dev, dh->rix_hrxq);
13862 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13865 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13866 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13868 rte_errno = err; /* Restore rte_errno. */
13873 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13874 struct mlx5_list_entry *entry)
13876 struct mlx5_flow_dv_matcher *resource = container_of(entry,
13880 claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13881 mlx5_free(resource);
13885 * Release the flow matcher.
13888 * Pointer to Ethernet device.
13890 * Index to port ID action resource.
13893 * 1 while a reference on it exists, 0 when freed.
13896 flow_dv_matcher_release(struct rte_eth_dev *dev,
13897 struct mlx5_flow_handle *handle)
13899 struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13900 struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13901 typeof(*tbl), tbl);
13904 MLX5_ASSERT(matcher->matcher_object);
13905 ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13906 flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13911 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13913 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13914 struct mlx5_flow_dv_encap_decap_resource *res =
13915 container_of(entry, typeof(*res), entry);
13917 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13918 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13922 * Release an encap/decap resource.
13925 * Pointer to Ethernet device.
13926 * @param encap_decap_idx
13927 * Index of encap decap resource.
13930 * 1 while a reference on it exists, 0 when freed.
13933 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13934 uint32_t encap_decap_idx)
13936 struct mlx5_priv *priv = dev->data->dev_private;
13937 struct mlx5_flow_dv_encap_decap_resource *resource;
13939 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13943 MLX5_ASSERT(resource->action);
13944 return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13948 * Release an jump to table action resource.
13951 * Pointer to Ethernet device.
13953 * Index to the jump action resource.
13956 * 1 while a reference on it exists, 0 when freed.
13959 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13962 struct mlx5_priv *priv = dev->data->dev_private;
13963 struct mlx5_flow_tbl_data_entry *tbl_data;
13965 tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13969 return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13973 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13975 struct mlx5_flow_dv_modify_hdr_resource *res =
13976 container_of(entry, typeof(*res), entry);
13977 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13979 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13980 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
13984 * Release a modify-header resource.
13987 * Pointer to Ethernet device.
13989 * Pointer to mlx5_flow_handle.
13992 * 1 while a reference on it exists, 0 when freed.
13995 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13996 struct mlx5_flow_handle *handle)
13998 struct mlx5_priv *priv = dev->data->dev_private;
13999 struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14001 MLX5_ASSERT(entry->action);
14002 return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14006 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14008 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14009 struct mlx5_flow_dv_port_id_action_resource *resource =
14010 container_of(entry, typeof(*resource), entry);
14012 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14013 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14017 * Release port ID action resource.
14020 * Pointer to Ethernet device.
14022 * Pointer to mlx5_flow_handle.
14025 * 1 while a reference on it exists, 0 when freed.
14028 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14031 struct mlx5_priv *priv = dev->data->dev_private;
14032 struct mlx5_flow_dv_port_id_action_resource *resource;
14034 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14037 MLX5_ASSERT(resource->action);
14038 return mlx5_list_unregister(priv->sh->port_id_action_list,
14043 * Release shared RSS action resource.
14046 * Pointer to Ethernet device.
14048 * Shared RSS action index.
14051 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14053 struct mlx5_priv *priv = dev->data->dev_private;
14054 struct mlx5_shared_action_rss *shared_rss;
14056 shared_rss = mlx5_ipool_get
14057 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14058 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14062 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14064 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14065 struct mlx5_flow_dv_push_vlan_action_resource *resource =
14066 container_of(entry, typeof(*resource), entry);
14068 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14069 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14073 * Release push vlan action resource.
14076 * Pointer to Ethernet device.
14078 * Pointer to mlx5_flow_handle.
14081 * 1 while a reference on it exists, 0 when freed.
14084 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14085 struct mlx5_flow_handle *handle)
14087 struct mlx5_priv *priv = dev->data->dev_private;
14088 struct mlx5_flow_dv_push_vlan_action_resource *resource;
14089 uint32_t idx = handle->dvh.rix_push_vlan;
14091 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14094 MLX5_ASSERT(resource->action);
14095 return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14100 * Release the fate resource.
14103 * Pointer to Ethernet device.
14105 * Pointer to mlx5_flow_handle.
14108 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14109 struct mlx5_flow_handle *handle)
14111 if (!handle->rix_fate)
14113 switch (handle->fate_action) {
14114 case MLX5_FLOW_FATE_QUEUE:
14115 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14116 mlx5_hrxq_release(dev, handle->rix_hrxq);
14118 case MLX5_FLOW_FATE_JUMP:
14119 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14121 case MLX5_FLOW_FATE_PORT_ID:
14122 flow_dv_port_id_action_resource_release(dev,
14123 handle->rix_port_id_action);
14126 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14129 handle->rix_fate = 0;
14133 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14134 struct mlx5_list_entry *entry)
14136 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14139 struct rte_eth_dev *dev = resource->dev;
14140 struct mlx5_priv *priv = dev->data->dev_private;
14142 if (resource->verbs_action)
14143 claim_zero(mlx5_flow_os_destroy_flow_action
14144 (resource->verbs_action));
14145 if (resource->normal_path_tbl)
14146 flow_dv_tbl_resource_release(MLX5_SH(dev),
14147 resource->normal_path_tbl);
14148 flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14149 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14150 DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14154 * Release an sample resource.
14157 * Pointer to Ethernet device.
14159 * Pointer to mlx5_flow_handle.
14162 * 1 while a reference on it exists, 0 when freed.
14165 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14166 struct mlx5_flow_handle *handle)
14168 struct mlx5_priv *priv = dev->data->dev_private;
14169 struct mlx5_flow_dv_sample_resource *resource;
14171 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14172 handle->dvh.rix_sample);
14175 MLX5_ASSERT(resource->verbs_action);
14176 return mlx5_list_unregister(priv->sh->sample_action_list,
14181 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14182 struct mlx5_list_entry *entry)
14184 struct mlx5_flow_dv_dest_array_resource *resource =
14185 container_of(entry, typeof(*resource), entry);
14186 struct rte_eth_dev *dev = resource->dev;
14187 struct mlx5_priv *priv = dev->data->dev_private;
14190 MLX5_ASSERT(resource->action);
14191 if (resource->action)
14192 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14193 for (; i < resource->num_of_dest; i++)
14194 flow_dv_sample_sub_actions_release(dev,
14195 &resource->sample_idx[i]);
14196 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14197 DRV_LOG(DEBUG, "destination array resource %p: removed",
14202 * Release an destination array resource.
14205 * Pointer to Ethernet device.
14207 * Pointer to mlx5_flow_handle.
14210 * 1 while a reference on it exists, 0 when freed.
14213 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14214 struct mlx5_flow_handle *handle)
14216 struct mlx5_priv *priv = dev->data->dev_private;
14217 struct mlx5_flow_dv_dest_array_resource *resource;
14219 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14220 handle->dvh.rix_dest_array);
14223 MLX5_ASSERT(resource->action);
14224 return mlx5_list_unregister(priv->sh->dest_array_list,
14229 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14231 struct mlx5_priv *priv = dev->data->dev_private;
14232 struct mlx5_dev_ctx_shared *sh = priv->sh;
14233 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14234 sh->geneve_tlv_option_resource;
14235 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14236 if (geneve_opt_resource) {
14237 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14238 __ATOMIC_RELAXED))) {
14239 claim_zero(mlx5_devx_cmd_destroy
14240 (geneve_opt_resource->obj));
14241 mlx5_free(sh->geneve_tlv_option_resource);
14242 sh->geneve_tlv_option_resource = NULL;
14245 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14249 * Remove the flow from the NIC but keeps it in memory.
14250 * Lock free, (mutex should be acquired by caller).
14253 * Pointer to Ethernet device.
14254 * @param[in, out] flow
14255 * Pointer to flow structure.
14258 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14260 struct mlx5_flow_handle *dh;
14261 uint32_t handle_idx;
14262 struct mlx5_priv *priv = dev->data->dev_private;
14266 handle_idx = flow->dev_handles;
14267 while (handle_idx) {
14268 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14272 if (dh->drv_flow) {
14273 claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14274 dh->drv_flow = NULL;
14276 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14277 flow_dv_fate_resource_release(dev, dh);
14278 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14279 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14280 handle_idx = dh->next.next;
14285 * Remove the flow from the NIC and the memory.
14286 * Lock free, (mutex should be acquired by caller).
14289 * Pointer to the Ethernet device structure.
14290 * @param[in, out] flow
14291 * Pointer to flow structure.
14294 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14296 struct mlx5_flow_handle *dev_handle;
14297 struct mlx5_priv *priv = dev->data->dev_private;
14298 struct mlx5_flow_meter_info *fm = NULL;
14303 flow_dv_remove(dev, flow);
14304 if (flow->counter) {
14305 flow_dv_counter_free(dev, flow->counter);
14309 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14311 mlx5_flow_meter_detach(priv, fm);
14314 /* Keep the current age handling by default. */
14315 if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14316 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14317 else if (flow->age)
14318 flow_dv_aso_age_release(dev, flow->age);
14319 if (flow->geneve_tlv_option) {
14320 flow_dv_geneve_tlv_option_resource_release(dev);
14321 flow->geneve_tlv_option = 0;
14323 while (flow->dev_handles) {
14324 uint32_t tmp_idx = flow->dev_handles;
14326 dev_handle = mlx5_ipool_get(priv->sh->ipool
14327 [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14330 flow->dev_handles = dev_handle->next.next;
14331 if (dev_handle->dvh.matcher)
14332 flow_dv_matcher_release(dev, dev_handle);
14333 if (dev_handle->dvh.rix_sample)
14334 flow_dv_sample_resource_release(dev, dev_handle);
14335 if (dev_handle->dvh.rix_dest_array)
14336 flow_dv_dest_array_resource_release(dev, dev_handle);
14337 if (dev_handle->dvh.rix_encap_decap)
14338 flow_dv_encap_decap_resource_release(dev,
14339 dev_handle->dvh.rix_encap_decap);
14340 if (dev_handle->dvh.modify_hdr)
14341 flow_dv_modify_hdr_resource_release(dev, dev_handle);
14342 if (dev_handle->dvh.rix_push_vlan)
14343 flow_dv_push_vlan_action_resource_release(dev,
14345 if (dev_handle->dvh.rix_tag)
14346 flow_dv_tag_release(dev,
14347 dev_handle->dvh.rix_tag);
14348 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14349 flow_dv_fate_resource_release(dev, dev_handle);
14351 srss = dev_handle->rix_srss;
14352 if (fm && dev_handle->is_meter_flow_id &&
14353 dev_handle->split_flow_id)
14354 mlx5_ipool_free(fm->flow_ipool,
14355 dev_handle->split_flow_id);
14356 else if (dev_handle->split_flow_id &&
14357 !dev_handle->is_meter_flow_id)
14358 mlx5_ipool_free(priv->sh->ipool
14359 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14360 dev_handle->split_flow_id);
14361 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14365 flow_dv_shared_rss_action_release(dev, srss);
14369 * Release array of hash RX queue objects.
14373 * Pointer to the Ethernet device structure.
14374 * @param[in, out] hrxqs
14375 * Array of hash RX queue objects.
14378 * Total number of references to hash RX queue objects in *hrxqs* array
14379 * after this operation.
14382 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14383 uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14388 for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14389 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14399 * Release all hash RX queue objects representing shared RSS action.
14402 * Pointer to the Ethernet device structure.
14403 * @param[in, out] action
14404 * Shared RSS action to remove hash RX queue objects from.
14407 * Total number of references to hash RX queue objects stored in *action*
14408 * after this operation.
14409 * Expected to be 0 if no external references held.
14412 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14413 struct mlx5_shared_action_rss *shared_rss)
14415 return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14419 * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14422 * Only one hash value is available for one L3+L4 combination:
14424 * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14425 * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14426 * same slot in mlx5_rss_hash_fields.
14429 * Pointer to the shared action RSS conf.
14430 * @param[in, out] hash_field
14431 * hash_field variable needed to be adjusted.
14437 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14438 uint64_t *hash_field)
14440 uint64_t rss_types = rss->origin.types;
14442 switch (*hash_field & ~IBV_RX_HASH_INNER) {
14443 case MLX5_RSS_HASH_IPV4:
14444 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14445 *hash_field &= ~MLX5_RSS_HASH_IPV4;
14446 if (rss_types & ETH_RSS_L3_DST_ONLY)
14447 *hash_field |= IBV_RX_HASH_DST_IPV4;
14448 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14449 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14451 *hash_field |= MLX5_RSS_HASH_IPV4;
14454 case MLX5_RSS_HASH_IPV6:
14455 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14456 *hash_field &= ~MLX5_RSS_HASH_IPV6;
14457 if (rss_types & ETH_RSS_L3_DST_ONLY)
14458 *hash_field |= IBV_RX_HASH_DST_IPV6;
14459 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14460 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14462 *hash_field |= MLX5_RSS_HASH_IPV6;
14465 case MLX5_RSS_HASH_IPV4_UDP:
14466 /* fall-through. */
14467 case MLX5_RSS_HASH_IPV6_UDP:
14468 if (rss_types & ETH_RSS_UDP) {
14469 *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14470 if (rss_types & ETH_RSS_L4_DST_ONLY)
14471 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14472 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14473 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14475 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14478 case MLX5_RSS_HASH_IPV4_TCP:
14479 /* fall-through. */
14480 case MLX5_RSS_HASH_IPV6_TCP:
14481 if (rss_types & ETH_RSS_TCP) {
14482 *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14483 if (rss_types & ETH_RSS_L4_DST_ONLY)
14484 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14485 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14486 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14488 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14497 * Setup shared RSS action.
14498 * Prepare set of hash RX queue objects sufficient to handle all valid
14499 * hash_fields combinations (see enum ibv_rx_hash_fields).
14502 * Pointer to the Ethernet device structure.
14503 * @param[in] action_idx
14504 * Shared RSS action ipool index.
14505 * @param[in, out] action
14506 * Partially initialized shared RSS action.
14507 * @param[out] error
14508 * Perform verbose error reporting if not NULL. Initialized in case of
14512 * 0 on success, otherwise negative errno value.
14515 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14516 uint32_t action_idx,
14517 struct mlx5_shared_action_rss *shared_rss,
14518 struct rte_flow_error *error)
14520 struct mlx5_flow_rss_desc rss_desc = { 0 };
14524 if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14525 return rte_flow_error_set(error, rte_errno,
14526 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14527 "cannot setup indirection table");
14529 memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14530 rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14531 rss_desc.const_q = shared_rss->origin.queue;
14532 rss_desc.queue_num = shared_rss->origin.queue_num;
14533 /* Set non-zero value to indicate a shared RSS. */
14534 rss_desc.shared_rss = action_idx;
14535 rss_desc.ind_tbl = shared_rss->ind_tbl;
14536 for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14538 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14541 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14542 if (shared_rss->origin.level > 1) {
14543 hash_fields |= IBV_RX_HASH_INNER;
14546 rss_desc.tunnel = tunnel;
14547 rss_desc.hash_fields = hash_fields;
14548 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14552 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14553 "cannot get hash queue");
14554 goto error_hrxq_new;
14556 err = __flow_dv_action_rss_hrxq_set
14557 (shared_rss, hash_fields, hrxq_idx);
14563 __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14564 if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14565 shared_rss->ind_tbl = NULL;
14571 * Create shared RSS action.
14574 * Pointer to the Ethernet device structure.
14576 * Shared action configuration.
14578 * RSS action specification used to create shared action.
14579 * @param[out] error
14580 * Perform verbose error reporting if not NULL. Initialized in case of
14584 * A valid shared action ID in case of success, 0 otherwise and
14585 * rte_errno is set.
14588 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14589 const struct rte_flow_indir_action_conf *conf,
14590 const struct rte_flow_action_rss *rss,
14591 struct rte_flow_error *error)
14593 struct mlx5_priv *priv = dev->data->dev_private;
14594 struct mlx5_shared_action_rss *shared_rss = NULL;
14595 void *queue = NULL;
14596 struct rte_flow_action_rss *origin;
14597 const uint8_t *rss_key;
14598 uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14601 RTE_SET_USED(conf);
14602 queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14604 shared_rss = mlx5_ipool_zmalloc
14605 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14606 if (!shared_rss || !queue) {
14607 rte_flow_error_set(error, ENOMEM,
14608 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14609 "cannot allocate resource memory");
14610 goto error_rss_init;
14612 if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14613 rte_flow_error_set(error, E2BIG,
14614 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14615 "rss action number out of range");
14616 goto error_rss_init;
14618 shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14619 sizeof(*shared_rss->ind_tbl),
14621 if (!shared_rss->ind_tbl) {
14622 rte_flow_error_set(error, ENOMEM,
14623 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14624 "cannot allocate resource memory");
14625 goto error_rss_init;
14627 memcpy(queue, rss->queue, queue_size);
14628 shared_rss->ind_tbl->queues = queue;
14629 shared_rss->ind_tbl->queues_n = rss->queue_num;
14630 origin = &shared_rss->origin;
14631 origin->func = rss->func;
14632 origin->level = rss->level;
14633 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14634 origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14635 /* NULL RSS key indicates default RSS key. */
14636 rss_key = !rss->key ? rss_hash_default_key : rss->key;
14637 memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14638 origin->key = &shared_rss->key[0];
14639 origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14640 origin->queue = queue;
14641 origin->queue_num = rss->queue_num;
14642 if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14643 goto error_rss_init;
14644 rte_spinlock_init(&shared_rss->action_rss_sl);
14645 __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14646 rte_spinlock_lock(&priv->shared_act_sl);
14647 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14648 &priv->rss_shared_actions, idx, shared_rss, next);
14649 rte_spinlock_unlock(&priv->shared_act_sl);
14653 if (shared_rss->ind_tbl)
14654 mlx5_free(shared_rss->ind_tbl);
14655 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14664 * Destroy the shared RSS action.
14665 * Release related hash RX queue objects.
14668 * Pointer to the Ethernet device structure.
14670 * The shared RSS action object ID to be removed.
14671 * @param[out] error
14672 * Perform verbose error reporting if not NULL. Initialized in case of
14676 * 0 on success, otherwise negative errno value.
14679 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14680 struct rte_flow_error *error)
14682 struct mlx5_priv *priv = dev->data->dev_private;
14683 struct mlx5_shared_action_rss *shared_rss =
14684 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14685 uint32_t old_refcnt = 1;
14687 uint16_t *queue = NULL;
14690 return rte_flow_error_set(error, EINVAL,
14691 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14692 "invalid shared action");
14693 if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14694 0, 0, __ATOMIC_ACQUIRE,
14696 return rte_flow_error_set(error, EBUSY,
14697 RTE_FLOW_ERROR_TYPE_ACTION,
14699 "shared rss has references");
14700 remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14702 return rte_flow_error_set(error, EBUSY,
14703 RTE_FLOW_ERROR_TYPE_ACTION,
14705 "shared rss hrxq has references");
14706 queue = shared_rss->ind_tbl->queues;
14707 remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14709 return rte_flow_error_set(error, EBUSY,
14710 RTE_FLOW_ERROR_TYPE_ACTION,
14712 "shared rss indirection table has"
14715 rte_spinlock_lock(&priv->shared_act_sl);
14716 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14717 &priv->rss_shared_actions, idx, shared_rss, next);
14718 rte_spinlock_unlock(&priv->shared_act_sl);
14719 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14725 * Create indirect action, lock free,
14726 * (mutex should be acquired by caller).
14727 * Dispatcher for action type specific call.
14730 * Pointer to the Ethernet device structure.
14732 * Shared action configuration.
14733 * @param[in] action
14734 * Action specification used to create indirect action.
14735 * @param[out] error
14736 * Perform verbose error reporting if not NULL. Initialized in case of
14740 * A valid shared action handle in case of success, NULL otherwise and
14741 * rte_errno is set.
14743 static struct rte_flow_action_handle *
14744 flow_dv_action_create(struct rte_eth_dev *dev,
14745 const struct rte_flow_indir_action_conf *conf,
14746 const struct rte_flow_action *action,
14747 struct rte_flow_error *err)
14749 struct mlx5_priv *priv = dev->data->dev_private;
14750 uint32_t age_idx = 0;
14754 switch (action->type) {
14755 case RTE_FLOW_ACTION_TYPE_RSS:
14756 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14757 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14758 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14760 case RTE_FLOW_ACTION_TYPE_AGE:
14761 age_idx = flow_dv_aso_age_alloc(dev, err);
14766 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14767 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14768 flow_dv_aso_age_params_init(dev, age_idx,
14769 ((const struct rte_flow_action_age *)
14770 action->conf)->context ?
14771 ((const struct rte_flow_action_age *)
14772 action->conf)->context :
14773 (void *)(uintptr_t)idx,
14774 ((const struct rte_flow_action_age *)
14775 action->conf)->timeout);
14778 case RTE_FLOW_ACTION_TYPE_COUNT:
14779 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14780 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14781 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14783 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14784 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14786 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14789 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14790 NULL, "action type not supported");
14793 return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14797 * Destroy the indirect action.
14798 * Release action related resources on the NIC and the memory.
14799 * Lock free, (mutex should be acquired by caller).
14800 * Dispatcher for action type specific call.
14803 * Pointer to the Ethernet device structure.
14804 * @param[in] handle
14805 * The indirect action object handle to be removed.
14806 * @param[out] error
14807 * Perform verbose error reporting if not NULL. Initialized in case of
14811 * 0 on success, otherwise negative errno value.
14814 flow_dv_action_destroy(struct rte_eth_dev *dev,
14815 struct rte_flow_action_handle *handle,
14816 struct rte_flow_error *error)
14818 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14819 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14820 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14821 struct mlx5_flow_counter *cnt;
14822 uint32_t no_flow_refcnt = 1;
14826 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14827 return __flow_dv_action_rss_release(dev, idx, error);
14828 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14829 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14830 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14831 &no_flow_refcnt, 1, false,
14834 return rte_flow_error_set(error, EBUSY,
14835 RTE_FLOW_ERROR_TYPE_ACTION,
14837 "Indirect count action has references");
14838 flow_dv_counter_free(dev, idx);
14840 case MLX5_INDIRECT_ACTION_TYPE_AGE:
14841 ret = flow_dv_aso_age_release(dev, idx);
14844 * In this case, the last flow has a reference will
14845 * actually release the age action.
14847 DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14848 " released with references %d.", idx, ret);
14850 case MLX5_INDIRECT_ACTION_TYPE_CT:
14851 ret = flow_dv_aso_ct_release(dev, idx, error);
14855 DRV_LOG(DEBUG, "Connection tracking object %u still "
14856 "has references %d.", idx, ret);
14859 return rte_flow_error_set(error, ENOTSUP,
14860 RTE_FLOW_ERROR_TYPE_ACTION,
14862 "action type not supported");
14867 * Updates in place shared RSS action configuration.
14870 * Pointer to the Ethernet device structure.
14872 * The shared RSS action object ID to be updated.
14873 * @param[in] action_conf
14874 * RSS action specification used to modify *shared_rss*.
14875 * @param[out] error
14876 * Perform verbose error reporting if not NULL. Initialized in case of
14880 * 0 on success, otherwise negative errno value.
14881 * @note: currently only support update of RSS queues.
14884 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14885 const struct rte_flow_action_rss *action_conf,
14886 struct rte_flow_error *error)
14888 struct mlx5_priv *priv = dev->data->dev_private;
14889 struct mlx5_shared_action_rss *shared_rss =
14890 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14892 void *queue = NULL;
14893 uint16_t *queue_old = NULL;
14894 uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14897 return rte_flow_error_set(error, EINVAL,
14898 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14899 "invalid shared action to update");
14900 if (priv->obj_ops.ind_table_modify == NULL)
14901 return rte_flow_error_set(error, ENOTSUP,
14902 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14903 "cannot modify indirection table");
14904 queue = mlx5_malloc(MLX5_MEM_ZERO,
14905 RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14908 return rte_flow_error_set(error, ENOMEM,
14909 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14911 "cannot allocate resource memory");
14912 memcpy(queue, action_conf->queue, queue_size);
14913 MLX5_ASSERT(shared_rss->ind_tbl);
14914 rte_spinlock_lock(&shared_rss->action_rss_sl);
14915 queue_old = shared_rss->ind_tbl->queues;
14916 ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14917 queue, action_conf->queue_num, true);
14920 ret = rte_flow_error_set(error, rte_errno,
14921 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14922 "cannot update indirection table");
14924 mlx5_free(queue_old);
14925 shared_rss->origin.queue = queue;
14926 shared_rss->origin.queue_num = action_conf->queue_num;
14928 rte_spinlock_unlock(&shared_rss->action_rss_sl);
14933 * Updates in place conntrack context or direction.
14934 * Context update should be synchronized.
14937 * Pointer to the Ethernet device structure.
14939 * The conntrack object ID to be updated.
14940 * @param[in] update
14941 * Pointer to the structure of information to update.
14942 * @param[out] error
14943 * Perform verbose error reporting if not NULL. Initialized in case of
14947 * 0 on success, otherwise negative errno value.
14950 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14951 const struct rte_flow_modify_conntrack *update,
14952 struct rte_flow_error *error)
14954 struct mlx5_priv *priv = dev->data->dev_private;
14955 struct mlx5_aso_ct_action *ct;
14956 const struct rte_flow_action_conntrack *new_prf;
14958 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14961 if (PORT_ID(priv) != owner)
14962 return rte_flow_error_set(error, EACCES,
14963 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14965 "CT object owned by another port");
14966 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14967 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14969 return rte_flow_error_set(error, ENOMEM,
14970 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14972 "CT object is inactive");
14973 new_prf = &update->new_ct;
14974 if (update->direction)
14975 ct->is_original = !!new_prf->is_original_dir;
14976 if (update->state) {
14977 /* Only validate the profile when it needs to be updated. */
14978 ret = mlx5_validate_action_ct(dev, new_prf, error);
14981 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14983 return rte_flow_error_set(error, EIO,
14984 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14986 "Failed to send CT context update WQE");
14987 /* Block until ready or a failure. */
14988 ret = mlx5_aso_ct_available(priv->sh, ct);
14990 rte_flow_error_set(error, rte_errno,
14991 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14993 "Timeout to get the CT update");
14999 * Updates in place shared action configuration, lock free,
15000 * (mutex should be acquired by caller).
15003 * Pointer to the Ethernet device structure.
15004 * @param[in] handle
15005 * The indirect action object handle to be updated.
15006 * @param[in] update
15007 * Action specification used to modify the action pointed by *handle*.
15008 * *update* could be of same type with the action pointed by the *handle*
15009 * handle argument, or some other structures like a wrapper, depending on
15010 * the indirect action type.
15011 * @param[out] error
15012 * Perform verbose error reporting if not NULL. Initialized in case of
15016 * 0 on success, otherwise negative errno value.
15019 flow_dv_action_update(struct rte_eth_dev *dev,
15020 struct rte_flow_action_handle *handle,
15021 const void *update,
15022 struct rte_flow_error *err)
15024 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15025 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15026 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15027 const void *action_conf;
15030 case MLX5_INDIRECT_ACTION_TYPE_RSS:
15031 action_conf = ((const struct rte_flow_action *)update)->conf;
15032 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15033 case MLX5_INDIRECT_ACTION_TYPE_CT:
15034 return __flow_dv_action_ct_update(dev, idx, update, err);
15036 return rte_flow_error_set(err, ENOTSUP,
15037 RTE_FLOW_ERROR_TYPE_ACTION,
15039 "action type update not supported");
15044 * Destroy the meter sub policy table rules.
15045 * Lock free, (mutex should be acquired by caller).
15048 * Pointer to Ethernet device.
15049 * @param[in] sub_policy
15050 * Pointer to meter sub policy table.
15053 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15054 struct mlx5_flow_meter_sub_policy *sub_policy)
15056 struct mlx5_priv *priv = dev->data->dev_private;
15057 struct mlx5_flow_tbl_data_entry *tbl;
15058 struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15059 struct mlx5_flow_meter_info *next_fm;
15060 struct mlx5_sub_policy_color_rule *color_rule;
15064 for (i = 0; i < RTE_COLORS; i++) {
15066 if (i == RTE_COLOR_GREEN && policy &&
15067 policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15068 next_fm = mlx5_flow_meter_find(priv,
15069 policy->act_cnt[i].next_mtr_id, NULL);
15070 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15072 claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15073 tbl = container_of(color_rule->matcher->tbl,
15074 typeof(*tbl), tbl);
15075 mlx5_list_unregister(tbl->matchers,
15076 &color_rule->matcher->entry);
15077 TAILQ_REMOVE(&sub_policy->color_rules[i],
15078 color_rule, next_port);
15079 mlx5_free(color_rule);
15081 mlx5_flow_meter_detach(priv, next_fm);
15084 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15085 if (sub_policy->rix_hrxq[i]) {
15086 if (policy && !policy->is_hierarchy)
15087 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15088 sub_policy->rix_hrxq[i] = 0;
15090 if (sub_policy->jump_tbl[i]) {
15091 flow_dv_tbl_resource_release(MLX5_SH(dev),
15092 sub_policy->jump_tbl[i]);
15093 sub_policy->jump_tbl[i] = NULL;
15096 if (sub_policy->tbl_rsc) {
15097 flow_dv_tbl_resource_release(MLX5_SH(dev),
15098 sub_policy->tbl_rsc);
15099 sub_policy->tbl_rsc = NULL;
15104 * Destroy policy rules, lock free,
15105 * (mutex should be acquired by caller).
15106 * Dispatcher for action type specific call.
15109 * Pointer to the Ethernet device structure.
15110 * @param[in] mtr_policy
15111 * Meter policy struct.
15114 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15115 struct mlx5_flow_meter_policy *mtr_policy)
15118 struct mlx5_flow_meter_sub_policy *sub_policy;
15119 uint16_t sub_policy_num;
15121 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15122 sub_policy_num = (mtr_policy->sub_policy_num >>
15123 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15124 MLX5_MTR_SUB_POLICY_NUM_MASK;
15125 for (j = 0; j < sub_policy_num; j++) {
15126 sub_policy = mtr_policy->sub_policys[i][j];
15128 __flow_dv_destroy_sub_policy_rules(dev,
15135 * Destroy policy action, lock free,
15136 * (mutex should be acquired by caller).
15137 * Dispatcher for action type specific call.
15140 * Pointer to the Ethernet device structure.
15141 * @param[in] mtr_policy
15142 * Meter policy struct.
15145 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15146 struct mlx5_flow_meter_policy *mtr_policy)
15148 struct rte_flow_action *rss_action;
15149 struct mlx5_flow_handle dev_handle;
15152 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15153 if (mtr_policy->act_cnt[i].rix_mark) {
15154 flow_dv_tag_release(dev,
15155 mtr_policy->act_cnt[i].rix_mark);
15156 mtr_policy->act_cnt[i].rix_mark = 0;
15158 if (mtr_policy->act_cnt[i].modify_hdr) {
15159 dev_handle.dvh.modify_hdr =
15160 mtr_policy->act_cnt[i].modify_hdr;
15161 flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15163 switch (mtr_policy->act_cnt[i].fate_action) {
15164 case MLX5_FLOW_FATE_SHARED_RSS:
15165 rss_action = mtr_policy->act_cnt[i].rss;
15166 mlx5_free(rss_action);
15168 case MLX5_FLOW_FATE_PORT_ID:
15169 if (mtr_policy->act_cnt[i].rix_port_id_action) {
15170 flow_dv_port_id_action_resource_release(dev,
15171 mtr_policy->act_cnt[i].rix_port_id_action);
15172 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15175 case MLX5_FLOW_FATE_DROP:
15176 case MLX5_FLOW_FATE_JUMP:
15177 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15178 mtr_policy->act_cnt[i].dr_jump_action[j] =
15182 /*Queue action do nothing*/
15186 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15187 mtr_policy->dr_drop_action[j] = NULL;
15191 * Create policy action per domain, lock free,
15192 * (mutex should be acquired by caller).
15193 * Dispatcher for action type specific call.
15196 * Pointer to the Ethernet device structure.
15197 * @param[in] mtr_policy
15198 * Meter policy struct.
15199 * @param[in] action
15200 * Action specification used to create meter actions.
15201 * @param[out] error
15202 * Perform verbose error reporting if not NULL. Initialized in case of
15206 * 0 on success, otherwise negative errno value.
15209 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15210 struct mlx5_flow_meter_policy *mtr_policy,
15211 const struct rte_flow_action *actions[RTE_COLORS],
15212 enum mlx5_meter_domain domain,
15213 struct rte_mtr_error *error)
15215 struct mlx5_priv *priv = dev->data->dev_private;
15216 struct rte_flow_error flow_err;
15217 const struct rte_flow_action *act;
15218 uint64_t action_flags;
15219 struct mlx5_flow_handle dh;
15220 struct mlx5_flow dev_flow;
15221 struct mlx5_flow_dv_port_id_action_resource port_id_action;
15223 uint8_t egress, transfer;
15224 struct mlx5_meter_policy_action_container *act_cnt = NULL;
15226 struct mlx5_flow_dv_modify_hdr_resource res;
15227 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15228 sizeof(struct mlx5_modification_cmd) *
15229 (MLX5_MAX_MODIFY_NUM + 1)];
15231 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15233 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15234 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15235 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15236 memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15237 memset(&port_id_action, 0,
15238 sizeof(struct mlx5_flow_dv_port_id_action_resource));
15239 memset(mhdr_res, 0, sizeof(*mhdr_res));
15240 mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15241 (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15242 MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15243 dev_flow.handle = &dh;
15244 dev_flow.dv.port_id_action = &port_id_action;
15245 dev_flow.external = true;
15246 for (i = 0; i < RTE_COLORS; i++) {
15247 if (i < MLX5_MTR_RTE_COLORS)
15248 act_cnt = &mtr_policy->act_cnt[i];
15249 /* Skip the color policy actions creation. */
15250 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15251 (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15254 for (act = actions[i];
15255 act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15256 switch (act->type) {
15257 case RTE_FLOW_ACTION_TYPE_MARK:
15259 uint32_t tag_be = mlx5_flow_mark_set
15260 (((const struct rte_flow_action_mark *)
15263 if (i >= MLX5_MTR_RTE_COLORS)
15264 return -rte_mtr_error_set(error,
15266 RTE_MTR_ERROR_TYPE_METER_POLICY,
15268 "cannot create policy "
15269 "mark action for this color");
15270 dev_flow.handle->mark = 1;
15271 if (flow_dv_tag_resource_register(dev, tag_be,
15272 &dev_flow, &flow_err))
15273 return -rte_mtr_error_set(error,
15275 RTE_MTR_ERROR_TYPE_METER_POLICY,
15277 "cannot setup policy mark action");
15278 MLX5_ASSERT(dev_flow.dv.tag_resource);
15279 act_cnt->rix_mark =
15280 dev_flow.handle->dvh.rix_tag;
15281 action_flags |= MLX5_FLOW_ACTION_MARK;
15284 case RTE_FLOW_ACTION_TYPE_SET_TAG:
15285 if (i >= MLX5_MTR_RTE_COLORS)
15286 return -rte_mtr_error_set(error,
15288 RTE_MTR_ERROR_TYPE_METER_POLICY,
15290 "cannot create policy "
15291 "set tag action for this color");
15292 if (flow_dv_convert_action_set_tag
15294 (const struct rte_flow_action_set_tag *)
15295 act->conf, &flow_err))
15296 return -rte_mtr_error_set(error,
15298 RTE_MTR_ERROR_TYPE_METER_POLICY,
15299 NULL, "cannot convert policy "
15301 if (!mhdr_res->actions_num)
15302 return -rte_mtr_error_set(error,
15304 RTE_MTR_ERROR_TYPE_METER_POLICY,
15305 NULL, "cannot find policy "
15307 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15309 case RTE_FLOW_ACTION_TYPE_DROP:
15311 struct mlx5_flow_mtr_mng *mtrmng =
15313 struct mlx5_flow_tbl_data_entry *tbl_data;
15316 * Create the drop table with
15317 * METER DROP level.
15319 if (!mtrmng->drop_tbl[domain]) {
15320 mtrmng->drop_tbl[domain] =
15321 flow_dv_tbl_resource_get(dev,
15322 MLX5_FLOW_TABLE_LEVEL_METER,
15323 egress, transfer, false, NULL, 0,
15324 0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15325 if (!mtrmng->drop_tbl[domain])
15326 return -rte_mtr_error_set
15328 RTE_MTR_ERROR_TYPE_METER_POLICY,
15330 "Failed to create meter drop table");
15332 tbl_data = container_of
15333 (mtrmng->drop_tbl[domain],
15334 struct mlx5_flow_tbl_data_entry, tbl);
15335 if (i < MLX5_MTR_RTE_COLORS) {
15336 act_cnt->dr_jump_action[domain] =
15337 tbl_data->jump.action;
15338 act_cnt->fate_action =
15339 MLX5_FLOW_FATE_DROP;
15341 if (i == RTE_COLOR_RED)
15342 mtr_policy->dr_drop_action[domain] =
15343 tbl_data->jump.action;
15344 action_flags |= MLX5_FLOW_ACTION_DROP;
15347 case RTE_FLOW_ACTION_TYPE_QUEUE:
15349 if (i >= MLX5_MTR_RTE_COLORS)
15350 return -rte_mtr_error_set(error,
15352 RTE_MTR_ERROR_TYPE_METER_POLICY,
15353 NULL, "cannot create policy "
15354 "fate queue for this color");
15356 ((const struct rte_flow_action_queue *)
15357 (act->conf))->index;
15358 act_cnt->fate_action =
15359 MLX5_FLOW_FATE_QUEUE;
15360 dev_flow.handle->fate_action =
15361 MLX5_FLOW_FATE_QUEUE;
15362 mtr_policy->is_queue = 1;
15363 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15366 case RTE_FLOW_ACTION_TYPE_RSS:
15370 if (i >= MLX5_MTR_RTE_COLORS)
15371 return -rte_mtr_error_set(error,
15373 RTE_MTR_ERROR_TYPE_METER_POLICY,
15375 "cannot create policy "
15376 "rss action for this color");
15378 * Save RSS conf into policy struct
15379 * for translate stage.
15381 rss_size = (int)rte_flow_conv
15382 (RTE_FLOW_CONV_OP_ACTION,
15383 NULL, 0, act, &flow_err);
15385 return -rte_mtr_error_set(error,
15387 RTE_MTR_ERROR_TYPE_METER_POLICY,
15388 NULL, "Get the wrong "
15389 "rss action struct size");
15390 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15391 rss_size, 0, SOCKET_ID_ANY);
15393 return -rte_mtr_error_set(error,
15395 RTE_MTR_ERROR_TYPE_METER_POLICY,
15397 "Fail to malloc rss action memory");
15398 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15399 act_cnt->rss, rss_size,
15402 return -rte_mtr_error_set(error,
15404 RTE_MTR_ERROR_TYPE_METER_POLICY,
15405 NULL, "Fail to save "
15406 "rss action into policy struct");
15407 act_cnt->fate_action =
15408 MLX5_FLOW_FATE_SHARED_RSS;
15409 action_flags |= MLX5_FLOW_ACTION_RSS;
15412 case RTE_FLOW_ACTION_TYPE_PORT_ID:
15413 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15415 struct mlx5_flow_dv_port_id_action_resource
15417 uint32_t port_id = 0;
15419 if (i >= MLX5_MTR_RTE_COLORS)
15420 return -rte_mtr_error_set(error,
15422 RTE_MTR_ERROR_TYPE_METER_POLICY,
15423 NULL, "cannot create policy "
15424 "port action for this color");
15425 memset(&port_id_resource, 0,
15426 sizeof(port_id_resource));
15427 if (flow_dv_translate_action_port_id(dev, act,
15428 &port_id, &flow_err))
15429 return -rte_mtr_error_set(error,
15431 RTE_MTR_ERROR_TYPE_METER_POLICY,
15432 NULL, "cannot translate "
15433 "policy port action");
15434 port_id_resource.port_id = port_id;
15435 if (flow_dv_port_id_action_resource_register
15436 (dev, &port_id_resource,
15437 &dev_flow, &flow_err))
15438 return -rte_mtr_error_set(error,
15440 RTE_MTR_ERROR_TYPE_METER_POLICY,
15441 NULL, "cannot setup "
15442 "policy port action");
15443 act_cnt->rix_port_id_action =
15444 dev_flow.handle->rix_port_id_action;
15445 act_cnt->fate_action =
15446 MLX5_FLOW_FATE_PORT_ID;
15447 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15450 case RTE_FLOW_ACTION_TYPE_JUMP:
15452 uint32_t jump_group = 0;
15453 uint32_t table = 0;
15454 struct mlx5_flow_tbl_data_entry *tbl_data;
15455 struct flow_grp_info grp_info = {
15456 .external = !!dev_flow.external,
15457 .transfer = !!transfer,
15458 .fdb_def_rule = !!priv->fdb_def_rule,
15460 .skip_scale = dev_flow.skip_scale &
15461 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15463 struct mlx5_flow_meter_sub_policy *sub_policy =
15464 mtr_policy->sub_policys[domain][0];
15466 if (i >= MLX5_MTR_RTE_COLORS)
15467 return -rte_mtr_error_set(error,
15469 RTE_MTR_ERROR_TYPE_METER_POLICY,
15471 "cannot create policy "
15472 "jump action for this color");
15474 ((const struct rte_flow_action_jump *)
15476 if (mlx5_flow_group_to_table(dev, NULL,
15479 &grp_info, &flow_err))
15480 return -rte_mtr_error_set(error,
15482 RTE_MTR_ERROR_TYPE_METER_POLICY,
15483 NULL, "cannot setup "
15484 "policy jump action");
15485 sub_policy->jump_tbl[i] =
15486 flow_dv_tbl_resource_get(dev,
15489 !!dev_flow.external,
15490 NULL, jump_group, 0,
15493 (!sub_policy->jump_tbl[i])
15494 return -rte_mtr_error_set(error,
15496 RTE_MTR_ERROR_TYPE_METER_POLICY,
15497 NULL, "cannot create jump action.");
15498 tbl_data = container_of
15499 (sub_policy->jump_tbl[i],
15500 struct mlx5_flow_tbl_data_entry, tbl);
15501 act_cnt->dr_jump_action[domain] =
15502 tbl_data->jump.action;
15503 act_cnt->fate_action =
15504 MLX5_FLOW_FATE_JUMP;
15505 action_flags |= MLX5_FLOW_ACTION_JUMP;
15509 * No need to check meter hierarchy for Y or R colors
15510 * here since it is done in the validation stage.
15512 case RTE_FLOW_ACTION_TYPE_METER:
15514 const struct rte_flow_action_meter *mtr;
15515 struct mlx5_flow_meter_info *next_fm;
15516 struct mlx5_flow_meter_policy *next_policy;
15517 struct rte_flow_action tag_action;
15518 struct mlx5_rte_flow_action_set_tag set_tag;
15519 uint32_t next_mtr_idx = 0;
15522 next_fm = mlx5_flow_meter_find(priv,
15526 return -rte_mtr_error_set(error, EINVAL,
15527 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15528 "Fail to find next meter.");
15529 if (next_fm->def_policy)
15530 return -rte_mtr_error_set(error, EINVAL,
15531 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15532 "Hierarchy only supports termination meter.");
15533 next_policy = mlx5_flow_meter_policy_find(dev,
15534 next_fm->policy_id, NULL);
15535 MLX5_ASSERT(next_policy);
15536 if (next_fm->drop_cnt) {
15539 mlx5_flow_get_reg_id(dev,
15542 (struct rte_flow_error *)error);
15543 set_tag.offset = (priv->mtr_reg_share ?
15544 MLX5_MTR_COLOR_BITS : 0);
15545 set_tag.length = (priv->mtr_reg_share ?
15546 MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15548 set_tag.data = next_mtr_idx;
15550 (enum rte_flow_action_type)
15551 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15552 tag_action.conf = &set_tag;
15553 if (flow_dv_convert_action_set_reg
15554 (mhdr_res, &tag_action,
15555 (struct rte_flow_error *)error))
15558 MLX5_FLOW_ACTION_SET_TAG;
15560 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15561 act_cnt->next_mtr_id = next_fm->meter_id;
15562 act_cnt->next_sub_policy = NULL;
15563 mtr_policy->is_hierarchy = 1;
15564 mtr_policy->dev = next_policy->dev;
15566 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15570 return -rte_mtr_error_set(error, ENOTSUP,
15571 RTE_MTR_ERROR_TYPE_METER_POLICY,
15572 NULL, "action type not supported");
15574 if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15575 /* create modify action if needed. */
15576 dev_flow.dv.group = 1;
15577 if (flow_dv_modify_hdr_resource_register
15578 (dev, mhdr_res, &dev_flow, &flow_err))
15579 return -rte_mtr_error_set(error,
15581 RTE_MTR_ERROR_TYPE_METER_POLICY,
15582 NULL, "cannot register policy "
15584 act_cnt->modify_hdr =
15585 dev_flow.handle->dvh.modify_hdr;
15593 * Create policy action per domain, lock free,
15594 * (mutex should be acquired by caller).
15595 * Dispatcher for action type specific call.
15598 * Pointer to the Ethernet device structure.
15599 * @param[in] mtr_policy
15600 * Meter policy struct.
15601 * @param[in] action
15602 * Action specification used to create meter actions.
15603 * @param[out] error
15604 * Perform verbose error reporting if not NULL. Initialized in case of
15608 * 0 on success, otherwise negative errno value.
15611 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15612 struct mlx5_flow_meter_policy *mtr_policy,
15613 const struct rte_flow_action *actions[RTE_COLORS],
15614 struct rte_mtr_error *error)
15617 uint16_t sub_policy_num;
15619 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15620 sub_policy_num = (mtr_policy->sub_policy_num >>
15621 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15622 MLX5_MTR_SUB_POLICY_NUM_MASK;
15623 if (sub_policy_num) {
15624 ret = __flow_dv_create_domain_policy_acts(dev,
15625 mtr_policy, actions,
15626 (enum mlx5_meter_domain)i, error);
15627 /* Cleaning resource is done in the caller level. */
15636 * Query a DV flow rule for its statistics via DevX.
15639 * Pointer to Ethernet device.
15640 * @param[in] cnt_idx
15641 * Index to the flow counter.
15643 * Data retrieved by the query.
15644 * @param[out] error
15645 * Perform verbose error reporting if not NULL.
15648 * 0 on success, a negative errno value otherwise and rte_errno is set.
15651 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15652 struct rte_flow_error *error)
15654 struct mlx5_priv *priv = dev->data->dev_private;
15655 struct rte_flow_query_count *qc = data;
15657 if (!priv->sh->devx)
15658 return rte_flow_error_set(error, ENOTSUP,
15659 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15661 "counters are not supported");
15663 uint64_t pkts, bytes;
15664 struct mlx5_flow_counter *cnt;
15665 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15668 return rte_flow_error_set(error, -err,
15669 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15670 NULL, "cannot read counters");
15671 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15674 qc->hits = pkts - cnt->hits;
15675 qc->bytes = bytes - cnt->bytes;
15678 cnt->bytes = bytes;
15682 return rte_flow_error_set(error, EINVAL,
15683 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15685 "counters are not available");
15689 flow_dv_action_query(struct rte_eth_dev *dev,
15690 const struct rte_flow_action_handle *handle, void *data,
15691 struct rte_flow_error *error)
15693 struct mlx5_age_param *age_param;
15694 struct rte_flow_query_age *resp;
15695 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15696 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15697 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15698 struct mlx5_priv *priv = dev->data->dev_private;
15699 struct mlx5_aso_ct_action *ct;
15704 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15705 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15707 resp->aged = __atomic_load_n(&age_param->state,
15708 __ATOMIC_RELAXED) == AGE_TMOUT ?
15710 resp->sec_since_last_hit_valid = !resp->aged;
15711 if (resp->sec_since_last_hit_valid)
15712 resp->sec_since_last_hit = __atomic_load_n
15713 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15715 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15716 return flow_dv_query_count(dev, idx, data, error);
15717 case MLX5_INDIRECT_ACTION_TYPE_CT:
15718 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15719 if (owner != PORT_ID(priv))
15720 return rte_flow_error_set(error, EACCES,
15721 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15723 "CT object owned by another port");
15724 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15725 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15728 return rte_flow_error_set(error, EFAULT,
15729 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15731 "CT object is inactive");
15732 ((struct rte_flow_action_conntrack *)data)->peer_port =
15734 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15736 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15737 return rte_flow_error_set(error, EIO,
15738 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15740 "Failed to query CT context");
15743 return rte_flow_error_set(error, ENOTSUP,
15744 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15745 "action type query not supported");
15750 * Query a flow rule AGE action for aging information.
15753 * Pointer to Ethernet device.
15755 * Pointer to the sub flow.
15757 * data retrieved by the query.
15758 * @param[out] error
15759 * Perform verbose error reporting if not NULL.
15762 * 0 on success, a negative errno value otherwise and rte_errno is set.
15765 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15766 void *data, struct rte_flow_error *error)
15768 struct rte_flow_query_age *resp = data;
15769 struct mlx5_age_param *age_param;
15772 struct mlx5_aso_age_action *act =
15773 flow_aso_age_get_by_idx(dev, flow->age);
15775 age_param = &act->age_params;
15776 } else if (flow->counter) {
15777 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15779 if (!age_param || !age_param->timeout)
15780 return rte_flow_error_set
15782 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15783 NULL, "cannot read age data");
15785 return rte_flow_error_set(error, EINVAL,
15786 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15787 NULL, "age data not available");
15789 resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15791 resp->sec_since_last_hit_valid = !resp->aged;
15792 if (resp->sec_since_last_hit_valid)
15793 resp->sec_since_last_hit = __atomic_load_n
15794 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15801 * @see rte_flow_query()
15802 * @see rte_flow_ops
15805 flow_dv_query(struct rte_eth_dev *dev,
15806 struct rte_flow *flow __rte_unused,
15807 const struct rte_flow_action *actions __rte_unused,
15808 void *data __rte_unused,
15809 struct rte_flow_error *error __rte_unused)
15813 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15814 switch (actions->type) {
15815 case RTE_FLOW_ACTION_TYPE_VOID:
15817 case RTE_FLOW_ACTION_TYPE_COUNT:
15818 ret = flow_dv_query_count(dev, flow->counter, data,
15821 case RTE_FLOW_ACTION_TYPE_AGE:
15822 ret = flow_dv_query_age(dev, flow, data, error);
15825 return rte_flow_error_set(error, ENOTSUP,
15826 RTE_FLOW_ERROR_TYPE_ACTION,
15828 "action not supported");
15835 * Destroy the meter table set.
15836 * Lock free, (mutex should be acquired by caller).
15839 * Pointer to Ethernet device.
15841 * Meter information table.
15844 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15845 struct mlx5_flow_meter_info *fm)
15847 struct mlx5_priv *priv = dev->data->dev_private;
15850 if (!fm || !priv->config.dv_flow_en)
15852 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15853 if (fm->drop_rule[i]) {
15854 claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15855 fm->drop_rule[i] = NULL;
15861 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15863 struct mlx5_priv *priv = dev->data->dev_private;
15864 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15865 struct mlx5_flow_tbl_data_entry *tbl;
15868 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15869 if (mtrmng->def_rule[i]) {
15870 claim_zero(mlx5_flow_os_destroy_flow
15871 (mtrmng->def_rule[i]));
15872 mtrmng->def_rule[i] = NULL;
15874 if (mtrmng->def_matcher[i]) {
15875 tbl = container_of(mtrmng->def_matcher[i]->tbl,
15876 struct mlx5_flow_tbl_data_entry, tbl);
15877 mlx5_list_unregister(tbl->matchers,
15878 &mtrmng->def_matcher[i]->entry);
15879 mtrmng->def_matcher[i] = NULL;
15881 for (j = 0; j < MLX5_REG_BITS; j++) {
15882 if (mtrmng->drop_matcher[i][j]) {
15884 container_of(mtrmng->drop_matcher[i][j]->tbl,
15885 struct mlx5_flow_tbl_data_entry,
15887 mlx5_list_unregister(tbl->matchers,
15888 &mtrmng->drop_matcher[i][j]->entry);
15889 mtrmng->drop_matcher[i][j] = NULL;
15892 if (mtrmng->drop_tbl[i]) {
15893 flow_dv_tbl_resource_release(MLX5_SH(dev),
15894 mtrmng->drop_tbl[i]);
15895 mtrmng->drop_tbl[i] = NULL;
15900 /* Number of meter flow actions, count and jump or count and drop. */
15901 #define METER_ACTIONS 2
15904 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15905 enum mlx5_meter_domain domain)
15907 struct mlx5_priv *priv = dev->data->dev_private;
15908 struct mlx5_flow_meter_def_policy *def_policy =
15909 priv->sh->mtrmng->def_policy[domain];
15911 __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15912 mlx5_free(def_policy);
15913 priv->sh->mtrmng->def_policy[domain] = NULL;
15917 * Destroy the default policy table set.
15920 * Pointer to Ethernet device.
15923 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15925 struct mlx5_priv *priv = dev->data->dev_private;
15928 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15929 if (priv->sh->mtrmng->def_policy[i])
15930 __flow_dv_destroy_domain_def_policy(dev,
15931 (enum mlx5_meter_domain)i);
15932 priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15936 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15937 uint32_t color_reg_c_idx,
15938 enum rte_color color, void *matcher_object,
15939 int actions_n, void *actions,
15940 bool match_src_port, const struct rte_flow_item *item,
15941 void **rule, const struct rte_flow_attr *attr)
15944 struct mlx5_flow_dv_match_params value = {
15945 .size = sizeof(value.buf),
15947 struct mlx5_flow_dv_match_params matcher = {
15948 .size = sizeof(matcher.buf),
15950 struct mlx5_priv *priv = dev->data->dev_private;
15953 if (match_src_port && (priv->representor || priv->master)) {
15954 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15955 value.buf, item, attr)) {
15956 DRV_LOG(ERR, "Failed to create meter policy%d flow's"
15957 " value with port.", color);
15961 flow_dv_match_meta_reg(matcher.buf, value.buf,
15962 (enum modify_reg)color_reg_c_idx,
15963 rte_col_2_mlx5_col(color), UINT32_MAX);
15964 misc_mask = flow_dv_matcher_enable(value.buf);
15965 __flow_dv_adjust_buf_size(&value.size, misc_mask);
15966 ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
15967 actions_n, actions, rule);
15969 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
15976 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15977 uint32_t color_reg_c_idx,
15979 struct mlx5_flow_meter_sub_policy *sub_policy,
15980 const struct rte_flow_attr *attr,
15981 bool match_src_port,
15982 const struct rte_flow_item *item,
15983 struct mlx5_flow_dv_matcher **policy_matcher,
15984 struct rte_flow_error *error)
15986 struct mlx5_list_entry *entry;
15987 struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15988 struct mlx5_flow_dv_matcher matcher = {
15990 .size = sizeof(matcher.mask.buf),
15994 struct mlx5_flow_dv_match_params value = {
15995 .size = sizeof(value.buf),
15997 struct mlx5_flow_cb_ctx ctx = {
16001 struct mlx5_flow_tbl_data_entry *tbl_data;
16002 struct mlx5_priv *priv = dev->data->dev_private;
16003 const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16005 if (match_src_port && (priv->representor || priv->master)) {
16006 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16007 value.buf, item, attr)) {
16008 DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16009 " with port.", priority);
16013 tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16014 if (priority < RTE_COLOR_RED)
16015 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16016 (enum modify_reg)color_reg_c_idx, 0, color_mask);
16017 matcher.priority = priority;
16018 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16019 matcher.mask.size);
16020 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16022 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16026 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16031 * Create the policy rules per domain.
16034 * Pointer to Ethernet device.
16035 * @param[in] sub_policy
16036 * Pointer to sub policy table..
16037 * @param[in] egress
16038 * Direction of the table.
16039 * @param[in] transfer
16040 * E-Switch or NIC flow.
16042 * Pointer to policy action list per color.
16045 * 0 on success, -1 otherwise.
16048 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16049 struct mlx5_flow_meter_sub_policy *sub_policy,
16050 uint8_t egress, uint8_t transfer, bool match_src_port,
16051 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16053 struct mlx5_priv *priv = dev->data->dev_private;
16054 struct rte_flow_error flow_err;
16055 uint32_t color_reg_c_idx;
16056 struct rte_flow_attr attr = {
16057 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16060 .egress = !!egress,
16061 .transfer = !!transfer,
16065 int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16066 struct mlx5_sub_policy_color_rule *color_rule;
16068 struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16072 /* Create policy table with POLICY level. */
16073 if (!sub_policy->tbl_rsc)
16074 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16075 MLX5_FLOW_TABLE_LEVEL_POLICY,
16076 egress, transfer, false, NULL, 0, 0,
16077 sub_policy->idx, &flow_err);
16078 if (!sub_policy->tbl_rsc) {
16080 "Failed to create meter sub policy table.");
16083 /* Prepare matchers. */
16084 color_reg_c_idx = ret;
16085 for (i = 0; i < RTE_COLORS; i++) {
16086 TAILQ_INIT(&sub_policy->color_rules[i]);
16087 if (!acts[i].actions_n)
16089 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16090 sizeof(struct mlx5_sub_policy_color_rule),
16093 DRV_LOG(ERR, "No memory to create color rule.");
16096 tmp_rules[i] = color_rule;
16097 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16098 color_rule, next_port);
16099 color_rule->src_port = priv->representor_id;
16102 /* Create matchers for colors. */
16103 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16104 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16105 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16106 &attr, svport_match, NULL,
16107 &color_rule->matcher, &flow_err)) {
16108 DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16111 /* Create flow, matching color. */
16112 if (__flow_dv_create_policy_flow(dev,
16113 color_reg_c_idx, (enum rte_color)i,
16114 color_rule->matcher->matcher_object,
16115 acts[i].actions_n, acts[i].dv_actions,
16116 svport_match, NULL, &color_rule->rule,
16118 DRV_LOG(ERR, "Failed to create color%u rule.", i);
16124 /* All the policy rules will be cleared. */
16126 color_rule = tmp_rules[i];
16128 if (color_rule->rule)
16129 mlx5_flow_os_destroy_flow(color_rule->rule);
16130 if (color_rule->matcher) {
16131 struct mlx5_flow_tbl_data_entry *tbl =
16132 container_of(color_rule->matcher->tbl,
16133 typeof(*tbl), tbl);
16134 mlx5_list_unregister(tbl->matchers,
16135 &color_rule->matcher->entry);
16137 TAILQ_REMOVE(&sub_policy->color_rules[i],
16138 color_rule, next_port);
16139 mlx5_free(color_rule);
16146 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16147 struct mlx5_flow_meter_policy *mtr_policy,
16148 struct mlx5_flow_meter_sub_policy *sub_policy,
16151 struct mlx5_priv *priv = dev->data->dev_private;
16152 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16153 struct mlx5_flow_dv_tag_resource *tag;
16154 struct mlx5_flow_dv_port_id_action_resource *port_action;
16155 struct mlx5_hrxq *hrxq;
16156 struct mlx5_flow_meter_info *next_fm = NULL;
16157 struct mlx5_flow_meter_policy *next_policy;
16158 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16159 struct mlx5_flow_tbl_data_entry *tbl_data;
16160 struct rte_flow_error error;
16161 uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16162 uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16163 bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16164 bool match_src_port = false;
16167 /* If RSS or Queue, no previous actions / rules is created. */
16168 for (i = 0; i < RTE_COLORS; i++) {
16169 acts[i].actions_n = 0;
16170 if (i == RTE_COLOR_RED) {
16171 /* Only support drop on red. */
16172 acts[i].dv_actions[0] =
16173 mtr_policy->dr_drop_action[domain];
16174 acts[i].actions_n = 1;
16177 if (i == RTE_COLOR_GREEN &&
16178 mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16179 struct rte_flow_attr attr = {
16180 .transfer = transfer
16183 next_fm = mlx5_flow_meter_find(priv,
16184 mtr_policy->act_cnt[i].next_mtr_id,
16188 "Failed to get next hierarchy meter.");
16191 if (mlx5_flow_meter_attach(priv, next_fm,
16193 DRV_LOG(ERR, "%s", error.message);
16197 /* Meter action must be the first for TX. */
16199 acts[i].dv_actions[acts[i].actions_n] =
16200 next_fm->meter_action;
16201 acts[i].actions_n++;
16204 if (mtr_policy->act_cnt[i].rix_mark) {
16205 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16206 mtr_policy->act_cnt[i].rix_mark);
16208 DRV_LOG(ERR, "Failed to find "
16209 "mark action for policy.");
16212 acts[i].dv_actions[acts[i].actions_n] = tag->action;
16213 acts[i].actions_n++;
16215 if (mtr_policy->act_cnt[i].modify_hdr) {
16216 acts[i].dv_actions[acts[i].actions_n] =
16217 mtr_policy->act_cnt[i].modify_hdr->action;
16218 acts[i].actions_n++;
16220 if (mtr_policy->act_cnt[i].fate_action) {
16221 switch (mtr_policy->act_cnt[i].fate_action) {
16222 case MLX5_FLOW_FATE_PORT_ID:
16223 port_action = mlx5_ipool_get
16224 (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16225 mtr_policy->act_cnt[i].rix_port_id_action);
16226 if (!port_action) {
16227 DRV_LOG(ERR, "Failed to find "
16228 "port action for policy.");
16231 acts[i].dv_actions[acts[i].actions_n] =
16232 port_action->action;
16233 acts[i].actions_n++;
16234 mtr_policy->dev = dev;
16235 match_src_port = true;
16237 case MLX5_FLOW_FATE_DROP:
16238 case MLX5_FLOW_FATE_JUMP:
16239 acts[i].dv_actions[acts[i].actions_n] =
16240 mtr_policy->act_cnt[i].dr_jump_action[domain];
16241 acts[i].actions_n++;
16243 case MLX5_FLOW_FATE_SHARED_RSS:
16244 case MLX5_FLOW_FATE_QUEUE:
16245 hrxq = mlx5_ipool_get
16246 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16247 sub_policy->rix_hrxq[i]);
16249 DRV_LOG(ERR, "Failed to find "
16250 "queue action for policy.");
16253 acts[i].dv_actions[acts[i].actions_n] =
16255 acts[i].actions_n++;
16257 case MLX5_FLOW_FATE_MTR:
16260 "No next hierarchy meter.");
16264 acts[i].dv_actions[acts[i].actions_n] =
16265 next_fm->meter_action;
16266 acts[i].actions_n++;
16268 if (mtr_policy->act_cnt[i].next_sub_policy) {
16270 mtr_policy->act_cnt[i].next_sub_policy;
16273 mlx5_flow_meter_policy_find(dev,
16274 next_fm->policy_id, NULL);
16275 MLX5_ASSERT(next_policy);
16277 next_policy->sub_policys[domain][0];
16280 container_of(next_sub_policy->tbl_rsc,
16281 struct mlx5_flow_tbl_data_entry, tbl);
16282 acts[i].dv_actions[acts[i].actions_n++] =
16283 tbl_data->jump.action;
16284 if (mtr_policy->act_cnt[i].modify_hdr)
16285 match_src_port = !!transfer;
16288 /*Queue action do nothing*/
16293 if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16294 egress, transfer, match_src_port, acts)) {
16296 "Failed to create policy rules per domain.");
16302 mlx5_flow_meter_detach(priv, next_fm);
16307 * Create the policy rules.
16310 * Pointer to Ethernet device.
16311 * @param[in,out] mtr_policy
16312 * Pointer to meter policy table.
16315 * 0 on success, -1 otherwise.
16318 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16319 struct mlx5_flow_meter_policy *mtr_policy)
16322 uint16_t sub_policy_num;
16324 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16325 sub_policy_num = (mtr_policy->sub_policy_num >>
16326 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16327 MLX5_MTR_SUB_POLICY_NUM_MASK;
16328 if (!sub_policy_num)
16330 /* Prepare actions list and create policy rules. */
16331 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16332 mtr_policy->sub_policys[i][0], i)) {
16333 DRV_LOG(ERR, "Failed to create policy action "
16334 "list per domain.");
16342 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16344 struct mlx5_priv *priv = dev->data->dev_private;
16345 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16346 struct mlx5_flow_meter_def_policy *def_policy;
16347 struct mlx5_flow_tbl_resource *jump_tbl;
16348 struct mlx5_flow_tbl_data_entry *tbl_data;
16349 uint8_t egress, transfer;
16350 struct rte_flow_error error;
16351 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16354 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16355 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16356 def_policy = mtrmng->def_policy[domain];
16358 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16359 sizeof(struct mlx5_flow_meter_def_policy),
16360 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16362 DRV_LOG(ERR, "Failed to alloc default policy table.");
16363 goto def_policy_error;
16365 mtrmng->def_policy[domain] = def_policy;
16366 /* Create the meter suffix table with SUFFIX level. */
16367 jump_tbl = flow_dv_tbl_resource_get(dev,
16368 MLX5_FLOW_TABLE_LEVEL_METER,
16369 egress, transfer, false, NULL, 0,
16370 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16373 "Failed to create meter suffix table.");
16374 goto def_policy_error;
16376 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16377 tbl_data = container_of(jump_tbl,
16378 struct mlx5_flow_tbl_data_entry, tbl);
16379 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16380 tbl_data->jump.action;
16381 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16382 acts[RTE_COLOR_GREEN].actions_n = 1;
16384 * YELLOW has the same default policy as GREEN does.
16385 * G & Y share the same table and action. The 2nd time of table
16386 * resource getting is just to update the reference count for
16387 * the releasing stage.
16389 jump_tbl = flow_dv_tbl_resource_get(dev,
16390 MLX5_FLOW_TABLE_LEVEL_METER,
16391 egress, transfer, false, NULL, 0,
16392 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16395 "Failed to get meter suffix table.");
16396 goto def_policy_error;
16398 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16399 tbl_data = container_of(jump_tbl,
16400 struct mlx5_flow_tbl_data_entry, tbl);
16401 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16402 tbl_data->jump.action;
16403 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16404 acts[RTE_COLOR_YELLOW].actions_n = 1;
16405 /* Create jump action to the drop table. */
16406 if (!mtrmng->drop_tbl[domain]) {
16407 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16408 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16409 egress, transfer, false, NULL, 0,
16410 0, MLX5_MTR_TABLE_ID_DROP, &error);
16411 if (!mtrmng->drop_tbl[domain]) {
16412 DRV_LOG(ERR, "Failed to create meter "
16413 "drop table for default policy.");
16414 goto def_policy_error;
16417 /* all RED: unique Drop table for jump action. */
16418 tbl_data = container_of(mtrmng->drop_tbl[domain],
16419 struct mlx5_flow_tbl_data_entry, tbl);
16420 def_policy->dr_jump_action[RTE_COLOR_RED] =
16421 tbl_data->jump.action;
16422 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16423 acts[RTE_COLOR_RED].actions_n = 1;
16424 /* Create default policy rules. */
16425 ret = __flow_dv_create_domain_policy_rules(dev,
16426 &def_policy->sub_policy,
16427 egress, transfer, false, acts);
16429 DRV_LOG(ERR, "Failed to create default policy rules.");
16430 goto def_policy_error;
16435 __flow_dv_destroy_domain_def_policy(dev,
16436 (enum mlx5_meter_domain)domain);
16441 * Create the default policy table set.
16444 * Pointer to Ethernet device.
16446 * 0 on success, -1 otherwise.
16449 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16451 struct mlx5_priv *priv = dev->data->dev_private;
16454 /* Non-termination policy table. */
16455 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16456 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16458 if (__flow_dv_create_domain_def_policy(dev, i)) {
16459 DRV_LOG(ERR, "Failed to create default policy");
16460 /* Rollback the created default policies for others. */
16461 flow_dv_destroy_def_policy(dev);
16469 * Create the needed meter tables.
16470 * Lock free, (mutex should be acquired by caller).
16473 * Pointer to Ethernet device.
16475 * Meter information table.
16476 * @param[in] mtr_idx
16478 * @param[in] domain_bitmap
16481 * 0 on success, -1 otherwise.
16484 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16485 struct mlx5_flow_meter_info *fm,
16487 uint8_t domain_bitmap)
16489 struct mlx5_priv *priv = dev->data->dev_private;
16490 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16491 struct rte_flow_error error;
16492 struct mlx5_flow_tbl_data_entry *tbl_data;
16493 uint8_t egress, transfer;
16494 void *actions[METER_ACTIONS];
16495 int domain, ret, i;
16496 struct mlx5_flow_counter *cnt;
16497 struct mlx5_flow_dv_match_params value = {
16498 .size = sizeof(value.buf),
16500 struct mlx5_flow_dv_match_params matcher_para = {
16501 .size = sizeof(matcher_para.buf),
16503 int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16505 uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16506 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16507 struct mlx5_list_entry *entry;
16508 struct mlx5_flow_dv_matcher matcher = {
16510 .size = sizeof(matcher.mask.buf),
16513 struct mlx5_flow_dv_matcher *drop_matcher;
16514 struct mlx5_flow_cb_ctx ctx = {
16520 if (!priv->mtr_en || mtr_id_reg_c < 0) {
16521 rte_errno = ENOTSUP;
16524 for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16525 if (!(domain_bitmap & (1 << domain)) ||
16526 (mtrmng->def_rule[domain] && !fm->drop_cnt))
16528 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16529 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16530 /* Create the drop table with METER DROP level. */
16531 if (!mtrmng->drop_tbl[domain]) {
16532 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16533 MLX5_FLOW_TABLE_LEVEL_METER,
16534 egress, transfer, false, NULL, 0,
16535 0, MLX5_MTR_TABLE_ID_DROP, &error);
16536 if (!mtrmng->drop_tbl[domain]) {
16537 DRV_LOG(ERR, "Failed to create meter drop table.");
16541 /* Create default matcher in drop table. */
16542 matcher.tbl = mtrmng->drop_tbl[domain],
16543 tbl_data = container_of(mtrmng->drop_tbl[domain],
16544 struct mlx5_flow_tbl_data_entry, tbl);
16545 if (!mtrmng->def_matcher[domain]) {
16546 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16547 (enum modify_reg)mtr_id_reg_c,
16549 matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16550 matcher.crc = rte_raw_cksum
16551 ((const void *)matcher.mask.buf,
16552 matcher.mask.size);
16553 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16555 DRV_LOG(ERR, "Failed to register meter "
16556 "drop default matcher.");
16559 mtrmng->def_matcher[domain] = container_of(entry,
16560 struct mlx5_flow_dv_matcher, entry);
16562 /* Create default rule in drop table. */
16563 if (!mtrmng->def_rule[domain]) {
16565 actions[i++] = priv->sh->dr_drop_action;
16566 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16567 (enum modify_reg)mtr_id_reg_c, 0, 0);
16568 misc_mask = flow_dv_matcher_enable(value.buf);
16569 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16570 ret = mlx5_flow_os_create_flow
16571 (mtrmng->def_matcher[domain]->matcher_object,
16572 (void *)&value, i, actions,
16573 &mtrmng->def_rule[domain]);
16575 DRV_LOG(ERR, "Failed to create meter "
16576 "default drop rule for drop table.");
16582 MLX5_ASSERT(mtrmng->max_mtr_bits);
16583 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16584 /* Create matchers for Drop. */
16585 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16586 (enum modify_reg)mtr_id_reg_c, 0,
16587 (mtr_id_mask << mtr_id_offset));
16588 matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16589 matcher.crc = rte_raw_cksum
16590 ((const void *)matcher.mask.buf,
16591 matcher.mask.size);
16592 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16595 "Failed to register meter drop matcher.");
16598 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16599 container_of(entry, struct mlx5_flow_dv_matcher,
16603 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16604 /* Create drop rule, matching meter_id only. */
16605 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16606 (enum modify_reg)mtr_id_reg_c,
16607 (mtr_idx << mtr_id_offset), UINT32_MAX);
16609 cnt = flow_dv_counter_get_by_idx(dev,
16610 fm->drop_cnt, NULL);
16611 actions[i++] = cnt->action;
16612 actions[i++] = priv->sh->dr_drop_action;
16613 misc_mask = flow_dv_matcher_enable(value.buf);
16614 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16615 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16616 (void *)&value, i, actions,
16617 &fm->drop_rule[domain]);
16619 DRV_LOG(ERR, "Failed to create meter "
16620 "drop rule for drop table.");
16626 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16627 if (fm->drop_rule[i]) {
16628 claim_zero(mlx5_flow_os_destroy_flow
16629 (fm->drop_rule[i]));
16630 fm->drop_rule[i] = NULL;
16636 static struct mlx5_flow_meter_sub_policy *
16637 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16638 struct mlx5_flow_meter_policy *mtr_policy,
16639 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16640 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16643 struct mlx5_priv *priv = dev->data->dev_private;
16644 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16645 uint32_t sub_policy_idx = 0;
16646 uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16648 struct mlx5_hrxq *hrxq;
16649 struct mlx5_flow_handle dh;
16650 struct mlx5_meter_policy_action_container *act_cnt;
16651 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16652 uint16_t sub_policy_num;
16654 rte_spinlock_lock(&mtr_policy->sl);
16655 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16658 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16659 if (!hrxq_idx[i]) {
16660 rte_spinlock_unlock(&mtr_policy->sl);
16664 sub_policy_num = (mtr_policy->sub_policy_num >>
16665 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16666 MLX5_MTR_SUB_POLICY_NUM_MASK;
16667 for (j = 0; j < sub_policy_num; j++) {
16668 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16671 mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16674 if (i >= MLX5_MTR_RTE_COLORS) {
16676 * Found the sub policy table with
16677 * the same queue per color.
16679 rte_spinlock_unlock(&mtr_policy->sl);
16680 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16681 mlx5_hrxq_release(dev, hrxq_idx[i]);
16683 return mtr_policy->sub_policys[domain][j];
16686 /* Create sub policy. */
16687 if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16688 /* Reuse the first pre-allocated sub_policy. */
16689 sub_policy = mtr_policy->sub_policys[domain][0];
16690 sub_policy_idx = sub_policy->idx;
16692 sub_policy = mlx5_ipool_zmalloc
16693 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16696 sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16697 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16698 mlx5_hrxq_release(dev, hrxq_idx[i]);
16699 goto rss_sub_policy_error;
16701 sub_policy->idx = sub_policy_idx;
16702 sub_policy->main_policy = mtr_policy;
16704 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16707 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16708 if (mtr_policy->is_hierarchy) {
16709 act_cnt = &mtr_policy->act_cnt[i];
16710 act_cnt->next_sub_policy = next_sub_policy;
16711 mlx5_hrxq_release(dev, hrxq_idx[i]);
16714 * Overwrite the last action from
16715 * RSS action to Queue action.
16717 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16720 DRV_LOG(ERR, "Failed to get policy hrxq");
16721 goto rss_sub_policy_error;
16723 act_cnt = &mtr_policy->act_cnt[i];
16724 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16725 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16726 if (act_cnt->rix_mark)
16728 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16729 dh.rix_hrxq = hrxq_idx[i];
16730 flow_drv_rxq_flags_set(dev, &dh);
16734 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16735 sub_policy, domain)) {
16736 DRV_LOG(ERR, "Failed to create policy "
16737 "rules for ingress domain.");
16738 goto rss_sub_policy_error;
16740 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16741 i = (mtr_policy->sub_policy_num >>
16742 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16743 MLX5_MTR_SUB_POLICY_NUM_MASK;
16744 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16745 DRV_LOG(ERR, "No free sub-policy slot.");
16746 goto rss_sub_policy_error;
16748 mtr_policy->sub_policys[domain][i] = sub_policy;
16750 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16751 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16752 mtr_policy->sub_policy_num |=
16753 (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16754 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16756 rte_spinlock_unlock(&mtr_policy->sl);
16759 rss_sub_policy_error:
16761 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16762 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16763 i = (mtr_policy->sub_policy_num >>
16764 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16765 MLX5_MTR_SUB_POLICY_NUM_MASK;
16766 mtr_policy->sub_policys[domain][i] = NULL;
16767 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16771 rte_spinlock_unlock(&mtr_policy->sl);
16776 * Find the policy table for prefix table with RSS.
16779 * Pointer to Ethernet device.
16780 * @param[in] mtr_policy
16781 * Pointer to meter policy table.
16782 * @param[in] rss_desc
16783 * Pointer to rss_desc
16785 * Pointer to table set on success, NULL otherwise and rte_errno is set.
16787 static struct mlx5_flow_meter_sub_policy *
16788 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16789 struct mlx5_flow_meter_policy *mtr_policy,
16790 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16792 struct mlx5_priv *priv = dev->data->dev_private;
16793 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16794 struct mlx5_flow_meter_info *next_fm;
16795 struct mlx5_flow_meter_policy *next_policy;
16796 struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16797 struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16798 struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16799 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16800 bool reuse_sub_policy;
16805 /* Iterate hierarchy to get all policies in this hierarchy. */
16806 policies[i++] = mtr_policy;
16807 if (!mtr_policy->is_hierarchy)
16809 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16810 DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16813 next_fm = mlx5_flow_meter_find(priv,
16814 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16816 DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16820 mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16822 MLX5_ASSERT(next_policy);
16823 mtr_policy = next_policy;
16827 * From last policy to the first one in hierarchy,
16828 * create / get the sub policy for each of them.
16830 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16834 &reuse_sub_policy);
16836 DRV_LOG(ERR, "Failed to get the sub policy.");
16839 if (!reuse_sub_policy)
16840 sub_policies[j++] = sub_policy;
16841 next_sub_policy = sub_policy;
16846 uint16_t sub_policy_num;
16848 sub_policy = sub_policies[--j];
16849 mtr_policy = sub_policy->main_policy;
16850 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16851 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16852 sub_policy_num = (mtr_policy->sub_policy_num >>
16853 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16854 MLX5_MTR_SUB_POLICY_NUM_MASK;
16855 mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16858 mtr_policy->sub_policy_num &=
16859 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16860 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16861 mtr_policy->sub_policy_num |=
16862 (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16863 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16864 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16872 * Create the sub policy tag rule for all meters in hierarchy.
16875 * Pointer to Ethernet device.
16877 * Meter information table.
16878 * @param[in] src_port
16879 * The src port this extra rule should use.
16881 * The src port match item.
16882 * @param[out] error
16883 * Perform verbose error reporting if not NULL.
16885 * 0 on success, a negative errno value otherwise and rte_errno is set.
16888 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16889 struct mlx5_flow_meter_info *fm,
16891 const struct rte_flow_item *item,
16892 struct rte_flow_error *error)
16894 struct mlx5_priv *priv = dev->data->dev_private;
16895 struct mlx5_flow_meter_policy *mtr_policy;
16896 struct mlx5_flow_meter_sub_policy *sub_policy;
16897 struct mlx5_flow_meter_info *next_fm = NULL;
16898 struct mlx5_flow_meter_policy *next_policy;
16899 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16900 struct mlx5_flow_tbl_data_entry *tbl_data;
16901 struct mlx5_sub_policy_color_rule *color_rule;
16902 struct mlx5_meter_policy_acts acts;
16903 uint32_t color_reg_c_idx;
16904 bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16905 struct rte_flow_attr attr = {
16906 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16913 uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16916 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16917 MLX5_ASSERT(mtr_policy);
16918 if (!mtr_policy->is_hierarchy)
16920 next_fm = mlx5_flow_meter_find(priv,
16921 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16923 return rte_flow_error_set(error, EINVAL,
16924 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16925 "Failed to find next meter in hierarchy.");
16927 if (!next_fm->drop_cnt)
16929 color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16930 sub_policy = mtr_policy->sub_policys[domain][0];
16931 for (i = 0; i < RTE_COLORS; i++) {
16932 bool rule_exist = false;
16933 struct mlx5_meter_policy_action_container *act_cnt;
16935 if (i >= RTE_COLOR_YELLOW)
16937 TAILQ_FOREACH(color_rule,
16938 &sub_policy->color_rules[i], next_port)
16939 if (color_rule->src_port == src_port) {
16945 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16946 sizeof(struct mlx5_sub_policy_color_rule),
16949 return rte_flow_error_set(error, ENOMEM,
16950 RTE_FLOW_ERROR_TYPE_ACTION,
16951 NULL, "No memory to create tag color rule.");
16952 color_rule->src_port = src_port;
16954 next_policy = mlx5_flow_meter_policy_find(dev,
16955 next_fm->policy_id, NULL);
16956 MLX5_ASSERT(next_policy);
16957 next_sub_policy = next_policy->sub_policys[domain][0];
16958 tbl_data = container_of(next_sub_policy->tbl_rsc,
16959 struct mlx5_flow_tbl_data_entry, tbl);
16960 act_cnt = &mtr_policy->act_cnt[i];
16962 acts.dv_actions[0] = next_fm->meter_action;
16963 acts.dv_actions[1] = act_cnt->modify_hdr->action;
16965 acts.dv_actions[0] = act_cnt->modify_hdr->action;
16966 acts.dv_actions[1] = next_fm->meter_action;
16968 acts.dv_actions[2] = tbl_data->jump.action;
16969 acts.actions_n = 3;
16970 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16974 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16975 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16977 &color_rule->matcher, error)) {
16978 rte_flow_error_set(error, errno,
16979 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16980 "Failed to create hierarchy meter matcher.");
16983 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
16985 color_rule->matcher->matcher_object,
16986 acts.actions_n, acts.dv_actions,
16988 &color_rule->rule, &attr)) {
16989 rte_flow_error_set(error, errno,
16990 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16991 "Failed to create hierarchy meter rule.");
16994 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16995 color_rule, next_port);
16999 * Recursive call to iterate all meters in hierarchy and
17000 * create needed rules.
17002 return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17003 src_port, item, error);
17006 if (color_rule->rule)
17007 mlx5_flow_os_destroy_flow(color_rule->rule);
17008 if (color_rule->matcher) {
17009 struct mlx5_flow_tbl_data_entry *tbl =
17010 container_of(color_rule->matcher->tbl,
17011 typeof(*tbl), tbl);
17012 mlx5_list_unregister(tbl->matchers,
17013 &color_rule->matcher->entry);
17015 mlx5_free(color_rule);
17018 mlx5_flow_meter_detach(priv, next_fm);
17023 * Destroy the sub policy table with RX queue.
17026 * Pointer to Ethernet device.
17027 * @param[in] mtr_policy
17028 * Pointer to meter policy table.
17031 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17032 struct mlx5_flow_meter_policy *mtr_policy)
17034 struct mlx5_priv *priv = dev->data->dev_private;
17035 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17036 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17038 uint16_t sub_policy_num, new_policy_num;
17040 rte_spinlock_lock(&mtr_policy->sl);
17041 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17042 switch (mtr_policy->act_cnt[i].fate_action) {
17043 case MLX5_FLOW_FATE_SHARED_RSS:
17044 sub_policy_num = (mtr_policy->sub_policy_num >>
17045 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17046 MLX5_MTR_SUB_POLICY_NUM_MASK;
17047 new_policy_num = sub_policy_num;
17048 for (j = 0; j < sub_policy_num; j++) {
17050 mtr_policy->sub_policys[domain][j];
17052 __flow_dv_destroy_sub_policy_rules(dev,
17055 mtr_policy->sub_policys[domain][0]) {
17056 mtr_policy->sub_policys[domain][j] =
17059 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17065 if (new_policy_num != sub_policy_num) {
17066 mtr_policy->sub_policy_num &=
17067 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17068 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17069 mtr_policy->sub_policy_num |=
17071 MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17072 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17075 case MLX5_FLOW_FATE_QUEUE:
17076 sub_policy = mtr_policy->sub_policys[domain][0];
17077 __flow_dv_destroy_sub_policy_rules(dev,
17081 /*Other actions without queue and do nothing*/
17085 rte_spinlock_unlock(&mtr_policy->sl);
17088 * Check whether the DR drop action is supported on the root table or not.
17090 * Create a simple flow with DR drop action on root table to validate
17091 * if DR drop action on root table is supported or not.
17094 * Pointer to rte_eth_dev structure.
17097 * 0 on success, a negative errno value otherwise and rte_errno is set.
17100 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17102 struct mlx5_priv *priv = dev->data->dev_private;
17103 struct mlx5_dev_ctx_shared *sh = priv->sh;
17104 struct mlx5_flow_dv_match_params mask = {
17105 .size = sizeof(mask.buf),
17107 struct mlx5_flow_dv_match_params value = {
17108 .size = sizeof(value.buf),
17110 struct mlx5dv_flow_matcher_attr dv_attr = {
17111 .type = IBV_FLOW_ATTR_NORMAL,
17113 .match_criteria_enable = 0,
17114 .match_mask = (void *)&mask,
17116 struct mlx5_flow_tbl_resource *tbl = NULL;
17117 void *matcher = NULL;
17121 tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17125 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17126 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17127 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17128 tbl->obj, &matcher);
17131 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17132 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17133 &sh->dr_drop_action, &flow);
17136 * If DR drop action is not supported on root table, flow create will
17137 * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17141 (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17142 DRV_LOG(INFO, "DR drop action is not supported in root table.");
17144 DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17147 claim_zero(mlx5_flow_os_destroy_flow(flow));
17150 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17152 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17157 * Validate the batch counter support in root table.
17159 * Create a simple flow with invalid counter and drop action on root table to
17160 * validate if batch counter with offset on root table is supported or not.
17163 * Pointer to rte_eth_dev structure.
17166 * 0 on success, a negative errno value otherwise and rte_errno is set.
17169 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17171 struct mlx5_priv *priv = dev->data->dev_private;
17172 struct mlx5_dev_ctx_shared *sh = priv->sh;
17173 struct mlx5_flow_dv_match_params mask = {
17174 .size = sizeof(mask.buf),
17176 struct mlx5_flow_dv_match_params value = {
17177 .size = sizeof(value.buf),
17179 struct mlx5dv_flow_matcher_attr dv_attr = {
17180 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17182 .match_criteria_enable = 0,
17183 .match_mask = (void *)&mask,
17185 void *actions[2] = { 0 };
17186 struct mlx5_flow_tbl_resource *tbl = NULL;
17187 struct mlx5_devx_obj *dcs = NULL;
17188 void *matcher = NULL;
17192 tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17196 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17199 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17203 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17204 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17205 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17206 tbl->obj, &matcher);
17209 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17210 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17214 * If batch counter with offset is not supported, the driver will not
17215 * validate the invalid offset value, flow create should success.
17216 * In this case, it means batch counter is not supported in root table.
17218 * Otherwise, if flow create is failed, counter offset is supported.
17221 DRV_LOG(INFO, "Batch counter is not supported in root "
17222 "table. Switch to fallback mode.");
17223 rte_errno = ENOTSUP;
17225 claim_zero(mlx5_flow_os_destroy_flow(flow));
17227 /* Check matcher to make sure validate fail at flow create. */
17228 if (!matcher || (matcher && errno != EINVAL))
17229 DRV_LOG(ERR, "Unexpected error in counter offset "
17230 "support detection");
17234 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17236 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17238 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17240 claim_zero(mlx5_devx_cmd_destroy(dcs));
17245 * Query a devx counter.
17248 * Pointer to the Ethernet device structure.
17250 * Index to the flow counter.
17252 * Set to clear the counter statistics.
17254 * The statistics value of packets.
17255 * @param[out] bytes
17256 * The statistics value of bytes.
17259 * 0 on success, otherwise return -1.
17262 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17263 uint64_t *pkts, uint64_t *bytes)
17265 struct mlx5_priv *priv = dev->data->dev_private;
17266 struct mlx5_flow_counter *cnt;
17267 uint64_t inn_pkts, inn_bytes;
17270 if (!priv->sh->devx)
17273 ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17276 cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17277 *pkts = inn_pkts - cnt->hits;
17278 *bytes = inn_bytes - cnt->bytes;
17280 cnt->hits = inn_pkts;
17281 cnt->bytes = inn_bytes;
17287 * Get aged-out flows.
17290 * Pointer to the Ethernet device structure.
17291 * @param[in] context
17292 * The address of an array of pointers to the aged-out flows contexts.
17293 * @param[in] nb_contexts
17294 * The length of context array pointers.
17295 * @param[out] error
17296 * Perform verbose error reporting if not NULL. Initialized in case of
17300 * how many contexts get in success, otherwise negative errno value.
17301 * if nb_contexts is 0, return the amount of all aged contexts.
17302 * if nb_contexts is not 0 , return the amount of aged flows reported
17303 * in the context array.
17304 * @note: only stub for now
17307 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17309 uint32_t nb_contexts,
17310 struct rte_flow_error *error)
17312 struct mlx5_priv *priv = dev->data->dev_private;
17313 struct mlx5_age_info *age_info;
17314 struct mlx5_age_param *age_param;
17315 struct mlx5_flow_counter *counter;
17316 struct mlx5_aso_age_action *act;
17319 if (nb_contexts && !context)
17320 return rte_flow_error_set(error, EINVAL,
17321 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17322 NULL, "empty context");
17323 age_info = GET_PORT_AGE_INFO(priv);
17324 rte_spinlock_lock(&age_info->aged_sl);
17325 LIST_FOREACH(act, &age_info->aged_aso, next) {
17328 context[nb_flows - 1] =
17329 act->age_params.context;
17330 if (!(--nb_contexts))
17334 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17337 age_param = MLX5_CNT_TO_AGE(counter);
17338 context[nb_flows - 1] = age_param->context;
17339 if (!(--nb_contexts))
17343 rte_spinlock_unlock(&age_info->aged_sl);
17344 MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17349 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17352 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17354 return flow_dv_counter_alloc(dev, 0);
17358 * Validate indirect action.
17359 * Dispatcher for action type specific validation.
17362 * Pointer to the Ethernet device structure.
17364 * Indirect action configuration.
17365 * @param[in] action
17366 * The indirect action object to validate.
17367 * @param[out] error
17368 * Perform verbose error reporting if not NULL. Initialized in case of
17372 * 0 on success, otherwise negative errno value.
17375 flow_dv_action_validate(struct rte_eth_dev *dev,
17376 const struct rte_flow_indir_action_conf *conf,
17377 const struct rte_flow_action *action,
17378 struct rte_flow_error *err)
17380 struct mlx5_priv *priv = dev->data->dev_private;
17382 RTE_SET_USED(conf);
17383 switch (action->type) {
17384 case RTE_FLOW_ACTION_TYPE_RSS:
17386 * priv->obj_ops is set according to driver capabilities.
17387 * When DevX capabilities are
17388 * sufficient, it is set to devx_obj_ops.
17389 * Otherwise, it is set to ibv_obj_ops.
17390 * ibv_obj_ops doesn't support ind_table_modify operation.
17391 * In this case the indirect RSS action can't be used.
17393 if (priv->obj_ops.ind_table_modify == NULL)
17394 return rte_flow_error_set
17396 RTE_FLOW_ERROR_TYPE_ACTION,
17398 "Indirect RSS action not supported");
17399 return mlx5_validate_action_rss(dev, action, err);
17400 case RTE_FLOW_ACTION_TYPE_AGE:
17401 if (!priv->sh->aso_age_mng)
17402 return rte_flow_error_set(err, ENOTSUP,
17403 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17405 "Indirect age action not supported");
17406 return flow_dv_validate_action_age(0, action, dev, err);
17407 case RTE_FLOW_ACTION_TYPE_COUNT:
17408 return flow_dv_validate_action_count(dev, true, 0, err);
17409 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17410 if (!priv->sh->ct_aso_en)
17411 return rte_flow_error_set(err, ENOTSUP,
17412 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17413 "ASO CT is not supported");
17414 return mlx5_validate_action_ct(dev, action->conf, err);
17416 return rte_flow_error_set(err, ENOTSUP,
17417 RTE_FLOW_ERROR_TYPE_ACTION,
17419 "action type not supported");
17424 * Check if the RSS configurations for colors of a meter policy match
17425 * each other, except the queues.
17428 * Pointer to the first RSS flow action.
17430 * Pointer to the second RSS flow action.
17433 * 0 on match, 1 on conflict.
17436 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17437 const struct rte_flow_action_rss *r2)
17441 if (r1->func != r2->func || r1->level != r2->level ||
17442 r1->types != r2->types || r1->key_len != r2->key_len ||
17443 memcmp(r1->key, r2->key, r1->key_len))
17449 * Validate the meter hierarchy chain for meter policy.
17452 * Pointer to the Ethernet device structure.
17453 * @param[in] meter_id
17455 * @param[in] action_flags
17456 * Holds the actions detected until now.
17457 * @param[out] is_rss
17459 * @param[out] hierarchy_domain
17460 * The domain bitmap for hierarchy policy.
17461 * @param[out] error
17462 * Perform verbose error reporting if not NULL. Initialized in case of
17466 * 0 on success, otherwise negative errno value with error set.
17469 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17471 uint64_t action_flags,
17473 uint8_t *hierarchy_domain,
17474 struct rte_mtr_error *error)
17476 struct mlx5_priv *priv = dev->data->dev_private;
17477 struct mlx5_flow_meter_info *fm;
17478 struct mlx5_flow_meter_policy *policy;
17481 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17482 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17483 return -rte_mtr_error_set(error, EINVAL,
17484 RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17486 "Multiple fate actions not supported.");
17487 *hierarchy_domain = 0;
17489 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17491 return -rte_mtr_error_set(error, EINVAL,
17492 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17493 "Meter not found in meter hierarchy.");
17494 if (fm->def_policy)
17495 return -rte_mtr_error_set(error, EINVAL,
17496 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17497 "Non termination meter not supported in hierarchy.");
17498 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17499 MLX5_ASSERT(policy);
17501 * Only inherit the supported domains of the first meter in
17503 * One meter supports at least one domain.
17505 if (!*hierarchy_domain) {
17506 if (policy->transfer)
17507 *hierarchy_domain |=
17508 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17509 if (policy->ingress)
17510 *hierarchy_domain |=
17511 MLX5_MTR_DOMAIN_INGRESS_BIT;
17512 if (policy->egress)
17513 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17515 if (!policy->is_hierarchy) {
17516 *is_rss = policy->is_rss;
17519 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17520 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17521 return -rte_mtr_error_set(error, EINVAL,
17522 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17523 "Exceed max hierarchy meter number.");
17529 * Validate meter policy actions.
17530 * Dispatcher for action type specific validation.
17533 * Pointer to the Ethernet device structure.
17534 * @param[in] action
17535 * The meter policy action object to validate.
17537 * Attributes of flow to determine steering domain.
17538 * @param[out] error
17539 * Perform verbose error reporting if not NULL. Initialized in case of
17543 * 0 on success, otherwise negative errno value.
17546 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17547 const struct rte_flow_action *actions[RTE_COLORS],
17548 struct rte_flow_attr *attr,
17550 uint8_t *domain_bitmap,
17551 uint8_t *policy_mode,
17552 struct rte_mtr_error *error)
17554 struct mlx5_priv *priv = dev->data->dev_private;
17555 struct mlx5_dev_config *dev_conf = &priv->config;
17556 const struct rte_flow_action *act;
17557 uint64_t action_flags[RTE_COLORS] = {0};
17560 struct rte_flow_error flow_err;
17561 uint8_t domain_color[RTE_COLORS] = {0};
17562 uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17563 uint8_t hierarchy_domain = 0;
17564 const struct rte_flow_action_meter *mtr;
17565 bool def_green = false;
17566 bool def_yellow = false;
17567 const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17569 if (!priv->config.dv_esw_en)
17570 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17571 *domain_bitmap = def_domain;
17572 /* Red color could only support DROP action. */
17573 if (!actions[RTE_COLOR_RED] ||
17574 actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17575 return -rte_mtr_error_set(error, ENOTSUP,
17576 RTE_MTR_ERROR_TYPE_METER_POLICY,
17577 NULL, "Red color only supports drop action.");
17579 * Check default policy actions:
17580 * Green / Yellow: no action, Red: drop action
17581 * Either G or Y will trigger default policy actions to be created.
17583 if (!actions[RTE_COLOR_GREEN] ||
17584 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17586 if (!actions[RTE_COLOR_YELLOW] ||
17587 actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17589 if (def_green && def_yellow) {
17590 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17592 } else if (!def_green && def_yellow) {
17593 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17594 } else if (def_green && !def_yellow) {
17595 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17597 /* Set to empty string in case of NULL pointer access by user. */
17598 flow_err.message = "";
17599 for (i = 0; i < RTE_COLORS; i++) {
17601 for (action_flags[i] = 0, actions_n = 0;
17602 act && act->type != RTE_FLOW_ACTION_TYPE_END;
17604 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17605 return -rte_mtr_error_set(error, ENOTSUP,
17606 RTE_MTR_ERROR_TYPE_METER_POLICY,
17607 NULL, "too many actions");
17608 switch (act->type) {
17609 case RTE_FLOW_ACTION_TYPE_PORT_ID:
17610 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17611 if (!priv->config.dv_esw_en)
17612 return -rte_mtr_error_set(error,
17614 RTE_MTR_ERROR_TYPE_METER_POLICY,
17615 NULL, "PORT action validate check"
17616 " fail for ESW disable");
17617 ret = flow_dv_validate_action_port_id(dev,
17619 act, attr, &flow_err);
17621 return -rte_mtr_error_set(error,
17623 RTE_MTR_ERROR_TYPE_METER_POLICY,
17624 NULL, flow_err.message ?
17626 "PORT action validate check fail");
17628 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17630 case RTE_FLOW_ACTION_TYPE_MARK:
17631 ret = flow_dv_validate_action_mark(dev, act,
17635 return -rte_mtr_error_set(error,
17637 RTE_MTR_ERROR_TYPE_METER_POLICY,
17638 NULL, flow_err.message ?
17640 "Mark action validate check fail");
17641 if (dev_conf->dv_xmeta_en !=
17642 MLX5_XMETA_MODE_LEGACY)
17643 return -rte_mtr_error_set(error,
17645 RTE_MTR_ERROR_TYPE_METER_POLICY,
17646 NULL, "Extend MARK action is "
17647 "not supported. Please try use "
17648 "default policy for meter.");
17649 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17652 case RTE_FLOW_ACTION_TYPE_SET_TAG:
17653 ret = flow_dv_validate_action_set_tag(dev,
17654 act, action_flags[i],
17657 return -rte_mtr_error_set(error,
17659 RTE_MTR_ERROR_TYPE_METER_POLICY,
17660 NULL, flow_err.message ?
17662 "Set tag action validate check fail");
17663 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17666 case RTE_FLOW_ACTION_TYPE_DROP:
17667 ret = mlx5_flow_validate_action_drop
17668 (action_flags[i], attr, &flow_err);
17670 return -rte_mtr_error_set(error,
17672 RTE_MTR_ERROR_TYPE_METER_POLICY,
17673 NULL, flow_err.message ?
17675 "Drop action validate check fail");
17676 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17679 case RTE_FLOW_ACTION_TYPE_QUEUE:
17681 * Check whether extensive
17682 * metadata feature is engaged.
17684 if (dev_conf->dv_flow_en &&
17685 (dev_conf->dv_xmeta_en !=
17686 MLX5_XMETA_MODE_LEGACY) &&
17687 mlx5_flow_ext_mreg_supported(dev))
17688 return -rte_mtr_error_set(error,
17690 RTE_MTR_ERROR_TYPE_METER_POLICY,
17691 NULL, "Queue action with meta "
17692 "is not supported. Please try use "
17693 "default policy for meter.");
17694 ret = mlx5_flow_validate_action_queue(act,
17695 action_flags[i], dev,
17698 return -rte_mtr_error_set(error,
17700 RTE_MTR_ERROR_TYPE_METER_POLICY,
17701 NULL, flow_err.message ?
17703 "Queue action validate check fail");
17704 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17707 case RTE_FLOW_ACTION_TYPE_RSS:
17708 if (dev_conf->dv_flow_en &&
17709 (dev_conf->dv_xmeta_en !=
17710 MLX5_XMETA_MODE_LEGACY) &&
17711 mlx5_flow_ext_mreg_supported(dev))
17712 return -rte_mtr_error_set(error,
17714 RTE_MTR_ERROR_TYPE_METER_POLICY,
17715 NULL, "RSS action with meta "
17716 "is not supported. Please try use "
17717 "default policy for meter.");
17718 ret = mlx5_validate_action_rss(dev, act,
17721 return -rte_mtr_error_set(error,
17723 RTE_MTR_ERROR_TYPE_METER_POLICY,
17724 NULL, flow_err.message ?
17726 "RSS action validate check fail");
17727 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17729 /* Either G or Y will set the RSS. */
17730 rss_color[i] = act->conf;
17732 case RTE_FLOW_ACTION_TYPE_JUMP:
17733 ret = flow_dv_validate_action_jump(dev,
17734 NULL, act, action_flags[i],
17735 attr, true, &flow_err);
17737 return -rte_mtr_error_set(error,
17739 RTE_MTR_ERROR_TYPE_METER_POLICY,
17740 NULL, flow_err.message ?
17742 "Jump action validate check fail");
17744 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17747 * Only the last meter in the hierarchy will support
17748 * the YELLOW color steering. Then in the meter policy
17749 * actions list, there should be no other meter inside.
17751 case RTE_FLOW_ACTION_TYPE_METER:
17752 if (i != RTE_COLOR_GREEN)
17753 return -rte_mtr_error_set(error,
17755 RTE_MTR_ERROR_TYPE_METER_POLICY,
17757 "Meter hierarchy only supports GREEN color.");
17758 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17759 return -rte_mtr_error_set(error,
17761 RTE_MTR_ERROR_TYPE_METER_POLICY,
17763 "No yellow policy should be provided in meter hierarchy.");
17765 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17775 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17778 return -rte_mtr_error_set(error, ENOTSUP,
17779 RTE_MTR_ERROR_TYPE_METER_POLICY,
17781 "Doesn't support optional action");
17784 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
17785 domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17786 } else if ((action_flags[i] &
17787 (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17788 (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
17790 * Only support MLX5_XMETA_MODE_LEGACY
17791 * so MARK action is only in ingress domain.
17793 domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17795 domain_color[i] = def_domain;
17796 if (action_flags[i] &&
17797 !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17799 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17801 if (action_flags[i] &
17802 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17803 domain_color[i] &= hierarchy_domain;
17805 * Non-termination actions only support NIC Tx domain.
17806 * The adjustion should be skipped when there is no
17807 * action or only END is provided. The default domains
17808 * bit-mask is set to find the MIN intersection.
17809 * The action flags checking should also be skipped.
17811 if ((def_green && i == RTE_COLOR_GREEN) ||
17812 (def_yellow && i == RTE_COLOR_YELLOW))
17815 * Validate the drop action mutual exclusion
17816 * with other actions. Drop action is mutually-exclusive
17817 * with any other action, except for Count action.
17819 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17820 (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17821 return -rte_mtr_error_set(error, ENOTSUP,
17822 RTE_MTR_ERROR_TYPE_METER_POLICY,
17823 NULL, "Drop action is mutually-exclusive "
17824 "with any other action");
17826 /* Eswitch has few restrictions on using items and actions */
17827 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17828 if (!mlx5_flow_ext_mreg_supported(dev) &&
17829 action_flags[i] & MLX5_FLOW_ACTION_MARK)
17830 return -rte_mtr_error_set(error, ENOTSUP,
17831 RTE_MTR_ERROR_TYPE_METER_POLICY,
17832 NULL, "unsupported action MARK");
17833 if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17834 return -rte_mtr_error_set(error, ENOTSUP,
17835 RTE_MTR_ERROR_TYPE_METER_POLICY,
17836 NULL, "unsupported action QUEUE");
17837 if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17838 return -rte_mtr_error_set(error, ENOTSUP,
17839 RTE_MTR_ERROR_TYPE_METER_POLICY,
17840 NULL, "unsupported action RSS");
17841 if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17842 return -rte_mtr_error_set(error, ENOTSUP,
17843 RTE_MTR_ERROR_TYPE_METER_POLICY,
17844 NULL, "no fate action is found");
17846 if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17847 (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17848 if ((domain_color[i] &
17849 MLX5_MTR_DOMAIN_EGRESS_BIT))
17851 MLX5_MTR_DOMAIN_EGRESS_BIT;
17853 return -rte_mtr_error_set(error,
17855 RTE_MTR_ERROR_TYPE_METER_POLICY,
17857 "no fate action is found");
17861 /* If both colors have RSS, the attributes should be the same. */
17862 if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
17863 rss_color[RTE_COLOR_YELLOW]))
17864 return -rte_mtr_error_set(error, EINVAL,
17865 RTE_MTR_ERROR_TYPE_METER_POLICY,
17866 NULL, "policy RSS attr conflict");
17867 if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
17869 /* "domain_color[C]" is non-zero for each color, default is ALL. */
17870 if (!def_green && !def_yellow &&
17871 domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
17872 !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
17873 !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
17874 return -rte_mtr_error_set(error, EINVAL,
17875 RTE_MTR_ERROR_TYPE_METER_POLICY,
17876 NULL, "policy domains conflict");
17878 * At least one color policy is listed in the actions, the domains
17879 * to be supported should be the intersection.
17881 *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
17882 domain_color[RTE_COLOR_YELLOW];
17887 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17889 struct mlx5_priv *priv = dev->data->dev_private;
17892 if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17893 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17898 if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17899 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17903 if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17904 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17911 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17912 .validate = flow_dv_validate,
17913 .prepare = flow_dv_prepare,
17914 .translate = flow_dv_translate,
17915 .apply = flow_dv_apply,
17916 .remove = flow_dv_remove,
17917 .destroy = flow_dv_destroy,
17918 .query = flow_dv_query,
17919 .create_mtr_tbls = flow_dv_create_mtr_tbls,
17920 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17921 .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17922 .create_meter = flow_dv_mtr_alloc,
17923 .free_meter = flow_dv_aso_mtr_release_to_pool,
17924 .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17925 .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17926 .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17927 .create_policy_rules = flow_dv_create_policy_rules,
17928 .destroy_policy_rules = flow_dv_destroy_policy_rules,
17929 .create_def_policy = flow_dv_create_def_policy,
17930 .destroy_def_policy = flow_dv_destroy_def_policy,
17931 .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17932 .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17933 .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17934 .counter_alloc = flow_dv_counter_allocate,
17935 .counter_free = flow_dv_counter_free,
17936 .counter_query = flow_dv_counter_query,
17937 .get_aged_flows = flow_dv_get_aged_flows,
17938 .action_validate = flow_dv_action_validate,
17939 .action_create = flow_dv_action_create,
17940 .action_destroy = flow_dv_action_destroy,
17941 .action_update = flow_dv_action_update,
17942 .action_query = flow_dv_action_query,
17943 .sync_domain = flow_dv_sync_domain,
17946 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */