drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24 #include <rte_mtr.h>
  25 #include <rte_mtr_driver.h>
  26 #include <rte_tailq.h>
  27
  28 #include <mlx5_glue.h>
  29 #include <mlx5_devx_cmds.h>
  30 #include <mlx5_prm.h>
  31 #include <mlx5_malloc.h>
  32
  33 #include "mlx5_defs.h"
  34 #include "mlx5.h"
  35 #include "mlx5_common_os.h"
  36 #include "mlx5_flow.h"
  37 #include "mlx5_flow_os.h"
  38 #include "mlx5_rx.h"
  39 #include "mlx5_tx.h"
  40 #include "rte_pmd_mlx5.h"
  41
  42 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  43
  44 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  45 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  46 #endif
  47
  48 #ifndef HAVE_MLX5DV_DR_ESWITCH
  49 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  50 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  51 #endif
  52 #endif
  53
  54 #ifndef HAVE_MLX5DV_DR
  55 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  56 #endif
  57
  58 /* VLAN header definitions */
  59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  64
  65 union flow_dv_attr {
  66         struct {
  67                 uint32_t valid:1;
  68                 uint32_t ipv4:1;
  69                 uint32_t ipv6:1;
  70                 uint32_t tcp:1;
  71                 uint32_t udp:1;
  72                 uint32_t reserved:27;
  73         };
  74         uint32_t attr;
  75 };
  76
  77 static int
  78 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  79                              struct mlx5_flow_tbl_resource *tbl);
  80
  81 static int
  82 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  83                                      uint32_t encap_decap_idx);
  84
  85 static int
  86 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  87                                         uint32_t port_id);
  88 static void
  89 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  90
  91 static int
  92 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  93                                   uint32_t rix_jump);
  94
  95 /**
  96  * Initialize flow attributes structure according to flow items' types.
  97  *
  98  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  99  * mode. For tunnel mode, the items to be modified are the outermost ones.
 100  *
 101  * @param[in] item
 102  *   Pointer to item specification.
 103  * @param[out] attr
 104  *   Pointer to flow attributes structure.
 105  * @param[in] dev_flow
 106  *   Pointer to the sub flow.
 107  * @param[in] tunnel_decap
 108  *   Whether action is after tunnel decapsulation.
 109  */
 110 static void
 111 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 112                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 113 {
 114         uint64_t layers = dev_flow->handle->layers;
 115
 116         /*
 117          * If layers is already initialized, it means this dev_flow is the
 118          * suffix flow, the layers flags is set by the prefix flow. Need to
 119          * use the layer flags from prefix flow as the suffix flow may not
 120          * have the user defined items as the flow is split.
 121          */
 122         if (layers) {
 123                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 124                         attr->ipv4 = 1;
 125                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 126                         attr->ipv6 = 1;
 127                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 128                         attr->tcp = 1;
 129                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 130                         attr->udp = 1;
 131                 attr->valid = 1;
 132                 return;
 133         }
 134         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 135                 uint8_t next_protocol = 0xff;
 136                 switch (item->type) {
 137                 case RTE_FLOW_ITEM_TYPE_GRE:
 138                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 139                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 140                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 141                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 142                 case RTE_FLOW_ITEM_TYPE_MPLS:
 143                         if (tunnel_decap)
 144                                 attr->attr = 0;
 145                         break;
 146                 case RTE_FLOW_ITEM_TYPE_IPV4:
 147                         if (!attr->ipv6)
 148                                 attr->ipv4 = 1;
 149                         if (item->mask != NULL &&
 150                             ((const struct rte_flow_item_ipv4 *)
 151                             item->mask)->hdr.next_proto_id)
 152                                 next_protocol =
 153                                     ((const struct rte_flow_item_ipv4 *)
 154                                       (item->spec))->hdr.next_proto_id &
 155                                     ((const struct rte_flow_item_ipv4 *)
 156                                       (item->mask))->hdr.next_proto_id;
 157                         if ((next_protocol == IPPROTO_IPIP ||
 158                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 159                                 attr->attr = 0;
 160                         break;
 161                 case RTE_FLOW_ITEM_TYPE_IPV6:
 162                         if (!attr->ipv4)
 163                                 attr->ipv6 = 1;
 164                         if (item->mask != NULL &&
 165                             ((const struct rte_flow_item_ipv6 *)
 166                             item->mask)->hdr.proto)
 167                                 next_protocol =
 168                                     ((const struct rte_flow_item_ipv6 *)
 169                                       (item->spec))->hdr.proto &
 170                                     ((const struct rte_flow_item_ipv6 *)
 171                                       (item->mask))->hdr.proto;
 172                         if ((next_protocol == IPPROTO_IPIP ||
 173                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 174                                 attr->attr = 0;
 175                         break;
 176                 case RTE_FLOW_ITEM_TYPE_UDP:
 177                         if (!attr->tcp)
 178                                 attr->udp = 1;
 179                         break;
 180                 case RTE_FLOW_ITEM_TYPE_TCP:
 181                         if (!attr->udp)
 182                                 attr->tcp = 1;
 183                         break;
 184                 default:
 185                         break;
 186                 }
 187         }
 188         attr->valid = 1;
 189 }
 190
 191 /*
 192  * Convert rte_mtr_color to mlx5 color.
 193  *
 194  * @param[in] rcol
 195  *   rte_mtr_color.
 196  *
 197  * @return
 198  *   mlx5 color.
 199  */
 200 static inline int
 201 rte_col_2_mlx5_col(enum rte_color rcol)
 202 {
 203         switch (rcol) {
 204         case RTE_COLOR_GREEN:
 205                 return MLX5_FLOW_COLOR_GREEN;
 206         case RTE_COLOR_YELLOW:
 207                 return MLX5_FLOW_COLOR_YELLOW;
 208         case RTE_COLOR_RED:
 209                 return MLX5_FLOW_COLOR_RED;
 210         default:
 211                 break;
 212         }
 213         return MLX5_FLOW_COLOR_UNDEFINED;
 214 }
 215
 216 struct field_modify_info {
 217         uint32_t size; /* Size of field in protocol header, in bytes. */
 218         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 219         enum mlx5_modification_field id;
 220 };
 221
 222 struct field_modify_info modify_eth[] = {
 223         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 224         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 225         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 226         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 227         {0, 0, 0},
 228 };
 229
 230 struct field_modify_info modify_vlan_out_first_vid[] = {
 231         /* Size in bits !!! */
 232         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 233         {0, 0, 0},
 234 };
 235
 236 struct field_modify_info modify_ipv4[] = {
 237         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 238         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 239         {4, 12, MLX5_MODI_OUT_SIPV4},
 240         {4, 16, MLX5_MODI_OUT_DIPV4},
 241         {0, 0, 0},
 242 };
 243
 244 struct field_modify_info modify_ipv6[] = {
 245         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 246         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 247         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 248         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 249         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 250         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 251         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 252         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 253         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 254         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 255         {0, 0, 0},
 256 };
 257
 258 struct field_modify_info modify_udp[] = {
 259         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 260         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 261         {0, 0, 0},
 262 };
 263
 264 struct field_modify_info modify_tcp[] = {
 265         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 266         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 267         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 268         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 269         {0, 0, 0},
 270 };
 271
 272 static const struct rte_flow_item *
 273 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
 274 {
 275         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 276                 switch (item->type) {
 277                 default:
 278                         break;
 279                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 280                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 281                 case RTE_FLOW_ITEM_TYPE_GRE:
 282                 case RTE_FLOW_ITEM_TYPE_MPLS:
 283                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 284                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 285                         return item;
 286                 case RTE_FLOW_ITEM_TYPE_IPV4:
 287                 case RTE_FLOW_ITEM_TYPE_IPV6:
 288                         if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 289                             item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
 290                                 return item;
 291                         break;
 292                 }
 293         }
 294         return NULL;
 295 }
 296
 297 static void
 298 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 299                           uint8_t next_protocol, uint64_t *item_flags,
 300                           int *tunnel)
 301 {
 302         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 303                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 304         if (next_protocol == IPPROTO_IPIP) {
 305                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 306                 *tunnel = 1;
 307         }
 308         if (next_protocol == IPPROTO_IPV6) {
 309                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 310                 *tunnel = 1;
 311         }
 312 }
 313
 314 static inline struct mlx5_hlist *
 315 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 316                      const char *name, uint32_t size, bool direct_key,
 317                      bool lcores_share, void *ctx,
 318                      mlx5_list_create_cb cb_create,
 319                      mlx5_list_match_cb cb_match,
 320                      mlx5_list_remove_cb cb_remove,
 321                      mlx5_list_clone_cb cb_clone,
 322                      mlx5_list_clone_free_cb cb_clone_free)
 323 {
 324         struct mlx5_hlist *hl;
 325         struct mlx5_hlist *expected = NULL;
 326         char s[MLX5_NAME_SIZE];
 327
 328         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 329         if (likely(hl))
 330                 return hl;
 331         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 332         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 333                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 334                         cb_clone_free);
 335         if (!hl) {
 336                 DRV_LOG(ERR, "%s hash creation failed", name);
 337                 rte_errno = ENOMEM;
 338                 return NULL;
 339         }
 340         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 341                                          __ATOMIC_SEQ_CST,
 342                                          __ATOMIC_SEQ_CST)) {
 343                 mlx5_hlist_destroy(hl);
 344                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 345         }
 346         return hl;
 347 }
 348
 349 /* Update VLAN's VID/PCP based on input rte_flow_action.
 350  *
 351  * @param[in] action
 352  *   Pointer to struct rte_flow_action.
 353  * @param[out] vlan
 354  *   Pointer to struct rte_vlan_hdr.
 355  */
 356 static void
 357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 358                          struct rte_vlan_hdr *vlan)
 359 {
 360         uint16_t vlan_tci;
 361         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 362                 vlan_tci =
 363                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 364                                                action->conf)->vlan_pcp;
 365                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 366                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 367                 vlan->vlan_tci |= vlan_tci;
 368         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 369                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 370                 vlan->vlan_tci |= rte_be_to_cpu_16
 371                     (((const struct rte_flow_action_of_set_vlan_vid *)
 372                                              action->conf)->vlan_vid);
 373         }
 374 }
 375
 376 /**
 377  * Fetch 1, 2, 3 or 4 byte field from the byte array
 378  * and return as unsigned integer in host-endian format.
 379  *
 380  * @param[in] data
 381  *   Pointer to data array.
 382  * @param[in] size
 383  *   Size of field to extract.
 384  *
 385  * @return
 386  *   converted field in host endian format.
 387  */
 388 static inline uint32_t
 389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 390 {
 391         uint32_t ret;
 392
 393         switch (size) {
 394         case 1:
 395                 ret = *data;
 396                 break;
 397         case 2:
 398                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 399                 break;
 400         case 3:
 401                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 402                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 403                 break;
 404         case 4:
 405                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 406                 break;
 407         default:
 408                 MLX5_ASSERT(false);
 409                 ret = 0;
 410                 break;
 411         }
 412         return ret;
 413 }
 414
 415 /**
 416  * Convert modify-header action to DV specification.
 417  *
 418  * Data length of each action is determined by provided field description
 419  * and the item mask. Data bit offset and width of each action is determined
 420  * by provided item mask.
 421  *
 422  * @param[in] item
 423  *   Pointer to item specification.
 424  * @param[in] field
 425  *   Pointer to field modification information.
 426  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 427  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 428  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 429  * @param[in] dcopy
 430  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 431  *   Negative offset value sets the same offset as source offset.
 432  *   size field is ignored, value is taken from source field.
 433  * @param[in,out] resource
 434  *   Pointer to the modify-header resource.
 435  * @param[in] type
 436  *   Type of modification.
 437  * @param[out] error
 438  *   Pointer to the error structure.
 439  *
 440  * @return
 441  *   0 on success, a negative errno value otherwise and rte_errno is set.
 442  */
 443 static int
 444 flow_dv_convert_modify_action(struct rte_flow_item *item,
 445                               struct field_modify_info *field,
 446                               struct field_modify_info *dcopy,
 447                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 448                               uint32_t type, struct rte_flow_error *error)
 449 {
 450         uint32_t i = resource->actions_num;
 451         struct mlx5_modification_cmd *actions = resource->actions;
 452         uint32_t carry_b = 0;
 453
 454         /*
 455          * The item and mask are provided in big-endian format.
 456          * The fields should be presented as in big-endian format either.
 457          * Mask must be always present, it defines the actual field width.
 458          */
 459         MLX5_ASSERT(item->mask);
 460         MLX5_ASSERT(field->size);
 461         do {
 462                 uint32_t size_b;
 463                 uint32_t off_b;
 464                 uint32_t mask;
 465                 uint32_t data;
 466                 bool next_field = true;
 467                 bool next_dcopy = true;
 468
 469                 if (i >= MLX5_MAX_MODIFY_NUM)
 470                         return rte_flow_error_set(error, EINVAL,
 471                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                  "too many items to modify");
 473                 /* Fetch variable byte size mask from the array. */
 474                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 475                                            field->offset, field->size);
 476                 if (!mask) {
 477                         ++field;
 478                         continue;
 479                 }
 480                 /* Deduce actual data width in bits from mask value. */
 481                 off_b = rte_bsf32(mask) + carry_b;
 482                 size_b = sizeof(uint32_t) * CHAR_BIT -
 483                          off_b - __builtin_clz(mask);
 484                 MLX5_ASSERT(size_b);
 485                 actions[i] = (struct mlx5_modification_cmd) {
 486                         .action_type = type,
 487                         .field = field->id,
 488                         .offset = off_b,
 489                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 490                                 0 : size_b,
 491                 };
 492                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 493                         MLX5_ASSERT(dcopy);
 494                         actions[i].dst_field = dcopy->id;
 495                         actions[i].dst_offset =
 496                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 497                         /* Convert entire record to big-endian format. */
 498                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 499                         /*
 500                          * Destination field overflow. Copy leftovers of
 501                          * a source field to the next destination field.
 502                          */
 503                         carry_b = 0;
 504                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 505                             dcopy->size != 0) {
 506                                 actions[i].length =
 507                                         dcopy->size * CHAR_BIT - dcopy->offset;
 508                                 carry_b = actions[i].length;
 509                                 next_field = false;
 510                         }
 511                         /*
 512                          * Not enough bits in a source filed to fill a
 513                          * destination field. Switch to the next source.
 514                          */
 515                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 516                             (size_b == field->size * CHAR_BIT - off_b)) {
 517                                 actions[i].length =
 518                                         field->size * CHAR_BIT - off_b;
 519                                 dcopy->offset += actions[i].length;
 520                                 next_dcopy = false;
 521                         }
 522                         if (next_dcopy)
 523                                 ++dcopy;
 524                 } else {
 525                         MLX5_ASSERT(item->spec);
 526                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 527                                                    field->offset, field->size);
 528                         /* Shift out the trailing masked bits from data. */
 529                         data = (data & mask) >> off_b;
 530                         actions[i].data1 = rte_cpu_to_be_32(data);
 531                 }
 532                 /* Convert entire record to expected big-endian format. */
 533                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 534                 if (next_field)
 535                         ++field;
 536                 ++i;
 537         } while (field->size);
 538         if (resource->actions_num == i)
 539                 return rte_flow_error_set(error, EINVAL,
 540                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 541                                           "invalid modification flow item");
 542         resource->actions_num = i;
 543         return 0;
 544 }
 545
 546 /**
 547  * Convert modify-header set IPv4 address action to DV specification.
 548  *
 549  * @param[in,out] resource
 550  *   Pointer to the modify-header resource.
 551  * @param[in] action
 552  *   Pointer to action specification.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_ipv4
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_action *action,
 563                          struct rte_flow_error *error)
 564 {
 565         const struct rte_flow_action_set_ipv4 *conf =
 566                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 567         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 568         struct rte_flow_item_ipv4 ipv4;
 569         struct rte_flow_item_ipv4 ipv4_mask;
 570
 571         memset(&ipv4, 0, sizeof(ipv4));
 572         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 573         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 574                 ipv4.hdr.src_addr = conf->ipv4_addr;
 575                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 576         } else {
 577                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 578                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 579         }
 580         item.spec = &ipv4;
 581         item.mask = &ipv4_mask;
 582         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 583                                              MLX5_MODIFICATION_TYPE_SET, error);
 584 }
 585
 586 /**
 587  * Convert modify-header set IPv6 address action to DV specification.
 588  *
 589  * @param[in,out] resource
 590  *   Pointer to the modify-header resource.
 591  * @param[in] action
 592  *   Pointer to action specification.
 593  * @param[out] error
 594  *   Pointer to the error structure.
 595  *
 596  * @return
 597  *   0 on success, a negative errno value otherwise and rte_errno is set.
 598  */
 599 static int
 600 flow_dv_convert_action_modify_ipv6
 601                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 602                          const struct rte_flow_action *action,
 603                          struct rte_flow_error *error)
 604 {
 605         const struct rte_flow_action_set_ipv6 *conf =
 606                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 607         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 608         struct rte_flow_item_ipv6 ipv6;
 609         struct rte_flow_item_ipv6 ipv6_mask;
 610
 611         memset(&ipv6, 0, sizeof(ipv6));
 612         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 613         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 614                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 615                        sizeof(ipv6.hdr.src_addr));
 616                 memcpy(&ipv6_mask.hdr.src_addr,
 617                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 618                        sizeof(ipv6.hdr.src_addr));
 619         } else {
 620                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 621                        sizeof(ipv6.hdr.dst_addr));
 622                 memcpy(&ipv6_mask.hdr.dst_addr,
 623                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 624                        sizeof(ipv6.hdr.dst_addr));
 625         }
 626         item.spec = &ipv6;
 627         item.mask = &ipv6_mask;
 628         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 629                                              MLX5_MODIFICATION_TYPE_SET, error);
 630 }
 631
 632 /**
 633  * Convert modify-header set MAC address action to DV specification.
 634  *
 635  * @param[in,out] resource
 636  *   Pointer to the modify-header resource.
 637  * @param[in] action
 638  *   Pointer to action specification.
 639  * @param[out] error
 640  *   Pointer to the error structure.
 641  *
 642  * @return
 643  *   0 on success, a negative errno value otherwise and rte_errno is set.
 644  */
 645 static int
 646 flow_dv_convert_action_modify_mac
 647                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 648                          const struct rte_flow_action *action,
 649                          struct rte_flow_error *error)
 650 {
 651         const struct rte_flow_action_set_mac *conf =
 652                 (const struct rte_flow_action_set_mac *)(action->conf);
 653         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 654         struct rte_flow_item_eth eth;
 655         struct rte_flow_item_eth eth_mask;
 656
 657         memset(&eth, 0, sizeof(eth));
 658         memset(&eth_mask, 0, sizeof(eth_mask));
 659         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 660                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 661                        sizeof(eth.src.addr_bytes));
 662                 memcpy(&eth_mask.src.addr_bytes,
 663                        &rte_flow_item_eth_mask.src.addr_bytes,
 664                        sizeof(eth_mask.src.addr_bytes));
 665         } else {
 666                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 667                        sizeof(eth.dst.addr_bytes));
 668                 memcpy(&eth_mask.dst.addr_bytes,
 669                        &rte_flow_item_eth_mask.dst.addr_bytes,
 670                        sizeof(eth_mask.dst.addr_bytes));
 671         }
 672         item.spec = &eth;
 673         item.mask = &eth_mask;
 674         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 675                                              MLX5_MODIFICATION_TYPE_SET, error);
 676 }
 677
 678 /**
 679  * Convert modify-header set VLAN VID action to DV specification.
 680  *
 681  * @param[in,out] resource
 682  *   Pointer to the modify-header resource.
 683  * @param[in] action
 684  *   Pointer to action specification.
 685  * @param[out] error
 686  *   Pointer to the error structure.
 687  *
 688  * @return
 689  *   0 on success, a negative errno value otherwise and rte_errno is set.
 690  */
 691 static int
 692 flow_dv_convert_action_modify_vlan_vid
 693                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 694                          const struct rte_flow_action *action,
 695                          struct rte_flow_error *error)
 696 {
 697         const struct rte_flow_action_of_set_vlan_vid *conf =
 698                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 699         int i = resource->actions_num;
 700         struct mlx5_modification_cmd *actions = resource->actions;
 701         struct field_modify_info *field = modify_vlan_out_first_vid;
 702
 703         if (i >= MLX5_MAX_MODIFY_NUM)
 704                 return rte_flow_error_set(error, EINVAL,
 705                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 706                          "too many items to modify");
 707         actions[i] = (struct mlx5_modification_cmd) {
 708                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 709                 .field = field->id,
 710                 .length = field->size,
 711                 .offset = field->offset,
 712         };
 713         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 714         actions[i].data1 = conf->vlan_vid;
 715         actions[i].data1 = actions[i].data1 << 16;
 716         resource->actions_num = ++i;
 717         return 0;
 718 }
 719
 720 /**
 721  * Convert modify-header set TP action to DV specification.
 722  *
 723  * @param[in,out] resource
 724  *   Pointer to the modify-header resource.
 725  * @param[in] action
 726  *   Pointer to action specification.
 727  * @param[in] items
 728  *   Pointer to rte_flow_item objects list.
 729  * @param[in] attr
 730  *   Pointer to flow attributes structure.
 731  * @param[in] dev_flow
 732  *   Pointer to the sub flow.
 733  * @param[in] tunnel_decap
 734  *   Whether action is after tunnel decapsulation.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_tp
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_action *action,
 745                          const struct rte_flow_item *items,
 746                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 747                          bool tunnel_decap, struct rte_flow_error *error)
 748 {
 749         const struct rte_flow_action_set_tp *conf =
 750                 (const struct rte_flow_action_set_tp *)(action->conf);
 751         struct rte_flow_item item;
 752         struct rte_flow_item_udp udp;
 753         struct rte_flow_item_udp udp_mask;
 754         struct rte_flow_item_tcp tcp;
 755         struct rte_flow_item_tcp tcp_mask;
 756         struct field_modify_info *field;
 757
 758         if (!attr->valid)
 759                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 760         if (attr->udp) {
 761                 memset(&udp, 0, sizeof(udp));
 762                 memset(&udp_mask, 0, sizeof(udp_mask));
 763                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 764                         udp.hdr.src_port = conf->port;
 765                         udp_mask.hdr.src_port =
 766                                         rte_flow_item_udp_mask.hdr.src_port;
 767                 } else {
 768                         udp.hdr.dst_port = conf->port;
 769                         udp_mask.hdr.dst_port =
 770                                         rte_flow_item_udp_mask.hdr.dst_port;
 771                 }
 772                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 773                 item.spec = &udp;
 774                 item.mask = &udp_mask;
 775                 field = modify_udp;
 776         } else {
 777                 MLX5_ASSERT(attr->tcp);
 778                 memset(&tcp, 0, sizeof(tcp));
 779                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 780                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 781                         tcp.hdr.src_port = conf->port;
 782                         tcp_mask.hdr.src_port =
 783                                         rte_flow_item_tcp_mask.hdr.src_port;
 784                 } else {
 785                         tcp.hdr.dst_port = conf->port;
 786                         tcp_mask.hdr.dst_port =
 787                                         rte_flow_item_tcp_mask.hdr.dst_port;
 788                 }
 789                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 790                 item.spec = &tcp;
 791                 item.mask = &tcp_mask;
 792                 field = modify_tcp;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header set TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_action *action,
 823                          const struct rte_flow_item *items,
 824                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 825                          bool tunnel_decap, struct rte_flow_error *error)
 826 {
 827         const struct rte_flow_action_set_ttl *conf =
 828                 (const struct rte_flow_action_set_ttl *)(action->conf);
 829         struct rte_flow_item item;
 830         struct rte_flow_item_ipv4 ipv4;
 831         struct rte_flow_item_ipv4 ipv4_mask;
 832         struct rte_flow_item_ipv6 ipv6;
 833         struct rte_flow_item_ipv6 ipv6_mask;
 834         struct field_modify_info *field;
 835
 836         if (!attr->valid)
 837                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 838         if (attr->ipv4) {
 839                 memset(&ipv4, 0, sizeof(ipv4));
 840                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 841                 ipv4.hdr.time_to_live = conf->ttl_value;
 842                 ipv4_mask.hdr.time_to_live = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 844                 item.spec = &ipv4;
 845                 item.mask = &ipv4_mask;
 846                 field = modify_ipv4;
 847         } else {
 848                 MLX5_ASSERT(attr->ipv6);
 849                 memset(&ipv6, 0, sizeof(ipv6));
 850                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 851                 ipv6.hdr.hop_limits = conf->ttl_value;
 852                 ipv6_mask.hdr.hop_limits = 0xFF;
 853                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 854                 item.spec = &ipv6;
 855                 item.mask = &ipv6_mask;
 856                 field = modify_ipv6;
 857         }
 858         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 859                                              MLX5_MODIFICATION_TYPE_SET, error);
 860 }
 861
 862 /**
 863  * Convert modify-header decrement TTL action to DV specification.
 864  *
 865  * @param[in,out] resource
 866  *   Pointer to the modify-header resource.
 867  * @param[in] action
 868  *   Pointer to action specification.
 869  * @param[in] items
 870  *   Pointer to rte_flow_item objects list.
 871  * @param[in] attr
 872  *   Pointer to flow attributes structure.
 873  * @param[in] dev_flow
 874  *   Pointer to the sub flow.
 875  * @param[in] tunnel_decap
 876  *   Whether action is after tunnel decapsulation.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_dec_ttl
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_item *items,
 887                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 888                          bool tunnel_decap, struct rte_flow_error *error)
 889 {
 890         struct rte_flow_item item;
 891         struct rte_flow_item_ipv4 ipv4;
 892         struct rte_flow_item_ipv4 ipv4_mask;
 893         struct rte_flow_item_ipv6 ipv6;
 894         struct rte_flow_item_ipv6 ipv6_mask;
 895         struct field_modify_info *field;
 896
 897         if (!attr->valid)
 898                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 899         if (attr->ipv4) {
 900                 memset(&ipv4, 0, sizeof(ipv4));
 901                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 902                 ipv4.hdr.time_to_live = 0xFF;
 903                 ipv4_mask.hdr.time_to_live = 0xFF;
 904                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 905                 item.spec = &ipv4;
 906                 item.mask = &ipv4_mask;
 907                 field = modify_ipv4;
 908         } else {
 909                 MLX5_ASSERT(attr->ipv6);
 910                 memset(&ipv6, 0, sizeof(ipv6));
 911                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 912                 ipv6.hdr.hop_limits = 0xFF;
 913                 ipv6_mask.hdr.hop_limits = 0xFF;
 914                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 915                 item.spec = &ipv6;
 916                 item.mask = &ipv6_mask;
 917                 field = modify_ipv6;
 918         }
 919         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 920                                              MLX5_MODIFICATION_TYPE_ADD, error);
 921 }
 922
 923 /**
 924  * Convert modify-header increment/decrement TCP Sequence number
 925  * to DV specification.
 926  *
 927  * @param[in,out] resource
 928  *   Pointer to the modify-header resource.
 929  * @param[in] action
 930  *   Pointer to action specification.
 931  * @param[out] error
 932  *   Pointer to the error structure.
 933  *
 934  * @return
 935  *   0 on success, a negative errno value otherwise and rte_errno is set.
 936  */
 937 static int
 938 flow_dv_convert_action_modify_tcp_seq
 939                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 940                          const struct rte_flow_action *action,
 941                          struct rte_flow_error *error)
 942 {
 943         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 944         uint64_t value = rte_be_to_cpu_32(*conf);
 945         struct rte_flow_item item;
 946         struct rte_flow_item_tcp tcp;
 947         struct rte_flow_item_tcp tcp_mask;
 948
 949         memset(&tcp, 0, sizeof(tcp));
 950         memset(&tcp_mask, 0, sizeof(tcp_mask));
 951         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 952                 /*
 953                  * The HW has no decrement operation, only increment operation.
 954                  * To simulate decrement X from Y using increment operation
 955                  * we need to add UINT32_MAX X times to Y.
 956                  * Each adding of UINT32_MAX decrements Y by 1.
 957                  */
 958                 value *= UINT32_MAX;
 959         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 960         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 961         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 962         item.spec = &tcp;
 963         item.mask = &tcp_mask;
 964         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 965                                              MLX5_MODIFICATION_TYPE_ADD, error);
 966 }
 967
 968 /**
 969  * Convert modify-header increment/decrement TCP Acknowledgment number
 970  * to DV specification.
 971  *
 972  * @param[in,out] resource
 973  *   Pointer to the modify-header resource.
 974  * @param[in] action
 975  *   Pointer to action specification.
 976  * @param[out] error
 977  *   Pointer to the error structure.
 978  *
 979  * @return
 980  *   0 on success, a negative errno value otherwise and rte_errno is set.
 981  */
 982 static int
 983 flow_dv_convert_action_modify_tcp_ack
 984                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 985                          const struct rte_flow_action *action,
 986                          struct rte_flow_error *error)
 987 {
 988         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 989         uint64_t value = rte_be_to_cpu_32(*conf);
 990         struct rte_flow_item item;
 991         struct rte_flow_item_tcp tcp;
 992         struct rte_flow_item_tcp tcp_mask;
 993
 994         memset(&tcp, 0, sizeof(tcp));
 995         memset(&tcp_mask, 0, sizeof(tcp_mask));
 996         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 997                 /*
 998                  * The HW has no decrement operation, only increment operation.
 999                  * To simulate decrement X from Y using increment operation
1000                  * we need to add UINT32_MAX X times to Y.
1001                  * Each adding of UINT32_MAX decrements Y by 1.
1002                  */
1003                 value *= UINT32_MAX;
1004         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1007         item.spec = &tcp;
1008         item.mask = &tcp_mask;
1009         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010                                              MLX5_MODIFICATION_TYPE_ADD, error);
1011 }
1012
1013 static enum mlx5_modification_field reg_to_field[] = {
1014         [REG_NON] = MLX5_MODI_OUT_NONE,
1015         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1025 };
1026
1027 /**
1028  * Convert register set to DV specification.
1029  *
1030  * @param[in,out] resource
1031  *   Pointer to the modify-header resource.
1032  * @param[in] action
1033  *   Pointer to action specification.
1034  * @param[out] error
1035  *   Pointer to the error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 static int
1041 flow_dv_convert_action_set_reg
1042                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043                          const struct rte_flow_action *action,
1044                          struct rte_flow_error *error)
1045 {
1046         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047         struct mlx5_modification_cmd *actions = resource->actions;
1048         uint32_t i = resource->actions_num;
1049
1050         if (i >= MLX5_MAX_MODIFY_NUM)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053                                           "too many items to modify");
1054         MLX5_ASSERT(conf->id != REG_NON);
1055         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056         actions[i] = (struct mlx5_modification_cmd) {
1057                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058                 .field = reg_to_field[conf->id],
1059                 .offset = conf->offset,
1060                 .length = conf->length,
1061         };
1062         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1064         ++i;
1065         resource->actions_num = i;
1066         return 0;
1067 }
1068
1069 /**
1070  * Convert SET_TAG action to DV specification.
1071  *
1072  * @param[in] dev
1073  *   Pointer to the rte_eth_dev structure.
1074  * @param[in,out] resource
1075  *   Pointer to the modify-header resource.
1076  * @param[in] conf
1077  *   Pointer to action specification.
1078  * @param[out] error
1079  *   Pointer to the error structure.
1080  *
1081  * @return
1082  *   0 on success, a negative errno value otherwise and rte_errno is set.
1083  */
1084 static int
1085 flow_dv_convert_action_set_tag
1086                         (struct rte_eth_dev *dev,
1087                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1088                          const struct rte_flow_action_set_tag *conf,
1089                          struct rte_flow_error *error)
1090 {
1091         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093         struct rte_flow_item item = {
1094                 .spec = &data,
1095                 .mask = &mask,
1096         };
1097         struct field_modify_info reg_c_x[] = {
1098                 [1] = {0, 0, 0},
1099         };
1100         enum mlx5_modification_field reg_type;
1101         int ret;
1102
1103         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1104         if (ret < 0)
1105                 return ret;
1106         MLX5_ASSERT(ret != REG_NON);
1107         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108         reg_type = reg_to_field[ret];
1109         MLX5_ASSERT(reg_type > 0);
1110         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112                                              MLX5_MODIFICATION_TYPE_SET, error);
1113 }
1114
1115 /**
1116  * Convert internal COPY_REG action to DV specification.
1117  *
1118  * @param[in] dev
1119  *   Pointer to the rte_eth_dev structure.
1120  * @param[in,out] res
1121  *   Pointer to the modify-header resource.
1122  * @param[in] action
1123  *   Pointer to action specification.
1124  * @param[out] error
1125  *   Pointer to the error structure.
1126  *
1127  * @return
1128  *   0 on success, a negative errno value otherwise and rte_errno is set.
1129  */
1130 static int
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1133                                  const struct rte_flow_action *action,
1134                                  struct rte_flow_error *error)
1135 {
1136         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138         struct rte_flow_item item = {
1139                 .spec = NULL,
1140                 .mask = &mask,
1141         };
1142         struct field_modify_info reg_src[] = {
1143                 {4, 0, reg_to_field[conf->src]},
1144                 {0, 0, 0},
1145         };
1146         struct field_modify_info reg_dst = {
1147                 .offset = 0,
1148                 .id = reg_to_field[conf->dst],
1149         };
1150         /* Adjust reg_c[0] usage according to reported mask. */
1151         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152                 struct mlx5_priv *priv = dev->data->dev_private;
1153                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1154
1155                 MLX5_ASSERT(reg_c0);
1156                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1157                 if (conf->dst == REG_C_0) {
1158                         /* Copy to reg_c[0], within mask only. */
1159                         reg_dst.offset = rte_bsf32(reg_c0);
1160                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1161                 } else {
1162                         reg_dst.offset = 0;
1163                         mask = rte_cpu_to_be_32(reg_c0);
1164                 }
1165         }
1166         return flow_dv_convert_modify_action(&item,
1167                                              reg_src, &reg_dst, res,
1168                                              MLX5_MODIFICATION_TYPE_COPY,
1169                                              error);
1170 }
1171
1172 /**
1173  * Convert MARK action to DV specification. This routine is used
1174  * in extensive metadata only and requires metadata register to be
1175  * handled. In legacy mode hardware tag resource is engaged.
1176  *
1177  * @param[in] dev
1178  *   Pointer to the rte_eth_dev structure.
1179  * @param[in] conf
1180  *   Pointer to MARK action specification.
1181  * @param[in,out] resource
1182  *   Pointer to the modify-header resource.
1183  * @param[out] error
1184  *   Pointer to the error structure.
1185  *
1186  * @return
1187  *   0 on success, a negative errno value otherwise and rte_errno is set.
1188  */
1189 static int
1190 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1191                             const struct rte_flow_action_mark *conf,
1192                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1193                             struct rte_flow_error *error)
1194 {
1195         struct mlx5_priv *priv = dev->data->dev_private;
1196         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1197                                            priv->sh->dv_mark_mask);
1198         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1199         struct rte_flow_item item = {
1200                 .spec = &data,
1201                 .mask = &mask,
1202         };
1203         struct field_modify_info reg_c_x[] = {
1204                 [1] = {0, 0, 0},
1205         };
1206         int reg;
1207
1208         if (!mask)
1209                 return rte_flow_error_set(error, EINVAL,
1210                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1211                                           NULL, "zero mark action mask");
1212         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1213         if (reg < 0)
1214                 return reg;
1215         MLX5_ASSERT(reg > 0);
1216         if (reg == REG_C_0) {
1217                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1218                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1219
1220                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1221                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1222                 mask = rte_cpu_to_be_32(mask << shl_c0);
1223         }
1224         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1225         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1226                                              MLX5_MODIFICATION_TYPE_SET, error);
1227 }
1228
1229 /**
1230  * Get metadata register index for specified steering domain.
1231  *
1232  * @param[in] dev
1233  *   Pointer to the rte_eth_dev structure.
1234  * @param[in] attr
1235  *   Attributes of flow to determine steering domain.
1236  * @param[out] error
1237  *   Pointer to the error structure.
1238  *
1239  * @return
1240  *   positive index on success, a negative errno value otherwise
1241  *   and rte_errno is set.
1242  */
1243 static enum modify_reg
1244 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1245                          const struct rte_flow_attr *attr,
1246                          struct rte_flow_error *error)
1247 {
1248         int reg =
1249                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1250                                           MLX5_METADATA_FDB :
1251                                             attr->egress ?
1252                                             MLX5_METADATA_TX :
1253                                             MLX5_METADATA_RX, 0, error);
1254         if (reg < 0)
1255                 return rte_flow_error_set(error,
1256                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1257                                           NULL, "unavailable "
1258                                           "metadata register");
1259         return reg;
1260 }
1261
1262 /**
1263  * Convert SET_META action to DV specification.
1264  *
1265  * @param[in] dev
1266  *   Pointer to the rte_eth_dev structure.
1267  * @param[in,out] resource
1268  *   Pointer to the modify-header resource.
1269  * @param[in] attr
1270  *   Attributes of flow that includes this item.
1271  * @param[in] conf
1272  *   Pointer to action specification.
1273  * @param[out] error
1274  *   Pointer to the error structure.
1275  *
1276  * @return
1277  *   0 on success, a negative errno value otherwise and rte_errno is set.
1278  */
1279 static int
1280 flow_dv_convert_action_set_meta
1281                         (struct rte_eth_dev *dev,
1282                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1283                          const struct rte_flow_attr *attr,
1284                          const struct rte_flow_action_set_meta *conf,
1285                          struct rte_flow_error *error)
1286 {
1287         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1288         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1289         struct rte_flow_item item = {
1290                 .spec = &data,
1291                 .mask = &mask,
1292         };
1293         struct field_modify_info reg_c_x[] = {
1294                 [1] = {0, 0, 0},
1295         };
1296         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1297
1298         if (reg < 0)
1299                 return reg;
1300         MLX5_ASSERT(reg != REG_NON);
1301         if (reg == REG_C_0) {
1302                 struct mlx5_priv *priv = dev->data->dev_private;
1303                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1304                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1305
1306                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1307                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1308                 mask = rte_cpu_to_be_32(mask << shl_c0);
1309         }
1310         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1311         /* The routine expects parameters in memory as big-endian ones. */
1312         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1313                                              MLX5_MODIFICATION_TYPE_SET, error);
1314 }
1315
1316 /**
1317  * Convert modify-header set IPv4 DSCP action to DV specification.
1318  *
1319  * @param[in,out] resource
1320  *   Pointer to the modify-header resource.
1321  * @param[in] action
1322  *   Pointer to action specification.
1323  * @param[out] error
1324  *   Pointer to the error structure.
1325  *
1326  * @return
1327  *   0 on success, a negative errno value otherwise and rte_errno is set.
1328  */
1329 static int
1330 flow_dv_convert_action_modify_ipv4_dscp
1331                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1332                          const struct rte_flow_action *action,
1333                          struct rte_flow_error *error)
1334 {
1335         const struct rte_flow_action_set_dscp *conf =
1336                 (const struct rte_flow_action_set_dscp *)(action->conf);
1337         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1338         struct rte_flow_item_ipv4 ipv4;
1339         struct rte_flow_item_ipv4 ipv4_mask;
1340
1341         memset(&ipv4, 0, sizeof(ipv4));
1342         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1343         ipv4.hdr.type_of_service = conf->dscp;
1344         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1345         item.spec = &ipv4;
1346         item.mask = &ipv4_mask;
1347         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1348                                              MLX5_MODIFICATION_TYPE_SET, error);
1349 }
1350
1351 /**
1352  * Convert modify-header set IPv6 DSCP action to DV specification.
1353  *
1354  * @param[in,out] resource
1355  *   Pointer to the modify-header resource.
1356  * @param[in] action
1357  *   Pointer to action specification.
1358  * @param[out] error
1359  *   Pointer to the error structure.
1360  *
1361  * @return
1362  *   0 on success, a negative errno value otherwise and rte_errno is set.
1363  */
1364 static int
1365 flow_dv_convert_action_modify_ipv6_dscp
1366                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1367                          const struct rte_flow_action *action,
1368                          struct rte_flow_error *error)
1369 {
1370         const struct rte_flow_action_set_dscp *conf =
1371                 (const struct rte_flow_action_set_dscp *)(action->conf);
1372         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1373         struct rte_flow_item_ipv6 ipv6;
1374         struct rte_flow_item_ipv6 ipv6_mask;
1375
1376         memset(&ipv6, 0, sizeof(ipv6));
1377         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1378         /*
1379          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1380          * rdma-core only accept the DSCP bits byte aligned start from
1381          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1382          * bits in IPv6 case as rdma-core requires byte aligned value.
1383          */
1384         ipv6.hdr.vtc_flow = conf->dscp;
1385         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1386         item.spec = &ipv6;
1387         item.mask = &ipv6_mask;
1388         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1389                                              MLX5_MODIFICATION_TYPE_SET, error);
1390 }
1391
1392 static int
1393 mlx5_flow_item_field_width(struct mlx5_priv *priv,
1394                            enum rte_flow_field_id field)
1395 {
1396         switch (field) {
1397         case RTE_FLOW_FIELD_START:
1398                 return 32;
1399         case RTE_FLOW_FIELD_MAC_DST:
1400         case RTE_FLOW_FIELD_MAC_SRC:
1401                 return 48;
1402         case RTE_FLOW_FIELD_VLAN_TYPE:
1403                 return 16;
1404         case RTE_FLOW_FIELD_VLAN_ID:
1405                 return 12;
1406         case RTE_FLOW_FIELD_MAC_TYPE:
1407                 return 16;
1408         case RTE_FLOW_FIELD_IPV4_DSCP:
1409                 return 6;
1410         case RTE_FLOW_FIELD_IPV4_TTL:
1411                 return 8;
1412         case RTE_FLOW_FIELD_IPV4_SRC:
1413         case RTE_FLOW_FIELD_IPV4_DST:
1414                 return 32;
1415         case RTE_FLOW_FIELD_IPV6_DSCP:
1416                 return 6;
1417         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1418                 return 8;
1419         case RTE_FLOW_FIELD_IPV6_SRC:
1420         case RTE_FLOW_FIELD_IPV6_DST:
1421                 return 128;
1422         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1423         case RTE_FLOW_FIELD_TCP_PORT_DST:
1424                 return 16;
1425         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1426         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1427                 return 32;
1428         case RTE_FLOW_FIELD_TCP_FLAGS:
1429                 return 9;
1430         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1431         case RTE_FLOW_FIELD_UDP_PORT_DST:
1432                 return 16;
1433         case RTE_FLOW_FIELD_VXLAN_VNI:
1434         case RTE_FLOW_FIELD_GENEVE_VNI:
1435                 return 24;
1436         case RTE_FLOW_FIELD_GTP_TEID:
1437         case RTE_FLOW_FIELD_TAG:
1438                 return 32;
1439         case RTE_FLOW_FIELD_MARK:
1440                 return __builtin_popcount(priv->sh->dv_mark_mask);
1441         case RTE_FLOW_FIELD_META:
1442                 return __builtin_popcount(priv->sh->dv_meta_mask);
1443         case RTE_FLOW_FIELD_POINTER:
1444         case RTE_FLOW_FIELD_VALUE:
1445                 return 64;
1446         default:
1447                 MLX5_ASSERT(false);
1448         }
1449         return 0;
1450 }
1451
1452 static void
1453 mlx5_flow_field_id_to_modify_info
1454                 (const struct rte_flow_action_modify_data *data,
1455                  struct field_modify_info *info,
1456                  uint32_t *mask, uint32_t *value,
1457                  uint32_t width, uint32_t dst_width,
1458                  uint32_t *shift, struct rte_eth_dev *dev,
1459                  const struct rte_flow_attr *attr,
1460                  struct rte_flow_error *error)
1461 {
1462         struct mlx5_priv *priv = dev->data->dev_private;
1463         uint32_t idx = 0;
1464         uint32_t off = 0;
1465         uint64_t val = 0;
1466         switch (data->field) {
1467         case RTE_FLOW_FIELD_START:
1468                 /* not supported yet */
1469                 MLX5_ASSERT(false);
1470                 break;
1471         case RTE_FLOW_FIELD_MAC_DST:
1472                 off = data->offset > 16 ? data->offset - 16 : 0;
1473                 if (mask) {
1474                         if (data->offset < 16) {
1475                                 info[idx] = (struct field_modify_info){2, 0,
1476                                                 MLX5_MODI_OUT_DMAC_15_0};
1477                                 if (width < 16) {
1478                                         mask[idx] = rte_cpu_to_be_16(0xffff >>
1479                                                                  (16 - width));
1480                                         width = 0;
1481                                 } else {
1482                                         mask[idx] = RTE_BE16(0xffff);
1483                                         width -= 16;
1484                                 }
1485                                 if (!width)
1486                                         break;
1487                                 ++idx;
1488                         }
1489                         info[idx] = (struct field_modify_info){4, 4 * idx,
1490                                                 MLX5_MODI_OUT_DMAC_47_16};
1491                         mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1492                                                       (32 - width)) << off);
1493                 } else {
1494                         if (data->offset < 16)
1495                                 info[idx++] = (struct field_modify_info){2, 0,
1496                                                 MLX5_MODI_OUT_DMAC_15_0};
1497                         info[idx] = (struct field_modify_info){4, off,
1498                                                 MLX5_MODI_OUT_DMAC_47_16};
1499                 }
1500                 break;
1501         case RTE_FLOW_FIELD_MAC_SRC:
1502                 off = data->offset > 16 ? data->offset - 16 : 0;
1503                 if (mask) {
1504                         if (data->offset < 16) {
1505                                 info[idx] = (struct field_modify_info){2, 0,
1506                                                 MLX5_MODI_OUT_SMAC_15_0};
1507                                 if (width < 16) {
1508                                         mask[idx] = rte_cpu_to_be_16(0xffff >>
1509                                                                  (16 - width));
1510                                         width = 0;
1511                                 } else {
1512                                         mask[idx] = RTE_BE16(0xffff);
1513                                         width -= 16;
1514                                 }
1515                                 if (!width)
1516                                         break;
1517                                 ++idx;
1518                         }
1519                         info[idx] = (struct field_modify_info){4, 4 * idx,
1520                                                 MLX5_MODI_OUT_SMAC_47_16};
1521                         mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1522                                                       (32 - width)) << off);
1523                 } else {
1524                         if (data->offset < 16)
1525                                 info[idx++] = (struct field_modify_info){2, 0,
1526                                                 MLX5_MODI_OUT_SMAC_15_0};
1527                         info[idx] = (struct field_modify_info){4, off,
1528                                                 MLX5_MODI_OUT_SMAC_47_16};
1529                 }
1530                 break;
1531         case RTE_FLOW_FIELD_VLAN_TYPE:
1532                 /* not supported yet */
1533                 break;
1534         case RTE_FLOW_FIELD_VLAN_ID:
1535                 info[idx] = (struct field_modify_info){2, 0,
1536                                         MLX5_MODI_OUT_FIRST_VID};
1537                 if (mask)
1538                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1539                 break;
1540         case RTE_FLOW_FIELD_MAC_TYPE:
1541                 info[idx] = (struct field_modify_info){2, 0,
1542                                         MLX5_MODI_OUT_ETHERTYPE};
1543                 if (mask)
1544                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1545                 break;
1546         case RTE_FLOW_FIELD_IPV4_DSCP:
1547                 info[idx] = (struct field_modify_info){1, 0,
1548                                         MLX5_MODI_OUT_IP_DSCP};
1549                 if (mask)
1550                         mask[idx] = 0x3f >> (6 - width);
1551                 break;
1552         case RTE_FLOW_FIELD_IPV4_TTL:
1553                 info[idx] = (struct field_modify_info){1, 0,
1554                                         MLX5_MODI_OUT_IPV4_TTL};
1555                 if (mask)
1556                         mask[idx] = 0xff >> (8 - width);
1557                 break;
1558         case RTE_FLOW_FIELD_IPV4_SRC:
1559                 info[idx] = (struct field_modify_info){4, 0,
1560                                         MLX5_MODI_OUT_SIPV4};
1561                 if (mask)
1562                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1563                                                      (32 - width));
1564                 break;
1565         case RTE_FLOW_FIELD_IPV4_DST:
1566                 info[idx] = (struct field_modify_info){4, 0,
1567                                         MLX5_MODI_OUT_DIPV4};
1568                 if (mask)
1569                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1570                                                      (32 - width));
1571                 break;
1572         case RTE_FLOW_FIELD_IPV6_DSCP:
1573                 info[idx] = (struct field_modify_info){1, 0,
1574                                         MLX5_MODI_OUT_IP_DSCP};
1575                 if (mask)
1576                         mask[idx] = 0x3f >> (6 - width);
1577                 break;
1578         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1579                 info[idx] = (struct field_modify_info){1, 0,
1580                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1581                 if (mask)
1582                         mask[idx] = 0xff >> (8 - width);
1583                 break;
1584         case RTE_FLOW_FIELD_IPV6_SRC:
1585                 if (mask) {
1586                         if (data->offset < 32) {
1587                                 info[idx] = (struct field_modify_info){4,
1588                                                 4 * idx,
1589                                                 MLX5_MODI_OUT_SIPV6_31_0};
1590                                 if (width < 32) {
1591                                         mask[idx] =
1592                                                 rte_cpu_to_be_32(0xffffffff >>
1593                                                                  (32 - width));
1594                                         width = 0;
1595                                 } else {
1596                                         mask[idx] = RTE_BE32(0xffffffff);
1597                                         width -= 32;
1598                                 }
1599                                 if (!width)
1600                                         break;
1601                                 ++idx;
1602                         }
1603                         if (data->offset < 64) {
1604                                 info[idx] = (struct field_modify_info){4,
1605                                                 4 * idx,
1606                                                 MLX5_MODI_OUT_SIPV6_63_32};
1607                                 if (width < 32) {
1608                                         mask[idx] =
1609                                                 rte_cpu_to_be_32(0xffffffff >>
1610                                                                  (32 - width));
1611                                         width = 0;
1612                                 } else {
1613                                         mask[idx] = RTE_BE32(0xffffffff);
1614                                         width -= 32;
1615                                 }
1616                                 if (!width)
1617                                         break;
1618                                 ++idx;
1619                         }
1620                         if (data->offset < 96) {
1621                                 info[idx] = (struct field_modify_info){4,
1622                                                 4 * idx,
1623                                                 MLX5_MODI_OUT_SIPV6_95_64};
1624                                 if (width < 32) {
1625                                         mask[idx] =
1626                                                 rte_cpu_to_be_32(0xffffffff >>
1627                                                                  (32 - width));
1628                                         width = 0;
1629                                 } else {
1630                                         mask[idx] = RTE_BE32(0xffffffff);
1631                                         width -= 32;
1632                                 }
1633                                 if (!width)
1634                                         break;
1635                                 ++idx;
1636                         }
1637                         info[idx] = (struct field_modify_info){4, 4 * idx,
1638                                                 MLX5_MODI_OUT_SIPV6_127_96};
1639                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1640                                                      (32 - width));
1641                 } else {
1642                         if (data->offset < 32)
1643                                 info[idx++] = (struct field_modify_info){4, 0,
1644                                                 MLX5_MODI_OUT_SIPV6_31_0};
1645                         if (data->offset < 64)
1646                                 info[idx++] = (struct field_modify_info){4, 0,
1647                                                 MLX5_MODI_OUT_SIPV6_63_32};
1648                         if (data->offset < 96)
1649                                 info[idx++] = (struct field_modify_info){4, 0,
1650                                                 MLX5_MODI_OUT_SIPV6_95_64};
1651                         if (data->offset < 128)
1652                                 info[idx++] = (struct field_modify_info){4, 0,
1653                                                 MLX5_MODI_OUT_SIPV6_127_96};
1654                 }
1655                 break;
1656         case RTE_FLOW_FIELD_IPV6_DST:
1657                 if (mask) {
1658                         if (data->offset < 32) {
1659                                 info[idx] = (struct field_modify_info){4,
1660                                                 4 * idx,
1661                                                 MLX5_MODI_OUT_DIPV6_31_0};
1662                                 if (width < 32) {
1663                                         mask[idx] =
1664                                                 rte_cpu_to_be_32(0xffffffff >>
1665                                                                  (32 - width));
1666                                         width = 0;
1667                                 } else {
1668                                         mask[idx] = RTE_BE32(0xffffffff);
1669                                         width -= 32;
1670                                 }
1671                                 if (!width)
1672                                         break;
1673                                 ++idx;
1674                         }
1675                         if (data->offset < 64) {
1676                                 info[idx] = (struct field_modify_info){4,
1677                                                 4 * idx,
1678                                                 MLX5_MODI_OUT_DIPV6_63_32};
1679                                 if (width < 32) {
1680                                         mask[idx] =
1681                                                 rte_cpu_to_be_32(0xffffffff >>
1682                                                                  (32 - width));
1683                                         width = 0;
1684                                 } else {
1685                                         mask[idx] = RTE_BE32(0xffffffff);
1686                                         width -= 32;
1687                                 }
1688                                 if (!width)
1689                                         break;
1690                                 ++idx;
1691                         }
1692                         if (data->offset < 96) {
1693                                 info[idx] = (struct field_modify_info){4,
1694                                                 4 * idx,
1695                                                 MLX5_MODI_OUT_DIPV6_95_64};
1696                                 if (width < 32) {
1697                                         mask[idx] =
1698                                                 rte_cpu_to_be_32(0xffffffff >>
1699                                                                  (32 - width));
1700                                         width = 0;
1701                                 } else {
1702                                         mask[idx] = RTE_BE32(0xffffffff);
1703                                         width -= 32;
1704                                 }
1705                                 if (!width)
1706                                         break;
1707                                 ++idx;
1708                         }
1709                         info[idx] = (struct field_modify_info){4, 4 * idx,
1710                                                 MLX5_MODI_OUT_DIPV6_127_96};
1711                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1712                                                      (32 - width));
1713                 } else {
1714                         if (data->offset < 32)
1715                                 info[idx++] = (struct field_modify_info){4, 0,
1716                                                 MLX5_MODI_OUT_DIPV6_31_0};
1717                         if (data->offset < 64)
1718                                 info[idx++] = (struct field_modify_info){4, 0,
1719                                                 MLX5_MODI_OUT_DIPV6_63_32};
1720                         if (data->offset < 96)
1721                                 info[idx++] = (struct field_modify_info){4, 0,
1722                                                 MLX5_MODI_OUT_DIPV6_95_64};
1723                         if (data->offset < 128)
1724                                 info[idx++] = (struct field_modify_info){4, 0,
1725                                                 MLX5_MODI_OUT_DIPV6_127_96};
1726                 }
1727                 break;
1728         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1729                 info[idx] = (struct field_modify_info){2, 0,
1730                                         MLX5_MODI_OUT_TCP_SPORT};
1731                 if (mask)
1732                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1733                 break;
1734         case RTE_FLOW_FIELD_TCP_PORT_DST:
1735                 info[idx] = (struct field_modify_info){2, 0,
1736                                         MLX5_MODI_OUT_TCP_DPORT};
1737                 if (mask)
1738                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1739                 break;
1740         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1741                 info[idx] = (struct field_modify_info){4, 0,
1742                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1743                 if (mask)
1744                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1745                                                      (32 - width));
1746                 break;
1747         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1748                 info[idx] = (struct field_modify_info){4, 0,
1749                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1750                 if (mask)
1751                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1752                                                      (32 - width));
1753                 break;
1754         case RTE_FLOW_FIELD_TCP_FLAGS:
1755                 info[idx] = (struct field_modify_info){2, 0,
1756                                         MLX5_MODI_OUT_TCP_FLAGS};
1757                 if (mask)
1758                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1759                 break;
1760         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1761                 info[idx] = (struct field_modify_info){2, 0,
1762                                         MLX5_MODI_OUT_UDP_SPORT};
1763                 if (mask)
1764                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1765                 break;
1766         case RTE_FLOW_FIELD_UDP_PORT_DST:
1767                 info[idx] = (struct field_modify_info){2, 0,
1768                                         MLX5_MODI_OUT_UDP_DPORT};
1769                 if (mask)
1770                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1771                 break;
1772         case RTE_FLOW_FIELD_VXLAN_VNI:
1773                 /* not supported yet */
1774                 break;
1775         case RTE_FLOW_FIELD_GENEVE_VNI:
1776                 /* not supported yet*/
1777                 break;
1778         case RTE_FLOW_FIELD_GTP_TEID:
1779                 info[idx] = (struct field_modify_info){4, 0,
1780                                         MLX5_MODI_GTP_TEID};
1781                 if (mask)
1782                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1783                                                      (32 - width));
1784                 break;
1785         case RTE_FLOW_FIELD_TAG:
1786                 {
1787                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1788                                                    data->level, error);
1789                         if (reg < 0)
1790                                 return;
1791                         MLX5_ASSERT(reg != REG_NON);
1792                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1793                         info[idx] = (struct field_modify_info){4, 0,
1794                                                 reg_to_field[reg]};
1795                         if (mask)
1796                                 mask[idx] =
1797                                         rte_cpu_to_be_32(0xffffffff >>
1798                                                          (32 - width));
1799                 }
1800                 break;
1801         case RTE_FLOW_FIELD_MARK:
1802                 {
1803                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1804                         uint32_t mark_count = __builtin_popcount(mark_mask);
1805                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1806                                                        0, error);
1807                         if (reg < 0)
1808                                 return;
1809                         MLX5_ASSERT(reg != REG_NON);
1810                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1811                         info[idx] = (struct field_modify_info){4, 0,
1812                                                 reg_to_field[reg]};
1813                         if (mask)
1814                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1815                                          (mark_count - width)) & mark_mask);
1816                 }
1817                 break;
1818         case RTE_FLOW_FIELD_META:
1819                 {
1820                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1821                         uint32_t meta_count = __builtin_popcount(meta_mask);
1822                         uint32_t msk_c0 =
1823                                 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1824                         uint32_t shl_c0 = rte_bsf32(msk_c0);
1825                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1826                         if (reg < 0)
1827                                 return;
1828                         MLX5_ASSERT(reg != REG_NON);
1829                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1830                         if (reg == REG_C_0)
1831                                 *shift = shl_c0;
1832                         info[idx] = (struct field_modify_info){4, 0,
1833                                                 reg_to_field[reg]};
1834                         if (mask)
1835                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1836                                         (meta_count - width)) & meta_mask);
1837                 }
1838                 break;
1839         case RTE_FLOW_FIELD_POINTER:
1840         case RTE_FLOW_FIELD_VALUE:
1841                 if (data->field == RTE_FLOW_FIELD_POINTER)
1842                         memcpy(&val, (void *)(uintptr_t)data->value,
1843                                sizeof(uint64_t));
1844                 else
1845                         val = data->value;
1846                 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1847                         if (mask[idx]) {
1848                                 if (dst_width == 48) {
1849                                         /*special case for MAC addresses */
1850                                         value[idx] = rte_cpu_to_be_16(val);
1851                                         val >>= 16;
1852                                         dst_width -= 16;
1853                                 } else if (dst_width > 16) {
1854                                         value[idx] = rte_cpu_to_be_32(val);
1855                                         val >>= 32;
1856                                 } else if (dst_width > 8) {
1857                                         value[idx] = rte_cpu_to_be_16(val);
1858                                         val >>= 16;
1859                                 } else {
1860                                         value[idx] = (uint8_t)val;
1861                                         val >>= 8;
1862                                 }
1863                                 if (*shift)
1864                                         value[idx] <<= *shift;
1865                                 if (!val)
1866                                         break;
1867                         }
1868                 }
1869                 break;
1870         default:
1871                 MLX5_ASSERT(false);
1872                 break;
1873         }
1874 }
1875
1876 /**
1877  * Convert modify_field action to DV specification.
1878  *
1879  * @param[in] dev
1880  *   Pointer to the rte_eth_dev structure.
1881  * @param[in,out] resource
1882  *   Pointer to the modify-header resource.
1883  * @param[in] action
1884  *   Pointer to action specification.
1885  * @param[in] attr
1886  *   Attributes of flow that includes this item.
1887  * @param[out] error
1888  *   Pointer to the error structure.
1889  *
1890  * @return
1891  *   0 on success, a negative errno value otherwise and rte_errno is set.
1892  */
1893 static int
1894 flow_dv_convert_action_modify_field
1895                         (struct rte_eth_dev *dev,
1896                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1897                          const struct rte_flow_action *action,
1898                          const struct rte_flow_attr *attr,
1899                          struct rte_flow_error *error)
1900 {
1901         struct mlx5_priv *priv = dev->data->dev_private;
1902         const struct rte_flow_action_modify_field *conf =
1903                 (const struct rte_flow_action_modify_field *)(action->conf);
1904         struct rte_flow_item item;
1905         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1906                                                                 {0, 0, 0} };
1907         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1908                                                                 {0, 0, 0} };
1909         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1910         uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1911         uint32_t type;
1912         uint32_t shift = 0;
1913         uint32_t dst_width = mlx5_flow_item_field_width(priv, conf->dst.field);
1914
1915         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1916                 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1917                 type = MLX5_MODIFICATION_TYPE_SET;
1918                 /** For SET fill the destination field (field) first. */
1919                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1920                                                   value, conf->width, dst_width,
1921                                                   &shift, dev, attr, error);
1922                 /** Then copy immediate value from source as per mask. */
1923                 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1924                                                   value, conf->width, dst_width,
1925                                                   &shift, dev, attr, error);
1926                 item.spec = &value;
1927         } else {
1928                 type = MLX5_MODIFICATION_TYPE_COPY;
1929                 /** For COPY fill the destination field (dcopy) without mask. */
1930                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1931                                                   value, conf->width, dst_width,
1932                                                   &shift, dev, attr, error);
1933                 /** Then construct the source field (field) with mask. */
1934                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1935                                                   value, conf->width, dst_width,
1936                                                   &shift, dev, attr, error);
1937         }
1938         item.mask = &mask;
1939         return flow_dv_convert_modify_action(&item,
1940                         field, dcopy, resource, type, error);
1941 }
1942
1943 /**
1944  * Validate MARK item.
1945  *
1946  * @param[in] dev
1947  *   Pointer to the rte_eth_dev structure.
1948  * @param[in] item
1949  *   Item specification.
1950  * @param[in] attr
1951  *   Attributes of flow that includes this item.
1952  * @param[out] error
1953  *   Pointer to error structure.
1954  *
1955  * @return
1956  *   0 on success, a negative errno value otherwise and rte_errno is set.
1957  */
1958 static int
1959 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1960                            const struct rte_flow_item *item,
1961                            const struct rte_flow_attr *attr __rte_unused,
1962                            struct rte_flow_error *error)
1963 {
1964         struct mlx5_priv *priv = dev->data->dev_private;
1965         struct mlx5_dev_config *config = &priv->config;
1966         const struct rte_flow_item_mark *spec = item->spec;
1967         const struct rte_flow_item_mark *mask = item->mask;
1968         const struct rte_flow_item_mark nic_mask = {
1969                 .id = priv->sh->dv_mark_mask,
1970         };
1971         int ret;
1972
1973         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1974                 return rte_flow_error_set(error, ENOTSUP,
1975                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1976                                           "extended metadata feature"
1977                                           " isn't enabled");
1978         if (!mlx5_flow_ext_mreg_supported(dev))
1979                 return rte_flow_error_set(error, ENOTSUP,
1980                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1981                                           "extended metadata register"
1982                                           " isn't supported");
1983         if (!nic_mask.id)
1984                 return rte_flow_error_set(error, ENOTSUP,
1985                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1986                                           "extended metadata register"
1987                                           " isn't available");
1988         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1989         if (ret < 0)
1990                 return ret;
1991         if (!spec)
1992                 return rte_flow_error_set(error, EINVAL,
1993                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1994                                           item->spec,
1995                                           "data cannot be empty");
1996         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1997                 return rte_flow_error_set(error, EINVAL,
1998                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1999                                           &spec->id,
2000                                           "mark id exceeds the limit");
2001         if (!mask)
2002                 mask = &nic_mask;
2003         if (!mask->id)
2004                 return rte_flow_error_set(error, EINVAL,
2005                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2006                                         "mask cannot be zero");
2007
2008         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2009                                         (const uint8_t *)&nic_mask,
2010                                         sizeof(struct rte_flow_item_mark),
2011                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2012         if (ret < 0)
2013                 return ret;
2014         return 0;
2015 }
2016
2017 /**
2018  * Validate META item.
2019  *
2020  * @param[in] dev
2021  *   Pointer to the rte_eth_dev structure.
2022  * @param[in] item
2023  *   Item specification.
2024  * @param[in] attr
2025  *   Attributes of flow that includes this item.
2026  * @param[out] error
2027  *   Pointer to error structure.
2028  *
2029  * @return
2030  *   0 on success, a negative errno value otherwise and rte_errno is set.
2031  */
2032 static int
2033 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2034                            const struct rte_flow_item *item,
2035                            const struct rte_flow_attr *attr,
2036                            struct rte_flow_error *error)
2037 {
2038         struct mlx5_priv *priv = dev->data->dev_private;
2039         struct mlx5_dev_config *config = &priv->config;
2040         const struct rte_flow_item_meta *spec = item->spec;
2041         const struct rte_flow_item_meta *mask = item->mask;
2042         struct rte_flow_item_meta nic_mask = {
2043                 .data = UINT32_MAX
2044         };
2045         int reg;
2046         int ret;
2047
2048         if (!spec)
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2051                                           item->spec,
2052                                           "data cannot be empty");
2053         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2054                 if (!mlx5_flow_ext_mreg_supported(dev))
2055                         return rte_flow_error_set(error, ENOTSUP,
2056                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2057                                           "extended metadata register"
2058                                           " isn't supported");
2059                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2060                 if (reg < 0)
2061                         return reg;
2062                 if (reg == REG_NON)
2063                         return rte_flow_error_set(error, ENOTSUP,
2064                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2065                                         "unavalable extended metadata register");
2066                 if (reg == REG_B)
2067                         return rte_flow_error_set(error, ENOTSUP,
2068                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2069                                           "match on reg_b "
2070                                           "isn't supported");
2071                 if (reg != REG_A)
2072                         nic_mask.data = priv->sh->dv_meta_mask;
2073         } else {
2074                 if (attr->transfer)
2075                         return rte_flow_error_set(error, ENOTSUP,
2076                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2077                                         "extended metadata feature "
2078                                         "should be enabled when "
2079                                         "meta item is requested "
2080                                         "with e-switch mode ");
2081                 if (attr->ingress)
2082                         return rte_flow_error_set(error, ENOTSUP,
2083                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2084                                         "match on metadata for ingress "
2085                                         "is not supported in legacy "
2086                                         "metadata mode");
2087         }
2088         if (!mask)
2089                 mask = &rte_flow_item_meta_mask;
2090         if (!mask->data)
2091                 return rte_flow_error_set(error, EINVAL,
2092                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2093                                         "mask cannot be zero");
2094
2095         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2096                                         (const uint8_t *)&nic_mask,
2097                                         sizeof(struct rte_flow_item_meta),
2098                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2099         return ret;
2100 }
2101
2102 /**
2103  * Validate TAG item.
2104  *
2105  * @param[in] dev
2106  *   Pointer to the rte_eth_dev structure.
2107  * @param[in] item
2108  *   Item specification.
2109  * @param[in] attr
2110  *   Attributes of flow that includes this item.
2111  * @param[out] error
2112  *   Pointer to error structure.
2113  *
2114  * @return
2115  *   0 on success, a negative errno value otherwise and rte_errno is set.
2116  */
2117 static int
2118 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2119                           const struct rte_flow_item *item,
2120                           const struct rte_flow_attr *attr __rte_unused,
2121                           struct rte_flow_error *error)
2122 {
2123         const struct rte_flow_item_tag *spec = item->spec;
2124         const struct rte_flow_item_tag *mask = item->mask;
2125         const struct rte_flow_item_tag nic_mask = {
2126                 .data = RTE_BE32(UINT32_MAX),
2127                 .index = 0xff,
2128         };
2129         int ret;
2130
2131         if (!mlx5_flow_ext_mreg_supported(dev))
2132                 return rte_flow_error_set(error, ENOTSUP,
2133                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2134                                           "extensive metadata register"
2135                                           " isn't supported");
2136         if (!spec)
2137                 return rte_flow_error_set(error, EINVAL,
2138                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2139                                           item->spec,
2140                                           "data cannot be empty");
2141         if (!mask)
2142                 mask = &rte_flow_item_tag_mask;
2143         if (!mask->data)
2144                 return rte_flow_error_set(error, EINVAL,
2145                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2146                                         "mask cannot be zero");
2147
2148         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2149                                         (const uint8_t *)&nic_mask,
2150                                         sizeof(struct rte_flow_item_tag),
2151                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2152         if (ret < 0)
2153                 return ret;
2154         if (mask->index != 0xff)
2155                 return rte_flow_error_set(error, EINVAL,
2156                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2157                                           "partial mask for tag index"
2158                                           " is not supported");
2159         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2160         if (ret < 0)
2161                 return ret;
2162         MLX5_ASSERT(ret != REG_NON);
2163         return 0;
2164 }
2165
2166 /**
2167  * Validate vport item.
2168  *
2169  * @param[in] dev
2170  *   Pointer to the rte_eth_dev structure.
2171  * @param[in] item
2172  *   Item specification.
2173  * @param[in] attr
2174  *   Attributes of flow that includes this item.
2175  * @param[in] item_flags
2176  *   Bit-fields that holds the items detected until now.
2177  * @param[out] error
2178  *   Pointer to error structure.
2179  *
2180  * @return
2181  *   0 on success, a negative errno value otherwise and rte_errno is set.
2182  */
2183 static int
2184 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2185                               const struct rte_flow_item *item,
2186                               const struct rte_flow_attr *attr,
2187                               uint64_t item_flags,
2188                               struct rte_flow_error *error)
2189 {
2190         const struct rte_flow_item_port_id *spec = item->spec;
2191         const struct rte_flow_item_port_id *mask = item->mask;
2192         const struct rte_flow_item_port_id switch_mask = {
2193                         .id = 0xffffffff,
2194         };
2195         struct mlx5_priv *esw_priv;
2196         struct mlx5_priv *dev_priv;
2197         int ret;
2198
2199         if (!attr->transfer)
2200                 return rte_flow_error_set(error, EINVAL,
2201                                           RTE_FLOW_ERROR_TYPE_ITEM,
2202                                           NULL,
2203                                           "match on port id is valid only"
2204                                           " when transfer flag is enabled");
2205         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2206                 return rte_flow_error_set(error, ENOTSUP,
2207                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2208                                           "multiple source ports are not"
2209                                           " supported");
2210         if (!mask)
2211                 mask = &switch_mask;
2212         if (mask->id != 0xffffffff)
2213                 return rte_flow_error_set(error, ENOTSUP,
2214                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2215                                            mask,
2216                                            "no support for partial mask on"
2217                                            " \"id\" field");
2218         ret = mlx5_flow_item_acceptable
2219                                 (item, (const uint8_t *)mask,
2220                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2221                                  sizeof(struct rte_flow_item_port_id),
2222                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2223         if (ret)
2224                 return ret;
2225         if (!spec)
2226                 return 0;
2227         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2228         if (!esw_priv)
2229                 return rte_flow_error_set(error, rte_errno,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2231                                           "failed to obtain E-Switch info for"
2232                                           " port");
2233         dev_priv = mlx5_dev_to_eswitch_info(dev);
2234         if (!dev_priv)
2235                 return rte_flow_error_set(error, rte_errno,
2236                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2237                                           NULL,
2238                                           "failed to obtain E-Switch info");
2239         if (esw_priv->domain_id != dev_priv->domain_id)
2240                 return rte_flow_error_set(error, EINVAL,
2241                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2242                                           "cannot match on a port from a"
2243                                           " different E-Switch");
2244         return 0;
2245 }
2246
2247 /**
2248  * Validate VLAN item.
2249  *
2250  * @param[in] item
2251  *   Item specification.
2252  * @param[in] item_flags
2253  *   Bit-fields that holds the items detected until now.
2254  * @param[in] dev
2255  *   Ethernet device flow is being created on.
2256  * @param[out] error
2257  *   Pointer to error structure.
2258  *
2259  * @return
2260  *   0 on success, a negative errno value otherwise and rte_errno is set.
2261  */
2262 static int
2263 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2264                            uint64_t item_flags,
2265                            struct rte_eth_dev *dev,
2266                            struct rte_flow_error *error)
2267 {
2268         const struct rte_flow_item_vlan *mask = item->mask;
2269         const struct rte_flow_item_vlan nic_mask = {
2270                 .tci = RTE_BE16(UINT16_MAX),
2271                 .inner_type = RTE_BE16(UINT16_MAX),
2272                 .has_more_vlan = 1,
2273         };
2274         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2275         int ret;
2276         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2277                                         MLX5_FLOW_LAYER_INNER_L4) :
2278                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2279                                         MLX5_FLOW_LAYER_OUTER_L4);
2280         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2281                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2282
2283         if (item_flags & vlanm)
2284                 return rte_flow_error_set(error, EINVAL,
2285                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2286                                           "multiple VLAN layers not supported");
2287         else if ((item_flags & l34m) != 0)
2288                 return rte_flow_error_set(error, EINVAL,
2289                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2290                                           "VLAN cannot follow L3/L4 layer");
2291         if (!mask)
2292                 mask = &rte_flow_item_vlan_mask;
2293         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2294                                         (const uint8_t *)&nic_mask,
2295                                         sizeof(struct rte_flow_item_vlan),
2296                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2297         if (ret)
2298                 return ret;
2299         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2300                 struct mlx5_priv *priv = dev->data->dev_private;
2301
2302                 if (priv->vmwa_context) {
2303                         /*
2304                          * Non-NULL context means we have a virtual machine
2305                          * and SR-IOV enabled, we have to create VLAN interface
2306                          * to make hypervisor to setup E-Switch vport
2307                          * context correctly. We avoid creating the multiple
2308                          * VLAN interfaces, so we cannot support VLAN tag mask.
2309                          */
2310                         return rte_flow_error_set(error, EINVAL,
2311                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2312                                                   item,
2313                                                   "VLAN tag mask is not"
2314                                                   " supported in virtual"
2315                                                   " environment");
2316                 }
2317         }
2318         return 0;
2319 }
2320
2321 /*
2322  * GTP flags are contained in 1 byte of the format:
2323  * -------------------------------------------
2324  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2325  * |-----------------------------------------|
2326  * | value | Version | PT | Res | E | S | PN |
2327  * -------------------------------------------
2328  *
2329  * Matching is supported only for GTP flags E, S, PN.
2330  */
2331 #define MLX5_GTP_FLAGS_MASK     0x07
2332
2333 /**
2334  * Validate GTP item.
2335  *
2336  * @param[in] dev
2337  *   Pointer to the rte_eth_dev structure.
2338  * @param[in] item
2339  *   Item specification.
2340  * @param[in] item_flags
2341  *   Bit-fields that holds the items detected until now.
2342  * @param[out] error
2343  *   Pointer to error structure.
2344  *
2345  * @return
2346  *   0 on success, a negative errno value otherwise and rte_errno is set.
2347  */
2348 static int
2349 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2350                           const struct rte_flow_item *item,
2351                           uint64_t item_flags,
2352                           struct rte_flow_error *error)
2353 {
2354         struct mlx5_priv *priv = dev->data->dev_private;
2355         const struct rte_flow_item_gtp *spec = item->spec;
2356         const struct rte_flow_item_gtp *mask = item->mask;
2357         const struct rte_flow_item_gtp nic_mask = {
2358                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2359                 .msg_type = 0xff,
2360                 .teid = RTE_BE32(0xffffffff),
2361         };
2362
2363         if (!priv->config.hca_attr.tunnel_stateless_gtp)
2364                 return rte_flow_error_set(error, ENOTSUP,
2365                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2366                                           "GTP support is not enabled");
2367         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2368                 return rte_flow_error_set(error, ENOTSUP,
2369                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2370                                           "multiple tunnel layers not"
2371                                           " supported");
2372         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2373                 return rte_flow_error_set(error, EINVAL,
2374                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2375                                           "no outer UDP layer found");
2376         if (!mask)
2377                 mask = &rte_flow_item_gtp_mask;
2378         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2379                 return rte_flow_error_set(error, ENOTSUP,
2380                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2381                                           "Match is supported for GTP"
2382                                           " flags only");
2383         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2384                                          (const uint8_t *)&nic_mask,
2385                                          sizeof(struct rte_flow_item_gtp),
2386                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2387 }
2388
2389 /**
2390  * Validate GTP PSC item.
2391  *
2392  * @param[in] item
2393  *   Item specification.
2394  * @param[in] last_item
2395  *   Previous validated item in the pattern items.
2396  * @param[in] gtp_item
2397  *   Previous GTP item specification.
2398  * @param[in] attr
2399  *   Pointer to flow attributes.
2400  * @param[out] error
2401  *   Pointer to error structure.
2402  *
2403  * @return
2404  *   0 on success, a negative errno value otherwise and rte_errno is set.
2405  */
2406 static int
2407 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2408                               uint64_t last_item,
2409                               const struct rte_flow_item *gtp_item,
2410                               const struct rte_flow_attr *attr,
2411                               struct rte_flow_error *error)
2412 {
2413         const struct rte_flow_item_gtp *gtp_spec;
2414         const struct rte_flow_item_gtp *gtp_mask;
2415         const struct rte_flow_item_gtp_psc *spec;
2416         const struct rte_flow_item_gtp_psc *mask;
2417         const struct rte_flow_item_gtp_psc nic_mask = {
2418                 .pdu_type = 0xFF,
2419                 .qfi = 0xFF,
2420         };
2421
2422         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2423                 return rte_flow_error_set
2424                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2425                          "GTP PSC item must be preceded with GTP item");
2426         gtp_spec = gtp_item->spec;
2427         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2428         /* GTP spec and E flag is requested to match zero. */
2429         if (gtp_spec &&
2430                 (gtp_mask->v_pt_rsv_flags &
2431                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2432                 return rte_flow_error_set
2433                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2434                          "GTP E flag must be 1 to match GTP PSC");
2435         /* Check the flow is not created in group zero. */
2436         if (!attr->transfer && !attr->group)
2437                 return rte_flow_error_set
2438                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2439                          "GTP PSC is not supported for group 0");
2440         /* GTP spec is here and E flag is requested to match zero. */
2441         if (!item->spec)
2442                 return 0;
2443         spec = item->spec;
2444         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2445         if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2446                 return rte_flow_error_set
2447                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2448                          "PDU type should be smaller than 16");
2449         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2450                                          (const uint8_t *)&nic_mask,
2451                                          sizeof(struct rte_flow_item_gtp_psc),
2452                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2453 }
2454
2455 /**
2456  * Validate IPV4 item.
2457  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2458  * add specific validation of fragment_offset field,
2459  *
2460  * @param[in] item
2461  *   Item specification.
2462  * @param[in] item_flags
2463  *   Bit-fields that holds the items detected until now.
2464  * @param[out] error
2465  *   Pointer to error structure.
2466  *
2467  * @return
2468  *   0 on success, a negative errno value otherwise and rte_errno is set.
2469  */
2470 static int
2471 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2472                            const struct rte_flow_item *item,
2473                            uint64_t item_flags, uint64_t last_item,
2474                            uint16_t ether_type, struct rte_flow_error *error)
2475 {
2476         int ret;
2477         struct mlx5_priv *priv = dev->data->dev_private;
2478         const struct rte_flow_item_ipv4 *spec = item->spec;
2479         const struct rte_flow_item_ipv4 *last = item->last;
2480         const struct rte_flow_item_ipv4 *mask = item->mask;
2481         rte_be16_t fragment_offset_spec = 0;
2482         rte_be16_t fragment_offset_last = 0;
2483         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2484                 .hdr = {
2485                         .src_addr = RTE_BE32(0xffffffff),
2486                         .dst_addr = RTE_BE32(0xffffffff),
2487                         .type_of_service = 0xff,
2488                         .fragment_offset = RTE_BE16(0xffff),
2489                         .next_proto_id = 0xff,
2490                         .time_to_live = 0xff,
2491                 },
2492         };
2493
2494         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2495                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2496                 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2497                                priv->config.hca_attr.inner_ipv4_ihl;
2498                 if (!ihl_cap)
2499                         return rte_flow_error_set(error, ENOTSUP,
2500                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2501                                                   item,
2502                                                   "IPV4 ihl offload not supported");
2503                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2504         }
2505         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2506                                            ether_type, &nic_ipv4_mask,
2507                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2508         if (ret < 0)
2509                 return ret;
2510         if (spec && mask)
2511                 fragment_offset_spec = spec->hdr.fragment_offset &
2512                                        mask->hdr.fragment_offset;
2513         if (!fragment_offset_spec)
2514                 return 0;
2515         /*
2516          * spec and mask are valid, enforce using full mask to make sure the
2517          * complete value is used correctly.
2518          */
2519         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2520                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2521                 return rte_flow_error_set(error, EINVAL,
2522                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2523                                           item, "must use full mask for"
2524                                           " fragment_offset");
2525         /*
2526          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2527          * indicating this is 1st fragment of fragmented packet.
2528          * This is not yet supported in MLX5, return appropriate error message.
2529          */
2530         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2531                 return rte_flow_error_set(error, ENOTSUP,
2532                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2533                                           "match on first fragment not "
2534                                           "supported");
2535         if (fragment_offset_spec && !last)
2536                 return rte_flow_error_set(error, ENOTSUP,
2537                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2538                                           "specified value not supported");
2539         /* spec and last are valid, validate the specified range. */
2540         fragment_offset_last = last->hdr.fragment_offset &
2541                                mask->hdr.fragment_offset;
2542         /*
2543          * Match on fragment_offset spec 0x2001 and last 0x3fff
2544          * means MF is 1 and frag-offset is > 0.
2545          * This packet is fragment 2nd and onward, excluding last.
2546          * This is not yet supported in MLX5, return appropriate
2547          * error message.
2548          */
2549         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2550             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2551                 return rte_flow_error_set(error, ENOTSUP,
2552                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2553                                           last, "match on following "
2554                                           "fragments not supported");
2555         /*
2556          * Match on fragment_offset spec 0x0001 and last 0x1fff
2557          * means MF is 0 and frag-offset is > 0.
2558          * This packet is last fragment of fragmented packet.
2559          * This is not yet supported in MLX5, return appropriate
2560          * error message.
2561          */
2562         if (fragment_offset_spec == RTE_BE16(1) &&
2563             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2564                 return rte_flow_error_set(error, ENOTSUP,
2565                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2566                                           last, "match on last "
2567                                           "fragment not supported");
2568         /*
2569          * Match on fragment_offset spec 0x0001 and last 0x3fff
2570          * means MF and/or frag-offset is not 0.
2571          * This is a fragmented packet.
2572          * Other range values are invalid and rejected.
2573          */
2574         if (!(fragment_offset_spec == RTE_BE16(1) &&
2575               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2576                 return rte_flow_error_set(error, ENOTSUP,
2577                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2578                                           "specified range not supported");
2579         return 0;
2580 }
2581
2582 /**
2583  * Validate IPV6 fragment extension item.
2584  *
2585  * @param[in] item
2586  *   Item specification.
2587  * @param[in] item_flags
2588  *   Bit-fields that holds the items detected until now.
2589  * @param[out] error
2590  *   Pointer to error structure.
2591  *
2592  * @return
2593  *   0 on success, a negative errno value otherwise and rte_errno is set.
2594  */
2595 static int
2596 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2597                                     uint64_t item_flags,
2598                                     struct rte_flow_error *error)
2599 {
2600         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2601         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2602         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2603         rte_be16_t frag_data_spec = 0;
2604         rte_be16_t frag_data_last = 0;
2605         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2606         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2607                                       MLX5_FLOW_LAYER_OUTER_L4;
2608         int ret = 0;
2609         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2610                 .hdr = {
2611                         .next_header = 0xff,
2612                         .frag_data = RTE_BE16(0xffff),
2613                 },
2614         };
2615
2616         if (item_flags & l4m)
2617                 return rte_flow_error_set(error, EINVAL,
2618                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2619                                           "ipv6 fragment extension item cannot "
2620                                           "follow L4 item.");
2621         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2622             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2623                 return rte_flow_error_set(error, EINVAL,
2624                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2625                                           "ipv6 fragment extension item must "
2626                                           "follow ipv6 item");
2627         if (spec && mask)
2628                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2629         if (!frag_data_spec)
2630                 return 0;
2631         /*
2632          * spec and mask are valid, enforce using full mask to make sure the
2633          * complete value is used correctly.
2634          */
2635         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2636                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2637                 return rte_flow_error_set(error, EINVAL,
2638                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2639                                           item, "must use full mask for"
2640                                           " frag_data");
2641         /*
2642          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2643          * This is 1st fragment of fragmented packet.
2644          */
2645         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2646                 return rte_flow_error_set(error, ENOTSUP,
2647                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2648                                           "match on first fragment not "
2649                                           "supported");
2650         if (frag_data_spec && !last)
2651                 return rte_flow_error_set(error, EINVAL,
2652                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2653                                           "specified value not supported");
2654         ret = mlx5_flow_item_acceptable
2655                                 (item, (const uint8_t *)mask,
2656                                  (const uint8_t *)&nic_mask,
2657                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2658                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2659         if (ret)
2660                 return ret;
2661         /* spec and last are valid, validate the specified range. */
2662         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2663         /*
2664          * Match on frag_data spec 0x0009 and last 0xfff9
2665          * means M is 1 and frag-offset is > 0.
2666          * This packet is fragment 2nd and onward, excluding last.
2667          * This is not yet supported in MLX5, return appropriate
2668          * error message.
2669          */
2670         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2671                                        RTE_IPV6_EHDR_MF_MASK) &&
2672             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2673                 return rte_flow_error_set(error, ENOTSUP,
2674                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2675                                           last, "match on following "
2676                                           "fragments not supported");
2677         /*
2678          * Match on frag_data spec 0x0008 and last 0xfff8
2679          * means M is 0 and frag-offset is > 0.
2680          * This packet is last fragment of fragmented packet.
2681          * This is not yet supported in MLX5, return appropriate
2682          * error message.
2683          */
2684         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2685             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2686                 return rte_flow_error_set(error, ENOTSUP,
2687                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2688                                           last, "match on last "
2689                                           "fragment not supported");
2690         /* Other range values are invalid and rejected. */
2691         return rte_flow_error_set(error, EINVAL,
2692                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2693                                   "specified range not supported");
2694 }
2695
2696 /*
2697  * Validate ASO CT item.
2698  *
2699  * @param[in] dev
2700  *   Pointer to the rte_eth_dev structure.
2701  * @param[in] item
2702  *   Item specification.
2703  * @param[in] item_flags
2704  *   Pointer to bit-fields that holds the items detected until now.
2705  * @param[out] error
2706  *   Pointer to error structure.
2707  *
2708  * @return
2709  *   0 on success, a negative errno value otherwise and rte_errno is set.
2710  */
2711 static int
2712 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2713                              const struct rte_flow_item *item,
2714                              uint64_t *item_flags,
2715                              struct rte_flow_error *error)
2716 {
2717         const struct rte_flow_item_conntrack *spec = item->spec;
2718         const struct rte_flow_item_conntrack *mask = item->mask;
2719         RTE_SET_USED(dev);
2720         uint32_t flags;
2721
2722         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2723                 return rte_flow_error_set(error, EINVAL,
2724                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2725                                           "Only one CT is supported");
2726         if (!mask)
2727                 mask = &rte_flow_item_conntrack_mask;
2728         flags = spec->flags & mask->flags;
2729         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2730             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2731              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2732              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2733                 return rte_flow_error_set(error, EINVAL,
2734                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2735                                           "Conflict status bits");
2736         /* State change also needs to be considered. */
2737         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2738         return 0;
2739 }
2740
2741 /**
2742  * Validate the pop VLAN action.
2743  *
2744  * @param[in] dev
2745  *   Pointer to the rte_eth_dev structure.
2746  * @param[in] action_flags
2747  *   Holds the actions detected until now.
2748  * @param[in] action
2749  *   Pointer to the pop vlan action.
2750  * @param[in] item_flags
2751  *   The items found in this flow rule.
2752  * @param[in] attr
2753  *   Pointer to flow attributes.
2754  * @param[out] error
2755  *   Pointer to error structure.
2756  *
2757  * @return
2758  *   0 on success, a negative errno value otherwise and rte_errno is set.
2759  */
2760 static int
2761 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2762                                  uint64_t action_flags,
2763                                  const struct rte_flow_action *action,
2764                                  uint64_t item_flags,
2765                                  const struct rte_flow_attr *attr,
2766                                  struct rte_flow_error *error)
2767 {
2768         const struct mlx5_priv *priv = dev->data->dev_private;
2769         struct mlx5_dev_ctx_shared *sh = priv->sh;
2770         bool direction_error = false;
2771
2772         if (!priv->sh->pop_vlan_action)
2773                 return rte_flow_error_set(error, ENOTSUP,
2774                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2775                                           NULL,
2776                                           "pop vlan action is not supported");
2777         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2778         if (attr->transfer) {
2779                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2780                 bool is_cx5 = sh->steering_format_version ==
2781                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2782
2783                 if (fdb_tx && is_cx5)
2784                         direction_error = true;
2785         } else if (attr->egress) {
2786                 direction_error = true;
2787         }
2788         if (direction_error)
2789                 return rte_flow_error_set(error, ENOTSUP,
2790                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2791                                           NULL,
2792                                           "pop vlan action not supported for egress");
2793         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2794                 return rte_flow_error_set(error, ENOTSUP,
2795                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2796                                           "no support for multiple VLAN "
2797                                           "actions");
2798         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2799         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2800             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2801                 return rte_flow_error_set(error, ENOTSUP,
2802                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2803                                           NULL,
2804                                           "cannot pop vlan after decap without "
2805                                           "match on inner vlan in the flow");
2806         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2807         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2808             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2809                 return rte_flow_error_set(error, ENOTSUP,
2810                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2811                                           NULL,
2812                                           "cannot pop vlan without a "
2813                                           "match on (outer) vlan in the flow");
2814         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2815                 return rte_flow_error_set(error, EINVAL,
2816                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2817                                           "wrong action order, port_id should "
2818                                           "be after pop VLAN action");
2819         if (!attr->transfer && priv->representor)
2820                 return rte_flow_error_set(error, ENOTSUP,
2821                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2822                                           "pop vlan action for VF representor "
2823                                           "not supported on NIC table");
2824         return 0;
2825 }
2826
2827 /**
2828  * Get VLAN default info from vlan match info.
2829  *
2830  * @param[in] items
2831  *   the list of item specifications.
2832  * @param[out] vlan
2833  *   pointer VLAN info to fill to.
2834  *
2835  * @return
2836  *   0 on success, a negative errno value otherwise and rte_errno is set.
2837  */
2838 static void
2839 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2840                                   struct rte_vlan_hdr *vlan)
2841 {
2842         const struct rte_flow_item_vlan nic_mask = {
2843                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2844                                 MLX5DV_FLOW_VLAN_VID_MASK),
2845                 .inner_type = RTE_BE16(0xffff),
2846         };
2847
2848         if (items == NULL)
2849                 return;
2850         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2851                 int type = items->type;
2852
2853                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2854                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2855                         break;
2856         }
2857         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2858                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2859                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2860
2861                 /* If VLAN item in pattern doesn't contain data, return here. */
2862                 if (!vlan_v)
2863                         return;
2864                 if (!vlan_m)
2865                         vlan_m = &nic_mask;
2866                 /* Only full match values are accepted */
2867                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2868                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2869                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2870                         vlan->vlan_tci |=
2871                                 rte_be_to_cpu_16(vlan_v->tci &
2872                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2873                 }
2874                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2875                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2876                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2877                         vlan->vlan_tci |=
2878                                 rte_be_to_cpu_16(vlan_v->tci &
2879                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2880                 }
2881                 if (vlan_m->inner_type == nic_mask.inner_type)
2882                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2883                                                            vlan_m->inner_type);
2884         }
2885 }
2886
2887 /**
2888  * Validate the push VLAN action.
2889  *
2890  * @param[in] dev
2891  *   Pointer to the rte_eth_dev structure.
2892  * @param[in] action_flags
2893  *   Holds the actions detected until now.
2894  * @param[in] item_flags
2895  *   The items found in this flow rule.
2896  * @param[in] action
2897  *   Pointer to the action structure.
2898  * @param[in] attr
2899  *   Pointer to flow attributes
2900  * @param[out] error
2901  *   Pointer to error structure.
2902  *
2903  * @return
2904  *   0 on success, a negative errno value otherwise and rte_errno is set.
2905  */
2906 static int
2907 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2908                                   uint64_t action_flags,
2909                                   const struct rte_flow_item_vlan *vlan_m,
2910                                   const struct rte_flow_action *action,
2911                                   const struct rte_flow_attr *attr,
2912                                   struct rte_flow_error *error)
2913 {
2914         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2915         const struct mlx5_priv *priv = dev->data->dev_private;
2916         struct mlx5_dev_ctx_shared *sh = priv->sh;
2917         bool direction_error = false;
2918
2919         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2920             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2921                 return rte_flow_error_set(error, EINVAL,
2922                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2923                                           "invalid vlan ethertype");
2924         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2925                 return rte_flow_error_set(error, EINVAL,
2926                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2927                                           "wrong action order, port_id should "
2928                                           "be after push VLAN");
2929         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2930         if (attr->transfer) {
2931                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2932                 bool is_cx5 = sh->steering_format_version ==
2933                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2934
2935                 if (!fdb_tx && is_cx5)
2936                         direction_error = true;
2937         } else if (attr->ingress) {
2938                 direction_error = true;
2939         }
2940         if (direction_error)
2941                 return rte_flow_error_set(error, ENOTSUP,
2942                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2943                                           NULL,
2944                                           "push vlan action not supported for ingress");
2945         if (!attr->transfer && priv->representor)
2946                 return rte_flow_error_set(error, ENOTSUP,
2947                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2948                                           "push vlan action for VF representor "
2949                                           "not supported on NIC table");
2950         if (vlan_m &&
2951             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2952             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2953                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2954             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2955             !(mlx5_flow_find_action
2956                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2957                 return rte_flow_error_set(error, EINVAL,
2958                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2959                                           "not full match mask on VLAN PCP and "
2960                                           "there is no of_set_vlan_pcp action, "
2961                                           "push VLAN action cannot figure out "
2962                                           "PCP value");
2963         if (vlan_m &&
2964             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2965             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2966                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2967             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2968             !(mlx5_flow_find_action
2969                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2970                 return rte_flow_error_set(error, EINVAL,
2971                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2972                                           "not full match mask on VLAN VID and "
2973                                           "there is no of_set_vlan_vid action, "
2974                                           "push VLAN action cannot figure out "
2975                                           "VID value");
2976         (void)attr;
2977         return 0;
2978 }
2979
2980 /**
2981  * Validate the set VLAN PCP.
2982  *
2983  * @param[in] action_flags
2984  *   Holds the actions detected until now.
2985  * @param[in] actions
2986  *   Pointer to the list of actions remaining in the flow rule.
2987  * @param[out] error
2988  *   Pointer to error structure.
2989  *
2990  * @return
2991  *   0 on success, a negative errno value otherwise and rte_errno is set.
2992  */
2993 static int
2994 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2995                                      const struct rte_flow_action actions[],
2996                                      struct rte_flow_error *error)
2997 {
2998         const struct rte_flow_action *action = actions;
2999         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
3000
3001         if (conf->vlan_pcp > 7)
3002                 return rte_flow_error_set(error, EINVAL,
3003                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3004                                           "VLAN PCP value is too big");
3005         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
3006                 return rte_flow_error_set(error, ENOTSUP,
3007                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3008                                           "set VLAN PCP action must follow "
3009                                           "the push VLAN action");
3010         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
3011                 return rte_flow_error_set(error, ENOTSUP,
3012                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3013                                           "Multiple VLAN PCP modification are "
3014                                           "not supported");
3015         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3016                 return rte_flow_error_set(error, EINVAL,
3017                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3018                                           "wrong action order, port_id should "
3019                                           "be after set VLAN PCP");
3020         return 0;
3021 }
3022
3023 /**
3024  * Validate the set VLAN VID.
3025  *
3026  * @param[in] item_flags
3027  *   Holds the items detected in this rule.
3028  * @param[in] action_flags
3029  *   Holds the actions detected until now.
3030  * @param[in] actions
3031  *   Pointer to the list of actions remaining in the flow rule.
3032  * @param[out] error
3033  *   Pointer to error structure.
3034  *
3035  * @return
3036  *   0 on success, a negative errno value otherwise and rte_errno is set.
3037  */
3038 static int
3039 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3040                                      uint64_t action_flags,
3041                                      const struct rte_flow_action actions[],
3042                                      struct rte_flow_error *error)
3043 {
3044         const struct rte_flow_action *action = actions;
3045         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3046
3047         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3048                 return rte_flow_error_set(error, EINVAL,
3049                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3050                                           "VLAN VID value is too big");
3051         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3052             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3053                 return rte_flow_error_set(error, ENOTSUP,
3054                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3055                                           "set VLAN VID action must follow push"
3056                                           " VLAN action or match on VLAN item");
3057         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3058                 return rte_flow_error_set(error, ENOTSUP,
3059                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3060                                           "Multiple VLAN VID modifications are "
3061                                           "not supported");
3062         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3063                 return rte_flow_error_set(error, EINVAL,
3064                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3065                                           "wrong action order, port_id should "
3066                                           "be after set VLAN VID");
3067         return 0;
3068 }
3069
3070 /*
3071  * Validate the FLAG action.
3072  *
3073  * @param[in] dev
3074  *   Pointer to the rte_eth_dev structure.
3075  * @param[in] action_flags
3076  *   Holds the actions detected until now.
3077  * @param[in] attr
3078  *   Pointer to flow attributes
3079  * @param[out] error
3080  *   Pointer to error structure.
3081  *
3082  * @return
3083  *   0 on success, a negative errno value otherwise and rte_errno is set.
3084  */
3085 static int
3086 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3087                              uint64_t action_flags,
3088                              const struct rte_flow_attr *attr,
3089                              struct rte_flow_error *error)
3090 {
3091         struct mlx5_priv *priv = dev->data->dev_private;
3092         struct mlx5_dev_config *config = &priv->config;
3093         int ret;
3094
3095         /* Fall back if no extended metadata register support. */
3096         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3097                 return mlx5_flow_validate_action_flag(action_flags, attr,
3098                                                       error);
3099         /* Extensive metadata mode requires registers. */
3100         if (!mlx5_flow_ext_mreg_supported(dev))
3101                 return rte_flow_error_set(error, ENOTSUP,
3102                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3103                                           "no metadata registers "
3104                                           "to support flag action");
3105         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3106                 return rte_flow_error_set(error, ENOTSUP,
3107                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3108                                           "extended metadata register"
3109                                           " isn't available");
3110         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3111         if (ret < 0)
3112                 return ret;
3113         MLX5_ASSERT(ret > 0);
3114         if (action_flags & MLX5_FLOW_ACTION_MARK)
3115                 return rte_flow_error_set(error, EINVAL,
3116                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3117                                           "can't mark and flag in same flow");
3118         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3119                 return rte_flow_error_set(error, EINVAL,
3120                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3121                                           "can't have 2 flag"
3122                                           " actions in same flow");
3123         return 0;
3124 }
3125
3126 /**
3127  * Validate MARK action.
3128  *
3129  * @param[in] dev
3130  *   Pointer to the rte_eth_dev structure.
3131  * @param[in] action
3132  *   Pointer to action.
3133  * @param[in] action_flags
3134  *   Holds the actions detected until now.
3135  * @param[in] attr
3136  *   Pointer to flow attributes
3137  * @param[out] error
3138  *   Pointer to error structure.
3139  *
3140  * @return
3141  *   0 on success, a negative errno value otherwise and rte_errno is set.
3142  */
3143 static int
3144 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3145                              const struct rte_flow_action *action,
3146                              uint64_t action_flags,
3147                              const struct rte_flow_attr *attr,
3148                              struct rte_flow_error *error)
3149 {
3150         struct mlx5_priv *priv = dev->data->dev_private;
3151         struct mlx5_dev_config *config = &priv->config;
3152         const struct rte_flow_action_mark *mark = action->conf;
3153         int ret;
3154
3155         if (is_tunnel_offload_active(dev))
3156                 return rte_flow_error_set(error, ENOTSUP,
3157                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3158                                           "no mark action "
3159                                           "if tunnel offload active");
3160         /* Fall back if no extended metadata register support. */
3161         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3162                 return mlx5_flow_validate_action_mark(action, action_flags,
3163                                                       attr, error);
3164         /* Extensive metadata mode requires registers. */
3165         if (!mlx5_flow_ext_mreg_supported(dev))
3166                 return rte_flow_error_set(error, ENOTSUP,
3167                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3168                                           "no metadata registers "
3169                                           "to support mark action");
3170         if (!priv->sh->dv_mark_mask)
3171                 return rte_flow_error_set(error, ENOTSUP,
3172                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3173                                           "extended metadata register"
3174                                           " isn't available");
3175         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3176         if (ret < 0)
3177                 return ret;
3178         MLX5_ASSERT(ret > 0);
3179         if (!mark)
3180                 return rte_flow_error_set(error, EINVAL,
3181                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3182                                           "configuration cannot be null");
3183         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3184                 return rte_flow_error_set(error, EINVAL,
3185                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3186                                           &mark->id,
3187                                           "mark id exceeds the limit");
3188         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3189                 return rte_flow_error_set(error, EINVAL,
3190                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3191                                           "can't flag and mark in same flow");
3192         if (action_flags & MLX5_FLOW_ACTION_MARK)
3193                 return rte_flow_error_set(error, EINVAL,
3194                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3195                                           "can't have 2 mark actions in same"
3196                                           " flow");
3197         return 0;
3198 }
3199
3200 /**
3201  * Validate SET_META action.
3202  *
3203  * @param[in] dev
3204  *   Pointer to the rte_eth_dev structure.
3205  * @param[in] action
3206  *   Pointer to the action structure.
3207  * @param[in] action_flags
3208  *   Holds the actions detected until now.
3209  * @param[in] attr
3210  *   Pointer to flow attributes
3211  * @param[out] error
3212  *   Pointer to error structure.
3213  *
3214  * @return
3215  *   0 on success, a negative errno value otherwise and rte_errno is set.
3216  */
3217 static int
3218 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3219                                  const struct rte_flow_action *action,
3220                                  uint64_t action_flags __rte_unused,
3221                                  const struct rte_flow_attr *attr,
3222                                  struct rte_flow_error *error)
3223 {
3224         const struct rte_flow_action_set_meta *conf;
3225         uint32_t nic_mask = UINT32_MAX;
3226         int reg;
3227
3228         if (!mlx5_flow_ext_mreg_supported(dev))
3229                 return rte_flow_error_set(error, ENOTSUP,
3230                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3231                                           "extended metadata register"
3232                                           " isn't supported");
3233         reg = flow_dv_get_metadata_reg(dev, attr, error);
3234         if (reg < 0)
3235                 return reg;
3236         if (reg == REG_NON)
3237                 return rte_flow_error_set(error, ENOTSUP,
3238                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3239                                           "unavalable extended metadata register");
3240         if (reg != REG_A && reg != REG_B) {
3241                 struct mlx5_priv *priv = dev->data->dev_private;
3242
3243                 nic_mask = priv->sh->dv_meta_mask;
3244         }
3245         if (!(action->conf))
3246                 return rte_flow_error_set(error, EINVAL,
3247                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3248                                           "configuration cannot be null");
3249         conf = (const struct rte_flow_action_set_meta *)action->conf;
3250         if (!conf->mask)
3251                 return rte_flow_error_set(error, EINVAL,
3252                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3253                                           "zero mask doesn't have any effect");
3254         if (conf->mask & ~nic_mask)
3255                 return rte_flow_error_set(error, EINVAL,
3256                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3257                                           "meta data must be within reg C0");
3258         return 0;
3259 }
3260
3261 /**
3262  * Validate SET_TAG action.
3263  *
3264  * @param[in] dev
3265  *   Pointer to the rte_eth_dev structure.
3266  * @param[in] action
3267  *   Pointer to the action structure.
3268  * @param[in] action_flags
3269  *   Holds the actions detected until now.
3270  * @param[in] attr
3271  *   Pointer to flow attributes
3272  * @param[out] error
3273  *   Pointer to error structure.
3274  *
3275  * @return
3276  *   0 on success, a negative errno value otherwise and rte_errno is set.
3277  */
3278 static int
3279 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3280                                 const struct rte_flow_action *action,
3281                                 uint64_t action_flags,
3282                                 const struct rte_flow_attr *attr,
3283                                 struct rte_flow_error *error)
3284 {
3285         const struct rte_flow_action_set_tag *conf;
3286         const uint64_t terminal_action_flags =
3287                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3288                 MLX5_FLOW_ACTION_RSS;
3289         int ret;
3290
3291         if (!mlx5_flow_ext_mreg_supported(dev))
3292                 return rte_flow_error_set(error, ENOTSUP,
3293                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3294                                           "extensive metadata register"
3295                                           " isn't supported");
3296         if (!(action->conf))
3297                 return rte_flow_error_set(error, EINVAL,
3298                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3299                                           "configuration cannot be null");
3300         conf = (const struct rte_flow_action_set_tag *)action->conf;
3301         if (!conf->mask)
3302                 return rte_flow_error_set(error, EINVAL,
3303                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3304                                           "zero mask doesn't have any effect");
3305         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3306         if (ret < 0)
3307                 return ret;
3308         if (!attr->transfer && attr->ingress &&
3309             (action_flags & terminal_action_flags))
3310                 return rte_flow_error_set(error, EINVAL,
3311                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3312                                           "set_tag has no effect"
3313                                           " with terminal actions");
3314         return 0;
3315 }
3316
3317 /**
3318  * Check if action counter is shared by either old or new mechanism.
3319  *
3320  * @param[in] action
3321  *   Pointer to the action structure.
3322  *
3323  * @return
3324  *   True when counter is shared, false otherwise.
3325  */
3326 static inline bool
3327 is_shared_action_count(const struct rte_flow_action *action)
3328 {
3329         const struct rte_flow_action_count *count =
3330                         (const struct rte_flow_action_count *)action->conf;
3331
3332         if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3333                 return true;
3334         return !!(count && count->shared);
3335 }
3336
3337 /**
3338  * Validate count action.
3339  *
3340  * @param[in] dev
3341  *   Pointer to rte_eth_dev structure.
3342  * @param[in] shared
3343  *   Indicator if action is shared.
3344  * @param[in] action_flags
3345  *   Holds the actions detected until now.
3346  * @param[out] error
3347  *   Pointer to error structure.
3348  *
3349  * @return
3350  *   0 on success, a negative errno value otherwise and rte_errno is set.
3351  */
3352 static int
3353 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3354                               uint64_t action_flags,
3355                               struct rte_flow_error *error)
3356 {
3357         struct mlx5_priv *priv = dev->data->dev_private;
3358
3359         if (!priv->config.devx)
3360                 goto notsup_err;
3361         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3362                 return rte_flow_error_set(error, EINVAL,
3363                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3364                                           "duplicate count actions set");
3365         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3366             !priv->sh->flow_hit_aso_en)
3367                 return rte_flow_error_set(error, EINVAL,
3368                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3369                                           "old age and shared count combination is not supported");
3370 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3371         return 0;
3372 #endif
3373 notsup_err:
3374         return rte_flow_error_set
3375                       (error, ENOTSUP,
3376                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3377                        NULL,
3378                        "count action not supported");
3379 }
3380
3381 /**
3382  * Validate the L2 encap action.
3383  *
3384  * @param[in] dev
3385  *   Pointer to the rte_eth_dev structure.
3386  * @param[in] action_flags
3387  *   Holds the actions detected until now.
3388  * @param[in] action
3389  *   Pointer to the action structure.
3390  * @param[in] attr
3391  *   Pointer to flow attributes.
3392  * @param[out] error
3393  *   Pointer to error structure.
3394  *
3395  * @return
3396  *   0 on success, a negative errno value otherwise and rte_errno is set.
3397  */
3398 static int
3399 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3400                                  uint64_t action_flags,
3401                                  const struct rte_flow_action *action,
3402                                  const struct rte_flow_attr *attr,
3403                                  struct rte_flow_error *error)
3404 {
3405         const struct mlx5_priv *priv = dev->data->dev_private;
3406
3407         if (!(action->conf))
3408                 return rte_flow_error_set(error, EINVAL,
3409                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3410                                           "configuration cannot be null");
3411         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3412                 return rte_flow_error_set(error, EINVAL,
3413                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3414                                           "can only have a single encap action "
3415                                           "in a flow");
3416         if (!attr->transfer && priv->representor)
3417                 return rte_flow_error_set(error, ENOTSUP,
3418                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3419                                           "encap action for VF representor "
3420                                           "not supported on NIC table");
3421         return 0;
3422 }
3423
3424 /**
3425  * Validate a decap action.
3426  *
3427  * @param[in] dev
3428  *   Pointer to the rte_eth_dev structure.
3429  * @param[in] action_flags
3430  *   Holds the actions detected until now.
3431  * @param[in] action
3432  *   Pointer to the action structure.
3433  * @param[in] item_flags
3434  *   Holds the items detected.
3435  * @param[in] attr
3436  *   Pointer to flow attributes
3437  * @param[out] error
3438  *   Pointer to error structure.
3439  *
3440  * @return
3441  *   0 on success, a negative errno value otherwise and rte_errno is set.
3442  */
3443 static int
3444 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3445                               uint64_t action_flags,
3446                               const struct rte_flow_action *action,
3447                               const uint64_t item_flags,
3448                               const struct rte_flow_attr *attr,
3449                               struct rte_flow_error *error)
3450 {
3451         const struct mlx5_priv *priv = dev->data->dev_private;
3452
3453         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3454             !priv->config.decap_en)
3455                 return rte_flow_error_set(error, ENOTSUP,
3456                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3457                                           "decap is not enabled");
3458         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3459                 return rte_flow_error_set(error, ENOTSUP,
3460                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3461                                           action_flags &
3462                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3463                                           "have a single decap action" : "decap "
3464                                           "after encap is not supported");
3465         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3466                 return rte_flow_error_set(error, EINVAL,
3467                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3468                                           "can't have decap action after"
3469                                           " modify action");
3470         if (attr->egress)
3471                 return rte_flow_error_set(error, ENOTSUP,
3472                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3473                                           NULL,
3474                                           "decap action not supported for "
3475                                           "egress");
3476         if (!attr->transfer && priv->representor)
3477                 return rte_flow_error_set(error, ENOTSUP,
3478                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3479                                           "decap action for VF representor "
3480                                           "not supported on NIC table");
3481         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3482             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3483                 return rte_flow_error_set(error, ENOTSUP,
3484                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3485                                 "VXLAN item should be present for VXLAN decap");
3486         return 0;
3487 }
3488
3489 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3490
3491 /**
3492  * Validate the raw encap and decap actions.
3493  *
3494  * @param[in] dev
3495  *   Pointer to the rte_eth_dev structure.
3496  * @param[in] decap
3497  *   Pointer to the decap action.
3498  * @param[in] encap
3499  *   Pointer to the encap action.
3500  * @param[in] attr
3501  *   Pointer to flow attributes
3502  * @param[in/out] action_flags
3503  *   Holds the actions detected until now.
3504  * @param[out] actions_n
3505  *   pointer to the number of actions counter.
3506  * @param[in] action
3507  *   Pointer to the action structure.
3508  * @param[in] item_flags
3509  *   Holds the items detected.
3510  * @param[out] error
3511  *   Pointer to error structure.
3512  *
3513  * @return
3514  *   0 on success, a negative errno value otherwise and rte_errno is set.
3515  */
3516 static int
3517 flow_dv_validate_action_raw_encap_decap
3518         (struct rte_eth_dev *dev,
3519          const struct rte_flow_action_raw_decap *decap,
3520          const struct rte_flow_action_raw_encap *encap,
3521          const struct rte_flow_attr *attr, uint64_t *action_flags,
3522          int *actions_n, const struct rte_flow_action *action,
3523          uint64_t item_flags, struct rte_flow_error *error)
3524 {
3525         const struct mlx5_priv *priv = dev->data->dev_private;
3526         int ret;
3527
3528         if (encap && (!encap->size || !encap->data))
3529                 return rte_flow_error_set(error, EINVAL,
3530                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3531                                           "raw encap data cannot be empty");
3532         if (decap && encap) {
3533                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3534                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3535                         /* L3 encap. */
3536                         decap = NULL;
3537                 else if (encap->size <=
3538                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3539                            decap->size >
3540                            MLX5_ENCAPSULATION_DECISION_SIZE)
3541                         /* L3 decap. */
3542                         encap = NULL;
3543                 else if (encap->size >
3544                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3545                            decap->size >
3546                            MLX5_ENCAPSULATION_DECISION_SIZE)
3547                         /* 2 L2 actions: encap and decap. */
3548                         ;
3549                 else
3550                         return rte_flow_error_set(error,
3551                                 ENOTSUP,
3552                                 RTE_FLOW_ERROR_TYPE_ACTION,
3553                                 NULL, "unsupported too small "
3554                                 "raw decap and too small raw "
3555                                 "encap combination");
3556         }
3557         if (decap) {
3558                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3559                                                     item_flags, attr, error);
3560                 if (ret < 0)
3561                         return ret;
3562                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3563                 ++(*actions_n);
3564         }
3565         if (encap) {
3566                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3567                         return rte_flow_error_set(error, ENOTSUP,
3568                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3569                                                   NULL,
3570                                                   "small raw encap size");
3571                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3572                         return rte_flow_error_set(error, EINVAL,
3573                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3574                                                   NULL,
3575                                                   "more than one encap action");
3576                 if (!attr->transfer && priv->representor)
3577                         return rte_flow_error_set
3578                                         (error, ENOTSUP,
3579                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3580                                          "encap action for VF representor "
3581                                          "not supported on NIC table");
3582                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3583                 ++(*actions_n);
3584         }
3585         return 0;
3586 }
3587
3588 /*
3589  * Validate the ASO CT action.
3590  *
3591  * @param[in] dev
3592  *   Pointer to the rte_eth_dev structure.
3593  * @param[in] action_flags
3594  *   Holds the actions detected until now.
3595  * @param[in] item_flags
3596  *   The items found in this flow rule.
3597  * @param[in] attr
3598  *   Pointer to flow attributes.
3599  * @param[out] error
3600  *   Pointer to error structure.
3601  *
3602  * @return
3603  *   0 on success, a negative errno value otherwise and rte_errno is set.
3604  */
3605 static int
3606 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3607                                uint64_t action_flags,
3608                                uint64_t item_flags,
3609                                const struct rte_flow_attr *attr,
3610                                struct rte_flow_error *error)
3611 {
3612         RTE_SET_USED(dev);
3613
3614         if (attr->group == 0 && !attr->transfer)
3615                 return rte_flow_error_set(error, ENOTSUP,
3616                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3617                                           NULL,
3618                                           "Only support non-root table");
3619         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3620                 return rte_flow_error_set(error, ENOTSUP,
3621                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3622                                           "CT cannot follow a fate action");
3623         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3624             (action_flags & MLX5_FLOW_ACTION_AGE))
3625                 return rte_flow_error_set(error, EINVAL,
3626                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3627                                           "Only one ASO action is supported");
3628         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3629                 return rte_flow_error_set(error, EINVAL,
3630                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3631                                           "Encap cannot exist before CT");
3632         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3633                 return rte_flow_error_set(error, EINVAL,
3634                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3635                                           "Not a outer TCP packet");
3636         return 0;
3637 }
3638
3639 int
3640 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3641                              struct mlx5_list_entry *entry, void *cb_ctx)
3642 {
3643         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3644         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3645         struct mlx5_flow_dv_encap_decap_resource *resource;
3646
3647         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3648                                 entry);
3649         if (resource->reformat_type == ctx_resource->reformat_type &&
3650             resource->ft_type == ctx_resource->ft_type &&
3651             resource->flags == ctx_resource->flags &&
3652             resource->size == ctx_resource->size &&
3653             !memcmp((const void *)resource->buf,
3654                     (const void *)ctx_resource->buf,
3655                     resource->size))
3656                 return 0;
3657         return -1;
3658 }
3659
3660 struct mlx5_list_entry *
3661 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3662 {
3663         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3664         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3665         struct mlx5dv_dr_domain *domain;
3666         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3667         struct mlx5_flow_dv_encap_decap_resource *resource;
3668         uint32_t idx;
3669         int ret;
3670
3671         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3672                 domain = sh->fdb_domain;
3673         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3674                 domain = sh->rx_domain;
3675         else
3676                 domain = sh->tx_domain;
3677         /* Register new encap/decap resource. */
3678         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3679         if (!resource) {
3680                 rte_flow_error_set(ctx->error, ENOMEM,
3681                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3682                                    "cannot allocate resource memory");
3683                 return NULL;
3684         }
3685         *resource = *ctx_resource;
3686         resource->idx = idx;
3687         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,
3688                                                               resource,
3689                                                              &resource->action);
3690         if (ret) {
3691                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3692                 rte_flow_error_set(ctx->error, ENOMEM,
3693                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3694                                    NULL, "cannot create action");
3695                 return NULL;
3696         }
3697
3698         return &resource->entry;
3699 }
3700
3701 struct mlx5_list_entry *
3702 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3703                              void *cb_ctx)
3704 {
3705         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3706         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3707         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3708         uint32_t idx;
3709
3710         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3711                                            &idx);
3712         if (!cache_resource) {
3713                 rte_flow_error_set(ctx->error, ENOMEM,
3714                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3715                                    "cannot allocate resource memory");
3716                 return NULL;
3717         }
3718         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3719         cache_resource->idx = idx;
3720         return &cache_resource->entry;
3721 }
3722
3723 void
3724 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3725 {
3726         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3727         struct mlx5_flow_dv_encap_decap_resource *res =
3728                                        container_of(entry, typeof(*res), entry);
3729
3730         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3731 }
3732
3733 /**
3734  * Find existing encap/decap resource or create and register a new one.
3735  *
3736  * @param[in, out] dev
3737  *   Pointer to rte_eth_dev structure.
3738  * @param[in, out] resource
3739  *   Pointer to encap/decap resource.
3740  * @parm[in, out] dev_flow
3741  *   Pointer to the dev_flow.
3742  * @param[out] error
3743  *   pointer to error structure.
3744  *
3745  * @return
3746  *   0 on success otherwise -errno and errno is set.
3747  */
3748 static int
3749 flow_dv_encap_decap_resource_register
3750                         (struct rte_eth_dev *dev,
3751                          struct mlx5_flow_dv_encap_decap_resource *resource,
3752                          struct mlx5_flow *dev_flow,
3753                          struct rte_flow_error *error)
3754 {
3755         struct mlx5_priv *priv = dev->data->dev_private;
3756         struct mlx5_dev_ctx_shared *sh = priv->sh;
3757         struct mlx5_list_entry *entry;
3758         union {
3759                 struct {
3760                         uint32_t ft_type:8;
3761                         uint32_t refmt_type:8;
3762                         /*
3763                          * Header reformat actions can be shared between
3764                          * non-root tables. One bit to indicate non-root
3765                          * table or not.
3766                          */
3767                         uint32_t is_root:1;
3768                         uint32_t reserve:15;
3769                 };
3770                 uint32_t v32;
3771         } encap_decap_key = {
3772                 {
3773                         .ft_type = resource->ft_type,
3774                         .refmt_type = resource->reformat_type,
3775                         .is_root = !!dev_flow->dv.group,
3776                         .reserve = 0,
3777                 }
3778         };
3779         struct mlx5_flow_cb_ctx ctx = {
3780                 .error = error,
3781                 .data = resource,
3782         };
3783         struct mlx5_hlist *encaps_decaps;
3784         uint64_t key64;
3785
3786         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3787                                 "encaps_decaps",
3788                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3789                                 true, true, sh,
3790                                 flow_dv_encap_decap_create_cb,
3791                                 flow_dv_encap_decap_match_cb,
3792                                 flow_dv_encap_decap_remove_cb,
3793                                 flow_dv_encap_decap_clone_cb,
3794                                 flow_dv_encap_decap_clone_free_cb);
3795         if (unlikely(!encaps_decaps))
3796                 return -rte_errno;
3797         resource->flags = dev_flow->dv.group ? 0 : 1;
3798         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3799                                  sizeof(encap_decap_key.v32), 0);
3800         if (resource->reformat_type !=
3801             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3802             resource->size)
3803                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3804         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3805         if (!entry)
3806                 return -rte_errno;
3807         resource = container_of(entry, typeof(*resource), entry);
3808         dev_flow->dv.encap_decap = resource;
3809         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3810         return 0;
3811 }
3812
3813 /**
3814  * Find existing table jump resource or create and register a new one.
3815  *
3816  * @param[in, out] dev
3817  *   Pointer to rte_eth_dev structure.
3818  * @param[in, out] tbl
3819  *   Pointer to flow table resource.
3820  * @parm[in, out] dev_flow
3821  *   Pointer to the dev_flow.
3822  * @param[out] error
3823  *   pointer to error structure.
3824  *
3825  * @return
3826  *   0 on success otherwise -errno and errno is set.
3827  */
3828 static int
3829 flow_dv_jump_tbl_resource_register
3830                         (struct rte_eth_dev *dev __rte_unused,
3831                          struct mlx5_flow_tbl_resource *tbl,
3832                          struct mlx5_flow *dev_flow,
3833                          struct rte_flow_error *error __rte_unused)
3834 {
3835         struct mlx5_flow_tbl_data_entry *tbl_data =
3836                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3837
3838         MLX5_ASSERT(tbl);
3839         MLX5_ASSERT(tbl_data->jump.action);
3840         dev_flow->handle->rix_jump = tbl_data->idx;
3841         dev_flow->dv.jump = &tbl_data->jump;
3842         return 0;
3843 }
3844
3845 int
3846 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3847                          struct mlx5_list_entry *entry, void *cb_ctx)
3848 {
3849         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3850         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3851         struct mlx5_flow_dv_port_id_action_resource *res =
3852                                        container_of(entry, typeof(*res), entry);
3853
3854         return ref->port_id != res->port_id;
3855 }
3856
3857 struct mlx5_list_entry *
3858 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3859 {
3860         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3861         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3862         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3863         struct mlx5_flow_dv_port_id_action_resource *resource;
3864         uint32_t idx;
3865         int ret;
3866
3867         /* Register new port id action resource. */
3868         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3869         if (!resource) {
3870                 rte_flow_error_set(ctx->error, ENOMEM,
3871                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3872                                    "cannot allocate port_id action memory");
3873                 return NULL;
3874         }
3875         *resource = *ref;
3876         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3877                                                         ref->port_id,
3878                                                         &resource->action);
3879         if (ret) {
3880                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3881                 rte_flow_error_set(ctx->error, ENOMEM,
3882                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3883                                    "cannot create action");
3884                 return NULL;
3885         }
3886         resource->idx = idx;
3887         return &resource->entry;
3888 }
3889
3890 struct mlx5_list_entry *
3891 flow_dv_port_id_clone_cb(void *tool_ctx,
3892                          struct mlx5_list_entry *entry __rte_unused,
3893                          void *cb_ctx)
3894 {
3895         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3896         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3897         struct mlx5_flow_dv_port_id_action_resource *resource;
3898         uint32_t idx;
3899
3900         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3901         if (!resource) {
3902                 rte_flow_error_set(ctx->error, ENOMEM,
3903                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3904                                    "cannot allocate port_id action memory");
3905                 return NULL;
3906         }
3907         memcpy(resource, entry, sizeof(*resource));
3908         resource->idx = idx;
3909         return &resource->entry;
3910 }
3911
3912 void
3913 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3914 {
3915         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3916         struct mlx5_flow_dv_port_id_action_resource *resource =
3917                                   container_of(entry, typeof(*resource), entry);
3918
3919         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3920 }
3921
3922 /**
3923  * Find existing table port ID resource or create and register a new one.
3924  *
3925  * @param[in, out] dev
3926  *   Pointer to rte_eth_dev structure.
3927  * @param[in, out] ref
3928  *   Pointer to port ID action resource reference.
3929  * @parm[in, out] dev_flow
3930  *   Pointer to the dev_flow.
3931  * @param[out] error
3932  *   pointer to error structure.
3933  *
3934  * @return
3935  *   0 on success otherwise -errno and errno is set.
3936  */
3937 static int
3938 flow_dv_port_id_action_resource_register
3939                         (struct rte_eth_dev *dev,
3940                          struct mlx5_flow_dv_port_id_action_resource *ref,
3941                          struct mlx5_flow *dev_flow,
3942                          struct rte_flow_error *error)
3943 {
3944         struct mlx5_priv *priv = dev->data->dev_private;
3945         struct mlx5_list_entry *entry;
3946         struct mlx5_flow_dv_port_id_action_resource *resource;
3947         struct mlx5_flow_cb_ctx ctx = {
3948                 .error = error,
3949                 .data = ref,
3950         };
3951
3952         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3953         if (!entry)
3954                 return -rte_errno;
3955         resource = container_of(entry, typeof(*resource), entry);
3956         dev_flow->dv.port_id_action = resource;
3957         dev_flow->handle->rix_port_id_action = resource->idx;
3958         return 0;
3959 }
3960
3961 int
3962 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3963                            struct mlx5_list_entry *entry, void *cb_ctx)
3964 {
3965         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3966         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3967         struct mlx5_flow_dv_push_vlan_action_resource *res =
3968                                        container_of(entry, typeof(*res), entry);
3969
3970         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3971 }
3972
3973 struct mlx5_list_entry *
3974 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3975 {
3976         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3977         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3978         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3979         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3980         struct mlx5dv_dr_domain *domain;
3981         uint32_t idx;
3982         int ret;
3983
3984         /* Register new port id action resource. */
3985         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3986         if (!resource) {
3987                 rte_flow_error_set(ctx->error, ENOMEM,
3988                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3989                                    "cannot allocate push_vlan action memory");
3990                 return NULL;
3991         }
3992         *resource = *ref;
3993         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3994                 domain = sh->fdb_domain;
3995         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3996                 domain = sh->rx_domain;
3997         else
3998                 domain = sh->tx_domain;
3999         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
4000                                                         &resource->action);
4001         if (ret) {
4002                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
4003                 rte_flow_error_set(ctx->error, ENOMEM,
4004                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4005                                    "cannot create push vlan action");
4006                 return NULL;
4007         }
4008         resource->idx = idx;
4009         return &resource->entry;
4010 }
4011
4012 struct mlx5_list_entry *
4013 flow_dv_push_vlan_clone_cb(void *tool_ctx,
4014                            struct mlx5_list_entry *entry __rte_unused,
4015                            void *cb_ctx)
4016 {
4017         struct mlx5_dev_ctx_shared *sh = tool_ctx;
4018         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4019         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4020         uint32_t idx;
4021
4022         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
4023         if (!resource) {
4024                 rte_flow_error_set(ctx->error, ENOMEM,
4025                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4026                                    "cannot allocate push_vlan action memory");
4027                 return NULL;
4028         }
4029         memcpy(resource, entry, sizeof(*resource));
4030         resource->idx = idx;
4031         return &resource->entry;
4032 }
4033
4034 void
4035 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4036 {
4037         struct mlx5_dev_ctx_shared *sh = tool_ctx;
4038         struct mlx5_flow_dv_push_vlan_action_resource *resource =
4039                                   container_of(entry, typeof(*resource), entry);
4040
4041         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
4042 }
4043
4044 /**
4045  * Find existing push vlan resource or create and register a new one.
4046  *
4047  * @param [in, out] dev
4048  *   Pointer to rte_eth_dev structure.
4049  * @param[in, out] ref
4050  *   Pointer to port ID action resource reference.
4051  * @parm[in, out] dev_flow
4052  *   Pointer to the dev_flow.
4053  * @param[out] error
4054  *   pointer to error structure.
4055  *
4056  * @return
4057  *   0 on success otherwise -errno and errno is set.
4058  */
4059 static int
4060 flow_dv_push_vlan_action_resource_register
4061                        (struct rte_eth_dev *dev,
4062                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4063                         struct mlx5_flow *dev_flow,
4064                         struct rte_flow_error *error)
4065 {
4066         struct mlx5_priv *priv = dev->data->dev_private;
4067         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4068         struct mlx5_list_entry *entry;
4069         struct mlx5_flow_cb_ctx ctx = {
4070                 .error = error,
4071                 .data = ref,
4072         };
4073
4074         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4075         if (!entry)
4076                 return -rte_errno;
4077         resource = container_of(entry, typeof(*resource), entry);
4078
4079         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4080         dev_flow->dv.push_vlan_res = resource;
4081         return 0;
4082 }
4083
4084 /**
4085  * Get the size of specific rte_flow_item_type hdr size
4086  *
4087  * @param[in] item_type
4088  *   Tested rte_flow_item_type.
4089  *
4090  * @return
4091  *   sizeof struct item_type, 0 if void or irrelevant.
4092  */
4093 static size_t
4094 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4095 {
4096         size_t retval;
4097
4098         switch (item_type) {
4099         case RTE_FLOW_ITEM_TYPE_ETH:
4100                 retval = sizeof(struct rte_ether_hdr);
4101                 break;
4102         case RTE_FLOW_ITEM_TYPE_VLAN:
4103                 retval = sizeof(struct rte_vlan_hdr);
4104                 break;
4105         case RTE_FLOW_ITEM_TYPE_IPV4:
4106                 retval = sizeof(struct rte_ipv4_hdr);
4107                 break;
4108         case RTE_FLOW_ITEM_TYPE_IPV6:
4109                 retval = sizeof(struct rte_ipv6_hdr);
4110                 break;
4111         case RTE_FLOW_ITEM_TYPE_UDP:
4112                 retval = sizeof(struct rte_udp_hdr);
4113                 break;
4114         case RTE_FLOW_ITEM_TYPE_TCP:
4115                 retval = sizeof(struct rte_tcp_hdr);
4116                 break;
4117         case RTE_FLOW_ITEM_TYPE_VXLAN:
4118         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4119                 retval = sizeof(struct rte_vxlan_hdr);
4120                 break;
4121         case RTE_FLOW_ITEM_TYPE_GRE:
4122         case RTE_FLOW_ITEM_TYPE_NVGRE:
4123                 retval = sizeof(struct rte_gre_hdr);
4124                 break;
4125         case RTE_FLOW_ITEM_TYPE_MPLS:
4126                 retval = sizeof(struct rte_mpls_hdr);
4127                 break;
4128         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4129         default:
4130                 retval = 0;
4131                 break;
4132         }
4133         return retval;
4134 }
4135
4136 #define MLX5_ENCAP_IPV4_VERSION         0x40
4137 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4138 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4139 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4140 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4141 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4142 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4143
4144 /**
4145  * Convert the encap action data from list of rte_flow_item to raw buffer
4146  *
4147  * @param[in] items
4148  *   Pointer to rte_flow_item objects list.
4149  * @param[out] buf
4150  *   Pointer to the output buffer.
4151  * @param[out] size
4152  *   Pointer to the output buffer size.
4153  * @param[out] error
4154  *   Pointer to the error structure.
4155  *
4156  * @return
4157  *   0 on success, a negative errno value otherwise and rte_errno is set.
4158  */
4159 static int
4160 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4161                            size_t *size, struct rte_flow_error *error)
4162 {
4163         struct rte_ether_hdr *eth = NULL;
4164         struct rte_vlan_hdr *vlan = NULL;
4165         struct rte_ipv4_hdr *ipv4 = NULL;
4166         struct rte_ipv6_hdr *ipv6 = NULL;
4167         struct rte_udp_hdr *udp = NULL;
4168         struct rte_vxlan_hdr *vxlan = NULL;
4169         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4170         struct rte_gre_hdr *gre = NULL;
4171         size_t len;
4172         size_t temp_size = 0;
4173
4174         if (!items)
4175                 return rte_flow_error_set(error, EINVAL,
4176                                           RTE_FLOW_ERROR_TYPE_ACTION,
4177                                           NULL, "invalid empty data");
4178         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4179                 len = flow_dv_get_item_hdr_len(items->type);
4180                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4181                         return rte_flow_error_set(error, EINVAL,
4182                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4183                                                   (void *)items->type,
4184                                                   "items total size is too big"
4185                                                   " for encap action");
4186                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4187                 switch (items->type) {
4188                 case RTE_FLOW_ITEM_TYPE_ETH:
4189                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4190                         break;
4191                 case RTE_FLOW_ITEM_TYPE_VLAN:
4192                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4193                         if (!eth)
4194                                 return rte_flow_error_set(error, EINVAL,
4195                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4196                                                 (void *)items->type,
4197                                                 "eth header not found");
4198                         if (!eth->ether_type)
4199                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4200                         break;
4201                 case RTE_FLOW_ITEM_TYPE_IPV4:
4202                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4203                         if (!vlan && !eth)
4204                                 return rte_flow_error_set(error, EINVAL,
4205                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4206                                                 (void *)items->type,
4207                                                 "neither eth nor vlan"
4208                                                 " header found");
4209                         if (vlan && !vlan->eth_proto)
4210                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4211                         else if (eth && !eth->ether_type)
4212                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4213                         if (!ipv4->version_ihl)
4214                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4215                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4216                         if (!ipv4->time_to_live)
4217                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4218                         break;
4219                 case RTE_FLOW_ITEM_TYPE_IPV6:
4220                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4221                         if (!vlan && !eth)
4222                                 return rte_flow_error_set(error, EINVAL,
4223                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4224                                                 (void *)items->type,
4225                                                 "neither eth nor vlan"
4226                                                 " header found");
4227                         if (vlan && !vlan->eth_proto)
4228                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4229                         else if (eth && !eth->ether_type)
4230                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4231                         if (!ipv6->vtc_flow)
4232                                 ipv6->vtc_flow =
4233                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4234                         if (!ipv6->hop_limits)
4235                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4236                         break;
4237                 case RTE_FLOW_ITEM_TYPE_UDP:
4238                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4239                         if (!ipv4 && !ipv6)
4240                                 return rte_flow_error_set(error, EINVAL,
4241                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4242                                                 (void *)items->type,
4243                                                 "ip header not found");
4244                         if (ipv4 && !ipv4->next_proto_id)
4245                                 ipv4->next_proto_id = IPPROTO_UDP;
4246                         else if (ipv6 && !ipv6->proto)
4247                                 ipv6->proto = IPPROTO_UDP;
4248                         break;
4249                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4250                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4251                         if (!udp)
4252                                 return rte_flow_error_set(error, EINVAL,
4253                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4254                                                 (void *)items->type,
4255                                                 "udp header not found");
4256                         if (!udp->dst_port)
4257                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4258                         if (!vxlan->vx_flags)
4259                                 vxlan->vx_flags =
4260                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4261                         break;
4262                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4263                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4264                         if (!udp)
4265                                 return rte_flow_error_set(error, EINVAL,
4266                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4267                                                 (void *)items->type,
4268                                                 "udp header not found");
4269                         if (!vxlan_gpe->proto)
4270                                 return rte_flow_error_set(error, EINVAL,
4271                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4272                                                 (void *)items->type,
4273                                                 "next protocol not found");
4274                         if (!udp->dst_port)
4275                                 udp->dst_port =
4276                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4277                         if (!vxlan_gpe->vx_flags)
4278                                 vxlan_gpe->vx_flags =
4279                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4280                         break;
4281                 case RTE_FLOW_ITEM_TYPE_GRE:
4282                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4283                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4284                         if (!gre->proto)
4285                                 return rte_flow_error_set(error, EINVAL,
4286                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4287                                                 (void *)items->type,
4288                                                 "next protocol not found");
4289                         if (!ipv4 && !ipv6)
4290                                 return rte_flow_error_set(error, EINVAL,
4291                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4292                                                 (void *)items->type,
4293                                                 "ip header not found");
4294                         if (ipv4 && !ipv4->next_proto_id)
4295                                 ipv4->next_proto_id = IPPROTO_GRE;
4296                         else if (ipv6 && !ipv6->proto)
4297                                 ipv6->proto = IPPROTO_GRE;
4298                         break;
4299                 case RTE_FLOW_ITEM_TYPE_VOID:
4300                         break;
4301                 default:
4302                         return rte_flow_error_set(error, EINVAL,
4303                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4304                                                   (void *)items->type,
4305                                                   "unsupported item type");
4306                         break;
4307                 }
4308                 temp_size += len;
4309         }
4310         *size = temp_size;
4311         return 0;
4312 }
4313
4314 static int
4315 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4316 {
4317         struct rte_ether_hdr *eth = NULL;
4318         struct rte_vlan_hdr *vlan = NULL;
4319         struct rte_ipv6_hdr *ipv6 = NULL;
4320         struct rte_udp_hdr *udp = NULL;
4321         char *next_hdr;
4322         uint16_t proto;
4323
4324         eth = (struct rte_ether_hdr *)data;
4325         next_hdr = (char *)(eth + 1);
4326         proto = RTE_BE16(eth->ether_type);
4327
4328         /* VLAN skipping */
4329         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4330                 vlan = (struct rte_vlan_hdr *)next_hdr;
4331                 proto = RTE_BE16(vlan->eth_proto);
4332                 next_hdr += sizeof(struct rte_vlan_hdr);
4333         }
4334
4335         /* HW calculates IPv4 csum. no need to proceed */
4336         if (proto == RTE_ETHER_TYPE_IPV4)
4337                 return 0;
4338
4339         /* non IPv4/IPv6 header. not supported */
4340         if (proto != RTE_ETHER_TYPE_IPV6) {
4341                 return rte_flow_error_set(error, ENOTSUP,
4342                                           RTE_FLOW_ERROR_TYPE_ACTION,
4343                                           NULL, "Cannot offload non IPv4/IPv6");
4344         }
4345
4346         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4347
4348         /* ignore non UDP */
4349         if (ipv6->proto != IPPROTO_UDP)
4350                 return 0;
4351
4352         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4353         udp->dgram_cksum = 0;
4354
4355         return 0;
4356 }
4357
4358 /**
4359  * Convert L2 encap action to DV specification.
4360  *
4361  * @param[in] dev
4362  *   Pointer to rte_eth_dev structure.
4363  * @param[in] action
4364  *   Pointer to action structure.
4365  * @param[in, out] dev_flow
4366  *   Pointer to the mlx5_flow.
4367  * @param[in] transfer
4368  *   Mark if the flow is E-Switch flow.
4369  * @param[out] error
4370  *   Pointer to the error structure.
4371  *
4372  * @return
4373  *   0 on success, a negative errno value otherwise and rte_errno is set.
4374  */
4375 static int
4376 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4377                                const struct rte_flow_action *action,
4378                                struct mlx5_flow *dev_flow,
4379                                uint8_t transfer,
4380                                struct rte_flow_error *error)
4381 {
4382         const struct rte_flow_item *encap_data;
4383         const struct rte_flow_action_raw_encap *raw_encap_data;
4384         struct mlx5_flow_dv_encap_decap_resource res = {
4385                 .reformat_type =
4386                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4387                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4388                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4389         };
4390
4391         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4392                 raw_encap_data =
4393                         (const struct rte_flow_action_raw_encap *)action->conf;
4394                 res.size = raw_encap_data->size;
4395                 memcpy(res.buf, raw_encap_data->data, res.size);
4396         } else {
4397                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4398                         encap_data =
4399                                 ((const struct rte_flow_action_vxlan_encap *)
4400                                                 action->conf)->definition;
4401                 else
4402                         encap_data =
4403                                 ((const struct rte_flow_action_nvgre_encap *)
4404                                                 action->conf)->definition;
4405                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4406                                                &res.size, error))
4407                         return -rte_errno;
4408         }
4409         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4410                 return -rte_errno;
4411         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4412                 return rte_flow_error_set(error, EINVAL,
4413                                           RTE_FLOW_ERROR_TYPE_ACTION,
4414                                           NULL, "can't create L2 encap action");
4415         return 0;
4416 }
4417
4418 /**
4419  * Convert L2 decap action to DV specification.
4420  *
4421  * @param[in] dev
4422  *   Pointer to rte_eth_dev structure.
4423  * @param[in, out] dev_flow
4424  *   Pointer to the mlx5_flow.
4425  * @param[in] transfer
4426  *   Mark if the flow is E-Switch flow.
4427  * @param[out] error
4428  *   Pointer to the error structure.
4429  *
4430  * @return
4431  *   0 on success, a negative errno value otherwise and rte_errno is set.
4432  */
4433 static int
4434 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4435                                struct mlx5_flow *dev_flow,
4436                                uint8_t transfer,
4437                                struct rte_flow_error *error)
4438 {
4439         struct mlx5_flow_dv_encap_decap_resource res = {
4440                 .size = 0,
4441                 .reformat_type =
4442                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4443                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4444                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4445         };
4446
4447         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4448                 return rte_flow_error_set(error, EINVAL,
4449                                           RTE_FLOW_ERROR_TYPE_ACTION,
4450                                           NULL, "can't create L2 decap action");
4451         return 0;
4452 }
4453
4454 /**
4455  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4456  *
4457  * @param[in] dev
4458  *   Pointer to rte_eth_dev structure.
4459  * @param[in] action
4460  *   Pointer to action structure.
4461  * @param[in, out] dev_flow
4462  *   Pointer to the mlx5_flow.
4463  * @param[in] attr
4464  *   Pointer to the flow attributes.
4465  * @param[out] error
4466  *   Pointer to the error structure.
4467  *
4468  * @return
4469  *   0 on success, a negative errno value otherwise and rte_errno is set.
4470  */
4471 static int
4472 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4473                                 const struct rte_flow_action *action,
4474                                 struct mlx5_flow *dev_flow,
4475                                 const struct rte_flow_attr *attr,
4476                                 struct rte_flow_error *error)
4477 {
4478         const struct rte_flow_action_raw_encap *encap_data;
4479         struct mlx5_flow_dv_encap_decap_resource res;
4480
4481         memset(&res, 0, sizeof(res));
4482         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4483         res.size = encap_data->size;
4484         memcpy(res.buf, encap_data->data, res.size);
4485         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4486                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4487                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4488         if (attr->transfer)
4489                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4490         else
4491                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4492                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4493         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4494                 return rte_flow_error_set(error, EINVAL,
4495                                           RTE_FLOW_ERROR_TYPE_ACTION,
4496                                           NULL, "can't create encap action");
4497         return 0;
4498 }
4499
4500 /**
4501  * Create action push VLAN.
4502  *
4503  * @param[in] dev
4504  *   Pointer to rte_eth_dev structure.
4505  * @param[in] attr
4506  *   Pointer to the flow attributes.
4507  * @param[in] vlan
4508  *   Pointer to the vlan to push to the Ethernet header.
4509  * @param[in, out] dev_flow
4510  *   Pointer to the mlx5_flow.
4511  * @param[out] error
4512  *   Pointer to the error structure.
4513  *
4514  * @return
4515  *   0 on success, a negative errno value otherwise and rte_errno is set.
4516  */
4517 static int
4518 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4519                                 const struct rte_flow_attr *attr,
4520                                 const struct rte_vlan_hdr *vlan,
4521                                 struct mlx5_flow *dev_flow,
4522                                 struct rte_flow_error *error)
4523 {
4524         struct mlx5_flow_dv_push_vlan_action_resource res;
4525
4526         memset(&res, 0, sizeof(res));
4527         res.vlan_tag =
4528                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4529                                  vlan->vlan_tci);
4530         if (attr->transfer)
4531                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4532         else
4533                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4534                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4535         return flow_dv_push_vlan_action_resource_register
4536                                             (dev, &res, dev_flow, error);
4537 }
4538
4539 /**
4540  * Validate the modify-header actions.
4541  *
4542  * @param[in] action_flags
4543  *   Holds the actions detected until now.
4544  * @param[in] action
4545  *   Pointer to the modify action.
4546  * @param[out] error
4547  *   Pointer to error structure.
4548  *
4549  * @return
4550  *   0 on success, a negative errno value otherwise and rte_errno is set.
4551  */
4552 static int
4553 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4554                                    const struct rte_flow_action *action,
4555                                    struct rte_flow_error *error)
4556 {
4557         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4558                 return rte_flow_error_set(error, EINVAL,
4559                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4560                                           NULL, "action configuration not set");
4561         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4562                 return rte_flow_error_set(error, EINVAL,
4563                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4564                                           "can't have encap action before"
4565                                           " modify action");
4566         return 0;
4567 }
4568
4569 /**
4570  * Validate the modify-header MAC address actions.
4571  *
4572  * @param[in] action_flags
4573  *   Holds the actions detected until now.
4574  * @param[in] action
4575  *   Pointer to the modify action.
4576  * @param[in] item_flags
4577  *   Holds the items detected.
4578  * @param[out] error
4579  *   Pointer to error structure.
4580  *
4581  * @return
4582  *   0 on success, a negative errno value otherwise and rte_errno is set.
4583  */
4584 static int
4585 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4586                                    const struct rte_flow_action *action,
4587                                    const uint64_t item_flags,
4588                                    struct rte_flow_error *error)
4589 {
4590         int ret = 0;
4591
4592         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4593         if (!ret) {
4594                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4595                         return rte_flow_error_set(error, EINVAL,
4596                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4597                                                   NULL,
4598                                                   "no L2 item in pattern");
4599         }
4600         return ret;
4601 }
4602
4603 /**
4604  * Validate the modify-header IPv4 address actions.
4605  *
4606  * @param[in] action_flags
4607  *   Holds the actions detected until now.
4608  * @param[in] action
4609  *   Pointer to the modify action.
4610  * @param[in] item_flags
4611  *   Holds the items detected.
4612  * @param[out] error
4613  *   Pointer to error structure.
4614  *
4615  * @return
4616  *   0 on success, a negative errno value otherwise and rte_errno is set.
4617  */
4618 static int
4619 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4620                                     const struct rte_flow_action *action,
4621                                     const uint64_t item_flags,
4622                                     struct rte_flow_error *error)
4623 {
4624         int ret = 0;
4625         uint64_t layer;
4626
4627         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4628         if (!ret) {
4629                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4630                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4631                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4632                 if (!(item_flags & layer))
4633                         return rte_flow_error_set(error, EINVAL,
4634                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4635                                                   NULL,
4636                                                   "no ipv4 item in pattern");
4637         }
4638         return ret;
4639 }
4640
4641 /**
4642  * Validate the modify-header IPv6 address actions.
4643  *
4644  * @param[in] action_flags
4645  *   Holds the actions detected until now.
4646  * @param[in] action
4647  *   Pointer to the modify action.
4648  * @param[in] item_flags
4649  *   Holds the items detected.
4650  * @param[out] error
4651  *   Pointer to error structure.
4652  *
4653  * @return
4654  *   0 on success, a negative errno value otherwise and rte_errno is set.
4655  */
4656 static int
4657 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4658                                     const struct rte_flow_action *action,
4659                                     const uint64_t item_flags,
4660                                     struct rte_flow_error *error)
4661 {
4662         int ret = 0;
4663         uint64_t layer;
4664
4665         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4666         if (!ret) {
4667                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4668                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4669                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4670                 if (!(item_flags & layer))
4671                         return rte_flow_error_set(error, EINVAL,
4672                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4673                                                   NULL,
4674                                                   "no ipv6 item in pattern");
4675         }
4676         return ret;
4677 }
4678
4679 /**
4680  * Validate the modify-header TP actions.
4681  *
4682  * @param[in] action_flags
4683  *   Holds the actions detected until now.
4684  * @param[in] action
4685  *   Pointer to the modify action.
4686  * @param[in] item_flags
4687  *   Holds the items detected.
4688  * @param[out] error
4689  *   Pointer to error structure.
4690  *
4691  * @return
4692  *   0 on success, a negative errno value otherwise and rte_errno is set.
4693  */
4694 static int
4695 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4696                                   const struct rte_flow_action *action,
4697                                   const uint64_t item_flags,
4698                                   struct rte_flow_error *error)
4699 {
4700         int ret = 0;
4701         uint64_t layer;
4702
4703         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4704         if (!ret) {
4705                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4706                                  MLX5_FLOW_LAYER_INNER_L4 :
4707                                  MLX5_FLOW_LAYER_OUTER_L4;
4708                 if (!(item_flags & layer))
4709                         return rte_flow_error_set(error, EINVAL,
4710                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4711                                                   NULL, "no transport layer "
4712                                                   "in pattern");
4713         }
4714         return ret;
4715 }
4716
4717 /**
4718  * Validate the modify-header actions of increment/decrement
4719  * TCP Sequence-number.
4720  *
4721  * @param[in] action_flags
4722  *   Holds the actions detected until now.
4723  * @param[in] action
4724  *   Pointer to the modify action.
4725  * @param[in] item_flags
4726  *   Holds the items detected.
4727  * @param[out] error
4728  *   Pointer to error structure.
4729  *
4730  * @return
4731  *   0 on success, a negative errno value otherwise and rte_errno is set.
4732  */
4733 static int
4734 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4735                                        const struct rte_flow_action *action,
4736                                        const uint64_t item_flags,
4737                                        struct rte_flow_error *error)
4738 {
4739         int ret = 0;
4740         uint64_t layer;
4741
4742         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4743         if (!ret) {
4744                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4745                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4746                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4747                 if (!(item_flags & layer))
4748                         return rte_flow_error_set(error, EINVAL,
4749                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4750                                                   NULL, "no TCP item in"
4751                                                   " pattern");
4752                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4753                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4754                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4755                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4756                         return rte_flow_error_set(error, EINVAL,
4757                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4758                                                   NULL,
4759                                                   "cannot decrease and increase"
4760                                                   " TCP sequence number"
4761                                                   " at the same time");
4762         }
4763         return ret;
4764 }
4765
4766 /**
4767  * Validate the modify-header actions of increment/decrement
4768  * TCP Acknowledgment number.
4769  *
4770  * @param[in] action_flags
4771  *   Holds the actions detected until now.
4772  * @param[in] action
4773  *   Pointer to the modify action.
4774  * @param[in] item_flags
4775  *   Holds the items detected.
4776  * @param[out] error
4777  *   Pointer to error structure.
4778  *
4779  * @return
4780  *   0 on success, a negative errno value otherwise and rte_errno is set.
4781  */
4782 static int
4783 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4784                                        const struct rte_flow_action *action,
4785                                        const uint64_t item_flags,
4786                                        struct rte_flow_error *error)
4787 {
4788         int ret = 0;
4789         uint64_t layer;
4790
4791         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4792         if (!ret) {
4793                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4794                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4795                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4796                 if (!(item_flags & layer))
4797                         return rte_flow_error_set(error, EINVAL,
4798                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4799                                                   NULL, "no TCP item in"
4800                                                   " pattern");
4801                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4802                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4803                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4804                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4805                         return rte_flow_error_set(error, EINVAL,
4806                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4807                                                   NULL,
4808                                                   "cannot decrease and increase"
4809                                                   " TCP acknowledgment number"
4810                                                   " at the same time");
4811         }
4812         return ret;
4813 }
4814
4815 /**
4816  * Validate the modify-header TTL actions.
4817  *
4818  * @param[in] action_flags
4819  *   Holds the actions detected until now.
4820  * @param[in] action
4821  *   Pointer to the modify action.
4822  * @param[in] item_flags
4823  *   Holds the items detected.
4824  * @param[out] error
4825  *   Pointer to error structure.
4826  *
4827  * @return
4828  *   0 on success, a negative errno value otherwise and rte_errno is set.
4829  */
4830 static int
4831 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4832                                    const struct rte_flow_action *action,
4833                                    const uint64_t item_flags,
4834                                    struct rte_flow_error *error)
4835 {
4836         int ret = 0;
4837         uint64_t layer;
4838
4839         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4840         if (!ret) {
4841                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4842                                  MLX5_FLOW_LAYER_INNER_L3 :
4843                                  MLX5_FLOW_LAYER_OUTER_L3;
4844                 if (!(item_flags & layer))
4845                         return rte_flow_error_set(error, EINVAL,
4846                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4847                                                   NULL,
4848                                                   "no IP protocol in pattern");
4849         }
4850         return ret;
4851 }
4852
4853 /**
4854  * Validate the generic modify field actions.
4855  * @param[in] dev
4856  *   Pointer to the rte_eth_dev structure.
4857  * @param[in] action_flags
4858  *   Holds the actions detected until now.
4859  * @param[in] action
4860  *   Pointer to the modify action.
4861  * @param[in] attr
4862  *   Pointer to the flow attributes.
4863  * @param[out] error
4864  *   Pointer to error structure.
4865  *
4866  * @return
4867  *   Number of header fields to modify (0 or more) on success,
4868  *   a negative errno value otherwise and rte_errno is set.
4869  */
4870 static int
4871 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4872                                    const uint64_t action_flags,
4873                                    const struct rte_flow_action *action,
4874                                    const struct rte_flow_attr *attr,
4875                                    struct rte_flow_error *error)
4876 {
4877         int ret = 0;
4878         struct mlx5_priv *priv = dev->data->dev_private;
4879         struct mlx5_dev_config *config = &priv->config;
4880         const struct rte_flow_action_modify_field *action_modify_field =
4881                 action->conf;
4882         uint32_t dst_width = mlx5_flow_item_field_width(priv,
4883                                 action_modify_field->dst.field);
4884         uint32_t src_width = mlx5_flow_item_field_width(priv,
4885                                 action_modify_field->src.field);
4886
4887         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4888         if (ret)
4889                 return ret;
4890
4891         if (action_modify_field->width == 0)
4892                 return rte_flow_error_set(error, EINVAL,
4893                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4894                                 "no bits are requested to be modified");
4895         else if (action_modify_field->width > dst_width ||
4896                  action_modify_field->width > src_width)
4897                 return rte_flow_error_set(error, EINVAL,
4898                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4899                                 "cannot modify more bits than"
4900                                 " the width of a field");
4901         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4902             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4903                 if ((action_modify_field->dst.offset +
4904                      action_modify_field->width > dst_width) ||
4905                     (action_modify_field->dst.offset % 32))
4906                         return rte_flow_error_set(error, EINVAL,
4907                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4908                                         "destination offset is too big"
4909                                         " or not aligned to 4 bytes");
4910                 if (action_modify_field->dst.level &&
4911                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4912                         return rte_flow_error_set(error, ENOTSUP,
4913                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4914                                         "inner header fields modification"
4915                                         " is not supported");
4916         }
4917         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4918             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4919                 if (!attr->transfer && !attr->group)
4920                         return rte_flow_error_set(error, ENOTSUP,
4921                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4922                                         "modify field action is not"
4923                                         " supported for group 0");
4924                 if ((action_modify_field->src.offset +
4925                      action_modify_field->width > src_width) ||
4926                     (action_modify_field->src.offset % 32))
4927                         return rte_flow_error_set(error, EINVAL,
4928                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4929                                         "source offset is too big"
4930                                         " or not aligned to 4 bytes");
4931                 if (action_modify_field->src.level &&
4932                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4933                         return rte_flow_error_set(error, ENOTSUP,
4934                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4935                                         "inner header fields modification"
4936                                         " is not supported");
4937         }
4938         if ((action_modify_field->dst.field ==
4939              action_modify_field->src.field) &&
4940             (action_modify_field->dst.level ==
4941              action_modify_field->src.level))
4942                 return rte_flow_error_set(error, EINVAL,
4943                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4944                                 "source and destination fields"
4945                                 " cannot be the same");
4946         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4947             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4948             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4949                 return rte_flow_error_set(error, EINVAL,
4950                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4951                                 "mark, immediate value or a pointer to it"
4952                                 " cannot be used as a destination");
4953         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4954             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4955                 return rte_flow_error_set(error, ENOTSUP,
4956                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4957                                 "modifications of an arbitrary"
4958                                 " place in a packet is not supported");
4959         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4960             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4961                 return rte_flow_error_set(error, ENOTSUP,
4962                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4963                                 "modifications of the 802.1Q Tag"
4964                                 " Identifier is not supported");
4965         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4966             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4967                 return rte_flow_error_set(error, ENOTSUP,
4968                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4969                                 "modifications of the VXLAN Network"
4970                                 " Identifier is not supported");
4971         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4972             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4973                 return rte_flow_error_set(error, ENOTSUP,
4974                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4975                                 "modifications of the GENEVE Network"
4976                                 " Identifier is not supported");
4977         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4978             action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4979             action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4980             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4981                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4982                     !mlx5_flow_ext_mreg_supported(dev))
4983                         return rte_flow_error_set(error, ENOTSUP,
4984                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4985                                         "cannot modify mark or metadata without"
4986                                         " extended metadata register support");
4987         }
4988         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4989                 return rte_flow_error_set(error, ENOTSUP,
4990                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4991                                 "add and sub operations"
4992                                 " are not supported");
4993         return (action_modify_field->width / 32) +
4994                !!(action_modify_field->width % 32);
4995 }
4996
4997 /**
4998  * Validate jump action.
4999  *
5000  * @param[in] action
5001  *   Pointer to the jump action.
5002  * @param[in] action_flags
5003  *   Holds the actions detected until now.
5004  * @param[in] attributes
5005  *   Pointer to flow attributes
5006  * @param[in] external
5007  *   Action belongs to flow rule created by request external to PMD.
5008  * @param[out] error
5009  *   Pointer to error structure.
5010  *
5011  * @return
5012  *   0 on success, a negative errno value otherwise and rte_errno is set.
5013  */
5014 static int
5015 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
5016                              const struct mlx5_flow_tunnel *tunnel,
5017                              const struct rte_flow_action *action,
5018                              uint64_t action_flags,
5019                              const struct rte_flow_attr *attributes,
5020                              bool external, struct rte_flow_error *error)
5021 {
5022         uint32_t target_group, table;
5023         int ret = 0;
5024         struct flow_grp_info grp_info = {
5025                 .external = !!external,
5026                 .transfer = !!attributes->transfer,
5027                 .fdb_def_rule = 1,
5028                 .std_tbl_fix = 0
5029         };
5030         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5031                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5032                 return rte_flow_error_set(error, EINVAL,
5033                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5034                                           "can't have 2 fate actions in"
5035                                           " same flow");
5036         if (!action->conf)
5037                 return rte_flow_error_set(error, EINVAL,
5038                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5039                                           NULL, "action configuration not set");
5040         target_group =
5041                 ((const struct rte_flow_action_jump *)action->conf)->group;
5042         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5043                                        &grp_info, error);
5044         if (ret)
5045                 return ret;
5046         if (attributes->group == target_group &&
5047             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5048                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5049                 return rte_flow_error_set(error, EINVAL,
5050                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5051                                           "target group must be other than"
5052                                           " the current flow group");
5053         return 0;
5054 }
5055
5056 /*
5057  * Validate the port_id action.
5058  *
5059  * @param[in] dev
5060  *   Pointer to rte_eth_dev structure.
5061  * @param[in] action_flags
5062  *   Bit-fields that holds the actions detected until now.
5063  * @param[in] action
5064  *   Port_id RTE action structure.
5065  * @param[in] attr
5066  *   Attributes of flow that includes this action.
5067  * @param[out] error
5068  *   Pointer to error structure.
5069  *
5070  * @return
5071  *   0 on success, a negative errno value otherwise and rte_errno is set.
5072  */
5073 static int
5074 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5075                                 uint64_t action_flags,
5076                                 const struct rte_flow_action *action,
5077                                 const struct rte_flow_attr *attr,
5078                                 struct rte_flow_error *error)
5079 {
5080         const struct rte_flow_action_port_id *port_id;
5081         struct mlx5_priv *act_priv;
5082         struct mlx5_priv *dev_priv;
5083         uint16_t port;
5084
5085         if (!attr->transfer)
5086                 return rte_flow_error_set(error, ENOTSUP,
5087                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5088                                           NULL,
5089                                           "port id action is valid in transfer"
5090                                           " mode only");
5091         if (!action || !action->conf)
5092                 return rte_flow_error_set(error, ENOTSUP,
5093                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5094                                           NULL,
5095                                           "port id action parameters must be"
5096                                           " specified");
5097         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5098                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5099                 return rte_flow_error_set(error, EINVAL,
5100                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5101                                           "can have only one fate actions in"
5102                                           " a flow");
5103         dev_priv = mlx5_dev_to_eswitch_info(dev);
5104         if (!dev_priv)
5105                 return rte_flow_error_set(error, rte_errno,
5106                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5107                                           NULL,
5108                                           "failed to obtain E-Switch info");
5109         port_id = action->conf;
5110         port = port_id->original ? dev->data->port_id : port_id->id;
5111         act_priv = mlx5_port_to_eswitch_info(port, false);
5112         if (!act_priv)
5113                 return rte_flow_error_set
5114                                 (error, rte_errno,
5115                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
5116                                  "failed to obtain E-Switch port id for port");
5117         if (act_priv->domain_id != dev_priv->domain_id)
5118                 return rte_flow_error_set
5119                                 (error, EINVAL,
5120                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5121                                  "port does not belong to"
5122                                  " E-Switch being configured");
5123         return 0;
5124 }
5125
5126 /**
5127  * Get the maximum number of modify header actions.
5128  *
5129  * @param dev
5130  *   Pointer to rte_eth_dev structure.
5131  * @param root
5132  *   Whether action is on root table.
5133  *
5134  * @return
5135  *   Max number of modify header actions device can support.
5136  */
5137 static inline unsigned int
5138 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5139                               bool root)
5140 {
5141         /*
5142          * There's no way to directly query the max capacity from FW.
5143          * The maximal value on root table should be assumed to be supported.
5144          */
5145         if (!root)
5146                 return MLX5_MAX_MODIFY_NUM;
5147         else
5148                 return MLX5_ROOT_TBL_MODIFY_NUM;
5149 }
5150
5151 /**
5152  * Validate the meter action.
5153  *
5154  * @param[in] dev
5155  *   Pointer to rte_eth_dev structure.
5156  * @param[in] action_flags
5157  *   Bit-fields that holds the actions detected until now.
5158  * @param[in] action
5159  *   Pointer to the meter action.
5160  * @param[in] attr
5161  *   Attributes of flow that includes this action.
5162  * @param[in] port_id_item
5163  *   Pointer to item indicating port id.
5164  * @param[out] error
5165  *   Pointer to error structure.
5166  *
5167  * @return
5168  *   0 on success, a negative errno value otherwise and rte_ernno is set.
5169  */
5170 static int
5171 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5172                                 uint64_t action_flags,
5173                                 const struct rte_flow_action *action,
5174                                 const struct rte_flow_attr *attr,
5175                                 const struct rte_flow_item *port_id_item,
5176                                 bool *def_policy,
5177                                 struct rte_flow_error *error)
5178 {
5179         struct mlx5_priv *priv = dev->data->dev_private;
5180         const struct rte_flow_action_meter *am = action->conf;
5181         struct mlx5_flow_meter_info *fm;
5182         struct mlx5_flow_meter_policy *mtr_policy;
5183         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5184
5185         if (!am)
5186                 return rte_flow_error_set(error, EINVAL,
5187                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5188                                           "meter action conf is NULL");
5189
5190         if (action_flags & MLX5_FLOW_ACTION_METER)
5191                 return rte_flow_error_set(error, ENOTSUP,
5192                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5193                                           "meter chaining not support");
5194         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5195                 return rte_flow_error_set(error, ENOTSUP,
5196                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5197                                           "meter with jump not support");
5198         if (!priv->mtr_en)
5199                 return rte_flow_error_set(error, ENOTSUP,
5200                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5201                                           NULL,
5202                                           "meter action not supported");
5203         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5204         if (!fm)
5205                 return rte_flow_error_set(error, EINVAL,
5206                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5207                                           "Meter not found");
5208         /* aso meter can always be shared by different domains */
5209         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5210             !(fm->transfer == attr->transfer ||
5211               (!fm->ingress && !attr->ingress && attr->egress) ||
5212               (!fm->egress && !attr->egress && attr->ingress)))
5213                 return rte_flow_error_set(error, EINVAL,
5214                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5215                         "Flow attributes domain are either invalid "
5216                         "or have a domain conflict with current "
5217                         "meter attributes");
5218         if (fm->def_policy) {
5219                 if (!((attr->transfer &&
5220                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5221                         (attr->egress &&
5222                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5223                         (attr->ingress &&
5224                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5225                         return rte_flow_error_set(error, EINVAL,
5226                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5227                                           "Flow attributes domain "
5228                                           "have a conflict with current "
5229                                           "meter domain attributes");
5230                 *def_policy = true;
5231         } else {
5232                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5233                                                 fm->policy_id, NULL);
5234                 if (!mtr_policy)
5235                         return rte_flow_error_set(error, EINVAL,
5236                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5237                                           "Invalid policy id for meter ");
5238                 if (!((attr->transfer && mtr_policy->transfer) ||
5239                         (attr->egress && mtr_policy->egress) ||
5240                         (attr->ingress && mtr_policy->ingress)))
5241                         return rte_flow_error_set(error, EINVAL,
5242                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5243                                           "Flow attributes domain "
5244                                           "have a conflict with current "
5245                                           "meter domain attributes");
5246                 if (attr->transfer && mtr_policy->dev) {
5247                         /**
5248                          * When policy has fate action of port_id,
5249                          * the flow should have the same src port as policy.
5250                          */
5251                         struct mlx5_priv *policy_port_priv =
5252                                         mtr_policy->dev->data->dev_private;
5253                         int32_t flow_src_port = priv->representor_id;
5254
5255                         if (port_id_item) {
5256                                 const struct rte_flow_item_port_id *spec =
5257                                                         port_id_item->spec;
5258                                 struct mlx5_priv *port_priv =
5259                                         mlx5_port_to_eswitch_info(spec->id,
5260                                                                   false);
5261                                 if (!port_priv)
5262                                         return rte_flow_error_set(error,
5263                                                 rte_errno,
5264                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5265                                                 spec,
5266                                                 "Failed to get port info.");
5267                                 flow_src_port = port_priv->representor_id;
5268                         }
5269                         if (flow_src_port != policy_port_priv->representor_id)
5270                                 return rte_flow_error_set(error,
5271                                                 rte_errno,
5272                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5273                                                 NULL,
5274                                                 "Flow and meter policy "
5275                                                 "have different src port.");
5276                 }
5277                 *def_policy = false;
5278         }
5279         return 0;
5280 }
5281
5282 /**
5283  * Validate the age action.
5284  *
5285  * @param[in] action_flags
5286  *   Holds the actions detected until now.
5287  * @param[in] action
5288  *   Pointer to the age action.
5289  * @param[in] dev
5290  *   Pointer to the Ethernet device structure.
5291  * @param[out] error
5292  *   Pointer to error structure.
5293  *
5294  * @return
5295  *   0 on success, a negative errno value otherwise and rte_errno is set.
5296  */
5297 static int
5298 flow_dv_validate_action_age(uint64_t action_flags,
5299                             const struct rte_flow_action *action,
5300                             struct rte_eth_dev *dev,
5301                             struct rte_flow_error *error)
5302 {
5303         struct mlx5_priv *priv = dev->data->dev_private;
5304         const struct rte_flow_action_age *age = action->conf;
5305
5306         if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5307             !priv->sh->aso_age_mng))
5308                 return rte_flow_error_set(error, ENOTSUP,
5309                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5310                                           NULL,
5311                                           "age action not supported");
5312         if (!(action->conf))
5313                 return rte_flow_error_set(error, EINVAL,
5314                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5315                                           "configuration cannot be null");
5316         if (!(age->timeout))
5317                 return rte_flow_error_set(error, EINVAL,
5318                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5319                                           "invalid timeout value 0");
5320         if (action_flags & MLX5_FLOW_ACTION_AGE)
5321                 return rte_flow_error_set(error, EINVAL,
5322                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5323                                           "duplicate age actions set");
5324         return 0;
5325 }
5326
5327 /**
5328  * Validate the modify-header IPv4 DSCP actions.
5329  *
5330  * @param[in] action_flags
5331  *   Holds the actions detected until now.
5332  * @param[in] action
5333  *   Pointer to the modify action.
5334  * @param[in] item_flags
5335  *   Holds the items detected.
5336  * @param[out] error
5337  *   Pointer to error structure.
5338  *
5339  * @return
5340  *   0 on success, a negative errno value otherwise and rte_errno is set.
5341  */
5342 static int
5343 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5344                                          const struct rte_flow_action *action,
5345                                          const uint64_t item_flags,
5346                                          struct rte_flow_error *error)
5347 {
5348         int ret = 0;
5349
5350         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5351         if (!ret) {
5352                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5353                         return rte_flow_error_set(error, EINVAL,
5354                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5355                                                   NULL,
5356                                                   "no ipv4 item in pattern");
5357         }
5358         return ret;
5359 }
5360
5361 /**
5362  * Validate the modify-header IPv6 DSCP actions.
5363  *
5364  * @param[in] action_flags
5365  *   Holds the actions detected until now.
5366  * @param[in] action
5367  *   Pointer to the modify action.
5368  * @param[in] item_flags
5369  *   Holds the items detected.
5370  * @param[out] error
5371  *   Pointer to error structure.
5372  *
5373  * @return
5374  *   0 on success, a negative errno value otherwise and rte_errno is set.
5375  */
5376 static int
5377 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5378                                          const struct rte_flow_action *action,
5379                                          const uint64_t item_flags,
5380                                          struct rte_flow_error *error)
5381 {
5382         int ret = 0;
5383
5384         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5385         if (!ret) {
5386                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5387                         return rte_flow_error_set(error, EINVAL,
5388                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5389                                                   NULL,
5390                                                   "no ipv6 item in pattern");
5391         }
5392         return ret;
5393 }
5394
5395 int
5396 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5397                         struct mlx5_list_entry *entry, void *cb_ctx)
5398 {
5399         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5400         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5401         struct mlx5_flow_dv_modify_hdr_resource *resource =
5402                                   container_of(entry, typeof(*resource), entry);
5403         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5404
5405         key_len += ref->actions_num * sizeof(ref->actions[0]);
5406         return ref->actions_num != resource->actions_num ||
5407                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5408 }
5409
5410 static struct mlx5_indexed_pool *
5411 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5412 {
5413         struct mlx5_indexed_pool *ipool = __atomic_load_n
5414                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5415
5416         if (!ipool) {
5417                 struct mlx5_indexed_pool *expected = NULL;
5418                 struct mlx5_indexed_pool_config cfg =
5419                     (struct mlx5_indexed_pool_config) {
5420                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5421                                                                    (index + 1) *
5422                                            sizeof(struct mlx5_modification_cmd),
5423                        .trunk_size = 64,
5424                        .grow_trunk = 3,
5425                        .grow_shift = 2,
5426                        .need_lock = 1,
5427                        .release_mem_en = !!sh->reclaim_mode,
5428                        .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5429                        .malloc = mlx5_malloc,
5430                        .free = mlx5_free,
5431                        .type = "mlx5_modify_action_resource",
5432                 };
5433
5434                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5435                 ipool = mlx5_ipool_create(&cfg);
5436                 if (!ipool)
5437                         return NULL;
5438                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5439                                                  &expected, ipool, false,
5440                                                  __ATOMIC_SEQ_CST,
5441                                                  __ATOMIC_SEQ_CST)) {
5442                         mlx5_ipool_destroy(ipool);
5443                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5444                                                 __ATOMIC_SEQ_CST);
5445                 }
5446         }
5447         return ipool;
5448 }
5449
5450 struct mlx5_list_entry *
5451 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5452 {
5453         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5454         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5455         struct mlx5dv_dr_domain *ns;
5456         struct mlx5_flow_dv_modify_hdr_resource *entry;
5457         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5458         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5459                                                           ref->actions_num - 1);
5460         int ret;
5461         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5462         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5463         uint32_t idx;
5464
5465         if (unlikely(!ipool)) {
5466                 rte_flow_error_set(ctx->error, ENOMEM,
5467                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5468                                    NULL, "cannot allocate modify ipool");
5469                 return NULL;
5470         }
5471         entry = mlx5_ipool_zmalloc(ipool, &idx);
5472         if (!entry) {
5473                 rte_flow_error_set(ctx->error, ENOMEM,
5474                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5475                                    "cannot allocate resource memory");
5476                 return NULL;
5477         }
5478         rte_memcpy(&entry->ft_type,
5479                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5480                    key_len + data_len);
5481         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5482                 ns = sh->fdb_domain;
5483         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5484                 ns = sh->tx_domain;
5485         else
5486                 ns = sh->rx_domain;
5487         ret = mlx5_flow_os_create_flow_action_modify_header
5488                                         (sh->ctx, ns, entry,
5489                                          data_len, &entry->action);
5490         if (ret) {
5491                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5492                 rte_flow_error_set(ctx->error, ENOMEM,
5493                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5494                                    NULL, "cannot create modification action");
5495                 return NULL;
5496         }
5497         entry->idx = idx;
5498         return &entry->entry;
5499 }
5500
5501 struct mlx5_list_entry *
5502 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5503                         void *cb_ctx)
5504 {
5505         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5506         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5507         struct mlx5_flow_dv_modify_hdr_resource *entry;
5508         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5509         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5510         uint32_t idx;
5511
5512         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5513                                   &idx);
5514         if (!entry) {
5515                 rte_flow_error_set(ctx->error, ENOMEM,
5516                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5517                                    "cannot allocate resource memory");
5518                 return NULL;
5519         }
5520         memcpy(entry, oentry, sizeof(*entry) + data_len);
5521         entry->idx = idx;
5522         return &entry->entry;
5523 }
5524
5525 void
5526 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5527 {
5528         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5529         struct mlx5_flow_dv_modify_hdr_resource *res =
5530                 container_of(entry, typeof(*res), entry);
5531
5532         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5533 }
5534
5535 /**
5536  * Validate the sample action.
5537  *
5538  * @param[in, out] action_flags
5539  *   Holds the actions detected until now.
5540  * @param[in] action
5541  *   Pointer to the sample action.
5542  * @param[in] dev
5543  *   Pointer to the Ethernet device structure.
5544  * @param[in] attr
5545  *   Attributes of flow that includes this action.
5546  * @param[in] item_flags
5547  *   Holds the items detected.
5548  * @param[in] rss
5549  *   Pointer to the RSS action.
5550  * @param[out] sample_rss
5551  *   Pointer to the RSS action in sample action list.
5552  * @param[out] count
5553  *   Pointer to the COUNT action in sample action list.
5554  * @param[out] fdb_mirror_limit
5555  *   Pointer to the FDB mirror limitation flag.
5556  * @param[out] error
5557  *   Pointer to error structure.
5558  *
5559  * @return
5560  *   0 on success, a negative errno value otherwise and rte_errno is set.
5561  */
5562 static int
5563 flow_dv_validate_action_sample(uint64_t *action_flags,
5564                                const struct rte_flow_action *action,
5565                                struct rte_eth_dev *dev,
5566                                const struct rte_flow_attr *attr,
5567                                uint64_t item_flags,
5568                                const struct rte_flow_action_rss *rss,
5569                                const struct rte_flow_action_rss **sample_rss,
5570                                const struct rte_flow_action_count **count,
5571                                int *fdb_mirror_limit,
5572                                struct rte_flow_error *error)
5573 {
5574         struct mlx5_priv *priv = dev->data->dev_private;
5575         struct mlx5_dev_config *dev_conf = &priv->config;
5576         const struct rte_flow_action_sample *sample = action->conf;
5577         const struct rte_flow_action *act;
5578         uint64_t sub_action_flags = 0;
5579         uint16_t queue_index = 0xFFFF;
5580         int actions_n = 0;
5581         int ret;
5582
5583         if (!sample)
5584                 return rte_flow_error_set(error, EINVAL,
5585                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5586                                           "configuration cannot be NULL");
5587         if (sample->ratio == 0)
5588                 return rte_flow_error_set(error, EINVAL,
5589                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5590                                           "ratio value starts from 1");
5591         if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5592                 return rte_flow_error_set(error, ENOTSUP,
5593                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5594                                           NULL,
5595                                           "sample action not supported");
5596         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5597                 return rte_flow_error_set(error, EINVAL,
5598                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5599                                           "Multiple sample actions not "
5600                                           "supported");
5601         if (*action_flags & MLX5_FLOW_ACTION_METER)
5602                 return rte_flow_error_set(error, EINVAL,
5603                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5604                                           "wrong action order, meter should "
5605                                           "be after sample action");
5606         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5607                 return rte_flow_error_set(error, EINVAL,
5608                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5609                                           "wrong action order, jump should "
5610                                           "be after sample action");
5611         act = sample->actions;
5612         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5613                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5614                         return rte_flow_error_set(error, ENOTSUP,
5615                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5616                                                   act, "too many actions");
5617                 switch (act->type) {
5618                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5619                         ret = mlx5_flow_validate_action_queue(act,
5620                                                               sub_action_flags,
5621                                                               dev,
5622                                                               attr, error);
5623                         if (ret < 0)
5624                                 return ret;
5625                         queue_index = ((const struct rte_flow_action_queue *)
5626                                                         (act->conf))->index;
5627                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5628                         ++actions_n;
5629                         break;
5630                 case RTE_FLOW_ACTION_TYPE_RSS:
5631                         *sample_rss = act->conf;
5632                         ret = mlx5_flow_validate_action_rss(act,
5633                                                             sub_action_flags,
5634                                                             dev, attr,
5635                                                             item_flags,
5636                                                             error);
5637                         if (ret < 0)
5638                                 return ret;
5639                         if (rss && *sample_rss &&
5640                             ((*sample_rss)->level != rss->level ||
5641                             (*sample_rss)->types != rss->types))
5642                                 return rte_flow_error_set(error, ENOTSUP,
5643                                         RTE_FLOW_ERROR_TYPE_ACTION,
5644                                         NULL,
5645                                         "Can't use the different RSS types "
5646                                         "or level in the same flow");
5647                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5648                                 queue_index = (*sample_rss)->queue[0];
5649                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5650                         ++actions_n;
5651                         break;
5652                 case RTE_FLOW_ACTION_TYPE_MARK:
5653                         ret = flow_dv_validate_action_mark(dev, act,
5654                                                            sub_action_flags,
5655                                                            attr, error);
5656                         if (ret < 0)
5657                                 return ret;
5658                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5659                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5660                                                 MLX5_FLOW_ACTION_MARK_EXT;
5661                         else
5662                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5663                         ++actions_n;
5664                         break;
5665                 case RTE_FLOW_ACTION_TYPE_COUNT:
5666                         ret = flow_dv_validate_action_count
5667                                 (dev, is_shared_action_count(act),
5668                                  *action_flags | sub_action_flags,
5669                                  error);
5670                         if (ret < 0)
5671                                 return ret;
5672                         *count = act->conf;
5673                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5674                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5675                         ++actions_n;
5676                         break;
5677                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5678                         ret = flow_dv_validate_action_port_id(dev,
5679                                                               sub_action_flags,
5680                                                               act,
5681                                                               attr,
5682                                                               error);
5683                         if (ret)
5684                                 return ret;
5685                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5686                         ++actions_n;
5687                         break;
5688                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5689                         ret = flow_dv_validate_action_raw_encap_decap
5690                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5691                                  &actions_n, action, item_flags, error);
5692                         if (ret < 0)
5693                                 return ret;
5694                         ++actions_n;
5695                         break;
5696                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5697                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5698                         ret = flow_dv_validate_action_l2_encap(dev,
5699                                                                sub_action_flags,
5700                                                                act, attr,
5701                                                                error);
5702                         if (ret < 0)
5703                                 return ret;
5704                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5705                         ++actions_n;
5706                         break;
5707                 default:
5708                         return rte_flow_error_set(error, ENOTSUP,
5709                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5710                                                   NULL,
5711                                                   "Doesn't support optional "
5712                                                   "action");
5713                 }
5714         }
5715         if (attr->ingress && !attr->transfer) {
5716                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5717                                           MLX5_FLOW_ACTION_RSS)))
5718                         return rte_flow_error_set(error, EINVAL,
5719                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5720                                                   NULL,
5721                                                   "Ingress must has a dest "
5722                                                   "QUEUE for Sample");
5723         } else if (attr->egress && !attr->transfer) {
5724                 return rte_flow_error_set(error, ENOTSUP,
5725                                           RTE_FLOW_ERROR_TYPE_ACTION,
5726                                           NULL,
5727                                           "Sample Only support Ingress "
5728                                           "or E-Switch");
5729         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5730                 MLX5_ASSERT(attr->transfer);
5731                 if (sample->ratio > 1)
5732                         return rte_flow_error_set(error, ENOTSUP,
5733                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5734                                                   NULL,
5735                                                   "E-Switch doesn't support "
5736                                                   "any optional action "
5737                                                   "for sampling");
5738                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5739                         return rte_flow_error_set(error, ENOTSUP,
5740                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5741                                                   NULL,
5742                                                   "unsupported action QUEUE");
5743                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5744                         return rte_flow_error_set(error, ENOTSUP,
5745                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5746                                                   NULL,
5747                                                   "unsupported action QUEUE");
5748                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5749                         return rte_flow_error_set(error, EINVAL,
5750                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5751                                                   NULL,
5752                                                   "E-Switch must has a dest "
5753                                                   "port for mirroring");
5754                 if (!priv->config.hca_attr.reg_c_preserve &&
5755                      priv->representor_id != UINT16_MAX)
5756                         *fdb_mirror_limit = 1;
5757         }
5758         /* Continue validation for Xcap actions.*/
5759         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5760             (queue_index == 0xFFFF ||
5761              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5762                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5763                      MLX5_FLOW_XCAP_ACTIONS)
5764                         return rte_flow_error_set(error, ENOTSUP,
5765                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5766                                                   NULL, "encap and decap "
5767                                                   "combination aren't "
5768                                                   "supported");
5769                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5770                                                         MLX5_FLOW_ACTION_ENCAP))
5771                         return rte_flow_error_set(error, ENOTSUP,
5772                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5773                                                   NULL, "encap is not supported"
5774                                                   " for ingress traffic");
5775         }
5776         return 0;
5777 }
5778
5779 /**
5780  * Find existing modify-header resource or create and register a new one.
5781  *
5782  * @param dev[in, out]
5783  *   Pointer to rte_eth_dev structure.
5784  * @param[in, out] resource
5785  *   Pointer to modify-header resource.
5786  * @parm[in, out] dev_flow
5787  *   Pointer to the dev_flow.
5788  * @param[out] error
5789  *   pointer to error structure.
5790  *
5791  * @return
5792  *   0 on success otherwise -errno and errno is set.
5793  */
5794 static int
5795 flow_dv_modify_hdr_resource_register
5796                         (struct rte_eth_dev *dev,
5797                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5798                          struct mlx5_flow *dev_flow,
5799                          struct rte_flow_error *error)
5800 {
5801         struct mlx5_priv *priv = dev->data->dev_private;
5802         struct mlx5_dev_ctx_shared *sh = priv->sh;
5803         uint32_t key_len = sizeof(*resource) -
5804                            offsetof(typeof(*resource), ft_type) +
5805                            resource->actions_num * sizeof(resource->actions[0]);
5806         struct mlx5_list_entry *entry;
5807         struct mlx5_flow_cb_ctx ctx = {
5808                 .error = error,
5809                 .data = resource,
5810         };
5811         struct mlx5_hlist *modify_cmds;
5812         uint64_t key64;
5813
5814         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5815                                 "hdr_modify",
5816                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5817                                 true, false, sh,
5818                                 flow_dv_modify_create_cb,
5819                                 flow_dv_modify_match_cb,
5820                                 flow_dv_modify_remove_cb,
5821                                 flow_dv_modify_clone_cb,
5822                                 flow_dv_modify_clone_free_cb);
5823         if (unlikely(!modify_cmds))
5824                 return -rte_errno;
5825         resource->root = !dev_flow->dv.group;
5826         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5827                                                                 resource->root))
5828                 return rte_flow_error_set(error, EOVERFLOW,
5829                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5830                                           "too many modify header items");
5831         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5832         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5833         if (!entry)
5834                 return -rte_errno;
5835         resource = container_of(entry, typeof(*resource), entry);
5836         dev_flow->handle->dvh.modify_hdr = resource;
5837         return 0;
5838 }
5839
5840 /**
5841  * Get DV flow counter by index.
5842  *
5843  * @param[in] dev
5844  *   Pointer to the Ethernet device structure.
5845  * @param[in] idx
5846  *   mlx5 flow counter index in the container.
5847  * @param[out] ppool
5848  *   mlx5 flow counter pool in the container.
5849  *
5850  * @return
5851  *   Pointer to the counter, NULL otherwise.
5852  */
5853 static struct mlx5_flow_counter *
5854 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5855                            uint32_t idx,
5856                            struct mlx5_flow_counter_pool **ppool)
5857 {
5858         struct mlx5_priv *priv = dev->data->dev_private;
5859         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5860         struct mlx5_flow_counter_pool *pool;
5861
5862         /* Decrease to original index and clear shared bit. */
5863         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5864         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5865         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5866         MLX5_ASSERT(pool);
5867         if (ppool)
5868                 *ppool = pool;
5869         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5870 }
5871
5872 /**
5873  * Check the devx counter belongs to the pool.
5874  *
5875  * @param[in] pool
5876  *   Pointer to the counter pool.
5877  * @param[in] id
5878  *   The counter devx ID.
5879  *
5880  * @return
5881  *   True if counter belongs to the pool, false otherwise.
5882  */
5883 static bool
5884 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5885 {
5886         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5887                    MLX5_COUNTERS_PER_POOL;
5888
5889         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5890                 return true;
5891         return false;
5892 }
5893
5894 /**
5895  * Get a pool by devx counter ID.
5896  *
5897  * @param[in] cmng
5898  *   Pointer to the counter management.
5899  * @param[in] id
5900  *   The counter devx ID.
5901  *
5902  * @return
5903  *   The counter pool pointer if exists, NULL otherwise,
5904  */
5905 static struct mlx5_flow_counter_pool *
5906 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5907 {
5908         uint32_t i;
5909         struct mlx5_flow_counter_pool *pool = NULL;
5910
5911         rte_spinlock_lock(&cmng->pool_update_sl);
5912         /* Check last used pool. */
5913         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5914             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5915                 pool = cmng->pools[cmng->last_pool_idx];
5916                 goto out;
5917         }
5918         /* ID out of range means no suitable pool in the container. */
5919         if (id > cmng->max_id || id < cmng->min_id)
5920                 goto out;
5921         /*
5922          * Find the pool from the end of the container, since mostly counter
5923          * ID is sequence increasing, and the last pool should be the needed
5924          * one.
5925          */
5926         i = cmng->n_valid;
5927         while (i--) {
5928                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5929
5930                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5931                         pool = pool_tmp;
5932                         break;
5933                 }
5934         }
5935 out:
5936         rte_spinlock_unlock(&cmng->pool_update_sl);
5937         return pool;
5938 }
5939
5940 /**
5941  * Resize a counter container.
5942  *
5943  * @param[in] dev
5944  *   Pointer to the Ethernet device structure.
5945  *
5946  * @return
5947  *   0 on success, otherwise negative errno value and rte_errno is set.
5948  */
5949 static int
5950 flow_dv_container_resize(struct rte_eth_dev *dev)
5951 {
5952         struct mlx5_priv *priv = dev->data->dev_private;
5953         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5954         void *old_pools = cmng->pools;
5955         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5956         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5957         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5958
5959         if (!pools) {
5960                 rte_errno = ENOMEM;
5961                 return -ENOMEM;
5962         }
5963         if (old_pools)
5964                 memcpy(pools, old_pools, cmng->n *
5965                                        sizeof(struct mlx5_flow_counter_pool *));
5966         cmng->n = resize;
5967         cmng->pools = pools;
5968         if (old_pools)
5969                 mlx5_free(old_pools);
5970         return 0;
5971 }
5972
5973 /**
5974  * Query a devx flow counter.
5975  *
5976  * @param[in] dev
5977  *   Pointer to the Ethernet device structure.
5978  * @param[in] counter
5979  *   Index to the flow counter.
5980  * @param[out] pkts
5981  *   The statistics value of packets.
5982  * @param[out] bytes
5983  *   The statistics value of bytes.
5984  *
5985  * @return
5986  *   0 on success, otherwise a negative errno value and rte_errno is set.
5987  */
5988 static inline int
5989 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5990                      uint64_t *bytes)
5991 {
5992         struct mlx5_priv *priv = dev->data->dev_private;
5993         struct mlx5_flow_counter_pool *pool = NULL;
5994         struct mlx5_flow_counter *cnt;
5995         int offset;
5996
5997         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5998         MLX5_ASSERT(pool);
5999         if (priv->sh->cmng.counter_fallback)
6000                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6001                                         0, pkts, bytes, 0, NULL, NULL, 0);
6002         rte_spinlock_lock(&pool->sl);
6003         if (!pool->raw) {
6004                 *pkts = 0;
6005                 *bytes = 0;
6006         } else {
6007                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6008                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6009                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6010         }
6011         rte_spinlock_unlock(&pool->sl);
6012         return 0;
6013 }
6014
6015 /**
6016  * Create and initialize a new counter pool.
6017  *
6018  * @param[in] dev
6019  *   Pointer to the Ethernet device structure.
6020  * @param[out] dcs
6021  *   The devX counter handle.
6022  * @param[in] age
6023  *   Whether the pool is for counter that was allocated for aging.
6024  * @param[in/out] cont_cur
6025  *   Pointer to the container pointer, it will be update in pool resize.
6026  *
6027  * @return
6028  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6029  */
6030 static struct mlx5_flow_counter_pool *
6031 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6032                     uint32_t age)
6033 {
6034         struct mlx5_priv *priv = dev->data->dev_private;
6035         struct mlx5_flow_counter_pool *pool;
6036         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6037         bool fallback = priv->sh->cmng.counter_fallback;
6038         uint32_t size = sizeof(*pool);
6039
6040         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6041         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6042         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6043         if (!pool) {
6044                 rte_errno = ENOMEM;
6045                 return NULL;
6046         }
6047         pool->raw = NULL;
6048         pool->is_aged = !!age;
6049         pool->query_gen = 0;
6050         pool->min_dcs = dcs;
6051         rte_spinlock_init(&pool->sl);
6052         rte_spinlock_init(&pool->csl);
6053         TAILQ_INIT(&pool->counters[0]);
6054         TAILQ_INIT(&pool->counters[1]);
6055         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6056         rte_spinlock_lock(&cmng->pool_update_sl);
6057         pool->index = cmng->n_valid;
6058         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6059                 mlx5_free(pool);
6060                 rte_spinlock_unlock(&cmng->pool_update_sl);
6061                 return NULL;
6062         }
6063         cmng->pools[pool->index] = pool;
6064         cmng->n_valid++;
6065         if (unlikely(fallback)) {
6066                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6067
6068                 if (base < cmng->min_id)
6069                         cmng->min_id = base;
6070                 if (base > cmng->max_id)
6071                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6072                 cmng->last_pool_idx = pool->index;
6073         }
6074         rte_spinlock_unlock(&cmng->pool_update_sl);
6075         return pool;
6076 }
6077
6078 /**
6079  * Prepare a new counter and/or a new counter pool.
6080  *
6081  * @param[in] dev
6082  *   Pointer to the Ethernet device structure.
6083  * @param[out] cnt_free
6084  *   Where to put the pointer of a new counter.
6085  * @param[in] age
6086  *   Whether the pool is for counter that was allocated for aging.
6087  *
6088  * @return
6089  *   The counter pool pointer and @p cnt_free is set on success,
6090  *   NULL otherwise and rte_errno is set.
6091  */
6092 static struct mlx5_flow_counter_pool *
6093 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6094                              struct mlx5_flow_counter **cnt_free,
6095                              uint32_t age)
6096 {
6097         struct mlx5_priv *priv = dev->data->dev_private;
6098         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6099         struct mlx5_flow_counter_pool *pool;
6100         struct mlx5_counters tmp_tq;
6101         struct mlx5_devx_obj *dcs = NULL;
6102         struct mlx5_flow_counter *cnt;
6103         enum mlx5_counter_type cnt_type =
6104                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6105         bool fallback = priv->sh->cmng.counter_fallback;
6106         uint32_t i;
6107
6108         if (fallback) {
6109                 /* bulk_bitmap must be 0 for single counter allocation. */
6110                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
6111                 if (!dcs)
6112                         return NULL;
6113                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6114                 if (!pool) {
6115                         pool = flow_dv_pool_create(dev, dcs, age);
6116                         if (!pool) {
6117                                 mlx5_devx_cmd_destroy(dcs);
6118                                 return NULL;
6119                         }
6120                 }
6121                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6122                 cnt = MLX5_POOL_GET_CNT(pool, i);
6123                 cnt->pool = pool;
6124                 cnt->dcs_when_free = dcs;
6125                 *cnt_free = cnt;
6126                 return pool;
6127         }
6128         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
6129         if (!dcs) {
6130                 rte_errno = ENODATA;
6131                 return NULL;
6132         }
6133         pool = flow_dv_pool_create(dev, dcs, age);
6134         if (!pool) {
6135                 mlx5_devx_cmd_destroy(dcs);
6136                 return NULL;
6137         }
6138         TAILQ_INIT(&tmp_tq);
6139         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6140                 cnt = MLX5_POOL_GET_CNT(pool, i);
6141                 cnt->pool = pool;
6142                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6143         }
6144         rte_spinlock_lock(&cmng->csl[cnt_type]);
6145         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6146         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6147         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6148         (*cnt_free)->pool = pool;
6149         return pool;
6150 }
6151
6152 /**
6153  * Allocate a flow counter.
6154  *
6155  * @param[in] dev
6156  *   Pointer to the Ethernet device structure.
6157  * @param[in] age
6158  *   Whether the counter was allocated for aging.
6159  *
6160  * @return
6161  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6162  */
6163 static uint32_t
6164 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6165 {
6166         struct mlx5_priv *priv = dev->data->dev_private;
6167         struct mlx5_flow_counter_pool *pool = NULL;
6168         struct mlx5_flow_counter *cnt_free = NULL;
6169         bool fallback = priv->sh->cmng.counter_fallback;
6170         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6171         enum mlx5_counter_type cnt_type =
6172                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6173         uint32_t cnt_idx;
6174
6175         if (!priv->config.devx) {
6176                 rte_errno = ENOTSUP;
6177                 return 0;
6178         }
6179         /* Get free counters from container. */
6180         rte_spinlock_lock(&cmng->csl[cnt_type]);
6181         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6182         if (cnt_free)
6183                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6184         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6185         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6186                 goto err;
6187         pool = cnt_free->pool;
6188         if (fallback)
6189                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6190         /* Create a DV counter action only in the first time usage. */
6191         if (!cnt_free->action) {
6192                 uint16_t offset;
6193                 struct mlx5_devx_obj *dcs;
6194                 int ret;
6195
6196                 if (!fallback) {
6197                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6198                         dcs = pool->min_dcs;
6199                 } else {
6200                         offset = 0;
6201                         dcs = cnt_free->dcs_when_free;
6202                 }
6203                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6204                                                             &cnt_free->action);
6205                 if (ret) {
6206                         rte_errno = errno;
6207                         goto err;
6208                 }
6209         }
6210         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6211                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6212         /* Update the counter reset values. */
6213         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6214                                  &cnt_free->bytes))
6215                 goto err;
6216         if (!fallback && !priv->sh->cmng.query_thread_on)
6217                 /* Start the asynchronous batch query by the host thread. */
6218                 mlx5_set_query_alarm(priv->sh);
6219         /*
6220          * When the count action isn't shared (by ID), shared_info field is
6221          * used for indirect action API's refcnt.
6222          * When the counter action is not shared neither by ID nor by indirect
6223          * action API, shared info must be 1.
6224          */
6225         cnt_free->shared_info.refcnt = 1;
6226         return cnt_idx;
6227 err:
6228         if (cnt_free) {
6229                 cnt_free->pool = pool;
6230                 if (fallback)
6231                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6232                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6233                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6234                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6235         }
6236         return 0;
6237 }
6238
6239 /**
6240  * Allocate a shared flow counter.
6241  *
6242  * @param[in] ctx
6243  *   Pointer to the shared counter configuration.
6244  * @param[in] data
6245  *   Pointer to save the allocated counter index.
6246  *
6247  * @return
6248  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6249  */
6250
6251 static int32_t
6252 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
6253 {
6254         struct mlx5_shared_counter_conf *conf = ctx;
6255         struct rte_eth_dev *dev = conf->dev;
6256         struct mlx5_flow_counter *cnt;
6257
6258         data->dword = flow_dv_counter_alloc(dev, 0);
6259         data->dword |= MLX5_CNT_SHARED_OFFSET;
6260         cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
6261         cnt->shared_info.id = conf->id;
6262         return 0;
6263 }
6264
6265 /**
6266  * Get a shared flow counter.
6267  *
6268  * @param[in] dev
6269  *   Pointer to the Ethernet device structure.
6270  * @param[in] id
6271  *   Counter identifier.
6272  *
6273  * @return
6274  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6275  */
6276 static uint32_t
6277 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
6278 {
6279         struct mlx5_priv *priv = dev->data->dev_private;
6280         struct mlx5_shared_counter_conf conf = {
6281                 .dev = dev,
6282                 .id = id,
6283         };
6284         union mlx5_l3t_data data = {
6285                 .dword = 0,
6286         };
6287
6288         mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
6289                                flow_dv_counter_alloc_shared_cb, &conf);
6290         return data.dword;
6291 }
6292
6293 /**
6294  * Get age param from counter index.
6295  *
6296  * @param[in] dev
6297  *   Pointer to the Ethernet device structure.
6298  * @param[in] counter
6299  *   Index to the counter handler.
6300  *
6301  * @return
6302  *   The aging parameter specified for the counter index.
6303  */
6304 static struct mlx5_age_param*
6305 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6306                                 uint32_t counter)
6307 {
6308         struct mlx5_flow_counter *cnt;
6309         struct mlx5_flow_counter_pool *pool = NULL;
6310
6311         flow_dv_counter_get_by_idx(dev, counter, &pool);
6312         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6313         cnt = MLX5_POOL_GET_CNT(pool, counter);
6314         return MLX5_CNT_TO_AGE(cnt);
6315 }
6316
6317 /**
6318  * Remove a flow counter from aged counter list.
6319  *
6320  * @param[in] dev
6321  *   Pointer to the Ethernet device structure.
6322  * @param[in] counter
6323  *   Index to the counter handler.
6324  * @param[in] cnt
6325  *   Pointer to the counter handler.
6326  */
6327 static void
6328 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6329                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6330 {
6331         struct mlx5_age_info *age_info;
6332         struct mlx5_age_param *age_param;
6333         struct mlx5_priv *priv = dev->data->dev_private;
6334         uint16_t expected = AGE_CANDIDATE;
6335
6336         age_info = GET_PORT_AGE_INFO(priv);
6337         age_param = flow_dv_counter_idx_get_age(dev, counter);
6338         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6339                                          AGE_FREE, false, __ATOMIC_RELAXED,
6340                                          __ATOMIC_RELAXED)) {
6341                 /**
6342                  * We need the lock even it is age timeout,
6343                  * since counter may still in process.
6344                  */
6345                 rte_spinlock_lock(&age_info->aged_sl);
6346                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6347                 rte_spinlock_unlock(&age_info->aged_sl);
6348                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6349         }
6350 }
6351
6352 /**
6353  * Release a flow counter.
6354  *
6355  * @param[in] dev
6356  *   Pointer to the Ethernet device structure.
6357  * @param[in] counter
6358  *   Index to the counter handler.
6359  */
6360 static void
6361 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6362 {
6363         struct mlx5_priv *priv = dev->data->dev_private;
6364         struct mlx5_flow_counter_pool *pool = NULL;
6365         struct mlx5_flow_counter *cnt;
6366         enum mlx5_counter_type cnt_type;
6367
6368         if (!counter)
6369                 return;
6370         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6371         MLX5_ASSERT(pool);
6372         if (pool->is_aged) {
6373                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6374         } else {
6375                 /*
6376                  * If the counter action is shared by ID, the l3t_clear_entry
6377                  * function reduces its references counter. If after the
6378                  * reduction the action is still referenced, the function
6379                  * returns here and does not release it.
6380                  */
6381                 if (IS_LEGACY_SHARED_CNT(counter) &&
6382                     mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl,
6383                                          cnt->shared_info.id))
6384                         return;
6385                 /*
6386                  * If the counter action is shared by indirect action API,
6387                  * the atomic function reduces its references counter.
6388                  * If after the reduction the action is still referenced, the
6389                  * function returns here and does not release it.
6390                  * When the counter action is not shared neither by ID nor by
6391                  * indirect action API, shared info is 1 before the reduction,
6392                  * so this condition is failed and function doesn't return here.
6393                  */
6394                 if (!IS_LEGACY_SHARED_CNT(counter) &&
6395                     __atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6396                                        __ATOMIC_RELAXED))
6397                         return;
6398         }
6399         cnt->pool = pool;
6400         /*
6401          * Put the counter back to list to be updated in none fallback mode.
6402          * Currently, we are using two list alternately, while one is in query,
6403          * add the freed counter to the other list based on the pool query_gen
6404          * value. After query finishes, add counter the list to the global
6405          * container counter list. The list changes while query starts. In
6406          * this case, lock will not be needed as query callback and release
6407          * function both operate with the different list.
6408          */
6409         if (!priv->sh->cmng.counter_fallback) {
6410                 rte_spinlock_lock(&pool->csl);
6411                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6412                 rte_spinlock_unlock(&pool->csl);
6413         } else {
6414                 cnt->dcs_when_free = cnt->dcs_when_active;
6415                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6416                                            MLX5_COUNTER_TYPE_ORIGIN;
6417                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6418                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6419                                   cnt, next);
6420                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6421         }
6422 }
6423
6424 /**
6425  * Resize a meter id container.
6426  *
6427  * @param[in] dev
6428  *   Pointer to the Ethernet device structure.
6429  *
6430  * @return
6431  *   0 on success, otherwise negative errno value and rte_errno is set.
6432  */
6433 static int
6434 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6435 {
6436         struct mlx5_priv *priv = dev->data->dev_private;
6437         struct mlx5_aso_mtr_pools_mng *pools_mng =
6438                                 &priv->sh->mtrmng->pools_mng;
6439         void *old_pools = pools_mng->pools;
6440         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6441         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6442         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6443
6444         if (!pools) {
6445                 rte_errno = ENOMEM;
6446                 return -ENOMEM;
6447         }
6448         if (!pools_mng->n)
6449                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6450                         mlx5_free(pools);
6451                         return -ENOMEM;
6452                 }
6453         if (old_pools)
6454                 memcpy(pools, old_pools, pools_mng->n *
6455                                        sizeof(struct mlx5_aso_mtr_pool *));
6456         pools_mng->n = resize;
6457         pools_mng->pools = pools;
6458         if (old_pools)
6459                 mlx5_free(old_pools);
6460         return 0;
6461 }
6462
6463 /**
6464  * Prepare a new meter and/or a new meter pool.
6465  *
6466  * @param[in] dev
6467  *   Pointer to the Ethernet device structure.
6468  * @param[out] mtr_free
6469  *   Where to put the pointer of a new meter.g.
6470  *
6471  * @return
6472  *   The meter pool pointer and @mtr_free is set on success,
6473  *   NULL otherwise and rte_errno is set.
6474  */
6475 static struct mlx5_aso_mtr_pool *
6476 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6477                              struct mlx5_aso_mtr **mtr_free)
6478 {
6479         struct mlx5_priv *priv = dev->data->dev_private;
6480         struct mlx5_aso_mtr_pools_mng *pools_mng =
6481                                 &priv->sh->mtrmng->pools_mng;
6482         struct mlx5_aso_mtr_pool *pool = NULL;
6483         struct mlx5_devx_obj *dcs = NULL;
6484         uint32_t i;
6485         uint32_t log_obj_size;
6486
6487         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6488         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6489                         priv->sh->pdn, log_obj_size);
6490         if (!dcs) {
6491                 rte_errno = ENODATA;
6492                 return NULL;
6493         }
6494         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6495         if (!pool) {
6496                 rte_errno = ENOMEM;
6497                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6498                 return NULL;
6499         }
6500         pool->devx_obj = dcs;
6501         pool->index = pools_mng->n_valid;
6502         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6503                 mlx5_free(pool);
6504                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6505                 return NULL;
6506         }
6507         pools_mng->pools[pool->index] = pool;
6508         pools_mng->n_valid++;
6509         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6510                 pool->mtrs[i].offset = i;
6511                 LIST_INSERT_HEAD(&pools_mng->meters,
6512                                                 &pool->mtrs[i], next);
6513         }
6514         pool->mtrs[0].offset = 0;
6515         *mtr_free = &pool->mtrs[0];
6516         return pool;
6517 }
6518
6519 /**
6520  * Release a flow meter into pool.
6521  *
6522  * @param[in] dev
6523  *   Pointer to the Ethernet device structure.
6524  * @param[in] mtr_idx
6525  *   Index to aso flow meter.
6526  */
6527 static void
6528 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6529 {
6530         struct mlx5_priv *priv = dev->data->dev_private;
6531         struct mlx5_aso_mtr_pools_mng *pools_mng =
6532                                 &priv->sh->mtrmng->pools_mng;
6533         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6534
6535         MLX5_ASSERT(aso_mtr);
6536         rte_spinlock_lock(&pools_mng->mtrsl);
6537         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6538         aso_mtr->state = ASO_METER_FREE;
6539         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6540         rte_spinlock_unlock(&pools_mng->mtrsl);
6541 }
6542
6543 /**
6544  * Allocate a aso flow meter.
6545  *
6546  * @param[in] dev
6547  *   Pointer to the Ethernet device structure.
6548  *
6549  * @return
6550  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6551  */
6552 static uint32_t
6553 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6554 {
6555         struct mlx5_priv *priv = dev->data->dev_private;
6556         struct mlx5_aso_mtr *mtr_free = NULL;
6557         struct mlx5_aso_mtr_pools_mng *pools_mng =
6558                                 &priv->sh->mtrmng->pools_mng;
6559         struct mlx5_aso_mtr_pool *pool;
6560         uint32_t mtr_idx = 0;
6561
6562         if (!priv->config.devx) {
6563                 rte_errno = ENOTSUP;
6564                 return 0;
6565         }
6566         /* Allocate the flow meter memory. */
6567         /* Get free meters from management. */
6568         rte_spinlock_lock(&pools_mng->mtrsl);
6569         mtr_free = LIST_FIRST(&pools_mng->meters);
6570         if (mtr_free)
6571                 LIST_REMOVE(mtr_free, next);
6572         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6573                 rte_spinlock_unlock(&pools_mng->mtrsl);
6574                 return 0;
6575         }
6576         mtr_free->state = ASO_METER_WAIT;
6577         rte_spinlock_unlock(&pools_mng->mtrsl);
6578         pool = container_of(mtr_free,
6579                         struct mlx5_aso_mtr_pool,
6580                         mtrs[mtr_free->offset]);
6581         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6582         if (!mtr_free->fm.meter_action) {
6583 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6584                 struct rte_flow_error error;
6585                 uint8_t reg_id;
6586
6587                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6588                 mtr_free->fm.meter_action =
6589                         mlx5_glue->dv_create_flow_action_aso
6590                                                 (priv->sh->rx_domain,
6591                                                  pool->devx_obj->obj,
6592                                                  mtr_free->offset,
6593                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6594                                                  reg_id - REG_C_0);
6595 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6596                 if (!mtr_free->fm.meter_action) {
6597                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6598                         return 0;
6599                 }
6600         }
6601         return mtr_idx;
6602 }
6603
6604 /**
6605  * Verify the @p attributes will be correctly understood by the NIC and store
6606  * them in the @p flow if everything is correct.
6607  *
6608  * @param[in] dev
6609  *   Pointer to dev struct.
6610  * @param[in] attributes
6611  *   Pointer to flow attributes
6612  * @param[in] external
6613  *   This flow rule is created by request external to PMD.
6614  * @param[out] error
6615  *   Pointer to error structure.
6616  *
6617  * @return
6618  *   - 0 on success and non root table.
6619  *   - 1 on success and root table.
6620  *   - a negative errno value otherwise and rte_errno is set.
6621  */
6622 static int
6623 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6624                             const struct mlx5_flow_tunnel *tunnel,
6625                             const struct rte_flow_attr *attributes,
6626                             const struct flow_grp_info *grp_info,
6627                             struct rte_flow_error *error)
6628 {
6629         struct mlx5_priv *priv = dev->data->dev_private;
6630         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6631         int ret = 0;
6632
6633 #ifndef HAVE_MLX5DV_DR
6634         RTE_SET_USED(tunnel);
6635         RTE_SET_USED(grp_info);
6636         if (attributes->group)
6637                 return rte_flow_error_set(error, ENOTSUP,
6638                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6639                                           NULL,
6640                                           "groups are not supported");
6641 #else
6642         uint32_t table = 0;
6643
6644         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6645                                        grp_info, error);
6646         if (ret)
6647                 return ret;
6648         if (!table)
6649                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6650 #endif
6651         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6652             attributes->priority > lowest_priority)
6653                 return rte_flow_error_set(error, ENOTSUP,
6654                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6655                                           NULL,
6656                                           "priority out of range");
6657         if (attributes->transfer) {
6658                 if (!priv->config.dv_esw_en)
6659                         return rte_flow_error_set
6660                                 (error, ENOTSUP,
6661                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6662                                  "E-Switch dr is not supported");
6663                 if (!(priv->representor || priv->master))
6664                         return rte_flow_error_set
6665                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6666                                  NULL, "E-Switch configuration can only be"
6667                                  " done by a master or a representor device");
6668                 if (attributes->egress)
6669                         return rte_flow_error_set
6670                                 (error, ENOTSUP,
6671                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6672                                  "egress is not supported");
6673         }
6674         if (!(attributes->egress ^ attributes->ingress))
6675                 return rte_flow_error_set(error, ENOTSUP,
6676                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6677                                           "must specify exactly one of "
6678                                           "ingress or egress");
6679         return ret;
6680 }
6681
6682 static uint16_t
6683 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6684                           const struct rte_flow_item *end)
6685 {
6686         const struct rte_flow_item *item = *head;
6687         uint16_t l3_protocol;
6688
6689         for (; item != end; item++) {
6690                 switch (item->type) {
6691                 default:
6692                         break;
6693                 case RTE_FLOW_ITEM_TYPE_IPV4:
6694                         l3_protocol = RTE_ETHER_TYPE_IPV4;
6695                         goto l3_ok;
6696                 case RTE_FLOW_ITEM_TYPE_IPV6:
6697                         l3_protocol = RTE_ETHER_TYPE_IPV6;
6698                         goto l3_ok;
6699                 case RTE_FLOW_ITEM_TYPE_ETH:
6700                         if (item->mask && item->spec) {
6701                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6702                                                             type, item,
6703                                                             l3_protocol);
6704                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6705                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6706                                         goto l3_ok;
6707                         }
6708                         break;
6709                 case RTE_FLOW_ITEM_TYPE_VLAN:
6710                         if (item->mask && item->spec) {
6711                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6712                                                             inner_type, item,
6713                                                             l3_protocol);
6714                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6715                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6716                                         goto l3_ok;
6717                         }
6718                         break;
6719                 }
6720         }
6721         return 0;
6722 l3_ok:
6723         *head = item;
6724         return l3_protocol;
6725 }
6726
6727 static uint8_t
6728 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6729                           const struct rte_flow_item *end)
6730 {
6731         const struct rte_flow_item *item = *head;
6732         uint8_t l4_protocol;
6733
6734         for (; item != end; item++) {
6735                 switch (item->type) {
6736                 default:
6737                         break;
6738                 case RTE_FLOW_ITEM_TYPE_TCP:
6739                         l4_protocol = IPPROTO_TCP;
6740                         goto l4_ok;
6741                 case RTE_FLOW_ITEM_TYPE_UDP:
6742                         l4_protocol = IPPROTO_UDP;
6743                         goto l4_ok;
6744                 case RTE_FLOW_ITEM_TYPE_IPV4:
6745                         if (item->mask && item->spec) {
6746                                 const struct rte_flow_item_ipv4 *mask, *spec;
6747
6748                                 mask = (typeof(mask))item->mask;
6749                                 spec = (typeof(spec))item->spec;
6750                                 l4_protocol = mask->hdr.next_proto_id &
6751                                               spec->hdr.next_proto_id;
6752                                 if (l4_protocol == IPPROTO_TCP ||
6753                                     l4_protocol == IPPROTO_UDP)
6754                                         goto l4_ok;
6755                         }
6756                         break;
6757                 case RTE_FLOW_ITEM_TYPE_IPV6:
6758                         if (item->mask && item->spec) {
6759                                 const struct rte_flow_item_ipv6 *mask, *spec;
6760                                 mask = (typeof(mask))item->mask;
6761                                 spec = (typeof(spec))item->spec;
6762                                 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6763                                 if (l4_protocol == IPPROTO_TCP ||
6764                                     l4_protocol == IPPROTO_UDP)
6765                                         goto l4_ok;
6766                         }
6767                         break;
6768                 }
6769         }
6770         return 0;
6771 l4_ok:
6772         *head = item;
6773         return l4_protocol;
6774 }
6775
6776 static int
6777 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6778                                 const struct rte_flow_item *rule_items,
6779                                 const struct rte_flow_item *integrity_item,
6780                                 struct rte_flow_error *error)
6781 {
6782         struct mlx5_priv *priv = dev->data->dev_private;
6783         const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6784         const struct rte_flow_item_integrity *mask = (typeof(mask))
6785                                                      integrity_item->mask;
6786         const struct rte_flow_item_integrity *spec = (typeof(spec))
6787                                                      integrity_item->spec;
6788         uint32_t protocol;
6789
6790         if (!priv->config.hca_attr.pkt_integrity_match)
6791                 return rte_flow_error_set(error, ENOTSUP,
6792                                           RTE_FLOW_ERROR_TYPE_ITEM,
6793                                           integrity_item,
6794                                           "packet integrity integrity_item not supported");
6795         if (!mask)
6796                 mask = &rte_flow_item_integrity_mask;
6797         if (!mlx5_validate_integrity_item(mask))
6798                 return rte_flow_error_set(error, ENOTSUP,
6799                                           RTE_FLOW_ERROR_TYPE_ITEM,
6800                                           integrity_item,
6801                                           "unsupported integrity filter");
6802         tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6803         if (spec->level > 1) {
6804                 if (!tunnel_item)
6805                         return rte_flow_error_set(error, ENOTSUP,
6806                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6807                                                   integrity_item,
6808                                                   "missing tunnel item");
6809                 item = tunnel_item;
6810                 end_item = mlx5_find_end_item(tunnel_item);
6811         } else {
6812                 end_item = tunnel_item ? tunnel_item :
6813                            mlx5_find_end_item(integrity_item);
6814         }
6815         if (mask->l3_ok || mask->ipv4_csum_ok) {
6816                 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6817                 if (!protocol)
6818                         return rte_flow_error_set(error, EINVAL,
6819                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6820                                                   integrity_item,
6821                                                   "missing L3 protocol");
6822         }
6823         if (mask->l4_ok || mask->l4_csum_ok) {
6824                 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6825                 if (!protocol)
6826                         return rte_flow_error_set(error, EINVAL,
6827                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6828                                                   integrity_item,
6829                                                   "missing L4 protocol");
6830         }
6831         return 0;
6832 }
6833
6834 /**
6835  * Internal validation function. For validating both actions and items.
6836  *
6837  * @param[in] dev
6838  *   Pointer to the rte_eth_dev structure.
6839  * @param[in] attr
6840  *   Pointer to the flow attributes.
6841  * @param[in] items
6842  *   Pointer to the list of items.
6843  * @param[in] actions
6844  *   Pointer to the list of actions.
6845  * @param[in] external
6846  *   This flow rule is created by request external to PMD.
6847  * @param[in] hairpin
6848  *   Number of hairpin TX actions, 0 means classic flow.
6849  * @param[out] error
6850  *   Pointer to the error structure.
6851  *
6852  * @return
6853  *   0 on success, a negative errno value otherwise and rte_errno is set.
6854  */
6855 static int
6856 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6857                  const struct rte_flow_item items[],
6858                  const struct rte_flow_action actions[],
6859                  bool external, int hairpin, struct rte_flow_error *error)
6860 {
6861         int ret;
6862         uint64_t action_flags = 0;
6863         uint64_t item_flags = 0;
6864         uint64_t last_item = 0;
6865         uint8_t next_protocol = 0xff;
6866         uint16_t ether_type = 0;
6867         int actions_n = 0;
6868         uint8_t item_ipv6_proto = 0;
6869         int fdb_mirror_limit = 0;
6870         int modify_after_mirror = 0;
6871         const struct rte_flow_item *geneve_item = NULL;
6872         const struct rte_flow_item *gre_item = NULL;
6873         const struct rte_flow_item *gtp_item = NULL;
6874         const struct rte_flow_action_raw_decap *decap;
6875         const struct rte_flow_action_raw_encap *encap;
6876         const struct rte_flow_action_rss *rss = NULL;
6877         const struct rte_flow_action_rss *sample_rss = NULL;
6878         const struct rte_flow_action_count *sample_count = NULL;
6879         const struct rte_flow_item_tcp nic_tcp_mask = {
6880                 .hdr = {
6881                         .tcp_flags = 0xFF,
6882                         .src_port = RTE_BE16(UINT16_MAX),
6883                         .dst_port = RTE_BE16(UINT16_MAX),
6884                 }
6885         };
6886         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6887                 .hdr = {
6888                         .src_addr =
6889                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6890                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6891                         .dst_addr =
6892                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6893                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6894                         .vtc_flow = RTE_BE32(0xffffffff),
6895                         .proto = 0xff,
6896                         .hop_limits = 0xff,
6897                 },
6898                 .has_frag_ext = 1,
6899         };
6900         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6901                 .hdr = {
6902                         .common = {
6903                                 .u32 =
6904                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6905                                         .type = 0xFF,
6906                                         }).u32),
6907                         },
6908                         .dummy[0] = 0xffffffff,
6909                 },
6910         };
6911         struct mlx5_priv *priv = dev->data->dev_private;
6912         struct mlx5_dev_config *dev_conf = &priv->config;
6913         uint16_t queue_index = 0xFFFF;
6914         const struct rte_flow_item_vlan *vlan_m = NULL;
6915         uint32_t rw_act_num = 0;
6916         uint64_t is_root;
6917         const struct mlx5_flow_tunnel *tunnel;
6918         enum mlx5_tof_rule_type tof_rule_type;
6919         struct flow_grp_info grp_info = {
6920                 .external = !!external,
6921                 .transfer = !!attr->transfer,
6922                 .fdb_def_rule = !!priv->fdb_def_rule,
6923                 .std_tbl_fix = true,
6924         };
6925         const struct rte_eth_hairpin_conf *conf;
6926         const struct rte_flow_item *rule_items = items;
6927         const struct rte_flow_item *port_id_item = NULL;
6928         bool def_policy = false;
6929         uint16_t udp_dport = 0;
6930
6931         if (items == NULL)
6932                 return -1;
6933         tunnel = is_tunnel_offload_active(dev) ?
6934                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6935         if (tunnel) {
6936                 if (priv->representor)
6937                         return rte_flow_error_set
6938                                 (error, ENOTSUP,
6939                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6940                                  NULL, "decap not supported for VF representor");
6941                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6942                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6943                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6944                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6945                                         MLX5_FLOW_ACTION_DECAP;
6946                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6947                                         (dev, attr, tunnel, tof_rule_type);
6948         }
6949         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6950         if (ret < 0)
6951                 return ret;
6952         is_root = (uint64_t)ret;
6953         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6954                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6955                 int type = items->type;
6956
6957                 if (!mlx5_flow_os_item_supported(type))
6958                         return rte_flow_error_set(error, ENOTSUP,
6959                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6960                                                   NULL, "item not supported");
6961                 switch (type) {
6962                 case RTE_FLOW_ITEM_TYPE_VOID:
6963                         break;
6964                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6965                         ret = flow_dv_validate_item_port_id
6966                                         (dev, items, attr, item_flags, error);
6967                         if (ret < 0)
6968                                 return ret;
6969                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6970                         port_id_item = items;
6971                         break;
6972                 case RTE_FLOW_ITEM_TYPE_ETH:
6973                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6974                                                           true, error);
6975                         if (ret < 0)
6976                                 return ret;
6977                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6978                                              MLX5_FLOW_LAYER_OUTER_L2;
6979                         if (items->mask != NULL && items->spec != NULL) {
6980                                 ether_type =
6981                                         ((const struct rte_flow_item_eth *)
6982                                          items->spec)->type;
6983                                 ether_type &=
6984                                         ((const struct rte_flow_item_eth *)
6985                                          items->mask)->type;
6986                                 ether_type = rte_be_to_cpu_16(ether_type);
6987                         } else {
6988                                 ether_type = 0;
6989                         }
6990                         break;
6991                 case RTE_FLOW_ITEM_TYPE_VLAN:
6992                         ret = flow_dv_validate_item_vlan(items, item_flags,
6993                                                          dev, error);
6994                         if (ret < 0)
6995                                 return ret;
6996                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6997                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6998                         if (items->mask != NULL && items->spec != NULL) {
6999                                 ether_type =
7000                                         ((const struct rte_flow_item_vlan *)
7001                                          items->spec)->inner_type;
7002                                 ether_type &=
7003                                         ((const struct rte_flow_item_vlan *)
7004                                          items->mask)->inner_type;
7005                                 ether_type = rte_be_to_cpu_16(ether_type);
7006                         } else {
7007                                 ether_type = 0;
7008                         }
7009                         /* Store outer VLAN mask for of_push_vlan action. */
7010                         if (!tunnel)
7011                                 vlan_m = items->mask;
7012                         break;
7013                 case RTE_FLOW_ITEM_TYPE_IPV4:
7014                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7015                                                   &item_flags, &tunnel);
7016                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7017                                                          last_item, ether_type,
7018                                                          error);
7019                         if (ret < 0)
7020                                 return ret;
7021                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7022                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7023                         if (items->mask != NULL &&
7024                             ((const struct rte_flow_item_ipv4 *)
7025                              items->mask)->hdr.next_proto_id) {
7026                                 next_protocol =
7027                                         ((const struct rte_flow_item_ipv4 *)
7028                                          (items->spec))->hdr.next_proto_id;
7029                                 next_protocol &=
7030                                         ((const struct rte_flow_item_ipv4 *)
7031                                          (items->mask))->hdr.next_proto_id;
7032                         } else {
7033                                 /* Reset for inner layer. */
7034                                 next_protocol = 0xff;
7035                         }
7036                         break;
7037                 case RTE_FLOW_ITEM_TYPE_IPV6:
7038                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7039                                                   &item_flags, &tunnel);
7040                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7041                                                            last_item,
7042                                                            ether_type,
7043                                                            &nic_ipv6_mask,
7044                                                            error);
7045                         if (ret < 0)
7046                                 return ret;
7047                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7048                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7049                         if (items->mask != NULL &&
7050                             ((const struct rte_flow_item_ipv6 *)
7051                              items->mask)->hdr.proto) {
7052                                 item_ipv6_proto =
7053                                         ((const struct rte_flow_item_ipv6 *)
7054                                          items->spec)->hdr.proto;
7055                                 next_protocol =
7056                                         ((const struct rte_flow_item_ipv6 *)
7057                                          items->spec)->hdr.proto;
7058                                 next_protocol &=
7059                                         ((const struct rte_flow_item_ipv6 *)
7060                                          items->mask)->hdr.proto;
7061                         } else {
7062                                 /* Reset for inner layer. */
7063                                 next_protocol = 0xff;
7064                         }
7065                         break;
7066                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7067                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
7068                                                                   item_flags,
7069                                                                   error);
7070                         if (ret < 0)
7071                                 return ret;
7072                         last_item = tunnel ?
7073                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7074                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7075                         if (items->mask != NULL &&
7076                             ((const struct rte_flow_item_ipv6_frag_ext *)
7077                              items->mask)->hdr.next_header) {
7078                                 next_protocol =
7079                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7080                                  items->spec)->hdr.next_header;
7081                                 next_protocol &=
7082                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7083                                  items->mask)->hdr.next_header;
7084                         } else {
7085                                 /* Reset for inner layer. */
7086                                 next_protocol = 0xff;
7087                         }
7088                         break;
7089                 case RTE_FLOW_ITEM_TYPE_TCP:
7090                         ret = mlx5_flow_validate_item_tcp
7091                                                 (items, item_flags,
7092                                                  next_protocol,
7093                                                  &nic_tcp_mask,
7094                                                  error);
7095                         if (ret < 0)
7096                                 return ret;
7097                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7098                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7099                         break;
7100                 case RTE_FLOW_ITEM_TYPE_UDP:
7101                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7102                                                           next_protocol,
7103                                                           error);
7104                         const struct rte_flow_item_udp *spec = items->spec;
7105                         const struct rte_flow_item_udp *mask = items->mask;
7106                         if (!mask)
7107                                 mask = &rte_flow_item_udp_mask;
7108                         if (spec != NULL)
7109                                 udp_dport = rte_be_to_cpu_16
7110                                                 (spec->hdr.dst_port &
7111                                                  mask->hdr.dst_port);
7112                         if (ret < 0)
7113                                 return ret;
7114                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7115                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7116                         break;
7117                 case RTE_FLOW_ITEM_TYPE_GRE:
7118                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7119                                                           next_protocol, error);
7120                         if (ret < 0)
7121                                 return ret;
7122                         gre_item = items;
7123                         last_item = MLX5_FLOW_LAYER_GRE;
7124                         break;
7125                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7126                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7127                                                             next_protocol,
7128                                                             error);
7129                         if (ret < 0)
7130                                 return ret;
7131                         last_item = MLX5_FLOW_LAYER_NVGRE;
7132                         break;
7133                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7134                         ret = mlx5_flow_validate_item_gre_key
7135                                 (items, item_flags, gre_item, error);
7136                         if (ret < 0)
7137                                 return ret;
7138                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7139                         break;
7140                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7141                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7142                                                             items, item_flags,
7143                                                             attr, error);
7144                         if (ret < 0)
7145                                 return ret;
7146                         last_item = MLX5_FLOW_LAYER_VXLAN;
7147                         break;
7148                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7149                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7150                                                                 item_flags, dev,
7151                                                                 error);
7152                         if (ret < 0)
7153                                 return ret;
7154                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7155                         break;
7156                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7157                         ret = mlx5_flow_validate_item_geneve(items,
7158                                                              item_flags, dev,
7159                                                              error);
7160                         if (ret < 0)
7161                                 return ret;
7162                         geneve_item = items;
7163                         last_item = MLX5_FLOW_LAYER_GENEVE;
7164                         break;
7165                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7166                         ret = mlx5_flow_validate_item_geneve_opt(items,
7167                                                                  last_item,
7168                                                                  geneve_item,
7169                                                                  dev,
7170                                                                  error);
7171                         if (ret < 0)
7172                                 return ret;
7173                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7174                         break;
7175                 case RTE_FLOW_ITEM_TYPE_MPLS:
7176                         ret = mlx5_flow_validate_item_mpls(dev, items,
7177                                                            item_flags,
7178                                                            last_item, error);
7179                         if (ret < 0)
7180                                 return ret;
7181                         last_item = MLX5_FLOW_LAYER_MPLS;
7182                         break;
7183
7184                 case RTE_FLOW_ITEM_TYPE_MARK:
7185                         ret = flow_dv_validate_item_mark(dev, items, attr,
7186                                                          error);
7187                         if (ret < 0)
7188                                 return ret;
7189                         last_item = MLX5_FLOW_ITEM_MARK;
7190                         break;
7191                 case RTE_FLOW_ITEM_TYPE_META:
7192                         ret = flow_dv_validate_item_meta(dev, items, attr,
7193                                                          error);
7194                         if (ret < 0)
7195                                 return ret;
7196                         last_item = MLX5_FLOW_ITEM_METADATA;
7197                         break;
7198                 case RTE_FLOW_ITEM_TYPE_ICMP:
7199                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7200                                                            next_protocol,
7201                                                            error);
7202                         if (ret < 0)
7203                                 return ret;
7204                         last_item = MLX5_FLOW_LAYER_ICMP;
7205                         break;
7206                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7207                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7208                                                             next_protocol,
7209                                                             error);
7210                         if (ret < 0)
7211                                 return ret;
7212                         item_ipv6_proto = IPPROTO_ICMPV6;
7213                         last_item = MLX5_FLOW_LAYER_ICMP6;
7214                         break;
7215                 case RTE_FLOW_ITEM_TYPE_TAG:
7216                         ret = flow_dv_validate_item_tag(dev, items,
7217                                                         attr, error);
7218                         if (ret < 0)
7219                                 return ret;
7220                         last_item = MLX5_FLOW_ITEM_TAG;
7221                         break;
7222                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7223                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7224                         break;
7225                 case RTE_FLOW_ITEM_TYPE_GTP:
7226                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7227                                                         error);
7228                         if (ret < 0)
7229                                 return ret;
7230                         gtp_item = items;
7231                         last_item = MLX5_FLOW_LAYER_GTP;
7232                         break;
7233                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7234                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7235                                                             gtp_item, attr,
7236                                                             error);
7237                         if (ret < 0)
7238                                 return ret;
7239                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7240                         break;
7241                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7242                         /* Capacity will be checked in the translate stage. */
7243                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7244                                                             last_item,
7245                                                             ether_type,
7246                                                             &nic_ecpri_mask,
7247                                                             error);
7248                         if (ret < 0)
7249                                 return ret;
7250                         last_item = MLX5_FLOW_LAYER_ECPRI;
7251                         break;
7252                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7253                         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7254                                 return rte_flow_error_set
7255                                         (error, ENOTSUP,
7256                                          RTE_FLOW_ERROR_TYPE_ITEM,
7257                                          NULL, "multiple integrity items not supported");
7258                         ret = flow_dv_validate_item_integrity(dev, rule_items,
7259                                                               items, error);
7260                         if (ret < 0)
7261                                 return ret;
7262                         last_item = MLX5_FLOW_ITEM_INTEGRITY;
7263                         break;
7264                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7265                         ret = flow_dv_validate_item_aso_ct(dev, items,
7266                                                            &item_flags, error);
7267                         if (ret < 0)
7268                                 return ret;
7269                         break;
7270                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7271                         /* tunnel offload item was processed before
7272                          * list it here as a supported type
7273                          */
7274                         break;
7275                 default:
7276                         return rte_flow_error_set(error, ENOTSUP,
7277                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7278                                                   NULL, "item not supported");
7279                 }
7280                 item_flags |= last_item;
7281         }
7282         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7283                 int type = actions->type;
7284                 bool shared_count = false;
7285
7286                 if (!mlx5_flow_os_action_supported(type))
7287                         return rte_flow_error_set(error, ENOTSUP,
7288                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7289                                                   actions,
7290                                                   "action not supported");
7291                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7292                         return rte_flow_error_set(error, ENOTSUP,
7293                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7294                                                   actions, "too many actions");
7295                 if (action_flags &
7296                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7297                         return rte_flow_error_set(error, ENOTSUP,
7298                                 RTE_FLOW_ERROR_TYPE_ACTION,
7299                                 NULL, "meter action with policy "
7300                                 "must be the last action");
7301                 switch (type) {
7302                 case RTE_FLOW_ACTION_TYPE_VOID:
7303                         break;
7304                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7305                         ret = flow_dv_validate_action_port_id(dev,
7306                                                               action_flags,
7307                                                               actions,
7308                                                               attr,
7309                                                               error);
7310                         if (ret)
7311                                 return ret;
7312                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7313                         ++actions_n;
7314                         break;
7315                 case RTE_FLOW_ACTION_TYPE_FLAG:
7316                         ret = flow_dv_validate_action_flag(dev, action_flags,
7317                                                            attr, error);
7318                         if (ret < 0)
7319                                 return ret;
7320                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7321                                 /* Count all modify-header actions as one. */
7322                                 if (!(action_flags &
7323                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7324                                         ++actions_n;
7325                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7326                                                 MLX5_FLOW_ACTION_MARK_EXT;
7327                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7328                                         modify_after_mirror = 1;
7329
7330                         } else {
7331                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7332                                 ++actions_n;
7333                         }
7334                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7335                         break;
7336                 case RTE_FLOW_ACTION_TYPE_MARK:
7337                         ret = flow_dv_validate_action_mark(dev, actions,
7338                                                            action_flags,
7339                                                            attr, error);
7340                         if (ret < 0)
7341                                 return ret;
7342                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7343                                 /* Count all modify-header actions as one. */
7344                                 if (!(action_flags &
7345                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7346                                         ++actions_n;
7347                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7348                                                 MLX5_FLOW_ACTION_MARK_EXT;
7349                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7350                                         modify_after_mirror = 1;
7351                         } else {
7352                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7353                                 ++actions_n;
7354                         }
7355                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7356                         break;
7357                 case RTE_FLOW_ACTION_TYPE_SET_META:
7358                         ret = flow_dv_validate_action_set_meta(dev, actions,
7359                                                                action_flags,
7360                                                                attr, error);
7361                         if (ret < 0)
7362                                 return ret;
7363                         /* Count all modify-header actions as one action. */
7364                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7365                                 ++actions_n;
7366                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7367                                 modify_after_mirror = 1;
7368                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7369                         rw_act_num += MLX5_ACT_NUM_SET_META;
7370                         break;
7371                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7372                         ret = flow_dv_validate_action_set_tag(dev, actions,
7373                                                               action_flags,
7374                                                               attr, error);
7375                         if (ret < 0)
7376                                 return ret;
7377                         /* Count all modify-header actions as one action. */
7378                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7379                                 ++actions_n;
7380                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7381                                 modify_after_mirror = 1;
7382                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7383                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7384                         break;
7385                 case RTE_FLOW_ACTION_TYPE_DROP:
7386                         ret = mlx5_flow_validate_action_drop(action_flags,
7387                                                              attr, error);
7388                         if (ret < 0)
7389                                 return ret;
7390                         action_flags |= MLX5_FLOW_ACTION_DROP;
7391                         ++actions_n;
7392                         break;
7393                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7394                         ret = mlx5_flow_validate_action_queue(actions,
7395                                                               action_flags, dev,
7396                                                               attr, error);
7397                         if (ret < 0)
7398                                 return ret;
7399                         queue_index = ((const struct rte_flow_action_queue *)
7400                                                         (actions->conf))->index;
7401                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7402                         ++actions_n;
7403                         break;
7404                 case RTE_FLOW_ACTION_TYPE_RSS:
7405                         rss = actions->conf;
7406                         ret = mlx5_flow_validate_action_rss(actions,
7407                                                             action_flags, dev,
7408                                                             attr, item_flags,
7409                                                             error);
7410                         if (ret < 0)
7411                                 return ret;
7412                         if (rss && sample_rss &&
7413                             (sample_rss->level != rss->level ||
7414                             sample_rss->types != rss->types))
7415                                 return rte_flow_error_set(error, ENOTSUP,
7416                                         RTE_FLOW_ERROR_TYPE_ACTION,
7417                                         NULL,
7418                                         "Can't use the different RSS types "
7419                                         "or level in the same flow");
7420                         if (rss != NULL && rss->queue_num)
7421                                 queue_index = rss->queue[0];
7422                         action_flags |= MLX5_FLOW_ACTION_RSS;
7423                         ++actions_n;
7424                         break;
7425                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7426                         ret =
7427                         mlx5_flow_validate_action_default_miss(action_flags,
7428                                         attr, error);
7429                         if (ret < 0)
7430                                 return ret;
7431                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7432                         ++actions_n;
7433                         break;
7434                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7435                 case RTE_FLOW_ACTION_TYPE_COUNT:
7436                         shared_count = is_shared_action_count(actions);
7437                         ret = flow_dv_validate_action_count(dev, shared_count,
7438                                                             action_flags,
7439                                                             error);
7440                         if (ret < 0)
7441                                 return ret;
7442                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7443                         ++actions_n;
7444                         break;
7445                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7446                         if (flow_dv_validate_action_pop_vlan(dev,
7447                                                              action_flags,
7448                                                              actions,
7449                                                              item_flags, attr,
7450                                                              error))
7451                                 return -rte_errno;
7452                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7453                                 modify_after_mirror = 1;
7454                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7455                         ++actions_n;
7456                         break;
7457                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7458                         ret = flow_dv_validate_action_push_vlan(dev,
7459                                                                 action_flags,
7460                                                                 vlan_m,
7461                                                                 actions, attr,
7462                                                                 error);
7463                         if (ret < 0)
7464                                 return ret;
7465                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7466                                 modify_after_mirror = 1;
7467                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7468                         ++actions_n;
7469                         break;
7470                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7471                         ret = flow_dv_validate_action_set_vlan_pcp
7472                                                 (action_flags, actions, error);
7473                         if (ret < 0)
7474                                 return ret;
7475                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7476                                 modify_after_mirror = 1;
7477                         /* Count PCP with push_vlan command. */
7478                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7479                         break;
7480                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7481                         ret = flow_dv_validate_action_set_vlan_vid
7482                                                 (item_flags, action_flags,
7483                                                  actions, error);
7484                         if (ret < 0)
7485                                 return ret;
7486                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7487                                 modify_after_mirror = 1;
7488                         /* Count VID with push_vlan command. */
7489                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7490                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7491                         break;
7492                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7493                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7494                         ret = flow_dv_validate_action_l2_encap(dev,
7495                                                                action_flags,
7496                                                                actions, attr,
7497                                                                error);
7498                         if (ret < 0)
7499                                 return ret;
7500                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7501                         ++actions_n;
7502                         break;
7503                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7504                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7505                         ret = flow_dv_validate_action_decap(dev, action_flags,
7506                                                             actions, item_flags,
7507                                                             attr, error);
7508                         if (ret < 0)
7509                                 return ret;
7510                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7511                                 modify_after_mirror = 1;
7512                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7513                         ++actions_n;
7514                         break;
7515                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7516                         ret = flow_dv_validate_action_raw_encap_decap
7517                                 (dev, NULL, actions->conf, attr, &action_flags,
7518                                  &actions_n, actions, item_flags, error);
7519                         if (ret < 0)
7520                                 return ret;
7521                         break;
7522                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7523                         decap = actions->conf;
7524                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7525                                 ;
7526                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7527                                 encap = NULL;
7528                                 actions--;
7529                         } else {
7530                                 encap = actions->conf;
7531                         }
7532                         ret = flow_dv_validate_action_raw_encap_decap
7533                                            (dev,
7534                                             decap ? decap : &empty_decap, encap,
7535                                             attr, &action_flags, &actions_n,
7536                                             actions, item_flags, error);
7537                         if (ret < 0)
7538                                 return ret;
7539                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7540                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7541                                 modify_after_mirror = 1;
7542                         break;
7543                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7544                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7545                         ret = flow_dv_validate_action_modify_mac(action_flags,
7546                                                                  actions,
7547                                                                  item_flags,
7548                                                                  error);
7549                         if (ret < 0)
7550                                 return ret;
7551                         /* Count all modify-header actions as one action. */
7552                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7553                                 ++actions_n;
7554                         action_flags |= actions->type ==
7555                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7556                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7557                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7558                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7559                                 modify_after_mirror = 1;
7560                         /*
7561                          * Even if the source and destination MAC addresses have
7562                          * overlap in the header with 4B alignment, the convert
7563                          * function will handle them separately and 4 SW actions
7564                          * will be created. And 2 actions will be added each
7565                          * time no matter how many bytes of address will be set.
7566                          */
7567                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7568                         break;
7569                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7570                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7571                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7572                                                                   actions,
7573                                                                   item_flags,
7574                                                                   error);
7575                         if (ret < 0)
7576                                 return ret;
7577                         /* Count all modify-header actions as one action. */
7578                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7579                                 ++actions_n;
7580                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7581                                 modify_after_mirror = 1;
7582                         action_flags |= actions->type ==
7583                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7584                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7585                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7586                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7587                         break;
7588                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7589                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7590                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7591                                                                   actions,
7592                                                                   item_flags,
7593                                                                   error);
7594                         if (ret < 0)
7595                                 return ret;
7596                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7597                                 return rte_flow_error_set(error, ENOTSUP,
7598                                         RTE_FLOW_ERROR_TYPE_ACTION,
7599                                         actions,
7600                                         "Can't change header "
7601                                         "with ICMPv6 proto");
7602                         /* Count all modify-header actions as one action. */
7603                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7604                                 ++actions_n;
7605                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7606                                 modify_after_mirror = 1;
7607                         action_flags |= actions->type ==
7608                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7609                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7610                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7611                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7612                         break;
7613                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7614                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7615                         ret = flow_dv_validate_action_modify_tp(action_flags,
7616                                                                 actions,
7617                                                                 item_flags,
7618                                                                 error);
7619                         if (ret < 0)
7620                                 return ret;
7621                         /* Count all modify-header actions as one action. */
7622                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7623                                 ++actions_n;
7624                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7625                                 modify_after_mirror = 1;
7626                         action_flags |= actions->type ==
7627                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7628                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7629                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7630                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7631                         break;
7632                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7633                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7634                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7635                                                                  actions,
7636                                                                  item_flags,
7637                                                                  error);
7638                         if (ret < 0)
7639                                 return ret;
7640                         /* Count all modify-header actions as one action. */
7641                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7642                                 ++actions_n;
7643                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7644                                 modify_after_mirror = 1;
7645                         action_flags |= actions->type ==
7646                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7647                                                 MLX5_FLOW_ACTION_SET_TTL :
7648                                                 MLX5_FLOW_ACTION_DEC_TTL;
7649                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7650                         break;
7651                 case RTE_FLOW_ACTION_TYPE_JUMP:
7652                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7653                                                            action_flags,
7654                                                            attr, external,
7655                                                            error);
7656                         if (ret)
7657                                 return ret;
7658                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7659                             fdb_mirror_limit)
7660                                 return rte_flow_error_set(error, EINVAL,
7661                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7662                                                   NULL,
7663                                                   "sample and jump action combination is not supported");
7664                         ++actions_n;
7665                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7666                         break;
7667                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7668                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7669                         ret = flow_dv_validate_action_modify_tcp_seq
7670                                                                 (action_flags,
7671                                                                  actions,
7672                                                                  item_flags,
7673                                                                  error);
7674                         if (ret < 0)
7675                                 return ret;
7676                         /* Count all modify-header actions as one action. */
7677                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7678                                 ++actions_n;
7679                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7680                                 modify_after_mirror = 1;
7681                         action_flags |= actions->type ==
7682                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7683                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7684                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7685                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7686                         break;
7687                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7688                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7689                         ret = flow_dv_validate_action_modify_tcp_ack
7690                                                                 (action_flags,
7691                                                                  actions,
7692                                                                  item_flags,
7693                                                                  error);
7694                         if (ret < 0)
7695                                 return ret;
7696                         /* Count all modify-header actions as one action. */
7697                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7698                                 ++actions_n;
7699                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7700                                 modify_after_mirror = 1;
7701                         action_flags |= actions->type ==
7702                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7703                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7704                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7705                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7706                         break;
7707                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7708                         break;
7709                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7710                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7711                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7712                         break;
7713                 case RTE_FLOW_ACTION_TYPE_METER:
7714                         ret = mlx5_flow_validate_action_meter(dev,
7715                                                               action_flags,
7716                                                               actions, attr,
7717                                                               port_id_item,
7718                                                               &def_policy,
7719                                                               error);
7720                         if (ret < 0)
7721                                 return ret;
7722                         action_flags |= MLX5_FLOW_ACTION_METER;
7723                         if (!def_policy)
7724                                 action_flags |=
7725                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7726                         ++actions_n;
7727                         /* Meter action will add one more TAG action. */
7728                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7729                         break;
7730                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7731                         if (!attr->transfer && !attr->group)
7732                                 return rte_flow_error_set(error, ENOTSUP,
7733                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7734                                                                            NULL,
7735                           "Shared ASO age action is not supported for group 0");
7736                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7737                                 return rte_flow_error_set
7738                                                   (error, EINVAL,
7739                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7740                                                    NULL,
7741                                                    "duplicate age actions set");
7742                         action_flags |= MLX5_FLOW_ACTION_AGE;
7743                         ++actions_n;
7744                         break;
7745                 case RTE_FLOW_ACTION_TYPE_AGE:
7746                         ret = flow_dv_validate_action_age(action_flags,
7747                                                           actions, dev,
7748                                                           error);
7749                         if (ret < 0)
7750                                 return ret;
7751                         /*
7752                          * Validate the regular AGE action (using counter)
7753                          * mutual exclusion with share counter actions.
7754                          */
7755                         if (!priv->sh->flow_hit_aso_en) {
7756                                 if (shared_count)
7757                                         return rte_flow_error_set
7758                                                 (error, EINVAL,
7759                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7760                                                 NULL,
7761                                                 "old age and shared count combination is not supported");
7762                                 if (sample_count)
7763                                         return rte_flow_error_set
7764                                                 (error, EINVAL,
7765                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7766                                                 NULL,
7767                                                 "old age action and count must be in the same sub flow");
7768                         }
7769                         action_flags |= MLX5_FLOW_ACTION_AGE;
7770                         ++actions_n;
7771                         break;
7772                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7773                         ret = flow_dv_validate_action_modify_ipv4_dscp
7774                                                          (action_flags,
7775                                                           actions,
7776                                                           item_flags,
7777                                                           error);
7778                         if (ret < 0)
7779                                 return ret;
7780                         /* Count all modify-header actions as one action. */
7781                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7782                                 ++actions_n;
7783                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7784                                 modify_after_mirror = 1;
7785                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7786                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7787                         break;
7788                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7789                         ret = flow_dv_validate_action_modify_ipv6_dscp
7790                                                                 (action_flags,
7791                                                                  actions,
7792                                                                  item_flags,
7793                                                                  error);
7794                         if (ret < 0)
7795                                 return ret;
7796                         /* Count all modify-header actions as one action. */
7797                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7798                                 ++actions_n;
7799                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7800                                 modify_after_mirror = 1;
7801                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7802                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7803                         break;
7804                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7805                         ret = flow_dv_validate_action_sample(&action_flags,
7806                                                              actions, dev,
7807                                                              attr, item_flags,
7808                                                              rss, &sample_rss,
7809                                                              &sample_count,
7810                                                              &fdb_mirror_limit,
7811                                                              error);
7812                         if (ret < 0)
7813                                 return ret;
7814                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7815                         ++actions_n;
7816                         break;
7817                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7818                         ret = flow_dv_validate_action_modify_field(dev,
7819                                                                    action_flags,
7820                                                                    actions,
7821                                                                    attr,
7822                                                                    error);
7823                         if (ret < 0)
7824                                 return ret;
7825                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7826                                 modify_after_mirror = 1;
7827                         /* Count all modify-header actions as one action. */
7828                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7829                                 ++actions_n;
7830                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7831                         rw_act_num += ret;
7832                         break;
7833                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7834                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7835                                                              item_flags, attr,
7836                                                              error);
7837                         if (ret < 0)
7838                                 return ret;
7839                         action_flags |= MLX5_FLOW_ACTION_CT;
7840                         break;
7841                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7842                         /* tunnel offload action was processed before
7843                          * list it here as a supported type
7844                          */
7845                         break;
7846                 default:
7847                         return rte_flow_error_set(error, ENOTSUP,
7848                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7849                                                   actions,
7850                                                   "action not supported");
7851                 }
7852         }
7853         /*
7854          * Validate actions in flow rules
7855          * - Explicit decap action is prohibited by the tunnel offload API.
7856          * - Drop action in tunnel steer rule is prohibited by the API.
7857          * - Application cannot use MARK action because it's value can mask
7858          *   tunnel default miss nitification.
7859          * - JUMP in tunnel match rule has no support in current PMD
7860          *   implementation.
7861          * - TAG & META are reserved for future uses.
7862          */
7863         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7864                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7865                                             MLX5_FLOW_ACTION_MARK     |
7866                                             MLX5_FLOW_ACTION_SET_TAG  |
7867                                             MLX5_FLOW_ACTION_SET_META |
7868                                             MLX5_FLOW_ACTION_DROP;
7869
7870                 if (action_flags & bad_actions_mask)
7871                         return rte_flow_error_set
7872                                         (error, EINVAL,
7873                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7874                                         "Invalid RTE action in tunnel "
7875                                         "set decap rule");
7876                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7877                         return rte_flow_error_set
7878                                         (error, EINVAL,
7879                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7880                                         "tunnel set decap rule must terminate "
7881                                         "with JUMP");
7882                 if (!attr->ingress)
7883                         return rte_flow_error_set
7884                                         (error, EINVAL,
7885                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7886                                         "tunnel flows for ingress traffic only");
7887         }
7888         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7889                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7890                                             MLX5_FLOW_ACTION_MARK    |
7891                                             MLX5_FLOW_ACTION_SET_TAG |
7892                                             MLX5_FLOW_ACTION_SET_META;
7893
7894                 if (action_flags & bad_actions_mask)
7895                         return rte_flow_error_set
7896                                         (error, EINVAL,
7897                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7898                                         "Invalid RTE action in tunnel "
7899                                         "set match rule");
7900         }
7901         /*
7902          * Validate the drop action mutual exclusion with other actions.
7903          * Drop action is mutually-exclusive with any other action, except for
7904          * Count action.
7905          * Drop action compatibility with tunnel offload was already validated.
7906          */
7907         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7908                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7909         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7910             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7911                 return rte_flow_error_set(error, EINVAL,
7912                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7913                                           "Drop action is mutually-exclusive "
7914                                           "with any other action, except for "
7915                                           "Count action");
7916         /* Eswitch has few restrictions on using items and actions */
7917         if (attr->transfer) {
7918                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7919                     action_flags & MLX5_FLOW_ACTION_FLAG)
7920                         return rte_flow_error_set(error, ENOTSUP,
7921                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7922                                                   NULL,
7923                                                   "unsupported action FLAG");
7924                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7925                     action_flags & MLX5_FLOW_ACTION_MARK)
7926                         return rte_flow_error_set(error, ENOTSUP,
7927                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7928                                                   NULL,
7929                                                   "unsupported action MARK");
7930                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7931                         return rte_flow_error_set(error, ENOTSUP,
7932                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7933                                                   NULL,
7934                                                   "unsupported action QUEUE");
7935                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7936                         return rte_flow_error_set(error, ENOTSUP,
7937                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7938                                                   NULL,
7939                                                   "unsupported action RSS");
7940                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7941                         return rte_flow_error_set(error, EINVAL,
7942                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7943                                                   actions,
7944                                                   "no fate action is found");
7945         } else {
7946                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7947                         return rte_flow_error_set(error, EINVAL,
7948                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7949                                                   actions,
7950                                                   "no fate action is found");
7951         }
7952         /*
7953          * Continue validation for Xcap and VLAN actions.
7954          * If hairpin is working in explicit TX rule mode, there is no actions
7955          * splitting and the validation of hairpin ingress flow should be the
7956          * same as other standard flows.
7957          */
7958         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7959                              MLX5_FLOW_VLAN_ACTIONS)) &&
7960             (queue_index == 0xFFFF ||
7961              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7962              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7963              conf->tx_explicit != 0))) {
7964                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7965                     MLX5_FLOW_XCAP_ACTIONS)
7966                         return rte_flow_error_set(error, ENOTSUP,
7967                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7968                                                   NULL, "encap and decap "
7969                                                   "combination aren't supported");
7970                 if (!attr->transfer && attr->ingress) {
7971                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7972                                 return rte_flow_error_set
7973                                                 (error, ENOTSUP,
7974                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7975                                                  NULL, "encap is not supported"
7976                                                  " for ingress traffic");
7977                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7978                                 return rte_flow_error_set
7979                                                 (error, ENOTSUP,
7980                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7981                                                  NULL, "push VLAN action not "
7982                                                  "supported for ingress");
7983                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7984                                         MLX5_FLOW_VLAN_ACTIONS)
7985                                 return rte_flow_error_set
7986                                                 (error, ENOTSUP,
7987                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7988                                                  NULL, "no support for "
7989                                                  "multiple VLAN actions");
7990                 }
7991         }
7992         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7993                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7994                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7995                         attr->ingress)
7996                         return rte_flow_error_set
7997                                 (error, ENOTSUP,
7998                                 RTE_FLOW_ERROR_TYPE_ACTION,
7999                                 NULL, "fate action not supported for "
8000                                 "meter with policy");
8001                 if (attr->egress) {
8002                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
8003                                 return rte_flow_error_set
8004                                         (error, ENOTSUP,
8005                                         RTE_FLOW_ERROR_TYPE_ACTION,
8006                                         NULL, "modify header action in egress "
8007                                         "cannot be done before meter action");
8008                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8009                                 return rte_flow_error_set
8010                                         (error, ENOTSUP,
8011                                         RTE_FLOW_ERROR_TYPE_ACTION,
8012                                         NULL, "encap action in egress "
8013                                         "cannot be done before meter action");
8014                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8015                                 return rte_flow_error_set
8016                                         (error, ENOTSUP,
8017                                         RTE_FLOW_ERROR_TYPE_ACTION,
8018                                         NULL, "push vlan action in egress "
8019                                         "cannot be done before meter action");
8020                 }
8021         }
8022         /*
8023          * Hairpin flow will add one more TAG action in TX implicit mode.
8024          * In TX explicit mode, there will be no hairpin flow ID.
8025          */
8026         if (hairpin > 0)
8027                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8028         /* extra metadata enabled: one more TAG action will be add. */
8029         if (dev_conf->dv_flow_en &&
8030             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8031             mlx5_flow_ext_mreg_supported(dev))
8032                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8033         if (rw_act_num >
8034                         flow_dv_modify_hdr_action_max(dev, is_root)) {
8035                 return rte_flow_error_set(error, ENOTSUP,
8036                                           RTE_FLOW_ERROR_TYPE_ACTION,
8037                                           NULL, "too many header modify"
8038                                           " actions to support");
8039         }
8040         /* Eswitch egress mirror and modify flow has limitation on CX5 */
8041         if (fdb_mirror_limit && modify_after_mirror)
8042                 return rte_flow_error_set(error, EINVAL,
8043                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8044                                 "sample before modify action is not supported");
8045         return 0;
8046 }
8047
8048 /**
8049  * Internal preparation function. Allocates the DV flow size,
8050  * this size is constant.
8051  *
8052  * @param[in] dev
8053  *   Pointer to the rte_eth_dev structure.
8054  * @param[in] attr
8055  *   Pointer to the flow attributes.
8056  * @param[in] items
8057  *   Pointer to the list of items.
8058  * @param[in] actions
8059  *   Pointer to the list of actions.
8060  * @param[out] error
8061  *   Pointer to the error structure.
8062  *
8063  * @return
8064  *   Pointer to mlx5_flow object on success,
8065  *   otherwise NULL and rte_errno is set.
8066  */
8067 static struct mlx5_flow *
8068 flow_dv_prepare(struct rte_eth_dev *dev,
8069                 const struct rte_flow_attr *attr __rte_unused,
8070                 const struct rte_flow_item items[] __rte_unused,
8071                 const struct rte_flow_action actions[] __rte_unused,
8072                 struct rte_flow_error *error)
8073 {
8074         uint32_t handle_idx = 0;
8075         struct mlx5_flow *dev_flow;
8076         struct mlx5_flow_handle *dev_handle;
8077         struct mlx5_priv *priv = dev->data->dev_private;
8078         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8079
8080         MLX5_ASSERT(wks);
8081         wks->skip_matcher_reg = 0;
8082         wks->policy = NULL;
8083         wks->final_policy = NULL;
8084         /* In case of corrupting the memory. */
8085         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8086                 rte_flow_error_set(error, ENOSPC,
8087                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8088                                    "not free temporary device flow");
8089                 return NULL;
8090         }
8091         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8092                                    &handle_idx);
8093         if (!dev_handle) {
8094                 rte_flow_error_set(error, ENOMEM,
8095                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8096                                    "not enough memory to create flow handle");
8097                 return NULL;
8098         }
8099         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8100         dev_flow = &wks->flows[wks->flow_idx++];
8101         memset(dev_flow, 0, sizeof(*dev_flow));
8102         dev_flow->handle = dev_handle;
8103         dev_flow->handle_idx = handle_idx;
8104         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8105         dev_flow->ingress = attr->ingress;
8106         dev_flow->dv.transfer = attr->transfer;
8107         return dev_flow;
8108 }
8109
8110 #ifdef RTE_LIBRTE_MLX5_DEBUG
8111 /**
8112  * Sanity check for match mask and value. Similar to check_valid_spec() in
8113  * kernel driver. If unmasked bit is present in value, it returns failure.
8114  *
8115  * @param match_mask
8116  *   pointer to match mask buffer.
8117  * @param match_value
8118  *   pointer to match value buffer.
8119  *
8120  * @return
8121  *   0 if valid, -EINVAL otherwise.
8122  */
8123 static int
8124 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8125 {
8126         uint8_t *m = match_mask;
8127         uint8_t *v = match_value;
8128         unsigned int i;
8129
8130         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8131                 if (v[i] & ~m[i]) {
8132                         DRV_LOG(ERR,
8133                                 "match_value differs from match_criteria"
8134                                 " %p[%u] != %p[%u]",
8135                                 match_value, i, match_mask, i);
8136                         return -EINVAL;
8137                 }
8138         }
8139         return 0;
8140 }
8141 #endif
8142
8143 /**
8144  * Add match of ip_version.
8145  *
8146  * @param[in] group
8147  *   Flow group.
8148  * @param[in] headers_v
8149  *   Values header pointer.
8150  * @param[in] headers_m
8151  *   Masks header pointer.
8152  * @param[in] ip_version
8153  *   The IP version to set.
8154  */
8155 static inline void
8156 flow_dv_set_match_ip_version(uint32_t group,
8157                              void *headers_v,
8158                              void *headers_m,
8159                              uint8_t ip_version)
8160 {
8161         if (group == 0)
8162                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8163         else
8164                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8165                          ip_version);
8166         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8167         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8168         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8169 }
8170
8171 /**
8172  * Add Ethernet item to matcher and to the value.
8173  *
8174  * @param[in, out] matcher
8175  *   Flow matcher.
8176  * @param[in, out] key
8177  *   Flow matcher value.
8178  * @param[in] item
8179  *   Flow pattern to translate.
8180  * @param[in] inner
8181  *   Item is inner pattern.
8182  */
8183 static void
8184 flow_dv_translate_item_eth(void *matcher, void *key,
8185                            const struct rte_flow_item *item, int inner,
8186                            uint32_t group)
8187 {
8188         const struct rte_flow_item_eth *eth_m = item->mask;
8189         const struct rte_flow_item_eth *eth_v = item->spec;
8190         const struct rte_flow_item_eth nic_mask = {
8191                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8192                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8193                 .type = RTE_BE16(0xffff),
8194                 .has_vlan = 0,
8195         };
8196         void *hdrs_m;
8197         void *hdrs_v;
8198         char *l24_v;
8199         unsigned int i;
8200
8201         if (!eth_v)
8202                 return;
8203         if (!eth_m)
8204                 eth_m = &nic_mask;
8205         if (inner) {
8206                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8207                                          inner_headers);
8208                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8209         } else {
8210                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8211                                          outer_headers);
8212                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8213         }
8214         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8215                &eth_m->dst, sizeof(eth_m->dst));
8216         /* The value must be in the range of the mask. */
8217         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8218         for (i = 0; i < sizeof(eth_m->dst); ++i)
8219                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8220         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8221                &eth_m->src, sizeof(eth_m->src));
8222         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8223         /* The value must be in the range of the mask. */
8224         for (i = 0; i < sizeof(eth_m->dst); ++i)
8225                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8226         /*
8227          * HW supports match on one Ethertype, the Ethertype following the last
8228          * VLAN tag of the packet (see PRM).
8229          * Set match on ethertype only if ETH header is not followed by VLAN.
8230          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8231          * ethertype, and use ip_version field instead.
8232          * eCPRI over Ether layer will use type value 0xAEFE.
8233          */
8234         if (eth_m->type == 0xFFFF) {
8235                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8236                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8237                 switch (eth_v->type) {
8238                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8239                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8240                         return;
8241                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8242                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8243                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8244                         return;
8245                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8246                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8247                         return;
8248                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8249                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8250                         return;
8251                 default:
8252                         break;
8253                 }
8254         }
8255         if (eth_m->has_vlan) {
8256                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8257                 if (eth_v->has_vlan) {
8258                         /*
8259                          * Here, when also has_more_vlan field in VLAN item is
8260                          * not set, only single-tagged packets will be matched.
8261                          */
8262                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8263                         return;
8264                 }
8265         }
8266         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8267                  rte_be_to_cpu_16(eth_m->type));
8268         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8269         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8270 }
8271
8272 /**
8273  * Add VLAN item to matcher and to the value.
8274  *
8275  * @param[in, out] dev_flow
8276  *   Flow descriptor.
8277  * @param[in, out] matcher
8278  *   Flow matcher.
8279  * @param[in, out] key
8280  *   Flow matcher value.
8281  * @param[in] item
8282  *   Flow pattern to translate.
8283  * @param[in] inner
8284  *   Item is inner pattern.
8285  */
8286 static void
8287 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8288                             void *matcher, void *key,
8289                             const struct rte_flow_item *item,
8290                             int inner, uint32_t group)
8291 {
8292         const struct rte_flow_item_vlan *vlan_m = item->mask;
8293         const struct rte_flow_item_vlan *vlan_v = item->spec;
8294         void *hdrs_m;
8295         void *hdrs_v;
8296         uint16_t tci_m;
8297         uint16_t tci_v;
8298
8299         if (inner) {
8300                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8301                                          inner_headers);
8302                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8303         } else {
8304                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8305                                          outer_headers);
8306                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8307                 /*
8308                  * This is workaround, masks are not supported,
8309                  * and pre-validated.
8310                  */
8311                 if (vlan_v)
8312                         dev_flow->handle->vf_vlan.tag =
8313                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8314         }
8315         /*
8316          * When VLAN item exists in flow, mark packet as tagged,
8317          * even if TCI is not specified.
8318          */
8319         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8320                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8321                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8322         }
8323         if (!vlan_v)
8324                 return;
8325         if (!vlan_m)
8326                 vlan_m = &rte_flow_item_vlan_mask;
8327         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8328         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8329         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8330         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8331         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8332         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8333         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8334         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8335         /*
8336          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8337          * ethertype, and use ip_version field instead.
8338          */
8339         if (vlan_m->inner_type == 0xFFFF) {
8340                 switch (vlan_v->inner_type) {
8341                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8342                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8343                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8344                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8345                         return;
8346                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8347                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8348                         return;
8349                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8350                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8351                         return;
8352                 default:
8353                         break;
8354                 }
8355         }
8356         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8357                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8358                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8359                 /* Only one vlan_tag bit can be set. */
8360                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8361                 return;
8362         }
8363         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8364                  rte_be_to_cpu_16(vlan_m->inner_type));
8365         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8366                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8367 }
8368
8369 /**
8370  * Add IPV4 item to matcher and to the value.
8371  *
8372  * @param[in, out] matcher
8373  *   Flow matcher.
8374  * @param[in, out] key
8375  *   Flow matcher value.
8376  * @param[in] item
8377  *   Flow pattern to translate.
8378  * @param[in] inner
8379  *   Item is inner pattern.
8380  * @param[in] group
8381  *   The group to insert the rule.
8382  */
8383 static void
8384 flow_dv_translate_item_ipv4(void *matcher, void *key,
8385                             const struct rte_flow_item *item,
8386                             int inner, uint32_t group)
8387 {
8388         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8389         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8390         const struct rte_flow_item_ipv4 nic_mask = {
8391                 .hdr = {
8392                         .src_addr = RTE_BE32(0xffffffff),
8393                         .dst_addr = RTE_BE32(0xffffffff),
8394                         .type_of_service = 0xff,
8395                         .next_proto_id = 0xff,
8396                         .time_to_live = 0xff,
8397                 },
8398         };
8399         void *headers_m;
8400         void *headers_v;
8401         char *l24_m;
8402         char *l24_v;
8403         uint8_t tos, ihl_m, ihl_v;
8404
8405         if (inner) {
8406                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8407                                          inner_headers);
8408                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8409         } else {
8410                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8411                                          outer_headers);
8412                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8413         }
8414         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8415         if (!ipv4_v)
8416                 return;
8417         if (!ipv4_m)
8418                 ipv4_m = &nic_mask;
8419         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8420                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8421         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8422                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8423         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8424         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8425         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8426                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8427         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8428                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8429         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8430         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8431         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8432         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8433         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8434         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8435         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8436         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8437                  ipv4_m->hdr.type_of_service);
8438         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8439         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8440                  ipv4_m->hdr.type_of_service >> 2);
8441         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8442         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8443                  ipv4_m->hdr.next_proto_id);
8444         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8445                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8446         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8447                  ipv4_m->hdr.time_to_live);
8448         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8449                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8450         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8451                  !!(ipv4_m->hdr.fragment_offset));
8452         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8453                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8454 }
8455
8456 /**
8457  * Add IPV6 item to matcher and to the value.
8458  *
8459  * @param[in, out] matcher
8460  *   Flow matcher.
8461  * @param[in, out] key
8462  *   Flow matcher value.
8463  * @param[in] item
8464  *   Flow pattern to translate.
8465  * @param[in] inner
8466  *   Item is inner pattern.
8467  * @param[in] group
8468  *   The group to insert the rule.
8469  */
8470 static void
8471 flow_dv_translate_item_ipv6(void *matcher, void *key,
8472                             const struct rte_flow_item *item,
8473                             int inner, uint32_t group)
8474 {
8475         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8476         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8477         const struct rte_flow_item_ipv6 nic_mask = {
8478                 .hdr = {
8479                         .src_addr =
8480                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8481                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8482                         .dst_addr =
8483                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8484                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8485                         .vtc_flow = RTE_BE32(0xffffffff),
8486                         .proto = 0xff,
8487                         .hop_limits = 0xff,
8488                 },
8489         };
8490         void *headers_m;
8491         void *headers_v;
8492         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8493         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8494         char *l24_m;
8495         char *l24_v;
8496         uint32_t vtc_m;
8497         uint32_t vtc_v;
8498         int i;
8499         int size;
8500
8501         if (inner) {
8502                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8503                                          inner_headers);
8504                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8505         } else {
8506                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8507                                          outer_headers);
8508                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8509         }
8510         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8511         if (!ipv6_v)
8512                 return;
8513         if (!ipv6_m)
8514                 ipv6_m = &nic_mask;
8515         size = sizeof(ipv6_m->hdr.dst_addr);
8516         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8517                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8518         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8519                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8520         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8521         for (i = 0; i < size; ++i)
8522                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8523         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8524                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8525         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8526                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8527         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8528         for (i = 0; i < size; ++i)
8529                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8530         /* TOS. */
8531         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8532         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8533         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8534         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8535         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8536         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8537         /* Label. */
8538         if (inner) {
8539                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8540                          vtc_m);
8541                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8542                          vtc_v);
8543         } else {
8544                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8545                          vtc_m);
8546                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8547                          vtc_v);
8548         }
8549         /* Protocol. */
8550         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8551                  ipv6_m->hdr.proto);
8552         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8553                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8554         /* Hop limit. */
8555         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8556                  ipv6_m->hdr.hop_limits);
8557         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8558                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8559         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8560                  !!(ipv6_m->has_frag_ext));
8561         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8562                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8563 }
8564
8565 /**
8566  * Add IPV6 fragment extension item to matcher and to the value.
8567  *
8568  * @param[in, out] matcher
8569  *   Flow matcher.
8570  * @param[in, out] key
8571  *   Flow matcher value.
8572  * @param[in] item
8573  *   Flow pattern to translate.
8574  * @param[in] inner
8575  *   Item is inner pattern.
8576  */
8577 static void
8578 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8579                                      const struct rte_flow_item *item,
8580                                      int inner)
8581 {
8582         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8583         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8584         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8585                 .hdr = {
8586                         .next_header = 0xff,
8587                         .frag_data = RTE_BE16(0xffff),
8588                 },
8589         };
8590         void *headers_m;
8591         void *headers_v;
8592
8593         if (inner) {
8594                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8595                                          inner_headers);
8596                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8597         } else {
8598                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8599                                          outer_headers);
8600                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8601         }
8602         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8603         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8604         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8605         if (!ipv6_frag_ext_v)
8606                 return;
8607         if (!ipv6_frag_ext_m)
8608                 ipv6_frag_ext_m = &nic_mask;
8609         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8610                  ipv6_frag_ext_m->hdr.next_header);
8611         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8612                  ipv6_frag_ext_v->hdr.next_header &
8613                  ipv6_frag_ext_m->hdr.next_header);
8614 }
8615
8616 /**
8617  * Add TCP item to matcher and to the value.
8618  *
8619  * @param[in, out] matcher
8620  *   Flow matcher.
8621  * @param[in, out] key
8622  *   Flow matcher value.
8623  * @param[in] item
8624  *   Flow pattern to translate.
8625  * @param[in] inner
8626  *   Item is inner pattern.
8627  */
8628 static void
8629 flow_dv_translate_item_tcp(void *matcher, void *key,
8630                            const struct rte_flow_item *item,
8631                            int inner)
8632 {
8633         const struct rte_flow_item_tcp *tcp_m = item->mask;
8634         const struct rte_flow_item_tcp *tcp_v = item->spec;
8635         void *headers_m;
8636         void *headers_v;
8637
8638         if (inner) {
8639                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8640                                          inner_headers);
8641                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8642         } else {
8643                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8644                                          outer_headers);
8645                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8646         }
8647         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8648         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8649         if (!tcp_v)
8650                 return;
8651         if (!tcp_m)
8652                 tcp_m = &rte_flow_item_tcp_mask;
8653         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8654                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8655         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8656                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8657         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8658                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8659         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8660                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8661         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8662                  tcp_m->hdr.tcp_flags);
8663         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8664                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8665 }
8666
8667 /**
8668  * Add UDP item to matcher and to the value.
8669  *
8670  * @param[in, out] matcher
8671  *   Flow matcher.
8672  * @param[in, out] key
8673  *   Flow matcher value.
8674  * @param[in] item
8675  *   Flow pattern to translate.
8676  * @param[in] inner
8677  *   Item is inner pattern.
8678  */
8679 static void
8680 flow_dv_translate_item_udp(void *matcher, void *key,
8681                            const struct rte_flow_item *item,
8682                            int inner)
8683 {
8684         const struct rte_flow_item_udp *udp_m = item->mask;
8685         const struct rte_flow_item_udp *udp_v = item->spec;
8686         void *headers_m;
8687         void *headers_v;
8688
8689         if (inner) {
8690                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8691                                          inner_headers);
8692                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8693         } else {
8694                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8695                                          outer_headers);
8696                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8697         }
8698         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8699         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8700         if (!udp_v)
8701                 return;
8702         if (!udp_m)
8703                 udp_m = &rte_flow_item_udp_mask;
8704         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8705                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8706         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8707                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8708         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8709                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8710         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8711                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8712 }
8713
8714 /**
8715  * Add GRE optional Key item to matcher and to the value.
8716  *
8717  * @param[in, out] matcher
8718  *   Flow matcher.
8719  * @param[in, out] key
8720  *   Flow matcher value.
8721  * @param[in] item
8722  *   Flow pattern to translate.
8723  * @param[in] inner
8724  *   Item is inner pattern.
8725  */
8726 static void
8727 flow_dv_translate_item_gre_key(void *matcher, void *key,
8728                                    const struct rte_flow_item *item)
8729 {
8730         const rte_be32_t *key_m = item->mask;
8731         const rte_be32_t *key_v = item->spec;
8732         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8733         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8734         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8735
8736         /* GRE K bit must be on and should already be validated */
8737         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8738         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8739         if (!key_v)
8740                 return;
8741         if (!key_m)
8742                 key_m = &gre_key_default_mask;
8743         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8744                  rte_be_to_cpu_32(*key_m) >> 8);
8745         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8746                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8747         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8748                  rte_be_to_cpu_32(*key_m) & 0xFF);
8749         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8750                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8751 }
8752
8753 /**
8754  * Add GRE item to matcher and to the value.
8755  *
8756  * @param[in, out] matcher
8757  *   Flow matcher.
8758  * @param[in, out] key
8759  *   Flow matcher value.
8760  * @param[in] item
8761  *   Flow pattern to translate.
8762  * @param[in] inner
8763  *   Item is inner pattern.
8764  */
8765 static void
8766 flow_dv_translate_item_gre(void *matcher, void *key,
8767                            const struct rte_flow_item *item,
8768                            int inner)
8769 {
8770         const struct rte_flow_item_gre *gre_m = item->mask;
8771         const struct rte_flow_item_gre *gre_v = item->spec;
8772         void *headers_m;
8773         void *headers_v;
8774         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8775         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8776         struct {
8777                 union {
8778                         __extension__
8779                         struct {
8780                                 uint16_t version:3;
8781                                 uint16_t rsvd0:9;
8782                                 uint16_t s_present:1;
8783                                 uint16_t k_present:1;
8784                                 uint16_t rsvd_bit1:1;
8785                                 uint16_t c_present:1;
8786                         };
8787                         uint16_t value;
8788                 };
8789         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8790
8791         if (inner) {
8792                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8793                                          inner_headers);
8794                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8795         } else {
8796                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8797                                          outer_headers);
8798                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8799         }
8800         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8801         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8802         if (!gre_v)
8803                 return;
8804         if (!gre_m)
8805                 gre_m = &rte_flow_item_gre_mask;
8806         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8807                  rte_be_to_cpu_16(gre_m->protocol));
8808         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8809                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8810         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8811         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8812         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8813                  gre_crks_rsvd0_ver_m.c_present);
8814         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8815                  gre_crks_rsvd0_ver_v.c_present &
8816                  gre_crks_rsvd0_ver_m.c_present);
8817         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8818                  gre_crks_rsvd0_ver_m.k_present);
8819         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8820                  gre_crks_rsvd0_ver_v.k_present &
8821                  gre_crks_rsvd0_ver_m.k_present);
8822         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8823                  gre_crks_rsvd0_ver_m.s_present);
8824         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8825                  gre_crks_rsvd0_ver_v.s_present &
8826                  gre_crks_rsvd0_ver_m.s_present);
8827 }
8828
8829 /**
8830  * Add NVGRE item to matcher and to the value.
8831  *
8832  * @param[in, out] matcher
8833  *   Flow matcher.
8834  * @param[in, out] key
8835  *   Flow matcher value.
8836  * @param[in] item
8837  *   Flow pattern to translate.
8838  * @param[in] inner
8839  *   Item is inner pattern.
8840  */
8841 static void
8842 flow_dv_translate_item_nvgre(void *matcher, void *key,
8843                              const struct rte_flow_item *item,
8844                              int inner)
8845 {
8846         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8847         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8848         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8849         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8850         const char *tni_flow_id_m;
8851         const char *tni_flow_id_v;
8852         char *gre_key_m;
8853         char *gre_key_v;
8854         int size;
8855         int i;
8856
8857         /* For NVGRE, GRE header fields must be set with defined values. */
8858         const struct rte_flow_item_gre gre_spec = {
8859                 .c_rsvd0_ver = RTE_BE16(0x2000),
8860                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8861         };
8862         const struct rte_flow_item_gre gre_mask = {
8863                 .c_rsvd0_ver = RTE_BE16(0xB000),
8864                 .protocol = RTE_BE16(UINT16_MAX),
8865         };
8866         const struct rte_flow_item gre_item = {
8867                 .spec = &gre_spec,
8868                 .mask = &gre_mask,
8869                 .last = NULL,
8870         };
8871         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8872         if (!nvgre_v)
8873                 return;
8874         if (!nvgre_m)
8875                 nvgre_m = &rte_flow_item_nvgre_mask;
8876         tni_flow_id_m = (const char *)nvgre_m->tni;
8877         tni_flow_id_v = (const char *)nvgre_v->tni;
8878         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8879         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8880         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8881         memcpy(gre_key_m, tni_flow_id_m, size);
8882         for (i = 0; i < size; ++i)
8883                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8884 }
8885
8886 /**
8887  * Add VXLAN item to matcher and to the value.
8888  *
8889  * @param[in] dev
8890  *   Pointer to the Ethernet device structure.
8891  * @param[in] attr
8892  *   Flow rule attributes.
8893  * @param[in, out] matcher
8894  *   Flow matcher.
8895  * @param[in, out] key
8896  *   Flow matcher value.
8897  * @param[in] item
8898  *   Flow pattern to translate.
8899  * @param[in] inner
8900  *   Item is inner pattern.
8901  */
8902 static void
8903 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8904                              const struct rte_flow_attr *attr,
8905                              void *matcher, void *key,
8906                              const struct rte_flow_item *item,
8907                              int inner)
8908 {
8909         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8910         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8911         void *headers_m;
8912         void *headers_v;
8913         void *misc5_m;
8914         void *misc5_v;
8915         uint32_t *tunnel_header_v;
8916         uint32_t *tunnel_header_m;
8917         uint16_t dport;
8918         struct mlx5_priv *priv = dev->data->dev_private;
8919         const struct rte_flow_item_vxlan nic_mask = {
8920                 .vni = "\xff\xff\xff",
8921                 .rsvd1 = 0xff,
8922         };
8923
8924         if (inner) {
8925                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8926                                          inner_headers);
8927                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8928         } else {
8929                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8930                                          outer_headers);
8931                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8932         }
8933         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8934                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8935         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8936                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8937                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8938         }
8939         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8940         if (!vxlan_v)
8941                 return;
8942         if (!vxlan_m) {
8943                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8944                     (attr->group && !priv->sh->misc5_cap))
8945                         vxlan_m = &rte_flow_item_vxlan_mask;
8946                 else
8947                         vxlan_m = &nic_mask;
8948         }
8949         if ((priv->sh->steering_format_version ==
8950             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8951             dport != MLX5_UDP_PORT_VXLAN) ||
8952             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8953             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8954                 void *misc_m;
8955                 void *misc_v;
8956                 char *vni_m;
8957                 char *vni_v;
8958                 int size;
8959                 int i;
8960                 misc_m = MLX5_ADDR_OF(fte_match_param,
8961                                       matcher, misc_parameters);
8962                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8963                 size = sizeof(vxlan_m->vni);
8964                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8965                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8966                 memcpy(vni_m, vxlan_m->vni, size);
8967                 for (i = 0; i < size; ++i)
8968                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8969                 return;
8970         }
8971         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8972         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8973         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8974                                                    misc5_v,
8975                                                    tunnel_header_1);
8976         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8977                                                    misc5_m,
8978                                                    tunnel_header_1);
8979         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8980                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8981                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8982         if (*tunnel_header_v)
8983                 *tunnel_header_m = vxlan_m->vni[0] |
8984                         vxlan_m->vni[1] << 8 |
8985                         vxlan_m->vni[2] << 16;
8986         else
8987                 *tunnel_header_m = 0x0;
8988         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8989         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8990                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8991 }
8992
8993 /**
8994  * Add VXLAN-GPE item to matcher and to the value.
8995  *
8996  * @param[in, out] matcher
8997  *   Flow matcher.
8998  * @param[in, out] key
8999  *   Flow matcher value.
9000  * @param[in] item
9001  *   Flow pattern to translate.
9002  * @param[in] inner
9003  *   Item is inner pattern.
9004  */
9005
9006 static void
9007 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
9008                                  const struct rte_flow_item *item, int inner)
9009 {
9010         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
9011         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9012         void *headers_m;
9013         void *headers_v;
9014         void *misc_m =
9015                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9016         void *misc_v =
9017                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9018         char *vni_m;
9019         char *vni_v;
9020         uint16_t dport;
9021         int size;
9022         int i;
9023         uint8_t flags_m = 0xff;
9024         uint8_t flags_v = 0xc;
9025
9026         if (inner) {
9027                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9028                                          inner_headers);
9029                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9030         } else {
9031                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9032                                          outer_headers);
9033                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9034         }
9035         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
9036                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
9037         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9038                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9039                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9040         }
9041         if (!vxlan_v)
9042                 return;
9043         if (!vxlan_m)
9044                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9045         size = sizeof(vxlan_m->vni);
9046         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9047         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9048         memcpy(vni_m, vxlan_m->vni, size);
9049         for (i = 0; i < size; ++i)
9050                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9051         if (vxlan_m->flags) {
9052                 flags_m = vxlan_m->flags;
9053                 flags_v = vxlan_v->flags;
9054         }
9055         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9056         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9057         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
9058                  vxlan_m->protocol);
9059         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
9060                  vxlan_v->protocol);
9061 }
9062
9063 /**
9064  * Add Geneve item to matcher and to the value.
9065  *
9066  * @param[in, out] matcher
9067  *   Flow matcher.
9068  * @param[in, out] key
9069  *   Flow matcher value.
9070  * @param[in] item
9071  *   Flow pattern to translate.
9072  * @param[in] inner
9073  *   Item is inner pattern.
9074  */
9075
9076 static void
9077 flow_dv_translate_item_geneve(void *matcher, void *key,
9078                               const struct rte_flow_item *item, int inner)
9079 {
9080         const struct rte_flow_item_geneve *geneve_m = item->mask;
9081         const struct rte_flow_item_geneve *geneve_v = item->spec;
9082         void *headers_m;
9083         void *headers_v;
9084         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9085         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9086         uint16_t dport;
9087         uint16_t gbhdr_m;
9088         uint16_t gbhdr_v;
9089         char *vni_m;
9090         char *vni_v;
9091         size_t size, i;
9092
9093         if (inner) {
9094                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9095                                          inner_headers);
9096                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9097         } else {
9098                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9099                                          outer_headers);
9100                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9101         }
9102         dport = MLX5_UDP_PORT_GENEVE;
9103         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9104                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9105                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9106         }
9107         if (!geneve_v)
9108                 return;
9109         if (!geneve_m)
9110                 geneve_m = &rte_flow_item_geneve_mask;
9111         size = sizeof(geneve_m->vni);
9112         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9113         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9114         memcpy(vni_m, geneve_m->vni, size);
9115         for (i = 0; i < size; ++i)
9116                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9117         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
9118                  rte_be_to_cpu_16(geneve_m->protocol));
9119         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9120                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
9121         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9122         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9123         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9124                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9125         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9126                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9127         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9128                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9129         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9130                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9131                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9132 }
9133
9134 /**
9135  * Create Geneve TLV option resource.
9136  *
9137  * @param dev[in, out]
9138  *   Pointer to rte_eth_dev structure.
9139  * @param[in, out] tag_be24
9140  *   Tag value in big endian then R-shift 8.
9141  * @parm[in, out] dev_flow
9142  *   Pointer to the dev_flow.
9143  * @param[out] error
9144  *   pointer to error structure.
9145  *
9146  * @return
9147  *   0 on success otherwise -errno and errno is set.
9148  */
9149
9150 int
9151 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9152                                              const struct rte_flow_item *item,
9153                                              struct rte_flow_error *error)
9154 {
9155         struct mlx5_priv *priv = dev->data->dev_private;
9156         struct mlx5_dev_ctx_shared *sh = priv->sh;
9157         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9158                         sh->geneve_tlv_option_resource;
9159         struct mlx5_devx_obj *obj;
9160         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9161         int ret = 0;
9162
9163         if (!geneve_opt_v)
9164                 return -1;
9165         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9166         if (geneve_opt_resource != NULL) {
9167                 if (geneve_opt_resource->option_class ==
9168                         geneve_opt_v->option_class &&
9169                         geneve_opt_resource->option_type ==
9170                         geneve_opt_v->option_type &&
9171                         geneve_opt_resource->length ==
9172                         geneve_opt_v->option_len) {
9173                         /* We already have GENVE TLV option obj allocated. */
9174                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9175                                            __ATOMIC_RELAXED);
9176                 } else {
9177                         ret = rte_flow_error_set(error, ENOMEM,
9178                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9179                                 "Only one GENEVE TLV option supported");
9180                         goto exit;
9181                 }
9182         } else {
9183                 /* Create a GENEVE TLV object and resource. */
9184                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
9185                                 geneve_opt_v->option_class,
9186                                 geneve_opt_v->option_type,
9187                                 geneve_opt_v->option_len);
9188                 if (!obj) {
9189                         ret = rte_flow_error_set(error, ENODATA,
9190                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9191                                 "Failed to create GENEVE TLV Devx object");
9192                         goto exit;
9193                 }
9194                 sh->geneve_tlv_option_resource =
9195                                 mlx5_malloc(MLX5_MEM_ZERO,
9196                                                 sizeof(*geneve_opt_resource),
9197                                                 0, SOCKET_ID_ANY);
9198                 if (!sh->geneve_tlv_option_resource) {
9199                         claim_zero(mlx5_devx_cmd_destroy(obj));
9200                         ret = rte_flow_error_set(error, ENOMEM,
9201                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9202                                 "GENEVE TLV object memory allocation failed");
9203                         goto exit;
9204                 }
9205                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9206                 geneve_opt_resource->obj = obj;
9207                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9208                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9209                 geneve_opt_resource->length = geneve_opt_v->option_len;
9210                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9211                                 __ATOMIC_RELAXED);
9212         }
9213 exit:
9214         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9215         return ret;
9216 }
9217
9218 /**
9219  * Add Geneve TLV option item to matcher.
9220  *
9221  * @param[in, out] dev
9222  *   Pointer to rte_eth_dev structure.
9223  * @param[in, out] matcher
9224  *   Flow matcher.
9225  * @param[in, out] key
9226  *   Flow matcher value.
9227  * @param[in] item
9228  *   Flow pattern to translate.
9229  * @param[out] error
9230  *   Pointer to error structure.
9231  */
9232 static int
9233 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9234                                   void *key, const struct rte_flow_item *item,
9235                                   struct rte_flow_error *error)
9236 {
9237         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9238         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9239         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9240         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9241         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9242                         misc_parameters_3);
9243         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9244         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9245         int ret = 0;
9246
9247         if (!geneve_opt_v)
9248                 return -1;
9249         if (!geneve_opt_m)
9250                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9251         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9252                                                            error);
9253         if (ret) {
9254                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9255                 return ret;
9256         }
9257         /*
9258          * Set the option length in GENEVE header if not requested.
9259          * The GENEVE TLV option length is expressed by the option length field
9260          * in the GENEVE header.
9261          * If the option length was not requested but the GENEVE TLV option item
9262          * is present we set the option length field implicitly.
9263          */
9264         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9265                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9266                          MLX5_GENEVE_OPTLEN_MASK);
9267                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9268                          geneve_opt_v->option_len + 1);
9269         }
9270         /* Set the data. */
9271         if (geneve_opt_v->data) {
9272                 memcpy(&opt_data_key, geneve_opt_v->data,
9273                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9274                                 sizeof(opt_data_key)));
9275                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9276                                 sizeof(opt_data_key));
9277                 memcpy(&opt_data_mask, geneve_opt_m->data,
9278                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9279                                 sizeof(opt_data_mask)));
9280                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9281                                 sizeof(opt_data_mask));
9282                 MLX5_SET(fte_match_set_misc3, misc3_m,
9283                                 geneve_tlv_option_0_data,
9284                                 rte_be_to_cpu_32(opt_data_mask));
9285                 MLX5_SET(fte_match_set_misc3, misc3_v,
9286                                 geneve_tlv_option_0_data,
9287                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9288         }
9289         return ret;
9290 }
9291
9292 /**
9293  * Add MPLS item to matcher and to the value.
9294  *
9295  * @param[in, out] matcher
9296  *   Flow matcher.
9297  * @param[in, out] key
9298  *   Flow matcher value.
9299  * @param[in] item
9300  *   Flow pattern to translate.
9301  * @param[in] prev_layer
9302  *   The protocol layer indicated in previous item.
9303  * @param[in] inner
9304  *   Item is inner pattern.
9305  */
9306 static void
9307 flow_dv_translate_item_mpls(void *matcher, void *key,
9308                             const struct rte_flow_item *item,
9309                             uint64_t prev_layer,
9310                             int inner)
9311 {
9312         const uint32_t *in_mpls_m = item->mask;
9313         const uint32_t *in_mpls_v = item->spec;
9314         uint32_t *out_mpls_m = 0;
9315         uint32_t *out_mpls_v = 0;
9316         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9317         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9318         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9319                                      misc_parameters_2);
9320         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9321         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9322         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9323
9324         switch (prev_layer) {
9325         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9326                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9327                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9328                          MLX5_UDP_PORT_MPLS);
9329                 break;
9330         case MLX5_FLOW_LAYER_GRE:
9331                 /* Fall-through. */
9332         case MLX5_FLOW_LAYER_GRE_KEY:
9333                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9334                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9335                          RTE_ETHER_TYPE_MPLS);
9336                 break;
9337         default:
9338                 break;
9339         }
9340         if (!in_mpls_v)
9341                 return;
9342         if (!in_mpls_m)
9343                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9344         switch (prev_layer) {
9345         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9346                 out_mpls_m =
9347                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9348                                                  outer_first_mpls_over_udp);
9349                 out_mpls_v =
9350                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9351                                                  outer_first_mpls_over_udp);
9352                 break;
9353         case MLX5_FLOW_LAYER_GRE:
9354                 out_mpls_m =
9355                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9356                                                  outer_first_mpls_over_gre);
9357                 out_mpls_v =
9358                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9359                                                  outer_first_mpls_over_gre);
9360                 break;
9361         default:
9362                 /* Inner MPLS not over GRE is not supported. */
9363                 if (!inner) {
9364                         out_mpls_m =
9365                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9366                                                          misc2_m,
9367                                                          outer_first_mpls);
9368                         out_mpls_v =
9369                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9370                                                          misc2_v,
9371                                                          outer_first_mpls);
9372                 }
9373                 break;
9374         }
9375         if (out_mpls_m && out_mpls_v) {
9376                 *out_mpls_m = *in_mpls_m;
9377                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9378         }
9379 }
9380
9381 /**
9382  * Add metadata register item to matcher
9383  *
9384  * @param[in, out] matcher
9385  *   Flow matcher.
9386  * @param[in, out] key
9387  *   Flow matcher value.
9388  * @param[in] reg_type
9389  *   Type of device metadata register
9390  * @param[in] value
9391  *   Register value
9392  * @param[in] mask
9393  *   Register mask
9394  */
9395 static void
9396 flow_dv_match_meta_reg(void *matcher, void *key,
9397                        enum modify_reg reg_type,
9398                        uint32_t data, uint32_t mask)
9399 {
9400         void *misc2_m =
9401                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9402         void *misc2_v =
9403                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9404         uint32_t temp;
9405
9406         data &= mask;
9407         switch (reg_type) {
9408         case REG_A:
9409                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9410                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9411                 break;
9412         case REG_B:
9413                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9414                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9415                 break;
9416         case REG_C_0:
9417                 /*
9418                  * The metadata register C0 field might be divided into
9419                  * source vport index and META item value, we should set
9420                  * this field according to specified mask, not as whole one.
9421                  */
9422                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9423                 temp |= mask;
9424                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9425                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9426                 temp &= ~mask;
9427                 temp |= data;
9428                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9429                 break;
9430         case REG_C_1:
9431                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9432                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9433                 break;
9434         case REG_C_2:
9435                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9436                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9437                 break;
9438         case REG_C_3:
9439                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9440                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9441                 break;
9442         case REG_C_4:
9443                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9444                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9445                 break;
9446         case REG_C_5:
9447                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9448                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9449                 break;
9450         case REG_C_6:
9451                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9452                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9453                 break;
9454         case REG_C_7:
9455                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9456                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9457                 break;
9458         default:
9459                 MLX5_ASSERT(false);
9460                 break;
9461         }
9462 }
9463
9464 /**
9465  * Add MARK item to matcher
9466  *
9467  * @param[in] dev
9468  *   The device to configure through.
9469  * @param[in, out] matcher
9470  *   Flow matcher.
9471  * @param[in, out] key
9472  *   Flow matcher value.
9473  * @param[in] item
9474  *   Flow pattern to translate.
9475  */
9476 static void
9477 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9478                             void *matcher, void *key,
9479                             const struct rte_flow_item *item)
9480 {
9481         struct mlx5_priv *priv = dev->data->dev_private;
9482         const struct rte_flow_item_mark *mark;
9483         uint32_t value;
9484         uint32_t mask;
9485
9486         mark = item->mask ? (const void *)item->mask :
9487                             &rte_flow_item_mark_mask;
9488         mask = mark->id & priv->sh->dv_mark_mask;
9489         mark = (const void *)item->spec;
9490         MLX5_ASSERT(mark);
9491         value = mark->id & priv->sh->dv_mark_mask & mask;
9492         if (mask) {
9493                 enum modify_reg reg;
9494
9495                 /* Get the metadata register index for the mark. */
9496                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9497                 MLX5_ASSERT(reg > 0);
9498                 if (reg == REG_C_0) {
9499                         struct mlx5_priv *priv = dev->data->dev_private;
9500                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9501                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9502
9503                         mask &= msk_c0;
9504                         mask <<= shl_c0;
9505                         value <<= shl_c0;
9506                 }
9507                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9508         }
9509 }
9510
9511 /**
9512  * Add META item to matcher
9513  *
9514  * @param[in] dev
9515  *   The devich to configure through.
9516  * @param[in, out] matcher
9517  *   Flow matcher.
9518  * @param[in, out] key
9519  *   Flow matcher value.
9520  * @param[in] attr
9521  *   Attributes of flow that includes this item.
9522  * @param[in] item
9523  *   Flow pattern to translate.
9524  */
9525 static void
9526 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9527                             void *matcher, void *key,
9528                             const struct rte_flow_attr *attr,
9529                             const struct rte_flow_item *item)
9530 {
9531         const struct rte_flow_item_meta *meta_m;
9532         const struct rte_flow_item_meta *meta_v;
9533
9534         meta_m = (const void *)item->mask;
9535         if (!meta_m)
9536                 meta_m = &rte_flow_item_meta_mask;
9537         meta_v = (const void *)item->spec;
9538         if (meta_v) {
9539                 int reg;
9540                 uint32_t value = meta_v->data;
9541                 uint32_t mask = meta_m->data;
9542
9543                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9544                 if (reg < 0)
9545                         return;
9546                 MLX5_ASSERT(reg != REG_NON);
9547                 if (reg == REG_C_0) {
9548                         struct mlx5_priv *priv = dev->data->dev_private;
9549                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9550                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9551
9552                         mask &= msk_c0;
9553                         mask <<= shl_c0;
9554                         value <<= shl_c0;
9555                 }
9556                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9557         }
9558 }
9559
9560 /**
9561  * Add vport metadata Reg C0 item to matcher
9562  *
9563  * @param[in, out] matcher
9564  *   Flow matcher.
9565  * @param[in, out] key
9566  *   Flow matcher value.
9567  * @param[in] reg
9568  *   Flow pattern to translate.
9569  */
9570 static void
9571 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9572                                   uint32_t value, uint32_t mask)
9573 {
9574         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9575 }
9576
9577 /**
9578  * Add tag item to matcher
9579  *
9580  * @param[in] dev
9581  *   The devich to configure through.
9582  * @param[in, out] matcher
9583  *   Flow matcher.
9584  * @param[in, out] key
9585  *   Flow matcher value.
9586  * @param[in] item
9587  *   Flow pattern to translate.
9588  */
9589 static void
9590 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9591                                 void *matcher, void *key,
9592                                 const struct rte_flow_item *item)
9593 {
9594         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9595         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9596         uint32_t mask, value;
9597
9598         MLX5_ASSERT(tag_v);
9599         value = tag_v->data;
9600         mask = tag_m ? tag_m->data : UINT32_MAX;
9601         if (tag_v->id == REG_C_0) {
9602                 struct mlx5_priv *priv = dev->data->dev_private;
9603                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9604                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9605
9606                 mask &= msk_c0;
9607                 mask <<= shl_c0;
9608                 value <<= shl_c0;
9609         }
9610         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9611 }
9612
9613 /**
9614  * Add TAG item to matcher
9615  *
9616  * @param[in] dev
9617  *   The devich to configure through.
9618  * @param[in, out] matcher
9619  *   Flow matcher.
9620  * @param[in, out] key
9621  *   Flow matcher value.
9622  * @param[in] item
9623  *   Flow pattern to translate.
9624  */
9625 static void
9626 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9627                            void *matcher, void *key,
9628                            const struct rte_flow_item *item)
9629 {
9630         const struct rte_flow_item_tag *tag_v = item->spec;
9631         const struct rte_flow_item_tag *tag_m = item->mask;
9632         enum modify_reg reg;
9633
9634         MLX5_ASSERT(tag_v);
9635         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9636         /* Get the metadata register index for the tag. */
9637         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9638         MLX5_ASSERT(reg > 0);
9639         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9640 }
9641
9642 /**
9643  * Add source vport match to the specified matcher.
9644  *
9645  * @param[in, out] matcher
9646  *   Flow matcher.
9647  * @param[in, out] key
9648  *   Flow matcher value.
9649  * @param[in] port
9650  *   Source vport value to match
9651  * @param[in] mask
9652  *   Mask
9653  */
9654 static void
9655 flow_dv_translate_item_source_vport(void *matcher, void *key,
9656                                     int16_t port, uint16_t mask)
9657 {
9658         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9659         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9660
9661         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9662         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9663 }
9664
9665 /**
9666  * Translate port-id item to eswitch match on  port-id.
9667  *
9668  * @param[in] dev
9669  *   The devich to configure through.
9670  * @param[in, out] matcher
9671  *   Flow matcher.
9672  * @param[in, out] key
9673  *   Flow matcher value.
9674  * @param[in] item
9675  *   Flow pattern to translate.
9676  * @param[in]
9677  *   Flow attributes.
9678  *
9679  * @return
9680  *   0 on success, a negative errno value otherwise.
9681  */
9682 static int
9683 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9684                                void *key, const struct rte_flow_item *item,
9685                                const struct rte_flow_attr *attr)
9686 {
9687         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9688         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9689         struct mlx5_priv *priv;
9690         uint16_t mask, id;
9691
9692         mask = pid_m ? pid_m->id : 0xffff;
9693         id = pid_v ? pid_v->id : dev->data->port_id;
9694         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9695         if (!priv)
9696                 return -rte_errno;
9697         /*
9698          * Translate to vport field or to metadata, depending on mode.
9699          * Kernel can use either misc.source_port or half of C0 metadata
9700          * register.
9701          */
9702         if (priv->vport_meta_mask) {
9703                 /*
9704                  * Provide the hint for SW steering library
9705                  * to insert the flow into ingress domain and
9706                  * save the extra vport match.
9707                  */
9708                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9709                     priv->pf_bond < 0 && attr->transfer)
9710                         flow_dv_translate_item_source_vport
9711                                 (matcher, key, priv->vport_id, mask);
9712                 /*
9713                  * We should always set the vport metadata register,
9714                  * otherwise the SW steering library can drop
9715                  * the rule if wire vport metadata value is not zero,
9716                  * it depends on kernel configuration.
9717                  */
9718                 flow_dv_translate_item_meta_vport(matcher, key,
9719                                                   priv->vport_meta_tag,
9720                                                   priv->vport_meta_mask);
9721         } else {
9722                 flow_dv_translate_item_source_vport(matcher, key,
9723                                                     priv->vport_id, mask);
9724         }
9725         return 0;
9726 }
9727
9728 /**
9729  * Add ICMP6 item to matcher and to the value.
9730  *
9731  * @param[in, out] matcher
9732  *   Flow matcher.
9733  * @param[in, out] key
9734  *   Flow matcher value.
9735  * @param[in] item
9736  *   Flow pattern to translate.
9737  * @param[in] inner
9738  *   Item is inner pattern.
9739  */
9740 static void
9741 flow_dv_translate_item_icmp6(void *matcher, void *key,
9742                               const struct rte_flow_item *item,
9743                               int inner)
9744 {
9745         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9746         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9747         void *headers_m;
9748         void *headers_v;
9749         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9750                                      misc_parameters_3);
9751         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9752         if (inner) {
9753                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9754                                          inner_headers);
9755                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9756         } else {
9757                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9758                                          outer_headers);
9759                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9760         }
9761         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9762         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9763         if (!icmp6_v)
9764                 return;
9765         if (!icmp6_m)
9766                 icmp6_m = &rte_flow_item_icmp6_mask;
9767         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9768         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9769                  icmp6_v->type & icmp6_m->type);
9770         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9771         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9772                  icmp6_v->code & icmp6_m->code);
9773 }
9774
9775 /**
9776  * Add ICMP item to matcher and to the value.
9777  *
9778  * @param[in, out] matcher
9779  *   Flow matcher.
9780  * @param[in, out] key
9781  *   Flow matcher value.
9782  * @param[in] item
9783  *   Flow pattern to translate.
9784  * @param[in] inner
9785  *   Item is inner pattern.
9786  */
9787 static void
9788 flow_dv_translate_item_icmp(void *matcher, void *key,
9789                             const struct rte_flow_item *item,
9790                             int inner)
9791 {
9792         const struct rte_flow_item_icmp *icmp_m = item->mask;
9793         const struct rte_flow_item_icmp *icmp_v = item->spec;
9794         uint32_t icmp_header_data_m = 0;
9795         uint32_t icmp_header_data_v = 0;
9796         void *headers_m;
9797         void *headers_v;
9798         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9799                                      misc_parameters_3);
9800         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9801         if (inner) {
9802                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9803                                          inner_headers);
9804                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9805         } else {
9806                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9807                                          outer_headers);
9808                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9809         }
9810         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9811         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9812         if (!icmp_v)
9813                 return;
9814         if (!icmp_m)
9815                 icmp_m = &rte_flow_item_icmp_mask;
9816         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9817                  icmp_m->hdr.icmp_type);
9818         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9819                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9820         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9821                  icmp_m->hdr.icmp_code);
9822         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9823                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9824         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9825         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9826         if (icmp_header_data_m) {
9827                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9828                 icmp_header_data_v |=
9829                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9830                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9831                          icmp_header_data_m);
9832                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9833                          icmp_header_data_v & icmp_header_data_m);
9834         }
9835 }
9836
9837 /**
9838  * Add GTP item to matcher and to the value.
9839  *
9840  * @param[in, out] matcher
9841  *   Flow matcher.
9842  * @param[in, out] key
9843  *   Flow matcher value.
9844  * @param[in] item
9845  *   Flow pattern to translate.
9846  * @param[in] inner
9847  *   Item is inner pattern.
9848  */
9849 static void
9850 flow_dv_translate_item_gtp(void *matcher, void *key,
9851                            const struct rte_flow_item *item, int inner)
9852 {
9853         const struct rte_flow_item_gtp *gtp_m = item->mask;
9854         const struct rte_flow_item_gtp *gtp_v = item->spec;
9855         void *headers_m;
9856         void *headers_v;
9857         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9858                                      misc_parameters_3);
9859         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9860         uint16_t dport = RTE_GTPU_UDP_PORT;
9861
9862         if (inner) {
9863                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9864                                          inner_headers);
9865                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9866         } else {
9867                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9868                                          outer_headers);
9869                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9870         }
9871         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9872                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9873                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9874         }
9875         if (!gtp_v)
9876                 return;
9877         if (!gtp_m)
9878                 gtp_m = &rte_flow_item_gtp_mask;
9879         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9880                  gtp_m->v_pt_rsv_flags);
9881         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9882                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9883         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9884         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9885                  gtp_v->msg_type & gtp_m->msg_type);
9886         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9887                  rte_be_to_cpu_32(gtp_m->teid));
9888         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9889                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9890 }
9891
9892 /**
9893  * Add GTP PSC item to matcher.
9894  *
9895  * @param[in, out] matcher
9896  *   Flow matcher.
9897  * @param[in, out] key
9898  *   Flow matcher value.
9899  * @param[in] item
9900  *   Flow pattern to translate.
9901  */
9902 static int
9903 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9904                                const struct rte_flow_item *item)
9905 {
9906         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9907         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9908         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9909                         misc_parameters_3);
9910         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9911         union {
9912                 uint32_t w32;
9913                 struct {
9914                         uint16_t seq_num;
9915                         uint8_t npdu_num;
9916                         uint8_t next_ext_header_type;
9917                 };
9918         } dw_2;
9919         uint8_t gtp_flags;
9920
9921         /* Always set E-flag match on one, regardless of GTP item settings. */
9922         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9923         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9924         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9925         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9926         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9927         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9928         /*Set next extension header type. */
9929         dw_2.seq_num = 0;
9930         dw_2.npdu_num = 0;
9931         dw_2.next_ext_header_type = 0xff;
9932         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9933                  rte_cpu_to_be_32(dw_2.w32));
9934         dw_2.seq_num = 0;
9935         dw_2.npdu_num = 0;
9936         dw_2.next_ext_header_type = 0x85;
9937         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9938                  rte_cpu_to_be_32(dw_2.w32));
9939         if (gtp_psc_v) {
9940                 union {
9941                         uint32_t w32;
9942                         struct {
9943                                 uint8_t len;
9944                                 uint8_t type_flags;
9945                                 uint8_t qfi;
9946                                 uint8_t reserved;
9947                         };
9948                 } dw_0;
9949
9950                 /*Set extension header PDU type and Qos. */
9951                 if (!gtp_psc_m)
9952                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9953                 dw_0.w32 = 0;
9954                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9955                 dw_0.qfi = gtp_psc_m->qfi;
9956                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9957                          rte_cpu_to_be_32(dw_0.w32));
9958                 dw_0.w32 = 0;
9959                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9960                                                         gtp_psc_m->pdu_type);
9961                 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9962                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9963                          rte_cpu_to_be_32(dw_0.w32));
9964         }
9965         return 0;
9966 }
9967
9968 /**
9969  * Add eCPRI item to matcher and to the value.
9970  *
9971  * @param[in] dev
9972  *   The devich to configure through.
9973  * @param[in, out] matcher
9974  *   Flow matcher.
9975  * @param[in, out] key
9976  *   Flow matcher value.
9977  * @param[in] item
9978  *   Flow pattern to translate.
9979  * @param[in] samples
9980  *   Sample IDs to be used in the matching.
9981  */
9982 static void
9983 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9984                              void *key, const struct rte_flow_item *item)
9985 {
9986         struct mlx5_priv *priv = dev->data->dev_private;
9987         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9988         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9989         struct rte_ecpri_common_hdr common;
9990         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9991                                      misc_parameters_4);
9992         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9993         uint32_t *samples;
9994         void *dw_m;
9995         void *dw_v;
9996
9997         if (!ecpri_v)
9998                 return;
9999         if (!ecpri_m)
10000                 ecpri_m = &rte_flow_item_ecpri_mask;
10001         /*
10002          * Maximal four DW samples are supported in a single matching now.
10003          * Two are used now for a eCPRI matching:
10004          * 1. Type: one byte, mask should be 0x00ff0000 in network order
10005          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10006          *    if any.
10007          */
10008         if (!ecpri_m->hdr.common.u32)
10009                 return;
10010         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
10011         /* Need to take the whole DW as the mask to fill the entry. */
10012         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10013                             prog_sample_field_value_0);
10014         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10015                             prog_sample_field_value_0);
10016         /* Already big endian (network order) in the header. */
10017         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10018         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10019         /* Sample#0, used for matching type, offset 0. */
10020         MLX5_SET(fte_match_set_misc4, misc4_m,
10021                  prog_sample_field_id_0, samples[0]);
10022         /* It makes no sense to set the sample ID in the mask field. */
10023         MLX5_SET(fte_match_set_misc4, misc4_v,
10024                  prog_sample_field_id_0, samples[0]);
10025         /*
10026          * Checking if message body part needs to be matched.
10027          * Some wildcard rules only matching type field should be supported.
10028          */
10029         if (ecpri_m->hdr.dummy[0]) {
10030                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10031                 switch (common.type) {
10032                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10033                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10034                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10035                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10036                                             prog_sample_field_value_1);
10037                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10038                                             prog_sample_field_value_1);
10039                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10040                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10041                                             ecpri_m->hdr.dummy[0];
10042                         /* Sample#1, to match message body, offset 4. */
10043                         MLX5_SET(fte_match_set_misc4, misc4_m,
10044                                  prog_sample_field_id_1, samples[1]);
10045                         MLX5_SET(fte_match_set_misc4, misc4_v,
10046                                  prog_sample_field_id_1, samples[1]);
10047                         break;
10048                 default:
10049                         /* Others, do not match any sample ID. */
10050                         break;
10051                 }
10052         }
10053 }
10054
10055 /*
10056  * Add connection tracking status item to matcher
10057  *
10058  * @param[in] dev
10059  *   The devich to configure through.
10060  * @param[in, out] matcher
10061  *   Flow matcher.
10062  * @param[in, out] key
10063  *   Flow matcher value.
10064  * @param[in] item
10065  *   Flow pattern to translate.
10066  */
10067 static void
10068 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10069                               void *matcher, void *key,
10070                               const struct rte_flow_item *item)
10071 {
10072         uint32_t reg_value = 0;
10073         int reg_id;
10074         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10075         uint32_t reg_mask = 0;
10076         const struct rte_flow_item_conntrack *spec = item->spec;
10077         const struct rte_flow_item_conntrack *mask = item->mask;
10078         uint32_t flags;
10079         struct rte_flow_error error;
10080
10081         if (!mask)
10082                 mask = &rte_flow_item_conntrack_mask;
10083         if (!spec || !mask->flags)
10084                 return;
10085         flags = spec->flags & mask->flags;
10086         /* The conflict should be checked in the validation. */
10087         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10088                 reg_value |= MLX5_CT_SYNDROME_VALID;
10089         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10090                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10091         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10092                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10093         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10094                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10095         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10096                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10097         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10098                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10099                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10100                 reg_mask |= 0xc0;
10101         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10102                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10103         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10104                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10105         /* The REG_C_x value could be saved during startup. */
10106         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10107         if (reg_id == REG_NON)
10108                 return;
10109         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10110                                reg_value, reg_mask);
10111 }
10112
10113 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10114
10115 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10116         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10117                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10118
10119 /**
10120  * Calculate flow matcher enable bitmap.
10121  *
10122  * @param match_criteria
10123  *   Pointer to flow matcher criteria.
10124  *
10125  * @return
10126  *   Bitmap of enabled fields.
10127  */
10128 static uint8_t
10129 flow_dv_matcher_enable(uint32_t *match_criteria)
10130 {
10131         uint8_t match_criteria_enable;
10132
10133         match_criteria_enable =
10134                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10135                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10136         match_criteria_enable |=
10137                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10138                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10139         match_criteria_enable |=
10140                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10141                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10142         match_criteria_enable |=
10143                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10144                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10145         match_criteria_enable |=
10146                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10147                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10148         match_criteria_enable |=
10149                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10150                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10151         match_criteria_enable |=
10152                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10153                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10154         return match_criteria_enable;
10155 }
10156
10157 static void
10158 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10159 {
10160         /*
10161          * Check flow matching criteria first, subtract misc5/4 length if flow
10162          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10163          * misc5/4 are not supported, and matcher creation failure is expected
10164          * w/o subtration. If misc5 is provided, misc4 must be counted in since
10165          * misc5 is right after misc4.
10166          */
10167         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10168                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10169                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10170                 if (!(match_criteria & (1 <<
10171                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10172                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10173                 }
10174         }
10175 }
10176
10177 static struct mlx5_list_entry *
10178 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10179                          struct mlx5_list_entry *entry, void *cb_ctx)
10180 {
10181         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10182         struct mlx5_flow_dv_matcher *ref = ctx->data;
10183         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10184                                                             typeof(*tbl), tbl);
10185         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10186                                                             sizeof(*resource),
10187                                                             0, SOCKET_ID_ANY);
10188
10189         if (!resource) {
10190                 rte_flow_error_set(ctx->error, ENOMEM,
10191                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10192                                    "cannot create matcher");
10193                 return NULL;
10194         }
10195         memcpy(resource, entry, sizeof(*resource));
10196         resource->tbl = &tbl->tbl;
10197         return &resource->entry;
10198 }
10199
10200 static void
10201 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10202                              struct mlx5_list_entry *entry)
10203 {
10204         mlx5_free(entry);
10205 }
10206
10207 struct mlx5_list_entry *
10208 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10209 {
10210         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10211         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10212         struct rte_eth_dev *dev = ctx->dev;
10213         struct mlx5_flow_tbl_data_entry *tbl_data;
10214         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10215         struct rte_flow_error *error = ctx->error;
10216         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10217         struct mlx5_flow_tbl_resource *tbl;
10218         void *domain;
10219         uint32_t idx = 0;
10220         int ret;
10221
10222         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10223         if (!tbl_data) {
10224                 rte_flow_error_set(error, ENOMEM,
10225                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10226                                    NULL,
10227                                    "cannot allocate flow table data entry");
10228                 return NULL;
10229         }
10230         tbl_data->idx = idx;
10231         tbl_data->tunnel = tt_prm->tunnel;
10232         tbl_data->group_id = tt_prm->group_id;
10233         tbl_data->external = !!tt_prm->external;
10234         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10235         tbl_data->is_egress = !!key.is_egress;
10236         tbl_data->is_transfer = !!key.is_fdb;
10237         tbl_data->dummy = !!key.dummy;
10238         tbl_data->level = key.level;
10239         tbl_data->id = key.id;
10240         tbl = &tbl_data->tbl;
10241         if (key.dummy)
10242                 return &tbl_data->entry;
10243         if (key.is_fdb)
10244                 domain = sh->fdb_domain;
10245         else if (key.is_egress)
10246                 domain = sh->tx_domain;
10247         else
10248                 domain = sh->rx_domain;
10249         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10250         if (ret) {
10251                 rte_flow_error_set(error, ENOMEM,
10252                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10253                                    NULL, "cannot create flow table object");
10254                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10255                 return NULL;
10256         }
10257         if (key.level != 0) {
10258                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10259                                         (tbl->obj, &tbl_data->jump.action);
10260                 if (ret) {
10261                         rte_flow_error_set(error, ENOMEM,
10262                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10263                                            NULL,
10264                                            "cannot create flow jump action");
10265                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10266                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10267                         return NULL;
10268                 }
10269         }
10270         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10271               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10272               key.level, key.id);
10273         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10274                                               flow_dv_matcher_create_cb,
10275                                               flow_dv_matcher_match_cb,
10276                                               flow_dv_matcher_remove_cb,
10277                                               flow_dv_matcher_clone_cb,
10278                                               flow_dv_matcher_clone_free_cb);
10279         if (!tbl_data->matchers) {
10280                 rte_flow_error_set(error, ENOMEM,
10281                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10282                                    NULL,
10283                                    "cannot create tbl matcher list");
10284                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10285                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10286                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10287                 return NULL;
10288         }
10289         return &tbl_data->entry;
10290 }
10291
10292 int
10293 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10294                      void *cb_ctx)
10295 {
10296         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10297         struct mlx5_flow_tbl_data_entry *tbl_data =
10298                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10299         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10300
10301         return tbl_data->level != key.level ||
10302                tbl_data->id != key.id ||
10303                tbl_data->dummy != key.dummy ||
10304                tbl_data->is_transfer != !!key.is_fdb ||
10305                tbl_data->is_egress != !!key.is_egress;
10306 }
10307
10308 struct mlx5_list_entry *
10309 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10310                       void *cb_ctx)
10311 {
10312         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10313         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10314         struct mlx5_flow_tbl_data_entry *tbl_data;
10315         struct rte_flow_error *error = ctx->error;
10316         uint32_t idx = 0;
10317
10318         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10319         if (!tbl_data) {
10320                 rte_flow_error_set(error, ENOMEM,
10321                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10322                                    NULL,
10323                                    "cannot allocate flow table data entry");
10324                 return NULL;
10325         }
10326         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10327         tbl_data->idx = idx;
10328         return &tbl_data->entry;
10329 }
10330
10331 void
10332 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10333 {
10334         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10335         struct mlx5_flow_tbl_data_entry *tbl_data =
10336                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10337
10338         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10339 }
10340
10341 /**
10342  * Get a flow table.
10343  *
10344  * @param[in, out] dev
10345  *   Pointer to rte_eth_dev structure.
10346  * @param[in] table_level
10347  *   Table level to use.
10348  * @param[in] egress
10349  *   Direction of the table.
10350  * @param[in] transfer
10351  *   E-Switch or NIC flow.
10352  * @param[in] dummy
10353  *   Dummy entry for dv API.
10354  * @param[in] table_id
10355  *   Table id to use.
10356  * @param[out] error
10357  *   pointer to error structure.
10358  *
10359  * @return
10360  *   Returns tables resource based on the index, NULL in case of failed.
10361  */
10362 struct mlx5_flow_tbl_resource *
10363 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10364                          uint32_t table_level, uint8_t egress,
10365                          uint8_t transfer,
10366                          bool external,
10367                          const struct mlx5_flow_tunnel *tunnel,
10368                          uint32_t group_id, uint8_t dummy,
10369                          uint32_t table_id,
10370                          struct rte_flow_error *error)
10371 {
10372         struct mlx5_priv *priv = dev->data->dev_private;
10373         union mlx5_flow_tbl_key table_key = {
10374                 {
10375                         .level = table_level,
10376                         .id = table_id,
10377                         .reserved = 0,
10378                         .dummy = !!dummy,
10379                         .is_fdb = !!transfer,
10380                         .is_egress = !!egress,
10381                 }
10382         };
10383         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10384                 .tunnel = tunnel,
10385                 .group_id = group_id,
10386                 .external = external,
10387         };
10388         struct mlx5_flow_cb_ctx ctx = {
10389                 .dev = dev,
10390                 .error = error,
10391                 .data = &table_key.v64,
10392                 .data2 = &tt_prm,
10393         };
10394         struct mlx5_list_entry *entry;
10395         struct mlx5_flow_tbl_data_entry *tbl_data;
10396
10397         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10398         if (!entry) {
10399                 rte_flow_error_set(error, ENOMEM,
10400                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10401                                    "cannot get table");
10402                 return NULL;
10403         }
10404         DRV_LOG(DEBUG, "table_level %u table_id %u "
10405                 "tunnel %u group %u registered.",
10406                 table_level, table_id,
10407                 tunnel ? tunnel->tunnel_id : 0, group_id);
10408         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10409         return &tbl_data->tbl;
10410 }
10411
10412 void
10413 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10414 {
10415         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10416         struct mlx5_flow_tbl_data_entry *tbl_data =
10417                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10418
10419         MLX5_ASSERT(entry && sh);
10420         if (tbl_data->jump.action)
10421                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10422         if (tbl_data->tbl.obj)
10423                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10424         if (tbl_data->tunnel_offload && tbl_data->external) {
10425                 struct mlx5_list_entry *he;
10426                 struct mlx5_hlist *tunnel_grp_hash;
10427                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10428                 union tunnel_tbl_key tunnel_key = {
10429                         .tunnel_id = tbl_data->tunnel ?
10430                                         tbl_data->tunnel->tunnel_id : 0,
10431                         .group = tbl_data->group_id
10432                 };
10433                 uint32_t table_level = tbl_data->level;
10434                 struct mlx5_flow_cb_ctx ctx = {
10435                         .data = (void *)&tunnel_key.val,
10436                 };
10437
10438                 tunnel_grp_hash = tbl_data->tunnel ?
10439                                         tbl_data->tunnel->groups :
10440                                         thub->groups;
10441                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10442                 if (he)
10443                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10444                 DRV_LOG(DEBUG,
10445                         "table_level %u id %u tunnel %u group %u released.",
10446                         table_level,
10447                         tbl_data->id,
10448                         tbl_data->tunnel ?
10449                         tbl_data->tunnel->tunnel_id : 0,
10450                         tbl_data->group_id);
10451         }
10452         mlx5_list_destroy(tbl_data->matchers);
10453         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10454 }
10455
10456 /**
10457  * Release a flow table.
10458  *
10459  * @param[in] sh
10460  *   Pointer to device shared structure.
10461  * @param[in] tbl
10462  *   Table resource to be released.
10463  *
10464  * @return
10465  *   Returns 0 if table was released, else return 1;
10466  */
10467 static int
10468 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10469                              struct mlx5_flow_tbl_resource *tbl)
10470 {
10471         struct mlx5_flow_tbl_data_entry *tbl_data =
10472                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10473
10474         if (!tbl)
10475                 return 0;
10476         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10477 }
10478
10479 int
10480 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10481                          struct mlx5_list_entry *entry, void *cb_ctx)
10482 {
10483         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10484         struct mlx5_flow_dv_matcher *ref = ctx->data;
10485         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10486                                                         entry);
10487
10488         return cur->crc != ref->crc ||
10489                cur->priority != ref->priority ||
10490                memcmp((const void *)cur->mask.buf,
10491                       (const void *)ref->mask.buf, ref->mask.size);
10492 }
10493
10494 struct mlx5_list_entry *
10495 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10496 {
10497         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10498         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10499         struct mlx5_flow_dv_matcher *ref = ctx->data;
10500         struct mlx5_flow_dv_matcher *resource;
10501         struct mlx5dv_flow_matcher_attr dv_attr = {
10502                 .type = IBV_FLOW_ATTR_NORMAL,
10503                 .match_mask = (void *)&ref->mask,
10504         };
10505         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10506                                                             typeof(*tbl), tbl);
10507         int ret;
10508
10509         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10510                                SOCKET_ID_ANY);
10511         if (!resource) {
10512                 rte_flow_error_set(ctx->error, ENOMEM,
10513                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10514                                    "cannot create matcher");
10515                 return NULL;
10516         }
10517         *resource = *ref;
10518         dv_attr.match_criteria_enable =
10519                 flow_dv_matcher_enable(resource->mask.buf);
10520         __flow_dv_adjust_buf_size(&ref->mask.size,
10521                                   dv_attr.match_criteria_enable);
10522         dv_attr.priority = ref->priority;
10523         if (tbl->is_egress)
10524                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10525         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10526                                                &resource->matcher_object);
10527         if (ret) {
10528                 mlx5_free(resource);
10529                 rte_flow_error_set(ctx->error, ENOMEM,
10530                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10531                                    "cannot create matcher");
10532                 return NULL;
10533         }
10534         return &resource->entry;
10535 }
10536
10537 /**
10538  * Register the flow matcher.
10539  *
10540  * @param[in, out] dev
10541  *   Pointer to rte_eth_dev structure.
10542  * @param[in, out] matcher
10543  *   Pointer to flow matcher.
10544  * @param[in, out] key
10545  *   Pointer to flow table key.
10546  * @parm[in, out] dev_flow
10547  *   Pointer to the dev_flow.
10548  * @param[out] error
10549  *   pointer to error structure.
10550  *
10551  * @return
10552  *   0 on success otherwise -errno and errno is set.
10553  */
10554 static int
10555 flow_dv_matcher_register(struct rte_eth_dev *dev,
10556                          struct mlx5_flow_dv_matcher *ref,
10557                          union mlx5_flow_tbl_key *key,
10558                          struct mlx5_flow *dev_flow,
10559                          const struct mlx5_flow_tunnel *tunnel,
10560                          uint32_t group_id,
10561                          struct rte_flow_error *error)
10562 {
10563         struct mlx5_list_entry *entry;
10564         struct mlx5_flow_dv_matcher *resource;
10565         struct mlx5_flow_tbl_resource *tbl;
10566         struct mlx5_flow_tbl_data_entry *tbl_data;
10567         struct mlx5_flow_cb_ctx ctx = {
10568                 .error = error,
10569                 .data = ref,
10570         };
10571         /**
10572          * tunnel offload API requires this registration for cases when
10573          * tunnel match rule was inserted before tunnel set rule.
10574          */
10575         tbl = flow_dv_tbl_resource_get(dev, key->level,
10576                                        key->is_egress, key->is_fdb,
10577                                        dev_flow->external, tunnel,
10578                                        group_id, 0, key->id, error);
10579         if (!tbl)
10580                 return -rte_errno;      /* No need to refill the error info */
10581         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10582         ref->tbl = tbl;
10583         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10584         if (!entry) {
10585                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10586                 return rte_flow_error_set(error, ENOMEM,
10587                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10588                                           "cannot allocate ref memory");
10589         }
10590         resource = container_of(entry, typeof(*resource), entry);
10591         dev_flow->handle->dvh.matcher = resource;
10592         return 0;
10593 }
10594
10595 struct mlx5_list_entry *
10596 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10597 {
10598         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10599         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10600         struct mlx5_flow_dv_tag_resource *entry;
10601         uint32_t idx = 0;
10602         int ret;
10603
10604         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10605         if (!entry) {
10606                 rte_flow_error_set(ctx->error, ENOMEM,
10607                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10608                                    "cannot allocate resource memory");
10609                 return NULL;
10610         }
10611         entry->idx = idx;
10612         entry->tag_id = *(uint32_t *)(ctx->data);
10613         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10614                                                   &entry->action);
10615         if (ret) {
10616                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10617                 rte_flow_error_set(ctx->error, ENOMEM,
10618                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10619                                    NULL, "cannot create action");
10620                 return NULL;
10621         }
10622         return &entry->entry;
10623 }
10624
10625 int
10626 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10627                      void *cb_ctx)
10628 {
10629         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10630         struct mlx5_flow_dv_tag_resource *tag =
10631                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10632
10633         return *(uint32_t *)(ctx->data) != tag->tag_id;
10634 }
10635
10636 struct mlx5_list_entry *
10637 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10638                      void *cb_ctx)
10639 {
10640         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10641         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10642         struct mlx5_flow_dv_tag_resource *entry;
10643         uint32_t idx = 0;
10644
10645         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10646         if (!entry) {
10647                 rte_flow_error_set(ctx->error, ENOMEM,
10648                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10649                                    "cannot allocate tag resource memory");
10650                 return NULL;
10651         }
10652         memcpy(entry, oentry, sizeof(*entry));
10653         entry->idx = idx;
10654         return &entry->entry;
10655 }
10656
10657 void
10658 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10659 {
10660         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10661         struct mlx5_flow_dv_tag_resource *tag =
10662                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10663
10664         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10665 }
10666
10667 /**
10668  * Find existing tag resource or create and register a new one.
10669  *
10670  * @param dev[in, out]
10671  *   Pointer to rte_eth_dev structure.
10672  * @param[in, out] tag_be24
10673  *   Tag value in big endian then R-shift 8.
10674  * @parm[in, out] dev_flow
10675  *   Pointer to the dev_flow.
10676  * @param[out] error
10677  *   pointer to error structure.
10678  *
10679  * @return
10680  *   0 on success otherwise -errno and errno is set.
10681  */
10682 static int
10683 flow_dv_tag_resource_register
10684                         (struct rte_eth_dev *dev,
10685                          uint32_t tag_be24,
10686                          struct mlx5_flow *dev_flow,
10687                          struct rte_flow_error *error)
10688 {
10689         struct mlx5_priv *priv = dev->data->dev_private;
10690         struct mlx5_flow_dv_tag_resource *resource;
10691         struct mlx5_list_entry *entry;
10692         struct mlx5_flow_cb_ctx ctx = {
10693                                         .error = error,
10694                                         .data = &tag_be24,
10695                                         };
10696         struct mlx5_hlist *tag_table;
10697
10698         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10699                                       "tags",
10700                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10701                                       false, false, priv->sh,
10702                                       flow_dv_tag_create_cb,
10703                                       flow_dv_tag_match_cb,
10704                                       flow_dv_tag_remove_cb,
10705                                       flow_dv_tag_clone_cb,
10706                                       flow_dv_tag_clone_free_cb);
10707         if (unlikely(!tag_table))
10708                 return -rte_errno;
10709         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10710         if (entry) {
10711                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10712                                         entry);
10713                 dev_flow->handle->dvh.rix_tag = resource->idx;
10714                 dev_flow->dv.tag_resource = resource;
10715                 return 0;
10716         }
10717         return -rte_errno;
10718 }
10719
10720 void
10721 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10722 {
10723         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10724         struct mlx5_flow_dv_tag_resource *tag =
10725                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10726
10727         MLX5_ASSERT(tag && sh && tag->action);
10728         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10729         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10730         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10731 }
10732
10733 /**
10734  * Release the tag.
10735  *
10736  * @param dev
10737  *   Pointer to Ethernet device.
10738  * @param tag_idx
10739  *   Tag index.
10740  *
10741  * @return
10742  *   1 while a reference on it exists, 0 when freed.
10743  */
10744 static int
10745 flow_dv_tag_release(struct rte_eth_dev *dev,
10746                     uint32_t tag_idx)
10747 {
10748         struct mlx5_priv *priv = dev->data->dev_private;
10749         struct mlx5_flow_dv_tag_resource *tag;
10750
10751         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10752         if (!tag)
10753                 return 0;
10754         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10755                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10756         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10757 }
10758
10759 /**
10760  * Translate port ID action to vport.
10761  *
10762  * @param[in] dev
10763  *   Pointer to rte_eth_dev structure.
10764  * @param[in] action
10765  *   Pointer to the port ID action.
10766  * @param[out] dst_port_id
10767  *   The target port ID.
10768  * @param[out] error
10769  *   Pointer to the error structure.
10770  *
10771  * @return
10772  *   0 on success, a negative errno value otherwise and rte_errno is set.
10773  */
10774 static int
10775 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10776                                  const struct rte_flow_action *action,
10777                                  uint32_t *dst_port_id,
10778                                  struct rte_flow_error *error)
10779 {
10780         uint32_t port;
10781         struct mlx5_priv *priv;
10782         const struct rte_flow_action_port_id *conf =
10783                         (const struct rte_flow_action_port_id *)action->conf;
10784
10785         port = conf->original ? dev->data->port_id : conf->id;
10786         priv = mlx5_port_to_eswitch_info(port, false);
10787         if (!priv)
10788                 return rte_flow_error_set(error, -rte_errno,
10789                                           RTE_FLOW_ERROR_TYPE_ACTION,
10790                                           NULL,
10791                                           "No eswitch info was found for port");
10792 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10793         /*
10794          * This parameter is transferred to
10795          * mlx5dv_dr_action_create_dest_ib_port().
10796          */
10797         *dst_port_id = priv->dev_port;
10798 #else
10799         /*
10800          * Legacy mode, no LAG configurations is supported.
10801          * This parameter is transferred to
10802          * mlx5dv_dr_action_create_dest_vport().
10803          */
10804         *dst_port_id = priv->vport_id;
10805 #endif
10806         return 0;
10807 }
10808
10809 /**
10810  * Create a counter with aging configuration.
10811  *
10812  * @param[in] dev
10813  *   Pointer to rte_eth_dev structure.
10814  * @param[in] dev_flow
10815  *   Pointer to the mlx5_flow.
10816  * @param[out] count
10817  *   Pointer to the counter action configuration.
10818  * @param[in] age
10819  *   Pointer to the aging action configuration.
10820  *
10821  * @return
10822  *   Index to flow counter on success, 0 otherwise.
10823  */
10824 static uint32_t
10825 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10826                                 struct mlx5_flow *dev_flow,
10827                                 const struct rte_flow_action_count *count,
10828                                 const struct rte_flow_action_age *age)
10829 {
10830         uint32_t counter;
10831         struct mlx5_age_param *age_param;
10832
10833         if (count && count->shared)
10834                 counter = flow_dv_counter_get_shared(dev, count->id);
10835         else
10836                 counter = flow_dv_counter_alloc(dev, !!age);
10837         if (!counter || age == NULL)
10838                 return counter;
10839         age_param = flow_dv_counter_idx_get_age(dev, counter);
10840         age_param->context = age->context ? age->context :
10841                 (void *)(uintptr_t)(dev_flow->flow_idx);
10842         age_param->timeout = age->timeout;
10843         age_param->port_id = dev->data->port_id;
10844         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10845         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10846         return counter;
10847 }
10848
10849 /**
10850  * Add Tx queue matcher
10851  *
10852  * @param[in] dev
10853  *   Pointer to the dev struct.
10854  * @param[in, out] matcher
10855  *   Flow matcher.
10856  * @param[in, out] key
10857  *   Flow matcher value.
10858  * @param[in] item
10859  *   Flow pattern to translate.
10860  * @param[in] inner
10861  *   Item is inner pattern.
10862  */
10863 static void
10864 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10865                                 void *matcher, void *key,
10866                                 const struct rte_flow_item *item)
10867 {
10868         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10869         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10870         void *misc_m =
10871                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10872         void *misc_v =
10873                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10874         struct mlx5_txq_ctrl *txq;
10875         uint32_t queue;
10876
10877
10878         queue_m = (const void *)item->mask;
10879         if (!queue_m)
10880                 return;
10881         queue_v = (const void *)item->spec;
10882         if (!queue_v)
10883                 return;
10884         txq = mlx5_txq_get(dev, queue_v->queue);
10885         if (!txq)
10886                 return;
10887         queue = txq->obj->sq->id;
10888         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10889         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10890                  queue & queue_m->queue);
10891         mlx5_txq_release(dev, queue_v->queue);
10892 }
10893
10894 /**
10895  * Set the hash fields according to the @p flow information.
10896  *
10897  * @param[in] dev_flow
10898  *   Pointer to the mlx5_flow.
10899  * @param[in] rss_desc
10900  *   Pointer to the mlx5_flow_rss_desc.
10901  */
10902 static void
10903 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10904                        struct mlx5_flow_rss_desc *rss_desc)
10905 {
10906         uint64_t items = dev_flow->handle->layers;
10907         int rss_inner = 0;
10908         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10909
10910         dev_flow->hash_fields = 0;
10911 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10912         if (rss_desc->level >= 2)
10913                 rss_inner = 1;
10914 #endif
10915         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10916             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10917                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10918                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10919                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10920                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10921                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10922                         else
10923                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10924                 }
10925         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10926                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10927                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10928                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10929                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10930                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10931                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10932                         else
10933                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10934                 }
10935         }
10936         if (dev_flow->hash_fields == 0)
10937                 /*
10938                  * There is no match between the RSS types and the
10939                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
10940                  */
10941                 return;
10942         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10943             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10944                 if (rss_types & ETH_RSS_UDP) {
10945                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10946                                 dev_flow->hash_fields |=
10947                                                 IBV_RX_HASH_SRC_PORT_UDP;
10948                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10949                                 dev_flow->hash_fields |=
10950                                                 IBV_RX_HASH_DST_PORT_UDP;
10951                         else
10952                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10953                 }
10954         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10955                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10956                 if (rss_types & ETH_RSS_TCP) {
10957                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10958                                 dev_flow->hash_fields |=
10959                                                 IBV_RX_HASH_SRC_PORT_TCP;
10960                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10961                                 dev_flow->hash_fields |=
10962                                                 IBV_RX_HASH_DST_PORT_TCP;
10963                         else
10964                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10965                 }
10966         }
10967         if (rss_inner)
10968                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10969 }
10970
10971 /**
10972  * Prepare an Rx Hash queue.
10973  *
10974  * @param dev
10975  *   Pointer to Ethernet device.
10976  * @param[in] dev_flow
10977  *   Pointer to the mlx5_flow.
10978  * @param[in] rss_desc
10979  *   Pointer to the mlx5_flow_rss_desc.
10980  * @param[out] hrxq_idx
10981  *   Hash Rx queue index.
10982  *
10983  * @return
10984  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10985  */
10986 static struct mlx5_hrxq *
10987 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10988                      struct mlx5_flow *dev_flow,
10989                      struct mlx5_flow_rss_desc *rss_desc,
10990                      uint32_t *hrxq_idx)
10991 {
10992         struct mlx5_priv *priv = dev->data->dev_private;
10993         struct mlx5_flow_handle *dh = dev_flow->handle;
10994         struct mlx5_hrxq *hrxq;
10995
10996         MLX5_ASSERT(rss_desc->queue_num);
10997         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10998         rss_desc->hash_fields = dev_flow->hash_fields;
10999         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11000         rss_desc->shared_rss = 0;
11001         if (rss_desc->hash_fields == 0)
11002                 rss_desc->queue_num = 1;
11003         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
11004         if (!*hrxq_idx)
11005                 return NULL;
11006         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
11007                               *hrxq_idx);
11008         return hrxq;
11009 }
11010
11011 /**
11012  * Release sample sub action resource.
11013  *
11014  * @param[in, out] dev
11015  *   Pointer to rte_eth_dev structure.
11016  * @param[in] act_res
11017  *   Pointer to sample sub action resource.
11018  */
11019 static void
11020 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11021                                    struct mlx5_flow_sub_actions_idx *act_res)
11022 {
11023         if (act_res->rix_hrxq) {
11024                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11025                 act_res->rix_hrxq = 0;
11026         }
11027         if (act_res->rix_encap_decap) {
11028                 flow_dv_encap_decap_resource_release(dev,
11029                                                      act_res->rix_encap_decap);
11030                 act_res->rix_encap_decap = 0;
11031         }
11032         if (act_res->rix_port_id_action) {
11033                 flow_dv_port_id_action_resource_release(dev,
11034                                                 act_res->rix_port_id_action);
11035                 act_res->rix_port_id_action = 0;
11036         }
11037         if (act_res->rix_tag) {
11038                 flow_dv_tag_release(dev, act_res->rix_tag);
11039                 act_res->rix_tag = 0;
11040         }
11041         if (act_res->rix_jump) {
11042                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11043                 act_res->rix_jump = 0;
11044         }
11045 }
11046
11047 int
11048 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11049                         struct mlx5_list_entry *entry, void *cb_ctx)
11050 {
11051         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11052         struct rte_eth_dev *dev = ctx->dev;
11053         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11054         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11055                                                               typeof(*resource),
11056                                                               entry);
11057
11058         if (ctx_resource->ratio == resource->ratio &&
11059             ctx_resource->ft_type == resource->ft_type &&
11060             ctx_resource->ft_id == resource->ft_id &&
11061             ctx_resource->set_action == resource->set_action &&
11062             !memcmp((void *)&ctx_resource->sample_act,
11063                     (void *)&resource->sample_act,
11064                     sizeof(struct mlx5_flow_sub_actions_list))) {
11065                 /*
11066                  * Existing sample action should release the prepared
11067                  * sub-actions reference counter.
11068                  */
11069                 flow_dv_sample_sub_actions_release(dev,
11070                                                    &ctx_resource->sample_idx);
11071                 return 0;
11072         }
11073         return 1;
11074 }
11075
11076 struct mlx5_list_entry *
11077 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11078 {
11079         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11080         struct rte_eth_dev *dev = ctx->dev;
11081         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11082         void **sample_dv_actions = ctx_resource->sub_actions;
11083         struct mlx5_flow_dv_sample_resource *resource;
11084         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11085         struct mlx5_priv *priv = dev->data->dev_private;
11086         struct mlx5_dev_ctx_shared *sh = priv->sh;
11087         struct mlx5_flow_tbl_resource *tbl;
11088         uint32_t idx = 0;
11089         const uint32_t next_ft_step = 1;
11090         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11091         uint8_t is_egress = 0;
11092         uint8_t is_transfer = 0;
11093         struct rte_flow_error *error = ctx->error;
11094
11095         /* Register new sample resource. */
11096         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11097         if (!resource) {
11098                 rte_flow_error_set(error, ENOMEM,
11099                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11100                                           NULL,
11101                                           "cannot allocate resource memory");
11102                 return NULL;
11103         }
11104         *resource = *ctx_resource;
11105         /* Create normal path table level */
11106         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11107                 is_transfer = 1;
11108         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11109                 is_egress = 1;
11110         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11111                                         is_egress, is_transfer,
11112                                         true, NULL, 0, 0, 0, error);
11113         if (!tbl) {
11114                 rte_flow_error_set(error, ENOMEM,
11115                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11116                                           NULL,
11117                                           "fail to create normal path table "
11118                                           "for sample");
11119                 goto error;
11120         }
11121         resource->normal_path_tbl = tbl;
11122         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11123                 if (!sh->default_miss_action) {
11124                         rte_flow_error_set(error, ENOMEM,
11125                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11126                                                 NULL,
11127                                                 "default miss action was not "
11128                                                 "created");
11129                         goto error;
11130                 }
11131                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11132                                                 sh->default_miss_action;
11133         }
11134         /* Create a DR sample action */
11135         sampler_attr.sample_ratio = resource->ratio;
11136         sampler_attr.default_next_table = tbl->obj;
11137         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11138         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11139                                                         &sample_dv_actions[0];
11140         sampler_attr.action = resource->set_action;
11141         if (mlx5_os_flow_dr_create_flow_action_sampler
11142                         (&sampler_attr, &resource->verbs_action)) {
11143                 rte_flow_error_set(error, ENOMEM,
11144                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11145                                         NULL, "cannot create sample action");
11146                 goto error;
11147         }
11148         resource->idx = idx;
11149         resource->dev = dev;
11150         return &resource->entry;
11151 error:
11152         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11153                 flow_dv_sample_sub_actions_release(dev,
11154                                                    &resource->sample_idx);
11155         if (resource->normal_path_tbl)
11156                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11157                                 resource->normal_path_tbl);
11158         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11159         return NULL;
11160
11161 }
11162
11163 struct mlx5_list_entry *
11164 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11165                          struct mlx5_list_entry *entry __rte_unused,
11166                          void *cb_ctx)
11167 {
11168         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11169         struct rte_eth_dev *dev = ctx->dev;
11170         struct mlx5_flow_dv_sample_resource *resource;
11171         struct mlx5_priv *priv = dev->data->dev_private;
11172         struct mlx5_dev_ctx_shared *sh = priv->sh;
11173         uint32_t idx = 0;
11174
11175         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11176         if (!resource) {
11177                 rte_flow_error_set(ctx->error, ENOMEM,
11178                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11179                                           NULL,
11180                                           "cannot allocate resource memory");
11181                 return NULL;
11182         }
11183         memcpy(resource, entry, sizeof(*resource));
11184         resource->idx = idx;
11185         resource->dev = dev;
11186         return &resource->entry;
11187 }
11188
11189 void
11190 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11191                              struct mlx5_list_entry *entry)
11192 {
11193         struct mlx5_flow_dv_sample_resource *resource =
11194                                   container_of(entry, typeof(*resource), entry);
11195         struct rte_eth_dev *dev = resource->dev;
11196         struct mlx5_priv *priv = dev->data->dev_private;
11197
11198         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11199 }
11200
11201 /**
11202  * Find existing sample resource or create and register a new one.
11203  *
11204  * @param[in, out] dev
11205  *   Pointer to rte_eth_dev structure.
11206  * @param[in] ref
11207  *   Pointer to sample resource reference.
11208  * @parm[in, out] dev_flow
11209  *   Pointer to the dev_flow.
11210  * @param[out] error
11211  *   pointer to error structure.
11212  *
11213  * @return
11214  *   0 on success otherwise -errno and errno is set.
11215  */
11216 static int
11217 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11218                          struct mlx5_flow_dv_sample_resource *ref,
11219                          struct mlx5_flow *dev_flow,
11220                          struct rte_flow_error *error)
11221 {
11222         struct mlx5_flow_dv_sample_resource *resource;
11223         struct mlx5_list_entry *entry;
11224         struct mlx5_priv *priv = dev->data->dev_private;
11225         struct mlx5_flow_cb_ctx ctx = {
11226                 .dev = dev,
11227                 .error = error,
11228                 .data = ref,
11229         };
11230
11231         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11232         if (!entry)
11233                 return -rte_errno;
11234         resource = container_of(entry, typeof(*resource), entry);
11235         dev_flow->handle->dvh.rix_sample = resource->idx;
11236         dev_flow->dv.sample_res = resource;
11237         return 0;
11238 }
11239
11240 int
11241 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11242                             struct mlx5_list_entry *entry, void *cb_ctx)
11243 {
11244         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11245         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11246         struct rte_eth_dev *dev = ctx->dev;
11247         struct mlx5_flow_dv_dest_array_resource *resource =
11248                                   container_of(entry, typeof(*resource), entry);
11249         uint32_t idx = 0;
11250
11251         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11252             ctx_resource->ft_type == resource->ft_type &&
11253             !memcmp((void *)resource->sample_act,
11254                     (void *)ctx_resource->sample_act,
11255                    (ctx_resource->num_of_dest *
11256                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11257                 /*
11258                  * Existing sample action should release the prepared
11259                  * sub-actions reference counter.
11260                  */
11261                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11262                         flow_dv_sample_sub_actions_release(dev,
11263                                         &ctx_resource->sample_idx[idx]);
11264                 return 0;
11265         }
11266         return 1;
11267 }
11268
11269 struct mlx5_list_entry *
11270 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11271 {
11272         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11273         struct rte_eth_dev *dev = ctx->dev;
11274         struct mlx5_flow_dv_dest_array_resource *resource;
11275         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11276         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11277         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11278         struct mlx5_priv *priv = dev->data->dev_private;
11279         struct mlx5_dev_ctx_shared *sh = priv->sh;
11280         struct mlx5_flow_sub_actions_list *sample_act;
11281         struct mlx5dv_dr_domain *domain;
11282         uint32_t idx = 0, res_idx = 0;
11283         struct rte_flow_error *error = ctx->error;
11284         uint64_t action_flags;
11285         int ret;
11286
11287         /* Register new destination array resource. */
11288         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11289                                             &res_idx);
11290         if (!resource) {
11291                 rte_flow_error_set(error, ENOMEM,
11292                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11293                                           NULL,
11294                                           "cannot allocate resource memory");
11295                 return NULL;
11296         }
11297         *resource = *ctx_resource;
11298         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11299                 domain = sh->fdb_domain;
11300         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11301                 domain = sh->rx_domain;
11302         else
11303                 domain = sh->tx_domain;
11304         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11305                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11306                                  mlx5_malloc(MLX5_MEM_ZERO,
11307                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11308                                  0, SOCKET_ID_ANY);
11309                 if (!dest_attr[idx]) {
11310                         rte_flow_error_set(error, ENOMEM,
11311                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11312                                            NULL,
11313                                            "cannot allocate resource memory");
11314                         goto error;
11315                 }
11316                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11317                 sample_act = &ctx_resource->sample_act[idx];
11318                 action_flags = sample_act->action_flags;
11319                 switch (action_flags) {
11320                 case MLX5_FLOW_ACTION_QUEUE:
11321                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11322                         break;
11323                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11324                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11325                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11326                         dest_attr[idx]->dest_reformat->reformat =
11327                                         sample_act->dr_encap_action;
11328                         dest_attr[idx]->dest_reformat->dest =
11329                                         sample_act->dr_port_id_action;
11330                         break;
11331                 case MLX5_FLOW_ACTION_PORT_ID:
11332                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11333                         break;
11334                 case MLX5_FLOW_ACTION_JUMP:
11335                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11336                         break;
11337                 default:
11338                         rte_flow_error_set(error, EINVAL,
11339                                            RTE_FLOW_ERROR_TYPE_ACTION,
11340                                            NULL,
11341                                            "unsupported actions type");
11342                         goto error;
11343                 }
11344         }
11345         /* create a dest array actioin */
11346         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11347                                                 (domain,
11348                                                  resource->num_of_dest,
11349                                                  dest_attr,
11350                                                  &resource->action);
11351         if (ret) {
11352                 rte_flow_error_set(error, ENOMEM,
11353                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11354                                    NULL,
11355                                    "cannot create destination array action");
11356                 goto error;
11357         }
11358         resource->idx = res_idx;
11359         resource->dev = dev;
11360         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11361                 mlx5_free(dest_attr[idx]);
11362         return &resource->entry;
11363 error:
11364         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11365                 flow_dv_sample_sub_actions_release(dev,
11366                                                    &resource->sample_idx[idx]);
11367                 if (dest_attr[idx])
11368                         mlx5_free(dest_attr[idx]);
11369         }
11370         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11371         return NULL;
11372 }
11373
11374 struct mlx5_list_entry *
11375 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11376                             struct mlx5_list_entry *entry __rte_unused,
11377                             void *cb_ctx)
11378 {
11379         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11380         struct rte_eth_dev *dev = ctx->dev;
11381         struct mlx5_flow_dv_dest_array_resource *resource;
11382         struct mlx5_priv *priv = dev->data->dev_private;
11383         struct mlx5_dev_ctx_shared *sh = priv->sh;
11384         uint32_t res_idx = 0;
11385         struct rte_flow_error *error = ctx->error;
11386
11387         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11388                                       &res_idx);
11389         if (!resource) {
11390                 rte_flow_error_set(error, ENOMEM,
11391                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11392                                           NULL,
11393                                           "cannot allocate dest-array memory");
11394                 return NULL;
11395         }
11396         memcpy(resource, entry, sizeof(*resource));
11397         resource->idx = res_idx;
11398         resource->dev = dev;
11399         return &resource->entry;
11400 }
11401
11402 void
11403 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11404                                  struct mlx5_list_entry *entry)
11405 {
11406         struct mlx5_flow_dv_dest_array_resource *resource =
11407                         container_of(entry, typeof(*resource), entry);
11408         struct rte_eth_dev *dev = resource->dev;
11409         struct mlx5_priv *priv = dev->data->dev_private;
11410
11411         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11412 }
11413
11414 /**
11415  * Find existing destination array resource or create and register a new one.
11416  *
11417  * @param[in, out] dev
11418  *   Pointer to rte_eth_dev structure.
11419  * @param[in] ref
11420  *   Pointer to destination array resource reference.
11421  * @parm[in, out] dev_flow
11422  *   Pointer to the dev_flow.
11423  * @param[out] error
11424  *   pointer to error structure.
11425  *
11426  * @return
11427  *   0 on success otherwise -errno and errno is set.
11428  */
11429 static int
11430 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11431                          struct mlx5_flow_dv_dest_array_resource *ref,
11432                          struct mlx5_flow *dev_flow,
11433                          struct rte_flow_error *error)
11434 {
11435         struct mlx5_flow_dv_dest_array_resource *resource;
11436         struct mlx5_priv *priv = dev->data->dev_private;
11437         struct mlx5_list_entry *entry;
11438         struct mlx5_flow_cb_ctx ctx = {
11439                 .dev = dev,
11440                 .error = error,
11441                 .data = ref,
11442         };
11443
11444         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11445         if (!entry)
11446                 return -rte_errno;
11447         resource = container_of(entry, typeof(*resource), entry);
11448         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11449         dev_flow->dv.dest_array_res = resource;
11450         return 0;
11451 }
11452
11453 /**
11454  * Convert Sample action to DV specification.
11455  *
11456  * @param[in] dev
11457  *   Pointer to rte_eth_dev structure.
11458  * @param[in] action
11459  *   Pointer to sample action structure.
11460  * @param[in, out] dev_flow
11461  *   Pointer to the mlx5_flow.
11462  * @param[in] attr
11463  *   Pointer to the flow attributes.
11464  * @param[in, out] num_of_dest
11465  *   Pointer to the num of destination.
11466  * @param[in, out] sample_actions
11467  *   Pointer to sample actions list.
11468  * @param[in, out] res
11469  *   Pointer to sample resource.
11470  * @param[out] error
11471  *   Pointer to the error structure.
11472  *
11473  * @return
11474  *   0 on success, a negative errno value otherwise and rte_errno is set.
11475  */
11476 static int
11477 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11478                                 const struct rte_flow_action_sample *action,
11479                                 struct mlx5_flow *dev_flow,
11480                                 const struct rte_flow_attr *attr,
11481                                 uint32_t *num_of_dest,
11482                                 void **sample_actions,
11483                                 struct mlx5_flow_dv_sample_resource *res,
11484                                 struct rte_flow_error *error)
11485 {
11486         struct mlx5_priv *priv = dev->data->dev_private;
11487         const struct rte_flow_action *sub_actions;
11488         struct mlx5_flow_sub_actions_list *sample_act;
11489         struct mlx5_flow_sub_actions_idx *sample_idx;
11490         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11491         struct rte_flow *flow = dev_flow->flow;
11492         struct mlx5_flow_rss_desc *rss_desc;
11493         uint64_t action_flags = 0;
11494
11495         MLX5_ASSERT(wks);
11496         rss_desc = &wks->rss_desc;
11497         sample_act = &res->sample_act;
11498         sample_idx = &res->sample_idx;
11499         res->ratio = action->ratio;
11500         sub_actions = action->actions;
11501         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11502                 int type = sub_actions->type;
11503                 uint32_t pre_rix = 0;
11504                 void *pre_r;
11505                 switch (type) {
11506                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11507                 {
11508                         const struct rte_flow_action_queue *queue;
11509                         struct mlx5_hrxq *hrxq;
11510                         uint32_t hrxq_idx;
11511
11512                         queue = sub_actions->conf;
11513                         rss_desc->queue_num = 1;
11514                         rss_desc->queue[0] = queue->index;
11515                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11516                                                     rss_desc, &hrxq_idx);
11517                         if (!hrxq)
11518                                 return rte_flow_error_set
11519                                         (error, rte_errno,
11520                                          RTE_FLOW_ERROR_TYPE_ACTION,
11521                                          NULL,
11522                                          "cannot create fate queue");
11523                         sample_act->dr_queue_action = hrxq->action;
11524                         sample_idx->rix_hrxq = hrxq_idx;
11525                         sample_actions[sample_act->actions_num++] =
11526                                                 hrxq->action;
11527                         (*num_of_dest)++;
11528                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11529                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11530                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11531                         dev_flow->handle->fate_action =
11532                                         MLX5_FLOW_FATE_QUEUE;
11533                         break;
11534                 }
11535                 case RTE_FLOW_ACTION_TYPE_RSS:
11536                 {
11537                         struct mlx5_hrxq *hrxq;
11538                         uint32_t hrxq_idx;
11539                         const struct rte_flow_action_rss *rss;
11540                         const uint8_t *rss_key;
11541
11542                         rss = sub_actions->conf;
11543                         memcpy(rss_desc->queue, rss->queue,
11544                                rss->queue_num * sizeof(uint16_t));
11545                         rss_desc->queue_num = rss->queue_num;
11546                         /* NULL RSS key indicates default RSS key. */
11547                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11548                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11549                         /*
11550                          * rss->level and rss.types should be set in advance
11551                          * when expanding items for RSS.
11552                          */
11553                         flow_dv_hashfields_set(dev_flow, rss_desc);
11554                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11555                                                     rss_desc, &hrxq_idx);
11556                         if (!hrxq)
11557                                 return rte_flow_error_set
11558                                         (error, rte_errno,
11559                                          RTE_FLOW_ERROR_TYPE_ACTION,
11560                                          NULL,
11561                                          "cannot create fate queue");
11562                         sample_act->dr_queue_action = hrxq->action;
11563                         sample_idx->rix_hrxq = hrxq_idx;
11564                         sample_actions[sample_act->actions_num++] =
11565                                                 hrxq->action;
11566                         (*num_of_dest)++;
11567                         action_flags |= MLX5_FLOW_ACTION_RSS;
11568                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11569                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11570                         dev_flow->handle->fate_action =
11571                                         MLX5_FLOW_FATE_QUEUE;
11572                         break;
11573                 }
11574                 case RTE_FLOW_ACTION_TYPE_MARK:
11575                 {
11576                         uint32_t tag_be = mlx5_flow_mark_set
11577                                 (((const struct rte_flow_action_mark *)
11578                                 (sub_actions->conf))->id);
11579
11580                         dev_flow->handle->mark = 1;
11581                         pre_rix = dev_flow->handle->dvh.rix_tag;
11582                         /* Save the mark resource before sample */
11583                         pre_r = dev_flow->dv.tag_resource;
11584                         if (flow_dv_tag_resource_register(dev, tag_be,
11585                                                   dev_flow, error))
11586                                 return -rte_errno;
11587                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11588                         sample_act->dr_tag_action =
11589                                 dev_flow->dv.tag_resource->action;
11590                         sample_idx->rix_tag =
11591                                 dev_flow->handle->dvh.rix_tag;
11592                         sample_actions[sample_act->actions_num++] =
11593                                                 sample_act->dr_tag_action;
11594                         /* Recover the mark resource after sample */
11595                         dev_flow->dv.tag_resource = pre_r;
11596                         dev_flow->handle->dvh.rix_tag = pre_rix;
11597                         action_flags |= MLX5_FLOW_ACTION_MARK;
11598                         break;
11599                 }
11600                 case RTE_FLOW_ACTION_TYPE_COUNT:
11601                 {
11602                         if (!flow->counter) {
11603                                 flow->counter =
11604                                         flow_dv_translate_create_counter(dev,
11605                                                 dev_flow, sub_actions->conf,
11606                                                 0);
11607                                 if (!flow->counter)
11608                                         return rte_flow_error_set
11609                                                 (error, rte_errno,
11610                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11611                                                 NULL,
11612                                                 "cannot create counter"
11613                                                 " object.");
11614                         }
11615                         sample_act->dr_cnt_action =
11616                                   (flow_dv_counter_get_by_idx(dev,
11617                                   flow->counter, NULL))->action;
11618                         sample_actions[sample_act->actions_num++] =
11619                                                 sample_act->dr_cnt_action;
11620                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11621                         break;
11622                 }
11623                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11624                 {
11625                         struct mlx5_flow_dv_port_id_action_resource
11626                                         port_id_resource;
11627                         uint32_t port_id = 0;
11628
11629                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11630                         /* Save the port id resource before sample */
11631                         pre_rix = dev_flow->handle->rix_port_id_action;
11632                         pre_r = dev_flow->dv.port_id_action;
11633                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11634                                                              &port_id, error))
11635                                 return -rte_errno;
11636                         port_id_resource.port_id = port_id;
11637                         if (flow_dv_port_id_action_resource_register
11638                             (dev, &port_id_resource, dev_flow, error))
11639                                 return -rte_errno;
11640                         sample_act->dr_port_id_action =
11641                                 dev_flow->dv.port_id_action->action;
11642                         sample_idx->rix_port_id_action =
11643                                 dev_flow->handle->rix_port_id_action;
11644                         sample_actions[sample_act->actions_num++] =
11645                                                 sample_act->dr_port_id_action;
11646                         /* Recover the port id resource after sample */
11647                         dev_flow->dv.port_id_action = pre_r;
11648                         dev_flow->handle->rix_port_id_action = pre_rix;
11649                         (*num_of_dest)++;
11650                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11651                         break;
11652                 }
11653                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11654                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11655                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11656                         /* Save the encap resource before sample */
11657                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11658                         pre_r = dev_flow->dv.encap_decap;
11659                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11660                                                            dev_flow,
11661                                                            attr->transfer,
11662                                                            error))
11663                                 return -rte_errno;
11664                         sample_act->dr_encap_action =
11665                                 dev_flow->dv.encap_decap->action;
11666                         sample_idx->rix_encap_decap =
11667                                 dev_flow->handle->dvh.rix_encap_decap;
11668                         sample_actions[sample_act->actions_num++] =
11669                                                 sample_act->dr_encap_action;
11670                         /* Recover the encap resource after sample */
11671                         dev_flow->dv.encap_decap = pre_r;
11672                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11673                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11674                         break;
11675                 default:
11676                         return rte_flow_error_set(error, EINVAL,
11677                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11678                                 NULL,
11679                                 "Not support for sampler action");
11680                 }
11681         }
11682         sample_act->action_flags = action_flags;
11683         res->ft_id = dev_flow->dv.group;
11684         if (attr->transfer) {
11685                 union {
11686                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11687                         uint64_t set_action;
11688                 } action_ctx = { .set_action = 0 };
11689
11690                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11691                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11692                          MLX5_MODIFICATION_TYPE_SET);
11693                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11694                          MLX5_MODI_META_REG_C_0);
11695                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11696                          priv->vport_meta_tag);
11697                 res->set_action = action_ctx.set_action;
11698         } else if (attr->ingress) {
11699                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11700         } else {
11701                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11702         }
11703         return 0;
11704 }
11705
11706 /**
11707  * Convert Sample action to DV specification.
11708  *
11709  * @param[in] dev
11710  *   Pointer to rte_eth_dev structure.
11711  * @param[in, out] dev_flow
11712  *   Pointer to the mlx5_flow.
11713  * @param[in] num_of_dest
11714  *   The num of destination.
11715  * @param[in, out] res
11716  *   Pointer to sample resource.
11717  * @param[in, out] mdest_res
11718  *   Pointer to destination array resource.
11719  * @param[in] sample_actions
11720  *   Pointer to sample path actions list.
11721  * @param[in] action_flags
11722  *   Holds the actions detected until now.
11723  * @param[out] error
11724  *   Pointer to the error structure.
11725  *
11726  * @return
11727  *   0 on success, a negative errno value otherwise and rte_errno is set.
11728  */
11729 static int
11730 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11731                              struct mlx5_flow *dev_flow,
11732                              uint32_t num_of_dest,
11733                              struct mlx5_flow_dv_sample_resource *res,
11734                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11735                              void **sample_actions,
11736                              uint64_t action_flags,
11737                              struct rte_flow_error *error)
11738 {
11739         /* update normal path action resource into last index of array */
11740         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11741         struct mlx5_flow_sub_actions_list *sample_act =
11742                                         &mdest_res->sample_act[dest_index];
11743         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11744         struct mlx5_flow_rss_desc *rss_desc;
11745         uint32_t normal_idx = 0;
11746         struct mlx5_hrxq *hrxq;
11747         uint32_t hrxq_idx;
11748
11749         MLX5_ASSERT(wks);
11750         rss_desc = &wks->rss_desc;
11751         if (num_of_dest > 1) {
11752                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11753                         /* Handle QP action for mirroring */
11754                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11755                                                     rss_desc, &hrxq_idx);
11756                         if (!hrxq)
11757                                 return rte_flow_error_set
11758                                      (error, rte_errno,
11759                                       RTE_FLOW_ERROR_TYPE_ACTION,
11760                                       NULL,
11761                                       "cannot create rx queue");
11762                         normal_idx++;
11763                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11764                         sample_act->dr_queue_action = hrxq->action;
11765                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11766                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11767                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11768                 }
11769                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11770                         normal_idx++;
11771                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11772                                 dev_flow->handle->dvh.rix_encap_decap;
11773                         sample_act->dr_encap_action =
11774                                 dev_flow->dv.encap_decap->action;
11775                         dev_flow->handle->dvh.rix_encap_decap = 0;
11776                 }
11777                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11778                         normal_idx++;
11779                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11780                                 dev_flow->handle->rix_port_id_action;
11781                         sample_act->dr_port_id_action =
11782                                 dev_flow->dv.port_id_action->action;
11783                         dev_flow->handle->rix_port_id_action = 0;
11784                 }
11785                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11786                         normal_idx++;
11787                         mdest_res->sample_idx[dest_index].rix_jump =
11788                                 dev_flow->handle->rix_jump;
11789                         sample_act->dr_jump_action =
11790                                 dev_flow->dv.jump->action;
11791                         dev_flow->handle->rix_jump = 0;
11792                 }
11793                 sample_act->actions_num = normal_idx;
11794                 /* update sample action resource into first index of array */
11795                 mdest_res->ft_type = res->ft_type;
11796                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11797                                 sizeof(struct mlx5_flow_sub_actions_idx));
11798                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11799                                 sizeof(struct mlx5_flow_sub_actions_list));
11800                 mdest_res->num_of_dest = num_of_dest;
11801                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11802                                                          dev_flow, error))
11803                         return rte_flow_error_set(error, EINVAL,
11804                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11805                                                   NULL, "can't create sample "
11806                                                   "action");
11807         } else {
11808                 res->sub_actions = sample_actions;
11809                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11810                         return rte_flow_error_set(error, EINVAL,
11811                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11812                                                   NULL,
11813                                                   "can't create sample action");
11814         }
11815         return 0;
11816 }
11817
11818 /**
11819  * Remove an ASO age action from age actions list.
11820  *
11821  * @param[in] dev
11822  *   Pointer to the Ethernet device structure.
11823  * @param[in] age
11824  *   Pointer to the aso age action handler.
11825  */
11826 static void
11827 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11828                                 struct mlx5_aso_age_action *age)
11829 {
11830         struct mlx5_age_info *age_info;
11831         struct mlx5_age_param *age_param = &age->age_params;
11832         struct mlx5_priv *priv = dev->data->dev_private;
11833         uint16_t expected = AGE_CANDIDATE;
11834
11835         age_info = GET_PORT_AGE_INFO(priv);
11836         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11837                                          AGE_FREE, false, __ATOMIC_RELAXED,
11838                                          __ATOMIC_RELAXED)) {
11839                 /**
11840                  * We need the lock even it is age timeout,
11841                  * since age action may still in process.
11842                  */
11843                 rte_spinlock_lock(&age_info->aged_sl);
11844                 LIST_REMOVE(age, next);
11845                 rte_spinlock_unlock(&age_info->aged_sl);
11846                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11847         }
11848 }
11849
11850 /**
11851  * Release an ASO age action.
11852  *
11853  * @param[in] dev
11854  *   Pointer to the Ethernet device structure.
11855  * @param[in] age_idx
11856  *   Index of ASO age action to release.
11857  * @param[in] flow
11858  *   True if the release operation is during flow destroy operation.
11859  *   False if the release operation is during action destroy operation.
11860  *
11861  * @return
11862  *   0 when age action was removed, otherwise the number of references.
11863  */
11864 static int
11865 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11866 {
11867         struct mlx5_priv *priv = dev->data->dev_private;
11868         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11869         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11870         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11871
11872         if (!ret) {
11873                 flow_dv_aso_age_remove_from_age(dev, age);
11874                 rte_spinlock_lock(&mng->free_sl);
11875                 LIST_INSERT_HEAD(&mng->free, age, next);
11876                 rte_spinlock_unlock(&mng->free_sl);
11877         }
11878         return ret;
11879 }
11880
11881 /**
11882  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11883  *
11884  * @param[in] dev
11885  *   Pointer to the Ethernet device structure.
11886  *
11887  * @return
11888  *   0 on success, otherwise negative errno value and rte_errno is set.
11889  */
11890 static int
11891 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11892 {
11893         struct mlx5_priv *priv = dev->data->dev_private;
11894         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11895         void *old_pools = mng->pools;
11896         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11897         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11898         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11899
11900         if (!pools) {
11901                 rte_errno = ENOMEM;
11902                 return -ENOMEM;
11903         }
11904         if (old_pools) {
11905                 memcpy(pools, old_pools,
11906                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11907                 mlx5_free(old_pools);
11908         } else {
11909                 /* First ASO flow hit allocation - starting ASO data-path. */
11910                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11911
11912                 if (ret) {
11913                         mlx5_free(pools);
11914                         return ret;
11915                 }
11916         }
11917         mng->n = resize;
11918         mng->pools = pools;
11919         return 0;
11920 }
11921
11922 /**
11923  * Create and initialize a new ASO aging pool.
11924  *
11925  * @param[in] dev
11926  *   Pointer to the Ethernet device structure.
11927  * @param[out] age_free
11928  *   Where to put the pointer of a new age action.
11929  *
11930  * @return
11931  *   The age actions pool pointer and @p age_free is set on success,
11932  *   NULL otherwise and rte_errno is set.
11933  */
11934 static struct mlx5_aso_age_pool *
11935 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11936                         struct mlx5_aso_age_action **age_free)
11937 {
11938         struct mlx5_priv *priv = dev->data->dev_private;
11939         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11940         struct mlx5_aso_age_pool *pool = NULL;
11941         struct mlx5_devx_obj *obj = NULL;
11942         uint32_t i;
11943
11944         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11945                                                     priv->sh->pdn);
11946         if (!obj) {
11947                 rte_errno = ENODATA;
11948                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11949                 return NULL;
11950         }
11951         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11952         if (!pool) {
11953                 claim_zero(mlx5_devx_cmd_destroy(obj));
11954                 rte_errno = ENOMEM;
11955                 return NULL;
11956         }
11957         pool->flow_hit_aso_obj = obj;
11958         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11959         rte_spinlock_lock(&mng->resize_sl);
11960         pool->index = mng->next;
11961         /* Resize pools array if there is no room for the new pool in it. */
11962         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11963                 claim_zero(mlx5_devx_cmd_destroy(obj));
11964                 mlx5_free(pool);
11965                 rte_spinlock_unlock(&mng->resize_sl);
11966                 return NULL;
11967         }
11968         mng->pools[pool->index] = pool;
11969         mng->next++;
11970         rte_spinlock_unlock(&mng->resize_sl);
11971         /* Assign the first action in the new pool, the rest go to free list. */
11972         *age_free = &pool->actions[0];
11973         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11974                 pool->actions[i].offset = i;
11975                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11976         }
11977         return pool;
11978 }
11979
11980 /**
11981  * Allocate a ASO aging bit.
11982  *
11983  * @param[in] dev
11984  *   Pointer to the Ethernet device structure.
11985  * @param[out] error
11986  *   Pointer to the error structure.
11987  *
11988  * @return
11989  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
11990  */
11991 static uint32_t
11992 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11993 {
11994         struct mlx5_priv *priv = dev->data->dev_private;
11995         const struct mlx5_aso_age_pool *pool;
11996         struct mlx5_aso_age_action *age_free = NULL;
11997         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11998
11999         MLX5_ASSERT(mng);
12000         /* Try to get the next free age action bit. */
12001         rte_spinlock_lock(&mng->free_sl);
12002         age_free = LIST_FIRST(&mng->free);
12003         if (age_free) {
12004                 LIST_REMOVE(age_free, next);
12005         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12006                 rte_spinlock_unlock(&mng->free_sl);
12007                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12008                                    NULL, "failed to create ASO age pool");
12009                 return 0; /* 0 is an error. */
12010         }
12011         rte_spinlock_unlock(&mng->free_sl);
12012         pool = container_of
12013           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12014                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12015                                                                        actions);
12016         if (!age_free->dr_action) {
12017                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12018                                                  error);
12019
12020                 if (reg_c < 0) {
12021                         rte_flow_error_set(error, rte_errno,
12022                                            RTE_FLOW_ERROR_TYPE_ACTION,
12023                                            NULL, "failed to get reg_c "
12024                                            "for ASO flow hit");
12025                         return 0; /* 0 is an error. */
12026                 }
12027 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12028                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12029                                 (priv->sh->rx_domain,
12030                                  pool->flow_hit_aso_obj->obj, age_free->offset,
12031                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12032                                  (reg_c - REG_C_0));
12033 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12034                 if (!age_free->dr_action) {
12035                         rte_errno = errno;
12036                         rte_spinlock_lock(&mng->free_sl);
12037                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12038                         rte_spinlock_unlock(&mng->free_sl);
12039                         rte_flow_error_set(error, rte_errno,
12040                                            RTE_FLOW_ERROR_TYPE_ACTION,
12041                                            NULL, "failed to create ASO "
12042                                            "flow hit action");
12043                         return 0; /* 0 is an error. */
12044                 }
12045         }
12046         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12047         return pool->index | ((age_free->offset + 1) << 16);
12048 }
12049
12050 /**
12051  * Initialize flow ASO age parameters.
12052  *
12053  * @param[in] dev
12054  *   Pointer to rte_eth_dev structure.
12055  * @param[in] age_idx
12056  *   Index of ASO age action.
12057  * @param[in] context
12058  *   Pointer to flow counter age context.
12059  * @param[in] timeout
12060  *   Aging timeout in seconds.
12061  *
12062  */
12063 static void
12064 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12065                             uint32_t age_idx,
12066                             void *context,
12067                             uint32_t timeout)
12068 {
12069         struct mlx5_aso_age_action *aso_age;
12070
12071         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12072         MLX5_ASSERT(aso_age);
12073         aso_age->age_params.context = context;
12074         aso_age->age_params.timeout = timeout;
12075         aso_age->age_params.port_id = dev->data->port_id;
12076         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12077                          __ATOMIC_RELAXED);
12078         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12079                          __ATOMIC_RELAXED);
12080 }
12081
12082 static void
12083 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12084                                const struct rte_flow_item_integrity *value,
12085                                void *headers_m, void *headers_v)
12086 {
12087         if (mask->l4_ok) {
12088                 /* application l4_ok filter aggregates all hardware l4 filters
12089                  * therefore hw l4_checksum_ok must be implicitly added here.
12090                  */
12091                 struct rte_flow_item_integrity local_item;
12092
12093                 local_item.l4_csum_ok = 1;
12094                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12095                          local_item.l4_csum_ok);
12096                 if (value->l4_ok) {
12097                         /* application l4_ok = 1 matches sets both hw flags
12098                          * l4_ok and l4_checksum_ok flags to 1.
12099                          */
12100                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12101                                  l4_checksum_ok, local_item.l4_csum_ok);
12102                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12103                                  mask->l4_ok);
12104                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12105                                  value->l4_ok);
12106                 } else {
12107                         /* application l4_ok = 0 matches on hw flag
12108                          * l4_checksum_ok = 0 only.
12109                          */
12110                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12111                                  l4_checksum_ok, 0);
12112                 }
12113         } else if (mask->l4_csum_ok) {
12114                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12115                          mask->l4_csum_ok);
12116                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12117                          value->l4_csum_ok);
12118         }
12119 }
12120
12121 static void
12122 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12123                                const struct rte_flow_item_integrity *value,
12124                                void *headers_m, void *headers_v,
12125                                bool is_ipv4)
12126 {
12127         if (mask->l3_ok) {
12128                 /* application l3_ok filter aggregates all hardware l3 filters
12129                  * therefore hw ipv4_checksum_ok must be implicitly added here.
12130                  */
12131                 struct rte_flow_item_integrity local_item;
12132
12133                 local_item.ipv4_csum_ok = !!is_ipv4;
12134                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12135                          local_item.ipv4_csum_ok);
12136                 if (value->l3_ok) {
12137                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12138                                  ipv4_checksum_ok, local_item.ipv4_csum_ok);
12139                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12140                                  mask->l3_ok);
12141                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12142                                  value->l3_ok);
12143                 } else {
12144                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12145                                  ipv4_checksum_ok, 0);
12146                 }
12147         } else if (mask->ipv4_csum_ok) {
12148                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12149                          mask->ipv4_csum_ok);
12150                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12151                          value->ipv4_csum_ok);
12152         }
12153 }
12154
12155 static void
12156 flow_dv_translate_item_integrity(void *matcher, void *key,
12157                                  const struct rte_flow_item *head_item,
12158                                  const struct rte_flow_item *integrity_item)
12159 {
12160         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12161         const struct rte_flow_item_integrity *value = integrity_item->spec;
12162         const struct rte_flow_item *tunnel_item, *end_item, *item;
12163         void *headers_m;
12164         void *headers_v;
12165         uint32_t l3_protocol;
12166
12167         if (!value)
12168                 return;
12169         if (!mask)
12170                 mask = &rte_flow_item_integrity_mask;
12171         if (value->level > 1) {
12172                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12173                                          inner_headers);
12174                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12175         } else {
12176                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12177                                          outer_headers);
12178                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12179         }
12180         tunnel_item = mlx5_flow_find_tunnel_item(head_item);
12181         if (value->level > 1) {
12182                 /* tunnel item was verified during the item validation */
12183                 item = tunnel_item;
12184                 end_item = mlx5_find_end_item(tunnel_item);
12185         } else {
12186                 item = head_item;
12187                 end_item = tunnel_item ? tunnel_item :
12188                            mlx5_find_end_item(integrity_item);
12189         }
12190         l3_protocol = mask->l3_ok ?
12191                       mlx5_flow_locate_proto_l3(&item, end_item) : 0;
12192         flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
12193                                        l3_protocol == RTE_ETHER_TYPE_IPV4);
12194         flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
12195 }
12196
12197 /**
12198  * Prepares DV flow counter with aging configuration.
12199  * Gets it by index when exists, creates a new one when doesn't.
12200  *
12201  * @param[in] dev
12202  *   Pointer to rte_eth_dev structure.
12203  * @param[in] dev_flow
12204  *   Pointer to the mlx5_flow.
12205  * @param[in, out] flow
12206  *   Pointer to the sub flow.
12207  * @param[in] count
12208  *   Pointer to the counter action configuration.
12209  * @param[in] age
12210  *   Pointer to the aging action configuration.
12211  * @param[out] error
12212  *   Pointer to the error structure.
12213  *
12214  * @return
12215  *   Pointer to the counter, NULL otherwise.
12216  */
12217 static struct mlx5_flow_counter *
12218 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12219                         struct mlx5_flow *dev_flow,
12220                         struct rte_flow *flow,
12221                         const struct rte_flow_action_count *count,
12222                         const struct rte_flow_action_age *age,
12223                         struct rte_flow_error *error)
12224 {
12225         if (!flow->counter) {
12226                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12227                                                                  count, age);
12228                 if (!flow->counter) {
12229                         rte_flow_error_set(error, rte_errno,
12230                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12231                                            "cannot create counter object.");
12232                         return NULL;
12233                 }
12234         }
12235         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12236 }
12237
12238 /*
12239  * Release an ASO CT action by its own device.
12240  *
12241  * @param[in] dev
12242  *   Pointer to the Ethernet device structure.
12243  * @param[in] idx
12244  *   Index of ASO CT action to release.
12245  *
12246  * @return
12247  *   0 when CT action was removed, otherwise the number of references.
12248  */
12249 static inline int
12250 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12251 {
12252         struct mlx5_priv *priv = dev->data->dev_private;
12253         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12254         uint32_t ret;
12255         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12256         enum mlx5_aso_ct_state state =
12257                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12258
12259         /* Cannot release when CT is in the ASO SQ. */
12260         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12261                 return -1;
12262         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12263         if (!ret) {
12264                 if (ct->dr_action_orig) {
12265 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12266                         claim_zero(mlx5_glue->destroy_flow_action
12267                                         (ct->dr_action_orig));
12268 #endif
12269                         ct->dr_action_orig = NULL;
12270                 }
12271                 if (ct->dr_action_rply) {
12272 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12273                         claim_zero(mlx5_glue->destroy_flow_action
12274                                         (ct->dr_action_rply));
12275 #endif
12276                         ct->dr_action_rply = NULL;
12277                 }
12278                 /* Clear the state to free, no need in 1st allocation. */
12279                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12280                 rte_spinlock_lock(&mng->ct_sl);
12281                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12282                 rte_spinlock_unlock(&mng->ct_sl);
12283         }
12284         return (int)ret;
12285 }
12286
12287 static inline int
12288 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx)
12289 {
12290         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12291         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12292         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12293         RTE_SET_USED(dev);
12294
12295         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12296         if (dev->data->dev_started != 1)
12297                 return -1;
12298         return flow_dv_aso_ct_dev_release(owndev, idx);
12299 }
12300
12301 /*
12302  * Resize the ASO CT pools array by 64 pools.
12303  *
12304  * @param[in] dev
12305  *   Pointer to the Ethernet device structure.
12306  *
12307  * @return
12308  *   0 on success, otherwise negative errno value and rte_errno is set.
12309  */
12310 static int
12311 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12312 {
12313         struct mlx5_priv *priv = dev->data->dev_private;
12314         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12315         void *old_pools = mng->pools;
12316         /* Magic number now, need a macro. */
12317         uint32_t resize = mng->n + 64;
12318         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12319         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12320
12321         if (!pools) {
12322                 rte_errno = ENOMEM;
12323                 return -rte_errno;
12324         }
12325         rte_rwlock_write_lock(&mng->resize_rwl);
12326         /* ASO SQ/QP was already initialized in the startup. */
12327         if (old_pools) {
12328                 /* Realloc could be an alternative choice. */
12329                 rte_memcpy(pools, old_pools,
12330                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12331                 mlx5_free(old_pools);
12332         }
12333         mng->n = resize;
12334         mng->pools = pools;
12335         rte_rwlock_write_unlock(&mng->resize_rwl);
12336         return 0;
12337 }
12338
12339 /*
12340  * Create and initialize a new ASO CT pool.
12341  *
12342  * @param[in] dev
12343  *   Pointer to the Ethernet device structure.
12344  * @param[out] ct_free
12345  *   Where to put the pointer of a new CT action.
12346  *
12347  * @return
12348  *   The CT actions pool pointer and @p ct_free is set on success,
12349  *   NULL otherwise and rte_errno is set.
12350  */
12351 static struct mlx5_aso_ct_pool *
12352 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12353                        struct mlx5_aso_ct_action **ct_free)
12354 {
12355         struct mlx5_priv *priv = dev->data->dev_private;
12356         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12357         struct mlx5_aso_ct_pool *pool = NULL;
12358         struct mlx5_devx_obj *obj = NULL;
12359         uint32_t i;
12360         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12361
12362         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
12363                                                 priv->sh->pdn, log_obj_size);
12364         if (!obj) {
12365                 rte_errno = ENODATA;
12366                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12367                 return NULL;
12368         }
12369         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12370         if (!pool) {
12371                 rte_errno = ENOMEM;
12372                 claim_zero(mlx5_devx_cmd_destroy(obj));
12373                 return NULL;
12374         }
12375         pool->devx_obj = obj;
12376         pool->index = mng->next;
12377         /* Resize pools array if there is no room for the new pool in it. */
12378         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12379                 claim_zero(mlx5_devx_cmd_destroy(obj));
12380                 mlx5_free(pool);
12381                 return NULL;
12382         }
12383         mng->pools[pool->index] = pool;
12384         mng->next++;
12385         /* Assign the first action in the new pool, the rest go to free list. */
12386         *ct_free = &pool->actions[0];
12387         /* Lock outside, the list operation is safe here. */
12388         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12389                 /* refcnt is 0 when allocating the memory. */
12390                 pool->actions[i].offset = i;
12391                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12392         }
12393         return pool;
12394 }
12395
12396 /*
12397  * Allocate a ASO CT action from free list.
12398  *
12399  * @param[in] dev
12400  *   Pointer to the Ethernet device structure.
12401  * @param[out] error
12402  *   Pointer to the error structure.
12403  *
12404  * @return
12405  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12406  */
12407 static uint32_t
12408 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12409 {
12410         struct mlx5_priv *priv = dev->data->dev_private;
12411         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12412         struct mlx5_aso_ct_action *ct = NULL;
12413         struct mlx5_aso_ct_pool *pool;
12414         uint8_t reg_c;
12415         uint32_t ct_idx;
12416
12417         MLX5_ASSERT(mng);
12418         if (!priv->config.devx) {
12419                 rte_errno = ENOTSUP;
12420                 return 0;
12421         }
12422         /* Get a free CT action, if no, a new pool will be created. */
12423         rte_spinlock_lock(&mng->ct_sl);
12424         ct = LIST_FIRST(&mng->free_cts);
12425         if (ct) {
12426                 LIST_REMOVE(ct, next);
12427         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12428                 rte_spinlock_unlock(&mng->ct_sl);
12429                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12430                                    NULL, "failed to create ASO CT pool");
12431                 return 0;
12432         }
12433         rte_spinlock_unlock(&mng->ct_sl);
12434         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12435         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12436         /* 0: inactive, 1: created, 2+: used by flows. */
12437         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12438         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12439         if (!ct->dr_action_orig) {
12440 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12441                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12442                         (priv->sh->rx_domain, pool->devx_obj->obj,
12443                          ct->offset,
12444                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12445                          reg_c - REG_C_0);
12446 #else
12447                 RTE_SET_USED(reg_c);
12448 #endif
12449                 if (!ct->dr_action_orig) {
12450                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12451                         rte_flow_error_set(error, rte_errno,
12452                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12453                                            "failed to create ASO CT action");
12454                         return 0;
12455                 }
12456         }
12457         if (!ct->dr_action_rply) {
12458 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12459                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12460                         (priv->sh->rx_domain, pool->devx_obj->obj,
12461                          ct->offset,
12462                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12463                          reg_c - REG_C_0);
12464 #endif
12465                 if (!ct->dr_action_rply) {
12466                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12467                         rte_flow_error_set(error, rte_errno,
12468                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12469                                            "failed to create ASO CT action");
12470                         return 0;
12471                 }
12472         }
12473         return ct_idx;
12474 }
12475
12476 /*
12477  * Create a conntrack object with context and actions by using ASO mechanism.
12478  *
12479  * @param[in] dev
12480  *   Pointer to rte_eth_dev structure.
12481  * @param[in] pro
12482  *   Pointer to conntrack information profile.
12483  * @param[out] error
12484  *   Pointer to the error structure.
12485  *
12486  * @return
12487  *   Index to conntrack object on success, 0 otherwise.
12488  */
12489 static uint32_t
12490 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12491                                    const struct rte_flow_action_conntrack *pro,
12492                                    struct rte_flow_error *error)
12493 {
12494         struct mlx5_priv *priv = dev->data->dev_private;
12495         struct mlx5_dev_ctx_shared *sh = priv->sh;
12496         struct mlx5_aso_ct_action *ct;
12497         uint32_t idx;
12498
12499         if (!sh->ct_aso_en)
12500                 return rte_flow_error_set(error, ENOTSUP,
12501                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12502                                           "Connection is not supported");
12503         idx = flow_dv_aso_ct_alloc(dev, error);
12504         if (!idx)
12505                 return rte_flow_error_set(error, rte_errno,
12506                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12507                                           "Failed to allocate CT object");
12508         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12509         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12510                 return rte_flow_error_set(error, EBUSY,
12511                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12512                                           "Failed to update CT");
12513         ct->is_original = !!pro->is_original_dir;
12514         ct->peer = pro->peer_port;
12515         return idx;
12516 }
12517
12518 /**
12519  * Fill the flow with DV spec, lock free
12520  * (mutex should be acquired by caller).
12521  *
12522  * @param[in] dev
12523  *   Pointer to rte_eth_dev structure.
12524  * @param[in, out] dev_flow
12525  *   Pointer to the sub flow.
12526  * @param[in] attr
12527  *   Pointer to the flow attributes.
12528  * @param[in] items
12529  *   Pointer to the list of items.
12530  * @param[in] actions
12531  *   Pointer to the list of actions.
12532  * @param[out] error
12533  *   Pointer to the error structure.
12534  *
12535  * @return
12536  *   0 on success, a negative errno value otherwise and rte_errno is set.
12537  */
12538 static int
12539 flow_dv_translate(struct rte_eth_dev *dev,
12540                   struct mlx5_flow *dev_flow,
12541                   const struct rte_flow_attr *attr,
12542                   const struct rte_flow_item items[],
12543                   const struct rte_flow_action actions[],
12544                   struct rte_flow_error *error)
12545 {
12546         struct mlx5_priv *priv = dev->data->dev_private;
12547         struct mlx5_dev_config *dev_conf = &priv->config;
12548         struct rte_flow *flow = dev_flow->flow;
12549         struct mlx5_flow_handle *handle = dev_flow->handle;
12550         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12551         struct mlx5_flow_rss_desc *rss_desc;
12552         uint64_t item_flags = 0;
12553         uint64_t last_item = 0;
12554         uint64_t action_flags = 0;
12555         struct mlx5_flow_dv_matcher matcher = {
12556                 .mask = {
12557                         .size = sizeof(matcher.mask.buf),
12558                 },
12559         };
12560         int actions_n = 0;
12561         bool actions_end = false;
12562         union {
12563                 struct mlx5_flow_dv_modify_hdr_resource res;
12564                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12565                             sizeof(struct mlx5_modification_cmd) *
12566                             (MLX5_MAX_MODIFY_NUM + 1)];
12567         } mhdr_dummy;
12568         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12569         const struct rte_flow_action_count *count = NULL;
12570         const struct rte_flow_action_age *non_shared_age = NULL;
12571         union flow_dv_attr flow_attr = { .attr = 0 };
12572         uint32_t tag_be;
12573         union mlx5_flow_tbl_key tbl_key;
12574         uint32_t modify_action_position = UINT32_MAX;
12575         void *match_mask = matcher.mask.buf;
12576         void *match_value = dev_flow->dv.value.buf;
12577         uint8_t next_protocol = 0xff;
12578         struct rte_vlan_hdr vlan = { 0 };
12579         struct mlx5_flow_dv_dest_array_resource mdest_res;
12580         struct mlx5_flow_dv_sample_resource sample_res;
12581         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12582         const struct rte_flow_action_sample *sample = NULL;
12583         struct mlx5_flow_sub_actions_list *sample_act;
12584         uint32_t sample_act_pos = UINT32_MAX;
12585         uint32_t age_act_pos = UINT32_MAX;
12586         uint32_t num_of_dest = 0;
12587         int tmp_actions_n = 0;
12588         uint32_t table;
12589         int ret = 0;
12590         const struct mlx5_flow_tunnel *tunnel = NULL;
12591         struct flow_grp_info grp_info = {
12592                 .external = !!dev_flow->external,
12593                 .transfer = !!attr->transfer,
12594                 .fdb_def_rule = !!priv->fdb_def_rule,
12595                 .skip_scale = dev_flow->skip_scale &
12596                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12597                 .std_tbl_fix = true,
12598         };
12599         const struct rte_flow_item *head_item = items;
12600
12601         if (!wks)
12602                 return rte_flow_error_set(error, ENOMEM,
12603                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12604                                           NULL,
12605                                           "failed to push flow workspace");
12606         rss_desc = &wks->rss_desc;
12607         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12608         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12609         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12610                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12611         /* update normal path action resource into last index of array */
12612         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12613         if (is_tunnel_offload_active(dev)) {
12614                 if (dev_flow->tunnel) {
12615                         RTE_VERIFY(dev_flow->tof_type ==
12616                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12617                         tunnel = dev_flow->tunnel;
12618                 } else {
12619                         tunnel = mlx5_get_tof(items, actions,
12620                                               &dev_flow->tof_type);
12621                         dev_flow->tunnel = tunnel;
12622                 }
12623                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12624                                         (dev, attr, tunnel, dev_flow->tof_type);
12625         }
12626         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12627                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12628         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12629                                        &grp_info, error);
12630         if (ret)
12631                 return ret;
12632         dev_flow->dv.group = table;
12633         if (attr->transfer)
12634                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12635         /* number of actions must be set to 0 in case of dirty stack. */
12636         mhdr_res->actions_num = 0;
12637         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12638                 /*
12639                  * do not add decap action if match rule drops packet
12640                  * HW rejects rules with decap & drop
12641                  *
12642                  * if tunnel match rule was inserted before matching tunnel set
12643                  * rule flow table used in the match rule must be registered.
12644                  * current implementation handles that in the
12645                  * flow_dv_match_register() at the function end.
12646                  */
12647                 bool add_decap = true;
12648                 const struct rte_flow_action *ptr = actions;
12649
12650                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12651                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12652                                 add_decap = false;
12653                                 break;
12654                         }
12655                 }
12656                 if (add_decap) {
12657                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12658                                                            attr->transfer,
12659                                                            error))
12660                                 return -rte_errno;
12661                         dev_flow->dv.actions[actions_n++] =
12662                                         dev_flow->dv.encap_decap->action;
12663                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12664                 }
12665         }
12666         for (; !actions_end ; actions++) {
12667                 const struct rte_flow_action_queue *queue;
12668                 const struct rte_flow_action_rss *rss;
12669                 const struct rte_flow_action *action = actions;
12670                 const uint8_t *rss_key;
12671                 struct mlx5_flow_tbl_resource *tbl;
12672                 struct mlx5_aso_age_action *age_act;
12673                 struct mlx5_flow_counter *cnt_act;
12674                 uint32_t port_id = 0;
12675                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12676                 int action_type = actions->type;
12677                 const struct rte_flow_action *found_action = NULL;
12678                 uint32_t jump_group = 0;
12679                 uint32_t owner_idx;
12680                 struct mlx5_aso_ct_action *ct;
12681
12682                 if (!mlx5_flow_os_action_supported(action_type))
12683                         return rte_flow_error_set(error, ENOTSUP,
12684                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12685                                                   actions,
12686                                                   "action not supported");
12687                 switch (action_type) {
12688                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12689                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12690                         break;
12691                 case RTE_FLOW_ACTION_TYPE_VOID:
12692                         break;
12693                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12694                         if (flow_dv_translate_action_port_id(dev, action,
12695                                                              &port_id, error))
12696                                 return -rte_errno;
12697                         port_id_resource.port_id = port_id;
12698                         MLX5_ASSERT(!handle->rix_port_id_action);
12699                         if (flow_dv_port_id_action_resource_register
12700                             (dev, &port_id_resource, dev_flow, error))
12701                                 return -rte_errno;
12702                         dev_flow->dv.actions[actions_n++] =
12703                                         dev_flow->dv.port_id_action->action;
12704                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12705                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12706                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12707                         num_of_dest++;
12708                         break;
12709                 case RTE_FLOW_ACTION_TYPE_FLAG:
12710                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12711                         dev_flow->handle->mark = 1;
12712                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12713                                 struct rte_flow_action_mark mark = {
12714                                         .id = MLX5_FLOW_MARK_DEFAULT,
12715                                 };
12716
12717                                 if (flow_dv_convert_action_mark(dev, &mark,
12718                                                                 mhdr_res,
12719                                                                 error))
12720                                         return -rte_errno;
12721                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12722                                 break;
12723                         }
12724                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12725                         /*
12726                          * Only one FLAG or MARK is supported per device flow
12727                          * right now. So the pointer to the tag resource must be
12728                          * zero before the register process.
12729                          */
12730                         MLX5_ASSERT(!handle->dvh.rix_tag);
12731                         if (flow_dv_tag_resource_register(dev, tag_be,
12732                                                           dev_flow, error))
12733                                 return -rte_errno;
12734                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12735                         dev_flow->dv.actions[actions_n++] =
12736                                         dev_flow->dv.tag_resource->action;
12737                         break;
12738                 case RTE_FLOW_ACTION_TYPE_MARK:
12739                         action_flags |= MLX5_FLOW_ACTION_MARK;
12740                         dev_flow->handle->mark = 1;
12741                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12742                                 const struct rte_flow_action_mark *mark =
12743                                         (const struct rte_flow_action_mark *)
12744                                                 actions->conf;
12745
12746                                 if (flow_dv_convert_action_mark(dev, mark,
12747                                                                 mhdr_res,
12748                                                                 error))
12749                                         return -rte_errno;
12750                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12751                                 break;
12752                         }
12753                         /* Fall-through */
12754                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12755                         /* Legacy (non-extensive) MARK action. */
12756                         tag_be = mlx5_flow_mark_set
12757                               (((const struct rte_flow_action_mark *)
12758                                (actions->conf))->id);
12759                         MLX5_ASSERT(!handle->dvh.rix_tag);
12760                         if (flow_dv_tag_resource_register(dev, tag_be,
12761                                                           dev_flow, error))
12762                                 return -rte_errno;
12763                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12764                         dev_flow->dv.actions[actions_n++] =
12765                                         dev_flow->dv.tag_resource->action;
12766                         break;
12767                 case RTE_FLOW_ACTION_TYPE_SET_META:
12768                         if (flow_dv_convert_action_set_meta
12769                                 (dev, mhdr_res, attr,
12770                                  (const struct rte_flow_action_set_meta *)
12771                                   actions->conf, error))
12772                                 return -rte_errno;
12773                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12774                         break;
12775                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12776                         if (flow_dv_convert_action_set_tag
12777                                 (dev, mhdr_res,
12778                                  (const struct rte_flow_action_set_tag *)
12779                                   actions->conf, error))
12780                                 return -rte_errno;
12781                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12782                         break;
12783                 case RTE_FLOW_ACTION_TYPE_DROP:
12784                         action_flags |= MLX5_FLOW_ACTION_DROP;
12785                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12786                         break;
12787                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12788                         queue = actions->conf;
12789                         rss_desc->queue_num = 1;
12790                         rss_desc->queue[0] = queue->index;
12791                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12792                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12793                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12794                         num_of_dest++;
12795                         break;
12796                 case RTE_FLOW_ACTION_TYPE_RSS:
12797                         rss = actions->conf;
12798                         memcpy(rss_desc->queue, rss->queue,
12799                                rss->queue_num * sizeof(uint16_t));
12800                         rss_desc->queue_num = rss->queue_num;
12801                         /* NULL RSS key indicates default RSS key. */
12802                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12803                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12804                         /*
12805                          * rss->level and rss.types should be set in advance
12806                          * when expanding items for RSS.
12807                          */
12808                         action_flags |= MLX5_FLOW_ACTION_RSS;
12809                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12810                                 MLX5_FLOW_FATE_SHARED_RSS :
12811                                 MLX5_FLOW_FATE_QUEUE;
12812                         break;
12813                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12814                         flow->age = (uint32_t)(uintptr_t)(action->conf);
12815                         age_act = flow_aso_age_get_by_idx(dev, flow->age);
12816                         __atomic_fetch_add(&age_act->refcnt, 1,
12817                                            __ATOMIC_RELAXED);
12818                         age_act_pos = actions_n++;
12819                         action_flags |= MLX5_FLOW_ACTION_AGE;
12820                         break;
12821                 case RTE_FLOW_ACTION_TYPE_AGE:
12822                         non_shared_age = action->conf;
12823                         age_act_pos = actions_n++;
12824                         action_flags |= MLX5_FLOW_ACTION_AGE;
12825                         break;
12826                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12827                         cnt_act = flow_dv_counter_get_by_idx(dev,
12828                                         (uint32_t)(uintptr_t)action->conf,
12829                                         NULL);
12830                         MLX5_ASSERT(cnt_act != NULL);
12831                         /**
12832                          * When creating meter drop flow in drop table, the
12833                          * counter should not overwrite the rte flow counter.
12834                          */
12835                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12836                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12837                                 dev_flow->dv.actions[actions_n++] =
12838                                                         cnt_act->action;
12839                         } else {
12840                                 flow->counter =
12841                                         (uint32_t)(uintptr_t)(action->conf);
12842                                 __atomic_fetch_add(&cnt_act->shared_info.refcnt,
12843                                                 1, __ATOMIC_RELAXED);
12844                                 /* Save information first, will apply later. */
12845                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
12846                         }
12847                         break;
12848                 case RTE_FLOW_ACTION_TYPE_COUNT:
12849                         if (!dev_conf->devx) {
12850                                 return rte_flow_error_set
12851                                               (error, ENOTSUP,
12852                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12853                                                NULL,
12854                                                "count action not supported");
12855                         }
12856                         /* Save information first, will apply later. */
12857                         count = action->conf;
12858                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12859                         break;
12860                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12861                         dev_flow->dv.actions[actions_n++] =
12862                                                 priv->sh->pop_vlan_action;
12863                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12864                         break;
12865                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12866                         if (!(action_flags &
12867                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12868                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12869                         vlan.eth_proto = rte_be_to_cpu_16
12870                              ((((const struct rte_flow_action_of_push_vlan *)
12871                                                    actions->conf)->ethertype));
12872                         found_action = mlx5_flow_find_action
12873                                         (actions + 1,
12874                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12875                         if (found_action)
12876                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12877                         found_action = mlx5_flow_find_action
12878                                         (actions + 1,
12879                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12880                         if (found_action)
12881                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12882                         if (flow_dv_create_action_push_vlan
12883                                             (dev, attr, &vlan, dev_flow, error))
12884                                 return -rte_errno;
12885                         dev_flow->dv.actions[actions_n++] =
12886                                         dev_flow->dv.push_vlan_res->action;
12887                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12888                         break;
12889                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12890                         /* of_vlan_push action handled this action */
12891                         MLX5_ASSERT(action_flags &
12892                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12893                         break;
12894                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12895                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12896                                 break;
12897                         flow_dev_get_vlan_info_from_items(items, &vlan);
12898                         mlx5_update_vlan_vid_pcp(actions, &vlan);
12899                         /* If no VLAN push - this is a modify header action */
12900                         if (flow_dv_convert_action_modify_vlan_vid
12901                                                 (mhdr_res, actions, error))
12902                                 return -rte_errno;
12903                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12904                         break;
12905                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12906                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12907                         if (flow_dv_create_action_l2_encap(dev, actions,
12908                                                            dev_flow,
12909                                                            attr->transfer,
12910                                                            error))
12911                                 return -rte_errno;
12912                         dev_flow->dv.actions[actions_n++] =
12913                                         dev_flow->dv.encap_decap->action;
12914                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12915                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12916                                 sample_act->action_flags |=
12917                                                         MLX5_FLOW_ACTION_ENCAP;
12918                         break;
12919                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12920                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12921                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12922                                                            attr->transfer,
12923                                                            error))
12924                                 return -rte_errno;
12925                         dev_flow->dv.actions[actions_n++] =
12926                                         dev_flow->dv.encap_decap->action;
12927                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12928                         break;
12929                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12930                         /* Handle encap with preceding decap. */
12931                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12932                                 if (flow_dv_create_action_raw_encap
12933                                         (dev, actions, dev_flow, attr, error))
12934                                         return -rte_errno;
12935                                 dev_flow->dv.actions[actions_n++] =
12936                                         dev_flow->dv.encap_decap->action;
12937                         } else {
12938                                 /* Handle encap without preceding decap. */
12939                                 if (flow_dv_create_action_l2_encap
12940                                     (dev, actions, dev_flow, attr->transfer,
12941                                      error))
12942                                         return -rte_errno;
12943                                 dev_flow->dv.actions[actions_n++] =
12944                                         dev_flow->dv.encap_decap->action;
12945                         }
12946                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12947                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12948                                 sample_act->action_flags |=
12949                                                         MLX5_FLOW_ACTION_ENCAP;
12950                         break;
12951                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12952                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12953                                 ;
12954                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12955                                 if (flow_dv_create_action_l2_decap
12956                                     (dev, dev_flow, attr->transfer, error))
12957                                         return -rte_errno;
12958                                 dev_flow->dv.actions[actions_n++] =
12959                                         dev_flow->dv.encap_decap->action;
12960                         }
12961                         /* If decap is followed by encap, handle it at encap. */
12962                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12963                         break;
12964                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12965                         dev_flow->dv.actions[actions_n++] =
12966                                 (void *)(uintptr_t)action->conf;
12967                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12968                         break;
12969                 case RTE_FLOW_ACTION_TYPE_JUMP:
12970                         jump_group = ((const struct rte_flow_action_jump *)
12971                                                         action->conf)->group;
12972                         grp_info.std_tbl_fix = 0;
12973                         if (dev_flow->skip_scale &
12974                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12975                                 grp_info.skip_scale = 1;
12976                         else
12977                                 grp_info.skip_scale = 0;
12978                         ret = mlx5_flow_group_to_table(dev, tunnel,
12979                                                        jump_group,
12980                                                        &table,
12981                                                        &grp_info, error);
12982                         if (ret)
12983                                 return ret;
12984                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12985                                                        attr->transfer,
12986                                                        !!dev_flow->external,
12987                                                        tunnel, jump_group, 0,
12988                                                        0, error);
12989                         if (!tbl)
12990                                 return rte_flow_error_set
12991                                                 (error, errno,
12992                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12993                                                  NULL,
12994                                                  "cannot create jump action.");
12995                         if (flow_dv_jump_tbl_resource_register
12996                             (dev, tbl, dev_flow, error)) {
12997                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12998                                 return rte_flow_error_set
12999                                                 (error, errno,
13000                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13001                                                  NULL,
13002                                                  "cannot create jump action.");
13003                         }
13004                         dev_flow->dv.actions[actions_n++] =
13005                                         dev_flow->dv.jump->action;
13006                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13007                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13008                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13009                         num_of_dest++;
13010                         break;
13011                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13012                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13013                         if (flow_dv_convert_action_modify_mac
13014                                         (mhdr_res, actions, error))
13015                                 return -rte_errno;
13016                         action_flags |= actions->type ==
13017                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13018                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
13019                                         MLX5_FLOW_ACTION_SET_MAC_DST;
13020                         break;
13021                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13022                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13023                         if (flow_dv_convert_action_modify_ipv4
13024                                         (mhdr_res, actions, error))
13025                                 return -rte_errno;
13026                         action_flags |= actions->type ==
13027                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13028                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13029                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13030                         break;
13031                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13032                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13033                         if (flow_dv_convert_action_modify_ipv6
13034                                         (mhdr_res, actions, error))
13035                                 return -rte_errno;
13036                         action_flags |= actions->type ==
13037                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13038                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13039                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13040                         break;
13041                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13042                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13043                         if (flow_dv_convert_action_modify_tp
13044                                         (mhdr_res, actions, items,
13045                                          &flow_attr, dev_flow, !!(action_flags &
13046                                          MLX5_FLOW_ACTION_DECAP), error))
13047                                 return -rte_errno;
13048                         action_flags |= actions->type ==
13049                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13050                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13051                                         MLX5_FLOW_ACTION_SET_TP_DST;
13052                         break;
13053                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13054                         if (flow_dv_convert_action_modify_dec_ttl
13055                                         (mhdr_res, items, &flow_attr, dev_flow,
13056                                          !!(action_flags &
13057                                          MLX5_FLOW_ACTION_DECAP), error))
13058                                 return -rte_errno;
13059                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13060                         break;
13061                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13062                         if (flow_dv_convert_action_modify_ttl
13063                                         (mhdr_res, actions, items, &flow_attr,
13064                                          dev_flow, !!(action_flags &
13065                                          MLX5_FLOW_ACTION_DECAP), error))
13066                                 return -rte_errno;
13067                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13068                         break;
13069                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13070                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13071                         if (flow_dv_convert_action_modify_tcp_seq
13072                                         (mhdr_res, actions, error))
13073                                 return -rte_errno;
13074                         action_flags |= actions->type ==
13075                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13076                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13077                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13078                         break;
13079
13080                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13081                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13082                         if (flow_dv_convert_action_modify_tcp_ack
13083                                         (mhdr_res, actions, error))
13084                                 return -rte_errno;
13085                         action_flags |= actions->type ==
13086                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13087                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13088                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13089                         break;
13090                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13091                         if (flow_dv_convert_action_set_reg
13092                                         (mhdr_res, actions, error))
13093                                 return -rte_errno;
13094                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13095                         break;
13096                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13097                         if (flow_dv_convert_action_copy_mreg
13098                                         (dev, mhdr_res, actions, error))
13099                                 return -rte_errno;
13100                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13101                         break;
13102                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13103                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13104                         dev_flow->handle->fate_action =
13105                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13106                         break;
13107                 case RTE_FLOW_ACTION_TYPE_METER:
13108                         if (!wks->fm)
13109                                 return rte_flow_error_set(error, rte_errno,
13110                                         RTE_FLOW_ERROR_TYPE_ACTION,
13111                                         NULL, "Failed to get meter in flow.");
13112                         /* Set the meter action. */
13113                         dev_flow->dv.actions[actions_n++] =
13114                                 wks->fm->meter_action;
13115                         action_flags |= MLX5_FLOW_ACTION_METER;
13116                         break;
13117                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13118                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13119                                                               actions, error))
13120                                 return -rte_errno;
13121                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13122                         break;
13123                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13124                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13125                                                               actions, error))
13126                                 return -rte_errno;
13127                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13128                         break;
13129                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13130                         sample_act_pos = actions_n;
13131                         sample = (const struct rte_flow_action_sample *)
13132                                  action->conf;
13133                         actions_n++;
13134                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13135                         /* put encap action into group if work with port id */
13136                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13137                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13138                                 sample_act->action_flags |=
13139                                                         MLX5_FLOW_ACTION_ENCAP;
13140                         break;
13141                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13142                         if (flow_dv_convert_action_modify_field
13143                                         (dev, mhdr_res, actions, attr, error))
13144                                 return -rte_errno;
13145                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13146                         break;
13147                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13148                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13149                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13150                         if (!ct)
13151                                 return rte_flow_error_set(error, EINVAL,
13152                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13153                                                 NULL,
13154                                                 "Failed to get CT object.");
13155                         if (mlx5_aso_ct_available(priv->sh, ct))
13156                                 return rte_flow_error_set(error, rte_errno,
13157                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13158                                                 NULL,
13159                                                 "CT is unavailable.");
13160                         if (ct->is_original)
13161                                 dev_flow->dv.actions[actions_n] =
13162                                                         ct->dr_action_orig;
13163                         else
13164                                 dev_flow->dv.actions[actions_n] =
13165                                                         ct->dr_action_rply;
13166                         flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;
13167                         flow->ct = owner_idx;
13168                         __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);
13169                         actions_n++;
13170                         action_flags |= MLX5_FLOW_ACTION_CT;
13171                         break;
13172                 case RTE_FLOW_ACTION_TYPE_END:
13173                         actions_end = true;
13174                         if (mhdr_res->actions_num) {
13175                                 /* create modify action if needed. */
13176                                 if (flow_dv_modify_hdr_resource_register
13177                                         (dev, mhdr_res, dev_flow, error))
13178                                         return -rte_errno;
13179                                 dev_flow->dv.actions[modify_action_position] =
13180                                         handle->dvh.modify_hdr->action;
13181                         }
13182                         /*
13183                          * Handle AGE and COUNT action by single HW counter
13184                          * when they are not shared.
13185                          */
13186                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13187                                 if ((non_shared_age &&
13188                                      count && !count->shared) ||
13189                                     !(priv->sh->flow_hit_aso_en &&
13190                                       (attr->group || attr->transfer))) {
13191                                         /* Creates age by counters. */
13192                                         cnt_act = flow_dv_prepare_counter
13193                                                                 (dev, dev_flow,
13194                                                                  flow, count,
13195                                                                  non_shared_age,
13196                                                                  error);
13197                                         if (!cnt_act)
13198                                                 return -rte_errno;
13199                                         dev_flow->dv.actions[age_act_pos] =
13200                                                                 cnt_act->action;
13201                                         break;
13202                                 }
13203                                 if (!flow->age && non_shared_age) {
13204                                         flow->age = flow_dv_aso_age_alloc
13205                                                                 (dev, error);
13206                                         if (!flow->age)
13207                                                 return -rte_errno;
13208                                         flow_dv_aso_age_params_init
13209                                                     (dev, flow->age,
13210                                                      non_shared_age->context ?
13211                                                      non_shared_age->context :
13212                                                      (void *)(uintptr_t)
13213                                                      (dev_flow->flow_idx),
13214                                                      non_shared_age->timeout);
13215                                 }
13216                                 age_act = flow_aso_age_get_by_idx(dev,
13217                                                                   flow->age);
13218                                 dev_flow->dv.actions[age_act_pos] =
13219                                                              age_act->dr_action;
13220                         }
13221                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13222                                 /*
13223                                  * Create one count action, to be used
13224                                  * by all sub-flows.
13225                                  */
13226                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13227                                                                   flow, count,
13228                                                                   NULL, error);
13229                                 if (!cnt_act)
13230                                         return -rte_errno;
13231                                 dev_flow->dv.actions[actions_n++] =
13232                                                                 cnt_act->action;
13233                         }
13234                 default:
13235                         break;
13236                 }
13237                 if (mhdr_res->actions_num &&
13238                     modify_action_position == UINT32_MAX)
13239                         modify_action_position = actions_n++;
13240         }
13241         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13242                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13243                 int item_type = items->type;
13244
13245                 if (!mlx5_flow_os_item_supported(item_type))
13246                         return rte_flow_error_set(error, ENOTSUP,
13247                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13248                                                   NULL, "item not supported");
13249                 switch (item_type) {
13250                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13251                         flow_dv_translate_item_port_id
13252                                 (dev, match_mask, match_value, items, attr);
13253                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13254                         break;
13255                 case RTE_FLOW_ITEM_TYPE_ETH:
13256                         flow_dv_translate_item_eth(match_mask, match_value,
13257                                                    items, tunnel,
13258                                                    dev_flow->dv.group);
13259                         matcher.priority = action_flags &
13260                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13261                                         !dev_flow->external ?
13262                                         MLX5_PRIORITY_MAP_L3 :
13263                                         MLX5_PRIORITY_MAP_L2;
13264                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13265                                              MLX5_FLOW_LAYER_OUTER_L2;
13266                         break;
13267                 case RTE_FLOW_ITEM_TYPE_VLAN:
13268                         flow_dv_translate_item_vlan(dev_flow,
13269                                                     match_mask, match_value,
13270                                                     items, tunnel,
13271                                                     dev_flow->dv.group);
13272                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13273                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13274                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13275                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13276                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13277                         break;
13278                 case RTE_FLOW_ITEM_TYPE_IPV4:
13279                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13280                                                   &item_flags, &tunnel);
13281                         flow_dv_translate_item_ipv4(match_mask, match_value,
13282                                                     items, tunnel,
13283                                                     dev_flow->dv.group);
13284                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13285                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13286                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13287                         if (items->mask != NULL &&
13288                             ((const struct rte_flow_item_ipv4 *)
13289                              items->mask)->hdr.next_proto_id) {
13290                                 next_protocol =
13291                                         ((const struct rte_flow_item_ipv4 *)
13292                                          (items->spec))->hdr.next_proto_id;
13293                                 next_protocol &=
13294                                         ((const struct rte_flow_item_ipv4 *)
13295                                          (items->mask))->hdr.next_proto_id;
13296                         } else {
13297                                 /* Reset for inner layer. */
13298                                 next_protocol = 0xff;
13299                         }
13300                         break;
13301                 case RTE_FLOW_ITEM_TYPE_IPV6:
13302                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13303                                                   &item_flags, &tunnel);
13304                         flow_dv_translate_item_ipv6(match_mask, match_value,
13305                                                     items, tunnel,
13306                                                     dev_flow->dv.group);
13307                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13308                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13309                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13310                         if (items->mask != NULL &&
13311                             ((const struct rte_flow_item_ipv6 *)
13312                              items->mask)->hdr.proto) {
13313                                 next_protocol =
13314                                         ((const struct rte_flow_item_ipv6 *)
13315                                          items->spec)->hdr.proto;
13316                                 next_protocol &=
13317                                         ((const struct rte_flow_item_ipv6 *)
13318                                          items->mask)->hdr.proto;
13319                         } else {
13320                                 /* Reset for inner layer. */
13321                                 next_protocol = 0xff;
13322                         }
13323                         break;
13324                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13325                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13326                                                              match_value,
13327                                                              items, tunnel);
13328                         last_item = tunnel ?
13329                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13330                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13331                         if (items->mask != NULL &&
13332                             ((const struct rte_flow_item_ipv6_frag_ext *)
13333                              items->mask)->hdr.next_header) {
13334                                 next_protocol =
13335                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13336                                  items->spec)->hdr.next_header;
13337                                 next_protocol &=
13338                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13339                                  items->mask)->hdr.next_header;
13340                         } else {
13341                                 /* Reset for inner layer. */
13342                                 next_protocol = 0xff;
13343                         }
13344                         break;
13345                 case RTE_FLOW_ITEM_TYPE_TCP:
13346                         flow_dv_translate_item_tcp(match_mask, match_value,
13347                                                    items, tunnel);
13348                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13349                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13350                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13351                         break;
13352                 case RTE_FLOW_ITEM_TYPE_UDP:
13353                         flow_dv_translate_item_udp(match_mask, match_value,
13354                                                    items, tunnel);
13355                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13356                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13357                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13358                         break;
13359                 case RTE_FLOW_ITEM_TYPE_GRE:
13360                         flow_dv_translate_item_gre(match_mask, match_value,
13361                                                    items, tunnel);
13362                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13363                         last_item = MLX5_FLOW_LAYER_GRE;
13364                         break;
13365                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13366                         flow_dv_translate_item_gre_key(match_mask,
13367                                                        match_value, items);
13368                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13369                         break;
13370                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13371                         flow_dv_translate_item_nvgre(match_mask, match_value,
13372                                                      items, tunnel);
13373                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13374                         last_item = MLX5_FLOW_LAYER_GRE;
13375                         break;
13376                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13377                         flow_dv_translate_item_vxlan(dev, attr,
13378                                                      match_mask, match_value,
13379                                                      items, tunnel);
13380                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13381                         last_item = MLX5_FLOW_LAYER_VXLAN;
13382                         break;
13383                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13384                         flow_dv_translate_item_vxlan_gpe(match_mask,
13385                                                          match_value, items,
13386                                                          tunnel);
13387                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13388                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13389                         break;
13390                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13391                         flow_dv_translate_item_geneve(match_mask, match_value,
13392                                                       items, tunnel);
13393                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13394                         last_item = MLX5_FLOW_LAYER_GENEVE;
13395                         break;
13396                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13397                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13398                                                           match_value,
13399                                                           items, error);
13400                         if (ret)
13401                                 return rte_flow_error_set(error, -ret,
13402                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13403                                         "cannot create GENEVE TLV option");
13404                         flow->geneve_tlv_option = 1;
13405                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13406                         break;
13407                 case RTE_FLOW_ITEM_TYPE_MPLS:
13408                         flow_dv_translate_item_mpls(match_mask, match_value,
13409                                                     items, last_item, tunnel);
13410                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13411                         last_item = MLX5_FLOW_LAYER_MPLS;
13412                         break;
13413                 case RTE_FLOW_ITEM_TYPE_MARK:
13414                         flow_dv_translate_item_mark(dev, match_mask,
13415                                                     match_value, items);
13416                         last_item = MLX5_FLOW_ITEM_MARK;
13417                         break;
13418                 case RTE_FLOW_ITEM_TYPE_META:
13419                         flow_dv_translate_item_meta(dev, match_mask,
13420                                                     match_value, attr, items);
13421                         last_item = MLX5_FLOW_ITEM_METADATA;
13422                         break;
13423                 case RTE_FLOW_ITEM_TYPE_ICMP:
13424                         flow_dv_translate_item_icmp(match_mask, match_value,
13425                                                     items, tunnel);
13426                         last_item = MLX5_FLOW_LAYER_ICMP;
13427                         break;
13428                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13429                         flow_dv_translate_item_icmp6(match_mask, match_value,
13430                                                       items, tunnel);
13431                         last_item = MLX5_FLOW_LAYER_ICMP6;
13432                         break;
13433                 case RTE_FLOW_ITEM_TYPE_TAG:
13434                         flow_dv_translate_item_tag(dev, match_mask,
13435                                                    match_value, items);
13436                         last_item = MLX5_FLOW_ITEM_TAG;
13437                         break;
13438                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13439                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13440                                                         match_value, items);
13441                         last_item = MLX5_FLOW_ITEM_TAG;
13442                         break;
13443                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13444                         flow_dv_translate_item_tx_queue(dev, match_mask,
13445                                                         match_value,
13446                                                         items);
13447                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13448                         break;
13449                 case RTE_FLOW_ITEM_TYPE_GTP:
13450                         flow_dv_translate_item_gtp(match_mask, match_value,
13451                                                    items, tunnel);
13452                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13453                         last_item = MLX5_FLOW_LAYER_GTP;
13454                         break;
13455                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13456                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13457                                                           match_value,
13458                                                           items);
13459                         if (ret)
13460                                 return rte_flow_error_set(error, -ret,
13461                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13462                                         "cannot create GTP PSC item");
13463                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13464                         break;
13465                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13466                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13467                                 /* Create it only the first time to be used. */
13468                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13469                                 if (ret)
13470                                         return rte_flow_error_set
13471                                                 (error, -ret,
13472                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13473                                                 NULL,
13474                                                 "cannot create eCPRI parser");
13475                         }
13476                         flow_dv_translate_item_ecpri(dev, match_mask,
13477                                                      match_value, items);
13478                         /* No other protocol should follow eCPRI layer. */
13479                         last_item = MLX5_FLOW_LAYER_ECPRI;
13480                         break;
13481                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13482                         flow_dv_translate_item_integrity(match_mask,
13483                                                          match_value,
13484                                                          head_item, items);
13485                         break;
13486                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13487                         flow_dv_translate_item_aso_ct(dev, match_mask,
13488                                                       match_value, items);
13489                         break;
13490                 default:
13491                         break;
13492                 }
13493                 item_flags |= last_item;
13494         }
13495         /*
13496          * When E-Switch mode is enabled, we have two cases where we need to
13497          * set the source port manually.
13498          * The first one, is in case of Nic steering rule, and the second is
13499          * E-Switch rule where no port_id item was found. In both cases
13500          * the source port is set according the current port in use.
13501          */
13502         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13503             (priv->representor || priv->master)) {
13504                 if (flow_dv_translate_item_port_id(dev, match_mask,
13505                                                    match_value, NULL, attr))
13506                         return -rte_errno;
13507         }
13508 #ifdef RTE_LIBRTE_MLX5_DEBUG
13509         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13510                                               dev_flow->dv.value.buf));
13511 #endif
13512         /*
13513          * Layers may be already initialized from prefix flow if this dev_flow
13514          * is the suffix flow.
13515          */
13516         handle->layers |= item_flags;
13517         if (action_flags & MLX5_FLOW_ACTION_RSS)
13518                 flow_dv_hashfields_set(dev_flow, rss_desc);
13519         /* If has RSS action in the sample action, the Sample/Mirror resource
13520          * should be registered after the hash filed be update.
13521          */
13522         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13523                 ret = flow_dv_translate_action_sample(dev,
13524                                                       sample,
13525                                                       dev_flow, attr,
13526                                                       &num_of_dest,
13527                                                       sample_actions,
13528                                                       &sample_res,
13529                                                       error);
13530                 if (ret < 0)
13531                         return ret;
13532                 ret = flow_dv_create_action_sample(dev,
13533                                                    dev_flow,
13534                                                    num_of_dest,
13535                                                    &sample_res,
13536                                                    &mdest_res,
13537                                                    sample_actions,
13538                                                    action_flags,
13539                                                    error);
13540                 if (ret < 0)
13541                         return rte_flow_error_set
13542                                                 (error, rte_errno,
13543                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13544                                                 NULL,
13545                                                 "cannot create sample action");
13546                 if (num_of_dest > 1) {
13547                         dev_flow->dv.actions[sample_act_pos] =
13548                         dev_flow->dv.dest_array_res->action;
13549                 } else {
13550                         dev_flow->dv.actions[sample_act_pos] =
13551                         dev_flow->dv.sample_res->verbs_action;
13552                 }
13553         }
13554         /*
13555          * For multiple destination (sample action with ratio=1), the encap
13556          * action and port id action will be combined into group action.
13557          * So need remove the original these actions in the flow and only
13558          * use the sample action instead of.
13559          */
13560         if (num_of_dest > 1 &&
13561             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13562                 int i;
13563                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13564
13565                 for (i = 0; i < actions_n; i++) {
13566                         if ((sample_act->dr_encap_action &&
13567                                 sample_act->dr_encap_action ==
13568                                 dev_flow->dv.actions[i]) ||
13569                                 (sample_act->dr_port_id_action &&
13570                                 sample_act->dr_port_id_action ==
13571                                 dev_flow->dv.actions[i]) ||
13572                                 (sample_act->dr_jump_action &&
13573                                 sample_act->dr_jump_action ==
13574                                 dev_flow->dv.actions[i]))
13575                                 continue;
13576                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13577                 }
13578                 memcpy((void *)dev_flow->dv.actions,
13579                                 (void *)temp_actions,
13580                                 tmp_actions_n * sizeof(void *));
13581                 actions_n = tmp_actions_n;
13582         }
13583         dev_flow->dv.actions_n = actions_n;
13584         dev_flow->act_flags = action_flags;
13585         if (wks->skip_matcher_reg)
13586                 return 0;
13587         /* Register matcher. */
13588         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13589                                     matcher.mask.size);
13590         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13591                                         matcher.priority);
13592         /**
13593          * When creating meter drop flow in drop table, using original
13594          * 5-tuple match, the matcher priority should be lower than
13595          * mtr_id matcher.
13596          */
13597         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13598             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13599             matcher.priority <= MLX5_REG_BITS)
13600                 matcher.priority += MLX5_REG_BITS;
13601         /* reserved field no needs to be set to 0 here. */
13602         tbl_key.is_fdb = attr->transfer;
13603         tbl_key.is_egress = attr->egress;
13604         tbl_key.level = dev_flow->dv.group;
13605         tbl_key.id = dev_flow->dv.table_id;
13606         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13607                                      tunnel, attr->group, error))
13608                 return -rte_errno;
13609         return 0;
13610 }
13611
13612 /**
13613  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13614  * and tunnel.
13615  *
13616  * @param[in, out] action
13617  *   Shred RSS action holding hash RX queue objects.
13618  * @param[in] hash_fields
13619  *   Defines combination of packet fields to participate in RX hash.
13620  * @param[in] tunnel
13621  *   Tunnel type
13622  * @param[in] hrxq_idx
13623  *   Hash RX queue index to set.
13624  *
13625  * @return
13626  *   0 on success, otherwise negative errno value.
13627  */
13628 static int
13629 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13630                               const uint64_t hash_fields,
13631                               uint32_t hrxq_idx)
13632 {
13633         uint32_t *hrxqs = action->hrxq;
13634
13635         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13636         case MLX5_RSS_HASH_IPV4:
13637                 /* fall-through. */
13638         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13639                 /* fall-through. */
13640         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13641                 hrxqs[0] = hrxq_idx;
13642                 return 0;
13643         case MLX5_RSS_HASH_IPV4_TCP:
13644                 /* fall-through. */
13645         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13646                 /* fall-through. */
13647         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13648                 hrxqs[1] = hrxq_idx;
13649                 return 0;
13650         case MLX5_RSS_HASH_IPV4_UDP:
13651                 /* fall-through. */
13652         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13653                 /* fall-through. */
13654         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13655                 hrxqs[2] = hrxq_idx;
13656                 return 0;
13657         case MLX5_RSS_HASH_IPV6:
13658                 /* fall-through. */
13659         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13660                 /* fall-through. */
13661         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13662                 hrxqs[3] = hrxq_idx;
13663                 return 0;
13664         case MLX5_RSS_HASH_IPV6_TCP:
13665                 /* fall-through. */
13666         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13667                 /* fall-through. */
13668         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13669                 hrxqs[4] = hrxq_idx;
13670                 return 0;
13671         case MLX5_RSS_HASH_IPV6_UDP:
13672                 /* fall-through. */
13673         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13674                 /* fall-through. */
13675         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13676                 hrxqs[5] = hrxq_idx;
13677                 return 0;
13678         case MLX5_RSS_HASH_NONE:
13679                 hrxqs[6] = hrxq_idx;
13680                 return 0;
13681         default:
13682                 return -1;
13683         }
13684 }
13685
13686 /**
13687  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13688  * and tunnel.
13689  *
13690  * @param[in] dev
13691  *   Pointer to the Ethernet device structure.
13692  * @param[in] idx
13693  *   Shared RSS action ID holding hash RX queue objects.
13694  * @param[in] hash_fields
13695  *   Defines combination of packet fields to participate in RX hash.
13696  * @param[in] tunnel
13697  *   Tunnel type
13698  *
13699  * @return
13700  *   Valid hash RX queue index, otherwise 0.
13701  */
13702 static uint32_t
13703 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13704                                  const uint64_t hash_fields)
13705 {
13706         struct mlx5_priv *priv = dev->data->dev_private;
13707         struct mlx5_shared_action_rss *shared_rss =
13708             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13709         const uint32_t *hrxqs = shared_rss->hrxq;
13710
13711         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13712         case MLX5_RSS_HASH_IPV4:
13713                 /* fall-through. */
13714         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13715                 /* fall-through. */
13716         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13717                 return hrxqs[0];
13718         case MLX5_RSS_HASH_IPV4_TCP:
13719                 /* fall-through. */
13720         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13721                 /* fall-through. */
13722         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13723                 return hrxqs[1];
13724         case MLX5_RSS_HASH_IPV4_UDP:
13725                 /* fall-through. */
13726         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13727                 /* fall-through. */
13728         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13729                 return hrxqs[2];
13730         case MLX5_RSS_HASH_IPV6:
13731                 /* fall-through. */
13732         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13733                 /* fall-through. */
13734         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13735                 return hrxqs[3];
13736         case MLX5_RSS_HASH_IPV6_TCP:
13737                 /* fall-through. */
13738         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13739                 /* fall-through. */
13740         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13741                 return hrxqs[4];
13742         case MLX5_RSS_HASH_IPV6_UDP:
13743                 /* fall-through. */
13744         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13745                 /* fall-through. */
13746         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13747                 return hrxqs[5];
13748         case MLX5_RSS_HASH_NONE:
13749                 return hrxqs[6];
13750         default:
13751                 return 0;
13752         }
13753
13754 }
13755
13756 /**
13757  * Apply the flow to the NIC, lock free,
13758  * (mutex should be acquired by caller).
13759  *
13760  * @param[in] dev
13761  *   Pointer to the Ethernet device structure.
13762  * @param[in, out] flow
13763  *   Pointer to flow structure.
13764  * @param[out] error
13765  *   Pointer to error structure.
13766  *
13767  * @return
13768  *   0 on success, a negative errno value otherwise and rte_errno is set.
13769  */
13770 static int
13771 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13772               struct rte_flow_error *error)
13773 {
13774         struct mlx5_flow_dv_workspace *dv;
13775         struct mlx5_flow_handle *dh;
13776         struct mlx5_flow_handle_dv *dv_h;
13777         struct mlx5_flow *dev_flow;
13778         struct mlx5_priv *priv = dev->data->dev_private;
13779         uint32_t handle_idx;
13780         int n;
13781         int err;
13782         int idx;
13783         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13784         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13785         uint8_t misc_mask;
13786
13787         MLX5_ASSERT(wks);
13788         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13789                 dev_flow = &wks->flows[idx];
13790                 dv = &dev_flow->dv;
13791                 dh = dev_flow->handle;
13792                 dv_h = &dh->dvh;
13793                 n = dv->actions_n;
13794                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13795                         if (dv->transfer) {
13796                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13797                                 dv->actions[n++] = priv->sh->dr_drop_action;
13798                         } else {
13799 #ifdef HAVE_MLX5DV_DR
13800                                 /* DR supports drop action placeholder. */
13801                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13802                                 dv->actions[n++] = dv->group ?
13803                                         priv->sh->dr_drop_action :
13804                                         priv->root_drop_action;
13805 #else
13806                                 /* For DV we use the explicit drop queue. */
13807                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13808                                 dv->actions[n++] =
13809                                                 priv->drop_queue.hrxq->action;
13810 #endif
13811                         }
13812                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13813                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13814                         struct mlx5_hrxq *hrxq;
13815                         uint32_t hrxq_idx;
13816
13817                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13818                                                     &hrxq_idx);
13819                         if (!hrxq) {
13820                                 rte_flow_error_set
13821                                         (error, rte_errno,
13822                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13823                                          "cannot get hash queue");
13824                                 goto error;
13825                         }
13826                         dh->rix_hrxq = hrxq_idx;
13827                         dv->actions[n++] = hrxq->action;
13828                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13829                         struct mlx5_hrxq *hrxq = NULL;
13830                         uint32_t hrxq_idx;
13831
13832                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13833                                                 rss_desc->shared_rss,
13834                                                 dev_flow->hash_fields);
13835                         if (hrxq_idx)
13836                                 hrxq = mlx5_ipool_get
13837                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13838                                          hrxq_idx);
13839                         if (!hrxq) {
13840                                 rte_flow_error_set
13841                                         (error, rte_errno,
13842                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13843                                          "cannot get hash queue");
13844                                 goto error;
13845                         }
13846                         dh->rix_srss = rss_desc->shared_rss;
13847                         dv->actions[n++] = hrxq->action;
13848                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13849                         if (!priv->sh->default_miss_action) {
13850                                 rte_flow_error_set
13851                                         (error, rte_errno,
13852                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13853                                          "default miss action not be created.");
13854                                 goto error;
13855                         }
13856                         dv->actions[n++] = priv->sh->default_miss_action;
13857                 }
13858                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13859                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13860                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13861                                                (void *)&dv->value, n,
13862                                                dv->actions, &dh->drv_flow);
13863                 if (err) {
13864                         rte_flow_error_set
13865                                 (error, errno,
13866                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13867                                 NULL,
13868                                 (!priv->config.allow_duplicate_pattern &&
13869                                 errno == EEXIST) ?
13870                                 "duplicating pattern is not allowed" :
13871                                 "hardware refuses to create flow");
13872                         goto error;
13873                 }
13874                 if (priv->vmwa_context &&
13875                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
13876                         /*
13877                          * The rule contains the VLAN pattern.
13878                          * For VF we are going to create VLAN
13879                          * interface to make hypervisor set correct
13880                          * e-Switch vport context.
13881                          */
13882                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13883                 }
13884         }
13885         return 0;
13886 error:
13887         err = rte_errno; /* Save rte_errno before cleanup. */
13888         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13889                        handle_idx, dh, next) {
13890                 /* hrxq is union, don't clear it if the flag is not set. */
13891                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13892                         mlx5_hrxq_release(dev, dh->rix_hrxq);
13893                         dh->rix_hrxq = 0;
13894                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13895                         dh->rix_srss = 0;
13896                 }
13897                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13898                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13899         }
13900         rte_errno = err; /* Restore rte_errno. */
13901         return -rte_errno;
13902 }
13903
13904 void
13905 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13906                           struct mlx5_list_entry *entry)
13907 {
13908         struct mlx5_flow_dv_matcher *resource = container_of(entry,
13909                                                              typeof(*resource),
13910                                                              entry);
13911
13912         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13913         mlx5_free(resource);
13914 }
13915
13916 /**
13917  * Release the flow matcher.
13918  *
13919  * @param dev
13920  *   Pointer to Ethernet device.
13921  * @param port_id
13922  *   Index to port ID action resource.
13923  *
13924  * @return
13925  *   1 while a reference on it exists, 0 when freed.
13926  */
13927 static int
13928 flow_dv_matcher_release(struct rte_eth_dev *dev,
13929                         struct mlx5_flow_handle *handle)
13930 {
13931         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13932         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13933                                                             typeof(*tbl), tbl);
13934         int ret;
13935
13936         MLX5_ASSERT(matcher->matcher_object);
13937         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13938         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13939         return ret;
13940 }
13941
13942 void
13943 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13944 {
13945         struct mlx5_dev_ctx_shared *sh = tool_ctx;
13946         struct mlx5_flow_dv_encap_decap_resource *res =
13947                                        container_of(entry, typeof(*res), entry);
13948
13949         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13950         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13951 }
13952
13953 /**
13954  * Release an encap/decap resource.
13955  *
13956  * @param dev
13957  *   Pointer to Ethernet device.
13958  * @param encap_decap_idx
13959  *   Index of encap decap resource.
13960  *
13961  * @return
13962  *   1 while a reference on it exists, 0 when freed.
13963  */
13964 static int
13965 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13966                                      uint32_t encap_decap_idx)
13967 {
13968         struct mlx5_priv *priv = dev->data->dev_private;
13969         struct mlx5_flow_dv_encap_decap_resource *resource;
13970
13971         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13972                                   encap_decap_idx);
13973         if (!resource)
13974                 return 0;
13975         MLX5_ASSERT(resource->action);
13976         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13977 }
13978
13979 /**
13980  * Release an jump to table action resource.
13981  *
13982  * @param dev
13983  *   Pointer to Ethernet device.
13984  * @param rix_jump
13985  *   Index to the jump action resource.
13986  *
13987  * @return
13988  *   1 while a reference on it exists, 0 when freed.
13989  */
13990 static int
13991 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13992                                   uint32_t rix_jump)
13993 {
13994         struct mlx5_priv *priv = dev->data->dev_private;
13995         struct mlx5_flow_tbl_data_entry *tbl_data;
13996
13997         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13998                                   rix_jump);
13999         if (!tbl_data)
14000                 return 0;
14001         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14002 }
14003
14004 void
14005 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14006 {
14007         struct mlx5_flow_dv_modify_hdr_resource *res =
14008                 container_of(entry, typeof(*res), entry);
14009         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14010
14011         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14012         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14013 }
14014
14015 /**
14016  * Release a modify-header resource.
14017  *
14018  * @param dev
14019  *   Pointer to Ethernet device.
14020  * @param handle
14021  *   Pointer to mlx5_flow_handle.
14022  *
14023  * @return
14024  *   1 while a reference on it exists, 0 when freed.
14025  */
14026 static int
14027 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14028                                     struct mlx5_flow_handle *handle)
14029 {
14030         struct mlx5_priv *priv = dev->data->dev_private;
14031         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14032
14033         MLX5_ASSERT(entry->action);
14034         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14035 }
14036
14037 void
14038 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14039 {
14040         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14041         struct mlx5_flow_dv_port_id_action_resource *resource =
14042                                   container_of(entry, typeof(*resource), entry);
14043
14044         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14045         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14046 }
14047
14048 /**
14049  * Release port ID action resource.
14050  *
14051  * @param dev
14052  *   Pointer to Ethernet device.
14053  * @param handle
14054  *   Pointer to mlx5_flow_handle.
14055  *
14056  * @return
14057  *   1 while a reference on it exists, 0 when freed.
14058  */
14059 static int
14060 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14061                                         uint32_t port_id)
14062 {
14063         struct mlx5_priv *priv = dev->data->dev_private;
14064         struct mlx5_flow_dv_port_id_action_resource *resource;
14065
14066         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14067         if (!resource)
14068                 return 0;
14069         MLX5_ASSERT(resource->action);
14070         return mlx5_list_unregister(priv->sh->port_id_action_list,
14071                                     &resource->entry);
14072 }
14073
14074 /**
14075  * Release shared RSS action resource.
14076  *
14077  * @param dev
14078  *   Pointer to Ethernet device.
14079  * @param srss
14080  *   Shared RSS action index.
14081  */
14082 static void
14083 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14084 {
14085         struct mlx5_priv *priv = dev->data->dev_private;
14086         struct mlx5_shared_action_rss *shared_rss;
14087
14088         shared_rss = mlx5_ipool_get
14089                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14090         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14091 }
14092
14093 void
14094 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14095 {
14096         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14097         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14098                         container_of(entry, typeof(*resource), entry);
14099
14100         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14101         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14102 }
14103
14104 /**
14105  * Release push vlan action resource.
14106  *
14107  * @param dev
14108  *   Pointer to Ethernet device.
14109  * @param handle
14110  *   Pointer to mlx5_flow_handle.
14111  *
14112  * @return
14113  *   1 while a reference on it exists, 0 when freed.
14114  */
14115 static int
14116 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14117                                           struct mlx5_flow_handle *handle)
14118 {
14119         struct mlx5_priv *priv = dev->data->dev_private;
14120         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14121         uint32_t idx = handle->dvh.rix_push_vlan;
14122
14123         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14124         if (!resource)
14125                 return 0;
14126         MLX5_ASSERT(resource->action);
14127         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14128                                     &resource->entry);
14129 }
14130
14131 /**
14132  * Release the fate resource.
14133  *
14134  * @param dev
14135  *   Pointer to Ethernet device.
14136  * @param handle
14137  *   Pointer to mlx5_flow_handle.
14138  */
14139 static void
14140 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14141                                struct mlx5_flow_handle *handle)
14142 {
14143         if (!handle->rix_fate)
14144                 return;
14145         switch (handle->fate_action) {
14146         case MLX5_FLOW_FATE_QUEUE:
14147                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14148                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14149                 break;
14150         case MLX5_FLOW_FATE_JUMP:
14151                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14152                 break;
14153         case MLX5_FLOW_FATE_PORT_ID:
14154                 flow_dv_port_id_action_resource_release(dev,
14155                                 handle->rix_port_id_action);
14156                 break;
14157         default:
14158                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14159                 break;
14160         }
14161         handle->rix_fate = 0;
14162 }
14163
14164 void
14165 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14166                          struct mlx5_list_entry *entry)
14167 {
14168         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14169                                                               typeof(*resource),
14170                                                               entry);
14171         struct rte_eth_dev *dev = resource->dev;
14172         struct mlx5_priv *priv = dev->data->dev_private;
14173
14174         if (resource->verbs_action)
14175                 claim_zero(mlx5_flow_os_destroy_flow_action
14176                                                       (resource->verbs_action));
14177         if (resource->normal_path_tbl)
14178                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14179                                              resource->normal_path_tbl);
14180         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14181         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14182         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14183 }
14184
14185 /**
14186  * Release an sample resource.
14187  *
14188  * @param dev
14189  *   Pointer to Ethernet device.
14190  * @param handle
14191  *   Pointer to mlx5_flow_handle.
14192  *
14193  * @return
14194  *   1 while a reference on it exists, 0 when freed.
14195  */
14196 static int
14197 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14198                                      struct mlx5_flow_handle *handle)
14199 {
14200         struct mlx5_priv *priv = dev->data->dev_private;
14201         struct mlx5_flow_dv_sample_resource *resource;
14202
14203         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14204                                   handle->dvh.rix_sample);
14205         if (!resource)
14206                 return 0;
14207         MLX5_ASSERT(resource->verbs_action);
14208         return mlx5_list_unregister(priv->sh->sample_action_list,
14209                                     &resource->entry);
14210 }
14211
14212 void
14213 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14214                              struct mlx5_list_entry *entry)
14215 {
14216         struct mlx5_flow_dv_dest_array_resource *resource =
14217                         container_of(entry, typeof(*resource), entry);
14218         struct rte_eth_dev *dev = resource->dev;
14219         struct mlx5_priv *priv = dev->data->dev_private;
14220         uint32_t i = 0;
14221
14222         MLX5_ASSERT(resource->action);
14223         if (resource->action)
14224                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14225         for (; i < resource->num_of_dest; i++)
14226                 flow_dv_sample_sub_actions_release(dev,
14227                                                    &resource->sample_idx[i]);
14228         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14229         DRV_LOG(DEBUG, "destination array resource %p: removed",
14230                 (void *)resource);
14231 }
14232
14233 /**
14234  * Release an destination array resource.
14235  *
14236  * @param dev
14237  *   Pointer to Ethernet device.
14238  * @param handle
14239  *   Pointer to mlx5_flow_handle.
14240  *
14241  * @return
14242  *   1 while a reference on it exists, 0 when freed.
14243  */
14244 static int
14245 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14246                                     struct mlx5_flow_handle *handle)
14247 {
14248         struct mlx5_priv *priv = dev->data->dev_private;
14249         struct mlx5_flow_dv_dest_array_resource *resource;
14250
14251         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14252                                   handle->dvh.rix_dest_array);
14253         if (!resource)
14254                 return 0;
14255         MLX5_ASSERT(resource->action);
14256         return mlx5_list_unregister(priv->sh->dest_array_list,
14257                                     &resource->entry);
14258 }
14259
14260 static void
14261 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14262 {
14263         struct mlx5_priv *priv = dev->data->dev_private;
14264         struct mlx5_dev_ctx_shared *sh = priv->sh;
14265         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14266                                 sh->geneve_tlv_option_resource;
14267         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14268         if (geneve_opt_resource) {
14269                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14270                                          __ATOMIC_RELAXED))) {
14271                         claim_zero(mlx5_devx_cmd_destroy
14272                                         (geneve_opt_resource->obj));
14273                         mlx5_free(sh->geneve_tlv_option_resource);
14274                         sh->geneve_tlv_option_resource = NULL;
14275                 }
14276         }
14277         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14278 }
14279
14280 /**
14281  * Remove the flow from the NIC but keeps it in memory.
14282  * Lock free, (mutex should be acquired by caller).
14283  *
14284  * @param[in] dev
14285  *   Pointer to Ethernet device.
14286  * @param[in, out] flow
14287  *   Pointer to flow structure.
14288  */
14289 static void
14290 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14291 {
14292         struct mlx5_flow_handle *dh;
14293         uint32_t handle_idx;
14294         struct mlx5_priv *priv = dev->data->dev_private;
14295
14296         if (!flow)
14297                 return;
14298         handle_idx = flow->dev_handles;
14299         while (handle_idx) {
14300                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14301                                     handle_idx);
14302                 if (!dh)
14303                         return;
14304                 if (dh->drv_flow) {
14305                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14306                         dh->drv_flow = NULL;
14307                 }
14308                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14309                         flow_dv_fate_resource_release(dev, dh);
14310                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14311                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14312                 handle_idx = dh->next.next;
14313         }
14314 }
14315
14316 /**
14317  * Remove the flow from the NIC and the memory.
14318  * Lock free, (mutex should be acquired by caller).
14319  *
14320  * @param[in] dev
14321  *   Pointer to the Ethernet device structure.
14322  * @param[in, out] flow
14323  *   Pointer to flow structure.
14324  */
14325 static void
14326 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14327 {
14328         struct mlx5_flow_handle *dev_handle;
14329         struct mlx5_priv *priv = dev->data->dev_private;
14330         struct mlx5_flow_meter_info *fm = NULL;
14331         uint32_t srss = 0;
14332
14333         if (!flow)
14334                 return;
14335         flow_dv_remove(dev, flow);
14336         if (flow->counter) {
14337                 flow_dv_counter_free(dev, flow->counter);
14338                 flow->counter = 0;
14339         }
14340         if (flow->meter) {
14341                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14342                 if (fm)
14343                         mlx5_flow_meter_detach(priv, fm);
14344                 flow->meter = 0;
14345         }
14346         /* Keep the current age handling by default. */
14347         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14348                 flow_dv_aso_ct_release(dev, flow->ct);
14349         else if (flow->age)
14350                 flow_dv_aso_age_release(dev, flow->age);
14351         if (flow->geneve_tlv_option) {
14352                 flow_dv_geneve_tlv_option_resource_release(dev);
14353                 flow->geneve_tlv_option = 0;
14354         }
14355         while (flow->dev_handles) {
14356                 uint32_t tmp_idx = flow->dev_handles;
14357
14358                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14359                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14360                 if (!dev_handle)
14361                         return;
14362                 flow->dev_handles = dev_handle->next.next;
14363                 if (dev_handle->dvh.matcher)
14364                         flow_dv_matcher_release(dev, dev_handle);
14365                 if (dev_handle->dvh.rix_sample)
14366                         flow_dv_sample_resource_release(dev, dev_handle);
14367                 if (dev_handle->dvh.rix_dest_array)
14368                         flow_dv_dest_array_resource_release(dev, dev_handle);
14369                 if (dev_handle->dvh.rix_encap_decap)
14370                         flow_dv_encap_decap_resource_release(dev,
14371                                 dev_handle->dvh.rix_encap_decap);
14372                 if (dev_handle->dvh.modify_hdr)
14373                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14374                 if (dev_handle->dvh.rix_push_vlan)
14375                         flow_dv_push_vlan_action_resource_release(dev,
14376                                                                   dev_handle);
14377                 if (dev_handle->dvh.rix_tag)
14378                         flow_dv_tag_release(dev,
14379                                             dev_handle->dvh.rix_tag);
14380                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14381                         flow_dv_fate_resource_release(dev, dev_handle);
14382                 else if (!srss)
14383                         srss = dev_handle->rix_srss;
14384                 if (fm && dev_handle->is_meter_flow_id &&
14385                     dev_handle->split_flow_id)
14386                         mlx5_ipool_free(fm->flow_ipool,
14387                                         dev_handle->split_flow_id);
14388                 else if (dev_handle->split_flow_id &&
14389                     !dev_handle->is_meter_flow_id)
14390                         mlx5_ipool_free(priv->sh->ipool
14391                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14392                                         dev_handle->split_flow_id);
14393                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14394                            tmp_idx);
14395         }
14396         if (srss)
14397                 flow_dv_shared_rss_action_release(dev, srss);
14398 }
14399
14400 /**
14401  * Release array of hash RX queue objects.
14402  * Helper function.
14403  *
14404  * @param[in] dev
14405  *   Pointer to the Ethernet device structure.
14406  * @param[in, out] hrxqs
14407  *   Array of hash RX queue objects.
14408  *
14409  * @return
14410  *   Total number of references to hash RX queue objects in *hrxqs* array
14411  *   after this operation.
14412  */
14413 static int
14414 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14415                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14416 {
14417         size_t i;
14418         int remaining = 0;
14419
14420         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14421                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14422
14423                 if (!ret)
14424                         (*hrxqs)[i] = 0;
14425                 remaining += ret;
14426         }
14427         return remaining;
14428 }
14429
14430 /**
14431  * Release all hash RX queue objects representing shared RSS action.
14432  *
14433  * @param[in] dev
14434  *   Pointer to the Ethernet device structure.
14435  * @param[in, out] action
14436  *   Shared RSS action to remove hash RX queue objects from.
14437  *
14438  * @return
14439  *   Total number of references to hash RX queue objects stored in *action*
14440  *   after this operation.
14441  *   Expected to be 0 if no external references held.
14442  */
14443 static int
14444 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14445                                  struct mlx5_shared_action_rss *shared_rss)
14446 {
14447         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14448 }
14449
14450 /**
14451  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14452  * user input.
14453  *
14454  * Only one hash value is available for one L3+L4 combination:
14455  * for example:
14456  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14457  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14458  * same slot in mlx5_rss_hash_fields.
14459  *
14460  * @param[in] rss
14461  *   Pointer to the shared action RSS conf.
14462  * @param[in, out] hash_field
14463  *   hash_field variable needed to be adjusted.
14464  *
14465  * @return
14466  *   void
14467  */
14468 static void
14469 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14470                                      uint64_t *hash_field)
14471 {
14472         uint64_t rss_types = rss->origin.types;
14473
14474         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14475         case MLX5_RSS_HASH_IPV4:
14476                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14477                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14478                         if (rss_types & ETH_RSS_L3_DST_ONLY)
14479                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14480                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14481                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14482                         else
14483                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14484                 }
14485                 return;
14486         case MLX5_RSS_HASH_IPV6:
14487                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14488                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14489                         if (rss_types & ETH_RSS_L3_DST_ONLY)
14490                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14491                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14492                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14493                         else
14494                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14495                 }
14496                 return;
14497         case MLX5_RSS_HASH_IPV4_UDP:
14498                 /* fall-through. */
14499         case MLX5_RSS_HASH_IPV6_UDP:
14500                 if (rss_types & ETH_RSS_UDP) {
14501                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14502                         if (rss_types & ETH_RSS_L4_DST_ONLY)
14503                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14504                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14505                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14506                         else
14507                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14508                 }
14509                 return;
14510         case MLX5_RSS_HASH_IPV4_TCP:
14511                 /* fall-through. */
14512         case MLX5_RSS_HASH_IPV6_TCP:
14513                 if (rss_types & ETH_RSS_TCP) {
14514                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14515                         if (rss_types & ETH_RSS_L4_DST_ONLY)
14516                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14517                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14518                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14519                         else
14520                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14521                 }
14522                 return;
14523         default:
14524                 return;
14525         }
14526 }
14527
14528 /**
14529  * Setup shared RSS action.
14530  * Prepare set of hash RX queue objects sufficient to handle all valid
14531  * hash_fields combinations (see enum ibv_rx_hash_fields).
14532  *
14533  * @param[in] dev
14534  *   Pointer to the Ethernet device structure.
14535  * @param[in] action_idx
14536  *   Shared RSS action ipool index.
14537  * @param[in, out] action
14538  *   Partially initialized shared RSS action.
14539  * @param[out] error
14540  *   Perform verbose error reporting if not NULL. Initialized in case of
14541  *   error only.
14542  *
14543  * @return
14544  *   0 on success, otherwise negative errno value.
14545  */
14546 static int
14547 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14548                            uint32_t action_idx,
14549                            struct mlx5_shared_action_rss *shared_rss,
14550                            struct rte_flow_error *error)
14551 {
14552         struct mlx5_flow_rss_desc rss_desc = { 0 };
14553         size_t i;
14554         int err;
14555
14556         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14557                 return rte_flow_error_set(error, rte_errno,
14558                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14559                                           "cannot setup indirection table");
14560         }
14561         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14562         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14563         rss_desc.const_q = shared_rss->origin.queue;
14564         rss_desc.queue_num = shared_rss->origin.queue_num;
14565         /* Set non-zero value to indicate a shared RSS. */
14566         rss_desc.shared_rss = action_idx;
14567         rss_desc.ind_tbl = shared_rss->ind_tbl;
14568         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14569                 uint32_t hrxq_idx;
14570                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14571                 int tunnel = 0;
14572
14573                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14574                 if (shared_rss->origin.level > 1) {
14575                         hash_fields |= IBV_RX_HASH_INNER;
14576                         tunnel = 1;
14577                 }
14578                 rss_desc.tunnel = tunnel;
14579                 rss_desc.hash_fields = hash_fields;
14580                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14581                 if (!hrxq_idx) {
14582                         rte_flow_error_set
14583                                 (error, rte_errno,
14584                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14585                                  "cannot get hash queue");
14586                         goto error_hrxq_new;
14587                 }
14588                 err = __flow_dv_action_rss_hrxq_set
14589                         (shared_rss, hash_fields, hrxq_idx);
14590                 MLX5_ASSERT(!err);
14591         }
14592         return 0;
14593 error_hrxq_new:
14594         err = rte_errno;
14595         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14596         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14597                 shared_rss->ind_tbl = NULL;
14598         rte_errno = err;
14599         return -rte_errno;
14600 }
14601
14602 /**
14603  * Create shared RSS action.
14604  *
14605  * @param[in] dev
14606  *   Pointer to the Ethernet device structure.
14607  * @param[in] conf
14608  *   Shared action configuration.
14609  * @param[in] rss
14610  *   RSS action specification used to create shared action.
14611  * @param[out] error
14612  *   Perform verbose error reporting if not NULL. Initialized in case of
14613  *   error only.
14614  *
14615  * @return
14616  *   A valid shared action ID in case of success, 0 otherwise and
14617  *   rte_errno is set.
14618  */
14619 static uint32_t
14620 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14621                             const struct rte_flow_indir_action_conf *conf,
14622                             const struct rte_flow_action_rss *rss,
14623                             struct rte_flow_error *error)
14624 {
14625         struct mlx5_priv *priv = dev->data->dev_private;
14626         struct mlx5_shared_action_rss *shared_rss = NULL;
14627         void *queue = NULL;
14628         struct rte_flow_action_rss *origin;
14629         const uint8_t *rss_key;
14630         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14631         uint32_t idx;
14632
14633         RTE_SET_USED(conf);
14634         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14635                             0, SOCKET_ID_ANY);
14636         shared_rss = mlx5_ipool_zmalloc
14637                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14638         if (!shared_rss || !queue) {
14639                 rte_flow_error_set(error, ENOMEM,
14640                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14641                                    "cannot allocate resource memory");
14642                 goto error_rss_init;
14643         }
14644         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14645                 rte_flow_error_set(error, E2BIG,
14646                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14647                                    "rss action number out of range");
14648                 goto error_rss_init;
14649         }
14650         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14651                                           sizeof(*shared_rss->ind_tbl),
14652                                           0, SOCKET_ID_ANY);
14653         if (!shared_rss->ind_tbl) {
14654                 rte_flow_error_set(error, ENOMEM,
14655                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14656                                    "cannot allocate resource memory");
14657                 goto error_rss_init;
14658         }
14659         memcpy(queue, rss->queue, queue_size);
14660         shared_rss->ind_tbl->queues = queue;
14661         shared_rss->ind_tbl->queues_n = rss->queue_num;
14662         origin = &shared_rss->origin;
14663         origin->func = rss->func;
14664         origin->level = rss->level;
14665         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14666         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14667         /* NULL RSS key indicates default RSS key. */
14668         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14669         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14670         origin->key = &shared_rss->key[0];
14671         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14672         origin->queue = queue;
14673         origin->queue_num = rss->queue_num;
14674         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14675                 goto error_rss_init;
14676         rte_spinlock_init(&shared_rss->action_rss_sl);
14677         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14678         rte_spinlock_lock(&priv->shared_act_sl);
14679         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14680                      &priv->rss_shared_actions, idx, shared_rss, next);
14681         rte_spinlock_unlock(&priv->shared_act_sl);
14682         return idx;
14683 error_rss_init:
14684         if (shared_rss) {
14685                 if (shared_rss->ind_tbl)
14686                         mlx5_free(shared_rss->ind_tbl);
14687                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14688                                 idx);
14689         }
14690         if (queue)
14691                 mlx5_free(queue);
14692         return 0;
14693 }
14694
14695 /**
14696  * Destroy the shared RSS action.
14697  * Release related hash RX queue objects.
14698  *
14699  * @param[in] dev
14700  *   Pointer to the Ethernet device structure.
14701  * @param[in] idx
14702  *   The shared RSS action object ID to be removed.
14703  * @param[out] error
14704  *   Perform verbose error reporting if not NULL. Initialized in case of
14705  *   error only.
14706  *
14707  * @return
14708  *   0 on success, otherwise negative errno value.
14709  */
14710 static int
14711 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14712                              struct rte_flow_error *error)
14713 {
14714         struct mlx5_priv *priv = dev->data->dev_private;
14715         struct mlx5_shared_action_rss *shared_rss =
14716             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14717         uint32_t old_refcnt = 1;
14718         int remaining;
14719         uint16_t *queue = NULL;
14720
14721         if (!shared_rss)
14722                 return rte_flow_error_set(error, EINVAL,
14723                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14724                                           "invalid shared action");
14725         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14726         if (remaining)
14727                 return rte_flow_error_set(error, EBUSY,
14728                                           RTE_FLOW_ERROR_TYPE_ACTION,
14729                                           NULL,
14730                                           "shared rss hrxq has references");
14731         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14732                                          0, 0, __ATOMIC_ACQUIRE,
14733                                          __ATOMIC_RELAXED))
14734                 return rte_flow_error_set(error, EBUSY,
14735                                           RTE_FLOW_ERROR_TYPE_ACTION,
14736                                           NULL,
14737                                           "shared rss has references");
14738         queue = shared_rss->ind_tbl->queues;
14739         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14740         if (remaining)
14741                 return rte_flow_error_set(error, EBUSY,
14742                                           RTE_FLOW_ERROR_TYPE_ACTION,
14743                                           NULL,
14744                                           "shared rss indirection table has"
14745                                           " references");
14746         mlx5_free(queue);
14747         rte_spinlock_lock(&priv->shared_act_sl);
14748         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14749                      &priv->rss_shared_actions, idx, shared_rss, next);
14750         rte_spinlock_unlock(&priv->shared_act_sl);
14751         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14752                         idx);
14753         return 0;
14754 }
14755
14756 /**
14757  * Create indirect action, lock free,
14758  * (mutex should be acquired by caller).
14759  * Dispatcher for action type specific call.
14760  *
14761  * @param[in] dev
14762  *   Pointer to the Ethernet device structure.
14763  * @param[in] conf
14764  *   Shared action configuration.
14765  * @param[in] action
14766  *   Action specification used to create indirect action.
14767  * @param[out] error
14768  *   Perform verbose error reporting if not NULL. Initialized in case of
14769  *   error only.
14770  *
14771  * @return
14772  *   A valid shared action handle in case of success, NULL otherwise and
14773  *   rte_errno is set.
14774  */
14775 static struct rte_flow_action_handle *
14776 flow_dv_action_create(struct rte_eth_dev *dev,
14777                       const struct rte_flow_indir_action_conf *conf,
14778                       const struct rte_flow_action *action,
14779                       struct rte_flow_error *err)
14780 {
14781         struct mlx5_priv *priv = dev->data->dev_private;
14782         uint32_t age_idx = 0;
14783         uint32_t idx = 0;
14784         uint32_t ret = 0;
14785
14786         switch (action->type) {
14787         case RTE_FLOW_ACTION_TYPE_RSS:
14788                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14789                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14790                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14791                 break;
14792         case RTE_FLOW_ACTION_TYPE_AGE:
14793                 age_idx = flow_dv_aso_age_alloc(dev, err);
14794                 if (!age_idx) {
14795                         ret = -rte_errno;
14796                         break;
14797                 }
14798                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14799                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14800                 flow_dv_aso_age_params_init(dev, age_idx,
14801                                         ((const struct rte_flow_action_age *)
14802                                                 action->conf)->context ?
14803                                         ((const struct rte_flow_action_age *)
14804                                                 action->conf)->context :
14805                                         (void *)(uintptr_t)idx,
14806                                         ((const struct rte_flow_action_age *)
14807                                                 action->conf)->timeout);
14808                 ret = age_idx;
14809                 break;
14810         case RTE_FLOW_ACTION_TYPE_COUNT:
14811                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14812                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14813                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14814                 break;
14815         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14816                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14817                                                          err);
14818                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14819                 break;
14820         default:
14821                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14822                                    NULL, "action type not supported");
14823                 break;
14824         }
14825         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14826 }
14827
14828 /**
14829  * Destroy the indirect action.
14830  * Release action related resources on the NIC and the memory.
14831  * Lock free, (mutex should be acquired by caller).
14832  * Dispatcher for action type specific call.
14833  *
14834  * @param[in] dev
14835  *   Pointer to the Ethernet device structure.
14836  * @param[in] handle
14837  *   The indirect action object handle to be removed.
14838  * @param[out] error
14839  *   Perform verbose error reporting if not NULL. Initialized in case of
14840  *   error only.
14841  *
14842  * @return
14843  *   0 on success, otherwise negative errno value.
14844  */
14845 static int
14846 flow_dv_action_destroy(struct rte_eth_dev *dev,
14847                        struct rte_flow_action_handle *handle,
14848                        struct rte_flow_error *error)
14849 {
14850         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14851         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14852         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14853         struct mlx5_flow_counter *cnt;
14854         uint32_t no_flow_refcnt = 1;
14855         int ret;
14856
14857         switch (type) {
14858         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14859                 return __flow_dv_action_rss_release(dev, idx, error);
14860         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14861                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14862                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14863                                                  &no_flow_refcnt, 1, false,
14864                                                  __ATOMIC_ACQUIRE,
14865                                                  __ATOMIC_RELAXED))
14866                         return rte_flow_error_set(error, EBUSY,
14867                                                   RTE_FLOW_ERROR_TYPE_ACTION,
14868                                                   NULL,
14869                                                   "Indirect count action has references");
14870                 flow_dv_counter_free(dev, idx);
14871                 return 0;
14872         case MLX5_INDIRECT_ACTION_TYPE_AGE:
14873                 ret = flow_dv_aso_age_release(dev, idx);
14874                 if (ret)
14875                         /*
14876                          * In this case, the last flow has a reference will
14877                          * actually release the age action.
14878                          */
14879                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14880                                 " released with references %d.", idx, ret);
14881                 return 0;
14882         case MLX5_INDIRECT_ACTION_TYPE_CT:
14883                 ret = flow_dv_aso_ct_release(dev, idx);
14884                 if (ret < 0)
14885                         return ret;
14886                 if (ret > 0)
14887                         DRV_LOG(DEBUG, "Connection tracking object %u still "
14888                                 "has references %d.", idx, ret);
14889                 return 0;
14890         default:
14891                 return rte_flow_error_set(error, ENOTSUP,
14892                                           RTE_FLOW_ERROR_TYPE_ACTION,
14893                                           NULL,
14894                                           "action type not supported");
14895         }
14896 }
14897
14898 /**
14899  * Updates in place shared RSS action configuration.
14900  *
14901  * @param[in] dev
14902  *   Pointer to the Ethernet device structure.
14903  * @param[in] idx
14904  *   The shared RSS action object ID to be updated.
14905  * @param[in] action_conf
14906  *   RSS action specification used to modify *shared_rss*.
14907  * @param[out] error
14908  *   Perform verbose error reporting if not NULL. Initialized in case of
14909  *   error only.
14910  *
14911  * @return
14912  *   0 on success, otherwise negative errno value.
14913  * @note: currently only support update of RSS queues.
14914  */
14915 static int
14916 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14917                             const struct rte_flow_action_rss *action_conf,
14918                             struct rte_flow_error *error)
14919 {
14920         struct mlx5_priv *priv = dev->data->dev_private;
14921         struct mlx5_shared_action_rss *shared_rss =
14922             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14923         int ret = 0;
14924         void *queue = NULL;
14925         uint16_t *queue_old = NULL;
14926         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14927
14928         if (!shared_rss)
14929                 return rte_flow_error_set(error, EINVAL,
14930                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14931                                           "invalid shared action to update");
14932         if (priv->obj_ops.ind_table_modify == NULL)
14933                 return rte_flow_error_set(error, ENOTSUP,
14934                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14935                                           "cannot modify indirection table");
14936         queue = mlx5_malloc(MLX5_MEM_ZERO,
14937                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14938                             0, SOCKET_ID_ANY);
14939         if (!queue)
14940                 return rte_flow_error_set(error, ENOMEM,
14941                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14942                                           NULL,
14943                                           "cannot allocate resource memory");
14944         memcpy(queue, action_conf->queue, queue_size);
14945         MLX5_ASSERT(shared_rss->ind_tbl);
14946         rte_spinlock_lock(&shared_rss->action_rss_sl);
14947         queue_old = shared_rss->ind_tbl->queues;
14948         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14949                                         queue, action_conf->queue_num, true);
14950         if (ret) {
14951                 mlx5_free(queue);
14952                 ret = rte_flow_error_set(error, rte_errno,
14953                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14954                                           "cannot update indirection table");
14955         } else {
14956                 mlx5_free(queue_old);
14957                 shared_rss->origin.queue = queue;
14958                 shared_rss->origin.queue_num = action_conf->queue_num;
14959         }
14960         rte_spinlock_unlock(&shared_rss->action_rss_sl);
14961         return ret;
14962 }
14963
14964 /*
14965  * Updates in place conntrack context or direction.
14966  * Context update should be synchronized.
14967  *
14968  * @param[in] dev
14969  *   Pointer to the Ethernet device structure.
14970  * @param[in] idx
14971  *   The conntrack object ID to be updated.
14972  * @param[in] update
14973  *   Pointer to the structure of information to update.
14974  * @param[out] error
14975  *   Perform verbose error reporting if not NULL. Initialized in case of
14976  *   error only.
14977  *
14978  * @return
14979  *   0 on success, otherwise negative errno value.
14980  */
14981 static int
14982 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14983                            const struct rte_flow_modify_conntrack *update,
14984                            struct rte_flow_error *error)
14985 {
14986         struct mlx5_priv *priv = dev->data->dev_private;
14987         struct mlx5_aso_ct_action *ct;
14988         const struct rte_flow_action_conntrack *new_prf;
14989         int ret = 0;
14990         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14991         uint32_t dev_idx;
14992
14993         if (PORT_ID(priv) != owner)
14994                 return rte_flow_error_set(error, EACCES,
14995                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14996                                           NULL,
14997                                           "CT object owned by another port");
14998         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14999         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15000         if (!ct->refcnt)
15001                 return rte_flow_error_set(error, ENOMEM,
15002                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15003                                           NULL,
15004                                           "CT object is inactive");
15005         new_prf = &update->new_ct;
15006         if (update->direction)
15007                 ct->is_original = !!new_prf->is_original_dir;
15008         if (update->state) {
15009                 /* Only validate the profile when it needs to be updated. */
15010                 ret = mlx5_validate_action_ct(dev, new_prf, error);
15011                 if (ret)
15012                         return ret;
15013                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15014                 if (ret)
15015                         return rte_flow_error_set(error, EIO,
15016                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15017                                         NULL,
15018                                         "Failed to send CT context update WQE");
15019                 /* Block until ready or a failure. */
15020                 ret = mlx5_aso_ct_available(priv->sh, ct);
15021                 if (ret)
15022                         rte_flow_error_set(error, rte_errno,
15023                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15024                                            NULL,
15025                                            "Timeout to get the CT update");
15026         }
15027         return ret;
15028 }
15029
15030 /**
15031  * Updates in place shared action configuration, lock free,
15032  * (mutex should be acquired by caller).
15033  *
15034  * @param[in] dev
15035  *   Pointer to the Ethernet device structure.
15036  * @param[in] handle
15037  *   The indirect action object handle to be updated.
15038  * @param[in] update
15039  *   Action specification used to modify the action pointed by *handle*.
15040  *   *update* could be of same type with the action pointed by the *handle*
15041  *   handle argument, or some other structures like a wrapper, depending on
15042  *   the indirect action type.
15043  * @param[out] error
15044  *   Perform verbose error reporting if not NULL. Initialized in case of
15045  *   error only.
15046  *
15047  * @return
15048  *   0 on success, otherwise negative errno value.
15049  */
15050 static int
15051 flow_dv_action_update(struct rte_eth_dev *dev,
15052                         struct rte_flow_action_handle *handle,
15053                         const void *update,
15054                         struct rte_flow_error *err)
15055 {
15056         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15057         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15058         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15059         const void *action_conf;
15060
15061         switch (type) {
15062         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15063                 action_conf = ((const struct rte_flow_action *)update)->conf;
15064                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15065         case MLX5_INDIRECT_ACTION_TYPE_CT:
15066                 return __flow_dv_action_ct_update(dev, idx, update, err);
15067         default:
15068                 return rte_flow_error_set(err, ENOTSUP,
15069                                           RTE_FLOW_ERROR_TYPE_ACTION,
15070                                           NULL,
15071                                           "action type update not supported");
15072         }
15073 }
15074
15075 /**
15076  * Destroy the meter sub policy table rules.
15077  * Lock free, (mutex should be acquired by caller).
15078  *
15079  * @param[in] dev
15080  *   Pointer to Ethernet device.
15081  * @param[in] sub_policy
15082  *   Pointer to meter sub policy table.
15083  */
15084 static void
15085 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15086                              struct mlx5_flow_meter_sub_policy *sub_policy)
15087 {
15088         struct mlx5_priv *priv = dev->data->dev_private;
15089         struct mlx5_flow_tbl_data_entry *tbl;
15090         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15091         struct mlx5_flow_meter_info *next_fm;
15092         struct mlx5_sub_policy_color_rule *color_rule;
15093         void *tmp;
15094         uint32_t i;
15095
15096         for (i = 0; i < RTE_COLORS; i++) {
15097                 next_fm = NULL;
15098                 if (i == RTE_COLOR_GREEN && policy &&
15099                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15100                         next_fm = mlx5_flow_meter_find(priv,
15101                                         policy->act_cnt[i].next_mtr_id, NULL);
15102                 TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15103                                    next_port, tmp) {
15104                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15105                         tbl = container_of(color_rule->matcher->tbl,
15106                                            typeof(*tbl), tbl);
15107                         mlx5_list_unregister(tbl->matchers,
15108                                              &color_rule->matcher->entry);
15109                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15110                                      color_rule, next_port);
15111                         mlx5_free(color_rule);
15112                         if (next_fm)
15113                                 mlx5_flow_meter_detach(priv, next_fm);
15114                 }
15115         }
15116         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15117                 if (sub_policy->rix_hrxq[i]) {
15118                         if (policy && !policy->is_hierarchy)
15119                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15120                         sub_policy->rix_hrxq[i] = 0;
15121                 }
15122                 if (sub_policy->jump_tbl[i]) {
15123                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15124                                                      sub_policy->jump_tbl[i]);
15125                         sub_policy->jump_tbl[i] = NULL;
15126                 }
15127         }
15128         if (sub_policy->tbl_rsc) {
15129                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15130                                              sub_policy->tbl_rsc);
15131                 sub_policy->tbl_rsc = NULL;
15132         }
15133 }
15134
15135 /**
15136  * Destroy policy rules, lock free,
15137  * (mutex should be acquired by caller).
15138  * Dispatcher for action type specific call.
15139  *
15140  * @param[in] dev
15141  *   Pointer to the Ethernet device structure.
15142  * @param[in] mtr_policy
15143  *   Meter policy struct.
15144  */
15145 static void
15146 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15147                              struct mlx5_flow_meter_policy *mtr_policy)
15148 {
15149         uint32_t i, j;
15150         struct mlx5_flow_meter_sub_policy *sub_policy;
15151         uint16_t sub_policy_num;
15152
15153         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15154                 sub_policy_num = (mtr_policy->sub_policy_num >>
15155                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15156                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15157                 for (j = 0; j < sub_policy_num; j++) {
15158                         sub_policy = mtr_policy->sub_policys[i][j];
15159                         if (sub_policy)
15160                                 __flow_dv_destroy_sub_policy_rules(dev,
15161                                                                    sub_policy);
15162                 }
15163         }
15164 }
15165
15166 /**
15167  * Destroy policy action, lock free,
15168  * (mutex should be acquired by caller).
15169  * Dispatcher for action type specific call.
15170  *
15171  * @param[in] dev
15172  *   Pointer to the Ethernet device structure.
15173  * @param[in] mtr_policy
15174  *   Meter policy struct.
15175  */
15176 static void
15177 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15178                       struct mlx5_flow_meter_policy *mtr_policy)
15179 {
15180         struct rte_flow_action *rss_action;
15181         struct mlx5_flow_handle dev_handle;
15182         uint32_t i, j;
15183
15184         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15185                 if (mtr_policy->act_cnt[i].rix_mark) {
15186                         flow_dv_tag_release(dev,
15187                                 mtr_policy->act_cnt[i].rix_mark);
15188                         mtr_policy->act_cnt[i].rix_mark = 0;
15189                 }
15190                 if (mtr_policy->act_cnt[i].modify_hdr) {
15191                         dev_handle.dvh.modify_hdr =
15192                                 mtr_policy->act_cnt[i].modify_hdr;
15193                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15194                 }
15195                 switch (mtr_policy->act_cnt[i].fate_action) {
15196                 case MLX5_FLOW_FATE_SHARED_RSS:
15197                         rss_action = mtr_policy->act_cnt[i].rss;
15198                         mlx5_free(rss_action);
15199                         break;
15200                 case MLX5_FLOW_FATE_PORT_ID:
15201                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15202                                 flow_dv_port_id_action_resource_release(dev,
15203                                 mtr_policy->act_cnt[i].rix_port_id_action);
15204                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15205                         }
15206                         break;
15207                 case MLX5_FLOW_FATE_DROP:
15208                 case MLX5_FLOW_FATE_JUMP:
15209                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15210                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15211                                                 NULL;
15212                         break;
15213                 default:
15214                         /*Queue action do nothing*/
15215                         break;
15216                 }
15217         }
15218         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15219                 mtr_policy->dr_drop_action[j] = NULL;
15220 }
15221
15222 /**
15223  * Create policy action per domain, lock free,
15224  * (mutex should be acquired by caller).
15225  * Dispatcher for action type specific call.
15226  *
15227  * @param[in] dev
15228  *   Pointer to the Ethernet device structure.
15229  * @param[in] mtr_policy
15230  *   Meter policy struct.
15231  * @param[in] action
15232  *   Action specification used to create meter actions.
15233  * @param[out] error
15234  *   Perform verbose error reporting if not NULL. Initialized in case of
15235  *   error only.
15236  *
15237  * @return
15238  *   0 on success, otherwise negative errno value.
15239  */
15240 static int
15241 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15242                         struct mlx5_flow_meter_policy *mtr_policy,
15243                         const struct rte_flow_action *actions[RTE_COLORS],
15244                         enum mlx5_meter_domain domain,
15245                         struct rte_mtr_error *error)
15246 {
15247         struct mlx5_priv *priv = dev->data->dev_private;
15248         struct rte_flow_error flow_err;
15249         const struct rte_flow_action *act;
15250         uint64_t action_flags;
15251         struct mlx5_flow_handle dh;
15252         struct mlx5_flow dev_flow;
15253         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15254         int i, ret;
15255         uint8_t egress, transfer;
15256         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15257         union {
15258                 struct mlx5_flow_dv_modify_hdr_resource res;
15259                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15260                             sizeof(struct mlx5_modification_cmd) *
15261                             (MLX5_MAX_MODIFY_NUM + 1)];
15262         } mhdr_dummy;
15263         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15264
15265         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15266         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15267         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15268         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15269         memset(&port_id_action, 0,
15270                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15271         memset(mhdr_res, 0, sizeof(*mhdr_res));
15272         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15273                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15274                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15275         dev_flow.handle = &dh;
15276         dev_flow.dv.port_id_action = &port_id_action;
15277         dev_flow.external = true;
15278         for (i = 0; i < RTE_COLORS; i++) {
15279                 if (i < MLX5_MTR_RTE_COLORS)
15280                         act_cnt = &mtr_policy->act_cnt[i];
15281                 /* Skip the color policy actions creation. */
15282                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15283                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15284                         continue;
15285                 action_flags = 0;
15286                 for (act = actions[i];
15287                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15288                         switch (act->type) {
15289                         case RTE_FLOW_ACTION_TYPE_MARK:
15290                         {
15291                                 uint32_t tag_be = mlx5_flow_mark_set
15292                                         (((const struct rte_flow_action_mark *)
15293                                         (act->conf))->id);
15294
15295                                 if (i >= MLX5_MTR_RTE_COLORS)
15296                                         return -rte_mtr_error_set(error,
15297                                           ENOTSUP,
15298                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15299                                           NULL,
15300                                           "cannot create policy "
15301                                           "mark action for this color");
15302                                 dev_flow.handle->mark = 1;
15303                                 if (flow_dv_tag_resource_register(dev, tag_be,
15304                                                   &dev_flow, &flow_err))
15305                                         return -rte_mtr_error_set(error,
15306                                         ENOTSUP,
15307                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15308                                         NULL,
15309                                         "cannot setup policy mark action");
15310                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15311                                 act_cnt->rix_mark =
15312                                         dev_flow.handle->dvh.rix_tag;
15313                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15314                                 break;
15315                         }
15316                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15317                                 if (i >= MLX5_MTR_RTE_COLORS)
15318                                         return -rte_mtr_error_set(error,
15319                                           ENOTSUP,
15320                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15321                                           NULL,
15322                                           "cannot create policy "
15323                                           "set tag action for this color");
15324                                 if (flow_dv_convert_action_set_tag
15325                                 (dev, mhdr_res,
15326                                 (const struct rte_flow_action_set_tag *)
15327                                 act->conf,  &flow_err))
15328                                         return -rte_mtr_error_set(error,
15329                                         ENOTSUP,
15330                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15331                                         NULL, "cannot convert policy "
15332                                         "set tag action");
15333                                 if (!mhdr_res->actions_num)
15334                                         return -rte_mtr_error_set(error,
15335                                         ENOTSUP,
15336                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15337                                         NULL, "cannot find policy "
15338                                         "set tag action");
15339                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15340                                 break;
15341                         case RTE_FLOW_ACTION_TYPE_DROP:
15342                         {
15343                                 struct mlx5_flow_mtr_mng *mtrmng =
15344                                                 priv->sh->mtrmng;
15345                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15346
15347                                 /*
15348                                  * Create the drop table with
15349                                  * METER DROP level.
15350                                  */
15351                                 if (!mtrmng->drop_tbl[domain]) {
15352                                         mtrmng->drop_tbl[domain] =
15353                                         flow_dv_tbl_resource_get(dev,
15354                                         MLX5_FLOW_TABLE_LEVEL_METER,
15355                                         egress, transfer, false, NULL, 0,
15356                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15357                                         if (!mtrmng->drop_tbl[domain])
15358                                                 return -rte_mtr_error_set
15359                                         (error, ENOTSUP,
15360                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15361                                         NULL,
15362                                         "Failed to create meter drop table");
15363                                 }
15364                                 tbl_data = container_of
15365                                 (mtrmng->drop_tbl[domain],
15366                                 struct mlx5_flow_tbl_data_entry, tbl);
15367                                 if (i < MLX5_MTR_RTE_COLORS) {
15368                                         act_cnt->dr_jump_action[domain] =
15369                                                 tbl_data->jump.action;
15370                                         act_cnt->fate_action =
15371                                                 MLX5_FLOW_FATE_DROP;
15372                                 }
15373                                 if (i == RTE_COLOR_RED)
15374                                         mtr_policy->dr_drop_action[domain] =
15375                                                 tbl_data->jump.action;
15376                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15377                                 break;
15378                         }
15379                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15380                         {
15381                                 if (i >= MLX5_MTR_RTE_COLORS)
15382                                         return -rte_mtr_error_set(error,
15383                                         ENOTSUP,
15384                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15385                                         NULL, "cannot create policy "
15386                                         "fate queue for this color");
15387                                 act_cnt->queue =
15388                                 ((const struct rte_flow_action_queue *)
15389                                         (act->conf))->index;
15390                                 act_cnt->fate_action =
15391                                         MLX5_FLOW_FATE_QUEUE;
15392                                 dev_flow.handle->fate_action =
15393                                         MLX5_FLOW_FATE_QUEUE;
15394                                 mtr_policy->is_queue = 1;
15395                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15396                                 break;
15397                         }
15398                         case RTE_FLOW_ACTION_TYPE_RSS:
15399                         {
15400                                 int rss_size;
15401
15402                                 if (i >= MLX5_MTR_RTE_COLORS)
15403                                         return -rte_mtr_error_set(error,
15404                                           ENOTSUP,
15405                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15406                                           NULL,
15407                                           "cannot create policy "
15408                                           "rss action for this color");
15409                                 /*
15410                                  * Save RSS conf into policy struct
15411                                  * for translate stage.
15412                                  */
15413                                 rss_size = (int)rte_flow_conv
15414                                         (RTE_FLOW_CONV_OP_ACTION,
15415                                         NULL, 0, act, &flow_err);
15416                                 if (rss_size <= 0)
15417                                         return -rte_mtr_error_set(error,
15418                                           ENOTSUP,
15419                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15420                                           NULL, "Get the wrong "
15421                                           "rss action struct size");
15422                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15423                                                 rss_size, 0, SOCKET_ID_ANY);
15424                                 if (!act_cnt->rss)
15425                                         return -rte_mtr_error_set(error,
15426                                           ENOTSUP,
15427                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15428                                           NULL,
15429                                           "Fail to malloc rss action memory");
15430                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15431                                         act_cnt->rss, rss_size,
15432                                         act, &flow_err);
15433                                 if (ret < 0)
15434                                         return -rte_mtr_error_set(error,
15435                                           ENOTSUP,
15436                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15437                                           NULL, "Fail to save "
15438                                           "rss action into policy struct");
15439                                 act_cnt->fate_action =
15440                                         MLX5_FLOW_FATE_SHARED_RSS;
15441                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15442                                 break;
15443                         }
15444                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15445                         {
15446                                 struct mlx5_flow_dv_port_id_action_resource
15447                                         port_id_resource;
15448                                 uint32_t port_id = 0;
15449
15450                                 if (i >= MLX5_MTR_RTE_COLORS)
15451                                         return -rte_mtr_error_set(error,
15452                                         ENOTSUP,
15453                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15454                                         NULL, "cannot create policy "
15455                                         "port action for this color");
15456                                 memset(&port_id_resource, 0,
15457                                         sizeof(port_id_resource));
15458                                 if (flow_dv_translate_action_port_id(dev, act,
15459                                                 &port_id, &flow_err))
15460                                         return -rte_mtr_error_set(error,
15461                                         ENOTSUP,
15462                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15463                                         NULL, "cannot translate "
15464                                         "policy port action");
15465                                 port_id_resource.port_id = port_id;
15466                                 if (flow_dv_port_id_action_resource_register
15467                                         (dev, &port_id_resource,
15468                                         &dev_flow, &flow_err))
15469                                         return -rte_mtr_error_set(error,
15470                                         ENOTSUP,
15471                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15472                                         NULL, "cannot setup "
15473                                         "policy port action");
15474                                 act_cnt->rix_port_id_action =
15475                                         dev_flow.handle->rix_port_id_action;
15476                                 act_cnt->fate_action =
15477                                         MLX5_FLOW_FATE_PORT_ID;
15478                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15479                                 break;
15480                         }
15481                         case RTE_FLOW_ACTION_TYPE_JUMP:
15482                         {
15483                                 uint32_t jump_group = 0;
15484                                 uint32_t table = 0;
15485                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15486                                 struct flow_grp_info grp_info = {
15487                                         .external = !!dev_flow.external,
15488                                         .transfer = !!transfer,
15489                                         .fdb_def_rule = !!priv->fdb_def_rule,
15490                                         .std_tbl_fix = 0,
15491                                         .skip_scale = dev_flow.skip_scale &
15492                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15493                                 };
15494                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15495                                         mtr_policy->sub_policys[domain][0];
15496
15497                                 if (i >= MLX5_MTR_RTE_COLORS)
15498                                         return -rte_mtr_error_set(error,
15499                                           ENOTSUP,
15500                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15501                                           NULL,
15502                                           "cannot create policy "
15503                                           "jump action for this color");
15504                                 jump_group =
15505                                 ((const struct rte_flow_action_jump *)
15506                                                         act->conf)->group;
15507                                 if (mlx5_flow_group_to_table(dev, NULL,
15508                                                        jump_group,
15509                                                        &table,
15510                                                        &grp_info, &flow_err))
15511                                         return -rte_mtr_error_set(error,
15512                                         ENOTSUP,
15513                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15514                                         NULL, "cannot setup "
15515                                         "policy jump action");
15516                                 sub_policy->jump_tbl[i] =
15517                                 flow_dv_tbl_resource_get(dev,
15518                                         table, egress,
15519                                         transfer,
15520                                         !!dev_flow.external,
15521                                         NULL, jump_group, 0,
15522                                         0, &flow_err);
15523                                 if
15524                                 (!sub_policy->jump_tbl[i])
15525                                         return  -rte_mtr_error_set(error,
15526                                         ENOTSUP,
15527                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15528                                         NULL, "cannot create jump action.");
15529                                 tbl_data = container_of
15530                                 (sub_policy->jump_tbl[i],
15531                                 struct mlx5_flow_tbl_data_entry, tbl);
15532                                 act_cnt->dr_jump_action[domain] =
15533                                         tbl_data->jump.action;
15534                                 act_cnt->fate_action =
15535                                         MLX5_FLOW_FATE_JUMP;
15536                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15537                                 break;
15538                         }
15539                         /*
15540                          * No need to check meter hierarchy for Y or R colors
15541                          * here since it is done in the validation stage.
15542                          */
15543                         case RTE_FLOW_ACTION_TYPE_METER:
15544                         {
15545                                 const struct rte_flow_action_meter *mtr;
15546                                 struct mlx5_flow_meter_info *next_fm;
15547                                 struct mlx5_flow_meter_policy *next_policy;
15548                                 struct rte_flow_action tag_action;
15549                                 struct mlx5_rte_flow_action_set_tag set_tag;
15550                                 uint32_t next_mtr_idx = 0;
15551
15552                                 mtr = act->conf;
15553                                 next_fm = mlx5_flow_meter_find(priv,
15554                                                         mtr->mtr_id,
15555                                                         &next_mtr_idx);
15556                                 if (!next_fm)
15557                                         return -rte_mtr_error_set(error, EINVAL,
15558                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15559                                                 "Fail to find next meter.");
15560                                 if (next_fm->def_policy)
15561                                         return -rte_mtr_error_set(error, EINVAL,
15562                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15563                                 "Hierarchy only supports termination meter.");
15564                                 next_policy = mlx5_flow_meter_policy_find(dev,
15565                                                 next_fm->policy_id, NULL);
15566                                 MLX5_ASSERT(next_policy);
15567                                 if (next_fm->drop_cnt) {
15568                                         set_tag.id =
15569                                                 (enum modify_reg)
15570                                                 mlx5_flow_get_reg_id(dev,
15571                                                 MLX5_MTR_ID,
15572                                                 0,
15573                                                 (struct rte_flow_error *)error);
15574                                         set_tag.offset = (priv->mtr_reg_share ?
15575                                                 MLX5_MTR_COLOR_BITS : 0);
15576                                         set_tag.length = (priv->mtr_reg_share ?
15577                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15578                                                MLX5_REG_BITS);
15579                                         set_tag.data = next_mtr_idx;
15580                                         tag_action.type =
15581                                                 (enum rte_flow_action_type)
15582                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15583                                         tag_action.conf = &set_tag;
15584                                         if (flow_dv_convert_action_set_reg
15585                                                 (mhdr_res, &tag_action,
15586                                                 (struct rte_flow_error *)error))
15587                                                 return -rte_errno;
15588                                         action_flags |=
15589                                                 MLX5_FLOW_ACTION_SET_TAG;
15590                                 }
15591                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15592                                 act_cnt->next_mtr_id = next_fm->meter_id;
15593                                 act_cnt->next_sub_policy = NULL;
15594                                 mtr_policy->is_hierarchy = 1;
15595                                 mtr_policy->dev = next_policy->dev;
15596                                 action_flags |=
15597                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15598                                 break;
15599                         }
15600                         default:
15601                                 return -rte_mtr_error_set(error, ENOTSUP,
15602                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15603                                           NULL, "action type not supported");
15604                         }
15605                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15606                                 /* create modify action if needed. */
15607                                 dev_flow.dv.group = 1;
15608                                 if (flow_dv_modify_hdr_resource_register
15609                                         (dev, mhdr_res, &dev_flow, &flow_err))
15610                                         return -rte_mtr_error_set(error,
15611                                                 ENOTSUP,
15612                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15613                                                 NULL, "cannot register policy "
15614                                                 "set tag action");
15615                                 act_cnt->modify_hdr =
15616                                         dev_flow.handle->dvh.modify_hdr;
15617                         }
15618                 }
15619         }
15620         return 0;
15621 }
15622
15623 /**
15624  * Create policy action per domain, lock free,
15625  * (mutex should be acquired by caller).
15626  * Dispatcher for action type specific call.
15627  *
15628  * @param[in] dev
15629  *   Pointer to the Ethernet device structure.
15630  * @param[in] mtr_policy
15631  *   Meter policy struct.
15632  * @param[in] action
15633  *   Action specification used to create meter actions.
15634  * @param[out] error
15635  *   Perform verbose error reporting if not NULL. Initialized in case of
15636  *   error only.
15637  *
15638  * @return
15639  *   0 on success, otherwise negative errno value.
15640  */
15641 static int
15642 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15643                       struct mlx5_flow_meter_policy *mtr_policy,
15644                       const struct rte_flow_action *actions[RTE_COLORS],
15645                       struct rte_mtr_error *error)
15646 {
15647         int ret, i;
15648         uint16_t sub_policy_num;
15649
15650         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15651                 sub_policy_num = (mtr_policy->sub_policy_num >>
15652                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15653                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15654                 if (sub_policy_num) {
15655                         ret = __flow_dv_create_domain_policy_acts(dev,
15656                                 mtr_policy, actions,
15657                                 (enum mlx5_meter_domain)i, error);
15658                         /* Cleaning resource is done in the caller level. */
15659                         if (ret)
15660                                 return ret;
15661                 }
15662         }
15663         return 0;
15664 }
15665
15666 /**
15667  * Query a DV flow rule for its statistics via DevX.
15668  *
15669  * @param[in] dev
15670  *   Pointer to Ethernet device.
15671  * @param[in] cnt_idx
15672  *   Index to the flow counter.
15673  * @param[out] data
15674  *   Data retrieved by the query.
15675  * @param[out] error
15676  *   Perform verbose error reporting if not NULL.
15677  *
15678  * @return
15679  *   0 on success, a negative errno value otherwise and rte_errno is set.
15680  */
15681 static int
15682 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15683                     struct rte_flow_error *error)
15684 {
15685         struct mlx5_priv *priv = dev->data->dev_private;
15686         struct rte_flow_query_count *qc = data;
15687
15688         if (!priv->config.devx)
15689                 return rte_flow_error_set(error, ENOTSUP,
15690                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15691                                           NULL,
15692                                           "counters are not supported");
15693         if (cnt_idx) {
15694                 uint64_t pkts, bytes;
15695                 struct mlx5_flow_counter *cnt;
15696                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15697
15698                 if (err)
15699                         return rte_flow_error_set(error, -err,
15700                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15701                                         NULL, "cannot read counters");
15702                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15703                 qc->hits_set = 1;
15704                 qc->bytes_set = 1;
15705                 qc->hits = pkts - cnt->hits;
15706                 qc->bytes = bytes - cnt->bytes;
15707                 if (qc->reset) {
15708                         cnt->hits = pkts;
15709                         cnt->bytes = bytes;
15710                 }
15711                 return 0;
15712         }
15713         return rte_flow_error_set(error, EINVAL,
15714                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15715                                   NULL,
15716                                   "counters are not available");
15717 }
15718
15719 static int
15720 flow_dv_action_query(struct rte_eth_dev *dev,
15721                      const struct rte_flow_action_handle *handle, void *data,
15722                      struct rte_flow_error *error)
15723 {
15724         struct mlx5_age_param *age_param;
15725         struct rte_flow_query_age *resp;
15726         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15727         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15728         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15729         struct mlx5_priv *priv = dev->data->dev_private;
15730         struct mlx5_aso_ct_action *ct;
15731         uint16_t owner;
15732         uint32_t dev_idx;
15733
15734         switch (type) {
15735         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15736                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15737                 resp = data;
15738                 resp->aged = __atomic_load_n(&age_param->state,
15739                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
15740                                                                           1 : 0;
15741                 resp->sec_since_last_hit_valid = !resp->aged;
15742                 if (resp->sec_since_last_hit_valid)
15743                         resp->sec_since_last_hit = __atomic_load_n
15744                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15745                 return 0;
15746         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15747                 return flow_dv_query_count(dev, idx, data, error);
15748         case MLX5_INDIRECT_ACTION_TYPE_CT:
15749                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15750                 if (owner != PORT_ID(priv))
15751                         return rte_flow_error_set(error, EACCES,
15752                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15753                                         NULL,
15754                                         "CT object owned by another port");
15755                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15756                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15757                 MLX5_ASSERT(ct);
15758                 if (!ct->refcnt)
15759                         return rte_flow_error_set(error, EFAULT,
15760                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15761                                         NULL,
15762                                         "CT object is inactive");
15763                 ((struct rte_flow_action_conntrack *)data)->peer_port =
15764                                                         ct->peer;
15765                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15766                                                         ct->is_original;
15767                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15768                         return rte_flow_error_set(error, EIO,
15769                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15770                                         NULL,
15771                                         "Failed to query CT context");
15772                 return 0;
15773         default:
15774                 return rte_flow_error_set(error, ENOTSUP,
15775                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15776                                           "action type query not supported");
15777         }
15778 }
15779
15780 /**
15781  * Query a flow rule AGE action for aging information.
15782  *
15783  * @param[in] dev
15784  *   Pointer to Ethernet device.
15785  * @param[in] flow
15786  *   Pointer to the sub flow.
15787  * @param[out] data
15788  *   data retrieved by the query.
15789  * @param[out] error
15790  *   Perform verbose error reporting if not NULL.
15791  *
15792  * @return
15793  *   0 on success, a negative errno value otherwise and rte_errno is set.
15794  */
15795 static int
15796 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15797                   void *data, struct rte_flow_error *error)
15798 {
15799         struct rte_flow_query_age *resp = data;
15800         struct mlx5_age_param *age_param;
15801
15802         if (flow->age) {
15803                 struct mlx5_aso_age_action *act =
15804                                      flow_aso_age_get_by_idx(dev, flow->age);
15805
15806                 age_param = &act->age_params;
15807         } else if (flow->counter) {
15808                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15809
15810                 if (!age_param || !age_param->timeout)
15811                         return rte_flow_error_set
15812                                         (error, EINVAL,
15813                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15814                                          NULL, "cannot read age data");
15815         } else {
15816                 return rte_flow_error_set(error, EINVAL,
15817                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15818                                           NULL, "age data not available");
15819         }
15820         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15821                                      AGE_TMOUT ? 1 : 0;
15822         resp->sec_since_last_hit_valid = !resp->aged;
15823         if (resp->sec_since_last_hit_valid)
15824                 resp->sec_since_last_hit = __atomic_load_n
15825                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15826         return 0;
15827 }
15828
15829 /**
15830  * Query a flow.
15831  *
15832  * @see rte_flow_query()
15833  * @see rte_flow_ops
15834  */
15835 static int
15836 flow_dv_query(struct rte_eth_dev *dev,
15837               struct rte_flow *flow __rte_unused,
15838               const struct rte_flow_action *actions __rte_unused,
15839               void *data __rte_unused,
15840               struct rte_flow_error *error __rte_unused)
15841 {
15842         int ret = -EINVAL;
15843
15844         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15845                 switch (actions->type) {
15846                 case RTE_FLOW_ACTION_TYPE_VOID:
15847                         break;
15848                 case RTE_FLOW_ACTION_TYPE_COUNT:
15849                         ret = flow_dv_query_count(dev, flow->counter, data,
15850                                                   error);
15851                         break;
15852                 case RTE_FLOW_ACTION_TYPE_AGE:
15853                         ret = flow_dv_query_age(dev, flow, data, error);
15854                         break;
15855                 default:
15856                         return rte_flow_error_set(error, ENOTSUP,
15857                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15858                                                   actions,
15859                                                   "action not supported");
15860                 }
15861         }
15862         return ret;
15863 }
15864
15865 /**
15866  * Destroy the meter table set.
15867  * Lock free, (mutex should be acquired by caller).
15868  *
15869  * @param[in] dev
15870  *   Pointer to Ethernet device.
15871  * @param[in] fm
15872  *   Meter information table.
15873  */
15874 static void
15875 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15876                         struct mlx5_flow_meter_info *fm)
15877 {
15878         struct mlx5_priv *priv = dev->data->dev_private;
15879         int i;
15880
15881         if (!fm || !priv->config.dv_flow_en)
15882                 return;
15883         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15884                 if (fm->drop_rule[i]) {
15885                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15886                         fm->drop_rule[i] = NULL;
15887                 }
15888         }
15889 }
15890
15891 static void
15892 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15893 {
15894         struct mlx5_priv *priv = dev->data->dev_private;
15895         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15896         struct mlx5_flow_tbl_data_entry *tbl;
15897         int i, j;
15898
15899         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15900                 if (mtrmng->def_rule[i]) {
15901                         claim_zero(mlx5_flow_os_destroy_flow
15902                                         (mtrmng->def_rule[i]));
15903                         mtrmng->def_rule[i] = NULL;
15904                 }
15905                 if (mtrmng->def_matcher[i]) {
15906                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
15907                                 struct mlx5_flow_tbl_data_entry, tbl);
15908                         mlx5_list_unregister(tbl->matchers,
15909                                              &mtrmng->def_matcher[i]->entry);
15910                         mtrmng->def_matcher[i] = NULL;
15911                 }
15912                 for (j = 0; j < MLX5_REG_BITS; j++) {
15913                         if (mtrmng->drop_matcher[i][j]) {
15914                                 tbl =
15915                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
15916                                              struct mlx5_flow_tbl_data_entry,
15917                                              tbl);
15918                                 mlx5_list_unregister(tbl->matchers,
15919                                             &mtrmng->drop_matcher[i][j]->entry);
15920                                 mtrmng->drop_matcher[i][j] = NULL;
15921                         }
15922                 }
15923                 if (mtrmng->drop_tbl[i]) {
15924                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15925                                 mtrmng->drop_tbl[i]);
15926                         mtrmng->drop_tbl[i] = NULL;
15927                 }
15928         }
15929 }
15930
15931 /* Number of meter flow actions, count and jump or count and drop. */
15932 #define METER_ACTIONS 2
15933
15934 static void
15935 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15936                                     enum mlx5_meter_domain domain)
15937 {
15938         struct mlx5_priv *priv = dev->data->dev_private;
15939         struct mlx5_flow_meter_def_policy *def_policy =
15940                         priv->sh->mtrmng->def_policy[domain];
15941
15942         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15943         mlx5_free(def_policy);
15944         priv->sh->mtrmng->def_policy[domain] = NULL;
15945 }
15946
15947 /**
15948  * Destroy the default policy table set.
15949  *
15950  * @param[in] dev
15951  *   Pointer to Ethernet device.
15952  */
15953 static void
15954 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15955 {
15956         struct mlx5_priv *priv = dev->data->dev_private;
15957         int i;
15958
15959         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15960                 if (priv->sh->mtrmng->def_policy[i])
15961                         __flow_dv_destroy_domain_def_policy(dev,
15962                                         (enum mlx5_meter_domain)i);
15963         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15964 }
15965
15966 static int
15967 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15968                         uint32_t color_reg_c_idx,
15969                         enum rte_color color, void *matcher_object,
15970                         int actions_n, void *actions,
15971                         bool match_src_port, const struct rte_flow_item *item,
15972                         void **rule, const struct rte_flow_attr *attr)
15973 {
15974         int ret;
15975         struct mlx5_flow_dv_match_params value = {
15976                 .size = sizeof(value.buf),
15977         };
15978         struct mlx5_flow_dv_match_params matcher = {
15979                 .size = sizeof(matcher.buf),
15980         };
15981         struct mlx5_priv *priv = dev->data->dev_private;
15982         uint8_t misc_mask;
15983
15984         if (match_src_port && (priv->representor || priv->master)) {
15985                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15986                                                    value.buf, item, attr)) {
15987                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
15988                                 " value with port.", color);
15989                         return -1;
15990                 }
15991         }
15992         flow_dv_match_meta_reg(matcher.buf, value.buf,
15993                                (enum modify_reg)color_reg_c_idx,
15994                                rte_col_2_mlx5_col(color), UINT32_MAX);
15995         misc_mask = flow_dv_matcher_enable(value.buf);
15996         __flow_dv_adjust_buf_size(&value.size, misc_mask);
15997         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
15998                                        actions_n, actions, rule);
15999         if (ret) {
16000                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16001                 return -1;
16002         }
16003         return 0;
16004 }
16005
16006 static int
16007 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16008                         uint32_t color_reg_c_idx,
16009                         uint16_t priority,
16010                         struct mlx5_flow_meter_sub_policy *sub_policy,
16011                         const struct rte_flow_attr *attr,
16012                         bool match_src_port,
16013                         const struct rte_flow_item *item,
16014                         struct mlx5_flow_dv_matcher **policy_matcher,
16015                         struct rte_flow_error *error)
16016 {
16017         struct mlx5_list_entry *entry;
16018         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16019         struct mlx5_flow_dv_matcher matcher = {
16020                 .mask = {
16021                         .size = sizeof(matcher.mask.buf),
16022                 },
16023                 .tbl = tbl_rsc,
16024         };
16025         struct mlx5_flow_dv_match_params value = {
16026                 .size = sizeof(value.buf),
16027         };
16028         struct mlx5_flow_cb_ctx ctx = {
16029                 .error = error,
16030                 .data = &matcher,
16031         };
16032         struct mlx5_flow_tbl_data_entry *tbl_data;
16033         struct mlx5_priv *priv = dev->data->dev_private;
16034         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16035
16036         if (match_src_port && (priv->representor || priv->master)) {
16037                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16038                                                    value.buf, item, attr)) {
16039                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16040                                 " with port.", priority);
16041                         return -1;
16042                 }
16043         }
16044         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16045         if (priority < RTE_COLOR_RED)
16046                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16047                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16048         matcher.priority = priority;
16049         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16050                                     matcher.mask.size);
16051         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16052         if (!entry) {
16053                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16054                 return -1;
16055         }
16056         *policy_matcher =
16057                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16058         return 0;
16059 }
16060
16061 /**
16062  * Create the policy rules per domain.
16063  *
16064  * @param[in] dev
16065  *   Pointer to Ethernet device.
16066  * @param[in] sub_policy
16067  *    Pointer to sub policy table..
16068  * @param[in] egress
16069  *   Direction of the table.
16070  * @param[in] transfer
16071  *   E-Switch or NIC flow.
16072  * @param[in] acts
16073  *   Pointer to policy action list per color.
16074  *
16075  * @return
16076  *   0 on success, -1 otherwise.
16077  */
16078 static int
16079 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16080                 struct mlx5_flow_meter_sub_policy *sub_policy,
16081                 uint8_t egress, uint8_t transfer, bool match_src_port,
16082                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16083 {
16084         struct mlx5_priv *priv = dev->data->dev_private;
16085         struct rte_flow_error flow_err;
16086         uint32_t color_reg_c_idx;
16087         struct rte_flow_attr attr = {
16088                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16089                 .priority = 0,
16090                 .ingress = 0,
16091                 .egress = !!egress,
16092                 .transfer = !!transfer,
16093                 .reserved = 0,
16094         };
16095         int i;
16096         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16097         struct mlx5_sub_policy_color_rule *color_rule;
16098         bool svport_match;
16099         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16100
16101         if (ret < 0)
16102                 return -1;
16103         /* Create policy table with POLICY level. */
16104         if (!sub_policy->tbl_rsc)
16105                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16106                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16107                                 egress, transfer, false, NULL, 0, 0,
16108                                 sub_policy->idx, &flow_err);
16109         if (!sub_policy->tbl_rsc) {
16110                 DRV_LOG(ERR,
16111                         "Failed to create meter sub policy table.");
16112                 return -1;
16113         }
16114         /* Prepare matchers. */
16115         color_reg_c_idx = ret;
16116         for (i = 0; i < RTE_COLORS; i++) {
16117                 TAILQ_INIT(&sub_policy->color_rules[i]);
16118                 if (!acts[i].actions_n)
16119                         continue;
16120                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16121                                 sizeof(struct mlx5_sub_policy_color_rule),
16122                                 0, SOCKET_ID_ANY);
16123                 if (!color_rule) {
16124                         DRV_LOG(ERR, "No memory to create color rule.");
16125                         goto err_exit;
16126                 }
16127                 tmp_rules[i] = color_rule;
16128                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16129                                   color_rule, next_port);
16130                 color_rule->src_port = priv->representor_id;
16131                 /* No use. */
16132                 attr.priority = i;
16133                 /* Create matchers for colors. */
16134                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16135                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16136                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16137                                 &attr, svport_match, NULL,
16138                                 &color_rule->matcher, &flow_err)) {
16139                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16140                         goto err_exit;
16141                 }
16142                 /* Create flow, matching color. */
16143                 if (__flow_dv_create_policy_flow(dev,
16144                                 color_reg_c_idx, (enum rte_color)i,
16145                                 color_rule->matcher->matcher_object,
16146                                 acts[i].actions_n, acts[i].dv_actions,
16147                                 svport_match, NULL, &color_rule->rule,
16148                                 &attr)) {
16149                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16150                         goto err_exit;
16151                 }
16152         }
16153         return 0;
16154 err_exit:
16155         /* All the policy rules will be cleared. */
16156         do {
16157                 color_rule = tmp_rules[i];
16158                 if (color_rule) {
16159                         if (color_rule->rule)
16160                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16161                         if (color_rule->matcher) {
16162                                 struct mlx5_flow_tbl_data_entry *tbl =
16163                                         container_of(color_rule->matcher->tbl,
16164                                                      typeof(*tbl), tbl);
16165                                 mlx5_list_unregister(tbl->matchers,
16166                                                 &color_rule->matcher->entry);
16167                         }
16168                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16169                                      color_rule, next_port);
16170                         mlx5_free(color_rule);
16171                 }
16172         } while (i--);
16173         return -1;
16174 }
16175
16176 static int
16177 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16178                         struct mlx5_flow_meter_policy *mtr_policy,
16179                         struct mlx5_flow_meter_sub_policy *sub_policy,
16180                         uint32_t domain)
16181 {
16182         struct mlx5_priv *priv = dev->data->dev_private;
16183         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16184         struct mlx5_flow_dv_tag_resource *tag;
16185         struct mlx5_flow_dv_port_id_action_resource *port_action;
16186         struct mlx5_hrxq *hrxq;
16187         struct mlx5_flow_meter_info *next_fm = NULL;
16188         struct mlx5_flow_meter_policy *next_policy;
16189         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16190         struct mlx5_flow_tbl_data_entry *tbl_data;
16191         struct rte_flow_error error;
16192         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16193         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16194         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16195         bool match_src_port = false;
16196         int i;
16197
16198         /* If RSS or Queue, no previous actions / rules is created. */
16199         for (i = 0; i < RTE_COLORS; i++) {
16200                 acts[i].actions_n = 0;
16201                 if (i == RTE_COLOR_RED) {
16202                         /* Only support drop on red. */
16203                         acts[i].dv_actions[0] =
16204                                 mtr_policy->dr_drop_action[domain];
16205                         acts[i].actions_n = 1;
16206                         continue;
16207                 }
16208                 if (i == RTE_COLOR_GREEN &&
16209                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16210                         struct rte_flow_attr attr = {
16211                                 .transfer = transfer
16212                         };
16213
16214                         next_fm = mlx5_flow_meter_find(priv,
16215                                         mtr_policy->act_cnt[i].next_mtr_id,
16216                                         NULL);
16217                         if (!next_fm) {
16218                                 DRV_LOG(ERR,
16219                                         "Failed to get next hierarchy meter.");
16220                                 goto err_exit;
16221                         }
16222                         if (mlx5_flow_meter_attach(priv, next_fm,
16223                                                    &attr, &error)) {
16224                                 DRV_LOG(ERR, "%s", error.message);
16225                                 next_fm = NULL;
16226                                 goto err_exit;
16227                         }
16228                         /* Meter action must be the first for TX. */
16229                         if (mtr_first) {
16230                                 acts[i].dv_actions[acts[i].actions_n] =
16231                                         next_fm->meter_action;
16232                                 acts[i].actions_n++;
16233                         }
16234                 }
16235                 if (mtr_policy->act_cnt[i].rix_mark) {
16236                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16237                                         mtr_policy->act_cnt[i].rix_mark);
16238                         if (!tag) {
16239                                 DRV_LOG(ERR, "Failed to find "
16240                                 "mark action for policy.");
16241                                 goto err_exit;
16242                         }
16243                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16244                         acts[i].actions_n++;
16245                 }
16246                 if (mtr_policy->act_cnt[i].modify_hdr) {
16247                         acts[i].dv_actions[acts[i].actions_n] =
16248                                 mtr_policy->act_cnt[i].modify_hdr->action;
16249                         acts[i].actions_n++;
16250                 }
16251                 if (mtr_policy->act_cnt[i].fate_action) {
16252                         switch (mtr_policy->act_cnt[i].fate_action) {
16253                         case MLX5_FLOW_FATE_PORT_ID:
16254                                 port_action = mlx5_ipool_get
16255                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16256                                 mtr_policy->act_cnt[i].rix_port_id_action);
16257                                 if (!port_action) {
16258                                         DRV_LOG(ERR, "Failed to find "
16259                                                 "port action for policy.");
16260                                         goto err_exit;
16261                                 }
16262                                 acts[i].dv_actions[acts[i].actions_n] =
16263                                         port_action->action;
16264                                 acts[i].actions_n++;
16265                                 mtr_policy->dev = dev;
16266                                 match_src_port = true;
16267                                 break;
16268                         case MLX5_FLOW_FATE_DROP:
16269                         case MLX5_FLOW_FATE_JUMP:
16270                                 acts[i].dv_actions[acts[i].actions_n] =
16271                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16272                                 acts[i].actions_n++;
16273                                 break;
16274                         case MLX5_FLOW_FATE_SHARED_RSS:
16275                         case MLX5_FLOW_FATE_QUEUE:
16276                                 hrxq = mlx5_ipool_get
16277                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16278                                          sub_policy->rix_hrxq[i]);
16279                                 if (!hrxq) {
16280                                         DRV_LOG(ERR, "Failed to find "
16281                                                 "queue action for policy.");
16282                                         goto err_exit;
16283                                 }
16284                                 acts[i].dv_actions[acts[i].actions_n] =
16285                                         hrxq->action;
16286                                 acts[i].actions_n++;
16287                                 break;
16288                         case MLX5_FLOW_FATE_MTR:
16289                                 if (!next_fm) {
16290                                         DRV_LOG(ERR,
16291                                                 "No next hierarchy meter.");
16292                                         goto err_exit;
16293                                 }
16294                                 if (!mtr_first) {
16295                                         acts[i].dv_actions[acts[i].actions_n] =
16296                                                         next_fm->meter_action;
16297                                         acts[i].actions_n++;
16298                                 }
16299                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16300                                         next_sub_policy =
16301                                         mtr_policy->act_cnt[i].next_sub_policy;
16302                                 } else {
16303                                         next_policy =
16304                                                 mlx5_flow_meter_policy_find(dev,
16305                                                 next_fm->policy_id, NULL);
16306                                         MLX5_ASSERT(next_policy);
16307                                         next_sub_policy =
16308                                         next_policy->sub_policys[domain][0];
16309                                 }
16310                                 tbl_data =
16311                                         container_of(next_sub_policy->tbl_rsc,
16312                                         struct mlx5_flow_tbl_data_entry, tbl);
16313                                 acts[i].dv_actions[acts[i].actions_n++] =
16314                                                         tbl_data->jump.action;
16315                                 if (mtr_policy->act_cnt[i].modify_hdr)
16316                                         match_src_port = !!transfer;
16317                                 break;
16318                         default:
16319                                 /*Queue action do nothing*/
16320                                 break;
16321                         }
16322                 }
16323         }
16324         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16325                                 egress, transfer, match_src_port, acts)) {
16326                 DRV_LOG(ERR,
16327                         "Failed to create policy rules per domain.");
16328                 goto err_exit;
16329         }
16330         return 0;
16331 err_exit:
16332         if (next_fm)
16333                 mlx5_flow_meter_detach(priv, next_fm);
16334         return -1;
16335 }
16336
16337 /**
16338  * Create the policy rules.
16339  *
16340  * @param[in] dev
16341  *   Pointer to Ethernet device.
16342  * @param[in,out] mtr_policy
16343  *   Pointer to meter policy table.
16344  *
16345  * @return
16346  *   0 on success, -1 otherwise.
16347  */
16348 static int
16349 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16350                              struct mlx5_flow_meter_policy *mtr_policy)
16351 {
16352         int i;
16353         uint16_t sub_policy_num;
16354
16355         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16356                 sub_policy_num = (mtr_policy->sub_policy_num >>
16357                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16358                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16359                 if (!sub_policy_num)
16360                         continue;
16361                 /* Prepare actions list and create policy rules. */
16362                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16363                         mtr_policy->sub_policys[i][0], i)) {
16364                         DRV_LOG(ERR, "Failed to create policy action "
16365                                 "list per domain.");
16366                         return -1;
16367                 }
16368         }
16369         return 0;
16370 }
16371
16372 static int
16373 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16374 {
16375         struct mlx5_priv *priv = dev->data->dev_private;
16376         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16377         struct mlx5_flow_meter_def_policy *def_policy;
16378         struct mlx5_flow_tbl_resource *jump_tbl;
16379         struct mlx5_flow_tbl_data_entry *tbl_data;
16380         uint8_t egress, transfer;
16381         struct rte_flow_error error;
16382         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16383         int ret;
16384
16385         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16386         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16387         def_policy = mtrmng->def_policy[domain];
16388         if (!def_policy) {
16389                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16390                         sizeof(struct mlx5_flow_meter_def_policy),
16391                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16392                 if (!def_policy) {
16393                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16394                         goto def_policy_error;
16395                 }
16396                 mtrmng->def_policy[domain] = def_policy;
16397                 /* Create the meter suffix table with SUFFIX level. */
16398                 jump_tbl = flow_dv_tbl_resource_get(dev,
16399                                 MLX5_FLOW_TABLE_LEVEL_METER,
16400                                 egress, transfer, false, NULL, 0,
16401                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16402                 if (!jump_tbl) {
16403                         DRV_LOG(ERR,
16404                                 "Failed to create meter suffix table.");
16405                         goto def_policy_error;
16406                 }
16407                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16408                 tbl_data = container_of(jump_tbl,
16409                                         struct mlx5_flow_tbl_data_entry, tbl);
16410                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16411                                                 tbl_data->jump.action;
16412                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16413                 acts[RTE_COLOR_GREEN].actions_n = 1;
16414                 /*
16415                  * YELLOW has the same default policy as GREEN does.
16416                  * G & Y share the same table and action. The 2nd time of table
16417                  * resource getting is just to update the reference count for
16418                  * the releasing stage.
16419                  */
16420                 jump_tbl = flow_dv_tbl_resource_get(dev,
16421                                 MLX5_FLOW_TABLE_LEVEL_METER,
16422                                 egress, transfer, false, NULL, 0,
16423                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16424                 if (!jump_tbl) {
16425                         DRV_LOG(ERR,
16426                                 "Failed to get meter suffix table.");
16427                         goto def_policy_error;
16428                 }
16429                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16430                 tbl_data = container_of(jump_tbl,
16431                                         struct mlx5_flow_tbl_data_entry, tbl);
16432                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16433                                                 tbl_data->jump.action;
16434                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16435                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16436                 /* Create jump action to the drop table. */
16437                 if (!mtrmng->drop_tbl[domain]) {
16438                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16439                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16440                                  egress, transfer, false, NULL, 0,
16441                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16442                         if (!mtrmng->drop_tbl[domain]) {
16443                                 DRV_LOG(ERR, "Failed to create meter "
16444                                         "drop table for default policy.");
16445                                 goto def_policy_error;
16446                         }
16447                 }
16448                 /* all RED: unique Drop table for jump action. */
16449                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16450                                         struct mlx5_flow_tbl_data_entry, tbl);
16451                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16452                                                 tbl_data->jump.action;
16453                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16454                 acts[RTE_COLOR_RED].actions_n = 1;
16455                 /* Create default policy rules. */
16456                 ret = __flow_dv_create_domain_policy_rules(dev,
16457                                         &def_policy->sub_policy,
16458                                         egress, transfer, false, acts);
16459                 if (ret) {
16460                         DRV_LOG(ERR, "Failed to create default policy rules.");
16461                         goto def_policy_error;
16462                 }
16463         }
16464         return 0;
16465 def_policy_error:
16466         __flow_dv_destroy_domain_def_policy(dev,
16467                                             (enum mlx5_meter_domain)domain);
16468         return -1;
16469 }
16470
16471 /**
16472  * Create the default policy table set.
16473  *
16474  * @param[in] dev
16475  *   Pointer to Ethernet device.
16476  * @return
16477  *   0 on success, -1 otherwise.
16478  */
16479 static int
16480 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16481 {
16482         struct mlx5_priv *priv = dev->data->dev_private;
16483         int i;
16484
16485         /* Non-termination policy table. */
16486         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16487                 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16488                         continue;
16489                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16490                         DRV_LOG(ERR, "Failed to create default policy");
16491                         /* Rollback the created default policies for others. */
16492                         flow_dv_destroy_def_policy(dev);
16493                         return -1;
16494                 }
16495         }
16496         return 0;
16497 }
16498
16499 /**
16500  * Create the needed meter tables.
16501  * Lock free, (mutex should be acquired by caller).
16502  *
16503  * @param[in] dev
16504  *   Pointer to Ethernet device.
16505  * @param[in] fm
16506  *   Meter information table.
16507  * @param[in] mtr_idx
16508  *   Meter index.
16509  * @param[in] domain_bitmap
16510  *   Domain bitmap.
16511  * @return
16512  *   0 on success, -1 otherwise.
16513  */
16514 static int
16515 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16516                         struct mlx5_flow_meter_info *fm,
16517                         uint32_t mtr_idx,
16518                         uint8_t domain_bitmap)
16519 {
16520         struct mlx5_priv *priv = dev->data->dev_private;
16521         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16522         struct rte_flow_error error;
16523         struct mlx5_flow_tbl_data_entry *tbl_data;
16524         uint8_t egress, transfer;
16525         void *actions[METER_ACTIONS];
16526         int domain, ret, i;
16527         struct mlx5_flow_counter *cnt;
16528         struct mlx5_flow_dv_match_params value = {
16529                 .size = sizeof(value.buf),
16530         };
16531         struct mlx5_flow_dv_match_params matcher_para = {
16532                 .size = sizeof(matcher_para.buf),
16533         };
16534         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16535                                                      0, &error);
16536         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16537         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16538         struct mlx5_list_entry *entry;
16539         struct mlx5_flow_dv_matcher matcher = {
16540                 .mask = {
16541                         .size = sizeof(matcher.mask.buf),
16542                 },
16543         };
16544         struct mlx5_flow_dv_matcher *drop_matcher;
16545         struct mlx5_flow_cb_ctx ctx = {
16546                 .error = &error,
16547                 .data = &matcher,
16548         };
16549         uint8_t misc_mask;
16550
16551         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16552                 rte_errno = ENOTSUP;
16553                 return -1;
16554         }
16555         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16556                 if (!(domain_bitmap & (1 << domain)) ||
16557                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16558                         continue;
16559                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16560                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16561                 /* Create the drop table with METER DROP level. */
16562                 if (!mtrmng->drop_tbl[domain]) {
16563                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16564                                         MLX5_FLOW_TABLE_LEVEL_METER,
16565                                         egress, transfer, false, NULL, 0,
16566                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16567                         if (!mtrmng->drop_tbl[domain]) {
16568                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16569                                 goto policy_error;
16570                         }
16571                 }
16572                 /* Create default matcher in drop table. */
16573                 matcher.tbl = mtrmng->drop_tbl[domain],
16574                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16575                                 struct mlx5_flow_tbl_data_entry, tbl);
16576                 if (!mtrmng->def_matcher[domain]) {
16577                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16578                                        (enum modify_reg)mtr_id_reg_c,
16579                                        0, 0);
16580                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16581                         matcher.crc = rte_raw_cksum
16582                                         ((const void *)matcher.mask.buf,
16583                                         matcher.mask.size);
16584                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16585                         if (!entry) {
16586                                 DRV_LOG(ERR, "Failed to register meter "
16587                                 "drop default matcher.");
16588                                 goto policy_error;
16589                         }
16590                         mtrmng->def_matcher[domain] = container_of(entry,
16591                         struct mlx5_flow_dv_matcher, entry);
16592                 }
16593                 /* Create default rule in drop table. */
16594                 if (!mtrmng->def_rule[domain]) {
16595                         i = 0;
16596                         actions[i++] = priv->sh->dr_drop_action;
16597                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16598                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16599                         misc_mask = flow_dv_matcher_enable(value.buf);
16600                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16601                         ret = mlx5_flow_os_create_flow
16602                                 (mtrmng->def_matcher[domain]->matcher_object,
16603                                 (void *)&value, i, actions,
16604                                 &mtrmng->def_rule[domain]);
16605                         if (ret) {
16606                                 DRV_LOG(ERR, "Failed to create meter "
16607                                 "default drop rule for drop table.");
16608                                 goto policy_error;
16609                         }
16610                 }
16611                 if (!fm->drop_cnt)
16612                         continue;
16613                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16614                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16615                         /* Create matchers for Drop. */
16616                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16617                                         (enum modify_reg)mtr_id_reg_c, 0,
16618                                         (mtr_id_mask << mtr_id_offset));
16619                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16620                         matcher.crc = rte_raw_cksum
16621                                         ((const void *)matcher.mask.buf,
16622                                         matcher.mask.size);
16623                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16624                         if (!entry) {
16625                                 DRV_LOG(ERR,
16626                                 "Failed to register meter drop matcher.");
16627                                 goto policy_error;
16628                         }
16629                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16630                                 container_of(entry, struct mlx5_flow_dv_matcher,
16631                                              entry);
16632                 }
16633                 drop_matcher =
16634                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16635                 /* Create drop rule, matching meter_id only. */
16636                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16637                                 (enum modify_reg)mtr_id_reg_c,
16638                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16639                 i = 0;
16640                 cnt = flow_dv_counter_get_by_idx(dev,
16641                                         fm->drop_cnt, NULL);
16642                 actions[i++] = cnt->action;
16643                 actions[i++] = priv->sh->dr_drop_action;
16644                 misc_mask = flow_dv_matcher_enable(value.buf);
16645                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16646                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16647                                                (void *)&value, i, actions,
16648                                                &fm->drop_rule[domain]);
16649                 if (ret) {
16650                         DRV_LOG(ERR, "Failed to create meter "
16651                                 "drop rule for drop table.");
16652                                 goto policy_error;
16653                 }
16654         }
16655         return 0;
16656 policy_error:
16657         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16658                 if (fm->drop_rule[i]) {
16659                         claim_zero(mlx5_flow_os_destroy_flow
16660                                 (fm->drop_rule[i]));
16661                         fm->drop_rule[i] = NULL;
16662                 }
16663         }
16664         return -1;
16665 }
16666
16667 static struct mlx5_flow_meter_sub_policy *
16668 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16669                 struct mlx5_flow_meter_policy *mtr_policy,
16670                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16671                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16672                 bool *is_reuse)
16673 {
16674         struct mlx5_priv *priv = dev->data->dev_private;
16675         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16676         uint32_t sub_policy_idx = 0;
16677         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16678         uint32_t i, j;
16679         struct mlx5_hrxq *hrxq;
16680         struct mlx5_flow_handle dh;
16681         struct mlx5_meter_policy_action_container *act_cnt;
16682         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16683         uint16_t sub_policy_num;
16684
16685         rte_spinlock_lock(&mtr_policy->sl);
16686         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16687                 if (!rss_desc[i])
16688                         continue;
16689                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16690                 if (!hrxq_idx[i]) {
16691                         rte_spinlock_unlock(&mtr_policy->sl);
16692                         return NULL;
16693                 }
16694         }
16695         sub_policy_num = (mtr_policy->sub_policy_num >>
16696                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16697                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16698         for (j = 0; j < sub_policy_num; j++) {
16699                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16700                         if (rss_desc[i] &&
16701                             hrxq_idx[i] !=
16702                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16703                                 break;
16704                 }
16705                 if (i >= MLX5_MTR_RTE_COLORS) {
16706                         /*
16707                          * Found the sub policy table with
16708                          * the same queue per color.
16709                          */
16710                         rte_spinlock_unlock(&mtr_policy->sl);
16711                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16712                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16713                         *is_reuse = true;
16714                         return mtr_policy->sub_policys[domain][j];
16715                 }
16716         }
16717         /* Create sub policy. */
16718         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16719                 /* Reuse the first pre-allocated sub_policy. */
16720                 sub_policy = mtr_policy->sub_policys[domain][0];
16721                 sub_policy_idx = sub_policy->idx;
16722         } else {
16723                 sub_policy = mlx5_ipool_zmalloc
16724                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16725                                  &sub_policy_idx);
16726                 if (!sub_policy ||
16727                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16728                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16729                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16730                         goto rss_sub_policy_error;
16731                 }
16732                 sub_policy->idx = sub_policy_idx;
16733                 sub_policy->main_policy = mtr_policy;
16734         }
16735         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16736                 if (!rss_desc[i])
16737                         continue;
16738                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16739                 if (mtr_policy->is_hierarchy) {
16740                         act_cnt = &mtr_policy->act_cnt[i];
16741                         act_cnt->next_sub_policy = next_sub_policy;
16742                         mlx5_hrxq_release(dev, hrxq_idx[i]);
16743                 } else {
16744                         /*
16745                          * Overwrite the last action from
16746                          * RSS action to Queue action.
16747                          */
16748                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16749                                               hrxq_idx[i]);
16750                         if (!hrxq) {
16751                                 DRV_LOG(ERR, "Failed to get policy hrxq");
16752                                 goto rss_sub_policy_error;
16753                         }
16754                         act_cnt = &mtr_policy->act_cnt[i];
16755                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16756                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16757                                 if (act_cnt->rix_mark)
16758                                         dh.mark = 1;
16759                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16760                                 dh.rix_hrxq = hrxq_idx[i];
16761                                 flow_drv_rxq_flags_set(dev, &dh);
16762                         }
16763                 }
16764         }
16765         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16766                                                sub_policy, domain)) {
16767                 DRV_LOG(ERR, "Failed to create policy "
16768                         "rules for ingress domain.");
16769                 goto rss_sub_policy_error;
16770         }
16771         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16772                 i = (mtr_policy->sub_policy_num >>
16773                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16774                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16775                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16776                         DRV_LOG(ERR, "No free sub-policy slot.");
16777                         goto rss_sub_policy_error;
16778                 }
16779                 mtr_policy->sub_policys[domain][i] = sub_policy;
16780                 i++;
16781                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16782                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16783                 mtr_policy->sub_policy_num |=
16784                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16785                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16786         }
16787         rte_spinlock_unlock(&mtr_policy->sl);
16788         *is_reuse = false;
16789         return sub_policy;
16790 rss_sub_policy_error:
16791         if (sub_policy) {
16792                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16793                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16794                         i = (mtr_policy->sub_policy_num >>
16795                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16796                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16797                         mtr_policy->sub_policys[domain][i] = NULL;
16798                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16799                                         sub_policy->idx);
16800                 }
16801         }
16802         rte_spinlock_unlock(&mtr_policy->sl);
16803         return NULL;
16804 }
16805
16806 /**
16807  * Find the policy table for prefix table with RSS.
16808  *
16809  * @param[in] dev
16810  *   Pointer to Ethernet device.
16811  * @param[in] mtr_policy
16812  *   Pointer to meter policy table.
16813  * @param[in] rss_desc
16814  *   Pointer to rss_desc
16815  * @return
16816  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
16817  */
16818 static struct mlx5_flow_meter_sub_policy *
16819 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16820                 struct mlx5_flow_meter_policy *mtr_policy,
16821                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16822 {
16823         struct mlx5_priv *priv = dev->data->dev_private;
16824         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16825         struct mlx5_flow_meter_info *next_fm;
16826         struct mlx5_flow_meter_policy *next_policy;
16827         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16828         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16829         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16830         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16831         bool reuse_sub_policy;
16832         uint32_t i = 0;
16833         uint32_t j = 0;
16834
16835         while (true) {
16836                 /* Iterate hierarchy to get all policies in this hierarchy. */
16837                 policies[i++] = mtr_policy;
16838                 if (!mtr_policy->is_hierarchy)
16839                         break;
16840                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16841                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16842                         return NULL;
16843                 }
16844                 next_fm = mlx5_flow_meter_find(priv,
16845                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16846                 if (!next_fm) {
16847                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16848                         return NULL;
16849                 }
16850                 next_policy =
16851                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16852                                                     NULL);
16853                 MLX5_ASSERT(next_policy);
16854                 mtr_policy = next_policy;
16855         }
16856         while (i) {
16857                 /**
16858                  * From last policy to the first one in hierarchy,
16859                  * create / get the sub policy for each of them.
16860                  */
16861                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16862                                                         policies[--i],
16863                                                         rss_desc,
16864                                                         next_sub_policy,
16865                                                         &reuse_sub_policy);
16866                 if (!sub_policy) {
16867                         DRV_LOG(ERR, "Failed to get the sub policy.");
16868                         goto err_exit;
16869                 }
16870                 if (!reuse_sub_policy)
16871                         sub_policies[j++] = sub_policy;
16872                 next_sub_policy = sub_policy;
16873         }
16874         return sub_policy;
16875 err_exit:
16876         while (j) {
16877                 uint16_t sub_policy_num;
16878
16879                 sub_policy = sub_policies[--j];
16880                 mtr_policy = sub_policy->main_policy;
16881                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16882                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16883                         sub_policy_num = (mtr_policy->sub_policy_num >>
16884                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16885                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
16886                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16887                                                                         NULL;
16888                         sub_policy_num--;
16889                         mtr_policy->sub_policy_num &=
16890                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16891                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16892                         mtr_policy->sub_policy_num |=
16893                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16894                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16895                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16896                                         sub_policy->idx);
16897                 }
16898         }
16899         return NULL;
16900 }
16901
16902 /**
16903  * Create the sub policy tag rule for all meters in hierarchy.
16904  *
16905  * @param[in] dev
16906  *   Pointer to Ethernet device.
16907  * @param[in] fm
16908  *   Meter information table.
16909  * @param[in] src_port
16910  *   The src port this extra rule should use.
16911  * @param[in] item
16912  *   The src port match item.
16913  * @param[out] error
16914  *   Perform verbose error reporting if not NULL.
16915  * @return
16916  *   0 on success, a negative errno value otherwise and rte_errno is set.
16917  */
16918 static int
16919 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16920                                 struct mlx5_flow_meter_info *fm,
16921                                 int32_t src_port,
16922                                 const struct rte_flow_item *item,
16923                                 struct rte_flow_error *error)
16924 {
16925         struct mlx5_priv *priv = dev->data->dev_private;
16926         struct mlx5_flow_meter_policy *mtr_policy;
16927         struct mlx5_flow_meter_sub_policy *sub_policy;
16928         struct mlx5_flow_meter_info *next_fm = NULL;
16929         struct mlx5_flow_meter_policy *next_policy;
16930         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16931         struct mlx5_flow_tbl_data_entry *tbl_data;
16932         struct mlx5_sub_policy_color_rule *color_rule;
16933         struct mlx5_meter_policy_acts acts;
16934         uint32_t color_reg_c_idx;
16935         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16936         struct rte_flow_attr attr = {
16937                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16938                 .priority = 0,
16939                 .ingress = 0,
16940                 .egress = 0,
16941                 .transfer = 1,
16942                 .reserved = 0,
16943         };
16944         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16945         int i;
16946
16947         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16948         MLX5_ASSERT(mtr_policy);
16949         if (!mtr_policy->is_hierarchy)
16950                 return 0;
16951         next_fm = mlx5_flow_meter_find(priv,
16952                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16953         if (!next_fm) {
16954                 return rte_flow_error_set(error, EINVAL,
16955                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16956                                 "Failed to find next meter in hierarchy.");
16957         }
16958         if (!next_fm->drop_cnt)
16959                 goto exit;
16960         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16961         sub_policy = mtr_policy->sub_policys[domain][0];
16962         for (i = 0; i < RTE_COLORS; i++) {
16963                 bool rule_exist = false;
16964                 struct mlx5_meter_policy_action_container *act_cnt;
16965
16966                 if (i >= RTE_COLOR_YELLOW)
16967                         break;
16968                 TAILQ_FOREACH(color_rule,
16969                               &sub_policy->color_rules[i], next_port)
16970                         if (color_rule->src_port == src_port) {
16971                                 rule_exist = true;
16972                                 break;
16973                         }
16974                 if (rule_exist)
16975                         continue;
16976                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16977                                 sizeof(struct mlx5_sub_policy_color_rule),
16978                                 0, SOCKET_ID_ANY);
16979                 if (!color_rule)
16980                         return rte_flow_error_set(error, ENOMEM,
16981                                 RTE_FLOW_ERROR_TYPE_ACTION,
16982                                 NULL, "No memory to create tag color rule.");
16983                 color_rule->src_port = src_port;
16984                 attr.priority = i;
16985                 next_policy = mlx5_flow_meter_policy_find(dev,
16986                                                 next_fm->policy_id, NULL);
16987                 MLX5_ASSERT(next_policy);
16988                 next_sub_policy = next_policy->sub_policys[domain][0];
16989                 tbl_data = container_of(next_sub_policy->tbl_rsc,
16990                                         struct mlx5_flow_tbl_data_entry, tbl);
16991                 act_cnt = &mtr_policy->act_cnt[i];
16992                 if (mtr_first) {
16993                         acts.dv_actions[0] = next_fm->meter_action;
16994                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
16995                 } else {
16996                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
16997                         acts.dv_actions[1] = next_fm->meter_action;
16998                 }
16999                 acts.dv_actions[2] = tbl_data->jump.action;
17000                 acts.actions_n = 3;
17001                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17002                         next_fm = NULL;
17003                         goto err_exit;
17004                 }
17005                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17006                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17007                                 &attr, true, item,
17008                                 &color_rule->matcher, error)) {
17009                         rte_flow_error_set(error, errno,
17010                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17011                                 "Failed to create hierarchy meter matcher.");
17012                         goto err_exit;
17013                 }
17014                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17015                                         (enum rte_color)i,
17016                                         color_rule->matcher->matcher_object,
17017                                         acts.actions_n, acts.dv_actions,
17018                                         true, item,
17019                                         &color_rule->rule, &attr)) {
17020                         rte_flow_error_set(error, errno,
17021                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17022                                 "Failed to create hierarchy meter rule.");
17023                         goto err_exit;
17024                 }
17025                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17026                                   color_rule, next_port);
17027         }
17028 exit:
17029         /**
17030          * Recursive call to iterate all meters in hierarchy and
17031          * create needed rules.
17032          */
17033         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17034                                                 src_port, item, error);
17035 err_exit:
17036         if (color_rule) {
17037                 if (color_rule->rule)
17038                         mlx5_flow_os_destroy_flow(color_rule->rule);
17039                 if (color_rule->matcher) {
17040                         struct mlx5_flow_tbl_data_entry *tbl =
17041                                 container_of(color_rule->matcher->tbl,
17042                                                 typeof(*tbl), tbl);
17043                         mlx5_list_unregister(tbl->matchers,
17044                                                 &color_rule->matcher->entry);
17045                 }
17046                 mlx5_free(color_rule);
17047         }
17048         if (next_fm)
17049                 mlx5_flow_meter_detach(priv, next_fm);
17050         return -rte_errno;
17051 }
17052
17053 /**
17054  * Destroy the sub policy table with RX queue.
17055  *
17056  * @param[in] dev
17057  *   Pointer to Ethernet device.
17058  * @param[in] mtr_policy
17059  *   Pointer to meter policy table.
17060  */
17061 static void
17062 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17063                                     struct mlx5_flow_meter_policy *mtr_policy)
17064 {
17065         struct mlx5_priv *priv = dev->data->dev_private;
17066         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17067         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17068         uint32_t i, j;
17069         uint16_t sub_policy_num, new_policy_num;
17070
17071         rte_spinlock_lock(&mtr_policy->sl);
17072         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17073                 switch (mtr_policy->act_cnt[i].fate_action) {
17074                 case MLX5_FLOW_FATE_SHARED_RSS:
17075                         sub_policy_num = (mtr_policy->sub_policy_num >>
17076                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17077                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17078                         new_policy_num = sub_policy_num;
17079                         for (j = 0; j < sub_policy_num; j++) {
17080                                 sub_policy =
17081                                         mtr_policy->sub_policys[domain][j];
17082                                 if (sub_policy) {
17083                                         __flow_dv_destroy_sub_policy_rules(dev,
17084                                                 sub_policy);
17085                                 if (sub_policy !=
17086                                         mtr_policy->sub_policys[domain][0]) {
17087                                         mtr_policy->sub_policys[domain][j] =
17088                                                                 NULL;
17089                                         mlx5_ipool_free
17090                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17091                                                 sub_policy->idx);
17092                                                 new_policy_num--;
17093                                         }
17094                                 }
17095                         }
17096                         if (new_policy_num != sub_policy_num) {
17097                                 mtr_policy->sub_policy_num &=
17098                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17099                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17100                                 mtr_policy->sub_policy_num |=
17101                                 (new_policy_num &
17102                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17103                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17104                         }
17105                         break;
17106                 case MLX5_FLOW_FATE_QUEUE:
17107                         sub_policy = mtr_policy->sub_policys[domain][0];
17108                         __flow_dv_destroy_sub_policy_rules(dev,
17109                                                            sub_policy);
17110                         break;
17111                 default:
17112                         /*Other actions without queue and do nothing*/
17113                         break;
17114                 }
17115         }
17116         rte_spinlock_unlock(&mtr_policy->sl);
17117 }
17118 /**
17119  * Check whether the DR drop action is supported on the root table or not.
17120  *
17121  * Create a simple flow with DR drop action on root table to validate
17122  * if DR drop action on root table is supported or not.
17123  *
17124  * @param[in] dev
17125  *   Pointer to rte_eth_dev structure.
17126  *
17127  * @return
17128  *   0 on success, a negative errno value otherwise and rte_errno is set.
17129  */
17130 int
17131 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17132 {
17133         struct mlx5_priv *priv = dev->data->dev_private;
17134         struct mlx5_dev_ctx_shared *sh = priv->sh;
17135         struct mlx5_flow_dv_match_params mask = {
17136                 .size = sizeof(mask.buf),
17137         };
17138         struct mlx5_flow_dv_match_params value = {
17139                 .size = sizeof(value.buf),
17140         };
17141         struct mlx5dv_flow_matcher_attr dv_attr = {
17142                 .type = IBV_FLOW_ATTR_NORMAL,
17143                 .priority = 0,
17144                 .match_criteria_enable = 0,
17145                 .match_mask = (void *)&mask,
17146         };
17147         struct mlx5_flow_tbl_resource *tbl = NULL;
17148         void *matcher = NULL;
17149         void *flow = NULL;
17150         int ret = -1;
17151
17152         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17153                                         0, 0, 0, NULL);
17154         if (!tbl)
17155                 goto err;
17156         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17157         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17158         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
17159                                                &matcher);
17160         if (ret)
17161                 goto err;
17162         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17163         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17164                                        &sh->dr_drop_action, &flow);
17165 err:
17166         /*
17167          * If DR drop action is not supported on root table, flow create will
17168          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17169          */
17170         if (!flow) {
17171                 if (matcher &&
17172                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17173                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17174                 else
17175                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17176                 ret = -1;
17177         } else {
17178                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17179         }
17180         if (matcher)
17181                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17182         if (tbl)
17183                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17184         return ret;
17185 }
17186
17187 /**
17188  * Validate the batch counter support in root table.
17189  *
17190  * Create a simple flow with invalid counter and drop action on root table to
17191  * validate if batch counter with offset on root table is supported or not.
17192  *
17193  * @param[in] dev
17194  *   Pointer to rte_eth_dev structure.
17195  *
17196  * @return
17197  *   0 on success, a negative errno value otherwise and rte_errno is set.
17198  */
17199 int
17200 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17201 {
17202         struct mlx5_priv *priv = dev->data->dev_private;
17203         struct mlx5_dev_ctx_shared *sh = priv->sh;
17204         struct mlx5_flow_dv_match_params mask = {
17205                 .size = sizeof(mask.buf),
17206         };
17207         struct mlx5_flow_dv_match_params value = {
17208                 .size = sizeof(value.buf),
17209         };
17210         struct mlx5dv_flow_matcher_attr dv_attr = {
17211                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17212                 .priority = 0,
17213                 .match_criteria_enable = 0,
17214                 .match_mask = (void *)&mask,
17215         };
17216         void *actions[2] = { 0 };
17217         struct mlx5_flow_tbl_resource *tbl = NULL;
17218         struct mlx5_devx_obj *dcs = NULL;
17219         void *matcher = NULL;
17220         void *flow = NULL;
17221         int ret = -1;
17222
17223         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17224                                         0, 0, 0, NULL);
17225         if (!tbl)
17226                 goto err;
17227         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
17228         if (!dcs)
17229                 goto err;
17230         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17231                                                     &actions[0]);
17232         if (ret)
17233                 goto err;
17234         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17235         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17236         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
17237                                                &matcher);
17238         if (ret)
17239                 goto err;
17240         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17241         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17242                                        actions, &flow);
17243 err:
17244         /*
17245          * If batch counter with offset is not supported, the driver will not
17246          * validate the invalid offset value, flow create should success.
17247          * In this case, it means batch counter is not supported in root table.
17248          *
17249          * Otherwise, if flow create is failed, counter offset is supported.
17250          */
17251         if (flow) {
17252                 DRV_LOG(INFO, "Batch counter is not supported in root "
17253                               "table. Switch to fallback mode.");
17254                 rte_errno = ENOTSUP;
17255                 ret = -rte_errno;
17256                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17257         } else {
17258                 /* Check matcher to make sure validate fail at flow create. */
17259                 if (!matcher || (matcher && errno != EINVAL))
17260                         DRV_LOG(ERR, "Unexpected error in counter offset "
17261                                      "support detection");
17262                 ret = 0;
17263         }
17264         if (actions[0])
17265                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17266         if (matcher)
17267                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17268         if (tbl)
17269                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17270         if (dcs)
17271                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17272         return ret;
17273 }
17274
17275 /**
17276  * Query a devx counter.
17277  *
17278  * @param[in] dev
17279  *   Pointer to the Ethernet device structure.
17280  * @param[in] cnt
17281  *   Index to the flow counter.
17282  * @param[in] clear
17283  *   Set to clear the counter statistics.
17284  * @param[out] pkts
17285  *   The statistics value of packets.
17286  * @param[out] bytes
17287  *   The statistics value of bytes.
17288  *
17289  * @return
17290  *   0 on success, otherwise return -1.
17291  */
17292 static int
17293 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17294                       uint64_t *pkts, uint64_t *bytes)
17295 {
17296         struct mlx5_priv *priv = dev->data->dev_private;
17297         struct mlx5_flow_counter *cnt;
17298         uint64_t inn_pkts, inn_bytes;
17299         int ret;
17300
17301         if (!priv->config.devx)
17302                 return -1;
17303
17304         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17305         if (ret)
17306                 return -1;
17307         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17308         *pkts = inn_pkts - cnt->hits;
17309         *bytes = inn_bytes - cnt->bytes;
17310         if (clear) {
17311                 cnt->hits = inn_pkts;
17312                 cnt->bytes = inn_bytes;
17313         }
17314         return 0;
17315 }
17316
17317 /**
17318  * Get aged-out flows.
17319  *
17320  * @param[in] dev
17321  *   Pointer to the Ethernet device structure.
17322  * @param[in] context
17323  *   The address of an array of pointers to the aged-out flows contexts.
17324  * @param[in] nb_contexts
17325  *   The length of context array pointers.
17326  * @param[out] error
17327  *   Perform verbose error reporting if not NULL. Initialized in case of
17328  *   error only.
17329  *
17330  * @return
17331  *   how many contexts get in success, otherwise negative errno value.
17332  *   if nb_contexts is 0, return the amount of all aged contexts.
17333  *   if nb_contexts is not 0 , return the amount of aged flows reported
17334  *   in the context array.
17335  * @note: only stub for now
17336  */
17337 static int
17338 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17339                     void **context,
17340                     uint32_t nb_contexts,
17341                     struct rte_flow_error *error)
17342 {
17343         struct mlx5_priv *priv = dev->data->dev_private;
17344         struct mlx5_age_info *age_info;
17345         struct mlx5_age_param *age_param;
17346         struct mlx5_flow_counter *counter;
17347         struct mlx5_aso_age_action *act;
17348         int nb_flows = 0;
17349
17350         if (nb_contexts && !context)
17351                 return rte_flow_error_set(error, EINVAL,
17352                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17353                                           NULL, "empty context");
17354         age_info = GET_PORT_AGE_INFO(priv);
17355         rte_spinlock_lock(&age_info->aged_sl);
17356         LIST_FOREACH(act, &age_info->aged_aso, next) {
17357                 nb_flows++;
17358                 if (nb_contexts) {
17359                         context[nb_flows - 1] =
17360                                                 act->age_params.context;
17361                         if (!(--nb_contexts))
17362                                 break;
17363                 }
17364         }
17365         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17366                 nb_flows++;
17367                 if (nb_contexts) {
17368                         age_param = MLX5_CNT_TO_AGE(counter);
17369                         context[nb_flows - 1] = age_param->context;
17370                         if (!(--nb_contexts))
17371                                 break;
17372                 }
17373         }
17374         rte_spinlock_unlock(&age_info->aged_sl);
17375         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17376         return nb_flows;
17377 }
17378
17379 /*
17380  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17381  */
17382 static uint32_t
17383 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17384 {
17385         return flow_dv_counter_alloc(dev, 0);
17386 }
17387
17388 /**
17389  * Validate indirect action.
17390  * Dispatcher for action type specific validation.
17391  *
17392  * @param[in] dev
17393  *   Pointer to the Ethernet device structure.
17394  * @param[in] conf
17395  *   Indirect action configuration.
17396  * @param[in] action
17397  *   The indirect action object to validate.
17398  * @param[out] error
17399  *   Perform verbose error reporting if not NULL. Initialized in case of
17400  *   error only.
17401  *
17402  * @return
17403  *   0 on success, otherwise negative errno value.
17404  */
17405 static int
17406 flow_dv_action_validate(struct rte_eth_dev *dev,
17407                         const struct rte_flow_indir_action_conf *conf,
17408                         const struct rte_flow_action *action,
17409                         struct rte_flow_error *err)
17410 {
17411         struct mlx5_priv *priv = dev->data->dev_private;
17412
17413         RTE_SET_USED(conf);
17414         switch (action->type) {
17415         case RTE_FLOW_ACTION_TYPE_RSS:
17416                 /*
17417                  * priv->obj_ops is set according to driver capabilities.
17418                  * When DevX capabilities are
17419                  * sufficient, it is set to devx_obj_ops.
17420                  * Otherwise, it is set to ibv_obj_ops.
17421                  * ibv_obj_ops doesn't support ind_table_modify operation.
17422                  * In this case the indirect RSS action can't be used.
17423                  */
17424                 if (priv->obj_ops.ind_table_modify == NULL)
17425                         return rte_flow_error_set
17426                                         (err, ENOTSUP,
17427                                          RTE_FLOW_ERROR_TYPE_ACTION,
17428                                          NULL,
17429                                          "Indirect RSS action not supported");
17430                 return mlx5_validate_action_rss(dev, action, err);
17431         case RTE_FLOW_ACTION_TYPE_AGE:
17432                 if (!priv->sh->aso_age_mng)
17433                         return rte_flow_error_set(err, ENOTSUP,
17434                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17435                                                 NULL,
17436                                                 "Indirect age action not supported");
17437                 return flow_dv_validate_action_age(0, action, dev, err);
17438         case RTE_FLOW_ACTION_TYPE_COUNT:
17439                 /*
17440                  * There are two mechanisms to share the action count.
17441                  * The old mechanism uses the shared field to share, while the
17442                  * new mechanism uses the indirect action API.
17443                  * This validation comes to make sure that the two mechanisms
17444                  * are not combined.
17445                  */
17446                 if (is_shared_action_count(action))
17447                         return rte_flow_error_set(err, ENOTSUP,
17448                                                   RTE_FLOW_ERROR_TYPE_ACTION,
17449                                                   NULL,
17450                                                   "Mix shared and indirect counter is not supported");
17451                 return flow_dv_validate_action_count(dev, true, 0, err);
17452         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17453                 if (!priv->sh->ct_aso_en)
17454                         return rte_flow_error_set(err, ENOTSUP,
17455                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17456                                         "ASO CT is not supported");
17457                 return mlx5_validate_action_ct(dev, action->conf, err);
17458         default:
17459                 return rte_flow_error_set(err, ENOTSUP,
17460                                           RTE_FLOW_ERROR_TYPE_ACTION,
17461                                           NULL,
17462                                           "action type not supported");
17463         }
17464 }
17465
17466 /*
17467  * Check if the RSS configurations for colors of a meter policy match
17468  * each other, except the queues.
17469  *
17470  * @param[in] r1
17471  *   Pointer to the first RSS flow action.
17472  * @param[in] r2
17473  *   Pointer to the second RSS flow action.
17474  *
17475  * @return
17476  *   0 on match, 1 on conflict.
17477  */
17478 static inline int
17479 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17480                                const struct rte_flow_action_rss *r2)
17481 {
17482         if (!r1 || !r2)
17483                 return 0;
17484         if (r1->func != r2->func || r1->level != r2->level ||
17485             r1->types != r2->types || r1->key_len != r2->key_len ||
17486             memcmp(r1->key, r2->key, r1->key_len))
17487                 return 1;
17488         return 0;
17489 }
17490
17491 /**
17492  * Validate the meter hierarchy chain for meter policy.
17493  *
17494  * @param[in] dev
17495  *   Pointer to the Ethernet device structure.
17496  * @param[in] meter_id
17497  *   Meter id.
17498  * @param[in] action_flags
17499  *   Holds the actions detected until now.
17500  * @param[out] is_rss
17501  *   Is RSS or not.
17502  * @param[out] hierarchy_domain
17503  *   The domain bitmap for hierarchy policy.
17504  * @param[out] error
17505  *   Perform verbose error reporting if not NULL. Initialized in case of
17506  *   error only.
17507  *
17508  * @return
17509  *   0 on success, otherwise negative errno value with error set.
17510  */
17511 static int
17512 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17513                                   uint32_t meter_id,
17514                                   uint64_t action_flags,
17515                                   bool *is_rss,
17516                                   uint8_t *hierarchy_domain,
17517                                   struct rte_mtr_error *error)
17518 {
17519         struct mlx5_priv *priv = dev->data->dev_private;
17520         struct mlx5_flow_meter_info *fm;
17521         struct mlx5_flow_meter_policy *policy;
17522         uint8_t cnt = 1;
17523
17524         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17525                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17526                 return -rte_mtr_error_set(error, EINVAL,
17527                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17528                                         NULL,
17529                                         "Multiple fate actions not supported.");
17530         *hierarchy_domain = 0;
17531         while (true) {
17532                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17533                 if (!fm)
17534                         return -rte_mtr_error_set(error, EINVAL,
17535                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17536                                         "Meter not found in meter hierarchy.");
17537                 if (fm->def_policy)
17538                         return -rte_mtr_error_set(error, EINVAL,
17539                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17540                         "Non termination meter not supported in hierarchy.");
17541                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17542                 MLX5_ASSERT(policy);
17543                 /**
17544                  * Only inherit the supported domains of the first meter in
17545                  * hierarchy.
17546                  * One meter supports at least one domain.
17547                  */
17548                 if (!*hierarchy_domain) {
17549                         if (policy->transfer)
17550                                 *hierarchy_domain |=
17551                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17552                         if (policy->ingress)
17553                                 *hierarchy_domain |=
17554                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17555                         if (policy->egress)
17556                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17557                 }
17558                 if (!policy->is_hierarchy) {
17559                         *is_rss = policy->is_rss;
17560                         break;
17561                 }
17562                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17563                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17564                         return -rte_mtr_error_set(error, EINVAL,
17565                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17566                                         "Exceed max hierarchy meter number.");
17567         }
17568         return 0;
17569 }
17570
17571 /**
17572  * Validate meter policy actions.
17573  * Dispatcher for action type specific validation.
17574  *
17575  * @param[in] dev
17576  *   Pointer to the Ethernet device structure.
17577  * @param[in] action
17578  *   The meter policy action object to validate.
17579  * @param[in] attr
17580  *   Attributes of flow to determine steering domain.
17581  * @param[out] error
17582  *   Perform verbose error reporting if not NULL. Initialized in case of
17583  *   error only.
17584  *
17585  * @return
17586  *   0 on success, otherwise negative errno value.
17587  */
17588 static int
17589 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17590                         const struct rte_flow_action *actions[RTE_COLORS],
17591                         struct rte_flow_attr *attr,
17592                         bool *is_rss,
17593                         uint8_t *domain_bitmap,
17594                         uint8_t *policy_mode,
17595                         struct rte_mtr_error *error)
17596 {
17597         struct mlx5_priv *priv = dev->data->dev_private;
17598         struct mlx5_dev_config *dev_conf = &priv->config;
17599         const struct rte_flow_action *act;
17600         uint64_t action_flags[RTE_COLORS] = {0};
17601         int actions_n;
17602         int i, ret;
17603         struct rte_flow_error flow_err;
17604         uint8_t domain_color[RTE_COLORS] = {0};
17605         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17606         uint8_t hierarchy_domain = 0;
17607         const struct rte_flow_action_meter *mtr;
17608         bool def_green = false;
17609         bool def_yellow = false;
17610         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17611
17612         if (!priv->config.dv_esw_en)
17613                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17614         *domain_bitmap = def_domain;
17615         /* Red color could only support DROP action. */
17616         if (!actions[RTE_COLOR_RED] ||
17617             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17618                 return -rte_mtr_error_set(error, ENOTSUP,
17619                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17620                                 NULL, "Red color only supports drop action.");
17621         /*
17622          * Check default policy actions:
17623          * Green / Yellow: no action, Red: drop action
17624          * Either G or Y will trigger default policy actions to be created.
17625          */
17626         if (!actions[RTE_COLOR_GREEN] ||
17627             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17628                 def_green = true;
17629         if (!actions[RTE_COLOR_YELLOW] ||
17630             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17631                 def_yellow = true;
17632         if (def_green && def_yellow) {
17633                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17634                 return 0;
17635         } else if (!def_green && def_yellow) {
17636                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17637         } else if (def_green && !def_yellow) {
17638                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17639         }
17640         /* Set to empty string in case of NULL pointer access by user. */
17641         flow_err.message = "";
17642         for (i = 0; i < RTE_COLORS; i++) {
17643                 act = actions[i];
17644                 for (action_flags[i] = 0, actions_n = 0;
17645                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17646                      act++) {
17647                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17648                                 return -rte_mtr_error_set(error, ENOTSUP,
17649                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17650                                           NULL, "too many actions");
17651                         switch (act->type) {
17652                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17653                                 if (!priv->config.dv_esw_en)
17654                                         return -rte_mtr_error_set(error,
17655                                         ENOTSUP,
17656                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17657                                         NULL, "PORT action validate check"
17658                                         " fail for ESW disable");
17659                                 ret = flow_dv_validate_action_port_id(dev,
17660                                                 action_flags[i],
17661                                                 act, attr, &flow_err);
17662                                 if (ret)
17663                                         return -rte_mtr_error_set(error,
17664                                         ENOTSUP,
17665                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17666                                         NULL, flow_err.message ?
17667                                         flow_err.message :
17668                                         "PORT action validate check fail");
17669                                 ++actions_n;
17670                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17671                                 break;
17672                         case RTE_FLOW_ACTION_TYPE_MARK:
17673                                 ret = flow_dv_validate_action_mark(dev, act,
17674                                                            action_flags[i],
17675                                                            attr, &flow_err);
17676                                 if (ret < 0)
17677                                         return -rte_mtr_error_set(error,
17678                                         ENOTSUP,
17679                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17680                                         NULL, flow_err.message ?
17681                                         flow_err.message :
17682                                         "Mark action validate check fail");
17683                                 if (dev_conf->dv_xmeta_en !=
17684                                         MLX5_XMETA_MODE_LEGACY)
17685                                         return -rte_mtr_error_set(error,
17686                                         ENOTSUP,
17687                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17688                                         NULL, "Extend MARK action is "
17689                                         "not supported. Please try use "
17690                                         "default policy for meter.");
17691                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17692                                 ++actions_n;
17693                                 break;
17694                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17695                                 ret = flow_dv_validate_action_set_tag(dev,
17696                                                         act, action_flags[i],
17697                                                         attr, &flow_err);
17698                                 if (ret)
17699                                         return -rte_mtr_error_set(error,
17700                                         ENOTSUP,
17701                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17702                                         NULL, flow_err.message ?
17703                                         flow_err.message :
17704                                         "Set tag action validate check fail");
17705                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17706                                 ++actions_n;
17707                                 break;
17708                         case RTE_FLOW_ACTION_TYPE_DROP:
17709                                 ret = mlx5_flow_validate_action_drop
17710                                         (action_flags[i], attr, &flow_err);
17711                                 if (ret < 0)
17712                                         return -rte_mtr_error_set(error,
17713                                         ENOTSUP,
17714                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17715                                         NULL, flow_err.message ?
17716                                         flow_err.message :
17717                                         "Drop action validate check fail");
17718                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17719                                 ++actions_n;
17720                                 break;
17721                         case RTE_FLOW_ACTION_TYPE_QUEUE:
17722                                 /*
17723                                  * Check whether extensive
17724                                  * metadata feature is engaged.
17725                                  */
17726                                 if (dev_conf->dv_flow_en &&
17727                                     (dev_conf->dv_xmeta_en !=
17728                                      MLX5_XMETA_MODE_LEGACY) &&
17729                                     mlx5_flow_ext_mreg_supported(dev))
17730                                         return -rte_mtr_error_set(error,
17731                                           ENOTSUP,
17732                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17733                                           NULL, "Queue action with meta "
17734                                           "is not supported. Please try use "
17735                                           "default policy for meter.");
17736                                 ret = mlx5_flow_validate_action_queue(act,
17737                                                         action_flags[i], dev,
17738                                                         attr, &flow_err);
17739                                 if (ret < 0)
17740                                         return -rte_mtr_error_set(error,
17741                                           ENOTSUP,
17742                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17743                                           NULL, flow_err.message ?
17744                                           flow_err.message :
17745                                           "Queue action validate check fail");
17746                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17747                                 ++actions_n;
17748                                 break;
17749                         case RTE_FLOW_ACTION_TYPE_RSS:
17750                                 if (dev_conf->dv_flow_en &&
17751                                     (dev_conf->dv_xmeta_en !=
17752                                      MLX5_XMETA_MODE_LEGACY) &&
17753                                     mlx5_flow_ext_mreg_supported(dev))
17754                                         return -rte_mtr_error_set(error,
17755                                           ENOTSUP,
17756                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17757                                           NULL, "RSS action with meta "
17758                                           "is not supported. Please try use "
17759                                           "default policy for meter.");
17760                                 ret = mlx5_validate_action_rss(dev, act,
17761                                                                &flow_err);
17762                                 if (ret < 0)
17763                                         return -rte_mtr_error_set(error,
17764                                           ENOTSUP,
17765                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17766                                           NULL, flow_err.message ?
17767                                           flow_err.message :
17768                                           "RSS action validate check fail");
17769                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17770                                 ++actions_n;
17771                                 /* Either G or Y will set the RSS. */
17772                                 rss_color[i] = act->conf;
17773                                 break;
17774                         case RTE_FLOW_ACTION_TYPE_JUMP:
17775                                 ret = flow_dv_validate_action_jump(dev,
17776                                         NULL, act, action_flags[i],
17777                                         attr, true, &flow_err);
17778                                 if (ret)
17779                                         return -rte_mtr_error_set(error,
17780                                           ENOTSUP,
17781                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17782                                           NULL, flow_err.message ?
17783                                           flow_err.message :
17784                                           "Jump action validate check fail");
17785                                 ++actions_n;
17786                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17787                                 break;
17788                         /*
17789                          * Only the last meter in the hierarchy will support
17790                          * the YELLOW color steering. Then in the meter policy
17791                          * actions list, there should be no other meter inside.
17792                          */
17793                         case RTE_FLOW_ACTION_TYPE_METER:
17794                                 if (i != RTE_COLOR_GREEN)
17795                                         return -rte_mtr_error_set(error,
17796                                                 ENOTSUP,
17797                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17798                                                 NULL,
17799                                                 "Meter hierarchy only supports GREEN color.");
17800                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17801                                         return -rte_mtr_error_set(error,
17802                                                 ENOTSUP,
17803                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17804                                                 NULL,
17805                                                 "No yellow policy should be provided in meter hierarchy.");
17806                                 mtr = act->conf;
17807                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17808                                                         mtr->mtr_id,
17809                                                         action_flags[i],
17810                                                         is_rss,
17811                                                         &hierarchy_domain,
17812                                                         error);
17813                                 if (ret)
17814                                         return ret;
17815                                 ++actions_n;
17816                                 action_flags[i] |=
17817                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17818                                 break;
17819                         default:
17820                                 return -rte_mtr_error_set(error, ENOTSUP,
17821                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17822                                         NULL,
17823                                         "Doesn't support optional action");
17824                         }
17825                 }
17826                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID)
17827                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17828                 else if ((action_flags[i] &
17829                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17830                          (action_flags[i] & MLX5_FLOW_ACTION_MARK))
17831                         /*
17832                          * Only support MLX5_XMETA_MODE_LEGACY
17833                          * so MARK action is only in ingress domain.
17834                          */
17835                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17836                 else
17837                         domain_color[i] = def_domain;
17838                 if (action_flags[i] &
17839                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17840                         domain_color[i] &= hierarchy_domain;
17841                 /*
17842                  * Non-termination actions only support NIC Tx domain.
17843                  * The adjustion should be skipped when there is no
17844                  * action or only END is provided. The default domains
17845                  * bit-mask is set to find the MIN intersection.
17846                  * The action flags checking should also be skipped.
17847                  */
17848                 if ((def_green && i == RTE_COLOR_GREEN) ||
17849                     (def_yellow && i == RTE_COLOR_YELLOW))
17850                         continue;
17851                 /*
17852                  * Validate the drop action mutual exclusion
17853                  * with other actions. Drop action is mutually-exclusive
17854                  * with any other action, except for Count action.
17855                  */
17856                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17857                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17858                         return -rte_mtr_error_set(error, ENOTSUP,
17859                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17860                                 NULL, "Drop action is mutually-exclusive "
17861                                 "with any other action");
17862                 }
17863                 /* Eswitch has few restrictions on using items and actions */
17864                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17865                         if (!mlx5_flow_ext_mreg_supported(dev) &&
17866                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
17867                                 return -rte_mtr_error_set(error, ENOTSUP,
17868                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17869                                         NULL, "unsupported action MARK");
17870                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17871                                 return -rte_mtr_error_set(error, ENOTSUP,
17872                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17873                                         NULL, "unsupported action QUEUE");
17874                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17875                                 return -rte_mtr_error_set(error, ENOTSUP,
17876                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17877                                         NULL, "unsupported action RSS");
17878                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17879                                 return -rte_mtr_error_set(error, ENOTSUP,
17880                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17881                                         NULL, "no fate action is found");
17882                 } else {
17883                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17884                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17885                                 if ((domain_color[i] &
17886                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
17887                                         domain_color[i] =
17888                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
17889                                 else
17890                                         return -rte_mtr_error_set(error,
17891                                                 ENOTSUP,
17892                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17893                                                 NULL,
17894                                                 "no fate action is found");
17895                         }
17896                 }
17897         }
17898         /* If both colors have RSS, the attributes should be the same. */
17899         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
17900                                            rss_color[RTE_COLOR_YELLOW]))
17901                 return -rte_mtr_error_set(error, EINVAL,
17902                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17903                                           NULL, "policy RSS attr conflict");
17904         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
17905                 *is_rss = true;
17906         /* "domain_color[C]" is non-zero for each color, default is ALL. */
17907         if (!def_green && !def_yellow &&
17908             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
17909             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
17910             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
17911                 return -rte_mtr_error_set(error, EINVAL,
17912                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17913                                           NULL, "policy domains conflict");
17914         /*
17915          * At least one color policy is listed in the actions, the domains
17916          * to be supported should be the intersection.
17917          */
17918         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
17919                          domain_color[RTE_COLOR_YELLOW];
17920         return 0;
17921 }
17922
17923 static int
17924 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17925 {
17926         struct mlx5_priv *priv = dev->data->dev_private;
17927         int ret = 0;
17928
17929         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17930                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17931                                                 flags);
17932                 if (ret != 0)
17933                         return ret;
17934         }
17935         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17936                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17937                 if (ret != 0)
17938                         return ret;
17939         }
17940         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17941                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17942                 if (ret != 0)
17943                         return ret;
17944         }
17945         return 0;
17946 }
17947
17948 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17949         .validate = flow_dv_validate,
17950         .prepare = flow_dv_prepare,
17951         .translate = flow_dv_translate,
17952         .apply = flow_dv_apply,
17953         .remove = flow_dv_remove,
17954         .destroy = flow_dv_destroy,
17955         .query = flow_dv_query,
17956         .create_mtr_tbls = flow_dv_create_mtr_tbls,
17957         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17958         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17959         .create_meter = flow_dv_mtr_alloc,
17960         .free_meter = flow_dv_aso_mtr_release_to_pool,
17961         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17962         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17963         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17964         .create_policy_rules = flow_dv_create_policy_rules,
17965         .destroy_policy_rules = flow_dv_destroy_policy_rules,
17966         .create_def_policy = flow_dv_create_def_policy,
17967         .destroy_def_policy = flow_dv_destroy_def_policy,
17968         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17969         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17970         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17971         .counter_alloc = flow_dv_counter_allocate,
17972         .counter_free = flow_dv_counter_free,
17973         .counter_query = flow_dv_counter_query,
17974         .get_aged_flows = flow_dv_get_aged_flows,
17975         .action_validate = flow_dv_action_validate,
17976         .action_create = flow_dv_action_create,
17977         .action_destroy = flow_dv_action_destroy,
17978         .action_update = flow_dv_action_update,
17979         .action_query = flow_dv_action_query,
17980         .sync_domain = flow_dv_sync_domain,
17981 };
17982
17983 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
17984