drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_glue.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  38
  39 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  40 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  41 #endif
  42
  43 #ifndef HAVE_MLX5DV_DR_ESWITCH
  44 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  45 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  46 #endif
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR
  50 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  51 #endif
  52
  53 /* VLAN header definitions */
  54 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  55 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  56 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  57 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  58 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  59
  60 union flow_dv_attr {
  61         struct {
  62                 uint32_t valid:1;
  63                 uint32_t ipv4:1;
  64                 uint32_t ipv6:1;
  65                 uint32_t tcp:1;
  66                 uint32_t udp:1;
  67                 uint32_t reserved:27;
  68         };
  69         uint32_t attr;
  70 };
  71
  72 /**
  73  * Initialize flow attributes structure according to flow items' types.
  74  *
  75  * @param[in] item
  76  *   Pointer to item specification.
  77  * @param[out] attr
  78  *   Pointer to flow attributes structure.
  79  */
  80 static void
  81 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  82 {
  83         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  84                 switch (item->type) {
  85                 case RTE_FLOW_ITEM_TYPE_IPV4:
  86                         attr->ipv4 = 1;
  87                         break;
  88                 case RTE_FLOW_ITEM_TYPE_IPV6:
  89                         attr->ipv6 = 1;
  90                         break;
  91                 case RTE_FLOW_ITEM_TYPE_UDP:
  92                         attr->udp = 1;
  93                         break;
  94                 case RTE_FLOW_ITEM_TYPE_TCP:
  95                         attr->tcp = 1;
  96                         break;
  97                 default:
  98                         break;
  99                 }
 100         }
 101         attr->valid = 1;
 102 }
 103
 104 struct field_modify_info {
 105         uint32_t size; /* Size of field in protocol header, in bytes. */
 106         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 107         enum mlx5_modification_field id;
 108 };
 109
 110 struct field_modify_info modify_eth[] = {
 111         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 112         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 113         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 114         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 115         {0, 0, 0},
 116 };
 117
 118 struct field_modify_info modify_ipv4[] = {
 119         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 120         {4, 12, MLX5_MODI_OUT_SIPV4},
 121         {4, 16, MLX5_MODI_OUT_DIPV4},
 122         {0, 0, 0},
 123 };
 124
 125 struct field_modify_info modify_ipv6[] = {
 126         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 127         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 128         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 129         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 130         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 131         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 132         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 133         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 134         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 135         {0, 0, 0},
 136 };
 137
 138 struct field_modify_info modify_udp[] = {
 139         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 140         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 141         {0, 0, 0},
 142 };
 143
 144 struct field_modify_info modify_tcp[] = {
 145         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 146         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 147         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 148         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 149         {0, 0, 0},
 150 };
 151
 152 static void
 153 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 154                           uint8_t next_protocol, uint64_t *item_flags,
 155                           int *tunnel)
 156 {
 157         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 158                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 159         if (next_protocol == IPPROTO_IPIP) {
 160                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 161                 *tunnel = 1;
 162         }
 163         if (next_protocol == IPPROTO_IPV6) {
 164                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 165                 *tunnel = 1;
 166         }
 167 }
 168
 169 /**
 170  * Acquire the synchronizing object to protect multithreaded access
 171  * to shared dv context. Lock occurs only if context is actually
 172  * shared, i.e. we have multiport IB device and representors are
 173  * created.
 174  *
 175  * @param[in] dev
 176  *   Pointer to the rte_eth_dev structure.
 177  */
 178 static void
 179 flow_d_shared_lock(struct rte_eth_dev *dev)
 180 {
 181         struct mlx5_priv *priv = dev->data->dev_private;
 182         struct mlx5_ibv_shared *sh = priv->sh;
 183
 184         if (sh->dv_refcnt > 1) {
 185                 int ret;
 186
 187                 ret = pthread_mutex_lock(&sh->dv_mutex);
 188                 assert(!ret);
 189                 (void)ret;
 190         }
 191 }
 192
 193 static void
 194 flow_d_shared_unlock(struct rte_eth_dev *dev)
 195 {
 196         struct mlx5_priv *priv = dev->data->dev_private;
 197         struct mlx5_ibv_shared *sh = priv->sh;
 198
 199         if (sh->dv_refcnt > 1) {
 200                 int ret;
 201
 202                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 203                 assert(!ret);
 204                 (void)ret;
 205         }
 206 }
 207
 208 /**
 209  * Convert modify-header action to DV specification.
 210  *
 211  * @param[in] item
 212  *   Pointer to item specification.
 213  * @param[in] field
 214  *   Pointer to field modification information.
 215  * @param[in,out] resource
 216  *   Pointer to the modify-header resource.
 217  * @param[in] type
 218  *   Type of modification.
 219  * @param[out] error
 220  *   Pointer to the error structure.
 221  *
 222  * @return
 223  *   0 on success, a negative errno value otherwise and rte_errno is set.
 224  */
 225 static int
 226 flow_dv_convert_modify_action(struct rte_flow_item *item,
 227                               struct field_modify_info *field,
 228                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 229                               uint32_t type,
 230                               struct rte_flow_error *error)
 231 {
 232         uint32_t i = resource->actions_num;
 233         struct mlx5_modification_cmd *actions = resource->actions;
 234         const uint8_t *spec = item->spec;
 235         const uint8_t *mask = item->mask;
 236         uint32_t set;
 237
 238         while (field->size) {
 239                 set = 0;
 240                 /* Generate modify command for each mask segment. */
 241                 memcpy(&set, &mask[field->offset], field->size);
 242                 if (set) {
 243                         if (i >= MLX5_MODIFY_NUM)
 244                                 return rte_flow_error_set(error, EINVAL,
 245                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 246                                          "too many items to modify");
 247                         actions[i].action_type = type;
 248                         actions[i].field = field->id;
 249                         actions[i].length = field->size ==
 250                                         4 ? 0 : field->size * 8;
 251                         rte_memcpy(&actions[i].data[4 - field->size],
 252                                    &spec[field->offset], field->size);
 253                         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 254                         ++i;
 255                 }
 256                 if (resource->actions_num != i)
 257                         resource->actions_num = i;
 258                 field++;
 259         }
 260         if (!resource->actions_num)
 261                 return rte_flow_error_set(error, EINVAL,
 262                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 263                                           "invalid modification flow item");
 264         return 0;
 265 }
 266
 267 /**
 268  * Convert modify-header set IPv4 address action to DV specification.
 269  *
 270  * @param[in,out] resource
 271  *   Pointer to the modify-header resource.
 272  * @param[in] action
 273  *   Pointer to action specification.
 274  * @param[out] error
 275  *   Pointer to the error structure.
 276  *
 277  * @return
 278  *   0 on success, a negative errno value otherwise and rte_errno is set.
 279  */
 280 static int
 281 flow_dv_convert_action_modify_ipv4
 282                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 283                          const struct rte_flow_action *action,
 284                          struct rte_flow_error *error)
 285 {
 286         const struct rte_flow_action_set_ipv4 *conf =
 287                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 288         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 289         struct rte_flow_item_ipv4 ipv4;
 290         struct rte_flow_item_ipv4 ipv4_mask;
 291
 292         memset(&ipv4, 0, sizeof(ipv4));
 293         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 294         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 295                 ipv4.hdr.src_addr = conf->ipv4_addr;
 296                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 297         } else {
 298                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 299                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 300         }
 301         item.spec = &ipv4;
 302         item.mask = &ipv4_mask;
 303         return flow_dv_convert_modify_action(&item, modify_ipv4, resource,
 304                                              MLX5_MODIFICATION_TYPE_SET, error);
 305 }
 306
 307 /**
 308  * Convert modify-header set IPv6 address action to DV specification.
 309  *
 310  * @param[in,out] resource
 311  *   Pointer to the modify-header resource.
 312  * @param[in] action
 313  *   Pointer to action specification.
 314  * @param[out] error
 315  *   Pointer to the error structure.
 316  *
 317  * @return
 318  *   0 on success, a negative errno value otherwise and rte_errno is set.
 319  */
 320 static int
 321 flow_dv_convert_action_modify_ipv6
 322                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 323                          const struct rte_flow_action *action,
 324                          struct rte_flow_error *error)
 325 {
 326         const struct rte_flow_action_set_ipv6 *conf =
 327                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 328         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 329         struct rte_flow_item_ipv6 ipv6;
 330         struct rte_flow_item_ipv6 ipv6_mask;
 331
 332         memset(&ipv6, 0, sizeof(ipv6));
 333         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 334         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 335                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 336                        sizeof(ipv6.hdr.src_addr));
 337                 memcpy(&ipv6_mask.hdr.src_addr,
 338                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 339                        sizeof(ipv6.hdr.src_addr));
 340         } else {
 341                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 342                        sizeof(ipv6.hdr.dst_addr));
 343                 memcpy(&ipv6_mask.hdr.dst_addr,
 344                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 345                        sizeof(ipv6.hdr.dst_addr));
 346         }
 347         item.spec = &ipv6;
 348         item.mask = &ipv6_mask;
 349         return flow_dv_convert_modify_action(&item, modify_ipv6, resource,
 350                                              MLX5_MODIFICATION_TYPE_SET, error);
 351 }
 352
 353 /**
 354  * Convert modify-header set MAC address action to DV specification.
 355  *
 356  * @param[in,out] resource
 357  *   Pointer to the modify-header resource.
 358  * @param[in] action
 359  *   Pointer to action specification.
 360  * @param[out] error
 361  *   Pointer to the error structure.
 362  *
 363  * @return
 364  *   0 on success, a negative errno value otherwise and rte_errno is set.
 365  */
 366 static int
 367 flow_dv_convert_action_modify_mac
 368                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 369                          const struct rte_flow_action *action,
 370                          struct rte_flow_error *error)
 371 {
 372         const struct rte_flow_action_set_mac *conf =
 373                 (const struct rte_flow_action_set_mac *)(action->conf);
 374         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 375         struct rte_flow_item_eth eth;
 376         struct rte_flow_item_eth eth_mask;
 377
 378         memset(&eth, 0, sizeof(eth));
 379         memset(&eth_mask, 0, sizeof(eth_mask));
 380         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 381                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 382                        sizeof(eth.src.addr_bytes));
 383                 memcpy(&eth_mask.src.addr_bytes,
 384                        &rte_flow_item_eth_mask.src.addr_bytes,
 385                        sizeof(eth_mask.src.addr_bytes));
 386         } else {
 387                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 388                        sizeof(eth.dst.addr_bytes));
 389                 memcpy(&eth_mask.dst.addr_bytes,
 390                        &rte_flow_item_eth_mask.dst.addr_bytes,
 391                        sizeof(eth_mask.dst.addr_bytes));
 392         }
 393         item.spec = &eth;
 394         item.mask = &eth_mask;
 395         return flow_dv_convert_modify_action(&item, modify_eth, resource,
 396                                              MLX5_MODIFICATION_TYPE_SET, error);
 397 }
 398
 399 /**
 400  * Convert modify-header set TP action to DV specification.
 401  *
 402  * @param[in,out] resource
 403  *   Pointer to the modify-header resource.
 404  * @param[in] action
 405  *   Pointer to action specification.
 406  * @param[in] items
 407  *   Pointer to rte_flow_item objects list.
 408  * @param[in] attr
 409  *   Pointer to flow attributes structure.
 410  * @param[out] error
 411  *   Pointer to the error structure.
 412  *
 413  * @return
 414  *   0 on success, a negative errno value otherwise and rte_errno is set.
 415  */
 416 static int
 417 flow_dv_convert_action_modify_tp
 418                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 419                          const struct rte_flow_action *action,
 420                          const struct rte_flow_item *items,
 421                          union flow_dv_attr *attr,
 422                          struct rte_flow_error *error)
 423 {
 424         const struct rte_flow_action_set_tp *conf =
 425                 (const struct rte_flow_action_set_tp *)(action->conf);
 426         struct rte_flow_item item;
 427         struct rte_flow_item_udp udp;
 428         struct rte_flow_item_udp udp_mask;
 429         struct rte_flow_item_tcp tcp;
 430         struct rte_flow_item_tcp tcp_mask;
 431         struct field_modify_info *field;
 432
 433         if (!attr->valid)
 434                 flow_dv_attr_init(items, attr);
 435         if (attr->udp) {
 436                 memset(&udp, 0, sizeof(udp));
 437                 memset(&udp_mask, 0, sizeof(udp_mask));
 438                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 439                         udp.hdr.src_port = conf->port;
 440                         udp_mask.hdr.src_port =
 441                                         rte_flow_item_udp_mask.hdr.src_port;
 442                 } else {
 443                         udp.hdr.dst_port = conf->port;
 444                         udp_mask.hdr.dst_port =
 445                                         rte_flow_item_udp_mask.hdr.dst_port;
 446                 }
 447                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 448                 item.spec = &udp;
 449                 item.mask = &udp_mask;
 450                 field = modify_udp;
 451         }
 452         if (attr->tcp) {
 453                 memset(&tcp, 0, sizeof(tcp));
 454                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 455                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 456                         tcp.hdr.src_port = conf->port;
 457                         tcp_mask.hdr.src_port =
 458                                         rte_flow_item_tcp_mask.hdr.src_port;
 459                 } else {
 460                         tcp.hdr.dst_port = conf->port;
 461                         tcp_mask.hdr.dst_port =
 462                                         rte_flow_item_tcp_mask.hdr.dst_port;
 463                 }
 464                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 465                 item.spec = &tcp;
 466                 item.mask = &tcp_mask;
 467                 field = modify_tcp;
 468         }
 469         return flow_dv_convert_modify_action(&item, field, resource,
 470                                              MLX5_MODIFICATION_TYPE_SET, error);
 471 }
 472
 473 /**
 474  * Convert modify-header set TTL action to DV specification.
 475  *
 476  * @param[in,out] resource
 477  *   Pointer to the modify-header resource.
 478  * @param[in] action
 479  *   Pointer to action specification.
 480  * @param[in] items
 481  *   Pointer to rte_flow_item objects list.
 482  * @param[in] attr
 483  *   Pointer to flow attributes structure.
 484  * @param[out] error
 485  *   Pointer to the error structure.
 486  *
 487  * @return
 488  *   0 on success, a negative errno value otherwise and rte_errno is set.
 489  */
 490 static int
 491 flow_dv_convert_action_modify_ttl
 492                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 493                          const struct rte_flow_action *action,
 494                          const struct rte_flow_item *items,
 495                          union flow_dv_attr *attr,
 496                          struct rte_flow_error *error)
 497 {
 498         const struct rte_flow_action_set_ttl *conf =
 499                 (const struct rte_flow_action_set_ttl *)(action->conf);
 500         struct rte_flow_item item;
 501         struct rte_flow_item_ipv4 ipv4;
 502         struct rte_flow_item_ipv4 ipv4_mask;
 503         struct rte_flow_item_ipv6 ipv6;
 504         struct rte_flow_item_ipv6 ipv6_mask;
 505         struct field_modify_info *field;
 506
 507         if (!attr->valid)
 508                 flow_dv_attr_init(items, attr);
 509         if (attr->ipv4) {
 510                 memset(&ipv4, 0, sizeof(ipv4));
 511                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 512                 ipv4.hdr.time_to_live = conf->ttl_value;
 513                 ipv4_mask.hdr.time_to_live = 0xFF;
 514                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 515                 item.spec = &ipv4;
 516                 item.mask = &ipv4_mask;
 517                 field = modify_ipv4;
 518         }
 519         if (attr->ipv6) {
 520                 memset(&ipv6, 0, sizeof(ipv6));
 521                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 522                 ipv6.hdr.hop_limits = conf->ttl_value;
 523                 ipv6_mask.hdr.hop_limits = 0xFF;
 524                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 525                 item.spec = &ipv6;
 526                 item.mask = &ipv6_mask;
 527                 field = modify_ipv6;
 528         }
 529         return flow_dv_convert_modify_action(&item, field, resource,
 530                                              MLX5_MODIFICATION_TYPE_SET, error);
 531 }
 532
 533 /**
 534  * Convert modify-header decrement TTL action to DV specification.
 535  *
 536  * @param[in,out] resource
 537  *   Pointer to the modify-header resource.
 538  * @param[in] action
 539  *   Pointer to action specification.
 540  * @param[in] items
 541  *   Pointer to rte_flow_item objects list.
 542  * @param[in] attr
 543  *   Pointer to flow attributes structure.
 544  * @param[out] error
 545  *   Pointer to the error structure.
 546  *
 547  * @return
 548  *   0 on success, a negative errno value otherwise and rte_errno is set.
 549  */
 550 static int
 551 flow_dv_convert_action_modify_dec_ttl
 552                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 553                          const struct rte_flow_item *items,
 554                          union flow_dv_attr *attr,
 555                          struct rte_flow_error *error)
 556 {
 557         struct rte_flow_item item;
 558         struct rte_flow_item_ipv4 ipv4;
 559         struct rte_flow_item_ipv4 ipv4_mask;
 560         struct rte_flow_item_ipv6 ipv6;
 561         struct rte_flow_item_ipv6 ipv6_mask;
 562         struct field_modify_info *field;
 563
 564         if (!attr->valid)
 565                 flow_dv_attr_init(items, attr);
 566         if (attr->ipv4) {
 567                 memset(&ipv4, 0, sizeof(ipv4));
 568                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 569                 ipv4.hdr.time_to_live = 0xFF;
 570                 ipv4_mask.hdr.time_to_live = 0xFF;
 571                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 572                 item.spec = &ipv4;
 573                 item.mask = &ipv4_mask;
 574                 field = modify_ipv4;
 575         }
 576         if (attr->ipv6) {
 577                 memset(&ipv6, 0, sizeof(ipv6));
 578                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 579                 ipv6.hdr.hop_limits = 0xFF;
 580                 ipv6_mask.hdr.hop_limits = 0xFF;
 581                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 582                 item.spec = &ipv6;
 583                 item.mask = &ipv6_mask;
 584                 field = modify_ipv6;
 585         }
 586         return flow_dv_convert_modify_action(&item, field, resource,
 587                                              MLX5_MODIFICATION_TYPE_ADD, error);
 588 }
 589
 590 /**
 591  * Convert modify-header increment/decrement TCP Sequence number
 592  * to DV specification.
 593  *
 594  * @param[in,out] resource
 595  *   Pointer to the modify-header resource.
 596  * @param[in] action
 597  *   Pointer to action specification.
 598  * @param[out] error
 599  *   Pointer to the error structure.
 600  *
 601  * @return
 602  *   0 on success, a negative errno value otherwise and rte_errno is set.
 603  */
 604 static int
 605 flow_dv_convert_action_modify_tcp_seq
 606                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 607                          const struct rte_flow_action *action,
 608                          struct rte_flow_error *error)
 609 {
 610         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 611         uint64_t value = rte_be_to_cpu_32(*conf);
 612         struct rte_flow_item item;
 613         struct rte_flow_item_tcp tcp;
 614         struct rte_flow_item_tcp tcp_mask;
 615
 616         memset(&tcp, 0, sizeof(tcp));
 617         memset(&tcp_mask, 0, sizeof(tcp_mask));
 618         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 619                 /*
 620                  * The HW has no decrement operation, only increment operation.
 621                  * To simulate decrement X from Y using increment operation
 622                  * we need to add UINT32_MAX X times to Y.
 623                  * Each adding of UINT32_MAX decrements Y by 1.
 624                  */
 625                 value *= UINT32_MAX;
 626         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 627         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 628         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 629         item.spec = &tcp;
 630         item.mask = &tcp_mask;
 631         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 632                                              MLX5_MODIFICATION_TYPE_ADD, error);
 633 }
 634
 635 /**
 636  * Convert modify-header increment/decrement TCP Acknowledgment number
 637  * to DV specification.
 638  *
 639  * @param[in,out] resource
 640  *   Pointer to the modify-header resource.
 641  * @param[in] action
 642  *   Pointer to action specification.
 643  * @param[out] error
 644  *   Pointer to the error structure.
 645  *
 646  * @return
 647  *   0 on success, a negative errno value otherwise and rte_errno is set.
 648  */
 649 static int
 650 flow_dv_convert_action_modify_tcp_ack
 651                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 652                          const struct rte_flow_action *action,
 653                          struct rte_flow_error *error)
 654 {
 655         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 656         uint64_t value = rte_be_to_cpu_32(*conf);
 657         struct rte_flow_item item;
 658         struct rte_flow_item_tcp tcp;
 659         struct rte_flow_item_tcp tcp_mask;
 660
 661         memset(&tcp, 0, sizeof(tcp));
 662         memset(&tcp_mask, 0, sizeof(tcp_mask));
 663         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 664                 /*
 665                  * The HW has no decrement operation, only increment operation.
 666                  * To simulate decrement X from Y using increment operation
 667                  * we need to add UINT32_MAX X times to Y.
 668                  * Each adding of UINT32_MAX decrements Y by 1.
 669                  */
 670                 value *= UINT32_MAX;
 671         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 672         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 673         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 674         item.spec = &tcp;
 675         item.mask = &tcp_mask;
 676         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 677                                              MLX5_MODIFICATION_TYPE_ADD, error);
 678 }
 679
 680 /**
 681  * Validate META item.
 682  *
 683  * @param[in] dev
 684  *   Pointer to the rte_eth_dev structure.
 685  * @param[in] item
 686  *   Item specification.
 687  * @param[in] attr
 688  *   Attributes of flow that includes this item.
 689  * @param[out] error
 690  *   Pointer to error structure.
 691  *
 692  * @return
 693  *   0 on success, a negative errno value otherwise and rte_errno is set.
 694  */
 695 static int
 696 flow_dv_validate_item_meta(struct rte_eth_dev *dev,
 697                            const struct rte_flow_item *item,
 698                            const struct rte_flow_attr *attr,
 699                            struct rte_flow_error *error)
 700 {
 701         const struct rte_flow_item_meta *spec = item->spec;
 702         const struct rte_flow_item_meta *mask = item->mask;
 703         const struct rte_flow_item_meta nic_mask = {
 704                 .data = RTE_BE32(UINT32_MAX)
 705         };
 706         int ret;
 707         uint64_t offloads = dev->data->dev_conf.txmode.offloads;
 708
 709         if (!(offloads & DEV_TX_OFFLOAD_MATCH_METADATA))
 710                 return rte_flow_error_set(error, EPERM,
 711                                           RTE_FLOW_ERROR_TYPE_ITEM,
 712                                           NULL,
 713                                           "match on metadata offload "
 714                                           "configuration is off for this port");
 715         if (!spec)
 716                 return rte_flow_error_set(error, EINVAL,
 717                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 718                                           item->spec,
 719                                           "data cannot be empty");
 720         if (!spec->data)
 721                 return rte_flow_error_set(error, EINVAL,
 722                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 723                                           NULL,
 724                                           "data cannot be zero");
 725         if (!mask)
 726                 mask = &rte_flow_item_meta_mask;
 727         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
 728                                         (const uint8_t *)&nic_mask,
 729                                         sizeof(struct rte_flow_item_meta),
 730                                         error);
 731         if (ret < 0)
 732                 return ret;
 733         if (attr->ingress)
 734                 return rte_flow_error_set(error, ENOTSUP,
 735                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 736                                           NULL,
 737                                           "pattern not supported for ingress");
 738         return 0;
 739 }
 740
 741 /**
 742  * Validate vport item.
 743  *
 744  * @param[in] dev
 745  *   Pointer to the rte_eth_dev structure.
 746  * @param[in] item
 747  *   Item specification.
 748  * @param[in] attr
 749  *   Attributes of flow that includes this item.
 750  * @param[in] item_flags
 751  *   Bit-fields that holds the items detected until now.
 752  * @param[out] error
 753  *   Pointer to error structure.
 754  *
 755  * @return
 756  *   0 on success, a negative errno value otherwise and rte_errno is set.
 757  */
 758 static int
 759 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 760                               const struct rte_flow_item *item,
 761                               const struct rte_flow_attr *attr,
 762                               uint64_t item_flags,
 763                               struct rte_flow_error *error)
 764 {
 765         const struct rte_flow_item_port_id *spec = item->spec;
 766         const struct rte_flow_item_port_id *mask = item->mask;
 767         const struct rte_flow_item_port_id switch_mask = {
 768                         .id = 0xffffffff,
 769         };
 770         uint16_t esw_domain_id;
 771         uint16_t item_port_esw_domain_id;
 772         int ret;
 773
 774         if (!attr->transfer)
 775                 return rte_flow_error_set(error, EINVAL,
 776                                           RTE_FLOW_ERROR_TYPE_ITEM,
 777                                           NULL,
 778                                           "match on port id is valid only"
 779                                           " when transfer flag is enabled");
 780         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
 781                 return rte_flow_error_set(error, ENOTSUP,
 782                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 783                                           "multiple source ports are not"
 784                                           " supported");
 785         if (!mask)
 786                 mask = &switch_mask;
 787         if (mask->id != 0xffffffff)
 788                 return rte_flow_error_set(error, ENOTSUP,
 789                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
 790                                            mask,
 791                                            "no support for partial mask on"
 792                                            " \"id\" field");
 793         ret = mlx5_flow_item_acceptable
 794                                 (item, (const uint8_t *)mask,
 795                                  (const uint8_t *)&rte_flow_item_port_id_mask,
 796                                  sizeof(struct rte_flow_item_port_id),
 797                                  error);
 798         if (ret)
 799                 return ret;
 800         if (!spec)
 801                 return 0;
 802         ret = mlx5_port_to_eswitch_info(spec->id, &item_port_esw_domain_id,
 803                                         NULL);
 804         if (ret)
 805                 return rte_flow_error_set(error, -ret,
 806                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 807                                           "failed to obtain E-Switch info for"
 808                                           " port");
 809         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
 810                                         &esw_domain_id, NULL);
 811         if (ret < 0)
 812                 return rte_flow_error_set(error, -ret,
 813                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 814                                           NULL,
 815                                           "failed to obtain E-Switch info");
 816         if (item_port_esw_domain_id != esw_domain_id)
 817                 return rte_flow_error_set(error, -ret,
 818                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 819                                           "cannot match on a port from a"
 820                                           " different E-Switch");
 821         return 0;
 822 }
 823
 824 /**
 825  * Validate the pop VLAN action.
 826  *
 827  * @param[in] dev
 828  *   Pointer to the rte_eth_dev structure.
 829  * @param[in] action_flags
 830  *   Holds the actions detected until now.
 831  * @param[in] action
 832  *   Pointer to the pop vlan action.
 833  * @param[in] item_flags
 834  *   The items found in this flow rule.
 835  * @param[in] attr
 836  *   Pointer to flow attributes.
 837  * @param[out] error
 838  *   Pointer to error structure.
 839  *
 840  * @return
 841  *   0 on success, a negative errno value otherwise and rte_errno is set.
 842  */
 843 static int
 844 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
 845                                  uint64_t action_flags,
 846                                  const struct rte_flow_action *action,
 847                                  uint64_t item_flags,
 848                                  const struct rte_flow_attr *attr,
 849                                  struct rte_flow_error *error)
 850 {
 851         struct mlx5_priv *priv = dev->data->dev_private;
 852
 853         (void)action;
 854         (void)attr;
 855         if (!priv->sh->pop_vlan_action)
 856                 return rte_flow_error_set(error, ENOTSUP,
 857                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 858                                           NULL,
 859                                           "pop vlan action is not supported");
 860         /*
 861          * Check for inconsistencies:
 862          *  fail strip_vlan in a flow that matches packets without VLAN tags.
 863          *  fail strip_vlan in a flow that matches packets without explicitly a
 864          *  matching on VLAN tag ?
 865          */
 866         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
 867                 return rte_flow_error_set(error, ENOTSUP,
 868                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 869                                           NULL,
 870                                           "no support for multiple vlan pop "
 871                                           "actions");
 872         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
 873                 return rte_flow_error_set(error, ENOTSUP,
 874                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 875                                           NULL,
 876                                           "cannot pop vlan without a "
 877                                           "match on (outer) vlan in the flow");
 878         return 0;
 879 }
 880
 881 /**
 882  * Get VLAN default info from vlan match info.
 883  *
 884  * @param[in] dev
 885  *   Pointer to the rte_eth_dev structure.
 886  * @param[in] item
 887  *   the list of item specifications.
 888  * @param[out] vlan
 889  *   pointer VLAN info to fill to.
 890  * @param[out] error
 891  *   Pointer to error structure.
 892  *
 893  * @return
 894  *   0 on success, a negative errno value otherwise and rte_errno is set.
 895  */
 896 static void
 897 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
 898                                   struct rte_vlan_hdr *vlan)
 899 {
 900         const struct rte_flow_item_vlan nic_mask = {
 901                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
 902                                 MLX5DV_FLOW_VLAN_VID_MASK),
 903                 .inner_type = RTE_BE16(0xffff),
 904         };
 905
 906         if (items == NULL)
 907                 return;
 908         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
 909                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
 910                 ;
 911         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
 912                 const struct rte_flow_item_vlan *vlan_m = items->mask;
 913                 const struct rte_flow_item_vlan *vlan_v = items->spec;
 914
 915                 if (!vlan_m)
 916                         vlan_m = &nic_mask;
 917                 /* Only full match values are accepted */
 918                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
 919                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
 920                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
 921                         vlan->vlan_tci |=
 922                                 rte_be_to_cpu_16(vlan_v->tci &
 923                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
 924                 }
 925                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
 926                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
 927                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 928                         vlan->vlan_tci |=
 929                                 rte_be_to_cpu_16(vlan_v->tci &
 930                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
 931                 }
 932                 if (vlan_m->inner_type == nic_mask.inner_type)
 933                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
 934                                                            vlan_m->inner_type);
 935         }
 936 }
 937
 938 /**
 939  * Validate the push VLAN action.
 940  *
 941  * @param[in] action_flags
 942  *   Holds the actions detected until now.
 943  * @param[in] action
 944  *   Pointer to the encap action.
 945  * @param[in] attr
 946  *   Pointer to flow attributes
 947  * @param[out] error
 948  *   Pointer to error structure.
 949  *
 950  * @return
 951  *   0 on success, a negative errno value otherwise and rte_errno is set.
 952  */
 953 static int
 954 flow_dv_validate_action_push_vlan(uint64_t action_flags,
 955                                   const struct rte_flow_action *action,
 956                                   const struct rte_flow_attr *attr,
 957                                   struct rte_flow_error *error)
 958 {
 959         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
 960
 961         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
 962             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
 963                 return rte_flow_error_set(error, EINVAL,
 964                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 965                                           "invalid vlan ethertype");
 966         if (action_flags &
 967                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
 968                 return rte_flow_error_set(error, ENOTSUP,
 969                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 970                                           "no support for multiple VLAN "
 971                                           "actions");
 972         (void)attr;
 973         return 0;
 974 }
 975
 976 /**
 977  * Validate the set VLAN PCP.
 978  *
 979  * @param[in] action_flags
 980  *   Holds the actions detected until now.
 981  * @param[in] actions
 982  *   Pointer to the list of actions remaining in the flow rule.
 983  * @param[in] attr
 984  *   Pointer to flow attributes
 985  * @param[out] error
 986  *   Pointer to error structure.
 987  *
 988  * @return
 989  *   0 on success, a negative errno value otherwise and rte_errno is set.
 990  */
 991 static int
 992 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
 993                                      const struct rte_flow_action actions[],
 994                                      struct rte_flow_error *error)
 995 {
 996         const struct rte_flow_action *action = actions;
 997         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
 998
 999         if (conf->vlan_pcp > 7)
1000                 return rte_flow_error_set(error, EINVAL,
1001                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1002                                           "VLAN PCP value is too big");
1003         if (mlx5_flow_find_action(actions,
1004                                   RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN) == NULL)
1005                 return rte_flow_error_set(error, ENOTSUP,
1006                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1007                                           "set VLAN PCP can only be used "
1008                                           "with push VLAN action");
1009         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
1010                 return rte_flow_error_set(error, ENOTSUP,
1011                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1012                                           "set VLAN PCP action must precede "
1013                                           "the push VLAN action");
1014         return 0;
1015 }
1016
1017 /**
1018  * Validate count action.
1019  *
1020  * @param[in] dev
1021  *   device otr.
1022  * @param[out] error
1023  *   Pointer to error structure.
1024  *
1025  * @return
1026  *   0 on success, a negative errno value otherwise and rte_errno is set.
1027  */
1028 static int
1029 flow_dv_validate_action_count(struct rte_eth_dev *dev,
1030                               struct rte_flow_error *error)
1031 {
1032         struct mlx5_priv *priv = dev->data->dev_private;
1033
1034         if (!priv->config.devx)
1035                 goto notsup_err;
1036 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
1037         return 0;
1038 #endif
1039 notsup_err:
1040         return rte_flow_error_set
1041                       (error, ENOTSUP,
1042                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1043                        NULL,
1044                        "count action not supported");
1045 }
1046
1047 /**
1048  * Validate the L2 encap action.
1049  *
1050  * @param[in] action_flags
1051  *   Holds the actions detected until now.
1052  * @param[in] action
1053  *   Pointer to the encap action.
1054  * @param[in] attr
1055  *   Pointer to flow attributes
1056  * @param[out] error
1057  *   Pointer to error structure.
1058  *
1059  * @return
1060  *   0 on success, a negative errno value otherwise and rte_errno is set.
1061  */
1062 static int
1063 flow_dv_validate_action_l2_encap(uint64_t action_flags,
1064                                  const struct rte_flow_action *action,
1065                                  const struct rte_flow_attr *attr,
1066                                  struct rte_flow_error *error)
1067 {
1068         if (!(action->conf))
1069                 return rte_flow_error_set(error, EINVAL,
1070                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1071                                           "configuration cannot be null");
1072         if (action_flags & MLX5_FLOW_ACTION_DROP)
1073                 return rte_flow_error_set(error, EINVAL,
1074                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1075                                           "can't drop and encap in same flow");
1076         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
1077                 return rte_flow_error_set(error, EINVAL,
1078                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1079                                           "can only have a single encap or"
1080                                           " decap action in a flow");
1081         if (!attr->transfer && attr->ingress)
1082                 return rte_flow_error_set(error, ENOTSUP,
1083                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1084                                           NULL,
1085                                           "encap action not supported for "
1086                                           "ingress");
1087         return 0;
1088 }
1089
1090 /**
1091  * Validate the L2 decap action.
1092  *
1093  * @param[in] action_flags
1094  *   Holds the actions detected until now.
1095  * @param[in] attr
1096  *   Pointer to flow attributes
1097  * @param[out] error
1098  *   Pointer to error structure.
1099  *
1100  * @return
1101  *   0 on success, a negative errno value otherwise and rte_errno is set.
1102  */
1103 static int
1104 flow_dv_validate_action_l2_decap(uint64_t action_flags,
1105                                  const struct rte_flow_attr *attr,
1106                                  struct rte_flow_error *error)
1107 {
1108         if (action_flags & MLX5_FLOW_ACTION_DROP)
1109                 return rte_flow_error_set(error, EINVAL,
1110                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1111                                           "can't drop and decap in same flow");
1112         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
1113                 return rte_flow_error_set(error, EINVAL,
1114                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1115                                           "can only have a single encap or"
1116                                           " decap action in a flow");
1117         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
1118                 return rte_flow_error_set(error, EINVAL,
1119                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1120                                           "can't have decap action after"
1121                                           " modify action");
1122         if (attr->egress)
1123                 return rte_flow_error_set(error, ENOTSUP,
1124                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1125                                           NULL,
1126                                           "decap action not supported for "
1127                                           "egress");
1128         return 0;
1129 }
1130
1131 /**
1132  * Validate the raw encap action.
1133  *
1134  * @param[in] action_flags
1135  *   Holds the actions detected until now.
1136  * @param[in] action
1137  *   Pointer to the encap action.
1138  * @param[in] attr
1139  *   Pointer to flow attributes
1140  * @param[out] error
1141  *   Pointer to error structure.
1142  *
1143  * @return
1144  *   0 on success, a negative errno value otherwise and rte_errno is set.
1145  */
1146 static int
1147 flow_dv_validate_action_raw_encap(uint64_t action_flags,
1148                                   const struct rte_flow_action *action,
1149                                   const struct rte_flow_attr *attr,
1150                                   struct rte_flow_error *error)
1151 {
1152         const struct rte_flow_action_raw_encap *raw_encap =
1153                 (const struct rte_flow_action_raw_encap *)action->conf;
1154         if (!(action->conf))
1155                 return rte_flow_error_set(error, EINVAL,
1156                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1157                                           "configuration cannot be null");
1158         if (action_flags & MLX5_FLOW_ACTION_DROP)
1159                 return rte_flow_error_set(error, EINVAL,
1160                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1161                                           "can't drop and encap in same flow");
1162         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1163                 return rte_flow_error_set(error, EINVAL,
1164                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1165                                           "can only have a single encap"
1166                                           " action in a flow");
1167         /* encap without preceding decap is not supported for ingress */
1168         if (!attr->transfer &&  attr->ingress &&
1169             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
1170                 return rte_flow_error_set(error, ENOTSUP,
1171                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1172                                           NULL,
1173                                           "encap action not supported for "
1174                                           "ingress");
1175         if (!raw_encap->size || !raw_encap->data)
1176                 return rte_flow_error_set(error, EINVAL,
1177                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1178                                           "raw encap data cannot be empty");
1179         return 0;
1180 }
1181
1182 /**
1183  * Validate the raw decap action.
1184  *
1185  * @param[in] action_flags
1186  *   Holds the actions detected until now.
1187  * @param[in] action
1188  *   Pointer to the encap action.
1189  * @param[in] attr
1190  *   Pointer to flow attributes
1191  * @param[out] error
1192  *   Pointer to error structure.
1193  *
1194  * @return
1195  *   0 on success, a negative errno value otherwise and rte_errno is set.
1196  */
1197 static int
1198 flow_dv_validate_action_raw_decap(uint64_t action_flags,
1199                                   const struct rte_flow_action *action,
1200                                   const struct rte_flow_attr *attr,
1201                                   struct rte_flow_error *error)
1202 {
1203         if (action_flags & MLX5_FLOW_ACTION_DROP)
1204                 return rte_flow_error_set(error, EINVAL,
1205                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1206                                           "can't drop and decap in same flow");
1207         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1208                 return rte_flow_error_set(error, EINVAL,
1209                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1210                                           "can't have encap action before"
1211                                           " decap action");
1212         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
1213                 return rte_flow_error_set(error, EINVAL,
1214                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1215                                           "can only have a single decap"
1216                                           " action in a flow");
1217         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
1218                 return rte_flow_error_set(error, EINVAL,
1219                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1220                                           "can't have decap action after"
1221                                           " modify action");
1222         /* decap action is valid on egress only if it is followed by encap */
1223         if (attr->egress) {
1224                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
1225                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
1226                        action++) {
1227                 }
1228                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
1229                         return rte_flow_error_set
1230                                         (error, ENOTSUP,
1231                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1232                                          NULL, "decap action not supported"
1233                                          " for egress");
1234         }
1235         return 0;
1236 }
1237
1238 /**
1239  * Find existing encap/decap resource or create and register a new one.
1240  *
1241  * @param dev[in, out]
1242  *   Pointer to rte_eth_dev structure.
1243  * @param[in, out] resource
1244  *   Pointer to encap/decap resource.
1245  * @parm[in, out] dev_flow
1246  *   Pointer to the dev_flow.
1247  * @param[out] error
1248  *   pointer to error structure.
1249  *
1250  * @return
1251  *   0 on success otherwise -errno and errno is set.
1252  */
1253 static int
1254 flow_dv_encap_decap_resource_register
1255                         (struct rte_eth_dev *dev,
1256                          struct mlx5_flow_dv_encap_decap_resource *resource,
1257                          struct mlx5_flow *dev_flow,
1258                          struct rte_flow_error *error)
1259 {
1260         struct mlx5_priv *priv = dev->data->dev_private;
1261         struct mlx5_ibv_shared *sh = priv->sh;
1262         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
1263         struct rte_flow *flow = dev_flow->flow;
1264         struct mlx5dv_dr_domain *domain;
1265
1266         resource->flags = flow->group ? 0 : 1;
1267         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1268                 domain = sh->fdb_domain;
1269         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1270                 domain = sh->rx_domain;
1271         else
1272                 domain = sh->tx_domain;
1273
1274         /* Lookup a matching resource from cache. */
1275         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
1276                 if (resource->reformat_type == cache_resource->reformat_type &&
1277                     resource->ft_type == cache_resource->ft_type &&
1278                     resource->flags == cache_resource->flags &&
1279                     resource->size == cache_resource->size &&
1280                     !memcmp((const void *)resource->buf,
1281                             (const void *)cache_resource->buf,
1282                             resource->size)) {
1283                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
1284                                 (void *)cache_resource,
1285                                 rte_atomic32_read(&cache_resource->refcnt));
1286                         rte_atomic32_inc(&cache_resource->refcnt);
1287                         dev_flow->dv.encap_decap = cache_resource;
1288                         return 0;
1289                 }
1290         }
1291         /* Register new encap/decap resource. */
1292         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1293         if (!cache_resource)
1294                 return rte_flow_error_set(error, ENOMEM,
1295                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1296                                           "cannot allocate resource memory");
1297         *cache_resource = *resource;
1298         cache_resource->verbs_action =
1299                 mlx5_glue->dv_create_flow_action_packet_reformat
1300                         (sh->ctx, cache_resource->reformat_type,
1301                          cache_resource->ft_type, domain, cache_resource->flags,
1302                          cache_resource->size,
1303                          (cache_resource->size ? cache_resource->buf : NULL));
1304         if (!cache_resource->verbs_action) {
1305                 rte_free(cache_resource);
1306                 return rte_flow_error_set(error, ENOMEM,
1307                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1308                                           NULL, "cannot create action");
1309         }
1310         rte_atomic32_init(&cache_resource->refcnt);
1311         rte_atomic32_inc(&cache_resource->refcnt);
1312         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
1313         dev_flow->dv.encap_decap = cache_resource;
1314         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
1315                 (void *)cache_resource,
1316                 rte_atomic32_read(&cache_resource->refcnt));
1317         return 0;
1318 }
1319
1320 /**
1321  * Find existing table jump resource or create and register a new one.
1322  *
1323  * @param dev[in, out]
1324  *   Pointer to rte_eth_dev structure.
1325  * @param[in, out] resource
1326  *   Pointer to jump table resource.
1327  * @parm[in, out] dev_flow
1328  *   Pointer to the dev_flow.
1329  * @param[out] error
1330  *   pointer to error structure.
1331  *
1332  * @return
1333  *   0 on success otherwise -errno and errno is set.
1334  */
1335 static int
1336 flow_dv_jump_tbl_resource_register
1337                         (struct rte_eth_dev *dev,
1338                          struct mlx5_flow_dv_jump_tbl_resource *resource,
1339                          struct mlx5_flow *dev_flow,
1340                          struct rte_flow_error *error)
1341 {
1342         struct mlx5_priv *priv = dev->data->dev_private;
1343         struct mlx5_ibv_shared *sh = priv->sh;
1344         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
1345
1346         /* Lookup a matching resource from cache. */
1347         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
1348                 if (resource->tbl == cache_resource->tbl) {
1349                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
1350                                 (void *)cache_resource,
1351                                 rte_atomic32_read(&cache_resource->refcnt));
1352                         rte_atomic32_inc(&cache_resource->refcnt);
1353                         dev_flow->dv.jump = cache_resource;
1354                         return 0;
1355                 }
1356         }
1357         /* Register new jump table resource. */
1358         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1359         if (!cache_resource)
1360                 return rte_flow_error_set(error, ENOMEM,
1361                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1362                                           "cannot allocate resource memory");
1363         *cache_resource = *resource;
1364         cache_resource->action =
1365                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
1366                 (resource->tbl->obj);
1367         if (!cache_resource->action) {
1368                 rte_free(cache_resource);
1369                 return rte_flow_error_set(error, ENOMEM,
1370                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1371                                           NULL, "cannot create action");
1372         }
1373         rte_atomic32_init(&cache_resource->refcnt);
1374         rte_atomic32_inc(&cache_resource->refcnt);
1375         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
1376         dev_flow->dv.jump = cache_resource;
1377         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
1378                 (void *)cache_resource,
1379                 rte_atomic32_read(&cache_resource->refcnt));
1380         return 0;
1381 }
1382
1383 /**
1384  * Find existing table port ID resource or create and register a new one.
1385  *
1386  * @param dev[in, out]
1387  *   Pointer to rte_eth_dev structure.
1388  * @param[in, out] resource
1389  *   Pointer to port ID action resource.
1390  * @parm[in, out] dev_flow
1391  *   Pointer to the dev_flow.
1392  * @param[out] error
1393  *   pointer to error structure.
1394  *
1395  * @return
1396  *   0 on success otherwise -errno and errno is set.
1397  */
1398 static int
1399 flow_dv_port_id_action_resource_register
1400                         (struct rte_eth_dev *dev,
1401                          struct mlx5_flow_dv_port_id_action_resource *resource,
1402                          struct mlx5_flow *dev_flow,
1403                          struct rte_flow_error *error)
1404 {
1405         struct mlx5_priv *priv = dev->data->dev_private;
1406         struct mlx5_ibv_shared *sh = priv->sh;
1407         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
1408
1409         /* Lookup a matching resource from cache. */
1410         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
1411                 if (resource->port_id == cache_resource->port_id) {
1412                         DRV_LOG(DEBUG, "port id action resource resource %p: "
1413                                 "refcnt %d++",
1414                                 (void *)cache_resource,
1415                                 rte_atomic32_read(&cache_resource->refcnt));
1416                         rte_atomic32_inc(&cache_resource->refcnt);
1417                         dev_flow->dv.port_id_action = cache_resource;
1418                         return 0;
1419                 }
1420         }
1421         /* Register new port id action resource. */
1422         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1423         if (!cache_resource)
1424                 return rte_flow_error_set(error, ENOMEM,
1425                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1426                                           "cannot allocate resource memory");
1427         *cache_resource = *resource;
1428         cache_resource->action =
1429                 mlx5_glue->dr_create_flow_action_dest_vport
1430                         (priv->sh->fdb_domain, resource->port_id);
1431         if (!cache_resource->action) {
1432                 rte_free(cache_resource);
1433                 return rte_flow_error_set(error, ENOMEM,
1434                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1435                                           NULL, "cannot create action");
1436         }
1437         rte_atomic32_init(&cache_resource->refcnt);
1438         rte_atomic32_inc(&cache_resource->refcnt);
1439         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
1440         dev_flow->dv.port_id_action = cache_resource;
1441         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
1442                 (void *)cache_resource,
1443                 rte_atomic32_read(&cache_resource->refcnt));
1444         return 0;
1445 }
1446
1447 /**
1448  * Find existing push vlan resource or create and register a new one.
1449  *
1450  * @param dev[in, out]
1451  *   Pointer to rte_eth_dev structure.
1452  * @param[in, out] resource
1453  *   Pointer to port ID action resource.
1454  * @parm[in, out] dev_flow
1455  *   Pointer to the dev_flow.
1456  * @param[out] error
1457  *   pointer to error structure.
1458  *
1459  * @return
1460  *   0 on success otherwise -errno and errno is set.
1461  */
1462 static int
1463 flow_dv_push_vlan_action_resource_register
1464                        (struct rte_eth_dev *dev,
1465                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
1466                         struct mlx5_flow *dev_flow,
1467                         struct rte_flow_error *error)
1468 {
1469         struct mlx5_priv *priv = dev->data->dev_private;
1470         struct mlx5_ibv_shared *sh = priv->sh;
1471         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
1472         struct mlx5dv_dr_domain *domain;
1473
1474         /* Lookup a matching resource from cache. */
1475         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
1476                 if (resource->vlan_tag == cache_resource->vlan_tag &&
1477                     resource->ft_type == cache_resource->ft_type) {
1478                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
1479                                 "refcnt %d++",
1480                                 (void *)cache_resource,
1481                                 rte_atomic32_read(&cache_resource->refcnt));
1482                         rte_atomic32_inc(&cache_resource->refcnt);
1483                         dev_flow->dv.push_vlan_res = cache_resource;
1484                         return 0;
1485                 }
1486         }
1487         /* Register new push_vlan action resource. */
1488         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1489         if (!cache_resource)
1490                 return rte_flow_error_set(error, ENOMEM,
1491                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1492                                           "cannot allocate resource memory");
1493         *cache_resource = *resource;
1494         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1495                 domain = sh->fdb_domain;
1496         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1497                 domain = sh->rx_domain;
1498         else
1499                 domain = sh->tx_domain;
1500         cache_resource->action =
1501                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
1502                                                            resource->vlan_tag);
1503         if (!cache_resource->action) {
1504                 rte_free(cache_resource);
1505                 return rte_flow_error_set(error, ENOMEM,
1506                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1507                                           NULL, "cannot create action");
1508         }
1509         rte_atomic32_init(&cache_resource->refcnt);
1510         rte_atomic32_inc(&cache_resource->refcnt);
1511         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
1512         dev_flow->dv.push_vlan_res = cache_resource;
1513         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
1514                 (void *)cache_resource,
1515                 rte_atomic32_read(&cache_resource->refcnt));
1516         return 0;
1517 }
1518 /**
1519  * Get the size of specific rte_flow_item_type
1520  *
1521  * @param[in] item_type
1522  *   Tested rte_flow_item_type.
1523  *
1524  * @return
1525  *   sizeof struct item_type, 0 if void or irrelevant.
1526  */
1527 static size_t
1528 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
1529 {
1530         size_t retval;
1531
1532         switch (item_type) {
1533         case RTE_FLOW_ITEM_TYPE_ETH:
1534                 retval = sizeof(struct rte_flow_item_eth);
1535                 break;
1536         case RTE_FLOW_ITEM_TYPE_VLAN:
1537                 retval = sizeof(struct rte_flow_item_vlan);
1538                 break;
1539         case RTE_FLOW_ITEM_TYPE_IPV4:
1540                 retval = sizeof(struct rte_flow_item_ipv4);
1541                 break;
1542         case RTE_FLOW_ITEM_TYPE_IPV6:
1543                 retval = sizeof(struct rte_flow_item_ipv6);
1544                 break;
1545         case RTE_FLOW_ITEM_TYPE_UDP:
1546                 retval = sizeof(struct rte_flow_item_udp);
1547                 break;
1548         case RTE_FLOW_ITEM_TYPE_TCP:
1549                 retval = sizeof(struct rte_flow_item_tcp);
1550                 break;
1551         case RTE_FLOW_ITEM_TYPE_VXLAN:
1552                 retval = sizeof(struct rte_flow_item_vxlan);
1553                 break;
1554         case RTE_FLOW_ITEM_TYPE_GRE:
1555                 retval = sizeof(struct rte_flow_item_gre);
1556                 break;
1557         case RTE_FLOW_ITEM_TYPE_NVGRE:
1558                 retval = sizeof(struct rte_flow_item_nvgre);
1559                 break;
1560         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1561                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
1562                 break;
1563         case RTE_FLOW_ITEM_TYPE_MPLS:
1564                 retval = sizeof(struct rte_flow_item_mpls);
1565                 break;
1566         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
1567         default:
1568                 retval = 0;
1569                 break;
1570         }
1571         return retval;
1572 }
1573
1574 #define MLX5_ENCAP_IPV4_VERSION         0x40
1575 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
1576 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
1577 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
1578 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
1579 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
1580 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
1581
1582 /**
1583  * Convert the encap action data from list of rte_flow_item to raw buffer
1584  *
1585  * @param[in] items
1586  *   Pointer to rte_flow_item objects list.
1587  * @param[out] buf
1588  *   Pointer to the output buffer.
1589  * @param[out] size
1590  *   Pointer to the output buffer size.
1591  * @param[out] error
1592  *   Pointer to the error structure.
1593  *
1594  * @return
1595  *   0 on success, a negative errno value otherwise and rte_errno is set.
1596  */
1597 static int
1598 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
1599                            size_t *size, struct rte_flow_error *error)
1600 {
1601         struct rte_ether_hdr *eth = NULL;
1602         struct rte_vlan_hdr *vlan = NULL;
1603         struct rte_ipv4_hdr *ipv4 = NULL;
1604         struct rte_ipv6_hdr *ipv6 = NULL;
1605         struct rte_udp_hdr *udp = NULL;
1606         struct rte_vxlan_hdr *vxlan = NULL;
1607         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
1608         struct rte_gre_hdr *gre = NULL;
1609         size_t len;
1610         size_t temp_size = 0;
1611
1612         if (!items)
1613                 return rte_flow_error_set(error, EINVAL,
1614                                           RTE_FLOW_ERROR_TYPE_ACTION,
1615                                           NULL, "invalid empty data");
1616         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1617                 len = flow_dv_get_item_len(items->type);
1618                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
1619                         return rte_flow_error_set(error, EINVAL,
1620                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1621                                                   (void *)items->type,
1622                                                   "items total size is too big"
1623                                                   " for encap action");
1624                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
1625                 switch (items->type) {
1626                 case RTE_FLOW_ITEM_TYPE_ETH:
1627                         eth = (struct rte_ether_hdr *)&buf[temp_size];
1628                         break;
1629                 case RTE_FLOW_ITEM_TYPE_VLAN:
1630                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
1631                         if (!eth)
1632                                 return rte_flow_error_set(error, EINVAL,
1633                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1634                                                 (void *)items->type,
1635                                                 "eth header not found");
1636                         if (!eth->ether_type)
1637                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
1638                         break;
1639                 case RTE_FLOW_ITEM_TYPE_IPV4:
1640                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
1641                         if (!vlan && !eth)
1642                                 return rte_flow_error_set(error, EINVAL,
1643                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1644                                                 (void *)items->type,
1645                                                 "neither eth nor vlan"
1646                                                 " header found");
1647                         if (vlan && !vlan->eth_proto)
1648                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1649                         else if (eth && !eth->ether_type)
1650                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1651                         if (!ipv4->version_ihl)
1652                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
1653                                                     MLX5_ENCAP_IPV4_IHL_MIN;
1654                         if (!ipv4->time_to_live)
1655                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
1656                         break;
1657                 case RTE_FLOW_ITEM_TYPE_IPV6:
1658                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
1659                         if (!vlan && !eth)
1660                                 return rte_flow_error_set(error, EINVAL,
1661                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1662                                                 (void *)items->type,
1663                                                 "neither eth nor vlan"
1664                                                 " header found");
1665                         if (vlan && !vlan->eth_proto)
1666                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1667                         else if (eth && !eth->ether_type)
1668                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1669                         if (!ipv6->vtc_flow)
1670                                 ipv6->vtc_flow =
1671                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
1672                         if (!ipv6->hop_limits)
1673                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
1674                         break;
1675                 case RTE_FLOW_ITEM_TYPE_UDP:
1676                         udp = (struct rte_udp_hdr *)&buf[temp_size];
1677                         if (!ipv4 && !ipv6)
1678                                 return rte_flow_error_set(error, EINVAL,
1679                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1680                                                 (void *)items->type,
1681                                                 "ip header not found");
1682                         if (ipv4 && !ipv4->next_proto_id)
1683                                 ipv4->next_proto_id = IPPROTO_UDP;
1684                         else if (ipv6 && !ipv6->proto)
1685                                 ipv6->proto = IPPROTO_UDP;
1686                         break;
1687                 case RTE_FLOW_ITEM_TYPE_VXLAN:
1688                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
1689                         if (!udp)
1690                                 return rte_flow_error_set(error, EINVAL,
1691                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1692                                                 (void *)items->type,
1693                                                 "udp header not found");
1694                         if (!udp->dst_port)
1695                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
1696                         if (!vxlan->vx_flags)
1697                                 vxlan->vx_flags =
1698                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
1699                         break;
1700                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1701                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
1702                         if (!udp)
1703                                 return rte_flow_error_set(error, EINVAL,
1704                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1705                                                 (void *)items->type,
1706                                                 "udp header not found");
1707                         if (!vxlan_gpe->proto)
1708                                 return rte_flow_error_set(error, EINVAL,
1709                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1710                                                 (void *)items->type,
1711                                                 "next protocol not found");
1712                         if (!udp->dst_port)
1713                                 udp->dst_port =
1714                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
1715                         if (!vxlan_gpe->vx_flags)
1716                                 vxlan_gpe->vx_flags =
1717                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
1718                         break;
1719                 case RTE_FLOW_ITEM_TYPE_GRE:
1720                 case RTE_FLOW_ITEM_TYPE_NVGRE:
1721                         gre = (struct rte_gre_hdr *)&buf[temp_size];
1722                         if (!gre->proto)
1723                                 return rte_flow_error_set(error, EINVAL,
1724                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1725                                                 (void *)items->type,
1726                                                 "next protocol not found");
1727                         if (!ipv4 && !ipv6)
1728                                 return rte_flow_error_set(error, EINVAL,
1729                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1730                                                 (void *)items->type,
1731                                                 "ip header not found");
1732                         if (ipv4 && !ipv4->next_proto_id)
1733                                 ipv4->next_proto_id = IPPROTO_GRE;
1734                         else if (ipv6 && !ipv6->proto)
1735                                 ipv6->proto = IPPROTO_GRE;
1736                         break;
1737                 case RTE_FLOW_ITEM_TYPE_VOID:
1738                         break;
1739                 default:
1740                         return rte_flow_error_set(error, EINVAL,
1741                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1742                                                   (void *)items->type,
1743                                                   "unsupported item type");
1744                         break;
1745                 }
1746                 temp_size += len;
1747         }
1748         *size = temp_size;
1749         return 0;
1750 }
1751
1752 static int
1753 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
1754 {
1755         struct rte_ether_hdr *eth = NULL;
1756         struct rte_vlan_hdr *vlan = NULL;
1757         struct rte_ipv6_hdr *ipv6 = NULL;
1758         struct rte_udp_hdr *udp = NULL;
1759         char *next_hdr;
1760         uint16_t proto;
1761
1762         eth = (struct rte_ether_hdr *)data;
1763         next_hdr = (char *)(eth + 1);
1764         proto = RTE_BE16(eth->ether_type);
1765
1766         /* VLAN skipping */
1767         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
1768                 vlan = (struct rte_vlan_hdr *)next_hdr;
1769                 proto = RTE_BE16(vlan->eth_proto);
1770                 next_hdr += sizeof(struct rte_vlan_hdr);
1771         }
1772
1773         /* HW calculates IPv4 csum. no need to proceed */
1774         if (proto == RTE_ETHER_TYPE_IPV4)
1775                 return 0;
1776
1777         /* non IPv4/IPv6 header. not supported */
1778         if (proto != RTE_ETHER_TYPE_IPV6) {
1779                 return rte_flow_error_set(error, ENOTSUP,
1780                                           RTE_FLOW_ERROR_TYPE_ACTION,
1781                                           NULL, "Cannot offload non IPv4/IPv6");
1782         }
1783
1784         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
1785
1786         /* ignore non UDP */
1787         if (ipv6->proto != IPPROTO_UDP)
1788                 return 0;
1789
1790         udp = (struct rte_udp_hdr *)(ipv6 + 1);
1791         udp->dgram_cksum = 0;
1792
1793         return 0;
1794 }
1795
1796 /**
1797  * Convert L2 encap action to DV specification.
1798  *
1799  * @param[in] dev
1800  *   Pointer to rte_eth_dev structure.
1801  * @param[in] action
1802  *   Pointer to action structure.
1803  * @param[in, out] dev_flow
1804  *   Pointer to the mlx5_flow.
1805  * @param[in] transfer
1806  *   Mark if the flow is E-Switch flow.
1807  * @param[out] error
1808  *   Pointer to the error structure.
1809  *
1810  * @return
1811  *   0 on success, a negative errno value otherwise and rte_errno is set.
1812  */
1813 static int
1814 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
1815                                const struct rte_flow_action *action,
1816                                struct mlx5_flow *dev_flow,
1817                                uint8_t transfer,
1818                                struct rte_flow_error *error)
1819 {
1820         const struct rte_flow_item *encap_data;
1821         const struct rte_flow_action_raw_encap *raw_encap_data;
1822         struct mlx5_flow_dv_encap_decap_resource res = {
1823                 .reformat_type =
1824                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
1825                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1826                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
1827         };
1828
1829         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
1830                 raw_encap_data =
1831                         (const struct rte_flow_action_raw_encap *)action->conf;
1832                 res.size = raw_encap_data->size;
1833                 memcpy(res.buf, raw_encap_data->data, res.size);
1834                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
1835                         return -rte_errno;
1836         } else {
1837                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
1838                         encap_data =
1839                                 ((const struct rte_flow_action_vxlan_encap *)
1840                                                 action->conf)->definition;
1841                 else
1842                         encap_data =
1843                                 ((const struct rte_flow_action_nvgre_encap *)
1844                                                 action->conf)->definition;
1845                 if (flow_dv_convert_encap_data(encap_data, res.buf,
1846                                                &res.size, error))
1847                         return -rte_errno;
1848         }
1849         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1850                 return rte_flow_error_set(error, EINVAL,
1851                                           RTE_FLOW_ERROR_TYPE_ACTION,
1852                                           NULL, "can't create L2 encap action");
1853         return 0;
1854 }
1855
1856 /**
1857  * Convert L2 decap action to DV specification.
1858  *
1859  * @param[in] dev
1860  *   Pointer to rte_eth_dev structure.
1861  * @param[in, out] dev_flow
1862  *   Pointer to the mlx5_flow.
1863  * @param[in] transfer
1864  *   Mark if the flow is E-Switch flow.
1865  * @param[out] error
1866  *   Pointer to the error structure.
1867  *
1868  * @return
1869  *   0 on success, a negative errno value otherwise and rte_errno is set.
1870  */
1871 static int
1872 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
1873                                struct mlx5_flow *dev_flow,
1874                                uint8_t transfer,
1875                                struct rte_flow_error *error)
1876 {
1877         struct mlx5_flow_dv_encap_decap_resource res = {
1878                 .size = 0,
1879                 .reformat_type =
1880                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
1881                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1882                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
1883         };
1884
1885         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1886                 return rte_flow_error_set(error, EINVAL,
1887                                           RTE_FLOW_ERROR_TYPE_ACTION,
1888                                           NULL, "can't create L2 decap action");
1889         return 0;
1890 }
1891
1892 /**
1893  * Convert raw decap/encap (L3 tunnel) action to DV specification.
1894  *
1895  * @param[in] dev
1896  *   Pointer to rte_eth_dev structure.
1897  * @param[in] action
1898  *   Pointer to action structure.
1899  * @param[in, out] dev_flow
1900  *   Pointer to the mlx5_flow.
1901  * @param[in] attr
1902  *   Pointer to the flow attributes.
1903  * @param[out] error
1904  *   Pointer to the error structure.
1905  *
1906  * @return
1907  *   0 on success, a negative errno value otherwise and rte_errno is set.
1908  */
1909 static int
1910 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
1911                                 const struct rte_flow_action *action,
1912                                 struct mlx5_flow *dev_flow,
1913                                 const struct rte_flow_attr *attr,
1914                                 struct rte_flow_error *error)
1915 {
1916         const struct rte_flow_action_raw_encap *encap_data;
1917         struct mlx5_flow_dv_encap_decap_resource res;
1918
1919         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
1920         res.size = encap_data->size;
1921         memcpy(res.buf, encap_data->data, res.size);
1922         res.reformat_type = attr->egress ?
1923                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
1924                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
1925         if (attr->transfer)
1926                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
1927         else
1928                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
1929                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
1930         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1931                 return rte_flow_error_set(error, EINVAL,
1932                                           RTE_FLOW_ERROR_TYPE_ACTION,
1933                                           NULL, "can't create encap action");
1934         return 0;
1935 }
1936
1937 /**
1938  * Create action push VLAN.
1939  *
1940  * @param[in] dev
1941  *   Pointer to rte_eth_dev structure.
1942  * @param[in] vlan_tag
1943  *   the vlan tag to push to the Ethernet header.
1944  * @param[in, out] dev_flow
1945  *   Pointer to the mlx5_flow.
1946  * @param[in] attr
1947  *   Pointer to the flow attributes.
1948  * @param[out] error
1949  *   Pointer to the error structure.
1950  *
1951  * @return
1952  *   0 on success, a negative errno value otherwise and rte_errno is set.
1953  */
1954 static int
1955 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
1956                                 const struct rte_flow_attr *attr,
1957                                 const struct rte_vlan_hdr *vlan,
1958                                 struct mlx5_flow *dev_flow,
1959                                 struct rte_flow_error *error)
1960 {
1961         struct mlx5_flow_dv_push_vlan_action_resource res;
1962
1963         res.vlan_tag =
1964                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
1965                                  vlan->vlan_tci);
1966         if (attr->transfer)
1967                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
1968         else
1969                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
1970                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
1971         return flow_dv_push_vlan_action_resource_register
1972                                             (dev, &res, dev_flow, error);
1973 }
1974
1975 /**
1976  * Validate the modify-header actions.
1977  *
1978  * @param[in] action_flags
1979  *   Holds the actions detected until now.
1980  * @param[in] action
1981  *   Pointer to the modify action.
1982  * @param[out] error
1983  *   Pointer to error structure.
1984  *
1985  * @return
1986  *   0 on success, a negative errno value otherwise and rte_errno is set.
1987  */
1988 static int
1989 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
1990                                    const struct rte_flow_action *action,
1991                                    struct rte_flow_error *error)
1992 {
1993         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
1994                 return rte_flow_error_set(error, EINVAL,
1995                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1996                                           NULL, "action configuration not set");
1997         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1998                 return rte_flow_error_set(error, EINVAL,
1999                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2000                                           "can't have encap action before"
2001                                           " modify action");
2002         return 0;
2003 }
2004
2005 /**
2006  * Validate the modify-header MAC address actions.
2007  *
2008  * @param[in] action_flags
2009  *   Holds the actions detected until now.
2010  * @param[in] action
2011  *   Pointer to the modify action.
2012  * @param[in] item_flags
2013  *   Holds the items detected.
2014  * @param[out] error
2015  *   Pointer to error structure.
2016  *
2017  * @return
2018  *   0 on success, a negative errno value otherwise and rte_errno is set.
2019  */
2020 static int
2021 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2022                                    const struct rte_flow_action *action,
2023                                    const uint64_t item_flags,
2024                                    struct rte_flow_error *error)
2025 {
2026         int ret = 0;
2027
2028         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2029         if (!ret) {
2030                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
2031                         return rte_flow_error_set(error, EINVAL,
2032                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2033                                                   NULL,
2034                                                   "no L2 item in pattern");
2035         }
2036         return ret;
2037 }
2038
2039 /**
2040  * Validate the modify-header IPv4 address actions.
2041  *
2042  * @param[in] action_flags
2043  *   Holds the actions detected until now.
2044  * @param[in] action
2045  *   Pointer to the modify action.
2046  * @param[in] item_flags
2047  *   Holds the items detected.
2048  * @param[out] error
2049  *   Pointer to error structure.
2050  *
2051  * @return
2052  *   0 on success, a negative errno value otherwise and rte_errno is set.
2053  */
2054 static int
2055 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
2056                                     const struct rte_flow_action *action,
2057                                     const uint64_t item_flags,
2058                                     struct rte_flow_error *error)
2059 {
2060         int ret = 0;
2061
2062         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2063         if (!ret) {
2064                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
2065                         return rte_flow_error_set(error, EINVAL,
2066                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2067                                                   NULL,
2068                                                   "no ipv4 item in pattern");
2069         }
2070         return ret;
2071 }
2072
2073 /**
2074  * Validate the modify-header IPv6 address actions.
2075  *
2076  * @param[in] action_flags
2077  *   Holds the actions detected until now.
2078  * @param[in] action
2079  *   Pointer to the modify action.
2080  * @param[in] item_flags
2081  *   Holds the items detected.
2082  * @param[out] error
2083  *   Pointer to error structure.
2084  *
2085  * @return
2086  *   0 on success, a negative errno value otherwise and rte_errno is set.
2087  */
2088 static int
2089 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
2090                                     const struct rte_flow_action *action,
2091                                     const uint64_t item_flags,
2092                                     struct rte_flow_error *error)
2093 {
2094         int ret = 0;
2095
2096         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2097         if (!ret) {
2098                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
2099                         return rte_flow_error_set(error, EINVAL,
2100                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2101                                                   NULL,
2102                                                   "no ipv6 item in pattern");
2103         }
2104         return ret;
2105 }
2106
2107 /**
2108  * Validate the modify-header TP actions.
2109  *
2110  * @param[in] action_flags
2111  *   Holds the actions detected until now.
2112  * @param[in] action
2113  *   Pointer to the modify action.
2114  * @param[in] item_flags
2115  *   Holds the items detected.
2116  * @param[out] error
2117  *   Pointer to error structure.
2118  *
2119  * @return
2120  *   0 on success, a negative errno value otherwise and rte_errno is set.
2121  */
2122 static int
2123 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
2124                                   const struct rte_flow_action *action,
2125                                   const uint64_t item_flags,
2126                                   struct rte_flow_error *error)
2127 {
2128         int ret = 0;
2129
2130         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2131         if (!ret) {
2132                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
2133                         return rte_flow_error_set(error, EINVAL,
2134                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2135                                                   NULL, "no transport layer "
2136                                                   "in pattern");
2137         }
2138         return ret;
2139 }
2140
2141 /**
2142  * Validate the modify-header actions of increment/decrement
2143  * TCP Sequence-number.
2144  *
2145  * @param[in] action_flags
2146  *   Holds the actions detected until now.
2147  * @param[in] action
2148  *   Pointer to the modify action.
2149  * @param[in] item_flags
2150  *   Holds the items detected.
2151  * @param[out] error
2152  *   Pointer to error structure.
2153  *
2154  * @return
2155  *   0 on success, a negative errno value otherwise and rte_errno is set.
2156  */
2157 static int
2158 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
2159                                        const struct rte_flow_action *action,
2160                                        const uint64_t item_flags,
2161                                        struct rte_flow_error *error)
2162 {
2163         int ret = 0;
2164
2165         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2166         if (!ret) {
2167                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
2168                         return rte_flow_error_set(error, EINVAL,
2169                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2170                                                   NULL, "no TCP item in"
2171                                                   " pattern");
2172                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
2173                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
2174                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
2175                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
2176                         return rte_flow_error_set(error, EINVAL,
2177                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2178                                                   NULL,
2179                                                   "cannot decrease and increase"
2180                                                   " TCP sequence number"
2181                                                   " at the same time");
2182         }
2183         return ret;
2184 }
2185
2186 /**
2187  * Validate the modify-header actions of increment/decrement
2188  * TCP Acknowledgment number.
2189  *
2190  * @param[in] action_flags
2191  *   Holds the actions detected until now.
2192  * @param[in] action
2193  *   Pointer to the modify action.
2194  * @param[in] item_flags
2195  *   Holds the items detected.
2196  * @param[out] error
2197  *   Pointer to error structure.
2198  *
2199  * @return
2200  *   0 on success, a negative errno value otherwise and rte_errno is set.
2201  */
2202 static int
2203 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
2204                                        const struct rte_flow_action *action,
2205                                        const uint64_t item_flags,
2206                                        struct rte_flow_error *error)
2207 {
2208         int ret = 0;
2209
2210         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2211         if (!ret) {
2212                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
2213                         return rte_flow_error_set(error, EINVAL,
2214                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2215                                                   NULL, "no TCP item in"
2216                                                   " pattern");
2217                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
2218                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
2219                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
2220                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
2221                         return rte_flow_error_set(error, EINVAL,
2222                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2223                                                   NULL,
2224                                                   "cannot decrease and increase"
2225                                                   " TCP acknowledgment number"
2226                                                   " at the same time");
2227         }
2228         return ret;
2229 }
2230
2231 /**
2232  * Validate the modify-header TTL actions.
2233  *
2234  * @param[in] action_flags
2235  *   Holds the actions detected until now.
2236  * @param[in] action
2237  *   Pointer to the modify action.
2238  * @param[in] item_flags
2239  *   Holds the items detected.
2240  * @param[out] error
2241  *   Pointer to error structure.
2242  *
2243  * @return
2244  *   0 on success, a negative errno value otherwise and rte_errno is set.
2245  */
2246 static int
2247 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
2248                                    const struct rte_flow_action *action,
2249                                    const uint64_t item_flags,
2250                                    struct rte_flow_error *error)
2251 {
2252         int ret = 0;
2253
2254         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2255         if (!ret) {
2256                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
2257                         return rte_flow_error_set(error, EINVAL,
2258                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2259                                                   NULL,
2260                                                   "no IP protocol in pattern");
2261         }
2262         return ret;
2263 }
2264
2265 /**
2266  * Validate jump action.
2267  *
2268  * @param[in] action
2269  *   Pointer to the jump action.
2270  * @param[in] action_flags
2271  *   Holds the actions detected until now.
2272  * @param[in] group
2273  *   The group of the current flow.
2274  * @param[out] error
2275  *   Pointer to error structure.
2276  *
2277  * @return
2278  *   0 on success, a negative errno value otherwise and rte_errno is set.
2279  */
2280 static int
2281 flow_dv_validate_action_jump(const struct rte_flow_action *action,
2282                              uint64_t action_flags,
2283                              uint32_t group,
2284                              struct rte_flow_error *error)
2285 {
2286         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2287                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2288                 return rte_flow_error_set(error, EINVAL,
2289                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2290                                           "can't have 2 fate actions in"
2291                                           " same flow");
2292         if (!action->conf)
2293                 return rte_flow_error_set(error, EINVAL,
2294                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2295                                           NULL, "action configuration not set");
2296         if (group >= ((const struct rte_flow_action_jump *)action->conf)->group)
2297                 return rte_flow_error_set(error, EINVAL,
2298                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2299                                           "target group must be higher then"
2300                                           " the current flow group");
2301         return 0;
2302 }
2303
2304 /*
2305  * Validate the port_id action.
2306  *
2307  * @param[in] dev
2308  *   Pointer to rte_eth_dev structure.
2309  * @param[in] action_flags
2310  *   Bit-fields that holds the actions detected until now.
2311  * @param[in] action
2312  *   Port_id RTE action structure.
2313  * @param[in] attr
2314  *   Attributes of flow that includes this action.
2315  * @param[out] error
2316  *   Pointer to error structure.
2317  *
2318  * @return
2319  *   0 on success, a negative errno value otherwise and rte_errno is set.
2320  */
2321 static int
2322 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
2323                                 uint64_t action_flags,
2324                                 const struct rte_flow_action *action,
2325                                 const struct rte_flow_attr *attr,
2326                                 struct rte_flow_error *error)
2327 {
2328         const struct rte_flow_action_port_id *port_id;
2329         uint16_t port;
2330         uint16_t esw_domain_id;
2331         uint16_t act_port_domain_id;
2332         int ret;
2333
2334         if (!attr->transfer)
2335                 return rte_flow_error_set(error, ENOTSUP,
2336                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2337                                           NULL,
2338                                           "port id action is valid in transfer"
2339                                           " mode only");
2340         if (!action || !action->conf)
2341                 return rte_flow_error_set(error, ENOTSUP,
2342                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2343                                           NULL,
2344                                           "port id action parameters must be"
2345                                           " specified");
2346         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2347                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2348                 return rte_flow_error_set(error, EINVAL,
2349                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2350                                           "can have only one fate actions in"
2351                                           " a flow");
2352         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
2353                                         &esw_domain_id, NULL);
2354         if (ret < 0)
2355                 return rte_flow_error_set(error, -ret,
2356                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2357                                           NULL,
2358                                           "failed to obtain E-Switch info");
2359         port_id = action->conf;
2360         port = port_id->original ? dev->data->port_id : port_id->id;
2361         ret = mlx5_port_to_eswitch_info(port, &act_port_domain_id, NULL);
2362         if (ret)
2363                 return rte_flow_error_set
2364                                 (error, -ret,
2365                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
2366                                  "failed to obtain E-Switch port id for port");
2367         if (act_port_domain_id != esw_domain_id)
2368                 return rte_flow_error_set
2369                                 (error, -ret,
2370                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2371                                  "port does not belong to"
2372                                  " E-Switch being configured");
2373         return 0;
2374 }
2375
2376 /**
2377  * Find existing modify-header resource or create and register a new one.
2378  *
2379  * @param dev[in, out]
2380  *   Pointer to rte_eth_dev structure.
2381  * @param[in, out] resource
2382  *   Pointer to modify-header resource.
2383  * @parm[in, out] dev_flow
2384  *   Pointer to the dev_flow.
2385  * @param[out] error
2386  *   pointer to error structure.
2387  *
2388  * @return
2389  *   0 on success otherwise -errno and errno is set.
2390  */
2391 static int
2392 flow_dv_modify_hdr_resource_register
2393                         (struct rte_eth_dev *dev,
2394                          struct mlx5_flow_dv_modify_hdr_resource *resource,
2395                          struct mlx5_flow *dev_flow,
2396                          struct rte_flow_error *error)
2397 {
2398         struct mlx5_priv *priv = dev->data->dev_private;
2399         struct mlx5_ibv_shared *sh = priv->sh;
2400         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
2401         struct mlx5dv_dr_domain *ns;
2402
2403         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2404                 ns = sh->fdb_domain;
2405         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
2406                 ns = sh->tx_domain;
2407         else
2408                 ns = sh->rx_domain;
2409         resource->flags =
2410                 dev_flow->flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
2411         /* Lookup a matching resource from cache. */
2412         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
2413                 if (resource->ft_type == cache_resource->ft_type &&
2414                     resource->actions_num == cache_resource->actions_num &&
2415                     resource->flags == cache_resource->flags &&
2416                     !memcmp((const void *)resource->actions,
2417                             (const void *)cache_resource->actions,
2418                             (resource->actions_num *
2419                                             sizeof(resource->actions[0])))) {
2420                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
2421                                 (void *)cache_resource,
2422                                 rte_atomic32_read(&cache_resource->refcnt));
2423                         rte_atomic32_inc(&cache_resource->refcnt);
2424                         dev_flow->dv.modify_hdr = cache_resource;
2425                         return 0;
2426                 }
2427         }
2428         /* Register new modify-header resource. */
2429         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2430         if (!cache_resource)
2431                 return rte_flow_error_set(error, ENOMEM,
2432                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2433                                           "cannot allocate resource memory");
2434         *cache_resource = *resource;
2435         cache_resource->verbs_action =
2436                 mlx5_glue->dv_create_flow_action_modify_header
2437                                         (sh->ctx, cache_resource->ft_type,
2438                                          ns, cache_resource->flags,
2439                                          cache_resource->actions_num *
2440                                          sizeof(cache_resource->actions[0]),
2441                                          (uint64_t *)cache_resource->actions);
2442         if (!cache_resource->verbs_action) {
2443                 rte_free(cache_resource);
2444                 return rte_flow_error_set(error, ENOMEM,
2445                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2446                                           NULL, "cannot create action");
2447         }
2448         rte_atomic32_init(&cache_resource->refcnt);
2449         rte_atomic32_inc(&cache_resource->refcnt);
2450         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
2451         dev_flow->dv.modify_hdr = cache_resource;
2452         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
2453                 (void *)cache_resource,
2454                 rte_atomic32_read(&cache_resource->refcnt));
2455         return 0;
2456 }
2457
2458 #define MLX5_CNT_CONTAINER_RESIZE 64
2459
2460 /**
2461  * Get or create a flow counter.
2462  *
2463  * @param[in] dev
2464  *   Pointer to the Ethernet device structure.
2465  * @param[in] shared
2466  *   Indicate if this counter is shared with other flows.
2467  * @param[in] id
2468  *   Counter identifier.
2469  *
2470  * @return
2471  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
2472  */
2473 static struct mlx5_flow_counter *
2474 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
2475                                uint32_t id)
2476 {
2477         struct mlx5_priv *priv = dev->data->dev_private;
2478         struct mlx5_flow_counter *cnt = NULL;
2479         struct mlx5_devx_obj *dcs = NULL;
2480
2481         if (!priv->config.devx) {
2482                 rte_errno = ENOTSUP;
2483                 return NULL;
2484         }
2485         if (shared) {
2486                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
2487                         if (cnt->shared && cnt->id == id) {
2488                                 cnt->ref_cnt++;
2489                                 return cnt;
2490                         }
2491                 }
2492         }
2493         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2494         if (!dcs)
2495                 return NULL;
2496         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
2497         if (!cnt) {
2498                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
2499                 rte_errno = ENOMEM;
2500                 return NULL;
2501         }
2502         struct mlx5_flow_counter tmpl = {
2503                 .shared = shared,
2504                 .ref_cnt = 1,
2505                 .id = id,
2506                 .dcs = dcs,
2507         };
2508         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
2509         if (!tmpl.action) {
2510                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
2511                 rte_errno = errno;
2512                 rte_free(cnt);
2513                 return NULL;
2514         }
2515         *cnt = tmpl;
2516         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
2517         return cnt;
2518 }
2519
2520 /**
2521  * Release a flow counter.
2522  *
2523  * @param[in] dev
2524  *   Pointer to the Ethernet device structure.
2525  * @param[in] counter
2526  *   Pointer to the counter handler.
2527  */
2528 static void
2529 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
2530                                  struct mlx5_flow_counter *counter)
2531 {
2532         struct mlx5_priv *priv = dev->data->dev_private;
2533
2534         if (!counter)
2535                 return;
2536         if (--counter->ref_cnt == 0) {
2537                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
2538                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
2539                 rte_free(counter);
2540         }
2541 }
2542
2543 /**
2544  * Query a devx flow counter.
2545  *
2546  * @param[in] dev
2547  *   Pointer to the Ethernet device structure.
2548  * @param[in] cnt
2549  *   Pointer to the flow counter.
2550  * @param[out] pkts
2551  *   The statistics value of packets.
2552  * @param[out] bytes
2553  *   The statistics value of bytes.
2554  *
2555  * @return
2556  *   0 on success, otherwise a negative errno value and rte_errno is set.
2557  */
2558 static inline int
2559 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
2560                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2561                      uint64_t *bytes)
2562 {
2563         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
2564                                                 0, NULL, NULL, 0);
2565 }
2566
2567 /**
2568  * Get a pool by a counter.
2569  *
2570  * @param[in] cnt
2571  *   Pointer to the counter.
2572  *
2573  * @return
2574  *   The counter pool.
2575  */
2576 static struct mlx5_flow_counter_pool *
2577 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
2578 {
2579         if (!cnt->batch) {
2580                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
2581                 return (struct mlx5_flow_counter_pool *)cnt - 1;
2582         }
2583         return cnt->pool;
2584 }
2585
2586 /**
2587  * Get a pool by devx counter ID.
2588  *
2589  * @param[in] cont
2590  *   Pointer to the counter container.
2591  * @param[in] id
2592  *   The counter devx ID.
2593  *
2594  * @return
2595  *   The counter pool pointer if exists, NULL otherwise,
2596  */
2597 static struct mlx5_flow_counter_pool *
2598 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
2599 {
2600         struct mlx5_flow_counter_pool *pool;
2601
2602         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2603                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
2604                                 MLX5_COUNTERS_PER_POOL;
2605
2606                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
2607                         return pool;
2608         };
2609         return NULL;
2610 }
2611
2612 /**
2613  * Allocate a new memory for the counter values wrapped by all the needed
2614  * management.
2615  *
2616  * @param[in] dev
2617  *   Pointer to the Ethernet device structure.
2618  * @param[in] raws_n
2619  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
2620  *
2621  * @return
2622  *   The new memory management pointer on success, otherwise NULL and rte_errno
2623  *   is set.
2624  */
2625 static struct mlx5_counter_stats_mem_mng *
2626 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
2627 {
2628         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
2629                                         (dev->data->dev_private))->sh;
2630         struct mlx5_devx_mkey_attr mkey_attr;
2631         struct mlx5_counter_stats_mem_mng *mem_mng;
2632         volatile struct flow_counter_stats *raw_data;
2633         int size = (sizeof(struct flow_counter_stats) *
2634                         MLX5_COUNTERS_PER_POOL +
2635                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
2636                         sizeof(struct mlx5_counter_stats_mem_mng);
2637         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
2638         int i;
2639
2640         if (!mem) {
2641                 rte_errno = ENOMEM;
2642                 return NULL;
2643         }
2644         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
2645         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
2646         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
2647                                                  IBV_ACCESS_LOCAL_WRITE);
2648         if (!mem_mng->umem) {
2649                 rte_errno = errno;
2650                 rte_free(mem);
2651                 return NULL;
2652         }
2653         mkey_attr.addr = (uintptr_t)mem;
2654         mkey_attr.size = size;
2655         mkey_attr.umem_id = mem_mng->umem->umem_id;
2656         mkey_attr.pd = sh->pdn;
2657         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
2658         if (!mem_mng->dm) {
2659                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
2660                 rte_errno = errno;
2661                 rte_free(mem);
2662                 return NULL;
2663         }
2664         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
2665         raw_data = (volatile struct flow_counter_stats *)mem;
2666         for (i = 0; i < raws_n; ++i) {
2667                 mem_mng->raws[i].mem_mng = mem_mng;
2668                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
2669         }
2670         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
2671         return mem_mng;
2672 }
2673
2674 /**
2675  * Resize a counter container.
2676  *
2677  * @param[in] dev
2678  *   Pointer to the Ethernet device structure.
2679  * @param[in] batch
2680  *   Whether the pool is for counter that was allocated by batch command.
2681  *
2682  * @return
2683  *   The new container pointer on success, otherwise NULL and rte_errno is set.
2684  */
2685 static struct mlx5_pools_container *
2686 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
2687 {
2688         struct mlx5_priv *priv = dev->data->dev_private;
2689         struct mlx5_pools_container *cont =
2690                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
2691         struct mlx5_pools_container *new_cont =
2692                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
2693         struct mlx5_counter_stats_mem_mng *mem_mng;
2694         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
2695         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
2696         int i;
2697
2698         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
2699                 /* The last resize still hasn't detected by the host thread. */
2700                 rte_errno = EAGAIN;
2701                 return NULL;
2702         }
2703         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
2704         if (!new_cont->pools) {
2705                 rte_errno = ENOMEM;
2706                 return NULL;
2707         }
2708         if (cont->n)
2709                 memcpy(new_cont->pools, cont->pools, cont->n *
2710                        sizeof(struct mlx5_flow_counter_pool *));
2711         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
2712                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
2713         if (!mem_mng) {
2714                 rte_free(new_cont->pools);
2715                 return NULL;
2716         }
2717         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
2718                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
2719                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
2720                                  i, next);
2721         new_cont->n = resize;
2722         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
2723         TAILQ_INIT(&new_cont->pool_list);
2724         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
2725         new_cont->init_mem_mng = mem_mng;
2726         rte_cio_wmb();
2727          /* Flip the master container. */
2728         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
2729         return new_cont;
2730 }
2731
2732 /**
2733  * Query a devx flow counter.
2734  *
2735  * @param[in] dev
2736  *   Pointer to the Ethernet device structure.
2737  * @param[in] cnt
2738  *   Pointer to the flow counter.
2739  * @param[out] pkts
2740  *   The statistics value of packets.
2741  * @param[out] bytes
2742  *   The statistics value of bytes.
2743  *
2744  * @return
2745  *   0 on success, otherwise a negative errno value and rte_errno is set.
2746  */
2747 static inline int
2748 _flow_dv_query_count(struct rte_eth_dev *dev,
2749                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2750                      uint64_t *bytes)
2751 {
2752         struct mlx5_priv *priv = dev->data->dev_private;
2753         struct mlx5_flow_counter_pool *pool =
2754                         flow_dv_counter_pool_get(cnt);
2755         int offset = cnt - &pool->counters_raw[0];
2756
2757         if (priv->counter_fallback)
2758                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
2759
2760         rte_spinlock_lock(&pool->sl);
2761         /*
2762          * The single counters allocation may allocate smaller ID than the
2763          * current allocated in parallel to the host reading.
2764          * In this case the new counter values must be reported as 0.
2765          */
2766         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
2767                 *pkts = 0;
2768                 *bytes = 0;
2769         } else {
2770                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
2771                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
2772         }
2773         rte_spinlock_unlock(&pool->sl);
2774         return 0;
2775 }
2776
2777 /**
2778  * Create and initialize a new counter pool.
2779  *
2780  * @param[in] dev
2781  *   Pointer to the Ethernet device structure.
2782  * @param[out] dcs
2783  *   The devX counter handle.
2784  * @param[in] batch
2785  *   Whether the pool is for counter that was allocated by batch command.
2786  *
2787  * @return
2788  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
2789  */
2790 static struct mlx5_flow_counter_pool *
2791 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
2792                     uint32_t batch)
2793 {
2794         struct mlx5_priv *priv = dev->data->dev_private;
2795         struct mlx5_flow_counter_pool *pool;
2796         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
2797                                                                0);
2798         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
2799         uint32_t size;
2800
2801         if (cont->n == n_valid) {
2802                 cont = flow_dv_container_resize(dev, batch);
2803                 if (!cont)
2804                         return NULL;
2805         }
2806         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
2807                         sizeof(struct mlx5_flow_counter);
2808         pool = rte_calloc(__func__, 1, size, 0);
2809         if (!pool) {
2810                 rte_errno = ENOMEM;
2811                 return NULL;
2812         }
2813         pool->min_dcs = dcs;
2814         pool->raw = cont->init_mem_mng->raws + n_valid %
2815                                                      MLX5_CNT_CONTAINER_RESIZE;
2816         pool->raw_hw = NULL;
2817         rte_spinlock_init(&pool->sl);
2818         /*
2819          * The generation of the new allocated counters in this pool is 0, 2 in
2820          * the pool generation makes all the counters valid for allocation.
2821          */
2822         rte_atomic64_set(&pool->query_gen, 0x2);
2823         TAILQ_INIT(&pool->counters);
2824         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2825         cont->pools[n_valid] = pool;
2826         /* Pool initialization must be updated before host thread access. */
2827         rte_cio_wmb();
2828         rte_atomic16_add(&cont->n_valid, 1);
2829         return pool;
2830 }
2831
2832 /**
2833  * Prepare a new counter and/or a new counter pool.
2834  *
2835  * @param[in] dev
2836  *   Pointer to the Ethernet device structure.
2837  * @param[out] cnt_free
2838  *   Where to put the pointer of a new counter.
2839  * @param[in] batch
2840  *   Whether the pool is for counter that was allocated by batch command.
2841  *
2842  * @return
2843  *   The free counter pool pointer and @p cnt_free is set on success,
2844  *   NULL otherwise and rte_errno is set.
2845  */
2846 static struct mlx5_flow_counter_pool *
2847 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
2848                              struct mlx5_flow_counter **cnt_free,
2849                              uint32_t batch)
2850 {
2851         struct mlx5_priv *priv = dev->data->dev_private;
2852         struct mlx5_flow_counter_pool *pool;
2853         struct mlx5_devx_obj *dcs = NULL;
2854         struct mlx5_flow_counter *cnt;
2855         uint32_t i;
2856
2857         if (!batch) {
2858                 /* bulk_bitmap must be 0 for single counter allocation. */
2859                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2860                 if (!dcs)
2861                         return NULL;
2862                 pool = flow_dv_find_pool_by_id
2863                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
2864                 if (!pool) {
2865                         pool = flow_dv_pool_create(dev, dcs, batch);
2866                         if (!pool) {
2867                                 mlx5_devx_cmd_destroy(dcs);
2868                                 return NULL;
2869                         }
2870                 } else if (dcs->id < pool->min_dcs->id) {
2871                         rte_atomic64_set(&pool->a64_dcs,
2872                                          (int64_t)(uintptr_t)dcs);
2873                 }
2874                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
2875                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2876                 cnt->dcs = dcs;
2877                 *cnt_free = cnt;
2878                 return pool;
2879         }
2880         /* bulk_bitmap is in 128 counters units. */
2881         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
2882                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
2883         if (!dcs) {
2884                 rte_errno = ENODATA;
2885                 return NULL;
2886         }
2887         pool = flow_dv_pool_create(dev, dcs, batch);
2888         if (!pool) {
2889                 mlx5_devx_cmd_destroy(dcs);
2890                 return NULL;
2891         }
2892         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
2893                 cnt = &pool->counters_raw[i];
2894                 cnt->pool = pool;
2895                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2896         }
2897         *cnt_free = &pool->counters_raw[0];
2898         return pool;
2899 }
2900
2901 /**
2902  * Search for existed shared counter.
2903  *
2904  * @param[in] cont
2905  *   Pointer to the relevant counter pool container.
2906  * @param[in] id
2907  *   The shared counter ID to search.
2908  *
2909  * @return
2910  *   NULL if not existed, otherwise pointer to the shared counter.
2911  */
2912 static struct mlx5_flow_counter *
2913 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
2914                               uint32_t id)
2915 {
2916         static struct mlx5_flow_counter *cnt;
2917         struct mlx5_flow_counter_pool *pool;
2918         int i;
2919
2920         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2921                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
2922                         cnt = &pool->counters_raw[i];
2923                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
2924                                 return cnt;
2925                 }
2926         }
2927         return NULL;
2928 }
2929
2930 /**
2931  * Allocate a flow counter.
2932  *
2933  * @param[in] dev
2934  *   Pointer to the Ethernet device structure.
2935  * @param[in] shared
2936  *   Indicate if this counter is shared with other flows.
2937  * @param[in] id
2938  *   Counter identifier.
2939  * @param[in] group
2940  *   Counter flow group.
2941  *
2942  * @return
2943  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
2944  */
2945 static struct mlx5_flow_counter *
2946 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
2947                       uint16_t group)
2948 {
2949         struct mlx5_priv *priv = dev->data->dev_private;
2950         struct mlx5_flow_counter_pool *pool = NULL;
2951         struct mlx5_flow_counter *cnt_free = NULL;
2952         /*
2953          * Currently group 0 flow counter cannot be assigned to a flow if it is
2954          * not the first one in the batch counter allocation, so it is better
2955          * to allocate counters one by one for these flows in a separate
2956          * container.
2957          * A counter can be shared between different groups so need to take
2958          * shared counters from the single container.
2959          */
2960         uint32_t batch = (group && !shared) ? 1 : 0;
2961         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
2962                                                                0);
2963
2964         if (priv->counter_fallback)
2965                 return flow_dv_counter_alloc_fallback(dev, shared, id);
2966         if (!priv->config.devx) {
2967                 rte_errno = ENOTSUP;
2968                 return NULL;
2969         }
2970         if (shared) {
2971                 cnt_free = flow_dv_counter_shared_search(cont, id);
2972                 if (cnt_free) {
2973                         if (cnt_free->ref_cnt + 1 == 0) {
2974                                 rte_errno = E2BIG;
2975                                 return NULL;
2976                         }
2977                         cnt_free->ref_cnt++;
2978                         return cnt_free;
2979                 }
2980         }
2981         /* Pools which has a free counters are in the start. */
2982         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2983                 /*
2984                  * The free counter reset values must be updated between the
2985                  * counter release to the counter allocation, so, at least one
2986                  * query must be done in this time. ensure it by saving the
2987                  * query generation in the release time.
2988                  * The free list is sorted according to the generation - so if
2989                  * the first one is not updated, all the others are not
2990                  * updated too.
2991                  */
2992                 cnt_free = TAILQ_FIRST(&pool->counters);
2993                 if (cnt_free && cnt_free->query_gen + 1 <
2994                     rte_atomic64_read(&pool->query_gen))
2995                         break;
2996                 cnt_free = NULL;
2997         }
2998         if (!cnt_free) {
2999                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
3000                 if (!pool)
3001                         return NULL;
3002         }
3003         cnt_free->batch = batch;
3004         /* Create a DV counter action only in the first time usage. */
3005         if (!cnt_free->action) {
3006                 uint16_t offset;
3007                 struct mlx5_devx_obj *dcs;
3008
3009                 if (batch) {
3010                         offset = cnt_free - &pool->counters_raw[0];
3011                         dcs = pool->min_dcs;
3012                 } else {
3013                         offset = 0;
3014                         dcs = cnt_free->dcs;
3015                 }
3016                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
3017                                         (dcs->obj, offset);
3018                 if (!cnt_free->action) {
3019                         rte_errno = errno;
3020                         return NULL;
3021                 }
3022         }
3023         /* Update the counter reset values. */
3024         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
3025                                  &cnt_free->bytes))
3026                 return NULL;
3027         cnt_free->shared = shared;
3028         cnt_free->ref_cnt = 1;
3029         cnt_free->id = id;
3030         if (!priv->sh->cmng.query_thread_on)
3031                 /* Start the asynchronous batch query by the host thread. */
3032                 mlx5_set_query_alarm(priv->sh);
3033         TAILQ_REMOVE(&pool->counters, cnt_free, next);
3034         if (TAILQ_EMPTY(&pool->counters)) {
3035                 /* Move the pool to the end of the container pool list. */
3036                 TAILQ_REMOVE(&cont->pool_list, pool, next);
3037                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3038         }
3039         return cnt_free;
3040 }
3041
3042 /**
3043  * Release a flow counter.
3044  *
3045  * @param[in] dev
3046  *   Pointer to the Ethernet device structure.
3047  * @param[in] counter
3048  *   Pointer to the counter handler.
3049  */
3050 static void
3051 flow_dv_counter_release(struct rte_eth_dev *dev,
3052                         struct mlx5_flow_counter *counter)
3053 {
3054         struct mlx5_priv *priv = dev->data->dev_private;
3055
3056         if (!counter)
3057                 return;
3058         if (priv->counter_fallback) {
3059                 flow_dv_counter_release_fallback(dev, counter);
3060                 return;
3061         }
3062         if (--counter->ref_cnt == 0) {
3063                 struct mlx5_flow_counter_pool *pool =
3064                                 flow_dv_counter_pool_get(counter);
3065
3066                 /* Put the counter in the end - the last updated one. */
3067                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
3068                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
3069         }
3070 }
3071
3072 /**
3073  * Verify the @p attributes will be correctly understood by the NIC and store
3074  * them in the @p flow if everything is correct.
3075  *
3076  * @param[in] dev
3077  *   Pointer to dev struct.
3078  * @param[in] attributes
3079  *   Pointer to flow attributes
3080  * @param[out] error
3081  *   Pointer to error structure.
3082  *
3083  * @return
3084  *   0 on success, a negative errno value otherwise and rte_errno is set.
3085  */
3086 static int
3087 flow_dv_validate_attributes(struct rte_eth_dev *dev,
3088                             const struct rte_flow_attr *attributes,
3089                             struct rte_flow_error *error)
3090 {
3091         struct mlx5_priv *priv = dev->data->dev_private;
3092         uint32_t priority_max = priv->config.flow_prio - 1;
3093
3094 #ifndef HAVE_MLX5DV_DR
3095         if (attributes->group)
3096                 return rte_flow_error_set(error, ENOTSUP,
3097                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
3098                                           NULL,
3099                                           "groups is not supported");
3100 #endif
3101         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
3102             attributes->priority >= priority_max)
3103                 return rte_flow_error_set(error, ENOTSUP,
3104                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
3105                                           NULL,
3106                                           "priority out of range");
3107         if (attributes->transfer) {
3108                 if (!priv->config.dv_esw_en)
3109                         return rte_flow_error_set
3110                                 (error, ENOTSUP,
3111                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3112                                  "E-Switch dr is not supported");
3113                 if (!(priv->representor || priv->master))
3114                         return rte_flow_error_set
3115                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3116                                  NULL, "E-Switch configuration can only be"
3117                                  " done by a master or a representor device");
3118                 if (attributes->egress)
3119                         return rte_flow_error_set
3120                                 (error, ENOTSUP,
3121                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
3122                                  "egress is not supported");
3123                 if (attributes->group >= MLX5_MAX_TABLES_FDB)
3124                         return rte_flow_error_set
3125                                 (error, EINVAL,
3126                                  RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
3127                                  NULL, "group must be smaller than "
3128                                  RTE_STR(MLX5_MAX_TABLES_FDB));
3129         }
3130         if (!(attributes->egress ^ attributes->ingress))
3131                 return rte_flow_error_set(error, ENOTSUP,
3132                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
3133                                           "must specify exactly one of "
3134                                           "ingress or egress");
3135         return 0;
3136 }
3137
3138 /**
3139  * Internal validation function. For validating both actions and items.
3140  *
3141  * @param[in] dev
3142  *   Pointer to the rte_eth_dev structure.
3143  * @param[in] attr
3144  *   Pointer to the flow attributes.
3145  * @param[in] items
3146  *   Pointer to the list of items.
3147  * @param[in] actions
3148  *   Pointer to the list of actions.
3149  * @param[out] error
3150  *   Pointer to the error structure.
3151  *
3152  * @return
3153  *   0 on success, a negative errno value otherwise and rte_errno is set.
3154  */
3155 static int
3156 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
3157                  const struct rte_flow_item items[],
3158                  const struct rte_flow_action actions[],
3159                  struct rte_flow_error *error)
3160 {
3161         int ret;
3162         uint64_t action_flags = 0;
3163         uint64_t item_flags = 0;
3164         uint64_t last_item = 0;
3165         uint8_t next_protocol = 0xff;
3166         int actions_n = 0;
3167         const struct rte_flow_item *gre_item = NULL;
3168         struct rte_flow_item_tcp nic_tcp_mask = {
3169                 .hdr = {
3170                         .tcp_flags = 0xFF,
3171                         .src_port = RTE_BE16(UINT16_MAX),
3172                         .dst_port = RTE_BE16(UINT16_MAX),
3173                 }
3174         };
3175
3176         if (items == NULL)
3177                 return -1;
3178         ret = flow_dv_validate_attributes(dev, attr, error);
3179         if (ret < 0)
3180                 return ret;
3181         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3182                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
3183                 switch (items->type) {
3184                 case RTE_FLOW_ITEM_TYPE_VOID:
3185                         break;
3186                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
3187                         ret = flow_dv_validate_item_port_id
3188                                         (dev, items, attr, item_flags, error);
3189                         if (ret < 0)
3190                                 return ret;
3191                         last_item = MLX5_FLOW_ITEM_PORT_ID;
3192                         break;
3193                 case RTE_FLOW_ITEM_TYPE_ETH:
3194                         ret = mlx5_flow_validate_item_eth(items, item_flags,
3195                                                           error);
3196                         if (ret < 0)
3197                                 return ret;
3198                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
3199                                              MLX5_FLOW_LAYER_OUTER_L2;
3200                         break;
3201                 case RTE_FLOW_ITEM_TYPE_VLAN:
3202                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
3203                                                            dev, error);
3204                         if (ret < 0)
3205                                 return ret;
3206                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
3207                                              MLX5_FLOW_LAYER_OUTER_VLAN;
3208                         break;
3209                 case RTE_FLOW_ITEM_TYPE_IPV4:
3210                         mlx5_flow_tunnel_ip_check(items, next_protocol,
3211                                                   &item_flags, &tunnel);
3212                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
3213                                                            NULL, error);
3214                         if (ret < 0)
3215                                 return ret;
3216                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3217                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3218                         if (items->mask != NULL &&
3219                             ((const struct rte_flow_item_ipv4 *)
3220                              items->mask)->hdr.next_proto_id) {
3221                                 next_protocol =
3222                                         ((const struct rte_flow_item_ipv4 *)
3223                                          (items->spec))->hdr.next_proto_id;
3224                                 next_protocol &=
3225                                         ((const struct rte_flow_item_ipv4 *)
3226                                          (items->mask))->hdr.next_proto_id;
3227                         } else {
3228                                 /* Reset for inner layer. */
3229                                 next_protocol = 0xff;
3230                         }
3231                         break;
3232                 case RTE_FLOW_ITEM_TYPE_IPV6:
3233                         mlx5_flow_tunnel_ip_check(items, next_protocol,
3234                                                   &item_flags, &tunnel);
3235                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
3236                                                            NULL, error);
3237                         if (ret < 0)
3238                                 return ret;
3239                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3240                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3241                         if (items->mask != NULL &&
3242                             ((const struct rte_flow_item_ipv6 *)
3243                              items->mask)->hdr.proto) {
3244                                 next_protocol =
3245                                         ((const struct rte_flow_item_ipv6 *)
3246                                          items->spec)->hdr.proto;
3247                                 next_protocol &=
3248                                         ((const struct rte_flow_item_ipv6 *)
3249                                          items->mask)->hdr.proto;
3250                         } else {
3251                                 /* Reset for inner layer. */
3252                                 next_protocol = 0xff;
3253                         }
3254                         break;
3255                 case RTE_FLOW_ITEM_TYPE_TCP:
3256                         ret = mlx5_flow_validate_item_tcp
3257                                                 (items, item_flags,
3258                                                  next_protocol,
3259                                                  &nic_tcp_mask,
3260                                                  error);
3261                         if (ret < 0)
3262                                 return ret;
3263                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
3264                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
3265                         break;
3266                 case RTE_FLOW_ITEM_TYPE_UDP:
3267                         ret = mlx5_flow_validate_item_udp(items, item_flags,
3268                                                           next_protocol,
3269                                                           error);
3270                         if (ret < 0)
3271                                 return ret;
3272                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
3273                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
3274                         break;
3275                 case RTE_FLOW_ITEM_TYPE_GRE:
3276                         ret = mlx5_flow_validate_item_gre(items, item_flags,
3277                                                           next_protocol, error);
3278                         if (ret < 0)
3279                                 return ret;
3280                         gre_item = items;
3281                         last_item = MLX5_FLOW_LAYER_GRE;
3282                         break;
3283                 case RTE_FLOW_ITEM_TYPE_NVGRE:
3284                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
3285                                                             next_protocol,
3286                                                             error);
3287                         if (ret < 0)
3288                                 return ret;
3289                         last_item = MLX5_FLOW_LAYER_NVGRE;
3290                         break;
3291                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
3292                         ret = mlx5_flow_validate_item_gre_key
3293                                 (items, item_flags, gre_item, error);
3294                         if (ret < 0)
3295                                 return ret;
3296                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
3297                         break;
3298                 case RTE_FLOW_ITEM_TYPE_VXLAN:
3299                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
3300                                                             error);
3301                         if (ret < 0)
3302                                 return ret;
3303                         last_item = MLX5_FLOW_LAYER_VXLAN;
3304                         break;
3305                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3306                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
3307                                                                 item_flags, dev,
3308                                                                 error);
3309                         if (ret < 0)
3310                                 return ret;
3311                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
3312                         break;
3313                 case RTE_FLOW_ITEM_TYPE_MPLS:
3314                         ret = mlx5_flow_validate_item_mpls(dev, items,
3315                                                            item_flags,
3316                                                            last_item, error);
3317                         if (ret < 0)
3318                                 return ret;
3319                         last_item = MLX5_FLOW_LAYER_MPLS;
3320                         break;
3321                 case RTE_FLOW_ITEM_TYPE_META:
3322                         ret = flow_dv_validate_item_meta(dev, items, attr,
3323                                                          error);
3324                         if (ret < 0)
3325                                 return ret;
3326                         last_item = MLX5_FLOW_ITEM_METADATA;
3327                         break;
3328                 case RTE_FLOW_ITEM_TYPE_ICMP:
3329                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
3330                                                            next_protocol,
3331                                                            error);
3332                         if (ret < 0)
3333                                 return ret;
3334                         last_item = MLX5_FLOW_LAYER_ICMP;
3335                         break;
3336                 case RTE_FLOW_ITEM_TYPE_ICMP6:
3337                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
3338                                                             next_protocol,
3339                                                             error);
3340                         if (ret < 0)
3341                                 return ret;
3342                         last_item = MLX5_FLOW_LAYER_ICMP6;
3343                         break;
3344                 default:
3345                         return rte_flow_error_set(error, ENOTSUP,
3346                                                   RTE_FLOW_ERROR_TYPE_ITEM,
3347                                                   NULL, "item not supported");
3348                 }
3349                 item_flags |= last_item;
3350         }
3351         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3352                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
3353                         return rte_flow_error_set(error, ENOTSUP,
3354                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3355                                                   actions, "too many actions");
3356                 switch (actions->type) {
3357                 case RTE_FLOW_ACTION_TYPE_VOID:
3358                         break;
3359                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
3360                         ret = flow_dv_validate_action_port_id(dev,
3361                                                               action_flags,
3362                                                               actions,
3363                                                               attr,
3364                                                               error);
3365                         if (ret)
3366                                 return ret;
3367                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
3368                         ++actions_n;
3369                         break;
3370                 case RTE_FLOW_ACTION_TYPE_FLAG:
3371                         ret = mlx5_flow_validate_action_flag(action_flags,
3372                                                              attr, error);
3373                         if (ret < 0)
3374                                 return ret;
3375                         action_flags |= MLX5_FLOW_ACTION_FLAG;
3376                         ++actions_n;
3377                         break;
3378                 case RTE_FLOW_ACTION_TYPE_MARK:
3379                         ret = mlx5_flow_validate_action_mark(actions,
3380                                                              action_flags,
3381                                                              attr, error);
3382                         if (ret < 0)
3383                                 return ret;
3384                         action_flags |= MLX5_FLOW_ACTION_MARK;
3385                         ++actions_n;
3386                         break;
3387                 case RTE_FLOW_ACTION_TYPE_DROP:
3388                         ret = mlx5_flow_validate_action_drop(action_flags,
3389                                                              attr, error);
3390                         if (ret < 0)
3391                                 return ret;
3392                         action_flags |= MLX5_FLOW_ACTION_DROP;
3393                         ++actions_n;
3394                         break;
3395                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3396                         ret = mlx5_flow_validate_action_queue(actions,
3397                                                               action_flags, dev,
3398                                                               attr, error);
3399                         if (ret < 0)
3400                                 return ret;
3401                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
3402                         ++actions_n;
3403                         break;
3404                 case RTE_FLOW_ACTION_TYPE_RSS:
3405                         ret = mlx5_flow_validate_action_rss(actions,
3406                                                             action_flags, dev,
3407                                                             attr, item_flags,
3408                                                             error);
3409                         if (ret < 0)
3410                                 return ret;
3411                         action_flags |= MLX5_FLOW_ACTION_RSS;
3412                         ++actions_n;
3413                         break;
3414                 case RTE_FLOW_ACTION_TYPE_COUNT:
3415                         ret = flow_dv_validate_action_count(dev, error);
3416                         if (ret < 0)
3417                                 return ret;
3418                         action_flags |= MLX5_FLOW_ACTION_COUNT;
3419                         ++actions_n;
3420                         break;
3421                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3422                         if (flow_dv_validate_action_pop_vlan(dev,
3423                                                              action_flags,
3424                                                              actions,
3425                                                              item_flags, attr,
3426                                                              error))
3427                                 return -rte_errno;
3428                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
3429                         ++actions_n;
3430                         break;
3431                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3432                         ret = flow_dv_validate_action_push_vlan(action_flags,
3433                                                                 actions, attr,
3434                                                                 error);
3435                         if (ret < 0)
3436                                 return ret;
3437                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
3438                         ++actions_n;
3439                         break;
3440                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3441                         ret = flow_dv_validate_action_set_vlan_pcp
3442                                                 (action_flags, actions, error);
3443                         if (ret < 0)
3444                                 return ret;
3445                         /* Count PCP with push_vlan command. */
3446                         break;
3447                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3448                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3449                         ret = flow_dv_validate_action_l2_encap(action_flags,
3450                                                                actions, attr,
3451                                                                error);
3452                         if (ret < 0)
3453                                 return ret;
3454                         action_flags |= actions->type ==
3455                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
3456                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
3457                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
3458                         ++actions_n;
3459                         break;
3460                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3461                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3462                         ret = flow_dv_validate_action_l2_decap(action_flags,
3463                                                                attr, error);
3464                         if (ret < 0)
3465                                 return ret;
3466                         action_flags |= actions->type ==
3467                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
3468                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
3469                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
3470                         ++actions_n;
3471                         break;
3472                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3473                         ret = flow_dv_validate_action_raw_encap(action_flags,
3474                                                                 actions, attr,
3475                                                                 error);
3476                         if (ret < 0)
3477                                 return ret;
3478                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
3479                         ++actions_n;
3480                         break;
3481                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3482                         ret = flow_dv_validate_action_raw_decap(action_flags,
3483                                                                 actions, attr,
3484                                                                 error);
3485                         if (ret < 0)
3486                                 return ret;
3487                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
3488                         ++actions_n;
3489                         break;
3490                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3491                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3492                         ret = flow_dv_validate_action_modify_mac(action_flags,
3493                                                                  actions,
3494                                                                  item_flags,
3495                                                                  error);
3496                         if (ret < 0)
3497                                 return ret;
3498                         /* Count all modify-header actions as one action. */
3499                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3500                                 ++actions_n;
3501                         action_flags |= actions->type ==
3502                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
3503                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
3504                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
3505                         break;
3506
3507                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3508                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3509                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
3510                                                                   actions,
3511                                                                   item_flags,
3512                                                                   error);
3513                         if (ret < 0)
3514                                 return ret;
3515                         /* Count all modify-header actions as one action. */
3516                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3517                                 ++actions_n;
3518                         action_flags |= actions->type ==
3519                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
3520                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
3521                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
3522                         break;
3523                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3524                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3525                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
3526                                                                   actions,
3527                                                                   item_flags,
3528                                                                   error);
3529                         if (ret < 0)
3530                                 return ret;
3531                         /* Count all modify-header actions as one action. */
3532                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3533                                 ++actions_n;
3534                         action_flags |= actions->type ==
3535                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
3536                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
3537                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
3538                         break;
3539                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3540                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3541                         ret = flow_dv_validate_action_modify_tp(action_flags,
3542                                                                 actions,
3543                                                                 item_flags,
3544                                                                 error);
3545                         if (ret < 0)
3546                                 return ret;
3547                         /* Count all modify-header actions as one action. */
3548                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3549                                 ++actions_n;
3550                         action_flags |= actions->type ==
3551                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
3552                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
3553                                                 MLX5_FLOW_ACTION_SET_TP_DST;
3554                         break;
3555                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3556                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
3557                         ret = flow_dv_validate_action_modify_ttl(action_flags,
3558                                                                  actions,
3559                                                                  item_flags,
3560                                                                  error);
3561                         if (ret < 0)
3562                                 return ret;
3563                         /* Count all modify-header actions as one action. */
3564                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3565                                 ++actions_n;
3566                         action_flags |= actions->type ==
3567                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
3568                                                 MLX5_FLOW_ACTION_SET_TTL :
3569                                                 MLX5_FLOW_ACTION_DEC_TTL;
3570                         break;
3571                 case RTE_FLOW_ACTION_TYPE_JUMP:
3572                         ret = flow_dv_validate_action_jump(actions,
3573                                                            action_flags,
3574                                                            attr->group, error);
3575                         if (ret)
3576                                 return ret;
3577                         ++actions_n;
3578                         action_flags |= MLX5_FLOW_ACTION_JUMP;
3579                         break;
3580                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3581                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3582                         ret = flow_dv_validate_action_modify_tcp_seq
3583                                                                 (action_flags,
3584                                                                  actions,
3585                                                                  item_flags,
3586                                                                  error);
3587                         if (ret < 0)
3588                                 return ret;
3589                         /* Count all modify-header actions as one action. */
3590                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3591                                 ++actions_n;
3592                         action_flags |= actions->type ==
3593                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
3594                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
3595                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
3596                         break;
3597                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3598                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3599                         ret = flow_dv_validate_action_modify_tcp_ack
3600                                                                 (action_flags,
3601                                                                  actions,
3602                                                                  item_flags,
3603                                                                  error);
3604                         if (ret < 0)
3605                                 return ret;
3606                         /* Count all modify-header actions as one action. */
3607                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3608                                 ++actions_n;
3609                         action_flags |= actions->type ==
3610                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
3611                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
3612                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
3613                         break;
3614                 default:
3615                         return rte_flow_error_set(error, ENOTSUP,
3616                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3617                                                   actions,
3618                                                   "action not supported");
3619                 }
3620         }
3621         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3622             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
3623                 return rte_flow_error_set(error, ENOTSUP,
3624                                           RTE_FLOW_ERROR_TYPE_ACTION,
3625                                           actions,
3626                                           "can't have vxlan and vlan"
3627                                           " actions in the same rule");
3628         /* Eswitch has few restrictions on using items and actions */
3629         if (attr->transfer) {
3630                 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3631                         return rte_flow_error_set(error, ENOTSUP,
3632                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3633                                                   NULL,
3634                                                   "unsupported action FLAG");
3635                 if (action_flags & MLX5_FLOW_ACTION_MARK)
3636                         return rte_flow_error_set(error, ENOTSUP,
3637                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3638                                                   NULL,
3639                                                   "unsupported action MARK");
3640                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
3641                         return rte_flow_error_set(error, ENOTSUP,
3642                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3643                                                   NULL,
3644                                                   "unsupported action QUEUE");
3645                 if (action_flags & MLX5_FLOW_ACTION_RSS)
3646                         return rte_flow_error_set(error, ENOTSUP,
3647                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3648                                                   NULL,
3649                                                   "unsupported action RSS");
3650                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3651                         return rte_flow_error_set(error, EINVAL,
3652                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3653                                                   actions,
3654                                                   "no fate action is found");
3655         } else {
3656                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
3657                         return rte_flow_error_set(error, EINVAL,
3658                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3659                                                   actions,
3660                                                   "no fate action is found");
3661         }
3662         return 0;
3663 }
3664
3665 /**
3666  * Internal preparation function. Allocates the DV flow size,
3667  * this size is constant.
3668  *
3669  * @param[in] attr
3670  *   Pointer to the flow attributes.
3671  * @param[in] items
3672  *   Pointer to the list of items.
3673  * @param[in] actions
3674  *   Pointer to the list of actions.
3675  * @param[out] error
3676  *   Pointer to the error structure.
3677  *
3678  * @return
3679  *   Pointer to mlx5_flow object on success,
3680  *   otherwise NULL and rte_errno is set.
3681  */
3682 static struct mlx5_flow *
3683 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
3684                 const struct rte_flow_item items[] __rte_unused,
3685                 const struct rte_flow_action actions[] __rte_unused,
3686                 struct rte_flow_error *error)
3687 {
3688         uint32_t size = sizeof(struct mlx5_flow);
3689         struct mlx5_flow *flow;
3690
3691         flow = rte_calloc(__func__, 1, size, 0);
3692         if (!flow) {
3693                 rte_flow_error_set(error, ENOMEM,
3694                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3695                                    "not enough memory to create flow");
3696                 return NULL;
3697         }
3698         flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
3699         return flow;
3700 }
3701
3702 #ifndef NDEBUG
3703 /**
3704  * Sanity check for match mask and value. Similar to check_valid_spec() in
3705  * kernel driver. If unmasked bit is present in value, it returns failure.
3706  *
3707  * @param match_mask
3708  *   pointer to match mask buffer.
3709  * @param match_value
3710  *   pointer to match value buffer.
3711  *
3712  * @return
3713  *   0 if valid, -EINVAL otherwise.
3714  */
3715 static int
3716 flow_dv_check_valid_spec(void *match_mask, void *match_value)
3717 {
3718         uint8_t *m = match_mask;
3719         uint8_t *v = match_value;
3720         unsigned int i;
3721
3722         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
3723                 if (v[i] & ~m[i]) {
3724                         DRV_LOG(ERR,
3725                                 "match_value differs from match_criteria"
3726                                 " %p[%u] != %p[%u]",
3727                                 match_value, i, match_mask, i);
3728                         return -EINVAL;
3729                 }
3730         }
3731         return 0;
3732 }
3733 #endif
3734
3735 /**
3736  * Add Ethernet item to matcher and to the value.
3737  *
3738  * @param[in, out] matcher
3739  *   Flow matcher.
3740  * @param[in, out] key
3741  *   Flow matcher value.
3742  * @param[in] item
3743  *   Flow pattern to translate.
3744  * @param[in] inner
3745  *   Item is inner pattern.
3746  */
3747 static void
3748 flow_dv_translate_item_eth(void *matcher, void *key,
3749                            const struct rte_flow_item *item, int inner)
3750 {
3751         const struct rte_flow_item_eth *eth_m = item->mask;
3752         const struct rte_flow_item_eth *eth_v = item->spec;
3753         const struct rte_flow_item_eth nic_mask = {
3754                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3755                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3756                 .type = RTE_BE16(0xffff),
3757         };
3758         void *headers_m;
3759         void *headers_v;
3760         char *l24_v;
3761         unsigned int i;
3762
3763         if (!eth_v)
3764                 return;
3765         if (!eth_m)
3766                 eth_m = &nic_mask;
3767         if (inner) {
3768                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3769                                          inner_headers);
3770                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3771         } else {
3772                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3773                                          outer_headers);
3774                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3775         }
3776         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
3777                &eth_m->dst, sizeof(eth_m->dst));
3778         /* The value must be in the range of the mask. */
3779         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
3780         for (i = 0; i < sizeof(eth_m->dst); ++i)
3781                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
3782         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
3783                &eth_m->src, sizeof(eth_m->src));
3784         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
3785         /* The value must be in the range of the mask. */
3786         for (i = 0; i < sizeof(eth_m->dst); ++i)
3787                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
3788         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
3789                  rte_be_to_cpu_16(eth_m->type));
3790         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
3791         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
3792 }
3793
3794 /**
3795  * Add VLAN item to matcher and to the value.
3796  *
3797  * @param[in, out] dev_flow
3798  *   Flow descriptor.
3799  * @param[in, out] matcher
3800  *   Flow matcher.
3801  * @param[in, out] key
3802  *   Flow matcher value.
3803  * @param[in] item
3804  *   Flow pattern to translate.
3805  * @param[in] inner
3806  *   Item is inner pattern.
3807  */
3808 static void
3809 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
3810                             void *matcher, void *key,
3811                             const struct rte_flow_item *item,
3812                             int inner)
3813 {
3814         const struct rte_flow_item_vlan *vlan_m = item->mask;
3815         const struct rte_flow_item_vlan *vlan_v = item->spec;
3816         void *headers_m;
3817         void *headers_v;
3818         uint16_t tci_m;
3819         uint16_t tci_v;
3820
3821         if (!vlan_v)
3822                 return;
3823         if (!vlan_m)
3824                 vlan_m = &rte_flow_item_vlan_mask;
3825         if (inner) {
3826                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3827                                          inner_headers);
3828                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3829         } else {
3830                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3831                                          outer_headers);
3832                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3833                 /*
3834                  * This is workaround, masks are not supported,
3835                  * and pre-validated.
3836                  */
3837                 dev_flow->dv.vf_vlan.tag =
3838                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
3839         }
3840         tci_m = rte_be_to_cpu_16(vlan_m->tci);
3841         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
3842         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
3843         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
3844         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
3845         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
3846         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
3847         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
3848         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
3849         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
3850         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
3851                  rte_be_to_cpu_16(vlan_m->inner_type));
3852         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
3853                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
3854 }
3855
3856 /**
3857  * Add IPV4 item to matcher and to the value.
3858  *
3859  * @param[in, out] matcher
3860  *   Flow matcher.
3861  * @param[in, out] key
3862  *   Flow matcher value.
3863  * @param[in] item
3864  *   Flow pattern to translate.
3865  * @param[in] inner
3866  *   Item is inner pattern.
3867  * @param[in] group
3868  *   The group to insert the rule.
3869  */
3870 static void
3871 flow_dv_translate_item_ipv4(void *matcher, void *key,
3872                             const struct rte_flow_item *item,
3873                             int inner, uint32_t group)
3874 {
3875         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
3876         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
3877         const struct rte_flow_item_ipv4 nic_mask = {
3878                 .hdr = {
3879                         .src_addr = RTE_BE32(0xffffffff),
3880                         .dst_addr = RTE_BE32(0xffffffff),
3881                         .type_of_service = 0xff,
3882                         .next_proto_id = 0xff,
3883                 },
3884         };
3885         void *headers_m;
3886         void *headers_v;
3887         char *l24_m;
3888         char *l24_v;
3889         uint8_t tos;
3890
3891         if (inner) {
3892                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3893                                          inner_headers);
3894                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3895         } else {
3896                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3897                                          outer_headers);
3898                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3899         }
3900         if (group == 0)
3901                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3902         else
3903                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
3904         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
3905         if (!ipv4_v)
3906                 return;
3907         if (!ipv4_m)
3908                 ipv4_m = &nic_mask;
3909         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3910                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
3911         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3912                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
3913         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
3914         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
3915         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3916                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
3917         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3918                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
3919         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
3920         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
3921         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
3922         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
3923                  ipv4_m->hdr.type_of_service);
3924         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
3925         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
3926                  ipv4_m->hdr.type_of_service >> 2);
3927         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
3928         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
3929                  ipv4_m->hdr.next_proto_id);
3930         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3931                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
3932 }
3933
3934 /**
3935  * Add IPV6 item to matcher and to the value.
3936  *
3937  * @param[in, out] matcher
3938  *   Flow matcher.
3939  * @param[in, out] key
3940  *   Flow matcher value.
3941  * @param[in] item
3942  *   Flow pattern to translate.
3943  * @param[in] inner
3944  *   Item is inner pattern.
3945  * @param[in] group
3946  *   The group to insert the rule.
3947  */
3948 static void
3949 flow_dv_translate_item_ipv6(void *matcher, void *key,
3950                             const struct rte_flow_item *item,
3951                             int inner, uint32_t group)
3952 {
3953         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
3954         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
3955         const struct rte_flow_item_ipv6 nic_mask = {
3956                 .hdr = {
3957                         .src_addr =
3958                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3959                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3960                         .dst_addr =
3961                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3962                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3963                         .vtc_flow = RTE_BE32(0xffffffff),
3964                         .proto = 0xff,
3965                         .hop_limits = 0xff,
3966                 },
3967         };
3968         void *headers_m;
3969         void *headers_v;
3970         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3971         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3972         char *l24_m;
3973         char *l24_v;
3974         uint32_t vtc_m;
3975         uint32_t vtc_v;
3976         int i;
3977         int size;
3978
3979         if (inner) {
3980                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3981                                          inner_headers);
3982                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3983         } else {
3984                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3985                                          outer_headers);
3986                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3987         }
3988         if (group == 0)
3989                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3990         else
3991                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
3992         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
3993         if (!ipv6_v)
3994                 return;
3995         if (!ipv6_m)
3996                 ipv6_m = &nic_mask;
3997         size = sizeof(ipv6_m->hdr.dst_addr);
3998         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3999                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
4000         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
4001                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
4002         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
4003         for (i = 0; i < size; ++i)
4004                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
4005         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
4006                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
4007         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
4008                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
4009         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
4010         for (i = 0; i < size; ++i)
4011                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
4012         /* TOS. */
4013         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
4014         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
4015         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
4016         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
4017         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
4018         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
4019         /* Label. */
4020         if (inner) {
4021                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
4022                          vtc_m);
4023                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
4024                          vtc_v);
4025         } else {
4026                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
4027                          vtc_m);
4028                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
4029                          vtc_v);
4030         }
4031         /* Protocol. */
4032         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
4033                  ipv6_m->hdr.proto);
4034         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
4035                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
4036 }
4037
4038 /**
4039  * Add TCP item to matcher and to the value.
4040  *
4041  * @param[in, out] matcher
4042  *   Flow matcher.
4043  * @param[in, out] key
4044  *   Flow matcher value.
4045  * @param[in] item
4046  *   Flow pattern to translate.
4047  * @param[in] inner
4048  *   Item is inner pattern.
4049  */
4050 static void
4051 flow_dv_translate_item_tcp(void *matcher, void *key,
4052                            const struct rte_flow_item *item,
4053                            int inner)
4054 {
4055         const struct rte_flow_item_tcp *tcp_m = item->mask;
4056         const struct rte_flow_item_tcp *tcp_v = item->spec;
4057         void *headers_m;
4058         void *headers_v;
4059
4060         if (inner) {
4061                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4062                                          inner_headers);
4063                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4064         } else {
4065                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4066                                          outer_headers);
4067                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4068         }
4069         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4070         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
4071         if (!tcp_v)
4072                 return;
4073         if (!tcp_m)
4074                 tcp_m = &rte_flow_item_tcp_mask;
4075         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
4076                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
4077         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
4078                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
4079         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
4080                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
4081         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
4082                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
4083         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
4084                  tcp_m->hdr.tcp_flags);
4085         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
4086                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
4087 }
4088
4089 /**
4090  * Add UDP item to matcher and to the value.
4091  *
4092  * @param[in, out] matcher
4093  *   Flow matcher.
4094  * @param[in, out] key
4095  *   Flow matcher value.
4096  * @param[in] item
4097  *   Flow pattern to translate.
4098  * @param[in] inner
4099  *   Item is inner pattern.
4100  */
4101 static void
4102 flow_dv_translate_item_udp(void *matcher, void *key,
4103                            const struct rte_flow_item *item,
4104                            int inner)
4105 {
4106         const struct rte_flow_item_udp *udp_m = item->mask;
4107         const struct rte_flow_item_udp *udp_v = item->spec;
4108         void *headers_m;
4109         void *headers_v;
4110
4111         if (inner) {
4112                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4113                                          inner_headers);
4114                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4115         } else {
4116                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4117                                          outer_headers);
4118                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4119         }
4120         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4121         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
4122         if (!udp_v)
4123                 return;
4124         if (!udp_m)
4125                 udp_m = &rte_flow_item_udp_mask;
4126         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
4127                  rte_be_to_cpu_16(udp_m->hdr.src_port));
4128         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
4129                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
4130         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
4131                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
4132         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
4133                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
4134 }
4135
4136 /**
4137  * Add GRE optional Key item to matcher and to the value.
4138  *
4139  * @param[in, out] matcher
4140  *   Flow matcher.
4141  * @param[in, out] key
4142  *   Flow matcher value.
4143  * @param[in] item
4144  *   Flow pattern to translate.
4145  * @param[in] inner
4146  *   Item is inner pattern.
4147  */
4148 static void
4149 flow_dv_translate_item_gre_key(void *matcher, void *key,
4150                                    const struct rte_flow_item *item)
4151 {
4152         const rte_be32_t *key_m = item->mask;
4153         const rte_be32_t *key_v = item->spec;
4154         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4155         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4156         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
4157
4158         if (!key_v)
4159                 return;
4160         if (!key_m)
4161                 key_m = &gre_key_default_mask;
4162         /* GRE K bit must be on and should already be validated */
4163         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
4164         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
4165         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
4166                  rte_be_to_cpu_32(*key_m) >> 8);
4167         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
4168                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
4169         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
4170                  rte_be_to_cpu_32(*key_m) & 0xFF);
4171         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
4172                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
4173 }
4174
4175 /**
4176  * Add GRE item to matcher and to the value.
4177  *
4178  * @param[in, out] matcher
4179  *   Flow matcher.
4180  * @param[in, out] key
4181  *   Flow matcher value.
4182  * @param[in] item
4183  *   Flow pattern to translate.
4184  * @param[in] inner
4185  *   Item is inner pattern.
4186  */
4187 static void
4188 flow_dv_translate_item_gre(void *matcher, void *key,
4189                            const struct rte_flow_item *item,
4190                            int inner)
4191 {
4192         const struct rte_flow_item_gre *gre_m = item->mask;
4193         const struct rte_flow_item_gre *gre_v = item->spec;
4194         void *headers_m;
4195         void *headers_v;
4196         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4197         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4198         struct {
4199                 union {
4200                         __extension__
4201                         struct {
4202                                 uint16_t version:3;
4203                                 uint16_t rsvd0:9;
4204                                 uint16_t s_present:1;
4205                                 uint16_t k_present:1;
4206                                 uint16_t rsvd_bit1:1;
4207                                 uint16_t c_present:1;
4208                         };
4209                         uint16_t value;
4210                 };
4211         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
4212
4213         if (inner) {
4214                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4215                                          inner_headers);
4216                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4217         } else {
4218                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4219                                          outer_headers);
4220                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4221         }
4222         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4223         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
4224         if (!gre_v)
4225                 return;
4226         if (!gre_m)
4227                 gre_m = &rte_flow_item_gre_mask;
4228         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
4229                  rte_be_to_cpu_16(gre_m->protocol));
4230         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
4231                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
4232         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
4233         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
4234         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
4235                  gre_crks_rsvd0_ver_m.c_present);
4236         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
4237                  gre_crks_rsvd0_ver_v.c_present &
4238                  gre_crks_rsvd0_ver_m.c_present);
4239         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
4240                  gre_crks_rsvd0_ver_m.k_present);
4241         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
4242                  gre_crks_rsvd0_ver_v.k_present &
4243                  gre_crks_rsvd0_ver_m.k_present);
4244         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
4245                  gre_crks_rsvd0_ver_m.s_present);
4246         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
4247                  gre_crks_rsvd0_ver_v.s_present &
4248                  gre_crks_rsvd0_ver_m.s_present);
4249 }
4250
4251 /**
4252  * Add NVGRE item to matcher and to the value.
4253  *
4254  * @param[in, out] matcher
4255  *   Flow matcher.
4256  * @param[in, out] key
4257  *   Flow matcher value.
4258  * @param[in] item
4259  *   Flow pattern to translate.
4260  * @param[in] inner
4261  *   Item is inner pattern.
4262  */
4263 static void
4264 flow_dv_translate_item_nvgre(void *matcher, void *key,
4265                              const struct rte_flow_item *item,
4266                              int inner)
4267 {
4268         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
4269         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
4270         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4271         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4272         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
4273         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
4274         char *gre_key_m;
4275         char *gre_key_v;
4276         int size;
4277         int i;
4278
4279         /* For NVGRE, GRE header fields must be set with defined values. */
4280         const struct rte_flow_item_gre gre_spec = {
4281                 .c_rsvd0_ver = RTE_BE16(0x2000),
4282                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
4283         };
4284         const struct rte_flow_item_gre gre_mask = {
4285                 .c_rsvd0_ver = RTE_BE16(0xB000),
4286                 .protocol = RTE_BE16(UINT16_MAX),
4287         };
4288         const struct rte_flow_item gre_item = {
4289                 .spec = &gre_spec,
4290                 .mask = &gre_mask,
4291                 .last = NULL,
4292         };
4293         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
4294         if (!nvgre_v)
4295                 return;
4296         if (!nvgre_m)
4297                 nvgre_m = &rte_flow_item_nvgre_mask;
4298         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
4299         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
4300         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
4301         memcpy(gre_key_m, tni_flow_id_m, size);
4302         for (i = 0; i < size; ++i)
4303                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
4304 }
4305
4306 /**
4307  * Add VXLAN item to matcher and to the value.
4308  *
4309  * @param[in, out] matcher
4310  *   Flow matcher.
4311  * @param[in, out] key
4312  *   Flow matcher value.
4313  * @param[in] item
4314  *   Flow pattern to translate.
4315  * @param[in] inner
4316  *   Item is inner pattern.
4317  */
4318 static void
4319 flow_dv_translate_item_vxlan(void *matcher, void *key,
4320                              const struct rte_flow_item *item,
4321                              int inner)
4322 {
4323         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
4324         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
4325         void *headers_m;
4326         void *headers_v;
4327         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4328         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4329         char *vni_m;
4330         char *vni_v;
4331         uint16_t dport;
4332         int size;
4333         int i;
4334
4335         if (inner) {
4336                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4337                                          inner_headers);
4338                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4339         } else {
4340                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4341                                          outer_headers);
4342                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4343         }
4344         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
4345                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
4346         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
4347                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
4348                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
4349         }
4350         if (!vxlan_v)
4351                 return;
4352         if (!vxlan_m)
4353                 vxlan_m = &rte_flow_item_vxlan_mask;
4354         size = sizeof(vxlan_m->vni);
4355         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
4356         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
4357         memcpy(vni_m, vxlan_m->vni, size);
4358         for (i = 0; i < size; ++i)
4359                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
4360 }
4361
4362 /**
4363  * Add MPLS item to matcher and to the value.
4364  *
4365  * @param[in, out] matcher
4366  *   Flow matcher.
4367  * @param[in, out] key
4368  *   Flow matcher value.
4369  * @param[in] item
4370  *   Flow pattern to translate.
4371  * @param[in] prev_layer
4372  *   The protocol layer indicated in previous item.
4373  * @param[in] inner
4374  *   Item is inner pattern.
4375  */
4376 static void
4377 flow_dv_translate_item_mpls(void *matcher, void *key,
4378                             const struct rte_flow_item *item,
4379                             uint64_t prev_layer,
4380                             int inner)
4381 {
4382         const uint32_t *in_mpls_m = item->mask;
4383         const uint32_t *in_mpls_v = item->spec;
4384         uint32_t *out_mpls_m = 0;
4385         uint32_t *out_mpls_v = 0;
4386         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4387         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4388         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
4389                                      misc_parameters_2);
4390         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
4391         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
4392         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4393
4394         switch (prev_layer) {
4395         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
4396                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
4397                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
4398                          MLX5_UDP_PORT_MPLS);
4399                 break;
4400         case MLX5_FLOW_LAYER_GRE:
4401                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
4402                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
4403                          RTE_ETHER_TYPE_MPLS);
4404                 break;
4405         default:
4406                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4407                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
4408                          IPPROTO_MPLS);
4409                 break;
4410         }
4411         if (!in_mpls_v)
4412                 return;
4413         if (!in_mpls_m)
4414                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
4415         switch (prev_layer) {
4416         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
4417                 out_mpls_m =
4418                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
4419                                                  outer_first_mpls_over_udp);
4420                 out_mpls_v =
4421                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
4422                                                  outer_first_mpls_over_udp);
4423                 break;
4424         case MLX5_FLOW_LAYER_GRE:
4425                 out_mpls_m =
4426                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
4427                                                  outer_first_mpls_over_gre);
4428                 out_mpls_v =
4429                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
4430                                                  outer_first_mpls_over_gre);
4431                 break;
4432         default:
4433                 /* Inner MPLS not over GRE is not supported. */
4434                 if (!inner) {
4435                         out_mpls_m =
4436                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
4437                                                          misc2_m,
4438                                                          outer_first_mpls);
4439                         out_mpls_v =
4440                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
4441                                                          misc2_v,
4442                                                          outer_first_mpls);
4443                 }
4444                 break;
4445         }
4446         if (out_mpls_m && out_mpls_v) {
4447                 *out_mpls_m = *in_mpls_m;
4448                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
4449         }
4450 }
4451
4452 /**
4453  * Add META item to matcher
4454  *
4455  * @param[in, out] matcher
4456  *   Flow matcher.
4457  * @param[in, out] key
4458  *   Flow matcher value.
4459  * @param[in] item
4460  *   Flow pattern to translate.
4461  * @param[in] inner
4462  *   Item is inner pattern.
4463  */
4464 static void
4465 flow_dv_translate_item_meta(void *matcher, void *key,
4466                             const struct rte_flow_item *item)
4467 {
4468         const struct rte_flow_item_meta *meta_m;
4469         const struct rte_flow_item_meta *meta_v;
4470         void *misc2_m =
4471                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
4472         void *misc2_v =
4473                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
4474
4475         meta_m = (const void *)item->mask;
4476         if (!meta_m)
4477                 meta_m = &rte_flow_item_meta_mask;
4478         meta_v = (const void *)item->spec;
4479         if (meta_v) {
4480                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a,
4481                          rte_be_to_cpu_32(meta_m->data));
4482                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a,
4483                          rte_be_to_cpu_32(meta_v->data & meta_m->data));
4484         }
4485 }
4486
4487 /**
4488  * Add source vport match to the specified matcher.
4489  *
4490  * @param[in, out] matcher
4491  *   Flow matcher.
4492  * @param[in, out] key
4493  *   Flow matcher value.
4494  * @param[in] port
4495  *   Source vport value to match
4496  * @param[in] mask
4497  *   Mask
4498  */
4499 static void
4500 flow_dv_translate_item_source_vport(void *matcher, void *key,
4501                                     int16_t port, uint16_t mask)
4502 {
4503         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4504         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4505
4506         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
4507         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
4508 }
4509
4510 /**
4511  * Translate port-id item to eswitch match on  port-id.
4512  *
4513  * @param[in] dev
4514  *   The devich to configure through.
4515  * @param[in, out] matcher
4516  *   Flow matcher.
4517  * @param[in, out] key
4518  *   Flow matcher value.
4519  * @param[in] item
4520  *   Flow pattern to translate.
4521  *
4522  * @return
4523  *   0 on success, a negative errno value otherwise.
4524  */
4525 static int
4526 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
4527                                void *key, const struct rte_flow_item *item)
4528 {
4529         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
4530         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
4531         uint16_t mask, val, id;
4532         int ret;
4533
4534         mask = pid_m ? pid_m->id : 0xffff;
4535         id = pid_v ? pid_v->id : dev->data->port_id;
4536         ret = mlx5_port_to_eswitch_info(id, NULL, &val);
4537         if (ret)
4538                 return ret;
4539         flow_dv_translate_item_source_vport(matcher, key, val, mask);
4540         return 0;
4541 }
4542
4543 /**
4544  * Add ICMP6 item to matcher and to the value.
4545  *
4546  * @param[in, out] matcher
4547  *   Flow matcher.
4548  * @param[in, out] key
4549  *   Flow matcher value.
4550  * @param[in] item
4551  *   Flow pattern to translate.
4552  * @param[in] inner
4553  *   Item is inner pattern.
4554  */
4555 static void
4556 flow_dv_translate_item_icmp6(void *matcher, void *key,
4557                               const struct rte_flow_item *item,
4558                               int inner)
4559 {
4560         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
4561         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
4562         void *headers_m;
4563         void *headers_v;
4564         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4565                                      misc_parameters_3);
4566         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4567         if (inner) {
4568                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4569                                          inner_headers);
4570                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4571         } else {
4572                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4573                                          outer_headers);
4574                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4575         }
4576         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4577         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
4578         if (!icmp6_v)
4579                 return;
4580         if (!icmp6_m)
4581                 icmp6_m = &rte_flow_item_icmp6_mask;
4582         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
4583         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
4584                  icmp6_v->type & icmp6_m->type);
4585         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
4586         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
4587                  icmp6_v->code & icmp6_m->code);
4588 }
4589
4590 /**
4591  * Add ICMP item to matcher and to the value.
4592  *
4593  * @param[in, out] matcher
4594  *   Flow matcher.
4595  * @param[in, out] key
4596  *   Flow matcher value.
4597  * @param[in] item
4598  *   Flow pattern to translate.
4599  * @param[in] inner
4600  *   Item is inner pattern.
4601  */
4602 static void
4603 flow_dv_translate_item_icmp(void *matcher, void *key,
4604                             const struct rte_flow_item *item,
4605                             int inner)
4606 {
4607         const struct rte_flow_item_icmp *icmp_m = item->mask;
4608         const struct rte_flow_item_icmp *icmp_v = item->spec;
4609         void *headers_m;
4610         void *headers_v;
4611         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4612                                      misc_parameters_3);
4613         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4614         if (inner) {
4615                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4616                                          inner_headers);
4617                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4618         } else {
4619                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4620                                          outer_headers);
4621                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4622         }
4623         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4624         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
4625         if (!icmp_v)
4626                 return;
4627         if (!icmp_m)
4628                 icmp_m = &rte_flow_item_icmp_mask;
4629         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
4630                  icmp_m->hdr.icmp_type);
4631         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
4632                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
4633         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
4634                  icmp_m->hdr.icmp_code);
4635         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
4636                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
4637 }
4638
4639 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
4640
4641 #define HEADER_IS_ZERO(match_criteria, headers)                              \
4642         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
4643                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
4644
4645 /**
4646  * Calculate flow matcher enable bitmap.
4647  *
4648  * @param match_criteria
4649  *   Pointer to flow matcher criteria.
4650  *
4651  * @return
4652  *   Bitmap of enabled fields.
4653  */
4654 static uint8_t
4655 flow_dv_matcher_enable(uint32_t *match_criteria)
4656 {
4657         uint8_t match_criteria_enable;
4658
4659         match_criteria_enable =
4660                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
4661                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
4662         match_criteria_enable |=
4663                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
4664                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
4665         match_criteria_enable |=
4666                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
4667                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
4668         match_criteria_enable |=
4669                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
4670                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
4671         match_criteria_enable |=
4672                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
4673                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
4674         return match_criteria_enable;
4675 }
4676
4677
4678 /**
4679  * Get a flow table.
4680  *
4681  * @param dev[in, out]
4682  *   Pointer to rte_eth_dev structure.
4683  * @param[in] table_id
4684  *   Table id to use.
4685  * @param[in] egress
4686  *   Direction of the table.
4687  * @param[in] transfer
4688  *   E-Switch or NIC flow.
4689  * @param[out] error
4690  *   pointer to error structure.
4691  *
4692  * @return
4693  *   Returns tables resource based on the index, NULL in case of failed.
4694  */
4695 static struct mlx5_flow_tbl_resource *
4696 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
4697                          uint32_t table_id, uint8_t egress,
4698                          uint8_t transfer,
4699                          struct rte_flow_error *error)
4700 {
4701         struct mlx5_priv *priv = dev->data->dev_private;
4702         struct mlx5_ibv_shared *sh = priv->sh;
4703         struct mlx5_flow_tbl_resource *tbl;
4704
4705 #ifdef HAVE_MLX5DV_DR
4706         if (transfer) {
4707                 tbl = &sh->fdb_tbl[table_id];
4708                 if (!tbl->obj)
4709                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4710                                 (sh->fdb_domain, table_id);
4711         } else if (egress) {
4712                 tbl = &sh->tx_tbl[table_id];
4713                 if (!tbl->obj)
4714                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4715                                 (sh->tx_domain, table_id);
4716         } else {
4717                 tbl = &sh->rx_tbl[table_id];
4718                 if (!tbl->obj)
4719                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4720                                 (sh->rx_domain, table_id);
4721         }
4722         if (!tbl->obj) {
4723                 rte_flow_error_set(error, ENOMEM,
4724                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4725                                    NULL, "cannot create table");
4726                 return NULL;
4727         }
4728         rte_atomic32_inc(&tbl->refcnt);
4729         return tbl;
4730 #else
4731         (void)error;
4732         (void)tbl;
4733         if (transfer)
4734                 return &sh->fdb_tbl[table_id];
4735         else if (egress)
4736                 return &sh->tx_tbl[table_id];
4737         else
4738                 return &sh->rx_tbl[table_id];
4739 #endif
4740 }
4741
4742 /**
4743  * Release a flow table.
4744  *
4745  * @param[in] tbl
4746  *   Table resource to be released.
4747  *
4748  * @return
4749  *   Returns 0 if table was released, else return 1;
4750  */
4751 static int
4752 flow_dv_tbl_resource_release(struct mlx5_flow_tbl_resource *tbl)
4753 {
4754         if (!tbl)
4755                 return 0;
4756         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
4757                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
4758                 tbl->obj = NULL;
4759                 return 0;
4760         }
4761         return 1;
4762 }
4763
4764 /**
4765  * Register the flow matcher.
4766  *
4767  * @param dev[in, out]
4768  *   Pointer to rte_eth_dev structure.
4769  * @param[in, out] matcher
4770  *   Pointer to flow matcher.
4771  * @parm[in, out] dev_flow
4772  *   Pointer to the dev_flow.
4773  * @param[out] error
4774  *   pointer to error structure.
4775  *
4776  * @return
4777  *   0 on success otherwise -errno and errno is set.
4778  */
4779 static int
4780 flow_dv_matcher_register(struct rte_eth_dev *dev,
4781                          struct mlx5_flow_dv_matcher *matcher,
4782                          struct mlx5_flow *dev_flow,
4783                          struct rte_flow_error *error)
4784 {
4785         struct mlx5_priv *priv = dev->data->dev_private;
4786         struct mlx5_ibv_shared *sh = priv->sh;
4787         struct mlx5_flow_dv_matcher *cache_matcher;
4788         struct mlx5dv_flow_matcher_attr dv_attr = {
4789                 .type = IBV_FLOW_ATTR_NORMAL,
4790                 .match_mask = (void *)&matcher->mask,
4791         };
4792         struct mlx5_flow_tbl_resource *tbl = NULL;
4793
4794         /* Lookup from cache. */
4795         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
4796                 if (matcher->crc == cache_matcher->crc &&
4797                     matcher->priority == cache_matcher->priority &&
4798                     matcher->egress == cache_matcher->egress &&
4799                     matcher->group == cache_matcher->group &&
4800                     matcher->transfer == cache_matcher->transfer &&
4801                     !memcmp((const void *)matcher->mask.buf,
4802                             (const void *)cache_matcher->mask.buf,
4803                             cache_matcher->mask.size)) {
4804                         DRV_LOG(DEBUG,
4805                                 "priority %hd use %s matcher %p: refcnt %d++",
4806                                 cache_matcher->priority,
4807                                 cache_matcher->egress ? "tx" : "rx",
4808                                 (void *)cache_matcher,
4809                                 rte_atomic32_read(&cache_matcher->refcnt));
4810                         rte_atomic32_inc(&cache_matcher->refcnt);
4811                         dev_flow->dv.matcher = cache_matcher;
4812                         return 0;
4813                 }
4814         }
4815         /* Register new matcher. */
4816         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
4817         if (!cache_matcher)
4818                 return rte_flow_error_set(error, ENOMEM,
4819                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4820                                           "cannot allocate matcher memory");
4821         tbl = flow_dv_tbl_resource_get(dev, matcher->group,
4822                                        matcher->egress, matcher->transfer,
4823                                        error);
4824         if (!tbl) {
4825                 rte_free(cache_matcher);
4826                 return rte_flow_error_set(error, ENOMEM,
4827                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4828                                           NULL, "cannot create table");
4829         }
4830         *cache_matcher = *matcher;
4831         dv_attr.match_criteria_enable =
4832                 flow_dv_matcher_enable(cache_matcher->mask.buf);
4833         dv_attr.priority = matcher->priority;
4834         if (matcher->egress)
4835                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
4836         cache_matcher->matcher_object =
4837                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
4838         if (!cache_matcher->matcher_object) {
4839                 rte_free(cache_matcher);
4840 #ifdef HAVE_MLX5DV_DR
4841                 flow_dv_tbl_resource_release(tbl);
4842 #endif
4843                 return rte_flow_error_set(error, ENOMEM,
4844                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4845                                           NULL, "cannot create matcher");
4846         }
4847         rte_atomic32_inc(&cache_matcher->refcnt);
4848         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
4849         dev_flow->dv.matcher = cache_matcher;
4850         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
4851                 cache_matcher->priority,
4852                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
4853                 rte_atomic32_read(&cache_matcher->refcnt));
4854         rte_atomic32_inc(&tbl->refcnt);
4855         return 0;
4856 }
4857
4858 /**
4859  * Find existing tag resource or create and register a new one.
4860  *
4861  * @param dev[in, out]
4862  *   Pointer to rte_eth_dev structure.
4863  * @param[in, out] resource
4864  *   Pointer to tag resource.
4865  * @parm[in, out] dev_flow
4866  *   Pointer to the dev_flow.
4867  * @param[out] error
4868  *   pointer to error structure.
4869  *
4870  * @return
4871  *   0 on success otherwise -errno and errno is set.
4872  */
4873 static int
4874 flow_dv_tag_resource_register
4875                         (struct rte_eth_dev *dev,
4876                          struct mlx5_flow_dv_tag_resource *resource,
4877                          struct mlx5_flow *dev_flow,
4878                          struct rte_flow_error *error)
4879 {
4880         struct mlx5_priv *priv = dev->data->dev_private;
4881         struct mlx5_ibv_shared *sh = priv->sh;
4882         struct mlx5_flow_dv_tag_resource *cache_resource;
4883
4884         /* Lookup a matching resource from cache. */
4885         LIST_FOREACH(cache_resource, &sh->tags, next) {
4886                 if (resource->tag == cache_resource->tag) {
4887                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
4888                                 (void *)cache_resource,
4889                                 rte_atomic32_read(&cache_resource->refcnt));
4890                         rte_atomic32_inc(&cache_resource->refcnt);
4891                         dev_flow->flow->tag_resource = cache_resource;
4892                         return 0;
4893                 }
4894         }
4895         /* Register new  resource. */
4896         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
4897         if (!cache_resource)
4898                 return rte_flow_error_set(error, ENOMEM,
4899                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4900                                           "cannot allocate resource memory");
4901         *cache_resource = *resource;
4902         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
4903                 (resource->tag);
4904         if (!cache_resource->action) {
4905                 rte_free(cache_resource);
4906                 return rte_flow_error_set(error, ENOMEM,
4907                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4908                                           NULL, "cannot create action");
4909         }
4910         rte_atomic32_init(&cache_resource->refcnt);
4911         rte_atomic32_inc(&cache_resource->refcnt);
4912         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
4913         dev_flow->flow->tag_resource = cache_resource;
4914         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
4915                 (void *)cache_resource,
4916                 rte_atomic32_read(&cache_resource->refcnt));
4917         return 0;
4918 }
4919
4920 /**
4921  * Release the tag.
4922  *
4923  * @param dev
4924  *   Pointer to Ethernet device.
4925  * @param flow
4926  *   Pointer to mlx5_flow.
4927  *
4928  * @return
4929  *   1 while a reference on it exists, 0 when freed.
4930  */
4931 static int
4932 flow_dv_tag_release(struct rte_eth_dev *dev,
4933                     struct mlx5_flow_dv_tag_resource *tag)
4934 {
4935         assert(tag);
4936         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
4937                 dev->data->port_id, (void *)tag,
4938                 rte_atomic32_read(&tag->refcnt));
4939         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
4940                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
4941                 LIST_REMOVE(tag, next);
4942                 DRV_LOG(DEBUG, "port %u tag %p: removed",
4943                         dev->data->port_id, (void *)tag);
4944                 rte_free(tag);
4945                 return 0;
4946         }
4947         return 1;
4948 }
4949
4950 /**
4951  * Translate port ID action to vport.
4952  *
4953  * @param[in] dev
4954  *   Pointer to rte_eth_dev structure.
4955  * @param[in] action
4956  *   Pointer to the port ID action.
4957  * @param[out] dst_port_id
4958  *   The target port ID.
4959  * @param[out] error
4960  *   Pointer to the error structure.
4961  *
4962  * @return
4963  *   0 on success, a negative errno value otherwise and rte_errno is set.
4964  */
4965 static int
4966 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
4967                                  const struct rte_flow_action *action,
4968                                  uint32_t *dst_port_id,
4969                                  struct rte_flow_error *error)
4970 {
4971         uint32_t port;
4972         uint16_t port_id;
4973         int ret;
4974         const struct rte_flow_action_port_id *conf =
4975                         (const struct rte_flow_action_port_id *)action->conf;
4976
4977         port = conf->original ? dev->data->port_id : conf->id;
4978         ret = mlx5_port_to_eswitch_info(port, NULL, &port_id);
4979         if (ret)
4980                 return rte_flow_error_set(error, -ret,
4981                                           RTE_FLOW_ERROR_TYPE_ACTION,
4982                                           NULL,
4983                                           "No eswitch info was found for port");
4984         *dst_port_id = port_id;
4985         return 0;
4986 }
4987
4988 /**
4989  * Fill the flow with DV spec.
4990  *
4991  * @param[in] dev
4992  *   Pointer to rte_eth_dev structure.
4993  * @param[in, out] dev_flow
4994  *   Pointer to the sub flow.
4995  * @param[in] attr
4996  *   Pointer to the flow attributes.
4997  * @param[in] items
4998  *   Pointer to the list of items.
4999  * @param[in] actions
5000  *   Pointer to the list of actions.
5001  * @param[out] error
5002  *   Pointer to the error structure.
5003  *
5004  * @return
5005  *   0 on success, a negative errno value otherwise and rte_errno is set.
5006  */
5007 static int
5008 flow_dv_translate(struct rte_eth_dev *dev,
5009                   struct mlx5_flow *dev_flow,
5010                   const struct rte_flow_attr *attr,
5011                   const struct rte_flow_item items[],
5012                   const struct rte_flow_action actions[],
5013                   struct rte_flow_error *error)
5014 {
5015         struct mlx5_priv *priv = dev->data->dev_private;
5016         struct rte_flow *flow = dev_flow->flow;
5017         uint64_t item_flags = 0;
5018         uint64_t last_item = 0;
5019         uint64_t action_flags = 0;
5020         uint64_t priority = attr->priority;
5021         struct mlx5_flow_dv_matcher matcher = {
5022                 .mask = {
5023                         .size = sizeof(matcher.mask.buf),
5024                 },
5025         };
5026         int actions_n = 0;
5027         bool actions_end = false;
5028         struct mlx5_flow_dv_modify_hdr_resource res = {
5029                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
5030                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
5031         };
5032         union flow_dv_attr flow_attr = { .attr = 0 };
5033         struct mlx5_flow_dv_tag_resource tag_resource;
5034         uint32_t modify_action_position = UINT32_MAX;
5035         void *match_mask = matcher.mask.buf;
5036         void *match_value = dev_flow->dv.value.buf;
5037         uint8_t next_protocol = 0xff;
5038         struct rte_vlan_hdr vlan = { 0 };
5039         bool vlan_inherited = false;
5040         uint16_t vlan_tci;
5041
5042         flow->group = attr->group;
5043         if (attr->transfer)
5044                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
5045         if (priority == MLX5_FLOW_PRIO_RSVD)
5046                 priority = priv->config.flow_prio - 1;
5047         for (; !actions_end ; actions++) {
5048                 const struct rte_flow_action_queue *queue;
5049                 const struct rte_flow_action_rss *rss;
5050                 const struct rte_flow_action *action = actions;
5051                 const struct rte_flow_action_count *count = action->conf;
5052                 const uint8_t *rss_key;
5053                 const struct rte_flow_action_jump *jump_data;
5054                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
5055                 struct mlx5_flow_tbl_resource *tbl;
5056                 uint32_t port_id = 0;
5057                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
5058
5059                 switch (actions->type) {
5060                 case RTE_FLOW_ACTION_TYPE_VOID:
5061                         break;
5062                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5063                         if (flow_dv_translate_action_port_id(dev, action,
5064                                                              &port_id, error))
5065                                 return -rte_errno;
5066                         port_id_resource.port_id = port_id;
5067                         if (flow_dv_port_id_action_resource_register
5068                             (dev, &port_id_resource, dev_flow, error))
5069                                 return -rte_errno;
5070                         dev_flow->dv.actions[actions_n++] =
5071                                 dev_flow->dv.port_id_action->action;
5072                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5073                         break;
5074                 case RTE_FLOW_ACTION_TYPE_FLAG:
5075                         tag_resource.tag =
5076                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
5077                         if (!flow->tag_resource)
5078                                 if (flow_dv_tag_resource_register
5079                                     (dev, &tag_resource, dev_flow, error))
5080                                         return errno;
5081                         dev_flow->dv.actions[actions_n++] =
5082                                 flow->tag_resource->action;
5083                         action_flags |= MLX5_FLOW_ACTION_FLAG;
5084                         break;
5085                 case RTE_FLOW_ACTION_TYPE_MARK:
5086                         tag_resource.tag = mlx5_flow_mark_set
5087                               (((const struct rte_flow_action_mark *)
5088                                (actions->conf))->id);
5089                         if (!flow->tag_resource)
5090                                 if (flow_dv_tag_resource_register
5091                                     (dev, &tag_resource, dev_flow, error))
5092                                         return errno;
5093                         dev_flow->dv.actions[actions_n++] =
5094                                 flow->tag_resource->action;
5095                         action_flags |= MLX5_FLOW_ACTION_MARK;
5096                         break;
5097                 case RTE_FLOW_ACTION_TYPE_DROP:
5098                         action_flags |= MLX5_FLOW_ACTION_DROP;
5099                         break;
5100                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5101                         queue = actions->conf;
5102                         flow->rss.queue_num = 1;
5103                         (*flow->queue)[0] = queue->index;
5104                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
5105                         break;
5106                 case RTE_FLOW_ACTION_TYPE_RSS:
5107                         rss = actions->conf;
5108                         if (flow->queue)
5109                                 memcpy((*flow->queue), rss->queue,
5110                                        rss->queue_num * sizeof(uint16_t));
5111                         flow->rss.queue_num = rss->queue_num;
5112                         /* NULL RSS key indicates default RSS key. */
5113                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
5114                         memcpy(flow->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
5115                         /* RSS type 0 indicates default RSS type ETH_RSS_IP. */
5116                         flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
5117                         flow->rss.level = rss->level;
5118                         action_flags |= MLX5_FLOW_ACTION_RSS;
5119                         break;
5120                 case RTE_FLOW_ACTION_TYPE_COUNT:
5121                         if (!priv->config.devx) {
5122                                 rte_errno = ENOTSUP;
5123                                 goto cnt_err;
5124                         }
5125                         flow->counter = flow_dv_counter_alloc(dev,
5126                                                               count->shared,
5127                                                               count->id,
5128                                                               attr->group);
5129                         if (flow->counter == NULL)
5130                                 goto cnt_err;
5131                         dev_flow->dv.actions[actions_n++] =
5132                                 flow->counter->action;
5133                         action_flags |= MLX5_FLOW_ACTION_COUNT;
5134                         break;
5135 cnt_err:
5136                         if (rte_errno == ENOTSUP)
5137                                 return rte_flow_error_set
5138                                               (error, ENOTSUP,
5139                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5140                                                NULL,
5141                                                "count action not supported");
5142                         else
5143                                 return rte_flow_error_set
5144                                                 (error, rte_errno,
5145                                                  RTE_FLOW_ERROR_TYPE_ACTION,
5146                                                  action,
5147                                                  "cannot create counter"
5148                                                   " object.");
5149                         break;
5150                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5151                         dev_flow->dv.actions[actions_n++] =
5152                                                 priv->sh->pop_vlan_action;
5153                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
5154                         break;
5155                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5156                         if (!vlan_inherited) {
5157                                 flow_dev_get_vlan_info_from_items(items, &vlan);
5158                                 vlan_inherited = true;
5159                         }
5160                         vlan.eth_proto = rte_be_to_cpu_16
5161                              ((((const struct rte_flow_action_of_push_vlan *)
5162                                                    actions->conf)->ethertype));
5163                         if (flow_dv_create_action_push_vlan
5164                                             (dev, attr, &vlan, dev_flow, error))
5165                                 return -rte_errno;
5166                         dev_flow->dv.actions[actions_n++] =
5167                                            dev_flow->dv.push_vlan_res->action;
5168                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
5169                         break;
5170                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5171                         if (!vlan_inherited) {
5172                                 flow_dev_get_vlan_info_from_items(items, &vlan);
5173                                 vlan_inherited = true;
5174                         }
5175                         vlan_tci =
5176                             ((const struct rte_flow_action_of_set_vlan_pcp *)
5177                                                        actions->conf)->vlan_pcp;
5178                         vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
5179                         vlan.vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
5180                         vlan.vlan_tci |= vlan_tci;
5181                         /* Push VLAN command will use this value */
5182                         break;
5183                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5184                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5185                         if (flow_dv_create_action_l2_encap(dev, actions,
5186                                                            dev_flow,
5187                                                            attr->transfer,
5188                                                            error))
5189                                 return -rte_errno;
5190                         dev_flow->dv.actions[actions_n++] =
5191                                 dev_flow->dv.encap_decap->verbs_action;
5192                         action_flags |= actions->type ==
5193                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
5194                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
5195                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
5196                         break;
5197                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5198                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5199                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
5200                                                            attr->transfer,
5201                                                            error))
5202                                 return -rte_errno;
5203                         dev_flow->dv.actions[actions_n++] =
5204                                 dev_flow->dv.encap_decap->verbs_action;
5205                         action_flags |= actions->type ==
5206                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
5207                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
5208                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
5209                         break;
5210                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5211                         /* Handle encap with preceding decap. */
5212                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
5213                                 if (flow_dv_create_action_raw_encap
5214                                         (dev, actions, dev_flow, attr, error))
5215                                         return -rte_errno;
5216                                 dev_flow->dv.actions[actions_n++] =
5217                                         dev_flow->dv.encap_decap->verbs_action;
5218                         } else {
5219                                 /* Handle encap without preceding decap. */
5220                                 if (flow_dv_create_action_l2_encap
5221                                     (dev, actions, dev_flow, attr->transfer,
5222                                      error))
5223                                         return -rte_errno;
5224                                 dev_flow->dv.actions[actions_n++] =
5225                                         dev_flow->dv.encap_decap->verbs_action;
5226                         }
5227                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
5228                         break;
5229                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5230                         /* Check if this decap is followed by encap. */
5231                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
5232                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
5233                                action++) {
5234                         }
5235                         /* Handle decap only if it isn't followed by encap. */
5236                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5237                                 if (flow_dv_create_action_l2_decap
5238                                     (dev, dev_flow, attr->transfer, error))
5239                                         return -rte_errno;
5240                                 dev_flow->dv.actions[actions_n++] =
5241                                         dev_flow->dv.encap_decap->verbs_action;
5242                         }
5243                         /* If decap is followed by encap, handle it at encap. */
5244                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
5245                         break;
5246                 case RTE_FLOW_ACTION_TYPE_JUMP:
5247                         jump_data = action->conf;
5248                         tbl = flow_dv_tbl_resource_get(dev, jump_data->group,
5249                                                        attr->egress,
5250                                                        attr->transfer, error);
5251                         if (!tbl)
5252                                 return rte_flow_error_set
5253                                                 (error, errno,
5254                                                  RTE_FLOW_ERROR_TYPE_ACTION,
5255                                                  NULL,
5256                                                  "cannot create jump action.");
5257                         jump_tbl_resource.tbl = tbl;
5258                         if (flow_dv_jump_tbl_resource_register
5259                             (dev, &jump_tbl_resource, dev_flow, error)) {
5260                                 flow_dv_tbl_resource_release(tbl);
5261                                 return rte_flow_error_set
5262                                                 (error, errno,
5263                                                  RTE_FLOW_ERROR_TYPE_ACTION,
5264                                                  NULL,
5265                                                  "cannot create jump action.");
5266                         }
5267                         dev_flow->dv.actions[actions_n++] =
5268                                 dev_flow->dv.jump->action;
5269                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5270                         break;
5271                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5272                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5273                         if (flow_dv_convert_action_modify_mac(&res, actions,
5274                                                               error))
5275                                 return -rte_errno;
5276                         action_flags |= actions->type ==
5277                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
5278                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
5279                                         MLX5_FLOW_ACTION_SET_MAC_DST;
5280                         break;
5281                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5282                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5283                         if (flow_dv_convert_action_modify_ipv4(&res, actions,
5284                                                                error))
5285                                 return -rte_errno;
5286                         action_flags |= actions->type ==
5287                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
5288                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
5289                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
5290                         break;
5291                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5292                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5293                         if (flow_dv_convert_action_modify_ipv6(&res, actions,
5294                                                                error))
5295                                 return -rte_errno;
5296                         action_flags |= actions->type ==
5297                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5298                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
5299                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
5300                         break;
5301                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5302                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5303                         if (flow_dv_convert_action_modify_tp(&res, actions,
5304                                                              items, &flow_attr,
5305                                                              error))
5306                                 return -rte_errno;
5307                         action_flags |= actions->type ==
5308                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5309                                         MLX5_FLOW_ACTION_SET_TP_SRC :
5310                                         MLX5_FLOW_ACTION_SET_TP_DST;
5311                         break;
5312                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5313                         if (flow_dv_convert_action_modify_dec_ttl(&res, items,
5314                                                                   &flow_attr,
5315                                                                   error))
5316                                 return -rte_errno;
5317                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
5318                         break;
5319                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5320                         if (flow_dv_convert_action_modify_ttl(&res, actions,
5321                                                              items, &flow_attr,
5322                                                              error))
5323                                 return -rte_errno;
5324                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
5325                         break;
5326                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5327                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5328                         if (flow_dv_convert_action_modify_tcp_seq(&res, actions,
5329                                                                   error))
5330                                 return -rte_errno;
5331                         action_flags |= actions->type ==
5332                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5333                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
5334                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5335                         break;
5336
5337                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5338                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5339                         if (flow_dv_convert_action_modify_tcp_ack(&res, actions,
5340                                                                   error))
5341                                 return -rte_errno;
5342                         action_flags |= actions->type ==
5343                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5344                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
5345                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
5346                         break;
5347                 case RTE_FLOW_ACTION_TYPE_END:
5348                         actions_end = true;
5349                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) {
5350                                 /* create modify action if needed. */
5351                                 if (flow_dv_modify_hdr_resource_register
5352                                                                 (dev, &res,
5353                                                                  dev_flow,
5354                                                                  error))
5355                                         return -rte_errno;
5356                                 dev_flow->dv.actions[modify_action_position] =
5357                                         dev_flow->dv.modify_hdr->verbs_action;
5358                         }
5359                         break;
5360                 default:
5361                         break;
5362                 }
5363                 if ((action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) &&
5364                     modify_action_position == UINT32_MAX)
5365                         modify_action_position = actions_n++;
5366         }
5367         dev_flow->dv.actions_n = actions_n;
5368         flow->actions = action_flags;
5369         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5370                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
5371
5372                 switch (items->type) {
5373                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5374                         flow_dv_translate_item_port_id(dev, match_mask,
5375                                                        match_value, items);
5376                         last_item = MLX5_FLOW_ITEM_PORT_ID;
5377                         break;
5378                 case RTE_FLOW_ITEM_TYPE_ETH:
5379                         flow_dv_translate_item_eth(match_mask, match_value,
5380                                                    items, tunnel);
5381                         matcher.priority = MLX5_PRIORITY_MAP_L2;
5382                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
5383                                              MLX5_FLOW_LAYER_OUTER_L2;
5384                         break;
5385                 case RTE_FLOW_ITEM_TYPE_VLAN:
5386                         flow_dv_translate_item_vlan(dev_flow,
5387                                                     match_mask, match_value,
5388                                                     items, tunnel);
5389                         matcher.priority = MLX5_PRIORITY_MAP_L2;
5390                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
5391                                               MLX5_FLOW_LAYER_INNER_VLAN) :
5392                                              (MLX5_FLOW_LAYER_OUTER_L2 |
5393                                               MLX5_FLOW_LAYER_OUTER_VLAN);
5394                         break;
5395                 case RTE_FLOW_ITEM_TYPE_IPV4:
5396                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5397                                                   &item_flags, &tunnel);
5398                         flow_dv_translate_item_ipv4(match_mask, match_value,
5399                                                     items, tunnel, attr->group);
5400                         matcher.priority = MLX5_PRIORITY_MAP_L3;
5401                         dev_flow->dv.hash_fields |=
5402                                 mlx5_flow_hashfields_adjust
5403                                         (dev_flow, tunnel,
5404                                          MLX5_IPV4_LAYER_TYPES,
5405                                          MLX5_IPV4_IBV_RX_HASH);
5406                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
5407                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
5408                         if (items->mask != NULL &&
5409                             ((const struct rte_flow_item_ipv4 *)
5410                              items->mask)->hdr.next_proto_id) {
5411                                 next_protocol =
5412                                         ((const struct rte_flow_item_ipv4 *)
5413                                          (items->spec))->hdr.next_proto_id;
5414                                 next_protocol &=
5415                                         ((const struct rte_flow_item_ipv4 *)
5416                                          (items->mask))->hdr.next_proto_id;
5417                         } else {
5418                                 /* Reset for inner layer. */
5419                                 next_protocol = 0xff;
5420                         }
5421                         break;
5422                 case RTE_FLOW_ITEM_TYPE_IPV6:
5423                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5424                                                   &item_flags, &tunnel);
5425                         flow_dv_translate_item_ipv6(match_mask, match_value,
5426                                                     items, tunnel, attr->group);
5427                         matcher.priority = MLX5_PRIORITY_MAP_L3;
5428                         dev_flow->dv.hash_fields |=
5429                                 mlx5_flow_hashfields_adjust
5430                                         (dev_flow, tunnel,
5431                                          MLX5_IPV6_LAYER_TYPES,
5432                                          MLX5_IPV6_IBV_RX_HASH);
5433                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
5434                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
5435                         if (items->mask != NULL &&
5436                             ((const struct rte_flow_item_ipv6 *)
5437                              items->mask)->hdr.proto) {
5438                                 next_protocol =
5439                                         ((const struct rte_flow_item_ipv6 *)
5440                                          items->spec)->hdr.proto;
5441                                 next_protocol &=
5442                                         ((const struct rte_flow_item_ipv6 *)
5443                                          items->mask)->hdr.proto;
5444                         } else {
5445                                 /* Reset for inner layer. */
5446                                 next_protocol = 0xff;
5447                         }
5448                         break;
5449                 case RTE_FLOW_ITEM_TYPE_TCP:
5450                         flow_dv_translate_item_tcp(match_mask, match_value,
5451                                                    items, tunnel);
5452                         matcher.priority = MLX5_PRIORITY_MAP_L4;
5453                         dev_flow->dv.hash_fields |=
5454                                 mlx5_flow_hashfields_adjust
5455                                         (dev_flow, tunnel, ETH_RSS_TCP,
5456                                          IBV_RX_HASH_SRC_PORT_TCP |
5457                                          IBV_RX_HASH_DST_PORT_TCP);
5458                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
5459                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
5460                         break;
5461                 case RTE_FLOW_ITEM_TYPE_UDP:
5462                         flow_dv_translate_item_udp(match_mask, match_value,
5463                                                    items, tunnel);
5464                         matcher.priority = MLX5_PRIORITY_MAP_L4;
5465                         dev_flow->dv.hash_fields |=
5466                                 mlx5_flow_hashfields_adjust
5467                                         (dev_flow, tunnel, ETH_RSS_UDP,
5468                                          IBV_RX_HASH_SRC_PORT_UDP |
5469                                          IBV_RX_HASH_DST_PORT_UDP);
5470                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
5471                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
5472                         break;
5473                 case RTE_FLOW_ITEM_TYPE_GRE:
5474                         flow_dv_translate_item_gre(match_mask, match_value,
5475                                                    items, tunnel);
5476                         last_item = MLX5_FLOW_LAYER_GRE;
5477                         break;
5478                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
5479                         flow_dv_translate_item_gre_key(match_mask,
5480                                                        match_value, items);
5481                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
5482                         break;
5483                 case RTE_FLOW_ITEM_TYPE_NVGRE:
5484                         flow_dv_translate_item_nvgre(match_mask, match_value,
5485                                                      items, tunnel);
5486                         last_item = MLX5_FLOW_LAYER_GRE;
5487                         break;
5488                 case RTE_FLOW_ITEM_TYPE_VXLAN:
5489                         flow_dv_translate_item_vxlan(match_mask, match_value,
5490                                                      items, tunnel);
5491                         last_item = MLX5_FLOW_LAYER_VXLAN;
5492                         break;
5493                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
5494                         flow_dv_translate_item_vxlan(match_mask, match_value,
5495                                                      items, tunnel);
5496                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
5497                         break;
5498                 case RTE_FLOW_ITEM_TYPE_MPLS:
5499                         flow_dv_translate_item_mpls(match_mask, match_value,
5500                                                     items, last_item, tunnel);
5501                         last_item = MLX5_FLOW_LAYER_MPLS;
5502                         break;
5503                 case RTE_FLOW_ITEM_TYPE_META:
5504                         flow_dv_translate_item_meta(match_mask, match_value,
5505                                                     items);
5506                         last_item = MLX5_FLOW_ITEM_METADATA;
5507                         break;
5508                 case RTE_FLOW_ITEM_TYPE_ICMP:
5509                         flow_dv_translate_item_icmp(match_mask, match_value,
5510                                                     items, tunnel);
5511                         last_item = MLX5_FLOW_LAYER_ICMP;
5512                         break;
5513                 case RTE_FLOW_ITEM_TYPE_ICMP6:
5514                         flow_dv_translate_item_icmp6(match_mask, match_value,
5515                                                       items, tunnel);
5516                         last_item = MLX5_FLOW_LAYER_ICMP6;
5517                         break;
5518                 default:
5519                         break;
5520                 }
5521                 item_flags |= last_item;
5522         }
5523         /*
5524          * In case of ingress traffic when E-Switch mode is enabled,
5525          * we have two cases where we need to set the source port manually.
5526          * The first one, is in case of Nic steering rule, and the second is
5527          * E-Switch rule where no port_id item was found. In both cases
5528          * the source port is set according the current port in use.
5529          */
5530         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
5531             (priv->representor || priv->master)) {
5532                 if (flow_dv_translate_item_port_id(dev, match_mask,
5533                                                    match_value, NULL))
5534                         return -rte_errno;
5535         }
5536         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
5537                                          dev_flow->dv.value.buf));
5538         dev_flow->layers = item_flags;
5539         /* Register matcher. */
5540         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
5541                                     matcher.mask.size);
5542         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
5543                                                      matcher.priority);
5544         matcher.egress = attr->egress;
5545         matcher.group = attr->group;
5546         matcher.transfer = attr->transfer;
5547         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
5548                 return -rte_errno;
5549         return 0;
5550 }
5551
5552 /**
5553  * Apply the flow to the NIC.
5554  *
5555  * @param[in] dev
5556  *   Pointer to the Ethernet device structure.
5557  * @param[in, out] flow
5558  *   Pointer to flow structure.
5559  * @param[out] error
5560  *   Pointer to error structure.
5561  *
5562  * @return
5563  *   0 on success, a negative errno value otherwise and rte_errno is set.
5564  */
5565 static int
5566 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
5567               struct rte_flow_error *error)
5568 {
5569         struct mlx5_flow_dv *dv;
5570         struct mlx5_flow *dev_flow;
5571         struct mlx5_priv *priv = dev->data->dev_private;
5572         int n;
5573         int err;
5574
5575         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5576                 dv = &dev_flow->dv;
5577                 n = dv->actions_n;
5578                 if (flow->actions & MLX5_FLOW_ACTION_DROP) {
5579                         if (flow->transfer) {
5580                                 dv->actions[n++] = priv->sh->esw_drop_action;
5581                         } else {
5582                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
5583                                 if (!dv->hrxq) {
5584                                         rte_flow_error_set
5585                                                 (error, errno,
5586                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5587                                                  NULL,
5588                                                  "cannot get drop hash queue");
5589                                         goto error;
5590                                 }
5591                                 dv->actions[n++] = dv->hrxq->action;
5592                         }
5593                 } else if (flow->actions &
5594                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
5595                         struct mlx5_hrxq *hrxq;
5596
5597                         hrxq = mlx5_hrxq_get(dev, flow->key,
5598                                              MLX5_RSS_HASH_KEY_LEN,
5599                                              dv->hash_fields,
5600                                              (*flow->queue),
5601                                              flow->rss.queue_num);
5602                         if (!hrxq) {
5603                                 hrxq = mlx5_hrxq_new
5604                                         (dev, flow->key, MLX5_RSS_HASH_KEY_LEN,
5605                                          dv->hash_fields, (*flow->queue),
5606                                          flow->rss.queue_num,
5607                                          !!(dev_flow->layers &
5608                                             MLX5_FLOW_LAYER_TUNNEL));
5609                         }
5610                         if (!hrxq) {
5611                                 rte_flow_error_set
5612                                         (error, rte_errno,
5613                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5614                                          "cannot get hash queue");
5615                                 goto error;
5616                         }
5617                         dv->hrxq = hrxq;
5618                         dv->actions[n++] = dv->hrxq->action;
5619                 }
5620                 dv->flow =
5621                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
5622                                                   (void *)&dv->value, n,
5623                                                   dv->actions);
5624                 if (!dv->flow) {
5625                         rte_flow_error_set(error, errno,
5626                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5627                                            NULL,
5628                                            "hardware refuses to create flow");
5629                         goto error;
5630                 }
5631                 if (priv->vmwa_context &&
5632                     dev_flow->dv.vf_vlan.tag &&
5633                     !dev_flow->dv.vf_vlan.created) {
5634                         /*
5635                          * The rule contains the VLAN pattern.
5636                          * For VF we are going to create VLAN
5637                          * interface to make hypervisor set correct
5638                          * e-Switch vport context.
5639                          */
5640                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
5641                 }
5642         }
5643         return 0;
5644 error:
5645         err = rte_errno; /* Save rte_errno before cleanup. */
5646         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5647                 struct mlx5_flow_dv *dv = &dev_flow->dv;
5648                 if (dv->hrxq) {
5649                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5650                                 mlx5_hrxq_drop_release(dev);
5651                         else
5652                                 mlx5_hrxq_release(dev, dv->hrxq);
5653                         dv->hrxq = NULL;
5654                 }
5655                 if (dev_flow->dv.vf_vlan.tag &&
5656                     dev_flow->dv.vf_vlan.created)
5657                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
5658         }
5659         rte_errno = err; /* Restore rte_errno. */
5660         return -rte_errno;
5661 }
5662
5663 /**
5664  * Release the flow matcher.
5665  *
5666  * @param dev
5667  *   Pointer to Ethernet device.
5668  * @param flow
5669  *   Pointer to mlx5_flow.
5670  *
5671  * @return
5672  *   1 while a reference on it exists, 0 when freed.
5673  */
5674 static int
5675 flow_dv_matcher_release(struct rte_eth_dev *dev,
5676                         struct mlx5_flow *flow)
5677 {
5678         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
5679         struct mlx5_priv *priv = dev->data->dev_private;
5680         struct mlx5_ibv_shared *sh = priv->sh;
5681         struct mlx5_flow_tbl_resource *tbl;
5682
5683         assert(matcher->matcher_object);
5684         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
5685                 dev->data->port_id, (void *)matcher,
5686                 rte_atomic32_read(&matcher->refcnt));
5687         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
5688                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
5689                            (matcher->matcher_object));
5690                 LIST_REMOVE(matcher, next);
5691                 if (matcher->egress)
5692                         tbl = &sh->tx_tbl[matcher->group];
5693                 else
5694                         tbl = &sh->rx_tbl[matcher->group];
5695                 flow_dv_tbl_resource_release(tbl);
5696                 rte_free(matcher);
5697                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
5698                         dev->data->port_id, (void *)matcher);
5699                 return 0;
5700         }
5701         return 1;
5702 }
5703
5704 /**
5705  * Release an encap/decap resource.
5706  *
5707  * @param flow
5708  *   Pointer to mlx5_flow.
5709  *
5710  * @return
5711  *   1 while a reference on it exists, 0 when freed.
5712  */
5713 static int
5714 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
5715 {
5716         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
5717                                                 flow->dv.encap_decap;
5718
5719         assert(cache_resource->verbs_action);
5720         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
5721                 (void *)cache_resource,
5722                 rte_atomic32_read(&cache_resource->refcnt));
5723         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5724                 claim_zero(mlx5_glue->destroy_flow_action
5725                                 (cache_resource->verbs_action));
5726                 LIST_REMOVE(cache_resource, next);
5727                 rte_free(cache_resource);
5728                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
5729                         (void *)cache_resource);
5730                 return 0;
5731         }
5732         return 1;
5733 }
5734
5735 /**
5736  * Release an jump to table action resource.
5737  *
5738  * @param flow
5739  *   Pointer to mlx5_flow.
5740  *
5741  * @return
5742  *   1 while a reference on it exists, 0 when freed.
5743  */
5744 static int
5745 flow_dv_jump_tbl_resource_release(struct mlx5_flow *flow)
5746 {
5747         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
5748                                                 flow->dv.jump;
5749
5750         assert(cache_resource->action);
5751         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
5752                 (void *)cache_resource,
5753                 rte_atomic32_read(&cache_resource->refcnt));
5754         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5755                 claim_zero(mlx5_glue->destroy_flow_action
5756                                 (cache_resource->action));
5757                 LIST_REMOVE(cache_resource, next);
5758                 flow_dv_tbl_resource_release(cache_resource->tbl);
5759                 rte_free(cache_resource);
5760                 DRV_LOG(DEBUG, "jump table resource %p: removed",
5761                         (void *)cache_resource);
5762                 return 0;
5763         }
5764         return 1;
5765 }
5766
5767 /**
5768  * Release a modify-header resource.
5769  *
5770  * @param flow
5771  *   Pointer to mlx5_flow.
5772  *
5773  * @return
5774  *   1 while a reference on it exists, 0 when freed.
5775  */
5776 static int
5777 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
5778 {
5779         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
5780                                                 flow->dv.modify_hdr;
5781
5782         assert(cache_resource->verbs_action);
5783         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
5784                 (void *)cache_resource,
5785                 rte_atomic32_read(&cache_resource->refcnt));
5786         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5787                 claim_zero(mlx5_glue->destroy_flow_action
5788                                 (cache_resource->verbs_action));
5789                 LIST_REMOVE(cache_resource, next);
5790                 rte_free(cache_resource);
5791                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
5792                         (void *)cache_resource);
5793                 return 0;
5794         }
5795         return 1;
5796 }
5797
5798 /**
5799  * Release port ID action resource.
5800  *
5801  * @param flow
5802  *   Pointer to mlx5_flow.
5803  *
5804  * @return
5805  *   1 while a reference on it exists, 0 when freed.
5806  */
5807 static int
5808 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
5809 {
5810         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
5811                 flow->dv.port_id_action;
5812
5813         assert(cache_resource->action);
5814         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
5815                 (void *)cache_resource,
5816                 rte_atomic32_read(&cache_resource->refcnt));
5817         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5818                 claim_zero(mlx5_glue->destroy_flow_action
5819                                 (cache_resource->action));
5820                 LIST_REMOVE(cache_resource, next);
5821                 rte_free(cache_resource);
5822                 DRV_LOG(DEBUG, "port id action resource %p: removed",
5823                         (void *)cache_resource);
5824                 return 0;
5825         }
5826         return 1;
5827 }
5828
5829 /**
5830  * Release push vlan action resource.
5831  *
5832  * @param flow
5833  *   Pointer to mlx5_flow.
5834  *
5835  * @return
5836  *   1 while a reference on it exists, 0 when freed.
5837  */
5838 static int
5839 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
5840 {
5841         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
5842                 flow->dv.push_vlan_res;
5843
5844         assert(cache_resource->action);
5845         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
5846                 (void *)cache_resource,
5847                 rte_atomic32_read(&cache_resource->refcnt));
5848         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5849                 claim_zero(mlx5_glue->destroy_flow_action
5850                                 (cache_resource->action));
5851                 LIST_REMOVE(cache_resource, next);
5852                 rte_free(cache_resource);
5853                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
5854                         (void *)cache_resource);
5855                 return 0;
5856         }
5857         return 1;
5858 }
5859
5860 /**
5861  * Remove the flow from the NIC but keeps it in memory.
5862  *
5863  * @param[in] dev
5864  *   Pointer to Ethernet device.
5865  * @param[in, out] flow
5866  *   Pointer to flow structure.
5867  */
5868 static void
5869 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
5870 {
5871         struct mlx5_flow_dv *dv;
5872         struct mlx5_flow *dev_flow;
5873
5874         if (!flow)
5875                 return;
5876         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5877                 dv = &dev_flow->dv;
5878                 if (dv->flow) {
5879                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
5880                         dv->flow = NULL;
5881                 }
5882                 if (dv->hrxq) {
5883                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5884                                 mlx5_hrxq_drop_release(dev);
5885                         else
5886                                 mlx5_hrxq_release(dev, dv->hrxq);
5887                         dv->hrxq = NULL;
5888                 }
5889                 if (dev_flow->dv.vf_vlan.tag &&
5890                     dev_flow->dv.vf_vlan.created)
5891                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
5892         }
5893 }
5894
5895 /**
5896  * Remove the flow from the NIC and the memory.
5897  *
5898  * @param[in] dev
5899  *   Pointer to the Ethernet device structure.
5900  * @param[in, out] flow
5901  *   Pointer to flow structure.
5902  */
5903 static void
5904 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
5905 {
5906         struct mlx5_flow *dev_flow;
5907
5908         if (!flow)
5909                 return;
5910         flow_dv_remove(dev, flow);
5911         if (flow->counter) {
5912                 flow_dv_counter_release(dev, flow->counter);
5913                 flow->counter = NULL;
5914         }
5915         if (flow->tag_resource) {
5916                 flow_dv_tag_release(dev, flow->tag_resource);
5917                 flow->tag_resource = NULL;
5918         }
5919         while (!LIST_EMPTY(&flow->dev_flows)) {
5920                 dev_flow = LIST_FIRST(&flow->dev_flows);
5921                 LIST_REMOVE(dev_flow, next);
5922                 if (dev_flow->dv.matcher)
5923                         flow_dv_matcher_release(dev, dev_flow);
5924                 if (dev_flow->dv.encap_decap)
5925                         flow_dv_encap_decap_resource_release(dev_flow);
5926                 if (dev_flow->dv.modify_hdr)
5927                         flow_dv_modify_hdr_resource_release(dev_flow);
5928                 if (dev_flow->dv.jump)
5929                         flow_dv_jump_tbl_resource_release(dev_flow);
5930                 if (dev_flow->dv.port_id_action)
5931                         flow_dv_port_id_action_resource_release(dev_flow);
5932                 if (dev_flow->dv.push_vlan_res)
5933                         flow_dv_push_vlan_action_resource_release(dev_flow);
5934                 rte_free(dev_flow);
5935         }
5936 }
5937
5938 /**
5939  * Query a dv flow  rule for its statistics via devx.
5940  *
5941  * @param[in] dev
5942  *   Pointer to Ethernet device.
5943  * @param[in] flow
5944  *   Pointer to the sub flow.
5945  * @param[out] data
5946  *   data retrieved by the query.
5947  * @param[out] error
5948  *   Perform verbose error reporting if not NULL.
5949  *
5950  * @return
5951  *   0 on success, a negative errno value otherwise and rte_errno is set.
5952  */
5953 static int
5954 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
5955                     void *data, struct rte_flow_error *error)
5956 {
5957         struct mlx5_priv *priv = dev->data->dev_private;
5958         struct rte_flow_query_count *qc = data;
5959
5960         if (!priv->config.devx)
5961                 return rte_flow_error_set(error, ENOTSUP,
5962                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5963                                           NULL,
5964                                           "counters are not supported");
5965         if (flow->counter) {
5966                 uint64_t pkts, bytes;
5967                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
5968                                                &bytes);
5969
5970                 if (err)
5971                         return rte_flow_error_set(error, -err,
5972                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5973                                         NULL, "cannot read counters");
5974                 qc->hits_set = 1;
5975                 qc->bytes_set = 1;
5976                 qc->hits = pkts - flow->counter->hits;
5977                 qc->bytes = bytes - flow->counter->bytes;
5978                 if (qc->reset) {
5979                         flow->counter->hits = pkts;
5980                         flow->counter->bytes = bytes;
5981                 }
5982                 return 0;
5983         }
5984         return rte_flow_error_set(error, EINVAL,
5985                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5986                                   NULL,
5987                                   "counters are not available");
5988 }
5989
5990 /**
5991  * Query a flow.
5992  *
5993  * @see rte_flow_query()
5994  * @see rte_flow_ops
5995  */
5996 static int
5997 flow_dv_query(struct rte_eth_dev *dev,
5998               struct rte_flow *flow __rte_unused,
5999               const struct rte_flow_action *actions __rte_unused,
6000               void *data __rte_unused,
6001               struct rte_flow_error *error __rte_unused)
6002 {
6003         int ret = -EINVAL;
6004
6005         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
6006                 switch (actions->type) {
6007                 case RTE_FLOW_ACTION_TYPE_VOID:
6008                         break;
6009                 case RTE_FLOW_ACTION_TYPE_COUNT:
6010                         ret = flow_dv_query_count(dev, flow, data, error);
6011                         break;
6012                 default:
6013                         return rte_flow_error_set(error, ENOTSUP,
6014                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6015                                                   actions,
6016                                                   "action not supported");
6017                 }
6018         }
6019         return ret;
6020 }
6021
6022 /*
6023  * Mutex-protected thunk to flow_dv_translate().
6024  */
6025 static int
6026 flow_d_translate(struct rte_eth_dev *dev,
6027                  struct mlx5_flow *dev_flow,
6028                  const struct rte_flow_attr *attr,
6029                  const struct rte_flow_item items[],
6030                  const struct rte_flow_action actions[],
6031                  struct rte_flow_error *error)
6032 {
6033         int ret;
6034
6035         flow_d_shared_lock(dev);
6036         ret = flow_dv_translate(dev, dev_flow, attr, items, actions, error);
6037         flow_d_shared_unlock(dev);
6038         return ret;
6039 }
6040
6041 /*
6042  * Mutex-protected thunk to flow_dv_apply().
6043  */
6044 static int
6045 flow_d_apply(struct rte_eth_dev *dev,
6046              struct rte_flow *flow,
6047              struct rte_flow_error *error)
6048 {
6049         int ret;
6050
6051         flow_d_shared_lock(dev);
6052         ret = flow_dv_apply(dev, flow, error);
6053         flow_d_shared_unlock(dev);
6054         return ret;
6055 }
6056
6057 /*
6058  * Mutex-protected thunk to flow_dv_remove().
6059  */
6060 static void
6061 flow_d_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
6062 {
6063         flow_d_shared_lock(dev);
6064         flow_dv_remove(dev, flow);
6065         flow_d_shared_unlock(dev);
6066 }
6067
6068 /*
6069  * Mutex-protected thunk to flow_dv_destroy().
6070  */
6071 static void
6072 flow_d_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
6073 {
6074         flow_d_shared_lock(dev);
6075         flow_dv_destroy(dev, flow);
6076         flow_d_shared_unlock(dev);
6077 }
6078
6079 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
6080         .validate = flow_dv_validate,
6081         .prepare = flow_dv_prepare,
6082         .translate = flow_d_translate,
6083         .apply = flow_d_apply,
6084         .remove = flow_d_remove,
6085         .destroy = flow_d_destroy,
6086         .query = flow_dv_query,
6087 };
6088
6089 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */