drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  58                                           sizeof(struct rte_flow_item_ipv4))
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 /**
  79  * Initialize flow attributes structure according to flow items' types.
  80  *
  81  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  82  * mode. For tunnel mode, the items to be modified are the outermost ones.
  83  *
  84  * @param[in] item
  85  *   Pointer to item specification.
  86  * @param[out] attr
  87  *   Pointer to flow attributes structure.
  88  * @param[in] dev_flow
  89  *   Pointer to the sub flow.
  90  * @param[in] tunnel_decap
  91  *   Whether action is after tunnel decapsulation.
  92  */
  93 static void
  94 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
  95                   struct mlx5_flow *dev_flow, bool tunnel_decap)
  96 {
  97         /*
  98          * If layers is already initialized, it means this dev_flow is the
  99          * suffix flow, the layers flags is set by the prefix flow. Need to
 100          * use the layer flags from prefix flow as the suffix flow may not
 101          * have the user defined items as the flow is split.
 102          */
 103         if (dev_flow->layers) {
 104                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 105                         attr->ipv4 = 1;
 106                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 107                         attr->ipv6 = 1;
 108                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 109                         attr->tcp = 1;
 110                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 111                         attr->udp = 1;
 112                 attr->valid = 1;
 113                 return;
 114         }
 115         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 116                 uint8_t next_protocol = 0xff;
 117                 switch (item->type) {
 118                 case RTE_FLOW_ITEM_TYPE_GRE:
 119                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 120                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 121                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 122                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 123                 case RTE_FLOW_ITEM_TYPE_MPLS:
 124                         if (tunnel_decap)
 125                                 attr->attr = 0;
 126                         break;
 127                 case RTE_FLOW_ITEM_TYPE_IPV4:
 128                         if (!attr->ipv6)
 129                                 attr->ipv4 = 1;
 130                         if (item->mask != NULL &&
 131                             ((const struct rte_flow_item_ipv4 *)
 132                             item->mask)->hdr.next_proto_id)
 133                                 next_protocol =
 134                                     ((const struct rte_flow_item_ipv4 *)
 135                                       (item->spec))->hdr.next_proto_id &
 136                                     ((const struct rte_flow_item_ipv4 *)
 137                                       (item->mask))->hdr.next_proto_id;
 138                         if ((next_protocol == IPPROTO_IPIP ||
 139                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 140                                 attr->attr = 0;
 141                         break;
 142                 case RTE_FLOW_ITEM_TYPE_IPV6:
 143                         if (!attr->ipv4)
 144                                 attr->ipv6 = 1;
 145                         if (item->mask != NULL &&
 146                             ((const struct rte_flow_item_ipv6 *)
 147                             item->mask)->hdr.proto)
 148                                 next_protocol =
 149                                     ((const struct rte_flow_item_ipv6 *)
 150                                       (item->spec))->hdr.proto &
 151                                     ((const struct rte_flow_item_ipv6 *)
 152                                       (item->mask))->hdr.proto;
 153                         if ((next_protocol == IPPROTO_IPIP ||
 154                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 155                                 attr->attr = 0;
 156                         break;
 157                 case RTE_FLOW_ITEM_TYPE_UDP:
 158                         if (!attr->tcp)
 159                                 attr->udp = 1;
 160                         break;
 161                 case RTE_FLOW_ITEM_TYPE_TCP:
 162                         if (!attr->udp)
 163                                 attr->tcp = 1;
 164                         break;
 165                 default:
 166                         break;
 167                 }
 168         }
 169         attr->valid = 1;
 170 }
 171
 172 /**
 173  * Convert rte_mtr_color to mlx5 color.
 174  *
 175  * @param[in] rcol
 176  *   rte_mtr_color.
 177  *
 178  * @return
 179  *   mlx5 color.
 180  */
 181 static int
 182 rte_col_2_mlx5_col(enum rte_color rcol)
 183 {
 184         switch (rcol) {
 185         case RTE_COLOR_GREEN:
 186                 return MLX5_FLOW_COLOR_GREEN;
 187         case RTE_COLOR_YELLOW:
 188                 return MLX5_FLOW_COLOR_YELLOW;
 189         case RTE_COLOR_RED:
 190                 return MLX5_FLOW_COLOR_RED;
 191         default:
 192                 break;
 193         }
 194         return MLX5_FLOW_COLOR_UNDEFINED;
 195 }
 196
 197 struct field_modify_info {
 198         uint32_t size; /* Size of field in protocol header, in bytes. */
 199         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 200         enum mlx5_modification_field id;
 201 };
 202
 203 struct field_modify_info modify_eth[] = {
 204         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 205         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 206         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 207         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 208         {0, 0, 0},
 209 };
 210
 211 struct field_modify_info modify_vlan_out_first_vid[] = {
 212         /* Size in bits !!! */
 213         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 214         {0, 0, 0},
 215 };
 216
 217 struct field_modify_info modify_ipv4[] = {
 218         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 219         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 220         {4, 12, MLX5_MODI_OUT_SIPV4},
 221         {4, 16, MLX5_MODI_OUT_DIPV4},
 222         {0, 0, 0},
 223 };
 224
 225 struct field_modify_info modify_ipv6[] = {
 226         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 227         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 228         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 229         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 230         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 231         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 232         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 233         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 234         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 235         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 236         {0, 0, 0},
 237 };
 238
 239 struct field_modify_info modify_udp[] = {
 240         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 241         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 242         {0, 0, 0},
 243 };
 244
 245 struct field_modify_info modify_tcp[] = {
 246         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 247         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 248         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 249         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 250         {0, 0, 0},
 251 };
 252
 253 static void
 254 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 255                           uint8_t next_protocol, uint64_t *item_flags,
 256                           int *tunnel)
 257 {
 258         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 259                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 260         if (next_protocol == IPPROTO_IPIP) {
 261                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 262                 *tunnel = 1;
 263         }
 264         if (next_protocol == IPPROTO_IPV6) {
 265                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 266                 *tunnel = 1;
 267         }
 268 }
 269
 270 /**
 271  * Acquire the synchronizing object to protect multithreaded access
 272  * to shared dv context. Lock occurs only if context is actually
 273  * shared, i.e. we have multiport IB device and representors are
 274  * created.
 275  *
 276  * @param[in] dev
 277  *   Pointer to the rte_eth_dev structure.
 278  */
 279 static void
 280 flow_dv_shared_lock(struct rte_eth_dev *dev)
 281 {
 282         struct mlx5_priv *priv = dev->data->dev_private;
 283         struct mlx5_ibv_shared *sh = priv->sh;
 284
 285         if (sh->dv_refcnt > 1) {
 286                 int ret;
 287
 288                 ret = pthread_mutex_lock(&sh->dv_mutex);
 289                 MLX5_ASSERT(!ret);
 290                 (void)ret;
 291         }
 292 }
 293
 294 static void
 295 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 296 {
 297         struct mlx5_priv *priv = dev->data->dev_private;
 298         struct mlx5_ibv_shared *sh = priv->sh;
 299
 300         if (sh->dv_refcnt > 1) {
 301                 int ret;
 302
 303                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 304                 MLX5_ASSERT(!ret);
 305                 (void)ret;
 306         }
 307 }
 308
 309 /* Update VLAN's VID/PCP based on input rte_flow_action.
 310  *
 311  * @param[in] action
 312  *   Pointer to struct rte_flow_action.
 313  * @param[out] vlan
 314  *   Pointer to struct rte_vlan_hdr.
 315  */
 316 static void
 317 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 318                          struct rte_vlan_hdr *vlan)
 319 {
 320         uint16_t vlan_tci;
 321         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 322                 vlan_tci =
 323                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 324                                                action->conf)->vlan_pcp;
 325                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 326                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 327                 vlan->vlan_tci |= vlan_tci;
 328         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 329                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 330                 vlan->vlan_tci |= rte_be_to_cpu_16
 331                     (((const struct rte_flow_action_of_set_vlan_vid *)
 332                                              action->conf)->vlan_vid);
 333         }
 334 }
 335
 336 /**
 337  * Fetch 1, 2, 3 or 4 byte field from the byte array
 338  * and return as unsigned integer in host-endian format.
 339  *
 340  * @param[in] data
 341  *   Pointer to data array.
 342  * @param[in] size
 343  *   Size of field to extract.
 344  *
 345  * @return
 346  *   converted field in host endian format.
 347  */
 348 static inline uint32_t
 349 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 350 {
 351         uint32_t ret;
 352
 353         switch (size) {
 354         case 1:
 355                 ret = *data;
 356                 break;
 357         case 2:
 358                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 359                 break;
 360         case 3:
 361                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 362                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 363                 break;
 364         case 4:
 365                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 366                 break;
 367         default:
 368                 MLX5_ASSERT(false);
 369                 ret = 0;
 370                 break;
 371         }
 372         return ret;
 373 }
 374
 375 /**
 376  * Convert modify-header action to DV specification.
 377  *
 378  * Data length of each action is determined by provided field description
 379  * and the item mask. Data bit offset and width of each action is determined
 380  * by provided item mask.
 381  *
 382  * @param[in] item
 383  *   Pointer to item specification.
 384  * @param[in] field
 385  *   Pointer to field modification information.
 386  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 387  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 388  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 389  * @param[in] dcopy
 390  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 391  *   Negative offset value sets the same offset as source offset.
 392  *   size field is ignored, value is taken from source field.
 393  * @param[in,out] resource
 394  *   Pointer to the modify-header resource.
 395  * @param[in] type
 396  *   Type of modification.
 397  * @param[out] error
 398  *   Pointer to the error structure.
 399  *
 400  * @return
 401  *   0 on success, a negative errno value otherwise and rte_errno is set.
 402  */
 403 static int
 404 flow_dv_convert_modify_action(struct rte_flow_item *item,
 405                               struct field_modify_info *field,
 406                               struct field_modify_info *dcopy,
 407                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 408                               uint32_t type, struct rte_flow_error *error)
 409 {
 410         uint32_t i = resource->actions_num;
 411         struct mlx5_modification_cmd *actions = resource->actions;
 412
 413         /*
 414          * The item and mask are provided in big-endian format.
 415          * The fields should be presented as in big-endian format either.
 416          * Mask must be always present, it defines the actual field width.
 417          */
 418         MLX5_ASSERT(item->mask);
 419         MLX5_ASSERT(field->size);
 420         do {
 421                 unsigned int size_b;
 422                 unsigned int off_b;
 423                 uint32_t mask;
 424                 uint32_t data;
 425
 426                 if (i >= MLX5_MAX_MODIFY_NUM)
 427                         return rte_flow_error_set(error, EINVAL,
 428                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 429                                  "too many items to modify");
 430                 /* Fetch variable byte size mask from the array. */
 431                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 432                                            field->offset, field->size);
 433                 if (!mask) {
 434                         ++field;
 435                         continue;
 436                 }
 437                 /* Deduce actual data width in bits from mask value. */
 438                 off_b = rte_bsf32(mask);
 439                 size_b = sizeof(uint32_t) * CHAR_BIT -
 440                          off_b - __builtin_clz(mask);
 441                 MLX5_ASSERT(size_b);
 442                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 443                 actions[i] = (struct mlx5_modification_cmd) {
 444                         .action_type = type,
 445                         .field = field->id,
 446                         .offset = off_b,
 447                         .length = size_b,
 448                 };
 449                 /* Convert entire record to expected big-endian format. */
 450                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 451                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 452                         MLX5_ASSERT(dcopy);
 453                         actions[i].dst_field = dcopy->id;
 454                         actions[i].dst_offset =
 455                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 456                         /* Convert entire record to big-endian format. */
 457                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 458                 } else {
 459                         MLX5_ASSERT(item->spec);
 460                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 461                                                    field->offset, field->size);
 462                         /* Shift out the trailing masked bits from data. */
 463                         data = (data & mask) >> off_b;
 464                         actions[i].data1 = rte_cpu_to_be_32(data);
 465                 }
 466                 ++i;
 467                 ++field;
 468         } while (field->size);
 469         if (resource->actions_num == i)
 470                 return rte_flow_error_set(error, EINVAL,
 471                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                           "invalid modification flow item");
 473         resource->actions_num = i;
 474         return 0;
 475 }
 476
 477 /**
 478  * Convert modify-header set IPv4 address action to DV specification.
 479  *
 480  * @param[in,out] resource
 481  *   Pointer to the modify-header resource.
 482  * @param[in] action
 483  *   Pointer to action specification.
 484  * @param[out] error
 485  *   Pointer to the error structure.
 486  *
 487  * @return
 488  *   0 on success, a negative errno value otherwise and rte_errno is set.
 489  */
 490 static int
 491 flow_dv_convert_action_modify_ipv4
 492                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 493                          const struct rte_flow_action *action,
 494                          struct rte_flow_error *error)
 495 {
 496         const struct rte_flow_action_set_ipv4 *conf =
 497                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 498         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 499         struct rte_flow_item_ipv4 ipv4;
 500         struct rte_flow_item_ipv4 ipv4_mask;
 501
 502         memset(&ipv4, 0, sizeof(ipv4));
 503         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 504         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 505                 ipv4.hdr.src_addr = conf->ipv4_addr;
 506                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 507         } else {
 508                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 509                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 510         }
 511         item.spec = &ipv4;
 512         item.mask = &ipv4_mask;
 513         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 514                                              MLX5_MODIFICATION_TYPE_SET, error);
 515 }
 516
 517 /**
 518  * Convert modify-header set IPv6 address action to DV specification.
 519  *
 520  * @param[in,out] resource
 521  *   Pointer to the modify-header resource.
 522  * @param[in] action
 523  *   Pointer to action specification.
 524  * @param[out] error
 525  *   Pointer to the error structure.
 526  *
 527  * @return
 528  *   0 on success, a negative errno value otherwise and rte_errno is set.
 529  */
 530 static int
 531 flow_dv_convert_action_modify_ipv6
 532                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 533                          const struct rte_flow_action *action,
 534                          struct rte_flow_error *error)
 535 {
 536         const struct rte_flow_action_set_ipv6 *conf =
 537                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 538         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 539         struct rte_flow_item_ipv6 ipv6;
 540         struct rte_flow_item_ipv6 ipv6_mask;
 541
 542         memset(&ipv6, 0, sizeof(ipv6));
 543         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 544         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 545                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 546                        sizeof(ipv6.hdr.src_addr));
 547                 memcpy(&ipv6_mask.hdr.src_addr,
 548                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 549                        sizeof(ipv6.hdr.src_addr));
 550         } else {
 551                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 552                        sizeof(ipv6.hdr.dst_addr));
 553                 memcpy(&ipv6_mask.hdr.dst_addr,
 554                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 555                        sizeof(ipv6.hdr.dst_addr));
 556         }
 557         item.spec = &ipv6;
 558         item.mask = &ipv6_mask;
 559         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 560                                              MLX5_MODIFICATION_TYPE_SET, error);
 561 }
 562
 563 /**
 564  * Convert modify-header set MAC address action to DV specification.
 565  *
 566  * @param[in,out] resource
 567  *   Pointer to the modify-header resource.
 568  * @param[in] action
 569  *   Pointer to action specification.
 570  * @param[out] error
 571  *   Pointer to the error structure.
 572  *
 573  * @return
 574  *   0 on success, a negative errno value otherwise and rte_errno is set.
 575  */
 576 static int
 577 flow_dv_convert_action_modify_mac
 578                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 579                          const struct rte_flow_action *action,
 580                          struct rte_flow_error *error)
 581 {
 582         const struct rte_flow_action_set_mac *conf =
 583                 (const struct rte_flow_action_set_mac *)(action->conf);
 584         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 585         struct rte_flow_item_eth eth;
 586         struct rte_flow_item_eth eth_mask;
 587
 588         memset(&eth, 0, sizeof(eth));
 589         memset(&eth_mask, 0, sizeof(eth_mask));
 590         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 591                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 592                        sizeof(eth.src.addr_bytes));
 593                 memcpy(&eth_mask.src.addr_bytes,
 594                        &rte_flow_item_eth_mask.src.addr_bytes,
 595                        sizeof(eth_mask.src.addr_bytes));
 596         } else {
 597                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 598                        sizeof(eth.dst.addr_bytes));
 599                 memcpy(&eth_mask.dst.addr_bytes,
 600                        &rte_flow_item_eth_mask.dst.addr_bytes,
 601                        sizeof(eth_mask.dst.addr_bytes));
 602         }
 603         item.spec = &eth;
 604         item.mask = &eth_mask;
 605         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 606                                              MLX5_MODIFICATION_TYPE_SET, error);
 607 }
 608
 609 /**
 610  * Convert modify-header set VLAN VID action to DV specification.
 611  *
 612  * @param[in,out] resource
 613  *   Pointer to the modify-header resource.
 614  * @param[in] action
 615  *   Pointer to action specification.
 616  * @param[out] error
 617  *   Pointer to the error structure.
 618  *
 619  * @return
 620  *   0 on success, a negative errno value otherwise and rte_errno is set.
 621  */
 622 static int
 623 flow_dv_convert_action_modify_vlan_vid
 624                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 625                          const struct rte_flow_action *action,
 626                          struct rte_flow_error *error)
 627 {
 628         const struct rte_flow_action_of_set_vlan_vid *conf =
 629                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 630         int i = resource->actions_num;
 631         struct mlx5_modification_cmd *actions = resource->actions;
 632         struct field_modify_info *field = modify_vlan_out_first_vid;
 633
 634         if (i >= MLX5_MAX_MODIFY_NUM)
 635                 return rte_flow_error_set(error, EINVAL,
 636                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 637                          "too many items to modify");
 638         actions[i] = (struct mlx5_modification_cmd) {
 639                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 640                 .field = field->id,
 641                 .length = field->size,
 642                 .offset = field->offset,
 643         };
 644         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 645         actions[i].data1 = conf->vlan_vid;
 646         actions[i].data1 = actions[i].data1 << 16;
 647         resource->actions_num = ++i;
 648         return 0;
 649 }
 650
 651 /**
 652  * Convert modify-header set TP action to DV specification.
 653  *
 654  * @param[in,out] resource
 655  *   Pointer to the modify-header resource.
 656  * @param[in] action
 657  *   Pointer to action specification.
 658  * @param[in] items
 659  *   Pointer to rte_flow_item objects list.
 660  * @param[in] attr
 661  *   Pointer to flow attributes structure.
 662  * @param[in] dev_flow
 663  *   Pointer to the sub flow.
 664  * @param[in] tunnel_decap
 665  *   Whether action is after tunnel decapsulation.
 666  * @param[out] error
 667  *   Pointer to the error structure.
 668  *
 669  * @return
 670  *   0 on success, a negative errno value otherwise and rte_errno is set.
 671  */
 672 static int
 673 flow_dv_convert_action_modify_tp
 674                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 675                          const struct rte_flow_action *action,
 676                          const struct rte_flow_item *items,
 677                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 678                          bool tunnel_decap, struct rte_flow_error *error)
 679 {
 680         const struct rte_flow_action_set_tp *conf =
 681                 (const struct rte_flow_action_set_tp *)(action->conf);
 682         struct rte_flow_item item;
 683         struct rte_flow_item_udp udp;
 684         struct rte_flow_item_udp udp_mask;
 685         struct rte_flow_item_tcp tcp;
 686         struct rte_flow_item_tcp tcp_mask;
 687         struct field_modify_info *field;
 688
 689         if (!attr->valid)
 690                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 691         if (attr->udp) {
 692                 memset(&udp, 0, sizeof(udp));
 693                 memset(&udp_mask, 0, sizeof(udp_mask));
 694                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 695                         udp.hdr.src_port = conf->port;
 696                         udp_mask.hdr.src_port =
 697                                         rte_flow_item_udp_mask.hdr.src_port;
 698                 } else {
 699                         udp.hdr.dst_port = conf->port;
 700                         udp_mask.hdr.dst_port =
 701                                         rte_flow_item_udp_mask.hdr.dst_port;
 702                 }
 703                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 704                 item.spec = &udp;
 705                 item.mask = &udp_mask;
 706                 field = modify_udp;
 707         }
 708         if (attr->tcp) {
 709                 memset(&tcp, 0, sizeof(tcp));
 710                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 711                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 712                         tcp.hdr.src_port = conf->port;
 713                         tcp_mask.hdr.src_port =
 714                                         rte_flow_item_tcp_mask.hdr.src_port;
 715                 } else {
 716                         tcp.hdr.dst_port = conf->port;
 717                         tcp_mask.hdr.dst_port =
 718                                         rte_flow_item_tcp_mask.hdr.dst_port;
 719                 }
 720                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 721                 item.spec = &tcp;
 722                 item.mask = &tcp_mask;
 723                 field = modify_tcp;
 724         }
 725         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 726                                              MLX5_MODIFICATION_TYPE_SET, error);
 727 }
 728
 729 /**
 730  * Convert modify-header set TTL action to DV specification.
 731  *
 732  * @param[in,out] resource
 733  *   Pointer to the modify-header resource.
 734  * @param[in] action
 735  *   Pointer to action specification.
 736  * @param[in] items
 737  *   Pointer to rte_flow_item objects list.
 738  * @param[in] attr
 739  *   Pointer to flow attributes structure.
 740  * @param[in] dev_flow
 741  *   Pointer to the sub flow.
 742  * @param[in] tunnel_decap
 743  *   Whether action is after tunnel decapsulation.
 744  * @param[out] error
 745  *   Pointer to the error structure.
 746  *
 747  * @return
 748  *   0 on success, a negative errno value otherwise and rte_errno is set.
 749  */
 750 static int
 751 flow_dv_convert_action_modify_ttl
 752                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 753                          const struct rte_flow_action *action,
 754                          const struct rte_flow_item *items,
 755                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 756                          bool tunnel_decap, struct rte_flow_error *error)
 757 {
 758         const struct rte_flow_action_set_ttl *conf =
 759                 (const struct rte_flow_action_set_ttl *)(action->conf);
 760         struct rte_flow_item item;
 761         struct rte_flow_item_ipv4 ipv4;
 762         struct rte_flow_item_ipv4 ipv4_mask;
 763         struct rte_flow_item_ipv6 ipv6;
 764         struct rte_flow_item_ipv6 ipv6_mask;
 765         struct field_modify_info *field;
 766
 767         if (!attr->valid)
 768                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 769         if (attr->ipv4) {
 770                 memset(&ipv4, 0, sizeof(ipv4));
 771                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 772                 ipv4.hdr.time_to_live = conf->ttl_value;
 773                 ipv4_mask.hdr.time_to_live = 0xFF;
 774                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 775                 item.spec = &ipv4;
 776                 item.mask = &ipv4_mask;
 777                 field = modify_ipv4;
 778         }
 779         if (attr->ipv6) {
 780                 memset(&ipv6, 0, sizeof(ipv6));
 781                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 782                 ipv6.hdr.hop_limits = conf->ttl_value;
 783                 ipv6_mask.hdr.hop_limits = 0xFF;
 784                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 785                 item.spec = &ipv6;
 786                 item.mask = &ipv6_mask;
 787                 field = modify_ipv6;
 788         }
 789         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 790                                              MLX5_MODIFICATION_TYPE_SET, error);
 791 }
 792
 793 /**
 794  * Convert modify-header decrement TTL action to DV specification.
 795  *
 796  * @param[in,out] resource
 797  *   Pointer to the modify-header resource.
 798  * @param[in] action
 799  *   Pointer to action specification.
 800  * @param[in] items
 801  *   Pointer to rte_flow_item objects list.
 802  * @param[in] attr
 803  *   Pointer to flow attributes structure.
 804  * @param[in] dev_flow
 805  *   Pointer to the sub flow.
 806  * @param[in] tunnel_decap
 807  *   Whether action is after tunnel decapsulation.
 808  * @param[out] error
 809  *   Pointer to the error structure.
 810  *
 811  * @return
 812  *   0 on success, a negative errno value otherwise and rte_errno is set.
 813  */
 814 static int
 815 flow_dv_convert_action_modify_dec_ttl
 816                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 817                          const struct rte_flow_item *items,
 818                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 819                          bool tunnel_decap, struct rte_flow_error *error)
 820 {
 821         struct rte_flow_item item;
 822         struct rte_flow_item_ipv4 ipv4;
 823         struct rte_flow_item_ipv4 ipv4_mask;
 824         struct rte_flow_item_ipv6 ipv6;
 825         struct rte_flow_item_ipv6 ipv6_mask;
 826         struct field_modify_info *field;
 827
 828         if (!attr->valid)
 829                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 830         if (attr->ipv4) {
 831                 memset(&ipv4, 0, sizeof(ipv4));
 832                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 833                 ipv4.hdr.time_to_live = 0xFF;
 834                 ipv4_mask.hdr.time_to_live = 0xFF;
 835                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 836                 item.spec = &ipv4;
 837                 item.mask = &ipv4_mask;
 838                 field = modify_ipv4;
 839         }
 840         if (attr->ipv6) {
 841                 memset(&ipv6, 0, sizeof(ipv6));
 842                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 843                 ipv6.hdr.hop_limits = 0xFF;
 844                 ipv6_mask.hdr.hop_limits = 0xFF;
 845                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 846                 item.spec = &ipv6;
 847                 item.mask = &ipv6_mask;
 848                 field = modify_ipv6;
 849         }
 850         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 851                                              MLX5_MODIFICATION_TYPE_ADD, error);
 852 }
 853
 854 /**
 855  * Convert modify-header increment/decrement TCP Sequence number
 856  * to DV specification.
 857  *
 858  * @param[in,out] resource
 859  *   Pointer to the modify-header resource.
 860  * @param[in] action
 861  *   Pointer to action specification.
 862  * @param[out] error
 863  *   Pointer to the error structure.
 864  *
 865  * @return
 866  *   0 on success, a negative errno value otherwise and rte_errno is set.
 867  */
 868 static int
 869 flow_dv_convert_action_modify_tcp_seq
 870                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 871                          const struct rte_flow_action *action,
 872                          struct rte_flow_error *error)
 873 {
 874         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 875         uint64_t value = rte_be_to_cpu_32(*conf);
 876         struct rte_flow_item item;
 877         struct rte_flow_item_tcp tcp;
 878         struct rte_flow_item_tcp tcp_mask;
 879
 880         memset(&tcp, 0, sizeof(tcp));
 881         memset(&tcp_mask, 0, sizeof(tcp_mask));
 882         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 883                 /*
 884                  * The HW has no decrement operation, only increment operation.
 885                  * To simulate decrement X from Y using increment operation
 886                  * we need to add UINT32_MAX X times to Y.
 887                  * Each adding of UINT32_MAX decrements Y by 1.
 888                  */
 889                 value *= UINT32_MAX;
 890         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 891         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 892         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 893         item.spec = &tcp;
 894         item.mask = &tcp_mask;
 895         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 896                                              MLX5_MODIFICATION_TYPE_ADD, error);
 897 }
 898
 899 /**
 900  * Convert modify-header increment/decrement TCP Acknowledgment number
 901  * to DV specification.
 902  *
 903  * @param[in,out] resource
 904  *   Pointer to the modify-header resource.
 905  * @param[in] action
 906  *   Pointer to action specification.
 907  * @param[out] error
 908  *   Pointer to the error structure.
 909  *
 910  * @return
 911  *   0 on success, a negative errno value otherwise and rte_errno is set.
 912  */
 913 static int
 914 flow_dv_convert_action_modify_tcp_ack
 915                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 916                          const struct rte_flow_action *action,
 917                          struct rte_flow_error *error)
 918 {
 919         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 920         uint64_t value = rte_be_to_cpu_32(*conf);
 921         struct rte_flow_item item;
 922         struct rte_flow_item_tcp tcp;
 923         struct rte_flow_item_tcp tcp_mask;
 924
 925         memset(&tcp, 0, sizeof(tcp));
 926         memset(&tcp_mask, 0, sizeof(tcp_mask));
 927         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 928                 /*
 929                  * The HW has no decrement operation, only increment operation.
 930                  * To simulate decrement X from Y using increment operation
 931                  * we need to add UINT32_MAX X times to Y.
 932                  * Each adding of UINT32_MAX decrements Y by 1.
 933                  */
 934                 value *= UINT32_MAX;
 935         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 936         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 937         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 938         item.spec = &tcp;
 939         item.mask = &tcp_mask;
 940         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 941                                              MLX5_MODIFICATION_TYPE_ADD, error);
 942 }
 943
 944 static enum mlx5_modification_field reg_to_field[] = {
 945         [REG_NONE] = MLX5_MODI_OUT_NONE,
 946         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 947         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 948         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 949         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 950         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 951         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 952         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 953         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 954         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 955         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 956 };
 957
 958 /**
 959  * Convert register set to DV specification.
 960  *
 961  * @param[in,out] resource
 962  *   Pointer to the modify-header resource.
 963  * @param[in] action
 964  *   Pointer to action specification.
 965  * @param[out] error
 966  *   Pointer to the error structure.
 967  *
 968  * @return
 969  *   0 on success, a negative errno value otherwise and rte_errno is set.
 970  */
 971 static int
 972 flow_dv_convert_action_set_reg
 973                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 974                          const struct rte_flow_action *action,
 975                          struct rte_flow_error *error)
 976 {
 977         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 978         struct mlx5_modification_cmd *actions = resource->actions;
 979         uint32_t i = resource->actions_num;
 980
 981         if (i >= MLX5_MAX_MODIFY_NUM)
 982                 return rte_flow_error_set(error, EINVAL,
 983                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 984                                           "too many items to modify");
 985         MLX5_ASSERT(conf->id != REG_NONE);
 986         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 987         actions[i] = (struct mlx5_modification_cmd) {
 988                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 989                 .field = reg_to_field[conf->id],
 990         };
 991         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 992         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 993         ++i;
 994         resource->actions_num = i;
 995         return 0;
 996 }
 997
 998 /**
 999  * Convert SET_TAG action to DV specification.
1000  *
1001  * @param[in] dev
1002  *   Pointer to the rte_eth_dev structure.
1003  * @param[in,out] resource
1004  *   Pointer to the modify-header resource.
1005  * @param[in] conf
1006  *   Pointer to action specification.
1007  * @param[out] error
1008  *   Pointer to the error structure.
1009  *
1010  * @return
1011  *   0 on success, a negative errno value otherwise and rte_errno is set.
1012  */
1013 static int
1014 flow_dv_convert_action_set_tag
1015                         (struct rte_eth_dev *dev,
1016                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1017                          const struct rte_flow_action_set_tag *conf,
1018                          struct rte_flow_error *error)
1019 {
1020         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1021         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1022         struct rte_flow_item item = {
1023                 .spec = &data,
1024                 .mask = &mask,
1025         };
1026         struct field_modify_info reg_c_x[] = {
1027                 [1] = {0, 0, 0},
1028         };
1029         enum mlx5_modification_field reg_type;
1030         int ret;
1031
1032         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1033         if (ret < 0)
1034                 return ret;
1035         MLX5_ASSERT(ret != REG_NONE);
1036         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1037         reg_type = reg_to_field[ret];
1038         MLX5_ASSERT(reg_type > 0);
1039         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1040         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1041                                              MLX5_MODIFICATION_TYPE_SET, error);
1042 }
1043
1044 /**
1045  * Convert internal COPY_REG action to DV specification.
1046  *
1047  * @param[in] dev
1048  *   Pointer to the rte_eth_dev structure.
1049  * @param[in,out] res
1050  *   Pointer to the modify-header resource.
1051  * @param[in] action
1052  *   Pointer to action specification.
1053  * @param[out] error
1054  *   Pointer to the error structure.
1055  *
1056  * @return
1057  *   0 on success, a negative errno value otherwise and rte_errno is set.
1058  */
1059 static int
1060 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1061                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1062                                  const struct rte_flow_action *action,
1063                                  struct rte_flow_error *error)
1064 {
1065         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1066         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1067         struct rte_flow_item item = {
1068                 .spec = NULL,
1069                 .mask = &mask,
1070         };
1071         struct field_modify_info reg_src[] = {
1072                 {4, 0, reg_to_field[conf->src]},
1073                 {0, 0, 0},
1074         };
1075         struct field_modify_info reg_dst = {
1076                 .offset = 0,
1077                 .id = reg_to_field[conf->dst],
1078         };
1079         /* Adjust reg_c[0] usage according to reported mask. */
1080         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1081                 struct mlx5_priv *priv = dev->data->dev_private;
1082                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1083
1084                 MLX5_ASSERT(reg_c0);
1085                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1086                 if (conf->dst == REG_C_0) {
1087                         /* Copy to reg_c[0], within mask only. */
1088                         reg_dst.offset = rte_bsf32(reg_c0);
1089                         /*
1090                          * Mask is ignoring the enianness, because
1091                          * there is no conversion in datapath.
1092                          */
1093 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1094                         /* Copy from destination lower bits to reg_c[0]. */
1095                         mask = reg_c0 >> reg_dst.offset;
1096 #else
1097                         /* Copy from destination upper bits to reg_c[0]. */
1098                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1099                                           rte_fls_u32(reg_c0));
1100 #endif
1101                 } else {
1102                         mask = rte_cpu_to_be_32(reg_c0);
1103 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1104                         /* Copy from reg_c[0] to destination lower bits. */
1105                         reg_dst.offset = 0;
1106 #else
1107                         /* Copy from reg_c[0] to destination upper bits. */
1108                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1109                                          (rte_fls_u32(reg_c0) -
1110                                           rte_bsf32(reg_c0));
1111 #endif
1112                 }
1113         }
1114         return flow_dv_convert_modify_action(&item,
1115                                              reg_src, &reg_dst, res,
1116                                              MLX5_MODIFICATION_TYPE_COPY,
1117                                              error);
1118 }
1119
1120 /**
1121  * Convert MARK action to DV specification. This routine is used
1122  * in extensive metadata only and requires metadata register to be
1123  * handled. In legacy mode hardware tag resource is engaged.
1124  *
1125  * @param[in] dev
1126  *   Pointer to the rte_eth_dev structure.
1127  * @param[in] conf
1128  *   Pointer to MARK action specification.
1129  * @param[in,out] resource
1130  *   Pointer to the modify-header resource.
1131  * @param[out] error
1132  *   Pointer to the error structure.
1133  *
1134  * @return
1135  *   0 on success, a negative errno value otherwise and rte_errno is set.
1136  */
1137 static int
1138 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1139                             const struct rte_flow_action_mark *conf,
1140                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1141                             struct rte_flow_error *error)
1142 {
1143         struct mlx5_priv *priv = dev->data->dev_private;
1144         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1145                                            priv->sh->dv_mark_mask);
1146         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1147         struct rte_flow_item item = {
1148                 .spec = &data,
1149                 .mask = &mask,
1150         };
1151         struct field_modify_info reg_c_x[] = {
1152                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1153                 {0, 0, 0},
1154         };
1155         int reg;
1156
1157         if (!mask)
1158                 return rte_flow_error_set(error, EINVAL,
1159                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1160                                           NULL, "zero mark action mask");
1161         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1162         if (reg < 0)
1163                 return reg;
1164         MLX5_ASSERT(reg > 0);
1165         if (reg == REG_C_0) {
1166                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1167                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1168
1169                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1170                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1171                 mask = rte_cpu_to_be_32(mask << shl_c0);
1172         }
1173         reg_c_x[0].id = reg_to_field[reg];
1174         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1175                                              MLX5_MODIFICATION_TYPE_SET, error);
1176 }
1177
1178 /**
1179  * Get metadata register index for specified steering domain.
1180  *
1181  * @param[in] dev
1182  *   Pointer to the rte_eth_dev structure.
1183  * @param[in] attr
1184  *   Attributes of flow to determine steering domain.
1185  * @param[out] error
1186  *   Pointer to the error structure.
1187  *
1188  * @return
1189  *   positive index on success, a negative errno value otherwise
1190  *   and rte_errno is set.
1191  */
1192 static enum modify_reg
1193 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1194                          const struct rte_flow_attr *attr,
1195                          struct rte_flow_error *error)
1196 {
1197         int reg =
1198                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1199                                           MLX5_METADATA_FDB :
1200                                             attr->egress ?
1201                                             MLX5_METADATA_TX :
1202                                             MLX5_METADATA_RX, 0, error);
1203         if (reg < 0)
1204                 return rte_flow_error_set(error,
1205                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1206                                           NULL, "unavailable "
1207                                           "metadata register");
1208         return reg;
1209 }
1210
1211 /**
1212  * Convert SET_META action to DV specification.
1213  *
1214  * @param[in] dev
1215  *   Pointer to the rte_eth_dev structure.
1216  * @param[in,out] resource
1217  *   Pointer to the modify-header resource.
1218  * @param[in] attr
1219  *   Attributes of flow that includes this item.
1220  * @param[in] conf
1221  *   Pointer to action specification.
1222  * @param[out] error
1223  *   Pointer to the error structure.
1224  *
1225  * @return
1226  *   0 on success, a negative errno value otherwise and rte_errno is set.
1227  */
1228 static int
1229 flow_dv_convert_action_set_meta
1230                         (struct rte_eth_dev *dev,
1231                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1232                          const struct rte_flow_attr *attr,
1233                          const struct rte_flow_action_set_meta *conf,
1234                          struct rte_flow_error *error)
1235 {
1236         uint32_t data = conf->data;
1237         uint32_t mask = conf->mask;
1238         struct rte_flow_item item = {
1239                 .spec = &data,
1240                 .mask = &mask,
1241         };
1242         struct field_modify_info reg_c_x[] = {
1243                 [1] = {0, 0, 0},
1244         };
1245         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1246
1247         if (reg < 0)
1248                 return reg;
1249         /*
1250          * In datapath code there is no endianness
1251          * coversions for perfromance reasons, all
1252          * pattern conversions are done in rte_flow.
1253          */
1254         if (reg == REG_C_0) {
1255                 struct mlx5_priv *priv = dev->data->dev_private;
1256                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1257                 uint32_t shl_c0;
1258
1259                 MLX5_ASSERT(msk_c0);
1260 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1261                 shl_c0 = rte_bsf32(msk_c0);
1262 #else
1263                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1264 #endif
1265                 mask <<= shl_c0;
1266                 data <<= shl_c0;
1267                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1268         }
1269         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1270         /* The routine expects parameters in memory as big-endian ones. */
1271         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1272                                              MLX5_MODIFICATION_TYPE_SET, error);
1273 }
1274
1275 /**
1276  * Convert modify-header set IPv4 DSCP action to DV specification.
1277  *
1278  * @param[in,out] resource
1279  *   Pointer to the modify-header resource.
1280  * @param[in] action
1281  *   Pointer to action specification.
1282  * @param[out] error
1283  *   Pointer to the error structure.
1284  *
1285  * @return
1286  *   0 on success, a negative errno value otherwise and rte_errno is set.
1287  */
1288 static int
1289 flow_dv_convert_action_modify_ipv4_dscp
1290                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1291                          const struct rte_flow_action *action,
1292                          struct rte_flow_error *error)
1293 {
1294         const struct rte_flow_action_set_dscp *conf =
1295                 (const struct rte_flow_action_set_dscp *)(action->conf);
1296         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1297         struct rte_flow_item_ipv4 ipv4;
1298         struct rte_flow_item_ipv4 ipv4_mask;
1299
1300         memset(&ipv4, 0, sizeof(ipv4));
1301         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1302         ipv4.hdr.type_of_service = conf->dscp;
1303         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1304         item.spec = &ipv4;
1305         item.mask = &ipv4_mask;
1306         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1307                                              MLX5_MODIFICATION_TYPE_SET, error);
1308 }
1309
1310 /**
1311  * Convert modify-header set IPv6 DSCP action to DV specification.
1312  *
1313  * @param[in,out] resource
1314  *   Pointer to the modify-header resource.
1315  * @param[in] action
1316  *   Pointer to action specification.
1317  * @param[out] error
1318  *   Pointer to the error structure.
1319  *
1320  * @return
1321  *   0 on success, a negative errno value otherwise and rte_errno is set.
1322  */
1323 static int
1324 flow_dv_convert_action_modify_ipv6_dscp
1325                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1326                          const struct rte_flow_action *action,
1327                          struct rte_flow_error *error)
1328 {
1329         const struct rte_flow_action_set_dscp *conf =
1330                 (const struct rte_flow_action_set_dscp *)(action->conf);
1331         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1332         struct rte_flow_item_ipv6 ipv6;
1333         struct rte_flow_item_ipv6 ipv6_mask;
1334
1335         memset(&ipv6, 0, sizeof(ipv6));
1336         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1337         /*
1338          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1339          * rdma-core only accept the DSCP bits byte aligned start from
1340          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1341          * bits in IPv6 case as rdma-core requires byte aligned value.
1342          */
1343         ipv6.hdr.vtc_flow = conf->dscp;
1344         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1345         item.spec = &ipv6;
1346         item.mask = &ipv6_mask;
1347         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1348                                              MLX5_MODIFICATION_TYPE_SET, error);
1349 }
1350
1351 /**
1352  * Validate MARK item.
1353  *
1354  * @param[in] dev
1355  *   Pointer to the rte_eth_dev structure.
1356  * @param[in] item
1357  *   Item specification.
1358  * @param[in] attr
1359  *   Attributes of flow that includes this item.
1360  * @param[out] error
1361  *   Pointer to error structure.
1362  *
1363  * @return
1364  *   0 on success, a negative errno value otherwise and rte_errno is set.
1365  */
1366 static int
1367 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1368                            const struct rte_flow_item *item,
1369                            const struct rte_flow_attr *attr __rte_unused,
1370                            struct rte_flow_error *error)
1371 {
1372         struct mlx5_priv *priv = dev->data->dev_private;
1373         struct mlx5_dev_config *config = &priv->config;
1374         const struct rte_flow_item_mark *spec = item->spec;
1375         const struct rte_flow_item_mark *mask = item->mask;
1376         const struct rte_flow_item_mark nic_mask = {
1377                 .id = priv->sh->dv_mark_mask,
1378         };
1379         int ret;
1380
1381         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1382                 return rte_flow_error_set(error, ENOTSUP,
1383                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1384                                           "extended metadata feature"
1385                                           " isn't enabled");
1386         if (!mlx5_flow_ext_mreg_supported(dev))
1387                 return rte_flow_error_set(error, ENOTSUP,
1388                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1389                                           "extended metadata register"
1390                                           " isn't supported");
1391         if (!nic_mask.id)
1392                 return rte_flow_error_set(error, ENOTSUP,
1393                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1394                                           "extended metadata register"
1395                                           " isn't available");
1396         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1397         if (ret < 0)
1398                 return ret;
1399         if (!spec)
1400                 return rte_flow_error_set(error, EINVAL,
1401                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1402                                           item->spec,
1403                                           "data cannot be empty");
1404         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1405                 return rte_flow_error_set(error, EINVAL,
1406                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1407                                           &spec->id,
1408                                           "mark id exceeds the limit");
1409         if (!mask)
1410                 mask = &nic_mask;
1411         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1412                                         (const uint8_t *)&nic_mask,
1413                                         sizeof(struct rte_flow_item_mark),
1414                                         error);
1415         if (ret < 0)
1416                 return ret;
1417         return 0;
1418 }
1419
1420 /**
1421  * Validate META item.
1422  *
1423  * @param[in] dev
1424  *   Pointer to the rte_eth_dev structure.
1425  * @param[in] item
1426  *   Item specification.
1427  * @param[in] attr
1428  *   Attributes of flow that includes this item.
1429  * @param[out] error
1430  *   Pointer to error structure.
1431  *
1432  * @return
1433  *   0 on success, a negative errno value otherwise and rte_errno is set.
1434  */
1435 static int
1436 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1437                            const struct rte_flow_item *item,
1438                            const struct rte_flow_attr *attr,
1439                            struct rte_flow_error *error)
1440 {
1441         struct mlx5_priv *priv = dev->data->dev_private;
1442         struct mlx5_dev_config *config = &priv->config;
1443         const struct rte_flow_item_meta *spec = item->spec;
1444         const struct rte_flow_item_meta *mask = item->mask;
1445         struct rte_flow_item_meta nic_mask = {
1446                 .data = UINT32_MAX
1447         };
1448         int reg;
1449         int ret;
1450
1451         if (!spec)
1452                 return rte_flow_error_set(error, EINVAL,
1453                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1454                                           item->spec,
1455                                           "data cannot be empty");
1456         if (!spec->data)
1457                 return rte_flow_error_set(error, EINVAL,
1458                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1459                                           "data cannot be zero");
1460         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1461                 if (!mlx5_flow_ext_mreg_supported(dev))
1462                         return rte_flow_error_set(error, ENOTSUP,
1463                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1464                                           "extended metadata register"
1465                                           " isn't supported");
1466                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1467                 if (reg < 0)
1468                         return reg;
1469                 if (reg == REG_B)
1470                         return rte_flow_error_set(error, ENOTSUP,
1471                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1472                                           "match on reg_b "
1473                                           "isn't supported");
1474                 if (reg != REG_A)
1475                         nic_mask.data = priv->sh->dv_meta_mask;
1476         }
1477         if (!mask)
1478                 mask = &rte_flow_item_meta_mask;
1479         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1480                                         (const uint8_t *)&nic_mask,
1481                                         sizeof(struct rte_flow_item_meta),
1482                                         error);
1483         return ret;
1484 }
1485
1486 /**
1487  * Validate TAG item.
1488  *
1489  * @param[in] dev
1490  *   Pointer to the rte_eth_dev structure.
1491  * @param[in] item
1492  *   Item specification.
1493  * @param[in] attr
1494  *   Attributes of flow that includes this item.
1495  * @param[out] error
1496  *   Pointer to error structure.
1497  *
1498  * @return
1499  *   0 on success, a negative errno value otherwise and rte_errno is set.
1500  */
1501 static int
1502 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1503                           const struct rte_flow_item *item,
1504                           const struct rte_flow_attr *attr __rte_unused,
1505                           struct rte_flow_error *error)
1506 {
1507         const struct rte_flow_item_tag *spec = item->spec;
1508         const struct rte_flow_item_tag *mask = item->mask;
1509         const struct rte_flow_item_tag nic_mask = {
1510                 .data = RTE_BE32(UINT32_MAX),
1511                 .index = 0xff,
1512         };
1513         int ret;
1514
1515         if (!mlx5_flow_ext_mreg_supported(dev))
1516                 return rte_flow_error_set(error, ENOTSUP,
1517                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1518                                           "extensive metadata register"
1519                                           " isn't supported");
1520         if (!spec)
1521                 return rte_flow_error_set(error, EINVAL,
1522                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1523                                           item->spec,
1524                                           "data cannot be empty");
1525         if (!mask)
1526                 mask = &rte_flow_item_tag_mask;
1527         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1528                                         (const uint8_t *)&nic_mask,
1529                                         sizeof(struct rte_flow_item_tag),
1530                                         error);
1531         if (ret < 0)
1532                 return ret;
1533         if (mask->index != 0xff)
1534                 return rte_flow_error_set(error, EINVAL,
1535                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1536                                           "partial mask for tag index"
1537                                           " is not supported");
1538         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1539         if (ret < 0)
1540                 return ret;
1541         MLX5_ASSERT(ret != REG_NONE);
1542         return 0;
1543 }
1544
1545 /**
1546  * Validate vport item.
1547  *
1548  * @param[in] dev
1549  *   Pointer to the rte_eth_dev structure.
1550  * @param[in] item
1551  *   Item specification.
1552  * @param[in] attr
1553  *   Attributes of flow that includes this item.
1554  * @param[in] item_flags
1555  *   Bit-fields that holds the items detected until now.
1556  * @param[out] error
1557  *   Pointer to error structure.
1558  *
1559  * @return
1560  *   0 on success, a negative errno value otherwise and rte_errno is set.
1561  */
1562 static int
1563 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1564                               const struct rte_flow_item *item,
1565                               const struct rte_flow_attr *attr,
1566                               uint64_t item_flags,
1567                               struct rte_flow_error *error)
1568 {
1569         const struct rte_flow_item_port_id *spec = item->spec;
1570         const struct rte_flow_item_port_id *mask = item->mask;
1571         const struct rte_flow_item_port_id switch_mask = {
1572                         .id = 0xffffffff,
1573         };
1574         struct mlx5_priv *esw_priv;
1575         struct mlx5_priv *dev_priv;
1576         int ret;
1577
1578         if (!attr->transfer)
1579                 return rte_flow_error_set(error, EINVAL,
1580                                           RTE_FLOW_ERROR_TYPE_ITEM,
1581                                           NULL,
1582                                           "match on port id is valid only"
1583                                           " when transfer flag is enabled");
1584         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1585                 return rte_flow_error_set(error, ENOTSUP,
1586                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1587                                           "multiple source ports are not"
1588                                           " supported");
1589         if (!mask)
1590                 mask = &switch_mask;
1591         if (mask->id != 0xffffffff)
1592                 return rte_flow_error_set(error, ENOTSUP,
1593                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1594                                            mask,
1595                                            "no support for partial mask on"
1596                                            " \"id\" field");
1597         ret = mlx5_flow_item_acceptable
1598                                 (item, (const uint8_t *)mask,
1599                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1600                                  sizeof(struct rte_flow_item_port_id),
1601                                  error);
1602         if (ret)
1603                 return ret;
1604         if (!spec)
1605                 return 0;
1606         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1607         if (!esw_priv)
1608                 return rte_flow_error_set(error, rte_errno,
1609                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1610                                           "failed to obtain E-Switch info for"
1611                                           " port");
1612         dev_priv = mlx5_dev_to_eswitch_info(dev);
1613         if (!dev_priv)
1614                 return rte_flow_error_set(error, rte_errno,
1615                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1616                                           NULL,
1617                                           "failed to obtain E-Switch info");
1618         if (esw_priv->domain_id != dev_priv->domain_id)
1619                 return rte_flow_error_set(error, EINVAL,
1620                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1621                                           "cannot match on a port from a"
1622                                           " different E-Switch");
1623         return 0;
1624 }
1625
1626 /**
1627  * Validate GTP item.
1628  *
1629  * @param[in] dev
1630  *   Pointer to the rte_eth_dev structure.
1631  * @param[in] item
1632  *   Item specification.
1633  * @param[in] item_flags
1634  *   Bit-fields that holds the items detected until now.
1635  * @param[out] error
1636  *   Pointer to error structure.
1637  *
1638  * @return
1639  *   0 on success, a negative errno value otherwise and rte_errno is set.
1640  */
1641 static int
1642 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1643                           const struct rte_flow_item *item,
1644                           uint64_t item_flags,
1645                           struct rte_flow_error *error)
1646 {
1647         struct mlx5_priv *priv = dev->data->dev_private;
1648         const struct rte_flow_item_gtp *mask = item->mask;
1649         const struct rte_flow_item_gtp nic_mask = {
1650                 .msg_type = 0xff,
1651                 .teid = RTE_BE32(0xffffffff),
1652         };
1653
1654         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1655                 return rte_flow_error_set(error, ENOTSUP,
1656                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1657                                           "GTP support is not enabled");
1658         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1659                 return rte_flow_error_set(error, ENOTSUP,
1660                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1661                                           "multiple tunnel layers not"
1662                                           " supported");
1663         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1664                 return rte_flow_error_set(error, EINVAL,
1665                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1666                                           "no outer UDP layer found");
1667         if (!mask)
1668                 mask = &rte_flow_item_gtp_mask;
1669         return mlx5_flow_item_acceptable
1670                 (item, (const uint8_t *)mask,
1671                  (const uint8_t *)&nic_mask,
1672                  sizeof(struct rte_flow_item_gtp),
1673                  error);
1674 }
1675
1676 /**
1677  * Validate the pop VLAN action.
1678  *
1679  * @param[in] dev
1680  *   Pointer to the rte_eth_dev structure.
1681  * @param[in] action_flags
1682  *   Holds the actions detected until now.
1683  * @param[in] action
1684  *   Pointer to the pop vlan action.
1685  * @param[in] item_flags
1686  *   The items found in this flow rule.
1687  * @param[in] attr
1688  *   Pointer to flow attributes.
1689  * @param[out] error
1690  *   Pointer to error structure.
1691  *
1692  * @return
1693  *   0 on success, a negative errno value otherwise and rte_errno is set.
1694  */
1695 static int
1696 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1697                                  uint64_t action_flags,
1698                                  const struct rte_flow_action *action,
1699                                  uint64_t item_flags,
1700                                  const struct rte_flow_attr *attr,
1701                                  struct rte_flow_error *error)
1702 {
1703         struct mlx5_priv *priv = dev->data->dev_private;
1704
1705         (void)action;
1706         (void)attr;
1707         if (!priv->sh->pop_vlan_action)
1708                 return rte_flow_error_set(error, ENOTSUP,
1709                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1710                                           NULL,
1711                                           "pop vlan action is not supported");
1712         if (attr->egress)
1713                 return rte_flow_error_set(error, ENOTSUP,
1714                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1715                                           NULL,
1716                                           "pop vlan action not supported for "
1717                                           "egress");
1718         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1719                 return rte_flow_error_set(error, ENOTSUP,
1720                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1721                                           "no support for multiple VLAN "
1722                                           "actions");
1723         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1724                 return rte_flow_error_set(error, ENOTSUP,
1725                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1726                                           NULL,
1727                                           "cannot pop vlan without a "
1728                                           "match on (outer) vlan in the flow");
1729         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1730                 return rte_flow_error_set(error, EINVAL,
1731                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1732                                           "wrong action order, port_id should "
1733                                           "be after pop VLAN action");
1734         return 0;
1735 }
1736
1737 /**
1738  * Get VLAN default info from vlan match info.
1739  *
1740  * @param[in] items
1741  *   the list of item specifications.
1742  * @param[out] vlan
1743  *   pointer VLAN info to fill to.
1744  *
1745  * @return
1746  *   0 on success, a negative errno value otherwise and rte_errno is set.
1747  */
1748 static void
1749 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1750                                   struct rte_vlan_hdr *vlan)
1751 {
1752         const struct rte_flow_item_vlan nic_mask = {
1753                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1754                                 MLX5DV_FLOW_VLAN_VID_MASK),
1755                 .inner_type = RTE_BE16(0xffff),
1756         };
1757
1758         if (items == NULL)
1759                 return;
1760         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1761                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1762                 ;
1763         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1764                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1765                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1766
1767                 if (!vlan_m)
1768                         vlan_m = &nic_mask;
1769                 /* Only full match values are accepted */
1770                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1771                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1772                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1773                         vlan->vlan_tci |=
1774                                 rte_be_to_cpu_16(vlan_v->tci &
1775                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1776                 }
1777                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1778                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1779                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1780                         vlan->vlan_tci |=
1781                                 rte_be_to_cpu_16(vlan_v->tci &
1782                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1783                 }
1784                 if (vlan_m->inner_type == nic_mask.inner_type)
1785                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1786                                                            vlan_m->inner_type);
1787         }
1788 }
1789
1790 /**
1791  * Validate the push VLAN action.
1792  *
1793  * @param[in] action_flags
1794  *   Holds the actions detected until now.
1795  * @param[in] item_flags
1796  *   The items found in this flow rule.
1797  * @param[in] action
1798  *   Pointer to the action structure.
1799  * @param[in] attr
1800  *   Pointer to flow attributes
1801  * @param[out] error
1802  *   Pointer to error structure.
1803  *
1804  * @return
1805  *   0 on success, a negative errno value otherwise and rte_errno is set.
1806  */
1807 static int
1808 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1809                                   uint64_t item_flags __rte_unused,
1810                                   const struct rte_flow_action *action,
1811                                   const struct rte_flow_attr *attr,
1812                                   struct rte_flow_error *error)
1813 {
1814         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1815
1816         if (!attr->transfer && attr->ingress)
1817                 return rte_flow_error_set(error, ENOTSUP,
1818                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1819                                           NULL,
1820                                           "push VLAN action not supported for "
1821                                           "ingress");
1822         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1823             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1824                 return rte_flow_error_set(error, EINVAL,
1825                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1826                                           "invalid vlan ethertype");
1827         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1828                 return rte_flow_error_set(error, ENOTSUP,
1829                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1830                                           "no support for multiple VLAN "
1831                                           "actions");
1832         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1833                 return rte_flow_error_set(error, EINVAL,
1834                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1835                                           "wrong action order, port_id should "
1836                                           "be after push VLAN");
1837         (void)attr;
1838         return 0;
1839 }
1840
1841 /**
1842  * Validate the set VLAN PCP.
1843  *
1844  * @param[in] action_flags
1845  *   Holds the actions detected until now.
1846  * @param[in] actions
1847  *   Pointer to the list of actions remaining in the flow rule.
1848  * @param[out] error
1849  *   Pointer to error structure.
1850  *
1851  * @return
1852  *   0 on success, a negative errno value otherwise and rte_errno is set.
1853  */
1854 static int
1855 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1856                                      const struct rte_flow_action actions[],
1857                                      struct rte_flow_error *error)
1858 {
1859         const struct rte_flow_action *action = actions;
1860         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1861
1862         if (conf->vlan_pcp > 7)
1863                 return rte_flow_error_set(error, EINVAL,
1864                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1865                                           "VLAN PCP value is too big");
1866         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1867                 return rte_flow_error_set(error, ENOTSUP,
1868                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1869                                           "set VLAN PCP action must follow "
1870                                           "the push VLAN action");
1871         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1872                 return rte_flow_error_set(error, ENOTSUP,
1873                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1874                                           "Multiple VLAN PCP modification are "
1875                                           "not supported");
1876         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1877                 return rte_flow_error_set(error, EINVAL,
1878                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1879                                           "wrong action order, port_id should "
1880                                           "be after set VLAN PCP");
1881         return 0;
1882 }
1883
1884 /**
1885  * Validate the set VLAN VID.
1886  *
1887  * @param[in] item_flags
1888  *   Holds the items detected in this rule.
1889  * @param[in] action_flags
1890  *   Holds the actions detected until now.
1891  * @param[in] actions
1892  *   Pointer to the list of actions remaining in the flow rule.
1893  * @param[out] error
1894  *   Pointer to error structure.
1895  *
1896  * @return
1897  *   0 on success, a negative errno value otherwise and rte_errno is set.
1898  */
1899 static int
1900 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1901                                      uint64_t action_flags,
1902                                      const struct rte_flow_action actions[],
1903                                      struct rte_flow_error *error)
1904 {
1905         const struct rte_flow_action *action = actions;
1906         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1907
1908         if (conf->vlan_vid > RTE_BE16(0xFFE))
1909                 return rte_flow_error_set(error, EINVAL,
1910                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1911                                           "VLAN VID value is too big");
1912         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1913             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1914                 return rte_flow_error_set(error, ENOTSUP,
1915                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1916                                           "set VLAN VID action must follow push"
1917                                           " VLAN action or match on VLAN item");
1918         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1919                 return rte_flow_error_set(error, ENOTSUP,
1920                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1921                                           "Multiple VLAN VID modifications are "
1922                                           "not supported");
1923         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1924                 return rte_flow_error_set(error, EINVAL,
1925                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1926                                           "wrong action order, port_id should "
1927                                           "be after set VLAN VID");
1928         return 0;
1929 }
1930
1931 /*
1932  * Validate the FLAG action.
1933  *
1934  * @param[in] dev
1935  *   Pointer to the rte_eth_dev structure.
1936  * @param[in] action_flags
1937  *   Holds the actions detected until now.
1938  * @param[in] attr
1939  *   Pointer to flow attributes
1940  * @param[out] error
1941  *   Pointer to error structure.
1942  *
1943  * @return
1944  *   0 on success, a negative errno value otherwise and rte_errno is set.
1945  */
1946 static int
1947 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1948                              uint64_t action_flags,
1949                              const struct rte_flow_attr *attr,
1950                              struct rte_flow_error *error)
1951 {
1952         struct mlx5_priv *priv = dev->data->dev_private;
1953         struct mlx5_dev_config *config = &priv->config;
1954         int ret;
1955
1956         /* Fall back if no extended metadata register support. */
1957         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1958                 return mlx5_flow_validate_action_flag(action_flags, attr,
1959                                                       error);
1960         /* Extensive metadata mode requires registers. */
1961         if (!mlx5_flow_ext_mreg_supported(dev))
1962                 return rte_flow_error_set(error, ENOTSUP,
1963                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1964                                           "no metadata registers "
1965                                           "to support flag action");
1966         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1967                 return rte_flow_error_set(error, ENOTSUP,
1968                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1969                                           "extended metadata register"
1970                                           " isn't available");
1971         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1972         if (ret < 0)
1973                 return ret;
1974         MLX5_ASSERT(ret > 0);
1975         if (action_flags & MLX5_FLOW_ACTION_MARK)
1976                 return rte_flow_error_set(error, EINVAL,
1977                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1978                                           "can't mark and flag in same flow");
1979         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1980                 return rte_flow_error_set(error, EINVAL,
1981                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1982                                           "can't have 2 flag"
1983                                           " actions in same flow");
1984         return 0;
1985 }
1986
1987 /**
1988  * Validate MARK action.
1989  *
1990  * @param[in] dev
1991  *   Pointer to the rte_eth_dev structure.
1992  * @param[in] action
1993  *   Pointer to action.
1994  * @param[in] action_flags
1995  *   Holds the actions detected until now.
1996  * @param[in] attr
1997  *   Pointer to flow attributes
1998  * @param[out] error
1999  *   Pointer to error structure.
2000  *
2001  * @return
2002  *   0 on success, a negative errno value otherwise and rte_errno is set.
2003  */
2004 static int
2005 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2006                              const struct rte_flow_action *action,
2007                              uint64_t action_flags,
2008                              const struct rte_flow_attr *attr,
2009                              struct rte_flow_error *error)
2010 {
2011         struct mlx5_priv *priv = dev->data->dev_private;
2012         struct mlx5_dev_config *config = &priv->config;
2013         const struct rte_flow_action_mark *mark = action->conf;
2014         int ret;
2015
2016         /* Fall back if no extended metadata register support. */
2017         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2018                 return mlx5_flow_validate_action_mark(action, action_flags,
2019                                                       attr, error);
2020         /* Extensive metadata mode requires registers. */
2021         if (!mlx5_flow_ext_mreg_supported(dev))
2022                 return rte_flow_error_set(error, ENOTSUP,
2023                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2024                                           "no metadata registers "
2025                                           "to support mark action");
2026         if (!priv->sh->dv_mark_mask)
2027                 return rte_flow_error_set(error, ENOTSUP,
2028                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2029                                           "extended metadata register"
2030                                           " isn't available");
2031         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2032         if (ret < 0)
2033                 return ret;
2034         MLX5_ASSERT(ret > 0);
2035         if (!mark)
2036                 return rte_flow_error_set(error, EINVAL,
2037                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2038                                           "configuration cannot be null");
2039         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2042                                           &mark->id,
2043                                           "mark id exceeds the limit");
2044         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2045                 return rte_flow_error_set(error, EINVAL,
2046                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2047                                           "can't flag and mark in same flow");
2048         if (action_flags & MLX5_FLOW_ACTION_MARK)
2049                 return rte_flow_error_set(error, EINVAL,
2050                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2051                                           "can't have 2 mark actions in same"
2052                                           " flow");
2053         return 0;
2054 }
2055
2056 /**
2057  * Validate SET_META action.
2058  *
2059  * @param[in] dev
2060  *   Pointer to the rte_eth_dev structure.
2061  * @param[in] action
2062  *   Pointer to the action structure.
2063  * @param[in] action_flags
2064  *   Holds the actions detected until now.
2065  * @param[in] attr
2066  *   Pointer to flow attributes
2067  * @param[out] error
2068  *   Pointer to error structure.
2069  *
2070  * @return
2071  *   0 on success, a negative errno value otherwise and rte_errno is set.
2072  */
2073 static int
2074 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2075                                  const struct rte_flow_action *action,
2076                                  uint64_t action_flags __rte_unused,
2077                                  const struct rte_flow_attr *attr,
2078                                  struct rte_flow_error *error)
2079 {
2080         const struct rte_flow_action_set_meta *conf;
2081         uint32_t nic_mask = UINT32_MAX;
2082         int reg;
2083
2084         if (!mlx5_flow_ext_mreg_supported(dev))
2085                 return rte_flow_error_set(error, ENOTSUP,
2086                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2087                                           "extended metadata register"
2088                                           " isn't supported");
2089         reg = flow_dv_get_metadata_reg(dev, attr, error);
2090         if (reg < 0)
2091                 return reg;
2092         if (reg != REG_A && reg != REG_B) {
2093                 struct mlx5_priv *priv = dev->data->dev_private;
2094
2095                 nic_mask = priv->sh->dv_meta_mask;
2096         }
2097         if (!(action->conf))
2098                 return rte_flow_error_set(error, EINVAL,
2099                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2100                                           "configuration cannot be null");
2101         conf = (const struct rte_flow_action_set_meta *)action->conf;
2102         if (!conf->mask)
2103                 return rte_flow_error_set(error, EINVAL,
2104                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2105                                           "zero mask doesn't have any effect");
2106         if (conf->mask & ~nic_mask)
2107                 return rte_flow_error_set(error, EINVAL,
2108                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2109                                           "meta data must be within reg C0");
2110         if (!(conf->data & conf->mask))
2111                 return rte_flow_error_set(error, EINVAL,
2112                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2113                                           "zero value has no effect");
2114         return 0;
2115 }
2116
2117 /**
2118  * Validate SET_TAG action.
2119  *
2120  * @param[in] dev
2121  *   Pointer to the rte_eth_dev structure.
2122  * @param[in] action
2123  *   Pointer to the action structure.
2124  * @param[in] action_flags
2125  *   Holds the actions detected until now.
2126  * @param[in] attr
2127  *   Pointer to flow attributes
2128  * @param[out] error
2129  *   Pointer to error structure.
2130  *
2131  * @return
2132  *   0 on success, a negative errno value otherwise and rte_errno is set.
2133  */
2134 static int
2135 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2136                                 const struct rte_flow_action *action,
2137                                 uint64_t action_flags,
2138                                 const struct rte_flow_attr *attr,
2139                                 struct rte_flow_error *error)
2140 {
2141         const struct rte_flow_action_set_tag *conf;
2142         const uint64_t terminal_action_flags =
2143                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2144                 MLX5_FLOW_ACTION_RSS;
2145         int ret;
2146
2147         if (!mlx5_flow_ext_mreg_supported(dev))
2148                 return rte_flow_error_set(error, ENOTSUP,
2149                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2150                                           "extensive metadata register"
2151                                           " isn't supported");
2152         if (!(action->conf))
2153                 return rte_flow_error_set(error, EINVAL,
2154                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2155                                           "configuration cannot be null");
2156         conf = (const struct rte_flow_action_set_tag *)action->conf;
2157         if (!conf->mask)
2158                 return rte_flow_error_set(error, EINVAL,
2159                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2160                                           "zero mask doesn't have any effect");
2161         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2162         if (ret < 0)
2163                 return ret;
2164         if (!attr->transfer && attr->ingress &&
2165             (action_flags & terminal_action_flags))
2166                 return rte_flow_error_set(error, EINVAL,
2167                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2168                                           "set_tag has no effect"
2169                                           " with terminal actions");
2170         return 0;
2171 }
2172
2173 /**
2174  * Validate count action.
2175  *
2176  * @param[in] dev
2177  *   Pointer to rte_eth_dev structure.
2178  * @param[out] error
2179  *   Pointer to error structure.
2180  *
2181  * @return
2182  *   0 on success, a negative errno value otherwise and rte_errno is set.
2183  */
2184 static int
2185 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2186                               struct rte_flow_error *error)
2187 {
2188         struct mlx5_priv *priv = dev->data->dev_private;
2189
2190         if (!priv->config.devx)
2191                 goto notsup_err;
2192 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2193         return 0;
2194 #endif
2195 notsup_err:
2196         return rte_flow_error_set
2197                       (error, ENOTSUP,
2198                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2199                        NULL,
2200                        "count action not supported");
2201 }
2202
2203 /**
2204  * Validate the L2 encap action.
2205  *
2206  * @param[in] action_flags
2207  *   Holds the actions detected until now.
2208  * @param[in] action
2209  *   Pointer to the action structure.
2210  * @param[out] error
2211  *   Pointer to error structure.
2212  *
2213  * @return
2214  *   0 on success, a negative errno value otherwise and rte_errno is set.
2215  */
2216 static int
2217 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2218                                  const struct rte_flow_action *action,
2219                                  struct rte_flow_error *error)
2220 {
2221         if (!(action->conf))
2222                 return rte_flow_error_set(error, EINVAL,
2223                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2224                                           "configuration cannot be null");
2225         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2226                 return rte_flow_error_set(error, EINVAL,
2227                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2228                                           "can only have a single encap action "
2229                                           "in a flow");
2230         return 0;
2231 }
2232
2233 /**
2234  * Validate a decap action.
2235  *
2236  * @param[in] action_flags
2237  *   Holds the actions detected until now.
2238  * @param[in] attr
2239  *   Pointer to flow attributes
2240  * @param[out] error
2241  *   Pointer to error structure.
2242  *
2243  * @return
2244  *   0 on success, a negative errno value otherwise and rte_errno is set.
2245  */
2246 static int
2247 flow_dv_validate_action_decap(uint64_t action_flags,
2248                                  const struct rte_flow_attr *attr,
2249                                  struct rte_flow_error *error)
2250 {
2251         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2252                 return rte_flow_error_set(error, ENOTSUP,
2253                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2254                                           action_flags &
2255                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2256                                           "have a single decap action" : "decap "
2257                                           "after encap is not supported");
2258         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2259                 return rte_flow_error_set(error, EINVAL,
2260                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2261                                           "can't have decap action after"
2262                                           " modify action");
2263         if (attr->egress)
2264                 return rte_flow_error_set(error, ENOTSUP,
2265                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2266                                           NULL,
2267                                           "decap action not supported for "
2268                                           "egress");
2269         return 0;
2270 }
2271
2272 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2273
2274 /**
2275  * Validate the raw encap and decap actions.
2276  *
2277  * @param[in] decap
2278  *   Pointer to the decap action.
2279  * @param[in] encap
2280  *   Pointer to the encap action.
2281  * @param[in] attr
2282  *   Pointer to flow attributes
2283  * @param[in/out] action_flags
2284  *   Holds the actions detected until now.
2285  * @param[out] actions_n
2286  *   pointer to the number of actions counter.
2287  * @param[out] error
2288  *   Pointer to error structure.
2289  *
2290  * @return
2291  *   0 on success, a negative errno value otherwise and rte_errno is set.
2292  */
2293 static int
2294 flow_dv_validate_action_raw_encap_decap
2295         (const struct rte_flow_action_raw_decap *decap,
2296          const struct rte_flow_action_raw_encap *encap,
2297          const struct rte_flow_attr *attr, uint64_t *action_flags,
2298          int *actions_n, struct rte_flow_error *error)
2299 {
2300         int ret;
2301
2302         if (encap && (!encap->size || !encap->data))
2303                 return rte_flow_error_set(error, EINVAL,
2304                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2305                                           "raw encap data cannot be empty");
2306         if (decap && encap) {
2307                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2308                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2309                         /* L3 encap. */
2310                         decap = NULL;
2311                 else if (encap->size <=
2312                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2313                            decap->size >
2314                            MLX5_ENCAPSULATION_DECISION_SIZE)
2315                         /* L3 decap. */
2316                         encap = NULL;
2317                 else if (encap->size >
2318                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2319                            decap->size >
2320                            MLX5_ENCAPSULATION_DECISION_SIZE)
2321                         /* 2 L2 actions: encap and decap. */
2322                         ;
2323                 else
2324                         return rte_flow_error_set(error,
2325                                 ENOTSUP,
2326                                 RTE_FLOW_ERROR_TYPE_ACTION,
2327                                 NULL, "unsupported too small "
2328                                 "raw decap and too small raw "
2329                                 "encap combination");
2330         }
2331         if (decap) {
2332                 ret = flow_dv_validate_action_decap(*action_flags, attr, error);
2333                 if (ret < 0)
2334                         return ret;
2335                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2336                 ++(*actions_n);
2337         }
2338         if (encap) {
2339                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2340                         return rte_flow_error_set(error, ENOTSUP,
2341                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2342                                                   NULL,
2343                                                   "small raw encap size");
2344                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2345                         return rte_flow_error_set(error, EINVAL,
2346                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2347                                                   NULL,
2348                                                   "more than one encap action");
2349                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2350                 ++(*actions_n);
2351         }
2352         return 0;
2353 }
2354
2355 /**
2356  * Find existing encap/decap resource or create and register a new one.
2357  *
2358  * @param[in, out] dev
2359  *   Pointer to rte_eth_dev structure.
2360  * @param[in, out] resource
2361  *   Pointer to encap/decap resource.
2362  * @parm[in, out] dev_flow
2363  *   Pointer to the dev_flow.
2364  * @param[out] error
2365  *   pointer to error structure.
2366  *
2367  * @return
2368  *   0 on success otherwise -errno and errno is set.
2369  */
2370 static int
2371 flow_dv_encap_decap_resource_register
2372                         (struct rte_eth_dev *dev,
2373                          struct mlx5_flow_dv_encap_decap_resource *resource,
2374                          struct mlx5_flow *dev_flow,
2375                          struct rte_flow_error *error)
2376 {
2377         struct mlx5_priv *priv = dev->data->dev_private;
2378         struct mlx5_ibv_shared *sh = priv->sh;
2379         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2380         struct mlx5dv_dr_domain *domain;
2381
2382         resource->flags = dev_flow->group ? 0 : 1;
2383         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2384                 domain = sh->fdb_domain;
2385         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2386                 domain = sh->rx_domain;
2387         else
2388                 domain = sh->tx_domain;
2389         /* Lookup a matching resource from cache. */
2390         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2391                 if (resource->reformat_type == cache_resource->reformat_type &&
2392                     resource->ft_type == cache_resource->ft_type &&
2393                     resource->flags == cache_resource->flags &&
2394                     resource->size == cache_resource->size &&
2395                     !memcmp((const void *)resource->buf,
2396                             (const void *)cache_resource->buf,
2397                             resource->size)) {
2398                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2399                                 (void *)cache_resource,
2400                                 rte_atomic32_read(&cache_resource->refcnt));
2401                         rte_atomic32_inc(&cache_resource->refcnt);
2402                         dev_flow->dv.encap_decap = cache_resource;
2403                         return 0;
2404                 }
2405         }
2406         /* Register new encap/decap resource. */
2407         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2408         if (!cache_resource)
2409                 return rte_flow_error_set(error, ENOMEM,
2410                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2411                                           "cannot allocate resource memory");
2412         *cache_resource = *resource;
2413         cache_resource->verbs_action =
2414                 mlx5_glue->dv_create_flow_action_packet_reformat
2415                         (sh->ctx, cache_resource->reformat_type,
2416                          cache_resource->ft_type, domain, cache_resource->flags,
2417                          cache_resource->size,
2418                          (cache_resource->size ? cache_resource->buf : NULL));
2419         if (!cache_resource->verbs_action) {
2420                 rte_free(cache_resource);
2421                 return rte_flow_error_set(error, ENOMEM,
2422                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2423                                           NULL, "cannot create action");
2424         }
2425         rte_atomic32_init(&cache_resource->refcnt);
2426         rte_atomic32_inc(&cache_resource->refcnt);
2427         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2428         dev_flow->dv.encap_decap = cache_resource;
2429         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2430                 (void *)cache_resource,
2431                 rte_atomic32_read(&cache_resource->refcnt));
2432         return 0;
2433 }
2434
2435 /**
2436  * Find existing table jump resource or create and register a new one.
2437  *
2438  * @param[in, out] dev
2439  *   Pointer to rte_eth_dev structure.
2440  * @param[in, out] tbl
2441  *   Pointer to flow table resource.
2442  * @parm[in, out] dev_flow
2443  *   Pointer to the dev_flow.
2444  * @param[out] error
2445  *   pointer to error structure.
2446  *
2447  * @return
2448  *   0 on success otherwise -errno and errno is set.
2449  */
2450 static int
2451 flow_dv_jump_tbl_resource_register
2452                         (struct rte_eth_dev *dev __rte_unused,
2453                          struct mlx5_flow_tbl_resource *tbl,
2454                          struct mlx5_flow *dev_flow,
2455                          struct rte_flow_error *error)
2456 {
2457         struct mlx5_flow_tbl_data_entry *tbl_data =
2458                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2459         int cnt;
2460
2461         MLX5_ASSERT(tbl);
2462         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2463         if (!cnt) {
2464                 tbl_data->jump.action =
2465                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2466                         (tbl->obj);
2467                 if (!tbl_data->jump.action)
2468                         return rte_flow_error_set(error, ENOMEM,
2469                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2470                                         NULL, "cannot create jump action");
2471                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2472                         (void *)&tbl_data->jump, cnt);
2473         } else {
2474                 MLX5_ASSERT(tbl_data->jump.action);
2475                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2476                         (void *)&tbl_data->jump, cnt);
2477         }
2478         rte_atomic32_inc(&tbl_data->jump.refcnt);
2479         dev_flow->dv.jump = &tbl_data->jump;
2480         return 0;
2481 }
2482
2483 /**
2484  * Find existing table port ID resource or create and register a new one.
2485  *
2486  * @param[in, out] dev
2487  *   Pointer to rte_eth_dev structure.
2488  * @param[in, out] resource
2489  *   Pointer to port ID action resource.
2490  * @parm[in, out] dev_flow
2491  *   Pointer to the dev_flow.
2492  * @param[out] error
2493  *   pointer to error structure.
2494  *
2495  * @return
2496  *   0 on success otherwise -errno and errno is set.
2497  */
2498 static int
2499 flow_dv_port_id_action_resource_register
2500                         (struct rte_eth_dev *dev,
2501                          struct mlx5_flow_dv_port_id_action_resource *resource,
2502                          struct mlx5_flow *dev_flow,
2503                          struct rte_flow_error *error)
2504 {
2505         struct mlx5_priv *priv = dev->data->dev_private;
2506         struct mlx5_ibv_shared *sh = priv->sh;
2507         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2508
2509         /* Lookup a matching resource from cache. */
2510         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2511                 if (resource->port_id == cache_resource->port_id) {
2512                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2513                                 "refcnt %d++",
2514                                 (void *)cache_resource,
2515                                 rte_atomic32_read(&cache_resource->refcnt));
2516                         rte_atomic32_inc(&cache_resource->refcnt);
2517                         dev_flow->dv.port_id_action = cache_resource;
2518                         return 0;
2519                 }
2520         }
2521         /* Register new port id action resource. */
2522         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2523         if (!cache_resource)
2524                 return rte_flow_error_set(error, ENOMEM,
2525                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2526                                           "cannot allocate resource memory");
2527         *cache_resource = *resource;
2528         /*
2529          * Depending on rdma_core version the glue routine calls
2530          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2531          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2532          */
2533         cache_resource->action =
2534                 mlx5_glue->dr_create_flow_action_dest_port
2535                         (priv->sh->fdb_domain, resource->port_id);
2536         if (!cache_resource->action) {
2537                 rte_free(cache_resource);
2538                 return rte_flow_error_set(error, ENOMEM,
2539                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2540                                           NULL, "cannot create action");
2541         }
2542         rte_atomic32_init(&cache_resource->refcnt);
2543         rte_atomic32_inc(&cache_resource->refcnt);
2544         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2545         dev_flow->dv.port_id_action = cache_resource;
2546         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2547                 (void *)cache_resource,
2548                 rte_atomic32_read(&cache_resource->refcnt));
2549         return 0;
2550 }
2551
2552 /**
2553  * Find existing push vlan resource or create and register a new one.
2554  *
2555  * @param [in, out] dev
2556  *   Pointer to rte_eth_dev structure.
2557  * @param[in, out] resource
2558  *   Pointer to port ID action resource.
2559  * @parm[in, out] dev_flow
2560  *   Pointer to the dev_flow.
2561  * @param[out] error
2562  *   pointer to error structure.
2563  *
2564  * @return
2565  *   0 on success otherwise -errno and errno is set.
2566  */
2567 static int
2568 flow_dv_push_vlan_action_resource_register
2569                        (struct rte_eth_dev *dev,
2570                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2571                         struct mlx5_flow *dev_flow,
2572                         struct rte_flow_error *error)
2573 {
2574         struct mlx5_priv *priv = dev->data->dev_private;
2575         struct mlx5_ibv_shared *sh = priv->sh;
2576         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2577         struct mlx5dv_dr_domain *domain;
2578
2579         /* Lookup a matching resource from cache. */
2580         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2581                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2582                     resource->ft_type == cache_resource->ft_type) {
2583                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2584                                 "refcnt %d++",
2585                                 (void *)cache_resource,
2586                                 rte_atomic32_read(&cache_resource->refcnt));
2587                         rte_atomic32_inc(&cache_resource->refcnt);
2588                         dev_flow->dv.push_vlan_res = cache_resource;
2589                         return 0;
2590                 }
2591         }
2592         /* Register new push_vlan action resource. */
2593         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2594         if (!cache_resource)
2595                 return rte_flow_error_set(error, ENOMEM,
2596                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2597                                           "cannot allocate resource memory");
2598         *cache_resource = *resource;
2599         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2600                 domain = sh->fdb_domain;
2601         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2602                 domain = sh->rx_domain;
2603         else
2604                 domain = sh->tx_domain;
2605         cache_resource->action =
2606                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2607                                                            resource->vlan_tag);
2608         if (!cache_resource->action) {
2609                 rte_free(cache_resource);
2610                 return rte_flow_error_set(error, ENOMEM,
2611                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2612                                           NULL, "cannot create action");
2613         }
2614         rte_atomic32_init(&cache_resource->refcnt);
2615         rte_atomic32_inc(&cache_resource->refcnt);
2616         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2617         dev_flow->dv.push_vlan_res = cache_resource;
2618         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2619                 (void *)cache_resource,
2620                 rte_atomic32_read(&cache_resource->refcnt));
2621         return 0;
2622 }
2623 /**
2624  * Get the size of specific rte_flow_item_type
2625  *
2626  * @param[in] item_type
2627  *   Tested rte_flow_item_type.
2628  *
2629  * @return
2630  *   sizeof struct item_type, 0 if void or irrelevant.
2631  */
2632 static size_t
2633 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2634 {
2635         size_t retval;
2636
2637         switch (item_type) {
2638         case RTE_FLOW_ITEM_TYPE_ETH:
2639                 retval = sizeof(struct rte_flow_item_eth);
2640                 break;
2641         case RTE_FLOW_ITEM_TYPE_VLAN:
2642                 retval = sizeof(struct rte_flow_item_vlan);
2643                 break;
2644         case RTE_FLOW_ITEM_TYPE_IPV4:
2645                 retval = sizeof(struct rte_flow_item_ipv4);
2646                 break;
2647         case RTE_FLOW_ITEM_TYPE_IPV6:
2648                 retval = sizeof(struct rte_flow_item_ipv6);
2649                 break;
2650         case RTE_FLOW_ITEM_TYPE_UDP:
2651                 retval = sizeof(struct rte_flow_item_udp);
2652                 break;
2653         case RTE_FLOW_ITEM_TYPE_TCP:
2654                 retval = sizeof(struct rte_flow_item_tcp);
2655                 break;
2656         case RTE_FLOW_ITEM_TYPE_VXLAN:
2657                 retval = sizeof(struct rte_flow_item_vxlan);
2658                 break;
2659         case RTE_FLOW_ITEM_TYPE_GRE:
2660                 retval = sizeof(struct rte_flow_item_gre);
2661                 break;
2662         case RTE_FLOW_ITEM_TYPE_NVGRE:
2663                 retval = sizeof(struct rte_flow_item_nvgre);
2664                 break;
2665         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2666                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2667                 break;
2668         case RTE_FLOW_ITEM_TYPE_MPLS:
2669                 retval = sizeof(struct rte_flow_item_mpls);
2670                 break;
2671         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2672         default:
2673                 retval = 0;
2674                 break;
2675         }
2676         return retval;
2677 }
2678
2679 #define MLX5_ENCAP_IPV4_VERSION         0x40
2680 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2681 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2682 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2683 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2684 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2685 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2686
2687 /**
2688  * Convert the encap action data from list of rte_flow_item to raw buffer
2689  *
2690  * @param[in] items
2691  *   Pointer to rte_flow_item objects list.
2692  * @param[out] buf
2693  *   Pointer to the output buffer.
2694  * @param[out] size
2695  *   Pointer to the output buffer size.
2696  * @param[out] error
2697  *   Pointer to the error structure.
2698  *
2699  * @return
2700  *   0 on success, a negative errno value otherwise and rte_errno is set.
2701  */
2702 static int
2703 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2704                            size_t *size, struct rte_flow_error *error)
2705 {
2706         struct rte_ether_hdr *eth = NULL;
2707         struct rte_vlan_hdr *vlan = NULL;
2708         struct rte_ipv4_hdr *ipv4 = NULL;
2709         struct rte_ipv6_hdr *ipv6 = NULL;
2710         struct rte_udp_hdr *udp = NULL;
2711         struct rte_vxlan_hdr *vxlan = NULL;
2712         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2713         struct rte_gre_hdr *gre = NULL;
2714         size_t len;
2715         size_t temp_size = 0;
2716
2717         if (!items)
2718                 return rte_flow_error_set(error, EINVAL,
2719                                           RTE_FLOW_ERROR_TYPE_ACTION,
2720                                           NULL, "invalid empty data");
2721         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2722                 len = flow_dv_get_item_len(items->type);
2723                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2724                         return rte_flow_error_set(error, EINVAL,
2725                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2726                                                   (void *)items->type,
2727                                                   "items total size is too big"
2728                                                   " for encap action");
2729                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2730                 switch (items->type) {
2731                 case RTE_FLOW_ITEM_TYPE_ETH:
2732                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2733                         break;
2734                 case RTE_FLOW_ITEM_TYPE_VLAN:
2735                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2736                         if (!eth)
2737                                 return rte_flow_error_set(error, EINVAL,
2738                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2739                                                 (void *)items->type,
2740                                                 "eth header not found");
2741                         if (!eth->ether_type)
2742                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2743                         break;
2744                 case RTE_FLOW_ITEM_TYPE_IPV4:
2745                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2746                         if (!vlan && !eth)
2747                                 return rte_flow_error_set(error, EINVAL,
2748                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2749                                                 (void *)items->type,
2750                                                 "neither eth nor vlan"
2751                                                 " header found");
2752                         if (vlan && !vlan->eth_proto)
2753                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2754                         else if (eth && !eth->ether_type)
2755                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2756                         if (!ipv4->version_ihl)
2757                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2758                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2759                         if (!ipv4->time_to_live)
2760                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2761                         break;
2762                 case RTE_FLOW_ITEM_TYPE_IPV6:
2763                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2764                         if (!vlan && !eth)
2765                                 return rte_flow_error_set(error, EINVAL,
2766                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2767                                                 (void *)items->type,
2768                                                 "neither eth nor vlan"
2769                                                 " header found");
2770                         if (vlan && !vlan->eth_proto)
2771                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2772                         else if (eth && !eth->ether_type)
2773                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2774                         if (!ipv6->vtc_flow)
2775                                 ipv6->vtc_flow =
2776                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2777                         if (!ipv6->hop_limits)
2778                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2779                         break;
2780                 case RTE_FLOW_ITEM_TYPE_UDP:
2781                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2782                         if (!ipv4 && !ipv6)
2783                                 return rte_flow_error_set(error, EINVAL,
2784                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2785                                                 (void *)items->type,
2786                                                 "ip header not found");
2787                         if (ipv4 && !ipv4->next_proto_id)
2788                                 ipv4->next_proto_id = IPPROTO_UDP;
2789                         else if (ipv6 && !ipv6->proto)
2790                                 ipv6->proto = IPPROTO_UDP;
2791                         break;
2792                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2793                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2794                         if (!udp)
2795                                 return rte_flow_error_set(error, EINVAL,
2796                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2797                                                 (void *)items->type,
2798                                                 "udp header not found");
2799                         if (!udp->dst_port)
2800                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2801                         if (!vxlan->vx_flags)
2802                                 vxlan->vx_flags =
2803                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2804                         break;
2805                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2806                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2807                         if (!udp)
2808                                 return rte_flow_error_set(error, EINVAL,
2809                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2810                                                 (void *)items->type,
2811                                                 "udp header not found");
2812                         if (!vxlan_gpe->proto)
2813                                 return rte_flow_error_set(error, EINVAL,
2814                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2815                                                 (void *)items->type,
2816                                                 "next protocol not found");
2817                         if (!udp->dst_port)
2818                                 udp->dst_port =
2819                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2820                         if (!vxlan_gpe->vx_flags)
2821                                 vxlan_gpe->vx_flags =
2822                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2823                         break;
2824                 case RTE_FLOW_ITEM_TYPE_GRE:
2825                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2826                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2827                         if (!gre->proto)
2828                                 return rte_flow_error_set(error, EINVAL,
2829                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2830                                                 (void *)items->type,
2831                                                 "next protocol not found");
2832                         if (!ipv4 && !ipv6)
2833                                 return rte_flow_error_set(error, EINVAL,
2834                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2835                                                 (void *)items->type,
2836                                                 "ip header not found");
2837                         if (ipv4 && !ipv4->next_proto_id)
2838                                 ipv4->next_proto_id = IPPROTO_GRE;
2839                         else if (ipv6 && !ipv6->proto)
2840                                 ipv6->proto = IPPROTO_GRE;
2841                         break;
2842                 case RTE_FLOW_ITEM_TYPE_VOID:
2843                         break;
2844                 default:
2845                         return rte_flow_error_set(error, EINVAL,
2846                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2847                                                   (void *)items->type,
2848                                                   "unsupported item type");
2849                         break;
2850                 }
2851                 temp_size += len;
2852         }
2853         *size = temp_size;
2854         return 0;
2855 }
2856
2857 static int
2858 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2859 {
2860         struct rte_ether_hdr *eth = NULL;
2861         struct rte_vlan_hdr *vlan = NULL;
2862         struct rte_ipv6_hdr *ipv6 = NULL;
2863         struct rte_udp_hdr *udp = NULL;
2864         char *next_hdr;
2865         uint16_t proto;
2866
2867         eth = (struct rte_ether_hdr *)data;
2868         next_hdr = (char *)(eth + 1);
2869         proto = RTE_BE16(eth->ether_type);
2870
2871         /* VLAN skipping */
2872         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2873                 vlan = (struct rte_vlan_hdr *)next_hdr;
2874                 proto = RTE_BE16(vlan->eth_proto);
2875                 next_hdr += sizeof(struct rte_vlan_hdr);
2876         }
2877
2878         /* HW calculates IPv4 csum. no need to proceed */
2879         if (proto == RTE_ETHER_TYPE_IPV4)
2880                 return 0;
2881
2882         /* non IPv4/IPv6 header. not supported */
2883         if (proto != RTE_ETHER_TYPE_IPV6) {
2884                 return rte_flow_error_set(error, ENOTSUP,
2885                                           RTE_FLOW_ERROR_TYPE_ACTION,
2886                                           NULL, "Cannot offload non IPv4/IPv6");
2887         }
2888
2889         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2890
2891         /* ignore non UDP */
2892         if (ipv6->proto != IPPROTO_UDP)
2893                 return 0;
2894
2895         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2896         udp->dgram_cksum = 0;
2897
2898         return 0;
2899 }
2900
2901 /**
2902  * Convert L2 encap action to DV specification.
2903  *
2904  * @param[in] dev
2905  *   Pointer to rte_eth_dev structure.
2906  * @param[in] action
2907  *   Pointer to action structure.
2908  * @param[in, out] dev_flow
2909  *   Pointer to the mlx5_flow.
2910  * @param[in] transfer
2911  *   Mark if the flow is E-Switch flow.
2912  * @param[out] error
2913  *   Pointer to the error structure.
2914  *
2915  * @return
2916  *   0 on success, a negative errno value otherwise and rte_errno is set.
2917  */
2918 static int
2919 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2920                                const struct rte_flow_action *action,
2921                                struct mlx5_flow *dev_flow,
2922                                uint8_t transfer,
2923                                struct rte_flow_error *error)
2924 {
2925         const struct rte_flow_item *encap_data;
2926         const struct rte_flow_action_raw_encap *raw_encap_data;
2927         struct mlx5_flow_dv_encap_decap_resource res = {
2928                 .reformat_type =
2929                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2930                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2931                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2932         };
2933
2934         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2935                 raw_encap_data =
2936                         (const struct rte_flow_action_raw_encap *)action->conf;
2937                 res.size = raw_encap_data->size;
2938                 memcpy(res.buf, raw_encap_data->data, res.size);
2939         } else {
2940                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2941                         encap_data =
2942                                 ((const struct rte_flow_action_vxlan_encap *)
2943                                                 action->conf)->definition;
2944                 else
2945                         encap_data =
2946                                 ((const struct rte_flow_action_nvgre_encap *)
2947                                                 action->conf)->definition;
2948                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2949                                                &res.size, error))
2950                         return -rte_errno;
2951         }
2952         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2953                 return -rte_errno;
2954         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2955                 return rte_flow_error_set(error, EINVAL,
2956                                           RTE_FLOW_ERROR_TYPE_ACTION,
2957                                           NULL, "can't create L2 encap action");
2958         return 0;
2959 }
2960
2961 /**
2962  * Convert L2 decap action to DV specification.
2963  *
2964  * @param[in] dev
2965  *   Pointer to rte_eth_dev structure.
2966  * @param[in, out] dev_flow
2967  *   Pointer to the mlx5_flow.
2968  * @param[in] transfer
2969  *   Mark if the flow is E-Switch flow.
2970  * @param[out] error
2971  *   Pointer to the error structure.
2972  *
2973  * @return
2974  *   0 on success, a negative errno value otherwise and rte_errno is set.
2975  */
2976 static int
2977 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2978                                struct mlx5_flow *dev_flow,
2979                                uint8_t transfer,
2980                                struct rte_flow_error *error)
2981 {
2982         struct mlx5_flow_dv_encap_decap_resource res = {
2983                 .size = 0,
2984                 .reformat_type =
2985                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2986                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2987                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2988         };
2989
2990         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2991                 return rte_flow_error_set(error, EINVAL,
2992                                           RTE_FLOW_ERROR_TYPE_ACTION,
2993                                           NULL, "can't create L2 decap action");
2994         return 0;
2995 }
2996
2997 /**
2998  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2999  *
3000  * @param[in] dev
3001  *   Pointer to rte_eth_dev structure.
3002  * @param[in] action
3003  *   Pointer to action structure.
3004  * @param[in, out] dev_flow
3005  *   Pointer to the mlx5_flow.
3006  * @param[in] attr
3007  *   Pointer to the flow attributes.
3008  * @param[out] error
3009  *   Pointer to the error structure.
3010  *
3011  * @return
3012  *   0 on success, a negative errno value otherwise and rte_errno is set.
3013  */
3014 static int
3015 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3016                                 const struct rte_flow_action *action,
3017                                 struct mlx5_flow *dev_flow,
3018                                 const struct rte_flow_attr *attr,
3019                                 struct rte_flow_error *error)
3020 {
3021         const struct rte_flow_action_raw_encap *encap_data;
3022         struct mlx5_flow_dv_encap_decap_resource res;
3023
3024         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3025         res.size = encap_data->size;
3026         memcpy(res.buf, encap_data->data, res.size);
3027         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3028                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3029                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3030         if (attr->transfer)
3031                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3032         else
3033                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3034                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3035         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3036                 return rte_flow_error_set(error, EINVAL,
3037                                           RTE_FLOW_ERROR_TYPE_ACTION,
3038                                           NULL, "can't create encap action");
3039         return 0;
3040 }
3041
3042 /**
3043  * Create action push VLAN.
3044  *
3045  * @param[in] dev
3046  *   Pointer to rte_eth_dev structure.
3047  * @param[in] attr
3048  *   Pointer to the flow attributes.
3049  * @param[in] vlan
3050  *   Pointer to the vlan to push to the Ethernet header.
3051  * @param[in, out] dev_flow
3052  *   Pointer to the mlx5_flow.
3053  * @param[out] error
3054  *   Pointer to the error structure.
3055  *
3056  * @return
3057  *   0 on success, a negative errno value otherwise and rte_errno is set.
3058  */
3059 static int
3060 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3061                                 const struct rte_flow_attr *attr,
3062                                 const struct rte_vlan_hdr *vlan,
3063                                 struct mlx5_flow *dev_flow,
3064                                 struct rte_flow_error *error)
3065 {
3066         struct mlx5_flow_dv_push_vlan_action_resource res;
3067
3068         res.vlan_tag =
3069                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3070                                  vlan->vlan_tci);
3071         if (attr->transfer)
3072                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3073         else
3074                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3075                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3076         return flow_dv_push_vlan_action_resource_register
3077                                             (dev, &res, dev_flow, error);
3078 }
3079
3080 /**
3081  * Validate the modify-header actions.
3082  *
3083  * @param[in] action_flags
3084  *   Holds the actions detected until now.
3085  * @param[in] action
3086  *   Pointer to the modify action.
3087  * @param[out] error
3088  *   Pointer to error structure.
3089  *
3090  * @return
3091  *   0 on success, a negative errno value otherwise and rte_errno is set.
3092  */
3093 static int
3094 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3095                                    const struct rte_flow_action *action,
3096                                    struct rte_flow_error *error)
3097 {
3098         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3099                 return rte_flow_error_set(error, EINVAL,
3100                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3101                                           NULL, "action configuration not set");
3102         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3103                 return rte_flow_error_set(error, EINVAL,
3104                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3105                                           "can't have encap action before"
3106                                           " modify action");
3107         return 0;
3108 }
3109
3110 /**
3111  * Validate the modify-header MAC address actions.
3112  *
3113  * @param[in] action_flags
3114  *   Holds the actions detected until now.
3115  * @param[in] action
3116  *   Pointer to the modify action.
3117  * @param[in] item_flags
3118  *   Holds the items detected.
3119  * @param[out] error
3120  *   Pointer to error structure.
3121  *
3122  * @return
3123  *   0 on success, a negative errno value otherwise and rte_errno is set.
3124  */
3125 static int
3126 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3127                                    const struct rte_flow_action *action,
3128                                    const uint64_t item_flags,
3129                                    struct rte_flow_error *error)
3130 {
3131         int ret = 0;
3132
3133         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3134         if (!ret) {
3135                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3136                         return rte_flow_error_set(error, EINVAL,
3137                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3138                                                   NULL,
3139                                                   "no L2 item in pattern");
3140         }
3141         return ret;
3142 }
3143
3144 /**
3145  * Validate the modify-header IPv4 address actions.
3146  *
3147  * @param[in] action_flags
3148  *   Holds the actions detected until now.
3149  * @param[in] action
3150  *   Pointer to the modify action.
3151  * @param[in] item_flags
3152  *   Holds the items detected.
3153  * @param[out] error
3154  *   Pointer to error structure.
3155  *
3156  * @return
3157  *   0 on success, a negative errno value otherwise and rte_errno is set.
3158  */
3159 static int
3160 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3161                                     const struct rte_flow_action *action,
3162                                     const uint64_t item_flags,
3163                                     struct rte_flow_error *error)
3164 {
3165         int ret = 0;
3166         uint64_t layer;
3167
3168         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3169         if (!ret) {
3170                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3171                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3172                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3173                 if (!(item_flags & layer))
3174                         return rte_flow_error_set(error, EINVAL,
3175                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3176                                                   NULL,
3177                                                   "no ipv4 item in pattern");
3178         }
3179         return ret;
3180 }
3181
3182 /**
3183  * Validate the modify-header IPv6 address actions.
3184  *
3185  * @param[in] action_flags
3186  *   Holds the actions detected until now.
3187  * @param[in] action
3188  *   Pointer to the modify action.
3189  * @param[in] item_flags
3190  *   Holds the items detected.
3191  * @param[out] error
3192  *   Pointer to error structure.
3193  *
3194  * @return
3195  *   0 on success, a negative errno value otherwise and rte_errno is set.
3196  */
3197 static int
3198 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3199                                     const struct rte_flow_action *action,
3200                                     const uint64_t item_flags,
3201                                     struct rte_flow_error *error)
3202 {
3203         int ret = 0;
3204         uint64_t layer;
3205
3206         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3207         if (!ret) {
3208                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3209                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3210                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3211                 if (!(item_flags & layer))
3212                         return rte_flow_error_set(error, EINVAL,
3213                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3214                                                   NULL,
3215                                                   "no ipv6 item in pattern");
3216         }
3217         return ret;
3218 }
3219
3220 /**
3221  * Validate the modify-header TP actions.
3222  *
3223  * @param[in] action_flags
3224  *   Holds the actions detected until now.
3225  * @param[in] action
3226  *   Pointer to the modify action.
3227  * @param[in] item_flags
3228  *   Holds the items detected.
3229  * @param[out] error
3230  *   Pointer to error structure.
3231  *
3232  * @return
3233  *   0 on success, a negative errno value otherwise and rte_errno is set.
3234  */
3235 static int
3236 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3237                                   const struct rte_flow_action *action,
3238                                   const uint64_t item_flags,
3239                                   struct rte_flow_error *error)
3240 {
3241         int ret = 0;
3242         uint64_t layer;
3243
3244         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3245         if (!ret) {
3246                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3247                                  MLX5_FLOW_LAYER_INNER_L4 :
3248                                  MLX5_FLOW_LAYER_OUTER_L4;
3249                 if (!(item_flags & layer))
3250                         return rte_flow_error_set(error, EINVAL,
3251                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3252                                                   NULL, "no transport layer "
3253                                                   "in pattern");
3254         }
3255         return ret;
3256 }
3257
3258 /**
3259  * Validate the modify-header actions of increment/decrement
3260  * TCP Sequence-number.
3261  *
3262  * @param[in] action_flags
3263  *   Holds the actions detected until now.
3264  * @param[in] action
3265  *   Pointer to the modify action.
3266  * @param[in] item_flags
3267  *   Holds the items detected.
3268  * @param[out] error
3269  *   Pointer to error structure.
3270  *
3271  * @return
3272  *   0 on success, a negative errno value otherwise and rte_errno is set.
3273  */
3274 static int
3275 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3276                                        const struct rte_flow_action *action,
3277                                        const uint64_t item_flags,
3278                                        struct rte_flow_error *error)
3279 {
3280         int ret = 0;
3281         uint64_t layer;
3282
3283         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3284         if (!ret) {
3285                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3286                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3287                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3288                 if (!(item_flags & layer))
3289                         return rte_flow_error_set(error, EINVAL,
3290                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3291                                                   NULL, "no TCP item in"
3292                                                   " pattern");
3293                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3294                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3295                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3296                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3297                         return rte_flow_error_set(error, EINVAL,
3298                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3299                                                   NULL,
3300                                                   "cannot decrease and increase"
3301                                                   " TCP sequence number"
3302                                                   " at the same time");
3303         }
3304         return ret;
3305 }
3306
3307 /**
3308  * Validate the modify-header actions of increment/decrement
3309  * TCP Acknowledgment number.
3310  *
3311  * @param[in] action_flags
3312  *   Holds the actions detected until now.
3313  * @param[in] action
3314  *   Pointer to the modify action.
3315  * @param[in] item_flags
3316  *   Holds the items detected.
3317  * @param[out] error
3318  *   Pointer to error structure.
3319  *
3320  * @return
3321  *   0 on success, a negative errno value otherwise and rte_errno is set.
3322  */
3323 static int
3324 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3325                                        const struct rte_flow_action *action,
3326                                        const uint64_t item_flags,
3327                                        struct rte_flow_error *error)
3328 {
3329         int ret = 0;
3330         uint64_t layer;
3331
3332         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3333         if (!ret) {
3334                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3335                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3336                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3337                 if (!(item_flags & layer))
3338                         return rte_flow_error_set(error, EINVAL,
3339                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3340                                                   NULL, "no TCP item in"
3341                                                   " pattern");
3342                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3343                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3344                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3345                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3346                         return rte_flow_error_set(error, EINVAL,
3347                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3348                                                   NULL,
3349                                                   "cannot decrease and increase"
3350                                                   " TCP acknowledgment number"
3351                                                   " at the same time");
3352         }
3353         return ret;
3354 }
3355
3356 /**
3357  * Validate the modify-header TTL actions.
3358  *
3359  * @param[in] action_flags
3360  *   Holds the actions detected until now.
3361  * @param[in] action
3362  *   Pointer to the modify action.
3363  * @param[in] item_flags
3364  *   Holds the items detected.
3365  * @param[out] error
3366  *   Pointer to error structure.
3367  *
3368  * @return
3369  *   0 on success, a negative errno value otherwise and rte_errno is set.
3370  */
3371 static int
3372 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3373                                    const struct rte_flow_action *action,
3374                                    const uint64_t item_flags,
3375                                    struct rte_flow_error *error)
3376 {
3377         int ret = 0;
3378         uint64_t layer;
3379
3380         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3381         if (!ret) {
3382                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3383                                  MLX5_FLOW_LAYER_INNER_L3 :
3384                                  MLX5_FLOW_LAYER_OUTER_L3;
3385                 if (!(item_flags & layer))
3386                         return rte_flow_error_set(error, EINVAL,
3387                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3388                                                   NULL,
3389                                                   "no IP protocol in pattern");
3390         }
3391         return ret;
3392 }
3393
3394 /**
3395  * Validate jump action.
3396  *
3397  * @param[in] action
3398  *   Pointer to the jump action.
3399  * @param[in] action_flags
3400  *   Holds the actions detected until now.
3401  * @param[in] attributes
3402  *   Pointer to flow attributes
3403  * @param[in] external
3404  *   Action belongs to flow rule created by request external to PMD.
3405  * @param[out] error
3406  *   Pointer to error structure.
3407  *
3408  * @return
3409  *   0 on success, a negative errno value otherwise and rte_errno is set.
3410  */
3411 static int
3412 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3413                              uint64_t action_flags,
3414                              const struct rte_flow_attr *attributes,
3415                              bool external, struct rte_flow_error *error)
3416 {
3417         uint32_t target_group, table;
3418         int ret = 0;
3419
3420         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3421                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3422                 return rte_flow_error_set(error, EINVAL,
3423                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3424                                           "can't have 2 fate actions in"
3425                                           " same flow");
3426         if (action_flags & MLX5_FLOW_ACTION_METER)
3427                 return rte_flow_error_set(error, ENOTSUP,
3428                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3429                                           "jump with meter not support");
3430         if (!action->conf)
3431                 return rte_flow_error_set(error, EINVAL,
3432                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3433                                           NULL, "action configuration not set");
3434         target_group =
3435                 ((const struct rte_flow_action_jump *)action->conf)->group;
3436         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3437                                        true, &table, error);
3438         if (ret)
3439                 return ret;
3440         if (attributes->group == target_group)
3441                 return rte_flow_error_set(error, EINVAL,
3442                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3443                                           "target group must be other than"
3444                                           " the current flow group");
3445         return 0;
3446 }
3447
3448 /*
3449  * Validate the port_id action.
3450  *
3451  * @param[in] dev
3452  *   Pointer to rte_eth_dev structure.
3453  * @param[in] action_flags
3454  *   Bit-fields that holds the actions detected until now.
3455  * @param[in] action
3456  *   Port_id RTE action structure.
3457  * @param[in] attr
3458  *   Attributes of flow that includes this action.
3459  * @param[out] error
3460  *   Pointer to error structure.
3461  *
3462  * @return
3463  *   0 on success, a negative errno value otherwise and rte_errno is set.
3464  */
3465 static int
3466 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3467                                 uint64_t action_flags,
3468                                 const struct rte_flow_action *action,
3469                                 const struct rte_flow_attr *attr,
3470                                 struct rte_flow_error *error)
3471 {
3472         const struct rte_flow_action_port_id *port_id;
3473         struct mlx5_priv *act_priv;
3474         struct mlx5_priv *dev_priv;
3475         uint16_t port;
3476
3477         if (!attr->transfer)
3478                 return rte_flow_error_set(error, ENOTSUP,
3479                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3480                                           NULL,
3481                                           "port id action is valid in transfer"
3482                                           " mode only");
3483         if (!action || !action->conf)
3484                 return rte_flow_error_set(error, ENOTSUP,
3485                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3486                                           NULL,
3487                                           "port id action parameters must be"
3488                                           " specified");
3489         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3490                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3491                 return rte_flow_error_set(error, EINVAL,
3492                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3493                                           "can have only one fate actions in"
3494                                           " a flow");
3495         dev_priv = mlx5_dev_to_eswitch_info(dev);
3496         if (!dev_priv)
3497                 return rte_flow_error_set(error, rte_errno,
3498                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3499                                           NULL,
3500                                           "failed to obtain E-Switch info");
3501         port_id = action->conf;
3502         port = port_id->original ? dev->data->port_id : port_id->id;
3503         act_priv = mlx5_port_to_eswitch_info(port, false);
3504         if (!act_priv)
3505                 return rte_flow_error_set
3506                                 (error, rte_errno,
3507                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3508                                  "failed to obtain E-Switch port id for port");
3509         if (act_priv->domain_id != dev_priv->domain_id)
3510                 return rte_flow_error_set
3511                                 (error, EINVAL,
3512                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3513                                  "port does not belong to"
3514                                  " E-Switch being configured");
3515         return 0;
3516 }
3517
3518 /**
3519  * Get the maximum number of modify header actions.
3520  *
3521  * @param dev
3522  *   Pointer to rte_eth_dev structure.
3523  * @param flags
3524  *   Flags bits to check if root level.
3525  *
3526  * @return
3527  *   Max number of modify header actions device can support.
3528  */
3529 static unsigned int
3530 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3531 {
3532         /*
3533          * There's no way to directly query the max cap. Although it has to be
3534          * acquried by iterative trial, it is a safe assumption that more
3535          * actions are supported by FW if extensive metadata register is
3536          * supported. (Only in the root table)
3537          */
3538         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3539                 return MLX5_MAX_MODIFY_NUM;
3540         else
3541                 return mlx5_flow_ext_mreg_supported(dev) ?
3542                                         MLX5_ROOT_TBL_MODIFY_NUM :
3543                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3544 }
3545
3546 /**
3547  * Validate the meter action.
3548  *
3549  * @param[in] dev
3550  *   Pointer to rte_eth_dev structure.
3551  * @param[in] action_flags
3552  *   Bit-fields that holds the actions detected until now.
3553  * @param[in] action
3554  *   Pointer to the meter action.
3555  * @param[in] attr
3556  *   Attributes of flow that includes this action.
3557  * @param[out] error
3558  *   Pointer to error structure.
3559  *
3560  * @return
3561  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3562  */
3563 static int
3564 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3565                                 uint64_t action_flags,
3566                                 const struct rte_flow_action *action,
3567                                 const struct rte_flow_attr *attr,
3568                                 struct rte_flow_error *error)
3569 {
3570         struct mlx5_priv *priv = dev->data->dev_private;
3571         const struct rte_flow_action_meter *am = action->conf;
3572         struct mlx5_flow_meter *fm;
3573
3574         if (!am)
3575                 return rte_flow_error_set(error, EINVAL,
3576                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3577                                           "meter action conf is NULL");
3578
3579         if (action_flags & MLX5_FLOW_ACTION_METER)
3580                 return rte_flow_error_set(error, ENOTSUP,
3581                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3582                                           "meter chaining not support");
3583         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3584                 return rte_flow_error_set(error, ENOTSUP,
3585                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3586                                           "meter with jump not support");
3587         if (!priv->mtr_en)
3588                 return rte_flow_error_set(error, ENOTSUP,
3589                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3590                                           NULL,
3591                                           "meter action not supported");
3592         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3593         if (!fm)
3594                 return rte_flow_error_set(error, EINVAL,
3595                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3596                                           "Meter not found");
3597         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3598               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3599               (!fm->attr.egress && !attr->egress && attr->ingress))))
3600                 return rte_flow_error_set(error, EINVAL,
3601                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3602                                           "Flow attributes are either invalid "
3603                                           "or have a conflict with current "
3604                                           "meter attributes");
3605         return 0;
3606 }
3607
3608 /**
3609  * Validate the modify-header IPv4 DSCP actions.
3610  *
3611  * @param[in] action_flags
3612  *   Holds the actions detected until now.
3613  * @param[in] action
3614  *   Pointer to the modify action.
3615  * @param[in] item_flags
3616  *   Holds the items detected.
3617  * @param[out] error
3618  *   Pointer to error structure.
3619  *
3620  * @return
3621  *   0 on success, a negative errno value otherwise and rte_errno is set.
3622  */
3623 static int
3624 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3625                                          const struct rte_flow_action *action,
3626                                          const uint64_t item_flags,
3627                                          struct rte_flow_error *error)
3628 {
3629         int ret = 0;
3630
3631         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3632         if (!ret) {
3633                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3634                         return rte_flow_error_set(error, EINVAL,
3635                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3636                                                   NULL,
3637                                                   "no ipv4 item in pattern");
3638         }
3639         return ret;
3640 }
3641
3642 /**
3643  * Validate the modify-header IPv6 DSCP actions.
3644  *
3645  * @param[in] action_flags
3646  *   Holds the actions detected until now.
3647  * @param[in] action
3648  *   Pointer to the modify action.
3649  * @param[in] item_flags
3650  *   Holds the items detected.
3651  * @param[out] error
3652  *   Pointer to error structure.
3653  *
3654  * @return
3655  *   0 on success, a negative errno value otherwise and rte_errno is set.
3656  */
3657 static int
3658 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3659                                          const struct rte_flow_action *action,
3660                                          const uint64_t item_flags,
3661                                          struct rte_flow_error *error)
3662 {
3663         int ret = 0;
3664
3665         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3666         if (!ret) {
3667                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3668                         return rte_flow_error_set(error, EINVAL,
3669                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3670                                                   NULL,
3671                                                   "no ipv6 item in pattern");
3672         }
3673         return ret;
3674 }
3675
3676 /**
3677  * Find existing modify-header resource or create and register a new one.
3678  *
3679  * @param dev[in, out]
3680  *   Pointer to rte_eth_dev structure.
3681  * @param[in, out] resource
3682  *   Pointer to modify-header resource.
3683  * @parm[in, out] dev_flow
3684  *   Pointer to the dev_flow.
3685  * @param[out] error
3686  *   pointer to error structure.
3687  *
3688  * @return
3689  *   0 on success otherwise -errno and errno is set.
3690  */
3691 static int
3692 flow_dv_modify_hdr_resource_register
3693                         (struct rte_eth_dev *dev,
3694                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3695                          struct mlx5_flow *dev_flow,
3696                          struct rte_flow_error *error)
3697 {
3698         struct mlx5_priv *priv = dev->data->dev_private;
3699         struct mlx5_ibv_shared *sh = priv->sh;
3700         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3701         struct mlx5dv_dr_domain *ns;
3702         uint32_t actions_len;
3703
3704         resource->flags =
3705                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3706         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3707                                     resource->flags))
3708                 return rte_flow_error_set(error, EOVERFLOW,
3709                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3710                                           "too many modify header items");
3711         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3712                 ns = sh->fdb_domain;
3713         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3714                 ns = sh->tx_domain;
3715         else
3716                 ns = sh->rx_domain;
3717         /* Lookup a matching resource from cache. */
3718         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3719         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3720                 if (resource->ft_type == cache_resource->ft_type &&
3721                     resource->actions_num == cache_resource->actions_num &&
3722                     resource->flags == cache_resource->flags &&
3723                     !memcmp((const void *)resource->actions,
3724                             (const void *)cache_resource->actions,
3725                             actions_len)) {
3726                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3727                                 (void *)cache_resource,
3728                                 rte_atomic32_read(&cache_resource->refcnt));
3729                         rte_atomic32_inc(&cache_resource->refcnt);
3730                         dev_flow->dv.modify_hdr = cache_resource;
3731                         return 0;
3732                 }
3733         }
3734         /* Register new modify-header resource. */
3735         cache_resource = rte_calloc(__func__, 1,
3736                                     sizeof(*cache_resource) + actions_len, 0);
3737         if (!cache_resource)
3738                 return rte_flow_error_set(error, ENOMEM,
3739                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3740                                           "cannot allocate resource memory");
3741         *cache_resource = *resource;
3742         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3743         cache_resource->verbs_action =
3744                 mlx5_glue->dv_create_flow_action_modify_header
3745                                         (sh->ctx, cache_resource->ft_type, ns,
3746                                          cache_resource->flags, actions_len,
3747                                          (uint64_t *)cache_resource->actions);
3748         if (!cache_resource->verbs_action) {
3749                 rte_free(cache_resource);
3750                 return rte_flow_error_set(error, ENOMEM,
3751                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3752                                           NULL, "cannot create action");
3753         }
3754         rte_atomic32_init(&cache_resource->refcnt);
3755         rte_atomic32_inc(&cache_resource->refcnt);
3756         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3757         dev_flow->dv.modify_hdr = cache_resource;
3758         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3759                 (void *)cache_resource,
3760                 rte_atomic32_read(&cache_resource->refcnt));
3761         return 0;
3762 }
3763
3764 #define MLX5_CNT_CONTAINER_RESIZE 64
3765
3766 /**
3767  * Get or create a flow counter.
3768  *
3769  * @param[in] dev
3770  *   Pointer to the Ethernet device structure.
3771  * @param[in] shared
3772  *   Indicate if this counter is shared with other flows.
3773  * @param[in] id
3774  *   Counter identifier.
3775  *
3776  * @return
3777  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3778  */
3779 static struct mlx5_flow_counter *
3780 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3781                                uint32_t id)
3782 {
3783         struct mlx5_priv *priv = dev->data->dev_private;
3784         struct mlx5_flow_counter *cnt = NULL;
3785         struct mlx5_devx_obj *dcs = NULL;
3786
3787         if (!priv->config.devx) {
3788                 rte_errno = ENOTSUP;
3789                 return NULL;
3790         }
3791         if (shared) {
3792                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3793                         if (cnt->shared && cnt->id == id) {
3794                                 cnt->ref_cnt++;
3795                                 return cnt;
3796                         }
3797                 }
3798         }
3799         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3800         if (!dcs)
3801                 return NULL;
3802         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3803         if (!cnt) {
3804                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3805                 rte_errno = ENOMEM;
3806                 return NULL;
3807         }
3808         struct mlx5_flow_counter tmpl = {
3809                 .shared = shared,
3810                 .ref_cnt = 1,
3811                 .id = id,
3812                 .dcs = dcs,
3813         };
3814         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3815         if (!tmpl.action) {
3816                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3817                 rte_errno = errno;
3818                 rte_free(cnt);
3819                 return NULL;
3820         }
3821         *cnt = tmpl;
3822         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3823         return cnt;
3824 }
3825
3826 /**
3827  * Release a flow counter.
3828  *
3829  * @param[in] dev
3830  *   Pointer to the Ethernet device structure.
3831  * @param[in] counter
3832  *   Pointer to the counter handler.
3833  */
3834 static void
3835 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3836                                  struct mlx5_flow_counter *counter)
3837 {
3838         struct mlx5_priv *priv = dev->data->dev_private;
3839
3840         if (!counter)
3841                 return;
3842         if (--counter->ref_cnt == 0) {
3843                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3844                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3845                 rte_free(counter);
3846         }
3847 }
3848
3849 /**
3850  * Query a devx flow counter.
3851  *
3852  * @param[in] dev
3853  *   Pointer to the Ethernet device structure.
3854  * @param[in] cnt
3855  *   Pointer to the flow counter.
3856  * @param[out] pkts
3857  *   The statistics value of packets.
3858  * @param[out] bytes
3859  *   The statistics value of bytes.
3860  *
3861  * @return
3862  *   0 on success, otherwise a negative errno value and rte_errno is set.
3863  */
3864 static inline int
3865 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3866                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3867                      uint64_t *bytes)
3868 {
3869         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3870                                                 0, NULL, NULL, 0);
3871 }
3872
3873 /**
3874  * Get a pool by a counter.
3875  *
3876  * @param[in] cnt
3877  *   Pointer to the counter.
3878  *
3879  * @return
3880  *   The counter pool.
3881  */
3882 static struct mlx5_flow_counter_pool *
3883 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3884 {
3885         if (!cnt->batch) {
3886                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3887                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3888         }
3889         return cnt->pool;
3890 }
3891
3892 /**
3893  * Get a pool by devx counter ID.
3894  *
3895  * @param[in] cont
3896  *   Pointer to the counter container.
3897  * @param[in] id
3898  *   The counter devx ID.
3899  *
3900  * @return
3901  *   The counter pool pointer if exists, NULL otherwise,
3902  */
3903 static struct mlx5_flow_counter_pool *
3904 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3905 {
3906         struct mlx5_flow_counter_pool *pool;
3907
3908         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3909                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3910                                 MLX5_COUNTERS_PER_POOL;
3911
3912                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3913                         return pool;
3914         };
3915         return NULL;
3916 }
3917
3918 /**
3919  * Allocate a new memory for the counter values wrapped by all the needed
3920  * management.
3921  *
3922  * @param[in] dev
3923  *   Pointer to the Ethernet device structure.
3924  * @param[in] raws_n
3925  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3926  *
3927  * @return
3928  *   The new memory management pointer on success, otherwise NULL and rte_errno
3929  *   is set.
3930  */
3931 static struct mlx5_counter_stats_mem_mng *
3932 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3933 {
3934         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3935                                         (dev->data->dev_private))->sh;
3936         struct mlx5_devx_mkey_attr mkey_attr;
3937         struct mlx5_counter_stats_mem_mng *mem_mng;
3938         volatile struct flow_counter_stats *raw_data;
3939         int size = (sizeof(struct flow_counter_stats) *
3940                         MLX5_COUNTERS_PER_POOL +
3941                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3942                         sizeof(struct mlx5_counter_stats_mem_mng);
3943         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3944         int i;
3945
3946         if (!mem) {
3947                 rte_errno = ENOMEM;
3948                 return NULL;
3949         }
3950         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3951         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3952         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3953                                                  IBV_ACCESS_LOCAL_WRITE);
3954         if (!mem_mng->umem) {
3955                 rte_errno = errno;
3956                 rte_free(mem);
3957                 return NULL;
3958         }
3959         mkey_attr.addr = (uintptr_t)mem;
3960         mkey_attr.size = size;
3961         mkey_attr.umem_id = mem_mng->umem->umem_id;
3962         mkey_attr.pd = sh->pdn;
3963         mkey_attr.log_entity_size = 0;
3964         mkey_attr.pg_access = 0;
3965         mkey_attr.klm_array = NULL;
3966         mkey_attr.klm_num = 0;
3967         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3968         if (!mem_mng->dm) {
3969                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3970                 rte_errno = errno;
3971                 rte_free(mem);
3972                 return NULL;
3973         }
3974         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3975         raw_data = (volatile struct flow_counter_stats *)mem;
3976         for (i = 0; i < raws_n; ++i) {
3977                 mem_mng->raws[i].mem_mng = mem_mng;
3978                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3979         }
3980         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3981         return mem_mng;
3982 }
3983
3984 /**
3985  * Resize a counter container.
3986  *
3987  * @param[in] dev
3988  *   Pointer to the Ethernet device structure.
3989  * @param[in] batch
3990  *   Whether the pool is for counter that was allocated by batch command.
3991  *
3992  * @return
3993  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3994  */
3995 static struct mlx5_pools_container *
3996 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3997 {
3998         struct mlx5_priv *priv = dev->data->dev_private;
3999         struct mlx5_pools_container *cont =
4000                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
4001         struct mlx5_pools_container *new_cont =
4002                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
4003         struct mlx5_counter_stats_mem_mng *mem_mng;
4004         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
4005         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4006         int i;
4007
4008         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
4009                 /* The last resize still hasn't detected by the host thread. */
4010                 rte_errno = EAGAIN;
4011                 return NULL;
4012         }
4013         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
4014         if (!new_cont->pools) {
4015                 rte_errno = ENOMEM;
4016                 return NULL;
4017         }
4018         if (cont->n)
4019                 memcpy(new_cont->pools, cont->pools, cont->n *
4020                        sizeof(struct mlx5_flow_counter_pool *));
4021         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
4022                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
4023         if (!mem_mng) {
4024                 rte_free(new_cont->pools);
4025                 return NULL;
4026         }
4027         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
4028                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
4029                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
4030                                  i, next);
4031         new_cont->n = resize;
4032         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
4033         TAILQ_INIT(&new_cont->pool_list);
4034         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
4035         new_cont->init_mem_mng = mem_mng;
4036         rte_cio_wmb();
4037          /* Flip the master container. */
4038         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
4039         return new_cont;
4040 }
4041
4042 /**
4043  * Query a devx flow counter.
4044  *
4045  * @param[in] dev
4046  *   Pointer to the Ethernet device structure.
4047  * @param[in] cnt
4048  *   Pointer to the flow counter.
4049  * @param[out] pkts
4050  *   The statistics value of packets.
4051  * @param[out] bytes
4052  *   The statistics value of bytes.
4053  *
4054  * @return
4055  *   0 on success, otherwise a negative errno value and rte_errno is set.
4056  */
4057 static inline int
4058 _flow_dv_query_count(struct rte_eth_dev *dev,
4059                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4060                      uint64_t *bytes)
4061 {
4062         struct mlx5_priv *priv = dev->data->dev_private;
4063         struct mlx5_flow_counter_pool *pool =
4064                         flow_dv_counter_pool_get(cnt);
4065         int offset = cnt - &pool->counters_raw[0];
4066
4067         if (priv->counter_fallback)
4068                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4069
4070         rte_spinlock_lock(&pool->sl);
4071         /*
4072          * The single counters allocation may allocate smaller ID than the
4073          * current allocated in parallel to the host reading.
4074          * In this case the new counter values must be reported as 0.
4075          */
4076         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4077                 *pkts = 0;
4078                 *bytes = 0;
4079         } else {
4080                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4081                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4082         }
4083         rte_spinlock_unlock(&pool->sl);
4084         return 0;
4085 }
4086
4087 /**
4088  * Create and initialize a new counter pool.
4089  *
4090  * @param[in] dev
4091  *   Pointer to the Ethernet device structure.
4092  * @param[out] dcs
4093  *   The devX counter handle.
4094  * @param[in] batch
4095  *   Whether the pool is for counter that was allocated by batch command.
4096  *
4097  * @return
4098  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4099  */
4100 static struct mlx5_flow_counter_pool *
4101 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4102                     uint32_t batch)
4103 {
4104         struct mlx5_priv *priv = dev->data->dev_private;
4105         struct mlx5_flow_counter_pool *pool;
4106         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4107                                                                0);
4108         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4109         uint32_t size;
4110
4111         if (cont->n == n_valid) {
4112                 cont = flow_dv_container_resize(dev, batch);
4113                 if (!cont)
4114                         return NULL;
4115         }
4116         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4117                         sizeof(struct mlx5_flow_counter);
4118         pool = rte_calloc(__func__, 1, size, 0);
4119         if (!pool) {
4120                 rte_errno = ENOMEM;
4121                 return NULL;
4122         }
4123         pool->min_dcs = dcs;
4124         pool->raw = cont->init_mem_mng->raws + n_valid %
4125                                                      MLX5_CNT_CONTAINER_RESIZE;
4126         pool->raw_hw = NULL;
4127         rte_spinlock_init(&pool->sl);
4128         /*
4129          * The generation of the new allocated counters in this pool is 0, 2 in
4130          * the pool generation makes all the counters valid for allocation.
4131          */
4132         rte_atomic64_set(&pool->query_gen, 0x2);
4133         TAILQ_INIT(&pool->counters);
4134         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4135         cont->pools[n_valid] = pool;
4136         /* Pool initialization must be updated before host thread access. */
4137         rte_cio_wmb();
4138         rte_atomic16_add(&cont->n_valid, 1);
4139         return pool;
4140 }
4141
4142 /**
4143  * Prepare a new counter and/or a new counter pool.
4144  *
4145  * @param[in] dev
4146  *   Pointer to the Ethernet device structure.
4147  * @param[out] cnt_free
4148  *   Where to put the pointer of a new counter.
4149  * @param[in] batch
4150  *   Whether the pool is for counter that was allocated by batch command.
4151  *
4152  * @return
4153  *   The free counter pool pointer and @p cnt_free is set on success,
4154  *   NULL otherwise and rte_errno is set.
4155  */
4156 static struct mlx5_flow_counter_pool *
4157 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4158                              struct mlx5_flow_counter **cnt_free,
4159                              uint32_t batch)
4160 {
4161         struct mlx5_priv *priv = dev->data->dev_private;
4162         struct mlx5_flow_counter_pool *pool;
4163         struct mlx5_devx_obj *dcs = NULL;
4164         struct mlx5_flow_counter *cnt;
4165         uint32_t i;
4166
4167         if (!batch) {
4168                 /* bulk_bitmap must be 0 for single counter allocation. */
4169                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4170                 if (!dcs)
4171                         return NULL;
4172                 pool = flow_dv_find_pool_by_id
4173                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4174                 if (!pool) {
4175                         pool = flow_dv_pool_create(dev, dcs, batch);
4176                         if (!pool) {
4177                                 mlx5_devx_cmd_destroy(dcs);
4178                                 return NULL;
4179                         }
4180                 } else if (dcs->id < pool->min_dcs->id) {
4181                         rte_atomic64_set(&pool->a64_dcs,
4182                                          (int64_t)(uintptr_t)dcs);
4183                 }
4184                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4185                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4186                 cnt->dcs = dcs;
4187                 *cnt_free = cnt;
4188                 return pool;
4189         }
4190         /* bulk_bitmap is in 128 counters units. */
4191         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4192                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4193         if (!dcs) {
4194                 rte_errno = ENODATA;
4195                 return NULL;
4196         }
4197         pool = flow_dv_pool_create(dev, dcs, batch);
4198         if (!pool) {
4199                 mlx5_devx_cmd_destroy(dcs);
4200                 return NULL;
4201         }
4202         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4203                 cnt = &pool->counters_raw[i];
4204                 cnt->pool = pool;
4205                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4206         }
4207         *cnt_free = &pool->counters_raw[0];
4208         return pool;
4209 }
4210
4211 /**
4212  * Search for existed shared counter.
4213  *
4214  * @param[in] cont
4215  *   Pointer to the relevant counter pool container.
4216  * @param[in] id
4217  *   The shared counter ID to search.
4218  *
4219  * @return
4220  *   NULL if not existed, otherwise pointer to the shared counter.
4221  */
4222 static struct mlx5_flow_counter *
4223 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4224                               uint32_t id)
4225 {
4226         static struct mlx5_flow_counter *cnt;
4227         struct mlx5_flow_counter_pool *pool;
4228         int i;
4229
4230         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4231                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4232                         cnt = &pool->counters_raw[i];
4233                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4234                                 return cnt;
4235                 }
4236         }
4237         return NULL;
4238 }
4239
4240 /**
4241  * Allocate a flow counter.
4242  *
4243  * @param[in] dev
4244  *   Pointer to the Ethernet device structure.
4245  * @param[in] shared
4246  *   Indicate if this counter is shared with other flows.
4247  * @param[in] id
4248  *   Counter identifier.
4249  * @param[in] group
4250  *   Counter flow group.
4251  *
4252  * @return
4253  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4254  */
4255 static struct mlx5_flow_counter *
4256 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4257                       uint16_t group)
4258 {
4259         struct mlx5_priv *priv = dev->data->dev_private;
4260         struct mlx5_flow_counter_pool *pool = NULL;
4261         struct mlx5_flow_counter *cnt_free = NULL;
4262         /*
4263          * Currently group 0 flow counter cannot be assigned to a flow if it is
4264          * not the first one in the batch counter allocation, so it is better
4265          * to allocate counters one by one for these flows in a separate
4266          * container.
4267          * A counter can be shared between different groups so need to take
4268          * shared counters from the single container.
4269          */
4270         uint32_t batch = (group && !shared) ? 1 : 0;
4271         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4272                                                                0);
4273
4274         if (priv->counter_fallback)
4275                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4276         if (!priv->config.devx) {
4277                 rte_errno = ENOTSUP;
4278                 return NULL;
4279         }
4280         if (shared) {
4281                 cnt_free = flow_dv_counter_shared_search(cont, id);
4282                 if (cnt_free) {
4283                         if (cnt_free->ref_cnt + 1 == 0) {
4284                                 rte_errno = E2BIG;
4285                                 return NULL;
4286                         }
4287                         cnt_free->ref_cnt++;
4288                         return cnt_free;
4289                 }
4290         }
4291         /* Pools which has a free counters are in the start. */
4292         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4293                 /*
4294                  * The free counter reset values must be updated between the
4295                  * counter release to the counter allocation, so, at least one
4296                  * query must be done in this time. ensure it by saving the
4297                  * query generation in the release time.
4298                  * The free list is sorted according to the generation - so if
4299                  * the first one is not updated, all the others are not
4300                  * updated too.
4301                  */
4302                 cnt_free = TAILQ_FIRST(&pool->counters);
4303                 if (cnt_free && cnt_free->query_gen + 1 <
4304                     rte_atomic64_read(&pool->query_gen))
4305                         break;
4306                 cnt_free = NULL;
4307         }
4308         if (!cnt_free) {
4309                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4310                 if (!pool)
4311                         return NULL;
4312         }
4313         cnt_free->batch = batch;
4314         /* Create a DV counter action only in the first time usage. */
4315         if (!cnt_free->action) {
4316                 uint16_t offset;
4317                 struct mlx5_devx_obj *dcs;
4318
4319                 if (batch) {
4320                         offset = cnt_free - &pool->counters_raw[0];
4321                         dcs = pool->min_dcs;
4322                 } else {
4323                         offset = 0;
4324                         dcs = cnt_free->dcs;
4325                 }
4326                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4327                                         (dcs->obj, offset);
4328                 if (!cnt_free->action) {
4329                         rte_errno = errno;
4330                         return NULL;
4331                 }
4332         }
4333         /* Update the counter reset values. */
4334         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4335                                  &cnt_free->bytes))
4336                 return NULL;
4337         cnt_free->shared = shared;
4338         cnt_free->ref_cnt = 1;
4339         cnt_free->id = id;
4340         if (!priv->sh->cmng.query_thread_on)
4341                 /* Start the asynchronous batch query by the host thread. */
4342                 mlx5_set_query_alarm(priv->sh);
4343         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4344         if (TAILQ_EMPTY(&pool->counters)) {
4345                 /* Move the pool to the end of the container pool list. */
4346                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4347                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4348         }
4349         return cnt_free;
4350 }
4351
4352 /**
4353  * Release a flow counter.
4354  *
4355  * @param[in] dev
4356  *   Pointer to the Ethernet device structure.
4357  * @param[in] counter
4358  *   Pointer to the counter handler.
4359  */
4360 static void
4361 flow_dv_counter_release(struct rte_eth_dev *dev,
4362                         struct mlx5_flow_counter *counter)
4363 {
4364         struct mlx5_priv *priv = dev->data->dev_private;
4365
4366         if (!counter)
4367                 return;
4368         if (priv->counter_fallback) {
4369                 flow_dv_counter_release_fallback(dev, counter);
4370                 return;
4371         }
4372         if (--counter->ref_cnt == 0) {
4373                 struct mlx5_flow_counter_pool *pool =
4374                                 flow_dv_counter_pool_get(counter);
4375
4376                 /* Put the counter in the end - the last updated one. */
4377                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4378                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4379         }
4380 }
4381
4382 /**
4383  * Verify the @p attributes will be correctly understood by the NIC and store
4384  * them in the @p flow if everything is correct.
4385  *
4386  * @param[in] dev
4387  *   Pointer to dev struct.
4388  * @param[in] attributes
4389  *   Pointer to flow attributes
4390  * @param[in] external
4391  *   This flow rule is created by request external to PMD.
4392  * @param[out] error
4393  *   Pointer to error structure.
4394  *
4395  * @return
4396  *   0 on success, a negative errno value otherwise and rte_errno is set.
4397  */
4398 static int
4399 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4400                             const struct rte_flow_attr *attributes,
4401                             bool external __rte_unused,
4402                             struct rte_flow_error *error)
4403 {
4404         struct mlx5_priv *priv = dev->data->dev_private;
4405         uint32_t priority_max = priv->config.flow_prio - 1;
4406
4407 #ifndef HAVE_MLX5DV_DR
4408         if (attributes->group)
4409                 return rte_flow_error_set(error, ENOTSUP,
4410                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4411                                           NULL,
4412                                           "groups are not supported");
4413 #else
4414         uint32_t table;
4415         int ret;
4416
4417         ret = mlx5_flow_group_to_table(attributes, external,
4418                                        attributes->group, !!priv->fdb_def_rule,
4419                                        &table, error);
4420         if (ret)
4421                 return ret;
4422 #endif
4423         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4424             attributes->priority >= priority_max)
4425                 return rte_flow_error_set(error, ENOTSUP,
4426                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4427                                           NULL,
4428                                           "priority out of range");
4429         if (attributes->transfer) {
4430                 if (!priv->config.dv_esw_en)
4431                         return rte_flow_error_set
4432                                 (error, ENOTSUP,
4433                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4434                                  "E-Switch dr is not supported");
4435                 if (!(priv->representor || priv->master))
4436                         return rte_flow_error_set
4437                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4438                                  NULL, "E-Switch configuration can only be"
4439                                  " done by a master or a representor device");
4440                 if (attributes->egress)
4441                         return rte_flow_error_set
4442                                 (error, ENOTSUP,
4443                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4444                                  "egress is not supported");
4445         }
4446         if (!(attributes->egress ^ attributes->ingress))
4447                 return rte_flow_error_set(error, ENOTSUP,
4448                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4449                                           "must specify exactly one of "
4450                                           "ingress or egress");
4451         return 0;
4452 }
4453
4454 /**
4455  * Internal validation function. For validating both actions and items.
4456  *
4457  * @param[in] dev
4458  *   Pointer to the rte_eth_dev structure.
4459  * @param[in] attr
4460  *   Pointer to the flow attributes.
4461  * @param[in] items
4462  *   Pointer to the list of items.
4463  * @param[in] actions
4464  *   Pointer to the list of actions.
4465  * @param[in] external
4466  *   This flow rule is created by request external to PMD.
4467  * @param[out] error
4468  *   Pointer to the error structure.
4469  *
4470  * @return
4471  *   0 on success, a negative errno value otherwise and rte_errno is set.
4472  */
4473 static int
4474 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4475                  const struct rte_flow_item items[],
4476                  const struct rte_flow_action actions[],
4477                  bool external, struct rte_flow_error *error)
4478 {
4479         int ret;
4480         uint64_t action_flags = 0;
4481         uint64_t item_flags = 0;
4482         uint64_t last_item = 0;
4483         uint8_t next_protocol = 0xff;
4484         uint16_t ether_type = 0;
4485         int actions_n = 0;
4486         uint8_t item_ipv6_proto = 0;
4487         const struct rte_flow_item *gre_item = NULL;
4488         const struct rte_flow_action_raw_decap *decap;
4489         const struct rte_flow_action_raw_encap *encap;
4490         const struct rte_flow_action_rss *rss;
4491         struct rte_flow_item_tcp nic_tcp_mask = {
4492                 .hdr = {
4493                         .tcp_flags = 0xFF,
4494                         .src_port = RTE_BE16(UINT16_MAX),
4495                         .dst_port = RTE_BE16(UINT16_MAX),
4496                 }
4497         };
4498         struct mlx5_priv *priv = dev->data->dev_private;
4499         struct mlx5_dev_config *dev_conf = &priv->config;
4500         uint16_t queue_index = 0xFFFF;
4501
4502         if (items == NULL)
4503                 return -1;
4504         ret = flow_dv_validate_attributes(dev, attr, external, error);
4505         if (ret < 0)
4506                 return ret;
4507         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4508                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4509                 int type = items->type;
4510
4511                 switch (type) {
4512                 case RTE_FLOW_ITEM_TYPE_VOID:
4513                         break;
4514                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4515                         ret = flow_dv_validate_item_port_id
4516                                         (dev, items, attr, item_flags, error);
4517                         if (ret < 0)
4518                                 return ret;
4519                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4520                         break;
4521                 case RTE_FLOW_ITEM_TYPE_ETH:
4522                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4523                                                           error);
4524                         if (ret < 0)
4525                                 return ret;
4526                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4527                                              MLX5_FLOW_LAYER_OUTER_L2;
4528                         if (items->mask != NULL && items->spec != NULL) {
4529                                 ether_type =
4530                                         ((const struct rte_flow_item_eth *)
4531                                          items->spec)->type;
4532                                 ether_type &=
4533                                         ((const struct rte_flow_item_eth *)
4534                                          items->mask)->type;
4535                                 ether_type = rte_be_to_cpu_16(ether_type);
4536                         } else {
4537                                 ether_type = 0;
4538                         }
4539                         break;
4540                 case RTE_FLOW_ITEM_TYPE_VLAN:
4541                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4542                                                            dev, error);
4543                         if (ret < 0)
4544                                 return ret;
4545                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4546                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4547                         if (items->mask != NULL && items->spec != NULL) {
4548                                 ether_type =
4549                                         ((const struct rte_flow_item_vlan *)
4550                                          items->spec)->inner_type;
4551                                 ether_type &=
4552                                         ((const struct rte_flow_item_vlan *)
4553                                          items->mask)->inner_type;
4554                                 ether_type = rte_be_to_cpu_16(ether_type);
4555                         } else {
4556                                 ether_type = 0;
4557                         }
4558                         break;
4559                 case RTE_FLOW_ITEM_TYPE_IPV4:
4560                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4561                                                   &item_flags, &tunnel);
4562                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4563                                                            last_item,
4564                                                            ether_type, NULL,
4565                                                            error);
4566                         if (ret < 0)
4567                                 return ret;
4568                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4569                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4570                         if (items->mask != NULL &&
4571                             ((const struct rte_flow_item_ipv4 *)
4572                              items->mask)->hdr.next_proto_id) {
4573                                 next_protocol =
4574                                         ((const struct rte_flow_item_ipv4 *)
4575                                          (items->spec))->hdr.next_proto_id;
4576                                 next_protocol &=
4577                                         ((const struct rte_flow_item_ipv4 *)
4578                                          (items->mask))->hdr.next_proto_id;
4579                         } else {
4580                                 /* Reset for inner layer. */
4581                                 next_protocol = 0xff;
4582                         }
4583                         break;
4584                 case RTE_FLOW_ITEM_TYPE_IPV6:
4585                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4586                                                   &item_flags, &tunnel);
4587                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4588                                                            last_item,
4589                                                            ether_type, NULL,
4590                                                            error);
4591                         if (ret < 0)
4592                                 return ret;
4593                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4594                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4595                         if (items->mask != NULL &&
4596                             ((const struct rte_flow_item_ipv6 *)
4597                              items->mask)->hdr.proto) {
4598                                 item_ipv6_proto =
4599                                         ((const struct rte_flow_item_ipv6 *)
4600                                          items->spec)->hdr.proto;
4601                                 next_protocol =
4602                                         ((const struct rte_flow_item_ipv6 *)
4603                                          items->spec)->hdr.proto;
4604                                 next_protocol &=
4605                                         ((const struct rte_flow_item_ipv6 *)
4606                                          items->mask)->hdr.proto;
4607                         } else {
4608                                 /* Reset for inner layer. */
4609                                 next_protocol = 0xff;
4610                         }
4611                         break;
4612                 case RTE_FLOW_ITEM_TYPE_TCP:
4613                         ret = mlx5_flow_validate_item_tcp
4614                                                 (items, item_flags,
4615                                                  next_protocol,
4616                                                  &nic_tcp_mask,
4617                                                  error);
4618                         if (ret < 0)
4619                                 return ret;
4620                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4621                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4622                         break;
4623                 case RTE_FLOW_ITEM_TYPE_UDP:
4624                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4625                                                           next_protocol,
4626                                                           error);
4627                         if (ret < 0)
4628                                 return ret;
4629                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4630                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4631                         break;
4632                 case RTE_FLOW_ITEM_TYPE_GRE:
4633                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4634                                                           next_protocol, error);
4635                         if (ret < 0)
4636                                 return ret;
4637                         gre_item = items;
4638                         last_item = MLX5_FLOW_LAYER_GRE;
4639                         break;
4640                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4641                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4642                                                             next_protocol,
4643                                                             error);
4644                         if (ret < 0)
4645                                 return ret;
4646                         last_item = MLX5_FLOW_LAYER_NVGRE;
4647                         break;
4648                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4649                         ret = mlx5_flow_validate_item_gre_key
4650                                 (items, item_flags, gre_item, error);
4651                         if (ret < 0)
4652                                 return ret;
4653                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4654                         break;
4655                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4656                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4657                                                             error);
4658                         if (ret < 0)
4659                                 return ret;
4660                         last_item = MLX5_FLOW_LAYER_VXLAN;
4661                         break;
4662                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4663                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4664                                                                 item_flags, dev,
4665                                                                 error);
4666                         if (ret < 0)
4667                                 return ret;
4668                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4669                         break;
4670                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4671                         ret = mlx5_flow_validate_item_geneve(items,
4672                                                              item_flags, dev,
4673                                                              error);
4674                         if (ret < 0)
4675                                 return ret;
4676                         last_item = MLX5_FLOW_LAYER_GENEVE;
4677                         break;
4678                 case RTE_FLOW_ITEM_TYPE_MPLS:
4679                         ret = mlx5_flow_validate_item_mpls(dev, items,
4680                                                            item_flags,
4681                                                            last_item, error);
4682                         if (ret < 0)
4683                                 return ret;
4684                         last_item = MLX5_FLOW_LAYER_MPLS;
4685                         break;
4686
4687                 case RTE_FLOW_ITEM_TYPE_MARK:
4688                         ret = flow_dv_validate_item_mark(dev, items, attr,
4689                                                          error);
4690                         if (ret < 0)
4691                                 return ret;
4692                         last_item = MLX5_FLOW_ITEM_MARK;
4693                         break;
4694                 case RTE_FLOW_ITEM_TYPE_META:
4695                         ret = flow_dv_validate_item_meta(dev, items, attr,
4696                                                          error);
4697                         if (ret < 0)
4698                                 return ret;
4699                         last_item = MLX5_FLOW_ITEM_METADATA;
4700                         break;
4701                 case RTE_FLOW_ITEM_TYPE_ICMP:
4702                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4703                                                            next_protocol,
4704                                                            error);
4705                         if (ret < 0)
4706                                 return ret;
4707                         last_item = MLX5_FLOW_LAYER_ICMP;
4708                         break;
4709                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4710                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4711                                                             next_protocol,
4712                                                             error);
4713                         if (ret < 0)
4714                                 return ret;
4715                         item_ipv6_proto = IPPROTO_ICMPV6;
4716                         last_item = MLX5_FLOW_LAYER_ICMP6;
4717                         break;
4718                 case RTE_FLOW_ITEM_TYPE_TAG:
4719                         ret = flow_dv_validate_item_tag(dev, items,
4720                                                         attr, error);
4721                         if (ret < 0)
4722                                 return ret;
4723                         last_item = MLX5_FLOW_ITEM_TAG;
4724                         break;
4725                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4726                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4727                         break;
4728                 case RTE_FLOW_ITEM_TYPE_GTP:
4729                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4730                                                         error);
4731                         if (ret < 0)
4732                                 return ret;
4733                         last_item = MLX5_FLOW_LAYER_GTP;
4734                         break;
4735                 default:
4736                         return rte_flow_error_set(error, ENOTSUP,
4737                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4738                                                   NULL, "item not supported");
4739                 }
4740                 item_flags |= last_item;
4741         }
4742         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4743                 int type = actions->type;
4744                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4745                         return rte_flow_error_set(error, ENOTSUP,
4746                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4747                                                   actions, "too many actions");
4748                 switch (type) {
4749                 case RTE_FLOW_ACTION_TYPE_VOID:
4750                         break;
4751                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4752                         ret = flow_dv_validate_action_port_id(dev,
4753                                                               action_flags,
4754                                                               actions,
4755                                                               attr,
4756                                                               error);
4757                         if (ret)
4758                                 return ret;
4759                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4760                         ++actions_n;
4761                         break;
4762                 case RTE_FLOW_ACTION_TYPE_FLAG:
4763                         ret = flow_dv_validate_action_flag(dev, action_flags,
4764                                                            attr, error);
4765                         if (ret < 0)
4766                                 return ret;
4767                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4768                                 /* Count all modify-header actions as one. */
4769                                 if (!(action_flags &
4770                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4771                                         ++actions_n;
4772                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4773                                                 MLX5_FLOW_ACTION_MARK_EXT;
4774                         } else {
4775                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4776                                 ++actions_n;
4777                         }
4778                         break;
4779                 case RTE_FLOW_ACTION_TYPE_MARK:
4780                         ret = flow_dv_validate_action_mark(dev, actions,
4781                                                            action_flags,
4782                                                            attr, error);
4783                         if (ret < 0)
4784                                 return ret;
4785                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4786                                 /* Count all modify-header actions as one. */
4787                                 if (!(action_flags &
4788                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4789                                         ++actions_n;
4790                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4791                                                 MLX5_FLOW_ACTION_MARK_EXT;
4792                         } else {
4793                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4794                                 ++actions_n;
4795                         }
4796                         break;
4797                 case RTE_FLOW_ACTION_TYPE_SET_META:
4798                         ret = flow_dv_validate_action_set_meta(dev, actions,
4799                                                                action_flags,
4800                                                                attr, error);
4801                         if (ret < 0)
4802                                 return ret;
4803                         /* Count all modify-header actions as one action. */
4804                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4805                                 ++actions_n;
4806                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4807                         break;
4808                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4809                         ret = flow_dv_validate_action_set_tag(dev, actions,
4810                                                               action_flags,
4811                                                               attr, error);
4812                         if (ret < 0)
4813                                 return ret;
4814                         /* Count all modify-header actions as one action. */
4815                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4816                                 ++actions_n;
4817                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4818                         break;
4819                 case RTE_FLOW_ACTION_TYPE_DROP:
4820                         ret = mlx5_flow_validate_action_drop(action_flags,
4821                                                              attr, error);
4822                         if (ret < 0)
4823                                 return ret;
4824                         action_flags |= MLX5_FLOW_ACTION_DROP;
4825                         ++actions_n;
4826                         break;
4827                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4828                         ret = mlx5_flow_validate_action_queue(actions,
4829                                                               action_flags, dev,
4830                                                               attr, error);
4831                         if (ret < 0)
4832                                 return ret;
4833                         queue_index = ((const struct rte_flow_action_queue *)
4834                                                         (actions->conf))->index;
4835                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4836                         ++actions_n;
4837                         break;
4838                 case RTE_FLOW_ACTION_TYPE_RSS:
4839                         rss = actions->conf;
4840                         ret = mlx5_flow_validate_action_rss(actions,
4841                                                             action_flags, dev,
4842                                                             attr, item_flags,
4843                                                             error);
4844                         if (ret < 0)
4845                                 return ret;
4846                         if (rss != NULL && rss->queue_num)
4847                                 queue_index = rss->queue[0];
4848                         action_flags |= MLX5_FLOW_ACTION_RSS;
4849                         ++actions_n;
4850                         break;
4851                 case RTE_FLOW_ACTION_TYPE_COUNT:
4852                         ret = flow_dv_validate_action_count(dev, error);
4853                         if (ret < 0)
4854                                 return ret;
4855                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4856                         ++actions_n;
4857                         break;
4858                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4859                         if (flow_dv_validate_action_pop_vlan(dev,
4860                                                              action_flags,
4861                                                              actions,
4862                                                              item_flags, attr,
4863                                                              error))
4864                                 return -rte_errno;
4865                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4866                         ++actions_n;
4867                         break;
4868                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4869                         ret = flow_dv_validate_action_push_vlan(action_flags,
4870                                                                 item_flags,
4871                                                                 actions, attr,
4872                                                                 error);
4873                         if (ret < 0)
4874                                 return ret;
4875                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4876                         ++actions_n;
4877                         break;
4878                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4879                         ret = flow_dv_validate_action_set_vlan_pcp
4880                                                 (action_flags, actions, error);
4881                         if (ret < 0)
4882                                 return ret;
4883                         /* Count PCP with push_vlan command. */
4884                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4885                         break;
4886                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4887                         ret = flow_dv_validate_action_set_vlan_vid
4888                                                 (item_flags, action_flags,
4889                                                  actions, error);
4890                         if (ret < 0)
4891                                 return ret;
4892                         /* Count VID with push_vlan command. */
4893                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4894                         break;
4895                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4896                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4897                         ret = flow_dv_validate_action_l2_encap(action_flags,
4898                                                                actions, error);
4899                         if (ret < 0)
4900                                 return ret;
4901                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
4902                         ++actions_n;
4903                         break;
4904                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4905                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4906                         ret = flow_dv_validate_action_decap(action_flags, attr,
4907                                                             error);
4908                         if (ret < 0)
4909                                 return ret;
4910                         action_flags |= MLX5_FLOW_ACTION_DECAP;
4911                         ++actions_n;
4912                         break;
4913                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4914                         ret = flow_dv_validate_action_raw_encap_decap
4915                                 (NULL, actions->conf, attr, &action_flags,
4916                                  &actions_n, error);
4917                         if (ret < 0)
4918                                 return ret;
4919                         break;
4920                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4921                         decap = actions->conf;
4922                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
4923                                 ;
4924                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4925                                 encap = NULL;
4926                                 actions--;
4927                         } else {
4928                                 encap = actions->conf;
4929                         }
4930                         ret = flow_dv_validate_action_raw_encap_decap
4931                                            (decap ? decap : &empty_decap, encap,
4932                                             attr, &action_flags, &actions_n,
4933                                             error);
4934                         if (ret < 0)
4935                                 return ret;
4936                         break;
4937                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4938                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4939                         ret = flow_dv_validate_action_modify_mac(action_flags,
4940                                                                  actions,
4941                                                                  item_flags,
4942                                                                  error);
4943                         if (ret < 0)
4944                                 return ret;
4945                         /* Count all modify-header actions as one action. */
4946                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4947                                 ++actions_n;
4948                         action_flags |= actions->type ==
4949                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4950                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4951                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4952                         break;
4953
4954                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4955                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4956                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4957                                                                   actions,
4958                                                                   item_flags,
4959                                                                   error);
4960                         if (ret < 0)
4961                                 return ret;
4962                         /* Count all modify-header actions as one action. */
4963                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4964                                 ++actions_n;
4965                         action_flags |= actions->type ==
4966                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4967                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4968                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4969                         break;
4970                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4971                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4972                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4973                                                                   actions,
4974                                                                   item_flags,
4975                                                                   error);
4976                         if (ret < 0)
4977                                 return ret;
4978                         if (item_ipv6_proto == IPPROTO_ICMPV6)
4979                                 return rte_flow_error_set(error, ENOTSUP,
4980                                         RTE_FLOW_ERROR_TYPE_ACTION,
4981                                         actions,
4982                                         "Can't change header "
4983                                         "with ICMPv6 proto");
4984                         /* Count all modify-header actions as one action. */
4985                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4986                                 ++actions_n;
4987                         action_flags |= actions->type ==
4988                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4989                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4990                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4991                         break;
4992                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4993                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4994                         ret = flow_dv_validate_action_modify_tp(action_flags,
4995                                                                 actions,
4996                                                                 item_flags,
4997                                                                 error);
4998                         if (ret < 0)
4999                                 return ret;
5000                         /* Count all modify-header actions as one action. */
5001                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5002                                 ++actions_n;
5003                         action_flags |= actions->type ==
5004                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5005                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5006                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5007                         break;
5008                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5009                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5010                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5011                                                                  actions,
5012                                                                  item_flags,
5013                                                                  error);
5014                         if (ret < 0)
5015                                 return ret;
5016                         /* Count all modify-header actions as one action. */
5017                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5018                                 ++actions_n;
5019                         action_flags |= actions->type ==
5020                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5021                                                 MLX5_FLOW_ACTION_SET_TTL :
5022                                                 MLX5_FLOW_ACTION_DEC_TTL;
5023                         break;
5024                 case RTE_FLOW_ACTION_TYPE_JUMP:
5025                         ret = flow_dv_validate_action_jump(actions,
5026                                                            action_flags,
5027                                                            attr, external,
5028                                                            error);
5029                         if (ret)
5030                                 return ret;
5031                         ++actions_n;
5032                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5033                         break;
5034                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5035                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5036                         ret = flow_dv_validate_action_modify_tcp_seq
5037                                                                 (action_flags,
5038                                                                  actions,
5039                                                                  item_flags,
5040                                                                  error);
5041                         if (ret < 0)
5042                                 return ret;
5043                         /* Count all modify-header actions as one action. */
5044                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5045                                 ++actions_n;
5046                         action_flags |= actions->type ==
5047                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5048                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5049                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5050                         break;
5051                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5052                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5053                         ret = flow_dv_validate_action_modify_tcp_ack
5054                                                                 (action_flags,
5055                                                                  actions,
5056                                                                  item_flags,
5057                                                                  error);
5058                         if (ret < 0)
5059                                 return ret;
5060                         /* Count all modify-header actions as one action. */
5061                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5062                                 ++actions_n;
5063                         action_flags |= actions->type ==
5064                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5065                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5066                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5067                         break;
5068                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5069                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5070                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5071                         break;
5072                 case RTE_FLOW_ACTION_TYPE_METER:
5073                         ret = mlx5_flow_validate_action_meter(dev,
5074                                                               action_flags,
5075                                                               actions, attr,
5076                                                               error);
5077                         if (ret < 0)
5078                                 return ret;
5079                         action_flags |= MLX5_FLOW_ACTION_METER;
5080                         ++actions_n;
5081                         break;
5082                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5083                         ret = flow_dv_validate_action_modify_ipv4_dscp
5084                                                          (action_flags,
5085                                                           actions,
5086                                                           item_flags,
5087                                                           error);
5088                         if (ret < 0)
5089                                 return ret;
5090                         /* Count all modify-header actions as one action. */
5091                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5092                                 ++actions_n;
5093                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5094                         break;
5095                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5096                         ret = flow_dv_validate_action_modify_ipv6_dscp
5097                                                                 (action_flags,
5098                                                                  actions,
5099                                                                  item_flags,
5100                                                                  error);
5101                         if (ret < 0)
5102                                 return ret;
5103                         /* Count all modify-header actions as one action. */
5104                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5105                                 ++actions_n;
5106                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5107                         break;
5108                 default:
5109                         return rte_flow_error_set(error, ENOTSUP,
5110                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5111                                                   actions,
5112                                                   "action not supported");
5113                 }
5114         }
5115         /*
5116          * Validate the drop action mutual exclusion with other actions.
5117          * Drop action is mutually-exclusive with any other action, except for
5118          * Count action.
5119          */
5120         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5121             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5122                 return rte_flow_error_set(error, EINVAL,
5123                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5124                                           "Drop action is mutually-exclusive "
5125                                           "with any other action, except for "
5126                                           "Count action");
5127         /* Eswitch has few restrictions on using items and actions */
5128         if (attr->transfer) {
5129                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5130                     action_flags & MLX5_FLOW_ACTION_FLAG)
5131                         return rte_flow_error_set(error, ENOTSUP,
5132                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5133                                                   NULL,
5134                                                   "unsupported action FLAG");
5135                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5136                     action_flags & MLX5_FLOW_ACTION_MARK)
5137                         return rte_flow_error_set(error, ENOTSUP,
5138                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5139                                                   NULL,
5140                                                   "unsupported action MARK");
5141                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5142                         return rte_flow_error_set(error, ENOTSUP,
5143                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5144                                                   NULL,
5145                                                   "unsupported action QUEUE");
5146                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5147                         return rte_flow_error_set(error, ENOTSUP,
5148                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5149                                                   NULL,
5150                                                   "unsupported action RSS");
5151                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5152                         return rte_flow_error_set(error, EINVAL,
5153                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5154                                                   actions,
5155                                                   "no fate action is found");
5156         } else {
5157                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5158                         return rte_flow_error_set(error, EINVAL,
5159                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5160                                                   actions,
5161                                                   "no fate action is found");
5162         }
5163         /* Continue validation for Xcap actions.*/
5164         if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) && (queue_index == 0xFFFF ||
5165             mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5166                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5167                     MLX5_FLOW_XCAP_ACTIONS)
5168                         return rte_flow_error_set(error, ENOTSUP,
5169                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5170                                                   NULL, "encap and decap "
5171                                                   "combination aren't supported");
5172                 if (!attr->transfer && attr->ingress && (action_flags &
5173                                                         MLX5_FLOW_ACTION_ENCAP))
5174                         return rte_flow_error_set(error, ENOTSUP,
5175                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5176                                                   NULL, "encap is not supported"
5177                                                   " for ingress traffic");
5178         }
5179         return 0;
5180 }
5181
5182 /**
5183  * Internal preparation function. Allocates the DV flow size,
5184  * this size is constant.
5185  *
5186  * @param[in] attr
5187  *   Pointer to the flow attributes.
5188  * @param[in] items
5189  *   Pointer to the list of items.
5190  * @param[in] actions
5191  *   Pointer to the list of actions.
5192  * @param[out] error
5193  *   Pointer to the error structure.
5194  *
5195  * @return
5196  *   Pointer to mlx5_flow object on success,
5197  *   otherwise NULL and rte_errno is set.
5198  */
5199 static struct mlx5_flow *
5200 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5201                 const struct rte_flow_item items[] __rte_unused,
5202                 const struct rte_flow_action actions[] __rte_unused,
5203                 struct rte_flow_error *error)
5204 {
5205         size_t size = sizeof(struct mlx5_flow);
5206         struct mlx5_flow *dev_flow;
5207
5208         dev_flow = rte_calloc(__func__, 1, size, 0);
5209         if (!dev_flow) {
5210                 rte_flow_error_set(error, ENOMEM,
5211                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5212                                    "not enough memory to create flow");
5213                 return NULL;
5214         }
5215         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5216         dev_flow->ingress = attr->ingress;
5217         dev_flow->transfer = attr->transfer;
5218         return dev_flow;
5219 }
5220
5221 #ifdef RTE_LIBRTE_MLX5_DEBUG
5222 /**
5223  * Sanity check for match mask and value. Similar to check_valid_spec() in
5224  * kernel driver. If unmasked bit is present in value, it returns failure.
5225  *
5226  * @param match_mask
5227  *   pointer to match mask buffer.
5228  * @param match_value
5229  *   pointer to match value buffer.
5230  *
5231  * @return
5232  *   0 if valid, -EINVAL otherwise.
5233  */
5234 static int
5235 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5236 {
5237         uint8_t *m = match_mask;
5238         uint8_t *v = match_value;
5239         unsigned int i;
5240
5241         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5242                 if (v[i] & ~m[i]) {
5243                         DRV_LOG(ERR,
5244                                 "match_value differs from match_criteria"
5245                                 " %p[%u] != %p[%u]",
5246                                 match_value, i, match_mask, i);
5247                         return -EINVAL;
5248                 }
5249         }
5250         return 0;
5251 }
5252 #endif
5253
5254 /**
5255  * Add Ethernet item to matcher and to the value.
5256  *
5257  * @param[in, out] matcher
5258  *   Flow matcher.
5259  * @param[in, out] key
5260  *   Flow matcher value.
5261  * @param[in] item
5262  *   Flow pattern to translate.
5263  * @param[in] inner
5264  *   Item is inner pattern.
5265  */
5266 static void
5267 flow_dv_translate_item_eth(void *matcher, void *key,
5268                            const struct rte_flow_item *item, int inner)
5269 {
5270         const struct rte_flow_item_eth *eth_m = item->mask;
5271         const struct rte_flow_item_eth *eth_v = item->spec;
5272         const struct rte_flow_item_eth nic_mask = {
5273                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5274                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5275                 .type = RTE_BE16(0xffff),
5276         };
5277         void *headers_m;
5278         void *headers_v;
5279         char *l24_v;
5280         unsigned int i;
5281
5282         if (!eth_v)
5283                 return;
5284         if (!eth_m)
5285                 eth_m = &nic_mask;
5286         if (inner) {
5287                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5288                                          inner_headers);
5289                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5290         } else {
5291                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5292                                          outer_headers);
5293                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5294         }
5295         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5296                &eth_m->dst, sizeof(eth_m->dst));
5297         /* The value must be in the range of the mask. */
5298         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5299         for (i = 0; i < sizeof(eth_m->dst); ++i)
5300                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5301         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5302                &eth_m->src, sizeof(eth_m->src));
5303         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5304         /* The value must be in the range of the mask. */
5305         for (i = 0; i < sizeof(eth_m->dst); ++i)
5306                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5307         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5308                  rte_be_to_cpu_16(eth_m->type));
5309         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5310         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5311         if (eth_v->type) {
5312                 /* When ethertype is present set mask for tagged VLAN. */
5313                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5314                 /* Set value for tagged VLAN if ethertype is 802.1Q. */
5315                 if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) ||
5316                     eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ))
5317                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag,
5318                                  1);
5319         }
5320 }
5321
5322 /**
5323  * Add VLAN item to matcher and to the value.
5324  *
5325  * @param[in, out] dev_flow
5326  *   Flow descriptor.
5327  * @param[in, out] matcher
5328  *   Flow matcher.
5329  * @param[in, out] key
5330  *   Flow matcher value.
5331  * @param[in] item
5332  *   Flow pattern to translate.
5333  * @param[in] inner
5334  *   Item is inner pattern.
5335  */
5336 static void
5337 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5338                             void *matcher, void *key,
5339                             const struct rte_flow_item *item,
5340                             int inner)
5341 {
5342         const struct rte_flow_item_vlan *vlan_m = item->mask;
5343         const struct rte_flow_item_vlan *vlan_v = item->spec;
5344         void *headers_m;
5345         void *headers_v;
5346         uint16_t tci_m;
5347         uint16_t tci_v;
5348
5349         if (!vlan_v)
5350                 return;
5351         if (!vlan_m)
5352                 vlan_m = &rte_flow_item_vlan_mask;
5353         if (inner) {
5354                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5355                                          inner_headers);
5356                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5357         } else {
5358                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5359                                          outer_headers);
5360                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5361                 /*
5362                  * This is workaround, masks are not supported,
5363                  * and pre-validated.
5364                  */
5365                 dev_flow->dv.vf_vlan.tag =
5366                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5367         }
5368         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5369         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5370         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5371         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5372         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5373         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5374         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5375         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5376         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5377         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5378         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5379                  rte_be_to_cpu_16(vlan_m->inner_type));
5380         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5381                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5382 }
5383
5384 /**
5385  * Add IPV4 item to matcher and to the value.
5386  *
5387  * @param[in, out] matcher
5388  *   Flow matcher.
5389  * @param[in, out] key
5390  *   Flow matcher value.
5391  * @param[in] item
5392  *   Flow pattern to translate.
5393  * @param[in] inner
5394  *   Item is inner pattern.
5395  * @param[in] group
5396  *   The group to insert the rule.
5397  */
5398 static void
5399 flow_dv_translate_item_ipv4(void *matcher, void *key,
5400                             const struct rte_flow_item *item,
5401                             int inner, uint32_t group)
5402 {
5403         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5404         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5405         const struct rte_flow_item_ipv4 nic_mask = {
5406                 .hdr = {
5407                         .src_addr = RTE_BE32(0xffffffff),
5408                         .dst_addr = RTE_BE32(0xffffffff),
5409                         .type_of_service = 0xff,
5410                         .next_proto_id = 0xff,
5411                 },
5412         };
5413         void *headers_m;
5414         void *headers_v;
5415         char *l24_m;
5416         char *l24_v;
5417         uint8_t tos;
5418
5419         if (inner) {
5420                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5421                                          inner_headers);
5422                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5423         } else {
5424                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5425                                          outer_headers);
5426                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5427         }
5428         if (group == 0)
5429                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5430         else
5431                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5432         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5433         if (!ipv4_v)
5434                 return;
5435         if (!ipv4_m)
5436                 ipv4_m = &nic_mask;
5437         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5438                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5439         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5440                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5441         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5442         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5443         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5444                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5445         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5446                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5447         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5448         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5449         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5450         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5451                  ipv4_m->hdr.type_of_service);
5452         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5453         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5454                  ipv4_m->hdr.type_of_service >> 2);
5455         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5456         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5457                  ipv4_m->hdr.next_proto_id);
5458         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5459                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5460         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5461 }
5462
5463 /**
5464  * Add IPV6 item to matcher and to the value.
5465  *
5466  * @param[in, out] matcher
5467  *   Flow matcher.
5468  * @param[in, out] key
5469  *   Flow matcher value.
5470  * @param[in] item
5471  *   Flow pattern to translate.
5472  * @param[in] inner
5473  *   Item is inner pattern.
5474  * @param[in] group
5475  *   The group to insert the rule.
5476  */
5477 static void
5478 flow_dv_translate_item_ipv6(void *matcher, void *key,
5479                             const struct rte_flow_item *item,
5480                             int inner, uint32_t group)
5481 {
5482         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5483         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5484         const struct rte_flow_item_ipv6 nic_mask = {
5485                 .hdr = {
5486                         .src_addr =
5487                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5488                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5489                         .dst_addr =
5490                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5491                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5492                         .vtc_flow = RTE_BE32(0xffffffff),
5493                         .proto = 0xff,
5494                         .hop_limits = 0xff,
5495                 },
5496         };
5497         void *headers_m;
5498         void *headers_v;
5499         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5500         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5501         char *l24_m;
5502         char *l24_v;
5503         uint32_t vtc_m;
5504         uint32_t vtc_v;
5505         int i;
5506         int size;
5507
5508         if (inner) {
5509                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5510                                          inner_headers);
5511                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5512         } else {
5513                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5514                                          outer_headers);
5515                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5516         }
5517         if (group == 0)
5518                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5519         else
5520                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5521         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5522         if (!ipv6_v)
5523                 return;
5524         if (!ipv6_m)
5525                 ipv6_m = &nic_mask;
5526         size = sizeof(ipv6_m->hdr.dst_addr);
5527         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5528                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5529         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5530                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5531         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5532         for (i = 0; i < size; ++i)
5533                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5534         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5535                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5536         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5537                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5538         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5539         for (i = 0; i < size; ++i)
5540                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5541         /* TOS. */
5542         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5543         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5544         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5545         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5546         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5547         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5548         /* Label. */
5549         if (inner) {
5550                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5551                          vtc_m);
5552                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5553                          vtc_v);
5554         } else {
5555                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5556                          vtc_m);
5557                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5558                          vtc_v);
5559         }
5560         /* Protocol. */
5561         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5562                  ipv6_m->hdr.proto);
5563         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5564                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5565         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5566 }
5567
5568 /**
5569  * Add TCP item to matcher and to the value.
5570  *
5571  * @param[in, out] matcher
5572  *   Flow matcher.
5573  * @param[in, out] key
5574  *   Flow matcher value.
5575  * @param[in] item
5576  *   Flow pattern to translate.
5577  * @param[in] inner
5578  *   Item is inner pattern.
5579  */
5580 static void
5581 flow_dv_translate_item_tcp(void *matcher, void *key,
5582                            const struct rte_flow_item *item,
5583                            int inner)
5584 {
5585         const struct rte_flow_item_tcp *tcp_m = item->mask;
5586         const struct rte_flow_item_tcp *tcp_v = item->spec;
5587         void *headers_m;
5588         void *headers_v;
5589
5590         if (inner) {
5591                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5592                                          inner_headers);
5593                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5594         } else {
5595                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5596                                          outer_headers);
5597                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5598         }
5599         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5600         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5601         if (!tcp_v)
5602                 return;
5603         if (!tcp_m)
5604                 tcp_m = &rte_flow_item_tcp_mask;
5605         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5606                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5607         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5608                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5609         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5610                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5611         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5612                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5613         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5614                  tcp_m->hdr.tcp_flags);
5615         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5616                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5617 }
5618
5619 /**
5620  * Add UDP item to matcher and to the value.
5621  *
5622  * @param[in, out] matcher
5623  *   Flow matcher.
5624  * @param[in, out] key
5625  *   Flow matcher value.
5626  * @param[in] item
5627  *   Flow pattern to translate.
5628  * @param[in] inner
5629  *   Item is inner pattern.
5630  */
5631 static void
5632 flow_dv_translate_item_udp(void *matcher, void *key,
5633                            const struct rte_flow_item *item,
5634                            int inner)
5635 {
5636         const struct rte_flow_item_udp *udp_m = item->mask;
5637         const struct rte_flow_item_udp *udp_v = item->spec;
5638         void *headers_m;
5639         void *headers_v;
5640
5641         if (inner) {
5642                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5643                                          inner_headers);
5644                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5645         } else {
5646                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5647                                          outer_headers);
5648                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5649         }
5650         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5651         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5652         if (!udp_v)
5653                 return;
5654         if (!udp_m)
5655                 udp_m = &rte_flow_item_udp_mask;
5656         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5657                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5658         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5659                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5660         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5661                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5662         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5663                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5664 }
5665
5666 /**
5667  * Add GRE optional Key item to matcher and to the value.
5668  *
5669  * @param[in, out] matcher
5670  *   Flow matcher.
5671  * @param[in, out] key
5672  *   Flow matcher value.
5673  * @param[in] item
5674  *   Flow pattern to translate.
5675  * @param[in] inner
5676  *   Item is inner pattern.
5677  */
5678 static void
5679 flow_dv_translate_item_gre_key(void *matcher, void *key,
5680                                    const struct rte_flow_item *item)
5681 {
5682         const rte_be32_t *key_m = item->mask;
5683         const rte_be32_t *key_v = item->spec;
5684         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5685         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5686         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5687
5688         /* GRE K bit must be on and should already be validated */
5689         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5690         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5691         if (!key_v)
5692                 return;
5693         if (!key_m)
5694                 key_m = &gre_key_default_mask;
5695         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5696                  rte_be_to_cpu_32(*key_m) >> 8);
5697         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5698                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5699         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5700                  rte_be_to_cpu_32(*key_m) & 0xFF);
5701         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5702                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5703 }
5704
5705 /**
5706  * Add GRE item to matcher and to the value.
5707  *
5708  * @param[in, out] matcher
5709  *   Flow matcher.
5710  * @param[in, out] key
5711  *   Flow matcher value.
5712  * @param[in] item
5713  *   Flow pattern to translate.
5714  * @param[in] inner
5715  *   Item is inner pattern.
5716  */
5717 static void
5718 flow_dv_translate_item_gre(void *matcher, void *key,
5719                            const struct rte_flow_item *item,
5720                            int inner)
5721 {
5722         const struct rte_flow_item_gre *gre_m = item->mask;
5723         const struct rte_flow_item_gre *gre_v = item->spec;
5724         void *headers_m;
5725         void *headers_v;
5726         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5727         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5728         struct {
5729                 union {
5730                         __extension__
5731                         struct {
5732                                 uint16_t version:3;
5733                                 uint16_t rsvd0:9;
5734                                 uint16_t s_present:1;
5735                                 uint16_t k_present:1;
5736                                 uint16_t rsvd_bit1:1;
5737                                 uint16_t c_present:1;
5738                         };
5739                         uint16_t value;
5740                 };
5741         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5742
5743         if (inner) {
5744                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5745                                          inner_headers);
5746                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5747         } else {
5748                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5749                                          outer_headers);
5750                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5751         }
5752         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5753         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5754         if (!gre_v)
5755                 return;
5756         if (!gre_m)
5757                 gre_m = &rte_flow_item_gre_mask;
5758         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5759                  rte_be_to_cpu_16(gre_m->protocol));
5760         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5761                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5762         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5763         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5764         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5765                  gre_crks_rsvd0_ver_m.c_present);
5766         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5767                  gre_crks_rsvd0_ver_v.c_present &
5768                  gre_crks_rsvd0_ver_m.c_present);
5769         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5770                  gre_crks_rsvd0_ver_m.k_present);
5771         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5772                  gre_crks_rsvd0_ver_v.k_present &
5773                  gre_crks_rsvd0_ver_m.k_present);
5774         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5775                  gre_crks_rsvd0_ver_m.s_present);
5776         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5777                  gre_crks_rsvd0_ver_v.s_present &
5778                  gre_crks_rsvd0_ver_m.s_present);
5779 }
5780
5781 /**
5782  * Add NVGRE item to matcher and to the value.
5783  *
5784  * @param[in, out] matcher
5785  *   Flow matcher.
5786  * @param[in, out] key
5787  *   Flow matcher value.
5788  * @param[in] item
5789  *   Flow pattern to translate.
5790  * @param[in] inner
5791  *   Item is inner pattern.
5792  */
5793 static void
5794 flow_dv_translate_item_nvgre(void *matcher, void *key,
5795                              const struct rte_flow_item *item,
5796                              int inner)
5797 {
5798         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5799         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5800         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5801         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5802         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5803         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5804         char *gre_key_m;
5805         char *gre_key_v;
5806         int size;
5807         int i;
5808
5809         /* For NVGRE, GRE header fields must be set with defined values. */
5810         const struct rte_flow_item_gre gre_spec = {
5811                 .c_rsvd0_ver = RTE_BE16(0x2000),
5812                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5813         };
5814         const struct rte_flow_item_gre gre_mask = {
5815                 .c_rsvd0_ver = RTE_BE16(0xB000),
5816                 .protocol = RTE_BE16(UINT16_MAX),
5817         };
5818         const struct rte_flow_item gre_item = {
5819                 .spec = &gre_spec,
5820                 .mask = &gre_mask,
5821                 .last = NULL,
5822         };
5823         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5824         if (!nvgre_v)
5825                 return;
5826         if (!nvgre_m)
5827                 nvgre_m = &rte_flow_item_nvgre_mask;
5828         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5829         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5830         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5831         memcpy(gre_key_m, tni_flow_id_m, size);
5832         for (i = 0; i < size; ++i)
5833                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5834 }
5835
5836 /**
5837  * Add VXLAN item to matcher and to the value.
5838  *
5839  * @param[in, out] matcher
5840  *   Flow matcher.
5841  * @param[in, out] key
5842  *   Flow matcher value.
5843  * @param[in] item
5844  *   Flow pattern to translate.
5845  * @param[in] inner
5846  *   Item is inner pattern.
5847  */
5848 static void
5849 flow_dv_translate_item_vxlan(void *matcher, void *key,
5850                              const struct rte_flow_item *item,
5851                              int inner)
5852 {
5853         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5854         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5855         void *headers_m;
5856         void *headers_v;
5857         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5858         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5859         char *vni_m;
5860         char *vni_v;
5861         uint16_t dport;
5862         int size;
5863         int i;
5864
5865         if (inner) {
5866                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5867                                          inner_headers);
5868                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5869         } else {
5870                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5871                                          outer_headers);
5872                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5873         }
5874         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5875                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5876         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5877                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5878                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5879         }
5880         if (!vxlan_v)
5881                 return;
5882         if (!vxlan_m)
5883                 vxlan_m = &rte_flow_item_vxlan_mask;
5884         size = sizeof(vxlan_m->vni);
5885         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5886         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5887         memcpy(vni_m, vxlan_m->vni, size);
5888         for (i = 0; i < size; ++i)
5889                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5890 }
5891
5892 /**
5893  * Add VXLAN-GPE item to matcher and to the value.
5894  *
5895  * @param[in, out] matcher
5896  *   Flow matcher.
5897  * @param[in, out] key
5898  *   Flow matcher value.
5899  * @param[in] item
5900  *   Flow pattern to translate.
5901  * @param[in] inner
5902  *   Item is inner pattern.
5903  */
5904
5905 static void
5906 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
5907                                  const struct rte_flow_item *item, int inner)
5908 {
5909         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
5910         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
5911         void *headers_m;
5912         void *headers_v;
5913         void *misc_m =
5914                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
5915         void *misc_v =
5916                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
5917         char *vni_m;
5918         char *vni_v;
5919         uint16_t dport;
5920         int size;
5921         int i;
5922         uint8_t flags_m = 0xff;
5923         uint8_t flags_v = 0xc;
5924
5925         if (inner) {
5926                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5927                                          inner_headers);
5928                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5929         } else {
5930                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5931                                          outer_headers);
5932                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5933         }
5934         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5935                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5936         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5937                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5938                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5939         }
5940         if (!vxlan_v)
5941                 return;
5942         if (!vxlan_m)
5943                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
5944         size = sizeof(vxlan_m->vni);
5945         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
5946         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
5947         memcpy(vni_m, vxlan_m->vni, size);
5948         for (i = 0; i < size; ++i)
5949                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5950         if (vxlan_m->flags) {
5951                 flags_m = vxlan_m->flags;
5952                 flags_v = vxlan_v->flags;
5953         }
5954         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
5955         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
5956         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
5957                  vxlan_m->protocol);
5958         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
5959                  vxlan_v->protocol);
5960 }
5961
5962 /**
5963  * Add Geneve item to matcher and to the value.
5964  *
5965  * @param[in, out] matcher
5966  *   Flow matcher.
5967  * @param[in, out] key
5968  *   Flow matcher value.
5969  * @param[in] item
5970  *   Flow pattern to translate.
5971  * @param[in] inner
5972  *   Item is inner pattern.
5973  */
5974
5975 static void
5976 flow_dv_translate_item_geneve(void *matcher, void *key,
5977                               const struct rte_flow_item *item, int inner)
5978 {
5979         const struct rte_flow_item_geneve *geneve_m = item->mask;
5980         const struct rte_flow_item_geneve *geneve_v = item->spec;
5981         void *headers_m;
5982         void *headers_v;
5983         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5984         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5985         uint16_t dport;
5986         uint16_t gbhdr_m;
5987         uint16_t gbhdr_v;
5988         char *vni_m;
5989         char *vni_v;
5990         size_t size, i;
5991
5992         if (inner) {
5993                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5994                                          inner_headers);
5995                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5996         } else {
5997                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5998                                          outer_headers);
5999                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6000         }
6001         dport = MLX5_UDP_PORT_GENEVE;
6002         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6003                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6004                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6005         }
6006         if (!geneve_v)
6007                 return;
6008         if (!geneve_m)
6009                 geneve_m = &rte_flow_item_geneve_mask;
6010         size = sizeof(geneve_m->vni);
6011         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
6012         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
6013         memcpy(vni_m, geneve_m->vni, size);
6014         for (i = 0; i < size; ++i)
6015                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
6016         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
6017                  rte_be_to_cpu_16(geneve_m->protocol));
6018         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
6019                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
6020         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
6021         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
6022         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
6023                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6024         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
6025                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6026         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
6027                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6028         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
6029                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
6030                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6031 }
6032
6033 /**
6034  * Add MPLS item to matcher and to the value.
6035  *
6036  * @param[in, out] matcher
6037  *   Flow matcher.
6038  * @param[in, out] key
6039  *   Flow matcher value.
6040  * @param[in] item
6041  *   Flow pattern to translate.
6042  * @param[in] prev_layer
6043  *   The protocol layer indicated in previous item.
6044  * @param[in] inner
6045  *   Item is inner pattern.
6046  */
6047 static void
6048 flow_dv_translate_item_mpls(void *matcher, void *key,
6049                             const struct rte_flow_item *item,
6050                             uint64_t prev_layer,
6051                             int inner)
6052 {
6053         const uint32_t *in_mpls_m = item->mask;
6054         const uint32_t *in_mpls_v = item->spec;
6055         uint32_t *out_mpls_m = 0;
6056         uint32_t *out_mpls_v = 0;
6057         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6058         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6059         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
6060                                      misc_parameters_2);
6061         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6062         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
6063         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6064
6065         switch (prev_layer) {
6066         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6067                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
6068                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6069                          MLX5_UDP_PORT_MPLS);
6070                 break;
6071         case MLX5_FLOW_LAYER_GRE:
6072                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
6073                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6074                          RTE_ETHER_TYPE_MPLS);
6075                 break;
6076         default:
6077                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6078                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6079                          IPPROTO_MPLS);
6080                 break;
6081         }
6082         if (!in_mpls_v)
6083                 return;
6084         if (!in_mpls_m)
6085                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
6086         switch (prev_layer) {
6087         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6088                 out_mpls_m =
6089                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6090                                                  outer_first_mpls_over_udp);
6091                 out_mpls_v =
6092                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6093                                                  outer_first_mpls_over_udp);
6094                 break;
6095         case MLX5_FLOW_LAYER_GRE:
6096                 out_mpls_m =
6097                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6098                                                  outer_first_mpls_over_gre);
6099                 out_mpls_v =
6100                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6101                                                  outer_first_mpls_over_gre);
6102                 break;
6103         default:
6104                 /* Inner MPLS not over GRE is not supported. */
6105                 if (!inner) {
6106                         out_mpls_m =
6107                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6108                                                          misc2_m,
6109                                                          outer_first_mpls);
6110                         out_mpls_v =
6111                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6112                                                          misc2_v,
6113                                                          outer_first_mpls);
6114                 }
6115                 break;
6116         }
6117         if (out_mpls_m && out_mpls_v) {
6118                 *out_mpls_m = *in_mpls_m;
6119                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
6120         }
6121 }
6122
6123 /**
6124  * Add metadata register item to matcher
6125  *
6126  * @param[in, out] matcher
6127  *   Flow matcher.
6128  * @param[in, out] key
6129  *   Flow matcher value.
6130  * @param[in] reg_type
6131  *   Type of device metadata register
6132  * @param[in] value
6133  *   Register value
6134  * @param[in] mask
6135  *   Register mask
6136  */
6137 static void
6138 flow_dv_match_meta_reg(void *matcher, void *key,
6139                        enum modify_reg reg_type,
6140                        uint32_t data, uint32_t mask)
6141 {
6142         void *misc2_m =
6143                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
6144         void *misc2_v =
6145                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6146         uint32_t temp;
6147
6148         data &= mask;
6149         switch (reg_type) {
6150         case REG_A:
6151                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
6152                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
6153                 break;
6154         case REG_B:
6155                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
6156                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
6157                 break;
6158         case REG_C_0:
6159                 /*
6160                  * The metadata register C0 field might be divided into
6161                  * source vport index and META item value, we should set
6162                  * this field according to specified mask, not as whole one.
6163                  */
6164                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6165                 temp |= mask;
6166                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6167                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6168                 temp &= ~mask;
6169                 temp |= data;
6170                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6171                 break;
6172         case REG_C_1:
6173                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6174                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6175                 break;
6176         case REG_C_2:
6177                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6178                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6179                 break;
6180         case REG_C_3:
6181                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6182                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6183                 break;
6184         case REG_C_4:
6185                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6186                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6187                 break;
6188         case REG_C_5:
6189                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6190                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6191                 break;
6192         case REG_C_6:
6193                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6194                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6195                 break;
6196         case REG_C_7:
6197                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6198                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6199                 break;
6200         default:
6201                 MLX5_ASSERT(false);
6202                 break;
6203         }
6204 }
6205
6206 /**
6207  * Add MARK item to matcher
6208  *
6209  * @param[in] dev
6210  *   The device to configure through.
6211  * @param[in, out] matcher
6212  *   Flow matcher.
6213  * @param[in, out] key
6214  *   Flow matcher value.
6215  * @param[in] item
6216  *   Flow pattern to translate.
6217  */
6218 static void
6219 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6220                             void *matcher, void *key,
6221                             const struct rte_flow_item *item)
6222 {
6223         struct mlx5_priv *priv = dev->data->dev_private;
6224         const struct rte_flow_item_mark *mark;
6225         uint32_t value;
6226         uint32_t mask;
6227
6228         mark = item->mask ? (const void *)item->mask :
6229                             &rte_flow_item_mark_mask;
6230         mask = mark->id & priv->sh->dv_mark_mask;
6231         mark = (const void *)item->spec;
6232         MLX5_ASSERT(mark);
6233         value = mark->id & priv->sh->dv_mark_mask & mask;
6234         if (mask) {
6235                 enum modify_reg reg;
6236
6237                 /* Get the metadata register index for the mark. */
6238                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6239                 MLX5_ASSERT(reg > 0);
6240                 if (reg == REG_C_0) {
6241                         struct mlx5_priv *priv = dev->data->dev_private;
6242                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6243                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6244
6245                         mask &= msk_c0;
6246                         mask <<= shl_c0;
6247                         value <<= shl_c0;
6248                 }
6249                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6250         }
6251 }
6252
6253 /**
6254  * Add META item to matcher
6255  *
6256  * @param[in] dev
6257  *   The devich to configure through.
6258  * @param[in, out] matcher
6259  *   Flow matcher.
6260  * @param[in, out] key
6261  *   Flow matcher value.
6262  * @param[in] attr
6263  *   Attributes of flow that includes this item.
6264  * @param[in] item
6265  *   Flow pattern to translate.
6266  */
6267 static void
6268 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6269                             void *matcher, void *key,
6270                             const struct rte_flow_attr *attr,
6271                             const struct rte_flow_item *item)
6272 {
6273         const struct rte_flow_item_meta *meta_m;
6274         const struct rte_flow_item_meta *meta_v;
6275
6276         meta_m = (const void *)item->mask;
6277         if (!meta_m)
6278                 meta_m = &rte_flow_item_meta_mask;
6279         meta_v = (const void *)item->spec;
6280         if (meta_v) {
6281                 int reg;
6282                 uint32_t value = meta_v->data;
6283                 uint32_t mask = meta_m->data;
6284
6285                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6286                 if (reg < 0)
6287                         return;
6288                 /*
6289                  * In datapath code there is no endianness
6290                  * coversions for perfromance reasons, all
6291                  * pattern conversions are done in rte_flow.
6292                  */
6293                 value = rte_cpu_to_be_32(value);
6294                 mask = rte_cpu_to_be_32(mask);
6295                 if (reg == REG_C_0) {
6296                         struct mlx5_priv *priv = dev->data->dev_private;
6297                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6298                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6299 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6300                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6301
6302                         value >>= shr_c0;
6303                         mask >>= shr_c0;
6304 #endif
6305                         value <<= shl_c0;
6306                         mask <<= shl_c0;
6307                         MLX5_ASSERT(msk_c0);
6308                         MLX5_ASSERT(!(~msk_c0 & mask));
6309                 }
6310                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6311         }
6312 }
6313
6314 /**
6315  * Add vport metadata Reg C0 item to matcher
6316  *
6317  * @param[in, out] matcher
6318  *   Flow matcher.
6319  * @param[in, out] key
6320  *   Flow matcher value.
6321  * @param[in] reg
6322  *   Flow pattern to translate.
6323  */
6324 static void
6325 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6326                                   uint32_t value, uint32_t mask)
6327 {
6328         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6329 }
6330
6331 /**
6332  * Add tag item to matcher
6333  *
6334  * @param[in] dev
6335  *   The devich to configure through.
6336  * @param[in, out] matcher
6337  *   Flow matcher.
6338  * @param[in, out] key
6339  *   Flow matcher value.
6340  * @param[in] item
6341  *   Flow pattern to translate.
6342  */
6343 static void
6344 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6345                                 void *matcher, void *key,
6346                                 const struct rte_flow_item *item)
6347 {
6348         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6349         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6350         uint32_t mask, value;
6351
6352         MLX5_ASSERT(tag_v);
6353         value = tag_v->data;
6354         mask = tag_m ? tag_m->data : UINT32_MAX;
6355         if (tag_v->id == REG_C_0) {
6356                 struct mlx5_priv *priv = dev->data->dev_private;
6357                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6358                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6359
6360                 mask &= msk_c0;
6361                 mask <<= shl_c0;
6362                 value <<= shl_c0;
6363         }
6364         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6365 }
6366
6367 /**
6368  * Add TAG item to matcher
6369  *
6370  * @param[in] dev
6371  *   The devich to configure through.
6372  * @param[in, out] matcher
6373  *   Flow matcher.
6374  * @param[in, out] key
6375  *   Flow matcher value.
6376  * @param[in] item
6377  *   Flow pattern to translate.
6378  */
6379 static void
6380 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6381                            void *matcher, void *key,
6382                            const struct rte_flow_item *item)
6383 {
6384         const struct rte_flow_item_tag *tag_v = item->spec;
6385         const struct rte_flow_item_tag *tag_m = item->mask;
6386         enum modify_reg reg;
6387
6388         MLX5_ASSERT(tag_v);
6389         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6390         /* Get the metadata register index for the tag. */
6391         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6392         MLX5_ASSERT(reg > 0);
6393         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6394 }
6395
6396 /**
6397  * Add source vport match to the specified matcher.
6398  *
6399  * @param[in, out] matcher
6400  *   Flow matcher.
6401  * @param[in, out] key
6402  *   Flow matcher value.
6403  * @param[in] port
6404  *   Source vport value to match
6405  * @param[in] mask
6406  *   Mask
6407  */
6408 static void
6409 flow_dv_translate_item_source_vport(void *matcher, void *key,
6410                                     int16_t port, uint16_t mask)
6411 {
6412         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6413         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6414
6415         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6416         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6417 }
6418
6419 /**
6420  * Translate port-id item to eswitch match on  port-id.
6421  *
6422  * @param[in] dev
6423  *   The devich to configure through.
6424  * @param[in, out] matcher
6425  *   Flow matcher.
6426  * @param[in, out] key
6427  *   Flow matcher value.
6428  * @param[in] item
6429  *   Flow pattern to translate.
6430  *
6431  * @return
6432  *   0 on success, a negative errno value otherwise.
6433  */
6434 static int
6435 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6436                                void *key, const struct rte_flow_item *item)
6437 {
6438         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6439         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6440         struct mlx5_priv *priv;
6441         uint16_t mask, id;
6442
6443         mask = pid_m ? pid_m->id : 0xffff;
6444         id = pid_v ? pid_v->id : dev->data->port_id;
6445         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6446         if (!priv)
6447                 return -rte_errno;
6448         /* Translate to vport field or to metadata, depending on mode. */
6449         if (priv->vport_meta_mask)
6450                 flow_dv_translate_item_meta_vport(matcher, key,
6451                                                   priv->vport_meta_tag,
6452                                                   priv->vport_meta_mask);
6453         else
6454                 flow_dv_translate_item_source_vport(matcher, key,
6455                                                     priv->vport_id, mask);
6456         return 0;
6457 }
6458
6459 /**
6460  * Add ICMP6 item to matcher and to the value.
6461  *
6462  * @param[in, out] matcher
6463  *   Flow matcher.
6464  * @param[in, out] key
6465  *   Flow matcher value.
6466  * @param[in] item
6467  *   Flow pattern to translate.
6468  * @param[in] inner
6469  *   Item is inner pattern.
6470  */
6471 static void
6472 flow_dv_translate_item_icmp6(void *matcher, void *key,
6473                               const struct rte_flow_item *item,
6474                               int inner)
6475 {
6476         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6477         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6478         void *headers_m;
6479         void *headers_v;
6480         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6481                                      misc_parameters_3);
6482         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6483         if (inner) {
6484                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6485                                          inner_headers);
6486                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6487         } else {
6488                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6489                                          outer_headers);
6490                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6491         }
6492         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6493         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6494         if (!icmp6_v)
6495                 return;
6496         if (!icmp6_m)
6497                 icmp6_m = &rte_flow_item_icmp6_mask;
6498         /*
6499          * Force flow only to match the non-fragmented IPv6 ICMPv6 packets.
6500          * If only the protocol is specified, no need to match the frag.
6501          */
6502         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6503         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6504         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6505         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6506                  icmp6_v->type & icmp6_m->type);
6507         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6508         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6509                  icmp6_v->code & icmp6_m->code);
6510 }
6511
6512 /**
6513  * Add ICMP item to matcher and to the value.
6514  *
6515  * @param[in, out] matcher
6516  *   Flow matcher.
6517  * @param[in, out] key
6518  *   Flow matcher value.
6519  * @param[in] item
6520  *   Flow pattern to translate.
6521  * @param[in] inner
6522  *   Item is inner pattern.
6523  */
6524 static void
6525 flow_dv_translate_item_icmp(void *matcher, void *key,
6526                             const struct rte_flow_item *item,
6527                             int inner)
6528 {
6529         const struct rte_flow_item_icmp *icmp_m = item->mask;
6530         const struct rte_flow_item_icmp *icmp_v = item->spec;
6531         void *headers_m;
6532         void *headers_v;
6533         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6534                                      misc_parameters_3);
6535         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6536         if (inner) {
6537                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6538                                          inner_headers);
6539                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6540         } else {
6541                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6542                                          outer_headers);
6543                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6544         }
6545         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6546         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6547         if (!icmp_v)
6548                 return;
6549         if (!icmp_m)
6550                 icmp_m = &rte_flow_item_icmp_mask;
6551         /*
6552          * Force flow only to match the non-fragmented IPv4 ICMP packets.
6553          * If only the protocol is specified, no need to match the frag.
6554          */
6555         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6556         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6557         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6558                  icmp_m->hdr.icmp_type);
6559         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6560                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6561         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6562                  icmp_m->hdr.icmp_code);
6563         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6564                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6565 }
6566
6567 /**
6568  * Add GTP item to matcher and to the value.
6569  *
6570  * @param[in, out] matcher
6571  *   Flow matcher.
6572  * @param[in, out] key
6573  *   Flow matcher value.
6574  * @param[in] item
6575  *   Flow pattern to translate.
6576  * @param[in] inner
6577  *   Item is inner pattern.
6578  */
6579 static void
6580 flow_dv_translate_item_gtp(void *matcher, void *key,
6581                            const struct rte_flow_item *item, int inner)
6582 {
6583         const struct rte_flow_item_gtp *gtp_m = item->mask;
6584         const struct rte_flow_item_gtp *gtp_v = item->spec;
6585         void *headers_m;
6586         void *headers_v;
6587         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6588                                      misc_parameters_3);
6589         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6590         uint16_t dport = RTE_GTPU_UDP_PORT;
6591
6592         if (inner) {
6593                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6594                                          inner_headers);
6595                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6596         } else {
6597                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6598                                          outer_headers);
6599                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6600         }
6601         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6602                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6603                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6604         }
6605         if (!gtp_v)
6606                 return;
6607         if (!gtp_m)
6608                 gtp_m = &rte_flow_item_gtp_mask;
6609         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6610         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6611                  gtp_v->msg_type & gtp_m->msg_type);
6612         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6613                  rte_be_to_cpu_32(gtp_m->teid));
6614         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6615                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6616 }
6617
6618 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6619
6620 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6621         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6622                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6623
6624 /**
6625  * Calculate flow matcher enable bitmap.
6626  *
6627  * @param match_criteria
6628  *   Pointer to flow matcher criteria.
6629  *
6630  * @return
6631  *   Bitmap of enabled fields.
6632  */
6633 static uint8_t
6634 flow_dv_matcher_enable(uint32_t *match_criteria)
6635 {
6636         uint8_t match_criteria_enable;
6637
6638         match_criteria_enable =
6639                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6640                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6641         match_criteria_enable |=
6642                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6643                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6644         match_criteria_enable |=
6645                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6646                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6647         match_criteria_enable |=
6648                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6649                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6650         match_criteria_enable |=
6651                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6652                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6653         return match_criteria_enable;
6654 }
6655
6656
6657 /**
6658  * Get a flow table.
6659  *
6660  * @param[in, out] dev
6661  *   Pointer to rte_eth_dev structure.
6662  * @param[in] table_id
6663  *   Table id to use.
6664  * @param[in] egress
6665  *   Direction of the table.
6666  * @param[in] transfer
6667  *   E-Switch or NIC flow.
6668  * @param[out] error
6669  *   pointer to error structure.
6670  *
6671  * @return
6672  *   Returns tables resource based on the index, NULL in case of failed.
6673  */
6674 static struct mlx5_flow_tbl_resource *
6675 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6676                          uint32_t table_id, uint8_t egress,
6677                          uint8_t transfer,
6678                          struct rte_flow_error *error)
6679 {
6680         struct mlx5_priv *priv = dev->data->dev_private;
6681         struct mlx5_ibv_shared *sh = priv->sh;
6682         struct mlx5_flow_tbl_resource *tbl;
6683         union mlx5_flow_tbl_key table_key = {
6684                 {
6685                         .table_id = table_id,
6686                         .reserved = 0,
6687                         .domain = !!transfer,
6688                         .direction = !!egress,
6689                 }
6690         };
6691         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6692                                                          table_key.v64);
6693         struct mlx5_flow_tbl_data_entry *tbl_data;
6694         int ret;
6695         void *domain;
6696
6697         if (pos) {
6698                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6699                                         entry);
6700                 tbl = &tbl_data->tbl;
6701                 rte_atomic32_inc(&tbl->refcnt);
6702                 return tbl;
6703         }
6704         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6705         if (!tbl_data) {
6706                 rte_flow_error_set(error, ENOMEM,
6707                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6708                                    NULL,
6709                                    "cannot allocate flow table data entry");
6710                 return NULL;
6711         }
6712         tbl = &tbl_data->tbl;
6713         pos = &tbl_data->entry;
6714         if (transfer)
6715                 domain = sh->fdb_domain;
6716         else if (egress)
6717                 domain = sh->tx_domain;
6718         else
6719                 domain = sh->rx_domain;
6720         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6721         if (!tbl->obj) {
6722                 rte_flow_error_set(error, ENOMEM,
6723                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6724                                    NULL, "cannot create flow table object");
6725                 rte_free(tbl_data);
6726                 return NULL;
6727         }
6728         /*
6729          * No multi-threads now, but still better to initialize the reference
6730          * count before insert it into the hash list.
6731          */
6732         rte_atomic32_init(&tbl->refcnt);
6733         /* Jump action reference count is initialized here. */
6734         rte_atomic32_init(&tbl_data->jump.refcnt);
6735         pos->key = table_key.v64;
6736         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6737         if (ret < 0) {
6738                 rte_flow_error_set(error, -ret,
6739                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6740                                    "cannot insert flow table data entry");
6741                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6742                 rte_free(tbl_data);
6743         }
6744         rte_atomic32_inc(&tbl->refcnt);
6745         return tbl;
6746 }
6747
6748 /**
6749  * Release a flow table.
6750  *
6751  * @param[in] dev
6752  *   Pointer to rte_eth_dev structure.
6753  * @param[in] tbl
6754  *   Table resource to be released.
6755  *
6756  * @return
6757  *   Returns 0 if table was released, else return 1;
6758  */
6759 static int
6760 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6761                              struct mlx5_flow_tbl_resource *tbl)
6762 {
6763         struct mlx5_priv *priv = dev->data->dev_private;
6764         struct mlx5_ibv_shared *sh = priv->sh;
6765         struct mlx5_flow_tbl_data_entry *tbl_data =
6766                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6767
6768         if (!tbl)
6769                 return 0;
6770         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6771                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6772
6773                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6774                 tbl->obj = NULL;
6775                 /* remove the entry from the hash list and free memory. */
6776                 mlx5_hlist_remove(sh->flow_tbls, pos);
6777                 rte_free(tbl_data);
6778                 return 0;
6779         }
6780         return 1;
6781 }
6782
6783 /**
6784  * Register the flow matcher.
6785  *
6786  * @param[in, out] dev
6787  *   Pointer to rte_eth_dev structure.
6788  * @param[in, out] matcher
6789  *   Pointer to flow matcher.
6790  * @param[in, out] key
6791  *   Pointer to flow table key.
6792  * @parm[in, out] dev_flow
6793  *   Pointer to the dev_flow.
6794  * @param[out] error
6795  *   pointer to error structure.
6796  *
6797  * @return
6798  *   0 on success otherwise -errno and errno is set.
6799  */
6800 static int
6801 flow_dv_matcher_register(struct rte_eth_dev *dev,
6802                          struct mlx5_flow_dv_matcher *matcher,
6803                          union mlx5_flow_tbl_key *key,
6804                          struct mlx5_flow *dev_flow,
6805                          struct rte_flow_error *error)
6806 {
6807         struct mlx5_priv *priv = dev->data->dev_private;
6808         struct mlx5_ibv_shared *sh = priv->sh;
6809         struct mlx5_flow_dv_matcher *cache_matcher;
6810         struct mlx5dv_flow_matcher_attr dv_attr = {
6811                 .type = IBV_FLOW_ATTR_NORMAL,
6812                 .match_mask = (void *)&matcher->mask,
6813         };
6814         struct mlx5_flow_tbl_resource *tbl;
6815         struct mlx5_flow_tbl_data_entry *tbl_data;
6816
6817         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6818                                        key->domain, error);
6819         if (!tbl)
6820                 return -rte_errno;      /* No need to refill the error info */
6821         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6822         /* Lookup from cache. */
6823         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6824                 if (matcher->crc == cache_matcher->crc &&
6825                     matcher->priority == cache_matcher->priority &&
6826                     !memcmp((const void *)matcher->mask.buf,
6827                             (const void *)cache_matcher->mask.buf,
6828                             cache_matcher->mask.size)) {
6829                         DRV_LOG(DEBUG,
6830                                 "%s group %u priority %hd use %s "
6831                                 "matcher %p: refcnt %d++",
6832                                 key->domain ? "FDB" : "NIC", key->table_id,
6833                                 cache_matcher->priority,
6834                                 key->direction ? "tx" : "rx",
6835                                 (void *)cache_matcher,
6836                                 rte_atomic32_read(&cache_matcher->refcnt));
6837                         rte_atomic32_inc(&cache_matcher->refcnt);
6838                         dev_flow->dv.matcher = cache_matcher;
6839                         /* old matcher should not make the table ref++. */
6840                         flow_dv_tbl_resource_release(dev, tbl);
6841                         return 0;
6842                 }
6843         }
6844         /* Register new matcher. */
6845         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6846         if (!cache_matcher) {
6847                 flow_dv_tbl_resource_release(dev, tbl);
6848                 return rte_flow_error_set(error, ENOMEM,
6849                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6850                                           "cannot allocate matcher memory");
6851         }
6852         *cache_matcher = *matcher;
6853         dv_attr.match_criteria_enable =
6854                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6855         dv_attr.priority = matcher->priority;
6856         if (key->direction)
6857                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6858         cache_matcher->matcher_object =
6859                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6860         if (!cache_matcher->matcher_object) {
6861                 rte_free(cache_matcher);
6862 #ifdef HAVE_MLX5DV_DR
6863                 flow_dv_tbl_resource_release(dev, tbl);
6864 #endif
6865                 return rte_flow_error_set(error, ENOMEM,
6866                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6867                                           NULL, "cannot create matcher");
6868         }
6869         /* Save the table information */
6870         cache_matcher->tbl = tbl;
6871         rte_atomic32_init(&cache_matcher->refcnt);
6872         /* only matcher ref++, table ref++ already done above in get API. */
6873         rte_atomic32_inc(&cache_matcher->refcnt);
6874         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6875         dev_flow->dv.matcher = cache_matcher;
6876         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6877                 key->domain ? "FDB" : "NIC", key->table_id,
6878                 cache_matcher->priority,
6879                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6880                 rte_atomic32_read(&cache_matcher->refcnt));
6881         return 0;
6882 }
6883
6884 /**
6885  * Find existing tag resource or create and register a new one.
6886  *
6887  * @param dev[in, out]
6888  *   Pointer to rte_eth_dev structure.
6889  * @param[in, out] tag_be24
6890  *   Tag value in big endian then R-shift 8.
6891  * @parm[in, out] dev_flow
6892  *   Pointer to the dev_flow.
6893  * @param[out] error
6894  *   pointer to error structure.
6895  *
6896  * @return
6897  *   0 on success otherwise -errno and errno is set.
6898  */
6899 static int
6900 flow_dv_tag_resource_register
6901                         (struct rte_eth_dev *dev,
6902                          uint32_t tag_be24,
6903                          struct mlx5_flow *dev_flow,
6904                          struct rte_flow_error *error)
6905 {
6906         struct mlx5_priv *priv = dev->data->dev_private;
6907         struct mlx5_ibv_shared *sh = priv->sh;
6908         struct mlx5_flow_dv_tag_resource *cache_resource;
6909         struct mlx5_hlist_entry *entry;
6910
6911         /* Lookup a matching resource from cache. */
6912         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6913         if (entry) {
6914                 cache_resource = container_of
6915                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6916                 rte_atomic32_inc(&cache_resource->refcnt);
6917                 dev_flow->dv.tag_resource = cache_resource;
6918                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6919                         (void *)cache_resource,
6920                         rte_atomic32_read(&cache_resource->refcnt));
6921                 return 0;
6922         }
6923         /* Register new resource. */
6924         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6925         if (!cache_resource)
6926                 return rte_flow_error_set(error, ENOMEM,
6927                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6928                                           "cannot allocate resource memory");
6929         cache_resource->entry.key = (uint64_t)tag_be24;
6930         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6931         if (!cache_resource->action) {
6932                 rte_free(cache_resource);
6933                 return rte_flow_error_set(error, ENOMEM,
6934                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6935                                           NULL, "cannot create action");
6936         }
6937         rte_atomic32_init(&cache_resource->refcnt);
6938         rte_atomic32_inc(&cache_resource->refcnt);
6939         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6940                 mlx5_glue->destroy_flow_action(cache_resource->action);
6941                 rte_free(cache_resource);
6942                 return rte_flow_error_set(error, EEXIST,
6943                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6944                                           NULL, "cannot insert tag");
6945         }
6946         dev_flow->dv.tag_resource = cache_resource;
6947         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6948                 (void *)cache_resource,
6949                 rte_atomic32_read(&cache_resource->refcnt));
6950         return 0;
6951 }
6952
6953 /**
6954  * Release the tag.
6955  *
6956  * @param dev
6957  *   Pointer to Ethernet device.
6958  * @param flow
6959  *   Pointer to mlx5_flow.
6960  *
6961  * @return
6962  *   1 while a reference on it exists, 0 when freed.
6963  */
6964 static int
6965 flow_dv_tag_release(struct rte_eth_dev *dev,
6966                     struct mlx5_flow_dv_tag_resource *tag)
6967 {
6968         struct mlx5_priv *priv = dev->data->dev_private;
6969         struct mlx5_ibv_shared *sh = priv->sh;
6970
6971         MLX5_ASSERT(tag);
6972         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6973                 dev->data->port_id, (void *)tag,
6974                 rte_atomic32_read(&tag->refcnt));
6975         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6976                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6977                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6978                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6979                         dev->data->port_id, (void *)tag);
6980                 rte_free(tag);
6981                 return 0;
6982         }
6983         return 1;
6984 }
6985
6986 /**
6987  * Translate port ID action to vport.
6988  *
6989  * @param[in] dev
6990  *   Pointer to rte_eth_dev structure.
6991  * @param[in] action
6992  *   Pointer to the port ID action.
6993  * @param[out] dst_port_id
6994  *   The target port ID.
6995  * @param[out] error
6996  *   Pointer to the error structure.
6997  *
6998  * @return
6999  *   0 on success, a negative errno value otherwise and rte_errno is set.
7000  */
7001 static int
7002 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
7003                                  const struct rte_flow_action *action,
7004                                  uint32_t *dst_port_id,
7005                                  struct rte_flow_error *error)
7006 {
7007         uint32_t port;
7008         struct mlx5_priv *priv;
7009         const struct rte_flow_action_port_id *conf =
7010                         (const struct rte_flow_action_port_id *)action->conf;
7011
7012         port = conf->original ? dev->data->port_id : conf->id;
7013         priv = mlx5_port_to_eswitch_info(port, false);
7014         if (!priv)
7015                 return rte_flow_error_set(error, -rte_errno,
7016                                           RTE_FLOW_ERROR_TYPE_ACTION,
7017                                           NULL,
7018                                           "No eswitch info was found for port");
7019 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
7020         /*
7021          * This parameter is transferred to
7022          * mlx5dv_dr_action_create_dest_ib_port().
7023          */
7024         *dst_port_id = priv->ibv_port;
7025 #else
7026         /*
7027          * Legacy mode, no LAG configurations is supported.
7028          * This parameter is transferred to
7029          * mlx5dv_dr_action_create_dest_vport().
7030          */
7031         *dst_port_id = priv->vport_id;
7032 #endif
7033         return 0;
7034 }
7035
7036 /**
7037  * Add Tx queue matcher
7038  *
7039  * @param[in] dev
7040  *   Pointer to the dev struct.
7041  * @param[in, out] matcher
7042  *   Flow matcher.
7043  * @param[in, out] key
7044  *   Flow matcher value.
7045  * @param[in] item
7046  *   Flow pattern to translate.
7047  * @param[in] inner
7048  *   Item is inner pattern.
7049  */
7050 static void
7051 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
7052                                 void *matcher, void *key,
7053                                 const struct rte_flow_item *item)
7054 {
7055         const struct mlx5_rte_flow_item_tx_queue *queue_m;
7056         const struct mlx5_rte_flow_item_tx_queue *queue_v;
7057         void *misc_m =
7058                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7059         void *misc_v =
7060                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7061         struct mlx5_txq_ctrl *txq;
7062         uint32_t queue;
7063
7064
7065         queue_m = (const void *)item->mask;
7066         if (!queue_m)
7067                 return;
7068         queue_v = (const void *)item->spec;
7069         if (!queue_v)
7070                 return;
7071         txq = mlx5_txq_get(dev, queue_v->queue);
7072         if (!txq)
7073                 return;
7074         queue = txq->obj->sq->id;
7075         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
7076         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
7077                  queue & queue_m->queue);
7078         mlx5_txq_release(dev, queue_v->queue);
7079 }
7080
7081 /**
7082  * Set the hash fields according to the @p flow information.
7083  *
7084  * @param[in] dev_flow
7085  *   Pointer to the mlx5_flow.
7086  */
7087 static void
7088 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
7089 {
7090         struct rte_flow *flow = dev_flow->flow;
7091         uint64_t items = dev_flow->layers;
7092         int rss_inner = 0;
7093         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
7094
7095         dev_flow->hash_fields = 0;
7096 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
7097         if (flow->rss.level >= 2) {
7098                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
7099                 rss_inner = 1;
7100         }
7101 #endif
7102         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
7103             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
7104                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
7105                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7106                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
7107                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7108                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
7109                         else
7110                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
7111                 }
7112         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
7113                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
7114                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
7115                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7116                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
7117                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7118                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
7119                         else
7120                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
7121                 }
7122         }
7123         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
7124             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
7125                 if (rss_types & ETH_RSS_UDP) {
7126                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7127                                 dev_flow->hash_fields |=
7128                                                 IBV_RX_HASH_SRC_PORT_UDP;
7129                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7130                                 dev_flow->hash_fields |=
7131                                                 IBV_RX_HASH_DST_PORT_UDP;
7132                         else
7133                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
7134                 }
7135         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
7136                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
7137                 if (rss_types & ETH_RSS_TCP) {
7138                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7139                                 dev_flow->hash_fields |=
7140                                                 IBV_RX_HASH_SRC_PORT_TCP;
7141                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7142                                 dev_flow->hash_fields |=
7143                                                 IBV_RX_HASH_DST_PORT_TCP;
7144                         else
7145                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
7146                 }
7147         }
7148 }
7149
7150 /**
7151  * Fill the flow with DV spec, lock free
7152  * (mutex should be acquired by caller).
7153  *
7154  * @param[in] dev
7155  *   Pointer to rte_eth_dev structure.
7156  * @param[in, out] dev_flow
7157  *   Pointer to the sub flow.
7158  * @param[in] attr
7159  *   Pointer to the flow attributes.
7160  * @param[in] items
7161  *   Pointer to the list of items.
7162  * @param[in] actions
7163  *   Pointer to the list of actions.
7164  * @param[out] error
7165  *   Pointer to the error structure.
7166  *
7167  * @return
7168  *   0 on success, a negative errno value otherwise and rte_errno is set.
7169  */
7170 static int
7171 __flow_dv_translate(struct rte_eth_dev *dev,
7172                     struct mlx5_flow *dev_flow,
7173                     const struct rte_flow_attr *attr,
7174                     const struct rte_flow_item items[],
7175                     const struct rte_flow_action actions[],
7176                     struct rte_flow_error *error)
7177 {
7178         struct mlx5_priv *priv = dev->data->dev_private;
7179         struct mlx5_dev_config *dev_conf = &priv->config;
7180         struct rte_flow *flow = dev_flow->flow;
7181         uint64_t item_flags = 0;
7182         uint64_t last_item = 0;
7183         uint64_t action_flags = 0;
7184         uint64_t priority = attr->priority;
7185         struct mlx5_flow_dv_matcher matcher = {
7186                 .mask = {
7187                         .size = sizeof(matcher.mask.buf),
7188                 },
7189         };
7190         int actions_n = 0;
7191         bool actions_end = false;
7192         union {
7193                 struct mlx5_flow_dv_modify_hdr_resource res;
7194                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7195                             sizeof(struct mlx5_modification_cmd) *
7196                             (MLX5_MAX_MODIFY_NUM + 1)];
7197         } mhdr_dummy;
7198         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7199         union flow_dv_attr flow_attr = { .attr = 0 };
7200         uint32_t tag_be;
7201         union mlx5_flow_tbl_key tbl_key;
7202         uint32_t modify_action_position = UINT32_MAX;
7203         void *match_mask = matcher.mask.buf;
7204         void *match_value = dev_flow->dv.value.buf;
7205         uint8_t next_protocol = 0xff;
7206         struct rte_vlan_hdr vlan = { 0 };
7207         uint32_t table;
7208         int ret = 0;
7209
7210         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7211                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7212         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7213                                        !!priv->fdb_def_rule, &table, error);
7214         if (ret)
7215                 return ret;
7216         dev_flow->group = table;
7217         if (attr->transfer)
7218                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7219         if (priority == MLX5_FLOW_PRIO_RSVD)
7220                 priority = dev_conf->flow_prio - 1;
7221         /* number of actions must be set to 0 in case of dirty stack. */
7222         mhdr_res->actions_num = 0;
7223         for (; !actions_end ; actions++) {
7224                 const struct rte_flow_action_queue *queue;
7225                 const struct rte_flow_action_rss *rss;
7226                 const struct rte_flow_action *action = actions;
7227                 const struct rte_flow_action_count *count = action->conf;
7228                 const uint8_t *rss_key;
7229                 const struct rte_flow_action_jump *jump_data;
7230                 const struct rte_flow_action_meter *mtr;
7231                 struct mlx5_flow_tbl_resource *tbl;
7232                 uint32_t port_id = 0;
7233                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7234                 int action_type = actions->type;
7235                 const struct rte_flow_action *found_action = NULL;
7236
7237                 switch (action_type) {
7238                 case RTE_FLOW_ACTION_TYPE_VOID:
7239                         break;
7240                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7241                         if (flow_dv_translate_action_port_id(dev, action,
7242                                                              &port_id, error))
7243                                 return -rte_errno;
7244                         port_id_resource.port_id = port_id;
7245                         if (flow_dv_port_id_action_resource_register
7246                             (dev, &port_id_resource, dev_flow, error))
7247                                 return -rte_errno;
7248                         dev_flow->dv.actions[actions_n++] =
7249                                 dev_flow->dv.port_id_action->action;
7250                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7251                         break;
7252                 case RTE_FLOW_ACTION_TYPE_FLAG:
7253                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7254                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7255                                 struct rte_flow_action_mark mark = {
7256                                         .id = MLX5_FLOW_MARK_DEFAULT,
7257                                 };
7258
7259                                 if (flow_dv_convert_action_mark(dev, &mark,
7260                                                                 mhdr_res,
7261                                                                 error))
7262                                         return -rte_errno;
7263                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7264                                 break;
7265                         }
7266                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7267                         if (!dev_flow->dv.tag_resource)
7268                                 if (flow_dv_tag_resource_register
7269                                     (dev, tag_be, dev_flow, error))
7270                                         return -rte_errno;
7271                         dev_flow->dv.actions[actions_n++] =
7272                                 dev_flow->dv.tag_resource->action;
7273                         break;
7274                 case RTE_FLOW_ACTION_TYPE_MARK:
7275                         action_flags |= MLX5_FLOW_ACTION_MARK;
7276                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7277                                 const struct rte_flow_action_mark *mark =
7278                                         (const struct rte_flow_action_mark *)
7279                                                 actions->conf;
7280
7281                                 if (flow_dv_convert_action_mark(dev, mark,
7282                                                                 mhdr_res,
7283                                                                 error))
7284                                         return -rte_errno;
7285                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7286                                 break;
7287                         }
7288                         /* Fall-through */
7289                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7290                         /* Legacy (non-extensive) MARK action. */
7291                         tag_be = mlx5_flow_mark_set
7292                               (((const struct rte_flow_action_mark *)
7293                                (actions->conf))->id);
7294                         if (!dev_flow->dv.tag_resource)
7295                                 if (flow_dv_tag_resource_register
7296                                     (dev, tag_be, dev_flow, error))
7297                                         return -rte_errno;
7298                         dev_flow->dv.actions[actions_n++] =
7299                                 dev_flow->dv.tag_resource->action;
7300                         break;
7301                 case RTE_FLOW_ACTION_TYPE_SET_META:
7302                         if (flow_dv_convert_action_set_meta
7303                                 (dev, mhdr_res, attr,
7304                                  (const struct rte_flow_action_set_meta *)
7305                                   actions->conf, error))
7306                                 return -rte_errno;
7307                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7308                         break;
7309                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7310                         if (flow_dv_convert_action_set_tag
7311                                 (dev, mhdr_res,
7312                                  (const struct rte_flow_action_set_tag *)
7313                                   actions->conf, error))
7314                                 return -rte_errno;
7315                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7316                         break;
7317                 case RTE_FLOW_ACTION_TYPE_DROP:
7318                         action_flags |= MLX5_FLOW_ACTION_DROP;
7319                         break;
7320                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7321                         MLX5_ASSERT(flow->rss.queue);
7322                         queue = actions->conf;
7323                         flow->rss.queue_num = 1;
7324                         (*flow->rss.queue)[0] = queue->index;
7325                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7326                         break;
7327                 case RTE_FLOW_ACTION_TYPE_RSS:
7328                         MLX5_ASSERT(flow->rss.queue);
7329                         rss = actions->conf;
7330                         if (flow->rss.queue)
7331                                 memcpy((*flow->rss.queue), rss->queue,
7332                                        rss->queue_num * sizeof(uint16_t));
7333                         flow->rss.queue_num = rss->queue_num;
7334                         /* NULL RSS key indicates default RSS key. */
7335                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7336                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7337                         /*
7338                          * rss->level and rss.types should be set in advance
7339                          * when expanding items for RSS.
7340                          */
7341                         action_flags |= MLX5_FLOW_ACTION_RSS;
7342                         break;
7343                 case RTE_FLOW_ACTION_TYPE_COUNT:
7344                         if (!dev_conf->devx) {
7345                                 rte_errno = ENOTSUP;
7346                                 goto cnt_err;
7347                         }
7348                         flow->counter = flow_dv_counter_alloc(dev,
7349                                                               count->shared,
7350                                                               count->id,
7351                                                               dev_flow->group);
7352                         if (flow->counter == NULL)
7353                                 goto cnt_err;
7354                         dev_flow->dv.actions[actions_n++] =
7355                                 flow->counter->action;
7356                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7357                         break;
7358 cnt_err:
7359                         if (rte_errno == ENOTSUP)
7360                                 return rte_flow_error_set
7361                                               (error, ENOTSUP,
7362                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7363                                                NULL,
7364                                                "count action not supported");
7365                         else
7366                                 return rte_flow_error_set
7367                                                 (error, rte_errno,
7368                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7369                                                  action,
7370                                                  "cannot create counter"
7371                                                   " object.");
7372                         break;
7373                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7374                         dev_flow->dv.actions[actions_n++] =
7375                                                 priv->sh->pop_vlan_action;
7376                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7377                         break;
7378                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7379                         flow_dev_get_vlan_info_from_items(items, &vlan);
7380                         vlan.eth_proto = rte_be_to_cpu_16
7381                              ((((const struct rte_flow_action_of_push_vlan *)
7382                                                    actions->conf)->ethertype));
7383                         found_action = mlx5_flow_find_action
7384                                         (actions + 1,
7385                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7386                         if (found_action)
7387                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7388                         found_action = mlx5_flow_find_action
7389                                         (actions + 1,
7390                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7391                         if (found_action)
7392                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7393                         if (flow_dv_create_action_push_vlan
7394                                             (dev, attr, &vlan, dev_flow, error))
7395                                 return -rte_errno;
7396                         dev_flow->dv.actions[actions_n++] =
7397                                            dev_flow->dv.push_vlan_res->action;
7398                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7399                         break;
7400                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7401                         /* of_vlan_push action handled this action */
7402                         MLX5_ASSERT(action_flags &
7403                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7404                         break;
7405                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7406                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7407                                 break;
7408                         flow_dev_get_vlan_info_from_items(items, &vlan);
7409                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7410                         /* If no VLAN push - this is a modify header action */
7411                         if (flow_dv_convert_action_modify_vlan_vid
7412                                                 (mhdr_res, actions, error))
7413                                 return -rte_errno;
7414                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7415                         break;
7416                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7417                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7418                         if (flow_dv_create_action_l2_encap(dev, actions,
7419                                                            dev_flow,
7420                                                            attr->transfer,
7421                                                            error))
7422                                 return -rte_errno;
7423                         dev_flow->dv.actions[actions_n++] =
7424                                 dev_flow->dv.encap_decap->verbs_action;
7425                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7426                         break;
7427                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7428                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7429                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7430                                                            attr->transfer,
7431                                                            error))
7432                                 return -rte_errno;
7433                         dev_flow->dv.actions[actions_n++] =
7434                                 dev_flow->dv.encap_decap->verbs_action;
7435                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7436                         break;
7437                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7438                         /* Handle encap with preceding decap. */
7439                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
7440                                 if (flow_dv_create_action_raw_encap
7441                                         (dev, actions, dev_flow, attr, error))
7442                                         return -rte_errno;
7443                                 dev_flow->dv.actions[actions_n++] =
7444                                         dev_flow->dv.encap_decap->verbs_action;
7445                         } else {
7446                                 /* Handle encap without preceding decap. */
7447                                 if (flow_dv_create_action_l2_encap
7448                                     (dev, actions, dev_flow, attr->transfer,
7449                                      error))
7450                                         return -rte_errno;
7451                                 dev_flow->dv.actions[actions_n++] =
7452                                         dev_flow->dv.encap_decap->verbs_action;
7453                         }
7454                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7455                         break;
7456                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7457                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
7458                                 ;
7459                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7460                                 if (flow_dv_create_action_l2_decap
7461                                     (dev, dev_flow, attr->transfer, error))
7462                                         return -rte_errno;
7463                                 dev_flow->dv.actions[actions_n++] =
7464                                         dev_flow->dv.encap_decap->verbs_action;
7465                         }
7466                         /* If decap is followed by encap, handle it at encap. */
7467                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7468                         break;
7469                 case RTE_FLOW_ACTION_TYPE_JUMP:
7470                         jump_data = action->conf;
7471                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7472                                                        jump_data->group,
7473                                                        !!priv->fdb_def_rule,
7474                                                        &table, error);
7475                         if (ret)
7476                                 return ret;
7477                         tbl = flow_dv_tbl_resource_get(dev, table,
7478                                                        attr->egress,
7479                                                        attr->transfer, error);
7480                         if (!tbl)
7481                                 return rte_flow_error_set
7482                                                 (error, errno,
7483                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7484                                                  NULL,
7485                                                  "cannot create jump action.");
7486                         if (flow_dv_jump_tbl_resource_register
7487                             (dev, tbl, dev_flow, error)) {
7488                                 flow_dv_tbl_resource_release(dev, tbl);
7489                                 return rte_flow_error_set
7490                                                 (error, errno,
7491                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7492                                                  NULL,
7493                                                  "cannot create jump action.");
7494                         }
7495                         dev_flow->dv.actions[actions_n++] =
7496                                 dev_flow->dv.jump->action;
7497                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7498                         break;
7499                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7500                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7501                         if (flow_dv_convert_action_modify_mac
7502                                         (mhdr_res, actions, error))
7503                                 return -rte_errno;
7504                         action_flags |= actions->type ==
7505                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7506                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7507                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7508                         break;
7509                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7510                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7511                         if (flow_dv_convert_action_modify_ipv4
7512                                         (mhdr_res, actions, error))
7513                                 return -rte_errno;
7514                         action_flags |= actions->type ==
7515                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7516                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7517                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7518                         break;
7519                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7520                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7521                         if (flow_dv_convert_action_modify_ipv6
7522                                         (mhdr_res, actions, error))
7523                                 return -rte_errno;
7524                         action_flags |= actions->type ==
7525                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7526                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7527                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7528                         break;
7529                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7530                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7531                         if (flow_dv_convert_action_modify_tp
7532                                         (mhdr_res, actions, items,
7533                                          &flow_attr, dev_flow, !!(action_flags &
7534                                          MLX5_FLOW_ACTION_DECAP), error))
7535                                 return -rte_errno;
7536                         action_flags |= actions->type ==
7537                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7538                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7539                                         MLX5_FLOW_ACTION_SET_TP_DST;
7540                         break;
7541                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7542                         if (flow_dv_convert_action_modify_dec_ttl
7543                                         (mhdr_res, items, &flow_attr, dev_flow,
7544                                          !!(action_flags &
7545                                          MLX5_FLOW_ACTION_DECAP), error))
7546                                 return -rte_errno;
7547                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7548                         break;
7549                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7550                         if (flow_dv_convert_action_modify_ttl
7551                                         (mhdr_res, actions, items, &flow_attr,
7552                                          dev_flow, !!(action_flags &
7553                                          MLX5_FLOW_ACTION_DECAP), error))
7554                                 return -rte_errno;
7555                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7556                         break;
7557                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7558                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7559                         if (flow_dv_convert_action_modify_tcp_seq
7560                                         (mhdr_res, actions, error))
7561                                 return -rte_errno;
7562                         action_flags |= actions->type ==
7563                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7564                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7565                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7566                         break;
7567
7568                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7569                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7570                         if (flow_dv_convert_action_modify_tcp_ack
7571                                         (mhdr_res, actions, error))
7572                                 return -rte_errno;
7573                         action_flags |= actions->type ==
7574                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7575                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7576                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7577                         break;
7578                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7579                         if (flow_dv_convert_action_set_reg
7580                                         (mhdr_res, actions, error))
7581                                 return -rte_errno;
7582                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7583                         break;
7584                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7585                         if (flow_dv_convert_action_copy_mreg
7586                                         (dev, mhdr_res, actions, error))
7587                                 return -rte_errno;
7588                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7589                         break;
7590                 case RTE_FLOW_ACTION_TYPE_METER:
7591                         mtr = actions->conf;
7592                         if (!flow->meter) {
7593                                 flow->meter = mlx5_flow_meter_attach(priv,
7594                                                         mtr->mtr_id, attr,
7595                                                         error);
7596                                 if (!flow->meter)
7597                                         return rte_flow_error_set(error,
7598                                                 rte_errno,
7599                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7600                                                 NULL,
7601                                                 "meter not found "
7602                                                 "or invalid parameters");
7603                         }
7604                         /* Set the meter action. */
7605                         dev_flow->dv.actions[actions_n++] =
7606                                 flow->meter->mfts->meter_action;
7607                         action_flags |= MLX5_FLOW_ACTION_METER;
7608                         break;
7609                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7610                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7611                                                               actions, error))
7612                                 return -rte_errno;
7613                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7614                         break;
7615                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7616                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7617                                                               actions, error))
7618                                 return -rte_errno;
7619                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7620                         break;
7621                 case RTE_FLOW_ACTION_TYPE_END:
7622                         actions_end = true;
7623                         if (mhdr_res->actions_num) {
7624                                 /* create modify action if needed. */
7625                                 if (flow_dv_modify_hdr_resource_register
7626                                         (dev, mhdr_res, dev_flow, error))
7627                                         return -rte_errno;
7628                                 dev_flow->dv.actions[modify_action_position] =
7629                                         dev_flow->dv.modify_hdr->verbs_action;
7630                         }
7631                         break;
7632                 default:
7633                         break;
7634                 }
7635                 if (mhdr_res->actions_num &&
7636                     modify_action_position == UINT32_MAX)
7637                         modify_action_position = actions_n++;
7638         }
7639         dev_flow->dv.actions_n = actions_n;
7640         dev_flow->actions = action_flags;
7641         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7642                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7643                 int item_type = items->type;
7644
7645                 switch (item_type) {
7646                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7647                         flow_dv_translate_item_port_id(dev, match_mask,
7648                                                        match_value, items);
7649                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7650                         break;
7651                 case RTE_FLOW_ITEM_TYPE_ETH:
7652                         flow_dv_translate_item_eth(match_mask, match_value,
7653                                                    items, tunnel);
7654                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7655                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7656                                              MLX5_FLOW_LAYER_OUTER_L2;
7657                         break;
7658                 case RTE_FLOW_ITEM_TYPE_VLAN:
7659                         flow_dv_translate_item_vlan(dev_flow,
7660                                                     match_mask, match_value,
7661                                                     items, tunnel);
7662                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7663                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7664                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7665                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7666                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7667                         break;
7668                 case RTE_FLOW_ITEM_TYPE_IPV4:
7669                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7670                                                   &item_flags, &tunnel);
7671                         flow_dv_translate_item_ipv4(match_mask, match_value,
7672                                                     items, tunnel,
7673                                                     dev_flow->group);
7674                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7675                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7676                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7677                         if (items->mask != NULL &&
7678                             ((const struct rte_flow_item_ipv4 *)
7679                              items->mask)->hdr.next_proto_id) {
7680                                 next_protocol =
7681                                         ((const struct rte_flow_item_ipv4 *)
7682                                          (items->spec))->hdr.next_proto_id;
7683                                 next_protocol &=
7684                                         ((const struct rte_flow_item_ipv4 *)
7685                                          (items->mask))->hdr.next_proto_id;
7686                         } else {
7687                                 /* Reset for inner layer. */
7688                                 next_protocol = 0xff;
7689                         }
7690                         break;
7691                 case RTE_FLOW_ITEM_TYPE_IPV6:
7692                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7693                                                   &item_flags, &tunnel);
7694                         flow_dv_translate_item_ipv6(match_mask, match_value,
7695                                                     items, tunnel,
7696                                                     dev_flow->group);
7697                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7698                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7699                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7700                         if (items->mask != NULL &&
7701                             ((const struct rte_flow_item_ipv6 *)
7702                              items->mask)->hdr.proto) {
7703                                 next_protocol =
7704                                         ((const struct rte_flow_item_ipv6 *)
7705                                          items->spec)->hdr.proto;
7706                                 next_protocol &=
7707                                         ((const struct rte_flow_item_ipv6 *)
7708                                          items->mask)->hdr.proto;
7709                         } else {
7710                                 /* Reset for inner layer. */
7711                                 next_protocol = 0xff;
7712                         }
7713                         break;
7714                 case RTE_FLOW_ITEM_TYPE_TCP:
7715                         flow_dv_translate_item_tcp(match_mask, match_value,
7716                                                    items, tunnel);
7717                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7718                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7719                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7720                         break;
7721                 case RTE_FLOW_ITEM_TYPE_UDP:
7722                         flow_dv_translate_item_udp(match_mask, match_value,
7723                                                    items, tunnel);
7724                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7725                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7726                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7727                         break;
7728                 case RTE_FLOW_ITEM_TYPE_GRE:
7729                         flow_dv_translate_item_gre(match_mask, match_value,
7730                                                    items, tunnel);
7731                         matcher.priority = flow->rss.level >= 2 ?
7732                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7733                         last_item = MLX5_FLOW_LAYER_GRE;
7734                         break;
7735                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7736                         flow_dv_translate_item_gre_key(match_mask,
7737                                                        match_value, items);
7738                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7739                         break;
7740                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7741                         flow_dv_translate_item_nvgre(match_mask, match_value,
7742                                                      items, tunnel);
7743                         matcher.priority = flow->rss.level >= 2 ?
7744                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7745                         last_item = MLX5_FLOW_LAYER_GRE;
7746                         break;
7747                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7748                         flow_dv_translate_item_vxlan(match_mask, match_value,
7749                                                      items, tunnel);
7750                         matcher.priority = flow->rss.level >= 2 ?
7751                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7752                         last_item = MLX5_FLOW_LAYER_VXLAN;
7753                         break;
7754                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7755                         flow_dv_translate_item_vxlan_gpe(match_mask,
7756                                                          match_value, items,
7757                                                          tunnel);
7758                         matcher.priority = flow->rss.level >= 2 ?
7759                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7760                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7761                         break;
7762                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7763                         flow_dv_translate_item_geneve(match_mask, match_value,
7764                                                       items, tunnel);
7765                         matcher.priority = flow->rss.level >= 2 ?
7766                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7767                         last_item = MLX5_FLOW_LAYER_GENEVE;
7768                         break;
7769                 case RTE_FLOW_ITEM_TYPE_MPLS:
7770                         flow_dv_translate_item_mpls(match_mask, match_value,
7771                                                     items, last_item, tunnel);
7772                         matcher.priority = flow->rss.level >= 2 ?
7773                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7774                         last_item = MLX5_FLOW_LAYER_MPLS;
7775                         break;
7776                 case RTE_FLOW_ITEM_TYPE_MARK:
7777                         flow_dv_translate_item_mark(dev, match_mask,
7778                                                     match_value, items);
7779                         last_item = MLX5_FLOW_ITEM_MARK;
7780                         break;
7781                 case RTE_FLOW_ITEM_TYPE_META:
7782                         flow_dv_translate_item_meta(dev, match_mask,
7783                                                     match_value, attr, items);
7784                         last_item = MLX5_FLOW_ITEM_METADATA;
7785                         break;
7786                 case RTE_FLOW_ITEM_TYPE_ICMP:
7787                         flow_dv_translate_item_icmp(match_mask, match_value,
7788                                                     items, tunnel);
7789                         last_item = MLX5_FLOW_LAYER_ICMP;
7790                         break;
7791                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7792                         flow_dv_translate_item_icmp6(match_mask, match_value,
7793                                                       items, tunnel);
7794                         last_item = MLX5_FLOW_LAYER_ICMP6;
7795                         break;
7796                 case RTE_FLOW_ITEM_TYPE_TAG:
7797                         flow_dv_translate_item_tag(dev, match_mask,
7798                                                    match_value, items);
7799                         last_item = MLX5_FLOW_ITEM_TAG;
7800                         break;
7801                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7802                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7803                                                         match_value, items);
7804                         last_item = MLX5_FLOW_ITEM_TAG;
7805                         break;
7806                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7807                         flow_dv_translate_item_tx_queue(dev, match_mask,
7808                                                         match_value,
7809                                                         items);
7810                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7811                         break;
7812                 case RTE_FLOW_ITEM_TYPE_GTP:
7813                         flow_dv_translate_item_gtp(match_mask, match_value,
7814                                                    items, tunnel);
7815                         matcher.priority = flow->rss.level >= 2 ?
7816                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7817                         last_item = MLX5_FLOW_LAYER_GTP;
7818                         break;
7819                 default:
7820                         break;
7821                 }
7822                 item_flags |= last_item;
7823         }
7824         /*
7825          * When E-Switch mode is enabled, we have two cases where we need to
7826          * set the source port manually.
7827          * The first one, is in case of Nic steering rule, and the second is
7828          * E-Switch rule where no port_id item was found. In both cases
7829          * the source port is set according the current port in use.
7830          */
7831         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7832             (priv->representor || priv->master)) {
7833                 if (flow_dv_translate_item_port_id(dev, match_mask,
7834                                                    match_value, NULL))
7835                         return -rte_errno;
7836         }
7837 #ifdef RTE_LIBRTE_MLX5_DEBUG
7838         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
7839                                               dev_flow->dv.value.buf));
7840 #endif
7841         /*
7842          * Layers may be already initialized from prefix flow if this dev_flow
7843          * is the suffix flow.
7844          */
7845         dev_flow->layers |= item_flags;
7846         if (action_flags & MLX5_FLOW_ACTION_RSS)
7847                 flow_dv_hashfields_set(dev_flow);
7848         /* Register matcher. */
7849         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7850                                     matcher.mask.size);
7851         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7852                                                      matcher.priority);
7853         /* reserved field no needs to be set to 0 here. */
7854         tbl_key.domain = attr->transfer;
7855         tbl_key.direction = attr->egress;
7856         tbl_key.table_id = dev_flow->group;
7857         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7858                 return -rte_errno;
7859         return 0;
7860 }
7861
7862 /**
7863  * Apply the flow to the NIC, lock free,
7864  * (mutex should be acquired by caller).
7865  *
7866  * @param[in] dev
7867  *   Pointer to the Ethernet device structure.
7868  * @param[in, out] flow
7869  *   Pointer to flow structure.
7870  * @param[out] error
7871  *   Pointer to error structure.
7872  *
7873  * @return
7874  *   0 on success, a negative errno value otherwise and rte_errno is set.
7875  */
7876 static int
7877 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7878                 struct rte_flow_error *error)
7879 {
7880         struct mlx5_flow_dv *dv;
7881         struct mlx5_flow *dev_flow;
7882         struct mlx5_priv *priv = dev->data->dev_private;
7883         int n;
7884         int err;
7885
7886         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7887                 dv = &dev_flow->dv;
7888                 n = dv->actions_n;
7889                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7890                         if (dev_flow->transfer) {
7891                                 dv->actions[n++] = priv->sh->esw_drop_action;
7892                         } else {
7893                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7894                                 if (!dv->hrxq) {
7895                                         rte_flow_error_set
7896                                                 (error, errno,
7897                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7898                                                  NULL,
7899                                                  "cannot get drop hash queue");
7900                                         goto error;
7901                                 }
7902                                 dv->actions[n++] = dv->hrxq->action;
7903                         }
7904                 } else if (dev_flow->actions &
7905                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7906                         struct mlx5_hrxq *hrxq;
7907
7908                         MLX5_ASSERT(flow->rss.queue);
7909                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7910                                              MLX5_RSS_HASH_KEY_LEN,
7911                                              dev_flow->hash_fields,
7912                                              (*flow->rss.queue),
7913                                              flow->rss.queue_num);
7914                         if (!hrxq) {
7915                                 hrxq = mlx5_hrxq_new
7916                                         (dev, flow->rss.key,
7917                                          MLX5_RSS_HASH_KEY_LEN,
7918                                          dev_flow->hash_fields,
7919                                          (*flow->rss.queue),
7920                                          flow->rss.queue_num,
7921                                          !!(dev_flow->layers &
7922                                             MLX5_FLOW_LAYER_TUNNEL));
7923                         }
7924                         if (!hrxq) {
7925                                 rte_flow_error_set
7926                                         (error, rte_errno,
7927                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7928                                          "cannot get hash queue");
7929                                 goto error;
7930                         }
7931                         dv->hrxq = hrxq;
7932                         dv->actions[n++] = dv->hrxq->action;
7933                 }
7934                 dv->flow =
7935                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7936                                                   (void *)&dv->value, n,
7937                                                   dv->actions);
7938                 if (!dv->flow) {
7939                         rte_flow_error_set(error, errno,
7940                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7941                                            NULL,
7942                                            "hardware refuses to create flow");
7943                         goto error;
7944                 }
7945                 if (priv->vmwa_context &&
7946                     dev_flow->dv.vf_vlan.tag &&
7947                     !dev_flow->dv.vf_vlan.created) {
7948                         /*
7949                          * The rule contains the VLAN pattern.
7950                          * For VF we are going to create VLAN
7951                          * interface to make hypervisor set correct
7952                          * e-Switch vport context.
7953                          */
7954                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7955                 }
7956         }
7957         return 0;
7958 error:
7959         err = rte_errno; /* Save rte_errno before cleanup. */
7960         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7961                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7962                 if (dv->hrxq) {
7963                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7964                                 mlx5_hrxq_drop_release(dev);
7965                         else
7966                                 mlx5_hrxq_release(dev, dv->hrxq);
7967                         dv->hrxq = NULL;
7968                 }
7969                 if (dev_flow->dv.vf_vlan.tag &&
7970                     dev_flow->dv.vf_vlan.created)
7971                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7972         }
7973         rte_errno = err; /* Restore rte_errno. */
7974         return -rte_errno;
7975 }
7976
7977 /**
7978  * Release the flow matcher.
7979  *
7980  * @param dev
7981  *   Pointer to Ethernet device.
7982  * @param flow
7983  *   Pointer to mlx5_flow.
7984  *
7985  * @return
7986  *   1 while a reference on it exists, 0 when freed.
7987  */
7988 static int
7989 flow_dv_matcher_release(struct rte_eth_dev *dev,
7990                         struct mlx5_flow *flow)
7991 {
7992         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7993
7994         MLX5_ASSERT(matcher->matcher_object);
7995         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7996                 dev->data->port_id, (void *)matcher,
7997                 rte_atomic32_read(&matcher->refcnt));
7998         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7999                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8000                            (matcher->matcher_object));
8001                 LIST_REMOVE(matcher, next);
8002                 /* table ref-- in release interface. */
8003                 flow_dv_tbl_resource_release(dev, matcher->tbl);
8004                 rte_free(matcher);
8005                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
8006                         dev->data->port_id, (void *)matcher);
8007                 return 0;
8008         }
8009         return 1;
8010 }
8011
8012 /**
8013  * Release an encap/decap resource.
8014  *
8015  * @param flow
8016  *   Pointer to mlx5_flow.
8017  *
8018  * @return
8019  *   1 while a reference on it exists, 0 when freed.
8020  */
8021 static int
8022 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
8023 {
8024         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
8025                                                 flow->dv.encap_decap;
8026
8027         MLX5_ASSERT(cache_resource->verbs_action);
8028         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
8029                 (void *)cache_resource,
8030                 rte_atomic32_read(&cache_resource->refcnt));
8031         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8032                 claim_zero(mlx5_glue->destroy_flow_action
8033                                 (cache_resource->verbs_action));
8034                 LIST_REMOVE(cache_resource, next);
8035                 rte_free(cache_resource);
8036                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
8037                         (void *)cache_resource);
8038                 return 0;
8039         }
8040         return 1;
8041 }
8042
8043 /**
8044  * Release an jump to table action resource.
8045  *
8046  * @param dev
8047  *   Pointer to Ethernet device.
8048  * @param flow
8049  *   Pointer to mlx5_flow.
8050  *
8051  * @return
8052  *   1 while a reference on it exists, 0 when freed.
8053  */
8054 static int
8055 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
8056                                   struct mlx5_flow *flow)
8057 {
8058         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
8059         struct mlx5_flow_tbl_data_entry *tbl_data =
8060                         container_of(cache_resource,
8061                                      struct mlx5_flow_tbl_data_entry, jump);
8062
8063         MLX5_ASSERT(cache_resource->action);
8064         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
8065                 (void *)cache_resource,
8066                 rte_atomic32_read(&cache_resource->refcnt));
8067         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8068                 claim_zero(mlx5_glue->destroy_flow_action
8069                                 (cache_resource->action));
8070                 /* jump action memory free is inside the table release. */
8071                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
8072                 DRV_LOG(DEBUG, "jump table resource %p: removed",
8073                         (void *)cache_resource);
8074                 return 0;
8075         }
8076         return 1;
8077 }
8078
8079 /**
8080  * Release a modify-header resource.
8081  *
8082  * @param flow
8083  *   Pointer to mlx5_flow.
8084  *
8085  * @return
8086  *   1 while a reference on it exists, 0 when freed.
8087  */
8088 static int
8089 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
8090 {
8091         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
8092                                                 flow->dv.modify_hdr;
8093
8094         MLX5_ASSERT(cache_resource->verbs_action);
8095         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
8096                 (void *)cache_resource,
8097                 rte_atomic32_read(&cache_resource->refcnt));
8098         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8099                 claim_zero(mlx5_glue->destroy_flow_action
8100                                 (cache_resource->verbs_action));
8101                 LIST_REMOVE(cache_resource, next);
8102                 rte_free(cache_resource);
8103                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
8104                         (void *)cache_resource);
8105                 return 0;
8106         }
8107         return 1;
8108 }
8109
8110 /**
8111  * Release port ID action resource.
8112  *
8113  * @param flow
8114  *   Pointer to mlx5_flow.
8115  *
8116  * @return
8117  *   1 while a reference on it exists, 0 when freed.
8118  */
8119 static int
8120 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
8121 {
8122         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
8123                 flow->dv.port_id_action;
8124
8125         MLX5_ASSERT(cache_resource->action);
8126         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
8127                 (void *)cache_resource,
8128                 rte_atomic32_read(&cache_resource->refcnt));
8129         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8130                 claim_zero(mlx5_glue->destroy_flow_action
8131                                 (cache_resource->action));
8132                 LIST_REMOVE(cache_resource, next);
8133                 rte_free(cache_resource);
8134                 DRV_LOG(DEBUG, "port id action resource %p: removed",
8135                         (void *)cache_resource);
8136                 return 0;
8137         }
8138         return 1;
8139 }
8140
8141 /**
8142  * Release push vlan action resource.
8143  *
8144  * @param flow
8145  *   Pointer to mlx5_flow.
8146  *
8147  * @return
8148  *   1 while a reference on it exists, 0 when freed.
8149  */
8150 static int
8151 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
8152 {
8153         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
8154                 flow->dv.push_vlan_res;
8155
8156         MLX5_ASSERT(cache_resource->action);
8157         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
8158                 (void *)cache_resource,
8159                 rte_atomic32_read(&cache_resource->refcnt));
8160         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8161                 claim_zero(mlx5_glue->destroy_flow_action
8162                                 (cache_resource->action));
8163                 LIST_REMOVE(cache_resource, next);
8164                 rte_free(cache_resource);
8165                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
8166                         (void *)cache_resource);
8167                 return 0;
8168         }
8169         return 1;
8170 }
8171
8172 /**
8173  * Remove the flow from the NIC but keeps it in memory.
8174  * Lock free, (mutex should be acquired by caller).
8175  *
8176  * @param[in] dev
8177  *   Pointer to Ethernet device.
8178  * @param[in, out] flow
8179  *   Pointer to flow structure.
8180  */
8181 static void
8182 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8183 {
8184         struct mlx5_flow_dv *dv;
8185         struct mlx5_flow *dev_flow;
8186
8187         if (!flow)
8188                 return;
8189         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8190                 dv = &dev_flow->dv;
8191                 if (dv->flow) {
8192                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
8193                         dv->flow = NULL;
8194                 }
8195                 if (dv->hrxq) {
8196                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8197                                 mlx5_hrxq_drop_release(dev);
8198                         else
8199                                 mlx5_hrxq_release(dev, dv->hrxq);
8200                         dv->hrxq = NULL;
8201                 }
8202                 if (dev_flow->dv.vf_vlan.tag &&
8203                     dev_flow->dv.vf_vlan.created)
8204                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8205         }
8206 }
8207
8208 /**
8209  * Remove the flow from the NIC and the memory.
8210  * Lock free, (mutex should be acquired by caller).
8211  *
8212  * @param[in] dev
8213  *   Pointer to the Ethernet device structure.
8214  * @param[in, out] flow
8215  *   Pointer to flow structure.
8216  */
8217 static void
8218 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8219 {
8220         struct mlx5_flow *dev_flow;
8221
8222         if (!flow)
8223                 return;
8224         __flow_dv_remove(dev, flow);
8225         if (flow->counter) {
8226                 flow_dv_counter_release(dev, flow->counter);
8227                 flow->counter = NULL;
8228         }
8229         if (flow->meter) {
8230                 mlx5_flow_meter_detach(flow->meter);
8231                 flow->meter = NULL;
8232         }
8233         while (!LIST_EMPTY(&flow->dev_flows)) {
8234                 dev_flow = LIST_FIRST(&flow->dev_flows);
8235                 LIST_REMOVE(dev_flow, next);
8236                 if (dev_flow->dv.matcher)
8237                         flow_dv_matcher_release(dev, dev_flow);
8238                 if (dev_flow->dv.encap_decap)
8239                         flow_dv_encap_decap_resource_release(dev_flow);
8240                 if (dev_flow->dv.modify_hdr)
8241                         flow_dv_modify_hdr_resource_release(dev_flow);
8242                 if (dev_flow->dv.jump)
8243                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8244                 if (dev_flow->dv.port_id_action)
8245                         flow_dv_port_id_action_resource_release(dev_flow);
8246                 if (dev_flow->dv.push_vlan_res)
8247                         flow_dv_push_vlan_action_resource_release(dev_flow);
8248                 if (dev_flow->dv.tag_resource)
8249                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8250                 rte_free(dev_flow);
8251         }
8252 }
8253
8254 /**
8255  * Query a dv flow  rule for its statistics via devx.
8256  *
8257  * @param[in] dev
8258  *   Pointer to Ethernet device.
8259  * @param[in] flow
8260  *   Pointer to the sub flow.
8261  * @param[out] data
8262  *   data retrieved by the query.
8263  * @param[out] error
8264  *   Perform verbose error reporting if not NULL.
8265  *
8266  * @return
8267  *   0 on success, a negative errno value otherwise and rte_errno is set.
8268  */
8269 static int
8270 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8271                     void *data, struct rte_flow_error *error)
8272 {
8273         struct mlx5_priv *priv = dev->data->dev_private;
8274         struct rte_flow_query_count *qc = data;
8275
8276         if (!priv->config.devx)
8277                 return rte_flow_error_set(error, ENOTSUP,
8278                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8279                                           NULL,
8280                                           "counters are not supported");
8281         if (flow->counter) {
8282                 uint64_t pkts, bytes;
8283                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8284                                                &bytes);
8285
8286                 if (err)
8287                         return rte_flow_error_set(error, -err,
8288                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8289                                         NULL, "cannot read counters");
8290                 qc->hits_set = 1;
8291                 qc->bytes_set = 1;
8292                 qc->hits = pkts - flow->counter->hits;
8293                 qc->bytes = bytes - flow->counter->bytes;
8294                 if (qc->reset) {
8295                         flow->counter->hits = pkts;
8296                         flow->counter->bytes = bytes;
8297                 }
8298                 return 0;
8299         }
8300         return rte_flow_error_set(error, EINVAL,
8301                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8302                                   NULL,
8303                                   "counters are not available");
8304 }
8305
8306 /**
8307  * Query a flow.
8308  *
8309  * @see rte_flow_query()
8310  * @see rte_flow_ops
8311  */
8312 static int
8313 flow_dv_query(struct rte_eth_dev *dev,
8314               struct rte_flow *flow __rte_unused,
8315               const struct rte_flow_action *actions __rte_unused,
8316               void *data __rte_unused,
8317               struct rte_flow_error *error __rte_unused)
8318 {
8319         int ret = -EINVAL;
8320
8321         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8322                 switch (actions->type) {
8323                 case RTE_FLOW_ACTION_TYPE_VOID:
8324                         break;
8325                 case RTE_FLOW_ACTION_TYPE_COUNT:
8326                         ret = flow_dv_query_count(dev, flow, data, error);
8327                         break;
8328                 default:
8329                         return rte_flow_error_set(error, ENOTSUP,
8330                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8331                                                   actions,
8332                                                   "action not supported");
8333                 }
8334         }
8335         return ret;
8336 }
8337
8338 /**
8339  * Destroy the meter table set.
8340  * Lock free, (mutex should be acquired by caller).
8341  *
8342  * @param[in] dev
8343  *   Pointer to Ethernet device.
8344  * @param[in] tbl
8345  *   Pointer to the meter table set.
8346  *
8347  * @return
8348  *   Always 0.
8349  */
8350 static int
8351 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8352                         struct mlx5_meter_domains_infos *tbl)
8353 {
8354         struct mlx5_priv *priv = dev->data->dev_private;
8355         struct mlx5_meter_domains_infos *mtd =
8356                                 (struct mlx5_meter_domains_infos *)tbl;
8357
8358         if (!mtd || !priv->config.dv_flow_en)
8359                 return 0;
8360         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8361                 claim_zero(mlx5_glue->dv_destroy_flow
8362                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8363         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8364                 claim_zero(mlx5_glue->dv_destroy_flow
8365                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8366         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8367                 claim_zero(mlx5_glue->dv_destroy_flow
8368                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8369         if (mtd->egress.color_matcher)
8370                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8371                           (mtd->egress.color_matcher));
8372         if (mtd->egress.any_matcher)
8373                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8374                           (mtd->egress.any_matcher));
8375         if (mtd->egress.tbl)
8376                 claim_zero(flow_dv_tbl_resource_release(dev,
8377                                                         mtd->egress.tbl));
8378         if (mtd->ingress.color_matcher)
8379                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8380                           (mtd->ingress.color_matcher));
8381         if (mtd->ingress.any_matcher)
8382                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8383                           (mtd->ingress.any_matcher));
8384         if (mtd->ingress.tbl)
8385                 claim_zero(flow_dv_tbl_resource_release(dev,
8386                                                         mtd->ingress.tbl));
8387         if (mtd->transfer.color_matcher)
8388                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8389                           (mtd->transfer.color_matcher));
8390         if (mtd->transfer.any_matcher)
8391                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8392                           (mtd->transfer.any_matcher));
8393         if (mtd->transfer.tbl)
8394                 claim_zero(flow_dv_tbl_resource_release(dev,
8395                                                         mtd->transfer.tbl));
8396         if (mtd->drop_actn)
8397                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8398         rte_free(mtd);
8399         return 0;
8400 }
8401
8402 /* Number of meter flow actions, count and jump or count and drop. */
8403 #define METER_ACTIONS 2
8404
8405 /**
8406  * Create specify domain meter table and suffix table.
8407  *
8408  * @param[in] dev
8409  *   Pointer to Ethernet device.
8410  * @param[in,out] mtb
8411  *   Pointer to DV meter table set.
8412  * @param[in] egress
8413  *   Table attribute.
8414  * @param[in] transfer
8415  *   Table attribute.
8416  * @param[in] color_reg_c_idx
8417  *   Reg C index for color match.
8418  *
8419  * @return
8420  *   0 on success, -1 otherwise and rte_errno is set.
8421  */
8422 static int
8423 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8424                            struct mlx5_meter_domains_infos *mtb,
8425                            uint8_t egress, uint8_t transfer,
8426                            uint32_t color_reg_c_idx)
8427 {
8428         struct mlx5_priv *priv = dev->data->dev_private;
8429         struct mlx5_ibv_shared *sh = priv->sh;
8430         struct mlx5_flow_dv_match_params mask = {
8431                 .size = sizeof(mask.buf),
8432         };
8433         struct mlx5_flow_dv_match_params value = {
8434                 .size = sizeof(value.buf),
8435         };
8436         struct mlx5dv_flow_matcher_attr dv_attr = {
8437                 .type = IBV_FLOW_ATTR_NORMAL,
8438                 .priority = 0,
8439                 .match_criteria_enable = 0,
8440                 .match_mask = (void *)&mask,
8441         };
8442         void *actions[METER_ACTIONS];
8443         struct mlx5_flow_tbl_resource **sfx_tbl;
8444         struct mlx5_meter_domain_info *dtb;
8445         struct rte_flow_error error;
8446         int i = 0;
8447
8448         if (transfer) {
8449                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8450                 dtb = &mtb->transfer;
8451         } else if (egress) {
8452                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8453                 dtb = &mtb->egress;
8454         } else {
8455                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8456                 dtb = &mtb->ingress;
8457         }
8458         /* If the suffix table in missing, create it. */
8459         if (!(*sfx_tbl)) {
8460                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8461                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8462                                                 egress, transfer, &error);
8463                 if (!(*sfx_tbl)) {
8464                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8465                         return -1;
8466                 }
8467         }
8468         /* Create the meter table with METER level. */
8469         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8470                                             egress, transfer, &error);
8471         if (!dtb->tbl) {
8472                 DRV_LOG(ERR, "Failed to create meter policer table.");
8473                 return -1;
8474         }
8475         /* Create matchers, Any and Color. */
8476         dv_attr.priority = 3;
8477         dv_attr.match_criteria_enable = 0;
8478         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8479                                                              &dv_attr,
8480                                                              dtb->tbl->obj);
8481         if (!dtb->any_matcher) {
8482                 DRV_LOG(ERR, "Failed to create meter"
8483                              " policer default matcher.");
8484                 goto error_exit;
8485         }
8486         dv_attr.priority = 0;
8487         dv_attr.match_criteria_enable =
8488                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8489         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8490                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8491         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8492                                                                &dv_attr,
8493                                                                dtb->tbl->obj);
8494         if (!dtb->color_matcher) {
8495                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8496                 goto error_exit;
8497         }
8498         if (mtb->count_actns[RTE_MTR_DROPPED])
8499                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8500         actions[i++] = mtb->drop_actn;
8501         /* Default rule: lowest priority, match any, actions: drop. */
8502         dtb->policer_rules[RTE_MTR_DROPPED] =
8503                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8504                                                  (void *)&value, i, actions);
8505         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8506                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8507                 goto error_exit;
8508         }
8509         return 0;
8510 error_exit:
8511         return -1;
8512 }
8513
8514 /**
8515  * Create the needed meter and suffix tables.
8516  * Lock free, (mutex should be acquired by caller).
8517  *
8518  * @param[in] dev
8519  *   Pointer to Ethernet device.
8520  * @param[in] fm
8521  *   Pointer to the flow meter.
8522  *
8523  * @return
8524  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8525  */
8526 static struct mlx5_meter_domains_infos *
8527 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8528                        const struct mlx5_flow_meter *fm)
8529 {
8530         struct mlx5_priv *priv = dev->data->dev_private;
8531         struct mlx5_meter_domains_infos *mtb;
8532         int ret;
8533         int i;
8534
8535         if (!priv->mtr_en) {
8536                 rte_errno = ENOTSUP;
8537                 return NULL;
8538         }
8539         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8540         if (!mtb) {
8541                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8542                 return NULL;
8543         }
8544         /* Create meter count actions */
8545         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8546                 if (!fm->policer_stats.cnt[i])
8547                         continue;
8548                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8549         }
8550         /* Create drop action. */
8551         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8552         if (!mtb->drop_actn) {
8553                 DRV_LOG(ERR, "Failed to create drop action.");
8554                 goto error_exit;
8555         }
8556         /* Egress meter table. */
8557         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8558         if (ret) {
8559                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8560                 goto error_exit;
8561         }
8562         /* Ingress meter table. */
8563         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8564         if (ret) {
8565                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8566                 goto error_exit;
8567         }
8568         /* FDB meter table. */
8569         if (priv->config.dv_esw_en) {
8570                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8571                                                  priv->mtr_color_reg);
8572                 if (ret) {
8573                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8574                         goto error_exit;
8575                 }
8576         }
8577         return mtb;
8578 error_exit:
8579         flow_dv_destroy_mtr_tbl(dev, mtb);
8580         return NULL;
8581 }
8582
8583 /**
8584  * Destroy domain policer rule.
8585  *
8586  * @param[in] dt
8587  *   Pointer to domain table.
8588  */
8589 static void
8590 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8591 {
8592         int i;
8593
8594         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8595                 if (dt->policer_rules[i]) {
8596                         claim_zero(mlx5_glue->dv_destroy_flow
8597                                   (dt->policer_rules[i]));
8598                         dt->policer_rules[i] = NULL;
8599                 }
8600         }
8601         if (dt->jump_actn) {
8602                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8603                 dt->jump_actn = NULL;
8604         }
8605 }
8606
8607 /**
8608  * Destroy policer rules.
8609  *
8610  * @param[in] dev
8611  *   Pointer to Ethernet device.
8612  * @param[in] fm
8613  *   Pointer to flow meter structure.
8614  * @param[in] attr
8615  *   Pointer to flow attributes.
8616  *
8617  * @return
8618  *   Always 0.
8619  */
8620 static int
8621 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8622                               const struct mlx5_flow_meter *fm,
8623                               const struct rte_flow_attr *attr)
8624 {
8625         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8626
8627         if (!mtb)
8628                 return 0;
8629         if (attr->egress)
8630                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8631         if (attr->ingress)
8632                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8633         if (attr->transfer)
8634                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8635         return 0;
8636 }
8637
8638 /**
8639  * Create specify domain meter policer rule.
8640  *
8641  * @param[in] fm
8642  *   Pointer to flow meter structure.
8643  * @param[in] mtb
8644  *   Pointer to DV meter table set.
8645  * @param[in] sfx_tb
8646  *   Pointer to suffix table.
8647  * @param[in] mtr_reg_c
8648  *   Color match REG_C.
8649  *
8650  * @return
8651  *   0 on success, -1 otherwise.
8652  */
8653 static int
8654 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8655                                     struct mlx5_meter_domain_info *dtb,
8656                                     struct mlx5_flow_tbl_resource *sfx_tb,
8657                                     uint8_t mtr_reg_c)
8658 {
8659         struct mlx5_flow_dv_match_params matcher = {
8660                 .size = sizeof(matcher.buf),
8661         };
8662         struct mlx5_flow_dv_match_params value = {
8663                 .size = sizeof(value.buf),
8664         };
8665         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8666         void *actions[METER_ACTIONS];
8667         int i;
8668
8669         /* Create jump action. */
8670         if (!sfx_tb)
8671                 return -1;
8672         if (!dtb->jump_actn)
8673                 dtb->jump_actn =
8674                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8675                                                         (sfx_tb->obj);
8676         if (!dtb->jump_actn) {
8677                 DRV_LOG(ERR, "Failed to create policer jump action.");
8678                 goto error;
8679         }
8680         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8681                 int j = 0;
8682
8683                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8684                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8685                 if (mtb->count_actns[i])
8686                         actions[j++] = mtb->count_actns[i];
8687                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8688                         actions[j++] = mtb->drop_actn;
8689                 else
8690                         actions[j++] = dtb->jump_actn;
8691                 dtb->policer_rules[i] =
8692                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8693                                                  (void *)&value,
8694                                                   j, actions);
8695                 if (!dtb->policer_rules[i]) {
8696                         DRV_LOG(ERR, "Failed to create policer rule.");
8697                         goto error;
8698                 }
8699         }
8700         return 0;
8701 error:
8702         rte_errno = errno;
8703         return -1;
8704 }
8705
8706 /**
8707  * Create policer rules.
8708  *
8709  * @param[in] dev
8710  *   Pointer to Ethernet device.
8711  * @param[in] fm
8712  *   Pointer to flow meter structure.
8713  * @param[in] attr
8714  *   Pointer to flow attributes.
8715  *
8716  * @return
8717  *   0 on success, -1 otherwise.
8718  */
8719 static int
8720 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8721                              struct mlx5_flow_meter *fm,
8722                              const struct rte_flow_attr *attr)
8723 {
8724         struct mlx5_priv *priv = dev->data->dev_private;
8725         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8726         int ret;
8727
8728         if (attr->egress) {
8729                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8730                                                 priv->sh->tx_mtr_sfx_tbl,
8731                                                 priv->mtr_color_reg);
8732                 if (ret) {
8733                         DRV_LOG(ERR, "Failed to create egress policer.");
8734                         goto error;
8735                 }
8736         }
8737         if (attr->ingress) {
8738                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8739                                                 priv->sh->rx_mtr_sfx_tbl,
8740                                                 priv->mtr_color_reg);
8741                 if (ret) {
8742                         DRV_LOG(ERR, "Failed to create ingress policer.");
8743                         goto error;
8744                 }
8745         }
8746         if (attr->transfer) {
8747                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8748                                                 priv->sh->fdb_mtr_sfx_tbl,
8749                                                 priv->mtr_color_reg);
8750                 if (ret) {
8751                         DRV_LOG(ERR, "Failed to create transfer policer.");
8752                         goto error;
8753                 }
8754         }
8755         return 0;
8756 error:
8757         flow_dv_destroy_policer_rules(dev, fm, attr);
8758         return -1;
8759 }
8760
8761 /**
8762  * Query a devx counter.
8763  *
8764  * @param[in] dev
8765  *   Pointer to the Ethernet device structure.
8766  * @param[in] cnt
8767  *   Pointer to the flow counter.
8768  * @param[in] clear
8769  *   Set to clear the counter statistics.
8770  * @param[out] pkts
8771  *   The statistics value of packets.
8772  * @param[out] bytes
8773  *   The statistics value of bytes.
8774  *
8775  * @return
8776  *   0 on success, otherwise return -1.
8777  */
8778 static int
8779 flow_dv_counter_query(struct rte_eth_dev *dev,
8780                       struct mlx5_flow_counter *cnt, bool clear,
8781                       uint64_t *pkts, uint64_t *bytes)
8782 {
8783         struct mlx5_priv *priv = dev->data->dev_private;
8784         uint64_t inn_pkts, inn_bytes;
8785         int ret;
8786
8787         if (!priv->config.devx)
8788                 return -1;
8789         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8790         if (ret)
8791                 return -1;
8792         *pkts = inn_pkts - cnt->hits;
8793         *bytes = inn_bytes - cnt->bytes;
8794         if (clear) {
8795                 cnt->hits = inn_pkts;
8796                 cnt->bytes = inn_bytes;
8797         }
8798         return 0;
8799 }
8800
8801 /*
8802  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8803  */
8804 static int
8805 flow_dv_translate(struct rte_eth_dev *dev,
8806                   struct mlx5_flow *dev_flow,
8807                   const struct rte_flow_attr *attr,
8808                   const struct rte_flow_item items[],
8809                   const struct rte_flow_action actions[],
8810                   struct rte_flow_error *error)
8811 {
8812         int ret;
8813
8814         flow_dv_shared_lock(dev);
8815         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8816         flow_dv_shared_unlock(dev);
8817         return ret;
8818 }
8819
8820 /*
8821  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8822  */
8823 static int
8824 flow_dv_apply(struct rte_eth_dev *dev,
8825               struct rte_flow *flow,
8826               struct rte_flow_error *error)
8827 {
8828         int ret;
8829
8830         flow_dv_shared_lock(dev);
8831         ret = __flow_dv_apply(dev, flow, error);
8832         flow_dv_shared_unlock(dev);
8833         return ret;
8834 }
8835
8836 /*
8837  * Mutex-protected thunk to lock-free __flow_dv_remove().
8838  */
8839 static void
8840 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8841 {
8842         flow_dv_shared_lock(dev);
8843         __flow_dv_remove(dev, flow);
8844         flow_dv_shared_unlock(dev);
8845 }
8846
8847 /*
8848  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8849  */
8850 static void
8851 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8852 {
8853         flow_dv_shared_lock(dev);
8854         __flow_dv_destroy(dev, flow);
8855         flow_dv_shared_unlock(dev);
8856 }
8857
8858 /*
8859  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8860  */
8861 static struct mlx5_flow_counter *
8862 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8863 {
8864         struct mlx5_flow_counter *cnt;
8865
8866         flow_dv_shared_lock(dev);
8867         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8868         flow_dv_shared_unlock(dev);
8869         return cnt;
8870 }
8871
8872 /*
8873  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8874  */
8875 static void
8876 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8877 {
8878         flow_dv_shared_lock(dev);
8879         flow_dv_counter_release(dev, cnt);
8880         flow_dv_shared_unlock(dev);
8881 }
8882
8883 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8884         .validate = flow_dv_validate,
8885         .prepare = flow_dv_prepare,
8886         .translate = flow_dv_translate,
8887         .apply = flow_dv_apply,
8888         .remove = flow_dv_remove,
8889         .destroy = flow_dv_destroy,
8890         .query = flow_dv_query,
8891         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8892         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8893         .create_policer_rules = flow_dv_create_policer_rules,
8894         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8895         .counter_alloc = flow_dv_counter_allocate,
8896         .counter_free = flow_dv_counter_free,
8897         .counter_query = flow_dv_counter_query,
8898 };
8899
8900 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */