drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30
  31 #include "mlx5.h"
  32 #include "mlx5_defs.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_flow.h"
  35 #include "mlx5_prm.h"
  36 #include "mlx5_rxtx.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 /* VLAN header definitions */
  55 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  56 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  57 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  60
  61 union flow_dv_attr {
  62         struct {
  63                 uint32_t valid:1;
  64                 uint32_t ipv4:1;
  65                 uint32_t ipv6:1;
  66                 uint32_t tcp:1;
  67                 uint32_t udp:1;
  68                 uint32_t reserved:27;
  69         };
  70         uint32_t attr;
  71 };
  72
  73 /**
  74  * Initialize flow attributes structure according to flow items' types.
  75  *
  76  * @param[in] item
  77  *   Pointer to item specification.
  78  * @param[out] attr
  79  *   Pointer to flow attributes structure.
  80  */
  81 static void
  82 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  83 {
  84         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  85                 switch (item->type) {
  86                 case RTE_FLOW_ITEM_TYPE_IPV4:
  87                         attr->ipv4 = 1;
  88                         break;
  89                 case RTE_FLOW_ITEM_TYPE_IPV6:
  90                         attr->ipv6 = 1;
  91                         break;
  92                 case RTE_FLOW_ITEM_TYPE_UDP:
  93                         attr->udp = 1;
  94                         break;
  95                 case RTE_FLOW_ITEM_TYPE_TCP:
  96                         attr->tcp = 1;
  97                         break;
  98                 default:
  99                         break;
 100                 }
 101         }
 102         attr->valid = 1;
 103 }
 104
 105 /**
 106  * Convert rte_mtr_color to mlx5 color.
 107  *
 108  * @param[in] rcol
 109  *   rte_mtr_color.
 110  *
 111  * @return
 112  *   mlx5 color.
 113  */
 114 static int
 115 rte_col_2_mlx5_col(enum rte_color rcol)
 116 {
 117         switch (rcol) {
 118         case RTE_COLOR_GREEN:
 119                 return MLX5_FLOW_COLOR_GREEN;
 120         case RTE_COLOR_YELLOW:
 121                 return MLX5_FLOW_COLOR_YELLOW;
 122         case RTE_COLOR_RED:
 123                 return MLX5_FLOW_COLOR_RED;
 124         default:
 125                 break;
 126         }
 127         return MLX5_FLOW_COLOR_UNDEFINED;
 128 }
 129
 130 struct field_modify_info {
 131         uint32_t size; /* Size of field in protocol header, in bytes. */
 132         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 133         enum mlx5_modification_field id;
 134 };
 135
 136 struct field_modify_info modify_eth[] = {
 137         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 138         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 139         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 140         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 141         {0, 0, 0},
 142 };
 143
 144 struct field_modify_info modify_vlan_out_first_vid[] = {
 145         /* Size in bits !!! */
 146         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 147         {0, 0, 0},
 148 };
 149
 150 struct field_modify_info modify_ipv4[] = {
 151         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 152         {4, 12, MLX5_MODI_OUT_SIPV4},
 153         {4, 16, MLX5_MODI_OUT_DIPV4},
 154         {0, 0, 0},
 155 };
 156
 157 struct field_modify_info modify_ipv6[] = {
 158         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 159         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 160         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 161         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 162         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 163         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 164         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 165         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 166         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 167         {0, 0, 0},
 168 };
 169
 170 struct field_modify_info modify_udp[] = {
 171         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 172         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 173         {0, 0, 0},
 174 };
 175
 176 struct field_modify_info modify_tcp[] = {
 177         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 178         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 179         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 180         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 181         {0, 0, 0},
 182 };
 183
 184 static void
 185 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 186                           uint8_t next_protocol, uint64_t *item_flags,
 187                           int *tunnel)
 188 {
 189         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 190                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 191         if (next_protocol == IPPROTO_IPIP) {
 192                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 193                 *tunnel = 1;
 194         }
 195         if (next_protocol == IPPROTO_IPV6) {
 196                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 197                 *tunnel = 1;
 198         }
 199 }
 200
 201 /**
 202  * Acquire the synchronizing object to protect multithreaded access
 203  * to shared dv context. Lock occurs only if context is actually
 204  * shared, i.e. we have multiport IB device and representors are
 205  * created.
 206  *
 207  * @param[in] dev
 208  *   Pointer to the rte_eth_dev structure.
 209  */
 210 static void
 211 flow_dv_shared_lock(struct rte_eth_dev *dev)
 212 {
 213         struct mlx5_priv *priv = dev->data->dev_private;
 214         struct mlx5_ibv_shared *sh = priv->sh;
 215
 216         if (sh->dv_refcnt > 1) {
 217                 int ret;
 218
 219                 ret = pthread_mutex_lock(&sh->dv_mutex);
 220                 assert(!ret);
 221                 (void)ret;
 222         }
 223 }
 224
 225 static void
 226 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 227 {
 228         struct mlx5_priv *priv = dev->data->dev_private;
 229         struct mlx5_ibv_shared *sh = priv->sh;
 230
 231         if (sh->dv_refcnt > 1) {
 232                 int ret;
 233
 234                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 235                 assert(!ret);
 236                 (void)ret;
 237         }
 238 }
 239
 240 /* Update VLAN's VID/PCP based on input rte_flow_action.
 241  *
 242  * @param[in] action
 243  *   Pointer to struct rte_flow_action.
 244  * @param[out] vlan
 245  *   Pointer to struct rte_vlan_hdr.
 246  */
 247 static void
 248 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 249                          struct rte_vlan_hdr *vlan)
 250 {
 251         uint16_t vlan_tci;
 252         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 253                 vlan_tci =
 254                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 255                                                action->conf)->vlan_pcp;
 256                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 257                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 258                 vlan->vlan_tci |= vlan_tci;
 259         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 260                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 261                 vlan->vlan_tci |= rte_be_to_cpu_16
 262                     (((const struct rte_flow_action_of_set_vlan_vid *)
 263                                              action->conf)->vlan_vid);
 264         }
 265 }
 266
 267 /**
 268  * Fetch 1, 2, 3 or 4 byte field from the byte array
 269  * and return as unsigned integer in host-endian format.
 270  *
 271  * @param[in] data
 272  *   Pointer to data array.
 273  * @param[in] size
 274  *   Size of field to extract.
 275  *
 276  * @return
 277  *   converted field in host endian format.
 278  */
 279 static inline uint32_t
 280 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 281 {
 282         uint32_t ret;
 283
 284         switch (size) {
 285         case 1:
 286                 ret = *data;
 287                 break;
 288         case 2:
 289                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 290                 break;
 291         case 3:
 292                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 293                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 294                 break;
 295         case 4:
 296                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 297                 break;
 298         default:
 299                 assert(false);
 300                 ret = 0;
 301                 break;
 302         }
 303         return ret;
 304 }
 305
 306 /**
 307  * Convert modify-header action to DV specification.
 308  *
 309  * Data length of each action is determined by provided field description
 310  * and the item mask. Data bit offset and width of each action is determined
 311  * by provided item mask.
 312  *
 313  * @param[in] item
 314  *   Pointer to item specification.
 315  * @param[in] field
 316  *   Pointer to field modification information.
 317  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 318  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 319  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 320  * @param[in] dcopy
 321  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 322  *   Negative offset value sets the same offset as source offset.
 323  *   size field is ignored, value is taken from source field.
 324  * @param[in,out] resource
 325  *   Pointer to the modify-header resource.
 326  * @param[in] type
 327  *   Type of modification.
 328  * @param[out] error
 329  *   Pointer to the error structure.
 330  *
 331  * @return
 332  *   0 on success, a negative errno value otherwise and rte_errno is set.
 333  */
 334 static int
 335 flow_dv_convert_modify_action(struct rte_flow_item *item,
 336                               struct field_modify_info *field,
 337                               struct field_modify_info *dcopy,
 338                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 339                               uint32_t type, struct rte_flow_error *error)
 340 {
 341         uint32_t i = resource->actions_num;
 342         struct mlx5_modification_cmd *actions = resource->actions;
 343
 344         /*
 345          * The item and mask are provided in big-endian format.
 346          * The fields should be presented as in big-endian format either.
 347          * Mask must be always present, it defines the actual field width.
 348          */
 349         assert(item->mask);
 350         assert(field->size);
 351         do {
 352                 unsigned int size_b;
 353                 unsigned int off_b;
 354                 uint32_t mask;
 355                 uint32_t data;
 356
 357                 if (i >= MLX5_MODIFY_NUM)
 358                         return rte_flow_error_set(error, EINVAL,
 359                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 360                                  "too many items to modify");
 361                 /* Fetch variable byte size mask from the array. */
 362                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 363                                            field->offset, field->size);
 364                 if (!mask) {
 365                         ++field;
 366                         continue;
 367                 }
 368                 /* Deduce actual data width in bits from mask value. */
 369                 off_b = rte_bsf32(mask);
 370                 size_b = sizeof(uint32_t) * CHAR_BIT -
 371                          off_b - __builtin_clz(mask);
 372                 assert(size_b);
 373                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 374                 actions[i].action_type = type;
 375                 actions[i].field = field->id;
 376                 actions[i].offset = off_b;
 377                 actions[i].length = size_b;
 378                 /* Convert entire record to expected big-endian format. */
 379                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 380                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 381                         assert(dcopy);
 382                         actions[i].dst_field = dcopy->id;
 383                         actions[i].dst_offset =
 384                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 385                         /* Convert entire record to big-endian format. */
 386                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 387                 } else {
 388                         assert(item->spec);
 389                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 390                                                    field->offset, field->size);
 391                         /* Shift out the trailing masked bits from data. */
 392                         data = (data & mask) >> off_b;
 393                         actions[i].data1 = rte_cpu_to_be_32(data);
 394                 }
 395                 ++i;
 396                 ++field;
 397         } while (field->size);
 398         resource->actions_num = i;
 399         if (!resource->actions_num)
 400                 return rte_flow_error_set(error, EINVAL,
 401                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 402                                           "invalid modification flow item");
 403         return 0;
 404 }
 405
 406 /**
 407  * Convert modify-header set IPv4 address action to DV specification.
 408  *
 409  * @param[in,out] resource
 410  *   Pointer to the modify-header resource.
 411  * @param[in] action
 412  *   Pointer to action specification.
 413  * @param[out] error
 414  *   Pointer to the error structure.
 415  *
 416  * @return
 417  *   0 on success, a negative errno value otherwise and rte_errno is set.
 418  */
 419 static int
 420 flow_dv_convert_action_modify_ipv4
 421                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 422                          const struct rte_flow_action *action,
 423                          struct rte_flow_error *error)
 424 {
 425         const struct rte_flow_action_set_ipv4 *conf =
 426                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 427         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 428         struct rte_flow_item_ipv4 ipv4;
 429         struct rte_flow_item_ipv4 ipv4_mask;
 430
 431         memset(&ipv4, 0, sizeof(ipv4));
 432         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 433         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 434                 ipv4.hdr.src_addr = conf->ipv4_addr;
 435                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 436         } else {
 437                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 438                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 439         }
 440         item.spec = &ipv4;
 441         item.mask = &ipv4_mask;
 442         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 443                                              MLX5_MODIFICATION_TYPE_SET, error);
 444 }
 445
 446 /**
 447  * Convert modify-header set IPv6 address action to DV specification.
 448  *
 449  * @param[in,out] resource
 450  *   Pointer to the modify-header resource.
 451  * @param[in] action
 452  *   Pointer to action specification.
 453  * @param[out] error
 454  *   Pointer to the error structure.
 455  *
 456  * @return
 457  *   0 on success, a negative errno value otherwise and rte_errno is set.
 458  */
 459 static int
 460 flow_dv_convert_action_modify_ipv6
 461                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 462                          const struct rte_flow_action *action,
 463                          struct rte_flow_error *error)
 464 {
 465         const struct rte_flow_action_set_ipv6 *conf =
 466                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 467         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 468         struct rte_flow_item_ipv6 ipv6;
 469         struct rte_flow_item_ipv6 ipv6_mask;
 470
 471         memset(&ipv6, 0, sizeof(ipv6));
 472         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 473         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 474                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 475                        sizeof(ipv6.hdr.src_addr));
 476                 memcpy(&ipv6_mask.hdr.src_addr,
 477                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 478                        sizeof(ipv6.hdr.src_addr));
 479         } else {
 480                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 481                        sizeof(ipv6.hdr.dst_addr));
 482                 memcpy(&ipv6_mask.hdr.dst_addr,
 483                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 484                        sizeof(ipv6.hdr.dst_addr));
 485         }
 486         item.spec = &ipv6;
 487         item.mask = &ipv6_mask;
 488         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 489                                              MLX5_MODIFICATION_TYPE_SET, error);
 490 }
 491
 492 /**
 493  * Convert modify-header set MAC address action to DV specification.
 494  *
 495  * @param[in,out] resource
 496  *   Pointer to the modify-header resource.
 497  * @param[in] action
 498  *   Pointer to action specification.
 499  * @param[out] error
 500  *   Pointer to the error structure.
 501  *
 502  * @return
 503  *   0 on success, a negative errno value otherwise and rte_errno is set.
 504  */
 505 static int
 506 flow_dv_convert_action_modify_mac
 507                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 508                          const struct rte_flow_action *action,
 509                          struct rte_flow_error *error)
 510 {
 511         const struct rte_flow_action_set_mac *conf =
 512                 (const struct rte_flow_action_set_mac *)(action->conf);
 513         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 514         struct rte_flow_item_eth eth;
 515         struct rte_flow_item_eth eth_mask;
 516
 517         memset(&eth, 0, sizeof(eth));
 518         memset(&eth_mask, 0, sizeof(eth_mask));
 519         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 520                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 521                        sizeof(eth.src.addr_bytes));
 522                 memcpy(&eth_mask.src.addr_bytes,
 523                        &rte_flow_item_eth_mask.src.addr_bytes,
 524                        sizeof(eth_mask.src.addr_bytes));
 525         } else {
 526                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 527                        sizeof(eth.dst.addr_bytes));
 528                 memcpy(&eth_mask.dst.addr_bytes,
 529                        &rte_flow_item_eth_mask.dst.addr_bytes,
 530                        sizeof(eth_mask.dst.addr_bytes));
 531         }
 532         item.spec = &eth;
 533         item.mask = &eth_mask;
 534         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 535                                              MLX5_MODIFICATION_TYPE_SET, error);
 536 }
 537
 538 /**
 539  * Convert modify-header set VLAN VID action to DV specification.
 540  *
 541  * @param[in,out] resource
 542  *   Pointer to the modify-header resource.
 543  * @param[in] action
 544  *   Pointer to action specification.
 545  * @param[out] error
 546  *   Pointer to the error structure.
 547  *
 548  * @return
 549  *   0 on success, a negative errno value otherwise and rte_errno is set.
 550  */
 551 static int
 552 flow_dv_convert_action_modify_vlan_vid
 553                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 554                          const struct rte_flow_action *action,
 555                          struct rte_flow_error *error)
 556 {
 557         const struct rte_flow_action_of_set_vlan_vid *conf =
 558                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 559         int i = resource->actions_num;
 560         struct mlx5_modification_cmd *actions = &resource->actions[i];
 561         struct field_modify_info *field = modify_vlan_out_first_vid;
 562
 563         if (i >= MLX5_MODIFY_NUM)
 564                 return rte_flow_error_set(error, EINVAL,
 565                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 566                          "too many items to modify");
 567         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 568         actions[i].field = field->id;
 569         actions[i].length = field->size;
 570         actions[i].offset = field->offset;
 571         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 572         actions[i].data1 = conf->vlan_vid;
 573         actions[i].data1 = actions[i].data1 << 16;
 574         resource->actions_num = ++i;
 575         return 0;
 576 }
 577
 578 /**
 579  * Convert modify-header set TP action to DV specification.
 580  *
 581  * @param[in,out] resource
 582  *   Pointer to the modify-header resource.
 583  * @param[in] action
 584  *   Pointer to action specification.
 585  * @param[in] items
 586  *   Pointer to rte_flow_item objects list.
 587  * @param[in] attr
 588  *   Pointer to flow attributes structure.
 589  * @param[out] error
 590  *   Pointer to the error structure.
 591  *
 592  * @return
 593  *   0 on success, a negative errno value otherwise and rte_errno is set.
 594  */
 595 static int
 596 flow_dv_convert_action_modify_tp
 597                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 598                          const struct rte_flow_action *action,
 599                          const struct rte_flow_item *items,
 600                          union flow_dv_attr *attr,
 601                          struct rte_flow_error *error)
 602 {
 603         const struct rte_flow_action_set_tp *conf =
 604                 (const struct rte_flow_action_set_tp *)(action->conf);
 605         struct rte_flow_item item;
 606         struct rte_flow_item_udp udp;
 607         struct rte_flow_item_udp udp_mask;
 608         struct rte_flow_item_tcp tcp;
 609         struct rte_flow_item_tcp tcp_mask;
 610         struct field_modify_info *field;
 611
 612         if (!attr->valid)
 613                 flow_dv_attr_init(items, attr);
 614         if (attr->udp) {
 615                 memset(&udp, 0, sizeof(udp));
 616                 memset(&udp_mask, 0, sizeof(udp_mask));
 617                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 618                         udp.hdr.src_port = conf->port;
 619                         udp_mask.hdr.src_port =
 620                                         rte_flow_item_udp_mask.hdr.src_port;
 621                 } else {
 622                         udp.hdr.dst_port = conf->port;
 623                         udp_mask.hdr.dst_port =
 624                                         rte_flow_item_udp_mask.hdr.dst_port;
 625                 }
 626                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 627                 item.spec = &udp;
 628                 item.mask = &udp_mask;
 629                 field = modify_udp;
 630         }
 631         if (attr->tcp) {
 632                 memset(&tcp, 0, sizeof(tcp));
 633                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 634                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 635                         tcp.hdr.src_port = conf->port;
 636                         tcp_mask.hdr.src_port =
 637                                         rte_flow_item_tcp_mask.hdr.src_port;
 638                 } else {
 639                         tcp.hdr.dst_port = conf->port;
 640                         tcp_mask.hdr.dst_port =
 641                                         rte_flow_item_tcp_mask.hdr.dst_port;
 642                 }
 643                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 644                 item.spec = &tcp;
 645                 item.mask = &tcp_mask;
 646                 field = modify_tcp;
 647         }
 648         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 649                                              MLX5_MODIFICATION_TYPE_SET, error);
 650 }
 651
 652 /**
 653  * Convert modify-header set TTL action to DV specification.
 654  *
 655  * @param[in,out] resource
 656  *   Pointer to the modify-header resource.
 657  * @param[in] action
 658  *   Pointer to action specification.
 659  * @param[in] items
 660  *   Pointer to rte_flow_item objects list.
 661  * @param[in] attr
 662  *   Pointer to flow attributes structure.
 663  * @param[out] error
 664  *   Pointer to the error structure.
 665  *
 666  * @return
 667  *   0 on success, a negative errno value otherwise and rte_errno is set.
 668  */
 669 static int
 670 flow_dv_convert_action_modify_ttl
 671                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 672                          const struct rte_flow_action *action,
 673                          const struct rte_flow_item *items,
 674                          union flow_dv_attr *attr,
 675                          struct rte_flow_error *error)
 676 {
 677         const struct rte_flow_action_set_ttl *conf =
 678                 (const struct rte_flow_action_set_ttl *)(action->conf);
 679         struct rte_flow_item item;
 680         struct rte_flow_item_ipv4 ipv4;
 681         struct rte_flow_item_ipv4 ipv4_mask;
 682         struct rte_flow_item_ipv6 ipv6;
 683         struct rte_flow_item_ipv6 ipv6_mask;
 684         struct field_modify_info *field;
 685
 686         if (!attr->valid)
 687                 flow_dv_attr_init(items, attr);
 688         if (attr->ipv4) {
 689                 memset(&ipv4, 0, sizeof(ipv4));
 690                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 691                 ipv4.hdr.time_to_live = conf->ttl_value;
 692                 ipv4_mask.hdr.time_to_live = 0xFF;
 693                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 694                 item.spec = &ipv4;
 695                 item.mask = &ipv4_mask;
 696                 field = modify_ipv4;
 697         }
 698         if (attr->ipv6) {
 699                 memset(&ipv6, 0, sizeof(ipv6));
 700                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 701                 ipv6.hdr.hop_limits = conf->ttl_value;
 702                 ipv6_mask.hdr.hop_limits = 0xFF;
 703                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 704                 item.spec = &ipv6;
 705                 item.mask = &ipv6_mask;
 706                 field = modify_ipv6;
 707         }
 708         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 709                                              MLX5_MODIFICATION_TYPE_SET, error);
 710 }
 711
 712 /**
 713  * Convert modify-header decrement TTL action to DV specification.
 714  *
 715  * @param[in,out] resource
 716  *   Pointer to the modify-header resource.
 717  * @param[in] action
 718  *   Pointer to action specification.
 719  * @param[in] items
 720  *   Pointer to rte_flow_item objects list.
 721  * @param[in] attr
 722  *   Pointer to flow attributes structure.
 723  * @param[out] error
 724  *   Pointer to the error structure.
 725  *
 726  * @return
 727  *   0 on success, a negative errno value otherwise and rte_errno is set.
 728  */
 729 static int
 730 flow_dv_convert_action_modify_dec_ttl
 731                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 732                          const struct rte_flow_item *items,
 733                          union flow_dv_attr *attr,
 734                          struct rte_flow_error *error)
 735 {
 736         struct rte_flow_item item;
 737         struct rte_flow_item_ipv4 ipv4;
 738         struct rte_flow_item_ipv4 ipv4_mask;
 739         struct rte_flow_item_ipv6 ipv6;
 740         struct rte_flow_item_ipv6 ipv6_mask;
 741         struct field_modify_info *field;
 742
 743         if (!attr->valid)
 744                 flow_dv_attr_init(items, attr);
 745         if (attr->ipv4) {
 746                 memset(&ipv4, 0, sizeof(ipv4));
 747                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 748                 ipv4.hdr.time_to_live = 0xFF;
 749                 ipv4_mask.hdr.time_to_live = 0xFF;
 750                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 751                 item.spec = &ipv4;
 752                 item.mask = &ipv4_mask;
 753                 field = modify_ipv4;
 754         }
 755         if (attr->ipv6) {
 756                 memset(&ipv6, 0, sizeof(ipv6));
 757                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 758                 ipv6.hdr.hop_limits = 0xFF;
 759                 ipv6_mask.hdr.hop_limits = 0xFF;
 760                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 761                 item.spec = &ipv6;
 762                 item.mask = &ipv6_mask;
 763                 field = modify_ipv6;
 764         }
 765         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 766                                              MLX5_MODIFICATION_TYPE_ADD, error);
 767 }
 768
 769 /**
 770  * Convert modify-header increment/decrement TCP Sequence number
 771  * to DV specification.
 772  *
 773  * @param[in,out] resource
 774  *   Pointer to the modify-header resource.
 775  * @param[in] action
 776  *   Pointer to action specification.
 777  * @param[out] error
 778  *   Pointer to the error structure.
 779  *
 780  * @return
 781  *   0 on success, a negative errno value otherwise and rte_errno is set.
 782  */
 783 static int
 784 flow_dv_convert_action_modify_tcp_seq
 785                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 786                          const struct rte_flow_action *action,
 787                          struct rte_flow_error *error)
 788 {
 789         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 790         uint64_t value = rte_be_to_cpu_32(*conf);
 791         struct rte_flow_item item;
 792         struct rte_flow_item_tcp tcp;
 793         struct rte_flow_item_tcp tcp_mask;
 794
 795         memset(&tcp, 0, sizeof(tcp));
 796         memset(&tcp_mask, 0, sizeof(tcp_mask));
 797         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 798                 /*
 799                  * The HW has no decrement operation, only increment operation.
 800                  * To simulate decrement X from Y using increment operation
 801                  * we need to add UINT32_MAX X times to Y.
 802                  * Each adding of UINT32_MAX decrements Y by 1.
 803                  */
 804                 value *= UINT32_MAX;
 805         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 806         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 807         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 808         item.spec = &tcp;
 809         item.mask = &tcp_mask;
 810         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 811                                              MLX5_MODIFICATION_TYPE_ADD, error);
 812 }
 813
 814 /**
 815  * Convert modify-header increment/decrement TCP Acknowledgment number
 816  * to DV specification.
 817  *
 818  * @param[in,out] resource
 819  *   Pointer to the modify-header resource.
 820  * @param[in] action
 821  *   Pointer to action specification.
 822  * @param[out] error
 823  *   Pointer to the error structure.
 824  *
 825  * @return
 826  *   0 on success, a negative errno value otherwise and rte_errno is set.
 827  */
 828 static int
 829 flow_dv_convert_action_modify_tcp_ack
 830                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 831                          const struct rte_flow_action *action,
 832                          struct rte_flow_error *error)
 833 {
 834         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 835         uint64_t value = rte_be_to_cpu_32(*conf);
 836         struct rte_flow_item item;
 837         struct rte_flow_item_tcp tcp;
 838         struct rte_flow_item_tcp tcp_mask;
 839
 840         memset(&tcp, 0, sizeof(tcp));
 841         memset(&tcp_mask, 0, sizeof(tcp_mask));
 842         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 843                 /*
 844                  * The HW has no decrement operation, only increment operation.
 845                  * To simulate decrement X from Y using increment operation
 846                  * we need to add UINT32_MAX X times to Y.
 847                  * Each adding of UINT32_MAX decrements Y by 1.
 848                  */
 849                 value *= UINT32_MAX;
 850         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 851         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 852         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 853         item.spec = &tcp;
 854         item.mask = &tcp_mask;
 855         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 856                                              MLX5_MODIFICATION_TYPE_ADD, error);
 857 }
 858
 859 static enum mlx5_modification_field reg_to_field[] = {
 860         [REG_NONE] = MLX5_MODI_OUT_NONE,
 861         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 862         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 863         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 864         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 865         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 866         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 867         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 868         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 869         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 870         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 871 };
 872
 873 /**
 874  * Convert register set to DV specification.
 875  *
 876  * @param[in,out] resource
 877  *   Pointer to the modify-header resource.
 878  * @param[in] action
 879  *   Pointer to action specification.
 880  * @param[out] error
 881  *   Pointer to the error structure.
 882  *
 883  * @return
 884  *   0 on success, a negative errno value otherwise and rte_errno is set.
 885  */
 886 static int
 887 flow_dv_convert_action_set_reg
 888                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 889                          const struct rte_flow_action *action,
 890                          struct rte_flow_error *error)
 891 {
 892         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 893         struct mlx5_modification_cmd *actions = resource->actions;
 894         uint32_t i = resource->actions_num;
 895
 896         if (i >= MLX5_MODIFY_NUM)
 897                 return rte_flow_error_set(error, EINVAL,
 898                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 899                                           "too many items to modify");
 900         assert(conf->id != REG_NONE);
 901         assert(conf->id < RTE_DIM(reg_to_field));
 902         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 903         actions[i].field = reg_to_field[conf->id];
 904         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 905         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 906         ++i;
 907         resource->actions_num = i;
 908         if (!resource->actions_num)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "invalid modification flow item");
 912         return 0;
 913 }
 914
 915 /**
 916  * Convert SET_TAG action to DV specification.
 917  *
 918  * @param[in] dev
 919  *   Pointer to the rte_eth_dev structure.
 920  * @param[in,out] resource
 921  *   Pointer to the modify-header resource.
 922  * @param[in] conf
 923  *   Pointer to action specification.
 924  * @param[out] error
 925  *   Pointer to the error structure.
 926  *
 927  * @return
 928  *   0 on success, a negative errno value otherwise and rte_errno is set.
 929  */
 930 static int
 931 flow_dv_convert_action_set_tag
 932                         (struct rte_eth_dev *dev,
 933                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 934                          const struct rte_flow_action_set_tag *conf,
 935                          struct rte_flow_error *error)
 936 {
 937         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 938         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 939         struct rte_flow_item item = {
 940                 .spec = &data,
 941                 .mask = &mask,
 942         };
 943         struct field_modify_info reg_c_x[] = {
 944                 [1] = {0, 0, 0},
 945         };
 946         enum mlx5_modification_field reg_type;
 947         int ret;
 948
 949         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 950         if (ret < 0)
 951                 return ret;
 952         assert(ret != REG_NONE);
 953         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 954         reg_type = reg_to_field[ret];
 955         assert(reg_type > 0);
 956         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 957         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 958                                              MLX5_MODIFICATION_TYPE_SET, error);
 959 }
 960
 961 /**
 962  * Convert internal COPY_REG action to DV specification.
 963  *
 964  * @param[in] dev
 965  *   Pointer to the rte_eth_dev structure.
 966  * @param[in,out] res
 967  *   Pointer to the modify-header resource.
 968  * @param[in] action
 969  *   Pointer to action specification.
 970  * @param[out] error
 971  *   Pointer to the error structure.
 972  *
 973  * @return
 974  *   0 on success, a negative errno value otherwise and rte_errno is set.
 975  */
 976 static int
 977 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 978                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 979                                  const struct rte_flow_action *action,
 980                                  struct rte_flow_error *error)
 981 {
 982         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 983         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 984         struct rte_flow_item item = {
 985                 .spec = NULL,
 986                 .mask = &mask,
 987         };
 988         struct field_modify_info reg_src[] = {
 989                 {4, 0, reg_to_field[conf->src]},
 990                 {0, 0, 0},
 991         };
 992         struct field_modify_info reg_dst = {
 993                 .offset = 0,
 994                 .id = reg_to_field[conf->dst],
 995         };
 996         /* Adjust reg_c[0] usage according to reported mask. */
 997         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
 998                 struct mlx5_priv *priv = dev->data->dev_private;
 999                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1000
1001                 assert(reg_c0);
1002                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1003                 if (conf->dst == REG_C_0) {
1004                         /* Copy to reg_c[0], within mask only. */
1005                         reg_dst.offset = rte_bsf32(reg_c0);
1006                         /*
1007                          * Mask is ignoring the enianness, because
1008                          * there is no conversion in datapath.
1009                          */
1010 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1011                         /* Copy from destination lower bits to reg_c[0]. */
1012                         mask = reg_c0 >> reg_dst.offset;
1013 #else
1014                         /* Copy from destination upper bits to reg_c[0]. */
1015                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1016                                           rte_fls_u32(reg_c0));
1017 #endif
1018                 } else {
1019                         mask = rte_cpu_to_be_32(reg_c0);
1020 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1021                         /* Copy from reg_c[0] to destination lower bits. */
1022                         reg_dst.offset = 0;
1023 #else
1024                         /* Copy from reg_c[0] to destination upper bits. */
1025                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1026                                          (rte_fls_u32(reg_c0) -
1027                                           rte_bsf32(reg_c0));
1028 #endif
1029                 }
1030         }
1031         return flow_dv_convert_modify_action(&item,
1032                                              reg_src, &reg_dst, res,
1033                                              MLX5_MODIFICATION_TYPE_COPY,
1034                                              error);
1035 }
1036
1037 /**
1038  * Convert MARK action to DV specification. This routine is used
1039  * in extensive metadata only and requires metadata register to be
1040  * handled. In legacy mode hardware tag resource is engaged.
1041  *
1042  * @param[in] dev
1043  *   Pointer to the rte_eth_dev structure.
1044  * @param[in] conf
1045  *   Pointer to MARK action specification.
1046  * @param[in,out] resource
1047  *   Pointer to the modify-header resource.
1048  * @param[out] error
1049  *   Pointer to the error structure.
1050  *
1051  * @return
1052  *   0 on success, a negative errno value otherwise and rte_errno is set.
1053  */
1054 static int
1055 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1056                             const struct rte_flow_action_mark *conf,
1057                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1058                             struct rte_flow_error *error)
1059 {
1060         struct mlx5_priv *priv = dev->data->dev_private;
1061         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1062                                            priv->sh->dv_mark_mask);
1063         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1064         struct rte_flow_item item = {
1065                 .spec = &data,
1066                 .mask = &mask,
1067         };
1068         struct field_modify_info reg_c_x[] = {
1069                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1070                 {0, 0, 0},
1071         };
1072         enum modify_reg reg;
1073
1074         if (!mask)
1075                 return rte_flow_error_set(error, EINVAL,
1076                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1077                                           NULL, "zero mark action mask");
1078         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1079         if (reg < 0)
1080                 return reg;
1081         assert(reg > 0);
1082         reg_c_x[0].id = reg_to_field[reg];
1083         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1084                                              MLX5_MODIFICATION_TYPE_SET, error);
1085 }
1086
1087 /**
1088  * Get metadata register index for specified steering domain.
1089  *
1090  * @param[in] dev
1091  *   Pointer to the rte_eth_dev structure.
1092  * @param[in] attr
1093  *   Attributes of flow to determine steering domain.
1094  * @param[out] error
1095  *   Pointer to the error structure.
1096  *
1097  * @return
1098  *   positive index on success, a negative errno value otherwise
1099  *   and rte_errno is set.
1100  */
1101 static enum modify_reg
1102 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1103                          const struct rte_flow_attr *attr,
1104                          struct rte_flow_error *error)
1105 {
1106         enum modify_reg reg =
1107                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1108                                           MLX5_METADATA_FDB :
1109                                             attr->egress ?
1110                                             MLX5_METADATA_TX :
1111                                             MLX5_METADATA_RX, 0, error);
1112         if (reg < 0)
1113                 return rte_flow_error_set(error,
1114                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1115                                           NULL, "unavailable "
1116                                           "metadata register");
1117         return reg;
1118 }
1119
1120 /**
1121  * Convert SET_META action to DV specification.
1122  *
1123  * @param[in] dev
1124  *   Pointer to the rte_eth_dev structure.
1125  * @param[in,out] resource
1126  *   Pointer to the modify-header resource.
1127  * @param[in] attr
1128  *   Attributes of flow that includes this item.
1129  * @param[in] conf
1130  *   Pointer to action specification.
1131  * @param[out] error
1132  *   Pointer to the error structure.
1133  *
1134  * @return
1135  *   0 on success, a negative errno value otherwise and rte_errno is set.
1136  */
1137 static int
1138 flow_dv_convert_action_set_meta
1139                         (struct rte_eth_dev *dev,
1140                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1141                          const struct rte_flow_attr *attr,
1142                          const struct rte_flow_action_set_meta *conf,
1143                          struct rte_flow_error *error)
1144 {
1145         uint32_t data = conf->data;
1146         uint32_t mask = conf->mask;
1147         struct rte_flow_item item = {
1148                 .spec = &data,
1149                 .mask = &mask,
1150         };
1151         struct field_modify_info reg_c_x[] = {
1152                 [1] = {0, 0, 0},
1153         };
1154         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1155
1156         if (reg < 0)
1157                 return reg;
1158         /*
1159          * In datapath code there is no endianness
1160          * coversions for perfromance reasons, all
1161          * pattern conversions are done in rte_flow.
1162          */
1163         if (reg == REG_C_0) {
1164                 struct mlx5_priv *priv = dev->data->dev_private;
1165                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1166                 uint32_t shl_c0;
1167
1168                 assert(msk_c0);
1169 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1170                 shl_c0 = rte_bsf32(msk_c0);
1171 #else
1172                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1173 #endif
1174                 mask <<= shl_c0;
1175                 data <<= shl_c0;
1176                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1177         }
1178         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1179         /* The routine expects parameters in memory as big-endian ones. */
1180         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1181                                              MLX5_MODIFICATION_TYPE_SET, error);
1182 }
1183
1184 /**
1185  * Validate MARK item.
1186  *
1187  * @param[in] dev
1188  *   Pointer to the rte_eth_dev structure.
1189  * @param[in] item
1190  *   Item specification.
1191  * @param[in] attr
1192  *   Attributes of flow that includes this item.
1193  * @param[out] error
1194  *   Pointer to error structure.
1195  *
1196  * @return
1197  *   0 on success, a negative errno value otherwise and rte_errno is set.
1198  */
1199 static int
1200 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1201                            const struct rte_flow_item *item,
1202                            const struct rte_flow_attr *attr __rte_unused,
1203                            struct rte_flow_error *error)
1204 {
1205         struct mlx5_priv *priv = dev->data->dev_private;
1206         struct mlx5_dev_config *config = &priv->config;
1207         const struct rte_flow_item_mark *spec = item->spec;
1208         const struct rte_flow_item_mark *mask = item->mask;
1209         const struct rte_flow_item_mark nic_mask = {
1210                 .id = priv->sh->dv_mark_mask,
1211         };
1212         int ret;
1213
1214         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1215                 return rte_flow_error_set(error, ENOTSUP,
1216                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1217                                           "extended metadata feature"
1218                                           " isn't enabled");
1219         if (!mlx5_flow_ext_mreg_supported(dev))
1220                 return rte_flow_error_set(error, ENOTSUP,
1221                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1222                                           "extended metadata register"
1223                                           " isn't supported");
1224         if (!nic_mask.id)
1225                 return rte_flow_error_set(error, ENOTSUP,
1226                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1227                                           "extended metadata register"
1228                                           " isn't available");
1229         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1230         if (ret < 0)
1231                 return ret;
1232         if (!spec)
1233                 return rte_flow_error_set(error, EINVAL,
1234                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1235                                           item->spec,
1236                                           "data cannot be empty");
1237         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1238                 return rte_flow_error_set(error, EINVAL,
1239                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1240                                           &spec->id,
1241                                           "mark id exceeds the limit");
1242         if (!mask)
1243                 mask = &nic_mask;
1244         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1245                                         (const uint8_t *)&nic_mask,
1246                                         sizeof(struct rte_flow_item_mark),
1247                                         error);
1248         if (ret < 0)
1249                 return ret;
1250         return 0;
1251 }
1252
1253 /**
1254  * Validate META item.
1255  *
1256  * @param[in] dev
1257  *   Pointer to the rte_eth_dev structure.
1258  * @param[in] item
1259  *   Item specification.
1260  * @param[in] attr
1261  *   Attributes of flow that includes this item.
1262  * @param[out] error
1263  *   Pointer to error structure.
1264  *
1265  * @return
1266  *   0 on success, a negative errno value otherwise and rte_errno is set.
1267  */
1268 static int
1269 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1270                            const struct rte_flow_item *item,
1271                            const struct rte_flow_attr *attr,
1272                            struct rte_flow_error *error)
1273 {
1274         struct mlx5_priv *priv = dev->data->dev_private;
1275         struct mlx5_dev_config *config = &priv->config;
1276         const struct rte_flow_item_meta *spec = item->spec;
1277         const struct rte_flow_item_meta *mask = item->mask;
1278         struct rte_flow_item_meta nic_mask = {
1279                 .data = UINT32_MAX
1280         };
1281         enum modify_reg reg;
1282         int ret;
1283
1284         if (!spec)
1285                 return rte_flow_error_set(error, EINVAL,
1286                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1287                                           item->spec,
1288                                           "data cannot be empty");
1289         if (!spec->data)
1290                 return rte_flow_error_set(error, EINVAL,
1291                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1292                                           "data cannot be zero");
1293         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1294                 if (!mlx5_flow_ext_mreg_supported(dev))
1295                         return rte_flow_error_set(error, ENOTSUP,
1296                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1297                                           "extended metadata register"
1298                                           " isn't supported");
1299                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1300                 if (reg < 0)
1301                         return reg;
1302                 if (reg == REG_B)
1303                         return rte_flow_error_set(error, ENOTSUP,
1304                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1305                                           "match on reg_b "
1306                                           "isn't supported");
1307                 if (reg != REG_A)
1308                         nic_mask.data = priv->sh->dv_meta_mask;
1309         }
1310         if (!mask)
1311                 mask = &rte_flow_item_meta_mask;
1312         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1313                                         (const uint8_t *)&nic_mask,
1314                                         sizeof(struct rte_flow_item_meta),
1315                                         error);
1316         return ret;
1317 }
1318
1319 /**
1320  * Validate TAG item.
1321  *
1322  * @param[in] dev
1323  *   Pointer to the rte_eth_dev structure.
1324  * @param[in] item
1325  *   Item specification.
1326  * @param[in] attr
1327  *   Attributes of flow that includes this item.
1328  * @param[out] error
1329  *   Pointer to error structure.
1330  *
1331  * @return
1332  *   0 on success, a negative errno value otherwise and rte_errno is set.
1333  */
1334 static int
1335 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1336                           const struct rte_flow_item *item,
1337                           const struct rte_flow_attr *attr __rte_unused,
1338                           struct rte_flow_error *error)
1339 {
1340         const struct rte_flow_item_tag *spec = item->spec;
1341         const struct rte_flow_item_tag *mask = item->mask;
1342         const struct rte_flow_item_tag nic_mask = {
1343                 .data = RTE_BE32(UINT32_MAX),
1344                 .index = 0xff,
1345         };
1346         int ret;
1347
1348         if (!mlx5_flow_ext_mreg_supported(dev))
1349                 return rte_flow_error_set(error, ENOTSUP,
1350                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1351                                           "extensive metadata register"
1352                                           " isn't supported");
1353         if (!spec)
1354                 return rte_flow_error_set(error, EINVAL,
1355                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1356                                           item->spec,
1357                                           "data cannot be empty");
1358         if (!mask)
1359                 mask = &rte_flow_item_tag_mask;
1360         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1361                                         (const uint8_t *)&nic_mask,
1362                                         sizeof(struct rte_flow_item_tag),
1363                                         error);
1364         if (ret < 0)
1365                 return ret;
1366         if (mask->index != 0xff)
1367                 return rte_flow_error_set(error, EINVAL,
1368                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1369                                           "partial mask for tag index"
1370                                           " is not supported");
1371         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1372         if (ret < 0)
1373                 return ret;
1374         assert(ret != REG_NONE);
1375         return 0;
1376 }
1377
1378 /**
1379  * Validate vport item.
1380  *
1381  * @param[in] dev
1382  *   Pointer to the rte_eth_dev structure.
1383  * @param[in] item
1384  *   Item specification.
1385  * @param[in] attr
1386  *   Attributes of flow that includes this item.
1387  * @param[in] item_flags
1388  *   Bit-fields that holds the items detected until now.
1389  * @param[out] error
1390  *   Pointer to error structure.
1391  *
1392  * @return
1393  *   0 on success, a negative errno value otherwise and rte_errno is set.
1394  */
1395 static int
1396 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1397                               const struct rte_flow_item *item,
1398                               const struct rte_flow_attr *attr,
1399                               uint64_t item_flags,
1400                               struct rte_flow_error *error)
1401 {
1402         const struct rte_flow_item_port_id *spec = item->spec;
1403         const struct rte_flow_item_port_id *mask = item->mask;
1404         const struct rte_flow_item_port_id switch_mask = {
1405                         .id = 0xffffffff,
1406         };
1407         struct mlx5_priv *esw_priv;
1408         struct mlx5_priv *dev_priv;
1409         int ret;
1410
1411         if (!attr->transfer)
1412                 return rte_flow_error_set(error, EINVAL,
1413                                           RTE_FLOW_ERROR_TYPE_ITEM,
1414                                           NULL,
1415                                           "match on port id is valid only"
1416                                           " when transfer flag is enabled");
1417         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1418                 return rte_flow_error_set(error, ENOTSUP,
1419                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1420                                           "multiple source ports are not"
1421                                           " supported");
1422         if (!mask)
1423                 mask = &switch_mask;
1424         if (mask->id != 0xffffffff)
1425                 return rte_flow_error_set(error, ENOTSUP,
1426                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1427                                            mask,
1428                                            "no support for partial mask on"
1429                                            " \"id\" field");
1430         ret = mlx5_flow_item_acceptable
1431                                 (item, (const uint8_t *)mask,
1432                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1433                                  sizeof(struct rte_flow_item_port_id),
1434                                  error);
1435         if (ret)
1436                 return ret;
1437         if (!spec)
1438                 return 0;
1439         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1440         if (!esw_priv)
1441                 return rte_flow_error_set(error, rte_errno,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1443                                           "failed to obtain E-Switch info for"
1444                                           " port");
1445         dev_priv = mlx5_dev_to_eswitch_info(dev);
1446         if (!dev_priv)
1447                 return rte_flow_error_set(error, rte_errno,
1448                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1449                                           NULL,
1450                                           "failed to obtain E-Switch info");
1451         if (esw_priv->domain_id != dev_priv->domain_id)
1452                 return rte_flow_error_set(error, EINVAL,
1453                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1454                                           "cannot match on a port from a"
1455                                           " different E-Switch");
1456         return 0;
1457 }
1458
1459 /**
1460  * Validate the pop VLAN action.
1461  *
1462  * @param[in] dev
1463  *   Pointer to the rte_eth_dev structure.
1464  * @param[in] action_flags
1465  *   Holds the actions detected until now.
1466  * @param[in] action
1467  *   Pointer to the pop vlan action.
1468  * @param[in] item_flags
1469  *   The items found in this flow rule.
1470  * @param[in] attr
1471  *   Pointer to flow attributes.
1472  * @param[out] error
1473  *   Pointer to error structure.
1474  *
1475  * @return
1476  *   0 on success, a negative errno value otherwise and rte_errno is set.
1477  */
1478 static int
1479 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1480                                  uint64_t action_flags,
1481                                  const struct rte_flow_action *action,
1482                                  uint64_t item_flags,
1483                                  const struct rte_flow_attr *attr,
1484                                  struct rte_flow_error *error)
1485 {
1486         struct mlx5_priv *priv = dev->data->dev_private;
1487
1488         (void)action;
1489         (void)attr;
1490         if (!priv->sh->pop_vlan_action)
1491                 return rte_flow_error_set(error, ENOTSUP,
1492                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1493                                           NULL,
1494                                           "pop vlan action is not supported");
1495         /*
1496          * Check for inconsistencies:
1497          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1498          *  fail strip_vlan in a flow that matches packets without explicitly a
1499          *  matching on VLAN tag ?
1500          */
1501         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1502                 return rte_flow_error_set(error, ENOTSUP,
1503                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1504                                           NULL,
1505                                           "no support for multiple vlan pop "
1506                                           "actions");
1507         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1508                 return rte_flow_error_set(error, ENOTSUP,
1509                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1510                                           NULL,
1511                                           "cannot pop vlan without a "
1512                                           "match on (outer) vlan in the flow");
1513         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1514                 return rte_flow_error_set(error, EINVAL,
1515                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1516                                           "wrong action order, port_id should "
1517                                           "be after pop VLAN action");
1518         return 0;
1519 }
1520
1521 /**
1522  * Get VLAN default info from vlan match info.
1523  *
1524  * @param[in] dev
1525  *   Pointer to the rte_eth_dev structure.
1526  * @param[in] item
1527  *   the list of item specifications.
1528  * @param[out] vlan
1529  *   pointer VLAN info to fill to.
1530  * @param[out] error
1531  *   Pointer to error structure.
1532  *
1533  * @return
1534  *   0 on success, a negative errno value otherwise and rte_errno is set.
1535  */
1536 static void
1537 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1538                                   struct rte_vlan_hdr *vlan)
1539 {
1540         const struct rte_flow_item_vlan nic_mask = {
1541                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1542                                 MLX5DV_FLOW_VLAN_VID_MASK),
1543                 .inner_type = RTE_BE16(0xffff),
1544         };
1545
1546         if (items == NULL)
1547                 return;
1548         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1549                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1550                 ;
1551         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1552                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1553                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1554
1555                 if (!vlan_m)
1556                         vlan_m = &nic_mask;
1557                 /* Only full match values are accepted */
1558                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1559                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1560                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1561                         vlan->vlan_tci |=
1562                                 rte_be_to_cpu_16(vlan_v->tci &
1563                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1564                 }
1565                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1566                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1567                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1568                         vlan->vlan_tci |=
1569                                 rte_be_to_cpu_16(vlan_v->tci &
1570                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1571                 }
1572                 if (vlan_m->inner_type == nic_mask.inner_type)
1573                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1574                                                            vlan_m->inner_type);
1575         }
1576 }
1577
1578 /**
1579  * Validate the push VLAN action.
1580  *
1581  * @param[in] action_flags
1582  *   Holds the actions detected until now.
1583  * @param[in] action
1584  *   Pointer to the encap action.
1585  * @param[in] attr
1586  *   Pointer to flow attributes
1587  * @param[out] error
1588  *   Pointer to error structure.
1589  *
1590  * @return
1591  *   0 on success, a negative errno value otherwise and rte_errno is set.
1592  */
1593 static int
1594 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1595                                   uint64_t item_flags,
1596                                   const struct rte_flow_action *action,
1597                                   const struct rte_flow_attr *attr,
1598                                   struct rte_flow_error *error)
1599 {
1600         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1601
1602         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1603             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1604                 return rte_flow_error_set(error, EINVAL,
1605                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1606                                           "invalid vlan ethertype");
1607         if (action_flags &
1608                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1609                 return rte_flow_error_set(error, ENOTSUP,
1610                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1611                                           "no support for multiple VLAN "
1612                                           "actions");
1613         if (!mlx5_flow_find_action
1614                         (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1615             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1616                 return rte_flow_error_set(error, ENOTSUP,
1617                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
1618                                 "push VLAN needs to match on VLAN in order to "
1619                                 "get VLAN VID information because there is "
1620                                 "no followed set VLAN VID action");
1621         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1622                 return rte_flow_error_set(error, EINVAL,
1623                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1624                                           "wrong action order, port_id should "
1625                                           "be after push VLAN");
1626         (void)attr;
1627         return 0;
1628 }
1629
1630 /**
1631  * Validate the set VLAN PCP.
1632  *
1633  * @param[in] action_flags
1634  *   Holds the actions detected until now.
1635  * @param[in] actions
1636  *   Pointer to the list of actions remaining in the flow rule.
1637  * @param[in] attr
1638  *   Pointer to flow attributes
1639  * @param[out] error
1640  *   Pointer to error structure.
1641  *
1642  * @return
1643  *   0 on success, a negative errno value otherwise and rte_errno is set.
1644  */
1645 static int
1646 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1647                                      const struct rte_flow_action actions[],
1648                                      struct rte_flow_error *error)
1649 {
1650         const struct rte_flow_action *action = actions;
1651         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1652
1653         if (conf->vlan_pcp > 7)
1654                 return rte_flow_error_set(error, EINVAL,
1655                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1656                                           "VLAN PCP value is too big");
1657         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1658                 return rte_flow_error_set(error, ENOTSUP,
1659                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1660                                           "set VLAN PCP action must follow "
1661                                           "the push VLAN action");
1662         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1663                 return rte_flow_error_set(error, ENOTSUP,
1664                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1665                                           "Multiple VLAN PCP modification are "
1666                                           "not supported");
1667         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1668                 return rte_flow_error_set(error, EINVAL,
1669                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1670                                           "wrong action order, port_id should "
1671                                           "be after set VLAN PCP");
1672         return 0;
1673 }
1674
1675 /**
1676  * Validate the set VLAN VID.
1677  *
1678  * @param[in] item_flags
1679  *   Holds the items detected in this rule.
1680  * @param[in] actions
1681  *   Pointer to the list of actions remaining in the flow rule.
1682  * @param[in] attr
1683  *   Pointer to flow attributes
1684  * @param[out] error
1685  *   Pointer to error structure.
1686  *
1687  * @return
1688  *   0 on success, a negative errno value otherwise and rte_errno is set.
1689  */
1690 static int
1691 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1692                                      uint64_t action_flags,
1693                                      const struct rte_flow_action actions[],
1694                                      struct rte_flow_error *error)
1695 {
1696         const struct rte_flow_action *action = actions;
1697         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1698
1699         if (conf->vlan_vid > RTE_BE16(0xFFE))
1700                 return rte_flow_error_set(error, EINVAL,
1701                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1702                                           "VLAN VID value is too big");
1703         /* there is an of_push_vlan action before us */
1704         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1705                 if (mlx5_flow_find_action(actions + 1,
1706                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1707                         return rte_flow_error_set(error, ENOTSUP,
1708                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1709                                         "Multiple VLAN VID modifications are "
1710                                         "not supported");
1711                 else
1712                         return 0;
1713         }
1714
1715         /*
1716          * Action is on an existing VLAN header:
1717          *    Need to verify this is a single modify CID action.
1718          *   Rule mast include a match on outer VLAN.
1719          */
1720         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1721                 return rte_flow_error_set(error, ENOTSUP,
1722                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1723                                           "Multiple VLAN VID modifications are "
1724                                           "not supported");
1725         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1726                 return rte_flow_error_set(error, EINVAL,
1727                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1728                                           "match on VLAN is required in order "
1729                                           "to set VLAN VID");
1730         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1731                 return rte_flow_error_set(error, EINVAL,
1732                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1733                                           "wrong action order, port_id should "
1734                                           "be after set VLAN VID");
1735         return 0;
1736 }
1737
1738 /*
1739  * Validate the FLAG action.
1740  *
1741  * @param[in] dev
1742  *   Pointer to the rte_eth_dev structure.
1743  * @param[in] action_flags
1744  *   Holds the actions detected until now.
1745  * @param[in] attr
1746  *   Pointer to flow attributes
1747  * @param[out] error
1748  *   Pointer to error structure.
1749  *
1750  * @return
1751  *   0 on success, a negative errno value otherwise and rte_errno is set.
1752  */
1753 static int
1754 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1755                              uint64_t action_flags,
1756                              const struct rte_flow_attr *attr,
1757                              struct rte_flow_error *error)
1758 {
1759         struct mlx5_priv *priv = dev->data->dev_private;
1760         struct mlx5_dev_config *config = &priv->config;
1761         int ret;
1762
1763         /* Fall back if no extended metadata register support. */
1764         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1765                 return mlx5_flow_validate_action_flag(action_flags, attr,
1766                                                       error);
1767         /* Extensive metadata mode requires registers. */
1768         if (!mlx5_flow_ext_mreg_supported(dev))
1769                 return rte_flow_error_set(error, ENOTSUP,
1770                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1771                                           "no metadata registers "
1772                                           "to support flag action");
1773         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1774                 return rte_flow_error_set(error, ENOTSUP,
1775                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1776                                           "extended metadata register"
1777                                           " isn't available");
1778         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1779         if (ret < 0)
1780                 return ret;
1781         assert(ret > 0);
1782         if (action_flags & MLX5_FLOW_ACTION_DROP)
1783                 return rte_flow_error_set(error, EINVAL,
1784                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1785                                           "can't drop and flag in same flow");
1786         if (action_flags & MLX5_FLOW_ACTION_MARK)
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1789                                           "can't mark and flag in same flow");
1790         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1791                 return rte_flow_error_set(error, EINVAL,
1792                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1793                                           "can't have 2 flag"
1794                                           " actions in same flow");
1795         return 0;
1796 }
1797
1798 /**
1799  * Validate MARK action.
1800  *
1801  * @param[in] dev
1802  *   Pointer to the rte_eth_dev structure.
1803  * @param[in] action
1804  *   Pointer to action.
1805  * @param[in] action_flags
1806  *   Holds the actions detected until now.
1807  * @param[in] attr
1808  *   Pointer to flow attributes
1809  * @param[out] error
1810  *   Pointer to error structure.
1811  *
1812  * @return
1813  *   0 on success, a negative errno value otherwise and rte_errno is set.
1814  */
1815 static int
1816 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1817                              const struct rte_flow_action *action,
1818                              uint64_t action_flags,
1819                              const struct rte_flow_attr *attr,
1820                              struct rte_flow_error *error)
1821 {
1822         struct mlx5_priv *priv = dev->data->dev_private;
1823         struct mlx5_dev_config *config = &priv->config;
1824         const struct rte_flow_action_mark *mark = action->conf;
1825         int ret;
1826
1827         /* Fall back if no extended metadata register support. */
1828         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1829                 return mlx5_flow_validate_action_mark(action, action_flags,
1830                                                       attr, error);
1831         /* Extensive metadata mode requires registers. */
1832         if (!mlx5_flow_ext_mreg_supported(dev))
1833                 return rte_flow_error_set(error, ENOTSUP,
1834                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1835                                           "no metadata registers "
1836                                           "to support mark action");
1837         if (!priv->sh->dv_mark_mask)
1838                 return rte_flow_error_set(error, ENOTSUP,
1839                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1840                                           "extended metadata register"
1841                                           " isn't available");
1842         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1843         if (ret < 0)
1844                 return ret;
1845         assert(ret > 0);
1846         if (!mark)
1847                 return rte_flow_error_set(error, EINVAL,
1848                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1849                                           "configuration cannot be null");
1850         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1851                 return rte_flow_error_set(error, EINVAL,
1852                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1853                                           &mark->id,
1854                                           "mark id exceeds the limit");
1855         if (action_flags & MLX5_FLOW_ACTION_DROP)
1856                 return rte_flow_error_set(error, EINVAL,
1857                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1858                                           "can't drop and mark in same flow");
1859         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1860                 return rte_flow_error_set(error, EINVAL,
1861                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1862                                           "can't flag and mark in same flow");
1863         if (action_flags & MLX5_FLOW_ACTION_MARK)
1864                 return rte_flow_error_set(error, EINVAL,
1865                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1866                                           "can't have 2 mark actions in same"
1867                                           " flow");
1868         return 0;
1869 }
1870
1871 /**
1872  * Validate SET_META action.
1873  *
1874  * @param[in] dev
1875  *   Pointer to the rte_eth_dev structure.
1876  * @param[in] action
1877  *   Pointer to the encap action.
1878  * @param[in] action_flags
1879  *   Holds the actions detected until now.
1880  * @param[in] attr
1881  *   Pointer to flow attributes
1882  * @param[out] error
1883  *   Pointer to error structure.
1884  *
1885  * @return
1886  *   0 on success, a negative errno value otherwise and rte_errno is set.
1887  */
1888 static int
1889 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
1890                                  const struct rte_flow_action *action,
1891                                  uint64_t action_flags __rte_unused,
1892                                  const struct rte_flow_attr *attr,
1893                                  struct rte_flow_error *error)
1894 {
1895         const struct rte_flow_action_set_meta *conf;
1896         uint32_t nic_mask = UINT32_MAX;
1897         enum modify_reg reg;
1898
1899         if (!mlx5_flow_ext_mreg_supported(dev))
1900                 return rte_flow_error_set(error, ENOTSUP,
1901                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1902                                           "extended metadata register"
1903                                           " isn't supported");
1904         reg = flow_dv_get_metadata_reg(dev, attr, error);
1905         if (reg < 0)
1906                 return reg;
1907         if (reg != REG_A && reg != REG_B) {
1908                 struct mlx5_priv *priv = dev->data->dev_private;
1909
1910                 nic_mask = priv->sh->dv_meta_mask;
1911         }
1912         if (!(action->conf))
1913                 return rte_flow_error_set(error, EINVAL,
1914                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1915                                           "configuration cannot be null");
1916         conf = (const struct rte_flow_action_set_meta *)action->conf;
1917         if (!conf->mask)
1918                 return rte_flow_error_set(error, EINVAL,
1919                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1920                                           "zero mask doesn't have any effect");
1921         if (conf->mask & ~nic_mask)
1922                 return rte_flow_error_set(error, EINVAL,
1923                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1924                                           "meta data must be within reg C0");
1925         if (!(conf->data & conf->mask))
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1928                                           "zero value has no effect");
1929         return 0;
1930 }
1931
1932 /**
1933  * Validate SET_TAG action.
1934  *
1935  * @param[in] dev
1936  *   Pointer to the rte_eth_dev structure.
1937  * @param[in] action
1938  *   Pointer to the encap action.
1939  * @param[in] action_flags
1940  *   Holds the actions detected until now.
1941  * @param[in] attr
1942  *   Pointer to flow attributes
1943  * @param[out] error
1944  *   Pointer to error structure.
1945  *
1946  * @return
1947  *   0 on success, a negative errno value otherwise and rte_errno is set.
1948  */
1949 static int
1950 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
1951                                 const struct rte_flow_action *action,
1952                                 uint64_t action_flags,
1953                                 const struct rte_flow_attr *attr,
1954                                 struct rte_flow_error *error)
1955 {
1956         const struct rte_flow_action_set_tag *conf;
1957         const uint64_t terminal_action_flags =
1958                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
1959                 MLX5_FLOW_ACTION_RSS;
1960         int ret;
1961
1962         if (!mlx5_flow_ext_mreg_supported(dev))
1963                 return rte_flow_error_set(error, ENOTSUP,
1964                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1965                                           "extensive metadata register"
1966                                           " isn't supported");
1967         if (!(action->conf))
1968                 return rte_flow_error_set(error, EINVAL,
1969                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1970                                           "configuration cannot be null");
1971         conf = (const struct rte_flow_action_set_tag *)action->conf;
1972         if (!conf->mask)
1973                 return rte_flow_error_set(error, EINVAL,
1974                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1975                                           "zero mask doesn't have any effect");
1976         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1977         if (ret < 0)
1978                 return ret;
1979         if (!attr->transfer && attr->ingress &&
1980             (action_flags & terminal_action_flags))
1981                 return rte_flow_error_set(error, EINVAL,
1982                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1983                                           "set_tag has no effect"
1984                                           " with terminal actions");
1985         return 0;
1986 }
1987
1988 /**
1989  * Validate count action.
1990  *
1991  * @param[in] dev
1992  *   device otr.
1993  * @param[out] error
1994  *   Pointer to error structure.
1995  *
1996  * @return
1997  *   0 on success, a negative errno value otherwise and rte_errno is set.
1998  */
1999 static int
2000 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2001                               struct rte_flow_error *error)
2002 {
2003         struct mlx5_priv *priv = dev->data->dev_private;
2004
2005         if (!priv->config.devx)
2006                 goto notsup_err;
2007 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2008         return 0;
2009 #endif
2010 notsup_err:
2011         return rte_flow_error_set
2012                       (error, ENOTSUP,
2013                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2014                        NULL,
2015                        "count action not supported");
2016 }
2017
2018 /**
2019  * Validate the L2 encap action.
2020  *
2021  * @param[in] action_flags
2022  *   Holds the actions detected until now.
2023  * @param[in] action
2024  *   Pointer to the encap action.
2025  * @param[in] attr
2026  *   Pointer to flow attributes
2027  * @param[out] error
2028  *   Pointer to error structure.
2029  *
2030  * @return
2031  *   0 on success, a negative errno value otherwise and rte_errno is set.
2032  */
2033 static int
2034 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2035                                  const struct rte_flow_action *action,
2036                                  const struct rte_flow_attr *attr,
2037                                  struct rte_flow_error *error)
2038 {
2039         if (!(action->conf))
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2042                                           "configuration cannot be null");
2043         if (action_flags & MLX5_FLOW_ACTION_DROP)
2044                 return rte_flow_error_set(error, EINVAL,
2045                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2046                                           "can't drop and encap in same flow");
2047         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2048                 return rte_flow_error_set(error, EINVAL,
2049                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2050                                           "can only have a single encap or"
2051                                           " decap action in a flow");
2052         if (!attr->transfer && attr->ingress)
2053                 return rte_flow_error_set(error, ENOTSUP,
2054                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2055                                           NULL,
2056                                           "encap action not supported for "
2057                                           "ingress");
2058         return 0;
2059 }
2060
2061 /**
2062  * Validate the L2 decap action.
2063  *
2064  * @param[in] action_flags
2065  *   Holds the actions detected until now.
2066  * @param[in] attr
2067  *   Pointer to flow attributes
2068  * @param[out] error
2069  *   Pointer to error structure.
2070  *
2071  * @return
2072  *   0 on success, a negative errno value otherwise and rte_errno is set.
2073  */
2074 static int
2075 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2076                                  const struct rte_flow_attr *attr,
2077                                  struct rte_flow_error *error)
2078 {
2079         if (action_flags & MLX5_FLOW_ACTION_DROP)
2080                 return rte_flow_error_set(error, EINVAL,
2081                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2082                                           "can't drop and decap in same flow");
2083         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2084                 return rte_flow_error_set(error, EINVAL,
2085                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2086                                           "can only have a single encap or"
2087                                           " decap action in a flow");
2088         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2091                                           "can't have decap action after"
2092                                           " modify action");
2093         if (attr->egress)
2094                 return rte_flow_error_set(error, ENOTSUP,
2095                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2096                                           NULL,
2097                                           "decap action not supported for "
2098                                           "egress");
2099         return 0;
2100 }
2101
2102 /**
2103  * Validate the raw encap action.
2104  *
2105  * @param[in] action_flags
2106  *   Holds the actions detected until now.
2107  * @param[in] action
2108  *   Pointer to the encap action.
2109  * @param[in] attr
2110  *   Pointer to flow attributes
2111  * @param[out] error
2112  *   Pointer to error structure.
2113  *
2114  * @return
2115  *   0 on success, a negative errno value otherwise and rte_errno is set.
2116  */
2117 static int
2118 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2119                                   const struct rte_flow_action *action,
2120                                   const struct rte_flow_attr *attr,
2121                                   struct rte_flow_error *error)
2122 {
2123         const struct rte_flow_action_raw_encap *raw_encap =
2124                 (const struct rte_flow_action_raw_encap *)action->conf;
2125         if (!(action->conf))
2126                 return rte_flow_error_set(error, EINVAL,
2127                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2128                                           "configuration cannot be null");
2129         if (action_flags & MLX5_FLOW_ACTION_DROP)
2130                 return rte_flow_error_set(error, EINVAL,
2131                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2132                                           "can't drop and encap in same flow");
2133         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2134                 return rte_flow_error_set(error, EINVAL,
2135                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2136                                           "can only have a single encap"
2137                                           " action in a flow");
2138         /* encap without preceding decap is not supported for ingress */
2139         if (!attr->transfer &&  attr->ingress &&
2140             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2141                 return rte_flow_error_set(error, ENOTSUP,
2142                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2143                                           NULL,
2144                                           "encap action not supported for "
2145                                           "ingress");
2146         if (!raw_encap->size || !raw_encap->data)
2147                 return rte_flow_error_set(error, EINVAL,
2148                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2149                                           "raw encap data cannot be empty");
2150         return 0;
2151 }
2152
2153 /**
2154  * Validate the raw decap action.
2155  *
2156  * @param[in] action_flags
2157  *   Holds the actions detected until now.
2158  * @param[in] action
2159  *   Pointer to the encap action.
2160  * @param[in] attr
2161  *   Pointer to flow attributes
2162  * @param[out] error
2163  *   Pointer to error structure.
2164  *
2165  * @return
2166  *   0 on success, a negative errno value otherwise and rte_errno is set.
2167  */
2168 static int
2169 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2170                                   const struct rte_flow_action *action,
2171                                   const struct rte_flow_attr *attr,
2172                                   struct rte_flow_error *error)
2173 {
2174         if (action_flags & MLX5_FLOW_ACTION_DROP)
2175                 return rte_flow_error_set(error, EINVAL,
2176                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2177                                           "can't drop and decap in same flow");
2178         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2179                 return rte_flow_error_set(error, EINVAL,
2180                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2181                                           "can't have encap action before"
2182                                           " decap action");
2183         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2184                 return rte_flow_error_set(error, EINVAL,
2185                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2186                                           "can only have a single decap"
2187                                           " action in a flow");
2188         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2189                 return rte_flow_error_set(error, EINVAL,
2190                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2191                                           "can't have decap action after"
2192                                           " modify action");
2193         /* decap action is valid on egress only if it is followed by encap */
2194         if (attr->egress) {
2195                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
2196                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
2197                        action++) {
2198                 }
2199                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
2200                         return rte_flow_error_set
2201                                         (error, ENOTSUP,
2202                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2203                                          NULL, "decap action not supported"
2204                                          " for egress");
2205         }
2206         return 0;
2207 }
2208
2209 /**
2210  * Find existing encap/decap resource or create and register a new one.
2211  *
2212  * @param[in, out] dev
2213  *   Pointer to rte_eth_dev structure.
2214  * @param[in, out] resource
2215  *   Pointer to encap/decap resource.
2216  * @parm[in, out] dev_flow
2217  *   Pointer to the dev_flow.
2218  * @param[out] error
2219  *   pointer to error structure.
2220  *
2221  * @return
2222  *   0 on success otherwise -errno and errno is set.
2223  */
2224 static int
2225 flow_dv_encap_decap_resource_register
2226                         (struct rte_eth_dev *dev,
2227                          struct mlx5_flow_dv_encap_decap_resource *resource,
2228                          struct mlx5_flow *dev_flow,
2229                          struct rte_flow_error *error)
2230 {
2231         struct mlx5_priv *priv = dev->data->dev_private;
2232         struct mlx5_ibv_shared *sh = priv->sh;
2233         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2234         struct mlx5dv_dr_domain *domain;
2235
2236         resource->flags = dev_flow->group ? 0 : 1;
2237         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2238                 domain = sh->fdb_domain;
2239         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2240                 domain = sh->rx_domain;
2241         else
2242                 domain = sh->tx_domain;
2243
2244         /* Lookup a matching resource from cache. */
2245         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2246                 if (resource->reformat_type == cache_resource->reformat_type &&
2247                     resource->ft_type == cache_resource->ft_type &&
2248                     resource->flags == cache_resource->flags &&
2249                     resource->size == cache_resource->size &&
2250                     !memcmp((const void *)resource->buf,
2251                             (const void *)cache_resource->buf,
2252                             resource->size)) {
2253                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2254                                 (void *)cache_resource,
2255                                 rte_atomic32_read(&cache_resource->refcnt));
2256                         rte_atomic32_inc(&cache_resource->refcnt);
2257                         dev_flow->dv.encap_decap = cache_resource;
2258                         return 0;
2259                 }
2260         }
2261         /* Register new encap/decap resource. */
2262         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2263         if (!cache_resource)
2264                 return rte_flow_error_set(error, ENOMEM,
2265                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2266                                           "cannot allocate resource memory");
2267         *cache_resource = *resource;
2268         cache_resource->verbs_action =
2269                 mlx5_glue->dv_create_flow_action_packet_reformat
2270                         (sh->ctx, cache_resource->reformat_type,
2271                          cache_resource->ft_type, domain, cache_resource->flags,
2272                          cache_resource->size,
2273                          (cache_resource->size ? cache_resource->buf : NULL));
2274         if (!cache_resource->verbs_action) {
2275                 rte_free(cache_resource);
2276                 return rte_flow_error_set(error, ENOMEM,
2277                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2278                                           NULL, "cannot create action");
2279         }
2280         rte_atomic32_init(&cache_resource->refcnt);
2281         rte_atomic32_inc(&cache_resource->refcnt);
2282         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2283         dev_flow->dv.encap_decap = cache_resource;
2284         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2285                 (void *)cache_resource,
2286                 rte_atomic32_read(&cache_resource->refcnt));
2287         return 0;
2288 }
2289
2290 /**
2291  * Find existing table jump resource or create and register a new one.
2292  *
2293  * @param[in, out] dev
2294  *   Pointer to rte_eth_dev structure.
2295  * @param[in, out] resource
2296  *   Pointer to jump table resource.
2297  * @parm[in, out] dev_flow
2298  *   Pointer to the dev_flow.
2299  * @param[out] error
2300  *   pointer to error structure.
2301  *
2302  * @return
2303  *   0 on success otherwise -errno and errno is set.
2304  */
2305 static int
2306 flow_dv_jump_tbl_resource_register
2307                         (struct rte_eth_dev *dev,
2308                          struct mlx5_flow_dv_jump_tbl_resource *resource,
2309                          struct mlx5_flow *dev_flow,
2310                          struct rte_flow_error *error)
2311 {
2312         struct mlx5_priv *priv = dev->data->dev_private;
2313         struct mlx5_ibv_shared *sh = priv->sh;
2314         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
2315
2316         /* Lookup a matching resource from cache. */
2317         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
2318                 if (resource->tbl == cache_resource->tbl) {
2319                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
2320                                 (void *)cache_resource,
2321                                 rte_atomic32_read(&cache_resource->refcnt));
2322                         rte_atomic32_inc(&cache_resource->refcnt);
2323                         dev_flow->dv.jump = cache_resource;
2324                         return 0;
2325                 }
2326         }
2327         /* Register new jump table resource. */
2328         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2329         if (!cache_resource)
2330                 return rte_flow_error_set(error, ENOMEM,
2331                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2332                                           "cannot allocate resource memory");
2333         *cache_resource = *resource;
2334         cache_resource->action =
2335                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
2336                 (resource->tbl->obj);
2337         if (!cache_resource->action) {
2338                 rte_free(cache_resource);
2339                 return rte_flow_error_set(error, ENOMEM,
2340                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2341                                           NULL, "cannot create action");
2342         }
2343         rte_atomic32_init(&cache_resource->refcnt);
2344         rte_atomic32_inc(&cache_resource->refcnt);
2345         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
2346         dev_flow->dv.jump = cache_resource;
2347         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
2348                 (void *)cache_resource,
2349                 rte_atomic32_read(&cache_resource->refcnt));
2350         return 0;
2351 }
2352
2353 /**
2354  * Find existing table port ID resource or create and register a new one.
2355  *
2356  * @param[in, out] dev
2357  *   Pointer to rte_eth_dev structure.
2358  * @param[in, out] resource
2359  *   Pointer to port ID action resource.
2360  * @parm[in, out] dev_flow
2361  *   Pointer to the dev_flow.
2362  * @param[out] error
2363  *   pointer to error structure.
2364  *
2365  * @return
2366  *   0 on success otherwise -errno and errno is set.
2367  */
2368 static int
2369 flow_dv_port_id_action_resource_register
2370                         (struct rte_eth_dev *dev,
2371                          struct mlx5_flow_dv_port_id_action_resource *resource,
2372                          struct mlx5_flow *dev_flow,
2373                          struct rte_flow_error *error)
2374 {
2375         struct mlx5_priv *priv = dev->data->dev_private;
2376         struct mlx5_ibv_shared *sh = priv->sh;
2377         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2378
2379         /* Lookup a matching resource from cache. */
2380         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2381                 if (resource->port_id == cache_resource->port_id) {
2382                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2383                                 "refcnt %d++",
2384                                 (void *)cache_resource,
2385                                 rte_atomic32_read(&cache_resource->refcnt));
2386                         rte_atomic32_inc(&cache_resource->refcnt);
2387                         dev_flow->dv.port_id_action = cache_resource;
2388                         return 0;
2389                 }
2390         }
2391         /* Register new port id action resource. */
2392         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2393         if (!cache_resource)
2394                 return rte_flow_error_set(error, ENOMEM,
2395                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2396                                           "cannot allocate resource memory");
2397         *cache_resource = *resource;
2398         cache_resource->action =
2399                 mlx5_glue->dr_create_flow_action_dest_vport
2400                         (priv->sh->fdb_domain, resource->port_id);
2401         if (!cache_resource->action) {
2402                 rte_free(cache_resource);
2403                 return rte_flow_error_set(error, ENOMEM,
2404                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2405                                           NULL, "cannot create action");
2406         }
2407         rte_atomic32_init(&cache_resource->refcnt);
2408         rte_atomic32_inc(&cache_resource->refcnt);
2409         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2410         dev_flow->dv.port_id_action = cache_resource;
2411         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2412                 (void *)cache_resource,
2413                 rte_atomic32_read(&cache_resource->refcnt));
2414         return 0;
2415 }
2416
2417 /**
2418  * Find existing push vlan resource or create and register a new one.
2419  *
2420  * @param [in, out] dev
2421  *   Pointer to rte_eth_dev structure.
2422  * @param[in, out] resource
2423  *   Pointer to port ID action resource.
2424  * @parm[in, out] dev_flow
2425  *   Pointer to the dev_flow.
2426  * @param[out] error
2427  *   pointer to error structure.
2428  *
2429  * @return
2430  *   0 on success otherwise -errno and errno is set.
2431  */
2432 static int
2433 flow_dv_push_vlan_action_resource_register
2434                        (struct rte_eth_dev *dev,
2435                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2436                         struct mlx5_flow *dev_flow,
2437                         struct rte_flow_error *error)
2438 {
2439         struct mlx5_priv *priv = dev->data->dev_private;
2440         struct mlx5_ibv_shared *sh = priv->sh;
2441         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2442         struct mlx5dv_dr_domain *domain;
2443
2444         /* Lookup a matching resource from cache. */
2445         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2446                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2447                     resource->ft_type == cache_resource->ft_type) {
2448                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2449                                 "refcnt %d++",
2450                                 (void *)cache_resource,
2451                                 rte_atomic32_read(&cache_resource->refcnt));
2452                         rte_atomic32_inc(&cache_resource->refcnt);
2453                         dev_flow->dv.push_vlan_res = cache_resource;
2454                         return 0;
2455                 }
2456         }
2457         /* Register new push_vlan action resource. */
2458         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2459         if (!cache_resource)
2460                 return rte_flow_error_set(error, ENOMEM,
2461                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2462                                           "cannot allocate resource memory");
2463         *cache_resource = *resource;
2464         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2465                 domain = sh->fdb_domain;
2466         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2467                 domain = sh->rx_domain;
2468         else
2469                 domain = sh->tx_domain;
2470         cache_resource->action =
2471                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2472                                                            resource->vlan_tag);
2473         if (!cache_resource->action) {
2474                 rte_free(cache_resource);
2475                 return rte_flow_error_set(error, ENOMEM,
2476                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2477                                           NULL, "cannot create action");
2478         }
2479         rte_atomic32_init(&cache_resource->refcnt);
2480         rte_atomic32_inc(&cache_resource->refcnt);
2481         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2482         dev_flow->dv.push_vlan_res = cache_resource;
2483         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2484                 (void *)cache_resource,
2485                 rte_atomic32_read(&cache_resource->refcnt));
2486         return 0;
2487 }
2488 /**
2489  * Get the size of specific rte_flow_item_type
2490  *
2491  * @param[in] item_type
2492  *   Tested rte_flow_item_type.
2493  *
2494  * @return
2495  *   sizeof struct item_type, 0 if void or irrelevant.
2496  */
2497 static size_t
2498 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2499 {
2500         size_t retval;
2501
2502         switch (item_type) {
2503         case RTE_FLOW_ITEM_TYPE_ETH:
2504                 retval = sizeof(struct rte_flow_item_eth);
2505                 break;
2506         case RTE_FLOW_ITEM_TYPE_VLAN:
2507                 retval = sizeof(struct rte_flow_item_vlan);
2508                 break;
2509         case RTE_FLOW_ITEM_TYPE_IPV4:
2510                 retval = sizeof(struct rte_flow_item_ipv4);
2511                 break;
2512         case RTE_FLOW_ITEM_TYPE_IPV6:
2513                 retval = sizeof(struct rte_flow_item_ipv6);
2514                 break;
2515         case RTE_FLOW_ITEM_TYPE_UDP:
2516                 retval = sizeof(struct rte_flow_item_udp);
2517                 break;
2518         case RTE_FLOW_ITEM_TYPE_TCP:
2519                 retval = sizeof(struct rte_flow_item_tcp);
2520                 break;
2521         case RTE_FLOW_ITEM_TYPE_VXLAN:
2522                 retval = sizeof(struct rte_flow_item_vxlan);
2523                 break;
2524         case RTE_FLOW_ITEM_TYPE_GRE:
2525                 retval = sizeof(struct rte_flow_item_gre);
2526                 break;
2527         case RTE_FLOW_ITEM_TYPE_NVGRE:
2528                 retval = sizeof(struct rte_flow_item_nvgre);
2529                 break;
2530         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2531                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2532                 break;
2533         case RTE_FLOW_ITEM_TYPE_MPLS:
2534                 retval = sizeof(struct rte_flow_item_mpls);
2535                 break;
2536         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2537         default:
2538                 retval = 0;
2539                 break;
2540         }
2541         return retval;
2542 }
2543
2544 #define MLX5_ENCAP_IPV4_VERSION         0x40
2545 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2546 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2547 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2548 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2549 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2550 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2551
2552 /**
2553  * Convert the encap action data from list of rte_flow_item to raw buffer
2554  *
2555  * @param[in] items
2556  *   Pointer to rte_flow_item objects list.
2557  * @param[out] buf
2558  *   Pointer to the output buffer.
2559  * @param[out] size
2560  *   Pointer to the output buffer size.
2561  * @param[out] error
2562  *   Pointer to the error structure.
2563  *
2564  * @return
2565  *   0 on success, a negative errno value otherwise and rte_errno is set.
2566  */
2567 static int
2568 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2569                            size_t *size, struct rte_flow_error *error)
2570 {
2571         struct rte_ether_hdr *eth = NULL;
2572         struct rte_vlan_hdr *vlan = NULL;
2573         struct rte_ipv4_hdr *ipv4 = NULL;
2574         struct rte_ipv6_hdr *ipv6 = NULL;
2575         struct rte_udp_hdr *udp = NULL;
2576         struct rte_vxlan_hdr *vxlan = NULL;
2577         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2578         struct rte_gre_hdr *gre = NULL;
2579         size_t len;
2580         size_t temp_size = 0;
2581
2582         if (!items)
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ACTION,
2585                                           NULL, "invalid empty data");
2586         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2587                 len = flow_dv_get_item_len(items->type);
2588                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2589                         return rte_flow_error_set(error, EINVAL,
2590                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2591                                                   (void *)items->type,
2592                                                   "items total size is too big"
2593                                                   " for encap action");
2594                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2595                 switch (items->type) {
2596                 case RTE_FLOW_ITEM_TYPE_ETH:
2597                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2598                         break;
2599                 case RTE_FLOW_ITEM_TYPE_VLAN:
2600                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2601                         if (!eth)
2602                                 return rte_flow_error_set(error, EINVAL,
2603                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2604                                                 (void *)items->type,
2605                                                 "eth header not found");
2606                         if (!eth->ether_type)
2607                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2608                         break;
2609                 case RTE_FLOW_ITEM_TYPE_IPV4:
2610                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2611                         if (!vlan && !eth)
2612                                 return rte_flow_error_set(error, EINVAL,
2613                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2614                                                 (void *)items->type,
2615                                                 "neither eth nor vlan"
2616                                                 " header found");
2617                         if (vlan && !vlan->eth_proto)
2618                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2619                         else if (eth && !eth->ether_type)
2620                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2621                         if (!ipv4->version_ihl)
2622                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2623                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2624                         if (!ipv4->time_to_live)
2625                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2626                         break;
2627                 case RTE_FLOW_ITEM_TYPE_IPV6:
2628                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2629                         if (!vlan && !eth)
2630                                 return rte_flow_error_set(error, EINVAL,
2631                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2632                                                 (void *)items->type,
2633                                                 "neither eth nor vlan"
2634                                                 " header found");
2635                         if (vlan && !vlan->eth_proto)
2636                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2637                         else if (eth && !eth->ether_type)
2638                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2639                         if (!ipv6->vtc_flow)
2640                                 ipv6->vtc_flow =
2641                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2642                         if (!ipv6->hop_limits)
2643                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2644                         break;
2645                 case RTE_FLOW_ITEM_TYPE_UDP:
2646                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2647                         if (!ipv4 && !ipv6)
2648                                 return rte_flow_error_set(error, EINVAL,
2649                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2650                                                 (void *)items->type,
2651                                                 "ip header not found");
2652                         if (ipv4 && !ipv4->next_proto_id)
2653                                 ipv4->next_proto_id = IPPROTO_UDP;
2654                         else if (ipv6 && !ipv6->proto)
2655                                 ipv6->proto = IPPROTO_UDP;
2656                         break;
2657                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2658                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2659                         if (!udp)
2660                                 return rte_flow_error_set(error, EINVAL,
2661                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2662                                                 (void *)items->type,
2663                                                 "udp header not found");
2664                         if (!udp->dst_port)
2665                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2666                         if (!vxlan->vx_flags)
2667                                 vxlan->vx_flags =
2668                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2669                         break;
2670                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2671                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2672                         if (!udp)
2673                                 return rte_flow_error_set(error, EINVAL,
2674                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2675                                                 (void *)items->type,
2676                                                 "udp header not found");
2677                         if (!vxlan_gpe->proto)
2678                                 return rte_flow_error_set(error, EINVAL,
2679                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2680                                                 (void *)items->type,
2681                                                 "next protocol not found");
2682                         if (!udp->dst_port)
2683                                 udp->dst_port =
2684                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2685                         if (!vxlan_gpe->vx_flags)
2686                                 vxlan_gpe->vx_flags =
2687                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2688                         break;
2689                 case RTE_FLOW_ITEM_TYPE_GRE:
2690                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2691                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2692                         if (!gre->proto)
2693                                 return rte_flow_error_set(error, EINVAL,
2694                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2695                                                 (void *)items->type,
2696                                                 "next protocol not found");
2697                         if (!ipv4 && !ipv6)
2698                                 return rte_flow_error_set(error, EINVAL,
2699                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2700                                                 (void *)items->type,
2701                                                 "ip header not found");
2702                         if (ipv4 && !ipv4->next_proto_id)
2703                                 ipv4->next_proto_id = IPPROTO_GRE;
2704                         else if (ipv6 && !ipv6->proto)
2705                                 ipv6->proto = IPPROTO_GRE;
2706                         break;
2707                 case RTE_FLOW_ITEM_TYPE_VOID:
2708                         break;
2709                 default:
2710                         return rte_flow_error_set(error, EINVAL,
2711                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2712                                                   (void *)items->type,
2713                                                   "unsupported item type");
2714                         break;
2715                 }
2716                 temp_size += len;
2717         }
2718         *size = temp_size;
2719         return 0;
2720 }
2721
2722 static int
2723 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2724 {
2725         struct rte_ether_hdr *eth = NULL;
2726         struct rte_vlan_hdr *vlan = NULL;
2727         struct rte_ipv6_hdr *ipv6 = NULL;
2728         struct rte_udp_hdr *udp = NULL;
2729         char *next_hdr;
2730         uint16_t proto;
2731
2732         eth = (struct rte_ether_hdr *)data;
2733         next_hdr = (char *)(eth + 1);
2734         proto = RTE_BE16(eth->ether_type);
2735
2736         /* VLAN skipping */
2737         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2738                 vlan = (struct rte_vlan_hdr *)next_hdr;
2739                 proto = RTE_BE16(vlan->eth_proto);
2740                 next_hdr += sizeof(struct rte_vlan_hdr);
2741         }
2742
2743         /* HW calculates IPv4 csum. no need to proceed */
2744         if (proto == RTE_ETHER_TYPE_IPV4)
2745                 return 0;
2746
2747         /* non IPv4/IPv6 header. not supported */
2748         if (proto != RTE_ETHER_TYPE_IPV6) {
2749                 return rte_flow_error_set(error, ENOTSUP,
2750                                           RTE_FLOW_ERROR_TYPE_ACTION,
2751                                           NULL, "Cannot offload non IPv4/IPv6");
2752         }
2753
2754         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2755
2756         /* ignore non UDP */
2757         if (ipv6->proto != IPPROTO_UDP)
2758                 return 0;
2759
2760         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2761         udp->dgram_cksum = 0;
2762
2763         return 0;
2764 }
2765
2766 /**
2767  * Convert L2 encap action to DV specification.
2768  *
2769  * @param[in] dev
2770  *   Pointer to rte_eth_dev structure.
2771  * @param[in] action
2772  *   Pointer to action structure.
2773  * @param[in, out] dev_flow
2774  *   Pointer to the mlx5_flow.
2775  * @param[in] transfer
2776  *   Mark if the flow is E-Switch flow.
2777  * @param[out] error
2778  *   Pointer to the error structure.
2779  *
2780  * @return
2781  *   0 on success, a negative errno value otherwise and rte_errno is set.
2782  */
2783 static int
2784 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2785                                const struct rte_flow_action *action,
2786                                struct mlx5_flow *dev_flow,
2787                                uint8_t transfer,
2788                                struct rte_flow_error *error)
2789 {
2790         const struct rte_flow_item *encap_data;
2791         const struct rte_flow_action_raw_encap *raw_encap_data;
2792         struct mlx5_flow_dv_encap_decap_resource res = {
2793                 .reformat_type =
2794                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2795                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2796                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2797         };
2798
2799         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2800                 raw_encap_data =
2801                         (const struct rte_flow_action_raw_encap *)action->conf;
2802                 res.size = raw_encap_data->size;
2803                 memcpy(res.buf, raw_encap_data->data, res.size);
2804                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2805                         return -rte_errno;
2806         } else {
2807                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2808                         encap_data =
2809                                 ((const struct rte_flow_action_vxlan_encap *)
2810                                                 action->conf)->definition;
2811                 else
2812                         encap_data =
2813                                 ((const struct rte_flow_action_nvgre_encap *)
2814                                                 action->conf)->definition;
2815                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2816                                                &res.size, error))
2817                         return -rte_errno;
2818         }
2819         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2820                 return rte_flow_error_set(error, EINVAL,
2821                                           RTE_FLOW_ERROR_TYPE_ACTION,
2822                                           NULL, "can't create L2 encap action");
2823         return 0;
2824 }
2825
2826 /**
2827  * Convert L2 decap action to DV specification.
2828  *
2829  * @param[in] dev
2830  *   Pointer to rte_eth_dev structure.
2831  * @param[in, out] dev_flow
2832  *   Pointer to the mlx5_flow.
2833  * @param[in] transfer
2834  *   Mark if the flow is E-Switch flow.
2835  * @param[out] error
2836  *   Pointer to the error structure.
2837  *
2838  * @return
2839  *   0 on success, a negative errno value otherwise and rte_errno is set.
2840  */
2841 static int
2842 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2843                                struct mlx5_flow *dev_flow,
2844                                uint8_t transfer,
2845                                struct rte_flow_error *error)
2846 {
2847         struct mlx5_flow_dv_encap_decap_resource res = {
2848                 .size = 0,
2849                 .reformat_type =
2850                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2851                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2852                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2853         };
2854
2855         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2856                 return rte_flow_error_set(error, EINVAL,
2857                                           RTE_FLOW_ERROR_TYPE_ACTION,
2858                                           NULL, "can't create L2 decap action");
2859         return 0;
2860 }
2861
2862 /**
2863  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2864  *
2865  * @param[in] dev
2866  *   Pointer to rte_eth_dev structure.
2867  * @param[in] action
2868  *   Pointer to action structure.
2869  * @param[in, out] dev_flow
2870  *   Pointer to the mlx5_flow.
2871  * @param[in] attr
2872  *   Pointer to the flow attributes.
2873  * @param[out] error
2874  *   Pointer to the error structure.
2875  *
2876  * @return
2877  *   0 on success, a negative errno value otherwise and rte_errno is set.
2878  */
2879 static int
2880 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2881                                 const struct rte_flow_action *action,
2882                                 struct mlx5_flow *dev_flow,
2883                                 const struct rte_flow_attr *attr,
2884                                 struct rte_flow_error *error)
2885 {
2886         const struct rte_flow_action_raw_encap *encap_data;
2887         struct mlx5_flow_dv_encap_decap_resource res;
2888
2889         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2890         res.size = encap_data->size;
2891         memcpy(res.buf, encap_data->data, res.size);
2892         res.reformat_type = attr->egress ?
2893                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
2894                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
2895         if (attr->transfer)
2896                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2897         else
2898                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2899                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2900         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2901                 return rte_flow_error_set(error, EINVAL,
2902                                           RTE_FLOW_ERROR_TYPE_ACTION,
2903                                           NULL, "can't create encap action");
2904         return 0;
2905 }
2906
2907 /**
2908  * Create action push VLAN.
2909  *
2910  * @param[in] dev
2911  *   Pointer to rte_eth_dev structure.
2912  * @param[in] vlan_tag
2913  *   the vlan tag to push to the Ethernet header.
2914  * @param[in, out] dev_flow
2915  *   Pointer to the mlx5_flow.
2916  * @param[in] attr
2917  *   Pointer to the flow attributes.
2918  * @param[out] error
2919  *   Pointer to the error structure.
2920  *
2921  * @return
2922  *   0 on success, a negative errno value otherwise and rte_errno is set.
2923  */
2924 static int
2925 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
2926                                 const struct rte_flow_attr *attr,
2927                                 const struct rte_vlan_hdr *vlan,
2928                                 struct mlx5_flow *dev_flow,
2929                                 struct rte_flow_error *error)
2930 {
2931         struct mlx5_flow_dv_push_vlan_action_resource res;
2932
2933         res.vlan_tag =
2934                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
2935                                  vlan->vlan_tci);
2936         if (attr->transfer)
2937                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2938         else
2939                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2940                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2941         return flow_dv_push_vlan_action_resource_register
2942                                             (dev, &res, dev_flow, error);
2943 }
2944
2945 /**
2946  * Validate the modify-header actions.
2947  *
2948  * @param[in] action_flags
2949  *   Holds the actions detected until now.
2950  * @param[in] action
2951  *   Pointer to the modify action.
2952  * @param[out] error
2953  *   Pointer to error structure.
2954  *
2955  * @return
2956  *   0 on success, a negative errno value otherwise and rte_errno is set.
2957  */
2958 static int
2959 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
2960                                    const struct rte_flow_action *action,
2961                                    struct rte_flow_error *error)
2962 {
2963         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
2964                 return rte_flow_error_set(error, EINVAL,
2965                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2966                                           NULL, "action configuration not set");
2967         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2968                 return rte_flow_error_set(error, EINVAL,
2969                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2970                                           "can't have encap action before"
2971                                           " modify action");
2972         return 0;
2973 }
2974
2975 /**
2976  * Validate the modify-header MAC address actions.
2977  *
2978  * @param[in] action_flags
2979  *   Holds the actions detected until now.
2980  * @param[in] action
2981  *   Pointer to the modify action.
2982  * @param[in] item_flags
2983  *   Holds the items detected.
2984  * @param[out] error
2985  *   Pointer to error structure.
2986  *
2987  * @return
2988  *   0 on success, a negative errno value otherwise and rte_errno is set.
2989  */
2990 static int
2991 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2992                                    const struct rte_flow_action *action,
2993                                    const uint64_t item_flags,
2994                                    struct rte_flow_error *error)
2995 {
2996         int ret = 0;
2997
2998         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2999         if (!ret) {
3000                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3001                         return rte_flow_error_set(error, EINVAL,
3002                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3003                                                   NULL,
3004                                                   "no L2 item in pattern");
3005         }
3006         return ret;
3007 }
3008
3009 /**
3010  * Validate the modify-header IPv4 address actions.
3011  *
3012  * @param[in] action_flags
3013  *   Holds the actions detected until now.
3014  * @param[in] action
3015  *   Pointer to the modify action.
3016  * @param[in] item_flags
3017  *   Holds the items detected.
3018  * @param[out] error
3019  *   Pointer to error structure.
3020  *
3021  * @return
3022  *   0 on success, a negative errno value otherwise and rte_errno is set.
3023  */
3024 static int
3025 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3026                                     const struct rte_flow_action *action,
3027                                     const uint64_t item_flags,
3028                                     struct rte_flow_error *error)
3029 {
3030         int ret = 0;
3031
3032         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3033         if (!ret) {
3034                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3035                         return rte_flow_error_set(error, EINVAL,
3036                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3037                                                   NULL,
3038                                                   "no ipv4 item in pattern");
3039         }
3040         return ret;
3041 }
3042
3043 /**
3044  * Validate the modify-header IPv6 address actions.
3045  *
3046  * @param[in] action_flags
3047  *   Holds the actions detected until now.
3048  * @param[in] action
3049  *   Pointer to the modify action.
3050  * @param[in] item_flags
3051  *   Holds the items detected.
3052  * @param[out] error
3053  *   Pointer to error structure.
3054  *
3055  * @return
3056  *   0 on success, a negative errno value otherwise and rte_errno is set.
3057  */
3058 static int
3059 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3060                                     const struct rte_flow_action *action,
3061                                     const uint64_t item_flags,
3062                                     struct rte_flow_error *error)
3063 {
3064         int ret = 0;
3065
3066         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3067         if (!ret) {
3068                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3069                         return rte_flow_error_set(error, EINVAL,
3070                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3071                                                   NULL,
3072                                                   "no ipv6 item in pattern");
3073         }
3074         return ret;
3075 }
3076
3077 /**
3078  * Validate the modify-header TP actions.
3079  *
3080  * @param[in] action_flags
3081  *   Holds the actions detected until now.
3082  * @param[in] action
3083  *   Pointer to the modify action.
3084  * @param[in] item_flags
3085  *   Holds the items detected.
3086  * @param[out] error
3087  *   Pointer to error structure.
3088  *
3089  * @return
3090  *   0 on success, a negative errno value otherwise and rte_errno is set.
3091  */
3092 static int
3093 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3094                                   const struct rte_flow_action *action,
3095                                   const uint64_t item_flags,
3096                                   struct rte_flow_error *error)
3097 {
3098         int ret = 0;
3099
3100         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3101         if (!ret) {
3102                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3103                         return rte_flow_error_set(error, EINVAL,
3104                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3105                                                   NULL, "no transport layer "
3106                                                   "in pattern");
3107         }
3108         return ret;
3109 }
3110
3111 /**
3112  * Validate the modify-header actions of increment/decrement
3113  * TCP Sequence-number.
3114  *
3115  * @param[in] action_flags
3116  *   Holds the actions detected until now.
3117  * @param[in] action
3118  *   Pointer to the modify action.
3119  * @param[in] item_flags
3120  *   Holds the items detected.
3121  * @param[out] error
3122  *   Pointer to error structure.
3123  *
3124  * @return
3125  *   0 on success, a negative errno value otherwise and rte_errno is set.
3126  */
3127 static int
3128 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3129                                        const struct rte_flow_action *action,
3130                                        const uint64_t item_flags,
3131                                        struct rte_flow_error *error)
3132 {
3133         int ret = 0;
3134
3135         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3136         if (!ret) {
3137                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3138                         return rte_flow_error_set(error, EINVAL,
3139                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3140                                                   NULL, "no TCP item in"
3141                                                   " pattern");
3142                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3143                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3144                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3145                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3146                         return rte_flow_error_set(error, EINVAL,
3147                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3148                                                   NULL,
3149                                                   "cannot decrease and increase"
3150                                                   " TCP sequence number"
3151                                                   " at the same time");
3152         }
3153         return ret;
3154 }
3155
3156 /**
3157  * Validate the modify-header actions of increment/decrement
3158  * TCP Acknowledgment number.
3159  *
3160  * @param[in] action_flags
3161  *   Holds the actions detected until now.
3162  * @param[in] action
3163  *   Pointer to the modify action.
3164  * @param[in] item_flags
3165  *   Holds the items detected.
3166  * @param[out] error
3167  *   Pointer to error structure.
3168  *
3169  * @return
3170  *   0 on success, a negative errno value otherwise and rte_errno is set.
3171  */
3172 static int
3173 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3174                                        const struct rte_flow_action *action,
3175                                        const uint64_t item_flags,
3176                                        struct rte_flow_error *error)
3177 {
3178         int ret = 0;
3179
3180         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3181         if (!ret) {
3182                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3183                         return rte_flow_error_set(error, EINVAL,
3184                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3185                                                   NULL, "no TCP item in"
3186                                                   " pattern");
3187                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3188                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3189                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3190                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3191                         return rte_flow_error_set(error, EINVAL,
3192                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3193                                                   NULL,
3194                                                   "cannot decrease and increase"
3195                                                   " TCP acknowledgment number"
3196                                                   " at the same time");
3197         }
3198         return ret;
3199 }
3200
3201 /**
3202  * Validate the modify-header TTL actions.
3203  *
3204  * @param[in] action_flags
3205  *   Holds the actions detected until now.
3206  * @param[in] action
3207  *   Pointer to the modify action.
3208  * @param[in] item_flags
3209  *   Holds the items detected.
3210  * @param[out] error
3211  *   Pointer to error structure.
3212  *
3213  * @return
3214  *   0 on success, a negative errno value otherwise and rte_errno is set.
3215  */
3216 static int
3217 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3218                                    const struct rte_flow_action *action,
3219                                    const uint64_t item_flags,
3220                                    struct rte_flow_error *error)
3221 {
3222         int ret = 0;
3223
3224         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3225         if (!ret) {
3226                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3227                         return rte_flow_error_set(error, EINVAL,
3228                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3229                                                   NULL,
3230                                                   "no IP protocol in pattern");
3231         }
3232         return ret;
3233 }
3234
3235 /**
3236  * Validate jump action.
3237  *
3238  * @param[in] action
3239  *   Pointer to the jump action.
3240  * @param[in] action_flags
3241  *   Holds the actions detected until now.
3242  * @param[in] attributes
3243  *   Pointer to flow attributes
3244  * @param[in] external
3245  *   Action belongs to flow rule created by request external to PMD.
3246  * @param[out] error
3247  *   Pointer to error structure.
3248  *
3249  * @return
3250  *   0 on success, a negative errno value otherwise and rte_errno is set.
3251  */
3252 static int
3253 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3254                              uint64_t action_flags,
3255                              const struct rte_flow_attr *attributes,
3256                              bool external, struct rte_flow_error *error)
3257 {
3258         uint32_t target_group, table;
3259         int ret = 0;
3260
3261         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3262                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3263                 return rte_flow_error_set(error, EINVAL,
3264                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3265                                           "can't have 2 fate actions in"
3266                                           " same flow");
3267         if (action_flags & MLX5_FLOW_ACTION_METER)
3268                 return rte_flow_error_set(error, ENOTSUP,
3269                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3270                                           "jump with meter not support");
3271         if (!action->conf)
3272                 return rte_flow_error_set(error, EINVAL,
3273                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3274                                           NULL, "action configuration not set");
3275         target_group =
3276                 ((const struct rte_flow_action_jump *)action->conf)->group;
3277         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3278                                        &table, error);
3279         if (ret)
3280                 return ret;
3281         if (attributes->group == target_group)
3282                 return rte_flow_error_set(error, EINVAL,
3283                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3284                                           "target group must be other than"
3285                                           " the current flow group");
3286         return 0;
3287 }
3288
3289 /*
3290  * Validate the port_id action.
3291  *
3292  * @param[in] dev
3293  *   Pointer to rte_eth_dev structure.
3294  * @param[in] action_flags
3295  *   Bit-fields that holds the actions detected until now.
3296  * @param[in] action
3297  *   Port_id RTE action structure.
3298  * @param[in] attr
3299  *   Attributes of flow that includes this action.
3300  * @param[out] error
3301  *   Pointer to error structure.
3302  *
3303  * @return
3304  *   0 on success, a negative errno value otherwise and rte_errno is set.
3305  */
3306 static int
3307 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3308                                 uint64_t action_flags,
3309                                 const struct rte_flow_action *action,
3310                                 const struct rte_flow_attr *attr,
3311                                 struct rte_flow_error *error)
3312 {
3313         const struct rte_flow_action_port_id *port_id;
3314         struct mlx5_priv *act_priv;
3315         struct mlx5_priv *dev_priv;
3316         uint16_t port;
3317
3318         if (!attr->transfer)
3319                 return rte_flow_error_set(error, ENOTSUP,
3320                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3321                                           NULL,
3322                                           "port id action is valid in transfer"
3323                                           " mode only");
3324         if (!action || !action->conf)
3325                 return rte_flow_error_set(error, ENOTSUP,
3326                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3327                                           NULL,
3328                                           "port id action parameters must be"
3329                                           " specified");
3330         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3331                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3332                 return rte_flow_error_set(error, EINVAL,
3333                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3334                                           "can have only one fate actions in"
3335                                           " a flow");
3336         dev_priv = mlx5_dev_to_eswitch_info(dev);
3337         if (!dev_priv)
3338                 return rte_flow_error_set(error, rte_errno,
3339                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3340                                           NULL,
3341                                           "failed to obtain E-Switch info");
3342         port_id = action->conf;
3343         port = port_id->original ? dev->data->port_id : port_id->id;
3344         act_priv = mlx5_port_to_eswitch_info(port, false);
3345         if (!act_priv)
3346                 return rte_flow_error_set
3347                                 (error, rte_errno,
3348                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3349                                  "failed to obtain E-Switch port id for port");
3350         if (act_priv->domain_id != dev_priv->domain_id)
3351                 return rte_flow_error_set
3352                                 (error, EINVAL,
3353                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3354                                  "port does not belong to"
3355                                  " E-Switch being configured");
3356         return 0;
3357 }
3358
3359 /**
3360  * Get the maximum number of modify header actions.
3361  *
3362  * @param dev
3363  *   Pointer to rte_eth_dev structure.
3364  *
3365  * @return
3366  *   Max number of modify header actions device can support.
3367  */
3368 static unsigned int
3369 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev)
3370 {
3371         /*
3372          * There's no way to directly query the max cap. Although it has to be
3373          * acquried by iterative trial, it is a safe assumption that more
3374          * actions are supported by FW if extensive metadata register is
3375          * supported.
3376          */
3377         return mlx5_flow_ext_mreg_supported(dev) ? MLX5_MODIFY_NUM :
3378                                                    MLX5_MODIFY_NUM_NO_MREG;
3379 }
3380
3381 /**
3382  * Validate the meter action.
3383  *
3384  * @param[in] dev
3385  *   Pointer to rte_eth_dev structure.
3386  * @param[in] action_flags
3387  *   Bit-fields that holds the actions detected until now.
3388  * @param[in] action
3389  *   Pointer to the meter action.
3390  * @param[in] attr
3391  *   Attributes of flow that includes this action.
3392  * @param[out] error
3393  *   Pointer to error structure.
3394  *
3395  * @return
3396  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3397  */
3398 static int
3399 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3400                                 uint64_t action_flags,
3401                                 const struct rte_flow_action *action,
3402                                 const struct rte_flow_attr *attr,
3403                                 struct rte_flow_error *error)
3404 {
3405         struct mlx5_priv *priv = dev->data->dev_private;
3406         const struct rte_flow_action_meter *am = action->conf;
3407         struct mlx5_flow_meter *fm = mlx5_flow_meter_find(priv, am->mtr_id);
3408
3409         if (action_flags & MLX5_FLOW_ACTION_METER)
3410                 return rte_flow_error_set(error, ENOTSUP,
3411                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3412                                           "meter chaining not support");
3413         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3414                 return rte_flow_error_set(error, ENOTSUP,
3415                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3416                                           "meter with jump not support");
3417         if (!priv->mtr_en)
3418                 return rte_flow_error_set(error, ENOTSUP,
3419                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3420                                           NULL,
3421                                           "meter action not supported");
3422         if (!fm)
3423                 return rte_flow_error_set(error, EINVAL,
3424                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3425                                           "Meter not found");
3426         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3427               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3428               (!fm->attr.egress && !attr->egress && attr->ingress))))
3429                 return rte_flow_error_set(error, EINVAL,
3430                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3431                                           "Flow attributes are either invalid "
3432                                           "or have a conflict with current "
3433                                           "meter attributes");
3434         return 0;
3435 }
3436
3437 /**
3438  * Find existing modify-header resource or create and register a new one.
3439  *
3440  * @param dev[in, out]
3441  *   Pointer to rte_eth_dev structure.
3442  * @param[in, out] resource
3443  *   Pointer to modify-header resource.
3444  * @parm[in, out] dev_flow
3445  *   Pointer to the dev_flow.
3446  * @param[out] error
3447  *   pointer to error structure.
3448  *
3449  * @return
3450  *   0 on success otherwise -errno and errno is set.
3451  */
3452 static int
3453 flow_dv_modify_hdr_resource_register
3454                         (struct rte_eth_dev *dev,
3455                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3456                          struct mlx5_flow *dev_flow,
3457                          struct rte_flow_error *error)
3458 {
3459         struct mlx5_priv *priv = dev->data->dev_private;
3460         struct mlx5_ibv_shared *sh = priv->sh;
3461         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3462         struct mlx5dv_dr_domain *ns;
3463
3464         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev))
3465                 return rte_flow_error_set(error, EOVERFLOW,
3466                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3467                                           "too many modify header items");
3468         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3469                 ns = sh->fdb_domain;
3470         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3471                 ns = sh->tx_domain;
3472         else
3473                 ns = sh->rx_domain;
3474         resource->flags =
3475                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3476         /* Lookup a matching resource from cache. */
3477         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3478                 if (resource->ft_type == cache_resource->ft_type &&
3479                     resource->actions_num == cache_resource->actions_num &&
3480                     resource->flags == cache_resource->flags &&
3481                     !memcmp((const void *)resource->actions,
3482                             (const void *)cache_resource->actions,
3483                             (resource->actions_num *
3484                                             sizeof(resource->actions[0])))) {
3485                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3486                                 (void *)cache_resource,
3487                                 rte_atomic32_read(&cache_resource->refcnt));
3488                         rte_atomic32_inc(&cache_resource->refcnt);
3489                         dev_flow->dv.modify_hdr = cache_resource;
3490                         return 0;
3491                 }
3492         }
3493         /* Register new modify-header resource. */
3494         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
3495         if (!cache_resource)
3496                 return rte_flow_error_set(error, ENOMEM,
3497                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3498                                           "cannot allocate resource memory");
3499         *cache_resource = *resource;
3500         cache_resource->verbs_action =
3501                 mlx5_glue->dv_create_flow_action_modify_header
3502                                         (sh->ctx, cache_resource->ft_type,
3503                                          ns, cache_resource->flags,
3504                                          cache_resource->actions_num *
3505                                          sizeof(cache_resource->actions[0]),
3506                                          (uint64_t *)cache_resource->actions);
3507         if (!cache_resource->verbs_action) {
3508                 rte_free(cache_resource);
3509                 return rte_flow_error_set(error, ENOMEM,
3510                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3511                                           NULL, "cannot create action");
3512         }
3513         rte_atomic32_init(&cache_resource->refcnt);
3514         rte_atomic32_inc(&cache_resource->refcnt);
3515         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3516         dev_flow->dv.modify_hdr = cache_resource;
3517         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3518                 (void *)cache_resource,
3519                 rte_atomic32_read(&cache_resource->refcnt));
3520         return 0;
3521 }
3522
3523 #define MLX5_CNT_CONTAINER_RESIZE 64
3524
3525 /**
3526  * Get or create a flow counter.
3527  *
3528  * @param[in] dev
3529  *   Pointer to the Ethernet device structure.
3530  * @param[in] shared
3531  *   Indicate if this counter is shared with other flows.
3532  * @param[in] id
3533  *   Counter identifier.
3534  *
3535  * @return
3536  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3537  */
3538 static struct mlx5_flow_counter *
3539 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3540                                uint32_t id)
3541 {
3542         struct mlx5_priv *priv = dev->data->dev_private;
3543         struct mlx5_flow_counter *cnt = NULL;
3544         struct mlx5_devx_obj *dcs = NULL;
3545
3546         if (!priv->config.devx) {
3547                 rte_errno = ENOTSUP;
3548                 return NULL;
3549         }
3550         if (shared) {
3551                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3552                         if (cnt->shared && cnt->id == id) {
3553                                 cnt->ref_cnt++;
3554                                 return cnt;
3555                         }
3556                 }
3557         }
3558         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3559         if (!dcs)
3560                 return NULL;
3561         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3562         if (!cnt) {
3563                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3564                 rte_errno = ENOMEM;
3565                 return NULL;
3566         }
3567         struct mlx5_flow_counter tmpl = {
3568                 .shared = shared,
3569                 .ref_cnt = 1,
3570                 .id = id,
3571                 .dcs = dcs,
3572         };
3573         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3574         if (!tmpl.action) {
3575                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3576                 rte_errno = errno;
3577                 rte_free(cnt);
3578                 return NULL;
3579         }
3580         *cnt = tmpl;
3581         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3582         return cnt;
3583 }
3584
3585 /**
3586  * Release a flow counter.
3587  *
3588  * @param[in] dev
3589  *   Pointer to the Ethernet device structure.
3590  * @param[in] counter
3591  *   Pointer to the counter handler.
3592  */
3593 static void
3594 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3595                                  struct mlx5_flow_counter *counter)
3596 {
3597         struct mlx5_priv *priv = dev->data->dev_private;
3598
3599         if (!counter)
3600                 return;
3601         if (--counter->ref_cnt == 0) {
3602                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3603                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3604                 rte_free(counter);
3605         }
3606 }
3607
3608 /**
3609  * Query a devx flow counter.
3610  *
3611  * @param[in] dev
3612  *   Pointer to the Ethernet device structure.
3613  * @param[in] cnt
3614  *   Pointer to the flow counter.
3615  * @param[out] pkts
3616  *   The statistics value of packets.
3617  * @param[out] bytes
3618  *   The statistics value of bytes.
3619  *
3620  * @return
3621  *   0 on success, otherwise a negative errno value and rte_errno is set.
3622  */
3623 static inline int
3624 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3625                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3626                      uint64_t *bytes)
3627 {
3628         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3629                                                 0, NULL, NULL, 0);
3630 }
3631
3632 /**
3633  * Get a pool by a counter.
3634  *
3635  * @param[in] cnt
3636  *   Pointer to the counter.
3637  *
3638  * @return
3639  *   The counter pool.
3640  */
3641 static struct mlx5_flow_counter_pool *
3642 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3643 {
3644         if (!cnt->batch) {
3645                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3646                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3647         }
3648         return cnt->pool;
3649 }
3650
3651 /**
3652  * Get a pool by devx counter ID.
3653  *
3654  * @param[in] cont
3655  *   Pointer to the counter container.
3656  * @param[in] id
3657  *   The counter devx ID.
3658  *
3659  * @return
3660  *   The counter pool pointer if exists, NULL otherwise,
3661  */
3662 static struct mlx5_flow_counter_pool *
3663 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3664 {
3665         struct mlx5_flow_counter_pool *pool;
3666
3667         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3668                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3669                                 MLX5_COUNTERS_PER_POOL;
3670
3671                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3672                         return pool;
3673         };
3674         return NULL;
3675 }
3676
3677 /**
3678  * Allocate a new memory for the counter values wrapped by all the needed
3679  * management.
3680  *
3681  * @param[in] dev
3682  *   Pointer to the Ethernet device structure.
3683  * @param[in] raws_n
3684  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3685  *
3686  * @return
3687  *   The new memory management pointer on success, otherwise NULL and rte_errno
3688  *   is set.
3689  */
3690 static struct mlx5_counter_stats_mem_mng *
3691 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3692 {
3693         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3694                                         (dev->data->dev_private))->sh;
3695         struct mlx5_devx_mkey_attr mkey_attr;
3696         struct mlx5_counter_stats_mem_mng *mem_mng;
3697         volatile struct flow_counter_stats *raw_data;
3698         int size = (sizeof(struct flow_counter_stats) *
3699                         MLX5_COUNTERS_PER_POOL +
3700                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3701                         sizeof(struct mlx5_counter_stats_mem_mng);
3702         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3703         int i;
3704
3705         if (!mem) {
3706                 rte_errno = ENOMEM;
3707                 return NULL;
3708         }
3709         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3710         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3711         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3712                                                  IBV_ACCESS_LOCAL_WRITE);
3713         if (!mem_mng->umem) {
3714                 rte_errno = errno;
3715                 rte_free(mem);
3716                 return NULL;
3717         }
3718         mkey_attr.addr = (uintptr_t)mem;
3719         mkey_attr.size = size;
3720         mkey_attr.umem_id = mem_mng->umem->umem_id;
3721         mkey_attr.pd = sh->pdn;
3722         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3723         if (!mem_mng->dm) {
3724                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3725                 rte_errno = errno;
3726                 rte_free(mem);
3727                 return NULL;
3728         }
3729         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3730         raw_data = (volatile struct flow_counter_stats *)mem;
3731         for (i = 0; i < raws_n; ++i) {
3732                 mem_mng->raws[i].mem_mng = mem_mng;
3733                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3734         }
3735         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3736         return mem_mng;
3737 }
3738
3739 /**
3740  * Resize a counter container.
3741  *
3742  * @param[in] dev
3743  *   Pointer to the Ethernet device structure.
3744  * @param[in] batch
3745  *   Whether the pool is for counter that was allocated by batch command.
3746  *
3747  * @return
3748  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3749  */
3750 static struct mlx5_pools_container *
3751 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3752 {
3753         struct mlx5_priv *priv = dev->data->dev_private;
3754         struct mlx5_pools_container *cont =
3755                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3756         struct mlx5_pools_container *new_cont =
3757                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3758         struct mlx5_counter_stats_mem_mng *mem_mng;
3759         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3760         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3761         int i;
3762
3763         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3764                 /* The last resize still hasn't detected by the host thread. */
3765                 rte_errno = EAGAIN;
3766                 return NULL;
3767         }
3768         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3769         if (!new_cont->pools) {
3770                 rte_errno = ENOMEM;
3771                 return NULL;
3772         }
3773         if (cont->n)
3774                 memcpy(new_cont->pools, cont->pools, cont->n *
3775                        sizeof(struct mlx5_flow_counter_pool *));
3776         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3777                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3778         if (!mem_mng) {
3779                 rte_free(new_cont->pools);
3780                 return NULL;
3781         }
3782         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3783                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3784                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3785                                  i, next);
3786         new_cont->n = resize;
3787         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3788         TAILQ_INIT(&new_cont->pool_list);
3789         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3790         new_cont->init_mem_mng = mem_mng;
3791         rte_cio_wmb();
3792          /* Flip the master container. */
3793         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3794         return new_cont;
3795 }
3796
3797 /**
3798  * Query a devx flow counter.
3799  *
3800  * @param[in] dev
3801  *   Pointer to the Ethernet device structure.
3802  * @param[in] cnt
3803  *   Pointer to the flow counter.
3804  * @param[out] pkts
3805  *   The statistics value of packets.
3806  * @param[out] bytes
3807  *   The statistics value of bytes.
3808  *
3809  * @return
3810  *   0 on success, otherwise a negative errno value and rte_errno is set.
3811  */
3812 static inline int
3813 _flow_dv_query_count(struct rte_eth_dev *dev,
3814                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3815                      uint64_t *bytes)
3816 {
3817         struct mlx5_priv *priv = dev->data->dev_private;
3818         struct mlx5_flow_counter_pool *pool =
3819                         flow_dv_counter_pool_get(cnt);
3820         int offset = cnt - &pool->counters_raw[0];
3821
3822         if (priv->counter_fallback)
3823                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3824
3825         rte_spinlock_lock(&pool->sl);
3826         /*
3827          * The single counters allocation may allocate smaller ID than the
3828          * current allocated in parallel to the host reading.
3829          * In this case the new counter values must be reported as 0.
3830          */
3831         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3832                 *pkts = 0;
3833                 *bytes = 0;
3834         } else {
3835                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
3836                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
3837         }
3838         rte_spinlock_unlock(&pool->sl);
3839         return 0;
3840 }
3841
3842 /**
3843  * Create and initialize a new counter pool.
3844  *
3845  * @param[in] dev
3846  *   Pointer to the Ethernet device structure.
3847  * @param[out] dcs
3848  *   The devX counter handle.
3849  * @param[in] batch
3850  *   Whether the pool is for counter that was allocated by batch command.
3851  *
3852  * @return
3853  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
3854  */
3855 static struct mlx5_flow_counter_pool *
3856 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
3857                     uint32_t batch)
3858 {
3859         struct mlx5_priv *priv = dev->data->dev_private;
3860         struct mlx5_flow_counter_pool *pool;
3861         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3862                                                                0);
3863         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
3864         uint32_t size;
3865
3866         if (cont->n == n_valid) {
3867                 cont = flow_dv_container_resize(dev, batch);
3868                 if (!cont)
3869                         return NULL;
3870         }
3871         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
3872                         sizeof(struct mlx5_flow_counter);
3873         pool = rte_calloc(__func__, 1, size, 0);
3874         if (!pool) {
3875                 rte_errno = ENOMEM;
3876                 return NULL;
3877         }
3878         pool->min_dcs = dcs;
3879         pool->raw = cont->init_mem_mng->raws + n_valid %
3880                                                      MLX5_CNT_CONTAINER_RESIZE;
3881         pool->raw_hw = NULL;
3882         rte_spinlock_init(&pool->sl);
3883         /*
3884          * The generation of the new allocated counters in this pool is 0, 2 in
3885          * the pool generation makes all the counters valid for allocation.
3886          */
3887         rte_atomic64_set(&pool->query_gen, 0x2);
3888         TAILQ_INIT(&pool->counters);
3889         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3890         cont->pools[n_valid] = pool;
3891         /* Pool initialization must be updated before host thread access. */
3892         rte_cio_wmb();
3893         rte_atomic16_add(&cont->n_valid, 1);
3894         return pool;
3895 }
3896
3897 /**
3898  * Prepare a new counter and/or a new counter pool.
3899  *
3900  * @param[in] dev
3901  *   Pointer to the Ethernet device structure.
3902  * @param[out] cnt_free
3903  *   Where to put the pointer of a new counter.
3904  * @param[in] batch
3905  *   Whether the pool is for counter that was allocated by batch command.
3906  *
3907  * @return
3908  *   The free counter pool pointer and @p cnt_free is set on success,
3909  *   NULL otherwise and rte_errno is set.
3910  */
3911 static struct mlx5_flow_counter_pool *
3912 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
3913                              struct mlx5_flow_counter **cnt_free,
3914                              uint32_t batch)
3915 {
3916         struct mlx5_priv *priv = dev->data->dev_private;
3917         struct mlx5_flow_counter_pool *pool;
3918         struct mlx5_devx_obj *dcs = NULL;
3919         struct mlx5_flow_counter *cnt;
3920         uint32_t i;
3921
3922         if (!batch) {
3923                 /* bulk_bitmap must be 0 for single counter allocation. */
3924                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3925                 if (!dcs)
3926                         return NULL;
3927                 pool = flow_dv_find_pool_by_id
3928                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
3929                 if (!pool) {
3930                         pool = flow_dv_pool_create(dev, dcs, batch);
3931                         if (!pool) {
3932                                 mlx5_devx_cmd_destroy(dcs);
3933                                 return NULL;
3934                         }
3935                 } else if (dcs->id < pool->min_dcs->id) {
3936                         rte_atomic64_set(&pool->a64_dcs,
3937                                          (int64_t)(uintptr_t)dcs);
3938                 }
3939                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
3940                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3941                 cnt->dcs = dcs;
3942                 *cnt_free = cnt;
3943                 return pool;
3944         }
3945         /* bulk_bitmap is in 128 counters units. */
3946         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
3947                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
3948         if (!dcs) {
3949                 rte_errno = ENODATA;
3950                 return NULL;
3951         }
3952         pool = flow_dv_pool_create(dev, dcs, batch);
3953         if (!pool) {
3954                 mlx5_devx_cmd_destroy(dcs);
3955                 return NULL;
3956         }
3957         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3958                 cnt = &pool->counters_raw[i];
3959                 cnt->pool = pool;
3960                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3961         }
3962         *cnt_free = &pool->counters_raw[0];
3963         return pool;
3964 }
3965
3966 /**
3967  * Search for existed shared counter.
3968  *
3969  * @param[in] cont
3970  *   Pointer to the relevant counter pool container.
3971  * @param[in] id
3972  *   The shared counter ID to search.
3973  *
3974  * @return
3975  *   NULL if not existed, otherwise pointer to the shared counter.
3976  */
3977 static struct mlx5_flow_counter *
3978 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
3979                               uint32_t id)
3980 {
3981         static struct mlx5_flow_counter *cnt;
3982         struct mlx5_flow_counter_pool *pool;
3983         int i;
3984
3985         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3986                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3987                         cnt = &pool->counters_raw[i];
3988                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
3989                                 return cnt;
3990                 }
3991         }
3992         return NULL;
3993 }
3994
3995 /**
3996  * Allocate a flow counter.
3997  *
3998  * @param[in] dev
3999  *   Pointer to the Ethernet device structure.
4000  * @param[in] shared
4001  *   Indicate if this counter is shared with other flows.
4002  * @param[in] id
4003  *   Counter identifier.
4004  * @param[in] group
4005  *   Counter flow group.
4006  *
4007  * @return
4008  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4009  */
4010 static struct mlx5_flow_counter *
4011 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4012                       uint16_t group)
4013 {
4014         struct mlx5_priv *priv = dev->data->dev_private;
4015         struct mlx5_flow_counter_pool *pool = NULL;
4016         struct mlx5_flow_counter *cnt_free = NULL;
4017         /*
4018          * Currently group 0 flow counter cannot be assigned to a flow if it is
4019          * not the first one in the batch counter allocation, so it is better
4020          * to allocate counters one by one for these flows in a separate
4021          * container.
4022          * A counter can be shared between different groups so need to take
4023          * shared counters from the single container.
4024          */
4025         uint32_t batch = (group && !shared) ? 1 : 0;
4026         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4027                                                                0);
4028
4029         if (priv->counter_fallback)
4030                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4031         if (!priv->config.devx) {
4032                 rte_errno = ENOTSUP;
4033                 return NULL;
4034         }
4035         if (shared) {
4036                 cnt_free = flow_dv_counter_shared_search(cont, id);
4037                 if (cnt_free) {
4038                         if (cnt_free->ref_cnt + 1 == 0) {
4039                                 rte_errno = E2BIG;
4040                                 return NULL;
4041                         }
4042                         cnt_free->ref_cnt++;
4043                         return cnt_free;
4044                 }
4045         }
4046         /* Pools which has a free counters are in the start. */
4047         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4048                 /*
4049                  * The free counter reset values must be updated between the
4050                  * counter release to the counter allocation, so, at least one
4051                  * query must be done in this time. ensure it by saving the
4052                  * query generation in the release time.
4053                  * The free list is sorted according to the generation - so if
4054                  * the first one is not updated, all the others are not
4055                  * updated too.
4056                  */
4057                 cnt_free = TAILQ_FIRST(&pool->counters);
4058                 if (cnt_free && cnt_free->query_gen + 1 <
4059                     rte_atomic64_read(&pool->query_gen))
4060                         break;
4061                 cnt_free = NULL;
4062         }
4063         if (!cnt_free) {
4064                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4065                 if (!pool)
4066                         return NULL;
4067         }
4068         cnt_free->batch = batch;
4069         /* Create a DV counter action only in the first time usage. */
4070         if (!cnt_free->action) {
4071                 uint16_t offset;
4072                 struct mlx5_devx_obj *dcs;
4073
4074                 if (batch) {
4075                         offset = cnt_free - &pool->counters_raw[0];
4076                         dcs = pool->min_dcs;
4077                 } else {
4078                         offset = 0;
4079                         dcs = cnt_free->dcs;
4080                 }
4081                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4082                                         (dcs->obj, offset);
4083                 if (!cnt_free->action) {
4084                         rte_errno = errno;
4085                         return NULL;
4086                 }
4087         }
4088         /* Update the counter reset values. */
4089         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4090                                  &cnt_free->bytes))
4091                 return NULL;
4092         cnt_free->shared = shared;
4093         cnt_free->ref_cnt = 1;
4094         cnt_free->id = id;
4095         if (!priv->sh->cmng.query_thread_on)
4096                 /* Start the asynchronous batch query by the host thread. */
4097                 mlx5_set_query_alarm(priv->sh);
4098         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4099         if (TAILQ_EMPTY(&pool->counters)) {
4100                 /* Move the pool to the end of the container pool list. */
4101                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4102                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4103         }
4104         return cnt_free;
4105 }
4106
4107 /**
4108  * Release a flow counter.
4109  *
4110  * @param[in] dev
4111  *   Pointer to the Ethernet device structure.
4112  * @param[in] counter
4113  *   Pointer to the counter handler.
4114  */
4115 static void
4116 flow_dv_counter_release(struct rte_eth_dev *dev,
4117                         struct mlx5_flow_counter *counter)
4118 {
4119         struct mlx5_priv *priv = dev->data->dev_private;
4120
4121         if (!counter)
4122                 return;
4123         if (priv->counter_fallback) {
4124                 flow_dv_counter_release_fallback(dev, counter);
4125                 return;
4126         }
4127         if (--counter->ref_cnt == 0) {
4128                 struct mlx5_flow_counter_pool *pool =
4129                                 flow_dv_counter_pool_get(counter);
4130
4131                 /* Put the counter in the end - the last updated one. */
4132                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4133                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4134         }
4135 }
4136
4137 /**
4138  * Verify the @p attributes will be correctly understood by the NIC and store
4139  * them in the @p flow if everything is correct.
4140  *
4141  * @param[in] dev
4142  *   Pointer to dev struct.
4143  * @param[in] attributes
4144  *   Pointer to flow attributes
4145  * @param[in] external
4146  *   This flow rule is created by request external to PMD.
4147  * @param[out] error
4148  *   Pointer to error structure.
4149  *
4150  * @return
4151  *   0 on success, a negative errno value otherwise and rte_errno is set.
4152  */
4153 static int
4154 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4155                             const struct rte_flow_attr *attributes,
4156                             bool external __rte_unused,
4157                             struct rte_flow_error *error)
4158 {
4159         struct mlx5_priv *priv = dev->data->dev_private;
4160         uint32_t priority_max = priv->config.flow_prio - 1;
4161
4162 #ifndef HAVE_MLX5DV_DR
4163         if (attributes->group)
4164                 return rte_flow_error_set(error, ENOTSUP,
4165                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4166                                           NULL,
4167                                           "groups are not supported");
4168 #else
4169         uint32_t table;
4170         int ret;
4171
4172         ret = mlx5_flow_group_to_table(attributes, external,
4173                                        attributes->group,
4174                                        &table, error);
4175         if (ret)
4176                 return ret;
4177 #endif
4178         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4179             attributes->priority >= priority_max)
4180                 return rte_flow_error_set(error, ENOTSUP,
4181                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4182                                           NULL,
4183                                           "priority out of range");
4184         if (attributes->transfer) {
4185                 if (!priv->config.dv_esw_en)
4186                         return rte_flow_error_set
4187                                 (error, ENOTSUP,
4188                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4189                                  "E-Switch dr is not supported");
4190                 if (!(priv->representor || priv->master))
4191                         return rte_flow_error_set
4192                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4193                                  NULL, "E-Switch configuration can only be"
4194                                  " done by a master or a representor device");
4195                 if (attributes->egress)
4196                         return rte_flow_error_set
4197                                 (error, ENOTSUP,
4198                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4199                                  "egress is not supported");
4200         }
4201         if (!(attributes->egress ^ attributes->ingress))
4202                 return rte_flow_error_set(error, ENOTSUP,
4203                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4204                                           "must specify exactly one of "
4205                                           "ingress or egress");
4206         return 0;
4207 }
4208
4209 /**
4210  * Internal validation function. For validating both actions and items.
4211  *
4212  * @param[in] dev
4213  *   Pointer to the rte_eth_dev structure.
4214  * @param[in] attr
4215  *   Pointer to the flow attributes.
4216  * @param[in] items
4217  *   Pointer to the list of items.
4218  * @param[in] actions
4219  *   Pointer to the list of actions.
4220  * @param[in] external
4221  *   This flow rule is created by request external to PMD.
4222  * @param[out] error
4223  *   Pointer to the error structure.
4224  *
4225  * @return
4226  *   0 on success, a negative errno value otherwise and rte_errno is set.
4227  */
4228 static int
4229 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4230                  const struct rte_flow_item items[],
4231                  const struct rte_flow_action actions[],
4232                  bool external, struct rte_flow_error *error)
4233 {
4234         int ret;
4235         uint64_t action_flags = 0;
4236         uint64_t item_flags = 0;
4237         uint64_t last_item = 0;
4238         uint8_t next_protocol = 0xff;
4239         uint16_t ether_type = 0;
4240         int actions_n = 0;
4241         const struct rte_flow_item *gre_item = NULL;
4242         struct rte_flow_item_tcp nic_tcp_mask = {
4243                 .hdr = {
4244                         .tcp_flags = 0xFF,
4245                         .src_port = RTE_BE16(UINT16_MAX),
4246                         .dst_port = RTE_BE16(UINT16_MAX),
4247                 }
4248         };
4249         struct mlx5_priv *priv = dev->data->dev_private;
4250         struct mlx5_dev_config *dev_conf = &priv->config;
4251
4252         if (items == NULL)
4253                 return -1;
4254         ret = flow_dv_validate_attributes(dev, attr, external, error);
4255         if (ret < 0)
4256                 return ret;
4257         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4258                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4259                 int type = items->type;
4260
4261                 switch (type) {
4262                 case RTE_FLOW_ITEM_TYPE_VOID:
4263                         break;
4264                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4265                         ret = flow_dv_validate_item_port_id
4266                                         (dev, items, attr, item_flags, error);
4267                         if (ret < 0)
4268                                 return ret;
4269                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4270                         break;
4271                 case RTE_FLOW_ITEM_TYPE_ETH:
4272                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4273                                                           error);
4274                         if (ret < 0)
4275                                 return ret;
4276                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4277                                              MLX5_FLOW_LAYER_OUTER_L2;
4278                         if (items->mask != NULL && items->spec != NULL) {
4279                                 ether_type =
4280                                         ((const struct rte_flow_item_eth *)
4281                                          items->spec)->type;
4282                                 ether_type &=
4283                                         ((const struct rte_flow_item_eth *)
4284                                          items->mask)->type;
4285                                 ether_type = rte_be_to_cpu_16(ether_type);
4286                         } else {
4287                                 ether_type = 0;
4288                         }
4289                         break;
4290                 case RTE_FLOW_ITEM_TYPE_VLAN:
4291                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4292                                                            dev, error);
4293                         if (ret < 0)
4294                                 return ret;
4295                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4296                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4297                         if (items->mask != NULL && items->spec != NULL) {
4298                                 ether_type =
4299                                         ((const struct rte_flow_item_vlan *)
4300                                          items->spec)->inner_type;
4301                                 ether_type &=
4302                                         ((const struct rte_flow_item_vlan *)
4303                                          items->mask)->inner_type;
4304                                 ether_type = rte_be_to_cpu_16(ether_type);
4305                         } else {
4306                                 ether_type = 0;
4307                         }
4308                         break;
4309                 case RTE_FLOW_ITEM_TYPE_IPV4:
4310                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4311                                                   &item_flags, &tunnel);
4312                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4313                                                            last_item,
4314                                                            ether_type, NULL,
4315                                                            error);
4316                         if (ret < 0)
4317                                 return ret;
4318                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4319                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4320                         if (items->mask != NULL &&
4321                             ((const struct rte_flow_item_ipv4 *)
4322                              items->mask)->hdr.next_proto_id) {
4323                                 next_protocol =
4324                                         ((const struct rte_flow_item_ipv4 *)
4325                                          (items->spec))->hdr.next_proto_id;
4326                                 next_protocol &=
4327                                         ((const struct rte_flow_item_ipv4 *)
4328                                          (items->mask))->hdr.next_proto_id;
4329                         } else {
4330                                 /* Reset for inner layer. */
4331                                 next_protocol = 0xff;
4332                         }
4333                         break;
4334                 case RTE_FLOW_ITEM_TYPE_IPV6:
4335                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4336                                                   &item_flags, &tunnel);
4337                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4338                                                            last_item,
4339                                                            ether_type, NULL,
4340                                                            error);
4341                         if (ret < 0)
4342                                 return ret;
4343                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4344                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4345                         if (items->mask != NULL &&
4346                             ((const struct rte_flow_item_ipv6 *)
4347                              items->mask)->hdr.proto) {
4348                                 next_protocol =
4349                                         ((const struct rte_flow_item_ipv6 *)
4350                                          items->spec)->hdr.proto;
4351                                 next_protocol &=
4352                                         ((const struct rte_flow_item_ipv6 *)
4353                                          items->mask)->hdr.proto;
4354                         } else {
4355                                 /* Reset for inner layer. */
4356                                 next_protocol = 0xff;
4357                         }
4358                         break;
4359                 case RTE_FLOW_ITEM_TYPE_TCP:
4360                         ret = mlx5_flow_validate_item_tcp
4361                                                 (items, item_flags,
4362                                                  next_protocol,
4363                                                  &nic_tcp_mask,
4364                                                  error);
4365                         if (ret < 0)
4366                                 return ret;
4367                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4368                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4369                         break;
4370                 case RTE_FLOW_ITEM_TYPE_UDP:
4371                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4372                                                           next_protocol,
4373                                                           error);
4374                         if (ret < 0)
4375                                 return ret;
4376                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4377                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4378                         break;
4379                 case RTE_FLOW_ITEM_TYPE_GRE:
4380                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4381                                                           next_protocol, error);
4382                         if (ret < 0)
4383                                 return ret;
4384                         gre_item = items;
4385                         last_item = MLX5_FLOW_LAYER_GRE;
4386                         break;
4387                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4388                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4389                                                             next_protocol,
4390                                                             error);
4391                         if (ret < 0)
4392                                 return ret;
4393                         last_item = MLX5_FLOW_LAYER_NVGRE;
4394                         break;
4395                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4396                         ret = mlx5_flow_validate_item_gre_key
4397                                 (items, item_flags, gre_item, error);
4398                         if (ret < 0)
4399                                 return ret;
4400                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4401                         break;
4402                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4403                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4404                                                             error);
4405                         if (ret < 0)
4406                                 return ret;
4407                         last_item = MLX5_FLOW_LAYER_VXLAN;
4408                         break;
4409                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4410                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4411                                                                 item_flags, dev,
4412                                                                 error);
4413                         if (ret < 0)
4414                                 return ret;
4415                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4416                         break;
4417                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4418                         ret = mlx5_flow_validate_item_geneve(items,
4419                                                              item_flags, dev,
4420                                                              error);
4421                         if (ret < 0)
4422                                 return ret;
4423                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4424                         break;
4425                 case RTE_FLOW_ITEM_TYPE_MPLS:
4426                         ret = mlx5_flow_validate_item_mpls(dev, items,
4427                                                            item_flags,
4428                                                            last_item, error);
4429                         if (ret < 0)
4430                                 return ret;
4431                         last_item = MLX5_FLOW_LAYER_MPLS;
4432                         break;
4433
4434                 case RTE_FLOW_ITEM_TYPE_MARK:
4435                         ret = flow_dv_validate_item_mark(dev, items, attr,
4436                                                          error);
4437                         if (ret < 0)
4438                                 return ret;
4439                         last_item = MLX5_FLOW_ITEM_MARK;
4440                         break;
4441                 case RTE_FLOW_ITEM_TYPE_META:
4442                         ret = flow_dv_validate_item_meta(dev, items, attr,
4443                                                          error);
4444                         if (ret < 0)
4445                                 return ret;
4446                         last_item = MLX5_FLOW_ITEM_METADATA;
4447                         break;
4448                 case RTE_FLOW_ITEM_TYPE_ICMP:
4449                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4450                                                            next_protocol,
4451                                                            error);
4452                         if (ret < 0)
4453                                 return ret;
4454                         last_item = MLX5_FLOW_LAYER_ICMP;
4455                         break;
4456                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4457                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4458                                                             next_protocol,
4459                                                             error);
4460                         if (ret < 0)
4461                                 return ret;
4462                         last_item = MLX5_FLOW_LAYER_ICMP6;
4463                         break;
4464                 case RTE_FLOW_ITEM_TYPE_TAG:
4465                         ret = flow_dv_validate_item_tag(dev, items,
4466                                                         attr, error);
4467                         if (ret < 0)
4468                                 return ret;
4469                         last_item = MLX5_FLOW_ITEM_TAG;
4470                         break;
4471                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4472                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4473                         break;
4474                 default:
4475                         return rte_flow_error_set(error, ENOTSUP,
4476                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4477                                                   NULL, "item not supported");
4478                 }
4479                 item_flags |= last_item;
4480         }
4481         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4482                 int type = actions->type;
4483                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4484                         return rte_flow_error_set(error, ENOTSUP,
4485                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4486                                                   actions, "too many actions");
4487                 switch (type) {
4488                 case RTE_FLOW_ACTION_TYPE_VOID:
4489                         break;
4490                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4491                         ret = flow_dv_validate_action_port_id(dev,
4492                                                               action_flags,
4493                                                               actions,
4494                                                               attr,
4495                                                               error);
4496                         if (ret)
4497                                 return ret;
4498                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4499                         ++actions_n;
4500                         break;
4501                 case RTE_FLOW_ACTION_TYPE_FLAG:
4502                         ret = flow_dv_validate_action_flag(dev, action_flags,
4503                                                            attr, error);
4504                         if (ret < 0)
4505                                 return ret;
4506                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4507                                 /* Count all modify-header actions as one. */
4508                                 if (!(action_flags &
4509                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4510                                         ++actions_n;
4511                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4512                                                 MLX5_FLOW_ACTION_MARK_EXT;
4513                         } else {
4514                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4515                                 ++actions_n;
4516                         }
4517                         break;
4518                 case RTE_FLOW_ACTION_TYPE_MARK:
4519                         ret = flow_dv_validate_action_mark(dev, actions,
4520                                                            action_flags,
4521                                                            attr, error);
4522                         if (ret < 0)
4523                                 return ret;
4524                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4525                                 /* Count all modify-header actions as one. */
4526                                 if (!(action_flags &
4527                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4528                                         ++actions_n;
4529                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4530                                                 MLX5_FLOW_ACTION_MARK_EXT;
4531                         } else {
4532                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4533                                 ++actions_n;
4534                         }
4535                         break;
4536                 case RTE_FLOW_ACTION_TYPE_SET_META:
4537                         ret = flow_dv_validate_action_set_meta(dev, actions,
4538                                                                action_flags,
4539                                                                attr, error);
4540                         if (ret < 0)
4541                                 return ret;
4542                         /* Count all modify-header actions as one action. */
4543                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4544                                 ++actions_n;
4545                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4546                         break;
4547                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4548                         ret = flow_dv_validate_action_set_tag(dev, actions,
4549                                                               action_flags,
4550                                                               attr, error);
4551                         if (ret < 0)
4552                                 return ret;
4553                         /* Count all modify-header actions as one action. */
4554                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4555                                 ++actions_n;
4556                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4557                         break;
4558                 case RTE_FLOW_ACTION_TYPE_DROP:
4559                         ret = mlx5_flow_validate_action_drop(action_flags,
4560                                                              attr, error);
4561                         if (ret < 0)
4562                                 return ret;
4563                         action_flags |= MLX5_FLOW_ACTION_DROP;
4564                         ++actions_n;
4565                         break;
4566                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4567                         ret = mlx5_flow_validate_action_queue(actions,
4568                                                               action_flags, dev,
4569                                                               attr, error);
4570                         if (ret < 0)
4571                                 return ret;
4572                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4573                         ++actions_n;
4574                         break;
4575                 case RTE_FLOW_ACTION_TYPE_RSS:
4576                         ret = mlx5_flow_validate_action_rss(actions,
4577                                                             action_flags, dev,
4578                                                             attr, item_flags,
4579                                                             error);
4580                         if (ret < 0)
4581                                 return ret;
4582                         action_flags |= MLX5_FLOW_ACTION_RSS;
4583                         ++actions_n;
4584                         break;
4585                 case RTE_FLOW_ACTION_TYPE_COUNT:
4586                         ret = flow_dv_validate_action_count(dev, error);
4587                         if (ret < 0)
4588                                 return ret;
4589                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4590                         ++actions_n;
4591                         break;
4592                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4593                         if (flow_dv_validate_action_pop_vlan(dev,
4594                                                              action_flags,
4595                                                              actions,
4596                                                              item_flags, attr,
4597                                                              error))
4598                                 return -rte_errno;
4599                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4600                         ++actions_n;
4601                         break;
4602                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4603                         ret = flow_dv_validate_action_push_vlan(action_flags,
4604                                                                 item_flags,
4605                                                                 actions, attr,
4606                                                                 error);
4607                         if (ret < 0)
4608                                 return ret;
4609                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4610                         ++actions_n;
4611                         break;
4612                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4613                         ret = flow_dv_validate_action_set_vlan_pcp
4614                                                 (action_flags, actions, error);
4615                         if (ret < 0)
4616                                 return ret;
4617                         /* Count PCP with push_vlan command. */
4618                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4619                         break;
4620                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4621                         ret = flow_dv_validate_action_set_vlan_vid
4622                                                 (item_flags, action_flags,
4623                                                  actions, error);
4624                         if (ret < 0)
4625                                 return ret;
4626                         /* Count VID with push_vlan command. */
4627                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4628                         break;
4629                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4630                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4631                         ret = flow_dv_validate_action_l2_encap(action_flags,
4632                                                                actions, attr,
4633                                                                error);
4634                         if (ret < 0)
4635                                 return ret;
4636                         action_flags |= actions->type ==
4637                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4638                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4639                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4640                         ++actions_n;
4641                         break;
4642                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4643                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4644                         ret = flow_dv_validate_action_l2_decap(action_flags,
4645                                                                attr, error);
4646                         if (ret < 0)
4647                                 return ret;
4648                         action_flags |= actions->type ==
4649                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4650                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4651                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4652                         ++actions_n;
4653                         break;
4654                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4655                         ret = flow_dv_validate_action_raw_encap(action_flags,
4656                                                                 actions, attr,
4657                                                                 error);
4658                         if (ret < 0)
4659                                 return ret;
4660                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4661                         ++actions_n;
4662                         break;
4663                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4664                         ret = flow_dv_validate_action_raw_decap(action_flags,
4665                                                                 actions, attr,
4666                                                                 error);
4667                         if (ret < 0)
4668                                 return ret;
4669                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4670                         ++actions_n;
4671                         break;
4672                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4673                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4674                         ret = flow_dv_validate_action_modify_mac(action_flags,
4675                                                                  actions,
4676                                                                  item_flags,
4677                                                                  error);
4678                         if (ret < 0)
4679                                 return ret;
4680                         /* Count all modify-header actions as one action. */
4681                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4682                                 ++actions_n;
4683                         action_flags |= actions->type ==
4684                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4685                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4686                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4687                         break;
4688
4689                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4690                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4691                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4692                                                                   actions,
4693                                                                   item_flags,
4694                                                                   error);
4695                         if (ret < 0)
4696                                 return ret;
4697                         /* Count all modify-header actions as one action. */
4698                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4699                                 ++actions_n;
4700                         action_flags |= actions->type ==
4701                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4702                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4703                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4704                         break;
4705                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4706                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4707                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4708                                                                   actions,
4709                                                                   item_flags,
4710                                                                   error);
4711                         if (ret < 0)
4712                                 return ret;
4713                         /* Count all modify-header actions as one action. */
4714                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4715                                 ++actions_n;
4716                         action_flags |= actions->type ==
4717                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4718                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4719                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4720                         break;
4721                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4722                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4723                         ret = flow_dv_validate_action_modify_tp(action_flags,
4724                                                                 actions,
4725                                                                 item_flags,
4726                                                                 error);
4727                         if (ret < 0)
4728                                 return ret;
4729                         /* Count all modify-header actions as one action. */
4730                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4731                                 ++actions_n;
4732                         action_flags |= actions->type ==
4733                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4734                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4735                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4736                         break;
4737                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4738                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4739                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4740                                                                  actions,
4741                                                                  item_flags,
4742                                                                  error);
4743                         if (ret < 0)
4744                                 return ret;
4745                         /* Count all modify-header actions as one action. */
4746                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4747                                 ++actions_n;
4748                         action_flags |= actions->type ==
4749                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4750                                                 MLX5_FLOW_ACTION_SET_TTL :
4751                                                 MLX5_FLOW_ACTION_DEC_TTL;
4752                         break;
4753                 case RTE_FLOW_ACTION_TYPE_JUMP:
4754                         ret = flow_dv_validate_action_jump(actions,
4755                                                            action_flags,
4756                                                            attr, external,
4757                                                            error);
4758                         if (ret)
4759                                 return ret;
4760                         ++actions_n;
4761                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4762                         break;
4763                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4764                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4765                         ret = flow_dv_validate_action_modify_tcp_seq
4766                                                                 (action_flags,
4767                                                                  actions,
4768                                                                  item_flags,
4769                                                                  error);
4770                         if (ret < 0)
4771                                 return ret;
4772                         /* Count all modify-header actions as one action. */
4773                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4774                                 ++actions_n;
4775                         action_flags |= actions->type ==
4776                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4777                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4778                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4779                         break;
4780                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4781                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4782                         ret = flow_dv_validate_action_modify_tcp_ack
4783                                                                 (action_flags,
4784                                                                  actions,
4785                                                                  item_flags,
4786                                                                  error);
4787                         if (ret < 0)
4788                                 return ret;
4789                         /* Count all modify-header actions as one action. */
4790                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4791                                 ++actions_n;
4792                         action_flags |= actions->type ==
4793                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4794                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4795                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4796                         break;
4797                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4798                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4799                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4800                         break;
4801                 case RTE_FLOW_ACTION_TYPE_METER:
4802                         ret = mlx5_flow_validate_action_meter(dev,
4803                                                               action_flags,
4804                                                               actions, attr,
4805                                                               error);
4806                         if (ret < 0)
4807                                 return ret;
4808                         action_flags |= MLX5_FLOW_ACTION_METER;
4809                         ++actions_n;
4810                         break;
4811                 default:
4812                         return rte_flow_error_set(error, ENOTSUP,
4813                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4814                                                   actions,
4815                                                   "action not supported");
4816                 }
4817         }
4818         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
4819             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
4820                 return rte_flow_error_set(error, ENOTSUP,
4821                                           RTE_FLOW_ERROR_TYPE_ACTION,
4822                                           actions,
4823                                           "can't have vxlan and vlan"
4824                                           " actions in the same rule");
4825         /* Eswitch has few restrictions on using items and actions */
4826         if (attr->transfer) {
4827                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4828                     action_flags & MLX5_FLOW_ACTION_FLAG)
4829                         return rte_flow_error_set(error, ENOTSUP,
4830                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4831                                                   NULL,
4832                                                   "unsupported action FLAG");
4833                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4834                     action_flags & MLX5_FLOW_ACTION_MARK)
4835                         return rte_flow_error_set(error, ENOTSUP,
4836                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4837                                                   NULL,
4838                                                   "unsupported action MARK");
4839                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
4840                         return rte_flow_error_set(error, ENOTSUP,
4841                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4842                                                   NULL,
4843                                                   "unsupported action QUEUE");
4844                 if (action_flags & MLX5_FLOW_ACTION_RSS)
4845                         return rte_flow_error_set(error, ENOTSUP,
4846                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4847                                                   NULL,
4848                                                   "unsupported action RSS");
4849                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4850                         return rte_flow_error_set(error, EINVAL,
4851                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4852                                                   actions,
4853                                                   "no fate action is found");
4854         } else {
4855                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
4856                         return rte_flow_error_set(error, EINVAL,
4857                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4858                                                   actions,
4859                                                   "no fate action is found");
4860         }
4861         return 0;
4862 }
4863
4864 /**
4865  * Internal preparation function. Allocates the DV flow size,
4866  * this size is constant.
4867  *
4868  * @param[in] attr
4869  *   Pointer to the flow attributes.
4870  * @param[in] items
4871  *   Pointer to the list of items.
4872  * @param[in] actions
4873  *   Pointer to the list of actions.
4874  * @param[out] error
4875  *   Pointer to the error structure.
4876  *
4877  * @return
4878  *   Pointer to mlx5_flow object on success,
4879  *   otherwise NULL and rte_errno is set.
4880  */
4881 static struct mlx5_flow *
4882 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
4883                 const struct rte_flow_item items[] __rte_unused,
4884                 const struct rte_flow_action actions[] __rte_unused,
4885                 struct rte_flow_error *error)
4886 {
4887         size_t size = sizeof(struct mlx5_flow);
4888         struct mlx5_flow *dev_flow;
4889
4890         dev_flow = rte_calloc(__func__, 1, size, 0);
4891         if (!dev_flow) {
4892                 rte_flow_error_set(error, ENOMEM,
4893                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4894                                    "not enough memory to create flow");
4895                 return NULL;
4896         }
4897         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
4898         dev_flow->ingress = attr->ingress;
4899         dev_flow->transfer = attr->transfer;
4900         return dev_flow;
4901 }
4902
4903 #ifndef NDEBUG
4904 /**
4905  * Sanity check for match mask and value. Similar to check_valid_spec() in
4906  * kernel driver. If unmasked bit is present in value, it returns failure.
4907  *
4908  * @param match_mask
4909  *   pointer to match mask buffer.
4910  * @param match_value
4911  *   pointer to match value buffer.
4912  *
4913  * @return
4914  *   0 if valid, -EINVAL otherwise.
4915  */
4916 static int
4917 flow_dv_check_valid_spec(void *match_mask, void *match_value)
4918 {
4919         uint8_t *m = match_mask;
4920         uint8_t *v = match_value;
4921         unsigned int i;
4922
4923         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
4924                 if (v[i] & ~m[i]) {
4925                         DRV_LOG(ERR,
4926                                 "match_value differs from match_criteria"
4927                                 " %p[%u] != %p[%u]",
4928                                 match_value, i, match_mask, i);
4929                         return -EINVAL;
4930                 }
4931         }
4932         return 0;
4933 }
4934 #endif
4935
4936 /**
4937  * Add Ethernet item to matcher and to the value.
4938  *
4939  * @param[in, out] matcher
4940  *   Flow matcher.
4941  * @param[in, out] key
4942  *   Flow matcher value.
4943  * @param[in] item
4944  *   Flow pattern to translate.
4945  * @param[in] inner
4946  *   Item is inner pattern.
4947  */
4948 static void
4949 flow_dv_translate_item_eth(void *matcher, void *key,
4950                            const struct rte_flow_item *item, int inner)
4951 {
4952         const struct rte_flow_item_eth *eth_m = item->mask;
4953         const struct rte_flow_item_eth *eth_v = item->spec;
4954         const struct rte_flow_item_eth nic_mask = {
4955                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4956                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4957                 .type = RTE_BE16(0xffff),
4958         };
4959         void *headers_m;
4960         void *headers_v;
4961         char *l24_v;
4962         unsigned int i;
4963
4964         if (!eth_v)
4965                 return;
4966         if (!eth_m)
4967                 eth_m = &nic_mask;
4968         if (inner) {
4969                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4970                                          inner_headers);
4971                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4972         } else {
4973                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4974                                          outer_headers);
4975                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4976         }
4977         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
4978                &eth_m->dst, sizeof(eth_m->dst));
4979         /* The value must be in the range of the mask. */
4980         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
4981         for (i = 0; i < sizeof(eth_m->dst); ++i)
4982                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
4983         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
4984                &eth_m->src, sizeof(eth_m->src));
4985         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
4986         /* The value must be in the range of the mask. */
4987         for (i = 0; i < sizeof(eth_m->dst); ++i)
4988                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
4989         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
4990                  rte_be_to_cpu_16(eth_m->type));
4991         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
4992         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
4993 }
4994
4995 /**
4996  * Add VLAN item to matcher and to the value.
4997  *
4998  * @param[in, out] dev_flow
4999  *   Flow descriptor.
5000  * @param[in, out] matcher
5001  *   Flow matcher.
5002  * @param[in, out] key
5003  *   Flow matcher value.
5004  * @param[in] item
5005  *   Flow pattern to translate.
5006  * @param[in] inner
5007  *   Item is inner pattern.
5008  */
5009 static void
5010 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5011                             void *matcher, void *key,
5012                             const struct rte_flow_item *item,
5013                             int inner)
5014 {
5015         const struct rte_flow_item_vlan *vlan_m = item->mask;
5016         const struct rte_flow_item_vlan *vlan_v = item->spec;
5017         void *headers_m;
5018         void *headers_v;
5019         uint16_t tci_m;
5020         uint16_t tci_v;
5021
5022         if (!vlan_v)
5023                 return;
5024         if (!vlan_m)
5025                 vlan_m = &rte_flow_item_vlan_mask;
5026         if (inner) {
5027                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5028                                          inner_headers);
5029                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5030         } else {
5031                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5032                                          outer_headers);
5033                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5034                 /*
5035                  * This is workaround, masks are not supported,
5036                  * and pre-validated.
5037                  */
5038                 dev_flow->dv.vf_vlan.tag =
5039                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5040         }
5041         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5042         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5043         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5044         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5045         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5046         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5047         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5048         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5049         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5050         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5051         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5052                  rte_be_to_cpu_16(vlan_m->inner_type));
5053         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5054                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5055 }
5056
5057 /**
5058  * Add IPV4 item to matcher and to the value.
5059  *
5060  * @param[in, out] matcher
5061  *   Flow matcher.
5062  * @param[in, out] key
5063  *   Flow matcher value.
5064  * @param[in] item
5065  *   Flow pattern to translate.
5066  * @param[in] inner
5067  *   Item is inner pattern.
5068  * @param[in] group
5069  *   The group to insert the rule.
5070  */
5071 static void
5072 flow_dv_translate_item_ipv4(void *matcher, void *key,
5073                             const struct rte_flow_item *item,
5074                             int inner, uint32_t group)
5075 {
5076         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5077         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5078         const struct rte_flow_item_ipv4 nic_mask = {
5079                 .hdr = {
5080                         .src_addr = RTE_BE32(0xffffffff),
5081                         .dst_addr = RTE_BE32(0xffffffff),
5082                         .type_of_service = 0xff,
5083                         .next_proto_id = 0xff,
5084                 },
5085         };
5086         void *headers_m;
5087         void *headers_v;
5088         char *l24_m;
5089         char *l24_v;
5090         uint8_t tos;
5091
5092         if (inner) {
5093                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5094                                          inner_headers);
5095                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5096         } else {
5097                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5098                                          outer_headers);
5099                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5100         }
5101         if (group == 0)
5102                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5103         else
5104                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5105         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5106         if (!ipv4_v)
5107                 return;
5108         if (!ipv4_m)
5109                 ipv4_m = &nic_mask;
5110         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5111                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5112         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5113                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5114         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5115         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5116         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5117                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5118         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5119                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5120         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5121         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5122         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5123         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5124                  ipv4_m->hdr.type_of_service);
5125         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5126         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5127                  ipv4_m->hdr.type_of_service >> 2);
5128         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5129         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5130                  ipv4_m->hdr.next_proto_id);
5131         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5132                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5133 }
5134
5135 /**
5136  * Add IPV6 item to matcher and to the value.
5137  *
5138  * @param[in, out] matcher
5139  *   Flow matcher.
5140  * @param[in, out] key
5141  *   Flow matcher value.
5142  * @param[in] item
5143  *   Flow pattern to translate.
5144  * @param[in] inner
5145  *   Item is inner pattern.
5146  * @param[in] group
5147  *   The group to insert the rule.
5148  */
5149 static void
5150 flow_dv_translate_item_ipv6(void *matcher, void *key,
5151                             const struct rte_flow_item *item,
5152                             int inner, uint32_t group)
5153 {
5154         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5155         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5156         const struct rte_flow_item_ipv6 nic_mask = {
5157                 .hdr = {
5158                         .src_addr =
5159                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5160                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5161                         .dst_addr =
5162                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5163                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5164                         .vtc_flow = RTE_BE32(0xffffffff),
5165                         .proto = 0xff,
5166                         .hop_limits = 0xff,
5167                 },
5168         };
5169         void *headers_m;
5170         void *headers_v;
5171         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5172         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5173         char *l24_m;
5174         char *l24_v;
5175         uint32_t vtc_m;
5176         uint32_t vtc_v;
5177         int i;
5178         int size;
5179
5180         if (inner) {
5181                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5182                                          inner_headers);
5183                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5184         } else {
5185                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5186                                          outer_headers);
5187                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5188         }
5189         if (group == 0)
5190                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5191         else
5192                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5193         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5194         if (!ipv6_v)
5195                 return;
5196         if (!ipv6_m)
5197                 ipv6_m = &nic_mask;
5198         size = sizeof(ipv6_m->hdr.dst_addr);
5199         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5200                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5201         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5202                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5203         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5204         for (i = 0; i < size; ++i)
5205                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5206         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5207                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5208         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5209                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5210         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5211         for (i = 0; i < size; ++i)
5212                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5213         /* TOS. */
5214         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5215         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5216         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5217         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5218         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5219         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5220         /* Label. */
5221         if (inner) {
5222                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5223                          vtc_m);
5224                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5225                          vtc_v);
5226         } else {
5227                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5228                          vtc_m);
5229                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5230                          vtc_v);
5231         }
5232         /* Protocol. */
5233         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5234                  ipv6_m->hdr.proto);
5235         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5236                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5237 }
5238
5239 /**
5240  * Add TCP item to matcher and to the value.
5241  *
5242  * @param[in, out] matcher
5243  *   Flow matcher.
5244  * @param[in, out] key
5245  *   Flow matcher value.
5246  * @param[in] item
5247  *   Flow pattern to translate.
5248  * @param[in] inner
5249  *   Item is inner pattern.
5250  */
5251 static void
5252 flow_dv_translate_item_tcp(void *matcher, void *key,
5253                            const struct rte_flow_item *item,
5254                            int inner)
5255 {
5256         const struct rte_flow_item_tcp *tcp_m = item->mask;
5257         const struct rte_flow_item_tcp *tcp_v = item->spec;
5258         void *headers_m;
5259         void *headers_v;
5260
5261         if (inner) {
5262                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5263                                          inner_headers);
5264                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5265         } else {
5266                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5267                                          outer_headers);
5268                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5269         }
5270         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5271         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5272         if (!tcp_v)
5273                 return;
5274         if (!tcp_m)
5275                 tcp_m = &rte_flow_item_tcp_mask;
5276         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5277                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5278         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5279                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5280         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5281                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5282         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5283                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5284         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5285                  tcp_m->hdr.tcp_flags);
5286         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5287                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5288 }
5289
5290 /**
5291  * Add UDP item to matcher and to the value.
5292  *
5293  * @param[in, out] matcher
5294  *   Flow matcher.
5295  * @param[in, out] key
5296  *   Flow matcher value.
5297  * @param[in] item
5298  *   Flow pattern to translate.
5299  * @param[in] inner
5300  *   Item is inner pattern.
5301  */
5302 static void
5303 flow_dv_translate_item_udp(void *matcher, void *key,
5304                            const struct rte_flow_item *item,
5305                            int inner)
5306 {
5307         const struct rte_flow_item_udp *udp_m = item->mask;
5308         const struct rte_flow_item_udp *udp_v = item->spec;
5309         void *headers_m;
5310         void *headers_v;
5311
5312         if (inner) {
5313                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5314                                          inner_headers);
5315                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5316         } else {
5317                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5318                                          outer_headers);
5319                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5320         }
5321         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5322         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5323         if (!udp_v)
5324                 return;
5325         if (!udp_m)
5326                 udp_m = &rte_flow_item_udp_mask;
5327         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5328                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5329         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5330                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5331         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5332                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5333         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5334                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5335 }
5336
5337 /**
5338  * Add GRE optional Key item to matcher and to the value.
5339  *
5340  * @param[in, out] matcher
5341  *   Flow matcher.
5342  * @param[in, out] key
5343  *   Flow matcher value.
5344  * @param[in] item
5345  *   Flow pattern to translate.
5346  * @param[in] inner
5347  *   Item is inner pattern.
5348  */
5349 static void
5350 flow_dv_translate_item_gre_key(void *matcher, void *key,
5351                                    const struct rte_flow_item *item)
5352 {
5353         const rte_be32_t *key_m = item->mask;
5354         const rte_be32_t *key_v = item->spec;
5355         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5356         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5357         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5358
5359         if (!key_v)
5360                 return;
5361         if (!key_m)
5362                 key_m = &gre_key_default_mask;
5363         /* GRE K bit must be on and should already be validated */
5364         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5365         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5366         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5367                  rte_be_to_cpu_32(*key_m) >> 8);
5368         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5369                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5370         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5371                  rte_be_to_cpu_32(*key_m) & 0xFF);
5372         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5373                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5374 }
5375
5376 /**
5377  * Add GRE item to matcher and to the value.
5378  *
5379  * @param[in, out] matcher
5380  *   Flow matcher.
5381  * @param[in, out] key
5382  *   Flow matcher value.
5383  * @param[in] item
5384  *   Flow pattern to translate.
5385  * @param[in] inner
5386  *   Item is inner pattern.
5387  */
5388 static void
5389 flow_dv_translate_item_gre(void *matcher, void *key,
5390                            const struct rte_flow_item *item,
5391                            int inner)
5392 {
5393         const struct rte_flow_item_gre *gre_m = item->mask;
5394         const struct rte_flow_item_gre *gre_v = item->spec;
5395         void *headers_m;
5396         void *headers_v;
5397         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5398         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5399         struct {
5400                 union {
5401                         __extension__
5402                         struct {
5403                                 uint16_t version:3;
5404                                 uint16_t rsvd0:9;
5405                                 uint16_t s_present:1;
5406                                 uint16_t k_present:1;
5407                                 uint16_t rsvd_bit1:1;
5408                                 uint16_t c_present:1;
5409                         };
5410                         uint16_t value;
5411                 };
5412         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5413
5414         if (inner) {
5415                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5416                                          inner_headers);
5417                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5418         } else {
5419                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5420                                          outer_headers);
5421                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5422         }
5423         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5424         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5425         if (!gre_v)
5426                 return;
5427         if (!gre_m)
5428                 gre_m = &rte_flow_item_gre_mask;
5429         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5430                  rte_be_to_cpu_16(gre_m->protocol));
5431         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5432                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5433         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5434         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5435         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5436                  gre_crks_rsvd0_ver_m.c_present);
5437         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5438                  gre_crks_rsvd0_ver_v.c_present &
5439                  gre_crks_rsvd0_ver_m.c_present);
5440         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5441                  gre_crks_rsvd0_ver_m.k_present);
5442         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5443                  gre_crks_rsvd0_ver_v.k_present &
5444                  gre_crks_rsvd0_ver_m.k_present);
5445         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5446                  gre_crks_rsvd0_ver_m.s_present);
5447         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5448                  gre_crks_rsvd0_ver_v.s_present &
5449                  gre_crks_rsvd0_ver_m.s_present);
5450 }
5451
5452 /**
5453  * Add NVGRE item to matcher and to the value.
5454  *
5455  * @param[in, out] matcher
5456  *   Flow matcher.
5457  * @param[in, out] key
5458  *   Flow matcher value.
5459  * @param[in] item
5460  *   Flow pattern to translate.
5461  * @param[in] inner
5462  *   Item is inner pattern.
5463  */
5464 static void
5465 flow_dv_translate_item_nvgre(void *matcher, void *key,
5466                              const struct rte_flow_item *item,
5467                              int inner)
5468 {
5469         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5470         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5471         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5472         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5473         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5474         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5475         char *gre_key_m;
5476         char *gre_key_v;
5477         int size;
5478         int i;
5479
5480         /* For NVGRE, GRE header fields must be set with defined values. */
5481         const struct rte_flow_item_gre gre_spec = {
5482                 .c_rsvd0_ver = RTE_BE16(0x2000),
5483                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5484         };
5485         const struct rte_flow_item_gre gre_mask = {
5486                 .c_rsvd0_ver = RTE_BE16(0xB000),
5487                 .protocol = RTE_BE16(UINT16_MAX),
5488         };
5489         const struct rte_flow_item gre_item = {
5490                 .spec = &gre_spec,
5491                 .mask = &gre_mask,
5492                 .last = NULL,
5493         };
5494         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5495         if (!nvgre_v)
5496                 return;
5497         if (!nvgre_m)
5498                 nvgre_m = &rte_flow_item_nvgre_mask;
5499         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5500         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5501         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5502         memcpy(gre_key_m, tni_flow_id_m, size);
5503         for (i = 0; i < size; ++i)
5504                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5505 }
5506
5507 /**
5508  * Add VXLAN item to matcher and to the value.
5509  *
5510  * @param[in, out] matcher
5511  *   Flow matcher.
5512  * @param[in, out] key
5513  *   Flow matcher value.
5514  * @param[in] item
5515  *   Flow pattern to translate.
5516  * @param[in] inner
5517  *   Item is inner pattern.
5518  */
5519 static void
5520 flow_dv_translate_item_vxlan(void *matcher, void *key,
5521                              const struct rte_flow_item *item,
5522                              int inner)
5523 {
5524         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5525         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5526         void *headers_m;
5527         void *headers_v;
5528         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5529         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5530         char *vni_m;
5531         char *vni_v;
5532         uint16_t dport;
5533         int size;
5534         int i;
5535
5536         if (inner) {
5537                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5538                                          inner_headers);
5539                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5540         } else {
5541                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5542                                          outer_headers);
5543                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5544         }
5545         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5546                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5547         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5548                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5549                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5550         }
5551         if (!vxlan_v)
5552                 return;
5553         if (!vxlan_m)
5554                 vxlan_m = &rte_flow_item_vxlan_mask;
5555         size = sizeof(vxlan_m->vni);
5556         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5557         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5558         memcpy(vni_m, vxlan_m->vni, size);
5559         for (i = 0; i < size; ++i)
5560                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5561 }
5562
5563 /**
5564  * Add Geneve item to matcher and to the value.
5565  *
5566  * @param[in, out] matcher
5567  *   Flow matcher.
5568  * @param[in, out] key
5569  *   Flow matcher value.
5570  * @param[in] item
5571  *   Flow pattern to translate.
5572  * @param[in] inner
5573  *   Item is inner pattern.
5574  */
5575
5576 static void
5577 flow_dv_translate_item_geneve(void *matcher, void *key,
5578                               const struct rte_flow_item *item, int inner)
5579 {
5580         const struct rte_flow_item_geneve *geneve_m = item->mask;
5581         const struct rte_flow_item_geneve *geneve_v = item->spec;
5582         void *headers_m;
5583         void *headers_v;
5584         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5585         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5586         uint16_t dport;
5587         uint16_t gbhdr_m;
5588         uint16_t gbhdr_v;
5589         char *vni_m;
5590         char *vni_v;
5591         size_t size, i;
5592
5593         if (inner) {
5594                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5595                                          inner_headers);
5596                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5597         } else {
5598                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5599                                          outer_headers);
5600                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5601         }
5602         dport = MLX5_UDP_PORT_GENEVE;
5603         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5604                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5605                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5606         }
5607         if (!geneve_v)
5608                 return;
5609         if (!geneve_m)
5610                 geneve_m = &rte_flow_item_geneve_mask;
5611         size = sizeof(geneve_m->vni);
5612         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5613         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5614         memcpy(vni_m, geneve_m->vni, size);
5615         for (i = 0; i < size; ++i)
5616                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5617         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5618                  rte_be_to_cpu_16(geneve_m->protocol));
5619         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5620                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5621         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5622         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5623         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5624                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5625         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5626                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5627         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5628                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5629         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5630                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5631                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5632 }
5633
5634 /**
5635  * Add MPLS item to matcher and to the value.
5636  *
5637  * @param[in, out] matcher
5638  *   Flow matcher.
5639  * @param[in, out] key
5640  *   Flow matcher value.
5641  * @param[in] item
5642  *   Flow pattern to translate.
5643  * @param[in] prev_layer
5644  *   The protocol layer indicated in previous item.
5645  * @param[in] inner
5646  *   Item is inner pattern.
5647  */
5648 static void
5649 flow_dv_translate_item_mpls(void *matcher, void *key,
5650                             const struct rte_flow_item *item,
5651                             uint64_t prev_layer,
5652                             int inner)
5653 {
5654         const uint32_t *in_mpls_m = item->mask;
5655         const uint32_t *in_mpls_v = item->spec;
5656         uint32_t *out_mpls_m = 0;
5657         uint32_t *out_mpls_v = 0;
5658         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5659         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5660         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5661                                      misc_parameters_2);
5662         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5663         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5664         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5665
5666         switch (prev_layer) {
5667         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5668                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5669                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5670                          MLX5_UDP_PORT_MPLS);
5671                 break;
5672         case MLX5_FLOW_LAYER_GRE:
5673                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5674                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5675                          RTE_ETHER_TYPE_MPLS);
5676                 break;
5677         default:
5678                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5679                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5680                          IPPROTO_MPLS);
5681                 break;
5682         }
5683         if (!in_mpls_v)
5684                 return;
5685         if (!in_mpls_m)
5686                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5687         switch (prev_layer) {
5688         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5689                 out_mpls_m =
5690                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5691                                                  outer_first_mpls_over_udp);
5692                 out_mpls_v =
5693                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5694                                                  outer_first_mpls_over_udp);
5695                 break;
5696         case MLX5_FLOW_LAYER_GRE:
5697                 out_mpls_m =
5698                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5699                                                  outer_first_mpls_over_gre);
5700                 out_mpls_v =
5701                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5702                                                  outer_first_mpls_over_gre);
5703                 break;
5704         default:
5705                 /* Inner MPLS not over GRE is not supported. */
5706                 if (!inner) {
5707                         out_mpls_m =
5708                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5709                                                          misc2_m,
5710                                                          outer_first_mpls);
5711                         out_mpls_v =
5712                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5713                                                          misc2_v,
5714                                                          outer_first_mpls);
5715                 }
5716                 break;
5717         }
5718         if (out_mpls_m && out_mpls_v) {
5719                 *out_mpls_m = *in_mpls_m;
5720                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5721         }
5722 }
5723
5724 /**
5725  * Add metadata register item to matcher
5726  *
5727  * @param[in, out] matcher
5728  *   Flow matcher.
5729  * @param[in, out] key
5730  *   Flow matcher value.
5731  * @param[in] reg_type
5732  *   Type of device metadata register
5733  * @param[in] value
5734  *   Register value
5735  * @param[in] mask
5736  *   Register mask
5737  */
5738 static void
5739 flow_dv_match_meta_reg(void *matcher, void *key,
5740                        enum modify_reg reg_type,
5741                        uint32_t data, uint32_t mask)
5742 {
5743         void *misc2_m =
5744                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5745         void *misc2_v =
5746                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5747
5748         data &= mask;
5749         switch (reg_type) {
5750         case REG_A:
5751                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5752                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5753                 break;
5754         case REG_B:
5755                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5756                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5757                 break;
5758         case REG_C_0:
5759                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
5760                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, data);
5761                 break;
5762         case REG_C_1:
5763                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5764                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5765                 break;
5766         case REG_C_2:
5767                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5768                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5769                 break;
5770         case REG_C_3:
5771                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5772                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5773                 break;
5774         case REG_C_4:
5775                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5776                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5777                 break;
5778         case REG_C_5:
5779                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5780                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5781                 break;
5782         case REG_C_6:
5783                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
5784                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
5785                 break;
5786         case REG_C_7:
5787                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
5788                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
5789                 break;
5790         default:
5791                 assert(false);
5792                 break;
5793         }
5794 }
5795
5796 /**
5797  * Add MARK item to matcher
5798  *
5799  * @param[in] dev
5800  *   The device to configure through.
5801  * @param[in, out] matcher
5802  *   Flow matcher.
5803  * @param[in, out] key
5804  *   Flow matcher value.
5805  * @param[in] item
5806  *   Flow pattern to translate.
5807  */
5808 static void
5809 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
5810                             void *matcher, void *key,
5811                             const struct rte_flow_item *item)
5812 {
5813         struct mlx5_priv *priv = dev->data->dev_private;
5814         const struct rte_flow_item_mark *mark;
5815         uint32_t value;
5816         uint32_t mask;
5817
5818         mark = item->mask ? (const void *)item->mask :
5819                             &rte_flow_item_mark_mask;
5820         mask = mark->id & priv->sh->dv_mark_mask;
5821         mark = (const void *)item->spec;
5822         assert(mark);
5823         value = mark->id & priv->sh->dv_mark_mask & mask;
5824         if (mask) {
5825                 enum modify_reg reg;
5826
5827                 /* Get the metadata register index for the mark. */
5828                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
5829                 assert(reg > 0);
5830                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5831         }
5832 }
5833
5834 /**
5835  * Add META item to matcher
5836  *
5837  * @param[in] dev
5838  *   The devich to configure through.
5839  * @param[in, out] matcher
5840  *   Flow matcher.
5841  * @param[in, out] key
5842  *   Flow matcher value.
5843  * @param[in] attr
5844  *   Attributes of flow that includes this item.
5845  * @param[in] item
5846  *   Flow pattern to translate.
5847  */
5848 static void
5849 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
5850                             void *matcher, void *key,
5851                             const struct rte_flow_attr *attr,
5852                             const struct rte_flow_item *item)
5853 {
5854         const struct rte_flow_item_meta *meta_m;
5855         const struct rte_flow_item_meta *meta_v;
5856
5857         meta_m = (const void *)item->mask;
5858         if (!meta_m)
5859                 meta_m = &rte_flow_item_meta_mask;
5860         meta_v = (const void *)item->spec;
5861         if (meta_v) {
5862                 enum modify_reg reg;
5863                 uint32_t value = meta_v->data;
5864                 uint32_t mask = meta_m->data;
5865
5866                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
5867                 if (reg < 0)
5868                         return;
5869                 /*
5870                  * In datapath code there is no endianness
5871                  * coversions for perfromance reasons, all
5872                  * pattern conversions are done in rte_flow.
5873                  */
5874                 value = rte_cpu_to_be_32(value);
5875                 mask = rte_cpu_to_be_32(mask);
5876                 if (reg == REG_C_0) {
5877                         struct mlx5_priv *priv = dev->data->dev_private;
5878                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
5879                         uint32_t shl_c0 = rte_bsf32(msk_c0);
5880
5881                         msk_c0 = rte_cpu_to_be_32(msk_c0);
5882                         value <<= shl_c0;
5883                         mask <<= shl_c0;
5884                         assert(msk_c0);
5885                         assert(!(~msk_c0 & mask));
5886                 }
5887                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5888         }
5889 }
5890
5891 /**
5892  * Add vport metadata Reg C0 item to matcher
5893  *
5894  * @param[in, out] matcher
5895  *   Flow matcher.
5896  * @param[in, out] key
5897  *   Flow matcher value.
5898  * @param[in] reg
5899  *   Flow pattern to translate.
5900  */
5901 static void
5902 flow_dv_translate_item_meta_vport(void *matcher, void *key,
5903                                   uint32_t value, uint32_t mask)
5904 {
5905         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
5906 }
5907
5908 /**
5909  * Add tag item to matcher
5910  *
5911  * @param[in, out] matcher
5912  *   Flow matcher.
5913  * @param[in, out] key
5914  *   Flow matcher value.
5915  * @param[in] item
5916  *   Flow pattern to translate.
5917  */
5918 static void
5919 flow_dv_translate_mlx5_item_tag(void *matcher, void *key,
5920                                 const struct rte_flow_item *item)
5921 {
5922         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
5923         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
5924
5925         assert(tag_v);
5926         flow_dv_match_meta_reg(matcher, key, tag_v->id, tag_v->data,
5927                                tag_m ? tag_m->data : UINT32_MAX);
5928 }
5929
5930 /**
5931  * Add TAG item to matcher
5932  *
5933  * @param[in] dev
5934  *   The devich to configure through.
5935  * @param[in, out] matcher
5936  *   Flow matcher.
5937  * @param[in, out] key
5938  *   Flow matcher value.
5939  * @param[in] item
5940  *   Flow pattern to translate.
5941  */
5942 static void
5943 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
5944                            void *matcher, void *key,
5945                            const struct rte_flow_item *item)
5946 {
5947         const struct rte_flow_item_tag *tag_v = item->spec;
5948         const struct rte_flow_item_tag *tag_m = item->mask;
5949         enum modify_reg reg;
5950
5951         assert(tag_v);
5952         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
5953         /* Get the metadata register index for the tag. */
5954         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
5955         assert(reg > 0);
5956         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
5957 }
5958
5959 /**
5960  * Add source vport match to the specified matcher.
5961  *
5962  * @param[in, out] matcher
5963  *   Flow matcher.
5964  * @param[in, out] key
5965  *   Flow matcher value.
5966  * @param[in] port
5967  *   Source vport value to match
5968  * @param[in] mask
5969  *   Mask
5970  */
5971 static void
5972 flow_dv_translate_item_source_vport(void *matcher, void *key,
5973                                     int16_t port, uint16_t mask)
5974 {
5975         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5976         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5977
5978         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
5979         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
5980 }
5981
5982 /**
5983  * Translate port-id item to eswitch match on  port-id.
5984  *
5985  * @param[in] dev
5986  *   The devich to configure through.
5987  * @param[in, out] matcher
5988  *   Flow matcher.
5989  * @param[in, out] key
5990  *   Flow matcher value.
5991  * @param[in] item
5992  *   Flow pattern to translate.
5993  *
5994  * @return
5995  *   0 on success, a negative errno value otherwise.
5996  */
5997 static int
5998 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
5999                                void *key, const struct rte_flow_item *item)
6000 {
6001         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6002         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6003         struct mlx5_priv *priv;
6004         uint16_t mask, id;
6005
6006         mask = pid_m ? pid_m->id : 0xffff;
6007         id = pid_v ? pid_v->id : dev->data->port_id;
6008         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6009         if (!priv)
6010                 return -rte_errno;
6011         /* Translate to vport field or to metadata, depending on mode. */
6012         if (priv->vport_meta_mask)
6013                 flow_dv_translate_item_meta_vport(matcher, key,
6014                                                   priv->vport_meta_tag,
6015                                                   priv->vport_meta_mask);
6016         else
6017                 flow_dv_translate_item_source_vport(matcher, key,
6018                                                     priv->vport_id, mask);
6019         return 0;
6020 }
6021
6022 /**
6023  * Add ICMP6 item to matcher and to the value.
6024  *
6025  * @param[in, out] matcher
6026  *   Flow matcher.
6027  * @param[in, out] key
6028  *   Flow matcher value.
6029  * @param[in] item
6030  *   Flow pattern to translate.
6031  * @param[in] inner
6032  *   Item is inner pattern.
6033  */
6034 static void
6035 flow_dv_translate_item_icmp6(void *matcher, void *key,
6036                               const struct rte_flow_item *item,
6037                               int inner)
6038 {
6039         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6040         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6041         void *headers_m;
6042         void *headers_v;
6043         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6044                                      misc_parameters_3);
6045         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6046         if (inner) {
6047                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6048                                          inner_headers);
6049                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6050         } else {
6051                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6052                                          outer_headers);
6053                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6054         }
6055         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6056         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6057         if (!icmp6_v)
6058                 return;
6059         if (!icmp6_m)
6060                 icmp6_m = &rte_flow_item_icmp6_mask;
6061         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6062         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6063                  icmp6_v->type & icmp6_m->type);
6064         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6065         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6066                  icmp6_v->code & icmp6_m->code);
6067 }
6068
6069 /**
6070  * Add ICMP item to matcher and to the value.
6071  *
6072  * @param[in, out] matcher
6073  *   Flow matcher.
6074  * @param[in, out] key
6075  *   Flow matcher value.
6076  * @param[in] item
6077  *   Flow pattern to translate.
6078  * @param[in] inner
6079  *   Item is inner pattern.
6080  */
6081 static void
6082 flow_dv_translate_item_icmp(void *matcher, void *key,
6083                             const struct rte_flow_item *item,
6084                             int inner)
6085 {
6086         const struct rte_flow_item_icmp *icmp_m = item->mask;
6087         const struct rte_flow_item_icmp *icmp_v = item->spec;
6088         void *headers_m;
6089         void *headers_v;
6090         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6091                                      misc_parameters_3);
6092         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6093         if (inner) {
6094                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6095                                          inner_headers);
6096                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6097         } else {
6098                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6099                                          outer_headers);
6100                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6101         }
6102         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6103         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6104         if (!icmp_v)
6105                 return;
6106         if (!icmp_m)
6107                 icmp_m = &rte_flow_item_icmp_mask;
6108         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6109                  icmp_m->hdr.icmp_type);
6110         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6111                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6112         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6113                  icmp_m->hdr.icmp_code);
6114         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6115                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6116 }
6117
6118 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6119
6120 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6121         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6122                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6123
6124 /**
6125  * Calculate flow matcher enable bitmap.
6126  *
6127  * @param match_criteria
6128  *   Pointer to flow matcher criteria.
6129  *
6130  * @return
6131  *   Bitmap of enabled fields.
6132  */
6133 static uint8_t
6134 flow_dv_matcher_enable(uint32_t *match_criteria)
6135 {
6136         uint8_t match_criteria_enable;
6137
6138         match_criteria_enable =
6139                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6140                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6141         match_criteria_enable |=
6142                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6143                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6144         match_criteria_enable |=
6145                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6146                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6147         match_criteria_enable |=
6148                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6149                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6150         match_criteria_enable |=
6151                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6152                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6153         return match_criteria_enable;
6154 }
6155
6156
6157 /**
6158  * Get a flow table.
6159  *
6160  * @param[in, out] dev
6161  *   Pointer to rte_eth_dev structure.
6162  * @param[in] table_id
6163  *   Table id to use.
6164  * @param[in] egress
6165  *   Direction of the table.
6166  * @param[in] transfer
6167  *   E-Switch or NIC flow.
6168  * @param[out] error
6169  *   pointer to error structure.
6170  *
6171  * @return
6172  *   Returns tables resource based on the index, NULL in case of failed.
6173  */
6174 static struct mlx5_flow_tbl_resource *
6175 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6176                          uint32_t table_id, uint8_t egress,
6177                          uint8_t transfer,
6178                          struct rte_flow_error *error)
6179 {
6180         struct mlx5_priv *priv = dev->data->dev_private;
6181         struct mlx5_ibv_shared *sh = priv->sh;
6182         struct mlx5_flow_tbl_resource *tbl;
6183         union mlx5_flow_tbl_key table_key = {
6184                 {
6185                         .table_id = table_id,
6186                         .reserved = 0,
6187                         .domain = !!transfer,
6188                         .direction = !!egress,
6189                 }
6190         };
6191         struct mlx5_hlist_entry *pos;
6192         struct mlx5_flow_tbl_data_entry *tbl_data;
6193
6194 #ifdef HAVE_MLX5DV_DR
6195         int ret;
6196         void *domain;
6197
6198         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
6199         if (pos) {
6200                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6201                                         entry);
6202                 tbl = &tbl_data->tbl;
6203                 if (!tbl->obj) {
6204                         rte_flow_error_set(error, ENOKEY,
6205                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6206                                            NULL, "cannot find created table");
6207                         return NULL;
6208                 }
6209                 rte_atomic32_inc(&tbl->refcnt);
6210                 return tbl;
6211         }
6212         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6213         if (!tbl_data) {
6214                 rte_flow_error_set(error, ENOMEM,
6215                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6216                                    NULL,
6217                                    "cannot allocate flow table data entry");
6218                 return NULL;
6219         }
6220         tbl = &tbl_data->tbl;
6221         pos = &tbl_data->entry;
6222         if (transfer)
6223                 domain = sh->fdb_domain;
6224         else if (egress)
6225                 domain = sh->tx_domain;
6226         else
6227                 domain = sh->rx_domain;
6228         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6229         if (!tbl->obj) {
6230                 rte_flow_error_set(error, ENOMEM,
6231                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6232                                    NULL, "cannot create flow table object");
6233                 rte_free(tbl_data);
6234                 return NULL;
6235         }
6236         /*
6237          * No multi-threads now, but still better to initialize the reference
6238          * count before insert it into the hash list.
6239          */
6240         rte_atomic32_init(&tbl->refcnt);
6241         pos->key = table_key.v64;
6242         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6243         if (ret < 0) {
6244                 rte_flow_error_set(error, -ret,
6245                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6246                                    "cannot insert flow table data entry");
6247                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6248                 rte_free(tbl_data);
6249         }
6250         rte_atomic32_inc(&tbl->refcnt);
6251         return tbl;
6252 #else
6253         /* Just to make the compiling pass when no HAVE_MLX5DV_DR defined. */
6254         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
6255         if (pos) {
6256                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6257                                         entry);
6258                 tbl = &tbl_data->tbl;
6259                 if (!tbl->obj) {
6260                         rte_flow_error_set(error, ENOKEY,
6261                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6262                                            NULL, "cannot find created table");
6263                         return NULL;
6264                 }
6265                 rte_atomic32_inc(&tbl->refcnt);
6266                 return tbl;
6267         }
6268         return NULL;
6269 #endif
6270 }
6271
6272 /**
6273  * Release a flow table.
6274  *
6275  * @param[in] dev
6276  *   Pointer to rte_eth_dev structure.
6277  * @param[in] tbl
6278  *   Table resource to be released.
6279  *
6280  * @return
6281  *   Returns 0 if table was released, else return 1;
6282  */
6283 static int
6284 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6285                              struct mlx5_flow_tbl_resource *tbl)
6286 {
6287         struct mlx5_priv *priv = dev->data->dev_private;
6288         struct mlx5_ibv_shared *sh = priv->sh;
6289         struct mlx5_flow_tbl_data_entry *tbl_data =
6290                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6291
6292         if (!tbl)
6293                 return 0;
6294         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6295                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6296
6297                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6298                 tbl->obj = NULL;
6299                 /* remove the entry from the hash list and free memory. */
6300                 mlx5_hlist_remove(sh->flow_tbls, pos);
6301                 rte_free(tbl_data);
6302                 return 0;
6303         }
6304         return 1;
6305 }
6306
6307 /**
6308  * Register the flow matcher.
6309  *
6310  * @param[in, out] dev
6311  *   Pointer to rte_eth_dev structure.
6312  * @param[in, out] matcher
6313  *   Pointer to flow matcher.
6314  * @parm[in, out] dev_flow
6315  *   Pointer to the dev_flow.
6316  * @param[out] error
6317  *   pointer to error structure.
6318  *
6319  * @return
6320  *   0 on success otherwise -errno and errno is set.
6321  */
6322 static int
6323 flow_dv_matcher_register(struct rte_eth_dev *dev,
6324                          struct mlx5_flow_dv_matcher *matcher,
6325                          struct mlx5_flow *dev_flow,
6326                          struct rte_flow_error *error)
6327 {
6328         struct mlx5_priv *priv = dev->data->dev_private;
6329         struct mlx5_ibv_shared *sh = priv->sh;
6330         struct mlx5_flow_dv_matcher *cache_matcher;
6331         struct mlx5dv_flow_matcher_attr dv_attr = {
6332                 .type = IBV_FLOW_ATTR_NORMAL,
6333                 .match_mask = (void *)&matcher->mask,
6334         };
6335         struct mlx5_flow_tbl_resource *tbl = NULL;
6336
6337         /* Lookup from cache. */
6338         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
6339                 if (matcher->crc == cache_matcher->crc &&
6340                     matcher->priority == cache_matcher->priority &&
6341                     matcher->egress == cache_matcher->egress &&
6342                     matcher->group == cache_matcher->group &&
6343                     matcher->transfer == cache_matcher->transfer &&
6344                     !memcmp((const void *)matcher->mask.buf,
6345                             (const void *)cache_matcher->mask.buf,
6346                             cache_matcher->mask.size)) {
6347                         DRV_LOG(DEBUG,
6348                                 "priority %hd use %s matcher %p: refcnt %d++",
6349                                 cache_matcher->priority,
6350                                 cache_matcher->egress ? "tx" : "rx",
6351                                 (void *)cache_matcher,
6352                                 rte_atomic32_read(&cache_matcher->refcnt));
6353                         rte_atomic32_inc(&cache_matcher->refcnt);
6354                         dev_flow->dv.matcher = cache_matcher;
6355                         return 0;
6356                 }
6357         }
6358         /* Register new matcher. */
6359         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6360         if (!cache_matcher)
6361                 return rte_flow_error_set(error, ENOMEM,
6362                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6363                                           "cannot allocate matcher memory");
6364         tbl = flow_dv_tbl_resource_get(dev, matcher->group,
6365                                        matcher->egress, matcher->transfer,
6366                                        error);
6367         if (!tbl) {
6368                 rte_free(cache_matcher);
6369                 return rte_flow_error_set(error, ENOMEM,
6370                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6371                                           NULL, "cannot create table");
6372         }
6373         *cache_matcher = *matcher;
6374         dv_attr.match_criteria_enable =
6375                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6376         dv_attr.priority = matcher->priority;
6377         if (matcher->egress)
6378                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6379         cache_matcher->matcher_object =
6380                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6381         if (!cache_matcher->matcher_object) {
6382                 rte_free(cache_matcher);
6383 #ifdef HAVE_MLX5DV_DR
6384                 flow_dv_tbl_resource_release(dev, tbl);
6385 #endif
6386                 return rte_flow_error_set(error, ENOMEM,
6387                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6388                                           NULL, "cannot create matcher");
6389         }
6390         rte_atomic32_inc(&cache_matcher->refcnt);
6391         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
6392         dev_flow->dv.matcher = cache_matcher;
6393         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
6394                 cache_matcher->priority,
6395                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
6396                 rte_atomic32_read(&cache_matcher->refcnt));
6397         rte_atomic32_inc(&tbl->refcnt);
6398         return 0;
6399 }
6400
6401 /**
6402  * Find existing tag resource or create and register a new one.
6403  *
6404  * @param dev[in, out]
6405  *   Pointer to rte_eth_dev structure.
6406  * @param[in, out] resource
6407  *   Pointer to tag resource.
6408  * @parm[in, out] dev_flow
6409  *   Pointer to the dev_flow.
6410  * @param[out] error
6411  *   pointer to error structure.
6412  *
6413  * @return
6414  *   0 on success otherwise -errno and errno is set.
6415  */
6416 static int
6417 flow_dv_tag_resource_register
6418                         (struct rte_eth_dev *dev,
6419                          struct mlx5_flow_dv_tag_resource *resource,
6420                          struct mlx5_flow *dev_flow,
6421                          struct rte_flow_error *error)
6422 {
6423         struct mlx5_priv *priv = dev->data->dev_private;
6424         struct mlx5_ibv_shared *sh = priv->sh;
6425         struct mlx5_flow_dv_tag_resource *cache_resource;
6426
6427         /* Lookup a matching resource from cache. */
6428         LIST_FOREACH(cache_resource, &sh->tags, next) {
6429                 if (resource->tag == cache_resource->tag) {
6430                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
6431                                 (void *)cache_resource,
6432                                 rte_atomic32_read(&cache_resource->refcnt));
6433                         rte_atomic32_inc(&cache_resource->refcnt);
6434                         dev_flow->dv.tag_resource = cache_resource;
6435                         return 0;
6436                 }
6437         }
6438         /* Register new  resource. */
6439         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6440         if (!cache_resource)
6441                 return rte_flow_error_set(error, ENOMEM,
6442                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6443                                           "cannot allocate resource memory");
6444         *cache_resource = *resource;
6445         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
6446                 (resource->tag);
6447         if (!cache_resource->action) {
6448                 rte_free(cache_resource);
6449                 return rte_flow_error_set(error, ENOMEM,
6450                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6451                                           NULL, "cannot create action");
6452         }
6453         rte_atomic32_init(&cache_resource->refcnt);
6454         rte_atomic32_inc(&cache_resource->refcnt);
6455         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
6456         dev_flow->dv.tag_resource = cache_resource;
6457         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
6458                 (void *)cache_resource,
6459                 rte_atomic32_read(&cache_resource->refcnt));
6460         return 0;
6461 }
6462
6463 /**
6464  * Release the tag.
6465  *
6466  * @param dev
6467  *   Pointer to Ethernet device.
6468  * @param flow
6469  *   Pointer to mlx5_flow.
6470  *
6471  * @return
6472  *   1 while a reference on it exists, 0 when freed.
6473  */
6474 static int
6475 flow_dv_tag_release(struct rte_eth_dev *dev,
6476                     struct mlx5_flow_dv_tag_resource *tag)
6477 {
6478         assert(tag);
6479         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6480                 dev->data->port_id, (void *)tag,
6481                 rte_atomic32_read(&tag->refcnt));
6482         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6483                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6484                 LIST_REMOVE(tag, next);
6485                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6486                         dev->data->port_id, (void *)tag);
6487                 rte_free(tag);
6488                 return 0;
6489         }
6490         return 1;
6491 }
6492
6493 /**
6494  * Translate port ID action to vport.
6495  *
6496  * @param[in] dev
6497  *   Pointer to rte_eth_dev structure.
6498  * @param[in] action
6499  *   Pointer to the port ID action.
6500  * @param[out] dst_port_id
6501  *   The target port ID.
6502  * @param[out] error
6503  *   Pointer to the error structure.
6504  *
6505  * @return
6506  *   0 on success, a negative errno value otherwise and rte_errno is set.
6507  */
6508 static int
6509 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6510                                  const struct rte_flow_action *action,
6511                                  uint32_t *dst_port_id,
6512                                  struct rte_flow_error *error)
6513 {
6514         uint32_t port;
6515         struct mlx5_priv *priv;
6516         const struct rte_flow_action_port_id *conf =
6517                         (const struct rte_flow_action_port_id *)action->conf;
6518
6519         port = conf->original ? dev->data->port_id : conf->id;
6520         priv = mlx5_port_to_eswitch_info(port, false);
6521         if (!priv)
6522                 return rte_flow_error_set(error, -rte_errno,
6523                                           RTE_FLOW_ERROR_TYPE_ACTION,
6524                                           NULL,
6525                                           "No eswitch info was found for port");
6526         if (priv->vport_meta_mask)
6527                 *dst_port_id = priv->vport_meta_tag;
6528         else
6529                 *dst_port_id = priv->vport_id;
6530         return 0;
6531 }
6532
6533 /**
6534  * Add Tx queue matcher
6535  *
6536  * @param[in] dev
6537  *   Pointer to the dev struct.
6538  * @param[in, out] matcher
6539  *   Flow matcher.
6540  * @param[in, out] key
6541  *   Flow matcher value.
6542  * @param[in] item
6543  *   Flow pattern to translate.
6544  * @param[in] inner
6545  *   Item is inner pattern.
6546  */
6547 static void
6548 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6549                                 void *matcher, void *key,
6550                                 const struct rte_flow_item *item)
6551 {
6552         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6553         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6554         void *misc_m =
6555                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6556         void *misc_v =
6557                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6558         struct mlx5_txq_ctrl *txq;
6559         uint32_t queue;
6560
6561
6562         queue_m = (const void *)item->mask;
6563         if (!queue_m)
6564                 return;
6565         queue_v = (const void *)item->spec;
6566         if (!queue_v)
6567                 return;
6568         txq = mlx5_txq_get(dev, queue_v->queue);
6569         if (!txq)
6570                 return;
6571         queue = txq->obj->sq->id;
6572         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6573         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6574                  queue & queue_m->queue);
6575         mlx5_txq_release(dev, queue_v->queue);
6576 }
6577
6578 /**
6579  * Fill the flow with DV spec, lock free
6580  * (mutex should be acquired by caller).
6581  *
6582  * @param[in] dev
6583  *   Pointer to rte_eth_dev structure.
6584  * @param[in, out] dev_flow
6585  *   Pointer to the sub flow.
6586  * @param[in] attr
6587  *   Pointer to the flow attributes.
6588  * @param[in] items
6589  *   Pointer to the list of items.
6590  * @param[in] actions
6591  *   Pointer to the list of actions.
6592  * @param[out] error
6593  *   Pointer to the error structure.
6594  *
6595  * @return
6596  *   0 on success, a negative errno value otherwise and rte_errno is set.
6597  */
6598 static int
6599 __flow_dv_translate(struct rte_eth_dev *dev,
6600                     struct mlx5_flow *dev_flow,
6601                     const struct rte_flow_attr *attr,
6602                     const struct rte_flow_item items[],
6603                     const struct rte_flow_action actions[],
6604                     struct rte_flow_error *error)
6605 {
6606         struct mlx5_priv *priv = dev->data->dev_private;
6607         struct mlx5_dev_config *dev_conf = &priv->config;
6608         struct rte_flow *flow = dev_flow->flow;
6609         uint64_t item_flags = 0;
6610         uint64_t last_item = 0;
6611         uint64_t action_flags = 0;
6612         uint64_t priority = attr->priority;
6613         struct mlx5_flow_dv_matcher matcher = {
6614                 .mask = {
6615                         .size = sizeof(matcher.mask.buf),
6616                 },
6617         };
6618         int actions_n = 0;
6619         bool actions_end = false;
6620         struct mlx5_flow_dv_modify_hdr_resource mhdr_res = {
6621                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
6622                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
6623         };
6624         union flow_dv_attr flow_attr = { .attr = 0 };
6625         struct mlx5_flow_dv_tag_resource tag_resource;
6626         uint32_t modify_action_position = UINT32_MAX;
6627         void *match_mask = matcher.mask.buf;
6628         void *match_value = dev_flow->dv.value.buf;
6629         uint8_t next_protocol = 0xff;
6630         struct rte_vlan_hdr vlan = { 0 };
6631         uint32_t table;
6632         int ret = 0;
6633
6634         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
6635                                        &table, error);
6636         if (ret)
6637                 return ret;
6638         dev_flow->group = table;
6639         if (attr->transfer)
6640                 mhdr_res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
6641         if (priority == MLX5_FLOW_PRIO_RSVD)
6642                 priority = dev_conf->flow_prio - 1;
6643         for (; !actions_end ; actions++) {
6644                 const struct rte_flow_action_queue *queue;
6645                 const struct rte_flow_action_rss *rss;
6646                 const struct rte_flow_action *action = actions;
6647                 const struct rte_flow_action_count *count = action->conf;
6648                 const uint8_t *rss_key;
6649                 const struct rte_flow_action_jump *jump_data;
6650                 const struct rte_flow_action_meter *mtr;
6651                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
6652                 struct mlx5_flow_tbl_resource *tbl;
6653                 uint32_t port_id = 0;
6654                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
6655                 int action_type = actions->type;
6656                 const struct rte_flow_action *found_action = NULL;
6657
6658                 switch (action_type) {
6659                 case RTE_FLOW_ACTION_TYPE_VOID:
6660                         break;
6661                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
6662                         if (flow_dv_translate_action_port_id(dev, action,
6663                                                              &port_id, error))
6664                                 return -rte_errno;
6665                         port_id_resource.port_id = port_id;
6666                         if (flow_dv_port_id_action_resource_register
6667                             (dev, &port_id_resource, dev_flow, error))
6668                                 return -rte_errno;
6669                         dev_flow->dv.actions[actions_n++] =
6670                                 dev_flow->dv.port_id_action->action;
6671                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
6672                         break;
6673                 case RTE_FLOW_ACTION_TYPE_FLAG:
6674                         action_flags |= MLX5_FLOW_ACTION_FLAG;
6675                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6676                                 struct rte_flow_action_mark mark = {
6677                                         .id = MLX5_FLOW_MARK_DEFAULT,
6678                                 };
6679
6680                                 if (flow_dv_convert_action_mark(dev, &mark,
6681                                                                 &mhdr_res,
6682                                                                 error))
6683                                         return -rte_errno;
6684                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6685                                 break;
6686                         }
6687                         tag_resource.tag =
6688                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
6689                         if (!dev_flow->dv.tag_resource)
6690                                 if (flow_dv_tag_resource_register
6691                                     (dev, &tag_resource, dev_flow, error))
6692                                         return errno;
6693                         dev_flow->dv.actions[actions_n++] =
6694                                 dev_flow->dv.tag_resource->action;
6695                         break;
6696                 case RTE_FLOW_ACTION_TYPE_MARK:
6697                         action_flags |= MLX5_FLOW_ACTION_MARK;
6698                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6699                                 const struct rte_flow_action_mark *mark =
6700                                         (const struct rte_flow_action_mark *)
6701                                                 actions->conf;
6702
6703                                 if (flow_dv_convert_action_mark(dev, mark,
6704                                                                 &mhdr_res,
6705                                                                 error))
6706                                         return -rte_errno;
6707                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6708                                 break;
6709                         }
6710                         /* Fall-through */
6711                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
6712                         /* Legacy (non-extensive) MARK action. */
6713                         tag_resource.tag = mlx5_flow_mark_set
6714                               (((const struct rte_flow_action_mark *)
6715                                (actions->conf))->id);
6716                         if (!dev_flow->dv.tag_resource)
6717                                 if (flow_dv_tag_resource_register
6718                                     (dev, &tag_resource, dev_flow, error))
6719                                         return errno;
6720                         dev_flow->dv.actions[actions_n++] =
6721                                 dev_flow->dv.tag_resource->action;
6722                         break;
6723                 case RTE_FLOW_ACTION_TYPE_SET_META:
6724                         if (flow_dv_convert_action_set_meta
6725                                 (dev, &mhdr_res, attr,
6726                                  (const struct rte_flow_action_set_meta *)
6727                                   actions->conf, error))
6728                                 return -rte_errno;
6729                         action_flags |= MLX5_FLOW_ACTION_SET_META;
6730                         break;
6731                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
6732                         if (flow_dv_convert_action_set_tag
6733                                 (dev, &mhdr_res,
6734                                  (const struct rte_flow_action_set_tag *)
6735                                   actions->conf, error))
6736                                 return -rte_errno;
6737                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6738                         break;
6739                 case RTE_FLOW_ACTION_TYPE_DROP:
6740                         action_flags |= MLX5_FLOW_ACTION_DROP;
6741                         break;
6742                 case RTE_FLOW_ACTION_TYPE_QUEUE:
6743                         assert(flow->rss.queue);
6744                         queue = actions->conf;
6745                         flow->rss.queue_num = 1;
6746                         (*flow->rss.queue)[0] = queue->index;
6747                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
6748                         break;
6749                 case RTE_FLOW_ACTION_TYPE_RSS:
6750                         assert(flow->rss.queue);
6751                         rss = actions->conf;
6752                         if (flow->rss.queue)
6753                                 memcpy((*flow->rss.queue), rss->queue,
6754                                        rss->queue_num * sizeof(uint16_t));
6755                         flow->rss.queue_num = rss->queue_num;
6756                         /* NULL RSS key indicates default RSS key. */
6757                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
6758                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
6759                         /*
6760                          * rss->level and rss.types should be set in advance
6761                          * when expanding items for RSS.
6762                          */
6763                         action_flags |= MLX5_FLOW_ACTION_RSS;
6764                         break;
6765                 case RTE_FLOW_ACTION_TYPE_COUNT:
6766                         if (!dev_conf->devx) {
6767                                 rte_errno = ENOTSUP;
6768                                 goto cnt_err;
6769                         }
6770                         flow->counter = flow_dv_counter_alloc(dev,
6771                                                               count->shared,
6772                                                               count->id,
6773                                                               dev_flow->group);
6774                         if (flow->counter == NULL)
6775                                 goto cnt_err;
6776                         dev_flow->dv.actions[actions_n++] =
6777                                 flow->counter->action;
6778                         action_flags |= MLX5_FLOW_ACTION_COUNT;
6779                         break;
6780 cnt_err:
6781                         if (rte_errno == ENOTSUP)
6782                                 return rte_flow_error_set
6783                                               (error, ENOTSUP,
6784                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6785                                                NULL,
6786                                                "count action not supported");
6787                         else
6788                                 return rte_flow_error_set
6789                                                 (error, rte_errno,
6790                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6791                                                  action,
6792                                                  "cannot create counter"
6793                                                   " object.");
6794                         break;
6795                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
6796                         dev_flow->dv.actions[actions_n++] =
6797                                                 priv->sh->pop_vlan_action;
6798                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
6799                         break;
6800                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
6801                         flow_dev_get_vlan_info_from_items(items, &vlan);
6802                         vlan.eth_proto = rte_be_to_cpu_16
6803                              ((((const struct rte_flow_action_of_push_vlan *)
6804                                                    actions->conf)->ethertype));
6805                         found_action = mlx5_flow_find_action
6806                                         (actions + 1,
6807                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
6808                         if (found_action)
6809                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6810                         found_action = mlx5_flow_find_action
6811                                         (actions + 1,
6812                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
6813                         if (found_action)
6814                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6815                         if (flow_dv_create_action_push_vlan
6816                                             (dev, attr, &vlan, dev_flow, error))
6817                                 return -rte_errno;
6818                         dev_flow->dv.actions[actions_n++] =
6819                                            dev_flow->dv.push_vlan_res->action;
6820                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
6821                         break;
6822                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
6823                         /* of_vlan_push action handled this action */
6824                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
6825                         break;
6826                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
6827                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6828                                 break;
6829                         flow_dev_get_vlan_info_from_items(items, &vlan);
6830                         mlx5_update_vlan_vid_pcp(actions, &vlan);
6831                         /* If no VLAN push - this is a modify header action */
6832                         if (flow_dv_convert_action_modify_vlan_vid
6833                                                 (&mhdr_res, actions, error))
6834                                 return -rte_errno;
6835                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
6836                         break;
6837                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
6838                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
6839                         if (flow_dv_create_action_l2_encap(dev, actions,
6840                                                            dev_flow,
6841                                                            attr->transfer,
6842                                                            error))
6843                                 return -rte_errno;
6844                         dev_flow->dv.actions[actions_n++] =
6845                                 dev_flow->dv.encap_decap->verbs_action;
6846                         action_flags |= actions->type ==
6847                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
6848                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
6849                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
6850                         break;
6851                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
6852                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
6853                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
6854                                                            attr->transfer,
6855                                                            error))
6856                                 return -rte_errno;
6857                         dev_flow->dv.actions[actions_n++] =
6858                                 dev_flow->dv.encap_decap->verbs_action;
6859                         action_flags |= actions->type ==
6860                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
6861                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
6862                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
6863                         break;
6864                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
6865                         /* Handle encap with preceding decap. */
6866                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
6867                                 if (flow_dv_create_action_raw_encap
6868                                         (dev, actions, dev_flow, attr, error))
6869                                         return -rte_errno;
6870                                 dev_flow->dv.actions[actions_n++] =
6871                                         dev_flow->dv.encap_decap->verbs_action;
6872                         } else {
6873                                 /* Handle encap without preceding decap. */
6874                                 if (flow_dv_create_action_l2_encap
6875                                     (dev, actions, dev_flow, attr->transfer,
6876                                      error))
6877                                         return -rte_errno;
6878                                 dev_flow->dv.actions[actions_n++] =
6879                                         dev_flow->dv.encap_decap->verbs_action;
6880                         }
6881                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
6882                         break;
6883                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
6884                         /* Check if this decap is followed by encap. */
6885                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
6886                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
6887                                action++) {
6888                         }
6889                         /* Handle decap only if it isn't followed by encap. */
6890                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
6891                                 if (flow_dv_create_action_l2_decap
6892                                     (dev, dev_flow, attr->transfer, error))
6893                                         return -rte_errno;
6894                                 dev_flow->dv.actions[actions_n++] =
6895                                         dev_flow->dv.encap_decap->verbs_action;
6896                         }
6897                         /* If decap is followed by encap, handle it at encap. */
6898                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
6899                         break;
6900                 case RTE_FLOW_ACTION_TYPE_JUMP:
6901                         jump_data = action->conf;
6902                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
6903                                                        jump_data->group, &table,
6904                                                        error);
6905                         if (ret)
6906                                 return ret;
6907                         tbl = flow_dv_tbl_resource_get(dev, table,
6908                                                        attr->egress,
6909                                                        attr->transfer, error);
6910                         if (!tbl)
6911                                 return rte_flow_error_set
6912                                                 (error, errno,
6913                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6914                                                  NULL,
6915                                                  "cannot create jump action.");
6916                         jump_tbl_resource.tbl = tbl;
6917                         if (flow_dv_jump_tbl_resource_register
6918                             (dev, &jump_tbl_resource, dev_flow, error)) {
6919                                 flow_dv_tbl_resource_release(dev, tbl);
6920                                 return rte_flow_error_set
6921                                                 (error, errno,
6922                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6923                                                  NULL,
6924                                                  "cannot create jump action.");
6925                         }
6926                         dev_flow->dv.actions[actions_n++] =
6927                                 dev_flow->dv.jump->action;
6928                         action_flags |= MLX5_FLOW_ACTION_JUMP;
6929                         break;
6930                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
6931                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
6932                         if (flow_dv_convert_action_modify_mac
6933                                         (&mhdr_res, actions, error))
6934                                 return -rte_errno;
6935                         action_flags |= actions->type ==
6936                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
6937                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
6938                                         MLX5_FLOW_ACTION_SET_MAC_DST;
6939                         break;
6940                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
6941                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
6942                         if (flow_dv_convert_action_modify_ipv4
6943                                         (&mhdr_res, actions, error))
6944                                 return -rte_errno;
6945                         action_flags |= actions->type ==
6946                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
6947                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
6948                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
6949                         break;
6950                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
6951                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
6952                         if (flow_dv_convert_action_modify_ipv6
6953                                         (&mhdr_res, actions, error))
6954                                 return -rte_errno;
6955                         action_flags |= actions->type ==
6956                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
6957                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
6958                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
6959                         break;
6960                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
6961                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
6962                         if (flow_dv_convert_action_modify_tp
6963                                         (&mhdr_res, actions, items,
6964                                          &flow_attr, error))
6965                                 return -rte_errno;
6966                         action_flags |= actions->type ==
6967                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
6968                                         MLX5_FLOW_ACTION_SET_TP_SRC :
6969                                         MLX5_FLOW_ACTION_SET_TP_DST;
6970                         break;
6971                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
6972                         if (flow_dv_convert_action_modify_dec_ttl
6973                                         (&mhdr_res, items, &flow_attr, error))
6974                                 return -rte_errno;
6975                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
6976                         break;
6977                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
6978                         if (flow_dv_convert_action_modify_ttl
6979                                         (&mhdr_res, actions, items,
6980                                          &flow_attr, error))
6981                                 return -rte_errno;
6982                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
6983                         break;
6984                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
6985                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
6986                         if (flow_dv_convert_action_modify_tcp_seq
6987                                         (&mhdr_res, actions, error))
6988                                 return -rte_errno;
6989                         action_flags |= actions->type ==
6990                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
6991                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
6992                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
6993                         break;
6994
6995                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
6996                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
6997                         if (flow_dv_convert_action_modify_tcp_ack
6998                                         (&mhdr_res, actions, error))
6999                                 return -rte_errno;
7000                         action_flags |= actions->type ==
7001                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7002                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7003                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7004                         break;
7005                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7006                         if (flow_dv_convert_action_set_reg
7007                                         (&mhdr_res, actions, error))
7008                                 return -rte_errno;
7009                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7010                         break;
7011                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7012                         if (flow_dv_convert_action_copy_mreg
7013                                         (dev, &mhdr_res, actions, error))
7014                                 return -rte_errno;
7015                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7016                         break;
7017                 case RTE_FLOW_ACTION_TYPE_METER:
7018                         mtr = actions->conf;
7019                         if (!flow->meter) {
7020                                 flow->meter = mlx5_flow_meter_attach(priv,
7021                                                         mtr->mtr_id, attr,
7022                                                         error);
7023                                 if (!flow->meter)
7024                                         return rte_flow_error_set(error,
7025                                                 rte_errno,
7026                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7027                                                 NULL,
7028                                                 "meter not found "
7029                                                 "or invalid parameters");
7030                         }
7031                         /* Set the meter action. */
7032                         dev_flow->dv.actions[actions_n++] =
7033                                 flow->meter->mfts->meter_action;
7034                         action_flags |= MLX5_FLOW_ACTION_METER;
7035                         break;
7036                 case RTE_FLOW_ACTION_TYPE_END:
7037                         actions_end = true;
7038                         if (mhdr_res.actions_num) {
7039                                 /* create modify action if needed. */
7040                                 if (flow_dv_modify_hdr_resource_register
7041                                         (dev, &mhdr_res, dev_flow, error))
7042                                         return -rte_errno;
7043                                 dev_flow->dv.actions[modify_action_position] =
7044                                         dev_flow->dv.modify_hdr->verbs_action;
7045                         }
7046                         break;
7047                 default:
7048                         break;
7049                 }
7050                 if (mhdr_res.actions_num &&
7051                     modify_action_position == UINT32_MAX)
7052                         modify_action_position = actions_n++;
7053         }
7054         dev_flow->dv.actions_n = actions_n;
7055         dev_flow->actions = action_flags;
7056         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7057                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7058                 int item_type = items->type;
7059
7060                 switch (item_type) {
7061                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7062                         flow_dv_translate_item_port_id(dev, match_mask,
7063                                                        match_value, items);
7064                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7065                         break;
7066                 case RTE_FLOW_ITEM_TYPE_ETH:
7067                         flow_dv_translate_item_eth(match_mask, match_value,
7068                                                    items, tunnel);
7069                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7070                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7071                                              MLX5_FLOW_LAYER_OUTER_L2;
7072                         break;
7073                 case RTE_FLOW_ITEM_TYPE_VLAN:
7074                         flow_dv_translate_item_vlan(dev_flow,
7075                                                     match_mask, match_value,
7076                                                     items, tunnel);
7077                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7078                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7079                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7080                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7081                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7082                         break;
7083                 case RTE_FLOW_ITEM_TYPE_IPV4:
7084                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7085                                                   &item_flags, &tunnel);
7086                         flow_dv_translate_item_ipv4(match_mask, match_value,
7087                                                     items, tunnel,
7088                                                     dev_flow->group);
7089                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7090                         dev_flow->hash_fields |=
7091                                 mlx5_flow_hashfields_adjust
7092                                         (dev_flow, tunnel,
7093                                          MLX5_IPV4_LAYER_TYPES,
7094                                          MLX5_IPV4_IBV_RX_HASH);
7095                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7096                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7097                         if (items->mask != NULL &&
7098                             ((const struct rte_flow_item_ipv4 *)
7099                              items->mask)->hdr.next_proto_id) {
7100                                 next_protocol =
7101                                         ((const struct rte_flow_item_ipv4 *)
7102                                          (items->spec))->hdr.next_proto_id;
7103                                 next_protocol &=
7104                                         ((const struct rte_flow_item_ipv4 *)
7105                                          (items->mask))->hdr.next_proto_id;
7106                         } else {
7107                                 /* Reset for inner layer. */
7108                                 next_protocol = 0xff;
7109                         }
7110                         break;
7111                 case RTE_FLOW_ITEM_TYPE_IPV6:
7112                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7113                                                   &item_flags, &tunnel);
7114                         flow_dv_translate_item_ipv6(match_mask, match_value,
7115                                                     items, tunnel,
7116                                                     dev_flow->group);
7117                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7118                         dev_flow->hash_fields |=
7119                                 mlx5_flow_hashfields_adjust
7120                                         (dev_flow, tunnel,
7121                                          MLX5_IPV6_LAYER_TYPES,
7122                                          MLX5_IPV6_IBV_RX_HASH);
7123                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7124                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7125                         if (items->mask != NULL &&
7126                             ((const struct rte_flow_item_ipv6 *)
7127                              items->mask)->hdr.proto) {
7128                                 next_protocol =
7129                                         ((const struct rte_flow_item_ipv6 *)
7130                                          items->spec)->hdr.proto;
7131                                 next_protocol &=
7132                                         ((const struct rte_flow_item_ipv6 *)
7133                                          items->mask)->hdr.proto;
7134                         } else {
7135                                 /* Reset for inner layer. */
7136                                 next_protocol = 0xff;
7137                         }
7138                         break;
7139                 case RTE_FLOW_ITEM_TYPE_TCP:
7140                         flow_dv_translate_item_tcp(match_mask, match_value,
7141                                                    items, tunnel);
7142                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7143                         dev_flow->hash_fields |=
7144                                 mlx5_flow_hashfields_adjust
7145                                         (dev_flow, tunnel, ETH_RSS_TCP,
7146                                          IBV_RX_HASH_SRC_PORT_TCP |
7147                                          IBV_RX_HASH_DST_PORT_TCP);
7148                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7149                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7150                         break;
7151                 case RTE_FLOW_ITEM_TYPE_UDP:
7152                         flow_dv_translate_item_udp(match_mask, match_value,
7153                                                    items, tunnel);
7154                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7155                         dev_flow->hash_fields |=
7156                                 mlx5_flow_hashfields_adjust
7157                                         (dev_flow, tunnel, ETH_RSS_UDP,
7158                                          IBV_RX_HASH_SRC_PORT_UDP |
7159                                          IBV_RX_HASH_DST_PORT_UDP);
7160                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7161                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7162                         break;
7163                 case RTE_FLOW_ITEM_TYPE_GRE:
7164                         flow_dv_translate_item_gre(match_mask, match_value,
7165                                                    items, tunnel);
7166                         last_item = MLX5_FLOW_LAYER_GRE;
7167                         break;
7168                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7169                         flow_dv_translate_item_gre_key(match_mask,
7170                                                        match_value, items);
7171                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7172                         break;
7173                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7174                         flow_dv_translate_item_nvgre(match_mask, match_value,
7175                                                      items, tunnel);
7176                         last_item = MLX5_FLOW_LAYER_GRE;
7177                         break;
7178                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7179                         flow_dv_translate_item_vxlan(match_mask, match_value,
7180                                                      items, tunnel);
7181                         last_item = MLX5_FLOW_LAYER_VXLAN;
7182                         break;
7183                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7184                         flow_dv_translate_item_vxlan(match_mask, match_value,
7185                                                      items, tunnel);
7186                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7187                         break;
7188                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7189                         flow_dv_translate_item_geneve(match_mask, match_value,
7190                                                       items, tunnel);
7191                         last_item = MLX5_FLOW_LAYER_GENEVE;
7192                         break;
7193                 case RTE_FLOW_ITEM_TYPE_MPLS:
7194                         flow_dv_translate_item_mpls(match_mask, match_value,
7195                                                     items, last_item, tunnel);
7196                         last_item = MLX5_FLOW_LAYER_MPLS;
7197                         break;
7198                 case RTE_FLOW_ITEM_TYPE_MARK:
7199                         flow_dv_translate_item_mark(dev, match_mask,
7200                                                     match_value, items);
7201                         last_item = MLX5_FLOW_ITEM_MARK;
7202                         break;
7203                 case RTE_FLOW_ITEM_TYPE_META:
7204                         flow_dv_translate_item_meta(dev, match_mask,
7205                                                     match_value, attr, items);
7206                         last_item = MLX5_FLOW_ITEM_METADATA;
7207                         break;
7208                 case RTE_FLOW_ITEM_TYPE_ICMP:
7209                         flow_dv_translate_item_icmp(match_mask, match_value,
7210                                                     items, tunnel);
7211                         last_item = MLX5_FLOW_LAYER_ICMP;
7212                         break;
7213                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7214                         flow_dv_translate_item_icmp6(match_mask, match_value,
7215                                                       items, tunnel);
7216                         last_item = MLX5_FLOW_LAYER_ICMP6;
7217                         break;
7218                 case RTE_FLOW_ITEM_TYPE_TAG:
7219                         flow_dv_translate_item_tag(dev, match_mask,
7220                                                    match_value, items);
7221                         last_item = MLX5_FLOW_ITEM_TAG;
7222                         break;
7223                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7224                         flow_dv_translate_mlx5_item_tag(match_mask,
7225                                                         match_value, items);
7226                         last_item = MLX5_FLOW_ITEM_TAG;
7227                         break;
7228                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7229                         flow_dv_translate_item_tx_queue(dev, match_mask,
7230                                                         match_value,
7231                                                         items);
7232                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7233                         break;
7234                 default:
7235                         break;
7236                 }
7237                 item_flags |= last_item;
7238         }
7239         /*
7240          * In case of ingress traffic when E-Switch mode is enabled,
7241          * we have two cases where we need to set the source port manually.
7242          * The first one, is in case of Nic steering rule, and the second is
7243          * E-Switch rule where no port_id item was found. In both cases
7244          * the source port is set according the current port in use.
7245          */
7246         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7247             (priv->representor || priv->master)) {
7248                 if (flow_dv_translate_item_port_id(dev, match_mask,
7249                                                    match_value, NULL))
7250                         return -rte_errno;
7251         }
7252         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7253                                          dev_flow->dv.value.buf));
7254         dev_flow->layers = item_flags;
7255         /* Register matcher. */
7256         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7257                                     matcher.mask.size);
7258         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7259                                                      matcher.priority);
7260         matcher.egress = attr->egress;
7261         matcher.group = dev_flow->group;
7262         matcher.transfer = attr->transfer;
7263         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
7264                 return -rte_errno;
7265         return 0;
7266 }
7267
7268 /**
7269  * Apply the flow to the NIC, lock free,
7270  * (mutex should be acquired by caller).
7271  *
7272  * @param[in] dev
7273  *   Pointer to the Ethernet device structure.
7274  * @param[in, out] flow
7275  *   Pointer to flow structure.
7276  * @param[out] error
7277  *   Pointer to error structure.
7278  *
7279  * @return
7280  *   0 on success, a negative errno value otherwise and rte_errno is set.
7281  */
7282 static int
7283 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7284                 struct rte_flow_error *error)
7285 {
7286         struct mlx5_flow_dv *dv;
7287         struct mlx5_flow *dev_flow;
7288         struct mlx5_priv *priv = dev->data->dev_private;
7289         int n;
7290         int err;
7291
7292         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7293                 dv = &dev_flow->dv;
7294                 n = dv->actions_n;
7295                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7296                         if (dev_flow->transfer) {
7297                                 dv->actions[n++] = priv->sh->esw_drop_action;
7298                         } else {
7299                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7300                                 if (!dv->hrxq) {
7301                                         rte_flow_error_set
7302                                                 (error, errno,
7303                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7304                                                  NULL,
7305                                                  "cannot get drop hash queue");
7306                                         goto error;
7307                                 }
7308                                 dv->actions[n++] = dv->hrxq->action;
7309                         }
7310                 } else if (dev_flow->actions &
7311                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7312                         struct mlx5_hrxq *hrxq;
7313
7314                         assert(flow->rss.queue);
7315                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7316                                              MLX5_RSS_HASH_KEY_LEN,
7317                                              dev_flow->hash_fields,
7318                                              (*flow->rss.queue),
7319                                              flow->rss.queue_num);
7320                         if (!hrxq) {
7321                                 hrxq = mlx5_hrxq_new
7322                                         (dev, flow->rss.key,
7323                                          MLX5_RSS_HASH_KEY_LEN,
7324                                          dev_flow->hash_fields,
7325                                          (*flow->rss.queue),
7326                                          flow->rss.queue_num,
7327                                          !!(dev_flow->layers &
7328                                             MLX5_FLOW_LAYER_TUNNEL));
7329                         }
7330                         if (!hrxq) {
7331                                 rte_flow_error_set
7332                                         (error, rte_errno,
7333                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7334                                          "cannot get hash queue");
7335                                 goto error;
7336                         }
7337                         dv->hrxq = hrxq;
7338                         dv->actions[n++] = dv->hrxq->action;
7339                 }
7340                 dv->flow =
7341                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7342                                                   (void *)&dv->value, n,
7343                                                   dv->actions);
7344                 if (!dv->flow) {
7345                         rte_flow_error_set(error, errno,
7346                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7347                                            NULL,
7348                                            "hardware refuses to create flow");
7349                         goto error;
7350                 }
7351                 if (priv->vmwa_context &&
7352                     dev_flow->dv.vf_vlan.tag &&
7353                     !dev_flow->dv.vf_vlan.created) {
7354                         /*
7355                          * The rule contains the VLAN pattern.
7356                          * For VF we are going to create VLAN
7357                          * interface to make hypervisor set correct
7358                          * e-Switch vport context.
7359                          */
7360                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7361                 }
7362         }
7363         return 0;
7364 error:
7365         err = rte_errno; /* Save rte_errno before cleanup. */
7366         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7367                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7368                 if (dv->hrxq) {
7369                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7370                                 mlx5_hrxq_drop_release(dev);
7371                         else
7372                                 mlx5_hrxq_release(dev, dv->hrxq);
7373                         dv->hrxq = NULL;
7374                 }
7375                 if (dev_flow->dv.vf_vlan.tag &&
7376                     dev_flow->dv.vf_vlan.created)
7377                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7378         }
7379         rte_errno = err; /* Restore rte_errno. */
7380         return -rte_errno;
7381 }
7382
7383 /**
7384  * Release the flow matcher.
7385  *
7386  * @param dev
7387  *   Pointer to Ethernet device.
7388  * @param flow
7389  *   Pointer to mlx5_flow.
7390  *
7391  * @return
7392  *   1 while a reference on it exists, 0 when freed.
7393  */
7394 static int
7395 flow_dv_matcher_release(struct rte_eth_dev *dev,
7396                         struct mlx5_flow *flow)
7397 {
7398         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7399         struct mlx5_priv *priv = dev->data->dev_private;
7400         struct mlx5_ibv_shared *sh = priv->sh;
7401         struct mlx5_flow_tbl_data_entry *tbl_data;
7402
7403         assert(matcher->matcher_object);
7404         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7405                 dev->data->port_id, (void *)matcher,
7406                 rte_atomic32_read(&matcher->refcnt));
7407         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7408                 struct mlx5_hlist_entry *pos;
7409                 union mlx5_flow_tbl_key table_key = {
7410                         {
7411                                 .table_id = matcher->group,
7412                                 .reserved = 0,
7413                                 .domain = !!matcher->transfer,
7414                                 .direction = !!matcher->egress,
7415                         }
7416                 };
7417                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7418                            (matcher->matcher_object));
7419                 LIST_REMOVE(matcher, next);
7420                 pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
7421                 if (pos) {
7422                         tbl_data = container_of(pos,
7423                                 struct mlx5_flow_tbl_data_entry, entry);
7424                         flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7425                 }
7426                 rte_free(matcher);
7427                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7428                         dev->data->port_id, (void *)matcher);
7429                 return 0;
7430         }
7431         return 1;
7432 }
7433
7434 /**
7435  * Release an encap/decap resource.
7436  *
7437  * @param flow
7438  *   Pointer to mlx5_flow.
7439  *
7440  * @return
7441  *   1 while a reference on it exists, 0 when freed.
7442  */
7443 static int
7444 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7445 {
7446         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7447                                                 flow->dv.encap_decap;
7448
7449         assert(cache_resource->verbs_action);
7450         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7451                 (void *)cache_resource,
7452                 rte_atomic32_read(&cache_resource->refcnt));
7453         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7454                 claim_zero(mlx5_glue->destroy_flow_action
7455                                 (cache_resource->verbs_action));
7456                 LIST_REMOVE(cache_resource, next);
7457                 rte_free(cache_resource);
7458                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7459                         (void *)cache_resource);
7460                 return 0;
7461         }
7462         return 1;
7463 }
7464
7465 /**
7466  * Release an jump to table action resource.
7467  *
7468  * @param dev
7469  *   Pointer to Ethernet device.
7470  * @param flow
7471  *   Pointer to mlx5_flow.
7472  *
7473  * @return
7474  *   1 while a reference on it exists, 0 when freed.
7475  */
7476 static int
7477 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7478                                   struct mlx5_flow *flow)
7479 {
7480         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
7481                                                 flow->dv.jump;
7482
7483         assert(cache_resource->action);
7484         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7485                 (void *)cache_resource,
7486                 rte_atomic32_read(&cache_resource->refcnt));
7487         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7488                 claim_zero(mlx5_glue->destroy_flow_action
7489                                 (cache_resource->action));
7490                 LIST_REMOVE(cache_resource, next);
7491                 flow_dv_tbl_resource_release(dev, cache_resource->tbl);
7492                 rte_free(cache_resource);
7493                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7494                         (void *)cache_resource);
7495                 return 0;
7496         }
7497         return 1;
7498 }
7499
7500 /**
7501  * Release a modify-header resource.
7502  *
7503  * @param flow
7504  *   Pointer to mlx5_flow.
7505  *
7506  * @return
7507  *   1 while a reference on it exists, 0 when freed.
7508  */
7509 static int
7510 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7511 {
7512         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7513                                                 flow->dv.modify_hdr;
7514
7515         assert(cache_resource->verbs_action);
7516         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7517                 (void *)cache_resource,
7518                 rte_atomic32_read(&cache_resource->refcnt));
7519         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7520                 claim_zero(mlx5_glue->destroy_flow_action
7521                                 (cache_resource->verbs_action));
7522                 LIST_REMOVE(cache_resource, next);
7523                 rte_free(cache_resource);
7524                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7525                         (void *)cache_resource);
7526                 return 0;
7527         }
7528         return 1;
7529 }
7530
7531 /**
7532  * Release port ID action resource.
7533  *
7534  * @param flow
7535  *   Pointer to mlx5_flow.
7536  *
7537  * @return
7538  *   1 while a reference on it exists, 0 when freed.
7539  */
7540 static int
7541 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7542 {
7543         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7544                 flow->dv.port_id_action;
7545
7546         assert(cache_resource->action);
7547         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7548                 (void *)cache_resource,
7549                 rte_atomic32_read(&cache_resource->refcnt));
7550         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7551                 claim_zero(mlx5_glue->destroy_flow_action
7552                                 (cache_resource->action));
7553                 LIST_REMOVE(cache_resource, next);
7554                 rte_free(cache_resource);
7555                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7556                         (void *)cache_resource);
7557                 return 0;
7558         }
7559         return 1;
7560 }
7561
7562 /**
7563  * Release push vlan action resource.
7564  *
7565  * @param flow
7566  *   Pointer to mlx5_flow.
7567  *
7568  * @return
7569  *   1 while a reference on it exists, 0 when freed.
7570  */
7571 static int
7572 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7573 {
7574         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7575                 flow->dv.push_vlan_res;
7576
7577         assert(cache_resource->action);
7578         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7579                 (void *)cache_resource,
7580                 rte_atomic32_read(&cache_resource->refcnt));
7581         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7582                 claim_zero(mlx5_glue->destroy_flow_action
7583                                 (cache_resource->action));
7584                 LIST_REMOVE(cache_resource, next);
7585                 rte_free(cache_resource);
7586                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7587                         (void *)cache_resource);
7588                 return 0;
7589         }
7590         return 1;
7591 }
7592
7593 /**
7594  * Remove the flow from the NIC but keeps it in memory.
7595  * Lock free, (mutex should be acquired by caller).
7596  *
7597  * @param[in] dev
7598  *   Pointer to Ethernet device.
7599  * @param[in, out] flow
7600  *   Pointer to flow structure.
7601  */
7602 static void
7603 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7604 {
7605         struct mlx5_flow_dv *dv;
7606         struct mlx5_flow *dev_flow;
7607
7608         if (!flow)
7609                 return;
7610         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7611                 dv = &dev_flow->dv;
7612                 if (dv->flow) {
7613                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7614                         dv->flow = NULL;
7615                 }
7616                 if (dv->hrxq) {
7617                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7618                                 mlx5_hrxq_drop_release(dev);
7619                         else
7620                                 mlx5_hrxq_release(dev, dv->hrxq);
7621                         dv->hrxq = NULL;
7622                 }
7623                 if (dev_flow->dv.vf_vlan.tag &&
7624                     dev_flow->dv.vf_vlan.created)
7625                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7626         }
7627 }
7628
7629 /**
7630  * Remove the flow from the NIC and the memory.
7631  * Lock free, (mutex should be acquired by caller).
7632  *
7633  * @param[in] dev
7634  *   Pointer to the Ethernet device structure.
7635  * @param[in, out] flow
7636  *   Pointer to flow structure.
7637  */
7638 static void
7639 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7640 {
7641         struct mlx5_flow *dev_flow;
7642
7643         if (!flow)
7644                 return;
7645         __flow_dv_remove(dev, flow);
7646         if (flow->counter) {
7647                 flow_dv_counter_release(dev, flow->counter);
7648                 flow->counter = NULL;
7649         }
7650         if (flow->meter) {
7651                 mlx5_flow_meter_detach(flow->meter);
7652                 flow->meter = NULL;
7653         }
7654         while (!LIST_EMPTY(&flow->dev_flows)) {
7655                 dev_flow = LIST_FIRST(&flow->dev_flows);
7656                 LIST_REMOVE(dev_flow, next);
7657                 if (dev_flow->dv.matcher)
7658                         flow_dv_matcher_release(dev, dev_flow);
7659                 if (dev_flow->dv.encap_decap)
7660                         flow_dv_encap_decap_resource_release(dev_flow);
7661                 if (dev_flow->dv.modify_hdr)
7662                         flow_dv_modify_hdr_resource_release(dev_flow);
7663                 if (dev_flow->dv.jump)
7664                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
7665                 if (dev_flow->dv.port_id_action)
7666                         flow_dv_port_id_action_resource_release(dev_flow);
7667                 if (dev_flow->dv.push_vlan_res)
7668                         flow_dv_push_vlan_action_resource_release(dev_flow);
7669                 if (dev_flow->dv.tag_resource)
7670                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
7671                 rte_free(dev_flow);
7672         }
7673 }
7674
7675 /**
7676  * Query a dv flow  rule for its statistics via devx.
7677  *
7678  * @param[in] dev
7679  *   Pointer to Ethernet device.
7680  * @param[in] flow
7681  *   Pointer to the sub flow.
7682  * @param[out] data
7683  *   data retrieved by the query.
7684  * @param[out] error
7685  *   Perform verbose error reporting if not NULL.
7686  *
7687  * @return
7688  *   0 on success, a negative errno value otherwise and rte_errno is set.
7689  */
7690 static int
7691 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
7692                     void *data, struct rte_flow_error *error)
7693 {
7694         struct mlx5_priv *priv = dev->data->dev_private;
7695         struct rte_flow_query_count *qc = data;
7696
7697         if (!priv->config.devx)
7698                 return rte_flow_error_set(error, ENOTSUP,
7699                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7700                                           NULL,
7701                                           "counters are not supported");
7702         if (flow->counter) {
7703                 uint64_t pkts, bytes;
7704                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
7705                                                &bytes);
7706
7707                 if (err)
7708                         return rte_flow_error_set(error, -err,
7709                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7710                                         NULL, "cannot read counters");
7711                 qc->hits_set = 1;
7712                 qc->bytes_set = 1;
7713                 qc->hits = pkts - flow->counter->hits;
7714                 qc->bytes = bytes - flow->counter->bytes;
7715                 if (qc->reset) {
7716                         flow->counter->hits = pkts;
7717                         flow->counter->bytes = bytes;
7718                 }
7719                 return 0;
7720         }
7721         return rte_flow_error_set(error, EINVAL,
7722                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7723                                   NULL,
7724                                   "counters are not available");
7725 }
7726
7727 /**
7728  * Query a flow.
7729  *
7730  * @see rte_flow_query()
7731  * @see rte_flow_ops
7732  */
7733 static int
7734 flow_dv_query(struct rte_eth_dev *dev,
7735               struct rte_flow *flow __rte_unused,
7736               const struct rte_flow_action *actions __rte_unused,
7737               void *data __rte_unused,
7738               struct rte_flow_error *error __rte_unused)
7739 {
7740         int ret = -EINVAL;
7741
7742         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7743                 switch (actions->type) {
7744                 case RTE_FLOW_ACTION_TYPE_VOID:
7745                         break;
7746                 case RTE_FLOW_ACTION_TYPE_COUNT:
7747                         ret = flow_dv_query_count(dev, flow, data, error);
7748                         break;
7749                 default:
7750                         return rte_flow_error_set(error, ENOTSUP,
7751                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7752                                                   actions,
7753                                                   "action not supported");
7754                 }
7755         }
7756         return ret;
7757 }
7758
7759 /**
7760  * Destroy the meter table set.
7761  * Lock free, (mutex should be acquired by caller).
7762  *
7763  * @param[in] dev
7764  *   Pointer to Ethernet device.
7765  * @param[in] tbl
7766  *   Pointer to the meter table set.
7767  *
7768  * @return
7769  *   Always 0.
7770  */
7771 static int
7772 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
7773                         struct mlx5_meter_domains_infos *tbl)
7774 {
7775         struct mlx5_priv *priv = dev->data->dev_private;
7776         struct mlx5_meter_domains_infos *mtd =
7777                                 (struct mlx5_meter_domains_infos *)tbl;
7778
7779         if (!mtd || !priv->config.dv_flow_en)
7780                 return 0;
7781         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
7782                 claim_zero(mlx5_glue->dv_destroy_flow
7783                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
7784         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
7785                 claim_zero(mlx5_glue->dv_destroy_flow
7786                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
7787         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
7788                 claim_zero(mlx5_glue->dv_destroy_flow
7789                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
7790         if (mtd->egress.color_matcher)
7791                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7792                           (mtd->egress.color_matcher));
7793         if (mtd->egress.any_matcher)
7794                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7795                           (mtd->egress.any_matcher));
7796         if (mtd->egress.tbl)
7797                 claim_zero(flow_dv_tbl_resource_release(dev,
7798                                                         mtd->egress.tbl));
7799         if (mtd->ingress.color_matcher)
7800                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7801                           (mtd->ingress.color_matcher));
7802         if (mtd->ingress.any_matcher)
7803                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7804                           (mtd->ingress.any_matcher));
7805         if (mtd->ingress.tbl)
7806                 claim_zero(flow_dv_tbl_resource_release(dev,
7807                                                         mtd->ingress.tbl));
7808         if (mtd->transfer.color_matcher)
7809                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7810                           (mtd->transfer.color_matcher));
7811         if (mtd->transfer.any_matcher)
7812                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7813                           (mtd->transfer.any_matcher));
7814         if (mtd->transfer.tbl)
7815                 claim_zero(flow_dv_tbl_resource_release(dev,
7816                                                         mtd->transfer.tbl));
7817         if (mtd->drop_actn)
7818                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
7819         rte_free(mtd);
7820         return 0;
7821 }
7822
7823 /* Number of meter flow actions, count and jump or count and drop. */
7824 #define METER_ACTIONS 2
7825
7826 /**
7827  * Create specify domain meter table and suffix table.
7828  *
7829  * @param[in] dev
7830  *   Pointer to Ethernet device.
7831  * @param[in,out] mtb
7832  *   Pointer to DV meter table set.
7833  * @param[in] egress
7834  *   Table attribute.
7835  * @param[in] transfer
7836  *   Table attribute.
7837  * @param[in] color_reg_c_idx
7838  *   Reg C index for color match.
7839  *
7840  * @return
7841  *   0 on success, -1 otherwise and rte_errno is set.
7842  */
7843 static int
7844 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
7845                            struct mlx5_meter_domains_infos *mtb,
7846                            uint8_t egress, uint8_t transfer,
7847                            uint32_t color_reg_c_idx)
7848 {
7849         struct mlx5_priv *priv = dev->data->dev_private;
7850         struct mlx5_ibv_shared *sh = priv->sh;
7851         struct mlx5_flow_dv_match_params mask = {
7852                 .size = sizeof(mask.buf),
7853         };
7854         struct mlx5_flow_dv_match_params value = {
7855                 .size = sizeof(value.buf),
7856         };
7857         struct mlx5dv_flow_matcher_attr dv_attr = {
7858                 .type = IBV_FLOW_ATTR_NORMAL,
7859                 .priority = 0,
7860                 .match_criteria_enable = 0,
7861                 .match_mask = (void *)&mask,
7862         };
7863         void *actions[METER_ACTIONS];
7864         struct mlx5_flow_tbl_resource **sfx_tbl;
7865         struct mlx5_meter_domain_info *dtb;
7866         struct rte_flow_error error;
7867         int i = 0;
7868
7869         if (transfer) {
7870                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
7871                 dtb = &mtb->transfer;
7872         } else if (egress) {
7873                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
7874                 dtb = &mtb->egress;
7875         } else {
7876                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
7877                 dtb = &mtb->ingress;
7878         }
7879         /* If the suffix table in missing, create it. */
7880         if (!(*sfx_tbl)) {
7881                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
7882                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
7883                                                 egress, transfer, &error);
7884                 if (!(*sfx_tbl)) {
7885                         DRV_LOG(ERR, "Failed to create meter suffix table.");
7886                         return -1;
7887                 }
7888         }
7889         /* Create the meter table with METER level. */
7890         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
7891                                             egress, transfer, &error);
7892         if (!dtb->tbl) {
7893                 DRV_LOG(ERR, "Failed to create meter policer table.");
7894                 return -1;
7895         }
7896         /* Create matchers, Any and Color. */
7897         dv_attr.priority = 3;
7898         dv_attr.match_criteria_enable = 0;
7899         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7900                                                              &dv_attr,
7901                                                              dtb->tbl->obj);
7902         if (!dtb->any_matcher) {
7903                 DRV_LOG(ERR, "Failed to create meter"
7904                              " policer default matcher.");
7905                 goto error_exit;
7906         }
7907         dv_attr.priority = 0;
7908         dv_attr.match_criteria_enable =
7909                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7910         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
7911                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
7912         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7913                                                                &dv_attr,
7914                                                                dtb->tbl->obj);
7915         if (!dtb->color_matcher) {
7916                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
7917                 goto error_exit;
7918         }
7919         if (mtb->count_actns[RTE_MTR_DROPPED])
7920                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
7921         actions[i++] = mtb->drop_actn;
7922         /* Default rule: lowest priority, match any, actions: drop. */
7923         dtb->policer_rules[RTE_MTR_DROPPED] =
7924                         mlx5_glue->dv_create_flow(dtb->any_matcher,
7925                                                  (void *)&value, i, actions);
7926         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
7927                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
7928                 goto error_exit;
7929         }
7930         return 0;
7931 error_exit:
7932         return -1;
7933 }
7934
7935 /**
7936  * Create the needed meter and suffix tables.
7937  * Lock free, (mutex should be acquired by caller).
7938  *
7939  * @param[in] dev
7940  *   Pointer to Ethernet device.
7941  * @param[in] fm
7942  *   Pointer to the flow meter.
7943  *
7944  * @return
7945  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
7946  */
7947 static struct mlx5_meter_domains_infos *
7948 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
7949                        const struct mlx5_flow_meter *fm)
7950 {
7951         struct mlx5_priv *priv = dev->data->dev_private;
7952         struct mlx5_meter_domains_infos *mtb;
7953         int ret;
7954         int i;
7955
7956         if (!priv->mtr_en) {
7957                 rte_errno = ENOTSUP;
7958                 return NULL;
7959         }
7960         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
7961         if (!mtb) {
7962                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
7963                 return NULL;
7964         }
7965         /* Create meter count actions */
7966         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
7967                 if (!fm->policer_stats.cnt[i])
7968                         continue;
7969                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
7970         }
7971         /* Create drop action. */
7972         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
7973         if (!mtb->drop_actn) {
7974                 DRV_LOG(ERR, "Failed to create drop action.");
7975                 goto error_exit;
7976         }
7977         /* Egress meter table. */
7978         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
7979         if (ret) {
7980                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
7981                 goto error_exit;
7982         }
7983         /* Ingress meter table. */
7984         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
7985         if (ret) {
7986                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
7987                 goto error_exit;
7988         }
7989         /* FDB meter table. */
7990         if (priv->config.dv_esw_en) {
7991                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
7992                                                  priv->mtr_color_reg);
7993                 if (ret) {
7994                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
7995                         goto error_exit;
7996                 }
7997         }
7998         return mtb;
7999 error_exit:
8000         flow_dv_destroy_mtr_tbl(dev, mtb);
8001         return NULL;
8002 }
8003
8004 /**
8005  * Destroy domain policer rule.
8006  *
8007  * @param[in] dt
8008  *   Pointer to domain table.
8009  */
8010 static void
8011 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8012 {
8013         int i;
8014
8015         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8016                 if (dt->policer_rules[i]) {
8017                         claim_zero(mlx5_glue->dv_destroy_flow
8018                                   (dt->policer_rules[i]));
8019                         dt->policer_rules[i] = NULL;
8020                 }
8021         }
8022         if (dt->jump_actn) {
8023                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8024                 dt->jump_actn = NULL;
8025         }
8026 }
8027
8028 /**
8029  * Destroy policer rules.
8030  *
8031  * @param[in] dev
8032  *   Pointer to Ethernet device.
8033  * @param[in] fm
8034  *   Pointer to flow meter structure.
8035  * @param[in] attr
8036  *   Pointer to flow attributes.
8037  *
8038  * @return
8039  *   Always 0.
8040  */
8041 static int
8042 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8043                               const struct mlx5_flow_meter *fm,
8044                               const struct rte_flow_attr *attr)
8045 {
8046         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8047
8048         if (!mtb)
8049                 return 0;
8050         if (attr->egress)
8051                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8052         if (attr->ingress)
8053                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8054         if (attr->transfer)
8055                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8056         return 0;
8057 }
8058
8059 /**
8060  * Create specify domain meter policer rule.
8061  *
8062  * @param[in] fm
8063  *   Pointer to flow meter structure.
8064  * @param[in] mtb
8065  *   Pointer to DV meter table set.
8066  * @param[in] sfx_tb
8067  *   Pointer to suffix table.
8068  * @param[in] mtr_reg_c
8069  *   Color match REG_C.
8070  *
8071  * @return
8072  *   0 on success, -1 otherwise.
8073  */
8074 static int
8075 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8076                                     struct mlx5_meter_domain_info *dtb,
8077                                     struct mlx5_flow_tbl_resource *sfx_tb,
8078                                     uint8_t mtr_reg_c)
8079 {
8080         struct mlx5_flow_dv_match_params matcher = {
8081                 .size = sizeof(matcher.buf),
8082         };
8083         struct mlx5_flow_dv_match_params value = {
8084                 .size = sizeof(value.buf),
8085         };
8086         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8087         void *actions[METER_ACTIONS];
8088         int i;
8089
8090         /* Create jump action. */
8091         if (!sfx_tb)
8092                 return -1;
8093         if (!dtb->jump_actn)
8094                 dtb->jump_actn =
8095                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8096                                                         (sfx_tb->obj);
8097         if (!dtb->jump_actn) {
8098                 DRV_LOG(ERR, "Failed to create policer jump action.");
8099                 goto error;
8100         }
8101         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8102                 int j = 0;
8103
8104                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8105                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8106                 if (mtb->count_actns[i])
8107                         actions[j++] = mtb->count_actns[i];
8108                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8109                         actions[j++] = mtb->drop_actn;
8110                 else
8111                         actions[j++] = dtb->jump_actn;
8112                 dtb->policer_rules[i] =
8113                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8114                                                  (void *)&value,
8115                                                   j, actions);
8116                 if (!dtb->policer_rules[i]) {
8117                         DRV_LOG(ERR, "Failed to create policer rule.");
8118                         goto error;
8119                 }
8120         }
8121         return 0;
8122 error:
8123         rte_errno = errno;
8124         return -1;
8125 }
8126
8127 /**
8128  * Create policer rules.
8129  *
8130  * @param[in] dev
8131  *   Pointer to Ethernet device.
8132  * @param[in] fm
8133  *   Pointer to flow meter structure.
8134  * @param[in] attr
8135  *   Pointer to flow attributes.
8136  *
8137  * @return
8138  *   0 on success, -1 otherwise.
8139  */
8140 static int
8141 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8142                              struct mlx5_flow_meter *fm,
8143                              const struct rte_flow_attr *attr)
8144 {
8145         struct mlx5_priv *priv = dev->data->dev_private;
8146         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8147         int ret;
8148
8149         if (attr->egress) {
8150                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8151                                                 priv->sh->tx_mtr_sfx_tbl,
8152                                                 priv->mtr_color_reg);
8153                 if (ret) {
8154                         DRV_LOG(ERR, "Failed to create egress policer.");
8155                         goto error;
8156                 }
8157         }
8158         if (attr->ingress) {
8159                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8160                                                 priv->sh->rx_mtr_sfx_tbl,
8161                                                 priv->mtr_color_reg);
8162                 if (ret) {
8163                         DRV_LOG(ERR, "Failed to create ingress policer.");
8164                         goto error;
8165                 }
8166         }
8167         if (attr->transfer) {
8168                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8169                                                 priv->sh->fdb_mtr_sfx_tbl,
8170                                                 priv->mtr_color_reg);
8171                 if (ret) {
8172                         DRV_LOG(ERR, "Failed to create transfer policer.");
8173                         goto error;
8174                 }
8175         }
8176         return 0;
8177 error:
8178         flow_dv_destroy_policer_rules(dev, fm, attr);
8179         return -1;
8180 }
8181
8182 /**
8183  * Query a devx counter.
8184  *
8185  * @param[in] dev
8186  *   Pointer to the Ethernet device structure.
8187  * @param[in] cnt
8188  *   Pointer to the flow counter.
8189  * @param[in] clear
8190  *   Set to clear the counter statistics.
8191  * @param[out] pkts
8192  *   The statistics value of packets.
8193  * @param[out] bytes
8194  *   The statistics value of bytes.
8195  *
8196  * @return
8197  *   0 on success, otherwise return -1.
8198  */
8199 static int
8200 flow_dv_counter_query(struct rte_eth_dev *dev,
8201                       struct mlx5_flow_counter *cnt, bool clear,
8202                       uint64_t *pkts, uint64_t *bytes)
8203 {
8204         struct mlx5_priv *priv = dev->data->dev_private;
8205         uint64_t inn_pkts, inn_bytes;
8206         int ret;
8207
8208         if (!priv->config.devx)
8209                 return -1;
8210         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8211         if (ret)
8212                 return -1;
8213         *pkts = inn_pkts - cnt->hits;
8214         *bytes = inn_bytes - cnt->bytes;
8215         if (clear) {
8216                 cnt->hits = inn_pkts;
8217                 cnt->bytes = inn_bytes;
8218         }
8219         return 0;
8220 }
8221
8222 /*
8223  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8224  */
8225 static int
8226 flow_dv_translate(struct rte_eth_dev *dev,
8227                   struct mlx5_flow *dev_flow,
8228                   const struct rte_flow_attr *attr,
8229                   const struct rte_flow_item items[],
8230                   const struct rte_flow_action actions[],
8231                   struct rte_flow_error *error)
8232 {
8233         int ret;
8234
8235         flow_dv_shared_lock(dev);
8236         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8237         flow_dv_shared_unlock(dev);
8238         return ret;
8239 }
8240
8241 /*
8242  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8243  */
8244 static int
8245 flow_dv_apply(struct rte_eth_dev *dev,
8246               struct rte_flow *flow,
8247               struct rte_flow_error *error)
8248 {
8249         int ret;
8250
8251         flow_dv_shared_lock(dev);
8252         ret = __flow_dv_apply(dev, flow, error);
8253         flow_dv_shared_unlock(dev);
8254         return ret;
8255 }
8256
8257 /*
8258  * Mutex-protected thunk to lock-free __flow_dv_remove().
8259  */
8260 static void
8261 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8262 {
8263         flow_dv_shared_lock(dev);
8264         __flow_dv_remove(dev, flow);
8265         flow_dv_shared_unlock(dev);
8266 }
8267
8268 /*
8269  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8270  */
8271 static void
8272 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8273 {
8274         flow_dv_shared_lock(dev);
8275         __flow_dv_destroy(dev, flow);
8276         flow_dv_shared_unlock(dev);
8277 }
8278
8279 /*
8280  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8281  */
8282 static struct mlx5_flow_counter *
8283 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8284 {
8285         struct mlx5_flow_counter *cnt;
8286
8287         flow_dv_shared_lock(dev);
8288         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8289         flow_dv_shared_unlock(dev);
8290         return cnt;
8291 }
8292
8293 /*
8294  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8295  */
8296 static void
8297 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8298 {
8299         flow_dv_shared_lock(dev);
8300         flow_dv_counter_release(dev, cnt);
8301         flow_dv_shared_unlock(dev);
8302 }
8303
8304 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8305         .validate = flow_dv_validate,
8306         .prepare = flow_dv_prepare,
8307         .translate = flow_dv_translate,
8308         .apply = flow_dv_apply,
8309         .remove = flow_dv_remove,
8310         .destroy = flow_dv_destroy,
8311         .query = flow_dv_query,
8312         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8313         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8314         .create_policer_rules = flow_dv_create_policer_rules,
8315         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8316         .counter_alloc = flow_dv_counter_allocate,
8317         .counter_free = flow_dv_counter_free,
8318         .counter_query = flow_dv_counter_query,
8319 };
8320
8321 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */