drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_bus_pci.h>
  19 #include <rte_ip.h>
  20 #include <rte_gre.h>
  21 #include <rte_vxlan.h>
  22 #include <rte_gtp.h>
  23 #include <rte_eal_paging.h>
  24 #include <rte_mpls.h>
  25 #include <rte_mtr.h>
  26 #include <rte_mtr_driver.h>
  27 #include <rte_tailq.h>
  28
  29 #include <mlx5_glue.h>
  30 #include <mlx5_devx_cmds.h>
  31 #include <mlx5_prm.h>
  32 #include <mlx5_malloc.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_common_os.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_flow_os.h"
  39 #include "mlx5_rx.h"
  40 #include "mlx5_tx.h"
  41 #include "rte_pmd_mlx5.h"
  42
  43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  44
  45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR_ESWITCH
  50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  52 #endif
  53 #endif
  54
  55 #ifndef HAVE_MLX5DV_DR
  56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  57 #endif
  58
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 static int
  79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  80                              struct mlx5_flow_tbl_resource *tbl);
  81
  82 static int
  83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  84                                      uint32_t encap_decap_idx);
  85
  86 static int
  87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  88                                         uint32_t port_id);
  89 static void
  90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  91
  92 static int
  93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  94                                   uint32_t rix_jump);
  95
  96 static int16_t
  97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
  98 {
  99         struct mlx5_priv *priv = dev->data->dev_private;
 100         struct mlx5_common_device *cdev = priv->sh->cdev;
 101
 102         if (cdev->config.hca_attr.esw_mgr_vport_id_valid)
 103                 return (int16_t)cdev->config.hca_attr.esw_mgr_vport_id;
 104
 105         if (priv->pci_dev == NULL)
 106                 return 0;
 107         switch (priv->pci_dev->id.device_id) {
 108         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
 109         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
 110         case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
 111                 return (int16_t)0xfffe;
 112         default:
 113                 return 0;
 114         }
 115 }
 116
 117 /**
 118  * Initialize flow attributes structure according to flow items' types.
 119  *
 120  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
 121  * mode. For tunnel mode, the items to be modified are the outermost ones.
 122  *
 123  * @param[in] item
 124  *   Pointer to item specification.
 125  * @param[out] attr
 126  *   Pointer to flow attributes structure.
 127  * @param[in] dev_flow
 128  *   Pointer to the sub flow.
 129  * @param[in] tunnel_decap
 130  *   Whether action is after tunnel decapsulation.
 131  */
 132 static void
 133 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 134                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 135 {
 136         uint64_t layers = dev_flow->handle->layers;
 137
 138         /*
 139          * If layers is already initialized, it means this dev_flow is the
 140          * suffix flow, the layers flags is set by the prefix flow. Need to
 141          * use the layer flags from prefix flow as the suffix flow may not
 142          * have the user defined items as the flow is split.
 143          */
 144         if (layers) {
 145                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 146                         attr->ipv4 = 1;
 147                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 148                         attr->ipv6 = 1;
 149                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 150                         attr->tcp = 1;
 151                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 152                         attr->udp = 1;
 153                 attr->valid = 1;
 154                 return;
 155         }
 156         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 157                 uint8_t next_protocol = 0xff;
 158                 switch (item->type) {
 159                 case RTE_FLOW_ITEM_TYPE_GRE:
 160                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 161                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 162                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 163                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 164                 case RTE_FLOW_ITEM_TYPE_MPLS:
 165                         if (tunnel_decap)
 166                                 attr->attr = 0;
 167                         break;
 168                 case RTE_FLOW_ITEM_TYPE_IPV4:
 169                         if (!attr->ipv6)
 170                                 attr->ipv4 = 1;
 171                         if (item->mask != NULL &&
 172                             ((const struct rte_flow_item_ipv4 *)
 173                             item->mask)->hdr.next_proto_id)
 174                                 next_protocol =
 175                                     ((const struct rte_flow_item_ipv4 *)
 176                                       (item->spec))->hdr.next_proto_id &
 177                                     ((const struct rte_flow_item_ipv4 *)
 178                                       (item->mask))->hdr.next_proto_id;
 179                         if ((next_protocol == IPPROTO_IPIP ||
 180                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 181                                 attr->attr = 0;
 182                         break;
 183                 case RTE_FLOW_ITEM_TYPE_IPV6:
 184                         if (!attr->ipv4)
 185                                 attr->ipv6 = 1;
 186                         if (item->mask != NULL &&
 187                             ((const struct rte_flow_item_ipv6 *)
 188                             item->mask)->hdr.proto)
 189                                 next_protocol =
 190                                     ((const struct rte_flow_item_ipv6 *)
 191                                       (item->spec))->hdr.proto &
 192                                     ((const struct rte_flow_item_ipv6 *)
 193                                       (item->mask))->hdr.proto;
 194                         if ((next_protocol == IPPROTO_IPIP ||
 195                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 196                                 attr->attr = 0;
 197                         break;
 198                 case RTE_FLOW_ITEM_TYPE_UDP:
 199                         if (!attr->tcp)
 200                                 attr->udp = 1;
 201                         break;
 202                 case RTE_FLOW_ITEM_TYPE_TCP:
 203                         if (!attr->udp)
 204                                 attr->tcp = 1;
 205                         break;
 206                 default:
 207                         break;
 208                 }
 209         }
 210         attr->valid = 1;
 211 }
 212
 213 /*
 214  * Convert rte_mtr_color to mlx5 color.
 215  *
 216  * @param[in] rcol
 217  *   rte_mtr_color.
 218  *
 219  * @return
 220  *   mlx5 color.
 221  */
 222 static inline int
 223 rte_col_2_mlx5_col(enum rte_color rcol)
 224 {
 225         switch (rcol) {
 226         case RTE_COLOR_GREEN:
 227                 return MLX5_FLOW_COLOR_GREEN;
 228         case RTE_COLOR_YELLOW:
 229                 return MLX5_FLOW_COLOR_YELLOW;
 230         case RTE_COLOR_RED:
 231                 return MLX5_FLOW_COLOR_RED;
 232         default:
 233                 break;
 234         }
 235         return MLX5_FLOW_COLOR_UNDEFINED;
 236 }
 237
 238 struct field_modify_info {
 239         uint32_t size; /* Size of field in protocol header, in bytes. */
 240         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 241         enum mlx5_modification_field id;
 242 };
 243
 244 struct field_modify_info modify_eth[] = {
 245         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 246         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 247         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 248         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 249         {0, 0, 0},
 250 };
 251
 252 struct field_modify_info modify_vlan_out_first_vid[] = {
 253         /* Size in bits !!! */
 254         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 255         {0, 0, 0},
 256 };
 257
 258 struct field_modify_info modify_ipv4[] = {
 259         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 260         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 261         {4, 12, MLX5_MODI_OUT_SIPV4},
 262         {4, 16, MLX5_MODI_OUT_DIPV4},
 263         {0, 0, 0},
 264 };
 265
 266 struct field_modify_info modify_ipv6[] = {
 267         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 268         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 269         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 270         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 271         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 272         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 273         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 274         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 275         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 276         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 277         {0, 0, 0},
 278 };
 279
 280 struct field_modify_info modify_udp[] = {
 281         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 282         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 283         {0, 0, 0},
 284 };
 285
 286 struct field_modify_info modify_tcp[] = {
 287         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 288         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 289         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 290         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 291         {0, 0, 0},
 292 };
 293
 294 static void
 295 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 296                           uint8_t next_protocol, uint64_t *item_flags,
 297                           int *tunnel)
 298 {
 299         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 300                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 301         if (next_protocol == IPPROTO_IPIP) {
 302                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 303                 *tunnel = 1;
 304         }
 305         if (next_protocol == IPPROTO_IPV6) {
 306                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 307                 *tunnel = 1;
 308         }
 309 }
 310
 311 static inline struct mlx5_hlist *
 312 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 313                      const char *name, uint32_t size, bool direct_key,
 314                      bool lcores_share, void *ctx,
 315                      mlx5_list_create_cb cb_create,
 316                      mlx5_list_match_cb cb_match,
 317                      mlx5_list_remove_cb cb_remove,
 318                      mlx5_list_clone_cb cb_clone,
 319                      mlx5_list_clone_free_cb cb_clone_free,
 320                      struct rte_flow_error *error)
 321 {
 322         struct mlx5_hlist *hl;
 323         struct mlx5_hlist *expected = NULL;
 324         char s[MLX5_NAME_SIZE];
 325
 326         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 327         if (likely(hl))
 328                 return hl;
 329         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 330         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 331                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 332                         cb_clone_free);
 333         if (!hl) {
 334                 DRV_LOG(ERR, "%s hash creation failed", name);
 335                 rte_flow_error_set(error, ENOMEM,
 336                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 337                                    "cannot allocate resource memory");
 338                 return NULL;
 339         }
 340         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 341                                          __ATOMIC_SEQ_CST,
 342                                          __ATOMIC_SEQ_CST)) {
 343                 mlx5_hlist_destroy(hl);
 344                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 345         }
 346         return hl;
 347 }
 348
 349 /* Update VLAN's VID/PCP based on input rte_flow_action.
 350  *
 351  * @param[in] action
 352  *   Pointer to struct rte_flow_action.
 353  * @param[out] vlan
 354  *   Pointer to struct rte_vlan_hdr.
 355  */
 356 static void
 357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 358                          struct rte_vlan_hdr *vlan)
 359 {
 360         uint16_t vlan_tci;
 361         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 362                 vlan_tci =
 363                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 364                                                action->conf)->vlan_pcp;
 365                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 366                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 367                 vlan->vlan_tci |= vlan_tci;
 368         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 369                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 370                 vlan->vlan_tci |= rte_be_to_cpu_16
 371                     (((const struct rte_flow_action_of_set_vlan_vid *)
 372                                              action->conf)->vlan_vid);
 373         }
 374 }
 375
 376 /**
 377  * Fetch 1, 2, 3 or 4 byte field from the byte array
 378  * and return as unsigned integer in host-endian format.
 379  *
 380  * @param[in] data
 381  *   Pointer to data array.
 382  * @param[in] size
 383  *   Size of field to extract.
 384  *
 385  * @return
 386  *   converted field in host endian format.
 387  */
 388 static inline uint32_t
 389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 390 {
 391         uint32_t ret;
 392
 393         switch (size) {
 394         case 1:
 395                 ret = *data;
 396                 break;
 397         case 2:
 398                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 399                 break;
 400         case 3:
 401                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 402                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 403                 break;
 404         case 4:
 405                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 406                 break;
 407         default:
 408                 MLX5_ASSERT(false);
 409                 ret = 0;
 410                 break;
 411         }
 412         return ret;
 413 }
 414
 415 /**
 416  * Convert modify-header action to DV specification.
 417  *
 418  * Data length of each action is determined by provided field description
 419  * and the item mask. Data bit offset and width of each action is determined
 420  * by provided item mask.
 421  *
 422  * @param[in] item
 423  *   Pointer to item specification.
 424  * @param[in] field
 425  *   Pointer to field modification information.
 426  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 427  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 428  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 429  * @param[in] dcopy
 430  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 431  *   Negative offset value sets the same offset as source offset.
 432  *   size field is ignored, value is taken from source field.
 433  * @param[in,out] resource
 434  *   Pointer to the modify-header resource.
 435  * @param[in] type
 436  *   Type of modification.
 437  * @param[out] error
 438  *   Pointer to the error structure.
 439  *
 440  * @return
 441  *   0 on success, a negative errno value otherwise and rte_errno is set.
 442  */
 443 static int
 444 flow_dv_convert_modify_action(struct rte_flow_item *item,
 445                               struct field_modify_info *field,
 446                               struct field_modify_info *dcopy,
 447                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 448                               uint32_t type, struct rte_flow_error *error)
 449 {
 450         uint32_t i = resource->actions_num;
 451         struct mlx5_modification_cmd *actions = resource->actions;
 452         uint32_t carry_b = 0;
 453
 454         /*
 455          * The item and mask are provided in big-endian format.
 456          * The fields should be presented as in big-endian format either.
 457          * Mask must be always present, it defines the actual field width.
 458          */
 459         MLX5_ASSERT(item->mask);
 460         MLX5_ASSERT(field->size);
 461         do {
 462                 uint32_t size_b;
 463                 uint32_t off_b;
 464                 uint32_t mask;
 465                 uint32_t data;
 466                 bool next_field = true;
 467                 bool next_dcopy = true;
 468
 469                 if (i >= MLX5_MAX_MODIFY_NUM)
 470                         return rte_flow_error_set(error, EINVAL,
 471                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                  "too many items to modify");
 473                 /* Fetch variable byte size mask from the array. */
 474                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 475                                            field->offset, field->size);
 476                 if (!mask) {
 477                         ++field;
 478                         continue;
 479                 }
 480                 /* Deduce actual data width in bits from mask value. */
 481                 off_b = rte_bsf32(mask) + carry_b;
 482                 size_b = sizeof(uint32_t) * CHAR_BIT -
 483                          off_b - __builtin_clz(mask);
 484                 MLX5_ASSERT(size_b);
 485                 actions[i] = (struct mlx5_modification_cmd) {
 486                         .action_type = type,
 487                         .field = field->id,
 488                         .offset = off_b,
 489                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 490                                 0 : size_b,
 491                 };
 492                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 493                         MLX5_ASSERT(dcopy);
 494                         actions[i].dst_field = dcopy->id;
 495                         actions[i].dst_offset =
 496                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 497                         /* Convert entire record to big-endian format. */
 498                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 499                         /*
 500                          * Destination field overflow. Copy leftovers of
 501                          * a source field to the next destination field.
 502                          */
 503                         carry_b = 0;
 504                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 505                             dcopy->size != 0) {
 506                                 actions[i].length =
 507                                         dcopy->size * CHAR_BIT - dcopy->offset;
 508                                 carry_b = actions[i].length;
 509                                 next_field = false;
 510                         }
 511                         /*
 512                          * Not enough bits in a source filed to fill a
 513                          * destination field. Switch to the next source.
 514                          */
 515                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 516                             (size_b == field->size * CHAR_BIT - off_b)) {
 517                                 actions[i].length =
 518                                         field->size * CHAR_BIT - off_b;
 519                                 dcopy->offset += actions[i].length;
 520                                 next_dcopy = false;
 521                         }
 522                         if (next_dcopy)
 523                                 ++dcopy;
 524                 } else {
 525                         MLX5_ASSERT(item->spec);
 526                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 527                                                    field->offset, field->size);
 528                         /* Shift out the trailing masked bits from data. */
 529                         data = (data & mask) >> off_b;
 530                         actions[i].data1 = rte_cpu_to_be_32(data);
 531                 }
 532                 /* Convert entire record to expected big-endian format. */
 533                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 534                 if (next_field)
 535                         ++field;
 536                 ++i;
 537         } while (field->size);
 538         if (resource->actions_num == i)
 539                 return rte_flow_error_set(error, EINVAL,
 540                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 541                                           "invalid modification flow item");
 542         resource->actions_num = i;
 543         return 0;
 544 }
 545
 546 /**
 547  * Convert modify-header set IPv4 address action to DV specification.
 548  *
 549  * @param[in,out] resource
 550  *   Pointer to the modify-header resource.
 551  * @param[in] action
 552  *   Pointer to action specification.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_ipv4
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_action *action,
 563                          struct rte_flow_error *error)
 564 {
 565         const struct rte_flow_action_set_ipv4 *conf =
 566                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 567         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 568         struct rte_flow_item_ipv4 ipv4;
 569         struct rte_flow_item_ipv4 ipv4_mask;
 570
 571         memset(&ipv4, 0, sizeof(ipv4));
 572         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 573         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 574                 ipv4.hdr.src_addr = conf->ipv4_addr;
 575                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 576         } else {
 577                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 578                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 579         }
 580         item.spec = &ipv4;
 581         item.mask = &ipv4_mask;
 582         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 583                                              MLX5_MODIFICATION_TYPE_SET, error);
 584 }
 585
 586 /**
 587  * Convert modify-header set IPv6 address action to DV specification.
 588  *
 589  * @param[in,out] resource
 590  *   Pointer to the modify-header resource.
 591  * @param[in] action
 592  *   Pointer to action specification.
 593  * @param[out] error
 594  *   Pointer to the error structure.
 595  *
 596  * @return
 597  *   0 on success, a negative errno value otherwise and rte_errno is set.
 598  */
 599 static int
 600 flow_dv_convert_action_modify_ipv6
 601                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 602                          const struct rte_flow_action *action,
 603                          struct rte_flow_error *error)
 604 {
 605         const struct rte_flow_action_set_ipv6 *conf =
 606                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 607         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 608         struct rte_flow_item_ipv6 ipv6;
 609         struct rte_flow_item_ipv6 ipv6_mask;
 610
 611         memset(&ipv6, 0, sizeof(ipv6));
 612         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 613         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 614                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 615                        sizeof(ipv6.hdr.src_addr));
 616                 memcpy(&ipv6_mask.hdr.src_addr,
 617                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 618                        sizeof(ipv6.hdr.src_addr));
 619         } else {
 620                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 621                        sizeof(ipv6.hdr.dst_addr));
 622                 memcpy(&ipv6_mask.hdr.dst_addr,
 623                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 624                        sizeof(ipv6.hdr.dst_addr));
 625         }
 626         item.spec = &ipv6;
 627         item.mask = &ipv6_mask;
 628         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 629                                              MLX5_MODIFICATION_TYPE_SET, error);
 630 }
 631
 632 /**
 633  * Convert modify-header set MAC address action to DV specification.
 634  *
 635  * @param[in,out] resource
 636  *   Pointer to the modify-header resource.
 637  * @param[in] action
 638  *   Pointer to action specification.
 639  * @param[out] error
 640  *   Pointer to the error structure.
 641  *
 642  * @return
 643  *   0 on success, a negative errno value otherwise and rte_errno is set.
 644  */
 645 static int
 646 flow_dv_convert_action_modify_mac
 647                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 648                          const struct rte_flow_action *action,
 649                          struct rte_flow_error *error)
 650 {
 651         const struct rte_flow_action_set_mac *conf =
 652                 (const struct rte_flow_action_set_mac *)(action->conf);
 653         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 654         struct rte_flow_item_eth eth;
 655         struct rte_flow_item_eth eth_mask;
 656
 657         memset(&eth, 0, sizeof(eth));
 658         memset(&eth_mask, 0, sizeof(eth_mask));
 659         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 660                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 661                        sizeof(eth.src.addr_bytes));
 662                 memcpy(&eth_mask.src.addr_bytes,
 663                        &rte_flow_item_eth_mask.src.addr_bytes,
 664                        sizeof(eth_mask.src.addr_bytes));
 665         } else {
 666                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 667                        sizeof(eth.dst.addr_bytes));
 668                 memcpy(&eth_mask.dst.addr_bytes,
 669                        &rte_flow_item_eth_mask.dst.addr_bytes,
 670                        sizeof(eth_mask.dst.addr_bytes));
 671         }
 672         item.spec = &eth;
 673         item.mask = &eth_mask;
 674         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 675                                              MLX5_MODIFICATION_TYPE_SET, error);
 676 }
 677
 678 /**
 679  * Convert modify-header set VLAN VID action to DV specification.
 680  *
 681  * @param[in,out] resource
 682  *   Pointer to the modify-header resource.
 683  * @param[in] action
 684  *   Pointer to action specification.
 685  * @param[out] error
 686  *   Pointer to the error structure.
 687  *
 688  * @return
 689  *   0 on success, a negative errno value otherwise and rte_errno is set.
 690  */
 691 static int
 692 flow_dv_convert_action_modify_vlan_vid
 693                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 694                          const struct rte_flow_action *action,
 695                          struct rte_flow_error *error)
 696 {
 697         const struct rte_flow_action_of_set_vlan_vid *conf =
 698                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 699         int i = resource->actions_num;
 700         struct mlx5_modification_cmd *actions = resource->actions;
 701         struct field_modify_info *field = modify_vlan_out_first_vid;
 702
 703         if (i >= MLX5_MAX_MODIFY_NUM)
 704                 return rte_flow_error_set(error, EINVAL,
 705                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 706                          "too many items to modify");
 707         actions[i] = (struct mlx5_modification_cmd) {
 708                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 709                 .field = field->id,
 710                 .length = field->size,
 711                 .offset = field->offset,
 712         };
 713         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 714         actions[i].data1 = conf->vlan_vid;
 715         actions[i].data1 = actions[i].data1 << 16;
 716         resource->actions_num = ++i;
 717         return 0;
 718 }
 719
 720 /**
 721  * Convert modify-header set TP action to DV specification.
 722  *
 723  * @param[in,out] resource
 724  *   Pointer to the modify-header resource.
 725  * @param[in] action
 726  *   Pointer to action specification.
 727  * @param[in] items
 728  *   Pointer to rte_flow_item objects list.
 729  * @param[in] attr
 730  *   Pointer to flow attributes structure.
 731  * @param[in] dev_flow
 732  *   Pointer to the sub flow.
 733  * @param[in] tunnel_decap
 734  *   Whether action is after tunnel decapsulation.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_tp
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_action *action,
 745                          const struct rte_flow_item *items,
 746                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 747                          bool tunnel_decap, struct rte_flow_error *error)
 748 {
 749         const struct rte_flow_action_set_tp *conf =
 750                 (const struct rte_flow_action_set_tp *)(action->conf);
 751         struct rte_flow_item item;
 752         struct rte_flow_item_udp udp;
 753         struct rte_flow_item_udp udp_mask;
 754         struct rte_flow_item_tcp tcp;
 755         struct rte_flow_item_tcp tcp_mask;
 756         struct field_modify_info *field;
 757
 758         if (!attr->valid)
 759                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 760         if (attr->udp) {
 761                 memset(&udp, 0, sizeof(udp));
 762                 memset(&udp_mask, 0, sizeof(udp_mask));
 763                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 764                         udp.hdr.src_port = conf->port;
 765                         udp_mask.hdr.src_port =
 766                                         rte_flow_item_udp_mask.hdr.src_port;
 767                 } else {
 768                         udp.hdr.dst_port = conf->port;
 769                         udp_mask.hdr.dst_port =
 770                                         rte_flow_item_udp_mask.hdr.dst_port;
 771                 }
 772                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 773                 item.spec = &udp;
 774                 item.mask = &udp_mask;
 775                 field = modify_udp;
 776         } else {
 777                 MLX5_ASSERT(attr->tcp);
 778                 memset(&tcp, 0, sizeof(tcp));
 779                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 780                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 781                         tcp.hdr.src_port = conf->port;
 782                         tcp_mask.hdr.src_port =
 783                                         rte_flow_item_tcp_mask.hdr.src_port;
 784                 } else {
 785                         tcp.hdr.dst_port = conf->port;
 786                         tcp_mask.hdr.dst_port =
 787                                         rte_flow_item_tcp_mask.hdr.dst_port;
 788                 }
 789                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 790                 item.spec = &tcp;
 791                 item.mask = &tcp_mask;
 792                 field = modify_tcp;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header set TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_action *action,
 823                          const struct rte_flow_item *items,
 824                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 825                          bool tunnel_decap, struct rte_flow_error *error)
 826 {
 827         const struct rte_flow_action_set_ttl *conf =
 828                 (const struct rte_flow_action_set_ttl *)(action->conf);
 829         struct rte_flow_item item;
 830         struct rte_flow_item_ipv4 ipv4;
 831         struct rte_flow_item_ipv4 ipv4_mask;
 832         struct rte_flow_item_ipv6 ipv6;
 833         struct rte_flow_item_ipv6 ipv6_mask;
 834         struct field_modify_info *field;
 835
 836         if (!attr->valid)
 837                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 838         if (attr->ipv4) {
 839                 memset(&ipv4, 0, sizeof(ipv4));
 840                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 841                 ipv4.hdr.time_to_live = conf->ttl_value;
 842                 ipv4_mask.hdr.time_to_live = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 844                 item.spec = &ipv4;
 845                 item.mask = &ipv4_mask;
 846                 field = modify_ipv4;
 847         } else {
 848                 MLX5_ASSERT(attr->ipv6);
 849                 memset(&ipv6, 0, sizeof(ipv6));
 850                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 851                 ipv6.hdr.hop_limits = conf->ttl_value;
 852                 ipv6_mask.hdr.hop_limits = 0xFF;
 853                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 854                 item.spec = &ipv6;
 855                 item.mask = &ipv6_mask;
 856                 field = modify_ipv6;
 857         }
 858         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 859                                              MLX5_MODIFICATION_TYPE_SET, error);
 860 }
 861
 862 /**
 863  * Convert modify-header decrement TTL action to DV specification.
 864  *
 865  * @param[in,out] resource
 866  *   Pointer to the modify-header resource.
 867  * @param[in] action
 868  *   Pointer to action specification.
 869  * @param[in] items
 870  *   Pointer to rte_flow_item objects list.
 871  * @param[in] attr
 872  *   Pointer to flow attributes structure.
 873  * @param[in] dev_flow
 874  *   Pointer to the sub flow.
 875  * @param[in] tunnel_decap
 876  *   Whether action is after tunnel decapsulation.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_dec_ttl
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_item *items,
 887                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 888                          bool tunnel_decap, struct rte_flow_error *error)
 889 {
 890         struct rte_flow_item item;
 891         struct rte_flow_item_ipv4 ipv4;
 892         struct rte_flow_item_ipv4 ipv4_mask;
 893         struct rte_flow_item_ipv6 ipv6;
 894         struct rte_flow_item_ipv6 ipv6_mask;
 895         struct field_modify_info *field;
 896
 897         if (!attr->valid)
 898                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 899         if (attr->ipv4) {
 900                 memset(&ipv4, 0, sizeof(ipv4));
 901                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 902                 ipv4.hdr.time_to_live = 0xFF;
 903                 ipv4_mask.hdr.time_to_live = 0xFF;
 904                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 905                 item.spec = &ipv4;
 906                 item.mask = &ipv4_mask;
 907                 field = modify_ipv4;
 908         } else {
 909                 MLX5_ASSERT(attr->ipv6);
 910                 memset(&ipv6, 0, sizeof(ipv6));
 911                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 912                 ipv6.hdr.hop_limits = 0xFF;
 913                 ipv6_mask.hdr.hop_limits = 0xFF;
 914                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 915                 item.spec = &ipv6;
 916                 item.mask = &ipv6_mask;
 917                 field = modify_ipv6;
 918         }
 919         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 920                                              MLX5_MODIFICATION_TYPE_ADD, error);
 921 }
 922
 923 /**
 924  * Convert modify-header increment/decrement TCP Sequence number
 925  * to DV specification.
 926  *
 927  * @param[in,out] resource
 928  *   Pointer to the modify-header resource.
 929  * @param[in] action
 930  *   Pointer to action specification.
 931  * @param[out] error
 932  *   Pointer to the error structure.
 933  *
 934  * @return
 935  *   0 on success, a negative errno value otherwise and rte_errno is set.
 936  */
 937 static int
 938 flow_dv_convert_action_modify_tcp_seq
 939                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 940                          const struct rte_flow_action *action,
 941                          struct rte_flow_error *error)
 942 {
 943         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 944         uint64_t value = rte_be_to_cpu_32(*conf);
 945         struct rte_flow_item item;
 946         struct rte_flow_item_tcp tcp;
 947         struct rte_flow_item_tcp tcp_mask;
 948
 949         memset(&tcp, 0, sizeof(tcp));
 950         memset(&tcp_mask, 0, sizeof(tcp_mask));
 951         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 952                 /*
 953                  * The HW has no decrement operation, only increment operation.
 954                  * To simulate decrement X from Y using increment operation
 955                  * we need to add UINT32_MAX X times to Y.
 956                  * Each adding of UINT32_MAX decrements Y by 1.
 957                  */
 958                 value *= UINT32_MAX;
 959         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 960         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 961         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 962         item.spec = &tcp;
 963         item.mask = &tcp_mask;
 964         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 965                                              MLX5_MODIFICATION_TYPE_ADD, error);
 966 }
 967
 968 /**
 969  * Convert modify-header increment/decrement TCP Acknowledgment number
 970  * to DV specification.
 971  *
 972  * @param[in,out] resource
 973  *   Pointer to the modify-header resource.
 974  * @param[in] action
 975  *   Pointer to action specification.
 976  * @param[out] error
 977  *   Pointer to the error structure.
 978  *
 979  * @return
 980  *   0 on success, a negative errno value otherwise and rte_errno is set.
 981  */
 982 static int
 983 flow_dv_convert_action_modify_tcp_ack
 984                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 985                          const struct rte_flow_action *action,
 986                          struct rte_flow_error *error)
 987 {
 988         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 989         uint64_t value = rte_be_to_cpu_32(*conf);
 990         struct rte_flow_item item;
 991         struct rte_flow_item_tcp tcp;
 992         struct rte_flow_item_tcp tcp_mask;
 993
 994         memset(&tcp, 0, sizeof(tcp));
 995         memset(&tcp_mask, 0, sizeof(tcp_mask));
 996         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 997                 /*
 998                  * The HW has no decrement operation, only increment operation.
 999                  * To simulate decrement X from Y using increment operation
1000                  * we need to add UINT32_MAX X times to Y.
1001                  * Each adding of UINT32_MAX decrements Y by 1.
1002                  */
1003                 value *= UINT32_MAX;
1004         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1007         item.spec = &tcp;
1008         item.mask = &tcp_mask;
1009         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010                                              MLX5_MODIFICATION_TYPE_ADD, error);
1011 }
1012
1013 static enum mlx5_modification_field reg_to_field[] = {
1014         [REG_NON] = MLX5_MODI_OUT_NONE,
1015         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1025 };
1026
1027 /**
1028  * Convert register set to DV specification.
1029  *
1030  * @param[in,out] resource
1031  *   Pointer to the modify-header resource.
1032  * @param[in] action
1033  *   Pointer to action specification.
1034  * @param[out] error
1035  *   Pointer to the error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 static int
1041 flow_dv_convert_action_set_reg
1042                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043                          const struct rte_flow_action *action,
1044                          struct rte_flow_error *error)
1045 {
1046         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047         struct mlx5_modification_cmd *actions = resource->actions;
1048         uint32_t i = resource->actions_num;
1049
1050         if (i >= MLX5_MAX_MODIFY_NUM)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053                                           "too many items to modify");
1054         MLX5_ASSERT(conf->id != REG_NON);
1055         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056         actions[i] = (struct mlx5_modification_cmd) {
1057                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058                 .field = reg_to_field[conf->id],
1059                 .offset = conf->offset,
1060                 .length = conf->length,
1061         };
1062         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1064         ++i;
1065         resource->actions_num = i;
1066         return 0;
1067 }
1068
1069 /**
1070  * Convert SET_TAG action to DV specification.
1071  *
1072  * @param[in] dev
1073  *   Pointer to the rte_eth_dev structure.
1074  * @param[in,out] resource
1075  *   Pointer to the modify-header resource.
1076  * @param[in] conf
1077  *   Pointer to action specification.
1078  * @param[out] error
1079  *   Pointer to the error structure.
1080  *
1081  * @return
1082  *   0 on success, a negative errno value otherwise and rte_errno is set.
1083  */
1084 static int
1085 flow_dv_convert_action_set_tag
1086                         (struct rte_eth_dev *dev,
1087                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1088                          const struct rte_flow_action_set_tag *conf,
1089                          struct rte_flow_error *error)
1090 {
1091         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093         struct rte_flow_item item = {
1094                 .spec = &data,
1095                 .mask = &mask,
1096         };
1097         struct field_modify_info reg_c_x[] = {
1098                 [1] = {0, 0, 0},
1099         };
1100         enum mlx5_modification_field reg_type;
1101         int ret;
1102
1103         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1104         if (ret < 0)
1105                 return ret;
1106         MLX5_ASSERT(ret != REG_NON);
1107         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108         reg_type = reg_to_field[ret];
1109         MLX5_ASSERT(reg_type > 0);
1110         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112                                              MLX5_MODIFICATION_TYPE_SET, error);
1113 }
1114
1115 /**
1116  * Convert internal COPY_REG action to DV specification.
1117  *
1118  * @param[in] dev
1119  *   Pointer to the rte_eth_dev structure.
1120  * @param[in,out] res
1121  *   Pointer to the modify-header resource.
1122  * @param[in] action
1123  *   Pointer to action specification.
1124  * @param[out] error
1125  *   Pointer to the error structure.
1126  *
1127  * @return
1128  *   0 on success, a negative errno value otherwise and rte_errno is set.
1129  */
1130 static int
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1133                                  const struct rte_flow_action *action,
1134                                  struct rte_flow_error *error)
1135 {
1136         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138         struct rte_flow_item item = {
1139                 .spec = NULL,
1140                 .mask = &mask,
1141         };
1142         struct field_modify_info reg_src[] = {
1143                 {4, 0, reg_to_field[conf->src]},
1144                 {0, 0, 0},
1145         };
1146         struct field_modify_info reg_dst = {
1147                 .offset = 0,
1148                 .id = reg_to_field[conf->dst],
1149         };
1150         /* Adjust reg_c[0] usage according to reported mask. */
1151         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152                 struct mlx5_priv *priv = dev->data->dev_private;
1153                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1154
1155                 MLX5_ASSERT(reg_c0);
1156                 MLX5_ASSERT(priv->sh->config.dv_xmeta_en !=
1157                             MLX5_XMETA_MODE_LEGACY);
1158                 if (conf->dst == REG_C_0) {
1159                         /* Copy to reg_c[0], within mask only. */
1160                         reg_dst.offset = rte_bsf32(reg_c0);
1161                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1162                 } else {
1163                         reg_dst.offset = 0;
1164                         mask = rte_cpu_to_be_32(reg_c0);
1165                 }
1166         }
1167         return flow_dv_convert_modify_action(&item,
1168                                              reg_src, &reg_dst, res,
1169                                              MLX5_MODIFICATION_TYPE_COPY,
1170                                              error);
1171 }
1172
1173 /**
1174  * Convert MARK action to DV specification. This routine is used
1175  * in extensive metadata only and requires metadata register to be
1176  * handled. In legacy mode hardware tag resource is engaged.
1177  *
1178  * @param[in] dev
1179  *   Pointer to the rte_eth_dev structure.
1180  * @param[in] conf
1181  *   Pointer to MARK action specification.
1182  * @param[in,out] resource
1183  *   Pointer to the modify-header resource.
1184  * @param[out] error
1185  *   Pointer to the error structure.
1186  *
1187  * @return
1188  *   0 on success, a negative errno value otherwise and rte_errno is set.
1189  */
1190 static int
1191 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1192                             const struct rte_flow_action_mark *conf,
1193                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1194                             struct rte_flow_error *error)
1195 {
1196         struct mlx5_priv *priv = dev->data->dev_private;
1197         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1198                                            priv->sh->dv_mark_mask);
1199         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1200         struct rte_flow_item item = {
1201                 .spec = &data,
1202                 .mask = &mask,
1203         };
1204         struct field_modify_info reg_c_x[] = {
1205                 [1] = {0, 0, 0},
1206         };
1207         int reg;
1208
1209         if (!mask)
1210                 return rte_flow_error_set(error, EINVAL,
1211                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1212                                           NULL, "zero mark action mask");
1213         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1214         if (reg < 0)
1215                 return reg;
1216         MLX5_ASSERT(reg > 0);
1217         if (reg == REG_C_0) {
1218                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1219                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1220
1221                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1222                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1223                 mask = rte_cpu_to_be_32(mask << shl_c0);
1224         }
1225         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1226         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1227                                              MLX5_MODIFICATION_TYPE_SET, error);
1228 }
1229
1230 /**
1231  * Get metadata register index for specified steering domain.
1232  *
1233  * @param[in] dev
1234  *   Pointer to the rte_eth_dev structure.
1235  * @param[in] attr
1236  *   Attributes of flow to determine steering domain.
1237  * @param[out] error
1238  *   Pointer to the error structure.
1239  *
1240  * @return
1241  *   positive index on success, a negative errno value otherwise
1242  *   and rte_errno is set.
1243  */
1244 static enum modify_reg
1245 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1246                          const struct rte_flow_attr *attr,
1247                          struct rte_flow_error *error)
1248 {
1249         int reg =
1250                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1251                                           MLX5_METADATA_FDB :
1252                                             attr->egress ?
1253                                             MLX5_METADATA_TX :
1254                                             MLX5_METADATA_RX, 0, error);
1255         if (reg < 0)
1256                 return rte_flow_error_set(error,
1257                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1258                                           NULL, "unavailable "
1259                                           "metadata register");
1260         return reg;
1261 }
1262
1263 /**
1264  * Convert SET_META action to DV specification.
1265  *
1266  * @param[in] dev
1267  *   Pointer to the rte_eth_dev structure.
1268  * @param[in,out] resource
1269  *   Pointer to the modify-header resource.
1270  * @param[in] attr
1271  *   Attributes of flow that includes this item.
1272  * @param[in] conf
1273  *   Pointer to action specification.
1274  * @param[out] error
1275  *   Pointer to the error structure.
1276  *
1277  * @return
1278  *   0 on success, a negative errno value otherwise and rte_errno is set.
1279  */
1280 static int
1281 flow_dv_convert_action_set_meta
1282                         (struct rte_eth_dev *dev,
1283                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1284                          const struct rte_flow_attr *attr,
1285                          const struct rte_flow_action_set_meta *conf,
1286                          struct rte_flow_error *error)
1287 {
1288         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1289         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1290         struct rte_flow_item item = {
1291                 .spec = &data,
1292                 .mask = &mask,
1293         };
1294         struct field_modify_info reg_c_x[] = {
1295                 [1] = {0, 0, 0},
1296         };
1297         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1298
1299         if (reg < 0)
1300                 return reg;
1301         MLX5_ASSERT(reg != REG_NON);
1302         if (reg == REG_C_0) {
1303                 struct mlx5_priv *priv = dev->data->dev_private;
1304                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1305                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1306
1307                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1308                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1309                 mask = rte_cpu_to_be_32(mask << shl_c0);
1310         }
1311         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1312         /* The routine expects parameters in memory as big-endian ones. */
1313         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1314                                              MLX5_MODIFICATION_TYPE_SET, error);
1315 }
1316
1317 /**
1318  * Convert modify-header set IPv4 DSCP action to DV specification.
1319  *
1320  * @param[in,out] resource
1321  *   Pointer to the modify-header resource.
1322  * @param[in] action
1323  *   Pointer to action specification.
1324  * @param[out] error
1325  *   Pointer to the error structure.
1326  *
1327  * @return
1328  *   0 on success, a negative errno value otherwise and rte_errno is set.
1329  */
1330 static int
1331 flow_dv_convert_action_modify_ipv4_dscp
1332                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1333                          const struct rte_flow_action *action,
1334                          struct rte_flow_error *error)
1335 {
1336         const struct rte_flow_action_set_dscp *conf =
1337                 (const struct rte_flow_action_set_dscp *)(action->conf);
1338         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1339         struct rte_flow_item_ipv4 ipv4;
1340         struct rte_flow_item_ipv4 ipv4_mask;
1341
1342         memset(&ipv4, 0, sizeof(ipv4));
1343         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1344         ipv4.hdr.type_of_service = conf->dscp;
1345         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1346         item.spec = &ipv4;
1347         item.mask = &ipv4_mask;
1348         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1349                                              MLX5_MODIFICATION_TYPE_SET, error);
1350 }
1351
1352 /**
1353  * Convert modify-header set IPv6 DSCP action to DV specification.
1354  *
1355  * @param[in,out] resource
1356  *   Pointer to the modify-header resource.
1357  * @param[in] action
1358  *   Pointer to action specification.
1359  * @param[out] error
1360  *   Pointer to the error structure.
1361  *
1362  * @return
1363  *   0 on success, a negative errno value otherwise and rte_errno is set.
1364  */
1365 static int
1366 flow_dv_convert_action_modify_ipv6_dscp
1367                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1368                          const struct rte_flow_action *action,
1369                          struct rte_flow_error *error)
1370 {
1371         const struct rte_flow_action_set_dscp *conf =
1372                 (const struct rte_flow_action_set_dscp *)(action->conf);
1373         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1374         struct rte_flow_item_ipv6 ipv6;
1375         struct rte_flow_item_ipv6 ipv6_mask;
1376
1377         memset(&ipv6, 0, sizeof(ipv6));
1378         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1379         /*
1380          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1381          * rdma-core only accept the DSCP bits byte aligned start from
1382          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1383          * bits in IPv6 case as rdma-core requires byte aligned value.
1384          */
1385         ipv6.hdr.vtc_flow = conf->dscp;
1386         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1387         item.spec = &ipv6;
1388         item.mask = &ipv6_mask;
1389         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1390                                              MLX5_MODIFICATION_TYPE_SET, error);
1391 }
1392
1393 static int
1394 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1395                            enum rte_flow_field_id field, int inherit,
1396                            const struct rte_flow_attr *attr,
1397                            struct rte_flow_error *error)
1398 {
1399         struct mlx5_priv *priv = dev->data->dev_private;
1400
1401         switch (field) {
1402         case RTE_FLOW_FIELD_START:
1403                 return 32;
1404         case RTE_FLOW_FIELD_MAC_DST:
1405         case RTE_FLOW_FIELD_MAC_SRC:
1406                 return 48;
1407         case RTE_FLOW_FIELD_VLAN_TYPE:
1408                 return 16;
1409         case RTE_FLOW_FIELD_VLAN_ID:
1410                 return 12;
1411         case RTE_FLOW_FIELD_MAC_TYPE:
1412                 return 16;
1413         case RTE_FLOW_FIELD_IPV4_DSCP:
1414                 return 6;
1415         case RTE_FLOW_FIELD_IPV4_TTL:
1416                 return 8;
1417         case RTE_FLOW_FIELD_IPV4_SRC:
1418         case RTE_FLOW_FIELD_IPV4_DST:
1419                 return 32;
1420         case RTE_FLOW_FIELD_IPV6_DSCP:
1421                 return 6;
1422         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1423                 return 8;
1424         case RTE_FLOW_FIELD_IPV6_SRC:
1425         case RTE_FLOW_FIELD_IPV6_DST:
1426                 return 128;
1427         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1428         case RTE_FLOW_FIELD_TCP_PORT_DST:
1429                 return 16;
1430         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1431         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1432                 return 32;
1433         case RTE_FLOW_FIELD_TCP_FLAGS:
1434                 return 9;
1435         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1436         case RTE_FLOW_FIELD_UDP_PORT_DST:
1437                 return 16;
1438         case RTE_FLOW_FIELD_VXLAN_VNI:
1439         case RTE_FLOW_FIELD_GENEVE_VNI:
1440                 return 24;
1441         case RTE_FLOW_FIELD_GTP_TEID:
1442         case RTE_FLOW_FIELD_TAG:
1443                 return 32;
1444         case RTE_FLOW_FIELD_MARK:
1445                 return __builtin_popcount(priv->sh->dv_mark_mask);
1446         case RTE_FLOW_FIELD_META:
1447                 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1448                         __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1449         case RTE_FLOW_FIELD_POINTER:
1450         case RTE_FLOW_FIELD_VALUE:
1451                 return inherit < 0 ? 0 : inherit;
1452         default:
1453                 MLX5_ASSERT(false);
1454         }
1455         return 0;
1456 }
1457
1458 static void
1459 mlx5_flow_field_id_to_modify_info
1460                 (const struct rte_flow_action_modify_data *data,
1461                  struct field_modify_info *info, uint32_t *mask,
1462                  uint32_t width, struct rte_eth_dev *dev,
1463                  const struct rte_flow_attr *attr, struct rte_flow_error *error)
1464 {
1465         struct mlx5_priv *priv = dev->data->dev_private;
1466         uint32_t idx = 0;
1467         uint32_t off = 0;
1468
1469         switch (data->field) {
1470         case RTE_FLOW_FIELD_START:
1471                 /* not supported yet */
1472                 MLX5_ASSERT(false);
1473                 break;
1474         case RTE_FLOW_FIELD_MAC_DST:
1475                 off = data->offset > 16 ? data->offset - 16 : 0;
1476                 if (mask) {
1477                         if (data->offset < 16) {
1478                                 info[idx] = (struct field_modify_info){2, 4,
1479                                                 MLX5_MODI_OUT_DMAC_15_0};
1480                                 if (width < 16) {
1481                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1482                                                                  (16 - width));
1483                                         width = 0;
1484                                 } else {
1485                                         mask[1] = RTE_BE16(0xffff);
1486                                         width -= 16;
1487                                 }
1488                                 if (!width)
1489                                         break;
1490                                 ++idx;
1491                         }
1492                         info[idx] = (struct field_modify_info){4, 0,
1493                                                 MLX5_MODI_OUT_DMAC_47_16};
1494                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1495                                                     (32 - width)) << off);
1496                 } else {
1497                         if (data->offset < 16)
1498                                 info[idx++] = (struct field_modify_info){2, 0,
1499                                                 MLX5_MODI_OUT_DMAC_15_0};
1500                         info[idx] = (struct field_modify_info){4, off,
1501                                                 MLX5_MODI_OUT_DMAC_47_16};
1502                 }
1503                 break;
1504         case RTE_FLOW_FIELD_MAC_SRC:
1505                 off = data->offset > 16 ? data->offset - 16 : 0;
1506                 if (mask) {
1507                         if (data->offset < 16) {
1508                                 info[idx] = (struct field_modify_info){2, 4,
1509                                                 MLX5_MODI_OUT_SMAC_15_0};
1510                                 if (width < 16) {
1511                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1512                                                                  (16 - width));
1513                                         width = 0;
1514                                 } else {
1515                                         mask[1] = RTE_BE16(0xffff);
1516                                         width -= 16;
1517                                 }
1518                                 if (!width)
1519                                         break;
1520                                 ++idx;
1521                         }
1522                         info[idx] = (struct field_modify_info){4, 0,
1523                                                 MLX5_MODI_OUT_SMAC_47_16};
1524                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1525                                                     (32 - width)) << off);
1526                 } else {
1527                         if (data->offset < 16)
1528                                 info[idx++] = (struct field_modify_info){2, 0,
1529                                                 MLX5_MODI_OUT_SMAC_15_0};
1530                         info[idx] = (struct field_modify_info){4, off,
1531                                                 MLX5_MODI_OUT_SMAC_47_16};
1532                 }
1533                 break;
1534         case RTE_FLOW_FIELD_VLAN_TYPE:
1535                 /* not supported yet */
1536                 break;
1537         case RTE_FLOW_FIELD_VLAN_ID:
1538                 info[idx] = (struct field_modify_info){2, 0,
1539                                         MLX5_MODI_OUT_FIRST_VID};
1540                 if (mask)
1541                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1542                 break;
1543         case RTE_FLOW_FIELD_MAC_TYPE:
1544                 info[idx] = (struct field_modify_info){2, 0,
1545                                         MLX5_MODI_OUT_ETHERTYPE};
1546                 if (mask)
1547                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1548                 break;
1549         case RTE_FLOW_FIELD_IPV4_DSCP:
1550                 info[idx] = (struct field_modify_info){1, 0,
1551                                         MLX5_MODI_OUT_IP_DSCP};
1552                 if (mask)
1553                         mask[idx] = 0x3f >> (6 - width);
1554                 break;
1555         case RTE_FLOW_FIELD_IPV4_TTL:
1556                 info[idx] = (struct field_modify_info){1, 0,
1557                                         MLX5_MODI_OUT_IPV4_TTL};
1558                 if (mask)
1559                         mask[idx] = 0xff >> (8 - width);
1560                 break;
1561         case RTE_FLOW_FIELD_IPV4_SRC:
1562                 info[idx] = (struct field_modify_info){4, 0,
1563                                         MLX5_MODI_OUT_SIPV4};
1564                 if (mask)
1565                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1566                                                      (32 - width));
1567                 break;
1568         case RTE_FLOW_FIELD_IPV4_DST:
1569                 info[idx] = (struct field_modify_info){4, 0,
1570                                         MLX5_MODI_OUT_DIPV4};
1571                 if (mask)
1572                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1573                                                      (32 - width));
1574                 break;
1575         case RTE_FLOW_FIELD_IPV6_DSCP:
1576                 info[idx] = (struct field_modify_info){1, 0,
1577                                         MLX5_MODI_OUT_IP_DSCP};
1578                 if (mask)
1579                         mask[idx] = 0x3f >> (6 - width);
1580                 break;
1581         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1582                 info[idx] = (struct field_modify_info){1, 0,
1583                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1584                 if (mask)
1585                         mask[idx] = 0xff >> (8 - width);
1586                 break;
1587         case RTE_FLOW_FIELD_IPV6_SRC:
1588                 if (mask) {
1589                         if (data->offset < 32) {
1590                                 info[idx] = (struct field_modify_info){4, 12,
1591                                                 MLX5_MODI_OUT_SIPV6_31_0};
1592                                 if (width < 32) {
1593                                         mask[3] =
1594                                                 rte_cpu_to_be_32(0xffffffff >>
1595                                                                  (32 - width));
1596                                         width = 0;
1597                                 } else {
1598                                         mask[3] = RTE_BE32(0xffffffff);
1599                                         width -= 32;
1600                                 }
1601                                 if (!width)
1602                                         break;
1603                                 ++idx;
1604                         }
1605                         if (data->offset < 64) {
1606                                 info[idx] = (struct field_modify_info){4, 8,
1607                                                 MLX5_MODI_OUT_SIPV6_63_32};
1608                                 if (width < 32) {
1609                                         mask[2] =
1610                                                 rte_cpu_to_be_32(0xffffffff >>
1611                                                                  (32 - width));
1612                                         width = 0;
1613                                 } else {
1614                                         mask[2] = RTE_BE32(0xffffffff);
1615                                         width -= 32;
1616                                 }
1617                                 if (!width)
1618                                         break;
1619                                 ++idx;
1620                         }
1621                         if (data->offset < 96) {
1622                                 info[idx] = (struct field_modify_info){4, 4,
1623                                                 MLX5_MODI_OUT_SIPV6_95_64};
1624                                 if (width < 32) {
1625                                         mask[1] =
1626                                                 rte_cpu_to_be_32(0xffffffff >>
1627                                                                  (32 - width));
1628                                         width = 0;
1629                                 } else {
1630                                         mask[1] = RTE_BE32(0xffffffff);
1631                                         width -= 32;
1632                                 }
1633                                 if (!width)
1634                                         break;
1635                                 ++idx;
1636                         }
1637                         info[idx] = (struct field_modify_info){4, 0,
1638                                                 MLX5_MODI_OUT_SIPV6_127_96};
1639                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1640                 } else {
1641                         if (data->offset < 32)
1642                                 info[idx++] = (struct field_modify_info){4, 0,
1643                                                 MLX5_MODI_OUT_SIPV6_31_0};
1644                         if (data->offset < 64)
1645                                 info[idx++] = (struct field_modify_info){4, 0,
1646                                                 MLX5_MODI_OUT_SIPV6_63_32};
1647                         if (data->offset < 96)
1648                                 info[idx++] = (struct field_modify_info){4, 0,
1649                                                 MLX5_MODI_OUT_SIPV6_95_64};
1650                         if (data->offset < 128)
1651                                 info[idx++] = (struct field_modify_info){4, 0,
1652                                                 MLX5_MODI_OUT_SIPV6_127_96};
1653                 }
1654                 break;
1655         case RTE_FLOW_FIELD_IPV6_DST:
1656                 if (mask) {
1657                         if (data->offset < 32) {
1658                                 info[idx] = (struct field_modify_info){4, 12,
1659                                                 MLX5_MODI_OUT_DIPV6_31_0};
1660                                 if (width < 32) {
1661                                         mask[3] =
1662                                                 rte_cpu_to_be_32(0xffffffff >>
1663                                                                  (32 - width));
1664                                         width = 0;
1665                                 } else {
1666                                         mask[3] = RTE_BE32(0xffffffff);
1667                                         width -= 32;
1668                                 }
1669                                 if (!width)
1670                                         break;
1671                                 ++idx;
1672                         }
1673                         if (data->offset < 64) {
1674                                 info[idx] = (struct field_modify_info){4, 8,
1675                                                 MLX5_MODI_OUT_DIPV6_63_32};
1676                                 if (width < 32) {
1677                                         mask[2] =
1678                                                 rte_cpu_to_be_32(0xffffffff >>
1679                                                                  (32 - width));
1680                                         width = 0;
1681                                 } else {
1682                                         mask[2] = RTE_BE32(0xffffffff);
1683                                         width -= 32;
1684                                 }
1685                                 if (!width)
1686                                         break;
1687                                 ++idx;
1688                         }
1689                         if (data->offset < 96) {
1690                                 info[idx] = (struct field_modify_info){4, 4,
1691                                                 MLX5_MODI_OUT_DIPV6_95_64};
1692                                 if (width < 32) {
1693                                         mask[1] =
1694                                                 rte_cpu_to_be_32(0xffffffff >>
1695                                                                  (32 - width));
1696                                         width = 0;
1697                                 } else {
1698                                         mask[1] = RTE_BE32(0xffffffff);
1699                                         width -= 32;
1700                                 }
1701                                 if (!width)
1702                                         break;
1703                                 ++idx;
1704                         }
1705                         info[idx] = (struct field_modify_info){4, 0,
1706                                                 MLX5_MODI_OUT_DIPV6_127_96};
1707                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1708                 } else {
1709                         if (data->offset < 32)
1710                                 info[idx++] = (struct field_modify_info){4, 0,
1711                                                 MLX5_MODI_OUT_DIPV6_31_0};
1712                         if (data->offset < 64)
1713                                 info[idx++] = (struct field_modify_info){4, 0,
1714                                                 MLX5_MODI_OUT_DIPV6_63_32};
1715                         if (data->offset < 96)
1716                                 info[idx++] = (struct field_modify_info){4, 0,
1717                                                 MLX5_MODI_OUT_DIPV6_95_64};
1718                         if (data->offset < 128)
1719                                 info[idx++] = (struct field_modify_info){4, 0,
1720                                                 MLX5_MODI_OUT_DIPV6_127_96};
1721                 }
1722                 break;
1723         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1724                 info[idx] = (struct field_modify_info){2, 0,
1725                                         MLX5_MODI_OUT_TCP_SPORT};
1726                 if (mask)
1727                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1728                 break;
1729         case RTE_FLOW_FIELD_TCP_PORT_DST:
1730                 info[idx] = (struct field_modify_info){2, 0,
1731                                         MLX5_MODI_OUT_TCP_DPORT};
1732                 if (mask)
1733                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1734                 break;
1735         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1736                 info[idx] = (struct field_modify_info){4, 0,
1737                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1738                 if (mask)
1739                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1740                                                      (32 - width));
1741                 break;
1742         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1743                 info[idx] = (struct field_modify_info){4, 0,
1744                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1745                 if (mask)
1746                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1747                                                      (32 - width));
1748                 break;
1749         case RTE_FLOW_FIELD_TCP_FLAGS:
1750                 info[idx] = (struct field_modify_info){2, 0,
1751                                         MLX5_MODI_OUT_TCP_FLAGS};
1752                 if (mask)
1753                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1754                 break;
1755         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1756                 info[idx] = (struct field_modify_info){2, 0,
1757                                         MLX5_MODI_OUT_UDP_SPORT};
1758                 if (mask)
1759                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1760                 break;
1761         case RTE_FLOW_FIELD_UDP_PORT_DST:
1762                 info[idx] = (struct field_modify_info){2, 0,
1763                                         MLX5_MODI_OUT_UDP_DPORT};
1764                 if (mask)
1765                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1766                 break;
1767         case RTE_FLOW_FIELD_VXLAN_VNI:
1768                 /* not supported yet */
1769                 break;
1770         case RTE_FLOW_FIELD_GENEVE_VNI:
1771                 /* not supported yet*/
1772                 break;
1773         case RTE_FLOW_FIELD_GTP_TEID:
1774                 info[idx] = (struct field_modify_info){4, 0,
1775                                         MLX5_MODI_GTP_TEID};
1776                 if (mask)
1777                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1778                                                      (32 - width));
1779                 break;
1780         case RTE_FLOW_FIELD_TAG:
1781                 {
1782                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1783                                                    data->level, error);
1784                         if (reg < 0)
1785                                 return;
1786                         MLX5_ASSERT(reg != REG_NON);
1787                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1788                         info[idx] = (struct field_modify_info){4, 0,
1789                                                 reg_to_field[reg]};
1790                         if (mask)
1791                                 mask[idx] =
1792                                         rte_cpu_to_be_32(0xffffffff >>
1793                                                          (32 - width));
1794                 }
1795                 break;
1796         case RTE_FLOW_FIELD_MARK:
1797                 {
1798                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1799                         uint32_t mark_count = __builtin_popcount(mark_mask);
1800                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1801                                                        0, error);
1802                         if (reg < 0)
1803                                 return;
1804                         MLX5_ASSERT(reg != REG_NON);
1805                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1806                         info[idx] = (struct field_modify_info){4, 0,
1807                                                 reg_to_field[reg]};
1808                         if (mask)
1809                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1810                                          (mark_count - width)) & mark_mask);
1811                 }
1812                 break;
1813         case RTE_FLOW_FIELD_META:
1814                 {
1815                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1816                         uint32_t meta_count = __builtin_popcount(meta_mask);
1817                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1818                         if (reg < 0)
1819                                 return;
1820                         MLX5_ASSERT(reg != REG_NON);
1821                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1822                         info[idx] = (struct field_modify_info){4, 0,
1823                                                 reg_to_field[reg]};
1824                         if (mask)
1825                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1826                                         (meta_count - width)) & meta_mask);
1827                 }
1828                 break;
1829         case RTE_FLOW_FIELD_POINTER:
1830         case RTE_FLOW_FIELD_VALUE:
1831         default:
1832                 MLX5_ASSERT(false);
1833                 break;
1834         }
1835 }
1836
1837 /**
1838  * Convert modify_field action to DV specification.
1839  *
1840  * @param[in] dev
1841  *   Pointer to the rte_eth_dev structure.
1842  * @param[in,out] resource
1843  *   Pointer to the modify-header resource.
1844  * @param[in] action
1845  *   Pointer to action specification.
1846  * @param[in] attr
1847  *   Attributes of flow that includes this item.
1848  * @param[out] error
1849  *   Pointer to the error structure.
1850  *
1851  * @return
1852  *   0 on success, a negative errno value otherwise and rte_errno is set.
1853  */
1854 static int
1855 flow_dv_convert_action_modify_field
1856                         (struct rte_eth_dev *dev,
1857                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1858                          const struct rte_flow_action *action,
1859                          const struct rte_flow_attr *attr,
1860                          struct rte_flow_error *error)
1861 {
1862         const struct rte_flow_action_modify_field *conf =
1863                 (const struct rte_flow_action_modify_field *)(action->conf);
1864         struct rte_flow_item item = {
1865                 .spec = NULL,
1866                 .mask = NULL
1867         };
1868         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1869                                                                 {0, 0, 0} };
1870         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1871                                                                 {0, 0, 0} };
1872         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1873         uint32_t type, meta = 0;
1874
1875         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1876             conf->src.field == RTE_FLOW_FIELD_VALUE) {
1877                 type = MLX5_MODIFICATION_TYPE_SET;
1878                 /** For SET fill the destination field (field) first. */
1879                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1880                                                   conf->width, dev,
1881                                                   attr, error);
1882                 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1883                                         (void *)(uintptr_t)conf->src.pvalue :
1884                                         (void *)(uintptr_t)&conf->src.value;
1885                 if (conf->dst.field == RTE_FLOW_FIELD_META) {
1886                         meta = *(const unaligned_uint32_t *)item.spec;
1887                         meta = rte_cpu_to_be_32(meta);
1888                         item.spec = &meta;
1889                 }
1890         } else {
1891                 type = MLX5_MODIFICATION_TYPE_COPY;
1892                 /** For COPY fill the destination field (dcopy) without mask. */
1893                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1894                                                   conf->width, dev,
1895                                                   attr, error);
1896                 /** Then construct the source field (field) with mask. */
1897                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1898                                                   conf->width, dev,
1899                                                   attr, error);
1900         }
1901         item.mask = &mask;
1902         return flow_dv_convert_modify_action(&item,
1903                         field, dcopy, resource, type, error);
1904 }
1905
1906 /**
1907  * Validate MARK item.
1908  *
1909  * @param[in] dev
1910  *   Pointer to the rte_eth_dev structure.
1911  * @param[in] item
1912  *   Item specification.
1913  * @param[in] attr
1914  *   Attributes of flow that includes this item.
1915  * @param[out] error
1916  *   Pointer to error structure.
1917  *
1918  * @return
1919  *   0 on success, a negative errno value otherwise and rte_errno is set.
1920  */
1921 static int
1922 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1923                            const struct rte_flow_item *item,
1924                            const struct rte_flow_attr *attr __rte_unused,
1925                            struct rte_flow_error *error)
1926 {
1927         struct mlx5_priv *priv = dev->data->dev_private;
1928         struct mlx5_sh_config *config = &priv->sh->config;
1929         const struct rte_flow_item_mark *spec = item->spec;
1930         const struct rte_flow_item_mark *mask = item->mask;
1931         const struct rte_flow_item_mark nic_mask = {
1932                 .id = priv->sh->dv_mark_mask,
1933         };
1934         int ret;
1935
1936         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1937                 return rte_flow_error_set(error, ENOTSUP,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "extended metadata feature"
1940                                           " isn't enabled");
1941         if (!mlx5_flow_ext_mreg_supported(dev))
1942                 return rte_flow_error_set(error, ENOTSUP,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "extended metadata register"
1945                                           " isn't supported");
1946         if (!nic_mask.id)
1947                 return rte_flow_error_set(error, ENOTSUP,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "extended metadata register"
1950                                           " isn't available");
1951         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1952         if (ret < 0)
1953                 return ret;
1954         if (!spec)
1955                 return rte_flow_error_set(error, EINVAL,
1956                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1957                                           item->spec,
1958                                           "data cannot be empty");
1959         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1960                 return rte_flow_error_set(error, EINVAL,
1961                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1962                                           &spec->id,
1963                                           "mark id exceeds the limit");
1964         if (!mask)
1965                 mask = &nic_mask;
1966         if (!mask->id)
1967                 return rte_flow_error_set(error, EINVAL,
1968                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1969                                         "mask cannot be zero");
1970
1971         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1972                                         (const uint8_t *)&nic_mask,
1973                                         sizeof(struct rte_flow_item_mark),
1974                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1975         if (ret < 0)
1976                 return ret;
1977         return 0;
1978 }
1979
1980 /**
1981  * Validate META item.
1982  *
1983  * @param[in] dev
1984  *   Pointer to the rte_eth_dev structure.
1985  * @param[in] item
1986  *   Item specification.
1987  * @param[in] attr
1988  *   Attributes of flow that includes this item.
1989  * @param[out] error
1990  *   Pointer to error structure.
1991  *
1992  * @return
1993  *   0 on success, a negative errno value otherwise and rte_errno is set.
1994  */
1995 static int
1996 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1997                            const struct rte_flow_item *item,
1998                            const struct rte_flow_attr *attr,
1999                            struct rte_flow_error *error)
2000 {
2001         struct mlx5_priv *priv = dev->data->dev_private;
2002         struct mlx5_sh_config *config = &priv->sh->config;
2003         const struct rte_flow_item_meta *spec = item->spec;
2004         const struct rte_flow_item_meta *mask = item->mask;
2005         struct rte_flow_item_meta nic_mask = {
2006                 .data = UINT32_MAX
2007         };
2008         int reg;
2009         int ret;
2010
2011         if (!spec)
2012                 return rte_flow_error_set(error, EINVAL,
2013                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2014                                           item->spec,
2015                                           "data cannot be empty");
2016         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2017                 if (!mlx5_flow_ext_mreg_supported(dev))
2018                         return rte_flow_error_set(error, ENOTSUP,
2019                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2020                                           "extended metadata register"
2021                                           " isn't supported");
2022                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2023                 if (reg < 0)
2024                         return reg;
2025                 if (reg == REG_NON)
2026                         return rte_flow_error_set(error, ENOTSUP,
2027                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2028                                         "unavailable extended metadata register");
2029                 if (reg == REG_B)
2030                         return rte_flow_error_set(error, ENOTSUP,
2031                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2032                                           "match on reg_b "
2033                                           "isn't supported");
2034                 if (reg != REG_A)
2035                         nic_mask.data = priv->sh->dv_meta_mask;
2036         } else {
2037                 if (attr->transfer)
2038                         return rte_flow_error_set(error, ENOTSUP,
2039                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2040                                         "extended metadata feature "
2041                                         "should be enabled when "
2042                                         "meta item is requested "
2043                                         "with e-switch mode ");
2044                 if (attr->ingress)
2045                         return rte_flow_error_set(error, ENOTSUP,
2046                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2047                                         "match on metadata for ingress "
2048                                         "is not supported in legacy "
2049                                         "metadata mode");
2050         }
2051         if (!mask)
2052                 mask = &rte_flow_item_meta_mask;
2053         if (!mask->data)
2054                 return rte_flow_error_set(error, EINVAL,
2055                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2056                                         "mask cannot be zero");
2057
2058         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2059                                         (const uint8_t *)&nic_mask,
2060                                         sizeof(struct rte_flow_item_meta),
2061                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2062         return ret;
2063 }
2064
2065 /**
2066  * Validate TAG item.
2067  *
2068  * @param[in] dev
2069  *   Pointer to the rte_eth_dev structure.
2070  * @param[in] item
2071  *   Item specification.
2072  * @param[in] attr
2073  *   Attributes of flow that includes this item.
2074  * @param[out] error
2075  *   Pointer to error structure.
2076  *
2077  * @return
2078  *   0 on success, a negative errno value otherwise and rte_errno is set.
2079  */
2080 static int
2081 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2082                           const struct rte_flow_item *item,
2083                           const struct rte_flow_attr *attr __rte_unused,
2084                           struct rte_flow_error *error)
2085 {
2086         const struct rte_flow_item_tag *spec = item->spec;
2087         const struct rte_flow_item_tag *mask = item->mask;
2088         const struct rte_flow_item_tag nic_mask = {
2089                 .data = RTE_BE32(UINT32_MAX),
2090                 .index = 0xff,
2091         };
2092         int ret;
2093
2094         if (!mlx5_flow_ext_mreg_supported(dev))
2095                 return rte_flow_error_set(error, ENOTSUP,
2096                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2097                                           "extensive metadata register"
2098                                           " isn't supported");
2099         if (!spec)
2100                 return rte_flow_error_set(error, EINVAL,
2101                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2102                                           item->spec,
2103                                           "data cannot be empty");
2104         if (!mask)
2105                 mask = &rte_flow_item_tag_mask;
2106         if (!mask->data)
2107                 return rte_flow_error_set(error, EINVAL,
2108                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2109                                         "mask cannot be zero");
2110
2111         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2112                                         (const uint8_t *)&nic_mask,
2113                                         sizeof(struct rte_flow_item_tag),
2114                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2115         if (ret < 0)
2116                 return ret;
2117         if (mask->index != 0xff)
2118                 return rte_flow_error_set(error, EINVAL,
2119                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2120                                           "partial mask for tag index"
2121                                           " is not supported");
2122         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2123         if (ret < 0)
2124                 return ret;
2125         MLX5_ASSERT(ret != REG_NON);
2126         return 0;
2127 }
2128
2129 /**
2130  * Validate vport item.
2131  *
2132  * @param[in] dev
2133  *   Pointer to the rte_eth_dev structure.
2134  * @param[in] item
2135  *   Item specification.
2136  * @param[in] attr
2137  *   Attributes of flow that includes this item.
2138  * @param[in] item_flags
2139  *   Bit-fields that holds the items detected until now.
2140  * @param[out] error
2141  *   Pointer to error structure.
2142  *
2143  * @return
2144  *   0 on success, a negative errno value otherwise and rte_errno is set.
2145  */
2146 static int
2147 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2148                               const struct rte_flow_item *item,
2149                               const struct rte_flow_attr *attr,
2150                               uint64_t item_flags,
2151                               struct rte_flow_error *error)
2152 {
2153         const struct rte_flow_item_port_id *spec = item->spec;
2154         const struct rte_flow_item_port_id *mask = item->mask;
2155         const struct rte_flow_item_port_id switch_mask = {
2156                         .id = 0xffffffff,
2157         };
2158         struct mlx5_priv *esw_priv;
2159         struct mlx5_priv *dev_priv;
2160         int ret;
2161
2162         if (!attr->transfer)
2163                 return rte_flow_error_set(error, EINVAL,
2164                                           RTE_FLOW_ERROR_TYPE_ITEM,
2165                                           NULL,
2166                                           "match on port id is valid only"
2167                                           " when transfer flag is enabled");
2168         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2169                 return rte_flow_error_set(error, ENOTSUP,
2170                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2171                                           "multiple source ports are not"
2172                                           " supported");
2173         if (!mask)
2174                 mask = &switch_mask;
2175         if (mask->id != 0xffffffff)
2176                 return rte_flow_error_set(error, ENOTSUP,
2177                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2178                                            mask,
2179                                            "no support for partial mask on"
2180                                            " \"id\" field");
2181         ret = mlx5_flow_item_acceptable
2182                                 (item, (const uint8_t *)mask,
2183                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2184                                  sizeof(struct rte_flow_item_port_id),
2185                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2186         if (ret)
2187                 return ret;
2188         if (!spec)
2189                 return 0;
2190         if (spec->id == MLX5_PORT_ESW_MGR)
2191                 return 0;
2192         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2193         if (!esw_priv)
2194                 return rte_flow_error_set(error, rte_errno,
2195                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2196                                           "failed to obtain E-Switch info for"
2197                                           " port");
2198         dev_priv = mlx5_dev_to_eswitch_info(dev);
2199         if (!dev_priv)
2200                 return rte_flow_error_set(error, rte_errno,
2201                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2202                                           NULL,
2203                                           "failed to obtain E-Switch info");
2204         if (esw_priv->domain_id != dev_priv->domain_id)
2205                 return rte_flow_error_set(error, EINVAL,
2206                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2207                                           "cannot match on a port from a"
2208                                           " different E-Switch");
2209         return 0;
2210 }
2211
2212 /**
2213  * Validate VLAN item.
2214  *
2215  * @param[in] item
2216  *   Item specification.
2217  * @param[in] item_flags
2218  *   Bit-fields that holds the items detected until now.
2219  * @param[in] dev
2220  *   Ethernet device flow is being created on.
2221  * @param[out] error
2222  *   Pointer to error structure.
2223  *
2224  * @return
2225  *   0 on success, a negative errno value otherwise and rte_errno is set.
2226  */
2227 static int
2228 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2229                            uint64_t item_flags,
2230                            struct rte_eth_dev *dev,
2231                            struct rte_flow_error *error)
2232 {
2233         const struct rte_flow_item_vlan *mask = item->mask;
2234         const struct rte_flow_item_vlan nic_mask = {
2235                 .tci = RTE_BE16(UINT16_MAX),
2236                 .inner_type = RTE_BE16(UINT16_MAX),
2237                 .has_more_vlan = 1,
2238         };
2239         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2240         int ret;
2241         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2242                                         MLX5_FLOW_LAYER_INNER_L4) :
2243                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2244                                         MLX5_FLOW_LAYER_OUTER_L4);
2245         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2246                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2247
2248         if (item_flags & vlanm)
2249                 return rte_flow_error_set(error, EINVAL,
2250                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2251                                           "multiple VLAN layers not supported");
2252         else if ((item_flags & l34m) != 0)
2253                 return rte_flow_error_set(error, EINVAL,
2254                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2255                                           "VLAN cannot follow L3/L4 layer");
2256         if (!mask)
2257                 mask = &rte_flow_item_vlan_mask;
2258         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2259                                         (const uint8_t *)&nic_mask,
2260                                         sizeof(struct rte_flow_item_vlan),
2261                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2262         if (ret)
2263                 return ret;
2264         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2265                 struct mlx5_priv *priv = dev->data->dev_private;
2266
2267                 if (priv->vmwa_context) {
2268                         /*
2269                          * Non-NULL context means we have a virtual machine
2270                          * and SR-IOV enabled, we have to create VLAN interface
2271                          * to make hypervisor to setup E-Switch vport
2272                          * context correctly. We avoid creating the multiple
2273                          * VLAN interfaces, so we cannot support VLAN tag mask.
2274                          */
2275                         return rte_flow_error_set(error, EINVAL,
2276                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2277                                                   item,
2278                                                   "VLAN tag mask is not"
2279                                                   " supported in virtual"
2280                                                   " environment");
2281                 }
2282         }
2283         return 0;
2284 }
2285
2286 /*
2287  * GTP flags are contained in 1 byte of the format:
2288  * -------------------------------------------
2289  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2290  * |-----------------------------------------|
2291  * | value | Version | PT | Res | E | S | PN |
2292  * -------------------------------------------
2293  *
2294  * Matching is supported only for GTP flags E, S, PN.
2295  */
2296 #define MLX5_GTP_FLAGS_MASK     0x07
2297
2298 /**
2299  * Validate GTP item.
2300  *
2301  * @param[in] dev
2302  *   Pointer to the rte_eth_dev structure.
2303  * @param[in] item
2304  *   Item specification.
2305  * @param[in] item_flags
2306  *   Bit-fields that holds the items detected until now.
2307  * @param[out] error
2308  *   Pointer to error structure.
2309  *
2310  * @return
2311  *   0 on success, a negative errno value otherwise and rte_errno is set.
2312  */
2313 static int
2314 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2315                           const struct rte_flow_item *item,
2316                           uint64_t item_flags,
2317                           struct rte_flow_error *error)
2318 {
2319         struct mlx5_priv *priv = dev->data->dev_private;
2320         const struct rte_flow_item_gtp *spec = item->spec;
2321         const struct rte_flow_item_gtp *mask = item->mask;
2322         const struct rte_flow_item_gtp nic_mask = {
2323                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2324                 .msg_type = 0xff,
2325                 .teid = RTE_BE32(0xffffffff),
2326         };
2327
2328         if (!priv->sh->cdev->config.hca_attr.tunnel_stateless_gtp)
2329                 return rte_flow_error_set(error, ENOTSUP,
2330                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2331                                           "GTP support is not enabled");
2332         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2333                 return rte_flow_error_set(error, ENOTSUP,
2334                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2335                                           "multiple tunnel layers not"
2336                                           " supported");
2337         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2338                 return rte_flow_error_set(error, EINVAL,
2339                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2340                                           "no outer UDP layer found");
2341         if (!mask)
2342                 mask = &rte_flow_item_gtp_mask;
2343         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2344                 return rte_flow_error_set(error, ENOTSUP,
2345                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2346                                           "Match is supported for GTP"
2347                                           " flags only");
2348         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2349                                          (const uint8_t *)&nic_mask,
2350                                          sizeof(struct rte_flow_item_gtp),
2351                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2352 }
2353
2354 /**
2355  * Validate GTP PSC item.
2356  *
2357  * @param[in] item
2358  *   Item specification.
2359  * @param[in] last_item
2360  *   Previous validated item in the pattern items.
2361  * @param[in] gtp_item
2362  *   Previous GTP item specification.
2363  * @param[in] attr
2364  *   Pointer to flow attributes.
2365  * @param[out] error
2366  *   Pointer to error structure.
2367  *
2368  * @return
2369  *   0 on success, a negative errno value otherwise and rte_errno is set.
2370  */
2371 static int
2372 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2373                               uint64_t last_item,
2374                               const struct rte_flow_item *gtp_item,
2375                               const struct rte_flow_attr *attr,
2376                               struct rte_flow_error *error)
2377 {
2378         const struct rte_flow_item_gtp *gtp_spec;
2379         const struct rte_flow_item_gtp *gtp_mask;
2380         const struct rte_flow_item_gtp_psc *mask;
2381         const struct rte_flow_item_gtp_psc nic_mask = {
2382                 .hdr.type = 0xF,
2383                 .hdr.qfi = 0x3F,
2384         };
2385
2386         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2387                 return rte_flow_error_set
2388                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2389                          "GTP PSC item must be preceded with GTP item");
2390         gtp_spec = gtp_item->spec;
2391         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2392         /* GTP spec and E flag is requested to match zero. */
2393         if (gtp_spec &&
2394                 (gtp_mask->v_pt_rsv_flags &
2395                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2396                 return rte_flow_error_set
2397                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2398                          "GTP E flag must be 1 to match GTP PSC");
2399         /* Check the flow is not created in group zero. */
2400         if (!attr->transfer && !attr->group)
2401                 return rte_flow_error_set
2402                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2403                          "GTP PSC is not supported for group 0");
2404         /* GTP spec is here and E flag is requested to match zero. */
2405         if (!item->spec)
2406                 return 0;
2407         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2408         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2409                                          (const uint8_t *)&nic_mask,
2410                                          sizeof(struct rte_flow_item_gtp_psc),
2411                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2412 }
2413
2414 /**
2415  * Validate IPV4 item.
2416  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2417  * add specific validation of fragment_offset field,
2418  *
2419  * @param[in] item
2420  *   Item specification.
2421  * @param[in] item_flags
2422  *   Bit-fields that holds the items detected until now.
2423  * @param[out] error
2424  *   Pointer to error structure.
2425  *
2426  * @return
2427  *   0 on success, a negative errno value otherwise and rte_errno is set.
2428  */
2429 static int
2430 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2431                            const struct rte_flow_item *item,
2432                            uint64_t item_flags, uint64_t last_item,
2433                            uint16_t ether_type, struct rte_flow_error *error)
2434 {
2435         int ret;
2436         struct mlx5_priv *priv = dev->data->dev_private;
2437         struct mlx5_hca_attr *attr = &priv->sh->cdev->config.hca_attr;
2438         const struct rte_flow_item_ipv4 *spec = item->spec;
2439         const struct rte_flow_item_ipv4 *last = item->last;
2440         const struct rte_flow_item_ipv4 *mask = item->mask;
2441         rte_be16_t fragment_offset_spec = 0;
2442         rte_be16_t fragment_offset_last = 0;
2443         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2444                 .hdr = {
2445                         .src_addr = RTE_BE32(0xffffffff),
2446                         .dst_addr = RTE_BE32(0xffffffff),
2447                         .type_of_service = 0xff,
2448                         .fragment_offset = RTE_BE16(0xffff),
2449                         .next_proto_id = 0xff,
2450                         .time_to_live = 0xff,
2451                 },
2452         };
2453
2454         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2455                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2456                 bool ihl_cap = !tunnel ?
2457                                attr->outer_ipv4_ihl : attr->inner_ipv4_ihl;
2458                 if (!ihl_cap)
2459                         return rte_flow_error_set(error, ENOTSUP,
2460                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2461                                                   item,
2462                                                   "IPV4 ihl offload not supported");
2463                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2464         }
2465         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2466                                            ether_type, &nic_ipv4_mask,
2467                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2468         if (ret < 0)
2469                 return ret;
2470         if (spec && mask)
2471                 fragment_offset_spec = spec->hdr.fragment_offset &
2472                                        mask->hdr.fragment_offset;
2473         if (!fragment_offset_spec)
2474                 return 0;
2475         /*
2476          * spec and mask are valid, enforce using full mask to make sure the
2477          * complete value is used correctly.
2478          */
2479         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2480                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2481                 return rte_flow_error_set(error, EINVAL,
2482                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2483                                           item, "must use full mask for"
2484                                           " fragment_offset");
2485         /*
2486          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2487          * indicating this is 1st fragment of fragmented packet.
2488          * This is not yet supported in MLX5, return appropriate error message.
2489          */
2490         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2491                 return rte_flow_error_set(error, ENOTSUP,
2492                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2493                                           "match on first fragment not "
2494                                           "supported");
2495         if (fragment_offset_spec && !last)
2496                 return rte_flow_error_set(error, ENOTSUP,
2497                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2498                                           "specified value not supported");
2499         /* spec and last are valid, validate the specified range. */
2500         fragment_offset_last = last->hdr.fragment_offset &
2501                                mask->hdr.fragment_offset;
2502         /*
2503          * Match on fragment_offset spec 0x2001 and last 0x3fff
2504          * means MF is 1 and frag-offset is > 0.
2505          * This packet is fragment 2nd and onward, excluding last.
2506          * This is not yet supported in MLX5, return appropriate
2507          * error message.
2508          */
2509         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2510             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2511                 return rte_flow_error_set(error, ENOTSUP,
2512                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2513                                           last, "match on following "
2514                                           "fragments not supported");
2515         /*
2516          * Match on fragment_offset spec 0x0001 and last 0x1fff
2517          * means MF is 0 and frag-offset is > 0.
2518          * This packet is last fragment of fragmented packet.
2519          * This is not yet supported in MLX5, return appropriate
2520          * error message.
2521          */
2522         if (fragment_offset_spec == RTE_BE16(1) &&
2523             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2524                 return rte_flow_error_set(error, ENOTSUP,
2525                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2526                                           last, "match on last "
2527                                           "fragment not supported");
2528         /*
2529          * Match on fragment_offset spec 0x0001 and last 0x3fff
2530          * means MF and/or frag-offset is not 0.
2531          * This is a fragmented packet.
2532          * Other range values are invalid and rejected.
2533          */
2534         if (!(fragment_offset_spec == RTE_BE16(1) &&
2535               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2536                 return rte_flow_error_set(error, ENOTSUP,
2537                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2538                                           "specified range not supported");
2539         return 0;
2540 }
2541
2542 /**
2543  * Validate IPV6 fragment extension item.
2544  *
2545  * @param[in] item
2546  *   Item specification.
2547  * @param[in] item_flags
2548  *   Bit-fields that holds the items detected until now.
2549  * @param[out] error
2550  *   Pointer to error structure.
2551  *
2552  * @return
2553  *   0 on success, a negative errno value otherwise and rte_errno is set.
2554  */
2555 static int
2556 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2557                                     uint64_t item_flags,
2558                                     struct rte_flow_error *error)
2559 {
2560         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2561         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2562         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2563         rte_be16_t frag_data_spec = 0;
2564         rte_be16_t frag_data_last = 0;
2565         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2566         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2567                                       MLX5_FLOW_LAYER_OUTER_L4;
2568         int ret = 0;
2569         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2570                 .hdr = {
2571                         .next_header = 0xff,
2572                         .frag_data = RTE_BE16(0xffff),
2573                 },
2574         };
2575
2576         if (item_flags & l4m)
2577                 return rte_flow_error_set(error, EINVAL,
2578                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2579                                           "ipv6 fragment extension item cannot "
2580                                           "follow L4 item.");
2581         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2582             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2585                                           "ipv6 fragment extension item must "
2586                                           "follow ipv6 item");
2587         if (spec && mask)
2588                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2589         if (!frag_data_spec)
2590                 return 0;
2591         /*
2592          * spec and mask are valid, enforce using full mask to make sure the
2593          * complete value is used correctly.
2594          */
2595         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2596                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2597                 return rte_flow_error_set(error, EINVAL,
2598                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2599                                           item, "must use full mask for"
2600                                           " frag_data");
2601         /*
2602          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2603          * This is 1st fragment of fragmented packet.
2604          */
2605         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2606                 return rte_flow_error_set(error, ENOTSUP,
2607                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2608                                           "match on first fragment not "
2609                                           "supported");
2610         if (frag_data_spec && !last)
2611                 return rte_flow_error_set(error, EINVAL,
2612                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2613                                           "specified value not supported");
2614         ret = mlx5_flow_item_acceptable
2615                                 (item, (const uint8_t *)mask,
2616                                  (const uint8_t *)&nic_mask,
2617                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2618                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2619         if (ret)
2620                 return ret;
2621         /* spec and last are valid, validate the specified range. */
2622         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2623         /*
2624          * Match on frag_data spec 0x0009 and last 0xfff9
2625          * means M is 1 and frag-offset is > 0.
2626          * This packet is fragment 2nd and onward, excluding last.
2627          * This is not yet supported in MLX5, return appropriate
2628          * error message.
2629          */
2630         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2631                                        RTE_IPV6_EHDR_MF_MASK) &&
2632             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2633                 return rte_flow_error_set(error, ENOTSUP,
2634                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2635                                           last, "match on following "
2636                                           "fragments not supported");
2637         /*
2638          * Match on frag_data spec 0x0008 and last 0xfff8
2639          * means M is 0 and frag-offset is > 0.
2640          * This packet is last fragment of fragmented packet.
2641          * This is not yet supported in MLX5, return appropriate
2642          * error message.
2643          */
2644         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2645             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2646                 return rte_flow_error_set(error, ENOTSUP,
2647                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2648                                           last, "match on last "
2649                                           "fragment not supported");
2650         /* Other range values are invalid and rejected. */
2651         return rte_flow_error_set(error, EINVAL,
2652                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2653                                   "specified range not supported");
2654 }
2655
2656 /*
2657  * Validate ASO CT item.
2658  *
2659  * @param[in] dev
2660  *   Pointer to the rte_eth_dev structure.
2661  * @param[in] item
2662  *   Item specification.
2663  * @param[in] item_flags
2664  *   Pointer to bit-fields that holds the items detected until now.
2665  * @param[out] error
2666  *   Pointer to error structure.
2667  *
2668  * @return
2669  *   0 on success, a negative errno value otherwise and rte_errno is set.
2670  */
2671 static int
2672 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2673                              const struct rte_flow_item *item,
2674                              uint64_t *item_flags,
2675                              struct rte_flow_error *error)
2676 {
2677         const struct rte_flow_item_conntrack *spec = item->spec;
2678         const struct rte_flow_item_conntrack *mask = item->mask;
2679         RTE_SET_USED(dev);
2680         uint32_t flags;
2681
2682         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2683                 return rte_flow_error_set(error, EINVAL,
2684                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2685                                           "Only one CT is supported");
2686         if (!mask)
2687                 mask = &rte_flow_item_conntrack_mask;
2688         flags = spec->flags & mask->flags;
2689         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2690             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2691              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2692              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2693                 return rte_flow_error_set(error, EINVAL,
2694                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2695                                           "Conflict status bits");
2696         /* State change also needs to be considered. */
2697         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2698         return 0;
2699 }
2700
2701 /**
2702  * Validate the pop VLAN action.
2703  *
2704  * @param[in] dev
2705  *   Pointer to the rte_eth_dev structure.
2706  * @param[in] action_flags
2707  *   Holds the actions detected until now.
2708  * @param[in] action
2709  *   Pointer to the pop vlan action.
2710  * @param[in] item_flags
2711  *   The items found in this flow rule.
2712  * @param[in] attr
2713  *   Pointer to flow attributes.
2714  * @param[out] error
2715  *   Pointer to error structure.
2716  *
2717  * @return
2718  *   0 on success, a negative errno value otherwise and rte_errno is set.
2719  */
2720 static int
2721 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2722                                  uint64_t action_flags,
2723                                  const struct rte_flow_action *action,
2724                                  uint64_t item_flags,
2725                                  const struct rte_flow_attr *attr,
2726                                  struct rte_flow_error *error)
2727 {
2728         const struct mlx5_priv *priv = dev->data->dev_private;
2729         struct mlx5_dev_ctx_shared *sh = priv->sh;
2730         bool direction_error = false;
2731
2732         if (!priv->sh->pop_vlan_action)
2733                 return rte_flow_error_set(error, ENOTSUP,
2734                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2735                                           NULL,
2736                                           "pop vlan action is not supported");
2737         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2738         if (attr->transfer) {
2739                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2740                 bool is_cx5 = sh->steering_format_version ==
2741                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2742
2743                 if (fdb_tx && is_cx5)
2744                         direction_error = true;
2745         } else if (attr->egress) {
2746                 direction_error = true;
2747         }
2748         if (direction_error)
2749                 return rte_flow_error_set(error, ENOTSUP,
2750                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2751                                           NULL,
2752                                           "pop vlan action not supported for egress");
2753         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2754                 return rte_flow_error_set(error, ENOTSUP,
2755                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2756                                           "no support for multiple VLAN "
2757                                           "actions");
2758         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2759         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2760             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2761                 return rte_flow_error_set(error, ENOTSUP,
2762                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2763                                           NULL,
2764                                           "cannot pop vlan after decap without "
2765                                           "match on inner vlan in the flow");
2766         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2767         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2768             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2769                 return rte_flow_error_set(error, ENOTSUP,
2770                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2771                                           NULL,
2772                                           "cannot pop vlan without a "
2773                                           "match on (outer) vlan in the flow");
2774         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2775                 return rte_flow_error_set(error, EINVAL,
2776                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2777                                           "wrong action order, port_id should "
2778                                           "be after pop VLAN action");
2779         if (!attr->transfer && priv->representor)
2780                 return rte_flow_error_set(error, ENOTSUP,
2781                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2782                                           "pop vlan action for VF representor "
2783                                           "not supported on NIC table");
2784         return 0;
2785 }
2786
2787 /**
2788  * Get VLAN default info from vlan match info.
2789  *
2790  * @param[in] items
2791  *   the list of item specifications.
2792  * @param[out] vlan
2793  *   pointer VLAN info to fill to.
2794  *
2795  * @return
2796  *   0 on success, a negative errno value otherwise and rte_errno is set.
2797  */
2798 static void
2799 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2800                                   struct rte_vlan_hdr *vlan)
2801 {
2802         const struct rte_flow_item_vlan nic_mask = {
2803                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2804                                 MLX5DV_FLOW_VLAN_VID_MASK),
2805                 .inner_type = RTE_BE16(0xffff),
2806         };
2807
2808         if (items == NULL)
2809                 return;
2810         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2811                 int type = items->type;
2812
2813                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2814                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2815                         break;
2816         }
2817         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2818                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2819                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2820
2821                 /* If VLAN item in pattern doesn't contain data, return here. */
2822                 if (!vlan_v)
2823                         return;
2824                 if (!vlan_m)
2825                         vlan_m = &nic_mask;
2826                 /* Only full match values are accepted */
2827                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2828                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2829                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2830                         vlan->vlan_tci |=
2831                                 rte_be_to_cpu_16(vlan_v->tci &
2832                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2833                 }
2834                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2835                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2836                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2837                         vlan->vlan_tci |=
2838                                 rte_be_to_cpu_16(vlan_v->tci &
2839                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2840                 }
2841                 if (vlan_m->inner_type == nic_mask.inner_type)
2842                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2843                                                            vlan_m->inner_type);
2844         }
2845 }
2846
2847 /**
2848  * Validate the push VLAN action.
2849  *
2850  * @param[in] dev
2851  *   Pointer to the rte_eth_dev structure.
2852  * @param[in] action_flags
2853  *   Holds the actions detected until now.
2854  * @param[in] item_flags
2855  *   The items found in this flow rule.
2856  * @param[in] action
2857  *   Pointer to the action structure.
2858  * @param[in] attr
2859  *   Pointer to flow attributes
2860  * @param[out] error
2861  *   Pointer to error structure.
2862  *
2863  * @return
2864  *   0 on success, a negative errno value otherwise and rte_errno is set.
2865  */
2866 static int
2867 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2868                                   uint64_t action_flags,
2869                                   const struct rte_flow_item_vlan *vlan_m,
2870                                   const struct rte_flow_action *action,
2871                                   const struct rte_flow_attr *attr,
2872                                   struct rte_flow_error *error)
2873 {
2874         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2875         const struct mlx5_priv *priv = dev->data->dev_private;
2876         struct mlx5_dev_ctx_shared *sh = priv->sh;
2877         bool direction_error = false;
2878
2879         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2880             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2881                 return rte_flow_error_set(error, EINVAL,
2882                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2883                                           "invalid vlan ethertype");
2884         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2885                 return rte_flow_error_set(error, EINVAL,
2886                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2887                                           "wrong action order, port_id should "
2888                                           "be after push VLAN");
2889         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2890         if (attr->transfer) {
2891                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2892                 bool is_cx5 = sh->steering_format_version ==
2893                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2894
2895                 if (!fdb_tx && is_cx5)
2896                         direction_error = true;
2897         } else if (attr->ingress) {
2898                 direction_error = true;
2899         }
2900         if (direction_error)
2901                 return rte_flow_error_set(error, ENOTSUP,
2902                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2903                                           NULL,
2904                                           "push vlan action not supported for ingress");
2905         if (!attr->transfer && priv->representor)
2906                 return rte_flow_error_set(error, ENOTSUP,
2907                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2908                                           "push vlan action for VF representor "
2909                                           "not supported on NIC table");
2910         if (vlan_m &&
2911             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2912             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2913                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2914             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2915             !(mlx5_flow_find_action
2916                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2917                 return rte_flow_error_set(error, EINVAL,
2918                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2919                                           "not full match mask on VLAN PCP and "
2920                                           "there is no of_set_vlan_pcp action, "
2921                                           "push VLAN action cannot figure out "
2922                                           "PCP value");
2923         if (vlan_m &&
2924             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2925             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2926                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2927             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2928             !(mlx5_flow_find_action
2929                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2930                 return rte_flow_error_set(error, EINVAL,
2931                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2932                                           "not full match mask on VLAN VID and "
2933                                           "there is no of_set_vlan_vid action, "
2934                                           "push VLAN action cannot figure out "
2935                                           "VID value");
2936         (void)attr;
2937         return 0;
2938 }
2939
2940 /**
2941  * Validate the set VLAN PCP.
2942  *
2943  * @param[in] action_flags
2944  *   Holds the actions detected until now.
2945  * @param[in] actions
2946  *   Pointer to the list of actions remaining in the flow rule.
2947  * @param[out] error
2948  *   Pointer to error structure.
2949  *
2950  * @return
2951  *   0 on success, a negative errno value otherwise and rte_errno is set.
2952  */
2953 static int
2954 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2955                                      const struct rte_flow_action actions[],
2956                                      struct rte_flow_error *error)
2957 {
2958         const struct rte_flow_action *action = actions;
2959         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2960
2961         if (conf->vlan_pcp > 7)
2962                 return rte_flow_error_set(error, EINVAL,
2963                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2964                                           "VLAN PCP value is too big");
2965         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2966                 return rte_flow_error_set(error, ENOTSUP,
2967                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2968                                           "set VLAN PCP action must follow "
2969                                           "the push VLAN action");
2970         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2971                 return rte_flow_error_set(error, ENOTSUP,
2972                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2973                                           "Multiple VLAN PCP modification are "
2974                                           "not supported");
2975         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2976                 return rte_flow_error_set(error, EINVAL,
2977                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2978                                           "wrong action order, port_id should "
2979                                           "be after set VLAN PCP");
2980         return 0;
2981 }
2982
2983 /**
2984  * Validate the set VLAN VID.
2985  *
2986  * @param[in] item_flags
2987  *   Holds the items detected in this rule.
2988  * @param[in] action_flags
2989  *   Holds the actions detected until now.
2990  * @param[in] actions
2991  *   Pointer to the list of actions remaining in the flow rule.
2992  * @param[out] error
2993  *   Pointer to error structure.
2994  *
2995  * @return
2996  *   0 on success, a negative errno value otherwise and rte_errno is set.
2997  */
2998 static int
2999 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3000                                      uint64_t action_flags,
3001                                      const struct rte_flow_action actions[],
3002                                      struct rte_flow_error *error)
3003 {
3004         const struct rte_flow_action *action = actions;
3005         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3006
3007         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3008                 return rte_flow_error_set(error, EINVAL,
3009                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3010                                           "VLAN VID value is too big");
3011         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3012             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3013                 return rte_flow_error_set(error, ENOTSUP,
3014                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3015                                           "set VLAN VID action must follow push"
3016                                           " VLAN action or match on VLAN item");
3017         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3018                 return rte_flow_error_set(error, ENOTSUP,
3019                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3020                                           "Multiple VLAN VID modifications are "
3021                                           "not supported");
3022         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3023                 return rte_flow_error_set(error, EINVAL,
3024                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3025                                           "wrong action order, port_id should "
3026                                           "be after set VLAN VID");
3027         return 0;
3028 }
3029
3030 /*
3031  * Validate the FLAG action.
3032  *
3033  * @param[in] dev
3034  *   Pointer to the rte_eth_dev structure.
3035  * @param[in] action_flags
3036  *   Holds the actions detected until now.
3037  * @param[in] attr
3038  *   Pointer to flow attributes
3039  * @param[out] error
3040  *   Pointer to error structure.
3041  *
3042  * @return
3043  *   0 on success, a negative errno value otherwise and rte_errno is set.
3044  */
3045 static int
3046 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3047                              uint64_t action_flags,
3048                              const struct rte_flow_attr *attr,
3049                              struct rte_flow_error *error)
3050 {
3051         struct mlx5_priv *priv = dev->data->dev_private;
3052         struct mlx5_sh_config *config = &priv->sh->config;
3053         int ret;
3054
3055         /* Fall back if no extended metadata register support. */
3056         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3057                 return mlx5_flow_validate_action_flag(action_flags, attr,
3058                                                       error);
3059         /* Extensive metadata mode requires registers. */
3060         if (!mlx5_flow_ext_mreg_supported(dev))
3061                 return rte_flow_error_set(error, ENOTSUP,
3062                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3063                                           "no metadata registers "
3064                                           "to support flag action");
3065         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3066                 return rte_flow_error_set(error, ENOTSUP,
3067                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3068                                           "extended metadata register"
3069                                           " isn't available");
3070         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3071         if (ret < 0)
3072                 return ret;
3073         MLX5_ASSERT(ret > 0);
3074         if (action_flags & MLX5_FLOW_ACTION_MARK)
3075                 return rte_flow_error_set(error, EINVAL,
3076                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3077                                           "can't mark and flag in same flow");
3078         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3079                 return rte_flow_error_set(error, EINVAL,
3080                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3081                                           "can't have 2 flag"
3082                                           " actions in same flow");
3083         return 0;
3084 }
3085
3086 /**
3087  * Validate MARK action.
3088  *
3089  * @param[in] dev
3090  *   Pointer to the rte_eth_dev structure.
3091  * @param[in] action
3092  *   Pointer to action.
3093  * @param[in] action_flags
3094  *   Holds the actions detected until now.
3095  * @param[in] attr
3096  *   Pointer to flow attributes
3097  * @param[out] error
3098  *   Pointer to error structure.
3099  *
3100  * @return
3101  *   0 on success, a negative errno value otherwise and rte_errno is set.
3102  */
3103 static int
3104 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3105                              const struct rte_flow_action *action,
3106                              uint64_t action_flags,
3107                              const struct rte_flow_attr *attr,
3108                              struct rte_flow_error *error)
3109 {
3110         struct mlx5_priv *priv = dev->data->dev_private;
3111         struct mlx5_sh_config *config = &priv->sh->config;
3112         const struct rte_flow_action_mark *mark = action->conf;
3113         int ret;
3114
3115         if (is_tunnel_offload_active(dev))
3116                 return rte_flow_error_set(error, ENOTSUP,
3117                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3118                                           "no mark action "
3119                                           "if tunnel offload active");
3120         /* Fall back if no extended metadata register support. */
3121         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3122                 return mlx5_flow_validate_action_mark(action, action_flags,
3123                                                       attr, error);
3124         /* Extensive metadata mode requires registers. */
3125         if (!mlx5_flow_ext_mreg_supported(dev))
3126                 return rte_flow_error_set(error, ENOTSUP,
3127                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3128                                           "no metadata registers "
3129                                           "to support mark action");
3130         if (!priv->sh->dv_mark_mask)
3131                 return rte_flow_error_set(error, ENOTSUP,
3132                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3133                                           "extended metadata register"
3134                                           " isn't available");
3135         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3136         if (ret < 0)
3137                 return ret;
3138         MLX5_ASSERT(ret > 0);
3139         if (!mark)
3140                 return rte_flow_error_set(error, EINVAL,
3141                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3142                                           "configuration cannot be null");
3143         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3144                 return rte_flow_error_set(error, EINVAL,
3145                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3146                                           &mark->id,
3147                                           "mark id exceeds the limit");
3148         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3149                 return rte_flow_error_set(error, EINVAL,
3150                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3151                                           "can't flag and mark in same flow");
3152         if (action_flags & MLX5_FLOW_ACTION_MARK)
3153                 return rte_flow_error_set(error, EINVAL,
3154                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3155                                           "can't have 2 mark actions in same"
3156                                           " flow");
3157         return 0;
3158 }
3159
3160 /**
3161  * Validate SET_META action.
3162  *
3163  * @param[in] dev
3164  *   Pointer to the rte_eth_dev structure.
3165  * @param[in] action
3166  *   Pointer to the action structure.
3167  * @param[in] action_flags
3168  *   Holds the actions detected until now.
3169  * @param[in] attr
3170  *   Pointer to flow attributes
3171  * @param[out] error
3172  *   Pointer to error structure.
3173  *
3174  * @return
3175  *   0 on success, a negative errno value otherwise and rte_errno is set.
3176  */
3177 static int
3178 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3179                                  const struct rte_flow_action *action,
3180                                  uint64_t action_flags __rte_unused,
3181                                  const struct rte_flow_attr *attr,
3182                                  struct rte_flow_error *error)
3183 {
3184         struct mlx5_priv *priv = dev->data->dev_private;
3185         struct mlx5_sh_config *config = &priv->sh->config;
3186         const struct rte_flow_action_set_meta *conf;
3187         uint32_t nic_mask = UINT32_MAX;
3188         int reg;
3189
3190         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3191             !mlx5_flow_ext_mreg_supported(dev))
3192                 return rte_flow_error_set(error, ENOTSUP,
3193                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3194                                           "extended metadata register"
3195                                           " isn't supported");
3196         reg = flow_dv_get_metadata_reg(dev, attr, error);
3197         if (reg < 0)
3198                 return reg;
3199         if (reg == REG_NON)
3200                 return rte_flow_error_set(error, ENOTSUP,
3201                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3202                                           "unavailable extended metadata register");
3203         if (reg != REG_A && reg != REG_B) {
3204                 struct mlx5_priv *priv = dev->data->dev_private;
3205
3206                 nic_mask = priv->sh->dv_meta_mask;
3207         }
3208         if (!(action->conf))
3209                 return rte_flow_error_set(error, EINVAL,
3210                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3211                                           "configuration cannot be null");
3212         conf = (const struct rte_flow_action_set_meta *)action->conf;
3213         if (!conf->mask)
3214                 return rte_flow_error_set(error, EINVAL,
3215                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3216                                           "zero mask doesn't have any effect");
3217         if (conf->mask & ~nic_mask)
3218                 return rte_flow_error_set(error, EINVAL,
3219                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3220                                           "meta data must be within reg C0");
3221         return 0;
3222 }
3223
3224 /**
3225  * Validate SET_TAG action.
3226  *
3227  * @param[in] dev
3228  *   Pointer to the rte_eth_dev structure.
3229  * @param[in] action
3230  *   Pointer to the action structure.
3231  * @param[in] action_flags
3232  *   Holds the actions detected until now.
3233  * @param[in] attr
3234  *   Pointer to flow attributes
3235  * @param[out] error
3236  *   Pointer to error structure.
3237  *
3238  * @return
3239  *   0 on success, a negative errno value otherwise and rte_errno is set.
3240  */
3241 static int
3242 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3243                                 const struct rte_flow_action *action,
3244                                 uint64_t action_flags,
3245                                 const struct rte_flow_attr *attr,
3246                                 struct rte_flow_error *error)
3247 {
3248         const struct rte_flow_action_set_tag *conf;
3249         const uint64_t terminal_action_flags =
3250                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3251                 MLX5_FLOW_ACTION_RSS;
3252         int ret;
3253
3254         if (!mlx5_flow_ext_mreg_supported(dev))
3255                 return rte_flow_error_set(error, ENOTSUP,
3256                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3257                                           "extensive metadata register"
3258                                           " isn't supported");
3259         if (!(action->conf))
3260                 return rte_flow_error_set(error, EINVAL,
3261                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3262                                           "configuration cannot be null");
3263         conf = (const struct rte_flow_action_set_tag *)action->conf;
3264         if (!conf->mask)
3265                 return rte_flow_error_set(error, EINVAL,
3266                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3267                                           "zero mask doesn't have any effect");
3268         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3269         if (ret < 0)
3270                 return ret;
3271         if (!attr->transfer && attr->ingress &&
3272             (action_flags & terminal_action_flags))
3273                 return rte_flow_error_set(error, EINVAL,
3274                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3275                                           "set_tag has no effect"
3276                                           " with terminal actions");
3277         return 0;
3278 }
3279
3280 /**
3281  * Indicates whether ASO aging is supported.
3282  *
3283  * @param[in] sh
3284  *   Pointer to shared device context structure.
3285  * @param[in] attr
3286  *   Attributes of flow that includes AGE action.
3287  *
3288  * @return
3289  *   True when ASO aging is supported, false otherwise.
3290  */
3291 static inline bool
3292 flow_hit_aso_supported(const struct mlx5_dev_ctx_shared *sh,
3293                 const struct rte_flow_attr *attr)
3294 {
3295         MLX5_ASSERT(sh && attr);
3296         return (sh->flow_hit_aso_en && (attr->transfer || attr->group));
3297 }
3298
3299 /**
3300  * Validate count action.
3301  *
3302  * @param[in] dev
3303  *   Pointer to rte_eth_dev structure.
3304  * @param[in] shared
3305  *   Indicator if action is shared.
3306  * @param[in] action_flags
3307  *   Holds the actions detected until now.
3308  * @param[in] attr
3309  *   Attributes of flow that includes this action.
3310  * @param[out] error
3311  *   Pointer to error structure.
3312  *
3313  * @return
3314  *   0 on success, a negative errno value otherwise and rte_errno is set.
3315  */
3316 static int
3317 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3318                               uint64_t action_flags,
3319                               const struct rte_flow_attr *attr,
3320                               struct rte_flow_error *error)
3321 {
3322         struct mlx5_priv *priv = dev->data->dev_private;
3323
3324         if (!priv->sh->cdev->config.devx)
3325                 goto notsup_err;
3326         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3327                 return rte_flow_error_set(error, EINVAL,
3328                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3329                                           "duplicate count actions set");
3330         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3331             !flow_hit_aso_supported(priv->sh, attr))
3332                 return rte_flow_error_set(error, EINVAL,
3333                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3334                                           "old age and indirect count combination is not supported");
3335 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3336         return 0;
3337 #endif
3338 notsup_err:
3339         return rte_flow_error_set
3340                       (error, ENOTSUP,
3341                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3342                        NULL,
3343                        "count action not supported");
3344 }
3345
3346 /**
3347  * Validate the L2 encap action.
3348  *
3349  * @param[in] dev
3350  *   Pointer to the rte_eth_dev structure.
3351  * @param[in] action_flags
3352  *   Holds the actions detected until now.
3353  * @param[in] action
3354  *   Pointer to the action structure.
3355  * @param[in] attr
3356  *   Pointer to flow attributes.
3357  * @param[out] error
3358  *   Pointer to error structure.
3359  *
3360  * @return
3361  *   0 on success, a negative errno value otherwise and rte_errno is set.
3362  */
3363 static int
3364 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3365                                  uint64_t action_flags,
3366                                  const struct rte_flow_action *action,
3367                                  const struct rte_flow_attr *attr,
3368                                  struct rte_flow_error *error)
3369 {
3370         const struct mlx5_priv *priv = dev->data->dev_private;
3371
3372         if (!(action->conf))
3373                 return rte_flow_error_set(error, EINVAL,
3374                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3375                                           "configuration cannot be null");
3376         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3377                 return rte_flow_error_set(error, EINVAL,
3378                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3379                                           "can only have a single encap action "
3380                                           "in a flow");
3381         if (!attr->transfer && priv->representor)
3382                 return rte_flow_error_set(error, ENOTSUP,
3383                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3384                                           "encap action for VF representor "
3385                                           "not supported on NIC table");
3386         return 0;
3387 }
3388
3389 /**
3390  * Validate a decap action.
3391  *
3392  * @param[in] dev
3393  *   Pointer to the rte_eth_dev structure.
3394  * @param[in] action_flags
3395  *   Holds the actions detected until now.
3396  * @param[in] action
3397  *   Pointer to the action structure.
3398  * @param[in] item_flags
3399  *   Holds the items detected.
3400  * @param[in] attr
3401  *   Pointer to flow attributes
3402  * @param[out] error
3403  *   Pointer to error structure.
3404  *
3405  * @return
3406  *   0 on success, a negative errno value otherwise and rte_errno is set.
3407  */
3408 static int
3409 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3410                               uint64_t action_flags,
3411                               const struct rte_flow_action *action,
3412                               const uint64_t item_flags,
3413                               const struct rte_flow_attr *attr,
3414                               struct rte_flow_error *error)
3415 {
3416         const struct mlx5_priv *priv = dev->data->dev_private;
3417
3418         if (priv->sh->cdev->config.hca_attr.scatter_fcs_w_decap_disable &&
3419             !priv->sh->config.decap_en)
3420                 return rte_flow_error_set(error, ENOTSUP,
3421                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3422                                           "decap is not enabled");
3423         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3424                 return rte_flow_error_set(error, ENOTSUP,
3425                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3426                                           action_flags &
3427                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3428                                           "have a single decap action" : "decap "
3429                                           "after encap is not supported");
3430         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3431                 return rte_flow_error_set(error, EINVAL,
3432                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3433                                           "can't have decap action after"
3434                                           " modify action");
3435         if (attr->egress)
3436                 return rte_flow_error_set(error, ENOTSUP,
3437                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3438                                           NULL,
3439                                           "decap action not supported for "
3440                                           "egress");
3441         if (!attr->transfer && priv->representor)
3442                 return rte_flow_error_set(error, ENOTSUP,
3443                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3444                                           "decap action for VF representor "
3445                                           "not supported on NIC table");
3446         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3447             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3448                 return rte_flow_error_set(error, ENOTSUP,
3449                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3450                                 "VXLAN item should be present for VXLAN decap");
3451         return 0;
3452 }
3453
3454 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3455
3456 /**
3457  * Validate the raw encap and decap actions.
3458  *
3459  * @param[in] dev
3460  *   Pointer to the rte_eth_dev structure.
3461  * @param[in] decap
3462  *   Pointer to the decap action.
3463  * @param[in] encap
3464  *   Pointer to the encap action.
3465  * @param[in] attr
3466  *   Pointer to flow attributes
3467  * @param[in/out] action_flags
3468  *   Holds the actions detected until now.
3469  * @param[out] actions_n
3470  *   pointer to the number of actions counter.
3471  * @param[in] action
3472  *   Pointer to the action structure.
3473  * @param[in] item_flags
3474  *   Holds the items detected.
3475  * @param[out] error
3476  *   Pointer to error structure.
3477  *
3478  * @return
3479  *   0 on success, a negative errno value otherwise and rte_errno is set.
3480  */
3481 static int
3482 flow_dv_validate_action_raw_encap_decap
3483         (struct rte_eth_dev *dev,
3484          const struct rte_flow_action_raw_decap *decap,
3485          const struct rte_flow_action_raw_encap *encap,
3486          const struct rte_flow_attr *attr, uint64_t *action_flags,
3487          int *actions_n, const struct rte_flow_action *action,
3488          uint64_t item_flags, struct rte_flow_error *error)
3489 {
3490         const struct mlx5_priv *priv = dev->data->dev_private;
3491         int ret;
3492
3493         if (encap && (!encap->size || !encap->data))
3494                 return rte_flow_error_set(error, EINVAL,
3495                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3496                                           "raw encap data cannot be empty");
3497         if (decap && encap) {
3498                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3499                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3500                         /* L3 encap. */
3501                         decap = NULL;
3502                 else if (encap->size <=
3503                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3504                            decap->size >
3505                            MLX5_ENCAPSULATION_DECISION_SIZE)
3506                         /* L3 decap. */
3507                         encap = NULL;
3508                 else if (encap->size >
3509                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3510                            decap->size >
3511                            MLX5_ENCAPSULATION_DECISION_SIZE)
3512                         /* 2 L2 actions: encap and decap. */
3513                         ;
3514                 else
3515                         return rte_flow_error_set(error,
3516                                 ENOTSUP,
3517                                 RTE_FLOW_ERROR_TYPE_ACTION,
3518                                 NULL, "unsupported too small "
3519                                 "raw decap and too small raw "
3520                                 "encap combination");
3521         }
3522         if (decap) {
3523                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3524                                                     item_flags, attr, error);
3525                 if (ret < 0)
3526                         return ret;
3527                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3528                 ++(*actions_n);
3529         }
3530         if (encap) {
3531                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3532                         return rte_flow_error_set(error, ENOTSUP,
3533                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3534                                                   NULL,
3535                                                   "small raw encap size");
3536                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3537                         return rte_flow_error_set(error, EINVAL,
3538                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3539                                                   NULL,
3540                                                   "more than one encap action");
3541                 if (!attr->transfer && priv->representor)
3542                         return rte_flow_error_set
3543                                         (error, ENOTSUP,
3544                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3545                                          "encap action for VF representor "
3546                                          "not supported on NIC table");
3547                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3548                 ++(*actions_n);
3549         }
3550         return 0;
3551 }
3552
3553 /*
3554  * Validate the ASO CT action.
3555  *
3556  * @param[in] dev
3557  *   Pointer to the rte_eth_dev structure.
3558  * @param[in] action_flags
3559  *   Holds the actions detected until now.
3560  * @param[in] item_flags
3561  *   The items found in this flow rule.
3562  * @param[in] attr
3563  *   Pointer to flow attributes.
3564  * @param[out] error
3565  *   Pointer to error structure.
3566  *
3567  * @return
3568  *   0 on success, a negative errno value otherwise and rte_errno is set.
3569  */
3570 static int
3571 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3572                                uint64_t action_flags,
3573                                uint64_t item_flags,
3574                                const struct rte_flow_attr *attr,
3575                                struct rte_flow_error *error)
3576 {
3577         RTE_SET_USED(dev);
3578
3579         if (attr->group == 0 && !attr->transfer)
3580                 return rte_flow_error_set(error, ENOTSUP,
3581                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3582                                           NULL,
3583                                           "Only support non-root table");
3584         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3585                 return rte_flow_error_set(error, ENOTSUP,
3586                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3587                                           "CT cannot follow a fate action");
3588         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3589             (action_flags & MLX5_FLOW_ACTION_AGE))
3590                 return rte_flow_error_set(error, EINVAL,
3591                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3592                                           "Only one ASO action is supported");
3593         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3594                 return rte_flow_error_set(error, EINVAL,
3595                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3596                                           "Encap cannot exist before CT");
3597         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3598                 return rte_flow_error_set(error, EINVAL,
3599                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3600                                           "Not a outer TCP packet");
3601         return 0;
3602 }
3603
3604 int
3605 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3606                              struct mlx5_list_entry *entry, void *cb_ctx)
3607 {
3608         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3609         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3610         struct mlx5_flow_dv_encap_decap_resource *resource;
3611
3612         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3613                                 entry);
3614         if (resource->reformat_type == ctx_resource->reformat_type &&
3615             resource->ft_type == ctx_resource->ft_type &&
3616             resource->flags == ctx_resource->flags &&
3617             resource->size == ctx_resource->size &&
3618             !memcmp((const void *)resource->buf,
3619                     (const void *)ctx_resource->buf,
3620                     resource->size))
3621                 return 0;
3622         return -1;
3623 }
3624
3625 struct mlx5_list_entry *
3626 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3627 {
3628         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3629         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3630         struct mlx5dv_dr_domain *domain;
3631         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3632         struct mlx5_flow_dv_encap_decap_resource *resource;
3633         uint32_t idx;
3634         int ret;
3635
3636         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3637                 domain = sh->fdb_domain;
3638         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3639                 domain = sh->rx_domain;
3640         else
3641                 domain = sh->tx_domain;
3642         /* Register new encap/decap resource. */
3643         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3644         if (!resource) {
3645                 rte_flow_error_set(ctx->error, ENOMEM,
3646                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3647                                    "cannot allocate resource memory");
3648                 return NULL;
3649         }
3650         *resource = *ctx_resource;
3651         resource->idx = idx;
3652         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3653                                                               domain, resource,
3654                                                              &resource->action);
3655         if (ret) {
3656                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3657                 rte_flow_error_set(ctx->error, ENOMEM,
3658                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3659                                    NULL, "cannot create action");
3660                 return NULL;
3661         }
3662
3663         return &resource->entry;
3664 }
3665
3666 struct mlx5_list_entry *
3667 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3668                              void *cb_ctx)
3669 {
3670         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3671         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3672         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3673         uint32_t idx;
3674
3675         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3676                                            &idx);
3677         if (!cache_resource) {
3678                 rte_flow_error_set(ctx->error, ENOMEM,
3679                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3680                                    "cannot allocate resource memory");
3681                 return NULL;
3682         }
3683         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3684         cache_resource->idx = idx;
3685         return &cache_resource->entry;
3686 }
3687
3688 void
3689 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3690 {
3691         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3692         struct mlx5_flow_dv_encap_decap_resource *res =
3693                                        container_of(entry, typeof(*res), entry);
3694
3695         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3696 }
3697
3698 /**
3699  * Find existing encap/decap resource or create and register a new one.
3700  *
3701  * @param[in, out] dev
3702  *   Pointer to rte_eth_dev structure.
3703  * @param[in, out] resource
3704  *   Pointer to encap/decap resource.
3705  * @parm[in, out] dev_flow
3706  *   Pointer to the dev_flow.
3707  * @param[out] error
3708  *   pointer to error structure.
3709  *
3710  * @return
3711  *   0 on success otherwise -errno and errno is set.
3712  */
3713 static int
3714 flow_dv_encap_decap_resource_register
3715                         (struct rte_eth_dev *dev,
3716                          struct mlx5_flow_dv_encap_decap_resource *resource,
3717                          struct mlx5_flow *dev_flow,
3718                          struct rte_flow_error *error)
3719 {
3720         struct mlx5_priv *priv = dev->data->dev_private;
3721         struct mlx5_dev_ctx_shared *sh = priv->sh;
3722         struct mlx5_list_entry *entry;
3723         union {
3724                 struct {
3725                         uint32_t ft_type:8;
3726                         uint32_t refmt_type:8;
3727                         /*
3728                          * Header reformat actions can be shared between
3729                          * non-root tables. One bit to indicate non-root
3730                          * table or not.
3731                          */
3732                         uint32_t is_root:1;
3733                         uint32_t reserve:15;
3734                 };
3735                 uint32_t v32;
3736         } encap_decap_key = {
3737                 {
3738                         .ft_type = resource->ft_type,
3739                         .refmt_type = resource->reformat_type,
3740                         .is_root = !!dev_flow->dv.group,
3741                         .reserve = 0,
3742                 }
3743         };
3744         struct mlx5_flow_cb_ctx ctx = {
3745                 .error = error,
3746                 .data = resource,
3747         };
3748         struct mlx5_hlist *encaps_decaps;
3749         uint64_t key64;
3750
3751         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3752                                 "encaps_decaps",
3753                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3754                                 true, true, sh,
3755                                 flow_dv_encap_decap_create_cb,
3756                                 flow_dv_encap_decap_match_cb,
3757                                 flow_dv_encap_decap_remove_cb,
3758                                 flow_dv_encap_decap_clone_cb,
3759                                 flow_dv_encap_decap_clone_free_cb,
3760                                 error);
3761         if (unlikely(!encaps_decaps))
3762                 return -rte_errno;
3763         resource->flags = dev_flow->dv.group ? 0 : 1;
3764         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3765                                  sizeof(encap_decap_key.v32), 0);
3766         if (resource->reformat_type !=
3767             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3768             resource->size)
3769                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3770         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3771         if (!entry)
3772                 return -rte_errno;
3773         resource = container_of(entry, typeof(*resource), entry);
3774         dev_flow->dv.encap_decap = resource;
3775         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3776         return 0;
3777 }
3778
3779 /**
3780  * Find existing table jump resource or create and register a new one.
3781  *
3782  * @param[in, out] dev
3783  *   Pointer to rte_eth_dev structure.
3784  * @param[in, out] tbl
3785  *   Pointer to flow table resource.
3786  * @parm[in, out] dev_flow
3787  *   Pointer to the dev_flow.
3788  * @param[out] error
3789  *   pointer to error structure.
3790  *
3791  * @return
3792  *   0 on success otherwise -errno and errno is set.
3793  */
3794 static int
3795 flow_dv_jump_tbl_resource_register
3796                         (struct rte_eth_dev *dev __rte_unused,
3797                          struct mlx5_flow_tbl_resource *tbl,
3798                          struct mlx5_flow *dev_flow,
3799                          struct rte_flow_error *error __rte_unused)
3800 {
3801         struct mlx5_flow_tbl_data_entry *tbl_data =
3802                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3803
3804         MLX5_ASSERT(tbl);
3805         MLX5_ASSERT(tbl_data->jump.action);
3806         dev_flow->handle->rix_jump = tbl_data->idx;
3807         dev_flow->dv.jump = &tbl_data->jump;
3808         return 0;
3809 }
3810
3811 int
3812 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3813                          struct mlx5_list_entry *entry, void *cb_ctx)
3814 {
3815         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3816         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3817         struct mlx5_flow_dv_port_id_action_resource *res =
3818                                        container_of(entry, typeof(*res), entry);
3819
3820         return ref->port_id != res->port_id;
3821 }
3822
3823 struct mlx5_list_entry *
3824 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3825 {
3826         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3827         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3828         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3829         struct mlx5_flow_dv_port_id_action_resource *resource;
3830         uint32_t idx;
3831         int ret;
3832
3833         /* Register new port id action resource. */
3834         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3835         if (!resource) {
3836                 rte_flow_error_set(ctx->error, ENOMEM,
3837                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3838                                    "cannot allocate port_id action memory");
3839                 return NULL;
3840         }
3841         *resource = *ref;
3842         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3843                                                         ref->port_id,
3844                                                         &resource->action);
3845         if (ret) {
3846                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3847                 rte_flow_error_set(ctx->error, ENOMEM,
3848                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3849                                    "cannot create action");
3850                 return NULL;
3851         }
3852         resource->idx = idx;
3853         return &resource->entry;
3854 }
3855
3856 struct mlx5_list_entry *
3857 flow_dv_port_id_clone_cb(void *tool_ctx,
3858                          struct mlx5_list_entry *entry __rte_unused,
3859                          void *cb_ctx)
3860 {
3861         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3862         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3863         struct mlx5_flow_dv_port_id_action_resource *resource;
3864         uint32_t idx;
3865
3866         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3867         if (!resource) {
3868                 rte_flow_error_set(ctx->error, ENOMEM,
3869                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3870                                    "cannot allocate port_id action memory");
3871                 return NULL;
3872         }
3873         memcpy(resource, entry, sizeof(*resource));
3874         resource->idx = idx;
3875         return &resource->entry;
3876 }
3877
3878 void
3879 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3880 {
3881         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3882         struct mlx5_flow_dv_port_id_action_resource *resource =
3883                                   container_of(entry, typeof(*resource), entry);
3884
3885         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3886 }
3887
3888 /**
3889  * Find existing table port ID resource or create and register a new one.
3890  *
3891  * @param[in, out] dev
3892  *   Pointer to rte_eth_dev structure.
3893  * @param[in, out] ref
3894  *   Pointer to port ID action resource reference.
3895  * @parm[in, out] dev_flow
3896  *   Pointer to the dev_flow.
3897  * @param[out] error
3898  *   pointer to error structure.
3899  *
3900  * @return
3901  *   0 on success otherwise -errno and errno is set.
3902  */
3903 static int
3904 flow_dv_port_id_action_resource_register
3905                         (struct rte_eth_dev *dev,
3906                          struct mlx5_flow_dv_port_id_action_resource *ref,
3907                          struct mlx5_flow *dev_flow,
3908                          struct rte_flow_error *error)
3909 {
3910         struct mlx5_priv *priv = dev->data->dev_private;
3911         struct mlx5_list_entry *entry;
3912         struct mlx5_flow_dv_port_id_action_resource *resource;
3913         struct mlx5_flow_cb_ctx ctx = {
3914                 .error = error,
3915                 .data = ref,
3916         };
3917
3918         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3919         if (!entry)
3920                 return -rte_errno;
3921         resource = container_of(entry, typeof(*resource), entry);
3922         dev_flow->dv.port_id_action = resource;
3923         dev_flow->handle->rix_port_id_action = resource->idx;
3924         return 0;
3925 }
3926
3927 int
3928 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3929                            struct mlx5_list_entry *entry, void *cb_ctx)
3930 {
3931         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3932         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3933         struct mlx5_flow_dv_push_vlan_action_resource *res =
3934                                        container_of(entry, typeof(*res), entry);
3935
3936         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3937 }
3938
3939 struct mlx5_list_entry *
3940 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3941 {
3942         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3943         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3944         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3945         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3946         struct mlx5dv_dr_domain *domain;
3947         uint32_t idx;
3948         int ret;
3949
3950         /* Register new port id action resource. */
3951         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3952         if (!resource) {
3953                 rte_flow_error_set(ctx->error, ENOMEM,
3954                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3955                                    "cannot allocate push_vlan action memory");
3956                 return NULL;
3957         }
3958         *resource = *ref;
3959         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3960                 domain = sh->fdb_domain;
3961         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3962                 domain = sh->rx_domain;
3963         else
3964                 domain = sh->tx_domain;
3965         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3966                                                         &resource->action);
3967         if (ret) {
3968                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3969                 rte_flow_error_set(ctx->error, ENOMEM,
3970                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3971                                    "cannot create push vlan action");
3972                 return NULL;
3973         }
3974         resource->idx = idx;
3975         return &resource->entry;
3976 }
3977
3978 struct mlx5_list_entry *
3979 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3980                            struct mlx5_list_entry *entry __rte_unused,
3981                            void *cb_ctx)
3982 {
3983         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3984         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3985         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3986         uint32_t idx;
3987
3988         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3989         if (!resource) {
3990                 rte_flow_error_set(ctx->error, ENOMEM,
3991                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3992                                    "cannot allocate push_vlan action memory");
3993                 return NULL;
3994         }
3995         memcpy(resource, entry, sizeof(*resource));
3996         resource->idx = idx;
3997         return &resource->entry;
3998 }
3999
4000 void
4001 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4002 {
4003         struct mlx5_dev_ctx_shared *sh = tool_ctx;
4004         struct mlx5_flow_dv_push_vlan_action_resource *resource =
4005                                   container_of(entry, typeof(*resource), entry);
4006
4007         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
4008 }
4009
4010 /**
4011  * Find existing push vlan resource or create and register a new one.
4012  *
4013  * @param [in, out] dev
4014  *   Pointer to rte_eth_dev structure.
4015  * @param[in, out] ref
4016  *   Pointer to port ID action resource reference.
4017  * @parm[in, out] dev_flow
4018  *   Pointer to the dev_flow.
4019  * @param[out] error
4020  *   pointer to error structure.
4021  *
4022  * @return
4023  *   0 on success otherwise -errno and errno is set.
4024  */
4025 static int
4026 flow_dv_push_vlan_action_resource_register
4027                        (struct rte_eth_dev *dev,
4028                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4029                         struct mlx5_flow *dev_flow,
4030                         struct rte_flow_error *error)
4031 {
4032         struct mlx5_priv *priv = dev->data->dev_private;
4033         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4034         struct mlx5_list_entry *entry;
4035         struct mlx5_flow_cb_ctx ctx = {
4036                 .error = error,
4037                 .data = ref,
4038         };
4039
4040         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4041         if (!entry)
4042                 return -rte_errno;
4043         resource = container_of(entry, typeof(*resource), entry);
4044
4045         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4046         dev_flow->dv.push_vlan_res = resource;
4047         return 0;
4048 }
4049
4050 /**
4051  * Get the size of specific rte_flow_item_type hdr size
4052  *
4053  * @param[in] item_type
4054  *   Tested rte_flow_item_type.
4055  *
4056  * @return
4057  *   sizeof struct item_type, 0 if void or irrelevant.
4058  */
4059 size_t
4060 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4061 {
4062         size_t retval;
4063
4064         switch (item_type) {
4065         case RTE_FLOW_ITEM_TYPE_ETH:
4066                 retval = sizeof(struct rte_ether_hdr);
4067                 break;
4068         case RTE_FLOW_ITEM_TYPE_VLAN:
4069                 retval = sizeof(struct rte_vlan_hdr);
4070                 break;
4071         case RTE_FLOW_ITEM_TYPE_IPV4:
4072                 retval = sizeof(struct rte_ipv4_hdr);
4073                 break;
4074         case RTE_FLOW_ITEM_TYPE_IPV6:
4075                 retval = sizeof(struct rte_ipv6_hdr);
4076                 break;
4077         case RTE_FLOW_ITEM_TYPE_UDP:
4078                 retval = sizeof(struct rte_udp_hdr);
4079                 break;
4080         case RTE_FLOW_ITEM_TYPE_TCP:
4081                 retval = sizeof(struct rte_tcp_hdr);
4082                 break;
4083         case RTE_FLOW_ITEM_TYPE_VXLAN:
4084         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4085                 retval = sizeof(struct rte_vxlan_hdr);
4086                 break;
4087         case RTE_FLOW_ITEM_TYPE_GRE:
4088         case RTE_FLOW_ITEM_TYPE_NVGRE:
4089                 retval = sizeof(struct rte_gre_hdr);
4090                 break;
4091         case RTE_FLOW_ITEM_TYPE_MPLS:
4092                 retval = sizeof(struct rte_mpls_hdr);
4093                 break;
4094         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4095         default:
4096                 retval = 0;
4097                 break;
4098         }
4099         return retval;
4100 }
4101
4102 #define MLX5_ENCAP_IPV4_VERSION         0x40
4103 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4104 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4105 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4106 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4107 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4108 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4109
4110 /**
4111  * Convert the encap action data from list of rte_flow_item to raw buffer
4112  *
4113  * @param[in] items
4114  *   Pointer to rte_flow_item objects list.
4115  * @param[out] buf
4116  *   Pointer to the output buffer.
4117  * @param[out] size
4118  *   Pointer to the output buffer size.
4119  * @param[out] error
4120  *   Pointer to the error structure.
4121  *
4122  * @return
4123  *   0 on success, a negative errno value otherwise and rte_errno is set.
4124  */
4125 int
4126 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4127                            size_t *size, struct rte_flow_error *error)
4128 {
4129         struct rte_ether_hdr *eth = NULL;
4130         struct rte_vlan_hdr *vlan = NULL;
4131         struct rte_ipv4_hdr *ipv4 = NULL;
4132         struct rte_ipv6_hdr *ipv6 = NULL;
4133         struct rte_udp_hdr *udp = NULL;
4134         struct rte_vxlan_hdr *vxlan = NULL;
4135         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4136         struct rte_gre_hdr *gre = NULL;
4137         size_t len;
4138         size_t temp_size = 0;
4139
4140         if (!items)
4141                 return rte_flow_error_set(error, EINVAL,
4142                                           RTE_FLOW_ERROR_TYPE_ACTION,
4143                                           NULL, "invalid empty data");
4144         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4145                 len = flow_dv_get_item_hdr_len(items->type);
4146                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4147                         return rte_flow_error_set(error, EINVAL,
4148                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4149                                                   (void *)items->type,
4150                                                   "items total size is too big"
4151                                                   " for encap action");
4152                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4153                 switch (items->type) {
4154                 case RTE_FLOW_ITEM_TYPE_ETH:
4155                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4156                         break;
4157                 case RTE_FLOW_ITEM_TYPE_VLAN:
4158                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4159                         if (!eth)
4160                                 return rte_flow_error_set(error, EINVAL,
4161                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4162                                                 (void *)items->type,
4163                                                 "eth header not found");
4164                         if (!eth->ether_type)
4165                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4166                         break;
4167                 case RTE_FLOW_ITEM_TYPE_IPV4:
4168                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4169                         if (!vlan && !eth)
4170                                 return rte_flow_error_set(error, EINVAL,
4171                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4172                                                 (void *)items->type,
4173                                                 "neither eth nor vlan"
4174                                                 " header found");
4175                         if (vlan && !vlan->eth_proto)
4176                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4177                         else if (eth && !eth->ether_type)
4178                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4179                         if (!ipv4->version_ihl)
4180                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4181                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4182                         if (!ipv4->time_to_live)
4183                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4184                         break;
4185                 case RTE_FLOW_ITEM_TYPE_IPV6:
4186                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4187                         if (!vlan && !eth)
4188                                 return rte_flow_error_set(error, EINVAL,
4189                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4190                                                 (void *)items->type,
4191                                                 "neither eth nor vlan"
4192                                                 " header found");
4193                         if (vlan && !vlan->eth_proto)
4194                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4195                         else if (eth && !eth->ether_type)
4196                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4197                         if (!ipv6->vtc_flow)
4198                                 ipv6->vtc_flow =
4199                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4200                         if (!ipv6->hop_limits)
4201                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4202                         break;
4203                 case RTE_FLOW_ITEM_TYPE_UDP:
4204                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4205                         if (!ipv4 && !ipv6)
4206                                 return rte_flow_error_set(error, EINVAL,
4207                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4208                                                 (void *)items->type,
4209                                                 "ip header not found");
4210                         if (ipv4 && !ipv4->next_proto_id)
4211                                 ipv4->next_proto_id = IPPROTO_UDP;
4212                         else if (ipv6 && !ipv6->proto)
4213                                 ipv6->proto = IPPROTO_UDP;
4214                         break;
4215                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4216                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4217                         if (!udp)
4218                                 return rte_flow_error_set(error, EINVAL,
4219                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4220                                                 (void *)items->type,
4221                                                 "udp header not found");
4222                         if (!udp->dst_port)
4223                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4224                         if (!vxlan->vx_flags)
4225                                 vxlan->vx_flags =
4226                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4227                         break;
4228                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4229                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4230                         if (!udp)
4231                                 return rte_flow_error_set(error, EINVAL,
4232                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4233                                                 (void *)items->type,
4234                                                 "udp header not found");
4235                         if (!vxlan_gpe->proto)
4236                                 return rte_flow_error_set(error, EINVAL,
4237                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4238                                                 (void *)items->type,
4239                                                 "next protocol not found");
4240                         if (!udp->dst_port)
4241                                 udp->dst_port =
4242                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4243                         if (!vxlan_gpe->vx_flags)
4244                                 vxlan_gpe->vx_flags =
4245                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4246                         break;
4247                 case RTE_FLOW_ITEM_TYPE_GRE:
4248                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4249                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4250                         if (!gre->proto)
4251                                 return rte_flow_error_set(error, EINVAL,
4252                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4253                                                 (void *)items->type,
4254                                                 "next protocol not found");
4255                         if (!ipv4 && !ipv6)
4256                                 return rte_flow_error_set(error, EINVAL,
4257                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4258                                                 (void *)items->type,
4259                                                 "ip header not found");
4260                         if (ipv4 && !ipv4->next_proto_id)
4261                                 ipv4->next_proto_id = IPPROTO_GRE;
4262                         else if (ipv6 && !ipv6->proto)
4263                                 ipv6->proto = IPPROTO_GRE;
4264                         break;
4265                 case RTE_FLOW_ITEM_TYPE_VOID:
4266                         break;
4267                 default:
4268                         return rte_flow_error_set(error, EINVAL,
4269                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4270                                                   (void *)items->type,
4271                                                   "unsupported item type");
4272                         break;
4273                 }
4274                 temp_size += len;
4275         }
4276         *size = temp_size;
4277         return 0;
4278 }
4279
4280 static int
4281 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4282 {
4283         struct rte_ether_hdr *eth = NULL;
4284         struct rte_vlan_hdr *vlan = NULL;
4285         struct rte_ipv6_hdr *ipv6 = NULL;
4286         struct rte_udp_hdr *udp = NULL;
4287         char *next_hdr;
4288         uint16_t proto;
4289
4290         eth = (struct rte_ether_hdr *)data;
4291         next_hdr = (char *)(eth + 1);
4292         proto = RTE_BE16(eth->ether_type);
4293
4294         /* VLAN skipping */
4295         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4296                 vlan = (struct rte_vlan_hdr *)next_hdr;
4297                 proto = RTE_BE16(vlan->eth_proto);
4298                 next_hdr += sizeof(struct rte_vlan_hdr);
4299         }
4300
4301         /* HW calculates IPv4 csum. no need to proceed */
4302         if (proto == RTE_ETHER_TYPE_IPV4)
4303                 return 0;
4304
4305         /* non IPv4/IPv6 header. not supported */
4306         if (proto != RTE_ETHER_TYPE_IPV6) {
4307                 return rte_flow_error_set(error, ENOTSUP,
4308                                           RTE_FLOW_ERROR_TYPE_ACTION,
4309                                           NULL, "Cannot offload non IPv4/IPv6");
4310         }
4311
4312         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4313
4314         /* ignore non UDP */
4315         if (ipv6->proto != IPPROTO_UDP)
4316                 return 0;
4317
4318         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4319         udp->dgram_cksum = 0;
4320
4321         return 0;
4322 }
4323
4324 /**
4325  * Convert L2 encap action to DV specification.
4326  *
4327  * @param[in] dev
4328  *   Pointer to rte_eth_dev structure.
4329  * @param[in] action
4330  *   Pointer to action structure.
4331  * @param[in, out] dev_flow
4332  *   Pointer to the mlx5_flow.
4333  * @param[in] transfer
4334  *   Mark if the flow is E-Switch flow.
4335  * @param[out] error
4336  *   Pointer to the error structure.
4337  *
4338  * @return
4339  *   0 on success, a negative errno value otherwise and rte_errno is set.
4340  */
4341 static int
4342 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4343                                const struct rte_flow_action *action,
4344                                struct mlx5_flow *dev_flow,
4345                                uint8_t transfer,
4346                                struct rte_flow_error *error)
4347 {
4348         const struct rte_flow_item *encap_data;
4349         const struct rte_flow_action_raw_encap *raw_encap_data;
4350         struct mlx5_flow_dv_encap_decap_resource res = {
4351                 .reformat_type =
4352                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4353                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4354                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4355         };
4356
4357         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4358                 raw_encap_data =
4359                         (const struct rte_flow_action_raw_encap *)action->conf;
4360                 res.size = raw_encap_data->size;
4361                 memcpy(res.buf, raw_encap_data->data, res.size);
4362         } else {
4363                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4364                         encap_data =
4365                                 ((const struct rte_flow_action_vxlan_encap *)
4366                                                 action->conf)->definition;
4367                 else
4368                         encap_data =
4369                                 ((const struct rte_flow_action_nvgre_encap *)
4370                                                 action->conf)->definition;
4371                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4372                                                &res.size, error))
4373                         return -rte_errno;
4374         }
4375         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4376                 return -rte_errno;
4377         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4378                 return rte_flow_error_set(error, EINVAL,
4379                                           RTE_FLOW_ERROR_TYPE_ACTION,
4380                                           NULL, "can't create L2 encap action");
4381         return 0;
4382 }
4383
4384 /**
4385  * Convert L2 decap action to DV specification.
4386  *
4387  * @param[in] dev
4388  *   Pointer to rte_eth_dev structure.
4389  * @param[in, out] dev_flow
4390  *   Pointer to the mlx5_flow.
4391  * @param[in] transfer
4392  *   Mark if the flow is E-Switch flow.
4393  * @param[out] error
4394  *   Pointer to the error structure.
4395  *
4396  * @return
4397  *   0 on success, a negative errno value otherwise and rte_errno is set.
4398  */
4399 static int
4400 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4401                                struct mlx5_flow *dev_flow,
4402                                uint8_t transfer,
4403                                struct rte_flow_error *error)
4404 {
4405         struct mlx5_flow_dv_encap_decap_resource res = {
4406                 .size = 0,
4407                 .reformat_type =
4408                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4409                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4410                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4411         };
4412
4413         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4414                 return rte_flow_error_set(error, EINVAL,
4415                                           RTE_FLOW_ERROR_TYPE_ACTION,
4416                                           NULL, "can't create L2 decap action");
4417         return 0;
4418 }
4419
4420 /**
4421  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4422  *
4423  * @param[in] dev
4424  *   Pointer to rte_eth_dev structure.
4425  * @param[in] action
4426  *   Pointer to action structure.
4427  * @param[in, out] dev_flow
4428  *   Pointer to the mlx5_flow.
4429  * @param[in] attr
4430  *   Pointer to the flow attributes.
4431  * @param[out] error
4432  *   Pointer to the error structure.
4433  *
4434  * @return
4435  *   0 on success, a negative errno value otherwise and rte_errno is set.
4436  */
4437 static int
4438 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4439                                 const struct rte_flow_action *action,
4440                                 struct mlx5_flow *dev_flow,
4441                                 const struct rte_flow_attr *attr,
4442                                 struct rte_flow_error *error)
4443 {
4444         const struct rte_flow_action_raw_encap *encap_data;
4445         struct mlx5_flow_dv_encap_decap_resource res;
4446
4447         memset(&res, 0, sizeof(res));
4448         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4449         res.size = encap_data->size;
4450         memcpy(res.buf, encap_data->data, res.size);
4451         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4452                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4453                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4454         if (attr->transfer)
4455                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4456         else
4457                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4458                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4459         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4460                 return rte_flow_error_set(error, EINVAL,
4461                                           RTE_FLOW_ERROR_TYPE_ACTION,
4462                                           NULL, "can't create encap action");
4463         return 0;
4464 }
4465
4466 /**
4467  * Create action push VLAN.
4468  *
4469  * @param[in] dev
4470  *   Pointer to rte_eth_dev structure.
4471  * @param[in] attr
4472  *   Pointer to the flow attributes.
4473  * @param[in] vlan
4474  *   Pointer to the vlan to push to the Ethernet header.
4475  * @param[in, out] dev_flow
4476  *   Pointer to the mlx5_flow.
4477  * @param[out] error
4478  *   Pointer to the error structure.
4479  *
4480  * @return
4481  *   0 on success, a negative errno value otherwise and rte_errno is set.
4482  */
4483 static int
4484 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4485                                 const struct rte_flow_attr *attr,
4486                                 const struct rte_vlan_hdr *vlan,
4487                                 struct mlx5_flow *dev_flow,
4488                                 struct rte_flow_error *error)
4489 {
4490         struct mlx5_flow_dv_push_vlan_action_resource res;
4491
4492         memset(&res, 0, sizeof(res));
4493         res.vlan_tag =
4494                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4495                                  vlan->vlan_tci);
4496         if (attr->transfer)
4497                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4498         else
4499                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4500                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4501         return flow_dv_push_vlan_action_resource_register
4502                                             (dev, &res, dev_flow, error);
4503 }
4504
4505 /**
4506  * Validate the modify-header actions.
4507  *
4508  * @param[in] action_flags
4509  *   Holds the actions detected until now.
4510  * @param[in] action
4511  *   Pointer to the modify action.
4512  * @param[out] error
4513  *   Pointer to error structure.
4514  *
4515  * @return
4516  *   0 on success, a negative errno value otherwise and rte_errno is set.
4517  */
4518 static int
4519 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4520                                    const struct rte_flow_action *action,
4521                                    struct rte_flow_error *error)
4522 {
4523         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4524                 return rte_flow_error_set(error, EINVAL,
4525                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4526                                           NULL, "action configuration not set");
4527         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4528                 return rte_flow_error_set(error, EINVAL,
4529                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4530                                           "can't have encap action before"
4531                                           " modify action");
4532         return 0;
4533 }
4534
4535 /**
4536  * Validate the modify-header MAC address actions.
4537  *
4538  * @param[in] action_flags
4539  *   Holds the actions detected until now.
4540  * @param[in] action
4541  *   Pointer to the modify action.
4542  * @param[in] item_flags
4543  *   Holds the items detected.
4544  * @param[out] error
4545  *   Pointer to error structure.
4546  *
4547  * @return
4548  *   0 on success, a negative errno value otherwise and rte_errno is set.
4549  */
4550 static int
4551 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4552                                    const struct rte_flow_action *action,
4553                                    const uint64_t item_flags,
4554                                    struct rte_flow_error *error)
4555 {
4556         int ret = 0;
4557
4558         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4559         if (!ret) {
4560                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4561                         return rte_flow_error_set(error, EINVAL,
4562                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4563                                                   NULL,
4564                                                   "no L2 item in pattern");
4565         }
4566         return ret;
4567 }
4568
4569 /**
4570  * Validate the modify-header IPv4 address actions.
4571  *
4572  * @param[in] action_flags
4573  *   Holds the actions detected until now.
4574  * @param[in] action
4575  *   Pointer to the modify action.
4576  * @param[in] item_flags
4577  *   Holds the items detected.
4578  * @param[out] error
4579  *   Pointer to error structure.
4580  *
4581  * @return
4582  *   0 on success, a negative errno value otherwise and rte_errno is set.
4583  */
4584 static int
4585 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4586                                     const struct rte_flow_action *action,
4587                                     const uint64_t item_flags,
4588                                     struct rte_flow_error *error)
4589 {
4590         int ret = 0;
4591         uint64_t layer;
4592
4593         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4594         if (!ret) {
4595                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4596                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4597                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4598                 if (!(item_flags & layer))
4599                         return rte_flow_error_set(error, EINVAL,
4600                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4601                                                   NULL,
4602                                                   "no ipv4 item in pattern");
4603         }
4604         return ret;
4605 }
4606
4607 /**
4608  * Validate the modify-header IPv6 address actions.
4609  *
4610  * @param[in] action_flags
4611  *   Holds the actions detected until now.
4612  * @param[in] action
4613  *   Pointer to the modify action.
4614  * @param[in] item_flags
4615  *   Holds the items detected.
4616  * @param[out] error
4617  *   Pointer to error structure.
4618  *
4619  * @return
4620  *   0 on success, a negative errno value otherwise and rte_errno is set.
4621  */
4622 static int
4623 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4624                                     const struct rte_flow_action *action,
4625                                     const uint64_t item_flags,
4626                                     struct rte_flow_error *error)
4627 {
4628         int ret = 0;
4629         uint64_t layer;
4630
4631         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4632         if (!ret) {
4633                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4634                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4635                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4636                 if (!(item_flags & layer))
4637                         return rte_flow_error_set(error, EINVAL,
4638                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4639                                                   NULL,
4640                                                   "no ipv6 item in pattern");
4641         }
4642         return ret;
4643 }
4644
4645 /**
4646  * Validate the modify-header TP actions.
4647  *
4648  * @param[in] action_flags
4649  *   Holds the actions detected until now.
4650  * @param[in] action
4651  *   Pointer to the modify action.
4652  * @param[in] item_flags
4653  *   Holds the items detected.
4654  * @param[out] error
4655  *   Pointer to error structure.
4656  *
4657  * @return
4658  *   0 on success, a negative errno value otherwise and rte_errno is set.
4659  */
4660 static int
4661 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4662                                   const struct rte_flow_action *action,
4663                                   const uint64_t item_flags,
4664                                   struct rte_flow_error *error)
4665 {
4666         int ret = 0;
4667         uint64_t layer;
4668
4669         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4670         if (!ret) {
4671                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4672                                  MLX5_FLOW_LAYER_INNER_L4 :
4673                                  MLX5_FLOW_LAYER_OUTER_L4;
4674                 if (!(item_flags & layer))
4675                         return rte_flow_error_set(error, EINVAL,
4676                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4677                                                   NULL, "no transport layer "
4678                                                   "in pattern");
4679         }
4680         return ret;
4681 }
4682
4683 /**
4684  * Validate the modify-header actions of increment/decrement
4685  * TCP Sequence-number.
4686  *
4687  * @param[in] action_flags
4688  *   Holds the actions detected until now.
4689  * @param[in] action
4690  *   Pointer to the modify action.
4691  * @param[in] item_flags
4692  *   Holds the items detected.
4693  * @param[out] error
4694  *   Pointer to error structure.
4695  *
4696  * @return
4697  *   0 on success, a negative errno value otherwise and rte_errno is set.
4698  */
4699 static int
4700 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4701                                        const struct rte_flow_action *action,
4702                                        const uint64_t item_flags,
4703                                        struct rte_flow_error *error)
4704 {
4705         int ret = 0;
4706         uint64_t layer;
4707
4708         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4709         if (!ret) {
4710                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4711                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4712                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4713                 if (!(item_flags & layer))
4714                         return rte_flow_error_set(error, EINVAL,
4715                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4716                                                   NULL, "no TCP item in"
4717                                                   " pattern");
4718                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4719                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4720                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4721                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4722                         return rte_flow_error_set(error, EINVAL,
4723                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4724                                                   NULL,
4725                                                   "cannot decrease and increase"
4726                                                   " TCP sequence number"
4727                                                   " at the same time");
4728         }
4729         return ret;
4730 }
4731
4732 /**
4733  * Validate the modify-header actions of increment/decrement
4734  * TCP Acknowledgment number.
4735  *
4736  * @param[in] action_flags
4737  *   Holds the actions detected until now.
4738  * @param[in] action
4739  *   Pointer to the modify action.
4740  * @param[in] item_flags
4741  *   Holds the items detected.
4742  * @param[out] error
4743  *   Pointer to error structure.
4744  *
4745  * @return
4746  *   0 on success, a negative errno value otherwise and rte_errno is set.
4747  */
4748 static int
4749 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4750                                        const struct rte_flow_action *action,
4751                                        const uint64_t item_flags,
4752                                        struct rte_flow_error *error)
4753 {
4754         int ret = 0;
4755         uint64_t layer;
4756
4757         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4758         if (!ret) {
4759                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4760                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4761                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4762                 if (!(item_flags & layer))
4763                         return rte_flow_error_set(error, EINVAL,
4764                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4765                                                   NULL, "no TCP item in"
4766                                                   " pattern");
4767                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4768                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4769                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4770                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4771                         return rte_flow_error_set(error, EINVAL,
4772                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4773                                                   NULL,
4774                                                   "cannot decrease and increase"
4775                                                   " TCP acknowledgment number"
4776                                                   " at the same time");
4777         }
4778         return ret;
4779 }
4780
4781 /**
4782  * Validate the modify-header TTL actions.
4783  *
4784  * @param[in] action_flags
4785  *   Holds the actions detected until now.
4786  * @param[in] action
4787  *   Pointer to the modify action.
4788  * @param[in] item_flags
4789  *   Holds the items detected.
4790  * @param[out] error
4791  *   Pointer to error structure.
4792  *
4793  * @return
4794  *   0 on success, a negative errno value otherwise and rte_errno is set.
4795  */
4796 static int
4797 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4798                                    const struct rte_flow_action *action,
4799                                    const uint64_t item_flags,
4800                                    struct rte_flow_error *error)
4801 {
4802         int ret = 0;
4803         uint64_t layer;
4804
4805         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4806         if (!ret) {
4807                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4808                                  MLX5_FLOW_LAYER_INNER_L3 :
4809                                  MLX5_FLOW_LAYER_OUTER_L3;
4810                 if (!(item_flags & layer))
4811                         return rte_flow_error_set(error, EINVAL,
4812                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4813                                                   NULL,
4814                                                   "no IP protocol in pattern");
4815         }
4816         return ret;
4817 }
4818
4819 /**
4820  * Validate the generic modify field actions.
4821  * @param[in] dev
4822  *   Pointer to the rte_eth_dev structure.
4823  * @param[in] action_flags
4824  *   Holds the actions detected until now.
4825  * @param[in] action
4826  *   Pointer to the modify action.
4827  * @param[in] attr
4828  *   Pointer to the flow attributes.
4829  * @param[out] error
4830  *   Pointer to error structure.
4831  *
4832  * @return
4833  *   Number of header fields to modify (0 or more) on success,
4834  *   a negative errno value otherwise and rte_errno is set.
4835  */
4836 static int
4837 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4838                                    const uint64_t action_flags,
4839                                    const struct rte_flow_action *action,
4840                                    const struct rte_flow_attr *attr,
4841                                    struct rte_flow_error *error)
4842 {
4843         int ret = 0;
4844         struct mlx5_priv *priv = dev->data->dev_private;
4845         struct mlx5_sh_config *config = &priv->sh->config;
4846         const struct rte_flow_action_modify_field *action_modify_field =
4847                 action->conf;
4848         uint32_t dst_width = mlx5_flow_item_field_width(dev,
4849                                 action_modify_field->dst.field,
4850                                 -1, attr, error);
4851         uint32_t src_width = mlx5_flow_item_field_width(dev,
4852                                 action_modify_field->src.field,
4853                                 dst_width, attr, error);
4854
4855         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4856         if (ret)
4857                 return ret;
4858
4859         if (action_modify_field->width == 0)
4860                 return rte_flow_error_set(error, EINVAL,
4861                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4862                                 "no bits are requested to be modified");
4863         else if (action_modify_field->width > dst_width ||
4864                  action_modify_field->width > src_width)
4865                 return rte_flow_error_set(error, EINVAL,
4866                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4867                                 "cannot modify more bits than"
4868                                 " the width of a field");
4869         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4870             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4871                 if ((action_modify_field->dst.offset +
4872                      action_modify_field->width > dst_width) ||
4873                     (action_modify_field->dst.offset % 32))
4874                         return rte_flow_error_set(error, EINVAL,
4875                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4876                                         "destination offset is too big"
4877                                         " or not aligned to 4 bytes");
4878                 if (action_modify_field->dst.level &&
4879                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4880                         return rte_flow_error_set(error, ENOTSUP,
4881                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4882                                         "inner header fields modification"
4883                                         " is not supported");
4884         }
4885         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4886             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4887                 if (!attr->transfer && !attr->group)
4888                         return rte_flow_error_set(error, ENOTSUP,
4889                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4890                                         "modify field action is not"
4891                                         " supported for group 0");
4892                 if ((action_modify_field->src.offset +
4893                      action_modify_field->width > src_width) ||
4894                     (action_modify_field->src.offset % 32))
4895                         return rte_flow_error_set(error, EINVAL,
4896                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4897                                         "source offset is too big"
4898                                         " or not aligned to 4 bytes");
4899                 if (action_modify_field->src.level &&
4900                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4901                         return rte_flow_error_set(error, ENOTSUP,
4902                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4903                                         "inner header fields modification"
4904                                         " is not supported");
4905         }
4906         if ((action_modify_field->dst.field ==
4907              action_modify_field->src.field) &&
4908             (action_modify_field->dst.level ==
4909              action_modify_field->src.level))
4910                 return rte_flow_error_set(error, EINVAL,
4911                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4912                                 "source and destination fields"
4913                                 " cannot be the same");
4914         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4915             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4916             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4917                 return rte_flow_error_set(error, EINVAL,
4918                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4919                                 "mark, immediate value or a pointer to it"
4920                                 " cannot be used as a destination");
4921         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4922             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4923                 return rte_flow_error_set(error, ENOTSUP,
4924                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4925                                 "modifications of an arbitrary"
4926                                 " place in a packet is not supported");
4927         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4928             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4929                 return rte_flow_error_set(error, ENOTSUP,
4930                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4931                                 "modifications of the 802.1Q Tag"
4932                                 " Identifier is not supported");
4933         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4934             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4935                 return rte_flow_error_set(error, ENOTSUP,
4936                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4937                                 "modifications of the VXLAN Network"
4938                                 " Identifier is not supported");
4939         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4940             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4941                 return rte_flow_error_set(error, ENOTSUP,
4942                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4943                                 "modifications of the GENEVE Network"
4944                                 " Identifier is not supported");
4945         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4946             action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4947                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4948                     !mlx5_flow_ext_mreg_supported(dev))
4949                         return rte_flow_error_set(error, ENOTSUP,
4950                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4951                                         "cannot modify mark in legacy mode"
4952                                         " or without extensive registers");
4953         if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4954             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4955                 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4956                     !mlx5_flow_ext_mreg_supported(dev))
4957                         return rte_flow_error_set(error, ENOTSUP,
4958                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4959                                         "cannot modify meta without"
4960                                         " extensive registers support");
4961                 ret = flow_dv_get_metadata_reg(dev, attr, error);
4962                 if (ret < 0 || ret == REG_NON)
4963                         return rte_flow_error_set(error, ENOTSUP,
4964                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4965                                         "cannot modify meta without"
4966                                         " extensive registers available");
4967         }
4968         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4969                 return rte_flow_error_set(error, ENOTSUP,
4970                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4971                                 "add and sub operations"
4972                                 " are not supported");
4973         return (action_modify_field->width / 32) +
4974                !!(action_modify_field->width % 32);
4975 }
4976
4977 /**
4978  * Validate jump action.
4979  *
4980  * @param[in] action
4981  *   Pointer to the jump action.
4982  * @param[in] action_flags
4983  *   Holds the actions detected until now.
4984  * @param[in] attributes
4985  *   Pointer to flow attributes
4986  * @param[in] external
4987  *   Action belongs to flow rule created by request external to PMD.
4988  * @param[out] error
4989  *   Pointer to error structure.
4990  *
4991  * @return
4992  *   0 on success, a negative errno value otherwise and rte_errno is set.
4993  */
4994 static int
4995 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4996                              const struct mlx5_flow_tunnel *tunnel,
4997                              const struct rte_flow_action *action,
4998                              uint64_t action_flags,
4999                              const struct rte_flow_attr *attributes,
5000                              bool external, struct rte_flow_error *error)
5001 {
5002         uint32_t target_group, table = 0;
5003         int ret = 0;
5004         struct flow_grp_info grp_info = {
5005                 .external = !!external,
5006                 .transfer = !!attributes->transfer,
5007                 .fdb_def_rule = 1,
5008                 .std_tbl_fix = 0
5009         };
5010         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5011                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5012                 return rte_flow_error_set(error, EINVAL,
5013                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5014                                           "can't have 2 fate actions in"
5015                                           " same flow");
5016         if (!action->conf)
5017                 return rte_flow_error_set(error, EINVAL,
5018                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5019                                           NULL, "action configuration not set");
5020         target_group =
5021                 ((const struct rte_flow_action_jump *)action->conf)->group;
5022         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5023                                        &grp_info, error);
5024         if (ret)
5025                 return ret;
5026         if (attributes->group == target_group &&
5027             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5028                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5029                 return rte_flow_error_set(error, EINVAL,
5030                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5031                                           "target group must be other than"
5032                                           " the current flow group");
5033         if (table == 0)
5034                 return rte_flow_error_set(error, EINVAL,
5035                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5036                                           NULL, "root table shouldn't be destination");
5037         return 0;
5038 }
5039
5040 /*
5041  * Validate action PORT_ID / REPRESENTED_PORT.
5042  *
5043  * @param[in] dev
5044  *   Pointer to rte_eth_dev structure.
5045  * @param[in] action_flags
5046  *   Bit-fields that holds the actions detected until now.
5047  * @param[in] action
5048  *   PORT_ID / REPRESENTED_PORT action structure.
5049  * @param[in] attr
5050  *   Attributes of flow that includes this action.
5051  * @param[out] error
5052  *   Pointer to error structure.
5053  *
5054  * @return
5055  *   0 on success, a negative errno value otherwise and rte_errno is set.
5056  */
5057 static int
5058 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5059                                 uint64_t action_flags,
5060                                 const struct rte_flow_action *action,
5061                                 const struct rte_flow_attr *attr,
5062                                 struct rte_flow_error *error)
5063 {
5064         const struct rte_flow_action_port_id *port_id;
5065         const struct rte_flow_action_ethdev *ethdev;
5066         struct mlx5_priv *act_priv;
5067         struct mlx5_priv *dev_priv;
5068         uint16_t port;
5069
5070         if (!attr->transfer)
5071                 return rte_flow_error_set(error, ENOTSUP,
5072                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5073                                           NULL,
5074                                           "port action is valid in transfer"
5075                                           " mode only");
5076         if (!action || !action->conf)
5077                 return rte_flow_error_set(error, ENOTSUP,
5078                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5079                                           NULL,
5080                                           "port action parameters must be"
5081                                           " specified");
5082         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5083                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5084                 return rte_flow_error_set(error, EINVAL,
5085                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5086                                           "can have only one fate actions in"
5087                                           " a flow");
5088         dev_priv = mlx5_dev_to_eswitch_info(dev);
5089         if (!dev_priv)
5090                 return rte_flow_error_set(error, rte_errno,
5091                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5092                                           NULL,
5093                                           "failed to obtain E-Switch info");
5094         switch (action->type) {
5095         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5096                 port_id = action->conf;
5097                 port = port_id->original ? dev->data->port_id : port_id->id;
5098                 break;
5099         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5100                 ethdev = action->conf;
5101                 port = ethdev->port_id;
5102                 break;
5103         default:
5104                 MLX5_ASSERT(false);
5105                 return rte_flow_error_set
5106                                 (error, EINVAL,
5107                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5108                                  "unknown E-Switch action");
5109         }
5110         act_priv = mlx5_port_to_eswitch_info(port, false);
5111         if (!act_priv)
5112                 return rte_flow_error_set
5113                                 (error, rte_errno,
5114                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5115                                  "failed to obtain E-Switch port id for port");
5116         if (act_priv->domain_id != dev_priv->domain_id)
5117                 return rte_flow_error_set
5118                                 (error, EINVAL,
5119                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5120                                  "port does not belong to"
5121                                  " E-Switch being configured");
5122         return 0;
5123 }
5124
5125 /**
5126  * Get the maximum number of modify header actions.
5127  *
5128  * @param dev
5129  *   Pointer to rte_eth_dev structure.
5130  * @param root
5131  *   Whether action is on root table.
5132  *
5133  * @return
5134  *   Max number of modify header actions device can support.
5135  */
5136 static inline unsigned int
5137 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5138                               bool root)
5139 {
5140         /*
5141          * There's no way to directly query the max capacity from FW.
5142          * The maximal value on root table should be assumed to be supported.
5143          */
5144         if (!root)
5145                 return MLX5_MAX_MODIFY_NUM;
5146         else
5147                 return MLX5_ROOT_TBL_MODIFY_NUM;
5148 }
5149
5150 /**
5151  * Validate the meter action.
5152  *
5153  * @param[in] dev
5154  *   Pointer to rte_eth_dev structure.
5155  * @param[in] action_flags
5156  *   Bit-fields that holds the actions detected until now.
5157  * @param[in] item_flags
5158  *   Holds the items detected.
5159  * @param[in] action
5160  *   Pointer to the meter action.
5161  * @param[in] attr
5162  *   Attributes of flow that includes this action.
5163  * @param[in] port_id_item
5164  *   Pointer to item indicating port id.
5165  * @param[out] error
5166  *   Pointer to error structure.
5167  *
5168  * @return
5169  *   0 on success, a negative errno value otherwise and rte_errno is set.
5170  */
5171 static int
5172 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5173                                 uint64_t action_flags, uint64_t item_flags,
5174                                 const struct rte_flow_action *action,
5175                                 const struct rte_flow_attr *attr,
5176                                 const struct rte_flow_item *port_id_item,
5177                                 bool *def_policy,
5178                                 struct rte_flow_error *error)
5179 {
5180         struct mlx5_priv *priv = dev->data->dev_private;
5181         const struct rte_flow_action_meter *am = action->conf;
5182         struct mlx5_flow_meter_info *fm;
5183         struct mlx5_flow_meter_policy *mtr_policy;
5184         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5185
5186         if (!am)
5187                 return rte_flow_error_set(error, EINVAL,
5188                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5189                                           "meter action conf is NULL");
5190
5191         if (action_flags & MLX5_FLOW_ACTION_METER)
5192                 return rte_flow_error_set(error, ENOTSUP,
5193                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5194                                           "meter chaining not support");
5195         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5196                 return rte_flow_error_set(error, ENOTSUP,
5197                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5198                                           "meter with jump not support");
5199         if (!priv->mtr_en)
5200                 return rte_flow_error_set(error, ENOTSUP,
5201                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5202                                           NULL,
5203                                           "meter action not supported");
5204         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5205         if (!fm)
5206                 return rte_flow_error_set(error, EINVAL,
5207                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5208                                           "Meter not found");
5209         /* aso meter can always be shared by different domains */
5210         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5211             !(fm->transfer == attr->transfer ||
5212               (!fm->ingress && !attr->ingress && attr->egress) ||
5213               (!fm->egress && !attr->egress && attr->ingress)))
5214                 return rte_flow_error_set(error, EINVAL,
5215                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5216                         "Flow attributes domain are either invalid "
5217                         "or have a domain conflict with current "
5218                         "meter attributes");
5219         if (fm->def_policy) {
5220                 if (!((attr->transfer &&
5221                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5222                         (attr->egress &&
5223                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5224                         (attr->ingress &&
5225                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5226                         return rte_flow_error_set(error, EINVAL,
5227                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5228                                           "Flow attributes domain "
5229                                           "have a conflict with current "
5230                                           "meter domain attributes");
5231                 *def_policy = true;
5232         } else {
5233                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5234                                                 fm->policy_id, NULL);
5235                 if (!mtr_policy)
5236                         return rte_flow_error_set(error, EINVAL,
5237                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5238                                           "Invalid policy id for meter ");
5239                 if (!((attr->transfer && mtr_policy->transfer) ||
5240                         (attr->egress && mtr_policy->egress) ||
5241                         (attr->ingress && mtr_policy->ingress)))
5242                         return rte_flow_error_set(error, EINVAL,
5243                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5244                                           "Flow attributes domain "
5245                                           "have a conflict with current "
5246                                           "meter domain attributes");
5247                 if (attr->transfer && mtr_policy->dev) {
5248                         /**
5249                          * When policy has fate action of port_id,
5250                          * the flow should have the same src port as policy.
5251                          */
5252                         struct mlx5_priv *policy_port_priv =
5253                                         mtr_policy->dev->data->dev_private;
5254                         int32_t flow_src_port = priv->representor_id;
5255
5256                         if (port_id_item) {
5257                                 const struct rte_flow_item_port_id *spec =
5258                                                         port_id_item->spec;
5259                                 struct mlx5_priv *port_priv =
5260                                         mlx5_port_to_eswitch_info(spec->id,
5261                                                                   false);
5262                                 if (!port_priv)
5263                                         return rte_flow_error_set(error,
5264                                                 rte_errno,
5265                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5266                                                 spec,
5267                                                 "Failed to get port info.");
5268                                 flow_src_port = port_priv->representor_id;
5269                         }
5270                         if (flow_src_port != policy_port_priv->representor_id)
5271                                 return rte_flow_error_set(error,
5272                                                 rte_errno,
5273                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5274                                                 NULL,
5275                                                 "Flow and meter policy "
5276                                                 "have different src port.");
5277                 } else if (mtr_policy->is_rss) {
5278                         struct mlx5_flow_meter_policy *fp;
5279                         struct mlx5_meter_policy_action_container *acg;
5280                         struct mlx5_meter_policy_action_container *acy;
5281                         const struct rte_flow_action *rss_act;
5282                         int ret;
5283
5284                         fp = mlx5_flow_meter_hierarchy_get_final_policy(dev,
5285                                                                 mtr_policy);
5286                         if (fp == NULL)
5287                                 return rte_flow_error_set(error, EINVAL,
5288                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5289                                                   "Unable to get the final "
5290                                                   "policy in the hierarchy");
5291                         acg = &fp->act_cnt[RTE_COLOR_GREEN];
5292                         acy = &fp->act_cnt[RTE_COLOR_YELLOW];
5293                         MLX5_ASSERT(acg->fate_action ==
5294                                     MLX5_FLOW_FATE_SHARED_RSS ||
5295                                     acy->fate_action ==
5296                                     MLX5_FLOW_FATE_SHARED_RSS);
5297                         if (acg->fate_action == MLX5_FLOW_FATE_SHARED_RSS)
5298                                 rss_act = acg->rss;
5299                         else
5300                                 rss_act = acy->rss;
5301                         ret = mlx5_flow_validate_action_rss(rss_act,
5302                                         action_flags, dev, attr,
5303                                         item_flags, error);
5304                         if (ret)
5305                                 return ret;
5306                 }
5307                 *def_policy = false;
5308         }
5309         return 0;
5310 }
5311
5312 /**
5313  * Validate the age action.
5314  *
5315  * @param[in] action_flags
5316  *   Holds the actions detected until now.
5317  * @param[in] action
5318  *   Pointer to the age action.
5319  * @param[in] dev
5320  *   Pointer to the Ethernet device structure.
5321  * @param[out] error
5322  *   Pointer to error structure.
5323  *
5324  * @return
5325  *   0 on success, a negative errno value otherwise and rte_errno is set.
5326  */
5327 static int
5328 flow_dv_validate_action_age(uint64_t action_flags,
5329                             const struct rte_flow_action *action,
5330                             struct rte_eth_dev *dev,
5331                             struct rte_flow_error *error)
5332 {
5333         struct mlx5_priv *priv = dev->data->dev_private;
5334         const struct rte_flow_action_age *age = action->conf;
5335
5336         if (!priv->sh->cdev->config.devx ||
5337             (priv->sh->cmng.counter_fallback && !priv->sh->aso_age_mng))
5338                 return rte_flow_error_set(error, ENOTSUP,
5339                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5340                                           NULL,
5341                                           "age action not supported");
5342         if (!(action->conf))
5343                 return rte_flow_error_set(error, EINVAL,
5344                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5345                                           "configuration cannot be null");
5346         if (!(age->timeout))
5347                 return rte_flow_error_set(error, EINVAL,
5348                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5349                                           "invalid timeout value 0");
5350         if (action_flags & MLX5_FLOW_ACTION_AGE)
5351                 return rte_flow_error_set(error, EINVAL,
5352                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5353                                           "duplicate age actions set");
5354         return 0;
5355 }
5356
5357 /**
5358  * Validate the modify-header IPv4 DSCP actions.
5359  *
5360  * @param[in] action_flags
5361  *   Holds the actions detected until now.
5362  * @param[in] action
5363  *   Pointer to the modify action.
5364  * @param[in] item_flags
5365  *   Holds the items detected.
5366  * @param[out] error
5367  *   Pointer to error structure.
5368  *
5369  * @return
5370  *   0 on success, a negative errno value otherwise and rte_errno is set.
5371  */
5372 static int
5373 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5374                                          const struct rte_flow_action *action,
5375                                          const uint64_t item_flags,
5376                                          struct rte_flow_error *error)
5377 {
5378         int ret = 0;
5379
5380         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5381         if (!ret) {
5382                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5383                         return rte_flow_error_set(error, EINVAL,
5384                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5385                                                   NULL,
5386                                                   "no ipv4 item in pattern");
5387         }
5388         return ret;
5389 }
5390
5391 /**
5392  * Validate the modify-header IPv6 DSCP actions.
5393  *
5394  * @param[in] action_flags
5395  *   Holds the actions detected until now.
5396  * @param[in] action
5397  *   Pointer to the modify action.
5398  * @param[in] item_flags
5399  *   Holds the items detected.
5400  * @param[out] error
5401  *   Pointer to error structure.
5402  *
5403  * @return
5404  *   0 on success, a negative errno value otherwise and rte_errno is set.
5405  */
5406 static int
5407 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5408                                          const struct rte_flow_action *action,
5409                                          const uint64_t item_flags,
5410                                          struct rte_flow_error *error)
5411 {
5412         int ret = 0;
5413
5414         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5415         if (!ret) {
5416                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5417                         return rte_flow_error_set(error, EINVAL,
5418                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5419                                                   NULL,
5420                                                   "no ipv6 item in pattern");
5421         }
5422         return ret;
5423 }
5424
5425 int
5426 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5427                         struct mlx5_list_entry *entry, void *cb_ctx)
5428 {
5429         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5430         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5431         struct mlx5_flow_dv_modify_hdr_resource *resource =
5432                                   container_of(entry, typeof(*resource), entry);
5433         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5434
5435         key_len += ref->actions_num * sizeof(ref->actions[0]);
5436         return ref->actions_num != resource->actions_num ||
5437                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5438 }
5439
5440 static struct mlx5_indexed_pool *
5441 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5442 {
5443         struct mlx5_indexed_pool *ipool = __atomic_load_n
5444                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5445
5446         if (!ipool) {
5447                 struct mlx5_indexed_pool *expected = NULL;
5448                 struct mlx5_indexed_pool_config cfg =
5449                     (struct mlx5_indexed_pool_config) {
5450                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5451                                                                    (index + 1) *
5452                                            sizeof(struct mlx5_modification_cmd),
5453                        .trunk_size = 64,
5454                        .grow_trunk = 3,
5455                        .grow_shift = 2,
5456                        .need_lock = 1,
5457                        .release_mem_en = !!sh->config.reclaim_mode,
5458                        .per_core_cache =
5459                                        sh->config.reclaim_mode ? 0 : (1 << 16),
5460                        .malloc = mlx5_malloc,
5461                        .free = mlx5_free,
5462                        .type = "mlx5_modify_action_resource",
5463                 };
5464
5465                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5466                 ipool = mlx5_ipool_create(&cfg);
5467                 if (!ipool)
5468                         return NULL;
5469                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5470                                                  &expected, ipool, false,
5471                                                  __ATOMIC_SEQ_CST,
5472                                                  __ATOMIC_SEQ_CST)) {
5473                         mlx5_ipool_destroy(ipool);
5474                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5475                                                 __ATOMIC_SEQ_CST);
5476                 }
5477         }
5478         return ipool;
5479 }
5480
5481 struct mlx5_list_entry *
5482 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5483 {
5484         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5485         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5486         struct mlx5dv_dr_domain *ns;
5487         struct mlx5_flow_dv_modify_hdr_resource *entry;
5488         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5489         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5490                                                           ref->actions_num - 1);
5491         int ret;
5492         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5493         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5494         uint32_t idx;
5495
5496         if (unlikely(!ipool)) {
5497                 rte_flow_error_set(ctx->error, ENOMEM,
5498                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5499                                    NULL, "cannot allocate modify ipool");
5500                 return NULL;
5501         }
5502         entry = mlx5_ipool_zmalloc(ipool, &idx);
5503         if (!entry) {
5504                 rte_flow_error_set(ctx->error, ENOMEM,
5505                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5506                                    "cannot allocate resource memory");
5507                 return NULL;
5508         }
5509         rte_memcpy(&entry->ft_type,
5510                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5511                    key_len + data_len);
5512         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5513                 ns = sh->fdb_domain;
5514         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5515                 ns = sh->tx_domain;
5516         else
5517                 ns = sh->rx_domain;
5518         ret = mlx5_flow_os_create_flow_action_modify_header
5519                                         (sh->cdev->ctx, ns, entry,
5520                                          data_len, &entry->action);
5521         if (ret) {
5522                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5523                 rte_flow_error_set(ctx->error, ENOMEM,
5524                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5525                                    NULL, "cannot create modification action");
5526                 return NULL;
5527         }
5528         entry->idx = idx;
5529         return &entry->entry;
5530 }
5531
5532 struct mlx5_list_entry *
5533 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5534                         void *cb_ctx)
5535 {
5536         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5537         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5538         struct mlx5_flow_dv_modify_hdr_resource *entry;
5539         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5540         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5541         uint32_t idx;
5542
5543         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5544                                   &idx);
5545         if (!entry) {
5546                 rte_flow_error_set(ctx->error, ENOMEM,
5547                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5548                                    "cannot allocate resource memory");
5549                 return NULL;
5550         }
5551         memcpy(entry, oentry, sizeof(*entry) + data_len);
5552         entry->idx = idx;
5553         return &entry->entry;
5554 }
5555
5556 void
5557 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5558 {
5559         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5560         struct mlx5_flow_dv_modify_hdr_resource *res =
5561                 container_of(entry, typeof(*res), entry);
5562
5563         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5564 }
5565
5566 /**
5567  * Validate the sample action.
5568  *
5569  * @param[in, out] action_flags
5570  *   Holds the actions detected until now.
5571  * @param[in] action
5572  *   Pointer to the sample action.
5573  * @param[in] dev
5574  *   Pointer to the Ethernet device structure.
5575  * @param[in] attr
5576  *   Attributes of flow that includes this action.
5577  * @param[in] item_flags
5578  *   Holds the items detected.
5579  * @param[in] rss
5580  *   Pointer to the RSS action.
5581  * @param[out] sample_rss
5582  *   Pointer to the RSS action in sample action list.
5583  * @param[out] count
5584  *   Pointer to the COUNT action in sample action list.
5585  * @param[out] fdb_mirror_limit
5586  *   Pointer to the FDB mirror limitation flag.
5587  * @param[out] error
5588  *   Pointer to error structure.
5589  *
5590  * @return
5591  *   0 on success, a negative errno value otherwise and rte_errno is set.
5592  */
5593 static int
5594 flow_dv_validate_action_sample(uint64_t *action_flags,
5595                                const struct rte_flow_action *action,
5596                                struct rte_eth_dev *dev,
5597                                const struct rte_flow_attr *attr,
5598                                uint64_t item_flags,
5599                                const struct rte_flow_action_rss *rss,
5600                                const struct rte_flow_action_rss **sample_rss,
5601                                const struct rte_flow_action_count **count,
5602                                int *fdb_mirror_limit,
5603                                struct rte_flow_error *error)
5604 {
5605         struct mlx5_priv *priv = dev->data->dev_private;
5606         struct mlx5_sh_config *dev_conf = &priv->sh->config;
5607         const struct rte_flow_action_sample *sample = action->conf;
5608         const struct rte_flow_action *act;
5609         uint64_t sub_action_flags = 0;
5610         uint16_t queue_index = 0xFFFF;
5611         int actions_n = 0;
5612         int ret;
5613
5614         if (!sample)
5615                 return rte_flow_error_set(error, EINVAL,
5616                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5617                                           "configuration cannot be NULL");
5618         if (sample->ratio == 0)
5619                 return rte_flow_error_set(error, EINVAL,
5620                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5621                                           "ratio value starts from 1");
5622         if (!priv->sh->cdev->config.devx ||
5623             (sample->ratio > 0 && !priv->sampler_en))
5624                 return rte_flow_error_set(error, ENOTSUP,
5625                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5626                                           NULL,
5627                                           "sample action not supported");
5628         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5629                 return rte_flow_error_set(error, EINVAL,
5630                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5631                                           "Multiple sample actions not "
5632                                           "supported");
5633         if (*action_flags & MLX5_FLOW_ACTION_METER)
5634                 return rte_flow_error_set(error, EINVAL,
5635                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5636                                           "wrong action order, meter should "
5637                                           "be after sample action");
5638         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5639                 return rte_flow_error_set(error, EINVAL,
5640                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5641                                           "wrong action order, jump should "
5642                                           "be after sample action");
5643         if (*action_flags & MLX5_FLOW_ACTION_CT)
5644                 return rte_flow_error_set(error, EINVAL,
5645                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5646                                           "Sample after CT not supported");
5647         act = sample->actions;
5648         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5649                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5650                         return rte_flow_error_set(error, ENOTSUP,
5651                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5652                                                   act, "too many actions");
5653                 switch (act->type) {
5654                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5655                         ret = mlx5_flow_validate_action_queue(act,
5656                                                               sub_action_flags,
5657                                                               dev,
5658                                                               attr, error);
5659                         if (ret < 0)
5660                                 return ret;
5661                         queue_index = ((const struct rte_flow_action_queue *)
5662                                                         (act->conf))->index;
5663                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5664                         ++actions_n;
5665                         break;
5666                 case RTE_FLOW_ACTION_TYPE_RSS:
5667                         *sample_rss = act->conf;
5668                         ret = mlx5_flow_validate_action_rss(act,
5669                                                             sub_action_flags,
5670                                                             dev, attr,
5671                                                             item_flags,
5672                                                             error);
5673                         if (ret < 0)
5674                                 return ret;
5675                         if (rss && *sample_rss &&
5676                             ((*sample_rss)->level != rss->level ||
5677                             (*sample_rss)->types != rss->types))
5678                                 return rte_flow_error_set(error, ENOTSUP,
5679                                         RTE_FLOW_ERROR_TYPE_ACTION,
5680                                         NULL,
5681                                         "Can't use the different RSS types "
5682                                         "or level in the same flow");
5683                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5684                                 queue_index = (*sample_rss)->queue[0];
5685                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5686                         ++actions_n;
5687                         break;
5688                 case RTE_FLOW_ACTION_TYPE_MARK:
5689                         ret = flow_dv_validate_action_mark(dev, act,
5690                                                            sub_action_flags,
5691                                                            attr, error);
5692                         if (ret < 0)
5693                                 return ret;
5694                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5695                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5696                                                 MLX5_FLOW_ACTION_MARK_EXT;
5697                         else
5698                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5699                         ++actions_n;
5700                         break;
5701                 case RTE_FLOW_ACTION_TYPE_COUNT:
5702                         ret = flow_dv_validate_action_count
5703                                 (dev, false, *action_flags | sub_action_flags,
5704                                  attr, error);
5705                         if (ret < 0)
5706                                 return ret;
5707                         *count = act->conf;
5708                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5709                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5710                         ++actions_n;
5711                         break;
5712                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5713                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5714                         ret = flow_dv_validate_action_port_id(dev,
5715                                                               sub_action_flags,
5716                                                               act,
5717                                                               attr,
5718                                                               error);
5719                         if (ret)
5720                                 return ret;
5721                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5722                         ++actions_n;
5723                         break;
5724                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5725                         ret = flow_dv_validate_action_raw_encap_decap
5726                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5727                                  &actions_n, action, item_flags, error);
5728                         if (ret < 0)
5729                                 return ret;
5730                         ++actions_n;
5731                         break;
5732                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5733                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5734                         ret = flow_dv_validate_action_l2_encap(dev,
5735                                                                sub_action_flags,
5736                                                                act, attr,
5737                                                                error);
5738                         if (ret < 0)
5739                                 return ret;
5740                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5741                         ++actions_n;
5742                         break;
5743                 default:
5744                         return rte_flow_error_set(error, ENOTSUP,
5745                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5746                                                   NULL,
5747                                                   "Doesn't support optional "
5748                                                   "action");
5749                 }
5750         }
5751         if (attr->ingress && !attr->transfer) {
5752                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5753                                           MLX5_FLOW_ACTION_RSS)))
5754                         return rte_flow_error_set(error, EINVAL,
5755                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5756                                                   NULL,
5757                                                   "Ingress must has a dest "
5758                                                   "QUEUE for Sample");
5759         } else if (attr->egress && !attr->transfer) {
5760                 return rte_flow_error_set(error, ENOTSUP,
5761                                           RTE_FLOW_ERROR_TYPE_ACTION,
5762                                           NULL,
5763                                           "Sample Only support Ingress "
5764                                           "or E-Switch");
5765         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5766                 MLX5_ASSERT(attr->transfer);
5767                 if (sample->ratio > 1)
5768                         return rte_flow_error_set(error, ENOTSUP,
5769                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5770                                                   NULL,
5771                                                   "E-Switch doesn't support "
5772                                                   "any optional action "
5773                                                   "for sampling");
5774                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5775                         return rte_flow_error_set(error, ENOTSUP,
5776                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5777                                                   NULL,
5778                                                   "unsupported action QUEUE");
5779                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5780                         return rte_flow_error_set(error, ENOTSUP,
5781                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5782                                                   NULL,
5783                                                   "unsupported action QUEUE");
5784                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5785                         return rte_flow_error_set(error, EINVAL,
5786                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5787                                                   NULL,
5788                                                   "E-Switch must has a dest "
5789                                                   "port for mirroring");
5790                 if (!priv->sh->cdev->config.hca_attr.reg_c_preserve &&
5791                      priv->representor_id != UINT16_MAX)
5792                         *fdb_mirror_limit = 1;
5793         }
5794         /* Continue validation for Xcap actions.*/
5795         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5796             (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index))) {
5797                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5798                      MLX5_FLOW_XCAP_ACTIONS)
5799                         return rte_flow_error_set(error, ENOTSUP,
5800                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5801                                                   NULL, "encap and decap "
5802                                                   "combination aren't "
5803                                                   "supported");
5804                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5805                                                         MLX5_FLOW_ACTION_ENCAP))
5806                         return rte_flow_error_set(error, ENOTSUP,
5807                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5808                                                   NULL, "encap is not supported"
5809                                                   " for ingress traffic");
5810         }
5811         return 0;
5812 }
5813
5814 /**
5815  * Find existing modify-header resource or create and register a new one.
5816  *
5817  * @param dev[in, out]
5818  *   Pointer to rte_eth_dev structure.
5819  * @param[in, out] resource
5820  *   Pointer to modify-header resource.
5821  * @parm[in, out] dev_flow
5822  *   Pointer to the dev_flow.
5823  * @param[out] error
5824  *   pointer to error structure.
5825  *
5826  * @return
5827  *   0 on success otherwise -errno and errno is set.
5828  */
5829 static int
5830 flow_dv_modify_hdr_resource_register
5831                         (struct rte_eth_dev *dev,
5832                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5833                          struct mlx5_flow *dev_flow,
5834                          struct rte_flow_error *error)
5835 {
5836         struct mlx5_priv *priv = dev->data->dev_private;
5837         struct mlx5_dev_ctx_shared *sh = priv->sh;
5838         uint32_t key_len = sizeof(*resource) -
5839                            offsetof(typeof(*resource), ft_type) +
5840                            resource->actions_num * sizeof(resource->actions[0]);
5841         struct mlx5_list_entry *entry;
5842         struct mlx5_flow_cb_ctx ctx = {
5843                 .error = error,
5844                 .data = resource,
5845         };
5846         struct mlx5_hlist *modify_cmds;
5847         uint64_t key64;
5848
5849         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5850                                 "hdr_modify",
5851                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5852                                 true, false, sh,
5853                                 flow_dv_modify_create_cb,
5854                                 flow_dv_modify_match_cb,
5855                                 flow_dv_modify_remove_cb,
5856                                 flow_dv_modify_clone_cb,
5857                                 flow_dv_modify_clone_free_cb,
5858                                 error);
5859         if (unlikely(!modify_cmds))
5860                 return -rte_errno;
5861         resource->root = !dev_flow->dv.group;
5862         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5863                                                                 resource->root))
5864                 return rte_flow_error_set(error, EOVERFLOW,
5865                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5866                                           "too many modify header items");
5867         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5868         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5869         if (!entry)
5870                 return -rte_errno;
5871         resource = container_of(entry, typeof(*resource), entry);
5872         dev_flow->handle->dvh.modify_hdr = resource;
5873         return 0;
5874 }
5875
5876 /**
5877  * Get DV flow counter by index.
5878  *
5879  * @param[in] dev
5880  *   Pointer to the Ethernet device structure.
5881  * @param[in] idx
5882  *   mlx5 flow counter index in the container.
5883  * @param[out] ppool
5884  *   mlx5 flow counter pool in the container.
5885  *
5886  * @return
5887  *   Pointer to the counter, NULL otherwise.
5888  */
5889 static struct mlx5_flow_counter *
5890 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5891                            uint32_t idx,
5892                            struct mlx5_flow_counter_pool **ppool)
5893 {
5894         struct mlx5_priv *priv = dev->data->dev_private;
5895         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5896         struct mlx5_flow_counter_pool *pool;
5897
5898         /* Decrease to original index and clear shared bit. */
5899         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5900         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5901         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5902         MLX5_ASSERT(pool);
5903         if (ppool)
5904                 *ppool = pool;
5905         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5906 }
5907
5908 /**
5909  * Check the devx counter belongs to the pool.
5910  *
5911  * @param[in] pool
5912  *   Pointer to the counter pool.
5913  * @param[in] id
5914  *   The counter devx ID.
5915  *
5916  * @return
5917  *   True if counter belongs to the pool, false otherwise.
5918  */
5919 static bool
5920 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5921 {
5922         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5923                    MLX5_COUNTERS_PER_POOL;
5924
5925         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5926                 return true;
5927         return false;
5928 }
5929
5930 /**
5931  * Get a pool by devx counter ID.
5932  *
5933  * @param[in] cmng
5934  *   Pointer to the counter management.
5935  * @param[in] id
5936  *   The counter devx ID.
5937  *
5938  * @return
5939  *   The counter pool pointer if exists, NULL otherwise,
5940  */
5941 static struct mlx5_flow_counter_pool *
5942 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5943 {
5944         uint32_t i;
5945         struct mlx5_flow_counter_pool *pool = NULL;
5946
5947         rte_spinlock_lock(&cmng->pool_update_sl);
5948         /* Check last used pool. */
5949         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5950             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5951                 pool = cmng->pools[cmng->last_pool_idx];
5952                 goto out;
5953         }
5954         /* ID out of range means no suitable pool in the container. */
5955         if (id > cmng->max_id || id < cmng->min_id)
5956                 goto out;
5957         /*
5958          * Find the pool from the end of the container, since mostly counter
5959          * ID is sequence increasing, and the last pool should be the needed
5960          * one.
5961          */
5962         i = cmng->n_valid;
5963         while (i--) {
5964                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5965
5966                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5967                         pool = pool_tmp;
5968                         break;
5969                 }
5970         }
5971 out:
5972         rte_spinlock_unlock(&cmng->pool_update_sl);
5973         return pool;
5974 }
5975
5976 /**
5977  * Resize a counter container.
5978  *
5979  * @param[in] dev
5980  *   Pointer to the Ethernet device structure.
5981  *
5982  * @return
5983  *   0 on success, otherwise negative errno value and rte_errno is set.
5984  */
5985 static int
5986 flow_dv_container_resize(struct rte_eth_dev *dev)
5987 {
5988         struct mlx5_priv *priv = dev->data->dev_private;
5989         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5990         void *old_pools = cmng->pools;
5991         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5992         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5993         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5994
5995         if (!pools) {
5996                 rte_errno = ENOMEM;
5997                 return -ENOMEM;
5998         }
5999         if (old_pools)
6000                 memcpy(pools, old_pools, cmng->n *
6001                                        sizeof(struct mlx5_flow_counter_pool *));
6002         cmng->n = resize;
6003         cmng->pools = pools;
6004         if (old_pools)
6005                 mlx5_free(old_pools);
6006         return 0;
6007 }
6008
6009 /**
6010  * Query a devx flow counter.
6011  *
6012  * @param[in] dev
6013  *   Pointer to the Ethernet device structure.
6014  * @param[in] counter
6015  *   Index to the flow counter.
6016  * @param[out] pkts
6017  *   The statistics value of packets.
6018  * @param[out] bytes
6019  *   The statistics value of bytes.
6020  *
6021  * @return
6022  *   0 on success, otherwise a negative errno value and rte_errno is set.
6023  */
6024 static inline int
6025 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
6026                      uint64_t *bytes)
6027 {
6028         struct mlx5_priv *priv = dev->data->dev_private;
6029         struct mlx5_flow_counter_pool *pool = NULL;
6030         struct mlx5_flow_counter *cnt;
6031         int offset;
6032
6033         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6034         MLX5_ASSERT(pool);
6035         if (priv->sh->cmng.counter_fallback)
6036                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6037                                         0, pkts, bytes, 0, NULL, NULL, 0);
6038         rte_spinlock_lock(&pool->sl);
6039         if (!pool->raw) {
6040                 *pkts = 0;
6041                 *bytes = 0;
6042         } else {
6043                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6044                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6045                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6046         }
6047         rte_spinlock_unlock(&pool->sl);
6048         return 0;
6049 }
6050
6051 /**
6052  * Create and initialize a new counter pool.
6053  *
6054  * @param[in] dev
6055  *   Pointer to the Ethernet device structure.
6056  * @param[out] dcs
6057  *   The devX counter handle.
6058  * @param[in] age
6059  *   Whether the pool is for counter that was allocated for aging.
6060  * @param[in/out] cont_cur
6061  *   Pointer to the container pointer, it will be update in pool resize.
6062  *
6063  * @return
6064  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6065  */
6066 static struct mlx5_flow_counter_pool *
6067 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6068                     uint32_t age)
6069 {
6070         struct mlx5_priv *priv = dev->data->dev_private;
6071         struct mlx5_flow_counter_pool *pool;
6072         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6073         bool fallback = priv->sh->cmng.counter_fallback;
6074         uint32_t size = sizeof(*pool);
6075
6076         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6077         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6078         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6079         if (!pool) {
6080                 rte_errno = ENOMEM;
6081                 return NULL;
6082         }
6083         pool->raw = NULL;
6084         pool->is_aged = !!age;
6085         pool->query_gen = 0;
6086         pool->min_dcs = dcs;
6087         rte_spinlock_init(&pool->sl);
6088         rte_spinlock_init(&pool->csl);
6089         TAILQ_INIT(&pool->counters[0]);
6090         TAILQ_INIT(&pool->counters[1]);
6091         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6092         rte_spinlock_lock(&cmng->pool_update_sl);
6093         pool->index = cmng->n_valid;
6094         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6095                 mlx5_free(pool);
6096                 rte_spinlock_unlock(&cmng->pool_update_sl);
6097                 return NULL;
6098         }
6099         cmng->pools[pool->index] = pool;
6100         cmng->n_valid++;
6101         if (unlikely(fallback)) {
6102                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6103
6104                 if (base < cmng->min_id)
6105                         cmng->min_id = base;
6106                 if (base > cmng->max_id)
6107                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6108                 cmng->last_pool_idx = pool->index;
6109         }
6110         rte_spinlock_unlock(&cmng->pool_update_sl);
6111         return pool;
6112 }
6113
6114 /**
6115  * Prepare a new counter and/or a new counter pool.
6116  *
6117  * @param[in] dev
6118  *   Pointer to the Ethernet device structure.
6119  * @param[out] cnt_free
6120  *   Where to put the pointer of a new counter.
6121  * @param[in] age
6122  *   Whether the pool is for counter that was allocated for aging.
6123  *
6124  * @return
6125  *   The counter pool pointer and @p cnt_free is set on success,
6126  *   NULL otherwise and rte_errno is set.
6127  */
6128 static struct mlx5_flow_counter_pool *
6129 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6130                              struct mlx5_flow_counter **cnt_free,
6131                              uint32_t age)
6132 {
6133         struct mlx5_priv *priv = dev->data->dev_private;
6134         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6135         struct mlx5_flow_counter_pool *pool;
6136         struct mlx5_counters tmp_tq;
6137         struct mlx5_devx_obj *dcs = NULL;
6138         struct mlx5_flow_counter *cnt;
6139         enum mlx5_counter_type cnt_type =
6140                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6141         bool fallback = priv->sh->cmng.counter_fallback;
6142         uint32_t i;
6143
6144         if (fallback) {
6145                 /* bulk_bitmap must be 0 for single counter allocation. */
6146                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6147                 if (!dcs)
6148                         return NULL;
6149                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6150                 if (!pool) {
6151                         pool = flow_dv_pool_create(dev, dcs, age);
6152                         if (!pool) {
6153                                 mlx5_devx_cmd_destroy(dcs);
6154                                 return NULL;
6155                         }
6156                 }
6157                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6158                 cnt = MLX5_POOL_GET_CNT(pool, i);
6159                 cnt->pool = pool;
6160                 cnt->dcs_when_free = dcs;
6161                 *cnt_free = cnt;
6162                 return pool;
6163         }
6164         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6165         if (!dcs) {
6166                 rte_errno = ENODATA;
6167                 return NULL;
6168         }
6169         pool = flow_dv_pool_create(dev, dcs, age);
6170         if (!pool) {
6171                 mlx5_devx_cmd_destroy(dcs);
6172                 return NULL;
6173         }
6174         TAILQ_INIT(&tmp_tq);
6175         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6176                 cnt = MLX5_POOL_GET_CNT(pool, i);
6177                 cnt->pool = pool;
6178                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6179         }
6180         rte_spinlock_lock(&cmng->csl[cnt_type]);
6181         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6182         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6183         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6184         (*cnt_free)->pool = pool;
6185         return pool;
6186 }
6187
6188 /**
6189  * Allocate a flow counter.
6190  *
6191  * @param[in] dev
6192  *   Pointer to the Ethernet device structure.
6193  * @param[in] age
6194  *   Whether the counter was allocated for aging.
6195  *
6196  * @return
6197  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6198  */
6199 static uint32_t
6200 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6201 {
6202         struct mlx5_priv *priv = dev->data->dev_private;
6203         struct mlx5_flow_counter_pool *pool = NULL;
6204         struct mlx5_flow_counter *cnt_free = NULL;
6205         bool fallback = priv->sh->cmng.counter_fallback;
6206         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6207         enum mlx5_counter_type cnt_type =
6208                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6209         uint32_t cnt_idx;
6210
6211         if (!priv->sh->cdev->config.devx) {
6212                 rte_errno = ENOTSUP;
6213                 return 0;
6214         }
6215         /* Get free counters from container. */
6216         rte_spinlock_lock(&cmng->csl[cnt_type]);
6217         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6218         if (cnt_free)
6219                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6220         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6221         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6222                 goto err;
6223         pool = cnt_free->pool;
6224         if (fallback)
6225                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6226         /* Create a DV counter action only in the first time usage. */
6227         if (!cnt_free->action) {
6228                 uint16_t offset;
6229                 struct mlx5_devx_obj *dcs;
6230                 int ret;
6231
6232                 if (!fallback) {
6233                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6234                         dcs = pool->min_dcs;
6235                 } else {
6236                         offset = 0;
6237                         dcs = cnt_free->dcs_when_free;
6238                 }
6239                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6240                                                             &cnt_free->action);
6241                 if (ret) {
6242                         rte_errno = errno;
6243                         goto err;
6244                 }
6245         }
6246         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6247                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6248         /* Update the counter reset values. */
6249         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6250                                  &cnt_free->bytes))
6251                 goto err;
6252         if (!fallback && !priv->sh->cmng.query_thread_on)
6253                 /* Start the asynchronous batch query by the host thread. */
6254                 mlx5_set_query_alarm(priv->sh);
6255         /*
6256          * When the count action isn't shared (by ID), shared_info field is
6257          * used for indirect action API's refcnt.
6258          * When the counter action is not shared neither by ID nor by indirect
6259          * action API, shared info must be 1.
6260          */
6261         cnt_free->shared_info.refcnt = 1;
6262         return cnt_idx;
6263 err:
6264         if (cnt_free) {
6265                 cnt_free->pool = pool;
6266                 if (fallback)
6267                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6268                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6269                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6270                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6271         }
6272         return 0;
6273 }
6274
6275 /**
6276  * Get age param from counter index.
6277  *
6278  * @param[in] dev
6279  *   Pointer to the Ethernet device structure.
6280  * @param[in] counter
6281  *   Index to the counter handler.
6282  *
6283  * @return
6284  *   The aging parameter specified for the counter index.
6285  */
6286 static struct mlx5_age_param*
6287 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6288                                 uint32_t counter)
6289 {
6290         struct mlx5_flow_counter *cnt;
6291         struct mlx5_flow_counter_pool *pool = NULL;
6292
6293         flow_dv_counter_get_by_idx(dev, counter, &pool);
6294         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6295         cnt = MLX5_POOL_GET_CNT(pool, counter);
6296         return MLX5_CNT_TO_AGE(cnt);
6297 }
6298
6299 /**
6300  * Remove a flow counter from aged counter list.
6301  *
6302  * @param[in] dev
6303  *   Pointer to the Ethernet device structure.
6304  * @param[in] counter
6305  *   Index to the counter handler.
6306  * @param[in] cnt
6307  *   Pointer to the counter handler.
6308  */
6309 static void
6310 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6311                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6312 {
6313         struct mlx5_age_info *age_info;
6314         struct mlx5_age_param *age_param;
6315         struct mlx5_priv *priv = dev->data->dev_private;
6316         uint16_t expected = AGE_CANDIDATE;
6317
6318         age_info = GET_PORT_AGE_INFO(priv);
6319         age_param = flow_dv_counter_idx_get_age(dev, counter);
6320         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6321                                          AGE_FREE, false, __ATOMIC_RELAXED,
6322                                          __ATOMIC_RELAXED)) {
6323                 /**
6324                  * We need the lock even it is age timeout,
6325                  * since counter may still in process.
6326                  */
6327                 rte_spinlock_lock(&age_info->aged_sl);
6328                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6329                 rte_spinlock_unlock(&age_info->aged_sl);
6330                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6331         }
6332 }
6333
6334 /**
6335  * Release a flow counter.
6336  *
6337  * @param[in] dev
6338  *   Pointer to the Ethernet device structure.
6339  * @param[in] counter
6340  *   Index to the counter handler.
6341  */
6342 static void
6343 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6344 {
6345         struct mlx5_priv *priv = dev->data->dev_private;
6346         struct mlx5_flow_counter_pool *pool = NULL;
6347         struct mlx5_flow_counter *cnt;
6348         enum mlx5_counter_type cnt_type;
6349
6350         if (!counter)
6351                 return;
6352         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6353         MLX5_ASSERT(pool);
6354         if (pool->is_aged) {
6355                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6356         } else {
6357                 /*
6358                  * If the counter action is shared by indirect action API,
6359                  * the atomic function reduces its references counter.
6360                  * If after the reduction the action is still referenced, the
6361                  * function returns here and does not release it.
6362                  * When the counter action is not shared by
6363                  * indirect action API, shared info is 1 before the reduction,
6364                  * so this condition is failed and function doesn't return here.
6365                  */
6366                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6367                                        __ATOMIC_RELAXED))
6368                         return;
6369         }
6370         cnt->pool = pool;
6371         /*
6372          * Put the counter back to list to be updated in none fallback mode.
6373          * Currently, we are using two list alternately, while one is in query,
6374          * add the freed counter to the other list based on the pool query_gen
6375          * value. After query finishes, add counter the list to the global
6376          * container counter list. The list changes while query starts. In
6377          * this case, lock will not be needed as query callback and release
6378          * function both operate with the different list.
6379          */
6380         if (!priv->sh->cmng.counter_fallback) {
6381                 rte_spinlock_lock(&pool->csl);
6382                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6383                 rte_spinlock_unlock(&pool->csl);
6384         } else {
6385                 cnt->dcs_when_free = cnt->dcs_when_active;
6386                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6387                                            MLX5_COUNTER_TYPE_ORIGIN;
6388                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6389                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6390                                   cnt, next);
6391                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6392         }
6393 }
6394
6395 /**
6396  * Resize a meter id container.
6397  *
6398  * @param[in] dev
6399  *   Pointer to the Ethernet device structure.
6400  *
6401  * @return
6402  *   0 on success, otherwise negative errno value and rte_errno is set.
6403  */
6404 static int
6405 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6406 {
6407         struct mlx5_priv *priv = dev->data->dev_private;
6408         struct mlx5_aso_mtr_pools_mng *pools_mng =
6409                                 &priv->sh->mtrmng->pools_mng;
6410         void *old_pools = pools_mng->pools;
6411         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6412         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6413         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6414
6415         if (!pools) {
6416                 rte_errno = ENOMEM;
6417                 return -ENOMEM;
6418         }
6419         if (!pools_mng->n)
6420                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6421                         mlx5_free(pools);
6422                         return -ENOMEM;
6423                 }
6424         if (old_pools)
6425                 memcpy(pools, old_pools, pools_mng->n *
6426                                        sizeof(struct mlx5_aso_mtr_pool *));
6427         pools_mng->n = resize;
6428         pools_mng->pools = pools;
6429         if (old_pools)
6430                 mlx5_free(old_pools);
6431         return 0;
6432 }
6433
6434 /**
6435  * Prepare a new meter and/or a new meter pool.
6436  *
6437  * @param[in] dev
6438  *   Pointer to the Ethernet device structure.
6439  * @param[out] mtr_free
6440  *   Where to put the pointer of a new meter.g.
6441  *
6442  * @return
6443  *   The meter pool pointer and @mtr_free is set on success,
6444  *   NULL otherwise and rte_errno is set.
6445  */
6446 static struct mlx5_aso_mtr_pool *
6447 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6448 {
6449         struct mlx5_priv *priv = dev->data->dev_private;
6450         struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6451         struct mlx5_aso_mtr_pool *pool = NULL;
6452         struct mlx5_devx_obj *dcs = NULL;
6453         uint32_t i;
6454         uint32_t log_obj_size;
6455
6456         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6457         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6458                                                       priv->sh->cdev->pdn,
6459                                                       log_obj_size);
6460         if (!dcs) {
6461                 rte_errno = ENODATA;
6462                 return NULL;
6463         }
6464         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6465         if (!pool) {
6466                 rte_errno = ENOMEM;
6467                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6468                 return NULL;
6469         }
6470         pool->devx_obj = dcs;
6471         rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6472         pool->index = pools_mng->n_valid;
6473         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6474                 mlx5_free(pool);
6475                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6476                 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6477                 return NULL;
6478         }
6479         pools_mng->pools[pool->index] = pool;
6480         pools_mng->n_valid++;
6481         rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6482         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6483                 pool->mtrs[i].offset = i;
6484                 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6485         }
6486         pool->mtrs[0].offset = 0;
6487         *mtr_free = &pool->mtrs[0];
6488         return pool;
6489 }
6490
6491 /**
6492  * Release a flow meter into pool.
6493  *
6494  * @param[in] dev
6495  *   Pointer to the Ethernet device structure.
6496  * @param[in] mtr_idx
6497  *   Index to aso flow meter.
6498  */
6499 static void
6500 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6501 {
6502         struct mlx5_priv *priv = dev->data->dev_private;
6503         struct mlx5_aso_mtr_pools_mng *pools_mng =
6504                                 &priv->sh->mtrmng->pools_mng;
6505         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6506
6507         MLX5_ASSERT(aso_mtr);
6508         rte_spinlock_lock(&pools_mng->mtrsl);
6509         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6510         aso_mtr->state = ASO_METER_FREE;
6511         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6512         rte_spinlock_unlock(&pools_mng->mtrsl);
6513 }
6514
6515 /**
6516  * Allocate a aso flow meter.
6517  *
6518  * @param[in] dev
6519  *   Pointer to the Ethernet device structure.
6520  *
6521  * @return
6522  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6523  */
6524 static uint32_t
6525 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6526 {
6527         struct mlx5_priv *priv = dev->data->dev_private;
6528         struct mlx5_aso_mtr *mtr_free = NULL;
6529         struct mlx5_aso_mtr_pools_mng *pools_mng =
6530                                 &priv->sh->mtrmng->pools_mng;
6531         struct mlx5_aso_mtr_pool *pool;
6532         uint32_t mtr_idx = 0;
6533
6534         if (!priv->sh->cdev->config.devx) {
6535                 rte_errno = ENOTSUP;
6536                 return 0;
6537         }
6538         /* Allocate the flow meter memory. */
6539         /* Get free meters from management. */
6540         rte_spinlock_lock(&pools_mng->mtrsl);
6541         mtr_free = LIST_FIRST(&pools_mng->meters);
6542         if (mtr_free)
6543                 LIST_REMOVE(mtr_free, next);
6544         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6545                 rte_spinlock_unlock(&pools_mng->mtrsl);
6546                 return 0;
6547         }
6548         mtr_free->state = ASO_METER_WAIT;
6549         rte_spinlock_unlock(&pools_mng->mtrsl);
6550         pool = container_of(mtr_free,
6551                         struct mlx5_aso_mtr_pool,
6552                         mtrs[mtr_free->offset]);
6553         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6554         if (!mtr_free->fm.meter_action) {
6555 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6556                 struct rte_flow_error error;
6557                 uint8_t reg_id;
6558
6559                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6560                 mtr_free->fm.meter_action =
6561                         mlx5_glue->dv_create_flow_action_aso
6562                                                 (priv->sh->rx_domain,
6563                                                  pool->devx_obj->obj,
6564                                                  mtr_free->offset,
6565                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6566                                                  reg_id - REG_C_0);
6567 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6568                 if (!mtr_free->fm.meter_action) {
6569                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6570                         return 0;
6571                 }
6572         }
6573         return mtr_idx;
6574 }
6575
6576 /**
6577  * Verify the @p attributes will be correctly understood by the NIC and store
6578  * them in the @p flow if everything is correct.
6579  *
6580  * @param[in] dev
6581  *   Pointer to dev struct.
6582  * @param[in] attributes
6583  *   Pointer to flow attributes
6584  * @param[in] external
6585  *   This flow rule is created by request external to PMD.
6586  * @param[out] error
6587  *   Pointer to error structure.
6588  *
6589  * @return
6590  *   - 0 on success and non root table.
6591  *   - 1 on success and root table.
6592  *   - a negative errno value otherwise and rte_errno is set.
6593  */
6594 static int
6595 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6596                             const struct mlx5_flow_tunnel *tunnel,
6597                             const struct rte_flow_attr *attributes,
6598                             const struct flow_grp_info *grp_info,
6599                             struct rte_flow_error *error)
6600 {
6601         struct mlx5_priv *priv = dev->data->dev_private;
6602         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6603         int ret = 0;
6604
6605 #ifndef HAVE_MLX5DV_DR
6606         RTE_SET_USED(tunnel);
6607         RTE_SET_USED(grp_info);
6608         if (attributes->group)
6609                 return rte_flow_error_set(error, ENOTSUP,
6610                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6611                                           NULL,
6612                                           "groups are not supported");
6613 #else
6614         uint32_t table = 0;
6615
6616         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6617                                        grp_info, error);
6618         if (ret)
6619                 return ret;
6620         if (!table)
6621                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6622 #endif
6623         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6624             attributes->priority > lowest_priority)
6625                 return rte_flow_error_set(error, ENOTSUP,
6626                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6627                                           NULL,
6628                                           "priority out of range");
6629         if (attributes->transfer) {
6630                 if (!priv->sh->config.dv_esw_en)
6631                         return rte_flow_error_set
6632                                 (error, ENOTSUP,
6633                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6634                                  "E-Switch dr is not supported");
6635                 if (attributes->egress)
6636                         return rte_flow_error_set
6637                                 (error, ENOTSUP,
6638                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6639                                  "egress is not supported");
6640         }
6641         if (!(attributes->egress ^ attributes->ingress))
6642                 return rte_flow_error_set(error, ENOTSUP,
6643                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6644                                           "must specify exactly one of "
6645                                           "ingress or egress");
6646         return ret;
6647 }
6648
6649 static int
6650 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6651                         int64_t pattern_flags, uint64_t l3_flags,
6652                         uint64_t l4_flags, uint64_t ip4_flag,
6653                         struct rte_flow_error *error)
6654 {
6655         if (mask->l3_ok && !(pattern_flags & l3_flags))
6656                 return rte_flow_error_set(error, EINVAL,
6657                                           RTE_FLOW_ERROR_TYPE_ITEM,
6658                                           NULL, "missing L3 protocol");
6659
6660         if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6661                 return rte_flow_error_set(error, EINVAL,
6662                                           RTE_FLOW_ERROR_TYPE_ITEM,
6663                                           NULL, "missing IPv4 protocol");
6664
6665         if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6666                 return rte_flow_error_set(error, EINVAL,
6667                                           RTE_FLOW_ERROR_TYPE_ITEM,
6668                                           NULL, "missing L4 protocol");
6669
6670         return 0;
6671 }
6672
6673 static int
6674 flow_dv_validate_item_integrity_post(const struct
6675                                      rte_flow_item *integrity_items[2],
6676                                      int64_t pattern_flags,
6677                                      struct rte_flow_error *error)
6678 {
6679         const struct rte_flow_item_integrity *mask;
6680         int ret;
6681
6682         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6683                 mask = (typeof(mask))integrity_items[0]->mask;
6684                 ret = validate_integrity_bits(mask, pattern_flags,
6685                                               MLX5_FLOW_LAYER_OUTER_L3,
6686                                               MLX5_FLOW_LAYER_OUTER_L4,
6687                                               MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6688                                               error);
6689                 if (ret)
6690                         return ret;
6691         }
6692         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6693                 mask = (typeof(mask))integrity_items[1]->mask;
6694                 ret = validate_integrity_bits(mask, pattern_flags,
6695                                               MLX5_FLOW_LAYER_INNER_L3,
6696                                               MLX5_FLOW_LAYER_INNER_L4,
6697                                               MLX5_FLOW_LAYER_INNER_L3_IPV4,
6698                                               error);
6699                 if (ret)
6700                         return ret;
6701         }
6702         return 0;
6703 }
6704
6705 static int
6706 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6707                                 const struct rte_flow_item *integrity_item,
6708                                 uint64_t pattern_flags, uint64_t *last_item,
6709                                 const struct rte_flow_item *integrity_items[2],
6710                                 struct rte_flow_error *error)
6711 {
6712         struct mlx5_priv *priv = dev->data->dev_private;
6713         const struct rte_flow_item_integrity *mask = (typeof(mask))
6714                                                      integrity_item->mask;
6715         const struct rte_flow_item_integrity *spec = (typeof(spec))
6716                                                      integrity_item->spec;
6717
6718         if (!priv->sh->cdev->config.hca_attr.pkt_integrity_match)
6719                 return rte_flow_error_set(error, ENOTSUP,
6720                                           RTE_FLOW_ERROR_TYPE_ITEM,
6721                                           integrity_item,
6722                                           "packet integrity integrity_item not supported");
6723         if (!spec)
6724                 return rte_flow_error_set(error, ENOTSUP,
6725                                           RTE_FLOW_ERROR_TYPE_ITEM,
6726                                           integrity_item,
6727                                           "no spec for integrity item");
6728         if (!mask)
6729                 mask = &rte_flow_item_integrity_mask;
6730         if (!mlx5_validate_integrity_item(mask))
6731                 return rte_flow_error_set(error, ENOTSUP,
6732                                           RTE_FLOW_ERROR_TYPE_ITEM,
6733                                           integrity_item,
6734                                           "unsupported integrity filter");
6735         if (spec->level > 1) {
6736                 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6737                         return rte_flow_error_set
6738                                 (error, ENOTSUP,
6739                                  RTE_FLOW_ERROR_TYPE_ITEM,
6740                                  NULL, "multiple inner integrity items not supported");
6741                 integrity_items[1] = integrity_item;
6742                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6743         } else {
6744                 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6745                         return rte_flow_error_set
6746                                 (error, ENOTSUP,
6747                                  RTE_FLOW_ERROR_TYPE_ITEM,
6748                                  NULL, "multiple outer integrity items not supported");
6749                 integrity_items[0] = integrity_item;
6750                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6751         }
6752         return 0;
6753 }
6754
6755 static int
6756 flow_dv_validate_item_flex(struct rte_eth_dev *dev,
6757                            const struct rte_flow_item *item,
6758                            uint64_t item_flags,
6759                            uint64_t *last_item,
6760                            bool is_inner,
6761                            struct rte_flow_error *error)
6762 {
6763         const struct rte_flow_item_flex *flow_spec = item->spec;
6764         const struct rte_flow_item_flex *flow_mask = item->mask;
6765         struct mlx5_flex_item *flex;
6766
6767         if (!flow_spec)
6768                 return rte_flow_error_set(error, EINVAL,
6769                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6770                                           "flex flow item spec cannot be NULL");
6771         if (!flow_mask)
6772                 return rte_flow_error_set(error, EINVAL,
6773                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6774                                           "flex flow item mask cannot be NULL");
6775         if (item->last)
6776                 return rte_flow_error_set(error, ENOTSUP,
6777                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6778                                           "flex flow item last not supported");
6779         if (mlx5_flex_acquire_index(dev, flow_spec->handle, false) < 0)
6780                 return rte_flow_error_set(error, EINVAL,
6781                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6782                                           "invalid flex flow item handle");
6783         flex = (struct mlx5_flex_item *)flow_spec->handle;
6784         switch (flex->tunnel_mode) {
6785         case FLEX_TUNNEL_MODE_SINGLE:
6786                 if (item_flags &
6787                     (MLX5_FLOW_ITEM_OUTER_FLEX | MLX5_FLOW_ITEM_INNER_FLEX))
6788                         rte_flow_error_set(error, EINVAL,
6789                                            RTE_FLOW_ERROR_TYPE_ITEM,
6790                                            NULL, "multiple flex items not supported");
6791                 break;
6792         case FLEX_TUNNEL_MODE_OUTER:
6793                 if (is_inner)
6794                         rte_flow_error_set(error, EINVAL,
6795                                            RTE_FLOW_ERROR_TYPE_ITEM,
6796                                            NULL, "inner flex item was not configured");
6797                 if (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX)
6798                         rte_flow_error_set(error, ENOTSUP,
6799                                            RTE_FLOW_ERROR_TYPE_ITEM,
6800                                            NULL, "multiple flex items not supported");
6801                 break;
6802         case FLEX_TUNNEL_MODE_INNER:
6803                 if (!is_inner)
6804                         rte_flow_error_set(error, EINVAL,
6805                                            RTE_FLOW_ERROR_TYPE_ITEM,
6806                                            NULL, "outer flex item was not configured");
6807                 if (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)
6808                         rte_flow_error_set(error, EINVAL,
6809                                            RTE_FLOW_ERROR_TYPE_ITEM,
6810                                            NULL, "multiple flex items not supported");
6811                 break;
6812         case FLEX_TUNNEL_MODE_MULTI:
6813                 if ((is_inner && (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)) ||
6814                     (!is_inner && (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX))) {
6815                         rte_flow_error_set(error, EINVAL,
6816                                            RTE_FLOW_ERROR_TYPE_ITEM,
6817                                            NULL, "multiple flex items not supported");
6818                 }
6819                 break;
6820         case FLEX_TUNNEL_MODE_TUNNEL:
6821                 if (is_inner || (item_flags & MLX5_FLOW_ITEM_FLEX_TUNNEL))
6822                         rte_flow_error_set(error, EINVAL,
6823                                            RTE_FLOW_ERROR_TYPE_ITEM,
6824                                            NULL, "multiple flex tunnel items not supported");
6825                 break;
6826         default:
6827                 rte_flow_error_set(error, EINVAL,
6828                                    RTE_FLOW_ERROR_TYPE_ITEM,
6829                                    NULL, "invalid flex item configuration");
6830         }
6831         *last_item = flex->tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ?
6832                      MLX5_FLOW_ITEM_FLEX_TUNNEL : is_inner ?
6833                      MLX5_FLOW_ITEM_INNER_FLEX : MLX5_FLOW_ITEM_OUTER_FLEX;
6834         return 0;
6835 }
6836
6837 /**
6838  * Internal validation function. For validating both actions and items.
6839  *
6840  * @param[in] dev
6841  *   Pointer to the rte_eth_dev structure.
6842  * @param[in] attr
6843  *   Pointer to the flow attributes.
6844  * @param[in] items
6845  *   Pointer to the list of items.
6846  * @param[in] actions
6847  *   Pointer to the list of actions.
6848  * @param[in] external
6849  *   This flow rule is created by request external to PMD.
6850  * @param[in] hairpin
6851  *   Number of hairpin TX actions, 0 means classic flow.
6852  * @param[out] error
6853  *   Pointer to the error structure.
6854  *
6855  * @return
6856  *   0 on success, a negative errno value otherwise and rte_errno is set.
6857  */
6858 static int
6859 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6860                  const struct rte_flow_item items[],
6861                  const struct rte_flow_action actions[],
6862                  bool external, int hairpin, struct rte_flow_error *error)
6863 {
6864         int ret;
6865         uint64_t action_flags = 0;
6866         uint64_t item_flags = 0;
6867         uint64_t last_item = 0;
6868         uint8_t next_protocol = 0xff;
6869         uint16_t ether_type = 0;
6870         int actions_n = 0;
6871         uint8_t item_ipv6_proto = 0;
6872         int fdb_mirror_limit = 0;
6873         int modify_after_mirror = 0;
6874         const struct rte_flow_item *geneve_item = NULL;
6875         const struct rte_flow_item *gre_item = NULL;
6876         const struct rte_flow_item *gtp_item = NULL;
6877         const struct rte_flow_action_raw_decap *decap;
6878         const struct rte_flow_action_raw_encap *encap;
6879         const struct rte_flow_action_rss *rss = NULL;
6880         const struct rte_flow_action_rss *sample_rss = NULL;
6881         const struct rte_flow_action_count *sample_count = NULL;
6882         const struct rte_flow_item_tcp nic_tcp_mask = {
6883                 .hdr = {
6884                         .tcp_flags = 0xFF,
6885                         .src_port = RTE_BE16(UINT16_MAX),
6886                         .dst_port = RTE_BE16(UINT16_MAX),
6887                 }
6888         };
6889         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6890                 .hdr = {
6891                         .src_addr =
6892                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6893                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6894                         .dst_addr =
6895                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6896                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6897                         .vtc_flow = RTE_BE32(0xffffffff),
6898                         .proto = 0xff,
6899                         .hop_limits = 0xff,
6900                 },
6901                 .has_frag_ext = 1,
6902         };
6903         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6904                 .hdr = {
6905                         .common = {
6906                                 .u32 =
6907                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6908                                         .type = 0xFF,
6909                                         }).u32),
6910                         },
6911                         .dummy[0] = 0xffffffff,
6912                 },
6913         };
6914         struct mlx5_priv *priv = dev->data->dev_private;
6915         struct mlx5_sh_config *dev_conf = &priv->sh->config;
6916         uint16_t queue_index = 0xFFFF;
6917         const struct rte_flow_item_vlan *vlan_m = NULL;
6918         uint32_t rw_act_num = 0;
6919         uint64_t is_root;
6920         const struct mlx5_flow_tunnel *tunnel;
6921         enum mlx5_tof_rule_type tof_rule_type;
6922         struct flow_grp_info grp_info = {
6923                 .external = !!external,
6924                 .transfer = !!attr->transfer,
6925                 .fdb_def_rule = !!priv->fdb_def_rule,
6926                 .std_tbl_fix = true,
6927         };
6928         const struct rte_eth_hairpin_conf *conf;
6929         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6930         const struct rte_flow_item *port_id_item = NULL;
6931         bool def_policy = false;
6932         bool shared_count = false;
6933         uint16_t udp_dport = 0;
6934
6935         if (items == NULL)
6936                 return -1;
6937         tunnel = is_tunnel_offload_active(dev) ?
6938                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6939         if (tunnel) {
6940                 if (!dev_conf->dv_flow_en)
6941                         return rte_flow_error_set
6942                                 (error, ENOTSUP,
6943                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6944                                  NULL, "tunnel offload requires DV flow interface");
6945                 if (priv->representor)
6946                         return rte_flow_error_set
6947                                 (error, ENOTSUP,
6948                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6949                                  NULL, "decap not supported for VF representor");
6950                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6951                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6952                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6953                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6954                                         MLX5_FLOW_ACTION_DECAP;
6955                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6956                                         (dev, attr, tunnel, tof_rule_type);
6957         }
6958         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6959         if (ret < 0)
6960                 return ret;
6961         is_root = (uint64_t)ret;
6962         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6963                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6964                 int type = items->type;
6965
6966                 if (!mlx5_flow_os_item_supported(type))
6967                         return rte_flow_error_set(error, ENOTSUP,
6968                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6969                                                   NULL, "item not supported");
6970                 switch (type) {
6971                 case RTE_FLOW_ITEM_TYPE_VOID:
6972                         break;
6973                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6974                         ret = flow_dv_validate_item_port_id
6975                                         (dev, items, attr, item_flags, error);
6976                         if (ret < 0)
6977                                 return ret;
6978                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6979                         port_id_item = items;
6980                         break;
6981                 case RTE_FLOW_ITEM_TYPE_ETH:
6982                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6983                                                           true, error);
6984                         if (ret < 0)
6985                                 return ret;
6986                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6987                                              MLX5_FLOW_LAYER_OUTER_L2;
6988                         if (items->mask != NULL && items->spec != NULL) {
6989                                 ether_type =
6990                                         ((const struct rte_flow_item_eth *)
6991                                          items->spec)->type;
6992                                 ether_type &=
6993                                         ((const struct rte_flow_item_eth *)
6994                                          items->mask)->type;
6995                                 ether_type = rte_be_to_cpu_16(ether_type);
6996                         } else {
6997                                 ether_type = 0;
6998                         }
6999                         break;
7000                 case RTE_FLOW_ITEM_TYPE_VLAN:
7001                         ret = flow_dv_validate_item_vlan(items, item_flags,
7002                                                          dev, error);
7003                         if (ret < 0)
7004                                 return ret;
7005                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
7006                                              MLX5_FLOW_LAYER_OUTER_VLAN;
7007                         if (items->mask != NULL && items->spec != NULL) {
7008                                 ether_type =
7009                                         ((const struct rte_flow_item_vlan *)
7010                                          items->spec)->inner_type;
7011                                 ether_type &=
7012                                         ((const struct rte_flow_item_vlan *)
7013                                          items->mask)->inner_type;
7014                                 ether_type = rte_be_to_cpu_16(ether_type);
7015                         } else {
7016                                 ether_type = 0;
7017                         }
7018                         /* Store outer VLAN mask for of_push_vlan action. */
7019                         if (!tunnel)
7020                                 vlan_m = items->mask;
7021                         break;
7022                 case RTE_FLOW_ITEM_TYPE_IPV4:
7023                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7024                                                   &item_flags, &tunnel);
7025                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7026                                                          last_item, ether_type,
7027                                                          error);
7028                         if (ret < 0)
7029                                 return ret;
7030                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7031                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7032                         if (items->mask != NULL &&
7033                             ((const struct rte_flow_item_ipv4 *)
7034                              items->mask)->hdr.next_proto_id) {
7035                                 next_protocol =
7036                                         ((const struct rte_flow_item_ipv4 *)
7037                                          (items->spec))->hdr.next_proto_id;
7038                                 next_protocol &=
7039                                         ((const struct rte_flow_item_ipv4 *)
7040                                          (items->mask))->hdr.next_proto_id;
7041                         } else {
7042                                 /* Reset for inner layer. */
7043                                 next_protocol = 0xff;
7044                         }
7045                         break;
7046                 case RTE_FLOW_ITEM_TYPE_IPV6:
7047                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7048                                                   &item_flags, &tunnel);
7049                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7050                                                            last_item,
7051                                                            ether_type,
7052                                                            &nic_ipv6_mask,
7053                                                            error);
7054                         if (ret < 0)
7055                                 return ret;
7056                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7057                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7058                         if (items->mask != NULL &&
7059                             ((const struct rte_flow_item_ipv6 *)
7060                              items->mask)->hdr.proto) {
7061                                 item_ipv6_proto =
7062                                         ((const struct rte_flow_item_ipv6 *)
7063                                          items->spec)->hdr.proto;
7064                                 next_protocol =
7065                                         ((const struct rte_flow_item_ipv6 *)
7066                                          items->spec)->hdr.proto;
7067                                 next_protocol &=
7068                                         ((const struct rte_flow_item_ipv6 *)
7069                                          items->mask)->hdr.proto;
7070                         } else {
7071                                 /* Reset for inner layer. */
7072                                 next_protocol = 0xff;
7073                         }
7074                         break;
7075                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7076                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
7077                                                                   item_flags,
7078                                                                   error);
7079                         if (ret < 0)
7080                                 return ret;
7081                         last_item = tunnel ?
7082                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7083                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7084                         if (items->mask != NULL &&
7085                             ((const struct rte_flow_item_ipv6_frag_ext *)
7086                              items->mask)->hdr.next_header) {
7087                                 next_protocol =
7088                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7089                                  items->spec)->hdr.next_header;
7090                                 next_protocol &=
7091                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7092                                  items->mask)->hdr.next_header;
7093                         } else {
7094                                 /* Reset for inner layer. */
7095                                 next_protocol = 0xff;
7096                         }
7097                         break;
7098                 case RTE_FLOW_ITEM_TYPE_TCP:
7099                         ret = mlx5_flow_validate_item_tcp
7100                                                 (items, item_flags,
7101                                                  next_protocol,
7102                                                  &nic_tcp_mask,
7103                                                  error);
7104                         if (ret < 0)
7105                                 return ret;
7106                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7107                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7108                         break;
7109                 case RTE_FLOW_ITEM_TYPE_UDP:
7110                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7111                                                           next_protocol,
7112                                                           error);
7113                         const struct rte_flow_item_udp *spec = items->spec;
7114                         const struct rte_flow_item_udp *mask = items->mask;
7115                         if (!mask)
7116                                 mask = &rte_flow_item_udp_mask;
7117                         if (spec != NULL)
7118                                 udp_dport = rte_be_to_cpu_16
7119                                                 (spec->hdr.dst_port &
7120                                                  mask->hdr.dst_port);
7121                         if (ret < 0)
7122                                 return ret;
7123                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7124                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7125                         break;
7126                 case RTE_FLOW_ITEM_TYPE_GRE:
7127                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7128                                                           next_protocol, error);
7129                         if (ret < 0)
7130                                 return ret;
7131                         gre_item = items;
7132                         last_item = MLX5_FLOW_LAYER_GRE;
7133                         break;
7134                 case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
7135                         ret = mlx5_flow_validate_item_gre_option(dev, items, item_flags,
7136                                                           attr, gre_item, error);
7137                         if (ret < 0)
7138                                 return ret;
7139                         last_item = MLX5_FLOW_LAYER_GRE;
7140                         break;
7141                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7142                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7143                                                             next_protocol,
7144                                                             error);
7145                         if (ret < 0)
7146                                 return ret;
7147                         last_item = MLX5_FLOW_LAYER_NVGRE;
7148                         break;
7149                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7150                         ret = mlx5_flow_validate_item_gre_key
7151                                 (items, item_flags, gre_item, error);
7152                         if (ret < 0)
7153                                 return ret;
7154                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7155                         break;
7156                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7157                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7158                                                             items, item_flags,
7159                                                             attr, error);
7160                         if (ret < 0)
7161                                 return ret;
7162                         last_item = MLX5_FLOW_LAYER_VXLAN;
7163                         break;
7164                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7165                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7166                                                                 item_flags, dev,
7167                                                                 error);
7168                         if (ret < 0)
7169                                 return ret;
7170                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7171                         break;
7172                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7173                         ret = mlx5_flow_validate_item_geneve(items,
7174                                                              item_flags, dev,
7175                                                              error);
7176                         if (ret < 0)
7177                                 return ret;
7178                         geneve_item = items;
7179                         last_item = MLX5_FLOW_LAYER_GENEVE;
7180                         break;
7181                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7182                         ret = mlx5_flow_validate_item_geneve_opt(items,
7183                                                                  last_item,
7184                                                                  geneve_item,
7185                                                                  dev,
7186                                                                  error);
7187                         if (ret < 0)
7188                                 return ret;
7189                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7190                         break;
7191                 case RTE_FLOW_ITEM_TYPE_MPLS:
7192                         ret = mlx5_flow_validate_item_mpls(dev, items,
7193                                                            item_flags,
7194                                                            last_item, error);
7195                         if (ret < 0)
7196                                 return ret;
7197                         last_item = MLX5_FLOW_LAYER_MPLS;
7198                         break;
7199
7200                 case RTE_FLOW_ITEM_TYPE_MARK:
7201                         ret = flow_dv_validate_item_mark(dev, items, attr,
7202                                                          error);
7203                         if (ret < 0)
7204                                 return ret;
7205                         last_item = MLX5_FLOW_ITEM_MARK;
7206                         break;
7207                 case RTE_FLOW_ITEM_TYPE_META:
7208                         ret = flow_dv_validate_item_meta(dev, items, attr,
7209                                                          error);
7210                         if (ret < 0)
7211                                 return ret;
7212                         last_item = MLX5_FLOW_ITEM_METADATA;
7213                         break;
7214                 case RTE_FLOW_ITEM_TYPE_ICMP:
7215                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7216                                                            next_protocol,
7217                                                            error);
7218                         if (ret < 0)
7219                                 return ret;
7220                         last_item = MLX5_FLOW_LAYER_ICMP;
7221                         break;
7222                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7223                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7224                                                             next_protocol,
7225                                                             error);
7226                         if (ret < 0)
7227                                 return ret;
7228                         item_ipv6_proto = IPPROTO_ICMPV6;
7229                         last_item = MLX5_FLOW_LAYER_ICMP6;
7230                         break;
7231                 case RTE_FLOW_ITEM_TYPE_TAG:
7232                         ret = flow_dv_validate_item_tag(dev, items,
7233                                                         attr, error);
7234                         if (ret < 0)
7235                                 return ret;
7236                         last_item = MLX5_FLOW_ITEM_TAG;
7237                         break;
7238                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7239                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7240                         break;
7241                 case RTE_FLOW_ITEM_TYPE_GTP:
7242                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7243                                                         error);
7244                         if (ret < 0)
7245                                 return ret;
7246                         gtp_item = items;
7247                         last_item = MLX5_FLOW_LAYER_GTP;
7248                         break;
7249                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7250                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7251                                                             gtp_item, attr,
7252                                                             error);
7253                         if (ret < 0)
7254                                 return ret;
7255                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7256                         break;
7257                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7258                         /* Capacity will be checked in the translate stage. */
7259                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7260                                                             last_item,
7261                                                             ether_type,
7262                                                             &nic_ecpri_mask,
7263                                                             error);
7264                         if (ret < 0)
7265                                 return ret;
7266                         last_item = MLX5_FLOW_LAYER_ECPRI;
7267                         break;
7268                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7269                         ret = flow_dv_validate_item_integrity(dev, items,
7270                                                               item_flags,
7271                                                               &last_item,
7272                                                               integrity_items,
7273                                                               error);
7274                         if (ret < 0)
7275                                 return ret;
7276                         break;
7277                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7278                         ret = flow_dv_validate_item_aso_ct(dev, items,
7279                                                            &item_flags, error);
7280                         if (ret < 0)
7281                                 return ret;
7282                         break;
7283                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7284                         /* tunnel offload item was processed before
7285                          * list it here as a supported type
7286                          */
7287                         break;
7288                 case RTE_FLOW_ITEM_TYPE_FLEX:
7289                         ret = flow_dv_validate_item_flex(dev, items, item_flags,
7290                                                          &last_item,
7291                                                          tunnel != 0, error);
7292                         if (ret < 0)
7293                                 return ret;
7294                         break;
7295                 default:
7296                         return rte_flow_error_set(error, ENOTSUP,
7297                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7298                                                   NULL, "item not supported");
7299                 }
7300                 item_flags |= last_item;
7301         }
7302         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7303                 ret = flow_dv_validate_item_integrity_post(integrity_items,
7304                                                            item_flags, error);
7305                 if (ret)
7306                         return ret;
7307         }
7308         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7309                 int type = actions->type;
7310
7311                 if (!mlx5_flow_os_action_supported(type))
7312                         return rte_flow_error_set(error, ENOTSUP,
7313                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7314                                                   actions,
7315                                                   "action not supported");
7316                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7317                         return rte_flow_error_set(error, ENOTSUP,
7318                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7319                                                   actions, "too many actions");
7320                 if (action_flags &
7321                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7322                         return rte_flow_error_set(error, ENOTSUP,
7323                                 RTE_FLOW_ERROR_TYPE_ACTION,
7324                                 NULL, "meter action with policy "
7325                                 "must be the last action");
7326                 switch (type) {
7327                 case RTE_FLOW_ACTION_TYPE_VOID:
7328                         break;
7329                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7330                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7331                         ret = flow_dv_validate_action_port_id(dev,
7332                                                               action_flags,
7333                                                               actions,
7334                                                               attr,
7335                                                               error);
7336                         if (ret)
7337                                 return ret;
7338                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7339                         ++actions_n;
7340                         break;
7341                 case RTE_FLOW_ACTION_TYPE_FLAG:
7342                         ret = flow_dv_validate_action_flag(dev, action_flags,
7343                                                            attr, error);
7344                         if (ret < 0)
7345                                 return ret;
7346                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7347                                 /* Count all modify-header actions as one. */
7348                                 if (!(action_flags &
7349                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7350                                         ++actions_n;
7351                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7352                                                 MLX5_FLOW_ACTION_MARK_EXT;
7353                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7354                                         modify_after_mirror = 1;
7355
7356                         } else {
7357                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7358                                 ++actions_n;
7359                         }
7360                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7361                         break;
7362                 case RTE_FLOW_ACTION_TYPE_MARK:
7363                         ret = flow_dv_validate_action_mark(dev, actions,
7364                                                            action_flags,
7365                                                            attr, error);
7366                         if (ret < 0)
7367                                 return ret;
7368                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7369                                 /* Count all modify-header actions as one. */
7370                                 if (!(action_flags &
7371                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7372                                         ++actions_n;
7373                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7374                                                 MLX5_FLOW_ACTION_MARK_EXT;
7375                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7376                                         modify_after_mirror = 1;
7377                         } else {
7378                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7379                                 ++actions_n;
7380                         }
7381                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7382                         break;
7383                 case RTE_FLOW_ACTION_TYPE_SET_META:
7384                         ret = flow_dv_validate_action_set_meta(dev, actions,
7385                                                                action_flags,
7386                                                                attr, error);
7387                         if (ret < 0)
7388                                 return ret;
7389                         /* Count all modify-header actions as one action. */
7390                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7391                                 ++actions_n;
7392                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7393                                 modify_after_mirror = 1;
7394                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7395                         rw_act_num += MLX5_ACT_NUM_SET_META;
7396                         break;
7397                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7398                         ret = flow_dv_validate_action_set_tag(dev, actions,
7399                                                               action_flags,
7400                                                               attr, error);
7401                         if (ret < 0)
7402                                 return ret;
7403                         /* Count all modify-header actions as one action. */
7404                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7405                                 ++actions_n;
7406                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7407                                 modify_after_mirror = 1;
7408                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7409                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7410                         break;
7411                 case RTE_FLOW_ACTION_TYPE_DROP:
7412                         ret = mlx5_flow_validate_action_drop(action_flags,
7413                                                              attr, error);
7414                         if (ret < 0)
7415                                 return ret;
7416                         action_flags |= MLX5_FLOW_ACTION_DROP;
7417                         ++actions_n;
7418                         break;
7419                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7420                         ret = mlx5_flow_validate_action_queue(actions,
7421                                                               action_flags, dev,
7422                                                               attr, error);
7423                         if (ret < 0)
7424                                 return ret;
7425                         queue_index = ((const struct rte_flow_action_queue *)
7426                                                         (actions->conf))->index;
7427                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7428                         ++actions_n;
7429                         break;
7430                 case RTE_FLOW_ACTION_TYPE_RSS:
7431                         rss = actions->conf;
7432                         ret = mlx5_flow_validate_action_rss(actions,
7433                                                             action_flags, dev,
7434                                                             attr, item_flags,
7435                                                             error);
7436                         if (ret < 0)
7437                                 return ret;
7438                         if (rss && sample_rss &&
7439                             (sample_rss->level != rss->level ||
7440                             sample_rss->types != rss->types))
7441                                 return rte_flow_error_set(error, ENOTSUP,
7442                                         RTE_FLOW_ERROR_TYPE_ACTION,
7443                                         NULL,
7444                                         "Can't use the different RSS types "
7445                                         "or level in the same flow");
7446                         if (rss != NULL && rss->queue_num)
7447                                 queue_index = rss->queue[0];
7448                         action_flags |= MLX5_FLOW_ACTION_RSS;
7449                         ++actions_n;
7450                         break;
7451                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7452                         ret =
7453                         mlx5_flow_validate_action_default_miss(action_flags,
7454                                         attr, error);
7455                         if (ret < 0)
7456                                 return ret;
7457                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7458                         ++actions_n;
7459                         break;
7460                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7461                         shared_count = true;
7462                         /* fall-through. */
7463                 case RTE_FLOW_ACTION_TYPE_COUNT:
7464                         ret = flow_dv_validate_action_count(dev, shared_count,
7465                                                             action_flags,
7466                                                             attr, error);
7467                         if (ret < 0)
7468                                 return ret;
7469                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7470                         ++actions_n;
7471                         break;
7472                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7473                         if (flow_dv_validate_action_pop_vlan(dev,
7474                                                              action_flags,
7475                                                              actions,
7476                                                              item_flags, attr,
7477                                                              error))
7478                                 return -rte_errno;
7479                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7480                                 modify_after_mirror = 1;
7481                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7482                         ++actions_n;
7483                         break;
7484                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7485                         ret = flow_dv_validate_action_push_vlan(dev,
7486                                                                 action_flags,
7487                                                                 vlan_m,
7488                                                                 actions, attr,
7489                                                                 error);
7490                         if (ret < 0)
7491                                 return ret;
7492                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7493                                 modify_after_mirror = 1;
7494                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7495                         ++actions_n;
7496                         break;
7497                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7498                         ret = flow_dv_validate_action_set_vlan_pcp
7499                                                 (action_flags, actions, error);
7500                         if (ret < 0)
7501                                 return ret;
7502                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7503                                 modify_after_mirror = 1;
7504                         /* Count PCP with push_vlan command. */
7505                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7506                         break;
7507                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7508                         ret = flow_dv_validate_action_set_vlan_vid
7509                                                 (item_flags, action_flags,
7510                                                  actions, error);
7511                         if (ret < 0)
7512                                 return ret;
7513                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7514                                 modify_after_mirror = 1;
7515                         /* Count VID with push_vlan command. */
7516                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7517                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7518                         break;
7519                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7520                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7521                         ret = flow_dv_validate_action_l2_encap(dev,
7522                                                                action_flags,
7523                                                                actions, attr,
7524                                                                error);
7525                         if (ret < 0)
7526                                 return ret;
7527                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7528                         ++actions_n;
7529                         break;
7530                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7531                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7532                         ret = flow_dv_validate_action_decap(dev, action_flags,
7533                                                             actions, item_flags,
7534                                                             attr, error);
7535                         if (ret < 0)
7536                                 return ret;
7537                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7538                                 modify_after_mirror = 1;
7539                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7540                         ++actions_n;
7541                         break;
7542                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7543                         ret = flow_dv_validate_action_raw_encap_decap
7544                                 (dev, NULL, actions->conf, attr, &action_flags,
7545                                  &actions_n, actions, item_flags, error);
7546                         if (ret < 0)
7547                                 return ret;
7548                         break;
7549                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7550                         decap = actions->conf;
7551                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7552                                 ;
7553                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7554                                 encap = NULL;
7555                                 actions--;
7556                         } else {
7557                                 encap = actions->conf;
7558                         }
7559                         ret = flow_dv_validate_action_raw_encap_decap
7560                                            (dev,
7561                                             decap ? decap : &empty_decap, encap,
7562                                             attr, &action_flags, &actions_n,
7563                                             actions, item_flags, error);
7564                         if (ret < 0)
7565                                 return ret;
7566                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7567                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7568                                 modify_after_mirror = 1;
7569                         break;
7570                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7571                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7572                         ret = flow_dv_validate_action_modify_mac(action_flags,
7573                                                                  actions,
7574                                                                  item_flags,
7575                                                                  error);
7576                         if (ret < 0)
7577                                 return ret;
7578                         /* Count all modify-header actions as one action. */
7579                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7580                                 ++actions_n;
7581                         action_flags |= actions->type ==
7582                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7583                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7584                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7585                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7586                                 modify_after_mirror = 1;
7587                         /*
7588                          * Even if the source and destination MAC addresses have
7589                          * overlap in the header with 4B alignment, the convert
7590                          * function will handle them separately and 4 SW actions
7591                          * will be created. And 2 actions will be added each
7592                          * time no matter how many bytes of address will be set.
7593                          */
7594                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7595                         break;
7596                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7597                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7598                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7599                                                                   actions,
7600                                                                   item_flags,
7601                                                                   error);
7602                         if (ret < 0)
7603                                 return ret;
7604                         /* Count all modify-header actions as one action. */
7605                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7606                                 ++actions_n;
7607                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7608                                 modify_after_mirror = 1;
7609                         action_flags |= actions->type ==
7610                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7611                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7612                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7613                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7614                         break;
7615                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7616                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7617                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7618                                                                   actions,
7619                                                                   item_flags,
7620                                                                   error);
7621                         if (ret < 0)
7622                                 return ret;
7623                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7624                                 return rte_flow_error_set(error, ENOTSUP,
7625                                         RTE_FLOW_ERROR_TYPE_ACTION,
7626                                         actions,
7627                                         "Can't change header "
7628                                         "with ICMPv6 proto");
7629                         /* Count all modify-header actions as one action. */
7630                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7631                                 ++actions_n;
7632                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7633                                 modify_after_mirror = 1;
7634                         action_flags |= actions->type ==
7635                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7636                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7637                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7638                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7639                         break;
7640                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7641                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7642                         ret = flow_dv_validate_action_modify_tp(action_flags,
7643                                                                 actions,
7644                                                                 item_flags,
7645                                                                 error);
7646                         if (ret < 0)
7647                                 return ret;
7648                         /* Count all modify-header actions as one action. */
7649                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7650                                 ++actions_n;
7651                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7652                                 modify_after_mirror = 1;
7653                         action_flags |= actions->type ==
7654                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7655                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7656                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7657                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7658                         break;
7659                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7660                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7661                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7662                                                                  actions,
7663                                                                  item_flags,
7664                                                                  error);
7665                         if (ret < 0)
7666                                 return ret;
7667                         /* Count all modify-header actions as one action. */
7668                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7669                                 ++actions_n;
7670                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7671                                 modify_after_mirror = 1;
7672                         action_flags |= actions->type ==
7673                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7674                                                 MLX5_FLOW_ACTION_SET_TTL :
7675                                                 MLX5_FLOW_ACTION_DEC_TTL;
7676                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7677                         break;
7678                 case RTE_FLOW_ACTION_TYPE_JUMP:
7679                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7680                                                            action_flags,
7681                                                            attr, external,
7682                                                            error);
7683                         if (ret)
7684                                 return ret;
7685                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7686                             fdb_mirror_limit)
7687                                 return rte_flow_error_set(error, EINVAL,
7688                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7689                                                   NULL,
7690                                                   "sample and jump action combination is not supported");
7691                         ++actions_n;
7692                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7693                         break;
7694                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7695                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7696                         ret = flow_dv_validate_action_modify_tcp_seq
7697                                                                 (action_flags,
7698                                                                  actions,
7699                                                                  item_flags,
7700                                                                  error);
7701                         if (ret < 0)
7702                                 return ret;
7703                         /* Count all modify-header actions as one action. */
7704                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7705                                 ++actions_n;
7706                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7707                                 modify_after_mirror = 1;
7708                         action_flags |= actions->type ==
7709                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7710                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7711                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7712                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7713                         break;
7714                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7715                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7716                         ret = flow_dv_validate_action_modify_tcp_ack
7717                                                                 (action_flags,
7718                                                                  actions,
7719                                                                  item_flags,
7720                                                                  error);
7721                         if (ret < 0)
7722                                 return ret;
7723                         /* Count all modify-header actions as one action. */
7724                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7725                                 ++actions_n;
7726                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7727                                 modify_after_mirror = 1;
7728                         action_flags |= actions->type ==
7729                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7730                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7731                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7732                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7733                         break;
7734                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7735                         break;
7736                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7737                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7738                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7739                         break;
7740                 case RTE_FLOW_ACTION_TYPE_METER:
7741                         ret = mlx5_flow_validate_action_meter(dev,
7742                                                               action_flags,
7743                                                               item_flags,
7744                                                               actions, attr,
7745                                                               port_id_item,
7746                                                               &def_policy,
7747                                                               error);
7748                         if (ret < 0)
7749                                 return ret;
7750                         action_flags |= MLX5_FLOW_ACTION_METER;
7751                         if (!def_policy)
7752                                 action_flags |=
7753                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7754                         ++actions_n;
7755                         /* Meter action will add one more TAG action. */
7756                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7757                         break;
7758                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7759                         if (!attr->transfer && !attr->group)
7760                                 return rte_flow_error_set(error, ENOTSUP,
7761                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7762                                                                            NULL,
7763                           "Shared ASO age action is not supported for group 0");
7764                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7765                                 return rte_flow_error_set
7766                                                   (error, EINVAL,
7767                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7768                                                    NULL,
7769                                                    "duplicate age actions set");
7770                         action_flags |= MLX5_FLOW_ACTION_AGE;
7771                         ++actions_n;
7772                         break;
7773                 case RTE_FLOW_ACTION_TYPE_AGE:
7774                         ret = flow_dv_validate_action_age(action_flags,
7775                                                           actions, dev,
7776                                                           error);
7777                         if (ret < 0)
7778                                 return ret;
7779                         /*
7780                          * Validate the regular AGE action (using counter)
7781                          * mutual exclusion with indirect counter actions.
7782                          */
7783                         if (!flow_hit_aso_supported(priv->sh, attr)) {
7784                                 if (shared_count)
7785                                         return rte_flow_error_set
7786                                                 (error, EINVAL,
7787                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7788                                                 NULL,
7789                                                 "old age and indirect count combination is not supported");
7790                                 if (sample_count)
7791                                         return rte_flow_error_set
7792                                                 (error, EINVAL,
7793                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7794                                                 NULL,
7795                                                 "old age action and count must be in the same sub flow");
7796                         }
7797                         action_flags |= MLX5_FLOW_ACTION_AGE;
7798                         ++actions_n;
7799                         break;
7800                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7801                         ret = flow_dv_validate_action_modify_ipv4_dscp
7802                                                          (action_flags,
7803                                                           actions,
7804                                                           item_flags,
7805                                                           error);
7806                         if (ret < 0)
7807                                 return ret;
7808                         /* Count all modify-header actions as one action. */
7809                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7810                                 ++actions_n;
7811                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7812                                 modify_after_mirror = 1;
7813                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7814                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7815                         break;
7816                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7817                         ret = flow_dv_validate_action_modify_ipv6_dscp
7818                                                                 (action_flags,
7819                                                                  actions,
7820                                                                  item_flags,
7821                                                                  error);
7822                         if (ret < 0)
7823                                 return ret;
7824                         /* Count all modify-header actions as one action. */
7825                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7826                                 ++actions_n;
7827                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7828                                 modify_after_mirror = 1;
7829                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7830                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7831                         break;
7832                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7833                         ret = flow_dv_validate_action_sample(&action_flags,
7834                                                              actions, dev,
7835                                                              attr, item_flags,
7836                                                              rss, &sample_rss,
7837                                                              &sample_count,
7838                                                              &fdb_mirror_limit,
7839                                                              error);
7840                         if (ret < 0)
7841                                 return ret;
7842                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7843                         ++actions_n;
7844                         break;
7845                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7846                         ret = flow_dv_validate_action_modify_field(dev,
7847                                                                    action_flags,
7848                                                                    actions,
7849                                                                    attr,
7850                                                                    error);
7851                         if (ret < 0)
7852                                 return ret;
7853                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7854                                 modify_after_mirror = 1;
7855                         /* Count all modify-header actions as one action. */
7856                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7857                                 ++actions_n;
7858                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7859                         rw_act_num += ret;
7860                         break;
7861                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7862                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7863                                                              item_flags, attr,
7864                                                              error);
7865                         if (ret < 0)
7866                                 return ret;
7867                         action_flags |= MLX5_FLOW_ACTION_CT;
7868                         break;
7869                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7870                         /* tunnel offload action was processed before
7871                          * list it here as a supported type
7872                          */
7873                         break;
7874                 default:
7875                         return rte_flow_error_set(error, ENOTSUP,
7876                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7877                                                   actions,
7878                                                   "action not supported");
7879                 }
7880         }
7881         /*
7882          * Validate actions in flow rules
7883          * - Explicit decap action is prohibited by the tunnel offload API.
7884          * - Drop action in tunnel steer rule is prohibited by the API.
7885          * - Application cannot use MARK action because it's value can mask
7886          *   tunnel default miss notification.
7887          * - JUMP in tunnel match rule has no support in current PMD
7888          *   implementation.
7889          * - TAG & META are reserved for future uses.
7890          */
7891         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7892                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7893                                             MLX5_FLOW_ACTION_MARK     |
7894                                             MLX5_FLOW_ACTION_SET_TAG  |
7895                                             MLX5_FLOW_ACTION_SET_META |
7896                                             MLX5_FLOW_ACTION_DROP;
7897
7898                 if (action_flags & bad_actions_mask)
7899                         return rte_flow_error_set
7900                                         (error, EINVAL,
7901                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7902                                         "Invalid RTE action in tunnel "
7903                                         "set decap rule");
7904                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7905                         return rte_flow_error_set
7906                                         (error, EINVAL,
7907                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7908                                         "tunnel set decap rule must terminate "
7909                                         "with JUMP");
7910                 if (!attr->ingress)
7911                         return rte_flow_error_set
7912                                         (error, EINVAL,
7913                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7914                                         "tunnel flows for ingress traffic only");
7915         }
7916         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7917                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7918                                             MLX5_FLOW_ACTION_MARK    |
7919                                             MLX5_FLOW_ACTION_SET_TAG |
7920                                             MLX5_FLOW_ACTION_SET_META;
7921
7922                 if (action_flags & bad_actions_mask)
7923                         return rte_flow_error_set
7924                                         (error, EINVAL,
7925                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7926                                         "Invalid RTE action in tunnel "
7927                                         "set match rule");
7928         }
7929         /*
7930          * Validate the drop action mutual exclusion with other actions.
7931          * Drop action is mutually-exclusive with any other action, except for
7932          * Count action.
7933          * Drop action compatibility with tunnel offload was already validated.
7934          */
7935         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7936                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7937         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7938             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7939                 return rte_flow_error_set(error, EINVAL,
7940                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7941                                           "Drop action is mutually-exclusive "
7942                                           "with any other action, except for "
7943                                           "Count action");
7944         /* Eswitch has few restrictions on using items and actions */
7945         if (attr->transfer) {
7946                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7947                     action_flags & MLX5_FLOW_ACTION_FLAG)
7948                         return rte_flow_error_set(error, ENOTSUP,
7949                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7950                                                   NULL,
7951                                                   "unsupported action FLAG");
7952                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7953                     action_flags & MLX5_FLOW_ACTION_MARK)
7954                         return rte_flow_error_set(error, ENOTSUP,
7955                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7956                                                   NULL,
7957                                                   "unsupported action MARK");
7958                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7959                         return rte_flow_error_set(error, ENOTSUP,
7960                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7961                                                   NULL,
7962                                                   "unsupported action QUEUE");
7963                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7964                         return rte_flow_error_set(error, ENOTSUP,
7965                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7966                                                   NULL,
7967                                                   "unsupported action RSS");
7968                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7969                         return rte_flow_error_set(error, EINVAL,
7970                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7971                                                   actions,
7972                                                   "no fate action is found");
7973         } else {
7974                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7975                         return rte_flow_error_set(error, EINVAL,
7976                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7977                                                   actions,
7978                                                   "no fate action is found");
7979         }
7980         /*
7981          * Continue validation for Xcap and VLAN actions.
7982          * If hairpin is working in explicit TX rule mode, there is no actions
7983          * splitting and the validation of hairpin ingress flow should be the
7984          * same as other standard flows.
7985          */
7986         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7987                              MLX5_FLOW_VLAN_ACTIONS)) &&
7988             (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index) ||
7989              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7990              conf->tx_explicit != 0))) {
7991                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7992                     MLX5_FLOW_XCAP_ACTIONS)
7993                         return rte_flow_error_set(error, ENOTSUP,
7994                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7995                                                   NULL, "encap and decap "
7996                                                   "combination aren't supported");
7997                 if (!attr->transfer && attr->ingress) {
7998                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7999                                 return rte_flow_error_set
8000                                                 (error, ENOTSUP,
8001                                                  RTE_FLOW_ERROR_TYPE_ACTION,
8002                                                  NULL, "encap is not supported"
8003                                                  " for ingress traffic");
8004                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8005                                 return rte_flow_error_set
8006                                                 (error, ENOTSUP,
8007                                                  RTE_FLOW_ERROR_TYPE_ACTION,
8008                                                  NULL, "push VLAN action not "
8009                                                  "supported for ingress");
8010                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
8011                                         MLX5_FLOW_VLAN_ACTIONS)
8012                                 return rte_flow_error_set
8013                                                 (error, ENOTSUP,
8014                                                  RTE_FLOW_ERROR_TYPE_ACTION,
8015                                                  NULL, "no support for "
8016                                                  "multiple VLAN actions");
8017                 }
8018         }
8019         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
8020                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
8021                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
8022                         attr->ingress)
8023                         return rte_flow_error_set
8024                                 (error, ENOTSUP,
8025                                 RTE_FLOW_ERROR_TYPE_ACTION,
8026                                 NULL, "fate action not supported for "
8027                                 "meter with policy");
8028                 if (attr->egress) {
8029                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
8030                                 return rte_flow_error_set
8031                                         (error, ENOTSUP,
8032                                         RTE_FLOW_ERROR_TYPE_ACTION,
8033                                         NULL, "modify header action in egress "
8034                                         "cannot be done before meter action");
8035                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8036                                 return rte_flow_error_set
8037                                         (error, ENOTSUP,
8038                                         RTE_FLOW_ERROR_TYPE_ACTION,
8039                                         NULL, "encap action in egress "
8040                                         "cannot be done before meter action");
8041                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8042                                 return rte_flow_error_set
8043                                         (error, ENOTSUP,
8044                                         RTE_FLOW_ERROR_TYPE_ACTION,
8045                                         NULL, "push vlan action in egress "
8046                                         "cannot be done before meter action");
8047                 }
8048         }
8049         /*
8050          * Hairpin flow will add one more TAG action in TX implicit mode.
8051          * In TX explicit mode, there will be no hairpin flow ID.
8052          */
8053         if (hairpin > 0)
8054                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8055         /* extra metadata enabled: one more TAG action will be add. */
8056         if (dev_conf->dv_flow_en &&
8057             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8058             mlx5_flow_ext_mreg_supported(dev))
8059                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8060         if (rw_act_num >
8061                         flow_dv_modify_hdr_action_max(dev, is_root)) {
8062                 return rte_flow_error_set(error, ENOTSUP,
8063                                           RTE_FLOW_ERROR_TYPE_ACTION,
8064                                           NULL, "too many header modify"
8065                                           " actions to support");
8066         }
8067         /* Eswitch egress mirror and modify flow has limitation on CX5 */
8068         if (fdb_mirror_limit && modify_after_mirror)
8069                 return rte_flow_error_set(error, EINVAL,
8070                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8071                                 "sample before modify action is not supported");
8072         return 0;
8073 }
8074
8075 /**
8076  * Internal preparation function. Allocates the DV flow size,
8077  * this size is constant.
8078  *
8079  * @param[in] dev
8080  *   Pointer to the rte_eth_dev structure.
8081  * @param[in] attr
8082  *   Pointer to the flow attributes.
8083  * @param[in] items
8084  *   Pointer to the list of items.
8085  * @param[in] actions
8086  *   Pointer to the list of actions.
8087  * @param[out] error
8088  *   Pointer to the error structure.
8089  *
8090  * @return
8091  *   Pointer to mlx5_flow object on success,
8092  *   otherwise NULL and rte_errno is set.
8093  */
8094 static struct mlx5_flow *
8095 flow_dv_prepare(struct rte_eth_dev *dev,
8096                 const struct rte_flow_attr *attr __rte_unused,
8097                 const struct rte_flow_item items[] __rte_unused,
8098                 const struct rte_flow_action actions[] __rte_unused,
8099                 struct rte_flow_error *error)
8100 {
8101         uint32_t handle_idx = 0;
8102         struct mlx5_flow *dev_flow;
8103         struct mlx5_flow_handle *dev_handle;
8104         struct mlx5_priv *priv = dev->data->dev_private;
8105         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8106
8107         MLX5_ASSERT(wks);
8108         wks->skip_matcher_reg = 0;
8109         wks->policy = NULL;
8110         wks->final_policy = NULL;
8111         /* In case of corrupting the memory. */
8112         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8113                 rte_flow_error_set(error, ENOSPC,
8114                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8115                                    "not free temporary device flow");
8116                 return NULL;
8117         }
8118         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8119                                    &handle_idx);
8120         if (!dev_handle) {
8121                 rte_flow_error_set(error, ENOMEM,
8122                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8123                                    "not enough memory to create flow handle");
8124                 return NULL;
8125         }
8126         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8127         dev_flow = &wks->flows[wks->flow_idx++];
8128         memset(dev_flow, 0, sizeof(*dev_flow));
8129         dev_flow->handle = dev_handle;
8130         dev_flow->handle_idx = handle_idx;
8131         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8132         dev_flow->ingress = attr->ingress;
8133         dev_flow->dv.transfer = attr->transfer;
8134         return dev_flow;
8135 }
8136
8137 #ifdef RTE_LIBRTE_MLX5_DEBUG
8138 /**
8139  * Sanity check for match mask and value. Similar to check_valid_spec() in
8140  * kernel driver. If unmasked bit is present in value, it returns failure.
8141  *
8142  * @param match_mask
8143  *   pointer to match mask buffer.
8144  * @param match_value
8145  *   pointer to match value buffer.
8146  *
8147  * @return
8148  *   0 if valid, -EINVAL otherwise.
8149  */
8150 static int
8151 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8152 {
8153         uint8_t *m = match_mask;
8154         uint8_t *v = match_value;
8155         unsigned int i;
8156
8157         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8158                 if (v[i] & ~m[i]) {
8159                         DRV_LOG(ERR,
8160                                 "match_value differs from match_criteria"
8161                                 " %p[%u] != %p[%u]",
8162                                 match_value, i, match_mask, i);
8163                         return -EINVAL;
8164                 }
8165         }
8166         return 0;
8167 }
8168 #endif
8169
8170 /**
8171  * Add match of ip_version.
8172  *
8173  * @param[in] group
8174  *   Flow group.
8175  * @param[in] headers_v
8176  *   Values header pointer.
8177  * @param[in] headers_m
8178  *   Masks header pointer.
8179  * @param[in] ip_version
8180  *   The IP version to set.
8181  */
8182 static inline void
8183 flow_dv_set_match_ip_version(uint32_t group,
8184                              void *headers_v,
8185                              void *headers_m,
8186                              uint8_t ip_version)
8187 {
8188         if (group == 0)
8189                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8190         else
8191                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8192                          ip_version);
8193         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8194         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8195         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8196 }
8197
8198 /**
8199  * Add Ethernet item to matcher and to the value.
8200  *
8201  * @param[in, out] matcher
8202  *   Flow matcher.
8203  * @param[in, out] key
8204  *   Flow matcher value.
8205  * @param[in] item
8206  *   Flow pattern to translate.
8207  * @param[in] inner
8208  *   Item is inner pattern.
8209  */
8210 static void
8211 flow_dv_translate_item_eth(void *matcher, void *key,
8212                            const struct rte_flow_item *item, int inner,
8213                            uint32_t group)
8214 {
8215         const struct rte_flow_item_eth *eth_m = item->mask;
8216         const struct rte_flow_item_eth *eth_v = item->spec;
8217         const struct rte_flow_item_eth nic_mask = {
8218                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8219                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8220                 .type = RTE_BE16(0xffff),
8221                 .has_vlan = 0,
8222         };
8223         void *hdrs_m;
8224         void *hdrs_v;
8225         char *l24_v;
8226         unsigned int i;
8227
8228         if (!eth_v)
8229                 return;
8230         if (!eth_m)
8231                 eth_m = &nic_mask;
8232         if (inner) {
8233                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8234                                          inner_headers);
8235                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8236         } else {
8237                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8238                                          outer_headers);
8239                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8240         }
8241         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8242                &eth_m->dst, sizeof(eth_m->dst));
8243         /* The value must be in the range of the mask. */
8244         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8245         for (i = 0; i < sizeof(eth_m->dst); ++i)
8246                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8247         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8248                &eth_m->src, sizeof(eth_m->src));
8249         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8250         /* The value must be in the range of the mask. */
8251         for (i = 0; i < sizeof(eth_m->dst); ++i)
8252                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8253         /*
8254          * HW supports match on one Ethertype, the Ethertype following the last
8255          * VLAN tag of the packet (see PRM).
8256          * Set match on ethertype only if ETH header is not followed by VLAN.
8257          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8258          * ethertype, and use ip_version field instead.
8259          * eCPRI over Ether layer will use type value 0xAEFE.
8260          */
8261         if (eth_m->type == 0xFFFF) {
8262                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8263                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8264                 switch (eth_v->type) {
8265                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8266                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8267                         return;
8268                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8269                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8270                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8271                         return;
8272                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8273                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8274                         return;
8275                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8276                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8277                         return;
8278                 default:
8279                         break;
8280                 }
8281         }
8282         if (eth_m->has_vlan) {
8283                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8284                 if (eth_v->has_vlan) {
8285                         /*
8286                          * Here, when also has_more_vlan field in VLAN item is
8287                          * not set, only single-tagged packets will be matched.
8288                          */
8289                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8290                         return;
8291                 }
8292         }
8293         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8294                  rte_be_to_cpu_16(eth_m->type));
8295         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8296         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8297 }
8298
8299 /**
8300  * Add VLAN item to matcher and to the value.
8301  *
8302  * @param[in, out] dev_flow
8303  *   Flow descriptor.
8304  * @param[in, out] matcher
8305  *   Flow matcher.
8306  * @param[in, out] key
8307  *   Flow matcher value.
8308  * @param[in] item
8309  *   Flow pattern to translate.
8310  * @param[in] inner
8311  *   Item is inner pattern.
8312  */
8313 static void
8314 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8315                             void *matcher, void *key,
8316                             const struct rte_flow_item *item,
8317                             int inner, uint32_t group)
8318 {
8319         const struct rte_flow_item_vlan *vlan_m = item->mask;
8320         const struct rte_flow_item_vlan *vlan_v = item->spec;
8321         void *hdrs_m;
8322         void *hdrs_v;
8323         uint16_t tci_m;
8324         uint16_t tci_v;
8325
8326         if (inner) {
8327                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8328                                          inner_headers);
8329                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8330         } else {
8331                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8332                                          outer_headers);
8333                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8334                 /*
8335                  * This is workaround, masks are not supported,
8336                  * and pre-validated.
8337                  */
8338                 if (vlan_v)
8339                         dev_flow->handle->vf_vlan.tag =
8340                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8341         }
8342         /*
8343          * When VLAN item exists in flow, mark packet as tagged,
8344          * even if TCI is not specified.
8345          */
8346         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8347                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8348                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8349         }
8350         if (!vlan_v)
8351                 return;
8352         if (!vlan_m)
8353                 vlan_m = &rte_flow_item_vlan_mask;
8354         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8355         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8356         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8357         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8358         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8359         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8360         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8361         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8362         /*
8363          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8364          * ethertype, and use ip_version field instead.
8365          */
8366         if (vlan_m->inner_type == 0xFFFF) {
8367                 switch (vlan_v->inner_type) {
8368                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8369                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8370                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8371                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8372                         return;
8373                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8374                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8375                         return;
8376                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8377                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8378                         return;
8379                 default:
8380                         break;
8381                 }
8382         }
8383         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8384                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8385                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8386                 /* Only one vlan_tag bit can be set. */
8387                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8388                 return;
8389         }
8390         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8391                  rte_be_to_cpu_16(vlan_m->inner_type));
8392         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8393                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8394 }
8395
8396 /**
8397  * Add IPV4 item to matcher and to the value.
8398  *
8399  * @param[in, out] matcher
8400  *   Flow matcher.
8401  * @param[in, out] key
8402  *   Flow matcher value.
8403  * @param[in] item
8404  *   Flow pattern to translate.
8405  * @param[in] inner
8406  *   Item is inner pattern.
8407  * @param[in] group
8408  *   The group to insert the rule.
8409  */
8410 static void
8411 flow_dv_translate_item_ipv4(void *matcher, void *key,
8412                             const struct rte_flow_item *item,
8413                             int inner, uint32_t group)
8414 {
8415         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8416         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8417         const struct rte_flow_item_ipv4 nic_mask = {
8418                 .hdr = {
8419                         .src_addr = RTE_BE32(0xffffffff),
8420                         .dst_addr = RTE_BE32(0xffffffff),
8421                         .type_of_service = 0xff,
8422                         .next_proto_id = 0xff,
8423                         .time_to_live = 0xff,
8424                 },
8425         };
8426         void *headers_m;
8427         void *headers_v;
8428         char *l24_m;
8429         char *l24_v;
8430         uint8_t tos, ihl_m, ihl_v;
8431
8432         if (inner) {
8433                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8434                                          inner_headers);
8435                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8436         } else {
8437                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8438                                          outer_headers);
8439                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8440         }
8441         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8442         if (!ipv4_v)
8443                 return;
8444         if (!ipv4_m)
8445                 ipv4_m = &nic_mask;
8446         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8447                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8448         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8449                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8450         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8451         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8452         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8453                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8454         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8455                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8456         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8457         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8458         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8459         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8460         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8461         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8462         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8463         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8464                  ipv4_m->hdr.type_of_service);
8465         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8466         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8467                  ipv4_m->hdr.type_of_service >> 2);
8468         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8469         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8470                  ipv4_m->hdr.next_proto_id);
8471         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8472                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8473         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8474                  ipv4_m->hdr.time_to_live);
8475         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8476                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8477         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8478                  !!(ipv4_m->hdr.fragment_offset));
8479         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8480                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8481 }
8482
8483 /**
8484  * Add IPV6 item to matcher and to the value.
8485  *
8486  * @param[in, out] matcher
8487  *   Flow matcher.
8488  * @param[in, out] key
8489  *   Flow matcher value.
8490  * @param[in] item
8491  *   Flow pattern to translate.
8492  * @param[in] inner
8493  *   Item is inner pattern.
8494  * @param[in] group
8495  *   The group to insert the rule.
8496  */
8497 static void
8498 flow_dv_translate_item_ipv6(void *matcher, void *key,
8499                             const struct rte_flow_item *item,
8500                             int inner, uint32_t group)
8501 {
8502         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8503         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8504         const struct rte_flow_item_ipv6 nic_mask = {
8505                 .hdr = {
8506                         .src_addr =
8507                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8508                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8509                         .dst_addr =
8510                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8511                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8512                         .vtc_flow = RTE_BE32(0xffffffff),
8513                         .proto = 0xff,
8514                         .hop_limits = 0xff,
8515                 },
8516         };
8517         void *headers_m;
8518         void *headers_v;
8519         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8520         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8521         char *l24_m;
8522         char *l24_v;
8523         uint32_t vtc_m;
8524         uint32_t vtc_v;
8525         int i;
8526         int size;
8527
8528         if (inner) {
8529                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8530                                          inner_headers);
8531                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8532         } else {
8533                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8534                                          outer_headers);
8535                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8536         }
8537         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8538         if (!ipv6_v)
8539                 return;
8540         if (!ipv6_m)
8541                 ipv6_m = &nic_mask;
8542         size = sizeof(ipv6_m->hdr.dst_addr);
8543         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8544                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8545         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8546                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8547         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8548         for (i = 0; i < size; ++i)
8549                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8550         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8551                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8552         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8553                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8554         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8555         for (i = 0; i < size; ++i)
8556                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8557         /* TOS. */
8558         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8559         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8560         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8561         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8562         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8563         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8564         /* Label. */
8565         if (inner) {
8566                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8567                          vtc_m);
8568                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8569                          vtc_v);
8570         } else {
8571                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8572                          vtc_m);
8573                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8574                          vtc_v);
8575         }
8576         /* Protocol. */
8577         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8578                  ipv6_m->hdr.proto);
8579         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8580                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8581         /* Hop limit. */
8582         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8583                  ipv6_m->hdr.hop_limits);
8584         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8585                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8586         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8587                  !!(ipv6_m->has_frag_ext));
8588         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8589                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8590 }
8591
8592 /**
8593  * Add IPV6 fragment extension item to matcher and to the value.
8594  *
8595  * @param[in, out] matcher
8596  *   Flow matcher.
8597  * @param[in, out] key
8598  *   Flow matcher value.
8599  * @param[in] item
8600  *   Flow pattern to translate.
8601  * @param[in] inner
8602  *   Item is inner pattern.
8603  */
8604 static void
8605 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8606                                      const struct rte_flow_item *item,
8607                                      int inner)
8608 {
8609         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8610         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8611         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8612                 .hdr = {
8613                         .next_header = 0xff,
8614                         .frag_data = RTE_BE16(0xffff),
8615                 },
8616         };
8617         void *headers_m;
8618         void *headers_v;
8619
8620         if (inner) {
8621                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8622                                          inner_headers);
8623                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8624         } else {
8625                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8626                                          outer_headers);
8627                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8628         }
8629         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8630         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8631         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8632         if (!ipv6_frag_ext_v)
8633                 return;
8634         if (!ipv6_frag_ext_m)
8635                 ipv6_frag_ext_m = &nic_mask;
8636         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8637                  ipv6_frag_ext_m->hdr.next_header);
8638         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8639                  ipv6_frag_ext_v->hdr.next_header &
8640                  ipv6_frag_ext_m->hdr.next_header);
8641 }
8642
8643 /**
8644  * Add TCP item to matcher and to the value.
8645  *
8646  * @param[in, out] matcher
8647  *   Flow matcher.
8648  * @param[in, out] key
8649  *   Flow matcher value.
8650  * @param[in] item
8651  *   Flow pattern to translate.
8652  * @param[in] inner
8653  *   Item is inner pattern.
8654  */
8655 static void
8656 flow_dv_translate_item_tcp(void *matcher, void *key,
8657                            const struct rte_flow_item *item,
8658                            int inner)
8659 {
8660         const struct rte_flow_item_tcp *tcp_m = item->mask;
8661         const struct rte_flow_item_tcp *tcp_v = item->spec;
8662         void *headers_m;
8663         void *headers_v;
8664
8665         if (inner) {
8666                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8667                                          inner_headers);
8668                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8669         } else {
8670                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8671                                          outer_headers);
8672                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8673         }
8674         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8675         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8676         if (!tcp_v)
8677                 return;
8678         if (!tcp_m)
8679                 tcp_m = &rte_flow_item_tcp_mask;
8680         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8681                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8682         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8683                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8684         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8685                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8686         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8687                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8688         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8689                  tcp_m->hdr.tcp_flags);
8690         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8691                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8692 }
8693
8694 /**
8695  * Add UDP item to matcher and to the value.
8696  *
8697  * @param[in, out] matcher
8698  *   Flow matcher.
8699  * @param[in, out] key
8700  *   Flow matcher value.
8701  * @param[in] item
8702  *   Flow pattern to translate.
8703  * @param[in] inner
8704  *   Item is inner pattern.
8705  */
8706 static void
8707 flow_dv_translate_item_udp(void *matcher, void *key,
8708                            const struct rte_flow_item *item,
8709                            int inner)
8710 {
8711         const struct rte_flow_item_udp *udp_m = item->mask;
8712         const struct rte_flow_item_udp *udp_v = item->spec;
8713         void *headers_m;
8714         void *headers_v;
8715
8716         if (inner) {
8717                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8718                                          inner_headers);
8719                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8720         } else {
8721                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8722                                          outer_headers);
8723                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8724         }
8725         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8726         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8727         if (!udp_v)
8728                 return;
8729         if (!udp_m)
8730                 udp_m = &rte_flow_item_udp_mask;
8731         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8732                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8733         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8734                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8735         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8736                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8737         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8738                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8739 }
8740
8741 /**
8742  * Add GRE optional Key item to matcher and to the value.
8743  *
8744  * @param[in, out] matcher
8745  *   Flow matcher.
8746  * @param[in, out] key
8747  *   Flow matcher value.
8748  * @param[in] item
8749  *   Flow pattern to translate.
8750  * @param[in] inner
8751  *   Item is inner pattern.
8752  */
8753 static void
8754 flow_dv_translate_item_gre_key(void *matcher, void *key,
8755                                    const struct rte_flow_item *item)
8756 {
8757         const rte_be32_t *key_m = item->mask;
8758         const rte_be32_t *key_v = item->spec;
8759         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8760         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8761         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8762
8763         /* GRE K bit must be on and should already be validated */
8764         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8765         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8766         if (!key_v)
8767                 return;
8768         if (!key_m)
8769                 key_m = &gre_key_default_mask;
8770         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8771                  rte_be_to_cpu_32(*key_m) >> 8);
8772         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8773                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8774         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8775                  rte_be_to_cpu_32(*key_m) & 0xFF);
8776         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8777                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8778 }
8779
8780 /**
8781  * Add GRE item to matcher and to the value.
8782  *
8783  * @param[in, out] matcher
8784  *   Flow matcher.
8785  * @param[in, out] key
8786  *   Flow matcher value.
8787  * @param[in] item
8788  *   Flow pattern to translate.
8789  * @param[in] pattern_flags
8790  *   Accumulated pattern flags.
8791  */
8792 static void
8793 flow_dv_translate_item_gre(void *matcher, void *key,
8794                            const struct rte_flow_item *item,
8795                            uint64_t pattern_flags)
8796 {
8797         static const struct rte_flow_item_gre empty_gre = {0,};
8798         const struct rte_flow_item_gre *gre_m = item->mask;
8799         const struct rte_flow_item_gre *gre_v = item->spec;
8800         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8801         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8802         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8803         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8804         struct {
8805                 union {
8806                         __extension__
8807                         struct {
8808                                 uint16_t version:3;
8809                                 uint16_t rsvd0:9;
8810                                 uint16_t s_present:1;
8811                                 uint16_t k_present:1;
8812                                 uint16_t rsvd_bit1:1;
8813                                 uint16_t c_present:1;
8814                         };
8815                         uint16_t value;
8816                 };
8817         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8818         uint16_t protocol_m, protocol_v;
8819
8820         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8821         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8822         if (!gre_v) {
8823                 gre_v = &empty_gre;
8824                 gre_m = &empty_gre;
8825         } else {
8826                 if (!gre_m)
8827                         gre_m = &rte_flow_item_gre_mask;
8828         }
8829         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8830         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8831         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8832                  gre_crks_rsvd0_ver_m.c_present);
8833         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8834                  gre_crks_rsvd0_ver_v.c_present &
8835                  gre_crks_rsvd0_ver_m.c_present);
8836         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8837                  gre_crks_rsvd0_ver_m.k_present);
8838         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8839                  gre_crks_rsvd0_ver_v.k_present &
8840                  gre_crks_rsvd0_ver_m.k_present);
8841         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8842                  gre_crks_rsvd0_ver_m.s_present);
8843         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8844                  gre_crks_rsvd0_ver_v.s_present &
8845                  gre_crks_rsvd0_ver_m.s_present);
8846         protocol_m = rte_be_to_cpu_16(gre_m->protocol);
8847         protocol_v = rte_be_to_cpu_16(gre_v->protocol);
8848         if (!protocol_m) {
8849                 /* Force next protocol to prevent matchers duplication */
8850                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
8851                 if (protocol_v)
8852                         protocol_m = 0xFFFF;
8853         }
8854         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, protocol_m);
8855         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8856                  protocol_m & protocol_v);
8857 }
8858
8859 /**
8860  * Add GRE optional items to matcher and to the value.
8861  *
8862  * @param[in, out] matcher
8863  *   Flow matcher.
8864  * @param[in, out] key
8865  *   Flow matcher value.
8866  * @param[in] item
8867  *   Flow pattern to translate.
8868  * @param[in] gre_item
8869  *   Pointer to gre_item.
8870  * @param[in] pattern_flags
8871  *   Accumulated pattern flags.
8872  */
8873 static void
8874 flow_dv_translate_item_gre_option(void *matcher, void *key,
8875                                   const struct rte_flow_item *item,
8876                                   const struct rte_flow_item *gre_item,
8877                                   uint64_t pattern_flags)
8878 {
8879         const struct rte_flow_item_gre_opt *option_m = item->mask;
8880         const struct rte_flow_item_gre_opt *option_v = item->spec;
8881         const struct rte_flow_item_gre *gre_m = gre_item->mask;
8882         const struct rte_flow_item_gre *gre_v = gre_item->spec;
8883         static const struct rte_flow_item_gre empty_gre = {0};
8884         struct rte_flow_item gre_key_item;
8885         uint16_t c_rsvd0_ver_m, c_rsvd0_ver_v;
8886         uint16_t protocol_m, protocol_v;
8887         void *misc5_m;
8888         void *misc5_v;
8889
8890         /*
8891          * If only match key field, keep using misc for matching.
8892          * If need to match checksum or sequence, using misc5 and do
8893          * not need using misc.
8894          */
8895         if (!(option_m->sequence.sequence ||
8896               option_m->checksum_rsvd.checksum)) {
8897                 flow_dv_translate_item_gre(matcher, key, gre_item,
8898                                            pattern_flags);
8899                 gre_key_item.spec = &option_v->key.key;
8900                 gre_key_item.mask = &option_m->key.key;
8901                 flow_dv_translate_item_gre_key(matcher, key, &gre_key_item);
8902                 return;
8903         }
8904         if (!gre_v) {
8905                 gre_v = &empty_gre;
8906                 gre_m = &empty_gre;
8907         } else {
8908                 if (!gre_m)
8909                         gre_m = &rte_flow_item_gre_mask;
8910         }
8911         protocol_v = gre_v->protocol;
8912         protocol_m = gre_m->protocol;
8913         if (!protocol_m) {
8914                 /* Force next protocol to prevent matchers duplication */
8915                 uint16_t ether_type =
8916                         mlx5_translate_tunnel_etypes(pattern_flags);
8917                 if (ether_type) {
8918                         protocol_v = rte_be_to_cpu_16(ether_type);
8919                         protocol_m = UINT16_MAX;
8920                 }
8921         }
8922         c_rsvd0_ver_v = gre_v->c_rsvd0_ver;
8923         c_rsvd0_ver_m = gre_m->c_rsvd0_ver;
8924         if (option_m->sequence.sequence) {
8925                 c_rsvd0_ver_v |= RTE_BE16(0x1000);
8926                 c_rsvd0_ver_m |= RTE_BE16(0x1000);
8927         }
8928         if (option_m->key.key) {
8929                 c_rsvd0_ver_v |= RTE_BE16(0x2000);
8930                 c_rsvd0_ver_m |= RTE_BE16(0x2000);
8931         }
8932         if (option_m->checksum_rsvd.checksum) {
8933                 c_rsvd0_ver_v |= RTE_BE16(0x8000);
8934                 c_rsvd0_ver_m |= RTE_BE16(0x8000);
8935         }
8936         /*
8937          * Hardware parses GRE optional field into the fixed location,
8938          * do not need to adjust the tunnel dword indices.
8939          */
8940         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8941         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8942         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_0,
8943                  rte_be_to_cpu_32((c_rsvd0_ver_v | protocol_v << 16) &
8944                                   (c_rsvd0_ver_m | protocol_m << 16)));
8945         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_0,
8946                  rte_be_to_cpu_32(c_rsvd0_ver_m | protocol_m << 16));
8947         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_1,
8948                  rte_be_to_cpu_32(option_v->checksum_rsvd.checksum &
8949                                   option_m->checksum_rsvd.checksum));
8950         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_1,
8951                  rte_be_to_cpu_32(option_m->checksum_rsvd.checksum));
8952         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_2,
8953                  rte_be_to_cpu_32(option_v->key.key & option_m->key.key));
8954         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_2,
8955                  rte_be_to_cpu_32(option_m->key.key));
8956         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_3,
8957                  rte_be_to_cpu_32(option_v->sequence.sequence &
8958                                   option_m->sequence.sequence));
8959         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_3,
8960                  rte_be_to_cpu_32(option_m->sequence.sequence));
8961 }
8962
8963 /**
8964  * Add NVGRE item to matcher and to the value.
8965  *
8966  * @param[in, out] matcher
8967  *   Flow matcher.
8968  * @param[in, out] key
8969  *   Flow matcher value.
8970  * @param[in] item
8971  *   Flow pattern to translate.
8972  * @param[in] pattern_flags
8973  *   Accumulated pattern flags.
8974  */
8975 static void
8976 flow_dv_translate_item_nvgre(void *matcher, void *key,
8977                              const struct rte_flow_item *item,
8978                              unsigned long pattern_flags)
8979 {
8980         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8981         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8982         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8983         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8984         const char *tni_flow_id_m;
8985         const char *tni_flow_id_v;
8986         char *gre_key_m;
8987         char *gre_key_v;
8988         int size;
8989         int i;
8990
8991         /* For NVGRE, GRE header fields must be set with defined values. */
8992         const struct rte_flow_item_gre gre_spec = {
8993                 .c_rsvd0_ver = RTE_BE16(0x2000),
8994                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8995         };
8996         const struct rte_flow_item_gre gre_mask = {
8997                 .c_rsvd0_ver = RTE_BE16(0xB000),
8998                 .protocol = RTE_BE16(UINT16_MAX),
8999         };
9000         const struct rte_flow_item gre_item = {
9001                 .spec = &gre_spec,
9002                 .mask = &gre_mask,
9003                 .last = NULL,
9004         };
9005         flow_dv_translate_item_gre(matcher, key, &gre_item, pattern_flags);
9006         if (!nvgre_v)
9007                 return;
9008         if (!nvgre_m)
9009                 nvgre_m = &rte_flow_item_nvgre_mask;
9010         tni_flow_id_m = (const char *)nvgre_m->tni;
9011         tni_flow_id_v = (const char *)nvgre_v->tni;
9012         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
9013         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
9014         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
9015         memcpy(gre_key_m, tni_flow_id_m, size);
9016         for (i = 0; i < size; ++i)
9017                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
9018 }
9019
9020 /**
9021  * Add VXLAN item to matcher and to the value.
9022  *
9023  * @param[in] dev
9024  *   Pointer to the Ethernet device structure.
9025  * @param[in] attr
9026  *   Flow rule attributes.
9027  * @param[in, out] matcher
9028  *   Flow matcher.
9029  * @param[in, out] key
9030  *   Flow matcher value.
9031  * @param[in] item
9032  *   Flow pattern to translate.
9033  * @param[in] inner
9034  *   Item is inner pattern.
9035  */
9036 static void
9037 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
9038                              const struct rte_flow_attr *attr,
9039                              void *matcher, void *key,
9040                              const struct rte_flow_item *item,
9041                              int inner)
9042 {
9043         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
9044         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
9045         void *headers_m;
9046         void *headers_v;
9047         void *misc5_m;
9048         void *misc5_v;
9049         uint32_t *tunnel_header_v;
9050         uint32_t *tunnel_header_m;
9051         uint16_t dport;
9052         struct mlx5_priv *priv = dev->data->dev_private;
9053         const struct rte_flow_item_vxlan nic_mask = {
9054                 .vni = "\xff\xff\xff",
9055                 .rsvd1 = 0xff,
9056         };
9057
9058         if (inner) {
9059                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9060                                          inner_headers);
9061                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9062         } else {
9063                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9064                                          outer_headers);
9065                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9066         }
9067         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
9068                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
9069         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9070                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9071                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9072         }
9073         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
9074         if (!vxlan_v)
9075                 return;
9076         if (!vxlan_m) {
9077                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
9078                     (attr->group && !priv->sh->misc5_cap))
9079                         vxlan_m = &rte_flow_item_vxlan_mask;
9080                 else
9081                         vxlan_m = &nic_mask;
9082         }
9083         if ((priv->sh->steering_format_version ==
9084             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
9085             dport != MLX5_UDP_PORT_VXLAN) ||
9086             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
9087             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
9088                 void *misc_m;
9089                 void *misc_v;
9090                 char *vni_m;
9091                 char *vni_v;
9092                 int size;
9093                 int i;
9094                 misc_m = MLX5_ADDR_OF(fte_match_param,
9095                                       matcher, misc_parameters);
9096                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9097                 size = sizeof(vxlan_m->vni);
9098                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
9099                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
9100                 memcpy(vni_m, vxlan_m->vni, size);
9101                 for (i = 0; i < size; ++i)
9102                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9103                 return;
9104         }
9105         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
9106         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
9107         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
9108                                                    misc5_v,
9109                                                    tunnel_header_1);
9110         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
9111                                                    misc5_m,
9112                                                    tunnel_header_1);
9113         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
9114                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
9115                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
9116         if (*tunnel_header_v)
9117                 *tunnel_header_m = vxlan_m->vni[0] |
9118                         vxlan_m->vni[1] << 8 |
9119                         vxlan_m->vni[2] << 16;
9120         else
9121                 *tunnel_header_m = 0x0;
9122         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
9123         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
9124                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
9125 }
9126
9127 /**
9128  * Add VXLAN-GPE item to matcher and to the value.
9129  *
9130  * @param[in, out] matcher
9131  *   Flow matcher.
9132  * @param[in, out] key
9133  *   Flow matcher value.
9134  * @param[in] item
9135  *   Flow pattern to translate.
9136  * @param[in] inner
9137  *   Item is inner pattern.
9138  */
9139
9140 static void
9141 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
9142                                  const struct rte_flow_item *item,
9143                                  const uint64_t pattern_flags)
9144 {
9145         static const struct rte_flow_item_vxlan_gpe dummy_vxlan_gpe_hdr = {0, };
9146         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
9147         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9148         /* The item was validated to be on the outer side */
9149         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9150         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9151         void *misc_m =
9152                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9153         void *misc_v =
9154                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9155         char *vni_m =
9156                 MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9157         char *vni_v =
9158                 MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9159         int i, size = sizeof(vxlan_m->vni);
9160         uint8_t flags_m = 0xff;
9161         uint8_t flags_v = 0xc;
9162         uint8_t m_protocol, v_protocol;
9163
9164         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9165                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9166                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9167                          MLX5_UDP_PORT_VXLAN_GPE);
9168         }
9169         if (!vxlan_v) {
9170                 vxlan_v = &dummy_vxlan_gpe_hdr;
9171                 vxlan_m = &dummy_vxlan_gpe_hdr;
9172         } else {
9173                 if (!vxlan_m)
9174                         vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9175         }
9176         memcpy(vni_m, vxlan_m->vni, size);
9177         for (i = 0; i < size; ++i)
9178                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9179         if (vxlan_m->flags) {
9180                 flags_m = vxlan_m->flags;
9181                 flags_v = vxlan_v->flags;
9182         }
9183         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9184         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9185         m_protocol = vxlan_m->protocol;
9186         v_protocol = vxlan_v->protocol;
9187         if (!m_protocol) {
9188                 /* Force next protocol to ensure next headers parsing. */
9189                 if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
9190                         v_protocol = RTE_VXLAN_GPE_TYPE_ETH;
9191                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
9192                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV4;
9193                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
9194                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV6;
9195                 if (v_protocol)
9196                         m_protocol = 0xFF;
9197         }
9198         MLX5_SET(fte_match_set_misc3, misc_m,
9199                  outer_vxlan_gpe_next_protocol, m_protocol);
9200         MLX5_SET(fte_match_set_misc3, misc_v,
9201                  outer_vxlan_gpe_next_protocol, m_protocol & v_protocol);
9202 }
9203
9204 /**
9205  * Add Geneve item to matcher and to the value.
9206  *
9207  * @param[in, out] matcher
9208  *   Flow matcher.
9209  * @param[in, out] key
9210  *   Flow matcher value.
9211  * @param[in] item
9212  *   Flow pattern to translate.
9213  * @param[in] inner
9214  *   Item is inner pattern.
9215  */
9216
9217 static void
9218 flow_dv_translate_item_geneve(void *matcher, void *key,
9219                               const struct rte_flow_item *item,
9220                               uint64_t pattern_flags)
9221 {
9222         static const struct rte_flow_item_geneve empty_geneve = {0,};
9223         const struct rte_flow_item_geneve *geneve_m = item->mask;
9224         const struct rte_flow_item_geneve *geneve_v = item->spec;
9225         /* GENEVE flow item validation allows single tunnel item */
9226         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9227         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9228         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9229         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9230         uint16_t gbhdr_m;
9231         uint16_t gbhdr_v;
9232         char *vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9233         char *vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9234         size_t size = sizeof(geneve_m->vni), i;
9235         uint16_t protocol_m, protocol_v;
9236
9237         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9238                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9239                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9240                          MLX5_UDP_PORT_GENEVE);
9241         }
9242         if (!geneve_v) {
9243                 geneve_v = &empty_geneve;
9244                 geneve_m = &empty_geneve;
9245         } else {
9246                 if (!geneve_m)
9247                         geneve_m = &rte_flow_item_geneve_mask;
9248         }
9249         memcpy(vni_m, geneve_m->vni, size);
9250         for (i = 0; i < size; ++i)
9251                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9252         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9253         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9254         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9255                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9256         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9257                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9258         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9259                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9260         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9261                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9262                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9263         protocol_m = rte_be_to_cpu_16(geneve_m->protocol);
9264         protocol_v = rte_be_to_cpu_16(geneve_v->protocol);
9265         if (!protocol_m) {
9266                 /* Force next protocol to prevent matchers duplication */
9267                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
9268                 if (protocol_v)
9269                         protocol_m = 0xFFFF;
9270         }
9271         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);
9272         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9273                  protocol_m & protocol_v);
9274 }
9275
9276 /**
9277  * Create Geneve TLV option resource.
9278  *
9279  * @param dev[in, out]
9280  *   Pointer to rte_eth_dev structure.
9281  * @param[in, out] tag_be24
9282  *   Tag value in big endian then R-shift 8.
9283  * @parm[in, out] dev_flow
9284  *   Pointer to the dev_flow.
9285  * @param[out] error
9286  *   pointer to error structure.
9287  *
9288  * @return
9289  *   0 on success otherwise -errno and errno is set.
9290  */
9291
9292 int
9293 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9294                                              const struct rte_flow_item *item,
9295                                              struct rte_flow_error *error)
9296 {
9297         struct mlx5_priv *priv = dev->data->dev_private;
9298         struct mlx5_dev_ctx_shared *sh = priv->sh;
9299         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9300                         sh->geneve_tlv_option_resource;
9301         struct mlx5_devx_obj *obj;
9302         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9303         int ret = 0;
9304
9305         if (!geneve_opt_v)
9306                 return -1;
9307         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9308         if (geneve_opt_resource != NULL) {
9309                 if (geneve_opt_resource->option_class ==
9310                         geneve_opt_v->option_class &&
9311                         geneve_opt_resource->option_type ==
9312                         geneve_opt_v->option_type &&
9313                         geneve_opt_resource->length ==
9314                         geneve_opt_v->option_len) {
9315                         /* We already have GENEVE TLV option obj allocated. */
9316                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9317                                            __ATOMIC_RELAXED);
9318                 } else {
9319                         ret = rte_flow_error_set(error, ENOMEM,
9320                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9321                                 "Only one GENEVE TLV option supported");
9322                         goto exit;
9323                 }
9324         } else {
9325                 /* Create a GENEVE TLV object and resource. */
9326                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9327                                 geneve_opt_v->option_class,
9328                                 geneve_opt_v->option_type,
9329                                 geneve_opt_v->option_len);
9330                 if (!obj) {
9331                         ret = rte_flow_error_set(error, ENODATA,
9332                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9333                                 "Failed to create GENEVE TLV Devx object");
9334                         goto exit;
9335                 }
9336                 sh->geneve_tlv_option_resource =
9337                                 mlx5_malloc(MLX5_MEM_ZERO,
9338                                                 sizeof(*geneve_opt_resource),
9339                                                 0, SOCKET_ID_ANY);
9340                 if (!sh->geneve_tlv_option_resource) {
9341                         claim_zero(mlx5_devx_cmd_destroy(obj));
9342                         ret = rte_flow_error_set(error, ENOMEM,
9343                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9344                                 "GENEVE TLV object memory allocation failed");
9345                         goto exit;
9346                 }
9347                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9348                 geneve_opt_resource->obj = obj;
9349                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9350                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9351                 geneve_opt_resource->length = geneve_opt_v->option_len;
9352                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9353                                 __ATOMIC_RELAXED);
9354         }
9355 exit:
9356         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9357         return ret;
9358 }
9359
9360 /**
9361  * Add Geneve TLV option item to matcher.
9362  *
9363  * @param[in, out] dev
9364  *   Pointer to rte_eth_dev structure.
9365  * @param[in, out] matcher
9366  *   Flow matcher.
9367  * @param[in, out] key
9368  *   Flow matcher value.
9369  * @param[in] item
9370  *   Flow pattern to translate.
9371  * @param[out] error
9372  *   Pointer to error structure.
9373  */
9374 static int
9375 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9376                                   void *key, const struct rte_flow_item *item,
9377                                   struct rte_flow_error *error)
9378 {
9379         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9380         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9381         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9382         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9383         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9384                         misc_parameters_3);
9385         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9386         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9387         int ret = 0;
9388
9389         if (!geneve_opt_v)
9390                 return -1;
9391         if (!geneve_opt_m)
9392                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9393         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9394                                                            error);
9395         if (ret) {
9396                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9397                 return ret;
9398         }
9399         /*
9400          * Set the option length in GENEVE header if not requested.
9401          * The GENEVE TLV option length is expressed by the option length field
9402          * in the GENEVE header.
9403          * If the option length was not requested but the GENEVE TLV option item
9404          * is present we set the option length field implicitly.
9405          */
9406         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9407                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9408                          MLX5_GENEVE_OPTLEN_MASK);
9409                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9410                          geneve_opt_v->option_len + 1);
9411         }
9412         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9413         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9414         /* Set the data. */
9415         if (geneve_opt_v->data) {
9416                 memcpy(&opt_data_key, geneve_opt_v->data,
9417                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9418                                 sizeof(opt_data_key)));
9419                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9420                                 sizeof(opt_data_key));
9421                 memcpy(&opt_data_mask, geneve_opt_m->data,
9422                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9423                                 sizeof(opt_data_mask)));
9424                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9425                                 sizeof(opt_data_mask));
9426                 MLX5_SET(fte_match_set_misc3, misc3_m,
9427                                 geneve_tlv_option_0_data,
9428                                 rte_be_to_cpu_32(opt_data_mask));
9429                 MLX5_SET(fte_match_set_misc3, misc3_v,
9430                                 geneve_tlv_option_0_data,
9431                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9432         }
9433         return ret;
9434 }
9435
9436 /**
9437  * Add MPLS item to matcher and to the value.
9438  *
9439  * @param[in, out] matcher
9440  *   Flow matcher.
9441  * @param[in, out] key
9442  *   Flow matcher value.
9443  * @param[in] item
9444  *   Flow pattern to translate.
9445  * @param[in] prev_layer
9446  *   The protocol layer indicated in previous item.
9447  * @param[in] inner
9448  *   Item is inner pattern.
9449  */
9450 static void
9451 flow_dv_translate_item_mpls(void *matcher, void *key,
9452                             const struct rte_flow_item *item,
9453                             uint64_t prev_layer,
9454                             int inner)
9455 {
9456         const uint32_t *in_mpls_m = item->mask;
9457         const uint32_t *in_mpls_v = item->spec;
9458         uint32_t *out_mpls_m = 0;
9459         uint32_t *out_mpls_v = 0;
9460         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9461         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9462         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9463                                      misc_parameters_2);
9464         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9465         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9466         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9467
9468         switch (prev_layer) {
9469         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9470                 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9471                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
9472                                  0xffff);
9473                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9474                                  MLX5_UDP_PORT_MPLS);
9475                 }
9476                 break;
9477         case MLX5_FLOW_LAYER_GRE:
9478                 /* Fall-through. */
9479         case MLX5_FLOW_LAYER_GRE_KEY:
9480                 if (!MLX5_GET16(fte_match_set_misc, misc_v, gre_protocol)) {
9481                         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
9482                                  0xffff);
9483                         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9484                                  RTE_ETHER_TYPE_MPLS);
9485                 }
9486                 break;
9487         default:
9488                 break;
9489         }
9490         if (!in_mpls_v)
9491                 return;
9492         if (!in_mpls_m)
9493                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9494         switch (prev_layer) {
9495         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9496                 out_mpls_m =
9497                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9498                                                  outer_first_mpls_over_udp);
9499                 out_mpls_v =
9500                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9501                                                  outer_first_mpls_over_udp);
9502                 break;
9503         case MLX5_FLOW_LAYER_GRE:
9504                 out_mpls_m =
9505                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9506                                                  outer_first_mpls_over_gre);
9507                 out_mpls_v =
9508                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9509                                                  outer_first_mpls_over_gre);
9510                 break;
9511         default:
9512                 /* Inner MPLS not over GRE is not supported. */
9513                 if (!inner) {
9514                         out_mpls_m =
9515                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9516                                                          misc2_m,
9517                                                          outer_first_mpls);
9518                         out_mpls_v =
9519                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9520                                                          misc2_v,
9521                                                          outer_first_mpls);
9522                 }
9523                 break;
9524         }
9525         if (out_mpls_m && out_mpls_v) {
9526                 *out_mpls_m = *in_mpls_m;
9527                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9528         }
9529 }
9530
9531 /**
9532  * Add metadata register item to matcher
9533  *
9534  * @param[in, out] matcher
9535  *   Flow matcher.
9536  * @param[in, out] key
9537  *   Flow matcher value.
9538  * @param[in] reg_type
9539  *   Type of device metadata register
9540  * @param[in] value
9541  *   Register value
9542  * @param[in] mask
9543  *   Register mask
9544  */
9545 static void
9546 flow_dv_match_meta_reg(void *matcher, void *key,
9547                        enum modify_reg reg_type,
9548                        uint32_t data, uint32_t mask)
9549 {
9550         void *misc2_m =
9551                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9552         void *misc2_v =
9553                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9554         uint32_t temp;
9555
9556         data &= mask;
9557         switch (reg_type) {
9558         case REG_A:
9559                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9560                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9561                 break;
9562         case REG_B:
9563                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9564                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9565                 break;
9566         case REG_C_0:
9567                 /*
9568                  * The metadata register C0 field might be divided into
9569                  * source vport index and META item value, we should set
9570                  * this field according to specified mask, not as whole one.
9571                  */
9572                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9573                 temp |= mask;
9574                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9575                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9576                 temp &= ~mask;
9577                 temp |= data;
9578                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9579                 break;
9580         case REG_C_1:
9581                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9582                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9583                 break;
9584         case REG_C_2:
9585                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9586                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9587                 break;
9588         case REG_C_3:
9589                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9590                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9591                 break;
9592         case REG_C_4:
9593                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9594                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9595                 break;
9596         case REG_C_5:
9597                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9598                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9599                 break;
9600         case REG_C_6:
9601                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9602                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9603                 break;
9604         case REG_C_7:
9605                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9606                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9607                 break;
9608         default:
9609                 MLX5_ASSERT(false);
9610                 break;
9611         }
9612 }
9613
9614 /**
9615  * Add MARK item to matcher
9616  *
9617  * @param[in] dev
9618  *   The device to configure through.
9619  * @param[in, out] matcher
9620  *   Flow matcher.
9621  * @param[in, out] key
9622  *   Flow matcher value.
9623  * @param[in] item
9624  *   Flow pattern to translate.
9625  */
9626 static void
9627 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9628                             void *matcher, void *key,
9629                             const struct rte_flow_item *item)
9630 {
9631         struct mlx5_priv *priv = dev->data->dev_private;
9632         const struct rte_flow_item_mark *mark;
9633         uint32_t value;
9634         uint32_t mask;
9635
9636         mark = item->mask ? (const void *)item->mask :
9637                             &rte_flow_item_mark_mask;
9638         mask = mark->id & priv->sh->dv_mark_mask;
9639         mark = (const void *)item->spec;
9640         MLX5_ASSERT(mark);
9641         value = mark->id & priv->sh->dv_mark_mask & mask;
9642         if (mask) {
9643                 enum modify_reg reg;
9644
9645                 /* Get the metadata register index for the mark. */
9646                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9647                 MLX5_ASSERT(reg > 0);
9648                 if (reg == REG_C_0) {
9649                         struct mlx5_priv *priv = dev->data->dev_private;
9650                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9651                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9652
9653                         mask &= msk_c0;
9654                         mask <<= shl_c0;
9655                         value <<= shl_c0;
9656                 }
9657                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9658         }
9659 }
9660
9661 /**
9662  * Add META item to matcher
9663  *
9664  * @param[in] dev
9665  *   The devich to configure through.
9666  * @param[in, out] matcher
9667  *   Flow matcher.
9668  * @param[in, out] key
9669  *   Flow matcher value.
9670  * @param[in] attr
9671  *   Attributes of flow that includes this item.
9672  * @param[in] item
9673  *   Flow pattern to translate.
9674  */
9675 static void
9676 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9677                             void *matcher, void *key,
9678                             const struct rte_flow_attr *attr,
9679                             const struct rte_flow_item *item)
9680 {
9681         const struct rte_flow_item_meta *meta_m;
9682         const struct rte_flow_item_meta *meta_v;
9683
9684         meta_m = (const void *)item->mask;
9685         if (!meta_m)
9686                 meta_m = &rte_flow_item_meta_mask;
9687         meta_v = (const void *)item->spec;
9688         if (meta_v) {
9689                 int reg;
9690                 uint32_t value = meta_v->data;
9691                 uint32_t mask = meta_m->data;
9692
9693                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9694                 if (reg < 0)
9695                         return;
9696                 MLX5_ASSERT(reg != REG_NON);
9697                 if (reg == REG_C_0) {
9698                         struct mlx5_priv *priv = dev->data->dev_private;
9699                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9700                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9701
9702                         mask &= msk_c0;
9703                         mask <<= shl_c0;
9704                         value <<= shl_c0;
9705                 }
9706                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9707         }
9708 }
9709
9710 /**
9711  * Add vport metadata Reg C0 item to matcher
9712  *
9713  * @param[in, out] matcher
9714  *   Flow matcher.
9715  * @param[in, out] key
9716  *   Flow matcher value.
9717  * @param[in] reg
9718  *   Flow pattern to translate.
9719  */
9720 static void
9721 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9722                                   uint32_t value, uint32_t mask)
9723 {
9724         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9725 }
9726
9727 /**
9728  * Add tag item to matcher
9729  *
9730  * @param[in] dev
9731  *   The devich to configure through.
9732  * @param[in, out] matcher
9733  *   Flow matcher.
9734  * @param[in, out] key
9735  *   Flow matcher value.
9736  * @param[in] item
9737  *   Flow pattern to translate.
9738  */
9739 static void
9740 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9741                                 void *matcher, void *key,
9742                                 const struct rte_flow_item *item)
9743 {
9744         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9745         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9746         uint32_t mask, value;
9747
9748         MLX5_ASSERT(tag_v);
9749         value = tag_v->data;
9750         mask = tag_m ? tag_m->data : UINT32_MAX;
9751         if (tag_v->id == REG_C_0) {
9752                 struct mlx5_priv *priv = dev->data->dev_private;
9753                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9754                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9755
9756                 mask &= msk_c0;
9757                 mask <<= shl_c0;
9758                 value <<= shl_c0;
9759         }
9760         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9761 }
9762
9763 /**
9764  * Add TAG item to matcher
9765  *
9766  * @param[in] dev
9767  *   The devich to configure through.
9768  * @param[in, out] matcher
9769  *   Flow matcher.
9770  * @param[in, out] key
9771  *   Flow matcher value.
9772  * @param[in] item
9773  *   Flow pattern to translate.
9774  */
9775 static void
9776 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9777                            void *matcher, void *key,
9778                            const struct rte_flow_item *item)
9779 {
9780         const struct rte_flow_item_tag *tag_v = item->spec;
9781         const struct rte_flow_item_tag *tag_m = item->mask;
9782         enum modify_reg reg;
9783
9784         MLX5_ASSERT(tag_v);
9785         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9786         /* Get the metadata register index for the tag. */
9787         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9788         MLX5_ASSERT(reg > 0);
9789         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9790 }
9791
9792 /**
9793  * Add source vport match to the specified matcher.
9794  *
9795  * @param[in, out] matcher
9796  *   Flow matcher.
9797  * @param[in, out] key
9798  *   Flow matcher value.
9799  * @param[in] port
9800  *   Source vport value to match
9801  * @param[in] mask
9802  *   Mask
9803  */
9804 static void
9805 flow_dv_translate_item_source_vport(void *matcher, void *key,
9806                                     int16_t port, uint16_t mask)
9807 {
9808         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9809         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9810
9811         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9812         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9813 }
9814
9815 /**
9816  * Translate port-id item to eswitch match on  port-id.
9817  *
9818  * @param[in] dev
9819  *   The devich to configure through.
9820  * @param[in, out] matcher
9821  *   Flow matcher.
9822  * @param[in, out] key
9823  *   Flow matcher value.
9824  * @param[in] item
9825  *   Flow pattern to translate.
9826  * @param[in]
9827  *   Flow attributes.
9828  *
9829  * @return
9830  *   0 on success, a negative errno value otherwise.
9831  */
9832 static int
9833 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9834                                void *key, const struct rte_flow_item *item,
9835                                const struct rte_flow_attr *attr)
9836 {
9837         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9838         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9839         struct mlx5_priv *priv;
9840         uint16_t mask, id;
9841
9842         if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9843                 flow_dv_translate_item_source_vport(matcher, key,
9844                         flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9845                 return 0;
9846         }
9847         mask = pid_m ? pid_m->id : 0xffff;
9848         id = pid_v ? pid_v->id : dev->data->port_id;
9849         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9850         if (!priv)
9851                 return -rte_errno;
9852         /*
9853          * Translate to vport field or to metadata, depending on mode.
9854          * Kernel can use either misc.source_port or half of C0 metadata
9855          * register.
9856          */
9857         if (priv->vport_meta_mask) {
9858                 /*
9859                  * Provide the hint for SW steering library
9860                  * to insert the flow into ingress domain and
9861                  * save the extra vport match.
9862                  */
9863                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9864                     priv->pf_bond < 0 && attr->transfer)
9865                         flow_dv_translate_item_source_vport
9866                                 (matcher, key, priv->vport_id, mask);
9867                 /*
9868                  * We should always set the vport metadata register,
9869                  * otherwise the SW steering library can drop
9870                  * the rule if wire vport metadata value is not zero,
9871                  * it depends on kernel configuration.
9872                  */
9873                 flow_dv_translate_item_meta_vport(matcher, key,
9874                                                   priv->vport_meta_tag,
9875                                                   priv->vport_meta_mask);
9876         } else {
9877                 flow_dv_translate_item_source_vport(matcher, key,
9878                                                     priv->vport_id, mask);
9879         }
9880         return 0;
9881 }
9882
9883 /**
9884  * Add ICMP6 item to matcher and to the value.
9885  *
9886  * @param[in, out] matcher
9887  *   Flow matcher.
9888  * @param[in, out] key
9889  *   Flow matcher value.
9890  * @param[in] item
9891  *   Flow pattern to translate.
9892  * @param[in] inner
9893  *   Item is inner pattern.
9894  */
9895 static void
9896 flow_dv_translate_item_icmp6(void *matcher, void *key,
9897                               const struct rte_flow_item *item,
9898                               int inner)
9899 {
9900         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9901         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9902         void *headers_m;
9903         void *headers_v;
9904         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9905                                      misc_parameters_3);
9906         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9907         if (inner) {
9908                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9909                                          inner_headers);
9910                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9911         } else {
9912                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9913                                          outer_headers);
9914                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9915         }
9916         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9917         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9918         if (!icmp6_v)
9919                 return;
9920         if (!icmp6_m)
9921                 icmp6_m = &rte_flow_item_icmp6_mask;
9922         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9923         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9924                  icmp6_v->type & icmp6_m->type);
9925         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9926         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9927                  icmp6_v->code & icmp6_m->code);
9928 }
9929
9930 /**
9931  * Add ICMP item to matcher and to the value.
9932  *
9933  * @param[in, out] matcher
9934  *   Flow matcher.
9935  * @param[in, out] key
9936  *   Flow matcher value.
9937  * @param[in] item
9938  *   Flow pattern to translate.
9939  * @param[in] inner
9940  *   Item is inner pattern.
9941  */
9942 static void
9943 flow_dv_translate_item_icmp(void *matcher, void *key,
9944                             const struct rte_flow_item *item,
9945                             int inner)
9946 {
9947         const struct rte_flow_item_icmp *icmp_m = item->mask;
9948         const struct rte_flow_item_icmp *icmp_v = item->spec;
9949         uint32_t icmp_header_data_m = 0;
9950         uint32_t icmp_header_data_v = 0;
9951         void *headers_m;
9952         void *headers_v;
9953         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9954                                      misc_parameters_3);
9955         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9956         if (inner) {
9957                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9958                                          inner_headers);
9959                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9960         } else {
9961                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9962                                          outer_headers);
9963                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9964         }
9965         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9966         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9967         if (!icmp_v)
9968                 return;
9969         if (!icmp_m)
9970                 icmp_m = &rte_flow_item_icmp_mask;
9971         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9972                  icmp_m->hdr.icmp_type);
9973         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9974                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9975         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9976                  icmp_m->hdr.icmp_code);
9977         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9978                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9979         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9980         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9981         if (icmp_header_data_m) {
9982                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9983                 icmp_header_data_v |=
9984                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9985                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9986                          icmp_header_data_m);
9987                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9988                          icmp_header_data_v & icmp_header_data_m);
9989         }
9990 }
9991
9992 /**
9993  * Add GTP item to matcher and to the value.
9994  *
9995  * @param[in, out] matcher
9996  *   Flow matcher.
9997  * @param[in, out] key
9998  *   Flow matcher value.
9999  * @param[in] item
10000  *   Flow pattern to translate.
10001  * @param[in] inner
10002  *   Item is inner pattern.
10003  */
10004 static void
10005 flow_dv_translate_item_gtp(void *matcher, void *key,
10006                            const struct rte_flow_item *item, int inner)
10007 {
10008         const struct rte_flow_item_gtp *gtp_m = item->mask;
10009         const struct rte_flow_item_gtp *gtp_v = item->spec;
10010         void *headers_m;
10011         void *headers_v;
10012         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
10013                                      misc_parameters_3);
10014         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
10015         uint16_t dport = RTE_GTPU_UDP_PORT;
10016
10017         if (inner) {
10018                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10019                                          inner_headers);
10020                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
10021         } else {
10022                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10023                                          outer_headers);
10024                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10025         }
10026         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
10027                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
10028                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
10029         }
10030         if (!gtp_v)
10031                 return;
10032         if (!gtp_m)
10033                 gtp_m = &rte_flow_item_gtp_mask;
10034         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
10035                  gtp_m->v_pt_rsv_flags);
10036         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
10037                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
10038         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
10039         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
10040                  gtp_v->msg_type & gtp_m->msg_type);
10041         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
10042                  rte_be_to_cpu_32(gtp_m->teid));
10043         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
10044                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
10045 }
10046
10047 /**
10048  * Add GTP PSC item to matcher.
10049  *
10050  * @param[in, out] matcher
10051  *   Flow matcher.
10052  * @param[in, out] key
10053  *   Flow matcher value.
10054  * @param[in] item
10055  *   Flow pattern to translate.
10056  */
10057 static int
10058 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
10059                                const struct rte_flow_item *item)
10060 {
10061         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
10062         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
10063         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
10064                         misc_parameters_3);
10065         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
10066         union {
10067                 uint32_t w32;
10068                 struct {
10069                         uint16_t seq_num;
10070                         uint8_t npdu_num;
10071                         uint8_t next_ext_header_type;
10072                 };
10073         } dw_2;
10074         uint8_t gtp_flags;
10075
10076         /* Always set E-flag match on one, regardless of GTP item settings. */
10077         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
10078         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
10079         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
10080         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
10081         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
10082         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
10083         /*Set next extension header type. */
10084         dw_2.seq_num = 0;
10085         dw_2.npdu_num = 0;
10086         dw_2.next_ext_header_type = 0xff;
10087         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
10088                  rte_cpu_to_be_32(dw_2.w32));
10089         dw_2.seq_num = 0;
10090         dw_2.npdu_num = 0;
10091         dw_2.next_ext_header_type = 0x85;
10092         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
10093                  rte_cpu_to_be_32(dw_2.w32));
10094         if (gtp_psc_v) {
10095                 union {
10096                         uint32_t w32;
10097                         struct {
10098                                 uint8_t len;
10099                                 uint8_t type_flags;
10100                                 uint8_t qfi;
10101                                 uint8_t reserved;
10102                         };
10103                 } dw_0;
10104
10105                 /*Set extension header PDU type and Qos. */
10106                 if (!gtp_psc_m)
10107                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
10108                 dw_0.w32 = 0;
10109                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
10110                 dw_0.qfi = gtp_psc_m->hdr.qfi;
10111                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
10112                          rte_cpu_to_be_32(dw_0.w32));
10113                 dw_0.w32 = 0;
10114                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
10115                                                         gtp_psc_m->hdr.type);
10116                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
10117                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
10118                          rte_cpu_to_be_32(dw_0.w32));
10119         }
10120         return 0;
10121 }
10122
10123 /**
10124  * Add eCPRI item to matcher and to the value.
10125  *
10126  * @param[in] dev
10127  *   The devich to configure through.
10128  * @param[in, out] matcher
10129  *   Flow matcher.
10130  * @param[in, out] key
10131  *   Flow matcher value.
10132  * @param[in] item
10133  *   Flow pattern to translate.
10134  * @param[in] last_item
10135  *   Last item flags.
10136  */
10137 static void
10138 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
10139                              void *key, const struct rte_flow_item *item,
10140                              uint64_t last_item)
10141 {
10142         struct mlx5_priv *priv = dev->data->dev_private;
10143         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
10144         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
10145         struct rte_ecpri_common_hdr common;
10146         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
10147                                      misc_parameters_4);
10148         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
10149         uint32_t *samples;
10150         void *dw_m;
10151         void *dw_v;
10152
10153         /*
10154          * In case of eCPRI over Ethernet, if EtherType is not specified,
10155          * match on eCPRI EtherType implicitly.
10156          */
10157         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
10158                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
10159
10160                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
10161                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10162                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
10163                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
10164                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
10165                         *(uint16_t *)l2m = UINT16_MAX;
10166                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
10167                 }
10168         }
10169         if (!ecpri_v)
10170                 return;
10171         if (!ecpri_m)
10172                 ecpri_m = &rte_flow_item_ecpri_mask;
10173         /*
10174          * Maximal four DW samples are supported in a single matching now.
10175          * Two are used now for a eCPRI matching:
10176          * 1. Type: one byte, mask should be 0x00ff0000 in network order
10177          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10178          *    if any.
10179          */
10180         if (!ecpri_m->hdr.common.u32)
10181                 return;
10182         samples = priv->sh->ecpri_parser.ids;
10183         /* Need to take the whole DW as the mask to fill the entry. */
10184         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10185                             prog_sample_field_value_0);
10186         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10187                             prog_sample_field_value_0);
10188         /* Already big endian (network order) in the header. */
10189         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10190         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10191         /* Sample#0, used for matching type, offset 0. */
10192         MLX5_SET(fte_match_set_misc4, misc4_m,
10193                  prog_sample_field_id_0, samples[0]);
10194         /* It makes no sense to set the sample ID in the mask field. */
10195         MLX5_SET(fte_match_set_misc4, misc4_v,
10196                  prog_sample_field_id_0, samples[0]);
10197         /*
10198          * Checking if message body part needs to be matched.
10199          * Some wildcard rules only matching type field should be supported.
10200          */
10201         if (ecpri_m->hdr.dummy[0]) {
10202                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10203                 switch (common.type) {
10204                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10205                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10206                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10207                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10208                                             prog_sample_field_value_1);
10209                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10210                                             prog_sample_field_value_1);
10211                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10212                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10213                                             ecpri_m->hdr.dummy[0];
10214                         /* Sample#1, to match message body, offset 4. */
10215                         MLX5_SET(fte_match_set_misc4, misc4_m,
10216                                  prog_sample_field_id_1, samples[1]);
10217                         MLX5_SET(fte_match_set_misc4, misc4_v,
10218                                  prog_sample_field_id_1, samples[1]);
10219                         break;
10220                 default:
10221                         /* Others, do not match any sample ID. */
10222                         break;
10223                 }
10224         }
10225 }
10226
10227 /*
10228  * Add connection tracking status item to matcher
10229  *
10230  * @param[in] dev
10231  *   The devich to configure through.
10232  * @param[in, out] matcher
10233  *   Flow matcher.
10234  * @param[in, out] key
10235  *   Flow matcher value.
10236  * @param[in] item
10237  *   Flow pattern to translate.
10238  */
10239 static void
10240 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10241                               void *matcher, void *key,
10242                               const struct rte_flow_item *item)
10243 {
10244         uint32_t reg_value = 0;
10245         int reg_id;
10246         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10247         uint32_t reg_mask = 0;
10248         const struct rte_flow_item_conntrack *spec = item->spec;
10249         const struct rte_flow_item_conntrack *mask = item->mask;
10250         uint32_t flags;
10251         struct rte_flow_error error;
10252
10253         if (!mask)
10254                 mask = &rte_flow_item_conntrack_mask;
10255         if (!spec || !mask->flags)
10256                 return;
10257         flags = spec->flags & mask->flags;
10258         /* The conflict should be checked in the validation. */
10259         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10260                 reg_value |= MLX5_CT_SYNDROME_VALID;
10261         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10262                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10263         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10264                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10265         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10266                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10267         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10268                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10269         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10270                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10271                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10272                 reg_mask |= 0xc0;
10273         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10274                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10275         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10276                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10277         /* The REG_C_x value could be saved during startup. */
10278         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10279         if (reg_id == REG_NON)
10280                 return;
10281         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10282                                reg_value, reg_mask);
10283 }
10284
10285 static void
10286 flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,
10287                             const struct rte_flow_item *item,
10288                             struct mlx5_flow *dev_flow, bool is_inner)
10289 {
10290         const struct rte_flow_item_flex *spec =
10291                 (const struct rte_flow_item_flex *)item->spec;
10292         int index = mlx5_flex_acquire_index(dev, spec->handle, false);
10293
10294         MLX5_ASSERT(index >= 0 && index <= (int)(sizeof(uint32_t) * CHAR_BIT));
10295         if (index < 0)
10296                 return;
10297         if (!(dev_flow->handle->flex_item & RTE_BIT32(index))) {
10298                 /* Don't count both inner and outer flex items in one rule. */
10299                 if (mlx5_flex_acquire_index(dev, spec->handle, true) != index)
10300                         MLX5_ASSERT(false);
10301                 dev_flow->handle->flex_item |= (uint8_t)RTE_BIT32(index);
10302         }
10303         mlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);
10304 }
10305
10306 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10307
10308 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10309         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10310                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10311
10312 /**
10313  * Calculate flow matcher enable bitmap.
10314  *
10315  * @param match_criteria
10316  *   Pointer to flow matcher criteria.
10317  *
10318  * @return
10319  *   Bitmap of enabled fields.
10320  */
10321 static uint8_t
10322 flow_dv_matcher_enable(uint32_t *match_criteria)
10323 {
10324         uint8_t match_criteria_enable;
10325
10326         match_criteria_enable =
10327                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10328                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10329         match_criteria_enable |=
10330                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10331                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10332         match_criteria_enable |=
10333                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10334                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10335         match_criteria_enable |=
10336                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10337                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10338         match_criteria_enable |=
10339                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10340                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10341         match_criteria_enable |=
10342                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10343                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10344         match_criteria_enable |=
10345                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10346                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10347         return match_criteria_enable;
10348 }
10349
10350 static void
10351 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10352 {
10353         /*
10354          * Check flow matching criteria first, subtract misc5/4 length if flow
10355          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10356          * misc5/4 are not supported, and matcher creation failure is expected
10357          * w/o subtraction. If misc5 is provided, misc4 must be counted in since
10358          * misc5 is right after misc4.
10359          */
10360         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10361                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10362                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10363                 if (!(match_criteria & (1 <<
10364                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10365                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10366                 }
10367         }
10368 }
10369
10370 static struct mlx5_list_entry *
10371 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10372                          struct mlx5_list_entry *entry, void *cb_ctx)
10373 {
10374         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10375         struct mlx5_flow_dv_matcher *ref = ctx->data;
10376         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10377                                                             typeof(*tbl), tbl);
10378         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10379                                                             sizeof(*resource),
10380                                                             0, SOCKET_ID_ANY);
10381
10382         if (!resource) {
10383                 rte_flow_error_set(ctx->error, ENOMEM,
10384                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10385                                    "cannot create matcher");
10386                 return NULL;
10387         }
10388         memcpy(resource, entry, sizeof(*resource));
10389         resource->tbl = &tbl->tbl;
10390         return &resource->entry;
10391 }
10392
10393 static void
10394 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10395                              struct mlx5_list_entry *entry)
10396 {
10397         mlx5_free(entry);
10398 }
10399
10400 struct mlx5_list_entry *
10401 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10402 {
10403         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10404         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10405         struct rte_eth_dev *dev = ctx->dev;
10406         struct mlx5_flow_tbl_data_entry *tbl_data;
10407         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10408         struct rte_flow_error *error = ctx->error;
10409         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10410         struct mlx5_flow_tbl_resource *tbl;
10411         void *domain;
10412         uint32_t idx = 0;
10413         int ret;
10414
10415         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10416         if (!tbl_data) {
10417                 rte_flow_error_set(error, ENOMEM,
10418                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10419                                    NULL,
10420                                    "cannot allocate flow table data entry");
10421                 return NULL;
10422         }
10423         tbl_data->idx = idx;
10424         tbl_data->tunnel = tt_prm->tunnel;
10425         tbl_data->group_id = tt_prm->group_id;
10426         tbl_data->external = !!tt_prm->external;
10427         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10428         tbl_data->is_egress = !!key.is_egress;
10429         tbl_data->is_transfer = !!key.is_fdb;
10430         tbl_data->dummy = !!key.dummy;
10431         tbl_data->level = key.level;
10432         tbl_data->id = key.id;
10433         tbl = &tbl_data->tbl;
10434         if (key.dummy)
10435                 return &tbl_data->entry;
10436         if (key.is_fdb)
10437                 domain = sh->fdb_domain;
10438         else if (key.is_egress)
10439                 domain = sh->tx_domain;
10440         else
10441                 domain = sh->rx_domain;
10442         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10443         if (ret) {
10444                 rte_flow_error_set(error, ENOMEM,
10445                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10446                                    NULL, "cannot create flow table object");
10447                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10448                 return NULL;
10449         }
10450         if (key.level != 0) {
10451                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10452                                         (tbl->obj, &tbl_data->jump.action);
10453                 if (ret) {
10454                         rte_flow_error_set(error, ENOMEM,
10455                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10456                                            NULL,
10457                                            "cannot create flow jump action");
10458                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10459                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10460                         return NULL;
10461                 }
10462         }
10463         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10464               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10465               key.level, key.id);
10466         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10467                                               flow_dv_matcher_create_cb,
10468                                               flow_dv_matcher_match_cb,
10469                                               flow_dv_matcher_remove_cb,
10470                                               flow_dv_matcher_clone_cb,
10471                                               flow_dv_matcher_clone_free_cb);
10472         if (!tbl_data->matchers) {
10473                 rte_flow_error_set(error, ENOMEM,
10474                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10475                                    NULL,
10476                                    "cannot create tbl matcher list");
10477                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10478                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10479                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10480                 return NULL;
10481         }
10482         return &tbl_data->entry;
10483 }
10484
10485 int
10486 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10487                      void *cb_ctx)
10488 {
10489         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10490         struct mlx5_flow_tbl_data_entry *tbl_data =
10491                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10492         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10493
10494         return tbl_data->level != key.level ||
10495                tbl_data->id != key.id ||
10496                tbl_data->dummy != key.dummy ||
10497                tbl_data->is_transfer != !!key.is_fdb ||
10498                tbl_data->is_egress != !!key.is_egress;
10499 }
10500
10501 struct mlx5_list_entry *
10502 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10503                       void *cb_ctx)
10504 {
10505         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10506         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10507         struct mlx5_flow_tbl_data_entry *tbl_data;
10508         struct rte_flow_error *error = ctx->error;
10509         uint32_t idx = 0;
10510
10511         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10512         if (!tbl_data) {
10513                 rte_flow_error_set(error, ENOMEM,
10514                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10515                                    NULL,
10516                                    "cannot allocate flow table data entry");
10517                 return NULL;
10518         }
10519         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10520         tbl_data->idx = idx;
10521         return &tbl_data->entry;
10522 }
10523
10524 void
10525 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10526 {
10527         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10528         struct mlx5_flow_tbl_data_entry *tbl_data =
10529                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10530
10531         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10532 }
10533
10534 /**
10535  * Get a flow table.
10536  *
10537  * @param[in, out] dev
10538  *   Pointer to rte_eth_dev structure.
10539  * @param[in] table_level
10540  *   Table level to use.
10541  * @param[in] egress
10542  *   Direction of the table.
10543  * @param[in] transfer
10544  *   E-Switch or NIC flow.
10545  * @param[in] dummy
10546  *   Dummy entry for dv API.
10547  * @param[in] table_id
10548  *   Table id to use.
10549  * @param[out] error
10550  *   pointer to error structure.
10551  *
10552  * @return
10553  *   Returns tables resource based on the index, NULL in case of failed.
10554  */
10555 struct mlx5_flow_tbl_resource *
10556 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10557                          uint32_t table_level, uint8_t egress,
10558                          uint8_t transfer,
10559                          bool external,
10560                          const struct mlx5_flow_tunnel *tunnel,
10561                          uint32_t group_id, uint8_t dummy,
10562                          uint32_t table_id,
10563                          struct rte_flow_error *error)
10564 {
10565         struct mlx5_priv *priv = dev->data->dev_private;
10566         union mlx5_flow_tbl_key table_key = {
10567                 {
10568                         .level = table_level,
10569                         .id = table_id,
10570                         .reserved = 0,
10571                         .dummy = !!dummy,
10572                         .is_fdb = !!transfer,
10573                         .is_egress = !!egress,
10574                 }
10575         };
10576         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10577                 .tunnel = tunnel,
10578                 .group_id = group_id,
10579                 .external = external,
10580         };
10581         struct mlx5_flow_cb_ctx ctx = {
10582                 .dev = dev,
10583                 .error = error,
10584                 .data = &table_key.v64,
10585                 .data2 = &tt_prm,
10586         };
10587         struct mlx5_list_entry *entry;
10588         struct mlx5_flow_tbl_data_entry *tbl_data;
10589
10590         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10591         if (!entry) {
10592                 rte_flow_error_set(error, ENOMEM,
10593                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10594                                    "cannot get table");
10595                 return NULL;
10596         }
10597         DRV_LOG(DEBUG, "table_level %u table_id %u "
10598                 "tunnel %u group %u registered.",
10599                 table_level, table_id,
10600                 tunnel ? tunnel->tunnel_id : 0, group_id);
10601         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10602         return &tbl_data->tbl;
10603 }
10604
10605 void
10606 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10607 {
10608         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10609         struct mlx5_flow_tbl_data_entry *tbl_data =
10610                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10611
10612         MLX5_ASSERT(entry && sh);
10613         if (tbl_data->jump.action)
10614                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10615         if (tbl_data->tbl.obj)
10616                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10617         if (tbl_data->tunnel_offload && tbl_data->external) {
10618                 struct mlx5_list_entry *he;
10619                 struct mlx5_hlist *tunnel_grp_hash;
10620                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10621                 union tunnel_tbl_key tunnel_key = {
10622                         .tunnel_id = tbl_data->tunnel ?
10623                                         tbl_data->tunnel->tunnel_id : 0,
10624                         .group = tbl_data->group_id
10625                 };
10626                 uint32_t table_level = tbl_data->level;
10627                 struct mlx5_flow_cb_ctx ctx = {
10628                         .data = (void *)&tunnel_key.val,
10629                 };
10630
10631                 tunnel_grp_hash = tbl_data->tunnel ?
10632                                         tbl_data->tunnel->groups :
10633                                         thub->groups;
10634                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10635                 if (he)
10636                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10637                 DRV_LOG(DEBUG,
10638                         "table_level %u id %u tunnel %u group %u released.",
10639                         table_level,
10640                         tbl_data->id,
10641                         tbl_data->tunnel ?
10642                         tbl_data->tunnel->tunnel_id : 0,
10643                         tbl_data->group_id);
10644         }
10645         if (tbl_data->matchers)
10646                 mlx5_list_destroy(tbl_data->matchers);
10647         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10648 }
10649
10650 /**
10651  * Release a flow table.
10652  *
10653  * @param[in] sh
10654  *   Pointer to device shared structure.
10655  * @param[in] tbl
10656  *   Table resource to be released.
10657  *
10658  * @return
10659  *   Returns 0 if table was released, else return 1;
10660  */
10661 static int
10662 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10663                              struct mlx5_flow_tbl_resource *tbl)
10664 {
10665         struct mlx5_flow_tbl_data_entry *tbl_data =
10666                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10667
10668         if (!tbl)
10669                 return 0;
10670         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10671 }
10672
10673 int
10674 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10675                          struct mlx5_list_entry *entry, void *cb_ctx)
10676 {
10677         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10678         struct mlx5_flow_dv_matcher *ref = ctx->data;
10679         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10680                                                         entry);
10681
10682         return cur->crc != ref->crc ||
10683                cur->priority != ref->priority ||
10684                memcmp((const void *)cur->mask.buf,
10685                       (const void *)ref->mask.buf, ref->mask.size);
10686 }
10687
10688 struct mlx5_list_entry *
10689 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10690 {
10691         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10692         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10693         struct mlx5_flow_dv_matcher *ref = ctx->data;
10694         struct mlx5_flow_dv_matcher *resource;
10695         struct mlx5dv_flow_matcher_attr dv_attr = {
10696                 .type = IBV_FLOW_ATTR_NORMAL,
10697                 .match_mask = (void *)&ref->mask,
10698         };
10699         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10700                                                             typeof(*tbl), tbl);
10701         int ret;
10702
10703         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10704                                SOCKET_ID_ANY);
10705         if (!resource) {
10706                 rte_flow_error_set(ctx->error, ENOMEM,
10707                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10708                                    "cannot create matcher");
10709                 return NULL;
10710         }
10711         *resource = *ref;
10712         dv_attr.match_criteria_enable =
10713                 flow_dv_matcher_enable(resource->mask.buf);
10714         __flow_dv_adjust_buf_size(&ref->mask.size,
10715                                   dv_attr.match_criteria_enable);
10716         dv_attr.priority = ref->priority;
10717         if (tbl->is_egress)
10718                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10719         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10720                                                tbl->tbl.obj,
10721                                                &resource->matcher_object);
10722         if (ret) {
10723                 mlx5_free(resource);
10724                 rte_flow_error_set(ctx->error, ENOMEM,
10725                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10726                                    "cannot create matcher");
10727                 return NULL;
10728         }
10729         return &resource->entry;
10730 }
10731
10732 /**
10733  * Register the flow matcher.
10734  *
10735  * @param[in, out] dev
10736  *   Pointer to rte_eth_dev structure.
10737  * @param[in, out] matcher
10738  *   Pointer to flow matcher.
10739  * @param[in, out] key
10740  *   Pointer to flow table key.
10741  * @parm[in, out] dev_flow
10742  *   Pointer to the dev_flow.
10743  * @param[out] error
10744  *   pointer to error structure.
10745  *
10746  * @return
10747  *   0 on success otherwise -errno and errno is set.
10748  */
10749 static int
10750 flow_dv_matcher_register(struct rte_eth_dev *dev,
10751                          struct mlx5_flow_dv_matcher *ref,
10752                          union mlx5_flow_tbl_key *key,
10753                          struct mlx5_flow *dev_flow,
10754                          const struct mlx5_flow_tunnel *tunnel,
10755                          uint32_t group_id,
10756                          struct rte_flow_error *error)
10757 {
10758         struct mlx5_list_entry *entry;
10759         struct mlx5_flow_dv_matcher *resource;
10760         struct mlx5_flow_tbl_resource *tbl;
10761         struct mlx5_flow_tbl_data_entry *tbl_data;
10762         struct mlx5_flow_cb_ctx ctx = {
10763                 .error = error,
10764                 .data = ref,
10765         };
10766         /**
10767          * tunnel offload API requires this registration for cases when
10768          * tunnel match rule was inserted before tunnel set rule.
10769          */
10770         tbl = flow_dv_tbl_resource_get(dev, key->level,
10771                                        key->is_egress, key->is_fdb,
10772                                        dev_flow->external, tunnel,
10773                                        group_id, 0, key->id, error);
10774         if (!tbl)
10775                 return -rte_errno;      /* No need to refill the error info */
10776         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10777         ref->tbl = tbl;
10778         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10779         if (!entry) {
10780                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10781                 return rte_flow_error_set(error, ENOMEM,
10782                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10783                                           "cannot allocate ref memory");
10784         }
10785         resource = container_of(entry, typeof(*resource), entry);
10786         dev_flow->handle->dvh.matcher = resource;
10787         return 0;
10788 }
10789
10790 struct mlx5_list_entry *
10791 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10792 {
10793         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10794         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10795         struct mlx5_flow_dv_tag_resource *entry;
10796         uint32_t idx = 0;
10797         int ret;
10798
10799         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10800         if (!entry) {
10801                 rte_flow_error_set(ctx->error, ENOMEM,
10802                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10803                                    "cannot allocate resource memory");
10804                 return NULL;
10805         }
10806         entry->idx = idx;
10807         entry->tag_id = *(uint32_t *)(ctx->data);
10808         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10809                                                   &entry->action);
10810         if (ret) {
10811                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10812                 rte_flow_error_set(ctx->error, ENOMEM,
10813                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10814                                    NULL, "cannot create action");
10815                 return NULL;
10816         }
10817         return &entry->entry;
10818 }
10819
10820 int
10821 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10822                      void *cb_ctx)
10823 {
10824         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10825         struct mlx5_flow_dv_tag_resource *tag =
10826                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10827
10828         return *(uint32_t *)(ctx->data) != tag->tag_id;
10829 }
10830
10831 struct mlx5_list_entry *
10832 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10833                      void *cb_ctx)
10834 {
10835         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10836         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10837         struct mlx5_flow_dv_tag_resource *entry;
10838         uint32_t idx = 0;
10839
10840         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10841         if (!entry) {
10842                 rte_flow_error_set(ctx->error, ENOMEM,
10843                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10844                                    "cannot allocate tag resource memory");
10845                 return NULL;
10846         }
10847         memcpy(entry, oentry, sizeof(*entry));
10848         entry->idx = idx;
10849         return &entry->entry;
10850 }
10851
10852 void
10853 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10854 {
10855         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10856         struct mlx5_flow_dv_tag_resource *tag =
10857                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10858
10859         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10860 }
10861
10862 /**
10863  * Find existing tag resource or create and register a new one.
10864  *
10865  * @param dev[in, out]
10866  *   Pointer to rte_eth_dev structure.
10867  * @param[in, out] tag_be24
10868  *   Tag value in big endian then R-shift 8.
10869  * @parm[in, out] dev_flow
10870  *   Pointer to the dev_flow.
10871  * @param[out] error
10872  *   pointer to error structure.
10873  *
10874  * @return
10875  *   0 on success otherwise -errno and errno is set.
10876  */
10877 static int
10878 flow_dv_tag_resource_register
10879                         (struct rte_eth_dev *dev,
10880                          uint32_t tag_be24,
10881                          struct mlx5_flow *dev_flow,
10882                          struct rte_flow_error *error)
10883 {
10884         struct mlx5_priv *priv = dev->data->dev_private;
10885         struct mlx5_flow_dv_tag_resource *resource;
10886         struct mlx5_list_entry *entry;
10887         struct mlx5_flow_cb_ctx ctx = {
10888                                         .error = error,
10889                                         .data = &tag_be24,
10890                                         };
10891         struct mlx5_hlist *tag_table;
10892
10893         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10894                                       "tags",
10895                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10896                                       false, false, priv->sh,
10897                                       flow_dv_tag_create_cb,
10898                                       flow_dv_tag_match_cb,
10899                                       flow_dv_tag_remove_cb,
10900                                       flow_dv_tag_clone_cb,
10901                                       flow_dv_tag_clone_free_cb,
10902                                       error);
10903         if (unlikely(!tag_table))
10904                 return -rte_errno;
10905         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10906         if (entry) {
10907                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10908                                         entry);
10909                 dev_flow->handle->dvh.rix_tag = resource->idx;
10910                 dev_flow->dv.tag_resource = resource;
10911                 return 0;
10912         }
10913         return -rte_errno;
10914 }
10915
10916 void
10917 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10918 {
10919         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10920         struct mlx5_flow_dv_tag_resource *tag =
10921                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10922
10923         MLX5_ASSERT(tag && sh && tag->action);
10924         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10925         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10926         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10927 }
10928
10929 /**
10930  * Release the tag.
10931  *
10932  * @param dev
10933  *   Pointer to Ethernet device.
10934  * @param tag_idx
10935  *   Tag index.
10936  *
10937  * @return
10938  *   1 while a reference on it exists, 0 when freed.
10939  */
10940 static int
10941 flow_dv_tag_release(struct rte_eth_dev *dev,
10942                     uint32_t tag_idx)
10943 {
10944         struct mlx5_priv *priv = dev->data->dev_private;
10945         struct mlx5_flow_dv_tag_resource *tag;
10946
10947         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10948         if (!tag)
10949                 return 0;
10950         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10951                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10952         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10953 }
10954
10955 /**
10956  * Translate action PORT_ID / REPRESENTED_PORT to vport.
10957  *
10958  * @param[in] dev
10959  *   Pointer to rte_eth_dev structure.
10960  * @param[in] action
10961  *   Pointer to action PORT_ID / REPRESENTED_PORT.
10962  * @param[out] dst_port_id
10963  *   The target port ID.
10964  * @param[out] error
10965  *   Pointer to the error structure.
10966  *
10967  * @return
10968  *   0 on success, a negative errno value otherwise and rte_errno is set.
10969  */
10970 static int
10971 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10972                                  const struct rte_flow_action *action,
10973                                  uint32_t *dst_port_id,
10974                                  struct rte_flow_error *error)
10975 {
10976         uint32_t port;
10977         struct mlx5_priv *priv;
10978
10979         switch (action->type) {
10980         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10981                 const struct rte_flow_action_port_id *conf;
10982
10983                 conf = (const struct rte_flow_action_port_id *)action->conf;
10984                 port = conf->original ? dev->data->port_id : conf->id;
10985                 break;
10986         }
10987         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10988                 const struct rte_flow_action_ethdev *ethdev;
10989
10990                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10991                 port = ethdev->port_id;
10992                 break;
10993         }
10994         default:
10995                 MLX5_ASSERT(false);
10996                 return rte_flow_error_set(error, EINVAL,
10997                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
10998                                           "unknown E-Switch action");
10999         }
11000
11001         priv = mlx5_port_to_eswitch_info(port, false);
11002         if (!priv)
11003                 return rte_flow_error_set(error, -rte_errno,
11004                                           RTE_FLOW_ERROR_TYPE_ACTION,
11005                                           NULL,
11006                                           "No eswitch info was found for port");
11007 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
11008         /*
11009          * This parameter is transferred to
11010          * mlx5dv_dr_action_create_dest_ib_port().
11011          */
11012         *dst_port_id = priv->dev_port;
11013 #else
11014         /*
11015          * Legacy mode, no LAG configurations is supported.
11016          * This parameter is transferred to
11017          * mlx5dv_dr_action_create_dest_vport().
11018          */
11019         *dst_port_id = priv->vport_id;
11020 #endif
11021         return 0;
11022 }
11023
11024 /**
11025  * Create a counter with aging configuration.
11026  *
11027  * @param[in] dev
11028  *   Pointer to rte_eth_dev structure.
11029  * @param[in] dev_flow
11030  *   Pointer to the mlx5_flow.
11031  * @param[out] count
11032  *   Pointer to the counter action configuration.
11033  * @param[in] age
11034  *   Pointer to the aging action configuration.
11035  *
11036  * @return
11037  *   Index to flow counter on success, 0 otherwise.
11038  */
11039 static uint32_t
11040 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
11041                                 struct mlx5_flow *dev_flow,
11042                                 const struct rte_flow_action_count *count
11043                                         __rte_unused,
11044                                 const struct rte_flow_action_age *age)
11045 {
11046         uint32_t counter;
11047         struct mlx5_age_param *age_param;
11048
11049         counter = flow_dv_counter_alloc(dev, !!age);
11050         if (!counter || age == NULL)
11051                 return counter;
11052         age_param = flow_dv_counter_idx_get_age(dev, counter);
11053         age_param->context = age->context ? age->context :
11054                 (void *)(uintptr_t)(dev_flow->flow_idx);
11055         age_param->timeout = age->timeout;
11056         age_param->port_id = dev->data->port_id;
11057         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
11058         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
11059         return counter;
11060 }
11061
11062 /**
11063  * Add Tx queue matcher
11064  *
11065  * @param[in] dev
11066  *   Pointer to the dev struct.
11067  * @param[in, out] matcher
11068  *   Flow matcher.
11069  * @param[in, out] key
11070  *   Flow matcher value.
11071  * @param[in] item
11072  *   Flow pattern to translate.
11073  * @param[in] inner
11074  *   Item is inner pattern.
11075  */
11076 static void
11077 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
11078                                 void *matcher, void *key,
11079                                 const struct rte_flow_item *item)
11080 {
11081         const struct mlx5_rte_flow_item_tx_queue *queue_m;
11082         const struct mlx5_rte_flow_item_tx_queue *queue_v;
11083         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
11084         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
11085         struct mlx5_txq_ctrl *txq;
11086         uint32_t queue, mask;
11087
11088         queue_m = (const void *)item->mask;
11089         queue_v = (const void *)item->spec;
11090         if (!queue_v)
11091                 return;
11092         txq = mlx5_txq_get(dev, queue_v->queue);
11093         if (!txq)
11094                 return;
11095         if (txq->is_hairpin)
11096                 queue = txq->obj->sq->id;
11097         else
11098                 queue = txq->obj->sq_obj.sq->id;
11099         mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
11100         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
11101         MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
11102         mlx5_txq_release(dev, queue_v->queue);
11103 }
11104
11105 /**
11106  * Set the hash fields according to the @p flow information.
11107  *
11108  * @param[in] item_flags
11109  *   The match pattern item flags.
11110  * @param[in] rss_desc
11111  *   Pointer to the mlx5_flow_rss_desc.
11112  * @param[out] hash_fields
11113  *   Pointer to the RSS hash fields.
11114  */
11115 void
11116 flow_dv_hashfields_set(uint64_t item_flags,
11117                        struct mlx5_flow_rss_desc *rss_desc,
11118                        uint64_t *hash_fields)
11119 {
11120         uint64_t items = item_flags;
11121         uint64_t fields = 0;
11122         int rss_inner = 0;
11123         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
11124
11125         *hash_fields = 0;
11126 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
11127         if (rss_desc->level >= 2)
11128                 rss_inner = 1;
11129 #endif
11130         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
11131             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4)) ||
11132              !items) {
11133                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
11134                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11135                                 fields |= IBV_RX_HASH_SRC_IPV4;
11136                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11137                                 fields |= IBV_RX_HASH_DST_IPV4;
11138                         else
11139                                 fields |= MLX5_IPV4_IBV_RX_HASH;
11140                 }
11141         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
11142                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6)) ||
11143                    !items) {
11144                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
11145                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11146                                 fields |= IBV_RX_HASH_SRC_IPV6;
11147                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11148                                 fields |= IBV_RX_HASH_DST_IPV6;
11149                         else
11150                                 fields |= MLX5_IPV6_IBV_RX_HASH;
11151                 }
11152         }
11153         if (fields == 0)
11154                 /*
11155                  * There is no match between the RSS types and the
11156                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
11157                  */
11158                 return;
11159         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
11160             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP)) ||
11161             !items) {
11162                 if (rss_types & RTE_ETH_RSS_UDP) {
11163                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11164                                 fields |= IBV_RX_HASH_SRC_PORT_UDP;
11165                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11166                                 fields |= IBV_RX_HASH_DST_PORT_UDP;
11167                         else
11168                                 fields |= MLX5_UDP_IBV_RX_HASH;
11169                 }
11170         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
11171                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP)) ||
11172                    !items) {
11173                 if (rss_types & RTE_ETH_RSS_TCP) {
11174                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11175                                 fields |= IBV_RX_HASH_SRC_PORT_TCP;
11176                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11177                                 fields |= IBV_RX_HASH_DST_PORT_TCP;
11178                         else
11179                                 fields |= MLX5_TCP_IBV_RX_HASH;
11180                 }
11181         }
11182         if (rss_inner)
11183                 fields |= IBV_RX_HASH_INNER;
11184         *hash_fields = fields;
11185 }
11186
11187 /**
11188  * Prepare an Rx Hash queue.
11189  *
11190  * @param dev
11191  *   Pointer to Ethernet device.
11192  * @param[in] dev_flow
11193  *   Pointer to the mlx5_flow.
11194  * @param[in] rss_desc
11195  *   Pointer to the mlx5_flow_rss_desc.
11196  * @param[out] hrxq_idx
11197  *   Hash Rx queue index.
11198  *
11199  * @return
11200  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
11201  */
11202 static struct mlx5_hrxq *
11203 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
11204                      struct mlx5_flow *dev_flow,
11205                      struct mlx5_flow_rss_desc *rss_desc,
11206                      uint32_t *hrxq_idx)
11207 {
11208         struct mlx5_flow_handle *dh = dev_flow->handle;
11209         uint32_t shared_rss = rss_desc->shared_rss;
11210         struct mlx5_hrxq *hrxq;
11211
11212         MLX5_ASSERT(rss_desc->queue_num);
11213         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
11214         rss_desc->hash_fields = dev_flow->hash_fields;
11215         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11216         rss_desc->shared_rss = 0;
11217         if (rss_desc->hash_fields == 0)
11218                 rss_desc->queue_num = 1;
11219         hrxq = mlx5_hrxq_get(dev, rss_desc);
11220         *hrxq_idx = hrxq ? hrxq->idx : 0;
11221         rss_desc->shared_rss = shared_rss;
11222         return hrxq;
11223 }
11224
11225 /**
11226  * Release sample sub action resource.
11227  *
11228  * @param[in, out] dev
11229  *   Pointer to rte_eth_dev structure.
11230  * @param[in] act_res
11231  *   Pointer to sample sub action resource.
11232  */
11233 static void
11234 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11235                                    struct mlx5_flow_sub_actions_idx *act_res)
11236 {
11237         if (act_res->rix_hrxq) {
11238                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11239                 act_res->rix_hrxq = 0;
11240         }
11241         if (act_res->rix_encap_decap) {
11242                 flow_dv_encap_decap_resource_release(dev,
11243                                                      act_res->rix_encap_decap);
11244                 act_res->rix_encap_decap = 0;
11245         }
11246         if (act_res->rix_port_id_action) {
11247                 flow_dv_port_id_action_resource_release(dev,
11248                                                 act_res->rix_port_id_action);
11249                 act_res->rix_port_id_action = 0;
11250         }
11251         if (act_res->rix_tag) {
11252                 flow_dv_tag_release(dev, act_res->rix_tag);
11253                 act_res->rix_tag = 0;
11254         }
11255         if (act_res->rix_jump) {
11256                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11257                 act_res->rix_jump = 0;
11258         }
11259 }
11260
11261 int
11262 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11263                         struct mlx5_list_entry *entry, void *cb_ctx)
11264 {
11265         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11266         struct rte_eth_dev *dev = ctx->dev;
11267         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11268         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11269                                                               typeof(*resource),
11270                                                               entry);
11271
11272         if (ctx_resource->ratio == resource->ratio &&
11273             ctx_resource->ft_type == resource->ft_type &&
11274             ctx_resource->ft_id == resource->ft_id &&
11275             ctx_resource->set_action == resource->set_action &&
11276             !memcmp((void *)&ctx_resource->sample_act,
11277                     (void *)&resource->sample_act,
11278                     sizeof(struct mlx5_flow_sub_actions_list))) {
11279                 /*
11280                  * Existing sample action should release the prepared
11281                  * sub-actions reference counter.
11282                  */
11283                 flow_dv_sample_sub_actions_release(dev,
11284                                                    &ctx_resource->sample_idx);
11285                 return 0;
11286         }
11287         return 1;
11288 }
11289
11290 struct mlx5_list_entry *
11291 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11292 {
11293         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11294         struct rte_eth_dev *dev = ctx->dev;
11295         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11296         void **sample_dv_actions = ctx_resource->sub_actions;
11297         struct mlx5_flow_dv_sample_resource *resource;
11298         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11299         struct mlx5_priv *priv = dev->data->dev_private;
11300         struct mlx5_dev_ctx_shared *sh = priv->sh;
11301         struct mlx5_flow_tbl_resource *tbl;
11302         uint32_t idx = 0;
11303         const uint32_t next_ft_step = 1;
11304         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11305         uint8_t is_egress = 0;
11306         uint8_t is_transfer = 0;
11307         struct rte_flow_error *error = ctx->error;
11308
11309         /* Register new sample resource. */
11310         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11311         if (!resource) {
11312                 rte_flow_error_set(error, ENOMEM,
11313                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11314                                           NULL,
11315                                           "cannot allocate resource memory");
11316                 return NULL;
11317         }
11318         *resource = *ctx_resource;
11319         /* Create normal path table level */
11320         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11321                 is_transfer = 1;
11322         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11323                 is_egress = 1;
11324         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11325                                         is_egress, is_transfer,
11326                                         true, NULL, 0, 0, 0, error);
11327         if (!tbl) {
11328                 rte_flow_error_set(error, ENOMEM,
11329                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11330                                           NULL,
11331                                           "fail to create normal path table "
11332                                           "for sample");
11333                 goto error;
11334         }
11335         resource->normal_path_tbl = tbl;
11336         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11337                 if (!sh->default_miss_action) {
11338                         rte_flow_error_set(error, ENOMEM,
11339                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11340                                                 NULL,
11341                                                 "default miss action was not "
11342                                                 "created");
11343                         goto error;
11344                 }
11345                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11346                                                 sh->default_miss_action;
11347         }
11348         /* Create a DR sample action */
11349         sampler_attr.sample_ratio = resource->ratio;
11350         sampler_attr.default_next_table = tbl->obj;
11351         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11352         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11353                                                         &sample_dv_actions[0];
11354         sampler_attr.action = resource->set_action;
11355         if (mlx5_os_flow_dr_create_flow_action_sampler
11356                         (&sampler_attr, &resource->verbs_action)) {
11357                 rte_flow_error_set(error, ENOMEM,
11358                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11359                                         NULL, "cannot create sample action");
11360                 goto error;
11361         }
11362         resource->idx = idx;
11363         resource->dev = dev;
11364         return &resource->entry;
11365 error:
11366         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11367                 flow_dv_sample_sub_actions_release(dev,
11368                                                    &resource->sample_idx);
11369         if (resource->normal_path_tbl)
11370                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11371                                 resource->normal_path_tbl);
11372         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11373         return NULL;
11374
11375 }
11376
11377 struct mlx5_list_entry *
11378 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11379                          struct mlx5_list_entry *entry __rte_unused,
11380                          void *cb_ctx)
11381 {
11382         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11383         struct rte_eth_dev *dev = ctx->dev;
11384         struct mlx5_flow_dv_sample_resource *resource;
11385         struct mlx5_priv *priv = dev->data->dev_private;
11386         struct mlx5_dev_ctx_shared *sh = priv->sh;
11387         uint32_t idx = 0;
11388
11389         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11390         if (!resource) {
11391                 rte_flow_error_set(ctx->error, ENOMEM,
11392                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11393                                           NULL,
11394                                           "cannot allocate resource memory");
11395                 return NULL;
11396         }
11397         memcpy(resource, entry, sizeof(*resource));
11398         resource->idx = idx;
11399         resource->dev = dev;
11400         return &resource->entry;
11401 }
11402
11403 void
11404 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11405                              struct mlx5_list_entry *entry)
11406 {
11407         struct mlx5_flow_dv_sample_resource *resource =
11408                                   container_of(entry, typeof(*resource), entry);
11409         struct rte_eth_dev *dev = resource->dev;
11410         struct mlx5_priv *priv = dev->data->dev_private;
11411
11412         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11413 }
11414
11415 /**
11416  * Find existing sample resource or create and register a new one.
11417  *
11418  * @param[in, out] dev
11419  *   Pointer to rte_eth_dev structure.
11420  * @param[in] ref
11421  *   Pointer to sample resource reference.
11422  * @parm[in, out] dev_flow
11423  *   Pointer to the dev_flow.
11424  * @param[out] error
11425  *   pointer to error structure.
11426  *
11427  * @return
11428  *   0 on success otherwise -errno and errno is set.
11429  */
11430 static int
11431 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11432                          struct mlx5_flow_dv_sample_resource *ref,
11433                          struct mlx5_flow *dev_flow,
11434                          struct rte_flow_error *error)
11435 {
11436         struct mlx5_flow_dv_sample_resource *resource;
11437         struct mlx5_list_entry *entry;
11438         struct mlx5_priv *priv = dev->data->dev_private;
11439         struct mlx5_flow_cb_ctx ctx = {
11440                 .dev = dev,
11441                 .error = error,
11442                 .data = ref,
11443         };
11444
11445         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11446         if (!entry)
11447                 return -rte_errno;
11448         resource = container_of(entry, typeof(*resource), entry);
11449         dev_flow->handle->dvh.rix_sample = resource->idx;
11450         dev_flow->dv.sample_res = resource;
11451         return 0;
11452 }
11453
11454 int
11455 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11456                             struct mlx5_list_entry *entry, void *cb_ctx)
11457 {
11458         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11459         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11460         struct rte_eth_dev *dev = ctx->dev;
11461         struct mlx5_flow_dv_dest_array_resource *resource =
11462                                   container_of(entry, typeof(*resource), entry);
11463         uint32_t idx = 0;
11464
11465         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11466             ctx_resource->ft_type == resource->ft_type &&
11467             !memcmp((void *)resource->sample_act,
11468                     (void *)ctx_resource->sample_act,
11469                    (ctx_resource->num_of_dest *
11470                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11471                 /*
11472                  * Existing sample action should release the prepared
11473                  * sub-actions reference counter.
11474                  */
11475                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11476                         flow_dv_sample_sub_actions_release(dev,
11477                                         &ctx_resource->sample_idx[idx]);
11478                 return 0;
11479         }
11480         return 1;
11481 }
11482
11483 struct mlx5_list_entry *
11484 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11485 {
11486         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11487         struct rte_eth_dev *dev = ctx->dev;
11488         struct mlx5_flow_dv_dest_array_resource *resource;
11489         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11490         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11491         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11492         struct mlx5_priv *priv = dev->data->dev_private;
11493         struct mlx5_dev_ctx_shared *sh = priv->sh;
11494         struct mlx5_flow_sub_actions_list *sample_act;
11495         struct mlx5dv_dr_domain *domain;
11496         uint32_t idx = 0, res_idx = 0;
11497         struct rte_flow_error *error = ctx->error;
11498         uint64_t action_flags;
11499         int ret;
11500
11501         /* Register new destination array resource. */
11502         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11503                                             &res_idx);
11504         if (!resource) {
11505                 rte_flow_error_set(error, ENOMEM,
11506                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11507                                           NULL,
11508                                           "cannot allocate resource memory");
11509                 return NULL;
11510         }
11511         *resource = *ctx_resource;
11512         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11513                 domain = sh->fdb_domain;
11514         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11515                 domain = sh->rx_domain;
11516         else
11517                 domain = sh->tx_domain;
11518         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11519                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11520                                  mlx5_malloc(MLX5_MEM_ZERO,
11521                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11522                                  0, SOCKET_ID_ANY);
11523                 if (!dest_attr[idx]) {
11524                         rte_flow_error_set(error, ENOMEM,
11525                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11526                                            NULL,
11527                                            "cannot allocate resource memory");
11528                         goto error;
11529                 }
11530                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11531                 sample_act = &ctx_resource->sample_act[idx];
11532                 action_flags = sample_act->action_flags;
11533                 switch (action_flags) {
11534                 case MLX5_FLOW_ACTION_QUEUE:
11535                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11536                         break;
11537                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11538                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11539                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11540                         dest_attr[idx]->dest_reformat->reformat =
11541                                         sample_act->dr_encap_action;
11542                         dest_attr[idx]->dest_reformat->dest =
11543                                         sample_act->dr_port_id_action;
11544                         break;
11545                 case MLX5_FLOW_ACTION_PORT_ID:
11546                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11547                         break;
11548                 case MLX5_FLOW_ACTION_JUMP:
11549                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11550                         break;
11551                 default:
11552                         rte_flow_error_set(error, EINVAL,
11553                                            RTE_FLOW_ERROR_TYPE_ACTION,
11554                                            NULL,
11555                                            "unsupported actions type");
11556                         goto error;
11557                 }
11558         }
11559         /* create a dest array action */
11560         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11561                                                 (domain,
11562                                                  resource->num_of_dest,
11563                                                  dest_attr,
11564                                                  &resource->action);
11565         if (ret) {
11566                 rte_flow_error_set(error, ENOMEM,
11567                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11568                                    NULL,
11569                                    "cannot create destination array action");
11570                 goto error;
11571         }
11572         resource->idx = res_idx;
11573         resource->dev = dev;
11574         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11575                 mlx5_free(dest_attr[idx]);
11576         return &resource->entry;
11577 error:
11578         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11579                 flow_dv_sample_sub_actions_release(dev,
11580                                                    &resource->sample_idx[idx]);
11581                 if (dest_attr[idx])
11582                         mlx5_free(dest_attr[idx]);
11583         }
11584         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11585         return NULL;
11586 }
11587
11588 struct mlx5_list_entry *
11589 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11590                             struct mlx5_list_entry *entry __rte_unused,
11591                             void *cb_ctx)
11592 {
11593         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11594         struct rte_eth_dev *dev = ctx->dev;
11595         struct mlx5_flow_dv_dest_array_resource *resource;
11596         struct mlx5_priv *priv = dev->data->dev_private;
11597         struct mlx5_dev_ctx_shared *sh = priv->sh;
11598         uint32_t res_idx = 0;
11599         struct rte_flow_error *error = ctx->error;
11600
11601         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11602                                       &res_idx);
11603         if (!resource) {
11604                 rte_flow_error_set(error, ENOMEM,
11605                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11606                                           NULL,
11607                                           "cannot allocate dest-array memory");
11608                 return NULL;
11609         }
11610         memcpy(resource, entry, sizeof(*resource));
11611         resource->idx = res_idx;
11612         resource->dev = dev;
11613         return &resource->entry;
11614 }
11615
11616 void
11617 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11618                                  struct mlx5_list_entry *entry)
11619 {
11620         struct mlx5_flow_dv_dest_array_resource *resource =
11621                         container_of(entry, typeof(*resource), entry);
11622         struct rte_eth_dev *dev = resource->dev;
11623         struct mlx5_priv *priv = dev->data->dev_private;
11624
11625         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11626 }
11627
11628 /**
11629  * Find existing destination array resource or create and register a new one.
11630  *
11631  * @param[in, out] dev
11632  *   Pointer to rte_eth_dev structure.
11633  * @param[in] ref
11634  *   Pointer to destination array resource reference.
11635  * @parm[in, out] dev_flow
11636  *   Pointer to the dev_flow.
11637  * @param[out] error
11638  *   pointer to error structure.
11639  *
11640  * @return
11641  *   0 on success otherwise -errno and errno is set.
11642  */
11643 static int
11644 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11645                          struct mlx5_flow_dv_dest_array_resource *ref,
11646                          struct mlx5_flow *dev_flow,
11647                          struct rte_flow_error *error)
11648 {
11649         struct mlx5_flow_dv_dest_array_resource *resource;
11650         struct mlx5_priv *priv = dev->data->dev_private;
11651         struct mlx5_list_entry *entry;
11652         struct mlx5_flow_cb_ctx ctx = {
11653                 .dev = dev,
11654                 .error = error,
11655                 .data = ref,
11656         };
11657
11658         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11659         if (!entry)
11660                 return -rte_errno;
11661         resource = container_of(entry, typeof(*resource), entry);
11662         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11663         dev_flow->dv.dest_array_res = resource;
11664         return 0;
11665 }
11666
11667 /**
11668  * Convert Sample action to DV specification.
11669  *
11670  * @param[in] dev
11671  *   Pointer to rte_eth_dev structure.
11672  * @param[in] action
11673  *   Pointer to sample action structure.
11674  * @param[in, out] dev_flow
11675  *   Pointer to the mlx5_flow.
11676  * @param[in] attr
11677  *   Pointer to the flow attributes.
11678  * @param[in, out] num_of_dest
11679  *   Pointer to the num of destination.
11680  * @param[in, out] sample_actions
11681  *   Pointer to sample actions list.
11682  * @param[in, out] res
11683  *   Pointer to sample resource.
11684  * @param[out] error
11685  *   Pointer to the error structure.
11686  *
11687  * @return
11688  *   0 on success, a negative errno value otherwise and rte_errno is set.
11689  */
11690 static int
11691 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11692                                 const struct rte_flow_action_sample *action,
11693                                 struct mlx5_flow *dev_flow,
11694                                 const struct rte_flow_attr *attr,
11695                                 uint32_t *num_of_dest,
11696                                 void **sample_actions,
11697                                 struct mlx5_flow_dv_sample_resource *res,
11698                                 struct rte_flow_error *error)
11699 {
11700         struct mlx5_priv *priv = dev->data->dev_private;
11701         const struct rte_flow_action *sub_actions;
11702         struct mlx5_flow_sub_actions_list *sample_act;
11703         struct mlx5_flow_sub_actions_idx *sample_idx;
11704         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11705         struct rte_flow *flow = dev_flow->flow;
11706         struct mlx5_flow_rss_desc *rss_desc;
11707         uint64_t action_flags = 0;
11708
11709         MLX5_ASSERT(wks);
11710         rss_desc = &wks->rss_desc;
11711         sample_act = &res->sample_act;
11712         sample_idx = &res->sample_idx;
11713         res->ratio = action->ratio;
11714         sub_actions = action->actions;
11715         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11716                 int type = sub_actions->type;
11717                 uint32_t pre_rix = 0;
11718                 void *pre_r;
11719                 switch (type) {
11720                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11721                 {
11722                         const struct rte_flow_action_queue *queue;
11723                         struct mlx5_hrxq *hrxq;
11724                         uint32_t hrxq_idx;
11725
11726                         queue = sub_actions->conf;
11727                         rss_desc->queue_num = 1;
11728                         rss_desc->queue[0] = queue->index;
11729                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11730                                                     rss_desc, &hrxq_idx);
11731                         if (!hrxq)
11732                                 return rte_flow_error_set
11733                                         (error, rte_errno,
11734                                          RTE_FLOW_ERROR_TYPE_ACTION,
11735                                          NULL,
11736                                          "cannot create fate queue");
11737                         sample_act->dr_queue_action = hrxq->action;
11738                         sample_idx->rix_hrxq = hrxq_idx;
11739                         sample_actions[sample_act->actions_num++] =
11740                                                 hrxq->action;
11741                         (*num_of_dest)++;
11742                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11743                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11744                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11745                         dev_flow->handle->fate_action =
11746                                         MLX5_FLOW_FATE_QUEUE;
11747                         break;
11748                 }
11749                 case RTE_FLOW_ACTION_TYPE_RSS:
11750                 {
11751                         struct mlx5_hrxq *hrxq;
11752                         uint32_t hrxq_idx;
11753                         const struct rte_flow_action_rss *rss;
11754                         const uint8_t *rss_key;
11755
11756                         rss = sub_actions->conf;
11757                         memcpy(rss_desc->queue, rss->queue,
11758                                rss->queue_num * sizeof(uint16_t));
11759                         rss_desc->queue_num = rss->queue_num;
11760                         /* NULL RSS key indicates default RSS key. */
11761                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11762                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11763                         /*
11764                          * rss->level and rss.types should be set in advance
11765                          * when expanding items for RSS.
11766                          */
11767                         flow_dv_hashfields_set(dev_flow->handle->layers,
11768                                                rss_desc,
11769                                                &dev_flow->hash_fields);
11770                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11771                                                     rss_desc, &hrxq_idx);
11772                         if (!hrxq)
11773                                 return rte_flow_error_set
11774                                         (error, rte_errno,
11775                                          RTE_FLOW_ERROR_TYPE_ACTION,
11776                                          NULL,
11777                                          "cannot create fate queue");
11778                         sample_act->dr_queue_action = hrxq->action;
11779                         sample_idx->rix_hrxq = hrxq_idx;
11780                         sample_actions[sample_act->actions_num++] =
11781                                                 hrxq->action;
11782                         (*num_of_dest)++;
11783                         action_flags |= MLX5_FLOW_ACTION_RSS;
11784                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11785                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11786                         dev_flow->handle->fate_action =
11787                                         MLX5_FLOW_FATE_QUEUE;
11788                         break;
11789                 }
11790                 case RTE_FLOW_ACTION_TYPE_MARK:
11791                 {
11792                         uint32_t tag_be = mlx5_flow_mark_set
11793                                 (((const struct rte_flow_action_mark *)
11794                                 (sub_actions->conf))->id);
11795
11796                         wks->mark = 1;
11797                         pre_rix = dev_flow->handle->dvh.rix_tag;
11798                         /* Save the mark resource before sample */
11799                         pre_r = dev_flow->dv.tag_resource;
11800                         if (flow_dv_tag_resource_register(dev, tag_be,
11801                                                   dev_flow, error))
11802                                 return -rte_errno;
11803                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11804                         sample_act->dr_tag_action =
11805                                 dev_flow->dv.tag_resource->action;
11806                         sample_idx->rix_tag =
11807                                 dev_flow->handle->dvh.rix_tag;
11808                         sample_actions[sample_act->actions_num++] =
11809                                                 sample_act->dr_tag_action;
11810                         /* Recover the mark resource after sample */
11811                         dev_flow->dv.tag_resource = pre_r;
11812                         dev_flow->handle->dvh.rix_tag = pre_rix;
11813                         action_flags |= MLX5_FLOW_ACTION_MARK;
11814                         break;
11815                 }
11816                 case RTE_FLOW_ACTION_TYPE_COUNT:
11817                 {
11818                         if (!flow->counter) {
11819                                 flow->counter =
11820                                         flow_dv_translate_create_counter(dev,
11821                                                 dev_flow, sub_actions->conf,
11822                                                 0);
11823                                 if (!flow->counter)
11824                                         return rte_flow_error_set
11825                                                 (error, rte_errno,
11826                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11827                                                 NULL,
11828                                                 "cannot create counter"
11829                                                 " object.");
11830                         }
11831                         sample_act->dr_cnt_action =
11832                                   (flow_dv_counter_get_by_idx(dev,
11833                                   flow->counter, NULL))->action;
11834                         sample_actions[sample_act->actions_num++] =
11835                                                 sample_act->dr_cnt_action;
11836                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11837                         break;
11838                 }
11839                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11840                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11841                 {
11842                         struct mlx5_flow_dv_port_id_action_resource
11843                                         port_id_resource;
11844                         uint32_t port_id = 0;
11845
11846                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11847                         /* Save the port id resource before sample */
11848                         pre_rix = dev_flow->handle->rix_port_id_action;
11849                         pre_r = dev_flow->dv.port_id_action;
11850                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11851                                                              &port_id, error))
11852                                 return -rte_errno;
11853                         port_id_resource.port_id = port_id;
11854                         if (flow_dv_port_id_action_resource_register
11855                             (dev, &port_id_resource, dev_flow, error))
11856                                 return -rte_errno;
11857                         sample_act->dr_port_id_action =
11858                                 dev_flow->dv.port_id_action->action;
11859                         sample_idx->rix_port_id_action =
11860                                 dev_flow->handle->rix_port_id_action;
11861                         sample_actions[sample_act->actions_num++] =
11862                                                 sample_act->dr_port_id_action;
11863                         /* Recover the port id resource after sample */
11864                         dev_flow->dv.port_id_action = pre_r;
11865                         dev_flow->handle->rix_port_id_action = pre_rix;
11866                         (*num_of_dest)++;
11867                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11868                         break;
11869                 }
11870                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11871                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11872                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11873                         /* Save the encap resource before sample */
11874                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11875                         pre_r = dev_flow->dv.encap_decap;
11876                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11877                                                            dev_flow,
11878                                                            attr->transfer,
11879                                                            error))
11880                                 return -rte_errno;
11881                         sample_act->dr_encap_action =
11882                                 dev_flow->dv.encap_decap->action;
11883                         sample_idx->rix_encap_decap =
11884                                 dev_flow->handle->dvh.rix_encap_decap;
11885                         sample_actions[sample_act->actions_num++] =
11886                                                 sample_act->dr_encap_action;
11887                         /* Recover the encap resource after sample */
11888                         dev_flow->dv.encap_decap = pre_r;
11889                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11890                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11891                         break;
11892                 default:
11893                         return rte_flow_error_set(error, EINVAL,
11894                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11895                                 NULL,
11896                                 "Not support for sampler action");
11897                 }
11898         }
11899         sample_act->action_flags = action_flags;
11900         res->ft_id = dev_flow->dv.group;
11901         if (attr->transfer) {
11902                 union {
11903                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11904                         uint64_t set_action;
11905                 } action_ctx = { .set_action = 0 };
11906
11907                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11908                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11909                          MLX5_MODIFICATION_TYPE_SET);
11910                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11911                          MLX5_MODI_META_REG_C_0);
11912                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11913                          priv->vport_meta_tag);
11914                 res->set_action = action_ctx.set_action;
11915         } else if (attr->ingress) {
11916                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11917         } else {
11918                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11919         }
11920         return 0;
11921 }
11922
11923 /**
11924  * Convert Sample action to DV specification.
11925  *
11926  * @param[in] dev
11927  *   Pointer to rte_eth_dev structure.
11928  * @param[in, out] dev_flow
11929  *   Pointer to the mlx5_flow.
11930  * @param[in] num_of_dest
11931  *   The num of destination.
11932  * @param[in, out] res
11933  *   Pointer to sample resource.
11934  * @param[in, out] mdest_res
11935  *   Pointer to destination array resource.
11936  * @param[in] sample_actions
11937  *   Pointer to sample path actions list.
11938  * @param[in] action_flags
11939  *   Holds the actions detected until now.
11940  * @param[out] error
11941  *   Pointer to the error structure.
11942  *
11943  * @return
11944  *   0 on success, a negative errno value otherwise and rte_errno is set.
11945  */
11946 static int
11947 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11948                              struct mlx5_flow *dev_flow,
11949                              uint32_t num_of_dest,
11950                              struct mlx5_flow_dv_sample_resource *res,
11951                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11952                              void **sample_actions,
11953                              uint64_t action_flags,
11954                              struct rte_flow_error *error)
11955 {
11956         /* update normal path action resource into last index of array */
11957         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11958         struct mlx5_flow_sub_actions_list *sample_act =
11959                                         &mdest_res->sample_act[dest_index];
11960         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11961         struct mlx5_flow_rss_desc *rss_desc;
11962         uint32_t normal_idx = 0;
11963         struct mlx5_hrxq *hrxq;
11964         uint32_t hrxq_idx;
11965
11966         MLX5_ASSERT(wks);
11967         rss_desc = &wks->rss_desc;
11968         if (num_of_dest > 1) {
11969                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11970                         /* Handle QP action for mirroring */
11971                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11972                                                     rss_desc, &hrxq_idx);
11973                         if (!hrxq)
11974                                 return rte_flow_error_set
11975                                      (error, rte_errno,
11976                                       RTE_FLOW_ERROR_TYPE_ACTION,
11977                                       NULL,
11978                                       "cannot create rx queue");
11979                         normal_idx++;
11980                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11981                         sample_act->dr_queue_action = hrxq->action;
11982                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11983                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11984                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11985                 }
11986                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11987                         normal_idx++;
11988                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11989                                 dev_flow->handle->dvh.rix_encap_decap;
11990                         sample_act->dr_encap_action =
11991                                 dev_flow->dv.encap_decap->action;
11992                         dev_flow->handle->dvh.rix_encap_decap = 0;
11993                 }
11994                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11995                         normal_idx++;
11996                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11997                                 dev_flow->handle->rix_port_id_action;
11998                         sample_act->dr_port_id_action =
11999                                 dev_flow->dv.port_id_action->action;
12000                         dev_flow->handle->rix_port_id_action = 0;
12001                 }
12002                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
12003                         normal_idx++;
12004                         mdest_res->sample_idx[dest_index].rix_jump =
12005                                 dev_flow->handle->rix_jump;
12006                         sample_act->dr_jump_action =
12007                                 dev_flow->dv.jump->action;
12008                         dev_flow->handle->rix_jump = 0;
12009                 }
12010                 sample_act->actions_num = normal_idx;
12011                 /* update sample action resource into first index of array */
12012                 mdest_res->ft_type = res->ft_type;
12013                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
12014                                 sizeof(struct mlx5_flow_sub_actions_idx));
12015                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
12016                                 sizeof(struct mlx5_flow_sub_actions_list));
12017                 mdest_res->num_of_dest = num_of_dest;
12018                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
12019                                                          dev_flow, error))
12020                         return rte_flow_error_set(error, EINVAL,
12021                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12022                                                   NULL, "can't create sample "
12023                                                   "action");
12024         } else {
12025                 res->sub_actions = sample_actions;
12026                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
12027                         return rte_flow_error_set(error, EINVAL,
12028                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12029                                                   NULL,
12030                                                   "can't create sample action");
12031         }
12032         return 0;
12033 }
12034
12035 /**
12036  * Remove an ASO age action from age actions list.
12037  *
12038  * @param[in] dev
12039  *   Pointer to the Ethernet device structure.
12040  * @param[in] age
12041  *   Pointer to the aso age action handler.
12042  */
12043 static void
12044 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
12045                                 struct mlx5_aso_age_action *age)
12046 {
12047         struct mlx5_age_info *age_info;
12048         struct mlx5_age_param *age_param = &age->age_params;
12049         struct mlx5_priv *priv = dev->data->dev_private;
12050         uint16_t expected = AGE_CANDIDATE;
12051
12052         age_info = GET_PORT_AGE_INFO(priv);
12053         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
12054                                          AGE_FREE, false, __ATOMIC_RELAXED,
12055                                          __ATOMIC_RELAXED)) {
12056                 /**
12057                  * We need the lock even it is age timeout,
12058                  * since age action may still in process.
12059                  */
12060                 rte_spinlock_lock(&age_info->aged_sl);
12061                 LIST_REMOVE(age, next);
12062                 rte_spinlock_unlock(&age_info->aged_sl);
12063                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
12064         }
12065 }
12066
12067 /**
12068  * Release an ASO age action.
12069  *
12070  * @param[in] dev
12071  *   Pointer to the Ethernet device structure.
12072  * @param[in] age_idx
12073  *   Index of ASO age action to release.
12074  * @param[in] flow
12075  *   True if the release operation is during flow destroy operation.
12076  *   False if the release operation is during action destroy operation.
12077  *
12078  * @return
12079  *   0 when age action was removed, otherwise the number of references.
12080  */
12081 static int
12082 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
12083 {
12084         struct mlx5_priv *priv = dev->data->dev_private;
12085         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12086         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
12087         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
12088
12089         if (!ret) {
12090                 flow_dv_aso_age_remove_from_age(dev, age);
12091                 rte_spinlock_lock(&mng->free_sl);
12092                 LIST_INSERT_HEAD(&mng->free, age, next);
12093                 rte_spinlock_unlock(&mng->free_sl);
12094         }
12095         return ret;
12096 }
12097
12098 /**
12099  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
12100  *
12101  * @param[in] dev
12102  *   Pointer to the Ethernet device structure.
12103  *
12104  * @return
12105  *   0 on success, otherwise negative errno value and rte_errno is set.
12106  */
12107 static int
12108 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
12109 {
12110         struct mlx5_priv *priv = dev->data->dev_private;
12111         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12112         void *old_pools = mng->pools;
12113         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
12114         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
12115         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12116
12117         if (!pools) {
12118                 rte_errno = ENOMEM;
12119                 return -ENOMEM;
12120         }
12121         if (old_pools) {
12122                 memcpy(pools, old_pools,
12123                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
12124                 mlx5_free(old_pools);
12125         } else {
12126                 /* First ASO flow hit allocation - starting ASO data-path. */
12127                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
12128
12129                 if (ret) {
12130                         mlx5_free(pools);
12131                         return ret;
12132                 }
12133         }
12134         mng->n = resize;
12135         mng->pools = pools;
12136         return 0;
12137 }
12138
12139 /**
12140  * Create and initialize a new ASO aging pool.
12141  *
12142  * @param[in] dev
12143  *   Pointer to the Ethernet device structure.
12144  * @param[out] age_free
12145  *   Where to put the pointer of a new age action.
12146  *
12147  * @return
12148  *   The age actions pool pointer and @p age_free is set on success,
12149  *   NULL otherwise and rte_errno is set.
12150  */
12151 static struct mlx5_aso_age_pool *
12152 flow_dv_age_pool_create(struct rte_eth_dev *dev,
12153                         struct mlx5_aso_age_action **age_free)
12154 {
12155         struct mlx5_priv *priv = dev->data->dev_private;
12156         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12157         struct mlx5_aso_age_pool *pool = NULL;
12158         struct mlx5_devx_obj *obj = NULL;
12159         uint32_t i;
12160
12161         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
12162                                                     priv->sh->cdev->pdn);
12163         if (!obj) {
12164                 rte_errno = ENODATA;
12165                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
12166                 return NULL;
12167         }
12168         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12169         if (!pool) {
12170                 claim_zero(mlx5_devx_cmd_destroy(obj));
12171                 rte_errno = ENOMEM;
12172                 return NULL;
12173         }
12174         pool->flow_hit_aso_obj = obj;
12175         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
12176         rte_rwlock_write_lock(&mng->resize_rwl);
12177         pool->index = mng->next;
12178         /* Resize pools array if there is no room for the new pool in it. */
12179         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
12180                 claim_zero(mlx5_devx_cmd_destroy(obj));
12181                 mlx5_free(pool);
12182                 rte_rwlock_write_unlock(&mng->resize_rwl);
12183                 return NULL;
12184         }
12185         mng->pools[pool->index] = pool;
12186         mng->next++;
12187         rte_rwlock_write_unlock(&mng->resize_rwl);
12188         /* Assign the first action in the new pool, the rest go to free list. */
12189         *age_free = &pool->actions[0];
12190         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
12191                 pool->actions[i].offset = i;
12192                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
12193         }
12194         return pool;
12195 }
12196
12197 /**
12198  * Allocate a ASO aging bit.
12199  *
12200  * @param[in] dev
12201  *   Pointer to the Ethernet device structure.
12202  * @param[out] error
12203  *   Pointer to the error structure.
12204  *
12205  * @return
12206  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
12207  */
12208 static uint32_t
12209 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12210 {
12211         struct mlx5_priv *priv = dev->data->dev_private;
12212         const struct mlx5_aso_age_pool *pool;
12213         struct mlx5_aso_age_action *age_free = NULL;
12214         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12215
12216         MLX5_ASSERT(mng);
12217         /* Try to get the next free age action bit. */
12218         rte_spinlock_lock(&mng->free_sl);
12219         age_free = LIST_FIRST(&mng->free);
12220         if (age_free) {
12221                 LIST_REMOVE(age_free, next);
12222         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12223                 rte_spinlock_unlock(&mng->free_sl);
12224                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12225                                    NULL, "failed to create ASO age pool");
12226                 return 0; /* 0 is an error. */
12227         }
12228         rte_spinlock_unlock(&mng->free_sl);
12229         pool = container_of
12230           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12231                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12232                                                                        actions);
12233         if (!age_free->dr_action) {
12234                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12235                                                  error);
12236
12237                 if (reg_c < 0) {
12238                         rte_flow_error_set(error, rte_errno,
12239                                            RTE_FLOW_ERROR_TYPE_ACTION,
12240                                            NULL, "failed to get reg_c "
12241                                            "for ASO flow hit");
12242                         return 0; /* 0 is an error. */
12243                 }
12244 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12245                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12246                                 (priv->sh->rx_domain,
12247                                  pool->flow_hit_aso_obj->obj, age_free->offset,
12248                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12249                                  (reg_c - REG_C_0));
12250 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12251                 if (!age_free->dr_action) {
12252                         rte_errno = errno;
12253                         rte_spinlock_lock(&mng->free_sl);
12254                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12255                         rte_spinlock_unlock(&mng->free_sl);
12256                         rte_flow_error_set(error, rte_errno,
12257                                            RTE_FLOW_ERROR_TYPE_ACTION,
12258                                            NULL, "failed to create ASO "
12259                                            "flow hit action");
12260                         return 0; /* 0 is an error. */
12261                 }
12262         }
12263         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12264         return pool->index | ((age_free->offset + 1) << 16);
12265 }
12266
12267 /**
12268  * Initialize flow ASO age parameters.
12269  *
12270  * @param[in] dev
12271  *   Pointer to rte_eth_dev structure.
12272  * @param[in] age_idx
12273  *   Index of ASO age action.
12274  * @param[in] context
12275  *   Pointer to flow counter age context.
12276  * @param[in] timeout
12277  *   Aging timeout in seconds.
12278  *
12279  */
12280 static void
12281 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12282                             uint32_t age_idx,
12283                             void *context,
12284                             uint32_t timeout)
12285 {
12286         struct mlx5_aso_age_action *aso_age;
12287
12288         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12289         MLX5_ASSERT(aso_age);
12290         aso_age->age_params.context = context;
12291         aso_age->age_params.timeout = timeout;
12292         aso_age->age_params.port_id = dev->data->port_id;
12293         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12294                          __ATOMIC_RELAXED);
12295         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12296                          __ATOMIC_RELAXED);
12297 }
12298
12299 static void
12300 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12301                                const struct rte_flow_item_integrity *value,
12302                                void *headers_m, void *headers_v)
12303 {
12304         if (mask->l4_ok) {
12305                 /* RTE l4_ok filter aggregates hardware l4_ok and
12306                  * l4_checksum_ok filters.
12307                  * Positive RTE l4_ok match requires hardware match on both L4
12308                  * hardware integrity bits.
12309                  * For negative match, check hardware l4_checksum_ok bit only,
12310                  * because hardware sets that bit to 0 for all packets
12311                  * with bad L4.
12312                  */
12313                 if (value->l4_ok) {
12314                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok, 1);
12315                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok, 1);
12316                 }
12317                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12318                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12319                          !!value->l4_ok);
12320         }
12321         if (mask->l4_csum_ok) {
12322                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12323                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12324                          value->l4_csum_ok);
12325         }
12326 }
12327
12328 static void
12329 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12330                                const struct rte_flow_item_integrity *value,
12331                                void *headers_m, void *headers_v, bool is_ipv4)
12332 {
12333         if (mask->l3_ok) {
12334                 /* RTE l3_ok filter aggregates for IPv4 hardware l3_ok and
12335                  * ipv4_csum_ok filters.
12336                  * Positive RTE l3_ok match requires hardware match on both L3
12337                  * hardware integrity bits.
12338                  * For negative match, check hardware l3_csum_ok bit only,
12339                  * because hardware sets that bit to 0 for all packets
12340                  * with bad L3.
12341                  */
12342                 if (is_ipv4) {
12343                         if (value->l3_ok) {
12344                                 MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12345                                          l3_ok, 1);
12346                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12347                                          l3_ok, 1);
12348                         }
12349                         MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12350                                  ipv4_checksum_ok, 1);
12351                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12352                                  ipv4_checksum_ok, !!value->l3_ok);
12353                 } else {
12354                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok, 1);
12355                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12356                                  value->l3_ok);
12357                 }
12358         }
12359         if (mask->ipv4_csum_ok) {
12360                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok, 1);
12361                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12362                          value->ipv4_csum_ok);
12363         }
12364 }
12365
12366 static void
12367 set_integrity_bits(void *headers_m, void *headers_v,
12368                    const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12369 {
12370         const struct rte_flow_item_integrity *spec = integrity_item->spec;
12371         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12372
12373         /* Integrity bits validation cleared spec pointer */
12374         MLX5_ASSERT(spec != NULL);
12375         if (!mask)
12376                 mask = &rte_flow_item_integrity_mask;
12377         flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12378                                        is_l3_ip4);
12379         flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12380 }
12381
12382 static void
12383 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12384                                       const
12385                                       struct rte_flow_item *integrity_items[2],
12386                                       uint64_t pattern_flags)
12387 {
12388         void *headers_m, *headers_v;
12389         bool is_l3_ip4;
12390
12391         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12392                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12393                                          inner_headers);
12394                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12395                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12396                             0;
12397                 set_integrity_bits(headers_m, headers_v,
12398                                    integrity_items[1], is_l3_ip4);
12399         }
12400         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12401                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12402                                          outer_headers);
12403                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12404                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12405                             0;
12406                 set_integrity_bits(headers_m, headers_v,
12407                                    integrity_items[0], is_l3_ip4);
12408         }
12409 }
12410
12411 static void
12412 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12413                                  const struct rte_flow_item *integrity_items[2],
12414                                  uint64_t *last_item)
12415 {
12416         const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12417
12418         /* integrity bits validation cleared spec pointer */
12419         MLX5_ASSERT(spec != NULL);
12420         if (spec->level > 1) {
12421                 integrity_items[1] = item;
12422                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12423         } else {
12424                 integrity_items[0] = item;
12425                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12426         }
12427 }
12428
12429 /**
12430  * Prepares DV flow counter with aging configuration.
12431  * Gets it by index when exists, creates a new one when doesn't.
12432  *
12433  * @param[in] dev
12434  *   Pointer to rte_eth_dev structure.
12435  * @param[in] dev_flow
12436  *   Pointer to the mlx5_flow.
12437  * @param[in, out] flow
12438  *   Pointer to the sub flow.
12439  * @param[in] count
12440  *   Pointer to the counter action configuration.
12441  * @param[in] age
12442  *   Pointer to the aging action configuration.
12443  * @param[out] error
12444  *   Pointer to the error structure.
12445  *
12446  * @return
12447  *   Pointer to the counter, NULL otherwise.
12448  */
12449 static struct mlx5_flow_counter *
12450 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12451                         struct mlx5_flow *dev_flow,
12452                         struct rte_flow *flow,
12453                         const struct rte_flow_action_count *count,
12454                         const struct rte_flow_action_age *age,
12455                         struct rte_flow_error *error)
12456 {
12457         if (!flow->counter) {
12458                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12459                                                                  count, age);
12460                 if (!flow->counter) {
12461                         rte_flow_error_set(error, rte_errno,
12462                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12463                                            "cannot create counter object.");
12464                         return NULL;
12465                 }
12466         }
12467         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12468 }
12469
12470 /*
12471  * Release an ASO CT action by its own device.
12472  *
12473  * @param[in] dev
12474  *   Pointer to the Ethernet device structure.
12475  * @param[in] idx
12476  *   Index of ASO CT action to release.
12477  *
12478  * @return
12479  *   0 when CT action was removed, otherwise the number of references.
12480  */
12481 static inline int
12482 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12483 {
12484         struct mlx5_priv *priv = dev->data->dev_private;
12485         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12486         uint32_t ret;
12487         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12488         enum mlx5_aso_ct_state state =
12489                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12490
12491         /* Cannot release when CT is in the ASO SQ. */
12492         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12493                 return -1;
12494         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12495         if (!ret) {
12496                 if (ct->dr_action_orig) {
12497 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12498                         claim_zero(mlx5_glue->destroy_flow_action
12499                                         (ct->dr_action_orig));
12500 #endif
12501                         ct->dr_action_orig = NULL;
12502                 }
12503                 if (ct->dr_action_rply) {
12504 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12505                         claim_zero(mlx5_glue->destroy_flow_action
12506                                         (ct->dr_action_rply));
12507 #endif
12508                         ct->dr_action_rply = NULL;
12509                 }
12510                 /* Clear the state to free, no need in 1st allocation. */
12511                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12512                 rte_spinlock_lock(&mng->ct_sl);
12513                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12514                 rte_spinlock_unlock(&mng->ct_sl);
12515         }
12516         return (int)ret;
12517 }
12518
12519 static inline int
12520 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12521                        struct rte_flow_error *error)
12522 {
12523         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12524         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12525         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12526         int ret;
12527
12528         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12529         if (dev->data->dev_started != 1)
12530                 return rte_flow_error_set(error, EAGAIN,
12531                                           RTE_FLOW_ERROR_TYPE_ACTION,
12532                                           NULL,
12533                                           "Indirect CT action cannot be destroyed when the port is stopped");
12534         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12535         if (ret < 0)
12536                 return rte_flow_error_set(error, EAGAIN,
12537                                           RTE_FLOW_ERROR_TYPE_ACTION,
12538                                           NULL,
12539                                           "Current state prevents indirect CT action from being destroyed");
12540         return ret;
12541 }
12542
12543 /*
12544  * Resize the ASO CT pools array by 64 pools.
12545  *
12546  * @param[in] dev
12547  *   Pointer to the Ethernet device structure.
12548  *
12549  * @return
12550  *   0 on success, otherwise negative errno value and rte_errno is set.
12551  */
12552 static int
12553 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12554 {
12555         struct mlx5_priv *priv = dev->data->dev_private;
12556         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12557         void *old_pools = mng->pools;
12558         /* Magic number now, need a macro. */
12559         uint32_t resize = mng->n + 64;
12560         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12561         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12562
12563         if (!pools) {
12564                 rte_errno = ENOMEM;
12565                 return -rte_errno;
12566         }
12567         rte_rwlock_write_lock(&mng->resize_rwl);
12568         /* ASO SQ/QP was already initialized in the startup. */
12569         if (old_pools) {
12570                 /* Realloc could be an alternative choice. */
12571                 rte_memcpy(pools, old_pools,
12572                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12573                 mlx5_free(old_pools);
12574         }
12575         mng->n = resize;
12576         mng->pools = pools;
12577         rte_rwlock_write_unlock(&mng->resize_rwl);
12578         return 0;
12579 }
12580
12581 /*
12582  * Create and initialize a new ASO CT pool.
12583  *
12584  * @param[in] dev
12585  *   Pointer to the Ethernet device structure.
12586  * @param[out] ct_free
12587  *   Where to put the pointer of a new CT action.
12588  *
12589  * @return
12590  *   The CT actions pool pointer and @p ct_free is set on success,
12591  *   NULL otherwise and rte_errno is set.
12592  */
12593 static struct mlx5_aso_ct_pool *
12594 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12595                        struct mlx5_aso_ct_action **ct_free)
12596 {
12597         struct mlx5_priv *priv = dev->data->dev_private;
12598         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12599         struct mlx5_aso_ct_pool *pool = NULL;
12600         struct mlx5_devx_obj *obj = NULL;
12601         uint32_t i;
12602         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12603
12604         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12605                                                           priv->sh->cdev->pdn,
12606                                                           log_obj_size);
12607         if (!obj) {
12608                 rte_errno = ENODATA;
12609                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12610                 return NULL;
12611         }
12612         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12613         if (!pool) {
12614                 rte_errno = ENOMEM;
12615                 claim_zero(mlx5_devx_cmd_destroy(obj));
12616                 return NULL;
12617         }
12618         pool->devx_obj = obj;
12619         pool->index = mng->next;
12620         /* Resize pools array if there is no room for the new pool in it. */
12621         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12622                 claim_zero(mlx5_devx_cmd_destroy(obj));
12623                 mlx5_free(pool);
12624                 return NULL;
12625         }
12626         mng->pools[pool->index] = pool;
12627         mng->next++;
12628         /* Assign the first action in the new pool, the rest go to free list. */
12629         *ct_free = &pool->actions[0];
12630         /* Lock outside, the list operation is safe here. */
12631         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12632                 /* refcnt is 0 when allocating the memory. */
12633                 pool->actions[i].offset = i;
12634                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12635         }
12636         return pool;
12637 }
12638
12639 /*
12640  * Allocate a ASO CT action from free list.
12641  *
12642  * @param[in] dev
12643  *   Pointer to the Ethernet device structure.
12644  * @param[out] error
12645  *   Pointer to the error structure.
12646  *
12647  * @return
12648  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12649  */
12650 static uint32_t
12651 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12652 {
12653         struct mlx5_priv *priv = dev->data->dev_private;
12654         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12655         struct mlx5_aso_ct_action *ct = NULL;
12656         struct mlx5_aso_ct_pool *pool;
12657         uint8_t reg_c;
12658         uint32_t ct_idx;
12659
12660         MLX5_ASSERT(mng);
12661         if (!priv->sh->cdev->config.devx) {
12662                 rte_errno = ENOTSUP;
12663                 return 0;
12664         }
12665         /* Get a free CT action, if no, a new pool will be created. */
12666         rte_spinlock_lock(&mng->ct_sl);
12667         ct = LIST_FIRST(&mng->free_cts);
12668         if (ct) {
12669                 LIST_REMOVE(ct, next);
12670         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12671                 rte_spinlock_unlock(&mng->ct_sl);
12672                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12673                                    NULL, "failed to create ASO CT pool");
12674                 return 0;
12675         }
12676         rte_spinlock_unlock(&mng->ct_sl);
12677         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12678         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12679         /* 0: inactive, 1: created, 2+: used by flows. */
12680         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12681         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12682         if (!ct->dr_action_orig) {
12683 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12684                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12685                         (priv->sh->rx_domain, pool->devx_obj->obj,
12686                          ct->offset,
12687                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12688                          reg_c - REG_C_0);
12689 #else
12690                 RTE_SET_USED(reg_c);
12691 #endif
12692                 if (!ct->dr_action_orig) {
12693                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12694                         rte_flow_error_set(error, rte_errno,
12695                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12696                                            "failed to create ASO CT action");
12697                         return 0;
12698                 }
12699         }
12700         if (!ct->dr_action_rply) {
12701 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12702                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12703                         (priv->sh->rx_domain, pool->devx_obj->obj,
12704                          ct->offset,
12705                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12706                          reg_c - REG_C_0);
12707 #endif
12708                 if (!ct->dr_action_rply) {
12709                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12710                         rte_flow_error_set(error, rte_errno,
12711                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12712                                            "failed to create ASO CT action");
12713                         return 0;
12714                 }
12715         }
12716         return ct_idx;
12717 }
12718
12719 /*
12720  * Create a conntrack object with context and actions by using ASO mechanism.
12721  *
12722  * @param[in] dev
12723  *   Pointer to rte_eth_dev structure.
12724  * @param[in] pro
12725  *   Pointer to conntrack information profile.
12726  * @param[out] error
12727  *   Pointer to the error structure.
12728  *
12729  * @return
12730  *   Index to conntrack object on success, 0 otherwise.
12731  */
12732 static uint32_t
12733 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12734                                    const struct rte_flow_action_conntrack *pro,
12735                                    struct rte_flow_error *error)
12736 {
12737         struct mlx5_priv *priv = dev->data->dev_private;
12738         struct mlx5_dev_ctx_shared *sh = priv->sh;
12739         struct mlx5_aso_ct_action *ct;
12740         uint32_t idx;
12741
12742         if (!sh->ct_aso_en)
12743                 return rte_flow_error_set(error, ENOTSUP,
12744                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12745                                           "Connection is not supported");
12746         idx = flow_dv_aso_ct_alloc(dev, error);
12747         if (!idx)
12748                 return rte_flow_error_set(error, rte_errno,
12749                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12750                                           "Failed to allocate CT object");
12751         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12752         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12753                 return rte_flow_error_set(error, EBUSY,
12754                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12755                                           "Failed to update CT");
12756         ct->is_original = !!pro->is_original_dir;
12757         ct->peer = pro->peer_port;
12758         return idx;
12759 }
12760
12761 /**
12762  * Fill the flow with DV spec, lock free
12763  * (mutex should be acquired by caller).
12764  *
12765  * @param[in] dev
12766  *   Pointer to rte_eth_dev structure.
12767  * @param[in, out] dev_flow
12768  *   Pointer to the sub flow.
12769  * @param[in] attr
12770  *   Pointer to the flow attributes.
12771  * @param[in] items
12772  *   Pointer to the list of items.
12773  * @param[in] actions
12774  *   Pointer to the list of actions.
12775  * @param[out] error
12776  *   Pointer to the error structure.
12777  *
12778  * @return
12779  *   0 on success, a negative errno value otherwise and rte_errno is set.
12780  */
12781 static int
12782 flow_dv_translate(struct rte_eth_dev *dev,
12783                   struct mlx5_flow *dev_flow,
12784                   const struct rte_flow_attr *attr,
12785                   const struct rte_flow_item items[],
12786                   const struct rte_flow_action actions[],
12787                   struct rte_flow_error *error)
12788 {
12789         struct mlx5_priv *priv = dev->data->dev_private;
12790         struct mlx5_sh_config *dev_conf = &priv->sh->config;
12791         struct rte_flow *flow = dev_flow->flow;
12792         struct mlx5_flow_handle *handle = dev_flow->handle;
12793         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12794         struct mlx5_flow_rss_desc *rss_desc;
12795         uint64_t item_flags = 0;
12796         uint64_t last_item = 0;
12797         uint64_t action_flags = 0;
12798         struct mlx5_flow_dv_matcher matcher = {
12799                 .mask = {
12800                         .size = sizeof(matcher.mask.buf),
12801                 },
12802         };
12803         int actions_n = 0;
12804         bool actions_end = false;
12805         union {
12806                 struct mlx5_flow_dv_modify_hdr_resource res;
12807                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12808                             sizeof(struct mlx5_modification_cmd) *
12809                             (MLX5_MAX_MODIFY_NUM + 1)];
12810         } mhdr_dummy;
12811         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12812         const struct rte_flow_action_count *count = NULL;
12813         const struct rte_flow_action_age *non_shared_age = NULL;
12814         union flow_dv_attr flow_attr = { .attr = 0 };
12815         uint32_t tag_be;
12816         union mlx5_flow_tbl_key tbl_key;
12817         uint32_t modify_action_position = UINT32_MAX;
12818         void *match_mask = matcher.mask.buf;
12819         void *match_value = dev_flow->dv.value.buf;
12820         uint8_t next_protocol = 0xff;
12821         struct rte_vlan_hdr vlan = { 0 };
12822         struct mlx5_flow_dv_dest_array_resource mdest_res;
12823         struct mlx5_flow_dv_sample_resource sample_res;
12824         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12825         const struct rte_flow_action_sample *sample = NULL;
12826         struct mlx5_flow_sub_actions_list *sample_act;
12827         uint32_t sample_act_pos = UINT32_MAX;
12828         uint32_t age_act_pos = UINT32_MAX;
12829         uint32_t num_of_dest = 0;
12830         int tmp_actions_n = 0;
12831         uint32_t table;
12832         int ret = 0;
12833         const struct mlx5_flow_tunnel *tunnel = NULL;
12834         struct flow_grp_info grp_info = {
12835                 .external = !!dev_flow->external,
12836                 .transfer = !!attr->transfer,
12837                 .fdb_def_rule = !!priv->fdb_def_rule,
12838                 .skip_scale = dev_flow->skip_scale &
12839                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12840                 .std_tbl_fix = true,
12841         };
12842         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12843         const struct rte_flow_item *tunnel_item = NULL;
12844         const struct rte_flow_item *gre_item = NULL;
12845
12846         if (!wks)
12847                 return rte_flow_error_set(error, ENOMEM,
12848                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12849                                           NULL,
12850                                           "failed to push flow workspace");
12851         rss_desc = &wks->rss_desc;
12852         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12853         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12854         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12855                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12856         /* update normal path action resource into last index of array */
12857         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12858         if (is_tunnel_offload_active(dev)) {
12859                 if (dev_flow->tunnel) {
12860                         RTE_VERIFY(dev_flow->tof_type ==
12861                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12862                         tunnel = dev_flow->tunnel;
12863                 } else {
12864                         tunnel = mlx5_get_tof(items, actions,
12865                                               &dev_flow->tof_type);
12866                         dev_flow->tunnel = tunnel;
12867                 }
12868                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12869                                         (dev, attr, tunnel, dev_flow->tof_type);
12870         }
12871         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12872                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12873         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12874                                        &grp_info, error);
12875         if (ret)
12876                 return ret;
12877         dev_flow->dv.group = table;
12878         if (attr->transfer)
12879                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12880         /* number of actions must be set to 0 in case of dirty stack. */
12881         mhdr_res->actions_num = 0;
12882         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12883                 /*
12884                  * do not add decap action if match rule drops packet
12885                  * HW rejects rules with decap & drop
12886                  *
12887                  * if tunnel match rule was inserted before matching tunnel set
12888                  * rule flow table used in the match rule must be registered.
12889                  * current implementation handles that in the
12890                  * flow_dv_match_register() at the function end.
12891                  */
12892                 bool add_decap = true;
12893                 const struct rte_flow_action *ptr = actions;
12894
12895                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12896                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12897                                 add_decap = false;
12898                                 break;
12899                         }
12900                 }
12901                 if (add_decap) {
12902                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12903                                                            attr->transfer,
12904                                                            error))
12905                                 return -rte_errno;
12906                         dev_flow->dv.actions[actions_n++] =
12907                                         dev_flow->dv.encap_decap->action;
12908                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12909                 }
12910         }
12911         for (; !actions_end ; actions++) {
12912                 const struct rte_flow_action_queue *queue;
12913                 const struct rte_flow_action_rss *rss;
12914                 const struct rte_flow_action *action = actions;
12915                 const uint8_t *rss_key;
12916                 struct mlx5_flow_tbl_resource *tbl;
12917                 struct mlx5_aso_age_action *age_act;
12918                 struct mlx5_flow_counter *cnt_act;
12919                 uint32_t port_id = 0;
12920                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12921                 int action_type = actions->type;
12922                 const struct rte_flow_action *found_action = NULL;
12923                 uint32_t jump_group = 0;
12924                 uint32_t owner_idx;
12925                 struct mlx5_aso_ct_action *ct;
12926
12927                 if (!mlx5_flow_os_action_supported(action_type))
12928                         return rte_flow_error_set(error, ENOTSUP,
12929                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12930                                                   actions,
12931                                                   "action not supported");
12932                 switch (action_type) {
12933                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12934                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12935                         break;
12936                 case RTE_FLOW_ACTION_TYPE_VOID:
12937                         break;
12938                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12939                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12940                         if (flow_dv_translate_action_port_id(dev, action,
12941                                                              &port_id, error))
12942                                 return -rte_errno;
12943                         port_id_resource.port_id = port_id;
12944                         MLX5_ASSERT(!handle->rix_port_id_action);
12945                         if (flow_dv_port_id_action_resource_register
12946                             (dev, &port_id_resource, dev_flow, error))
12947                                 return -rte_errno;
12948                         dev_flow->dv.actions[actions_n++] =
12949                                         dev_flow->dv.port_id_action->action;
12950                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12951                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12952                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12953                         num_of_dest++;
12954                         break;
12955                 case RTE_FLOW_ACTION_TYPE_FLAG:
12956                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12957                         wks->mark = 1;
12958                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12959                                 struct rte_flow_action_mark mark = {
12960                                         .id = MLX5_FLOW_MARK_DEFAULT,
12961                                 };
12962
12963                                 if (flow_dv_convert_action_mark(dev, &mark,
12964                                                                 mhdr_res,
12965                                                                 error))
12966                                         return -rte_errno;
12967                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12968                                 break;
12969                         }
12970                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12971                         /*
12972                          * Only one FLAG or MARK is supported per device flow
12973                          * right now. So the pointer to the tag resource must be
12974                          * zero before the register process.
12975                          */
12976                         MLX5_ASSERT(!handle->dvh.rix_tag);
12977                         if (flow_dv_tag_resource_register(dev, tag_be,
12978                                                           dev_flow, error))
12979                                 return -rte_errno;
12980                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12981                         dev_flow->dv.actions[actions_n++] =
12982                                         dev_flow->dv.tag_resource->action;
12983                         break;
12984                 case RTE_FLOW_ACTION_TYPE_MARK:
12985                         action_flags |= MLX5_FLOW_ACTION_MARK;
12986                         wks->mark = 1;
12987                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12988                                 const struct rte_flow_action_mark *mark =
12989                                         (const struct rte_flow_action_mark *)
12990                                                 actions->conf;
12991
12992                                 if (flow_dv_convert_action_mark(dev, mark,
12993                                                                 mhdr_res,
12994                                                                 error))
12995                                         return -rte_errno;
12996                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12997                                 break;
12998                         }
12999                         /* Fall-through */
13000                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
13001                         /* Legacy (non-extensive) MARK action. */
13002                         tag_be = mlx5_flow_mark_set
13003                               (((const struct rte_flow_action_mark *)
13004                                (actions->conf))->id);
13005                         MLX5_ASSERT(!handle->dvh.rix_tag);
13006                         if (flow_dv_tag_resource_register(dev, tag_be,
13007                                                           dev_flow, error))
13008                                 return -rte_errno;
13009                         MLX5_ASSERT(dev_flow->dv.tag_resource);
13010                         dev_flow->dv.actions[actions_n++] =
13011                                         dev_flow->dv.tag_resource->action;
13012                         break;
13013                 case RTE_FLOW_ACTION_TYPE_SET_META:
13014                         if (flow_dv_convert_action_set_meta
13015                                 (dev, mhdr_res, attr,
13016                                  (const struct rte_flow_action_set_meta *)
13017                                   actions->conf, error))
13018                                 return -rte_errno;
13019                         action_flags |= MLX5_FLOW_ACTION_SET_META;
13020                         break;
13021                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
13022                         if (flow_dv_convert_action_set_tag
13023                                 (dev, mhdr_res,
13024                                  (const struct rte_flow_action_set_tag *)
13025                                   actions->conf, error))
13026                                 return -rte_errno;
13027                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13028                         break;
13029                 case RTE_FLOW_ACTION_TYPE_DROP:
13030                         action_flags |= MLX5_FLOW_ACTION_DROP;
13031                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
13032                         break;
13033                 case RTE_FLOW_ACTION_TYPE_QUEUE:
13034                         queue = actions->conf;
13035                         rss_desc->queue_num = 1;
13036                         rss_desc->queue[0] = queue->index;
13037                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
13038                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
13039                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
13040                         num_of_dest++;
13041                         break;
13042                 case RTE_FLOW_ACTION_TYPE_RSS:
13043                         rss = actions->conf;
13044                         memcpy(rss_desc->queue, rss->queue,
13045                                rss->queue_num * sizeof(uint16_t));
13046                         rss_desc->queue_num = rss->queue_num;
13047                         /* NULL RSS key indicates default RSS key. */
13048                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
13049                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
13050                         /*
13051                          * rss->level and rss.types should be set in advance
13052                          * when expanding items for RSS.
13053                          */
13054                         action_flags |= MLX5_FLOW_ACTION_RSS;
13055                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
13056                                 MLX5_FLOW_FATE_SHARED_RSS :
13057                                 MLX5_FLOW_FATE_QUEUE;
13058                         break;
13059                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
13060                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13061                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
13062                         if (flow->age == 0) {
13063                                 flow->age = owner_idx;
13064                                 __atomic_fetch_add(&age_act->refcnt, 1,
13065                                                    __ATOMIC_RELAXED);
13066                         }
13067                         age_act_pos = actions_n++;
13068                         action_flags |= MLX5_FLOW_ACTION_AGE;
13069                         break;
13070                 case RTE_FLOW_ACTION_TYPE_AGE:
13071                         non_shared_age = action->conf;
13072                         age_act_pos = actions_n++;
13073                         action_flags |= MLX5_FLOW_ACTION_AGE;
13074                         break;
13075                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
13076                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13077                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
13078                                                              NULL);
13079                         MLX5_ASSERT(cnt_act != NULL);
13080                         /**
13081                          * When creating meter drop flow in drop table, the
13082                          * counter should not overwrite the rte flow counter.
13083                          */
13084                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13085                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
13086                                 dev_flow->dv.actions[actions_n++] =
13087                                                         cnt_act->action;
13088                         } else {
13089                                 if (flow->counter == 0) {
13090                                         flow->counter = owner_idx;
13091                                         __atomic_fetch_add
13092                                                 (&cnt_act->shared_info.refcnt,
13093                                                  1, __ATOMIC_RELAXED);
13094                                 }
13095                                 /* Save information first, will apply later. */
13096                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
13097                         }
13098                         break;
13099                 case RTE_FLOW_ACTION_TYPE_COUNT:
13100                         if (!priv->sh->cdev->config.devx) {
13101                                 return rte_flow_error_set
13102                                               (error, ENOTSUP,
13103                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13104                                                NULL,
13105                                                "count action not supported");
13106                         }
13107                         /* Save information first, will apply later. */
13108                         count = action->conf;
13109                         action_flags |= MLX5_FLOW_ACTION_COUNT;
13110                         break;
13111                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
13112                         dev_flow->dv.actions[actions_n++] =
13113                                                 priv->sh->pop_vlan_action;
13114                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
13115                         break;
13116                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
13117                         if (!(action_flags &
13118                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
13119                                 flow_dev_get_vlan_info_from_items(items, &vlan);
13120                         vlan.eth_proto = rte_be_to_cpu_16
13121                              ((((const struct rte_flow_action_of_push_vlan *)
13122                                                    actions->conf)->ethertype));
13123                         found_action = mlx5_flow_find_action
13124                                         (actions + 1,
13125                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
13126                         if (found_action)
13127                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
13128                         found_action = mlx5_flow_find_action
13129                                         (actions + 1,
13130                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
13131                         if (found_action)
13132                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
13133                         if (flow_dv_create_action_push_vlan
13134                                             (dev, attr, &vlan, dev_flow, error))
13135                                 return -rte_errno;
13136                         dev_flow->dv.actions[actions_n++] =
13137                                         dev_flow->dv.push_vlan_res->action;
13138                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
13139                         break;
13140                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
13141                         /* of_vlan_push action handled this action */
13142                         MLX5_ASSERT(action_flags &
13143                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
13144                         break;
13145                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
13146                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
13147                                 break;
13148                         flow_dev_get_vlan_info_from_items(items, &vlan);
13149                         mlx5_update_vlan_vid_pcp(actions, &vlan);
13150                         /* If no VLAN push - this is a modify header action */
13151                         if (flow_dv_convert_action_modify_vlan_vid
13152                                                 (mhdr_res, actions, error))
13153                                 return -rte_errno;
13154                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
13155                         break;
13156                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
13157                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
13158                         if (flow_dv_create_action_l2_encap(dev, actions,
13159                                                            dev_flow,
13160                                                            attr->transfer,
13161                                                            error))
13162                                 return -rte_errno;
13163                         dev_flow->dv.actions[actions_n++] =
13164                                         dev_flow->dv.encap_decap->action;
13165                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13166                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13167                                 sample_act->action_flags |=
13168                                                         MLX5_FLOW_ACTION_ENCAP;
13169                         break;
13170                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
13171                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
13172                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
13173                                                            attr->transfer,
13174                                                            error))
13175                                 return -rte_errno;
13176                         dev_flow->dv.actions[actions_n++] =
13177                                         dev_flow->dv.encap_decap->action;
13178                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13179                         break;
13180                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
13181                         /* Handle encap with preceding decap. */
13182                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
13183                                 if (flow_dv_create_action_raw_encap
13184                                         (dev, actions, dev_flow, attr, error))
13185                                         return -rte_errno;
13186                                 dev_flow->dv.actions[actions_n++] =
13187                                         dev_flow->dv.encap_decap->action;
13188                         } else {
13189                                 /* Handle encap without preceding decap. */
13190                                 if (flow_dv_create_action_l2_encap
13191                                     (dev, actions, dev_flow, attr->transfer,
13192                                      error))
13193                                         return -rte_errno;
13194                                 dev_flow->dv.actions[actions_n++] =
13195                                         dev_flow->dv.encap_decap->action;
13196                         }
13197                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13198                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13199                                 sample_act->action_flags |=
13200                                                         MLX5_FLOW_ACTION_ENCAP;
13201                         break;
13202                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
13203                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
13204                                 ;
13205                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
13206                                 if (flow_dv_create_action_l2_decap
13207                                     (dev, dev_flow, attr->transfer, error))
13208                                         return -rte_errno;
13209                                 dev_flow->dv.actions[actions_n++] =
13210                                         dev_flow->dv.encap_decap->action;
13211                         }
13212                         /* If decap is followed by encap, handle it at encap. */
13213                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13214                         break;
13215                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
13216                         dev_flow->dv.actions[actions_n++] =
13217                                 (void *)(uintptr_t)action->conf;
13218                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13219                         break;
13220                 case RTE_FLOW_ACTION_TYPE_JUMP:
13221                         jump_group = ((const struct rte_flow_action_jump *)
13222                                                         action->conf)->group;
13223                         grp_info.std_tbl_fix = 0;
13224                         if (dev_flow->skip_scale &
13225                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
13226                                 grp_info.skip_scale = 1;
13227                         else
13228                                 grp_info.skip_scale = 0;
13229                         ret = mlx5_flow_group_to_table(dev, tunnel,
13230                                                        jump_group,
13231                                                        &table,
13232                                                        &grp_info, error);
13233                         if (ret)
13234                                 return ret;
13235                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
13236                                                        attr->transfer,
13237                                                        !!dev_flow->external,
13238                                                        tunnel, jump_group, 0,
13239                                                        0, error);
13240                         if (!tbl)
13241                                 return rte_flow_error_set
13242                                                 (error, errno,
13243                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13244                                                  NULL,
13245                                                  "cannot create jump action.");
13246                         if (flow_dv_jump_tbl_resource_register
13247                             (dev, tbl, dev_flow, error)) {
13248                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
13249                                 return rte_flow_error_set
13250                                                 (error, errno,
13251                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13252                                                  NULL,
13253                                                  "cannot create jump action.");
13254                         }
13255                         dev_flow->dv.actions[actions_n++] =
13256                                         dev_flow->dv.jump->action;
13257                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13258                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13259                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13260                         num_of_dest++;
13261                         break;
13262                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13263                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13264                         if (flow_dv_convert_action_modify_mac
13265                                         (mhdr_res, actions, error))
13266                                 return -rte_errno;
13267                         action_flags |= actions->type ==
13268                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13269                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
13270                                         MLX5_FLOW_ACTION_SET_MAC_DST;
13271                         break;
13272                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13273                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13274                         if (flow_dv_convert_action_modify_ipv4
13275                                         (mhdr_res, actions, error))
13276                                 return -rte_errno;
13277                         action_flags |= actions->type ==
13278                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13279                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13280                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13281                         break;
13282                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13283                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13284                         if (flow_dv_convert_action_modify_ipv6
13285                                         (mhdr_res, actions, error))
13286                                 return -rte_errno;
13287                         action_flags |= actions->type ==
13288                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13289                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13290                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13291                         break;
13292                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13293                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13294                         if (flow_dv_convert_action_modify_tp
13295                                         (mhdr_res, actions, items,
13296                                          &flow_attr, dev_flow, !!(action_flags &
13297                                          MLX5_FLOW_ACTION_DECAP), error))
13298                                 return -rte_errno;
13299                         action_flags |= actions->type ==
13300                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13301                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13302                                         MLX5_FLOW_ACTION_SET_TP_DST;
13303                         break;
13304                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13305                         if (flow_dv_convert_action_modify_dec_ttl
13306                                         (mhdr_res, items, &flow_attr, dev_flow,
13307                                          !!(action_flags &
13308                                          MLX5_FLOW_ACTION_DECAP), error))
13309                                 return -rte_errno;
13310                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13311                         break;
13312                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13313                         if (flow_dv_convert_action_modify_ttl
13314                                         (mhdr_res, actions, items, &flow_attr,
13315                                          dev_flow, !!(action_flags &
13316                                          MLX5_FLOW_ACTION_DECAP), error))
13317                                 return -rte_errno;
13318                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13319                         break;
13320                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13321                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13322                         if (flow_dv_convert_action_modify_tcp_seq
13323                                         (mhdr_res, actions, error))
13324                                 return -rte_errno;
13325                         action_flags |= actions->type ==
13326                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13327                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13328                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13329                         break;
13330
13331                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13332                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13333                         if (flow_dv_convert_action_modify_tcp_ack
13334                                         (mhdr_res, actions, error))
13335                                 return -rte_errno;
13336                         action_flags |= actions->type ==
13337                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13338                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13339                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13340                         break;
13341                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13342                         if (flow_dv_convert_action_set_reg
13343                                         (mhdr_res, actions, error))
13344                                 return -rte_errno;
13345                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13346                         break;
13347                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13348                         if (flow_dv_convert_action_copy_mreg
13349                                         (dev, mhdr_res, actions, error))
13350                                 return -rte_errno;
13351                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13352                         break;
13353                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13354                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13355                         dev_flow->handle->fate_action =
13356                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13357                         break;
13358                 case RTE_FLOW_ACTION_TYPE_METER:
13359                         if (!wks->fm)
13360                                 return rte_flow_error_set(error, rte_errno,
13361                                         RTE_FLOW_ERROR_TYPE_ACTION,
13362                                         NULL, "Failed to get meter in flow.");
13363                         /* Set the meter action. */
13364                         dev_flow->dv.actions[actions_n++] =
13365                                 wks->fm->meter_action;
13366                         action_flags |= MLX5_FLOW_ACTION_METER;
13367                         break;
13368                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13369                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13370                                                               actions, error))
13371                                 return -rte_errno;
13372                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13373                         break;
13374                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13375                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13376                                                               actions, error))
13377                                 return -rte_errno;
13378                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13379                         break;
13380                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13381                         sample_act_pos = actions_n;
13382                         sample = (const struct rte_flow_action_sample *)
13383                                  action->conf;
13384                         actions_n++;
13385                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13386                         /* put encap action into group if work with port id */
13387                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13388                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13389                                 sample_act->action_flags |=
13390                                                         MLX5_FLOW_ACTION_ENCAP;
13391                         break;
13392                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13393                         if (flow_dv_convert_action_modify_field
13394                                         (dev, mhdr_res, actions, attr, error))
13395                                 return -rte_errno;
13396                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13397                         break;
13398                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13399                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13400                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13401                         if (!ct)
13402                                 return rte_flow_error_set(error, EINVAL,
13403                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13404                                                 NULL,
13405                                                 "Failed to get CT object.");
13406                         if (mlx5_aso_ct_available(priv->sh, ct))
13407                                 return rte_flow_error_set(error, rte_errno,
13408                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13409                                                 NULL,
13410                                                 "CT is unavailable.");
13411                         if (ct->is_original)
13412                                 dev_flow->dv.actions[actions_n] =
13413                                                         ct->dr_action_orig;
13414                         else
13415                                 dev_flow->dv.actions[actions_n] =
13416                                                         ct->dr_action_rply;
13417                         if (flow->ct == 0) {
13418                                 flow->indirect_type =
13419                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13420                                 flow->ct = owner_idx;
13421                                 __atomic_fetch_add(&ct->refcnt, 1,
13422                                                    __ATOMIC_RELAXED);
13423                         }
13424                         actions_n++;
13425                         action_flags |= MLX5_FLOW_ACTION_CT;
13426                         break;
13427                 case RTE_FLOW_ACTION_TYPE_END:
13428                         actions_end = true;
13429                         if (mhdr_res->actions_num) {
13430                                 /* create modify action if needed. */
13431                                 if (flow_dv_modify_hdr_resource_register
13432                                         (dev, mhdr_res, dev_flow, error))
13433                                         return -rte_errno;
13434                                 dev_flow->dv.actions[modify_action_position] =
13435                                         handle->dvh.modify_hdr->action;
13436                         }
13437                         /*
13438                          * Handle AGE and COUNT action by single HW counter
13439                          * when they are not shared.
13440                          */
13441                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13442                                 if ((non_shared_age && count) ||
13443                                     !flow_hit_aso_supported(priv->sh, attr)) {
13444                                         /* Creates age by counters. */
13445                                         cnt_act = flow_dv_prepare_counter
13446                                                                 (dev, dev_flow,
13447                                                                  flow, count,
13448                                                                  non_shared_age,
13449                                                                  error);
13450                                         if (!cnt_act)
13451                                                 return -rte_errno;
13452                                         dev_flow->dv.actions[age_act_pos] =
13453                                                                 cnt_act->action;
13454                                         break;
13455                                 }
13456                                 if (!flow->age && non_shared_age) {
13457                                         flow->age = flow_dv_aso_age_alloc
13458                                                                 (dev, error);
13459                                         if (!flow->age)
13460                                                 return -rte_errno;
13461                                         flow_dv_aso_age_params_init
13462                                                     (dev, flow->age,
13463                                                      non_shared_age->context ?
13464                                                      non_shared_age->context :
13465                                                      (void *)(uintptr_t)
13466                                                      (dev_flow->flow_idx),
13467                                                      non_shared_age->timeout);
13468                                 }
13469                                 age_act = flow_aso_age_get_by_idx(dev,
13470                                                                   flow->age);
13471                                 dev_flow->dv.actions[age_act_pos] =
13472                                                              age_act->dr_action;
13473                         }
13474                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13475                                 /*
13476                                  * Create one count action, to be used
13477                                  * by all sub-flows.
13478                                  */
13479                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13480                                                                   flow, count,
13481                                                                   NULL, error);
13482                                 if (!cnt_act)
13483                                         return -rte_errno;
13484                                 dev_flow->dv.actions[actions_n++] =
13485                                                                 cnt_act->action;
13486                         }
13487                 default:
13488                         break;
13489                 }
13490                 if (mhdr_res->actions_num &&
13491                     modify_action_position == UINT32_MAX)
13492                         modify_action_position = actions_n++;
13493         }
13494         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13495                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13496                 int item_type = items->type;
13497
13498                 if (!mlx5_flow_os_item_supported(item_type))
13499                         return rte_flow_error_set(error, ENOTSUP,
13500                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13501                                                   NULL, "item not supported");
13502                 switch (item_type) {
13503                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13504                         flow_dv_translate_item_port_id
13505                                 (dev, match_mask, match_value, items, attr);
13506                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13507                         break;
13508                 case RTE_FLOW_ITEM_TYPE_ETH:
13509                         flow_dv_translate_item_eth(match_mask, match_value,
13510                                                    items, tunnel,
13511                                                    dev_flow->dv.group);
13512                         matcher.priority = action_flags &
13513                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13514                                         !dev_flow->external ?
13515                                         MLX5_PRIORITY_MAP_L3 :
13516                                         MLX5_PRIORITY_MAP_L2;
13517                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13518                                              MLX5_FLOW_LAYER_OUTER_L2;
13519                         break;
13520                 case RTE_FLOW_ITEM_TYPE_VLAN:
13521                         flow_dv_translate_item_vlan(dev_flow,
13522                                                     match_mask, match_value,
13523                                                     items, tunnel,
13524                                                     dev_flow->dv.group);
13525                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13526                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13527                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13528                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13529                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13530                         break;
13531                 case RTE_FLOW_ITEM_TYPE_IPV4:
13532                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13533                                                   &item_flags, &tunnel);
13534                         flow_dv_translate_item_ipv4(match_mask, match_value,
13535                                                     items, tunnel,
13536                                                     dev_flow->dv.group);
13537                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13538                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13539                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13540                         if (items->mask != NULL &&
13541                             ((const struct rte_flow_item_ipv4 *)
13542                              items->mask)->hdr.next_proto_id) {
13543                                 next_protocol =
13544                                         ((const struct rte_flow_item_ipv4 *)
13545                                          (items->spec))->hdr.next_proto_id;
13546                                 next_protocol &=
13547                                         ((const struct rte_flow_item_ipv4 *)
13548                                          (items->mask))->hdr.next_proto_id;
13549                         } else {
13550                                 /* Reset for inner layer. */
13551                                 next_protocol = 0xff;
13552                         }
13553                         break;
13554                 case RTE_FLOW_ITEM_TYPE_IPV6:
13555                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13556                                                   &item_flags, &tunnel);
13557                         flow_dv_translate_item_ipv6(match_mask, match_value,
13558                                                     items, tunnel,
13559                                                     dev_flow->dv.group);
13560                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13561                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13562                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13563                         if (items->mask != NULL &&
13564                             ((const struct rte_flow_item_ipv6 *)
13565                              items->mask)->hdr.proto) {
13566                                 next_protocol =
13567                                         ((const struct rte_flow_item_ipv6 *)
13568                                          items->spec)->hdr.proto;
13569                                 next_protocol &=
13570                                         ((const struct rte_flow_item_ipv6 *)
13571                                          items->mask)->hdr.proto;
13572                         } else {
13573                                 /* Reset for inner layer. */
13574                                 next_protocol = 0xff;
13575                         }
13576                         break;
13577                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13578                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13579                                                              match_value,
13580                                                              items, tunnel);
13581                         last_item = tunnel ?
13582                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13583                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13584                         if (items->mask != NULL &&
13585                             ((const struct rte_flow_item_ipv6_frag_ext *)
13586                              items->mask)->hdr.next_header) {
13587                                 next_protocol =
13588                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13589                                  items->spec)->hdr.next_header;
13590                                 next_protocol &=
13591                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13592                                  items->mask)->hdr.next_header;
13593                         } else {
13594                                 /* Reset for inner layer. */
13595                                 next_protocol = 0xff;
13596                         }
13597                         break;
13598                 case RTE_FLOW_ITEM_TYPE_TCP:
13599                         flow_dv_translate_item_tcp(match_mask, match_value,
13600                                                    items, tunnel);
13601                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13602                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13603                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13604                         break;
13605                 case RTE_FLOW_ITEM_TYPE_UDP:
13606                         flow_dv_translate_item_udp(match_mask, match_value,
13607                                                    items, tunnel);
13608                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13609                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13610                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13611                         break;
13612                 case RTE_FLOW_ITEM_TYPE_GRE:
13613                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13614                         last_item = MLX5_FLOW_LAYER_GRE;
13615                         tunnel_item = items;
13616                         gre_item = items;
13617                         break;
13618                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13619                         flow_dv_translate_item_gre_key(match_mask,
13620                                                        match_value, items);
13621                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13622                         break;
13623                 case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
13624                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13625                         last_item = MLX5_FLOW_LAYER_GRE;
13626                         tunnel_item = items;
13627                         break;
13628                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13629                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13630                         last_item = MLX5_FLOW_LAYER_GRE;
13631                         tunnel_item = items;
13632                         break;
13633                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13634                         flow_dv_translate_item_vxlan(dev, attr,
13635                                                      match_mask, match_value,
13636                                                      items, tunnel);
13637                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13638                         last_item = MLX5_FLOW_LAYER_VXLAN;
13639                         break;
13640                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13641                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13642                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13643                         tunnel_item = items;
13644                         break;
13645                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13646                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13647                         last_item = MLX5_FLOW_LAYER_GENEVE;
13648                         tunnel_item = items;
13649                         break;
13650                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13651                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13652                                                           match_value,
13653                                                           items, error);
13654                         if (ret)
13655                                 return rte_flow_error_set(error, -ret,
13656                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13657                                         "cannot create GENEVE TLV option");
13658                         flow->geneve_tlv_option = 1;
13659                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13660                         break;
13661                 case RTE_FLOW_ITEM_TYPE_MPLS:
13662                         flow_dv_translate_item_mpls(match_mask, match_value,
13663                                                     items, last_item, tunnel);
13664                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13665                         last_item = MLX5_FLOW_LAYER_MPLS;
13666                         break;
13667                 case RTE_FLOW_ITEM_TYPE_MARK:
13668                         flow_dv_translate_item_mark(dev, match_mask,
13669                                                     match_value, items);
13670                         last_item = MLX5_FLOW_ITEM_MARK;
13671                         break;
13672                 case RTE_FLOW_ITEM_TYPE_META:
13673                         flow_dv_translate_item_meta(dev, match_mask,
13674                                                     match_value, attr, items);
13675                         last_item = MLX5_FLOW_ITEM_METADATA;
13676                         break;
13677                 case RTE_FLOW_ITEM_TYPE_ICMP:
13678                         flow_dv_translate_item_icmp(match_mask, match_value,
13679                                                     items, tunnel);
13680                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13681                         last_item = MLX5_FLOW_LAYER_ICMP;
13682                         break;
13683                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13684                         flow_dv_translate_item_icmp6(match_mask, match_value,
13685                                                       items, tunnel);
13686                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13687                         last_item = MLX5_FLOW_LAYER_ICMP6;
13688                         break;
13689                 case RTE_FLOW_ITEM_TYPE_TAG:
13690                         flow_dv_translate_item_tag(dev, match_mask,
13691                                                    match_value, items);
13692                         last_item = MLX5_FLOW_ITEM_TAG;
13693                         break;
13694                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13695                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13696                                                         match_value, items);
13697                         last_item = MLX5_FLOW_ITEM_TAG;
13698                         break;
13699                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13700                         flow_dv_translate_item_tx_queue(dev, match_mask,
13701                                                         match_value,
13702                                                         items);
13703                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13704                         break;
13705                 case RTE_FLOW_ITEM_TYPE_GTP:
13706                         flow_dv_translate_item_gtp(match_mask, match_value,
13707                                                    items, tunnel);
13708                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13709                         last_item = MLX5_FLOW_LAYER_GTP;
13710                         break;
13711                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13712                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13713                                                           match_value,
13714                                                           items);
13715                         if (ret)
13716                                 return rte_flow_error_set(error, -ret,
13717                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13718                                         "cannot create GTP PSC item");
13719                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13720                         break;
13721                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13722                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13723                                 /* Create it only the first time to be used. */
13724                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13725                                 if (ret)
13726                                         return rte_flow_error_set
13727                                                 (error, -ret,
13728                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13729                                                 NULL,
13730                                                 "cannot create eCPRI parser");
13731                         }
13732                         flow_dv_translate_item_ecpri(dev, match_mask,
13733                                                      match_value, items,
13734                                                      last_item);
13735                         /* No other protocol should follow eCPRI layer. */
13736                         last_item = MLX5_FLOW_LAYER_ECPRI;
13737                         break;
13738                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13739                         flow_dv_translate_item_integrity(items, integrity_items,
13740                                                          &last_item);
13741                         break;
13742                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13743                         flow_dv_translate_item_aso_ct(dev, match_mask,
13744                                                       match_value, items);
13745                         break;
13746                 case RTE_FLOW_ITEM_TYPE_FLEX:
13747                         flow_dv_translate_item_flex(dev, match_mask,
13748                                                     match_value, items,
13749                                                     dev_flow, tunnel != 0);
13750                         last_item = tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
13751                                     MLX5_FLOW_ITEM_OUTER_FLEX;
13752                         break;
13753                 default:
13754                         break;
13755                 }
13756                 item_flags |= last_item;
13757         }
13758         /*
13759          * When E-Switch mode is enabled, we have two cases where we need to
13760          * set the source port manually.
13761          * The first one, is in case of Nic steering rule, and the second is
13762          * E-Switch rule where no port_id item was found. In both cases
13763          * the source port is set according the current port in use.
13764          */
13765         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode) {
13766                 if (flow_dv_translate_item_port_id(dev, match_mask,
13767                                                    match_value, NULL, attr))
13768                         return -rte_errno;
13769         }
13770         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13771                 flow_dv_translate_item_integrity_post(match_mask, match_value,
13772                                                       integrity_items,
13773                                                       item_flags);
13774         }
13775         if (item_flags & MLX5_FLOW_LAYER_VXLAN_GPE)
13776                 flow_dv_translate_item_vxlan_gpe(match_mask, match_value,
13777                                                  tunnel_item, item_flags);
13778         else if (item_flags & MLX5_FLOW_LAYER_GENEVE)
13779                 flow_dv_translate_item_geneve(match_mask, match_value,
13780                                               tunnel_item, item_flags);
13781         else if (item_flags & MLX5_FLOW_LAYER_GRE) {
13782                 if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE)
13783                         flow_dv_translate_item_gre(match_mask, match_value,
13784                                                    tunnel_item, item_flags);
13785                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_NVGRE)
13786                         flow_dv_translate_item_nvgre(match_mask, match_value,
13787                                                      tunnel_item, item_flags);
13788                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE_OPTION)
13789                         flow_dv_translate_item_gre_option(match_mask, match_value,
13790                                         tunnel_item, gre_item, item_flags);
13791                 else
13792                         MLX5_ASSERT(false);
13793         }
13794 #ifdef RTE_LIBRTE_MLX5_DEBUG
13795         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13796                                               dev_flow->dv.value.buf));
13797 #endif
13798         /*
13799          * Layers may be already initialized from prefix flow if this dev_flow
13800          * is the suffix flow.
13801          */
13802         handle->layers |= item_flags;
13803         if (action_flags & MLX5_FLOW_ACTION_RSS)
13804                 flow_dv_hashfields_set(dev_flow->handle->layers,
13805                                        rss_desc,
13806                                        &dev_flow->hash_fields);
13807         /* If has RSS action in the sample action, the Sample/Mirror resource
13808          * should be registered after the hash filed be update.
13809          */
13810         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13811                 ret = flow_dv_translate_action_sample(dev,
13812                                                       sample,
13813                                                       dev_flow, attr,
13814                                                       &num_of_dest,
13815                                                       sample_actions,
13816                                                       &sample_res,
13817                                                       error);
13818                 if (ret < 0)
13819                         return ret;
13820                 ret = flow_dv_create_action_sample(dev,
13821                                                    dev_flow,
13822                                                    num_of_dest,
13823                                                    &sample_res,
13824                                                    &mdest_res,
13825                                                    sample_actions,
13826                                                    action_flags,
13827                                                    error);
13828                 if (ret < 0)
13829                         return rte_flow_error_set
13830                                                 (error, rte_errno,
13831                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13832                                                 NULL,
13833                                                 "cannot create sample action");
13834                 if (num_of_dest > 1) {
13835                         dev_flow->dv.actions[sample_act_pos] =
13836                         dev_flow->dv.dest_array_res->action;
13837                 } else {
13838                         dev_flow->dv.actions[sample_act_pos] =
13839                         dev_flow->dv.sample_res->verbs_action;
13840                 }
13841         }
13842         /*
13843          * For multiple destination (sample action with ratio=1), the encap
13844          * action and port id action will be combined into group action.
13845          * So need remove the original these actions in the flow and only
13846          * use the sample action instead of.
13847          */
13848         if (num_of_dest > 1 &&
13849             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13850                 int i;
13851                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13852
13853                 for (i = 0; i < actions_n; i++) {
13854                         if ((sample_act->dr_encap_action &&
13855                                 sample_act->dr_encap_action ==
13856                                 dev_flow->dv.actions[i]) ||
13857                                 (sample_act->dr_port_id_action &&
13858                                 sample_act->dr_port_id_action ==
13859                                 dev_flow->dv.actions[i]) ||
13860                                 (sample_act->dr_jump_action &&
13861                                 sample_act->dr_jump_action ==
13862                                 dev_flow->dv.actions[i]))
13863                                 continue;
13864                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13865                 }
13866                 memcpy((void *)dev_flow->dv.actions,
13867                                 (void *)temp_actions,
13868                                 tmp_actions_n * sizeof(void *));
13869                 actions_n = tmp_actions_n;
13870         }
13871         dev_flow->dv.actions_n = actions_n;
13872         dev_flow->act_flags = action_flags;
13873         if (wks->skip_matcher_reg)
13874                 return 0;
13875         /* Register matcher. */
13876         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13877                                     matcher.mask.size);
13878         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13879                                                      matcher.priority,
13880                                                      dev_flow->external);
13881         /**
13882          * When creating meter drop flow in drop table, using original
13883          * 5-tuple match, the matcher priority should be lower than
13884          * mtr_id matcher.
13885          */
13886         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13887             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13888             matcher.priority <= MLX5_REG_BITS)
13889                 matcher.priority += MLX5_REG_BITS;
13890         /* reserved field no needs to be set to 0 here. */
13891         tbl_key.is_fdb = attr->transfer;
13892         tbl_key.is_egress = attr->egress;
13893         tbl_key.level = dev_flow->dv.group;
13894         tbl_key.id = dev_flow->dv.table_id;
13895         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13896                                      tunnel, attr->group, error))
13897                 return -rte_errno;
13898         return 0;
13899 }
13900
13901 /**
13902  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13903  * and tunnel.
13904  *
13905  * @param[in, out] action
13906  *   Shred RSS action holding hash RX queue objects.
13907  * @param[in] hash_fields
13908  *   Defines combination of packet fields to participate in RX hash.
13909  * @param[in] tunnel
13910  *   Tunnel type
13911  * @param[in] hrxq_idx
13912  *   Hash RX queue index to set.
13913  *
13914  * @return
13915  *   0 on success, otherwise negative errno value.
13916  */
13917 static int
13918 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13919                               const uint64_t hash_fields,
13920                               uint32_t hrxq_idx)
13921 {
13922         uint32_t *hrxqs = action->hrxq;
13923
13924         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13925         case MLX5_RSS_HASH_IPV4:
13926                 /* fall-through. */
13927         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13928                 /* fall-through. */
13929         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13930                 hrxqs[0] = hrxq_idx;
13931                 return 0;
13932         case MLX5_RSS_HASH_IPV4_TCP:
13933                 /* fall-through. */
13934         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13935                 /* fall-through. */
13936         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13937                 hrxqs[1] = hrxq_idx;
13938                 return 0;
13939         case MLX5_RSS_HASH_IPV4_UDP:
13940                 /* fall-through. */
13941         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13942                 /* fall-through. */
13943         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13944                 hrxqs[2] = hrxq_idx;
13945                 return 0;
13946         case MLX5_RSS_HASH_IPV6:
13947                 /* fall-through. */
13948         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13949                 /* fall-through. */
13950         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13951                 hrxqs[3] = hrxq_idx;
13952                 return 0;
13953         case MLX5_RSS_HASH_IPV6_TCP:
13954                 /* fall-through. */
13955         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13956                 /* fall-through. */
13957         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13958                 hrxqs[4] = hrxq_idx;
13959                 return 0;
13960         case MLX5_RSS_HASH_IPV6_UDP:
13961                 /* fall-through. */
13962         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13963                 /* fall-through. */
13964         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13965                 hrxqs[5] = hrxq_idx;
13966                 return 0;
13967         case MLX5_RSS_HASH_NONE:
13968                 hrxqs[6] = hrxq_idx;
13969                 return 0;
13970         default:
13971                 return -1;
13972         }
13973 }
13974
13975 /**
13976  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13977  * and tunnel.
13978  *
13979  * @param[in] dev
13980  *   Pointer to the Ethernet device structure.
13981  * @param[in] idx
13982  *   Shared RSS action ID holding hash RX queue objects.
13983  * @param[in] hash_fields
13984  *   Defines combination of packet fields to participate in RX hash.
13985  * @param[in] tunnel
13986  *   Tunnel type
13987  *
13988  * @return
13989  *   Valid hash RX queue index, otherwise 0.
13990  */
13991 uint32_t
13992 flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13993                                const uint64_t hash_fields)
13994 {
13995         struct mlx5_priv *priv = dev->data->dev_private;
13996         struct mlx5_shared_action_rss *shared_rss =
13997             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13998         const uint32_t *hrxqs = shared_rss->hrxq;
13999
14000         switch (hash_fields & ~IBV_RX_HASH_INNER) {
14001         case MLX5_RSS_HASH_IPV4:
14002                 /* fall-through. */
14003         case MLX5_RSS_HASH_IPV4_DST_ONLY:
14004                 /* fall-through. */
14005         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
14006                 return hrxqs[0];
14007         case MLX5_RSS_HASH_IPV4_TCP:
14008                 /* fall-through. */
14009         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
14010                 /* fall-through. */
14011         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
14012                 return hrxqs[1];
14013         case MLX5_RSS_HASH_IPV4_UDP:
14014                 /* fall-through. */
14015         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
14016                 /* fall-through. */
14017         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
14018                 return hrxqs[2];
14019         case MLX5_RSS_HASH_IPV6:
14020                 /* fall-through. */
14021         case MLX5_RSS_HASH_IPV6_DST_ONLY:
14022                 /* fall-through. */
14023         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
14024                 return hrxqs[3];
14025         case MLX5_RSS_HASH_IPV6_TCP:
14026                 /* fall-through. */
14027         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
14028                 /* fall-through. */
14029         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
14030                 return hrxqs[4];
14031         case MLX5_RSS_HASH_IPV6_UDP:
14032                 /* fall-through. */
14033         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
14034                 /* fall-through. */
14035         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
14036                 return hrxqs[5];
14037         case MLX5_RSS_HASH_NONE:
14038                 return hrxqs[6];
14039         default:
14040                 return 0;
14041         }
14042
14043 }
14044
14045 /**
14046  * Apply the flow to the NIC, lock free,
14047  * (mutex should be acquired by caller).
14048  *
14049  * @param[in] dev
14050  *   Pointer to the Ethernet device structure.
14051  * @param[in, out] flow
14052  *   Pointer to flow structure.
14053  * @param[out] error
14054  *   Pointer to error structure.
14055  *
14056  * @return
14057  *   0 on success, a negative errno value otherwise and rte_errno is set.
14058  */
14059 static int
14060 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
14061               struct rte_flow_error *error)
14062 {
14063         struct mlx5_flow_dv_workspace *dv;
14064         struct mlx5_flow_handle *dh;
14065         struct mlx5_flow_handle_dv *dv_h;
14066         struct mlx5_flow *dev_flow;
14067         struct mlx5_priv *priv = dev->data->dev_private;
14068         uint32_t handle_idx;
14069         int n;
14070         int err;
14071         int idx;
14072         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
14073         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
14074         uint8_t misc_mask;
14075
14076         MLX5_ASSERT(wks);
14077         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
14078                 dev_flow = &wks->flows[idx];
14079                 dv = &dev_flow->dv;
14080                 dh = dev_flow->handle;
14081                 dv_h = &dh->dvh;
14082                 n = dv->actions_n;
14083                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
14084                         if (dv->transfer) {
14085                                 MLX5_ASSERT(priv->sh->dr_drop_action);
14086                                 dv->actions[n++] = priv->sh->dr_drop_action;
14087                         } else {
14088 #ifdef HAVE_MLX5DV_DR
14089                                 /* DR supports drop action placeholder. */
14090                                 MLX5_ASSERT(priv->sh->dr_drop_action);
14091                                 dv->actions[n++] = dv->group ?
14092                                         priv->sh->dr_drop_action :
14093                                         priv->root_drop_action;
14094 #else
14095                                 /* For DV we use the explicit drop queue. */
14096                                 MLX5_ASSERT(priv->drop_queue.hrxq);
14097                                 dv->actions[n++] =
14098                                                 priv->drop_queue.hrxq->action;
14099 #endif
14100                         }
14101                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
14102                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
14103                         struct mlx5_hrxq *hrxq;
14104                         uint32_t hrxq_idx;
14105
14106                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
14107                                                     &hrxq_idx);
14108                         if (!hrxq) {
14109                                 rte_flow_error_set
14110                                         (error, rte_errno,
14111                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14112                                          "cannot get hash queue");
14113                                 goto error;
14114                         }
14115                         dh->rix_hrxq = hrxq_idx;
14116                         dv->actions[n++] = hrxq->action;
14117                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14118                         struct mlx5_hrxq *hrxq = NULL;
14119                         uint32_t hrxq_idx;
14120
14121                         hrxq_idx = flow_dv_action_rss_hrxq_lookup(dev,
14122                                                 rss_desc->shared_rss,
14123                                                 dev_flow->hash_fields);
14124                         if (hrxq_idx)
14125                                 hrxq = mlx5_ipool_get
14126                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
14127                                          hrxq_idx);
14128                         if (!hrxq) {
14129                                 rte_flow_error_set
14130                                         (error, rte_errno,
14131                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14132                                          "cannot get hash queue");
14133                                 goto error;
14134                         }
14135                         dh->rix_srss = rss_desc->shared_rss;
14136                         dv->actions[n++] = hrxq->action;
14137                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
14138                         if (!priv->sh->default_miss_action) {
14139                                 rte_flow_error_set
14140                                         (error, rte_errno,
14141                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14142                                          "default miss action not be created.");
14143                                 goto error;
14144                         }
14145                         dv->actions[n++] = priv->sh->default_miss_action;
14146                 }
14147                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
14148                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
14149                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
14150                                                (void *)&dv->value, n,
14151                                                dv->actions, &dh->drv_flow);
14152                 if (err) {
14153                         rte_flow_error_set
14154                                 (error, errno,
14155                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14156                                 NULL,
14157                                 (!priv->sh->config.allow_duplicate_pattern &&
14158                                 errno == EEXIST) ?
14159                                 "duplicating pattern is not allowed" :
14160                                 "hardware refuses to create flow");
14161                         goto error;
14162                 }
14163                 if (priv->vmwa_context &&
14164                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
14165                         /*
14166                          * The rule contains the VLAN pattern.
14167                          * For VF we are going to create VLAN
14168                          * interface to make hypervisor set correct
14169                          * e-Switch vport context.
14170                          */
14171                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
14172                 }
14173         }
14174         return 0;
14175 error:
14176         err = rte_errno; /* Save rte_errno before cleanup. */
14177         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
14178                        handle_idx, dh, next) {
14179                 /* hrxq is union, don't clear it if the flag is not set. */
14180                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
14181                         mlx5_hrxq_release(dev, dh->rix_hrxq);
14182                         dh->rix_hrxq = 0;
14183                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14184                         dh->rix_srss = 0;
14185                 }
14186                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14187                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14188         }
14189         rte_errno = err; /* Restore rte_errno. */
14190         return -rte_errno;
14191 }
14192
14193 void
14194 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
14195                           struct mlx5_list_entry *entry)
14196 {
14197         struct mlx5_flow_dv_matcher *resource = container_of(entry,
14198                                                              typeof(*resource),
14199                                                              entry);
14200
14201         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
14202         mlx5_free(resource);
14203 }
14204
14205 /**
14206  * Release the flow matcher.
14207  *
14208  * @param dev
14209  *   Pointer to Ethernet device.
14210  * @param port_id
14211  *   Index to port ID action resource.
14212  *
14213  * @return
14214  *   1 while a reference on it exists, 0 when freed.
14215  */
14216 static int
14217 flow_dv_matcher_release(struct rte_eth_dev *dev,
14218                         struct mlx5_flow_handle *handle)
14219 {
14220         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
14221         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
14222                                                             typeof(*tbl), tbl);
14223         int ret;
14224
14225         MLX5_ASSERT(matcher->matcher_object);
14226         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
14227         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
14228         return ret;
14229 }
14230
14231 void
14232 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14233 {
14234         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14235         struct mlx5_flow_dv_encap_decap_resource *res =
14236                                        container_of(entry, typeof(*res), entry);
14237
14238         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14239         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
14240 }
14241
14242 /**
14243  * Release an encap/decap resource.
14244  *
14245  * @param dev
14246  *   Pointer to Ethernet device.
14247  * @param encap_decap_idx
14248  *   Index of encap decap resource.
14249  *
14250  * @return
14251  *   1 while a reference on it exists, 0 when freed.
14252  */
14253 static int
14254 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
14255                                      uint32_t encap_decap_idx)
14256 {
14257         struct mlx5_priv *priv = dev->data->dev_private;
14258         struct mlx5_flow_dv_encap_decap_resource *resource;
14259
14260         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
14261                                   encap_decap_idx);
14262         if (!resource)
14263                 return 0;
14264         MLX5_ASSERT(resource->action);
14265         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
14266 }
14267
14268 /**
14269  * Release an jump to table action resource.
14270  *
14271  * @param dev
14272  *   Pointer to Ethernet device.
14273  * @param rix_jump
14274  *   Index to the jump action resource.
14275  *
14276  * @return
14277  *   1 while a reference on it exists, 0 when freed.
14278  */
14279 static int
14280 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
14281                                   uint32_t rix_jump)
14282 {
14283         struct mlx5_priv *priv = dev->data->dev_private;
14284         struct mlx5_flow_tbl_data_entry *tbl_data;
14285
14286         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
14287                                   rix_jump);
14288         if (!tbl_data)
14289                 return 0;
14290         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14291 }
14292
14293 void
14294 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14295 {
14296         struct mlx5_flow_dv_modify_hdr_resource *res =
14297                 container_of(entry, typeof(*res), entry);
14298         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14299
14300         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14301         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14302 }
14303
14304 /**
14305  * Release a modify-header resource.
14306  *
14307  * @param dev
14308  *   Pointer to Ethernet device.
14309  * @param handle
14310  *   Pointer to mlx5_flow_handle.
14311  *
14312  * @return
14313  *   1 while a reference on it exists, 0 when freed.
14314  */
14315 static int
14316 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14317                                     struct mlx5_flow_handle *handle)
14318 {
14319         struct mlx5_priv *priv = dev->data->dev_private;
14320         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14321
14322         MLX5_ASSERT(entry->action);
14323         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14324 }
14325
14326 void
14327 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14328 {
14329         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14330         struct mlx5_flow_dv_port_id_action_resource *resource =
14331                                   container_of(entry, typeof(*resource), entry);
14332
14333         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14334         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14335 }
14336
14337 /**
14338  * Release port ID action resource.
14339  *
14340  * @param dev
14341  *   Pointer to Ethernet device.
14342  * @param handle
14343  *   Pointer to mlx5_flow_handle.
14344  *
14345  * @return
14346  *   1 while a reference on it exists, 0 when freed.
14347  */
14348 static int
14349 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14350                                         uint32_t port_id)
14351 {
14352         struct mlx5_priv *priv = dev->data->dev_private;
14353         struct mlx5_flow_dv_port_id_action_resource *resource;
14354
14355         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14356         if (!resource)
14357                 return 0;
14358         MLX5_ASSERT(resource->action);
14359         return mlx5_list_unregister(priv->sh->port_id_action_list,
14360                                     &resource->entry);
14361 }
14362
14363 /**
14364  * Release shared RSS action resource.
14365  *
14366  * @param dev
14367  *   Pointer to Ethernet device.
14368  * @param srss
14369  *   Shared RSS action index.
14370  */
14371 static void
14372 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14373 {
14374         struct mlx5_priv *priv = dev->data->dev_private;
14375         struct mlx5_shared_action_rss *shared_rss;
14376
14377         shared_rss = mlx5_ipool_get
14378                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14379         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14380 }
14381
14382 void
14383 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14384 {
14385         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14386         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14387                         container_of(entry, typeof(*resource), entry);
14388
14389         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14390         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14391 }
14392
14393 /**
14394  * Release push vlan action resource.
14395  *
14396  * @param dev
14397  *   Pointer to Ethernet device.
14398  * @param handle
14399  *   Pointer to mlx5_flow_handle.
14400  *
14401  * @return
14402  *   1 while a reference on it exists, 0 when freed.
14403  */
14404 static int
14405 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14406                                           struct mlx5_flow_handle *handle)
14407 {
14408         struct mlx5_priv *priv = dev->data->dev_private;
14409         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14410         uint32_t idx = handle->dvh.rix_push_vlan;
14411
14412         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14413         if (!resource)
14414                 return 0;
14415         MLX5_ASSERT(resource->action);
14416         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14417                                     &resource->entry);
14418 }
14419
14420 /**
14421  * Release the fate resource.
14422  *
14423  * @param dev
14424  *   Pointer to Ethernet device.
14425  * @param handle
14426  *   Pointer to mlx5_flow_handle.
14427  */
14428 static void
14429 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14430                                struct mlx5_flow_handle *handle)
14431 {
14432         if (!handle->rix_fate)
14433                 return;
14434         switch (handle->fate_action) {
14435         case MLX5_FLOW_FATE_QUEUE:
14436                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14437                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14438                 break;
14439         case MLX5_FLOW_FATE_JUMP:
14440                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14441                 break;
14442         case MLX5_FLOW_FATE_PORT_ID:
14443                 flow_dv_port_id_action_resource_release(dev,
14444                                 handle->rix_port_id_action);
14445                 break;
14446         default:
14447                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14448                 break;
14449         }
14450         handle->rix_fate = 0;
14451 }
14452
14453 void
14454 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14455                          struct mlx5_list_entry *entry)
14456 {
14457         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14458                                                               typeof(*resource),
14459                                                               entry);
14460         struct rte_eth_dev *dev = resource->dev;
14461         struct mlx5_priv *priv = dev->data->dev_private;
14462
14463         if (resource->verbs_action)
14464                 claim_zero(mlx5_flow_os_destroy_flow_action
14465                                                       (resource->verbs_action));
14466         if (resource->normal_path_tbl)
14467                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14468                                              resource->normal_path_tbl);
14469         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14470         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14471         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14472 }
14473
14474 /**
14475  * Release an sample resource.
14476  *
14477  * @param dev
14478  *   Pointer to Ethernet device.
14479  * @param handle
14480  *   Pointer to mlx5_flow_handle.
14481  *
14482  * @return
14483  *   1 while a reference on it exists, 0 when freed.
14484  */
14485 static int
14486 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14487                                      struct mlx5_flow_handle *handle)
14488 {
14489         struct mlx5_priv *priv = dev->data->dev_private;
14490         struct mlx5_flow_dv_sample_resource *resource;
14491
14492         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14493                                   handle->dvh.rix_sample);
14494         if (!resource)
14495                 return 0;
14496         MLX5_ASSERT(resource->verbs_action);
14497         return mlx5_list_unregister(priv->sh->sample_action_list,
14498                                     &resource->entry);
14499 }
14500
14501 void
14502 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14503                              struct mlx5_list_entry *entry)
14504 {
14505         struct mlx5_flow_dv_dest_array_resource *resource =
14506                         container_of(entry, typeof(*resource), entry);
14507         struct rte_eth_dev *dev = resource->dev;
14508         struct mlx5_priv *priv = dev->data->dev_private;
14509         uint32_t i = 0;
14510
14511         MLX5_ASSERT(resource->action);
14512         if (resource->action)
14513                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14514         for (; i < resource->num_of_dest; i++)
14515                 flow_dv_sample_sub_actions_release(dev,
14516                                                    &resource->sample_idx[i]);
14517         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14518         DRV_LOG(DEBUG, "destination array resource %p: removed",
14519                 (void *)resource);
14520 }
14521
14522 /**
14523  * Release an destination array resource.
14524  *
14525  * @param dev
14526  *   Pointer to Ethernet device.
14527  * @param handle
14528  *   Pointer to mlx5_flow_handle.
14529  *
14530  * @return
14531  *   1 while a reference on it exists, 0 when freed.
14532  */
14533 static int
14534 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14535                                     struct mlx5_flow_handle *handle)
14536 {
14537         struct mlx5_priv *priv = dev->data->dev_private;
14538         struct mlx5_flow_dv_dest_array_resource *resource;
14539
14540         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14541                                   handle->dvh.rix_dest_array);
14542         if (!resource)
14543                 return 0;
14544         MLX5_ASSERT(resource->action);
14545         return mlx5_list_unregister(priv->sh->dest_array_list,
14546                                     &resource->entry);
14547 }
14548
14549 static void
14550 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14551 {
14552         struct mlx5_priv *priv = dev->data->dev_private;
14553         struct mlx5_dev_ctx_shared *sh = priv->sh;
14554         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14555                                 sh->geneve_tlv_option_resource;
14556         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14557         if (geneve_opt_resource) {
14558                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14559                                          __ATOMIC_RELAXED))) {
14560                         claim_zero(mlx5_devx_cmd_destroy
14561                                         (geneve_opt_resource->obj));
14562                         mlx5_free(sh->geneve_tlv_option_resource);
14563                         sh->geneve_tlv_option_resource = NULL;
14564                 }
14565         }
14566         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14567 }
14568
14569 /**
14570  * Remove the flow from the NIC but keeps it in memory.
14571  * Lock free, (mutex should be acquired by caller).
14572  *
14573  * @param[in] dev
14574  *   Pointer to Ethernet device.
14575  * @param[in, out] flow
14576  *   Pointer to flow structure.
14577  */
14578 static void
14579 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14580 {
14581         struct mlx5_flow_handle *dh;
14582         uint32_t handle_idx;
14583         struct mlx5_priv *priv = dev->data->dev_private;
14584
14585         if (!flow)
14586                 return;
14587         handle_idx = flow->dev_handles;
14588         while (handle_idx) {
14589                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14590                                     handle_idx);
14591                 if (!dh)
14592                         return;
14593                 if (dh->drv_flow) {
14594                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14595                         dh->drv_flow = NULL;
14596                 }
14597                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14598                         flow_dv_fate_resource_release(dev, dh);
14599                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14600                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14601                 handle_idx = dh->next.next;
14602         }
14603 }
14604
14605 /**
14606  * Remove the flow from the NIC and the memory.
14607  * Lock free, (mutex should be acquired by caller).
14608  *
14609  * @param[in] dev
14610  *   Pointer to the Ethernet device structure.
14611  * @param[in, out] flow
14612  *   Pointer to flow structure.
14613  */
14614 static void
14615 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14616 {
14617         struct mlx5_flow_handle *dev_handle;
14618         struct mlx5_priv *priv = dev->data->dev_private;
14619         struct mlx5_flow_meter_info *fm = NULL;
14620         uint32_t srss = 0;
14621
14622         if (!flow)
14623                 return;
14624         flow_dv_remove(dev, flow);
14625         if (flow->counter) {
14626                 flow_dv_counter_free(dev, flow->counter);
14627                 flow->counter = 0;
14628         }
14629         if (flow->meter) {
14630                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14631                 if (fm)
14632                         mlx5_flow_meter_detach(priv, fm);
14633                 flow->meter = 0;
14634         }
14635         /* Keep the current age handling by default. */
14636         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14637                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14638         else if (flow->age)
14639                 flow_dv_aso_age_release(dev, flow->age);
14640         if (flow->geneve_tlv_option) {
14641                 flow_dv_geneve_tlv_option_resource_release(dev);
14642                 flow->geneve_tlv_option = 0;
14643         }
14644         while (flow->dev_handles) {
14645                 uint32_t tmp_idx = flow->dev_handles;
14646
14647                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14648                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14649                 if (!dev_handle)
14650                         return;
14651                 flow->dev_handles = dev_handle->next.next;
14652                 while (dev_handle->flex_item) {
14653                         int index = rte_bsf32(dev_handle->flex_item);
14654
14655                         mlx5_flex_release_index(dev, index);
14656                         dev_handle->flex_item &= ~(uint8_t)RTE_BIT32(index);
14657                 }
14658                 if (dev_handle->dvh.matcher)
14659                         flow_dv_matcher_release(dev, dev_handle);
14660                 if (dev_handle->dvh.rix_sample)
14661                         flow_dv_sample_resource_release(dev, dev_handle);
14662                 if (dev_handle->dvh.rix_dest_array)
14663                         flow_dv_dest_array_resource_release(dev, dev_handle);
14664                 if (dev_handle->dvh.rix_encap_decap)
14665                         flow_dv_encap_decap_resource_release(dev,
14666                                 dev_handle->dvh.rix_encap_decap);
14667                 if (dev_handle->dvh.modify_hdr)
14668                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14669                 if (dev_handle->dvh.rix_push_vlan)
14670                         flow_dv_push_vlan_action_resource_release(dev,
14671                                                                   dev_handle);
14672                 if (dev_handle->dvh.rix_tag)
14673                         flow_dv_tag_release(dev,
14674                                             dev_handle->dvh.rix_tag);
14675                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14676                         flow_dv_fate_resource_release(dev, dev_handle);
14677                 else if (!srss)
14678                         srss = dev_handle->rix_srss;
14679                 if (fm && dev_handle->is_meter_flow_id &&
14680                     dev_handle->split_flow_id)
14681                         mlx5_ipool_free(fm->flow_ipool,
14682                                         dev_handle->split_flow_id);
14683                 else if (dev_handle->split_flow_id &&
14684                     !dev_handle->is_meter_flow_id)
14685                         mlx5_ipool_free(priv->sh->ipool
14686                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14687                                         dev_handle->split_flow_id);
14688                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14689                            tmp_idx);
14690         }
14691         if (srss)
14692                 flow_dv_shared_rss_action_release(dev, srss);
14693 }
14694
14695 /**
14696  * Release array of hash RX queue objects.
14697  * Helper function.
14698  *
14699  * @param[in] dev
14700  *   Pointer to the Ethernet device structure.
14701  * @param[in, out] hrxqs
14702  *   Array of hash RX queue objects.
14703  *
14704  * @return
14705  *   Total number of references to hash RX queue objects in *hrxqs* array
14706  *   after this operation.
14707  */
14708 static int
14709 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14710                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14711 {
14712         size_t i;
14713         int remaining = 0;
14714
14715         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14716                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14717
14718                 if (!ret)
14719                         (*hrxqs)[i] = 0;
14720                 remaining += ret;
14721         }
14722         return remaining;
14723 }
14724
14725 /**
14726  * Release all hash RX queue objects representing shared RSS action.
14727  *
14728  * @param[in] dev
14729  *   Pointer to the Ethernet device structure.
14730  * @param[in, out] action
14731  *   Shared RSS action to remove hash RX queue objects from.
14732  *
14733  * @return
14734  *   Total number of references to hash RX queue objects stored in *action*
14735  *   after this operation.
14736  *   Expected to be 0 if no external references held.
14737  */
14738 static int
14739 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14740                                  struct mlx5_shared_action_rss *shared_rss)
14741 {
14742         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14743 }
14744
14745 /**
14746  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14747  * user input.
14748  *
14749  * Only one hash value is available for one L3+L4 combination:
14750  * for example:
14751  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14752  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14753  * same slot in mlx5_rss_hash_fields.
14754  *
14755  * @param[in] rss_types
14756  *   RSS type.
14757  * @param[in, out] hash_field
14758  *   hash_field variable needed to be adjusted.
14759  *
14760  * @return
14761  *   void
14762  */
14763 void
14764 flow_dv_action_rss_l34_hash_adjust(uint64_t rss_types,
14765                                    uint64_t *hash_field)
14766 {
14767         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14768         case MLX5_RSS_HASH_IPV4:
14769                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14770                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14771                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14772                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14773                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14774                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14775                         else
14776                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14777                 }
14778                 return;
14779         case MLX5_RSS_HASH_IPV6:
14780                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14781                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14782                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14783                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14784                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14785                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14786                         else
14787                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14788                 }
14789                 return;
14790         case MLX5_RSS_HASH_IPV4_UDP:
14791                 /* fall-through. */
14792         case MLX5_RSS_HASH_IPV6_UDP:
14793                 if (rss_types & RTE_ETH_RSS_UDP) {
14794                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14795                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14796                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14797                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14798                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14799                         else
14800                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14801                 }
14802                 return;
14803         case MLX5_RSS_HASH_IPV4_TCP:
14804                 /* fall-through. */
14805         case MLX5_RSS_HASH_IPV6_TCP:
14806                 if (rss_types & RTE_ETH_RSS_TCP) {
14807                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14808                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14809                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14810                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14811                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14812                         else
14813                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14814                 }
14815                 return;
14816         default:
14817                 return;
14818         }
14819 }
14820
14821 /**
14822  * Setup shared RSS action.
14823  * Prepare set of hash RX queue objects sufficient to handle all valid
14824  * hash_fields combinations (see enum ibv_rx_hash_fields).
14825  *
14826  * @param[in] dev
14827  *   Pointer to the Ethernet device structure.
14828  * @param[in] action_idx
14829  *   Shared RSS action ipool index.
14830  * @param[in, out] action
14831  *   Partially initialized shared RSS action.
14832  * @param[out] error
14833  *   Perform verbose error reporting if not NULL. Initialized in case of
14834  *   error only.
14835  *
14836  * @return
14837  *   0 on success, otherwise negative errno value.
14838  */
14839 static int
14840 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14841                            uint32_t action_idx,
14842                            struct mlx5_shared_action_rss *shared_rss,
14843                            struct rte_flow_error *error)
14844 {
14845         struct mlx5_priv *priv = dev->data->dev_private;
14846         struct mlx5_flow_rss_desc rss_desc = { 0 };
14847         size_t i;
14848         int err;
14849
14850         shared_rss->ind_tbl = mlx5_ind_table_obj_new
14851                               (dev, shared_rss->origin.queue,
14852                                shared_rss->origin.queue_num,
14853                                true,
14854                                !!dev->data->dev_started);
14855         if (!shared_rss->ind_tbl)
14856                 return rte_flow_error_set(error, rte_errno,
14857                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14858                                           "cannot setup indirection table");
14859         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14860         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14861         rss_desc.const_q = shared_rss->origin.queue;
14862         rss_desc.queue_num = shared_rss->origin.queue_num;
14863         /* Set non-zero value to indicate a shared RSS. */
14864         rss_desc.shared_rss = action_idx;
14865         rss_desc.ind_tbl = shared_rss->ind_tbl;
14866         if (priv->sh->config.dv_flow_en == 2)
14867                 rss_desc.hws_flags = MLX5DR_ACTION_FLAG_HWS_RX;
14868         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14869                 struct mlx5_hrxq *hrxq;
14870                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14871                 int tunnel = 0;
14872
14873                 flow_dv_action_rss_l34_hash_adjust(shared_rss->origin.types,
14874                                                    &hash_fields);
14875                 if (shared_rss->origin.level > 1) {
14876                         hash_fields |= IBV_RX_HASH_INNER;
14877                         tunnel = 1;
14878                 }
14879                 rss_desc.tunnel = tunnel;
14880                 rss_desc.hash_fields = hash_fields;
14881                 hrxq = mlx5_hrxq_get(dev, &rss_desc);
14882                 if (!hrxq) {
14883                         rte_flow_error_set
14884                                 (error, rte_errno,
14885                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14886                                  "cannot get hash queue");
14887                         goto error_hrxq_new;
14888                 }
14889                 err = __flow_dv_action_rss_hrxq_set
14890                         (shared_rss, hash_fields, hrxq->idx);
14891                 MLX5_ASSERT(!err);
14892         }
14893         return 0;
14894 error_hrxq_new:
14895         err = rte_errno;
14896         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14897         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14898                 shared_rss->ind_tbl = NULL;
14899         rte_errno = err;
14900         return -rte_errno;
14901 }
14902
14903 /**
14904  * Create shared RSS action.
14905  *
14906  * @param[in] dev
14907  *   Pointer to the Ethernet device structure.
14908  * @param[in] conf
14909  *   Shared action configuration.
14910  * @param[in] rss
14911  *   RSS action specification used to create shared action.
14912  * @param[out] error
14913  *   Perform verbose error reporting if not NULL. Initialized in case of
14914  *   error only.
14915  *
14916  * @return
14917  *   A valid shared action ID in case of success, 0 otherwise and
14918  *   rte_errno is set.
14919  */
14920 static uint32_t
14921 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14922                             const struct rte_flow_indir_action_conf *conf,
14923                             const struct rte_flow_action_rss *rss,
14924                             struct rte_flow_error *error)
14925 {
14926         struct mlx5_priv *priv = dev->data->dev_private;
14927         struct mlx5_shared_action_rss *shared_rss = NULL;
14928         struct rte_flow_action_rss *origin;
14929         const uint8_t *rss_key;
14930         uint32_t idx;
14931
14932         RTE_SET_USED(conf);
14933         shared_rss = mlx5_ipool_zmalloc
14934                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14935         if (!shared_rss) {
14936                 rte_flow_error_set(error, ENOMEM,
14937                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14938                                    "cannot allocate resource memory");
14939                 goto error_rss_init;
14940         }
14941         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14942                 rte_flow_error_set(error, E2BIG,
14943                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14944                                    "rss action number out of range");
14945                 goto error_rss_init;
14946         }
14947         origin = &shared_rss->origin;
14948         origin->func = rss->func;
14949         origin->level = rss->level;
14950         /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14951         origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14952         /* NULL RSS key indicates default RSS key. */
14953         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14954         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14955         origin->key = &shared_rss->key[0];
14956         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14957         origin->queue = rss->queue;
14958         origin->queue_num = rss->queue_num;
14959         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14960                 goto error_rss_init;
14961         /* Update queue with indirect table queue memoyr. */
14962         origin->queue = shared_rss->ind_tbl->queues;
14963         rte_spinlock_init(&shared_rss->action_rss_sl);
14964         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14965         rte_spinlock_lock(&priv->shared_act_sl);
14966         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14967                      &priv->rss_shared_actions, idx, shared_rss, next);
14968         rte_spinlock_unlock(&priv->shared_act_sl);
14969         return idx;
14970 error_rss_init:
14971         if (shared_rss) {
14972                 if (shared_rss->ind_tbl)
14973                         mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl,
14974                                                    !!dev->data->dev_started);
14975                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14976                                 idx);
14977         }
14978         return 0;
14979 }
14980
14981 /**
14982  * Destroy the shared RSS action.
14983  * Release related hash RX queue objects.
14984  *
14985  * @param[in] dev
14986  *   Pointer to the Ethernet device structure.
14987  * @param[in] idx
14988  *   The shared RSS action object ID to be removed.
14989  * @param[out] error
14990  *   Perform verbose error reporting if not NULL. Initialized in case of
14991  *   error only.
14992  *
14993  * @return
14994  *   0 on success, otherwise negative errno value.
14995  */
14996 static int
14997 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14998                              struct rte_flow_error *error)
14999 {
15000         struct mlx5_priv *priv = dev->data->dev_private;
15001         struct mlx5_shared_action_rss *shared_rss =
15002             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15003         uint32_t old_refcnt = 1;
15004         int remaining;
15005
15006         if (!shared_rss)
15007                 return rte_flow_error_set(error, EINVAL,
15008                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15009                                           "invalid shared action");
15010         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
15011                                          0, 0, __ATOMIC_ACQUIRE,
15012                                          __ATOMIC_RELAXED))
15013                 return rte_flow_error_set(error, EBUSY,
15014                                           RTE_FLOW_ERROR_TYPE_ACTION,
15015                                           NULL,
15016                                           "shared rss has references");
15017         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
15018         if (remaining)
15019                 return rte_flow_error_set(error, EBUSY,
15020                                           RTE_FLOW_ERROR_TYPE_ACTION,
15021                                           NULL,
15022                                           "shared rss hrxq has references");
15023         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl,
15024                                                !!dev->data->dev_started);
15025         if (remaining)
15026                 return rte_flow_error_set(error, EBUSY,
15027                                           RTE_FLOW_ERROR_TYPE_ACTION,
15028                                           NULL,
15029                                           "shared rss indirection table has"
15030                                           " references");
15031         rte_spinlock_lock(&priv->shared_act_sl);
15032         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15033                      &priv->rss_shared_actions, idx, shared_rss, next);
15034         rte_spinlock_unlock(&priv->shared_act_sl);
15035         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15036                         idx);
15037         return 0;
15038 }
15039
15040 /**
15041  * Create indirect action, lock free,
15042  * (mutex should be acquired by caller).
15043  * Dispatcher for action type specific call.
15044  *
15045  * @param[in] dev
15046  *   Pointer to the Ethernet device structure.
15047  * @param[in] conf
15048  *   Shared action configuration.
15049  * @param[in] action
15050  *   Action specification used to create indirect action.
15051  * @param[out] error
15052  *   Perform verbose error reporting if not NULL. Initialized in case of
15053  *   error only.
15054  *
15055  * @return
15056  *   A valid shared action handle in case of success, NULL otherwise and
15057  *   rte_errno is set.
15058  */
15059 struct rte_flow_action_handle *
15060 flow_dv_action_create(struct rte_eth_dev *dev,
15061                       const struct rte_flow_indir_action_conf *conf,
15062                       const struct rte_flow_action *action,
15063                       struct rte_flow_error *err)
15064 {
15065         struct mlx5_priv *priv = dev->data->dev_private;
15066         uint32_t age_idx = 0;
15067         uint32_t idx = 0;
15068         uint32_t ret = 0;
15069
15070         switch (action->type) {
15071         case RTE_FLOW_ACTION_TYPE_RSS:
15072                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
15073                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
15074                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
15075                 break;
15076         case RTE_FLOW_ACTION_TYPE_AGE:
15077                 age_idx = flow_dv_aso_age_alloc(dev, err);
15078                 if (!age_idx) {
15079                         ret = -rte_errno;
15080                         break;
15081                 }
15082                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
15083                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
15084                 flow_dv_aso_age_params_init(dev, age_idx,
15085                                         ((const struct rte_flow_action_age *)
15086                                                 action->conf)->context ?
15087                                         ((const struct rte_flow_action_age *)
15088                                                 action->conf)->context :
15089                                         (void *)(uintptr_t)idx,
15090                                         ((const struct rte_flow_action_age *)
15091                                                 action->conf)->timeout);
15092                 ret = age_idx;
15093                 break;
15094         case RTE_FLOW_ACTION_TYPE_COUNT:
15095                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
15096                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
15097                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
15098                 break;
15099         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
15100                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
15101                                                          err);
15102                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
15103                 break;
15104         default:
15105                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
15106                                    NULL, "action type not supported");
15107                 break;
15108         }
15109         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
15110 }
15111
15112 /**
15113  * Destroy the indirect action.
15114  * Release action related resources on the NIC and the memory.
15115  * Lock free, (mutex should be acquired by caller).
15116  * Dispatcher for action type specific call.
15117  *
15118  * @param[in] dev
15119  *   Pointer to the Ethernet device structure.
15120  * @param[in] handle
15121  *   The indirect action object handle to be removed.
15122  * @param[out] error
15123  *   Perform verbose error reporting if not NULL. Initialized in case of
15124  *   error only.
15125  *
15126  * @return
15127  *   0 on success, otherwise negative errno value.
15128  */
15129 int
15130 flow_dv_action_destroy(struct rte_eth_dev *dev,
15131                        struct rte_flow_action_handle *handle,
15132                        struct rte_flow_error *error)
15133 {
15134         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15135         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15136         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15137         struct mlx5_flow_counter *cnt;
15138         uint32_t no_flow_refcnt = 1;
15139         int ret;
15140
15141         switch (type) {
15142         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15143                 return __flow_dv_action_rss_release(dev, idx, error);
15144         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15145                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
15146                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
15147                                                  &no_flow_refcnt, 1, false,
15148                                                  __ATOMIC_ACQUIRE,
15149                                                  __ATOMIC_RELAXED))
15150                         return rte_flow_error_set(error, EBUSY,
15151                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15152                                                   NULL,
15153                                                   "Indirect count action has references");
15154                 flow_dv_counter_free(dev, idx);
15155                 return 0;
15156         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15157                 ret = flow_dv_aso_age_release(dev, idx);
15158                 if (ret)
15159                         /*
15160                          * In this case, the last flow has a reference will
15161                          * actually release the age action.
15162                          */
15163                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
15164                                 " released with references %d.", idx, ret);
15165                 return 0;
15166         case MLX5_INDIRECT_ACTION_TYPE_CT:
15167                 ret = flow_dv_aso_ct_release(dev, idx, error);
15168                 if (ret < 0)
15169                         return ret;
15170                 if (ret > 0)
15171                         DRV_LOG(DEBUG, "Connection tracking object %u still "
15172                                 "has references %d.", idx, ret);
15173                 return 0;
15174         default:
15175                 return rte_flow_error_set(error, ENOTSUP,
15176                                           RTE_FLOW_ERROR_TYPE_ACTION,
15177                                           NULL,
15178                                           "action type not supported");
15179         }
15180 }
15181
15182 /**
15183  * Updates in place shared RSS action configuration.
15184  *
15185  * @param[in] dev
15186  *   Pointer to the Ethernet device structure.
15187  * @param[in] idx
15188  *   The shared RSS action object ID to be updated.
15189  * @param[in] action_conf
15190  *   RSS action specification used to modify *shared_rss*.
15191  * @param[out] error
15192  *   Perform verbose error reporting if not NULL. Initialized in case of
15193  *   error only.
15194  *
15195  * @return
15196  *   0 on success, otherwise negative errno value.
15197  * @note: currently only support update of RSS queues.
15198  */
15199 static int
15200 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
15201                             const struct rte_flow_action_rss *action_conf,
15202                             struct rte_flow_error *error)
15203 {
15204         struct mlx5_priv *priv = dev->data->dev_private;
15205         struct mlx5_shared_action_rss *shared_rss =
15206             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15207         int ret = 0;
15208         void *queue = NULL;
15209         void *queue_i = NULL;
15210         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
15211         bool dev_started = !!dev->data->dev_started;
15212
15213         if (!shared_rss)
15214                 return rte_flow_error_set(error, EINVAL,
15215                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15216                                           "invalid shared action to update");
15217         if (priv->obj_ops.ind_table_modify == NULL)
15218                 return rte_flow_error_set(error, ENOTSUP,
15219                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15220                                           "cannot modify indirection table");
15221         queue = mlx5_malloc(MLX5_MEM_ZERO,
15222                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
15223                             0, SOCKET_ID_ANY);
15224         if (!queue)
15225                 return rte_flow_error_set(error, ENOMEM,
15226                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15227                                           NULL,
15228                                           "cannot allocate resource memory");
15229         memcpy(queue, action_conf->queue, queue_size);
15230         MLX5_ASSERT(shared_rss->ind_tbl);
15231         rte_spinlock_lock(&shared_rss->action_rss_sl);
15232         queue_i = shared_rss->ind_tbl->queues;
15233         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
15234                                         queue, action_conf->queue_num,
15235                                         true /* standalone */,
15236                                         dev_started /* ref_new_qs */,
15237                                         dev_started /* deref_old_qs */);
15238         if (ret) {
15239                 ret = rte_flow_error_set(error, rte_errno,
15240                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15241                                           "cannot update indirection table");
15242         } else {
15243                 /* Restore the queue to indirect table internal queue. */
15244                 memcpy(queue_i, queue, queue_size);
15245                 shared_rss->ind_tbl->queues = queue_i;
15246                 shared_rss->origin.queue_num = action_conf->queue_num;
15247         }
15248         mlx5_free(queue);
15249         rte_spinlock_unlock(&shared_rss->action_rss_sl);
15250         return ret;
15251 }
15252
15253 /*
15254  * Updates in place conntrack context or direction.
15255  * Context update should be synchronized.
15256  *
15257  * @param[in] dev
15258  *   Pointer to the Ethernet device structure.
15259  * @param[in] idx
15260  *   The conntrack object ID to be updated.
15261  * @param[in] update
15262  *   Pointer to the structure of information to update.
15263  * @param[out] error
15264  *   Perform verbose error reporting if not NULL. Initialized in case of
15265  *   error only.
15266  *
15267  * @return
15268  *   0 on success, otherwise negative errno value.
15269  */
15270 static int
15271 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
15272                            const struct rte_flow_modify_conntrack *update,
15273                            struct rte_flow_error *error)
15274 {
15275         struct mlx5_priv *priv = dev->data->dev_private;
15276         struct mlx5_aso_ct_action *ct;
15277         const struct rte_flow_action_conntrack *new_prf;
15278         int ret = 0;
15279         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15280         uint32_t dev_idx;
15281
15282         if (PORT_ID(priv) != owner)
15283                 return rte_flow_error_set(error, EACCES,
15284                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15285                                           NULL,
15286                                           "CT object owned by another port");
15287         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15288         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15289         if (!ct->refcnt)
15290                 return rte_flow_error_set(error, ENOMEM,
15291                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15292                                           NULL,
15293                                           "CT object is inactive");
15294         new_prf = &update->new_ct;
15295         if (update->direction)
15296                 ct->is_original = !!new_prf->is_original_dir;
15297         if (update->state) {
15298                 /* Only validate the profile when it needs to be updated. */
15299                 ret = mlx5_validate_action_ct(dev, new_prf, error);
15300                 if (ret)
15301                         return ret;
15302                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15303                 if (ret)
15304                         return rte_flow_error_set(error, EIO,
15305                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15306                                         NULL,
15307                                         "Failed to send CT context update WQE");
15308                 /* Block until ready or a failure. */
15309                 ret = mlx5_aso_ct_available(priv->sh, ct);
15310                 if (ret)
15311                         rte_flow_error_set(error, rte_errno,
15312                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15313                                            NULL,
15314                                            "Timeout to get the CT update");
15315         }
15316         return ret;
15317 }
15318
15319 /**
15320  * Updates in place shared action configuration, lock free,
15321  * (mutex should be acquired by caller).
15322  *
15323  * @param[in] dev
15324  *   Pointer to the Ethernet device structure.
15325  * @param[in] handle
15326  *   The indirect action object handle to be updated.
15327  * @param[in] update
15328  *   Action specification used to modify the action pointed by *handle*.
15329  *   *update* could be of same type with the action pointed by the *handle*
15330  *   handle argument, or some other structures like a wrapper, depending on
15331  *   the indirect action type.
15332  * @param[out] error
15333  *   Perform verbose error reporting if not NULL. Initialized in case of
15334  *   error only.
15335  *
15336  * @return
15337  *   0 on success, otherwise negative errno value.
15338  */
15339 int
15340 flow_dv_action_update(struct rte_eth_dev *dev,
15341                         struct rte_flow_action_handle *handle,
15342                         const void *update,
15343                         struct rte_flow_error *err)
15344 {
15345         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15346         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15347         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15348         const void *action_conf;
15349
15350         switch (type) {
15351         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15352                 action_conf = ((const struct rte_flow_action *)update)->conf;
15353                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15354         case MLX5_INDIRECT_ACTION_TYPE_CT:
15355                 return __flow_dv_action_ct_update(dev, idx, update, err);
15356         default:
15357                 return rte_flow_error_set(err, ENOTSUP,
15358                                           RTE_FLOW_ERROR_TYPE_ACTION,
15359                                           NULL,
15360                                           "action type update not supported");
15361         }
15362 }
15363
15364 /**
15365  * Destroy the meter sub policy table rules.
15366  * Lock free, (mutex should be acquired by caller).
15367  *
15368  * @param[in] dev
15369  *   Pointer to Ethernet device.
15370  * @param[in] sub_policy
15371  *   Pointer to meter sub policy table.
15372  */
15373 static void
15374 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15375                              struct mlx5_flow_meter_sub_policy *sub_policy)
15376 {
15377         struct mlx5_priv *priv = dev->data->dev_private;
15378         struct mlx5_flow_tbl_data_entry *tbl;
15379         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15380         struct mlx5_flow_meter_info *next_fm;
15381         struct mlx5_sub_policy_color_rule *color_rule;
15382         void *tmp;
15383         uint32_t i;
15384
15385         for (i = 0; i < RTE_COLORS; i++) {
15386                 next_fm = NULL;
15387                 if (i == RTE_COLOR_GREEN && policy &&
15388                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15389                         next_fm = mlx5_flow_meter_find(priv,
15390                                         policy->act_cnt[i].next_mtr_id, NULL);
15391                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15392                                    next_port, tmp) {
15393                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15394                         tbl = container_of(color_rule->matcher->tbl,
15395                                            typeof(*tbl), tbl);
15396                         mlx5_list_unregister(tbl->matchers,
15397                                              &color_rule->matcher->entry);
15398                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15399                                      color_rule, next_port);
15400                         mlx5_free(color_rule);
15401                         if (next_fm)
15402                                 mlx5_flow_meter_detach(priv, next_fm);
15403                 }
15404         }
15405         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15406                 if (sub_policy->rix_hrxq[i]) {
15407                         if (policy && !policy->is_hierarchy)
15408                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15409                         sub_policy->rix_hrxq[i] = 0;
15410                 }
15411                 if (sub_policy->jump_tbl[i]) {
15412                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15413                                                      sub_policy->jump_tbl[i]);
15414                         sub_policy->jump_tbl[i] = NULL;
15415                 }
15416         }
15417         if (sub_policy->tbl_rsc) {
15418                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15419                                              sub_policy->tbl_rsc);
15420                 sub_policy->tbl_rsc = NULL;
15421         }
15422 }
15423
15424 /**
15425  * Destroy policy rules, lock free,
15426  * (mutex should be acquired by caller).
15427  * Dispatcher for action type specific call.
15428  *
15429  * @param[in] dev
15430  *   Pointer to the Ethernet device structure.
15431  * @param[in] mtr_policy
15432  *   Meter policy struct.
15433  */
15434 static void
15435 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15436                              struct mlx5_flow_meter_policy *mtr_policy)
15437 {
15438         uint32_t i, j;
15439         struct mlx5_flow_meter_sub_policy *sub_policy;
15440         uint16_t sub_policy_num;
15441
15442         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15443                 sub_policy_num = (mtr_policy->sub_policy_num >>
15444                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15445                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15446                 for (j = 0; j < sub_policy_num; j++) {
15447                         sub_policy = mtr_policy->sub_policys[i][j];
15448                         if (sub_policy)
15449                                 __flow_dv_destroy_sub_policy_rules(dev,
15450                                                                    sub_policy);
15451                 }
15452         }
15453 }
15454
15455 /**
15456  * Destroy policy action, lock free,
15457  * (mutex should be acquired by caller).
15458  * Dispatcher for action type specific call.
15459  *
15460  * @param[in] dev
15461  *   Pointer to the Ethernet device structure.
15462  * @param[in] mtr_policy
15463  *   Meter policy struct.
15464  */
15465 static void
15466 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15467                       struct mlx5_flow_meter_policy *mtr_policy)
15468 {
15469         struct rte_flow_action *rss_action;
15470         struct mlx5_flow_handle dev_handle;
15471         uint32_t i, j;
15472
15473         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15474                 if (mtr_policy->act_cnt[i].rix_mark) {
15475                         flow_dv_tag_release(dev,
15476                                 mtr_policy->act_cnt[i].rix_mark);
15477                         mtr_policy->act_cnt[i].rix_mark = 0;
15478                 }
15479                 if (mtr_policy->act_cnt[i].modify_hdr) {
15480                         dev_handle.dvh.modify_hdr =
15481                                 mtr_policy->act_cnt[i].modify_hdr;
15482                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15483                 }
15484                 switch (mtr_policy->act_cnt[i].fate_action) {
15485                 case MLX5_FLOW_FATE_SHARED_RSS:
15486                         rss_action = mtr_policy->act_cnt[i].rss;
15487                         mlx5_free(rss_action);
15488                         break;
15489                 case MLX5_FLOW_FATE_PORT_ID:
15490                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15491                                 flow_dv_port_id_action_resource_release(dev,
15492                                 mtr_policy->act_cnt[i].rix_port_id_action);
15493                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15494                         }
15495                         break;
15496                 case MLX5_FLOW_FATE_DROP:
15497                 case MLX5_FLOW_FATE_JUMP:
15498                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15499                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15500                                                 NULL;
15501                         break;
15502                 default:
15503                         /*Queue action do nothing*/
15504                         break;
15505                 }
15506         }
15507         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15508                 mtr_policy->dr_drop_action[j] = NULL;
15509 }
15510
15511 /**
15512  * Create policy action per domain, lock free,
15513  * (mutex should be acquired by caller).
15514  * Dispatcher for action type specific call.
15515  *
15516  * @param[in] dev
15517  *   Pointer to the Ethernet device structure.
15518  * @param[in] mtr_policy
15519  *   Meter policy struct.
15520  * @param[in] action
15521  *   Action specification used to create meter actions.
15522  * @param[out] error
15523  *   Perform verbose error reporting if not NULL. Initialized in case of
15524  *   error only.
15525  *
15526  * @return
15527  *   0 on success, otherwise negative errno value.
15528  */
15529 static int
15530 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15531                         struct mlx5_flow_meter_policy *mtr_policy,
15532                         const struct rte_flow_action *actions[RTE_COLORS],
15533                         enum mlx5_meter_domain domain,
15534                         struct rte_mtr_error *error)
15535 {
15536         struct mlx5_priv *priv = dev->data->dev_private;
15537         struct rte_flow_error flow_err;
15538         const struct rte_flow_action *act;
15539         uint64_t action_flags;
15540         struct mlx5_flow_handle dh;
15541         struct mlx5_flow dev_flow;
15542         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15543         int i, ret;
15544         uint8_t egress, transfer;
15545         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15546         union {
15547                 struct mlx5_flow_dv_modify_hdr_resource res;
15548                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15549                             sizeof(struct mlx5_modification_cmd) *
15550                             (MLX5_MAX_MODIFY_NUM + 1)];
15551         } mhdr_dummy;
15552         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15553         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
15554
15555         MLX5_ASSERT(wks);
15556         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15557         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15558         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15559         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15560         memset(&port_id_action, 0,
15561                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15562         memset(mhdr_res, 0, sizeof(*mhdr_res));
15563         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15564                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15565                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15566         dev_flow.handle = &dh;
15567         dev_flow.dv.port_id_action = &port_id_action;
15568         dev_flow.external = true;
15569         for (i = 0; i < RTE_COLORS; i++) {
15570                 if (i < MLX5_MTR_RTE_COLORS)
15571                         act_cnt = &mtr_policy->act_cnt[i];
15572                 /* Skip the color policy actions creation. */
15573                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15574                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15575                         continue;
15576                 action_flags = 0;
15577                 for (act = actions[i];
15578                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15579                         switch (act->type) {
15580                         case RTE_FLOW_ACTION_TYPE_MARK:
15581                         {
15582                                 uint32_t tag_be = mlx5_flow_mark_set
15583                                         (((const struct rte_flow_action_mark *)
15584                                         (act->conf))->id);
15585
15586                                 if (i >= MLX5_MTR_RTE_COLORS)
15587                                         return -rte_mtr_error_set(error,
15588                                           ENOTSUP,
15589                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15590                                           NULL,
15591                                           "cannot create policy "
15592                                           "mark action for this color");
15593                                 wks->mark = 1;
15594                                 if (flow_dv_tag_resource_register(dev, tag_be,
15595                                                   &dev_flow, &flow_err))
15596                                         return -rte_mtr_error_set(error,
15597                                         ENOTSUP,
15598                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15599                                         NULL,
15600                                         "cannot setup policy mark action");
15601                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15602                                 act_cnt->rix_mark =
15603                                         dev_flow.handle->dvh.rix_tag;
15604                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15605                                 break;
15606                         }
15607                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15608                                 if (i >= MLX5_MTR_RTE_COLORS)
15609                                         return -rte_mtr_error_set(error,
15610                                           ENOTSUP,
15611                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15612                                           NULL,
15613                                           "cannot create policy "
15614                                           "set tag action for this color");
15615                                 if (flow_dv_convert_action_set_tag
15616                                 (dev, mhdr_res,
15617                                 (const struct rte_flow_action_set_tag *)
15618                                 act->conf,  &flow_err))
15619                                         return -rte_mtr_error_set(error,
15620                                         ENOTSUP,
15621                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15622                                         NULL, "cannot convert policy "
15623                                         "set tag action");
15624                                 if (!mhdr_res->actions_num)
15625                                         return -rte_mtr_error_set(error,
15626                                         ENOTSUP,
15627                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15628                                         NULL, "cannot find policy "
15629                                         "set tag action");
15630                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15631                                 break;
15632                         case RTE_FLOW_ACTION_TYPE_DROP:
15633                         {
15634                                 struct mlx5_flow_mtr_mng *mtrmng =
15635                                                 priv->sh->mtrmng;
15636                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15637
15638                                 /*
15639                                  * Create the drop table with
15640                                  * METER DROP level.
15641                                  */
15642                                 if (!mtrmng->drop_tbl[domain]) {
15643                                         mtrmng->drop_tbl[domain] =
15644                                         flow_dv_tbl_resource_get(dev,
15645                                         MLX5_FLOW_TABLE_LEVEL_METER,
15646                                         egress, transfer, false, NULL, 0,
15647                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15648                                         if (!mtrmng->drop_tbl[domain])
15649                                                 return -rte_mtr_error_set
15650                                         (error, ENOTSUP,
15651                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15652                                         NULL,
15653                                         "Failed to create meter drop table");
15654                                 }
15655                                 tbl_data = container_of
15656                                 (mtrmng->drop_tbl[domain],
15657                                 struct mlx5_flow_tbl_data_entry, tbl);
15658                                 if (i < MLX5_MTR_RTE_COLORS) {
15659                                         act_cnt->dr_jump_action[domain] =
15660                                                 tbl_data->jump.action;
15661                                         act_cnt->fate_action =
15662                                                 MLX5_FLOW_FATE_DROP;
15663                                 }
15664                                 if (i == RTE_COLOR_RED)
15665                                         mtr_policy->dr_drop_action[domain] =
15666                                                 tbl_data->jump.action;
15667                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15668                                 break;
15669                         }
15670                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15671                         {
15672                                 if (i >= MLX5_MTR_RTE_COLORS)
15673                                         return -rte_mtr_error_set(error,
15674                                         ENOTSUP,
15675                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15676                                         NULL, "cannot create policy "
15677                                         "fate queue for this color");
15678                                 act_cnt->queue =
15679                                 ((const struct rte_flow_action_queue *)
15680                                         (act->conf))->index;
15681                                 act_cnt->fate_action =
15682                                         MLX5_FLOW_FATE_QUEUE;
15683                                 dev_flow.handle->fate_action =
15684                                         MLX5_FLOW_FATE_QUEUE;
15685                                 mtr_policy->is_queue = 1;
15686                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15687                                 break;
15688                         }
15689                         case RTE_FLOW_ACTION_TYPE_RSS:
15690                         {
15691                                 int rss_size;
15692
15693                                 if (i >= MLX5_MTR_RTE_COLORS)
15694                                         return -rte_mtr_error_set(error,
15695                                           ENOTSUP,
15696                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15697                                           NULL,
15698                                           "cannot create policy "
15699                                           "rss action for this color");
15700                                 /*
15701                                  * Save RSS conf into policy struct
15702                                  * for translate stage.
15703                                  */
15704                                 rss_size = (int)rte_flow_conv
15705                                         (RTE_FLOW_CONV_OP_ACTION,
15706                                         NULL, 0, act, &flow_err);
15707                                 if (rss_size <= 0)
15708                                         return -rte_mtr_error_set(error,
15709                                           ENOTSUP,
15710                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15711                                           NULL, "Get the wrong "
15712                                           "rss action struct size");
15713                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15714                                                 rss_size, 0, SOCKET_ID_ANY);
15715                                 if (!act_cnt->rss)
15716                                         return -rte_mtr_error_set(error,
15717                                           ENOTSUP,
15718                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15719                                           NULL,
15720                                           "Fail to malloc rss action memory");
15721                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15722                                         act_cnt->rss, rss_size,
15723                                         act, &flow_err);
15724                                 if (ret < 0)
15725                                         return -rte_mtr_error_set(error,
15726                                           ENOTSUP,
15727                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15728                                           NULL, "Fail to save "
15729                                           "rss action into policy struct");
15730                                 act_cnt->fate_action =
15731                                         MLX5_FLOW_FATE_SHARED_RSS;
15732                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15733                                 break;
15734                         }
15735                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15736                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15737                         {
15738                                 struct mlx5_flow_dv_port_id_action_resource
15739                                         port_id_resource;
15740                                 uint32_t port_id = 0;
15741
15742                                 if (i >= MLX5_MTR_RTE_COLORS)
15743                                         return -rte_mtr_error_set(error,
15744                                         ENOTSUP,
15745                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15746                                         NULL, "cannot create policy "
15747                                         "port action for this color");
15748                                 memset(&port_id_resource, 0,
15749                                         sizeof(port_id_resource));
15750                                 if (flow_dv_translate_action_port_id(dev, act,
15751                                                 &port_id, &flow_err))
15752                                         return -rte_mtr_error_set(error,
15753                                         ENOTSUP,
15754                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15755                                         NULL, "cannot translate "
15756                                         "policy port action");
15757                                 port_id_resource.port_id = port_id;
15758                                 if (flow_dv_port_id_action_resource_register
15759                                         (dev, &port_id_resource,
15760                                         &dev_flow, &flow_err))
15761                                         return -rte_mtr_error_set(error,
15762                                         ENOTSUP,
15763                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15764                                         NULL, "cannot setup "
15765                                         "policy port action");
15766                                 act_cnt->rix_port_id_action =
15767                                         dev_flow.handle->rix_port_id_action;
15768                                 act_cnt->fate_action =
15769                                         MLX5_FLOW_FATE_PORT_ID;
15770                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15771                                 break;
15772                         }
15773                         case RTE_FLOW_ACTION_TYPE_JUMP:
15774                         {
15775                                 uint32_t jump_group = 0;
15776                                 uint32_t table = 0;
15777                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15778                                 struct flow_grp_info grp_info = {
15779                                         .external = !!dev_flow.external,
15780                                         .transfer = !!transfer,
15781                                         .fdb_def_rule = !!priv->fdb_def_rule,
15782                                         .std_tbl_fix = 0,
15783                                         .skip_scale = dev_flow.skip_scale &
15784                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15785                                 };
15786                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15787                                         mtr_policy->sub_policys[domain][0];
15788
15789                                 if (i >= MLX5_MTR_RTE_COLORS)
15790                                         return -rte_mtr_error_set(error,
15791                                           ENOTSUP,
15792                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15793                                           NULL,
15794                                           "cannot create policy "
15795                                           "jump action for this color");
15796                                 jump_group =
15797                                 ((const struct rte_flow_action_jump *)
15798                                                         act->conf)->group;
15799                                 if (mlx5_flow_group_to_table(dev, NULL,
15800                                                        jump_group,
15801                                                        &table,
15802                                                        &grp_info, &flow_err))
15803                                         return -rte_mtr_error_set(error,
15804                                         ENOTSUP,
15805                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15806                                         NULL, "cannot setup "
15807                                         "policy jump action");
15808                                 sub_policy->jump_tbl[i] =
15809                                 flow_dv_tbl_resource_get(dev,
15810                                         table, egress,
15811                                         transfer,
15812                                         !!dev_flow.external,
15813                                         NULL, jump_group, 0,
15814                                         0, &flow_err);
15815                                 if
15816                                 (!sub_policy->jump_tbl[i])
15817                                         return  -rte_mtr_error_set(error,
15818                                         ENOTSUP,
15819                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15820                                         NULL, "cannot create jump action.");
15821                                 tbl_data = container_of
15822                                 (sub_policy->jump_tbl[i],
15823                                 struct mlx5_flow_tbl_data_entry, tbl);
15824                                 act_cnt->dr_jump_action[domain] =
15825                                         tbl_data->jump.action;
15826                                 act_cnt->fate_action =
15827                                         MLX5_FLOW_FATE_JUMP;
15828                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15829                                 break;
15830                         }
15831                         /*
15832                          * No need to check meter hierarchy for Y or R colors
15833                          * here since it is done in the validation stage.
15834                          */
15835                         case RTE_FLOW_ACTION_TYPE_METER:
15836                         {
15837                                 const struct rte_flow_action_meter *mtr;
15838                                 struct mlx5_flow_meter_info *next_fm;
15839                                 struct mlx5_flow_meter_policy *next_policy;
15840                                 struct rte_flow_action tag_action;
15841                                 struct mlx5_rte_flow_action_set_tag set_tag;
15842                                 uint32_t next_mtr_idx = 0;
15843
15844                                 mtr = act->conf;
15845                                 next_fm = mlx5_flow_meter_find(priv,
15846                                                         mtr->mtr_id,
15847                                                         &next_mtr_idx);
15848                                 if (!next_fm)
15849                                         return -rte_mtr_error_set(error, EINVAL,
15850                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15851                                                 "Fail to find next meter.");
15852                                 if (next_fm->def_policy)
15853                                         return -rte_mtr_error_set(error, EINVAL,
15854                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15855                                 "Hierarchy only supports termination meter.");
15856                                 next_policy = mlx5_flow_meter_policy_find(dev,
15857                                                 next_fm->policy_id, NULL);
15858                                 MLX5_ASSERT(next_policy);
15859                                 if (next_fm->drop_cnt) {
15860                                         set_tag.id =
15861                                                 (enum modify_reg)
15862                                                 mlx5_flow_get_reg_id(dev,
15863                                                 MLX5_MTR_ID,
15864                                                 0,
15865                                                 (struct rte_flow_error *)error);
15866                                         set_tag.offset = (priv->mtr_reg_share ?
15867                                                 MLX5_MTR_COLOR_BITS : 0);
15868                                         set_tag.length = (priv->mtr_reg_share ?
15869                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15870                                                MLX5_REG_BITS);
15871                                         set_tag.data = next_mtr_idx;
15872                                         tag_action.type =
15873                                                 (enum rte_flow_action_type)
15874                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15875                                         tag_action.conf = &set_tag;
15876                                         if (flow_dv_convert_action_set_reg
15877                                                 (mhdr_res, &tag_action,
15878                                                 (struct rte_flow_error *)error))
15879                                                 return -rte_errno;
15880                                         action_flags |=
15881                                                 MLX5_FLOW_ACTION_SET_TAG;
15882                                 }
15883                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15884                                 act_cnt->next_mtr_id = next_fm->meter_id;
15885                                 act_cnt->next_sub_policy = NULL;
15886                                 mtr_policy->is_hierarchy = 1;
15887                                 mtr_policy->dev = next_policy->dev;
15888                                 action_flags |=
15889                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15890                                 break;
15891                         }
15892                         default:
15893                                 return -rte_mtr_error_set(error, ENOTSUP,
15894                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15895                                           NULL, "action type not supported");
15896                         }
15897                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15898                                 /* create modify action if needed. */
15899                                 dev_flow.dv.group = 1;
15900                                 if (flow_dv_modify_hdr_resource_register
15901                                         (dev, mhdr_res, &dev_flow, &flow_err))
15902                                         return -rte_mtr_error_set(error,
15903                                                 ENOTSUP,
15904                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15905                                                 NULL, "cannot register policy "
15906                                                 "set tag action");
15907                                 act_cnt->modify_hdr =
15908                                         dev_flow.handle->dvh.modify_hdr;
15909                         }
15910                 }
15911         }
15912         return 0;
15913 }
15914
15915 /**
15916  * Create policy action per domain, lock free,
15917  * (mutex should be acquired by caller).
15918  * Dispatcher for action type specific call.
15919  *
15920  * @param[in] dev
15921  *   Pointer to the Ethernet device structure.
15922  * @param[in] mtr_policy
15923  *   Meter policy struct.
15924  * @param[in] action
15925  *   Action specification used to create meter actions.
15926  * @param[out] error
15927  *   Perform verbose error reporting if not NULL. Initialized in case of
15928  *   error only.
15929  *
15930  * @return
15931  *   0 on success, otherwise negative errno value.
15932  */
15933 static int
15934 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15935                       struct mlx5_flow_meter_policy *mtr_policy,
15936                       const struct rte_flow_action *actions[RTE_COLORS],
15937                       struct rte_mtr_error *error)
15938 {
15939         int ret, i;
15940         uint16_t sub_policy_num;
15941
15942         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15943                 sub_policy_num = (mtr_policy->sub_policy_num >>
15944                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15945                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15946                 if (sub_policy_num) {
15947                         ret = __flow_dv_create_domain_policy_acts(dev,
15948                                 mtr_policy, actions,
15949                                 (enum mlx5_meter_domain)i, error);
15950                         /* Cleaning resource is done in the caller level. */
15951                         if (ret)
15952                                 return ret;
15953                 }
15954         }
15955         return 0;
15956 }
15957
15958 /**
15959  * Query a DV flow rule for its statistics via DevX.
15960  *
15961  * @param[in] dev
15962  *   Pointer to Ethernet device.
15963  * @param[in] cnt_idx
15964  *   Index to the flow counter.
15965  * @param[out] data
15966  *   Data retrieved by the query.
15967  * @param[out] error
15968  *   Perform verbose error reporting if not NULL.
15969  *
15970  * @return
15971  *   0 on success, a negative errno value otherwise and rte_errno is set.
15972  */
15973 static int
15974 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15975                     struct rte_flow_error *error)
15976 {
15977         struct mlx5_priv *priv = dev->data->dev_private;
15978         struct rte_flow_query_count *qc = data;
15979
15980         if (!priv->sh->cdev->config.devx)
15981                 return rte_flow_error_set(error, ENOTSUP,
15982                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15983                                           NULL,
15984                                           "counters are not supported");
15985         if (cnt_idx) {
15986                 uint64_t pkts, bytes;
15987                 struct mlx5_flow_counter *cnt;
15988                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15989
15990                 if (err)
15991                         return rte_flow_error_set(error, -err,
15992                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15993                                         NULL, "cannot read counters");
15994                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15995                 qc->hits_set = 1;
15996                 qc->bytes_set = 1;
15997                 qc->hits = pkts - cnt->hits;
15998                 qc->bytes = bytes - cnt->bytes;
15999                 if (qc->reset) {
16000                         cnt->hits = pkts;
16001                         cnt->bytes = bytes;
16002                 }
16003                 return 0;
16004         }
16005         return rte_flow_error_set(error, EINVAL,
16006                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16007                                   NULL,
16008                                   "counters are not available");
16009 }
16010
16011 int
16012 flow_dv_action_query(struct rte_eth_dev *dev,
16013                      const struct rte_flow_action_handle *handle, void *data,
16014                      struct rte_flow_error *error)
16015 {
16016         struct mlx5_age_param *age_param;
16017         struct rte_flow_query_age *resp;
16018         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
16019         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
16020         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
16021         struct mlx5_priv *priv = dev->data->dev_private;
16022         struct mlx5_aso_ct_action *ct;
16023         uint16_t owner;
16024         uint32_t dev_idx;
16025
16026         switch (type) {
16027         case MLX5_INDIRECT_ACTION_TYPE_AGE:
16028                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
16029                 resp = data;
16030                 resp->aged = __atomic_load_n(&age_param->state,
16031                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
16032                                                                           1 : 0;
16033                 resp->sec_since_last_hit_valid = !resp->aged;
16034                 if (resp->sec_since_last_hit_valid)
16035                         resp->sec_since_last_hit = __atomic_load_n
16036                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16037                 return 0;
16038         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
16039                 return flow_dv_query_count(dev, idx, data, error);
16040         case MLX5_INDIRECT_ACTION_TYPE_CT:
16041                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
16042                 if (owner != PORT_ID(priv))
16043                         return rte_flow_error_set(error, EACCES,
16044                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16045                                         NULL,
16046                                         "CT object owned by another port");
16047                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
16048                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
16049                 MLX5_ASSERT(ct);
16050                 if (!ct->refcnt)
16051                         return rte_flow_error_set(error, EFAULT,
16052                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16053                                         NULL,
16054                                         "CT object is inactive");
16055                 ((struct rte_flow_action_conntrack *)data)->peer_port =
16056                                                         ct->peer;
16057                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
16058                                                         ct->is_original;
16059                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
16060                         return rte_flow_error_set(error, EIO,
16061                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16062                                         NULL,
16063                                         "Failed to query CT context");
16064                 return 0;
16065         default:
16066                 return rte_flow_error_set(error, ENOTSUP,
16067                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16068                                           "action type query not supported");
16069         }
16070 }
16071
16072 /**
16073  * Query a flow rule AGE action for aging information.
16074  *
16075  * @param[in] dev
16076  *   Pointer to Ethernet device.
16077  * @param[in] flow
16078  *   Pointer to the sub flow.
16079  * @param[out] data
16080  *   data retrieved by the query.
16081  * @param[out] error
16082  *   Perform verbose error reporting if not NULL.
16083  *
16084  * @return
16085  *   0 on success, a negative errno value otherwise and rte_errno is set.
16086  */
16087 static int
16088 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
16089                   void *data, struct rte_flow_error *error)
16090 {
16091         struct rte_flow_query_age *resp = data;
16092         struct mlx5_age_param *age_param;
16093
16094         if (flow->age) {
16095                 struct mlx5_aso_age_action *act =
16096                                      flow_aso_age_get_by_idx(dev, flow->age);
16097
16098                 age_param = &act->age_params;
16099         } else if (flow->counter) {
16100                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
16101
16102                 if (!age_param || !age_param->timeout)
16103                         return rte_flow_error_set
16104                                         (error, EINVAL,
16105                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16106                                          NULL, "cannot read age data");
16107         } else {
16108                 return rte_flow_error_set(error, EINVAL,
16109                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16110                                           NULL, "age data not available");
16111         }
16112         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
16113                                      AGE_TMOUT ? 1 : 0;
16114         resp->sec_since_last_hit_valid = !resp->aged;
16115         if (resp->sec_since_last_hit_valid)
16116                 resp->sec_since_last_hit = __atomic_load_n
16117                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16118         return 0;
16119 }
16120
16121 /**
16122  * Query a flow.
16123  *
16124  * @see rte_flow_query()
16125  * @see rte_flow_ops
16126  */
16127 static int
16128 flow_dv_query(struct rte_eth_dev *dev,
16129               struct rte_flow *flow __rte_unused,
16130               const struct rte_flow_action *actions __rte_unused,
16131               void *data __rte_unused,
16132               struct rte_flow_error *error __rte_unused)
16133 {
16134         int ret = -EINVAL;
16135
16136         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
16137                 switch (actions->type) {
16138                 case RTE_FLOW_ACTION_TYPE_VOID:
16139                         break;
16140                 case RTE_FLOW_ACTION_TYPE_COUNT:
16141                         ret = flow_dv_query_count(dev, flow->counter, data,
16142                                                   error);
16143                         break;
16144                 case RTE_FLOW_ACTION_TYPE_AGE:
16145                         ret = flow_dv_query_age(dev, flow, data, error);
16146                         break;
16147                 default:
16148                         return rte_flow_error_set(error, ENOTSUP,
16149                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16150                                                   actions,
16151                                                   "action not supported");
16152                 }
16153         }
16154         return ret;
16155 }
16156
16157 /**
16158  * Destroy the meter table set.
16159  * Lock free, (mutex should be acquired by caller).
16160  *
16161  * @param[in] dev
16162  *   Pointer to Ethernet device.
16163  * @param[in] fm
16164  *   Meter information table.
16165  */
16166 static void
16167 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
16168                         struct mlx5_flow_meter_info *fm)
16169 {
16170         struct mlx5_priv *priv = dev->data->dev_private;
16171         int i;
16172
16173         if (!fm || !priv->sh->config.dv_flow_en)
16174                 return;
16175         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16176                 if (fm->drop_rule[i]) {
16177                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
16178                         fm->drop_rule[i] = NULL;
16179                 }
16180         }
16181 }
16182
16183 static void
16184 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
16185 {
16186         struct mlx5_priv *priv = dev->data->dev_private;
16187         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16188         struct mlx5_flow_tbl_data_entry *tbl;
16189         int i, j;
16190
16191         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16192                 if (mtrmng->def_rule[i]) {
16193                         claim_zero(mlx5_flow_os_destroy_flow
16194                                         (mtrmng->def_rule[i]));
16195                         mtrmng->def_rule[i] = NULL;
16196                 }
16197                 if (mtrmng->def_matcher[i]) {
16198                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
16199                                 struct mlx5_flow_tbl_data_entry, tbl);
16200                         mlx5_list_unregister(tbl->matchers,
16201                                              &mtrmng->def_matcher[i]->entry);
16202                         mtrmng->def_matcher[i] = NULL;
16203                 }
16204                 for (j = 0; j < MLX5_REG_BITS; j++) {
16205                         if (mtrmng->drop_matcher[i][j]) {
16206                                 tbl =
16207                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
16208                                              struct mlx5_flow_tbl_data_entry,
16209                                              tbl);
16210                                 mlx5_list_unregister(tbl->matchers,
16211                                             &mtrmng->drop_matcher[i][j]->entry);
16212                                 mtrmng->drop_matcher[i][j] = NULL;
16213                         }
16214                 }
16215                 if (mtrmng->drop_tbl[i]) {
16216                         flow_dv_tbl_resource_release(MLX5_SH(dev),
16217                                 mtrmng->drop_tbl[i]);
16218                         mtrmng->drop_tbl[i] = NULL;
16219                 }
16220         }
16221 }
16222
16223 /* Number of meter flow actions, count and jump or count and drop. */
16224 #define METER_ACTIONS 2
16225
16226 static void
16227 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
16228                                     enum mlx5_meter_domain domain)
16229 {
16230         struct mlx5_priv *priv = dev->data->dev_private;
16231         struct mlx5_flow_meter_def_policy *def_policy =
16232                         priv->sh->mtrmng->def_policy[domain];
16233
16234         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
16235         mlx5_free(def_policy);
16236         priv->sh->mtrmng->def_policy[domain] = NULL;
16237 }
16238
16239 /**
16240  * Destroy the default policy table set.
16241  *
16242  * @param[in] dev
16243  *   Pointer to Ethernet device.
16244  */
16245 static void
16246 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
16247 {
16248         struct mlx5_priv *priv = dev->data->dev_private;
16249         int i;
16250
16251         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
16252                 if (priv->sh->mtrmng->def_policy[i])
16253                         __flow_dv_destroy_domain_def_policy(dev,
16254                                         (enum mlx5_meter_domain)i);
16255         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
16256 }
16257
16258 static int
16259 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
16260                         uint32_t color_reg_c_idx,
16261                         enum rte_color color, void *matcher_object,
16262                         int actions_n, void *actions,
16263                         bool match_src_port, const struct rte_flow_item *item,
16264                         void **rule, const struct rte_flow_attr *attr)
16265 {
16266         int ret;
16267         struct mlx5_flow_dv_match_params value = {
16268                 .size = sizeof(value.buf),
16269         };
16270         struct mlx5_flow_dv_match_params matcher = {
16271                 .size = sizeof(matcher.buf),
16272         };
16273         struct mlx5_priv *priv = dev->data->dev_private;
16274         uint8_t misc_mask;
16275
16276         if (match_src_port && priv->sh->esw_mode) {
16277                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
16278                                                    value.buf, item, attr)) {
16279                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
16280                                 " value with port.", color);
16281                         return -1;
16282                 }
16283         }
16284         flow_dv_match_meta_reg(matcher.buf, value.buf,
16285                                (enum modify_reg)color_reg_c_idx,
16286                                rte_col_2_mlx5_col(color), UINT32_MAX);
16287         misc_mask = flow_dv_matcher_enable(value.buf);
16288         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16289         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
16290                                        actions_n, actions, rule);
16291         if (ret) {
16292                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16293                 return -1;
16294         }
16295         return 0;
16296 }
16297
16298 static int
16299 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16300                         uint32_t color_reg_c_idx,
16301                         uint16_t priority,
16302                         struct mlx5_flow_meter_sub_policy *sub_policy,
16303                         const struct rte_flow_attr *attr,
16304                         bool match_src_port,
16305                         const struct rte_flow_item *item,
16306                         struct mlx5_flow_dv_matcher **policy_matcher,
16307                         struct rte_flow_error *error)
16308 {
16309         struct mlx5_list_entry *entry;
16310         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16311         struct mlx5_flow_dv_matcher matcher = {
16312                 .mask = {
16313                         .size = sizeof(matcher.mask.buf),
16314                 },
16315                 .tbl = tbl_rsc,
16316         };
16317         struct mlx5_flow_dv_match_params value = {
16318                 .size = sizeof(value.buf),
16319         };
16320         struct mlx5_flow_cb_ctx ctx = {
16321                 .error = error,
16322                 .data = &matcher,
16323         };
16324         struct mlx5_flow_tbl_data_entry *tbl_data;
16325         struct mlx5_priv *priv = dev->data->dev_private;
16326         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16327
16328         if (match_src_port && priv->sh->esw_mode) {
16329                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16330                                                    value.buf, item, attr)) {
16331                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16332                                 " with port.", priority);
16333                         return -1;
16334                 }
16335         }
16336         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16337         if (priority < RTE_COLOR_RED)
16338                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16339                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16340         matcher.priority = priority;
16341         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16342                                     matcher.mask.size);
16343         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16344         if (!entry) {
16345                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16346                 return -1;
16347         }
16348         *policy_matcher =
16349                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16350         return 0;
16351 }
16352
16353 /**
16354  * Create the policy rules per domain.
16355  *
16356  * @param[in] dev
16357  *   Pointer to Ethernet device.
16358  * @param[in] sub_policy
16359  *    Pointer to sub policy table..
16360  * @param[in] egress
16361  *   Direction of the table.
16362  * @param[in] transfer
16363  *   E-Switch or NIC flow.
16364  * @param[in] acts
16365  *   Pointer to policy action list per color.
16366  *
16367  * @return
16368  *   0 on success, -1 otherwise.
16369  */
16370 static int
16371 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16372                 struct mlx5_flow_meter_sub_policy *sub_policy,
16373                 uint8_t egress, uint8_t transfer, bool match_src_port,
16374                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16375 {
16376         struct mlx5_priv *priv = dev->data->dev_private;
16377         struct rte_flow_error flow_err;
16378         uint32_t color_reg_c_idx;
16379         struct rte_flow_attr attr = {
16380                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16381                 .priority = 0,
16382                 .ingress = 0,
16383                 .egress = !!egress,
16384                 .transfer = !!transfer,
16385                 .reserved = 0,
16386         };
16387         int i;
16388         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16389         struct mlx5_sub_policy_color_rule *color_rule;
16390         bool svport_match;
16391         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16392
16393         if (ret < 0)
16394                 return -1;
16395         /* Create policy table with POLICY level. */
16396         if (!sub_policy->tbl_rsc)
16397                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16398                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16399                                 egress, transfer, false, NULL, 0, 0,
16400                                 sub_policy->idx, &flow_err);
16401         if (!sub_policy->tbl_rsc) {
16402                 DRV_LOG(ERR,
16403                         "Failed to create meter sub policy table.");
16404                 return -1;
16405         }
16406         /* Prepare matchers. */
16407         color_reg_c_idx = ret;
16408         for (i = 0; i < RTE_COLORS; i++) {
16409                 TAILQ_INIT(&sub_policy->color_rules[i]);
16410                 if (!acts[i].actions_n)
16411                         continue;
16412                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16413                                 sizeof(struct mlx5_sub_policy_color_rule),
16414                                 0, SOCKET_ID_ANY);
16415                 if (!color_rule) {
16416                         DRV_LOG(ERR, "No memory to create color rule.");
16417                         goto err_exit;
16418                 }
16419                 tmp_rules[i] = color_rule;
16420                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16421                                   color_rule, next_port);
16422                 color_rule->src_port = priv->representor_id;
16423                 /* No use. */
16424                 attr.priority = i;
16425                 /* Create matchers for colors. */
16426                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16427                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16428                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16429                                 &attr, svport_match, NULL,
16430                                 &color_rule->matcher, &flow_err)) {
16431                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16432                         goto err_exit;
16433                 }
16434                 /* Create flow, matching color. */
16435                 if (__flow_dv_create_policy_flow(dev,
16436                                 color_reg_c_idx, (enum rte_color)i,
16437                                 color_rule->matcher->matcher_object,
16438                                 acts[i].actions_n, acts[i].dv_actions,
16439                                 svport_match, NULL, &color_rule->rule,
16440                                 &attr)) {
16441                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16442                         goto err_exit;
16443                 }
16444         }
16445         return 0;
16446 err_exit:
16447         /* All the policy rules will be cleared. */
16448         do {
16449                 color_rule = tmp_rules[i];
16450                 if (color_rule) {
16451                         if (color_rule->rule)
16452                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16453                         if (color_rule->matcher) {
16454                                 struct mlx5_flow_tbl_data_entry *tbl =
16455                                         container_of(color_rule->matcher->tbl,
16456                                                      typeof(*tbl), tbl);
16457                                 mlx5_list_unregister(tbl->matchers,
16458                                                 &color_rule->matcher->entry);
16459                         }
16460                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16461                                      color_rule, next_port);
16462                         mlx5_free(color_rule);
16463                 }
16464         } while (i--);
16465         return -1;
16466 }
16467
16468 static int
16469 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16470                         struct mlx5_flow_meter_policy *mtr_policy,
16471                         struct mlx5_flow_meter_sub_policy *sub_policy,
16472                         uint32_t domain)
16473 {
16474         struct mlx5_priv *priv = dev->data->dev_private;
16475         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16476         struct mlx5_flow_dv_tag_resource *tag;
16477         struct mlx5_flow_dv_port_id_action_resource *port_action;
16478         struct mlx5_hrxq *hrxq;
16479         struct mlx5_flow_meter_info *next_fm = NULL;
16480         struct mlx5_flow_meter_policy *next_policy;
16481         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16482         struct mlx5_flow_tbl_data_entry *tbl_data;
16483         struct rte_flow_error error;
16484         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16485         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16486         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16487         bool match_src_port = false;
16488         int i;
16489
16490         /* If RSS or Queue, no previous actions / rules is created. */
16491         for (i = 0; i < RTE_COLORS; i++) {
16492                 acts[i].actions_n = 0;
16493                 if (i == RTE_COLOR_RED) {
16494                         /* Only support drop on red. */
16495                         acts[i].dv_actions[0] =
16496                                 mtr_policy->dr_drop_action[domain];
16497                         acts[i].actions_n = 1;
16498                         continue;
16499                 }
16500                 if (i == RTE_COLOR_GREEN &&
16501                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16502                         struct rte_flow_attr attr = {
16503                                 .transfer = transfer
16504                         };
16505
16506                         next_fm = mlx5_flow_meter_find(priv,
16507                                         mtr_policy->act_cnt[i].next_mtr_id,
16508                                         NULL);
16509                         if (!next_fm) {
16510                                 DRV_LOG(ERR,
16511                                         "Failed to get next hierarchy meter.");
16512                                 goto err_exit;
16513                         }
16514                         if (mlx5_flow_meter_attach(priv, next_fm,
16515                                                    &attr, &error)) {
16516                                 DRV_LOG(ERR, "%s", error.message);
16517                                 next_fm = NULL;
16518                                 goto err_exit;
16519                         }
16520                         /* Meter action must be the first for TX. */
16521                         if (mtr_first) {
16522                                 acts[i].dv_actions[acts[i].actions_n] =
16523                                         next_fm->meter_action;
16524                                 acts[i].actions_n++;
16525                         }
16526                 }
16527                 if (mtr_policy->act_cnt[i].rix_mark) {
16528                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16529                                         mtr_policy->act_cnt[i].rix_mark);
16530                         if (!tag) {
16531                                 DRV_LOG(ERR, "Failed to find "
16532                                 "mark action for policy.");
16533                                 goto err_exit;
16534                         }
16535                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16536                         acts[i].actions_n++;
16537                 }
16538                 if (mtr_policy->act_cnt[i].modify_hdr) {
16539                         acts[i].dv_actions[acts[i].actions_n] =
16540                                 mtr_policy->act_cnt[i].modify_hdr->action;
16541                         acts[i].actions_n++;
16542                 }
16543                 if (mtr_policy->act_cnt[i].fate_action) {
16544                         switch (mtr_policy->act_cnt[i].fate_action) {
16545                         case MLX5_FLOW_FATE_PORT_ID:
16546                                 port_action = mlx5_ipool_get
16547                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16548                                 mtr_policy->act_cnt[i].rix_port_id_action);
16549                                 if (!port_action) {
16550                                         DRV_LOG(ERR, "Failed to find "
16551                                                 "port action for policy.");
16552                                         goto err_exit;
16553                                 }
16554                                 acts[i].dv_actions[acts[i].actions_n] =
16555                                         port_action->action;
16556                                 acts[i].actions_n++;
16557                                 mtr_policy->dev = dev;
16558                                 match_src_port = true;
16559                                 break;
16560                         case MLX5_FLOW_FATE_DROP:
16561                         case MLX5_FLOW_FATE_JUMP:
16562                                 acts[i].dv_actions[acts[i].actions_n] =
16563                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16564                                 acts[i].actions_n++;
16565                                 break;
16566                         case MLX5_FLOW_FATE_SHARED_RSS:
16567                         case MLX5_FLOW_FATE_QUEUE:
16568                                 hrxq = mlx5_ipool_get
16569                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16570                                          sub_policy->rix_hrxq[i]);
16571                                 if (!hrxq) {
16572                                         DRV_LOG(ERR, "Failed to find "
16573                                                 "queue action for policy.");
16574                                         goto err_exit;
16575                                 }
16576                                 acts[i].dv_actions[acts[i].actions_n] =
16577                                         hrxq->action;
16578                                 acts[i].actions_n++;
16579                                 break;
16580                         case MLX5_FLOW_FATE_MTR:
16581                                 if (!next_fm) {
16582                                         DRV_LOG(ERR,
16583                                                 "No next hierarchy meter.");
16584                                         goto err_exit;
16585                                 }
16586                                 if (!mtr_first) {
16587                                         acts[i].dv_actions[acts[i].actions_n] =
16588                                                         next_fm->meter_action;
16589                                         acts[i].actions_n++;
16590                                 }
16591                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16592                                         next_sub_policy =
16593                                         mtr_policy->act_cnt[i].next_sub_policy;
16594                                 } else {
16595                                         next_policy =
16596                                                 mlx5_flow_meter_policy_find(dev,
16597                                                 next_fm->policy_id, NULL);
16598                                         MLX5_ASSERT(next_policy);
16599                                         next_sub_policy =
16600                                         next_policy->sub_policys[domain][0];
16601                                 }
16602                                 tbl_data =
16603                                         container_of(next_sub_policy->tbl_rsc,
16604                                         struct mlx5_flow_tbl_data_entry, tbl);
16605                                 acts[i].dv_actions[acts[i].actions_n++] =
16606                                                         tbl_data->jump.action;
16607                                 if (mtr_policy->act_cnt[i].modify_hdr)
16608                                         match_src_port = !!transfer;
16609                                 break;
16610                         default:
16611                                 /*Queue action do nothing*/
16612                                 break;
16613                         }
16614                 }
16615         }
16616         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16617                                 egress, transfer, match_src_port, acts)) {
16618                 DRV_LOG(ERR,
16619                         "Failed to create policy rules per domain.");
16620                 goto err_exit;
16621         }
16622         return 0;
16623 err_exit:
16624         if (next_fm)
16625                 mlx5_flow_meter_detach(priv, next_fm);
16626         return -1;
16627 }
16628
16629 /**
16630  * Create the policy rules.
16631  *
16632  * @param[in] dev
16633  *   Pointer to Ethernet device.
16634  * @param[in,out] mtr_policy
16635  *   Pointer to meter policy table.
16636  *
16637  * @return
16638  *   0 on success, -1 otherwise.
16639  */
16640 static int
16641 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16642                              struct mlx5_flow_meter_policy *mtr_policy)
16643 {
16644         int i;
16645         uint16_t sub_policy_num;
16646
16647         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16648                 sub_policy_num = (mtr_policy->sub_policy_num >>
16649                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16650                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16651                 if (!sub_policy_num)
16652                         continue;
16653                 /* Prepare actions list and create policy rules. */
16654                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16655                         mtr_policy->sub_policys[i][0], i)) {
16656                         DRV_LOG(ERR, "Failed to create policy action "
16657                                 "list per domain.");
16658                         return -1;
16659                 }
16660         }
16661         return 0;
16662 }
16663
16664 static int
16665 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16666 {
16667         struct mlx5_priv *priv = dev->data->dev_private;
16668         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16669         struct mlx5_flow_meter_def_policy *def_policy;
16670         struct mlx5_flow_tbl_resource *jump_tbl;
16671         struct mlx5_flow_tbl_data_entry *tbl_data;
16672         uint8_t egress, transfer;
16673         struct rte_flow_error error;
16674         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16675         int ret;
16676
16677         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16678         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16679         def_policy = mtrmng->def_policy[domain];
16680         if (!def_policy) {
16681                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16682                         sizeof(struct mlx5_flow_meter_def_policy),
16683                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16684                 if (!def_policy) {
16685                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16686                         goto def_policy_error;
16687                 }
16688                 mtrmng->def_policy[domain] = def_policy;
16689                 /* Create the meter suffix table with SUFFIX level. */
16690                 jump_tbl = flow_dv_tbl_resource_get(dev,
16691                                 MLX5_FLOW_TABLE_LEVEL_METER,
16692                                 egress, transfer, false, NULL, 0,
16693                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16694                 if (!jump_tbl) {
16695                         DRV_LOG(ERR,
16696                                 "Failed to create meter suffix table.");
16697                         goto def_policy_error;
16698                 }
16699                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16700                 tbl_data = container_of(jump_tbl,
16701                                         struct mlx5_flow_tbl_data_entry, tbl);
16702                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16703                                                 tbl_data->jump.action;
16704                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16705                 acts[RTE_COLOR_GREEN].actions_n = 1;
16706                 /*
16707                  * YELLOW has the same default policy as GREEN does.
16708                  * G & Y share the same table and action. The 2nd time of table
16709                  * resource getting is just to update the reference count for
16710                  * the releasing stage.
16711                  */
16712                 jump_tbl = flow_dv_tbl_resource_get(dev,
16713                                 MLX5_FLOW_TABLE_LEVEL_METER,
16714                                 egress, transfer, false, NULL, 0,
16715                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16716                 if (!jump_tbl) {
16717                         DRV_LOG(ERR,
16718                                 "Failed to get meter suffix table.");
16719                         goto def_policy_error;
16720                 }
16721                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16722                 tbl_data = container_of(jump_tbl,
16723                                         struct mlx5_flow_tbl_data_entry, tbl);
16724                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16725                                                 tbl_data->jump.action;
16726                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16727                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16728                 /* Create jump action to the drop table. */
16729                 if (!mtrmng->drop_tbl[domain]) {
16730                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16731                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16732                                  egress, transfer, false, NULL, 0,
16733                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16734                         if (!mtrmng->drop_tbl[domain]) {
16735                                 DRV_LOG(ERR, "Failed to create meter "
16736                                         "drop table for default policy.");
16737                                 goto def_policy_error;
16738                         }
16739                 }
16740                 /* all RED: unique Drop table for jump action. */
16741                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16742                                         struct mlx5_flow_tbl_data_entry, tbl);
16743                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16744                                                 tbl_data->jump.action;
16745                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16746                 acts[RTE_COLOR_RED].actions_n = 1;
16747                 /* Create default policy rules. */
16748                 ret = __flow_dv_create_domain_policy_rules(dev,
16749                                         &def_policy->sub_policy,
16750                                         egress, transfer, false, acts);
16751                 if (ret) {
16752                         DRV_LOG(ERR, "Failed to create default policy rules.");
16753                         goto def_policy_error;
16754                 }
16755         }
16756         return 0;
16757 def_policy_error:
16758         __flow_dv_destroy_domain_def_policy(dev,
16759                                             (enum mlx5_meter_domain)domain);
16760         return -1;
16761 }
16762
16763 /**
16764  * Create the default policy table set.
16765  *
16766  * @param[in] dev
16767  *   Pointer to Ethernet device.
16768  * @return
16769  *   0 on success, -1 otherwise.
16770  */
16771 static int
16772 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16773 {
16774         struct mlx5_priv *priv = dev->data->dev_private;
16775         int i;
16776
16777         /* Non-termination policy table. */
16778         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16779                 if (!priv->sh->config.dv_esw_en &&
16780                     i == MLX5_MTR_DOMAIN_TRANSFER)
16781                         continue;
16782                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16783                         DRV_LOG(ERR, "Failed to create default policy");
16784                         /* Rollback the created default policies for others. */
16785                         flow_dv_destroy_def_policy(dev);
16786                         return -1;
16787                 }
16788         }
16789         return 0;
16790 }
16791
16792 /**
16793  * Create the needed meter tables.
16794  * Lock free, (mutex should be acquired by caller).
16795  *
16796  * @param[in] dev
16797  *   Pointer to Ethernet device.
16798  * @param[in] fm
16799  *   Meter information table.
16800  * @param[in] mtr_idx
16801  *   Meter index.
16802  * @param[in] domain_bitmap
16803  *   Domain bitmap.
16804  * @return
16805  *   0 on success, -1 otherwise.
16806  */
16807 static int
16808 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16809                         struct mlx5_flow_meter_info *fm,
16810                         uint32_t mtr_idx,
16811                         uint8_t domain_bitmap)
16812 {
16813         struct mlx5_priv *priv = dev->data->dev_private;
16814         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16815         struct rte_flow_error error;
16816         struct mlx5_flow_tbl_data_entry *tbl_data;
16817         uint8_t egress, transfer;
16818         void *actions[METER_ACTIONS];
16819         int domain, ret, i;
16820         struct mlx5_flow_counter *cnt;
16821         struct mlx5_flow_dv_match_params value = {
16822                 .size = sizeof(value.buf),
16823         };
16824         struct mlx5_flow_dv_match_params matcher_para = {
16825                 .size = sizeof(matcher_para.buf),
16826         };
16827         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16828                                                      0, &error);
16829         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16830         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16831         struct mlx5_list_entry *entry;
16832         struct mlx5_flow_dv_matcher matcher = {
16833                 .mask = {
16834                         .size = sizeof(matcher.mask.buf),
16835                 },
16836         };
16837         struct mlx5_flow_dv_matcher *drop_matcher;
16838         struct mlx5_flow_cb_ctx ctx = {
16839                 .error = &error,
16840                 .data = &matcher,
16841         };
16842         uint8_t misc_mask;
16843
16844         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16845                 rte_errno = ENOTSUP;
16846                 return -1;
16847         }
16848         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16849                 if (!(domain_bitmap & (1 << domain)) ||
16850                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16851                         continue;
16852                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16853                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16854                 /* Create the drop table with METER DROP level. */
16855                 if (!mtrmng->drop_tbl[domain]) {
16856                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16857                                         MLX5_FLOW_TABLE_LEVEL_METER,
16858                                         egress, transfer, false, NULL, 0,
16859                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16860                         if (!mtrmng->drop_tbl[domain]) {
16861                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16862                                 goto policy_error;
16863                         }
16864                 }
16865                 /* Create default matcher in drop table. */
16866                 matcher.tbl = mtrmng->drop_tbl[domain],
16867                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16868                                 struct mlx5_flow_tbl_data_entry, tbl);
16869                 if (!mtrmng->def_matcher[domain]) {
16870                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16871                                        (enum modify_reg)mtr_id_reg_c,
16872                                        0, 0);
16873                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16874                         matcher.crc = rte_raw_cksum
16875                                         ((const void *)matcher.mask.buf,
16876                                         matcher.mask.size);
16877                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16878                         if (!entry) {
16879                                 DRV_LOG(ERR, "Failed to register meter "
16880                                 "drop default matcher.");
16881                                 goto policy_error;
16882                         }
16883                         mtrmng->def_matcher[domain] = container_of(entry,
16884                         struct mlx5_flow_dv_matcher, entry);
16885                 }
16886                 /* Create default rule in drop table. */
16887                 if (!mtrmng->def_rule[domain]) {
16888                         i = 0;
16889                         actions[i++] = priv->sh->dr_drop_action;
16890                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16891                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16892                         misc_mask = flow_dv_matcher_enable(value.buf);
16893                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16894                         ret = mlx5_flow_os_create_flow
16895                                 (mtrmng->def_matcher[domain]->matcher_object,
16896                                 (void *)&value, i, actions,
16897                                 &mtrmng->def_rule[domain]);
16898                         if (ret) {
16899                                 DRV_LOG(ERR, "Failed to create meter "
16900                                 "default drop rule for drop table.");
16901                                 goto policy_error;
16902                         }
16903                 }
16904                 if (!fm->drop_cnt)
16905                         continue;
16906                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16907                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16908                         /* Create matchers for Drop. */
16909                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16910                                         (enum modify_reg)mtr_id_reg_c, 0,
16911                                         (mtr_id_mask << mtr_id_offset));
16912                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16913                         matcher.crc = rte_raw_cksum
16914                                         ((const void *)matcher.mask.buf,
16915                                         matcher.mask.size);
16916                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16917                         if (!entry) {
16918                                 DRV_LOG(ERR,
16919                                 "Failed to register meter drop matcher.");
16920                                 goto policy_error;
16921                         }
16922                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16923                                 container_of(entry, struct mlx5_flow_dv_matcher,
16924                                              entry);
16925                 }
16926                 drop_matcher =
16927                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16928                 /* Create drop rule, matching meter_id only. */
16929                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16930                                 (enum modify_reg)mtr_id_reg_c,
16931                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16932                 i = 0;
16933                 cnt = flow_dv_counter_get_by_idx(dev,
16934                                         fm->drop_cnt, NULL);
16935                 actions[i++] = cnt->action;
16936                 actions[i++] = priv->sh->dr_drop_action;
16937                 misc_mask = flow_dv_matcher_enable(value.buf);
16938                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16939                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16940                                                (void *)&value, i, actions,
16941                                                &fm->drop_rule[domain]);
16942                 if (ret) {
16943                         DRV_LOG(ERR, "Failed to create meter "
16944                                 "drop rule for drop table.");
16945                                 goto policy_error;
16946                 }
16947         }
16948         return 0;
16949 policy_error:
16950         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16951                 if (fm->drop_rule[i]) {
16952                         claim_zero(mlx5_flow_os_destroy_flow
16953                                 (fm->drop_rule[i]));
16954                         fm->drop_rule[i] = NULL;
16955                 }
16956         }
16957         return -1;
16958 }
16959
16960 static struct mlx5_flow_meter_sub_policy *
16961 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16962                 struct mlx5_flow_meter_policy *mtr_policy,
16963                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16964                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16965                 bool *is_reuse)
16966 {
16967         struct mlx5_priv *priv = dev->data->dev_private;
16968         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16969         uint32_t sub_policy_idx = 0;
16970         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16971         uint32_t i, j;
16972         struct mlx5_hrxq *hrxq;
16973         struct mlx5_flow_handle dh;
16974         struct mlx5_meter_policy_action_container *act_cnt;
16975         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16976         uint16_t sub_policy_num;
16977         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
16978
16979         MLX5_ASSERT(wks);
16980         rte_spinlock_lock(&mtr_policy->sl);
16981         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16982                 if (!rss_desc[i])
16983                         continue;
16984                 hrxq = mlx5_hrxq_get(dev, rss_desc[i]);
16985                 if (!hrxq) {
16986                         rte_spinlock_unlock(&mtr_policy->sl);
16987                         return NULL;
16988                 }
16989                 hrxq_idx[i] = hrxq->idx;
16990         }
16991         sub_policy_num = (mtr_policy->sub_policy_num >>
16992                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16993                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16994         for (j = 0; j < sub_policy_num; j++) {
16995                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16996                         if (rss_desc[i] &&
16997                             hrxq_idx[i] !=
16998                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16999                                 break;
17000                 }
17001                 if (i >= MLX5_MTR_RTE_COLORS) {
17002                         /*
17003                          * Found the sub policy table with
17004                          * the same queue per color.
17005                          */
17006                         rte_spinlock_unlock(&mtr_policy->sl);
17007                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
17008                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
17009                         *is_reuse = true;
17010                         return mtr_policy->sub_policys[domain][j];
17011                 }
17012         }
17013         /* Create sub policy. */
17014         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
17015                 /* Reuse the first pre-allocated sub_policy. */
17016                 sub_policy = mtr_policy->sub_policys[domain][0];
17017                 sub_policy_idx = sub_policy->idx;
17018         } else {
17019                 sub_policy = mlx5_ipool_zmalloc
17020                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17021                                  &sub_policy_idx);
17022                 if (!sub_policy ||
17023                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
17024                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
17025                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
17026                         goto rss_sub_policy_error;
17027                 }
17028                 sub_policy->idx = sub_policy_idx;
17029                 sub_policy->main_policy = mtr_policy;
17030         }
17031         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17032                 if (!rss_desc[i])
17033                         continue;
17034                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
17035                 if (mtr_policy->is_hierarchy) {
17036                         act_cnt = &mtr_policy->act_cnt[i];
17037                         act_cnt->next_sub_policy = next_sub_policy;
17038                         mlx5_hrxq_release(dev, hrxq_idx[i]);
17039                 } else {
17040                         /*
17041                          * Overwrite the last action from
17042                          * RSS action to Queue action.
17043                          */
17044                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
17045                                               hrxq_idx[i]);
17046                         if (!hrxq) {
17047                                 DRV_LOG(ERR, "Failed to get policy hrxq");
17048                                 goto rss_sub_policy_error;
17049                         }
17050                         act_cnt = &mtr_policy->act_cnt[i];
17051                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
17052                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
17053                                 if (act_cnt->rix_mark)
17054                                         wks->mark = 1;
17055                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
17056                                 dh.rix_hrxq = hrxq_idx[i];
17057                                 flow_drv_rxq_flags_set(dev, &dh);
17058                         }
17059                 }
17060         }
17061         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
17062                                                sub_policy, domain)) {
17063                 DRV_LOG(ERR, "Failed to create policy "
17064                         "rules for ingress domain.");
17065                 goto rss_sub_policy_error;
17066         }
17067         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17068                 i = (mtr_policy->sub_policy_num >>
17069                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17070                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17071                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
17072                         DRV_LOG(ERR, "No free sub-policy slot.");
17073                         goto rss_sub_policy_error;
17074                 }
17075                 mtr_policy->sub_policys[domain][i] = sub_policy;
17076                 i++;
17077                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17078                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17079                 mtr_policy->sub_policy_num |=
17080                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17081                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17082         }
17083         rte_spinlock_unlock(&mtr_policy->sl);
17084         *is_reuse = false;
17085         return sub_policy;
17086 rss_sub_policy_error:
17087         if (sub_policy) {
17088                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17089                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17090                         i = (mtr_policy->sub_policy_num >>
17091                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17092                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17093                         mtr_policy->sub_policys[domain][i] = NULL;
17094                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17095                                         sub_policy->idx);
17096                 }
17097         }
17098         rte_spinlock_unlock(&mtr_policy->sl);
17099         return NULL;
17100 }
17101
17102 /**
17103  * Find the policy table for prefix table with RSS.
17104  *
17105  * @param[in] dev
17106  *   Pointer to Ethernet device.
17107  * @param[in] mtr_policy
17108  *   Pointer to meter policy table.
17109  * @param[in] rss_desc
17110  *   Pointer to rss_desc
17111  * @return
17112  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
17113  */
17114 static struct mlx5_flow_meter_sub_policy *
17115 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
17116                 struct mlx5_flow_meter_policy *mtr_policy,
17117                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
17118 {
17119         struct mlx5_priv *priv = dev->data->dev_private;
17120         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17121         struct mlx5_flow_meter_info *next_fm;
17122         struct mlx5_flow_meter_policy *next_policy;
17123         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
17124         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
17125         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
17126         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17127         bool reuse_sub_policy;
17128         uint32_t i = 0;
17129         uint32_t j = 0;
17130
17131         while (true) {
17132                 /* Iterate hierarchy to get all policies in this hierarchy. */
17133                 policies[i++] = mtr_policy;
17134                 if (!mtr_policy->is_hierarchy)
17135                         break;
17136                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
17137                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
17138                         return NULL;
17139                 }
17140                 next_fm = mlx5_flow_meter_find(priv,
17141                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17142                 if (!next_fm) {
17143                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
17144                         return NULL;
17145                 }
17146                 next_policy =
17147                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
17148                                                     NULL);
17149                 MLX5_ASSERT(next_policy);
17150                 mtr_policy = next_policy;
17151         }
17152         while (i) {
17153                 /**
17154                  * From last policy to the first one in hierarchy,
17155                  * create / get the sub policy for each of them.
17156                  */
17157                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
17158                                                         policies[--i],
17159                                                         rss_desc,
17160                                                         next_sub_policy,
17161                                                         &reuse_sub_policy);
17162                 if (!sub_policy) {
17163                         DRV_LOG(ERR, "Failed to get the sub policy.");
17164                         goto err_exit;
17165                 }
17166                 if (!reuse_sub_policy)
17167                         sub_policies[j++] = sub_policy;
17168                 next_sub_policy = sub_policy;
17169         }
17170         return sub_policy;
17171 err_exit:
17172         while (j) {
17173                 uint16_t sub_policy_num;
17174
17175                 sub_policy = sub_policies[--j];
17176                 mtr_policy = sub_policy->main_policy;
17177                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17178                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17179                         sub_policy_num = (mtr_policy->sub_policy_num >>
17180                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17181                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
17182                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
17183                                                                         NULL;
17184                         sub_policy_num--;
17185                         mtr_policy->sub_policy_num &=
17186                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17187                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
17188                         mtr_policy->sub_policy_num |=
17189                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17190                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
17191                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17192                                         sub_policy->idx);
17193                 }
17194         }
17195         return NULL;
17196 }
17197
17198 /**
17199  * Create the sub policy tag rule for all meters in hierarchy.
17200  *
17201  * @param[in] dev
17202  *   Pointer to Ethernet device.
17203  * @param[in] fm
17204  *   Meter information table.
17205  * @param[in] src_port
17206  *   The src port this extra rule should use.
17207  * @param[in] item
17208  *   The src port match item.
17209  * @param[out] error
17210  *   Perform verbose error reporting if not NULL.
17211  * @return
17212  *   0 on success, a negative errno value otherwise and rte_errno is set.
17213  */
17214 static int
17215 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
17216                                 struct mlx5_flow_meter_info *fm,
17217                                 int32_t src_port,
17218                                 const struct rte_flow_item *item,
17219                                 struct rte_flow_error *error)
17220 {
17221         struct mlx5_priv *priv = dev->data->dev_private;
17222         struct mlx5_flow_meter_policy *mtr_policy;
17223         struct mlx5_flow_meter_sub_policy *sub_policy;
17224         struct mlx5_flow_meter_info *next_fm = NULL;
17225         struct mlx5_flow_meter_policy *next_policy;
17226         struct mlx5_flow_meter_sub_policy *next_sub_policy;
17227         struct mlx5_flow_tbl_data_entry *tbl_data;
17228         struct mlx5_sub_policy_color_rule *color_rule;
17229         struct mlx5_meter_policy_acts acts;
17230         uint32_t color_reg_c_idx;
17231         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
17232         struct rte_flow_attr attr = {
17233                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
17234                 .priority = 0,
17235                 .ingress = 0,
17236                 .egress = 0,
17237                 .transfer = 1,
17238                 .reserved = 0,
17239         };
17240         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17241         int i;
17242
17243         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17244         MLX5_ASSERT(mtr_policy);
17245         if (!mtr_policy->is_hierarchy)
17246                 return 0;
17247         next_fm = mlx5_flow_meter_find(priv,
17248                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17249         if (!next_fm) {
17250                 return rte_flow_error_set(error, EINVAL,
17251                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
17252                                 "Failed to find next meter in hierarchy.");
17253         }
17254         if (!next_fm->drop_cnt)
17255                 goto exit;
17256         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
17257         sub_policy = mtr_policy->sub_policys[domain][0];
17258         for (i = 0; i < RTE_COLORS; i++) {
17259                 bool rule_exist = false;
17260                 struct mlx5_meter_policy_action_container *act_cnt;
17261
17262                 if (i >= RTE_COLOR_YELLOW)
17263                         break;
17264                 TAILQ_FOREACH(color_rule,
17265                               &sub_policy->color_rules[i], next_port)
17266                         if (color_rule->src_port == src_port) {
17267                                 rule_exist = true;
17268                                 break;
17269                         }
17270                 if (rule_exist)
17271                         continue;
17272                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
17273                                 sizeof(struct mlx5_sub_policy_color_rule),
17274                                 0, SOCKET_ID_ANY);
17275                 if (!color_rule)
17276                         return rte_flow_error_set(error, ENOMEM,
17277                                 RTE_FLOW_ERROR_TYPE_ACTION,
17278                                 NULL, "No memory to create tag color rule.");
17279                 color_rule->src_port = src_port;
17280                 attr.priority = i;
17281                 next_policy = mlx5_flow_meter_policy_find(dev,
17282                                                 next_fm->policy_id, NULL);
17283                 MLX5_ASSERT(next_policy);
17284                 next_sub_policy = next_policy->sub_policys[domain][0];
17285                 tbl_data = container_of(next_sub_policy->tbl_rsc,
17286                                         struct mlx5_flow_tbl_data_entry, tbl);
17287                 act_cnt = &mtr_policy->act_cnt[i];
17288                 if (mtr_first) {
17289                         acts.dv_actions[0] = next_fm->meter_action;
17290                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
17291                 } else {
17292                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
17293                         acts.dv_actions[1] = next_fm->meter_action;
17294                 }
17295                 acts.dv_actions[2] = tbl_data->jump.action;
17296                 acts.actions_n = 3;
17297                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17298                         next_fm = NULL;
17299                         goto err_exit;
17300                 }
17301                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17302                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17303                                 &attr, true, item,
17304                                 &color_rule->matcher, error)) {
17305                         rte_flow_error_set(error, errno,
17306                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17307                                 "Failed to create hierarchy meter matcher.");
17308                         goto err_exit;
17309                 }
17310                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17311                                         (enum rte_color)i,
17312                                         color_rule->matcher->matcher_object,
17313                                         acts.actions_n, acts.dv_actions,
17314                                         true, item,
17315                                         &color_rule->rule, &attr)) {
17316                         rte_flow_error_set(error, errno,
17317                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17318                                 "Failed to create hierarchy meter rule.");
17319                         goto err_exit;
17320                 }
17321                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17322                                   color_rule, next_port);
17323         }
17324 exit:
17325         /**
17326          * Recursive call to iterate all meters in hierarchy and
17327          * create needed rules.
17328          */
17329         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17330                                                 src_port, item, error);
17331 err_exit:
17332         if (color_rule) {
17333                 if (color_rule->rule)
17334                         mlx5_flow_os_destroy_flow(color_rule->rule);
17335                 if (color_rule->matcher) {
17336                         struct mlx5_flow_tbl_data_entry *tbl =
17337                                 container_of(color_rule->matcher->tbl,
17338                                                 typeof(*tbl), tbl);
17339                         mlx5_list_unregister(tbl->matchers,
17340                                                 &color_rule->matcher->entry);
17341                 }
17342                 mlx5_free(color_rule);
17343         }
17344         if (next_fm)
17345                 mlx5_flow_meter_detach(priv, next_fm);
17346         return -rte_errno;
17347 }
17348
17349 /**
17350  * Destroy the sub policy table with RX queue.
17351  *
17352  * @param[in] dev
17353  *   Pointer to Ethernet device.
17354  * @param[in] mtr_policy
17355  *   Pointer to meter policy table.
17356  */
17357 static void
17358 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17359                                     struct mlx5_flow_meter_policy *mtr_policy)
17360 {
17361         struct mlx5_priv *priv = dev->data->dev_private;
17362         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17363         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17364         uint32_t i, j;
17365         uint16_t sub_policy_num, new_policy_num;
17366
17367         rte_spinlock_lock(&mtr_policy->sl);
17368         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17369                 switch (mtr_policy->act_cnt[i].fate_action) {
17370                 case MLX5_FLOW_FATE_SHARED_RSS:
17371                         sub_policy_num = (mtr_policy->sub_policy_num >>
17372                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17373                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17374                         new_policy_num = sub_policy_num;
17375                         for (j = 0; j < sub_policy_num; j++) {
17376                                 sub_policy =
17377                                         mtr_policy->sub_policys[domain][j];
17378                                 if (sub_policy) {
17379                                         __flow_dv_destroy_sub_policy_rules(dev,
17380                                                 sub_policy);
17381                                 if (sub_policy !=
17382                                         mtr_policy->sub_policys[domain][0]) {
17383                                         mtr_policy->sub_policys[domain][j] =
17384                                                                 NULL;
17385                                         mlx5_ipool_free
17386                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17387                                                 sub_policy->idx);
17388                                                 new_policy_num--;
17389                                         }
17390                                 }
17391                         }
17392                         if (new_policy_num != sub_policy_num) {
17393                                 mtr_policy->sub_policy_num &=
17394                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17395                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17396                                 mtr_policy->sub_policy_num |=
17397                                 (new_policy_num &
17398                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17399                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17400                         }
17401                         break;
17402                 case MLX5_FLOW_FATE_QUEUE:
17403                         sub_policy = mtr_policy->sub_policys[domain][0];
17404                         __flow_dv_destroy_sub_policy_rules(dev,
17405                                                            sub_policy);
17406                         break;
17407                 default:
17408                         /*Other actions without queue and do nothing*/
17409                         break;
17410                 }
17411         }
17412         rte_spinlock_unlock(&mtr_policy->sl);
17413 }
17414 /**
17415  * Check whether the DR drop action is supported on the root table or not.
17416  *
17417  * Create a simple flow with DR drop action on root table to validate
17418  * if DR drop action on root table is supported or not.
17419  *
17420  * @param[in] dev
17421  *   Pointer to rte_eth_dev structure.
17422  *
17423  * @return
17424  *   0 on success, a negative errno value otherwise and rte_errno is set.
17425  */
17426 int
17427 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17428 {
17429         struct mlx5_priv *priv = dev->data->dev_private;
17430         struct mlx5_dev_ctx_shared *sh = priv->sh;
17431         struct mlx5_flow_dv_match_params mask = {
17432                 .size = sizeof(mask.buf),
17433         };
17434         struct mlx5_flow_dv_match_params value = {
17435                 .size = sizeof(value.buf),
17436         };
17437         struct mlx5dv_flow_matcher_attr dv_attr = {
17438                 .type = IBV_FLOW_ATTR_NORMAL,
17439                 .priority = 0,
17440                 .match_criteria_enable = 0,
17441                 .match_mask = (void *)&mask,
17442         };
17443         struct mlx5_flow_tbl_resource *tbl = NULL;
17444         void *matcher = NULL;
17445         void *flow = NULL;
17446         int ret = -1;
17447
17448         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17449                                         0, 0, 0, NULL);
17450         if (!tbl)
17451                 goto err;
17452         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17453         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17454         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17455                                                tbl->obj, &matcher);
17456         if (ret)
17457                 goto err;
17458         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17459         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17460                                        &sh->dr_drop_action, &flow);
17461 err:
17462         /*
17463          * If DR drop action is not supported on root table, flow create will
17464          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17465          */
17466         if (!flow) {
17467                 if (matcher &&
17468                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17469                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17470                 else
17471                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17472                 ret = -1;
17473         } else {
17474                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17475         }
17476         if (matcher)
17477                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17478         if (tbl)
17479                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17480         return ret;
17481 }
17482
17483 /**
17484  * Validate the batch counter support in root table.
17485  *
17486  * Create a simple flow with invalid counter and drop action on root table to
17487  * validate if batch counter with offset on root table is supported or not.
17488  *
17489  * @param[in] dev
17490  *   Pointer to rte_eth_dev structure.
17491  *
17492  * @return
17493  *   0 on success, a negative errno value otherwise and rte_errno is set.
17494  */
17495 int
17496 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17497 {
17498         struct mlx5_priv *priv = dev->data->dev_private;
17499         struct mlx5_dev_ctx_shared *sh = priv->sh;
17500         struct mlx5_flow_dv_match_params mask = {
17501                 .size = sizeof(mask.buf),
17502         };
17503         struct mlx5_flow_dv_match_params value = {
17504                 .size = sizeof(value.buf),
17505         };
17506         struct mlx5dv_flow_matcher_attr dv_attr = {
17507                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17508                 .priority = 0,
17509                 .match_criteria_enable = 0,
17510                 .match_mask = (void *)&mask,
17511         };
17512         void *actions[2] = { 0 };
17513         struct mlx5_flow_tbl_resource *tbl = NULL;
17514         struct mlx5_devx_obj *dcs = NULL;
17515         void *matcher = NULL;
17516         void *flow = NULL;
17517         int ret = -1;
17518
17519         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17520                                         0, 0, 0, NULL);
17521         if (!tbl)
17522                 goto err;
17523         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17524         if (!dcs)
17525                 goto err;
17526         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17527                                                     &actions[0]);
17528         if (ret)
17529                 goto err;
17530         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17531         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17532         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17533                                                tbl->obj, &matcher);
17534         if (ret)
17535                 goto err;
17536         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17537         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17538                                        actions, &flow);
17539 err:
17540         /*
17541          * If batch counter with offset is not supported, the driver will not
17542          * validate the invalid offset value, flow create should success.
17543          * In this case, it means batch counter is not supported in root table.
17544          *
17545          * Otherwise, if flow create is failed, counter offset is supported.
17546          */
17547         if (flow) {
17548                 DRV_LOG(INFO, "Batch counter is not supported in root "
17549                               "table. Switch to fallback mode.");
17550                 rte_errno = ENOTSUP;
17551                 ret = -rte_errno;
17552                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17553         } else {
17554                 /* Check matcher to make sure validate fail at flow create. */
17555                 if (!matcher || (matcher && errno != EINVAL))
17556                         DRV_LOG(ERR, "Unexpected error in counter offset "
17557                                      "support detection");
17558                 ret = 0;
17559         }
17560         if (actions[0])
17561                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17562         if (matcher)
17563                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17564         if (tbl)
17565                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17566         if (dcs)
17567                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17568         return ret;
17569 }
17570
17571 /**
17572  * Query a devx counter.
17573  *
17574  * @param[in] dev
17575  *   Pointer to the Ethernet device structure.
17576  * @param[in] cnt
17577  *   Index to the flow counter.
17578  * @param[in] clear
17579  *   Set to clear the counter statistics.
17580  * @param[out] pkts
17581  *   The statistics value of packets.
17582  * @param[out] bytes
17583  *   The statistics value of bytes.
17584  *
17585  * @return
17586  *   0 on success, otherwise return -1.
17587  */
17588 static int
17589 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17590                       uint64_t *pkts, uint64_t *bytes, void **action)
17591 {
17592         struct mlx5_priv *priv = dev->data->dev_private;
17593         struct mlx5_flow_counter *cnt;
17594         uint64_t inn_pkts, inn_bytes;
17595         int ret;
17596
17597         if (!priv->sh->cdev->config.devx)
17598                 return -1;
17599
17600         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17601         if (ret)
17602                 return -1;
17603         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17604         if (cnt && action)
17605                 *action = cnt->action;
17606
17607         *pkts = inn_pkts - cnt->hits;
17608         *bytes = inn_bytes - cnt->bytes;
17609         if (clear) {
17610                 cnt->hits = inn_pkts;
17611                 cnt->bytes = inn_bytes;
17612         }
17613         return 0;
17614 }
17615
17616 /**
17617  * Get aged-out flows.
17618  *
17619  * @param[in] dev
17620  *   Pointer to the Ethernet device structure.
17621  * @param[in] context
17622  *   The address of an array of pointers to the aged-out flows contexts.
17623  * @param[in] nb_contexts
17624  *   The length of context array pointers.
17625  * @param[out] error
17626  *   Perform verbose error reporting if not NULL. Initialized in case of
17627  *   error only.
17628  *
17629  * @return
17630  *   how many contexts get in success, otherwise negative errno value.
17631  *   if nb_contexts is 0, return the amount of all aged contexts.
17632  *   if nb_contexts is not 0 , return the amount of aged flows reported
17633  *   in the context array.
17634  * @note: only stub for now
17635  */
17636 static int
17637 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17638                     void **context,
17639                     uint32_t nb_contexts,
17640                     struct rte_flow_error *error)
17641 {
17642         struct mlx5_priv *priv = dev->data->dev_private;
17643         struct mlx5_age_info *age_info;
17644         struct mlx5_age_param *age_param;
17645         struct mlx5_flow_counter *counter;
17646         struct mlx5_aso_age_action *act;
17647         int nb_flows = 0;
17648
17649         if (nb_contexts && !context)
17650                 return rte_flow_error_set(error, EINVAL,
17651                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17652                                           NULL, "empty context");
17653         age_info = GET_PORT_AGE_INFO(priv);
17654         rte_spinlock_lock(&age_info->aged_sl);
17655         LIST_FOREACH(act, &age_info->aged_aso, next) {
17656                 nb_flows++;
17657                 if (nb_contexts) {
17658                         context[nb_flows - 1] =
17659                                                 act->age_params.context;
17660                         if (!(--nb_contexts))
17661                                 break;
17662                 }
17663         }
17664         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17665                 nb_flows++;
17666                 if (nb_contexts) {
17667                         age_param = MLX5_CNT_TO_AGE(counter);
17668                         context[nb_flows - 1] = age_param->context;
17669                         if (!(--nb_contexts))
17670                                 break;
17671                 }
17672         }
17673         rte_spinlock_unlock(&age_info->aged_sl);
17674         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17675         return nb_flows;
17676 }
17677
17678 /*
17679  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17680  */
17681 static uint32_t
17682 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17683 {
17684         return flow_dv_counter_alloc(dev, 0);
17685 }
17686
17687 /**
17688  * Validate indirect action.
17689  * Dispatcher for action type specific validation.
17690  *
17691  * @param[in] dev
17692  *   Pointer to the Ethernet device structure.
17693  * @param[in] conf
17694  *   Indirect action configuration.
17695  * @param[in] action
17696  *   The indirect action object to validate.
17697  * @param[out] error
17698  *   Perform verbose error reporting if not NULL. Initialized in case of
17699  *   error only.
17700  *
17701  * @return
17702  *   0 on success, otherwise negative errno value.
17703  */
17704 int
17705 flow_dv_action_validate(struct rte_eth_dev *dev,
17706                         const struct rte_flow_indir_action_conf *conf,
17707                         const struct rte_flow_action *action,
17708                         struct rte_flow_error *err)
17709 {
17710         struct mlx5_priv *priv = dev->data->dev_private;
17711
17712         RTE_SET_USED(conf);
17713         switch (action->type) {
17714         case RTE_FLOW_ACTION_TYPE_RSS:
17715                 /*
17716                  * priv->obj_ops is set according to driver capabilities.
17717                  * When DevX capabilities are
17718                  * sufficient, it is set to devx_obj_ops.
17719                  * Otherwise, it is set to ibv_obj_ops.
17720                  * ibv_obj_ops doesn't support ind_table_modify operation.
17721                  * In this case the indirect RSS action can't be used.
17722                  */
17723                 if (priv->obj_ops.ind_table_modify == NULL)
17724                         return rte_flow_error_set
17725                                         (err, ENOTSUP,
17726                                          RTE_FLOW_ERROR_TYPE_ACTION,
17727                                          NULL,
17728                                          "Indirect RSS action not supported");
17729                 return mlx5_validate_action_rss(dev, action, err);
17730         case RTE_FLOW_ACTION_TYPE_AGE:
17731                 if (!priv->sh->aso_age_mng)
17732                         return rte_flow_error_set(err, ENOTSUP,
17733                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17734                                                 NULL,
17735                                                 "Indirect age action not supported");
17736                 return flow_dv_validate_action_age(0, action, dev, err);
17737         case RTE_FLOW_ACTION_TYPE_COUNT:
17738                 return flow_dv_validate_action_count(dev, true, 0, NULL, err);
17739         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17740                 if (!priv->sh->ct_aso_en)
17741                         return rte_flow_error_set(err, ENOTSUP,
17742                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17743                                         "ASO CT is not supported");
17744                 return mlx5_validate_action_ct(dev, action->conf, err);
17745         default:
17746                 return rte_flow_error_set(err, ENOTSUP,
17747                                           RTE_FLOW_ERROR_TYPE_ACTION,
17748                                           NULL,
17749                                           "action type not supported");
17750         }
17751 }
17752
17753 /*
17754  * Check if the RSS configurations for colors of a meter policy match
17755  * each other, except the queues.
17756  *
17757  * @param[in] r1
17758  *   Pointer to the first RSS flow action.
17759  * @param[in] r2
17760  *   Pointer to the second RSS flow action.
17761  *
17762  * @return
17763  *   0 on match, 1 on conflict.
17764  */
17765 static inline int
17766 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17767                                const struct rte_flow_action_rss *r2)
17768 {
17769         if (r1 == NULL || r2 == NULL)
17770                 return 0;
17771         if (!(r1->level <= 1 && r2->level <= 1) &&
17772             !(r1->level > 1 && r2->level > 1))
17773                 return 1;
17774         if (r1->types != r2->types &&
17775             !((r1->types == 0 || r1->types == RTE_ETH_RSS_IP) &&
17776               (r2->types == 0 || r2->types == RTE_ETH_RSS_IP)))
17777                 return 1;
17778         if (r1->key || r2->key) {
17779                 const void *key1 = r1->key ? r1->key : rss_hash_default_key;
17780                 const void *key2 = r2->key ? r2->key : rss_hash_default_key;
17781
17782                 if (memcmp(key1, key2, MLX5_RSS_HASH_KEY_LEN))
17783                         return 1;
17784         }
17785         return 0;
17786 }
17787
17788 /**
17789  * Validate the meter hierarchy chain for meter policy.
17790  *
17791  * @param[in] dev
17792  *   Pointer to the Ethernet device structure.
17793  * @param[in] meter_id
17794  *   Meter id.
17795  * @param[in] action_flags
17796  *   Holds the actions detected until now.
17797  * @param[out] is_rss
17798  *   Is RSS or not.
17799  * @param[out] hierarchy_domain
17800  *   The domain bitmap for hierarchy policy.
17801  * @param[out] error
17802  *   Perform verbose error reporting if not NULL. Initialized in case of
17803  *   error only.
17804  *
17805  * @return
17806  *   0 on success, otherwise negative errno value with error set.
17807  */
17808 static int
17809 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17810                                   uint32_t meter_id,
17811                                   uint64_t action_flags,
17812                                   bool *is_rss,
17813                                   uint8_t *hierarchy_domain,
17814                                   struct rte_mtr_error *error)
17815 {
17816         struct mlx5_priv *priv = dev->data->dev_private;
17817         struct mlx5_flow_meter_info *fm;
17818         struct mlx5_flow_meter_policy *policy;
17819         uint8_t cnt = 1;
17820
17821         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17822                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17823                 return -rte_mtr_error_set(error, EINVAL,
17824                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17825                                         NULL,
17826                                         "Multiple fate actions not supported.");
17827         *hierarchy_domain = 0;
17828         while (true) {
17829                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17830                 if (!fm)
17831                         return -rte_mtr_error_set(error, EINVAL,
17832                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17833                                         "Meter not found in meter hierarchy.");
17834                 if (fm->def_policy)
17835                         return -rte_mtr_error_set(error, EINVAL,
17836                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17837                         "Non termination meter not supported in hierarchy.");
17838                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17839                 MLX5_ASSERT(policy);
17840                 /**
17841                  * Only inherit the supported domains of the first meter in
17842                  * hierarchy.
17843                  * One meter supports at least one domain.
17844                  */
17845                 if (!*hierarchy_domain) {
17846                         if (policy->transfer)
17847                                 *hierarchy_domain |=
17848                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17849                         if (policy->ingress)
17850                                 *hierarchy_domain |=
17851                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17852                         if (policy->egress)
17853                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17854                 }
17855                 if (!policy->is_hierarchy) {
17856                         *is_rss = policy->is_rss;
17857                         break;
17858                 }
17859                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17860                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17861                         return -rte_mtr_error_set(error, EINVAL,
17862                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17863                                         "Exceed max hierarchy meter number.");
17864         }
17865         return 0;
17866 }
17867
17868 /**
17869  * Validate meter policy actions.
17870  * Dispatcher for action type specific validation.
17871  *
17872  * @param[in] dev
17873  *   Pointer to the Ethernet device structure.
17874  * @param[in] action
17875  *   The meter policy action object to validate.
17876  * @param[in] attr
17877  *   Attributes of flow to determine steering domain.
17878  * @param[out] error
17879  *   Perform verbose error reporting if not NULL. Initialized in case of
17880  *   error only.
17881  *
17882  * @return
17883  *   0 on success, otherwise negative errno value.
17884  */
17885 static int
17886 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17887                         const struct rte_flow_action *actions[RTE_COLORS],
17888                         struct rte_flow_attr *attr,
17889                         bool *is_rss,
17890                         uint8_t *domain_bitmap,
17891                         uint8_t *policy_mode,
17892                         struct rte_mtr_error *error)
17893 {
17894         struct mlx5_priv *priv = dev->data->dev_private;
17895         struct mlx5_sh_config *dev_conf = &priv->sh->config;
17896         const struct rte_flow_action *act;
17897         uint64_t action_flags[RTE_COLORS] = {0};
17898         int actions_n;
17899         int i, ret;
17900         struct rte_flow_error flow_err;
17901         uint8_t domain_color[RTE_COLORS] = {0};
17902         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17903         uint8_t hierarchy_domain = 0;
17904         const struct rte_flow_action_meter *mtr;
17905         bool def_green = false;
17906         bool def_yellow = false;
17907         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17908
17909         if (!dev_conf->dv_esw_en)
17910                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17911         *domain_bitmap = def_domain;
17912         /* Red color could only support DROP action. */
17913         if (!actions[RTE_COLOR_RED] ||
17914             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17915                 return -rte_mtr_error_set(error, ENOTSUP,
17916                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17917                                 NULL, "Red color only supports drop action.");
17918         /*
17919          * Check default policy actions:
17920          * Green / Yellow: no action, Red: drop action
17921          * Either G or Y will trigger default policy actions to be created.
17922          */
17923         if (!actions[RTE_COLOR_GREEN] ||
17924             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17925                 def_green = true;
17926         if (!actions[RTE_COLOR_YELLOW] ||
17927             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17928                 def_yellow = true;
17929         if (def_green && def_yellow) {
17930                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17931                 return 0;
17932         } else if (!def_green && def_yellow) {
17933                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17934         } else if (def_green && !def_yellow) {
17935                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17936         } else {
17937                 *policy_mode = MLX5_MTR_POLICY_MODE_ALL;
17938         }
17939         /* Set to empty string in case of NULL pointer access by user. */
17940         flow_err.message = "";
17941         for (i = 0; i < RTE_COLORS; i++) {
17942                 act = actions[i];
17943                 for (action_flags[i] = 0, actions_n = 0;
17944                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17945                      act++) {
17946                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17947                                 return -rte_mtr_error_set(error, ENOTSUP,
17948                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17949                                           NULL, "too many actions");
17950                         switch (act->type) {
17951                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17952                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17953                                 if (!dev_conf->dv_esw_en)
17954                                         return -rte_mtr_error_set(error,
17955                                         ENOTSUP,
17956                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17957                                         NULL, "PORT action validate check"
17958                                         " fail for ESW disable");
17959                                 ret = flow_dv_validate_action_port_id(dev,
17960                                                 action_flags[i],
17961                                                 act, attr, &flow_err);
17962                                 if (ret)
17963                                         return -rte_mtr_error_set(error,
17964                                         ENOTSUP,
17965                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17966                                         NULL, flow_err.message ?
17967                                         flow_err.message :
17968                                         "PORT action validate check fail");
17969                                 ++actions_n;
17970                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17971                                 break;
17972                         case RTE_FLOW_ACTION_TYPE_MARK:
17973                                 ret = flow_dv_validate_action_mark(dev, act,
17974                                                            action_flags[i],
17975                                                            attr, &flow_err);
17976                                 if (ret < 0)
17977                                         return -rte_mtr_error_set(error,
17978                                         ENOTSUP,
17979                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17980                                         NULL, flow_err.message ?
17981                                         flow_err.message :
17982                                         "Mark action validate check fail");
17983                                 if (dev_conf->dv_xmeta_en !=
17984                                         MLX5_XMETA_MODE_LEGACY)
17985                                         return -rte_mtr_error_set(error,
17986                                         ENOTSUP,
17987                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17988                                         NULL, "Extend MARK action is "
17989                                         "not supported. Please try use "
17990                                         "default policy for meter.");
17991                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17992                                 ++actions_n;
17993                                 break;
17994                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17995                                 ret = flow_dv_validate_action_set_tag(dev,
17996                                                         act, action_flags[i],
17997                                                         attr, &flow_err);
17998                                 if (ret)
17999                                         return -rte_mtr_error_set(error,
18000                                         ENOTSUP,
18001                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18002                                         NULL, flow_err.message ?
18003                                         flow_err.message :
18004                                         "Set tag action validate check fail");
18005                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
18006                                 ++actions_n;
18007                                 break;
18008                         case RTE_FLOW_ACTION_TYPE_DROP:
18009                                 ret = mlx5_flow_validate_action_drop
18010                                         (action_flags[i], attr, &flow_err);
18011                                 if (ret < 0)
18012                                         return -rte_mtr_error_set(error,
18013                                         ENOTSUP,
18014                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18015                                         NULL, flow_err.message ?
18016                                         flow_err.message :
18017                                         "Drop action validate check fail");
18018                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
18019                                 ++actions_n;
18020                                 break;
18021                         case RTE_FLOW_ACTION_TYPE_QUEUE:
18022                                 /*
18023                                  * Check whether extensive
18024                                  * metadata feature is engaged.
18025                                  */
18026                                 if (dev_conf->dv_flow_en &&
18027                                     (dev_conf->dv_xmeta_en !=
18028                                      MLX5_XMETA_MODE_LEGACY) &&
18029                                     mlx5_flow_ext_mreg_supported(dev))
18030                                         return -rte_mtr_error_set(error,
18031                                           ENOTSUP,
18032                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18033                                           NULL, "Queue action with meta "
18034                                           "is not supported. Please try use "
18035                                           "default policy for meter.");
18036                                 ret = mlx5_flow_validate_action_queue(act,
18037                                                         action_flags[i], dev,
18038                                                         attr, &flow_err);
18039                                 if (ret < 0)
18040                                         return -rte_mtr_error_set(error,
18041                                           ENOTSUP,
18042                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18043                                           NULL, flow_err.message ?
18044                                           flow_err.message :
18045                                           "Queue action validate check fail");
18046                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
18047                                 ++actions_n;
18048                                 break;
18049                         case RTE_FLOW_ACTION_TYPE_RSS:
18050                                 if (dev_conf->dv_flow_en &&
18051                                     (dev_conf->dv_xmeta_en !=
18052                                      MLX5_XMETA_MODE_LEGACY) &&
18053                                     mlx5_flow_ext_mreg_supported(dev))
18054                                         return -rte_mtr_error_set(error,
18055                                           ENOTSUP,
18056                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18057                                           NULL, "RSS action with meta "
18058                                           "is not supported. Please try use "
18059                                           "default policy for meter.");
18060                                 ret = mlx5_validate_action_rss(dev, act,
18061                                                                &flow_err);
18062                                 if (ret < 0)
18063                                         return -rte_mtr_error_set(error,
18064                                           ENOTSUP,
18065                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18066                                           NULL, flow_err.message ?
18067                                           flow_err.message :
18068                                           "RSS action validate check fail");
18069                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
18070                                 ++actions_n;
18071                                 /* Either G or Y will set the RSS. */
18072                                 rss_color[i] = act->conf;
18073                                 break;
18074                         case RTE_FLOW_ACTION_TYPE_JUMP:
18075                                 ret = flow_dv_validate_action_jump(dev,
18076                                         NULL, act, action_flags[i],
18077                                         attr, true, &flow_err);
18078                                 if (ret)
18079                                         return -rte_mtr_error_set(error,
18080                                           ENOTSUP,
18081                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18082                                           NULL, flow_err.message ?
18083                                           flow_err.message :
18084                                           "Jump action validate check fail");
18085                                 ++actions_n;
18086                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
18087                                 break;
18088                         /*
18089                          * Only the last meter in the hierarchy will support
18090                          * the YELLOW color steering. Then in the meter policy
18091                          * actions list, there should be no other meter inside.
18092                          */
18093                         case RTE_FLOW_ACTION_TYPE_METER:
18094                                 if (i != RTE_COLOR_GREEN)
18095                                         return -rte_mtr_error_set(error,
18096                                                 ENOTSUP,
18097                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18098                                                 NULL,
18099                                                 "Meter hierarchy only supports GREEN color.");
18100                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
18101                                         return -rte_mtr_error_set(error,
18102                                                 ENOTSUP,
18103                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18104                                                 NULL,
18105                                                 "No yellow policy should be provided in meter hierarchy.");
18106                                 mtr = act->conf;
18107                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
18108                                                         mtr->mtr_id,
18109                                                         action_flags[i],
18110                                                         is_rss,
18111                                                         &hierarchy_domain,
18112                                                         error);
18113                                 if (ret)
18114                                         return ret;
18115                                 ++actions_n;
18116                                 action_flags[i] |=
18117                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
18118                                 break;
18119                         default:
18120                                 return -rte_mtr_error_set(error, ENOTSUP,
18121                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18122                                         NULL,
18123                                         "Doesn't support optional action");
18124                         }
18125                 }
18126                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
18127                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
18128                 } else if ((action_flags[i] &
18129                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
18130                           (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
18131                         /*
18132                          * Only support MLX5_XMETA_MODE_LEGACY
18133                          * so MARK action is only in ingress domain.
18134                          */
18135                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
18136                 } else {
18137                         domain_color[i] = def_domain;
18138                         if (action_flags[i] &&
18139                             !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18140                                 domain_color[i] &=
18141                                 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
18142                 }
18143                 if (action_flags[i] &
18144                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
18145                         domain_color[i] &= hierarchy_domain;
18146                 /*
18147                  * Non-termination actions only support NIC Tx domain.
18148                  * The adjustion should be skipped when there is no
18149                  * action or only END is provided. The default domains
18150                  * bit-mask is set to find the MIN intersection.
18151                  * The action flags checking should also be skipped.
18152                  */
18153                 if ((def_green && i == RTE_COLOR_GREEN) ||
18154                     (def_yellow && i == RTE_COLOR_YELLOW))
18155                         continue;
18156                 /*
18157                  * Validate the drop action mutual exclusion
18158                  * with other actions. Drop action is mutually-exclusive
18159                  * with any other action, except for Count action.
18160                  */
18161                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
18162                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
18163                         return -rte_mtr_error_set(error, ENOTSUP,
18164                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18165                                 NULL, "Drop action is mutually-exclusive "
18166                                 "with any other action");
18167                 }
18168                 /* Eswitch has few restrictions on using items and actions */
18169                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
18170                         if (!mlx5_flow_ext_mreg_supported(dev) &&
18171                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
18172                                 return -rte_mtr_error_set(error, ENOTSUP,
18173                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18174                                         NULL, "unsupported action MARK");
18175                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
18176                                 return -rte_mtr_error_set(error, ENOTSUP,
18177                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18178                                         NULL, "unsupported action QUEUE");
18179                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
18180                                 return -rte_mtr_error_set(error, ENOTSUP,
18181                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18182                                         NULL, "unsupported action RSS");
18183                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18184                                 return -rte_mtr_error_set(error, ENOTSUP,
18185                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18186                                         NULL, "no fate action is found");
18187                 } else {
18188                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
18189                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
18190                                 if ((domain_color[i] &
18191                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
18192                                         domain_color[i] =
18193                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
18194                                 else
18195                                         return -rte_mtr_error_set(error,
18196                                                 ENOTSUP,
18197                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18198                                                 NULL,
18199                                                 "no fate action is found");
18200                         }
18201                 }
18202         }
18203         /* If both colors have RSS, the attributes should be the same. */
18204         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
18205                                            rss_color[RTE_COLOR_YELLOW]))
18206                 return -rte_mtr_error_set(error, EINVAL,
18207                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18208                                           NULL, "policy RSS attr conflict");
18209         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
18210                 *is_rss = true;
18211         /* "domain_color[C]" is non-zero for each color, default is ALL. */
18212         if (!def_green && !def_yellow &&
18213             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
18214             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
18215             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
18216                 return -rte_mtr_error_set(error, EINVAL,
18217                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18218                                           NULL, "policy domains conflict");
18219         /*
18220          * At least one color policy is listed in the actions, the domains
18221          * to be supported should be the intersection.
18222          */
18223         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
18224                          domain_color[RTE_COLOR_YELLOW];
18225         return 0;
18226 }
18227
18228 static int
18229 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
18230 {
18231         struct mlx5_priv *priv = dev->data->dev_private;
18232         int ret = 0;
18233
18234         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
18235                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
18236                                                 flags);
18237                 if (ret != 0)
18238                         return ret;
18239         }
18240         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
18241                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
18242                 if (ret != 0)
18243                         return ret;
18244         }
18245         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
18246                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
18247                 if (ret != 0)
18248                         return ret;
18249         }
18250         return 0;
18251 }
18252
18253 /**
18254  * Discover the number of available flow priorities
18255  * by trying to create a flow with the highest priority value
18256  * for each possible number.
18257  *
18258  * @param[in] dev
18259  *   Ethernet device.
18260  * @param[in] vprio
18261  *   List of possible number of available priorities.
18262  * @param[in] vprio_n
18263  *   Size of @p vprio array.
18264  * @return
18265  *   On success, number of available flow priorities.
18266  *   On failure, a negative errno-style code and rte_errno is set.
18267  */
18268 static int
18269 flow_dv_discover_priorities(struct rte_eth_dev *dev,
18270                             const uint16_t *vprio, int vprio_n)
18271 {
18272         struct mlx5_priv *priv = dev->data->dev_private;
18273         struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
18274         struct rte_flow_item_eth eth;
18275         struct rte_flow_item item = {
18276                 .type = RTE_FLOW_ITEM_TYPE_ETH,
18277                 .spec = &eth,
18278                 .mask = &eth,
18279         };
18280         struct mlx5_flow_dv_matcher matcher = {
18281                 .mask = {
18282                         .size = sizeof(matcher.mask.buf),
18283                 },
18284         };
18285         union mlx5_flow_tbl_key tbl_key;
18286         struct mlx5_flow flow;
18287         void *action;
18288         struct rte_flow_error error;
18289         uint8_t misc_mask;
18290         int i, err, ret = -ENOTSUP;
18291
18292         /*
18293          * Prepare a flow with a catch-all pattern and a drop action.
18294          * Use drop queue, because shared drop action may be unavailable.
18295          */
18296         action = priv->drop_queue.hrxq->action;
18297         if (action == NULL) {
18298                 DRV_LOG(ERR, "Priority discovery requires a drop action");
18299                 rte_errno = ENOTSUP;
18300                 return -rte_errno;
18301         }
18302         memset(&flow, 0, sizeof(flow));
18303         flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
18304         if (flow.handle == NULL) {
18305                 DRV_LOG(ERR, "Cannot create flow handle");
18306                 rte_errno = ENOMEM;
18307                 return -rte_errno;
18308         }
18309         flow.ingress = true;
18310         flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
18311         flow.dv.actions[0] = action;
18312         flow.dv.actions_n = 1;
18313         memset(&eth, 0, sizeof(eth));
18314         flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
18315                                    &item, /* inner */ false, /* group */ 0);
18316         matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
18317         for (i = 0; i < vprio_n; i++) {
18318                 /* Configure the next proposed maximum priority. */
18319                 matcher.priority = vprio[i] - 1;
18320                 memset(&tbl_key, 0, sizeof(tbl_key));
18321                 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18322                                                /* tunnel */ NULL,
18323                                                /* group */ 0,
18324                                                &error);
18325                 if (err != 0) {
18326                         /* This action is pure SW and must always succeed. */
18327                         DRV_LOG(ERR, "Cannot register matcher");
18328                         ret = -rte_errno;
18329                         break;
18330                 }
18331                 /* Try to apply the flow to HW. */
18332                 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18333                 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18334                 err = mlx5_flow_os_create_flow
18335                                 (flow.handle->dvh.matcher->matcher_object,
18336                                  (void *)&flow.dv.value, flow.dv.actions_n,
18337                                  flow.dv.actions, &flow.handle->drv_flow);
18338                 if (err == 0) {
18339                         claim_zero(mlx5_flow_os_destroy_flow
18340                                                 (flow.handle->drv_flow));
18341                         flow.handle->drv_flow = NULL;
18342                 }
18343                 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18344                 if (err != 0)
18345                         break;
18346                 ret = vprio[i];
18347         }
18348         mlx5_ipool_free(pool, flow.handle_idx);
18349         /* Set rte_errno if no expected priority value matched. */
18350         if (ret < 0)
18351                 rte_errno = -ret;
18352         return ret;
18353 }
18354
18355 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18356         .validate = flow_dv_validate,
18357         .prepare = flow_dv_prepare,
18358         .translate = flow_dv_translate,
18359         .apply = flow_dv_apply,
18360         .remove = flow_dv_remove,
18361         .destroy = flow_dv_destroy,
18362         .query = flow_dv_query,
18363         .create_mtr_tbls = flow_dv_create_mtr_tbls,
18364         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18365         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18366         .create_meter = flow_dv_mtr_alloc,
18367         .free_meter = flow_dv_aso_mtr_release_to_pool,
18368         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18369         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18370         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18371         .create_policy_rules = flow_dv_create_policy_rules,
18372         .destroy_policy_rules = flow_dv_destroy_policy_rules,
18373         .create_def_policy = flow_dv_create_def_policy,
18374         .destroy_def_policy = flow_dv_destroy_def_policy,
18375         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18376         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18377         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18378         .counter_alloc = flow_dv_counter_allocate,
18379         .counter_free = flow_dv_counter_free,
18380         .counter_query = flow_dv_counter_query,
18381         .get_aged_flows = flow_dv_get_aged_flows,
18382         .action_validate = flow_dv_action_validate,
18383         .action_create = flow_dv_action_create,
18384         .action_destroy = flow_dv_action_destroy,
18385         .action_update = flow_dv_action_update,
18386         .action_query = flow_dv_action_query,
18387         .sync_domain = flow_dv_sync_domain,
18388         .discover_priorities = flow_dv_discover_priorities,
18389         .item_create = flow_dv_item_create,
18390         .item_release = flow_dv_item_release,
18391 };
18392
18393 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */