1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
6 #include <rte_eal_memconfig.h>
7 #include <rte_mempool.h>
8 #include <rte_malloc.h>
9 #include <rte_rwlock.h>
10 #include <rte_bus_pci.h>
12 #include <mlx5_common_mp.h>
13 #include <mlx5_common_mr.h>
17 #include "mlx5_rxtx.h"
21 struct mr_find_contig_memsegs_data {
25 const struct rte_memseg_list *msl;
28 struct mr_update_mp_data {
29 struct rte_eth_dev *dev;
30 struct mlx5_mr_ctrl *mr_ctrl;
35 * Callback for memory free event. Iterate freed memsegs and check whether it
36 * belongs to an existing MR. If found, clear the bit from bitmap of MR. As a
37 * result, the MR would be fragmented. If it becomes empty, the MR will be freed
38 * later by mlx5_mr_garbage_collect(). Even if this callback is called from a
39 * secondary process, the garbage collector will be called in primary process
40 * as the secondary process can't call mlx5_mr_create().
42 * The global cache must be rebuilt if there's any change and this event has to
43 * be propagated to dataplane threads to flush the local caches.
46 * Pointer to the Ethernet device shared context.
48 * Address of freed memory.
50 * Size of freed memory.
53 mlx5_mr_mem_event_free_cb(struct mlx5_dev_ctx_shared *sh,
54 const void *addr, size_t len)
56 const struct rte_memseg_list *msl;
62 DRV_LOG(DEBUG, "device %s free callback: addr=%p, len=%zu",
63 sh->ibdev_name, addr, len);
64 msl = rte_mem_virt2memseg_list(addr);
65 /* addr and len must be page-aligned. */
66 MLX5_ASSERT((uintptr_t)addr ==
67 RTE_ALIGN((uintptr_t)addr, msl->page_sz));
68 MLX5_ASSERT(len == RTE_ALIGN(len, msl->page_sz));
69 ms_n = len / msl->page_sz;
70 rte_rwlock_write_lock(&sh->share_cache.rwlock);
71 /* Clear bits of freed memsegs from MR. */
72 for (i = 0; i < ms_n; ++i) {
73 const struct rte_memseg *ms;
74 struct mr_cache_entry entry;
79 /* Find MR having this memseg. */
80 start = (uintptr_t)addr + i * msl->page_sz;
81 mr = mlx5_mr_lookup_list(&sh->share_cache, &entry, start);
84 MLX5_ASSERT(mr->msl); /* Can't be external memory. */
85 ms = rte_mem_virt2memseg((void *)start, msl);
86 MLX5_ASSERT(ms != NULL);
87 MLX5_ASSERT(msl->page_sz == ms->hugepage_sz);
88 ms_idx = rte_fbarray_find_idx(&msl->memseg_arr, ms);
89 pos = ms_idx - mr->ms_base_idx;
90 MLX5_ASSERT(rte_bitmap_get(mr->ms_bmp, pos));
91 MLX5_ASSERT(pos < mr->ms_bmp_n);
92 DRV_LOG(DEBUG, "device %s MR(%p): clear bitmap[%u] for addr %p",
93 sh->ibdev_name, (void *)mr, pos, (void *)start);
94 rte_bitmap_clear(mr->ms_bmp, pos);
95 if (--mr->ms_n == 0) {
97 LIST_INSERT_HEAD(&sh->share_cache.mr_free_list, mr, mr);
98 DRV_LOG(DEBUG, "device %s remove MR(%p) from list",
99 sh->ibdev_name, (void *)mr);
102 * MR is fragmented or will be freed. the global cache must be
108 mlx5_mr_rebuild_cache(&sh->share_cache);
110 * No explicit wmb is needed after updating dev_gen due to
111 * store-release ordering in unlock that provides the
112 * implicit barrier at the software visible level.
114 ++sh->share_cache.dev_gen;
115 DRV_LOG(DEBUG, "broadcasting local cache flush, gen=%d",
116 sh->share_cache.dev_gen);
118 rte_rwlock_write_unlock(&sh->share_cache.rwlock);
122 * Callback for memory event. This can be called from both primary and secondary
133 mlx5_mr_mem_event_cb(enum rte_mem_event event_type, const void *addr,
134 size_t len, void *arg __rte_unused)
136 struct mlx5_dev_ctx_shared *sh;
137 struct mlx5_dev_list *dev_list = &mlx5_shared_data->mem_event_cb_list;
139 /* Must be called from the primary process. */
140 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
141 switch (event_type) {
142 case RTE_MEM_EVENT_FREE:
143 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
144 /* Iterate all the existing mlx5 devices. */
145 LIST_FOREACH(sh, dev_list, mem_event_cb)
146 mlx5_mr_mem_event_free_cb(sh, addr, len);
147 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
149 case RTE_MEM_EVENT_ALLOC:
156 * Bottom-half of LKey search on Rx.
159 * Pointer to Rx queue structure.
164 * Searched LKey on success, UINT32_MAX on no match.
167 mlx5_rx_addr2mr_bh(struct mlx5_rxq_data *rxq, uintptr_t addr)
169 struct mlx5_rxq_ctrl *rxq_ctrl =
170 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
171 struct mlx5_mr_ctrl *mr_ctrl = &rxq->mr_ctrl;
172 struct mlx5_priv *priv = rxq_ctrl->priv;
174 return mlx5_mr_addr2mr_bh(priv->sh->pd, &priv->mp_id,
175 &priv->sh->share_cache, mr_ctrl, addr,
176 priv->config.mr_ext_memseg_en);
180 * Bottom-half of LKey search on Tx.
183 * Pointer to Tx queue structure.
188 * Searched LKey on success, UINT32_MAX on no match.
191 mlx5_tx_addr2mr_bh(struct mlx5_txq_data *txq, uintptr_t addr)
193 struct mlx5_txq_ctrl *txq_ctrl =
194 container_of(txq, struct mlx5_txq_ctrl, txq);
195 struct mlx5_mr_ctrl *mr_ctrl = &txq->mr_ctrl;
196 struct mlx5_priv *priv = txq_ctrl->priv;
198 return mlx5_mr_addr2mr_bh(priv->sh->pd, &priv->mp_id,
199 &priv->sh->share_cache, mr_ctrl, addr,
200 priv->config.mr_ext_memseg_en);
204 * Bottom-half of LKey search on Tx. If it can't be searched in the memseg
205 * list, register the mempool of the mbuf as externally allocated memory.
208 * Pointer to Tx queue structure.
213 * Searched LKey on success, UINT32_MAX on no match.
216 mlx5_tx_mb2mr_bh(struct mlx5_txq_data *txq, struct rte_mbuf *mb)
218 uintptr_t addr = (uintptr_t)mb->buf_addr;
221 lkey = mlx5_tx_addr2mr_bh(txq, addr);
222 if (lkey == UINT32_MAX && rte_errno == ENXIO) {
223 /* Mempool may have externally allocated memory. */
224 return mlx5_tx_update_ext_mp(txq, addr, mlx5_mb2mp(mb));
230 * Called during rte_mempool_mem_iter() by mlx5_mr_update_ext_mp().
232 * Externally allocated chunk is registered and a MR is created for the chunk.
233 * The MR object is added to the global list. If memseg list of a MR object
234 * (mr->msl) is null, the MR object can be regarded as externally allocated
237 * Once external memory is registered, it should be static. If the memory is
238 * freed and the virtual address range has different physical memory mapped
239 * again, it may cause crash on device due to the wrong translation entry. PMD
240 * can't track the free event of the external memory for now.
243 mlx5_mr_update_ext_mp_cb(struct rte_mempool *mp, void *opaque,
244 struct rte_mempool_memhdr *memhdr,
245 unsigned mem_idx __rte_unused)
247 struct mr_update_mp_data *data = opaque;
248 struct rte_eth_dev *dev = data->dev;
249 struct mlx5_priv *priv = dev->data->dev_private;
250 struct mlx5_dev_ctx_shared *sh = priv->sh;
251 struct mlx5_mr_ctrl *mr_ctrl = data->mr_ctrl;
252 struct mlx5_mr *mr = NULL;
253 uintptr_t addr = (uintptr_t)memhdr->addr;
254 size_t len = memhdr->len;
255 struct mr_cache_entry entry;
258 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
259 /* If already registered, it should return. */
260 rte_rwlock_read_lock(&sh->share_cache.rwlock);
261 lkey = mlx5_mr_lookup_cache(&sh->share_cache, &entry, addr);
262 rte_rwlock_read_unlock(&sh->share_cache.rwlock);
263 if (lkey != UINT32_MAX)
265 DRV_LOG(DEBUG, "port %u register MR for chunk #%d of mempool (%s)",
266 dev->data->port_id, mem_idx, mp->name);
267 mr = mlx5_create_mr_ext(sh->pd, addr, len, mp->socket_id,
268 sh->share_cache.reg_mr_cb);
271 "port %u unable to allocate a new MR of"
273 dev->data->port_id, mp->name);
277 rte_rwlock_write_lock(&sh->share_cache.rwlock);
278 LIST_INSERT_HEAD(&sh->share_cache.mr_list, mr, mr);
279 /* Insert to the global cache table. */
280 mlx5_mr_insert_cache(&sh->share_cache, mr);
281 rte_rwlock_write_unlock(&sh->share_cache.rwlock);
282 /* Insert to the local cache table */
283 mlx5_mr_addr2mr_bh(sh->pd, &priv->mp_id, &sh->share_cache,
284 mr_ctrl, addr, priv->config.mr_ext_memseg_en);
288 * Finds the first ethdev that match the pci device.
289 * The existence of multiple ethdev per pci device is only with representors.
290 * On such case, it is enough to get only one of the ports as they all share
291 * the same ibv context.
294 * Pointer to the PCI device.
297 * Pointer to the ethdev if found, NULL otherwise.
299 static struct rte_eth_dev *
300 pci_dev_to_eth_dev(struct rte_pci_device *pdev)
304 port_id = rte_eth_find_next_of(0, &pdev->device);
305 if (port_id == RTE_MAX_ETHPORTS)
307 return &rte_eth_devices[port_id];
311 * DPDK callback to DMA map external memory to a PCI device.
314 * Pointer to the PCI device.
316 * Starting virtual address of memory to be mapped.
318 * Starting IOVA address of memory to be mapped.
320 * Length of memory segment being mapped.
323 * 0 on success, negative value on error.
326 mlx5_dma_map(struct rte_pci_device *pdev, void *addr,
327 uint64_t iova __rte_unused, size_t len)
329 struct rte_eth_dev *dev;
331 struct mlx5_priv *priv;
332 struct mlx5_dev_ctx_shared *sh;
334 dev = pci_dev_to_eth_dev(pdev);
336 DRV_LOG(WARNING, "unable to find matching ethdev "
337 "to PCI device %p", (void *)pdev);
341 priv = dev->data->dev_private;
343 mr = mlx5_create_mr_ext(sh->pd, (uintptr_t)addr, len, SOCKET_ID_ANY,
344 sh->share_cache.reg_mr_cb);
347 "port %u unable to dma map", dev->data->port_id);
351 rte_rwlock_write_lock(&sh->share_cache.rwlock);
352 LIST_INSERT_HEAD(&sh->share_cache.mr_list, mr, mr);
353 /* Insert to the global cache table. */
354 mlx5_mr_insert_cache(&sh->share_cache, mr);
355 rte_rwlock_write_unlock(&sh->share_cache.rwlock);
360 * DPDK callback to DMA unmap external memory to a PCI device.
363 * Pointer to the PCI device.
365 * Starting virtual address of memory to be unmapped.
367 * Starting IOVA address of memory to be unmapped.
369 * Length of memory segment being unmapped.
372 * 0 on success, negative value on error.
375 mlx5_dma_unmap(struct rte_pci_device *pdev, void *addr,
376 uint64_t iova __rte_unused, size_t len __rte_unused)
378 struct rte_eth_dev *dev;
379 struct mlx5_priv *priv;
380 struct mlx5_dev_ctx_shared *sh;
382 struct mr_cache_entry entry;
384 dev = pci_dev_to_eth_dev(pdev);
386 DRV_LOG(WARNING, "unable to find matching ethdev "
387 "to PCI device %p", (void *)pdev);
391 priv = dev->data->dev_private;
393 rte_rwlock_read_lock(&sh->share_cache.rwlock);
394 mr = mlx5_mr_lookup_list(&sh->share_cache, &entry, (uintptr_t)addr);
396 rte_rwlock_read_unlock(&sh->share_cache.rwlock);
397 DRV_LOG(WARNING, "address 0x%" PRIxPTR " wasn't registered "
398 "to PCI device %p", (uintptr_t)addr,
404 mlx5_mr_free(mr, sh->share_cache.dereg_mr_cb);
405 DRV_LOG(DEBUG, "port %u remove MR(%p) from list", dev->data->port_id,
407 mlx5_mr_rebuild_cache(&sh->share_cache);
409 * No explicit wmb is needed after updating dev_gen due to
410 * store-release ordering in unlock that provides the
411 * implicit barrier at the software visible level.
413 ++sh->share_cache.dev_gen;
414 DRV_LOG(DEBUG, "broadcasting local cache flush, gen=%d",
415 sh->share_cache.dev_gen);
416 rte_rwlock_read_unlock(&sh->share_cache.rwlock);
421 * Register MR for entire memory chunks in a Mempool having externally allocated
422 * memory and fill in local cache.
425 * Pointer to Ethernet device.
427 * Pointer to per-queue MR control structure.
429 * Pointer to registering Mempool.
432 * 0 on success, -1 on failure.
435 mlx5_mr_update_ext_mp(struct rte_eth_dev *dev, struct mlx5_mr_ctrl *mr_ctrl,
436 struct rte_mempool *mp)
438 struct mr_update_mp_data data = {
444 rte_mempool_mem_iter(mp, mlx5_mr_update_ext_mp_cb, &data);
449 * Register MR entire memory chunks in a Mempool having externally allocated
450 * memory and search LKey of the address to return.
453 * Pointer to Ethernet device.
457 * Pointer to registering Mempool where addr belongs.
460 * LKey for address on success, UINT32_MAX on failure.
463 mlx5_tx_update_ext_mp(struct mlx5_txq_data *txq, uintptr_t addr,
464 struct rte_mempool *mp)
466 struct mlx5_txq_ctrl *txq_ctrl =
467 container_of(txq, struct mlx5_txq_ctrl, txq);
468 struct mlx5_mr_ctrl *mr_ctrl = &txq->mr_ctrl;
469 struct mlx5_priv *priv = txq_ctrl->priv;
471 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
473 "port %u using address (%p) from unregistered mempool"
474 " having externally allocated memory"
475 " in secondary process, please create mempool"
476 " prior to rte_eth_dev_start()",
477 PORT_ID(priv), (void *)addr);
480 mlx5_mr_update_ext_mp(ETH_DEV(priv), mr_ctrl, mp);
481 return mlx5_tx_addr2mr_bh(txq, addr);
484 /* Called during rte_mempool_mem_iter() by mlx5_mr_update_mp(). */
486 mlx5_mr_update_mp_cb(struct rte_mempool *mp __rte_unused, void *opaque,
487 struct rte_mempool_memhdr *memhdr,
488 unsigned mem_idx __rte_unused)
490 struct mr_update_mp_data *data = opaque;
491 struct rte_eth_dev *dev = data->dev;
492 struct mlx5_priv *priv = dev->data->dev_private;
496 /* Stop iteration if failed in the previous walk. */
499 /* Register address of the chunk and update local caches. */
500 lkey = mlx5_mr_addr2mr_bh(priv->sh->pd, &priv->mp_id,
501 &priv->sh->share_cache, data->mr_ctrl,
502 (uintptr_t)memhdr->addr,
503 priv->config.mr_ext_memseg_en);
504 if (lkey == UINT32_MAX)
509 * Register entire memory chunks in a Mempool.
512 * Pointer to Ethernet device.
514 * Pointer to per-queue MR control structure.
516 * Pointer to registering Mempool.
519 * 0 on success, -1 on failure.
522 mlx5_mr_update_mp(struct rte_eth_dev *dev, struct mlx5_mr_ctrl *mr_ctrl,
523 struct rte_mempool *mp)
525 struct mr_update_mp_data data = {
530 uint32_t flags = rte_pktmbuf_priv_flags(mp);
532 if (flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF) {
534 * The pinned external buffer should be registered for DMA
535 * operations by application. The mem_list of the pool contains
536 * the list of chunks with mbuf structures w/o built-in data
537 * buffers and DMA actually does not happen there, no need
538 * to create MR for these chunks.
542 DRV_LOG(DEBUG, "Port %u Rx queue registering mp %s "
543 "having %u chunks.", dev->data->port_id,
544 mp->name, mp->nb_mem_chunks);
545 rte_mempool_mem_iter(mp, mlx5_mr_update_mp_cb, &data);
546 if (data.ret < 0 && rte_errno == ENXIO) {
547 /* Mempool may have externally allocated memory. */
548 return mlx5_mr_update_ext_mp(dev, mr_ctrl, mp);