1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2021 6WIND S.A.
3 * Copyright 2021 Mellanox Technologies, Ltd
6 #ifndef RTE_PMD_MLX5_RX_H_
7 #define RTE_PMD_MLX5_RX_H_
10 #include <sys/queue.h>
13 #include <rte_mempool.h>
14 #include <rte_common.h>
15 #include <rte_spinlock.h>
17 #include <mlx5_common_mr.h>
20 #include "mlx5_autoconf.h"
22 /* Support tunnel matching. */
23 #define MLX5_FLOW_TUNNEL 10
25 #define RXQ_PORT(rxq_ctrl) LIST_FIRST(&(rxq_ctrl)->owners)->priv
26 #define RXQ_DEV(rxq_ctrl) ETH_DEV(RXQ_PORT(rxq_ctrl))
27 #define RXQ_PORT_ID(rxq_ctrl) PORT_ID(RXQ_PORT(rxq_ctrl))
29 /* First entry must be NULL for comparison. */
30 #define mlx5_mr_btree_len(bt) ((bt)->len - 1)
32 struct mlx5_rxq_stats {
33 #ifdef MLX5_PMD_SOFT_COUNTERS
34 uint64_t ipackets; /**< Total of successfully received packets. */
35 uint64_t ibytes; /**< Total of successfully received bytes. */
37 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
38 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
41 /* Compressed CQE context. */
43 uint16_t ai; /* Array index. */
44 uint16_t ca; /* Current array index. */
45 uint16_t na; /* Next array index. */
46 uint16_t cq_ci; /* The next CQE. */
47 uint32_t cqe_cnt; /* Number of CQEs. */
50 /* Get pointer to the first stride. */
51 #define mlx5_mprq_buf_addr(ptr, strd_n) (RTE_PTR_ADD((ptr), \
52 sizeof(struct mlx5_mprq_buf) + \
54 sizeof(struct rte_mbuf_ext_shared_info) + \
55 RTE_PKTMBUF_HEADROOM))
57 #define MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES 6
58 #define MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES 9
60 enum mlx5_rxq_err_state {
61 MLX5_RXQ_ERR_STATE_NO_ERROR = 0,
62 MLX5_RXQ_ERR_STATE_NEED_RESET,
63 MLX5_RXQ_ERR_STATE_NEED_READY,
67 MLX5_RXQ_CODE_EXIT = 0,
69 MLX5_RXQ_CODE_DROPPED,
72 struct mlx5_eth_rxseg {
73 struct rte_mempool *mp; /**< Memory pool to allocate segment from. */
74 uint16_t length; /**< Segment data length, configures split point. */
75 uint16_t offset; /**< Data offset from beginning of mbuf data buffer. */
76 uint32_t reserved; /**< Reserved field. */
79 /* RX queue descriptor. */
80 struct mlx5_rxq_data {
81 unsigned int csum:1; /* Enable checksum offloading. */
82 unsigned int hw_timestamp:1; /* Enable HW timestamp. */
83 unsigned int rt_timestamp:1; /* Realtime timestamp format. */
84 unsigned int vlan_strip:1; /* Enable VLAN stripping. */
85 unsigned int crc_present:1; /* CRC must be subtracted. */
86 unsigned int sges_n:3; /* Log 2 of SGEs (max buffers per packet). */
87 unsigned int cqe_n:4; /* Log 2 of CQ elements. */
88 unsigned int elts_n:4; /* Log 2 of Mbufs. */
89 unsigned int rss_hash:1; /* RSS hash result is enabled. */
90 unsigned int mark:1; /* Marked flow available on the queue. */
91 unsigned int strd_num_n:5; /* Log 2 of the number of stride. */
92 unsigned int strd_sz_n:4; /* Log 2 of stride size. */
93 unsigned int strd_shift_en:1; /* Enable 2bytes shift on a stride. */
94 unsigned int err_state:2; /* enum mlx5_rxq_err_state. */
95 unsigned int strd_scatter_en:1; /* Scattered packets from a stride. */
96 unsigned int lro:1; /* Enable LRO. */
97 unsigned int dynf_meta:1; /* Dynamic metadata is configured. */
98 unsigned int mcqe_format:3; /* CQE compression format. */
99 unsigned int shared:1; /* Shared RXQ. */
100 unsigned int delay_drop:1; /* Enable delay drop. */
101 volatile uint32_t *rq_db;
102 volatile uint32_t *cq_db;
106 uint16_t consumed_strd; /* Number of consumed strides in WQE. */
109 uint16_t rq_repl_thresh; /* Threshold for buffer replenishment. */
112 struct rxq_zip zip; /* Compressed context. */
113 uint16_t decompressed;
114 /* Number of ready mbufs decompressed from the CQ. */
116 struct mlx5_mr_ctrl mr_ctrl; /* MR control descriptor. */
117 uint16_t mprq_max_memcpy_len; /* Maximum size of packet to memcpy. */
119 volatile struct mlx5_cqe(*cqes)[];
120 struct rte_mbuf *(*elts)[];
121 struct mlx5_mprq_buf *(*mprq_bufs)[];
122 struct rte_mempool *mp;
123 struct rte_mempool *mprq_mp; /* Mempool for Multi-Packet RQ. */
124 struct mlx5_mprq_buf *mprq_repl; /* Stashed mbuf for replenish. */
125 struct mlx5_dev_ctx_shared *sh; /* Shared context. */
126 uint16_t idx; /* Queue index. */
127 struct mlx5_rxq_stats stats;
128 rte_xmm_t mbuf_initializer; /* Default rearm/flags for vectorized Rx. */
129 struct rte_mbuf fake_mbuf; /* elts padding for vectorized Rx. */
130 void *cq_uar; /* Verbs CQ user access region. */
131 uint32_t cqn; /* CQ number. */
132 uint8_t cq_arm_sn; /* CQ arm seq number. */
134 rte_spinlock_t *uar_lock_cq;
135 /* CQ (UAR) access lock required for 32bit implementations */
137 uint32_t tunnel; /* Tunnel information. */
138 int timestamp_offset; /* Dynamic mbuf field for timestamp. */
139 uint64_t timestamp_rx_flag; /* Dynamic mbuf flag for timestamp. */
140 uint64_t flow_meta_mask;
141 int32_t flow_meta_offset;
142 uint32_t flow_meta_port_mask;
143 uint32_t rxseg_n; /* Number of split segment descriptions. */
144 struct mlx5_eth_rxseg rxseg[MLX5_MAX_RXQ_NSEG];
145 /* Buffer split segment descriptions - sizes, offsets, pools. */
146 } __rte_cache_aligned;
149 MLX5_RXQ_TYPE_STANDARD, /* Standard Rx queue. */
150 MLX5_RXQ_TYPE_HAIRPIN, /* Hairpin Rx queue. */
151 MLX5_RXQ_TYPE_UNDEFINED,
154 /* RX queue control descriptor. */
155 struct mlx5_rxq_ctrl {
156 struct mlx5_rxq_data rxq; /* Data path structure. */
157 LIST_ENTRY(mlx5_rxq_ctrl) next; /* Pointer to the next element. */
158 LIST_HEAD(priv, mlx5_rxq_priv) owners; /* Owner rxq list. */
159 struct mlx5_rxq_obj *obj; /* Verbs/DevX elements. */
160 struct mlx5_dev_ctx_shared *sh; /* Shared context. */
161 enum mlx5_rxq_type type; /* Rxq type. */
162 unsigned int socket; /* CPU socket ID for allocations. */
163 LIST_ENTRY(mlx5_rxq_ctrl) share_entry; /* Entry in shared RXQ list. */
164 uint32_t share_group; /* Group ID of shared RXQ. */
165 uint16_t share_qid; /* Shared RxQ ID in group. */
166 unsigned int started:1; /* Whether (shared) RXQ has been started. */
167 unsigned int irq:1; /* Whether IRQ is enabled. */
168 uint32_t flow_mark_n; /* Number of Mark/Flag flows using this Queue. */
169 uint32_t flow_tunnels_n[MLX5_FLOW_TUNNEL]; /* Tunnels counters. */
170 uint32_t wqn; /* WQ number. */
171 uint16_t dump_file_n; /* Number of dump files. */
174 /* RX queue private data. */
175 struct mlx5_rxq_priv {
176 uint16_t idx; /* Queue index. */
177 uint32_t refcnt; /* Reference counter. */
178 struct mlx5_rxq_ctrl *ctrl; /* Shared Rx Queue. */
179 LIST_ENTRY(mlx5_rxq_priv) owner_entry; /* Entry in shared rxq_ctrl. */
180 struct mlx5_priv *priv; /* Back pointer to private data. */
181 struct mlx5_devx_rq devx_rq;
182 struct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */
183 uint32_t hairpin_status; /* Hairpin binding status. */
188 extern uint8_t rss_hash_default_key[];
190 unsigned int mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data);
191 int mlx5_mprq_free_mp(struct rte_eth_dev *dev);
192 int mlx5_mprq_alloc_mp(struct rte_eth_dev *dev);
193 int mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id);
194 int mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id);
195 int mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t queue_id);
196 int mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t queue_id);
197 int mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
198 unsigned int socket, const struct rte_eth_rxconf *conf,
199 struct rte_mempool *mp);
200 int mlx5_rx_hairpin_queue_setup
201 (struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
202 const struct rte_eth_hairpin_conf *hairpin_conf);
203 void mlx5_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid);
204 int mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev);
205 void mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev);
206 int mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id);
207 int mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id);
208 int mlx5_rxq_obj_verify(struct rte_eth_dev *dev);
209 struct mlx5_rxq_ctrl *mlx5_rxq_new(struct rte_eth_dev *dev,
210 struct mlx5_rxq_priv *rxq,
211 uint16_t desc, unsigned int socket,
212 const struct rte_eth_rxconf *conf,
213 const struct rte_eth_rxseg_split *rx_seg,
215 struct mlx5_rxq_ctrl *mlx5_rxq_hairpin_new
216 (struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq, uint16_t desc,
217 const struct rte_eth_hairpin_conf *hairpin_conf);
218 struct mlx5_rxq_priv *mlx5_rxq_ref(struct rte_eth_dev *dev, uint16_t idx);
219 uint32_t mlx5_rxq_deref(struct rte_eth_dev *dev, uint16_t idx);
220 struct mlx5_rxq_priv *mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx);
221 struct mlx5_rxq_ctrl *mlx5_rxq_ctrl_get(struct rte_eth_dev *dev, uint16_t idx);
222 struct mlx5_rxq_data *mlx5_rxq_data_get(struct rte_eth_dev *dev, uint16_t idx);
223 int mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx);
224 int mlx5_rxq_verify(struct rte_eth_dev *dev);
225 int rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl);
226 int mlx5_ind_table_obj_verify(struct rte_eth_dev *dev);
227 struct mlx5_ind_table_obj *mlx5_ind_table_obj_get(struct rte_eth_dev *dev,
228 const uint16_t *queues,
230 int mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
231 struct mlx5_ind_table_obj *ind_tbl,
233 int mlx5_ind_table_obj_setup(struct rte_eth_dev *dev,
234 struct mlx5_ind_table_obj *ind_tbl);
235 int mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,
236 struct mlx5_ind_table_obj *ind_tbl,
237 uint16_t *queues, const uint32_t queues_n,
239 int mlx5_ind_table_obj_attach(struct rte_eth_dev *dev,
240 struct mlx5_ind_table_obj *ind_tbl);
241 int mlx5_ind_table_obj_detach(struct rte_eth_dev *dev,
242 struct mlx5_ind_table_obj *ind_tbl);
243 struct mlx5_list_entry *mlx5_hrxq_create_cb(void *tool_ctx, void *cb_ctx);
244 int mlx5_hrxq_match_cb(void *tool_ctx, struct mlx5_list_entry *entry,
246 void mlx5_hrxq_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry);
247 struct mlx5_list_entry *mlx5_hrxq_clone_cb(void *tool_ctx,
248 struct mlx5_list_entry *entry,
249 void *cb_ctx __rte_unused);
250 void mlx5_hrxq_clone_free_cb(void *tool_ctx __rte_unused,
251 struct mlx5_list_entry *entry);
252 uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,
253 struct mlx5_flow_rss_desc *rss_desc);
254 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hxrq_idx);
255 uint32_t mlx5_hrxq_verify(struct rte_eth_dev *dev);
256 enum mlx5_rxq_type mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx);
257 const struct rte_eth_hairpin_conf *mlx5_rxq_get_hairpin_conf
258 (struct rte_eth_dev *dev, uint16_t idx);
259 struct mlx5_hrxq *mlx5_drop_action_create(struct rte_eth_dev *dev);
260 void mlx5_drop_action_destroy(struct rte_eth_dev *dev);
261 uint64_t mlx5_get_rx_port_offloads(void);
262 uint64_t mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev);
263 void mlx5_rxq_timestamp_set(struct rte_eth_dev *dev);
264 int mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hxrq_idx,
265 const uint8_t *rss_key, uint32_t rss_key_len,
266 uint64_t hash_fields,
267 const uint16_t *queues, uint32_t queues_n);
271 uint16_t mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
272 void mlx5_rxq_initialize(struct mlx5_rxq_data *rxq);
273 __rte_noinline int mlx5_rx_err_handle(struct mlx5_rxq_data *rxq, uint8_t vec);
274 void mlx5_mprq_buf_free(struct mlx5_mprq_buf *buf);
275 uint16_t mlx5_rx_burst_mprq(void *dpdk_rxq, struct rte_mbuf **pkts,
277 uint16_t removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts,
279 int mlx5_rx_descriptor_status(void *rx_queue, uint16_t offset);
280 uint32_t mlx5_rx_queue_count(void *rx_queue);
281 void mlx5_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
282 struct rte_eth_rxq_info *qinfo);
283 int mlx5_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
284 struct rte_eth_burst_mode *mode);
285 int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc);
287 /* Vectorized version of mlx5_rx.c */
288 int mlx5_rxq_check_vec_support(struct mlx5_rxq_data *rxq_data);
289 int mlx5_check_vec_rx_support(struct rte_eth_dev *dev);
290 uint16_t mlx5_rx_burst_vec(void *dpdk_rxq, struct rte_mbuf **pkts,
292 uint16_t mlx5_rx_burst_mprq_vec(void *dpdk_rxq, struct rte_mbuf **pkts,
295 static int mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq);
298 * Query LKey from a packet buffer for Rx. No need to flush local caches
299 * as the Rx mempool database entries are valid for the lifetime of the queue.
302 * Pointer to Rx queue structure.
307 * Searched LKey on success, UINT32_MAX on no match.
308 * This function always succeeds on valid input.
310 static __rte_always_inline uint32_t
311 mlx5_rx_addr2mr(struct mlx5_rxq_data *rxq, uintptr_t addr)
313 struct mlx5_mr_ctrl *mr_ctrl = &rxq->mr_ctrl;
314 struct mlx5_rxq_ctrl *rxq_ctrl;
315 struct rte_mempool *mp;
318 /* Linear search on MR cache array. */
319 lkey = mlx5_mr_lookup_lkey(mr_ctrl->cache, &mr_ctrl->mru,
320 MLX5_MR_CACHE_N, addr);
321 if (likely(lkey != UINT32_MAX))
324 * Slower search in the mempool database on miss.
325 * During queue creation rxq->sh is not yet set, so we use rxq_ctrl.
327 rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);
328 mp = mlx5_rxq_mprq_enabled(rxq) ? rxq->mprq_mp : rxq->mp;
329 return mlx5_mr_mempool2mr_bh(&rxq_ctrl->sh->cdev->mr_scache,
333 #define mlx5_rx_mb2mr(rxq, mb) mlx5_rx_addr2mr(rxq, (uintptr_t)((mb)->buf_addr))
336 * Convert timestamp from HW format to linear counter
337 * from Packet Pacing Clock Queue CQE timestamp format.
340 * Pointer to the device shared context. Might be needed
341 * to convert according current device configuration.
343 * Timestamp from CQE to convert.
347 static __rte_always_inline uint64_t
348 mlx5_txpp_convert_rx_ts(struct mlx5_dev_ctx_shared *sh, uint64_t ts)
351 return (ts & UINT32_MAX) + (ts >> 32) * NS_PER_S;
355 * Set timestamp in mbuf dynamic field.
358 * Structure to write into.
360 * Dynamic field offset in mbuf structure.
364 static __rte_always_inline void
365 mlx5_timestamp_set(struct rte_mbuf *mbuf, int offset,
366 rte_mbuf_timestamp_t timestamp)
368 *RTE_MBUF_DYNFIELD(mbuf, offset, rte_mbuf_timestamp_t *) = timestamp;
372 * Replace MPRQ buffer.
375 * Pointer to Rx queue structure.
377 * RQ index to replace.
379 static __rte_always_inline void
380 mprq_buf_replace(struct mlx5_rxq_data *rxq, uint16_t rq_idx)
382 const uint32_t strd_n = 1 << rxq->strd_num_n;
383 struct mlx5_mprq_buf *rep = rxq->mprq_repl;
384 volatile struct mlx5_wqe_data_seg *wqe =
385 &((volatile struct mlx5_wqe_mprq *)rxq->wqes)[rq_idx].dseg;
386 struct mlx5_mprq_buf *buf = (*rxq->mprq_bufs)[rq_idx];
389 if (__atomic_load_n(&buf->refcnt, __ATOMIC_RELAXED) > 1) {
390 MLX5_ASSERT(rep != NULL);
391 /* Replace MPRQ buf. */
392 (*rxq->mprq_bufs)[rq_idx] = rep;
394 addr = mlx5_mprq_buf_addr(rep, strd_n);
395 wqe->addr = rte_cpu_to_be_64((uintptr_t)addr);
396 /* If there's only one MR, no need to replace LKey in WQE. */
397 if (unlikely(mlx5_mr_btree_len(&rxq->mr_ctrl.cache_bh) > 1))
398 wqe->lkey = mlx5_rx_addr2mr(rxq, (uintptr_t)addr);
399 /* Stash a mbuf for next replacement. */
400 if (likely(!rte_mempool_get(rxq->mprq_mp, (void **)&rep)))
401 rxq->mprq_repl = rep;
403 rxq->mprq_repl = NULL;
404 /* Release the old buffer. */
405 mlx5_mprq_buf_free(buf);
406 } else if (unlikely(rxq->mprq_repl == NULL)) {
407 struct mlx5_mprq_buf *rep;
410 * Currently, the MPRQ mempool is out of buffer
411 * and doing memcpy regardless of the size of Rx
412 * packet. Retry allocation to get back to
415 if (!rte_mempool_get(rxq->mprq_mp, (void **)&rep))
416 rxq->mprq_repl = rep;
421 * Attach or copy MPRQ buffer content to a packet.
424 * Pointer to Rx queue structure.
426 * Pointer to a packet to fill.
430 * Pointer to a MPRQ buffer to take the data from.
432 * Stride index to start from.
434 * Number of strides to consume.
436 static __rte_always_inline enum mlx5_rqx_code
437 mprq_buf_to_pkt(struct mlx5_rxq_data *rxq, struct rte_mbuf *pkt, uint32_t len,
438 struct mlx5_mprq_buf *buf, uint16_t strd_idx, uint16_t strd_cnt)
440 const uint32_t strd_n = 1 << rxq->strd_num_n;
441 const uint16_t strd_sz = 1 << rxq->strd_sz_n;
442 const uint16_t strd_shift =
443 MLX5_MPRQ_STRIDE_SHIFT_BYTE * rxq->strd_shift_en;
444 const int32_t hdrm_overlap =
445 len + RTE_PKTMBUF_HEADROOM - strd_cnt * strd_sz;
446 const uint32_t offset = strd_idx * strd_sz + strd_shift;
447 void *addr = RTE_PTR_ADD(mlx5_mprq_buf_addr(buf, strd_n), offset);
450 * Memcpy packets to the target mbuf if:
451 * - The size of packet is smaller than mprq_max_memcpy_len.
452 * - Out of buffer in the Mempool for Multi-Packet RQ.
453 * - The packet's stride overlaps a headroom and scatter is off.
455 if (len <= rxq->mprq_max_memcpy_len ||
456 rxq->mprq_repl == NULL ||
457 (hdrm_overlap > 0 && !rxq->strd_scatter_en)) {
459 (uint32_t)(pkt->buf_len - RTE_PKTMBUF_HEADROOM))) {
460 rte_memcpy(rte_pktmbuf_mtod(pkt, void *),
463 } else if (rxq->strd_scatter_en) {
464 struct rte_mbuf *prev = pkt;
465 uint32_t seg_len = RTE_MIN(len, (uint32_t)
466 (pkt->buf_len - RTE_PKTMBUF_HEADROOM));
467 uint32_t rem_len = len - seg_len;
469 rte_memcpy(rte_pktmbuf_mtod(pkt, void *),
471 DATA_LEN(pkt) = seg_len;
473 struct rte_mbuf *next =
474 rte_pktmbuf_alloc(rxq->mp);
476 if (unlikely(next == NULL))
477 return MLX5_RXQ_CODE_NOMBUF;
479 SET_DATA_OFF(next, 0);
480 addr = RTE_PTR_ADD(addr, seg_len);
481 seg_len = RTE_MIN(rem_len, (uint32_t)
482 (next->buf_len - RTE_PKTMBUF_HEADROOM));
484 (rte_pktmbuf_mtod(next, void *),
486 DATA_LEN(next) = seg_len;
492 return MLX5_RXQ_CODE_DROPPED;
496 struct rte_mbuf_ext_shared_info *shinfo;
497 uint16_t buf_len = strd_cnt * strd_sz;
500 /* Increment the refcnt of the whole chunk. */
501 __atomic_add_fetch(&buf->refcnt, 1, __ATOMIC_RELAXED);
502 MLX5_ASSERT(__atomic_load_n(&buf->refcnt,
503 __ATOMIC_RELAXED) <= strd_n + 1);
504 buf_addr = RTE_PTR_SUB(addr, RTE_PKTMBUF_HEADROOM);
506 * MLX5 device doesn't use iova but it is necessary in a
507 * case where the Rx packet is transmitted via a
510 buf_iova = rte_mempool_virt2iova(buf) +
511 RTE_PTR_DIFF(buf_addr, buf);
512 shinfo = &buf->shinfos[strd_idx];
513 rte_mbuf_ext_refcnt_set(shinfo, 1);
515 * RTE_MBUF_F_EXTERNAL will be set to pkt->ol_flags when
516 * attaching the stride to mbuf and more offload flags
517 * will be added below by calling rxq_cq_to_mbuf().
518 * Other fields will be overwritten.
520 rte_pktmbuf_attach_extbuf(pkt, buf_addr, buf_iova,
522 /* Set mbuf head-room. */
523 SET_DATA_OFF(pkt, RTE_PKTMBUF_HEADROOM);
524 MLX5_ASSERT(pkt->ol_flags == RTE_MBUF_F_EXTERNAL);
525 MLX5_ASSERT(rte_pktmbuf_tailroom(pkt) >=
526 len - (hdrm_overlap > 0 ? hdrm_overlap : 0));
529 * Copy the last fragment of a packet (up to headroom
530 * size bytes) in case there is a stride overlap with
531 * a next packet's headroom. Allocate a separate mbuf
532 * to store this fragment and link it. Scatter is on.
534 if (hdrm_overlap > 0) {
535 MLX5_ASSERT(rxq->strd_scatter_en);
536 struct rte_mbuf *seg =
537 rte_pktmbuf_alloc(rxq->mp);
539 if (unlikely(seg == NULL))
540 return MLX5_RXQ_CODE_NOMBUF;
541 SET_DATA_OFF(seg, 0);
542 rte_memcpy(rte_pktmbuf_mtod(seg, void *),
543 RTE_PTR_ADD(addr, len - hdrm_overlap),
545 DATA_LEN(seg) = hdrm_overlap;
546 DATA_LEN(pkt) = len - hdrm_overlap;
551 return MLX5_RXQ_CODE_EXIT;
555 * Check whether Multi-Packet RQ can be enabled for the device.
558 * Pointer to Ethernet device.
561 * 1 if supported, negative errno value if not.
563 static __rte_always_inline int
564 mlx5_check_mprq_support(struct rte_eth_dev *dev)
566 struct mlx5_priv *priv = dev->data->dev_private;
568 if (priv->config.mprq.enabled &&
569 priv->rxqs_n >= priv->config.mprq.min_rxqs_num)
575 * Check whether Multi-Packet RQ is enabled for the Rx queue.
578 * Pointer to receive queue structure.
581 * 0 if disabled, otherwise enabled.
583 static __rte_always_inline int
584 mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq)
586 return rxq->strd_num_n > 0;
590 * Check whether Multi-Packet RQ is enabled for the device.
593 * Pointer to Ethernet device.
596 * 0 if disabled, otherwise enabled.
598 static __rte_always_inline int
599 mlx5_mprq_enabled(struct rte_eth_dev *dev)
601 struct mlx5_priv *priv = dev->data->dev_private;
606 if (mlx5_check_mprq_support(dev) < 0)
608 /* All the configured queues should be enabled. */
609 for (i = 0; i < priv->rxqs_n; ++i) {
610 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
612 if (rxq_ctrl == NULL ||
613 rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
616 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
619 /* Multi-Packet RQ can't be partially configured. */
620 MLX5_ASSERT(n == 0 || n == n_ibv);
624 #endif /* RTE_PMD_MLX5_RX_H_ */