1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <rte_ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
25 #include "mlx5_defs.h"
27 #include "mlx5_rxtx.h"
28 #include "mlx5_utils.h"
29 #include "mlx5_autoconf.h"
32 /* Default RSS hash key also used for ConnectX-3. */
33 uint8_t rss_hash_default_key[] = {
34 0x2c, 0xc6, 0x81, 0xd1,
35 0x5b, 0xdb, 0xf4, 0xf7,
36 0xfc, 0xa2, 0x83, 0x19,
37 0xdb, 0x1a, 0x3e, 0x94,
38 0x6b, 0x9e, 0x38, 0xd9,
39 0x2c, 0x9c, 0x03, 0xd1,
40 0xad, 0x99, 0x44, 0xa7,
41 0xd9, 0x56, 0x3d, 0x59,
42 0x06, 0x3c, 0x25, 0xf3,
43 0xfc, 0x1f, 0xdc, 0x2a,
46 /* Length of the default RSS hash key. */
47 static_assert(MLX5_RSS_HASH_KEY_LEN ==
48 (unsigned int)sizeof(rss_hash_default_key),
49 "wrong RSS default key size.");
52 * Check whether Multi-Packet RQ can be enabled for the device.
55 * Pointer to Ethernet device.
58 * 1 if supported, negative errno value if not.
61 mlx5_check_mprq_support(struct rte_eth_dev *dev)
63 struct mlx5_priv *priv = dev->data->dev_private;
65 if (priv->config.mprq.enabled &&
66 priv->rxqs_n >= priv->config.mprq.min_rxqs_num)
72 * Check whether Multi-Packet RQ is enabled for the Rx queue.
75 * Pointer to receive queue structure.
78 * 0 if disabled, otherwise enabled.
81 mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq)
83 return rxq->strd_num_n > 0;
87 * Check whether Multi-Packet RQ is enabled for the device.
90 * Pointer to Ethernet device.
93 * 0 if disabled, otherwise enabled.
96 mlx5_mprq_enabled(struct rte_eth_dev *dev)
98 struct mlx5_priv *priv = dev->data->dev_private;
103 if (mlx5_check_mprq_support(dev) < 0)
105 /* All the configured queues should be enabled. */
106 for (i = 0; i < priv->rxqs_n; ++i) {
107 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
108 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
109 (rxq, struct mlx5_rxq_ctrl, rxq);
111 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
114 if (mlx5_rxq_mprq_enabled(rxq))
117 /* Multi-Packet RQ can't be partially configured. */
118 MLX5_ASSERT(n == 0 || n == n_ibv);
123 * Calculate the number of CQEs in CQ for the Rx queue.
126 * Pointer to receive queue structure.
129 * Number of CQEs in CQ.
132 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
135 unsigned int wqe_n = 1 << rxq_data->elts_n;
137 if (mlx5_rxq_mprq_enabled(rxq_data))
138 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
145 * Allocate RX queue elements for Multi-Packet RQ.
148 * Pointer to RX queue structure.
151 * 0 on success, a negative errno value otherwise and rte_errno is set.
154 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
156 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
157 unsigned int wqe_n = 1 << rxq->elts_n;
161 /* Iterate on segments. */
162 for (i = 0; i <= wqe_n; ++i) {
163 struct mlx5_mprq_buf *buf;
165 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
166 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
171 (*rxq->mprq_bufs)[i] = buf;
173 rxq->mprq_repl = buf;
176 "port %u MPRQ queue %u allocated and configured %u segments",
177 rxq->port_id, rxq->idx, wqe_n);
180 err = rte_errno; /* Save rte_errno before cleanup. */
182 for (i = 0; (i != wqe_n); ++i) {
183 if ((*rxq->mprq_bufs)[i] != NULL)
184 rte_mempool_put(rxq->mprq_mp,
185 (*rxq->mprq_bufs)[i]);
186 (*rxq->mprq_bufs)[i] = NULL;
188 DRV_LOG(DEBUG, "port %u MPRQ queue %u failed, freed everything",
189 rxq->port_id, rxq->idx);
190 rte_errno = err; /* Restore rte_errno. */
195 * Allocate RX queue elements for Single-Packet RQ.
198 * Pointer to RX queue structure.
201 * 0 on success, errno value on failure.
204 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
206 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
207 unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
208 (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) :
209 (1 << rxq_ctrl->rxq.elts_n);
213 /* Iterate on segments. */
214 for (i = 0; (i != elts_n); ++i) {
215 struct mlx5_eth_rxseg *seg = &rxq_ctrl->rxq.rxseg[i % sges_n];
216 struct rte_mbuf *buf;
218 buf = rte_pktmbuf_alloc(seg->mp);
220 DRV_LOG(ERR, "port %u empty mbuf pool",
221 PORT_ID(rxq_ctrl->priv));
225 /* Headroom is reserved by rte_pktmbuf_alloc(). */
226 MLX5_ASSERT(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
227 /* Buffer is supposed to be empty. */
228 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
229 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
230 MLX5_ASSERT(!buf->next);
231 SET_DATA_OFF(buf, seg->offset);
232 PORT(buf) = rxq_ctrl->rxq.port_id;
233 DATA_LEN(buf) = seg->length;
234 PKT_LEN(buf) = seg->length;
236 (*rxq_ctrl->rxq.elts)[i] = buf;
238 /* If Rx vector is activated. */
239 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
240 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
241 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
242 struct rte_pktmbuf_pool_private *priv =
243 (struct rte_pktmbuf_pool_private *)
244 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
247 /* Initialize default rearm_data for vPMD. */
248 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
249 rte_mbuf_refcnt_set(mbuf_init, 1);
250 mbuf_init->nb_segs = 1;
251 mbuf_init->port = rxq->port_id;
252 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
253 mbuf_init->ol_flags = EXT_ATTACHED_MBUF;
255 * prevent compiler reordering:
256 * rearm_data covers previous fields.
258 rte_compiler_barrier();
259 rxq->mbuf_initializer =
260 *(rte_xmm_t *)&mbuf_init->rearm_data;
261 /* Padding with a fake mbuf for vectorized Rx. */
262 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
263 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
266 "port %u SPRQ queue %u allocated and configured %u segments"
268 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
269 elts_n / (1 << rxq_ctrl->rxq.sges_n));
272 err = rte_errno; /* Save rte_errno before cleanup. */
274 for (i = 0; (i != elts_n); ++i) {
275 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
276 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
277 (*rxq_ctrl->rxq.elts)[i] = NULL;
279 DRV_LOG(DEBUG, "port %u SPRQ queue %u failed, freed everything",
280 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
281 rte_errno = err; /* Restore rte_errno. */
286 * Allocate RX queue elements.
289 * Pointer to RX queue structure.
292 * 0 on success, errno value on failure.
295 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
300 * For MPRQ we need to allocate both MPRQ buffers
301 * for WQEs and simple mbufs for vector processing.
303 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
304 ret = rxq_alloc_elts_mprq(rxq_ctrl);
305 return (ret || rxq_alloc_elts_sprq(rxq_ctrl));
309 * Free RX queue elements for Multi-Packet RQ.
312 * Pointer to RX queue structure.
315 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
317 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
320 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing %d WRs",
321 rxq->port_id, rxq->idx, (1u << rxq->elts_n));
322 if (rxq->mprq_bufs == NULL)
324 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
325 if ((*rxq->mprq_bufs)[i] != NULL)
326 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
327 (*rxq->mprq_bufs)[i] = NULL;
329 if (rxq->mprq_repl != NULL) {
330 mlx5_mprq_buf_free(rxq->mprq_repl);
331 rxq->mprq_repl = NULL;
336 * Free RX queue elements for Single-Packet RQ.
339 * Pointer to RX queue structure.
342 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
344 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
345 const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
346 (1 << rxq->elts_n) * (1 << rxq->strd_num_n) :
348 const uint16_t q_mask = q_n - 1;
349 uint16_t used = q_n - (rxq->rq_ci - rxq->rq_pi);
352 DRV_LOG(DEBUG, "port %u Rx queue %u freeing %d WRs",
353 PORT_ID(rxq_ctrl->priv), rxq->idx, q_n);
354 if (rxq->elts == NULL)
357 * Some mbuf in the Ring belongs to the application.
358 * They cannot be freed.
360 if (mlx5_rxq_check_vec_support(rxq) > 0) {
361 for (i = 0; i < used; ++i)
362 (*rxq->elts)[(rxq->rq_ci + i) & q_mask] = NULL;
363 rxq->rq_pi = rxq->rq_ci;
365 for (i = 0; i != q_n; ++i) {
366 if ((*rxq->elts)[i] != NULL)
367 rte_pktmbuf_free_seg((*rxq->elts)[i]);
368 (*rxq->elts)[i] = NULL;
373 * Free RX queue elements.
376 * Pointer to RX queue structure.
379 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
382 * For MPRQ we need to allocate both MPRQ buffers
383 * for WQEs and simple mbufs for vector processing.
385 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
386 rxq_free_elts_mprq(rxq_ctrl);
387 rxq_free_elts_sprq(rxq_ctrl);
391 * Returns the per-queue supported offloads.
394 * Pointer to Ethernet device.
397 * Supported Rx offloads.
400 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
402 struct mlx5_priv *priv = dev->data->dev_private;
403 struct mlx5_dev_config *config = &priv->config;
404 uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
405 RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT |
406 DEV_RX_OFFLOAD_TIMESTAMP |
407 DEV_RX_OFFLOAD_JUMBO_FRAME |
408 DEV_RX_OFFLOAD_RSS_HASH);
410 if (config->hw_fcs_strip)
411 offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
414 offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
415 DEV_RX_OFFLOAD_UDP_CKSUM |
416 DEV_RX_OFFLOAD_TCP_CKSUM);
417 if (config->hw_vlan_strip)
418 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
419 if (MLX5_LRO_SUPPORTED(dev))
420 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
426 * Returns the per-port supported offloads.
429 * Supported Rx offloads.
432 mlx5_get_rx_port_offloads(void)
434 uint64_t offloads = DEV_RX_OFFLOAD_VLAN_FILTER;
440 * Verify if the queue can be released.
443 * Pointer to Ethernet device.
448 * 1 if the queue can be released
449 * 0 if the queue can not be released, there are references to it.
450 * Negative errno and rte_errno is set if queue doesn't exist.
453 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
455 struct mlx5_priv *priv = dev->data->dev_private;
456 struct mlx5_rxq_ctrl *rxq_ctrl;
458 if (!(*priv->rxqs)[idx]) {
462 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
463 return (__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED) == 1);
467 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
469 rxq_sync_cq(struct mlx5_rxq_data *rxq)
471 const uint16_t cqe_n = 1 << rxq->cqe_n;
472 const uint16_t cqe_mask = cqe_n - 1;
473 volatile struct mlx5_cqe *cqe;
478 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
479 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
480 if (ret == MLX5_CQE_STATUS_HW_OWN)
482 if (ret == MLX5_CQE_STATUS_ERR) {
486 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
487 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
491 /* Compute the next non compressed CQE. */
492 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
495 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
496 for (i = 0; i < cqe_n; i++) {
497 cqe = &(*rxq->cqes)[i];
498 cqe->op_own = MLX5_CQE_INVALIDATE;
500 /* Resync CQE and WQE (WQ in RESET state). */
502 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
504 *rxq->rq_db = rte_cpu_to_be_32(0);
509 * Rx queue stop. Device queue goes to the RESET state,
510 * all involved mbufs are freed from WQ.
513 * Pointer to Ethernet device structure.
518 * 0 on success, a negative errno value otherwise and rte_errno is set.
521 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
523 struct mlx5_priv *priv = dev->data->dev_private;
524 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
525 struct mlx5_rxq_ctrl *rxq_ctrl =
526 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
529 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
530 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RDY2RST);
532 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
537 /* Remove all processes CQEs. */
539 /* Free all involved mbufs. */
540 rxq_free_elts(rxq_ctrl);
541 /* Set the actual queue state. */
542 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
547 * Rx queue stop. Device queue goes to the RESET state,
548 * all involved mbufs are freed from WQ.
551 * Pointer to Ethernet device structure.
556 * 0 on success, a negative errno value otherwise and rte_errno is set.
559 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
561 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
564 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
565 DRV_LOG(ERR, "Hairpin queue can't be stopped");
569 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
572 * Vectorized Rx burst requires the CQ and RQ indices
573 * synchronized, that might be broken on RQ restart
574 * and cause Rx malfunction, so queue stopping is
575 * not supported if vectorized Rx burst is engaged.
576 * The routine pointer depends on the process
577 * type, should perform check there.
579 if (pkt_burst == mlx5_rx_burst_vec) {
580 DRV_LOG(ERR, "Rx queue stop is not supported "
581 "for vectorized Rx");
585 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
586 ret = mlx5_mp_os_req_queue_control(dev, idx,
587 MLX5_MP_REQ_QUEUE_RX_STOP);
589 ret = mlx5_rx_queue_stop_primary(dev, idx);
595 * Rx queue start. Device queue goes to the ready state,
596 * all required mbufs are allocated and WQ is replenished.
599 * Pointer to Ethernet device structure.
604 * 0 on success, a negative errno value otherwise and rte_errno is set.
607 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
609 struct mlx5_priv *priv = dev->data->dev_private;
610 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
611 struct mlx5_rxq_ctrl *rxq_ctrl =
612 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
615 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
616 /* Allocate needed buffers. */
617 ret = rxq_alloc_elts(rxq_ctrl);
619 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
624 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
626 /* Reset RQ consumer before moving queue ro READY state. */
627 *rxq->rq_db = rte_cpu_to_be_32(0);
629 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RST2RDY);
631 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
636 /* Reinitialize RQ - set WQEs. */
637 mlx5_rxq_initialize(rxq);
638 rxq->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
639 /* Set actual queue state. */
640 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
645 * Rx queue start. Device queue goes to the ready state,
646 * all required mbufs are allocated and WQ is replenished.
649 * Pointer to Ethernet device structure.
654 * 0 on success, a negative errno value otherwise and rte_errno is set.
657 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
661 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
662 DRV_LOG(ERR, "Hairpin queue can't be started");
666 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
668 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
669 ret = mlx5_mp_os_req_queue_control(dev, idx,
670 MLX5_MP_REQ_QUEUE_RX_START);
672 ret = mlx5_rx_queue_start_primary(dev, idx);
678 * Rx queue presetup checks.
681 * Pointer to Ethernet device structure.
685 * Number of descriptors to configure in queue.
688 * 0 on success, a negative errno value otherwise and rte_errno is set.
691 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc)
693 struct mlx5_priv *priv = dev->data->dev_private;
695 if (!rte_is_power_of_2(*desc)) {
696 *desc = 1 << log2above(*desc);
698 "port %u increased number of descriptors in Rx queue %u"
699 " to the next power of two (%d)",
700 dev->data->port_id, idx, *desc);
702 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
703 dev->data->port_id, idx, *desc);
704 if (idx >= priv->rxqs_n) {
705 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
706 dev->data->port_id, idx, priv->rxqs_n);
707 rte_errno = EOVERFLOW;
710 if (!mlx5_rxq_releasable(dev, idx)) {
711 DRV_LOG(ERR, "port %u unable to release queue index %u",
712 dev->data->port_id, idx);
716 mlx5_rxq_release(dev, idx);
723 * Pointer to Ethernet device structure.
727 * Number of descriptors to configure in queue.
729 * NUMA socket on which memory must be allocated.
731 * Thresholds parameters.
733 * Memory pool for buffer allocations.
736 * 0 on success, a negative errno value otherwise and rte_errno is set.
739 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
740 unsigned int socket, const struct rte_eth_rxconf *conf,
741 struct rte_mempool *mp)
743 struct mlx5_priv *priv = dev->data->dev_private;
744 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
745 struct mlx5_rxq_ctrl *rxq_ctrl =
746 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
747 struct rte_eth_rxseg_split *rx_seg =
748 (struct rte_eth_rxseg_split *)conf->rx_seg;
749 struct rte_eth_rxseg_split rx_single = {.mp = mp};
750 uint16_t n_seg = conf->rx_nseg;
755 * The parameters should be checked on rte_eth_dev layer.
756 * If mp is specified it means the compatible configuration
757 * without buffer split feature tuning.
763 uint64_t offloads = conf->offloads |
764 dev->data->dev_conf.rxmode.offloads;
766 /* The offloads should be checked on rte_eth_dev layer. */
767 MLX5_ASSERT(offloads & DEV_RX_OFFLOAD_SCATTER);
768 if (!(offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) {
769 DRV_LOG(ERR, "port %u queue index %u split "
770 "offload not configured",
771 dev->data->port_id, idx);
775 MLX5_ASSERT(n_seg < MLX5_MAX_RXQ_NSEG);
777 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
780 rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, rx_seg, n_seg);
782 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
783 dev->data->port_id, idx);
787 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
788 dev->data->port_id, idx);
789 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
796 * Pointer to Ethernet device structure.
800 * Number of descriptors to configure in queue.
801 * @param hairpin_conf
802 * Hairpin configuration parameters.
805 * 0 on success, a negative errno value otherwise and rte_errno is set.
808 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
810 const struct rte_eth_hairpin_conf *hairpin_conf)
812 struct mlx5_priv *priv = dev->data->dev_private;
813 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
814 struct mlx5_rxq_ctrl *rxq_ctrl =
815 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
818 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
821 if (hairpin_conf->peer_count != 1) {
823 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue index %u"
824 " peer count is %u", dev->data->port_id,
825 idx, hairpin_conf->peer_count);
828 if (hairpin_conf->peers[0].port == dev->data->port_id) {
829 if (hairpin_conf->peers[0].queue >= priv->txqs_n) {
831 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
832 " index %u, Tx %u is larger than %u",
833 dev->data->port_id, idx,
834 hairpin_conf->peers[0].queue, priv->txqs_n);
838 if (hairpin_conf->manual_bind == 0 ||
839 hairpin_conf->tx_explicit == 0) {
841 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
842 " index %u peer port %u with attributes %u %u",
843 dev->data->port_id, idx,
844 hairpin_conf->peers[0].port,
845 hairpin_conf->manual_bind,
846 hairpin_conf->tx_explicit);
850 rxq_ctrl = mlx5_rxq_hairpin_new(dev, idx, desc, hairpin_conf);
852 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
853 dev->data->port_id, idx);
857 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
858 dev->data->port_id, idx);
859 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
864 * DPDK callback to release a RX queue.
867 * Generic RX queue pointer.
870 mlx5_rx_queue_release(void *dpdk_rxq)
872 struct mlx5_rxq_data *rxq = (struct mlx5_rxq_data *)dpdk_rxq;
873 struct mlx5_rxq_ctrl *rxq_ctrl;
874 struct mlx5_priv *priv;
878 rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);
879 priv = rxq_ctrl->priv;
880 if (!mlx5_rxq_releasable(ETH_DEV(priv), rxq_ctrl->rxq.idx))
881 rte_panic("port %u Rx queue %u is still used by a flow and"
882 " cannot be removed\n",
883 PORT_ID(priv), rxq->idx);
884 mlx5_rxq_release(ETH_DEV(priv), rxq_ctrl->rxq.idx);
888 * Allocate queue vector and fill epoll fd list for Rx interrupts.
891 * Pointer to Ethernet device.
894 * 0 on success, a negative errno value otherwise and rte_errno is set.
897 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
899 struct mlx5_priv *priv = dev->data->dev_private;
901 unsigned int rxqs_n = priv->rxqs_n;
902 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
903 unsigned int count = 0;
904 struct rte_intr_handle *intr_handle = dev->intr_handle;
906 if (!dev->data->dev_conf.intr_conf.rxq)
908 mlx5_rx_intr_vec_disable(dev);
909 intr_handle->intr_vec = mlx5_malloc(0,
910 n * sizeof(intr_handle->intr_vec[0]),
912 if (intr_handle->intr_vec == NULL) {
914 "port %u failed to allocate memory for interrupt"
915 " vector, Rx interrupts will not be supported",
920 intr_handle->type = RTE_INTR_HANDLE_EXT;
921 for (i = 0; i != n; ++i) {
922 /* This rxq obj must not be released in this function. */
923 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
924 struct mlx5_rxq_obj *rxq_obj = rxq_ctrl ? rxq_ctrl->obj : NULL;
927 /* Skip queues that cannot request interrupts. */
928 if (!rxq_obj || (!rxq_obj->ibv_channel &&
929 !rxq_obj->devx_channel)) {
930 /* Use invalid intr_vec[] index to disable entry. */
931 intr_handle->intr_vec[i] =
932 RTE_INTR_VEC_RXTX_OFFSET +
933 RTE_MAX_RXTX_INTR_VEC_ID;
934 /* Decrease the rxq_ctrl's refcnt */
936 mlx5_rxq_release(dev, i);
939 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
941 "port %u too many Rx queues for interrupt"
942 " vector size (%d), Rx interrupts cannot be"
944 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
945 mlx5_rx_intr_vec_disable(dev);
949 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
953 "port %u failed to make Rx interrupt file"
954 " descriptor %d non-blocking for queue index"
956 dev->data->port_id, rxq_obj->fd, i);
957 mlx5_rx_intr_vec_disable(dev);
960 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
961 intr_handle->efds[count] = rxq_obj->fd;
965 mlx5_rx_intr_vec_disable(dev);
967 intr_handle->nb_efd = count;
972 * Clean up Rx interrupts handler.
975 * Pointer to Ethernet device.
978 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
980 struct mlx5_priv *priv = dev->data->dev_private;
981 struct rte_intr_handle *intr_handle = dev->intr_handle;
983 unsigned int rxqs_n = priv->rxqs_n;
984 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
986 if (!dev->data->dev_conf.intr_conf.rxq)
988 if (!intr_handle->intr_vec)
990 for (i = 0; i != n; ++i) {
991 if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
992 RTE_MAX_RXTX_INTR_VEC_ID)
995 * Need to access directly the queue to release the reference
996 * kept in mlx5_rx_intr_vec_enable().
998 mlx5_rxq_release(dev, i);
1001 rte_intr_free_epoll_fd(intr_handle);
1002 if (intr_handle->intr_vec)
1003 mlx5_free(intr_handle->intr_vec);
1004 intr_handle->nb_efd = 0;
1005 intr_handle->intr_vec = NULL;
1009 * MLX5 CQ notification .
1012 * Pointer to receive queue structure.
1014 * Sequence number per receive queue .
1017 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
1020 uint32_t doorbell_hi;
1022 void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
1024 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
1025 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
1026 doorbell = (uint64_t)doorbell_hi << 32;
1027 doorbell |= rxq->cqn;
1028 rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
1029 mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
1030 cq_db_reg, rxq->uar_lock_cq);
1034 * DPDK callback for Rx queue interrupt enable.
1037 * Pointer to Ethernet device structure.
1038 * @param rx_queue_id
1042 * 0 on success, a negative errno value otherwise and rte_errno is set.
1045 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1047 struct mlx5_rxq_ctrl *rxq_ctrl;
1049 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
1052 if (rxq_ctrl->irq) {
1053 if (!rxq_ctrl->obj) {
1054 mlx5_rxq_release(dev, rx_queue_id);
1057 mlx5_arm_cq(&rxq_ctrl->rxq, rxq_ctrl->rxq.cq_arm_sn);
1059 mlx5_rxq_release(dev, rx_queue_id);
1067 * DPDK callback for Rx queue interrupt disable.
1070 * Pointer to Ethernet device structure.
1071 * @param rx_queue_id
1075 * 0 on success, a negative errno value otherwise and rte_errno is set.
1078 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1080 struct mlx5_priv *priv = dev->data->dev_private;
1081 struct mlx5_rxq_ctrl *rxq_ctrl;
1084 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
1091 if (rxq_ctrl->irq) {
1092 ret = priv->obj_ops.rxq_event_get(rxq_ctrl->obj);
1095 rxq_ctrl->rxq.cq_arm_sn++;
1097 mlx5_rxq_release(dev, rx_queue_id);
1101 * The ret variable may be EAGAIN which means the get_event function was
1102 * called before receiving one.
1108 ret = rte_errno; /* Save rte_errno before cleanup. */
1109 mlx5_rxq_release(dev, rx_queue_id);
1111 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1112 dev->data->port_id, rx_queue_id);
1113 rte_errno = ret; /* Restore rte_errno. */
1118 * Verify the Rx queue objects list is empty
1121 * Pointer to Ethernet device.
1124 * The number of objects not released.
1127 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1129 struct mlx5_priv *priv = dev->data->dev_private;
1131 struct mlx5_rxq_obj *rxq_obj;
1133 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1134 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1135 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1142 * Callback function to initialize mbufs for Multi-Packet RQ.
1145 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1146 void *_m, unsigned int i __rte_unused)
1148 struct mlx5_mprq_buf *buf = _m;
1149 struct rte_mbuf_ext_shared_info *shinfo;
1150 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1153 memset(_m, 0, sizeof(*buf));
1155 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1156 for (j = 0; j != strd_n; ++j) {
1157 shinfo = &buf->shinfos[j];
1158 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1159 shinfo->fcb_opaque = buf;
1164 * Free mempool of Multi-Packet RQ.
1167 * Pointer to Ethernet device.
1170 * 0 on success, negative errno value on failure.
1173 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1175 struct mlx5_priv *priv = dev->data->dev_private;
1176 struct rte_mempool *mp = priv->mprq_mp;
1181 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1182 dev->data->port_id, mp->name);
1184 * If a buffer in the pool has been externally attached to a mbuf and it
1185 * is still in use by application, destroying the Rx queue can spoil
1186 * the packet. It is unlikely to happen but if application dynamically
1187 * creates and destroys with holding Rx packets, this can happen.
1189 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1190 * RQ isn't provided by application but managed by PMD.
1192 if (!rte_mempool_full(mp)) {
1194 "port %u mempool for Multi-Packet RQ is still in use",
1195 dev->data->port_id);
1199 rte_mempool_free(mp);
1200 /* Unset mempool for each Rx queue. */
1201 for (i = 0; i != priv->rxqs_n; ++i) {
1202 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1206 rxq->mprq_mp = NULL;
1208 priv->mprq_mp = NULL;
1213 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1214 * mempool. If already allocated, reuse it if there're enough elements.
1215 * Otherwise, resize it.
1218 * Pointer to Ethernet device.
1221 * 0 on success, negative errno value on failure.
1224 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1226 struct mlx5_priv *priv = dev->data->dev_private;
1227 struct rte_mempool *mp = priv->mprq_mp;
1228 char name[RTE_MEMPOOL_NAMESIZE];
1229 unsigned int desc = 0;
1230 unsigned int buf_len;
1231 unsigned int obj_num;
1232 unsigned int obj_size;
1233 unsigned int strd_num_n = 0;
1234 unsigned int strd_sz_n = 0;
1236 unsigned int n_ibv = 0;
1238 if (!mlx5_mprq_enabled(dev))
1240 /* Count the total number of descriptors configured. */
1241 for (i = 0; i != priv->rxqs_n; ++i) {
1242 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1243 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1244 (rxq, struct mlx5_rxq_ctrl, rxq);
1246 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1249 desc += 1 << rxq->elts_n;
1250 /* Get the max number of strides. */
1251 if (strd_num_n < rxq->strd_num_n)
1252 strd_num_n = rxq->strd_num_n;
1253 /* Get the max size of a stride. */
1254 if (strd_sz_n < rxq->strd_sz_n)
1255 strd_sz_n = rxq->strd_sz_n;
1257 MLX5_ASSERT(strd_num_n && strd_sz_n);
1258 buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1259 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len + (1 << strd_num_n) *
1260 sizeof(struct rte_mbuf_ext_shared_info) + RTE_PKTMBUF_HEADROOM;
1262 * Received packets can be either memcpy'd or externally referenced. In
1263 * case that the packet is attached to an mbuf as an external buffer, as
1264 * it isn't possible to predict how the buffers will be queued by
1265 * application, there's no option to exactly pre-allocate needed buffers
1266 * in advance but to speculatively prepares enough buffers.
1268 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1269 * received packets to buffers provided by application (rxq->mp) until
1270 * this Mempool gets available again.
1273 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1275 * rte_mempool_create_empty() has sanity check to refuse large cache
1276 * size compared to the number of elements.
1277 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1278 * constant number 2 instead.
1280 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1281 /* Check a mempool is already allocated and if it can be resued. */
1282 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1283 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1284 dev->data->port_id, mp->name);
1287 } else if (mp != NULL) {
1288 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1289 dev->data->port_id, mp->name);
1291 * If failed to free, which means it may be still in use, no way
1292 * but to keep using the existing one. On buffer underrun,
1293 * packets will be memcpy'd instead of external buffer
1296 if (mlx5_mprq_free_mp(dev)) {
1297 if (mp->elt_size >= obj_size)
1303 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1304 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1305 0, NULL, NULL, mlx5_mprq_buf_init,
1306 (void *)(uintptr_t)(1 << strd_num_n),
1307 dev->device->numa_node, 0);
1310 "port %u failed to allocate a mempool for"
1311 " Multi-Packet RQ, count=%u, size=%u",
1312 dev->data->port_id, obj_num, obj_size);
1318 /* Set mempool for each Rx queue. */
1319 for (i = 0; i != priv->rxqs_n; ++i) {
1320 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1321 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1322 (rxq, struct mlx5_rxq_ctrl, rxq);
1324 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1328 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1329 dev->data->port_id);
1333 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1334 sizeof(struct rte_vlan_hdr) * 2 + \
1335 sizeof(struct rte_ipv6_hdr)))
1336 #define MAX_TCP_OPTION_SIZE 40u
1337 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1338 sizeof(struct rte_tcp_hdr) + \
1339 MAX_TCP_OPTION_SIZE))
1342 * Adjust the maximum LRO massage size.
1345 * Pointer to Ethernet device.
1348 * @param max_lro_size
1349 * The maximum size for LRO packet.
1352 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1353 uint32_t max_lro_size)
1355 struct mlx5_priv *priv = dev->data->dev_private;
1357 if (priv->config.hca_attr.lro_max_msg_sz_mode ==
1358 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1359 MLX5_MAX_TCP_HDR_OFFSET)
1360 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1361 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1362 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1363 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1364 if (priv->max_lro_msg_size)
1365 priv->max_lro_msg_size =
1366 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1368 priv->max_lro_msg_size = max_lro_size;
1370 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1371 dev->data->port_id, idx,
1372 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1376 * Create a DPDK Rx queue.
1379 * Pointer to Ethernet device.
1383 * Number of descriptors to configure in queue.
1385 * NUMA socket on which memory must be allocated.
1388 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1390 struct mlx5_rxq_ctrl *
1391 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1392 unsigned int socket, const struct rte_eth_rxconf *conf,
1393 const struct rte_eth_rxseg_split *rx_seg, uint16_t n_seg)
1395 struct mlx5_priv *priv = dev->data->dev_private;
1396 struct mlx5_rxq_ctrl *tmpl;
1397 unsigned int mb_len = rte_pktmbuf_data_room_size(rx_seg[0].mp);
1398 struct mlx5_dev_config *config = &priv->config;
1399 uint64_t offloads = conf->offloads |
1400 dev->data->dev_conf.rxmode.offloads;
1401 unsigned int lro_on_queue = !!(offloads & DEV_RX_OFFLOAD_TCP_LRO);
1402 unsigned int max_rx_pkt_len = lro_on_queue ?
1403 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1404 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1405 unsigned int non_scatter_min_mbuf_size = max_rx_pkt_len +
1406 RTE_PKTMBUF_HEADROOM;
1407 unsigned int max_lro_size = 0;
1408 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1409 const int mprq_en = mlx5_check_mprq_support(dev) > 0 && n_seg == 1 &&
1410 !rx_seg[0].offset && !rx_seg[0].length;
1411 unsigned int mprq_stride_nums = config->mprq.stride_num_n ?
1412 config->mprq.stride_num_n : MLX5_MPRQ_STRIDE_NUM_N;
1413 unsigned int mprq_stride_size = non_scatter_min_mbuf_size <=
1414 (1U << config->mprq.max_stride_size_n) ?
1415 log2above(non_scatter_min_mbuf_size) : MLX5_MPRQ_STRIDE_SIZE_N;
1416 unsigned int mprq_stride_cap = (config->mprq.stride_num_n ?
1417 (1U << config->mprq.stride_num_n) : (1U << mprq_stride_nums)) *
1418 (config->mprq.stride_size_n ?
1419 (1U << config->mprq.stride_size_n) : (1U << mprq_stride_size));
1421 * Always allocate extra slots, even if eventually
1422 * the vector Rx will not be used.
1424 uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1425 const struct rte_eth_rxseg_split *qs_seg = rx_seg;
1426 unsigned int tail_len;
1428 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl) +
1429 desc_n * sizeof(struct rte_mbuf *), 0, socket);
1434 MLX5_ASSERT(n_seg && n_seg <= MLX5_MAX_RXQ_NSEG);
1436 * Build the array of actual buffer offsets and lengths.
1437 * Pad with the buffers from the last memory pool if
1438 * needed to handle max size packets, replace zero length
1439 * with the buffer length from the pool.
1441 tail_len = max_rx_pkt_len;
1443 struct mlx5_eth_rxseg *hw_seg =
1444 &tmpl->rxq.rxseg[tmpl->rxq.rxseg_n];
1445 uint32_t buf_len, offset, seg_len;
1448 * For the buffers beyond descriptions offset is zero,
1449 * the first buffer contains head room.
1451 buf_len = rte_pktmbuf_data_room_size(qs_seg->mp);
1452 offset = (tmpl->rxq.rxseg_n >= n_seg ? 0 : qs_seg->offset) +
1453 (tmpl->rxq.rxseg_n ? 0 : RTE_PKTMBUF_HEADROOM);
1455 * For the buffers beyond descriptions the length is
1456 * pool buffer length, zero lengths are replaced with
1457 * pool buffer length either.
1459 seg_len = tmpl->rxq.rxseg_n >= n_seg ? buf_len :
1463 /* Check is done in long int, now overflows. */
1464 if (buf_len < seg_len + offset) {
1465 DRV_LOG(ERR, "port %u Rx queue %u: Split offset/length "
1466 "%u/%u can't be satisfied",
1467 dev->data->port_id, idx,
1468 qs_seg->length, qs_seg->offset);
1472 if (seg_len > tail_len)
1473 seg_len = buf_len - offset;
1474 if (++tmpl->rxq.rxseg_n > MLX5_MAX_RXQ_NSEG) {
1476 "port %u too many SGEs (%u) needed to handle"
1477 " requested maximum packet size %u, the maximum"
1478 " supported are %u", dev->data->port_id,
1479 tmpl->rxq.rxseg_n, max_rx_pkt_len,
1481 rte_errno = ENOTSUP;
1484 /* Build the actual scattering element in the queue object. */
1485 hw_seg->mp = qs_seg->mp;
1486 MLX5_ASSERT(offset <= UINT16_MAX);
1487 MLX5_ASSERT(seg_len <= UINT16_MAX);
1488 hw_seg->offset = (uint16_t)offset;
1489 hw_seg->length = (uint16_t)seg_len;
1491 * Advance the segment descriptor, the padding is the based
1492 * on the attributes of the last descriptor.
1494 if (tmpl->rxq.rxseg_n < n_seg)
1496 tail_len -= RTE_MIN(tail_len, seg_len);
1497 } while (tail_len || !rte_is_power_of_2(tmpl->rxq.rxseg_n));
1498 MLX5_ASSERT(tmpl->rxq.rxseg_n &&
1499 tmpl->rxq.rxseg_n <= MLX5_MAX_RXQ_NSEG);
1500 if (tmpl->rxq.rxseg_n > 1 && !(offloads & DEV_RX_OFFLOAD_SCATTER)) {
1501 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1502 " configured and no enough mbuf space(%u) to contain "
1503 "the maximum RX packet length(%u) with head-room(%u)",
1504 dev->data->port_id, idx, mb_len, max_rx_pkt_len,
1505 RTE_PKTMBUF_HEADROOM);
1509 tmpl->type = MLX5_RXQ_TYPE_STANDARD;
1510 if (mlx5_mr_btree_init(&tmpl->rxq.mr_ctrl.cache_bh,
1511 MLX5_MR_BTREE_CACHE_N, socket)) {
1512 /* rte_errno is already set. */
1515 tmpl->socket = socket;
1516 if (dev->data->dev_conf.intr_conf.rxq)
1519 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1520 * following conditions are met:
1521 * - MPRQ is enabled.
1522 * - The number of descs is more than the number of strides.
1523 * - max_rx_pkt_len plus overhead is less than the max size
1524 * of a stride or mprq_stride_size is specified by a user.
1525 * Need to make sure that there are enough strides to encap
1526 * the maximum packet size in case mprq_stride_size is set.
1527 * Otherwise, enable Rx scatter if necessary.
1529 if (mprq_en && desc > (1U << mprq_stride_nums) &&
1530 (non_scatter_min_mbuf_size <=
1531 (1U << config->mprq.max_stride_size_n) ||
1532 (config->mprq.stride_size_n &&
1533 non_scatter_min_mbuf_size <= mprq_stride_cap))) {
1534 /* TODO: Rx scatter isn't supported yet. */
1535 tmpl->rxq.sges_n = 0;
1536 /* Trim the number of descs needed. */
1537 desc >>= mprq_stride_nums;
1538 tmpl->rxq.strd_num_n = config->mprq.stride_num_n ?
1539 config->mprq.stride_num_n : mprq_stride_nums;
1540 tmpl->rxq.strd_sz_n = config->mprq.stride_size_n ?
1541 config->mprq.stride_size_n : mprq_stride_size;
1542 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1543 tmpl->rxq.strd_scatter_en =
1544 !!(offloads & DEV_RX_OFFLOAD_SCATTER);
1545 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1546 config->mprq.max_memcpy_len);
1547 max_lro_size = RTE_MIN(max_rx_pkt_len,
1548 (1u << tmpl->rxq.strd_num_n) *
1549 (1u << tmpl->rxq.strd_sz_n));
1551 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1552 " strd_num_n = %u, strd_sz_n = %u",
1553 dev->data->port_id, idx,
1554 tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1555 } else if (tmpl->rxq.rxseg_n == 1) {
1556 MLX5_ASSERT(max_rx_pkt_len <= first_mb_free_size);
1557 tmpl->rxq.sges_n = 0;
1558 max_lro_size = max_rx_pkt_len;
1559 } else if (offloads & DEV_RX_OFFLOAD_SCATTER) {
1560 unsigned int sges_n;
1562 if (lro_on_queue && first_mb_free_size <
1563 MLX5_MAX_LRO_HEADER_FIX) {
1564 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1565 " to include the max header size(%u) for LRO",
1566 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1567 rte_errno = ENOTSUP;
1571 * Determine the number of SGEs needed for a full packet
1572 * and round it to the next power of two.
1574 sges_n = log2above(tmpl->rxq.rxseg_n);
1575 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1577 "port %u too many SGEs (%u) needed to handle"
1578 " requested maximum packet size %u, the maximum"
1579 " supported are %u", dev->data->port_id,
1580 1 << sges_n, max_rx_pkt_len,
1581 1u << MLX5_MAX_LOG_RQ_SEGS);
1582 rte_errno = ENOTSUP;
1585 tmpl->rxq.sges_n = sges_n;
1586 max_lro_size = max_rx_pkt_len;
1588 if (config->mprq.enabled && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1590 "port %u MPRQ is requested but cannot be enabled\n"
1591 " (requested: pkt_sz = %u, desc_num = %u,"
1592 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1593 " supported: min_rxqs_num = %u,"
1594 " min_stride_sz = %u, max_stride_sz = %u).",
1595 dev->data->port_id, non_scatter_min_mbuf_size,
1597 config->mprq.stride_size_n ?
1598 (1U << config->mprq.stride_size_n) :
1599 (1U << mprq_stride_size),
1600 config->mprq.stride_num_n ?
1601 (1U << config->mprq.stride_num_n) :
1602 (1U << mprq_stride_nums),
1603 config->mprq.min_rxqs_num,
1604 (1U << config->mprq.min_stride_size_n),
1605 (1U << config->mprq.max_stride_size_n));
1606 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1607 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1608 if (desc % (1 << tmpl->rxq.sges_n)) {
1610 "port %u number of Rx queue descriptors (%u) is not a"
1611 " multiple of SGEs per packet (%u)",
1614 1 << tmpl->rxq.sges_n);
1618 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1619 /* Toggle RX checksum offload if hardware supports it. */
1620 tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);
1621 /* Configure Rx timestamp. */
1622 tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);
1623 tmpl->rxq.timestamp_rx_flag = 0;
1624 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1625 &tmpl->rxq.timestamp_offset,
1626 &tmpl->rxq.timestamp_rx_flag) != 0) {
1627 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1630 /* Configure VLAN stripping. */
1631 tmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
1632 /* By default, FCS (CRC) is stripped by hardware. */
1633 tmpl->rxq.crc_present = 0;
1634 tmpl->rxq.lro = lro_on_queue;
1635 if (offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
1636 if (config->hw_fcs_strip) {
1638 * RQs used for LRO-enabled TIRs should not be
1639 * configured to scatter the FCS.
1643 "port %u CRC stripping has been "
1644 "disabled but will still be performed "
1645 "by hardware, because LRO is enabled",
1646 dev->data->port_id);
1648 tmpl->rxq.crc_present = 1;
1651 "port %u CRC stripping has been disabled but will"
1652 " still be performed by hardware, make sure MLNX_OFED"
1653 " and firmware are up to date",
1654 dev->data->port_id);
1658 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1659 " incoming frames to hide it",
1661 tmpl->rxq.crc_present ? "disabled" : "enabled",
1662 tmpl->rxq.crc_present << 2);
1664 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1665 (!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
1666 tmpl->rxq.port_id = dev->data->port_id;
1668 tmpl->rxq.mp = rx_seg[0].mp;
1669 tmpl->rxq.elts_n = log2above(desc);
1670 tmpl->rxq.rq_repl_thresh =
1671 MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
1673 (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
1674 tmpl->rxq.mprq_bufs =
1675 (struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
1677 tmpl->rxq.uar_lock_cq = &priv->sh->uar_lock_cq;
1679 tmpl->rxq.idx = idx;
1680 __atomic_add_fetch(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1681 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1689 * Create a DPDK Rx hairpin queue.
1692 * Pointer to Ethernet device.
1696 * Number of descriptors to configure in queue.
1697 * @param hairpin_conf
1698 * The hairpin binding configuration.
1701 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1703 struct mlx5_rxq_ctrl *
1704 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1705 const struct rte_eth_hairpin_conf *hairpin_conf)
1707 struct mlx5_priv *priv = dev->data->dev_private;
1708 struct mlx5_rxq_ctrl *tmpl;
1710 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1716 tmpl->type = MLX5_RXQ_TYPE_HAIRPIN;
1717 tmpl->socket = SOCKET_ID_ANY;
1718 tmpl->rxq.rss_hash = 0;
1719 tmpl->rxq.port_id = dev->data->port_id;
1721 tmpl->rxq.mp = NULL;
1722 tmpl->rxq.elts_n = log2above(desc);
1723 tmpl->rxq.elts = NULL;
1724 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1725 tmpl->hairpin_conf = *hairpin_conf;
1726 tmpl->rxq.idx = idx;
1727 __atomic_add_fetch(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1728 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1736 * Pointer to Ethernet device.
1741 * A pointer to the queue if it exists, NULL otherwise.
1743 struct mlx5_rxq_ctrl *
1744 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1746 struct mlx5_priv *priv = dev->data->dev_private;
1747 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1748 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1751 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1752 __atomic_add_fetch(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED);
1758 * Release a Rx queue.
1761 * Pointer to Ethernet device.
1766 * 1 while a reference on it exists, 0 when freed.
1769 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1771 struct mlx5_priv *priv = dev->data->dev_private;
1772 struct mlx5_rxq_ctrl *rxq_ctrl;
1774 if (!(*priv->rxqs)[idx])
1776 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1777 if (__atomic_sub_fetch(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED) > 1)
1779 if (rxq_ctrl->obj) {
1780 priv->obj_ops.rxq_obj_release(rxq_ctrl->obj);
1781 LIST_REMOVE(rxq_ctrl->obj, next);
1782 mlx5_free(rxq_ctrl->obj);
1783 rxq_ctrl->obj = NULL;
1785 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
1786 rxq_free_elts(rxq_ctrl);
1787 if (!__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED)) {
1788 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
1789 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1790 LIST_REMOVE(rxq_ctrl, next);
1791 mlx5_free(rxq_ctrl);
1792 (*priv->rxqs)[idx] = NULL;
1798 * Verify the Rx Queue list is empty
1801 * Pointer to Ethernet device.
1804 * The number of object not released.
1807 mlx5_rxq_verify(struct rte_eth_dev *dev)
1809 struct mlx5_priv *priv = dev->data->dev_private;
1810 struct mlx5_rxq_ctrl *rxq_ctrl;
1813 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1814 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1815 dev->data->port_id, rxq_ctrl->rxq.idx);
1822 * Get a Rx queue type.
1825 * Pointer to Ethernet device.
1830 * The Rx queue type.
1833 mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx)
1835 struct mlx5_priv *priv = dev->data->dev_private;
1836 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1838 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1839 rxq_ctrl = container_of((*priv->rxqs)[idx],
1840 struct mlx5_rxq_ctrl,
1842 return rxq_ctrl->type;
1844 return MLX5_RXQ_TYPE_UNDEFINED;
1848 * Get a Rx hairpin queue configuration.
1851 * Pointer to Ethernet device.
1856 * Pointer to the configuration if a hairpin RX queue, otherwise NULL.
1858 const struct rte_eth_hairpin_conf *
1859 mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)
1861 struct mlx5_priv *priv = dev->data->dev_private;
1862 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1864 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1865 rxq_ctrl = container_of((*priv->rxqs)[idx],
1866 struct mlx5_rxq_ctrl,
1868 if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
1869 return &rxq_ctrl->hairpin_conf;
1875 * Match queues listed in arguments to queues contained in indirection table
1879 * Pointer to indirection table to match.
1881 * Queues to match to ques in indirection table.
1883 * Number of queues in the array.
1886 * 1 if all queues in indirection table match 0 othrwise.
1889 mlx5_ind_table_obj_match_queues(const struct mlx5_ind_table_obj *ind_tbl,
1890 const uint16_t *queues, uint32_t queues_n)
1892 return (ind_tbl->queues_n == queues_n) &&
1893 (!memcmp(ind_tbl->queues, queues,
1894 ind_tbl->queues_n * sizeof(ind_tbl->queues[0])));
1898 * Get an indirection table.
1901 * Pointer to Ethernet device.
1903 * Queues entering in the indirection table.
1905 * Number of queues in the array.
1908 * An indirection table if found.
1910 struct mlx5_ind_table_obj *
1911 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
1914 struct mlx5_priv *priv = dev->data->dev_private;
1915 struct mlx5_ind_table_obj *ind_tbl;
1917 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1918 if ((ind_tbl->queues_n == queues_n) &&
1919 (memcmp(ind_tbl->queues, queues,
1920 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1927 rte_atomic32_inc(&ind_tbl->refcnt);
1928 for (i = 0; i != ind_tbl->queues_n; ++i)
1929 mlx5_rxq_get(dev, ind_tbl->queues[i]);
1935 * Release an indirection table.
1938 * Pointer to Ethernet device.
1940 * Indirection table to release.
1943 * 1 while a reference on it exists, 0 when freed.
1946 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
1947 struct mlx5_ind_table_obj *ind_tbl)
1949 struct mlx5_priv *priv = dev->data->dev_private;
1952 if (rte_atomic32_dec_and_test(&ind_tbl->refcnt))
1953 priv->obj_ops.ind_table_destroy(ind_tbl);
1954 for (i = 0; i != ind_tbl->queues_n; ++i)
1955 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1956 if (!rte_atomic32_read(&ind_tbl->refcnt)) {
1957 LIST_REMOVE(ind_tbl, next);
1965 * Verify the Rx Queue list is empty
1968 * Pointer to Ethernet device.
1971 * The number of object not released.
1974 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
1976 struct mlx5_priv *priv = dev->data->dev_private;
1977 struct mlx5_ind_table_obj *ind_tbl;
1980 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1982 "port %u indirection table obj %p still referenced",
1983 dev->data->port_id, (void *)ind_tbl);
1990 * Create an indirection table.
1993 * Pointer to Ethernet device.
1995 * Queues entering in the indirection table.
1997 * Number of queues in the array.
2000 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2002 static struct mlx5_ind_table_obj *
2003 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
2006 struct mlx5_priv *priv = dev->data->dev_private;
2007 struct mlx5_ind_table_obj *ind_tbl;
2008 const unsigned int n = rte_is_power_of_2(queues_n) ?
2009 log2above(queues_n) :
2010 log2above(priv->config.ind_table_max_size);
2014 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
2015 queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
2020 ind_tbl->queues_n = queues_n;
2021 for (i = 0; i != queues_n; ++i) {
2022 struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
2025 ind_tbl->queues[i] = queues[i];
2027 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
2030 rte_atomic32_inc(&ind_tbl->refcnt);
2031 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
2035 for (j = 0; j < i; j++)
2036 mlx5_rxq_release(dev, ind_tbl->queues[j]);
2039 DEBUG("Port %u cannot create indirection table.", dev->data->port_id);
2044 * Get an Rx Hash queue.
2047 * Pointer to Ethernet device.
2049 * RSS configuration for the Rx hash queue.
2051 * Queues entering in hash queue. In case of empty hash_fields only the
2052 * first queue index will be taken for the indirection table.
2057 * An hash Rx queue index on success.
2060 mlx5_hrxq_get(struct rte_eth_dev *dev,
2061 const uint8_t *rss_key, uint32_t rss_key_len,
2062 uint64_t hash_fields,
2063 const uint16_t *queues, uint32_t queues_n)
2065 struct mlx5_priv *priv = dev->data->dev_private;
2066 struct mlx5_hrxq *hrxq;
2069 queues_n = hash_fields ? queues_n : 1;
2070 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_HRXQ], priv->hrxqs, idx,
2072 struct mlx5_ind_table_obj *ind_tbl;
2076 if (hrxq->rss_key_len != rss_key_len)
2078 if (memcmp(hrxq->rss_key, rss_key, rss_key_len))
2080 if (hrxq->hash_fields != hash_fields)
2082 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2085 if (ind_tbl != hrxq->ind_table) {
2086 mlx5_ind_table_obj_release(dev, ind_tbl);
2089 rte_atomic32_inc(&hrxq->refcnt);
2096 * Modify an Rx Hash queue configuration.
2099 * Pointer to Ethernet device.
2101 * Index to Hash Rx queue to modify.
2103 * RSS key for the Rx hash queue.
2104 * @param rss_key_len
2106 * @param hash_fields
2107 * Verbs protocol hash field to make the RSS on.
2109 * Queues entering in hash queue. In case of empty hash_fields only the
2110 * first queue index will be taken for the indirection table.
2115 * 0 on success, a negative errno value otherwise and rte_errno is set.
2118 mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hrxq_idx,
2119 const uint8_t *rss_key, uint32_t rss_key_len,
2120 uint64_t hash_fields,
2121 const uint16_t *queues, uint32_t queues_n)
2124 struct mlx5_ind_table_obj *ind_tbl = NULL;
2125 struct mlx5_priv *priv = dev->data->dev_private;
2126 struct mlx5_hrxq *hrxq =
2127 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2135 if (hrxq->rss_key_len != rss_key_len) {
2136 /* rss_key_len is fixed size 40 byte & not supposed to change */
2140 queues_n = hash_fields ? queues_n : 1;
2141 if (mlx5_ind_table_obj_match_queues(hrxq->ind_table,
2142 queues, queues_n)) {
2143 ind_tbl = hrxq->ind_table;
2145 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2147 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n);
2153 MLX5_ASSERT(priv->obj_ops.hrxq_modify);
2154 ret = priv->obj_ops.hrxq_modify(dev, hrxq, rss_key,
2155 hash_fields, ind_tbl);
2160 if (ind_tbl != hrxq->ind_table) {
2161 mlx5_ind_table_obj_release(dev, hrxq->ind_table);
2162 hrxq->ind_table = ind_tbl;
2164 hrxq->hash_fields = hash_fields;
2165 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2169 if (ind_tbl != hrxq->ind_table)
2170 mlx5_ind_table_obj_release(dev, ind_tbl);
2176 * Release the hash Rx queue.
2179 * Pointer to Ethernet device.
2181 * Index to Hash Rx queue to release.
2184 * 1 while a reference on it exists, 0 when freed.
2187 mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
2189 struct mlx5_priv *priv = dev->data->dev_private;
2190 struct mlx5_hrxq *hrxq;
2192 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2195 if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
2196 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2197 mlx5_glue->destroy_flow_action(hrxq->action);
2199 priv->obj_ops.hrxq_destroy(hrxq);
2200 mlx5_ind_table_obj_release(dev, hrxq->ind_table);
2201 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_HRXQ], &priv->hrxqs,
2202 hrxq_idx, hrxq, next);
2203 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2206 claim_nonzero(mlx5_ind_table_obj_release(dev, hrxq->ind_table));
2211 * Create an Rx Hash queue.
2214 * Pointer to Ethernet device.
2216 * RSS key for the Rx hash queue.
2217 * @param rss_key_len
2219 * @param hash_fields
2220 * Verbs protocol hash field to make the RSS on.
2222 * Queues entering in hash queue. In case of empty hash_fields only the
2223 * first queue index will be taken for the indirection table.
2229 * If true new object of Rx Hash queue will be used in shared action.
2232 * The DevX object initialized index, 0 otherwise and rte_errno is set.
2235 mlx5_hrxq_new(struct rte_eth_dev *dev,
2236 const uint8_t *rss_key, uint32_t rss_key_len,
2237 uint64_t hash_fields,
2238 const uint16_t *queues, uint32_t queues_n,
2239 int tunnel, bool shared)
2241 struct mlx5_priv *priv = dev->data->dev_private;
2242 struct mlx5_hrxq *hrxq = NULL;
2243 uint32_t hrxq_idx = 0;
2244 struct mlx5_ind_table_obj *ind_tbl;
2247 queues_n = hash_fields ? queues_n : 1;
2248 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2250 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n);
2255 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2258 hrxq->shared = !!shared;
2259 hrxq->ind_table = ind_tbl;
2260 hrxq->rss_key_len = rss_key_len;
2261 hrxq->hash_fields = hash_fields;
2262 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2263 ret = priv->obj_ops.hrxq_new(dev, hrxq, tunnel);
2268 rte_atomic32_inc(&hrxq->refcnt);
2269 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_HRXQ], &priv->hrxqs, hrxq_idx,
2273 ret = rte_errno; /* Save rte_errno before cleanup. */
2274 mlx5_ind_table_obj_release(dev, ind_tbl);
2276 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2277 rte_errno = ret; /* Restore rte_errno. */
2282 * Create a drop Rx Hash queue.
2285 * Pointer to Ethernet device.
2288 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2291 mlx5_drop_action_create(struct rte_eth_dev *dev)
2293 struct mlx5_priv *priv = dev->data->dev_private;
2294 struct mlx5_hrxq *hrxq = NULL;
2297 if (priv->drop_queue.hrxq) {
2298 rte_atomic32_inc(&priv->drop_queue.hrxq->refcnt);
2299 return priv->drop_queue.hrxq;
2301 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
2304 "Port %u cannot allocate memory for drop queue.",
2305 dev->data->port_id);
2309 priv->drop_queue.hrxq = hrxq;
2310 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
2312 if (!hrxq->ind_table) {
2316 ret = priv->obj_ops.drop_action_create(dev);
2319 rte_atomic32_set(&hrxq->refcnt, 1);
2323 if (hrxq->ind_table)
2324 mlx5_free(hrxq->ind_table);
2325 priv->drop_queue.hrxq = NULL;
2332 * Release a drop hash Rx queue.
2335 * Pointer to Ethernet device.
2338 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
2340 struct mlx5_priv *priv = dev->data->dev_private;
2341 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2343 if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
2344 priv->obj_ops.drop_action_destroy(dev);
2345 mlx5_free(priv->drop_queue.rxq);
2346 mlx5_free(hrxq->ind_table);
2348 priv->drop_queue.rxq = NULL;
2349 priv->drop_queue.hrxq = NULL;
2354 * Verify the Rx Queue list is empty
2357 * Pointer to Ethernet device.
2360 * The number of object not released.
2363 mlx5_hrxq_verify(struct rte_eth_dev *dev)
2365 struct mlx5_priv *priv = dev->data->dev_private;
2366 struct mlx5_hrxq *hrxq;
2370 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_HRXQ], priv->hrxqs, idx,
2373 "port %u hash Rx queue %p still referenced",
2374 dev->data->port_id, (void *)hrxq);
2381 * Set the Rx queue timestamp conversion parameters
2384 * Pointer to the Ethernet device structure.
2387 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
2389 struct mlx5_priv *priv = dev->data->dev_private;
2390 struct mlx5_dev_ctx_shared *sh = priv->sh;
2391 struct mlx5_rxq_data *data;
2394 for (i = 0; i != priv->rxqs_n; ++i) {
2395 if (!(*priv->rxqs)[i])
2397 data = (*priv->rxqs)[i];
2399 data->rt_timestamp = priv->config.rt_timestamp;