1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
25 #include "mlx5_defs.h"
27 #include "mlx5_rxtx.h"
29 #include "mlx5_utils.h"
30 #include "mlx5_autoconf.h"
33 /* Default RSS hash key also used for ConnectX-3. */
34 uint8_t rss_hash_default_key[] = {
35 0x2c, 0xc6, 0x81, 0xd1,
36 0x5b, 0xdb, 0xf4, 0xf7,
37 0xfc, 0xa2, 0x83, 0x19,
38 0xdb, 0x1a, 0x3e, 0x94,
39 0x6b, 0x9e, 0x38, 0xd9,
40 0x2c, 0x9c, 0x03, 0xd1,
41 0xad, 0x99, 0x44, 0xa7,
42 0xd9, 0x56, 0x3d, 0x59,
43 0x06, 0x3c, 0x25, 0xf3,
44 0xfc, 0x1f, 0xdc, 0x2a,
47 /* Length of the default RSS hash key. */
48 static_assert(MLX5_RSS_HASH_KEY_LEN ==
49 (unsigned int)sizeof(rss_hash_default_key),
50 "wrong RSS default key size.");
53 * Calculate the number of CQEs in CQ for the Rx queue.
56 * Pointer to receive queue structure.
59 * Number of CQEs in CQ.
62 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
65 unsigned int wqe_n = 1 << rxq_data->elts_n;
67 if (mlx5_rxq_mprq_enabled(rxq_data))
68 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
75 * Allocate RX queue elements for Multi-Packet RQ.
78 * Pointer to RX queue structure.
81 * 0 on success, a negative errno value otherwise and rte_errno is set.
84 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
86 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
87 unsigned int wqe_n = 1 << rxq->elts_n;
91 /* Iterate on segments. */
92 for (i = 0; i <= wqe_n; ++i) {
93 struct mlx5_mprq_buf *buf;
95 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
96 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
101 (*rxq->mprq_bufs)[i] = buf;
103 rxq->mprq_repl = buf;
106 "port %u MPRQ queue %u allocated and configured %u segments",
107 rxq->port_id, rxq->idx, wqe_n);
110 err = rte_errno; /* Save rte_errno before cleanup. */
112 for (i = 0; (i != wqe_n); ++i) {
113 if ((*rxq->mprq_bufs)[i] != NULL)
114 rte_mempool_put(rxq->mprq_mp,
115 (*rxq->mprq_bufs)[i]);
116 (*rxq->mprq_bufs)[i] = NULL;
118 DRV_LOG(DEBUG, "port %u MPRQ queue %u failed, freed everything",
119 rxq->port_id, rxq->idx);
120 rte_errno = err; /* Restore rte_errno. */
125 * Allocate RX queue elements for Single-Packet RQ.
128 * Pointer to RX queue structure.
131 * 0 on success, errno value on failure.
134 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
136 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
137 unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
138 (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) :
139 (1 << rxq_ctrl->rxq.elts_n);
143 /* Iterate on segments. */
144 for (i = 0; (i != elts_n); ++i) {
145 struct mlx5_eth_rxseg *seg = &rxq_ctrl->rxq.rxseg[i % sges_n];
146 struct rte_mbuf *buf;
148 buf = rte_pktmbuf_alloc(seg->mp);
150 DRV_LOG(ERR, "port %u empty mbuf pool",
151 PORT_ID(rxq_ctrl->priv));
155 /* Headroom is reserved by rte_pktmbuf_alloc(). */
156 MLX5_ASSERT(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
157 /* Buffer is supposed to be empty. */
158 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
159 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
160 MLX5_ASSERT(!buf->next);
161 SET_DATA_OFF(buf, seg->offset);
162 PORT(buf) = rxq_ctrl->rxq.port_id;
163 DATA_LEN(buf) = seg->length;
164 PKT_LEN(buf) = seg->length;
166 (*rxq_ctrl->rxq.elts)[i] = buf;
168 /* If Rx vector is activated. */
169 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
170 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
171 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
172 struct rte_pktmbuf_pool_private *priv =
173 (struct rte_pktmbuf_pool_private *)
174 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
177 /* Initialize default rearm_data for vPMD. */
178 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
179 rte_mbuf_refcnt_set(mbuf_init, 1);
180 mbuf_init->nb_segs = 1;
181 mbuf_init->port = rxq->port_id;
182 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
183 mbuf_init->ol_flags = EXT_ATTACHED_MBUF;
185 * prevent compiler reordering:
186 * rearm_data covers previous fields.
188 rte_compiler_barrier();
189 rxq->mbuf_initializer =
190 *(rte_xmm_t *)&mbuf_init->rearm_data;
191 /* Padding with a fake mbuf for vectorized Rx. */
192 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
193 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
196 "port %u SPRQ queue %u allocated and configured %u segments"
198 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
199 elts_n / (1 << rxq_ctrl->rxq.sges_n));
202 err = rte_errno; /* Save rte_errno before cleanup. */
204 for (i = 0; (i != elts_n); ++i) {
205 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
206 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
207 (*rxq_ctrl->rxq.elts)[i] = NULL;
209 DRV_LOG(DEBUG, "port %u SPRQ queue %u failed, freed everything",
210 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
211 rte_errno = err; /* Restore rte_errno. */
216 * Allocate RX queue elements.
219 * Pointer to RX queue structure.
222 * 0 on success, errno value on failure.
225 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
230 * For MPRQ we need to allocate both MPRQ buffers
231 * for WQEs and simple mbufs for vector processing.
233 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
234 ret = rxq_alloc_elts_mprq(rxq_ctrl);
235 return (ret || rxq_alloc_elts_sprq(rxq_ctrl));
239 * Free RX queue elements for Multi-Packet RQ.
242 * Pointer to RX queue structure.
245 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
247 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
250 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing %d WRs",
251 rxq->port_id, rxq->idx, (1u << rxq->elts_n));
252 if (rxq->mprq_bufs == NULL)
254 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
255 if ((*rxq->mprq_bufs)[i] != NULL)
256 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
257 (*rxq->mprq_bufs)[i] = NULL;
259 if (rxq->mprq_repl != NULL) {
260 mlx5_mprq_buf_free(rxq->mprq_repl);
261 rxq->mprq_repl = NULL;
266 * Free RX queue elements for Single-Packet RQ.
269 * Pointer to RX queue structure.
272 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
274 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
275 const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
276 (1 << rxq->elts_n) * (1 << rxq->strd_num_n) :
278 const uint16_t q_mask = q_n - 1;
279 uint16_t elts_ci = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
280 rxq->elts_ci : rxq->rq_ci;
281 uint16_t used = q_n - (elts_ci - rxq->rq_pi);
284 DRV_LOG(DEBUG, "port %u Rx queue %u freeing %d WRs",
285 PORT_ID(rxq_ctrl->priv), rxq->idx, q_n);
286 if (rxq->elts == NULL)
289 * Some mbuf in the Ring belongs to the application.
290 * They cannot be freed.
292 if (mlx5_rxq_check_vec_support(rxq) > 0) {
293 for (i = 0; i < used; ++i)
294 (*rxq->elts)[(elts_ci + i) & q_mask] = NULL;
295 rxq->rq_pi = elts_ci;
297 for (i = 0; i != q_n; ++i) {
298 if ((*rxq->elts)[i] != NULL)
299 rte_pktmbuf_free_seg((*rxq->elts)[i]);
300 (*rxq->elts)[i] = NULL;
305 * Free RX queue elements.
308 * Pointer to RX queue structure.
311 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
314 * For MPRQ we need to allocate both MPRQ buffers
315 * for WQEs and simple mbufs for vector processing.
317 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
318 rxq_free_elts_mprq(rxq_ctrl);
319 rxq_free_elts_sprq(rxq_ctrl);
323 * Returns the per-queue supported offloads.
326 * Pointer to Ethernet device.
329 * Supported Rx offloads.
332 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
334 struct mlx5_priv *priv = dev->data->dev_private;
335 struct mlx5_dev_config *config = &priv->config;
336 uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
337 DEV_RX_OFFLOAD_TIMESTAMP |
338 DEV_RX_OFFLOAD_JUMBO_FRAME |
339 DEV_RX_OFFLOAD_RSS_HASH);
341 if (!config->mprq.enabled)
342 offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
343 if (config->hw_fcs_strip)
344 offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
346 offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
347 DEV_RX_OFFLOAD_UDP_CKSUM |
348 DEV_RX_OFFLOAD_TCP_CKSUM);
349 if (config->hw_vlan_strip)
350 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
351 if (MLX5_LRO_SUPPORTED(dev))
352 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
358 * Returns the per-port supported offloads.
361 * Supported Rx offloads.
364 mlx5_get_rx_port_offloads(void)
366 uint64_t offloads = DEV_RX_OFFLOAD_VLAN_FILTER;
372 * Verify if the queue can be released.
375 * Pointer to Ethernet device.
380 * 1 if the queue can be released
381 * 0 if the queue can not be released, there are references to it.
382 * Negative errno and rte_errno is set if queue doesn't exist.
385 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
387 struct mlx5_priv *priv = dev->data->dev_private;
388 struct mlx5_rxq_ctrl *rxq_ctrl;
390 if (!(*priv->rxqs)[idx]) {
394 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
395 return (__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED) == 1);
398 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
400 rxq_sync_cq(struct mlx5_rxq_data *rxq)
402 const uint16_t cqe_n = 1 << rxq->cqe_n;
403 const uint16_t cqe_mask = cqe_n - 1;
404 volatile struct mlx5_cqe *cqe;
409 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
410 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
411 if (ret == MLX5_CQE_STATUS_HW_OWN)
413 if (ret == MLX5_CQE_STATUS_ERR) {
417 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
418 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
422 /* Compute the next non compressed CQE. */
423 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
426 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
427 for (i = 0; i < cqe_n; i++) {
428 cqe = &(*rxq->cqes)[i];
429 cqe->op_own = MLX5_CQE_INVALIDATE;
431 /* Resync CQE and WQE (WQ in RESET state). */
433 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
435 *rxq->rq_db = rte_cpu_to_be_32(0);
440 * Rx queue stop. Device queue goes to the RESET state,
441 * all involved mbufs are freed from WQ.
444 * Pointer to Ethernet device structure.
449 * 0 on success, a negative errno value otherwise and rte_errno is set.
452 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
454 struct mlx5_priv *priv = dev->data->dev_private;
455 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
456 struct mlx5_rxq_ctrl *rxq_ctrl =
457 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
460 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
461 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RDY2RST);
463 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
468 /* Remove all processes CQEs. */
470 /* Free all involved mbufs. */
471 rxq_free_elts(rxq_ctrl);
472 /* Set the actual queue state. */
473 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
478 * Rx queue stop. Device queue goes to the RESET state,
479 * all involved mbufs are freed from WQ.
482 * Pointer to Ethernet device structure.
487 * 0 on success, a negative errno value otherwise and rte_errno is set.
490 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
492 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
495 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
496 DRV_LOG(ERR, "Hairpin queue can't be stopped");
500 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
503 * Vectorized Rx burst requires the CQ and RQ indices
504 * synchronized, that might be broken on RQ restart
505 * and cause Rx malfunction, so queue stopping is
506 * not supported if vectorized Rx burst is engaged.
507 * The routine pointer depends on the process
508 * type, should perform check there.
510 if (pkt_burst == mlx5_rx_burst_vec) {
511 DRV_LOG(ERR, "Rx queue stop is not supported "
512 "for vectorized Rx");
516 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
517 ret = mlx5_mp_os_req_queue_control(dev, idx,
518 MLX5_MP_REQ_QUEUE_RX_STOP);
520 ret = mlx5_rx_queue_stop_primary(dev, idx);
526 * Rx queue start. Device queue goes to the ready state,
527 * all required mbufs are allocated and WQ is replenished.
530 * Pointer to Ethernet device structure.
535 * 0 on success, a negative errno value otherwise and rte_errno is set.
538 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
540 struct mlx5_priv *priv = dev->data->dev_private;
541 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
542 struct mlx5_rxq_ctrl *rxq_ctrl =
543 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
546 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
547 /* Allocate needed buffers. */
548 ret = rxq_alloc_elts(rxq_ctrl);
550 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
555 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
557 /* Reset RQ consumer before moving queue to READY state. */
558 *rxq->rq_db = rte_cpu_to_be_32(0);
560 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RST2RDY);
562 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
567 /* Reinitialize RQ - set WQEs. */
568 mlx5_rxq_initialize(rxq);
569 rxq->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
570 /* Set actual queue state. */
571 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
576 * Rx queue start. Device queue goes to the ready state,
577 * all required mbufs are allocated and WQ is replenished.
580 * Pointer to Ethernet device structure.
585 * 0 on success, a negative errno value otherwise and rte_errno is set.
588 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
592 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
593 DRV_LOG(ERR, "Hairpin queue can't be started");
597 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
599 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
600 ret = mlx5_mp_os_req_queue_control(dev, idx,
601 MLX5_MP_REQ_QUEUE_RX_START);
603 ret = mlx5_rx_queue_start_primary(dev, idx);
609 * Rx queue presetup checks.
612 * Pointer to Ethernet device structure.
616 * Number of descriptors to configure in queue.
619 * 0 on success, a negative errno value otherwise and rte_errno is set.
622 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc)
624 struct mlx5_priv *priv = dev->data->dev_private;
626 if (!rte_is_power_of_2(*desc)) {
627 *desc = 1 << log2above(*desc);
629 "port %u increased number of descriptors in Rx queue %u"
630 " to the next power of two (%d)",
631 dev->data->port_id, idx, *desc);
633 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
634 dev->data->port_id, idx, *desc);
635 if (idx >= priv->rxqs_n) {
636 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
637 dev->data->port_id, idx, priv->rxqs_n);
638 rte_errno = EOVERFLOW;
641 if (!mlx5_rxq_releasable(dev, idx)) {
642 DRV_LOG(ERR, "port %u unable to release queue index %u",
643 dev->data->port_id, idx);
647 mlx5_rxq_release(dev, idx);
654 * Pointer to Ethernet device structure.
658 * Number of descriptors to configure in queue.
660 * NUMA socket on which memory must be allocated.
662 * Thresholds parameters.
664 * Memory pool for buffer allocations.
667 * 0 on success, a negative errno value otherwise and rte_errno is set.
670 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
671 unsigned int socket, const struct rte_eth_rxconf *conf,
672 struct rte_mempool *mp)
674 struct mlx5_priv *priv = dev->data->dev_private;
675 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
676 struct mlx5_rxq_ctrl *rxq_ctrl =
677 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
678 struct rte_eth_rxseg_split *rx_seg =
679 (struct rte_eth_rxseg_split *)conf->rx_seg;
680 struct rte_eth_rxseg_split rx_single = {.mp = mp};
681 uint16_t n_seg = conf->rx_nseg;
686 * The parameters should be checked on rte_eth_dev layer.
687 * If mp is specified it means the compatible configuration
688 * without buffer split feature tuning.
694 uint64_t offloads = conf->offloads |
695 dev->data->dev_conf.rxmode.offloads;
697 /* The offloads should be checked on rte_eth_dev layer. */
698 MLX5_ASSERT(offloads & DEV_RX_OFFLOAD_SCATTER);
699 if (!(offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) {
700 DRV_LOG(ERR, "port %u queue index %u split "
701 "offload not configured",
702 dev->data->port_id, idx);
706 MLX5_ASSERT(n_seg < MLX5_MAX_RXQ_NSEG);
708 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
711 rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, rx_seg, n_seg);
713 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
714 dev->data->port_id, idx);
718 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
719 dev->data->port_id, idx);
720 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
727 * Pointer to Ethernet device structure.
731 * Number of descriptors to configure in queue.
732 * @param hairpin_conf
733 * Hairpin configuration parameters.
736 * 0 on success, a negative errno value otherwise and rte_errno is set.
739 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
741 const struct rte_eth_hairpin_conf *hairpin_conf)
743 struct mlx5_priv *priv = dev->data->dev_private;
744 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
745 struct mlx5_rxq_ctrl *rxq_ctrl =
746 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
749 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
752 if (hairpin_conf->peer_count != 1) {
754 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue index %u"
755 " peer count is %u", dev->data->port_id,
756 idx, hairpin_conf->peer_count);
759 if (hairpin_conf->peers[0].port == dev->data->port_id) {
760 if (hairpin_conf->peers[0].queue >= priv->txqs_n) {
762 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
763 " index %u, Tx %u is larger than %u",
764 dev->data->port_id, idx,
765 hairpin_conf->peers[0].queue, priv->txqs_n);
769 if (hairpin_conf->manual_bind == 0 ||
770 hairpin_conf->tx_explicit == 0) {
772 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
773 " index %u peer port %u with attributes %u %u",
774 dev->data->port_id, idx,
775 hairpin_conf->peers[0].port,
776 hairpin_conf->manual_bind,
777 hairpin_conf->tx_explicit);
781 rxq_ctrl = mlx5_rxq_hairpin_new(dev, idx, desc, hairpin_conf);
783 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
784 dev->data->port_id, idx);
788 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
789 dev->data->port_id, idx);
790 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
795 * DPDK callback to release a RX queue.
798 * Generic RX queue pointer.
801 mlx5_rx_queue_release(void *dpdk_rxq)
803 struct mlx5_rxq_data *rxq = (struct mlx5_rxq_data *)dpdk_rxq;
804 struct mlx5_rxq_ctrl *rxq_ctrl;
805 struct mlx5_priv *priv;
809 rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);
810 priv = rxq_ctrl->priv;
811 if (!mlx5_rxq_releasable(ETH_DEV(priv), rxq_ctrl->rxq.idx))
812 rte_panic("port %u Rx queue %u is still used by a flow and"
813 " cannot be removed\n",
814 PORT_ID(priv), rxq->idx);
815 mlx5_rxq_release(ETH_DEV(priv), rxq_ctrl->rxq.idx);
819 * Allocate queue vector and fill epoll fd list for Rx interrupts.
822 * Pointer to Ethernet device.
825 * 0 on success, a negative errno value otherwise and rte_errno is set.
828 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
830 struct mlx5_priv *priv = dev->data->dev_private;
832 unsigned int rxqs_n = priv->rxqs_n;
833 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
834 unsigned int count = 0;
835 struct rte_intr_handle *intr_handle = dev->intr_handle;
837 /* Representor shares dev->intr_handle with PF. */
838 if (priv->representor)
840 if (!dev->data->dev_conf.intr_conf.rxq)
842 mlx5_rx_intr_vec_disable(dev);
843 intr_handle->intr_vec = mlx5_malloc(0,
844 n * sizeof(intr_handle->intr_vec[0]),
846 if (intr_handle->intr_vec == NULL) {
848 "port %u failed to allocate memory for interrupt"
849 " vector, Rx interrupts will not be supported",
854 intr_handle->type = RTE_INTR_HANDLE_EXT;
855 for (i = 0; i != n; ++i) {
856 /* This rxq obj must not be released in this function. */
857 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
858 struct mlx5_rxq_obj *rxq_obj = rxq_ctrl ? rxq_ctrl->obj : NULL;
861 /* Skip queues that cannot request interrupts. */
862 if (!rxq_obj || (!rxq_obj->ibv_channel &&
863 !rxq_obj->devx_channel)) {
864 /* Use invalid intr_vec[] index to disable entry. */
865 intr_handle->intr_vec[i] =
866 RTE_INTR_VEC_RXTX_OFFSET +
867 RTE_MAX_RXTX_INTR_VEC_ID;
868 /* Decrease the rxq_ctrl's refcnt */
870 mlx5_rxq_release(dev, i);
873 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
875 "port %u too many Rx queues for interrupt"
876 " vector size (%d), Rx interrupts cannot be"
878 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
879 mlx5_rx_intr_vec_disable(dev);
883 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
887 "port %u failed to make Rx interrupt file"
888 " descriptor %d non-blocking for queue index"
890 dev->data->port_id, rxq_obj->fd, i);
891 mlx5_rx_intr_vec_disable(dev);
894 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
895 intr_handle->efds[count] = rxq_obj->fd;
899 mlx5_rx_intr_vec_disable(dev);
901 intr_handle->nb_efd = count;
906 * Clean up Rx interrupts handler.
909 * Pointer to Ethernet device.
912 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
914 struct mlx5_priv *priv = dev->data->dev_private;
915 struct rte_intr_handle *intr_handle = dev->intr_handle;
917 unsigned int rxqs_n = priv->rxqs_n;
918 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
920 /* Representor shares dev->intr_handle with PF. */
921 if (priv->representor)
923 if (!dev->data->dev_conf.intr_conf.rxq)
925 if (!intr_handle->intr_vec)
927 for (i = 0; i != n; ++i) {
928 if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
929 RTE_MAX_RXTX_INTR_VEC_ID)
932 * Need to access directly the queue to release the reference
933 * kept in mlx5_rx_intr_vec_enable().
935 mlx5_rxq_release(dev, i);
938 rte_intr_free_epoll_fd(intr_handle);
939 if (intr_handle->intr_vec)
940 mlx5_free(intr_handle->intr_vec);
941 intr_handle->nb_efd = 0;
942 intr_handle->intr_vec = NULL;
946 * MLX5 CQ notification .
949 * Pointer to receive queue structure.
951 * Sequence number per receive queue .
954 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
957 uint32_t doorbell_hi;
959 void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
961 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
962 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
963 doorbell = (uint64_t)doorbell_hi << 32;
964 doorbell |= rxq->cqn;
965 rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
966 mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
967 cq_db_reg, rxq->uar_lock_cq);
971 * DPDK callback for Rx queue interrupt enable.
974 * Pointer to Ethernet device structure.
979 * 0 on success, a negative errno value otherwise and rte_errno is set.
982 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
984 struct mlx5_rxq_ctrl *rxq_ctrl;
986 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
990 if (!rxq_ctrl->obj) {
991 mlx5_rxq_release(dev, rx_queue_id);
994 mlx5_arm_cq(&rxq_ctrl->rxq, rxq_ctrl->rxq.cq_arm_sn);
996 mlx5_rxq_release(dev, rx_queue_id);
1004 * DPDK callback for Rx queue interrupt disable.
1007 * Pointer to Ethernet device structure.
1008 * @param rx_queue_id
1012 * 0 on success, a negative errno value otherwise and rte_errno is set.
1015 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1017 struct mlx5_priv *priv = dev->data->dev_private;
1018 struct mlx5_rxq_ctrl *rxq_ctrl;
1021 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
1028 if (rxq_ctrl->irq) {
1029 ret = priv->obj_ops.rxq_event_get(rxq_ctrl->obj);
1032 rxq_ctrl->rxq.cq_arm_sn++;
1034 mlx5_rxq_release(dev, rx_queue_id);
1038 * The ret variable may be EAGAIN which means the get_event function was
1039 * called before receiving one.
1045 ret = rte_errno; /* Save rte_errno before cleanup. */
1046 mlx5_rxq_release(dev, rx_queue_id);
1048 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1049 dev->data->port_id, rx_queue_id);
1050 rte_errno = ret; /* Restore rte_errno. */
1055 * Verify the Rx queue objects list is empty
1058 * Pointer to Ethernet device.
1061 * The number of objects not released.
1064 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1066 struct mlx5_priv *priv = dev->data->dev_private;
1068 struct mlx5_rxq_obj *rxq_obj;
1070 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1071 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1072 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1079 * Callback function to initialize mbufs for Multi-Packet RQ.
1082 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1083 void *_m, unsigned int i __rte_unused)
1085 struct mlx5_mprq_buf *buf = _m;
1086 struct rte_mbuf_ext_shared_info *shinfo;
1087 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1090 memset(_m, 0, sizeof(*buf));
1092 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1093 for (j = 0; j != strd_n; ++j) {
1094 shinfo = &buf->shinfos[j];
1095 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1096 shinfo->fcb_opaque = buf;
1101 * Free mempool of Multi-Packet RQ.
1104 * Pointer to Ethernet device.
1107 * 0 on success, negative errno value on failure.
1110 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1112 struct mlx5_priv *priv = dev->data->dev_private;
1113 struct rte_mempool *mp = priv->mprq_mp;
1118 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1119 dev->data->port_id, mp->name);
1121 * If a buffer in the pool has been externally attached to a mbuf and it
1122 * is still in use by application, destroying the Rx queue can spoil
1123 * the packet. It is unlikely to happen but if application dynamically
1124 * creates and destroys with holding Rx packets, this can happen.
1126 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1127 * RQ isn't provided by application but managed by PMD.
1129 if (!rte_mempool_full(mp)) {
1131 "port %u mempool for Multi-Packet RQ is still in use",
1132 dev->data->port_id);
1136 rte_mempool_free(mp);
1137 /* Unset mempool for each Rx queue. */
1138 for (i = 0; i != priv->rxqs_n; ++i) {
1139 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1143 rxq->mprq_mp = NULL;
1145 priv->mprq_mp = NULL;
1150 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1151 * mempool. If already allocated, reuse it if there're enough elements.
1152 * Otherwise, resize it.
1155 * Pointer to Ethernet device.
1158 * 0 on success, negative errno value on failure.
1161 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1163 struct mlx5_priv *priv = dev->data->dev_private;
1164 struct rte_mempool *mp = priv->mprq_mp;
1165 char name[RTE_MEMPOOL_NAMESIZE];
1166 unsigned int desc = 0;
1167 unsigned int buf_len;
1168 unsigned int obj_num;
1169 unsigned int obj_size;
1170 unsigned int strd_num_n = 0;
1171 unsigned int strd_sz_n = 0;
1173 unsigned int n_ibv = 0;
1175 if (!mlx5_mprq_enabled(dev))
1177 /* Count the total number of descriptors configured. */
1178 for (i = 0; i != priv->rxqs_n; ++i) {
1179 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1180 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1181 (rxq, struct mlx5_rxq_ctrl, rxq);
1183 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1186 desc += 1 << rxq->elts_n;
1187 /* Get the max number of strides. */
1188 if (strd_num_n < rxq->strd_num_n)
1189 strd_num_n = rxq->strd_num_n;
1190 /* Get the max size of a stride. */
1191 if (strd_sz_n < rxq->strd_sz_n)
1192 strd_sz_n = rxq->strd_sz_n;
1194 MLX5_ASSERT(strd_num_n && strd_sz_n);
1195 buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1196 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len + (1 << strd_num_n) *
1197 sizeof(struct rte_mbuf_ext_shared_info) + RTE_PKTMBUF_HEADROOM;
1199 * Received packets can be either memcpy'd or externally referenced. In
1200 * case that the packet is attached to an mbuf as an external buffer, as
1201 * it isn't possible to predict how the buffers will be queued by
1202 * application, there's no option to exactly pre-allocate needed buffers
1203 * in advance but to speculatively prepares enough buffers.
1205 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1206 * received packets to buffers provided by application (rxq->mp) until
1207 * this Mempool gets available again.
1210 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1212 * rte_mempool_create_empty() has sanity check to refuse large cache
1213 * size compared to the number of elements.
1214 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1215 * constant number 2 instead.
1217 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1218 /* Check a mempool is already allocated and if it can be resued. */
1219 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1220 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1221 dev->data->port_id, mp->name);
1224 } else if (mp != NULL) {
1225 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1226 dev->data->port_id, mp->name);
1228 * If failed to free, which means it may be still in use, no way
1229 * but to keep using the existing one. On buffer underrun,
1230 * packets will be memcpy'd instead of external buffer
1233 if (mlx5_mprq_free_mp(dev)) {
1234 if (mp->elt_size >= obj_size)
1240 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1241 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1242 0, NULL, NULL, mlx5_mprq_buf_init,
1243 (void *)(uintptr_t)(1 << strd_num_n),
1244 dev->device->numa_node, 0);
1247 "port %u failed to allocate a mempool for"
1248 " Multi-Packet RQ, count=%u, size=%u",
1249 dev->data->port_id, obj_num, obj_size);
1255 /* Set mempool for each Rx queue. */
1256 for (i = 0; i != priv->rxqs_n; ++i) {
1257 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1258 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1259 (rxq, struct mlx5_rxq_ctrl, rxq);
1261 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1265 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1266 dev->data->port_id);
1270 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1271 sizeof(struct rte_vlan_hdr) * 2 + \
1272 sizeof(struct rte_ipv6_hdr)))
1273 #define MAX_TCP_OPTION_SIZE 40u
1274 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1275 sizeof(struct rte_tcp_hdr) + \
1276 MAX_TCP_OPTION_SIZE))
1279 * Adjust the maximum LRO massage size.
1282 * Pointer to Ethernet device.
1285 * @param max_lro_size
1286 * The maximum size for LRO packet.
1289 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1290 uint32_t max_lro_size)
1292 struct mlx5_priv *priv = dev->data->dev_private;
1294 if (priv->config.hca_attr.lro_max_msg_sz_mode ==
1295 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1296 MLX5_MAX_TCP_HDR_OFFSET)
1297 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1298 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1299 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1300 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1301 if (priv->max_lro_msg_size)
1302 priv->max_lro_msg_size =
1303 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1305 priv->max_lro_msg_size = max_lro_size;
1307 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1308 dev->data->port_id, idx,
1309 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1313 * Create a DPDK Rx queue.
1316 * Pointer to Ethernet device.
1320 * Number of descriptors to configure in queue.
1322 * NUMA socket on which memory must be allocated.
1325 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1327 struct mlx5_rxq_ctrl *
1328 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1329 unsigned int socket, const struct rte_eth_rxconf *conf,
1330 const struct rte_eth_rxseg_split *rx_seg, uint16_t n_seg)
1332 struct mlx5_priv *priv = dev->data->dev_private;
1333 struct mlx5_rxq_ctrl *tmpl;
1334 unsigned int mb_len = rte_pktmbuf_data_room_size(rx_seg[0].mp);
1335 struct mlx5_dev_config *config = &priv->config;
1336 uint64_t offloads = conf->offloads |
1337 dev->data->dev_conf.rxmode.offloads;
1338 unsigned int lro_on_queue = !!(offloads & DEV_RX_OFFLOAD_TCP_LRO);
1339 unsigned int max_rx_pkt_len = lro_on_queue ?
1340 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1341 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1342 unsigned int non_scatter_min_mbuf_size = max_rx_pkt_len +
1343 RTE_PKTMBUF_HEADROOM;
1344 unsigned int max_lro_size = 0;
1345 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1346 const int mprq_en = mlx5_check_mprq_support(dev) > 0 && n_seg == 1 &&
1347 !rx_seg[0].offset && !rx_seg[0].length;
1348 unsigned int mprq_stride_nums = config->mprq.stride_num_n ?
1349 config->mprq.stride_num_n : MLX5_MPRQ_STRIDE_NUM_N;
1350 unsigned int mprq_stride_size = non_scatter_min_mbuf_size <=
1351 (1U << config->mprq.max_stride_size_n) ?
1352 log2above(non_scatter_min_mbuf_size) : MLX5_MPRQ_STRIDE_SIZE_N;
1353 unsigned int mprq_stride_cap = (config->mprq.stride_num_n ?
1354 (1U << config->mprq.stride_num_n) : (1U << mprq_stride_nums)) *
1355 (config->mprq.stride_size_n ?
1356 (1U << config->mprq.stride_size_n) : (1U << mprq_stride_size));
1358 * Always allocate extra slots, even if eventually
1359 * the vector Rx will not be used.
1361 uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1362 const struct rte_eth_rxseg_split *qs_seg = rx_seg;
1363 unsigned int tail_len;
1365 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
1366 sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *) +
1368 (desc >> mprq_stride_nums) * sizeof(struct mlx5_mprq_buf *),
1374 MLX5_ASSERT(n_seg && n_seg <= MLX5_MAX_RXQ_NSEG);
1376 * Build the array of actual buffer offsets and lengths.
1377 * Pad with the buffers from the last memory pool if
1378 * needed to handle max size packets, replace zero length
1379 * with the buffer length from the pool.
1381 tail_len = max_rx_pkt_len;
1383 struct mlx5_eth_rxseg *hw_seg =
1384 &tmpl->rxq.rxseg[tmpl->rxq.rxseg_n];
1385 uint32_t buf_len, offset, seg_len;
1388 * For the buffers beyond descriptions offset is zero,
1389 * the first buffer contains head room.
1391 buf_len = rte_pktmbuf_data_room_size(qs_seg->mp);
1392 offset = (tmpl->rxq.rxseg_n >= n_seg ? 0 : qs_seg->offset) +
1393 (tmpl->rxq.rxseg_n ? 0 : RTE_PKTMBUF_HEADROOM);
1395 * For the buffers beyond descriptions the length is
1396 * pool buffer length, zero lengths are replaced with
1397 * pool buffer length either.
1399 seg_len = tmpl->rxq.rxseg_n >= n_seg ? buf_len :
1403 /* Check is done in long int, now overflows. */
1404 if (buf_len < seg_len + offset) {
1405 DRV_LOG(ERR, "port %u Rx queue %u: Split offset/length "
1406 "%u/%u can't be satisfied",
1407 dev->data->port_id, idx,
1408 qs_seg->length, qs_seg->offset);
1412 if (seg_len > tail_len)
1413 seg_len = buf_len - offset;
1414 if (++tmpl->rxq.rxseg_n > MLX5_MAX_RXQ_NSEG) {
1416 "port %u too many SGEs (%u) needed to handle"
1417 " requested maximum packet size %u, the maximum"
1418 " supported are %u", dev->data->port_id,
1419 tmpl->rxq.rxseg_n, max_rx_pkt_len,
1421 rte_errno = ENOTSUP;
1424 /* Build the actual scattering element in the queue object. */
1425 hw_seg->mp = qs_seg->mp;
1426 MLX5_ASSERT(offset <= UINT16_MAX);
1427 MLX5_ASSERT(seg_len <= UINT16_MAX);
1428 hw_seg->offset = (uint16_t)offset;
1429 hw_seg->length = (uint16_t)seg_len;
1431 * Advance the segment descriptor, the padding is the based
1432 * on the attributes of the last descriptor.
1434 if (tmpl->rxq.rxseg_n < n_seg)
1436 tail_len -= RTE_MIN(tail_len, seg_len);
1437 } while (tail_len || !rte_is_power_of_2(tmpl->rxq.rxseg_n));
1438 MLX5_ASSERT(tmpl->rxq.rxseg_n &&
1439 tmpl->rxq.rxseg_n <= MLX5_MAX_RXQ_NSEG);
1440 if (tmpl->rxq.rxseg_n > 1 && !(offloads & DEV_RX_OFFLOAD_SCATTER)) {
1441 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1442 " configured and no enough mbuf space(%u) to contain "
1443 "the maximum RX packet length(%u) with head-room(%u)",
1444 dev->data->port_id, idx, mb_len, max_rx_pkt_len,
1445 RTE_PKTMBUF_HEADROOM);
1449 tmpl->type = MLX5_RXQ_TYPE_STANDARD;
1450 if (mlx5_mr_btree_init(&tmpl->rxq.mr_ctrl.cache_bh,
1451 MLX5_MR_BTREE_CACHE_N, socket)) {
1452 /* rte_errno is already set. */
1455 tmpl->socket = socket;
1456 if (dev->data->dev_conf.intr_conf.rxq)
1459 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1460 * following conditions are met:
1461 * - MPRQ is enabled.
1462 * - The number of descs is more than the number of strides.
1463 * - max_rx_pkt_len plus overhead is less than the max size
1464 * of a stride or mprq_stride_size is specified by a user.
1465 * Need to make sure that there are enough strides to encap
1466 * the maximum packet size in case mprq_stride_size is set.
1467 * Otherwise, enable Rx scatter if necessary.
1469 if (mprq_en && desc > (1U << mprq_stride_nums) &&
1470 (non_scatter_min_mbuf_size <=
1471 (1U << config->mprq.max_stride_size_n) ||
1472 (config->mprq.stride_size_n &&
1473 non_scatter_min_mbuf_size <= mprq_stride_cap))) {
1474 /* TODO: Rx scatter isn't supported yet. */
1475 tmpl->rxq.sges_n = 0;
1476 /* Trim the number of descs needed. */
1477 desc >>= mprq_stride_nums;
1478 tmpl->rxq.strd_num_n = config->mprq.stride_num_n ?
1479 config->mprq.stride_num_n : mprq_stride_nums;
1480 tmpl->rxq.strd_sz_n = config->mprq.stride_size_n ?
1481 config->mprq.stride_size_n : mprq_stride_size;
1482 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1483 tmpl->rxq.strd_scatter_en =
1484 !!(offloads & DEV_RX_OFFLOAD_SCATTER);
1485 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1486 config->mprq.max_memcpy_len);
1487 max_lro_size = RTE_MIN(max_rx_pkt_len,
1488 (1u << tmpl->rxq.strd_num_n) *
1489 (1u << tmpl->rxq.strd_sz_n));
1491 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1492 " strd_num_n = %u, strd_sz_n = %u",
1493 dev->data->port_id, idx,
1494 tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1495 } else if (tmpl->rxq.rxseg_n == 1) {
1496 MLX5_ASSERT(max_rx_pkt_len <= first_mb_free_size);
1497 tmpl->rxq.sges_n = 0;
1498 max_lro_size = max_rx_pkt_len;
1499 } else if (offloads & DEV_RX_OFFLOAD_SCATTER) {
1500 unsigned int sges_n;
1502 if (lro_on_queue && first_mb_free_size <
1503 MLX5_MAX_LRO_HEADER_FIX) {
1504 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1505 " to include the max header size(%u) for LRO",
1506 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1507 rte_errno = ENOTSUP;
1511 * Determine the number of SGEs needed for a full packet
1512 * and round it to the next power of two.
1514 sges_n = log2above(tmpl->rxq.rxseg_n);
1515 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1517 "port %u too many SGEs (%u) needed to handle"
1518 " requested maximum packet size %u, the maximum"
1519 " supported are %u", dev->data->port_id,
1520 1 << sges_n, max_rx_pkt_len,
1521 1u << MLX5_MAX_LOG_RQ_SEGS);
1522 rte_errno = ENOTSUP;
1525 tmpl->rxq.sges_n = sges_n;
1526 max_lro_size = max_rx_pkt_len;
1528 if (config->mprq.enabled && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1530 "port %u MPRQ is requested but cannot be enabled\n"
1531 " (requested: pkt_sz = %u, desc_num = %u,"
1532 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1533 " supported: min_rxqs_num = %u,"
1534 " min_stride_sz = %u, max_stride_sz = %u).",
1535 dev->data->port_id, non_scatter_min_mbuf_size,
1537 config->mprq.stride_size_n ?
1538 (1U << config->mprq.stride_size_n) :
1539 (1U << mprq_stride_size),
1540 config->mprq.stride_num_n ?
1541 (1U << config->mprq.stride_num_n) :
1542 (1U << mprq_stride_nums),
1543 config->mprq.min_rxqs_num,
1544 (1U << config->mprq.min_stride_size_n),
1545 (1U << config->mprq.max_stride_size_n));
1546 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1547 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1548 if (desc % (1 << tmpl->rxq.sges_n)) {
1550 "port %u number of Rx queue descriptors (%u) is not a"
1551 " multiple of SGEs per packet (%u)",
1554 1 << tmpl->rxq.sges_n);
1558 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1559 /* Toggle RX checksum offload if hardware supports it. */
1560 tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);
1561 /* Configure Rx timestamp. */
1562 tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);
1563 tmpl->rxq.timestamp_rx_flag = 0;
1564 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1565 &tmpl->rxq.timestamp_offset,
1566 &tmpl->rxq.timestamp_rx_flag) != 0) {
1567 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1570 /* Configure VLAN stripping. */
1571 tmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
1572 /* By default, FCS (CRC) is stripped by hardware. */
1573 tmpl->rxq.crc_present = 0;
1574 tmpl->rxq.lro = lro_on_queue;
1575 if (offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
1576 if (config->hw_fcs_strip) {
1578 * RQs used for LRO-enabled TIRs should not be
1579 * configured to scatter the FCS.
1583 "port %u CRC stripping has been "
1584 "disabled but will still be performed "
1585 "by hardware, because LRO is enabled",
1586 dev->data->port_id);
1588 tmpl->rxq.crc_present = 1;
1591 "port %u CRC stripping has been disabled but will"
1592 " still be performed by hardware, make sure MLNX_OFED"
1593 " and firmware are up to date",
1594 dev->data->port_id);
1598 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1599 " incoming frames to hide it",
1601 tmpl->rxq.crc_present ? "disabled" : "enabled",
1602 tmpl->rxq.crc_present << 2);
1604 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1605 (!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
1606 tmpl->rxq.port_id = dev->data->port_id;
1608 tmpl->rxq.mp = rx_seg[0].mp;
1609 tmpl->rxq.elts_n = log2above(desc);
1610 tmpl->rxq.rq_repl_thresh =
1611 MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
1613 (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
1614 tmpl->rxq.mprq_bufs =
1615 (struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
1617 tmpl->rxq.uar_lock_cq = &priv->sh->uar_lock_cq;
1619 tmpl->rxq.idx = idx;
1620 __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1621 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1624 mlx5_mr_btree_free(&tmpl->rxq.mr_ctrl.cache_bh);
1630 * Create a DPDK Rx hairpin queue.
1633 * Pointer to Ethernet device.
1637 * Number of descriptors to configure in queue.
1638 * @param hairpin_conf
1639 * The hairpin binding configuration.
1642 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1644 struct mlx5_rxq_ctrl *
1645 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1646 const struct rte_eth_hairpin_conf *hairpin_conf)
1648 struct mlx5_priv *priv = dev->data->dev_private;
1649 struct mlx5_rxq_ctrl *tmpl;
1651 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1657 tmpl->type = MLX5_RXQ_TYPE_HAIRPIN;
1658 tmpl->socket = SOCKET_ID_ANY;
1659 tmpl->rxq.rss_hash = 0;
1660 tmpl->rxq.port_id = dev->data->port_id;
1662 tmpl->rxq.mp = NULL;
1663 tmpl->rxq.elts_n = log2above(desc);
1664 tmpl->rxq.elts = NULL;
1665 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1666 tmpl->hairpin_conf = *hairpin_conf;
1667 tmpl->rxq.idx = idx;
1668 __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1669 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1677 * Pointer to Ethernet device.
1682 * A pointer to the queue if it exists, NULL otherwise.
1684 struct mlx5_rxq_ctrl *
1685 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1687 struct mlx5_priv *priv = dev->data->dev_private;
1688 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1689 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1692 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1693 __atomic_fetch_add(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED);
1699 * Release a Rx queue.
1702 * Pointer to Ethernet device.
1707 * 1 while a reference on it exists, 0 when freed.
1710 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1712 struct mlx5_priv *priv = dev->data->dev_private;
1713 struct mlx5_rxq_ctrl *rxq_ctrl;
1715 if (!(*priv->rxqs)[idx])
1717 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1718 if (__atomic_sub_fetch(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED) > 1)
1720 if (rxq_ctrl->obj) {
1721 priv->obj_ops.rxq_obj_release(rxq_ctrl->obj);
1722 LIST_REMOVE(rxq_ctrl->obj, next);
1723 mlx5_free(rxq_ctrl->obj);
1724 rxq_ctrl->obj = NULL;
1726 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) {
1727 rxq_free_elts(rxq_ctrl);
1728 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
1730 if (!__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED)) {
1731 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
1732 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1733 LIST_REMOVE(rxq_ctrl, next);
1734 mlx5_free(rxq_ctrl);
1735 (*priv->rxqs)[idx] = NULL;
1741 * Verify the Rx Queue list is empty
1744 * Pointer to Ethernet device.
1747 * The number of object not released.
1750 mlx5_rxq_verify(struct rte_eth_dev *dev)
1752 struct mlx5_priv *priv = dev->data->dev_private;
1753 struct mlx5_rxq_ctrl *rxq_ctrl;
1756 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1757 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1758 dev->data->port_id, rxq_ctrl->rxq.idx);
1765 * Get a Rx queue type.
1768 * Pointer to Ethernet device.
1773 * The Rx queue type.
1776 mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx)
1778 struct mlx5_priv *priv = dev->data->dev_private;
1779 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1781 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1782 rxq_ctrl = container_of((*priv->rxqs)[idx],
1783 struct mlx5_rxq_ctrl,
1785 return rxq_ctrl->type;
1787 return MLX5_RXQ_TYPE_UNDEFINED;
1791 * Get a Rx hairpin queue configuration.
1794 * Pointer to Ethernet device.
1799 * Pointer to the configuration if a hairpin RX queue, otherwise NULL.
1801 const struct rte_eth_hairpin_conf *
1802 mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)
1804 struct mlx5_priv *priv = dev->data->dev_private;
1805 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1807 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1808 rxq_ctrl = container_of((*priv->rxqs)[idx],
1809 struct mlx5_rxq_ctrl,
1811 if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
1812 return &rxq_ctrl->hairpin_conf;
1818 * Match queues listed in arguments to queues contained in indirection table
1822 * Pointer to indirection table to match.
1824 * Queues to match to ques in indirection table.
1826 * Number of queues in the array.
1829 * 1 if all queues in indirection table match 0 othrwise.
1832 mlx5_ind_table_obj_match_queues(const struct mlx5_ind_table_obj *ind_tbl,
1833 const uint16_t *queues, uint32_t queues_n)
1835 return (ind_tbl->queues_n == queues_n) &&
1836 (!memcmp(ind_tbl->queues, queues,
1837 ind_tbl->queues_n * sizeof(ind_tbl->queues[0])));
1841 * Get an indirection table.
1844 * Pointer to Ethernet device.
1846 * Queues entering in the indirection table.
1848 * Number of queues in the array.
1851 * An indirection table if found.
1853 struct mlx5_ind_table_obj *
1854 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
1857 struct mlx5_priv *priv = dev->data->dev_private;
1858 struct mlx5_ind_table_obj *ind_tbl;
1860 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1861 if ((ind_tbl->queues_n == queues_n) &&
1862 (memcmp(ind_tbl->queues, queues,
1863 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1870 __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
1871 for (i = 0; i != ind_tbl->queues_n; ++i)
1872 mlx5_rxq_get(dev, ind_tbl->queues[i]);
1878 * Release an indirection table.
1881 * Pointer to Ethernet device.
1883 * Indirection table to release.
1885 * Indirection table for Standalone queue.
1888 * 1 while a reference on it exists, 0 when freed.
1891 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
1892 struct mlx5_ind_table_obj *ind_tbl,
1895 struct mlx5_priv *priv = dev->data->dev_private;
1898 if (__atomic_sub_fetch(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED) == 0)
1899 priv->obj_ops.ind_table_destroy(ind_tbl);
1900 for (i = 0; i != ind_tbl->queues_n; ++i)
1901 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1902 if (__atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED) == 0) {
1904 LIST_REMOVE(ind_tbl, next);
1912 * Verify the Rx Queue list is empty
1915 * Pointer to Ethernet device.
1918 * The number of object not released.
1921 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
1923 struct mlx5_priv *priv = dev->data->dev_private;
1924 struct mlx5_ind_table_obj *ind_tbl;
1927 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1929 "port %u indirection table obj %p still referenced",
1930 dev->data->port_id, (void *)ind_tbl);
1937 * Setup an indirection table structure fields.
1940 * Pointer to Ethernet device.
1942 * Indirection table to modify.
1945 * 0 on success, a negative errno value otherwise and rte_errno is set.
1948 mlx5_ind_table_obj_setup(struct rte_eth_dev *dev,
1949 struct mlx5_ind_table_obj *ind_tbl)
1951 struct mlx5_priv *priv = dev->data->dev_private;
1952 uint32_t queues_n = ind_tbl->queues_n;
1953 uint16_t *queues = ind_tbl->queues;
1956 const unsigned int n = rte_is_power_of_2(queues_n) ?
1957 log2above(queues_n) :
1958 log2above(priv->config.ind_table_max_size);
1960 for (i = 0; i != queues_n; ++i) {
1961 if (!mlx5_rxq_get(dev, queues[i])) {
1966 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
1969 __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
1973 for (j = 0; j < i; j++)
1974 mlx5_rxq_release(dev, ind_tbl->queues[j]);
1976 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
1977 dev->data->port_id);
1982 * Create an indirection table.
1985 * Pointer to Ethernet device.
1987 * Queues entering in the indirection table.
1989 * Number of queues in the array.
1991 * Indirection table for Standalone queue.
1994 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
1996 static struct mlx5_ind_table_obj *
1997 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
1998 uint32_t queues_n, bool standalone)
2000 struct mlx5_priv *priv = dev->data->dev_private;
2001 struct mlx5_ind_table_obj *ind_tbl;
2004 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
2005 queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
2010 ind_tbl->queues_n = queues_n;
2011 ind_tbl->queues = (uint16_t *)(ind_tbl + 1);
2012 memcpy(ind_tbl->queues, queues, queues_n * sizeof(*queues));
2013 ret = mlx5_ind_table_obj_setup(dev, ind_tbl);
2019 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
2024 * Modify an indirection table.
2027 * Pointer to Ethernet device.
2029 * Indirection table to modify.
2031 * Queues replacement for the indirection table.
2033 * Number of queues in the array.
2035 * Indirection table for Standalone queue.
2038 * 0 on success, a negative errno value otherwise and rte_errno is set.
2041 mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,
2042 struct mlx5_ind_table_obj *ind_tbl,
2043 uint16_t *queues, const uint32_t queues_n,
2046 struct mlx5_priv *priv = dev->data->dev_private;
2049 const unsigned int n = rte_is_power_of_2(queues_n) ?
2050 log2above(queues_n) :
2051 log2above(priv->config.ind_table_max_size);
2053 MLX5_ASSERT(standalone);
2054 RTE_SET_USED(standalone);
2055 if (__atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED) > 1) {
2057 * Modification of indirection ntables having more than 1
2058 * reference unsupported. Intended for standalone indirection
2062 "Port %u cannot modify indirection table (refcnt> 1).",
2063 dev->data->port_id);
2067 for (i = 0; i != queues_n; ++i) {
2068 if (!mlx5_rxq_get(dev, queues[i])) {
2073 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2074 ret = priv->obj_ops.ind_table_modify(dev, n, queues, queues_n, ind_tbl);
2077 for (j = 0; j < ind_tbl->queues_n; j++)
2078 mlx5_rxq_release(dev, ind_tbl->queues[j]);
2079 ind_tbl->queues_n = queues_n;
2080 ind_tbl->queues = queues;
2084 for (j = 0; j < i; j++)
2085 mlx5_rxq_release(dev, ind_tbl->queues[j]);
2087 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2088 dev->data->port_id);
2093 * Match an Rx Hash queue.
2096 * Cache list pointer.
2098 * Hash queue entry pointer.
2100 * Context of the callback function.
2103 * 0 if match, none zero if not match.
2106 mlx5_hrxq_match_cb(struct mlx5_cache_list *list,
2107 struct mlx5_cache_entry *entry,
2110 struct rte_eth_dev *dev = list->ctx;
2111 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2112 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2113 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2114 struct mlx5_ind_table_obj *ind_tbl;
2116 if (hrxq->rss_key_len != rss_desc->key_len ||
2117 memcmp(hrxq->rss_key, rss_desc->key, rss_desc->key_len) ||
2118 hrxq->hash_fields != rss_desc->hash_fields)
2120 ind_tbl = mlx5_ind_table_obj_get(dev, rss_desc->queue,
2121 rss_desc->queue_num);
2123 mlx5_ind_table_obj_release(dev, ind_tbl, hrxq->standalone);
2124 return ind_tbl != hrxq->ind_table;
2128 * Modify an Rx Hash queue configuration.
2131 * Pointer to Ethernet device.
2133 * Index to Hash Rx queue to modify.
2135 * RSS key for the Rx hash queue.
2136 * @param rss_key_len
2138 * @param hash_fields
2139 * Verbs protocol hash field to make the RSS on.
2141 * Queues entering in hash queue. In case of empty hash_fields only the
2142 * first queue index will be taken for the indirection table.
2147 * 0 on success, a negative errno value otherwise and rte_errno is set.
2150 mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hrxq_idx,
2151 const uint8_t *rss_key, uint32_t rss_key_len,
2152 uint64_t hash_fields,
2153 const uint16_t *queues, uint32_t queues_n)
2156 struct mlx5_ind_table_obj *ind_tbl = NULL;
2157 struct mlx5_priv *priv = dev->data->dev_private;
2158 struct mlx5_hrxq *hrxq =
2159 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2167 if (hrxq->rss_key_len != rss_key_len) {
2168 /* rss_key_len is fixed size 40 byte & not supposed to change */
2172 queues_n = hash_fields ? queues_n : 1;
2173 if (mlx5_ind_table_obj_match_queues(hrxq->ind_table,
2174 queues, queues_n)) {
2175 ind_tbl = hrxq->ind_table;
2177 if (hrxq->standalone) {
2179 * Replacement of indirection table unsupported for
2180 * stanalone hrxq objects (used by shared RSS).
2182 rte_errno = ENOTSUP;
2185 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2187 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2194 MLX5_ASSERT(priv->obj_ops.hrxq_modify);
2195 ret = priv->obj_ops.hrxq_modify(dev, hrxq, rss_key,
2196 hash_fields, ind_tbl);
2201 if (ind_tbl != hrxq->ind_table) {
2202 MLX5_ASSERT(!hrxq->standalone);
2203 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2205 hrxq->ind_table = ind_tbl;
2207 hrxq->hash_fields = hash_fields;
2208 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2212 if (ind_tbl != hrxq->ind_table) {
2213 MLX5_ASSERT(!hrxq->standalone);
2214 mlx5_ind_table_obj_release(dev, ind_tbl, hrxq->standalone);
2221 __mlx5_hrxq_remove(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
2223 struct mlx5_priv *priv = dev->data->dev_private;
2225 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2226 mlx5_glue->destroy_flow_action(hrxq->action);
2228 priv->obj_ops.hrxq_destroy(hrxq);
2229 if (!hrxq->standalone) {
2230 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2233 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2237 * Release the hash Rx queue.
2240 * Pointer to Ethernet device.
2242 * Index to Hash Rx queue to release.
2245 * Cache list pointer.
2247 * Hash queue entry pointer.
2250 mlx5_hrxq_remove_cb(struct mlx5_cache_list *list,
2251 struct mlx5_cache_entry *entry)
2253 struct rte_eth_dev *dev = list->ctx;
2254 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2256 __mlx5_hrxq_remove(dev, hrxq);
2259 static struct mlx5_hrxq *
2260 __mlx5_hrxq_create(struct rte_eth_dev *dev,
2261 struct mlx5_flow_rss_desc *rss_desc)
2263 struct mlx5_priv *priv = dev->data->dev_private;
2264 const uint8_t *rss_key = rss_desc->key;
2265 uint32_t rss_key_len = rss_desc->key_len;
2266 bool standalone = !!rss_desc->shared_rss;
2267 const uint16_t *queues =
2268 standalone ? rss_desc->const_q : rss_desc->queue;
2269 uint32_t queues_n = rss_desc->queue_num;
2270 struct mlx5_hrxq *hrxq = NULL;
2271 uint32_t hrxq_idx = 0;
2272 struct mlx5_ind_table_obj *ind_tbl = rss_desc->ind_tbl;
2275 queues_n = rss_desc->hash_fields ? queues_n : 1;
2277 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2279 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2283 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2286 hrxq->standalone = standalone;
2287 hrxq->idx = hrxq_idx;
2288 hrxq->ind_table = ind_tbl;
2289 hrxq->rss_key_len = rss_key_len;
2290 hrxq->hash_fields = rss_desc->hash_fields;
2291 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2292 ret = priv->obj_ops.hrxq_new(dev, hrxq, rss_desc->tunnel);
2297 if (!rss_desc->ind_tbl)
2298 mlx5_ind_table_obj_release(dev, ind_tbl, standalone);
2300 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2305 * Create an Rx Hash queue.
2308 * Cache list pointer.
2310 * Hash queue entry pointer.
2312 * Context of the callback function.
2315 * queue entry on success, NULL otherwise.
2317 struct mlx5_cache_entry *
2318 mlx5_hrxq_create_cb(struct mlx5_cache_list *list,
2319 struct mlx5_cache_entry *entry __rte_unused,
2322 struct rte_eth_dev *dev = list->ctx;
2323 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2324 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2325 struct mlx5_hrxq *hrxq;
2327 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2328 return hrxq ? &hrxq->entry : NULL;
2332 * Get an Rx Hash queue.
2335 * Pointer to Ethernet device.
2337 * RSS configuration for the Rx hash queue.
2340 * An hash Rx queue index on success.
2342 uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,
2343 struct mlx5_flow_rss_desc *rss_desc)
2345 struct mlx5_priv *priv = dev->data->dev_private;
2346 struct mlx5_hrxq *hrxq;
2347 struct mlx5_cache_entry *entry;
2348 struct mlx5_flow_cb_ctx ctx = {
2352 if (rss_desc->shared_rss) {
2353 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2355 entry = mlx5_cache_register(&priv->hrxqs, &ctx);
2358 hrxq = container_of(entry, typeof(*hrxq), entry);
2366 * Release the hash Rx queue.
2369 * Pointer to Ethernet device.
2371 * Index to Hash Rx queue to release.
2374 * 1 while a reference on it exists, 0 when freed.
2376 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
2378 struct mlx5_priv *priv = dev->data->dev_private;
2379 struct mlx5_hrxq *hrxq;
2381 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2384 if (!hrxq->standalone)
2385 return mlx5_cache_unregister(&priv->hrxqs, &hrxq->entry);
2386 __mlx5_hrxq_remove(dev, hrxq);
2391 * Create a drop Rx Hash queue.
2394 * Pointer to Ethernet device.
2397 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2400 mlx5_drop_action_create(struct rte_eth_dev *dev)
2402 struct mlx5_priv *priv = dev->data->dev_private;
2403 struct mlx5_hrxq *hrxq = NULL;
2406 if (priv->drop_queue.hrxq)
2407 return priv->drop_queue.hrxq;
2408 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
2411 "Port %u cannot allocate memory for drop queue.",
2412 dev->data->port_id);
2416 priv->drop_queue.hrxq = hrxq;
2417 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
2419 if (!hrxq->ind_table) {
2423 ret = priv->obj_ops.drop_action_create(dev);
2429 if (hrxq->ind_table)
2430 mlx5_free(hrxq->ind_table);
2431 priv->drop_queue.hrxq = NULL;
2438 * Release a drop hash Rx queue.
2441 * Pointer to Ethernet device.
2444 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
2446 struct mlx5_priv *priv = dev->data->dev_private;
2447 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2449 if (!priv->drop_queue.hrxq)
2451 priv->obj_ops.drop_action_destroy(dev);
2452 mlx5_free(priv->drop_queue.rxq);
2453 mlx5_free(hrxq->ind_table);
2455 priv->drop_queue.rxq = NULL;
2456 priv->drop_queue.hrxq = NULL;
2460 * Verify the Rx Queue list is empty
2463 * Pointer to Ethernet device.
2466 * The number of object not released.
2469 mlx5_hrxq_verify(struct rte_eth_dev *dev)
2471 struct mlx5_priv *priv = dev->data->dev_private;
2473 return mlx5_cache_list_get_entry_num(&priv->hrxqs);
2477 * Set the Rx queue timestamp conversion parameters
2480 * Pointer to the Ethernet device structure.
2483 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
2485 struct mlx5_priv *priv = dev->data->dev_private;
2486 struct mlx5_dev_ctx_shared *sh = priv->sh;
2487 struct mlx5_rxq_data *data;
2490 for (i = 0; i != priv->rxqs_n; ++i) {
2491 if (!(*priv->rxqs)[i])
2493 data = (*priv->rxqs)[i];
2495 data->rt_timestamp = priv->config.rt_timestamp;