1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
24 #include <mlx5_common_mr.h>
26 #include "mlx5_defs.h"
30 #include "mlx5_utils.h"
31 #include "mlx5_autoconf.h"
34 /* Default RSS hash key also used for ConnectX-3. */
35 uint8_t rss_hash_default_key[] = {
36 0x2c, 0xc6, 0x81, 0xd1,
37 0x5b, 0xdb, 0xf4, 0xf7,
38 0xfc, 0xa2, 0x83, 0x19,
39 0xdb, 0x1a, 0x3e, 0x94,
40 0x6b, 0x9e, 0x38, 0xd9,
41 0x2c, 0x9c, 0x03, 0xd1,
42 0xad, 0x99, 0x44, 0xa7,
43 0xd9, 0x56, 0x3d, 0x59,
44 0x06, 0x3c, 0x25, 0xf3,
45 0xfc, 0x1f, 0xdc, 0x2a,
48 /* Length of the default RSS hash key. */
49 static_assert(MLX5_RSS_HASH_KEY_LEN ==
50 (unsigned int)sizeof(rss_hash_default_key),
51 "wrong RSS default key size.");
54 * Calculate the number of CQEs in CQ for the Rx queue.
57 * Pointer to receive queue structure.
60 * Number of CQEs in CQ.
63 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
66 unsigned int wqe_n = 1 << rxq_data->elts_n;
68 if (mlx5_rxq_mprq_enabled(rxq_data))
69 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
76 * Allocate RX queue elements for Multi-Packet RQ.
79 * Pointer to RX queue structure.
82 * 0 on success, a negative errno value otherwise and rte_errno is set.
85 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
87 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
88 unsigned int wqe_n = 1 << rxq->elts_n;
92 /* Iterate on segments. */
93 for (i = 0; i <= wqe_n; ++i) {
94 struct mlx5_mprq_buf *buf;
96 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
97 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
102 (*rxq->mprq_bufs)[i] = buf;
104 rxq->mprq_repl = buf;
107 "port %u MPRQ queue %u allocated and configured %u segments",
108 rxq->port_id, rxq->idx, wqe_n);
111 err = rte_errno; /* Save rte_errno before cleanup. */
113 for (i = 0; (i != wqe_n); ++i) {
114 if ((*rxq->mprq_bufs)[i] != NULL)
115 rte_mempool_put(rxq->mprq_mp,
116 (*rxq->mprq_bufs)[i]);
117 (*rxq->mprq_bufs)[i] = NULL;
119 DRV_LOG(DEBUG, "port %u MPRQ queue %u failed, freed everything",
120 rxq->port_id, rxq->idx);
121 rte_errno = err; /* Restore rte_errno. */
126 * Allocate RX queue elements for Single-Packet RQ.
129 * Pointer to RX queue structure.
132 * 0 on success, errno value on failure.
135 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
137 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
138 unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
139 (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) :
140 (1 << rxq_ctrl->rxq.elts_n);
144 /* Iterate on segments. */
145 for (i = 0; (i != elts_n); ++i) {
146 struct mlx5_eth_rxseg *seg = &rxq_ctrl->rxq.rxseg[i % sges_n];
147 struct rte_mbuf *buf;
149 buf = rte_pktmbuf_alloc(seg->mp);
151 DRV_LOG(ERR, "port %u empty mbuf pool",
152 PORT_ID(rxq_ctrl->priv));
156 /* Headroom is reserved by rte_pktmbuf_alloc(). */
157 MLX5_ASSERT(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
158 /* Buffer is supposed to be empty. */
159 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
160 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
161 MLX5_ASSERT(!buf->next);
162 SET_DATA_OFF(buf, seg->offset);
163 PORT(buf) = rxq_ctrl->rxq.port_id;
164 DATA_LEN(buf) = seg->length;
165 PKT_LEN(buf) = seg->length;
167 (*rxq_ctrl->rxq.elts)[i] = buf;
169 /* If Rx vector is activated. */
170 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
171 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
172 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
173 struct rte_pktmbuf_pool_private *priv =
174 (struct rte_pktmbuf_pool_private *)
175 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
178 /* Initialize default rearm_data for vPMD. */
179 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
180 rte_mbuf_refcnt_set(mbuf_init, 1);
181 mbuf_init->nb_segs = 1;
182 mbuf_init->port = rxq->port_id;
183 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
184 mbuf_init->ol_flags = EXT_ATTACHED_MBUF;
186 * prevent compiler reordering:
187 * rearm_data covers previous fields.
189 rte_compiler_barrier();
190 rxq->mbuf_initializer =
191 *(rte_xmm_t *)&mbuf_init->rearm_data;
192 /* Padding with a fake mbuf for vectorized Rx. */
193 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
194 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
197 "port %u SPRQ queue %u allocated and configured %u segments"
199 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
200 elts_n / (1 << rxq_ctrl->rxq.sges_n));
203 err = rte_errno; /* Save rte_errno before cleanup. */
205 for (i = 0; (i != elts_n); ++i) {
206 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
207 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
208 (*rxq_ctrl->rxq.elts)[i] = NULL;
210 DRV_LOG(DEBUG, "port %u SPRQ queue %u failed, freed everything",
211 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
212 rte_errno = err; /* Restore rte_errno. */
217 * Allocate RX queue elements.
220 * Pointer to RX queue structure.
223 * 0 on success, errno value on failure.
226 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
231 * For MPRQ we need to allocate both MPRQ buffers
232 * for WQEs and simple mbufs for vector processing.
234 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
235 ret = rxq_alloc_elts_mprq(rxq_ctrl);
236 return (ret || rxq_alloc_elts_sprq(rxq_ctrl));
240 * Free RX queue elements for Multi-Packet RQ.
243 * Pointer to RX queue structure.
246 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
248 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
251 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing %d WRs",
252 rxq->port_id, rxq->idx, (1u << rxq->elts_n));
253 if (rxq->mprq_bufs == NULL)
255 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
256 if ((*rxq->mprq_bufs)[i] != NULL)
257 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
258 (*rxq->mprq_bufs)[i] = NULL;
260 if (rxq->mprq_repl != NULL) {
261 mlx5_mprq_buf_free(rxq->mprq_repl);
262 rxq->mprq_repl = NULL;
267 * Free RX queue elements for Single-Packet RQ.
270 * Pointer to RX queue structure.
273 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
275 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
276 const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
277 (1 << rxq->elts_n) * (1 << rxq->strd_num_n) :
279 const uint16_t q_mask = q_n - 1;
280 uint16_t elts_ci = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
281 rxq->elts_ci : rxq->rq_ci;
282 uint16_t used = q_n - (elts_ci - rxq->rq_pi);
285 DRV_LOG(DEBUG, "port %u Rx queue %u freeing %d WRs",
286 PORT_ID(rxq_ctrl->priv), rxq->idx, q_n);
287 if (rxq->elts == NULL)
290 * Some mbuf in the Ring belongs to the application.
291 * They cannot be freed.
293 if (mlx5_rxq_check_vec_support(rxq) > 0) {
294 for (i = 0; i < used; ++i)
295 (*rxq->elts)[(elts_ci + i) & q_mask] = NULL;
296 rxq->rq_pi = elts_ci;
298 for (i = 0; i != q_n; ++i) {
299 if ((*rxq->elts)[i] != NULL)
300 rte_pktmbuf_free_seg((*rxq->elts)[i]);
301 (*rxq->elts)[i] = NULL;
306 * Free RX queue elements.
309 * Pointer to RX queue structure.
312 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
315 * For MPRQ we need to allocate both MPRQ buffers
316 * for WQEs and simple mbufs for vector processing.
318 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
319 rxq_free_elts_mprq(rxq_ctrl);
320 rxq_free_elts_sprq(rxq_ctrl);
324 * Returns the per-queue supported offloads.
327 * Pointer to Ethernet device.
330 * Supported Rx offloads.
333 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
335 struct mlx5_priv *priv = dev->data->dev_private;
336 struct mlx5_dev_config *config = &priv->config;
337 uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
338 DEV_RX_OFFLOAD_TIMESTAMP |
339 DEV_RX_OFFLOAD_RSS_HASH);
341 if (!config->mprq.enabled)
342 offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
343 if (config->hw_fcs_strip)
344 offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
346 offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
347 DEV_RX_OFFLOAD_UDP_CKSUM |
348 DEV_RX_OFFLOAD_TCP_CKSUM);
349 if (config->hw_vlan_strip)
350 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
351 if (MLX5_LRO_SUPPORTED(dev))
352 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
358 * Returns the per-port supported offloads.
361 * Supported Rx offloads.
364 mlx5_get_rx_port_offloads(void)
366 uint64_t offloads = DEV_RX_OFFLOAD_VLAN_FILTER;
372 * Verify if the queue can be released.
375 * Pointer to Ethernet device.
380 * 1 if the queue can be released
381 * 0 if the queue can not be released, there are references to it.
382 * Negative errno and rte_errno is set if queue doesn't exist.
385 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
387 struct mlx5_priv *priv = dev->data->dev_private;
388 struct mlx5_rxq_ctrl *rxq_ctrl;
390 if (!(*priv->rxqs)[idx]) {
394 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
395 return (__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED) == 1);
398 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
400 rxq_sync_cq(struct mlx5_rxq_data *rxq)
402 const uint16_t cqe_n = 1 << rxq->cqe_n;
403 const uint16_t cqe_mask = cqe_n - 1;
404 volatile struct mlx5_cqe *cqe;
409 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
410 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
411 if (ret == MLX5_CQE_STATUS_HW_OWN)
413 if (ret == MLX5_CQE_STATUS_ERR) {
417 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
418 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
422 /* Compute the next non compressed CQE. */
423 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
426 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
427 for (i = 0; i < cqe_n; i++) {
428 cqe = &(*rxq->cqes)[i];
429 cqe->op_own = MLX5_CQE_INVALIDATE;
431 /* Resync CQE and WQE (WQ in RESET state). */
433 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
435 *rxq->rq_db = rte_cpu_to_be_32(0);
440 * Rx queue stop. Device queue goes to the RESET state,
441 * all involved mbufs are freed from WQ.
444 * Pointer to Ethernet device structure.
449 * 0 on success, a negative errno value otherwise and rte_errno is set.
452 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
454 struct mlx5_priv *priv = dev->data->dev_private;
455 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
456 struct mlx5_rxq_ctrl *rxq_ctrl =
457 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
460 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
461 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RDY2RST);
463 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
468 /* Remove all processes CQEs. */
470 /* Free all involved mbufs. */
471 rxq_free_elts(rxq_ctrl);
472 /* Set the actual queue state. */
473 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
478 * Rx queue stop. Device queue goes to the RESET state,
479 * all involved mbufs are freed from WQ.
482 * Pointer to Ethernet device structure.
487 * 0 on success, a negative errno value otherwise and rte_errno is set.
490 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
492 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
495 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
496 DRV_LOG(ERR, "Hairpin queue can't be stopped");
500 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
503 * Vectorized Rx burst requires the CQ and RQ indices
504 * synchronized, that might be broken on RQ restart
505 * and cause Rx malfunction, so queue stopping is
506 * not supported if vectorized Rx burst is engaged.
507 * The routine pointer depends on the process
508 * type, should perform check there.
510 if (pkt_burst == mlx5_rx_burst_vec) {
511 DRV_LOG(ERR, "Rx queue stop is not supported "
512 "for vectorized Rx");
516 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
517 ret = mlx5_mp_os_req_queue_control(dev, idx,
518 MLX5_MP_REQ_QUEUE_RX_STOP);
520 ret = mlx5_rx_queue_stop_primary(dev, idx);
526 * Rx queue start. Device queue goes to the ready state,
527 * all required mbufs are allocated and WQ is replenished.
530 * Pointer to Ethernet device structure.
535 * 0 on success, a negative errno value otherwise and rte_errno is set.
538 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
540 struct mlx5_priv *priv = dev->data->dev_private;
541 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
542 struct mlx5_rxq_ctrl *rxq_ctrl =
543 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
546 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
547 /* Allocate needed buffers. */
548 ret = rxq_alloc_elts(rxq_ctrl);
550 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
555 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
557 /* Reset RQ consumer before moving queue to READY state. */
558 *rxq->rq_db = rte_cpu_to_be_32(0);
560 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RST2RDY);
562 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
567 /* Reinitialize RQ - set WQEs. */
568 mlx5_rxq_initialize(rxq);
569 rxq->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
570 /* Set actual queue state. */
571 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
576 * Rx queue start. Device queue goes to the ready state,
577 * all required mbufs are allocated and WQ is replenished.
580 * Pointer to Ethernet device structure.
585 * 0 on success, a negative errno value otherwise and rte_errno is set.
588 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
592 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
593 DRV_LOG(ERR, "Hairpin queue can't be started");
597 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
599 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
600 ret = mlx5_mp_os_req_queue_control(dev, idx,
601 MLX5_MP_REQ_QUEUE_RX_START);
603 ret = mlx5_rx_queue_start_primary(dev, idx);
609 * Rx queue presetup checks.
612 * Pointer to Ethernet device structure.
616 * Number of descriptors to configure in queue.
619 * 0 on success, a negative errno value otherwise and rte_errno is set.
622 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc)
624 struct mlx5_priv *priv = dev->data->dev_private;
626 if (!rte_is_power_of_2(*desc)) {
627 *desc = 1 << log2above(*desc);
629 "port %u increased number of descriptors in Rx queue %u"
630 " to the next power of two (%d)",
631 dev->data->port_id, idx, *desc);
633 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
634 dev->data->port_id, idx, *desc);
635 if (idx >= priv->rxqs_n) {
636 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
637 dev->data->port_id, idx, priv->rxqs_n);
638 rte_errno = EOVERFLOW;
641 if (!mlx5_rxq_releasable(dev, idx)) {
642 DRV_LOG(ERR, "port %u unable to release queue index %u",
643 dev->data->port_id, idx);
647 mlx5_rxq_release(dev, idx);
654 * Pointer to Ethernet device structure.
658 * Number of descriptors to configure in queue.
660 * NUMA socket on which memory must be allocated.
662 * Thresholds parameters.
664 * Memory pool for buffer allocations.
667 * 0 on success, a negative errno value otherwise and rte_errno is set.
670 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
671 unsigned int socket, const struct rte_eth_rxconf *conf,
672 struct rte_mempool *mp)
674 struct mlx5_priv *priv = dev->data->dev_private;
675 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
676 struct mlx5_rxq_ctrl *rxq_ctrl =
677 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
678 struct rte_eth_rxseg_split *rx_seg =
679 (struct rte_eth_rxseg_split *)conf->rx_seg;
680 struct rte_eth_rxseg_split rx_single = {.mp = mp};
681 uint16_t n_seg = conf->rx_nseg;
686 * The parameters should be checked on rte_eth_dev layer.
687 * If mp is specified it means the compatible configuration
688 * without buffer split feature tuning.
694 uint64_t offloads = conf->offloads |
695 dev->data->dev_conf.rxmode.offloads;
697 /* The offloads should be checked on rte_eth_dev layer. */
698 MLX5_ASSERT(offloads & DEV_RX_OFFLOAD_SCATTER);
699 if (!(offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) {
700 DRV_LOG(ERR, "port %u queue index %u split "
701 "offload not configured",
702 dev->data->port_id, idx);
706 MLX5_ASSERT(n_seg < MLX5_MAX_RXQ_NSEG);
708 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
711 rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, rx_seg, n_seg);
713 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
714 dev->data->port_id, idx);
718 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
719 dev->data->port_id, idx);
720 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
727 * Pointer to Ethernet device structure.
731 * Number of descriptors to configure in queue.
732 * @param hairpin_conf
733 * Hairpin configuration parameters.
736 * 0 on success, a negative errno value otherwise and rte_errno is set.
739 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
741 const struct rte_eth_hairpin_conf *hairpin_conf)
743 struct mlx5_priv *priv = dev->data->dev_private;
744 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
745 struct mlx5_rxq_ctrl *rxq_ctrl =
746 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
749 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
752 if (hairpin_conf->peer_count != 1) {
754 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue index %u"
755 " peer count is %u", dev->data->port_id,
756 idx, hairpin_conf->peer_count);
759 if (hairpin_conf->peers[0].port == dev->data->port_id) {
760 if (hairpin_conf->peers[0].queue >= priv->txqs_n) {
762 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
763 " index %u, Tx %u is larger than %u",
764 dev->data->port_id, idx,
765 hairpin_conf->peers[0].queue, priv->txqs_n);
769 if (hairpin_conf->manual_bind == 0 ||
770 hairpin_conf->tx_explicit == 0) {
772 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
773 " index %u peer port %u with attributes %u %u",
774 dev->data->port_id, idx,
775 hairpin_conf->peers[0].port,
776 hairpin_conf->manual_bind,
777 hairpin_conf->tx_explicit);
781 rxq_ctrl = mlx5_rxq_hairpin_new(dev, idx, desc, hairpin_conf);
783 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
784 dev->data->port_id, idx);
788 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
789 dev->data->port_id, idx);
790 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
795 * DPDK callback to release a RX queue.
798 * Pointer to Ethernet device structure.
800 * Receive queue index.
803 mlx5_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
805 struct mlx5_rxq_data *rxq = dev->data->rx_queues[qid];
809 if (!mlx5_rxq_releasable(dev, qid))
810 rte_panic("port %u Rx queue %u is still used by a flow and"
811 " cannot be removed\n", dev->data->port_id, qid);
812 mlx5_rxq_release(dev, qid);
816 * Allocate queue vector and fill epoll fd list for Rx interrupts.
819 * Pointer to Ethernet device.
822 * 0 on success, a negative errno value otherwise and rte_errno is set.
825 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
827 struct mlx5_priv *priv = dev->data->dev_private;
829 unsigned int rxqs_n = priv->rxqs_n;
830 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
831 unsigned int count = 0;
832 struct rte_intr_handle *intr_handle = dev->intr_handle;
834 if (!dev->data->dev_conf.intr_conf.rxq)
836 mlx5_rx_intr_vec_disable(dev);
837 intr_handle->intr_vec = mlx5_malloc(0,
838 n * sizeof(intr_handle->intr_vec[0]),
840 if (intr_handle->intr_vec == NULL) {
842 "port %u failed to allocate memory for interrupt"
843 " vector, Rx interrupts will not be supported",
848 intr_handle->type = RTE_INTR_HANDLE_EXT;
849 for (i = 0; i != n; ++i) {
850 /* This rxq obj must not be released in this function. */
851 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
852 struct mlx5_rxq_obj *rxq_obj = rxq_ctrl ? rxq_ctrl->obj : NULL;
855 /* Skip queues that cannot request interrupts. */
856 if (!rxq_obj || (!rxq_obj->ibv_channel &&
857 !rxq_obj->devx_channel)) {
858 /* Use invalid intr_vec[] index to disable entry. */
859 intr_handle->intr_vec[i] =
860 RTE_INTR_VEC_RXTX_OFFSET +
861 RTE_MAX_RXTX_INTR_VEC_ID;
862 /* Decrease the rxq_ctrl's refcnt */
864 mlx5_rxq_release(dev, i);
867 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
869 "port %u too many Rx queues for interrupt"
870 " vector size (%d), Rx interrupts cannot be"
872 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
873 mlx5_rx_intr_vec_disable(dev);
877 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
881 "port %u failed to make Rx interrupt file"
882 " descriptor %d non-blocking for queue index"
884 dev->data->port_id, rxq_obj->fd, i);
885 mlx5_rx_intr_vec_disable(dev);
888 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
889 intr_handle->efds[count] = rxq_obj->fd;
893 mlx5_rx_intr_vec_disable(dev);
895 intr_handle->nb_efd = count;
900 * Clean up Rx interrupts handler.
903 * Pointer to Ethernet device.
906 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
908 struct mlx5_priv *priv = dev->data->dev_private;
909 struct rte_intr_handle *intr_handle = dev->intr_handle;
911 unsigned int rxqs_n = priv->rxqs_n;
912 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
914 if (!dev->data->dev_conf.intr_conf.rxq)
916 if (!intr_handle->intr_vec)
918 for (i = 0; i != n; ++i) {
919 if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
920 RTE_MAX_RXTX_INTR_VEC_ID)
923 * Need to access directly the queue to release the reference
924 * kept in mlx5_rx_intr_vec_enable().
926 mlx5_rxq_release(dev, i);
929 rte_intr_free_epoll_fd(intr_handle);
930 if (intr_handle->intr_vec)
931 mlx5_free(intr_handle->intr_vec);
932 intr_handle->nb_efd = 0;
933 intr_handle->intr_vec = NULL;
937 * MLX5 CQ notification .
940 * Pointer to receive queue structure.
942 * Sequence number per receive queue .
945 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
948 uint32_t doorbell_hi;
950 void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
952 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
953 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
954 doorbell = (uint64_t)doorbell_hi << 32;
955 doorbell |= rxq->cqn;
956 rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
957 mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
958 cq_db_reg, rxq->uar_lock_cq);
962 * DPDK callback for Rx queue interrupt enable.
965 * Pointer to Ethernet device structure.
970 * 0 on success, a negative errno value otherwise and rte_errno is set.
973 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
975 struct mlx5_rxq_ctrl *rxq_ctrl;
977 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
981 if (!rxq_ctrl->obj) {
982 mlx5_rxq_release(dev, rx_queue_id);
985 mlx5_arm_cq(&rxq_ctrl->rxq, rxq_ctrl->rxq.cq_arm_sn);
987 mlx5_rxq_release(dev, rx_queue_id);
995 * DPDK callback for Rx queue interrupt disable.
998 * Pointer to Ethernet device structure.
1003 * 0 on success, a negative errno value otherwise and rte_errno is set.
1006 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1008 struct mlx5_priv *priv = dev->data->dev_private;
1009 struct mlx5_rxq_ctrl *rxq_ctrl;
1012 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
1019 if (rxq_ctrl->irq) {
1020 ret = priv->obj_ops.rxq_event_get(rxq_ctrl->obj);
1023 rxq_ctrl->rxq.cq_arm_sn++;
1025 mlx5_rxq_release(dev, rx_queue_id);
1029 * The ret variable may be EAGAIN which means the get_event function was
1030 * called before receiving one.
1036 ret = rte_errno; /* Save rte_errno before cleanup. */
1037 mlx5_rxq_release(dev, rx_queue_id);
1039 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1040 dev->data->port_id, rx_queue_id);
1041 rte_errno = ret; /* Restore rte_errno. */
1046 * Verify the Rx queue objects list is empty
1049 * Pointer to Ethernet device.
1052 * The number of objects not released.
1055 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1057 struct mlx5_priv *priv = dev->data->dev_private;
1059 struct mlx5_rxq_obj *rxq_obj;
1061 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1062 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1063 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1070 * Callback function to initialize mbufs for Multi-Packet RQ.
1073 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1074 void *_m, unsigned int i __rte_unused)
1076 struct mlx5_mprq_buf *buf = _m;
1077 struct rte_mbuf_ext_shared_info *shinfo;
1078 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1081 memset(_m, 0, sizeof(*buf));
1083 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1084 for (j = 0; j != strd_n; ++j) {
1085 shinfo = &buf->shinfos[j];
1086 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1087 shinfo->fcb_opaque = buf;
1092 * Free mempool of Multi-Packet RQ.
1095 * Pointer to Ethernet device.
1098 * 0 on success, negative errno value on failure.
1101 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1103 struct mlx5_priv *priv = dev->data->dev_private;
1104 struct rte_mempool *mp = priv->mprq_mp;
1109 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1110 dev->data->port_id, mp->name);
1112 * If a buffer in the pool has been externally attached to a mbuf and it
1113 * is still in use by application, destroying the Rx queue can spoil
1114 * the packet. It is unlikely to happen but if application dynamically
1115 * creates and destroys with holding Rx packets, this can happen.
1117 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1118 * RQ isn't provided by application but managed by PMD.
1120 if (!rte_mempool_full(mp)) {
1122 "port %u mempool for Multi-Packet RQ is still in use",
1123 dev->data->port_id);
1127 rte_mempool_free(mp);
1128 /* Unset mempool for each Rx queue. */
1129 for (i = 0; i != priv->rxqs_n; ++i) {
1130 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1134 rxq->mprq_mp = NULL;
1136 priv->mprq_mp = NULL;
1141 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1142 * mempool. If already allocated, reuse it if there're enough elements.
1143 * Otherwise, resize it.
1146 * Pointer to Ethernet device.
1149 * 0 on success, negative errno value on failure.
1152 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1154 struct mlx5_priv *priv = dev->data->dev_private;
1155 struct rte_mempool *mp = priv->mprq_mp;
1156 char name[RTE_MEMPOOL_NAMESIZE];
1157 unsigned int desc = 0;
1158 unsigned int buf_len;
1159 unsigned int obj_num;
1160 unsigned int obj_size;
1161 unsigned int strd_num_n = 0;
1162 unsigned int strd_sz_n = 0;
1164 unsigned int n_ibv = 0;
1167 if (!mlx5_mprq_enabled(dev))
1169 /* Count the total number of descriptors configured. */
1170 for (i = 0; i != priv->rxqs_n; ++i) {
1171 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1172 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1173 (rxq, struct mlx5_rxq_ctrl, rxq);
1175 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1178 desc += 1 << rxq->elts_n;
1179 /* Get the max number of strides. */
1180 if (strd_num_n < rxq->strd_num_n)
1181 strd_num_n = rxq->strd_num_n;
1182 /* Get the max size of a stride. */
1183 if (strd_sz_n < rxq->strd_sz_n)
1184 strd_sz_n = rxq->strd_sz_n;
1186 MLX5_ASSERT(strd_num_n && strd_sz_n);
1187 buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1188 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len + (1 << strd_num_n) *
1189 sizeof(struct rte_mbuf_ext_shared_info) + RTE_PKTMBUF_HEADROOM;
1191 * Received packets can be either memcpy'd or externally referenced. In
1192 * case that the packet is attached to an mbuf as an external buffer, as
1193 * it isn't possible to predict how the buffers will be queued by
1194 * application, there's no option to exactly pre-allocate needed buffers
1195 * in advance but to speculatively prepares enough buffers.
1197 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1198 * received packets to buffers provided by application (rxq->mp) until
1199 * this Mempool gets available again.
1202 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1204 * rte_mempool_create_empty() has sanity check to refuse large cache
1205 * size compared to the number of elements.
1206 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1207 * constant number 2 instead.
1209 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1210 /* Check a mempool is already allocated and if it can be resued. */
1211 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1212 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1213 dev->data->port_id, mp->name);
1216 } else if (mp != NULL) {
1217 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1218 dev->data->port_id, mp->name);
1220 * If failed to free, which means it may be still in use, no way
1221 * but to keep using the existing one. On buffer underrun,
1222 * packets will be memcpy'd instead of external buffer
1225 if (mlx5_mprq_free_mp(dev)) {
1226 if (mp->elt_size >= obj_size)
1232 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1233 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1234 0, NULL, NULL, mlx5_mprq_buf_init,
1235 (void *)((uintptr_t)1 << strd_num_n),
1236 dev->device->numa_node, 0);
1239 "port %u failed to allocate a mempool for"
1240 " Multi-Packet RQ, count=%u, size=%u",
1241 dev->data->port_id, obj_num, obj_size);
1245 ret = mlx5_mr_mempool_register(&priv->sh->cdev->mr_scache,
1246 priv->sh->cdev->pd, mp, &priv->mp_id);
1247 if (ret < 0 && rte_errno != EEXIST) {
1249 DRV_LOG(ERR, "port %u failed to register a mempool for Multi-Packet RQ",
1250 dev->data->port_id);
1251 rte_mempool_free(mp);
1257 /* Set mempool for each Rx queue. */
1258 for (i = 0; i != priv->rxqs_n; ++i) {
1259 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1260 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1261 (rxq, struct mlx5_rxq_ctrl, rxq);
1263 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1267 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1268 dev->data->port_id);
1272 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1273 sizeof(struct rte_vlan_hdr) * 2 + \
1274 sizeof(struct rte_ipv6_hdr)))
1275 #define MAX_TCP_OPTION_SIZE 40u
1276 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1277 sizeof(struct rte_tcp_hdr) + \
1278 MAX_TCP_OPTION_SIZE))
1281 * Adjust the maximum LRO massage size.
1284 * Pointer to Ethernet device.
1287 * @param max_lro_size
1288 * The maximum size for LRO packet.
1291 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1292 uint32_t max_lro_size)
1294 struct mlx5_priv *priv = dev->data->dev_private;
1296 if (priv->config.hca_attr.lro_max_msg_sz_mode ==
1297 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1298 MLX5_MAX_TCP_HDR_OFFSET)
1299 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1300 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1301 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1302 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1303 if (priv->max_lro_msg_size)
1304 priv->max_lro_msg_size =
1305 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1307 priv->max_lro_msg_size = max_lro_size;
1309 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1310 dev->data->port_id, idx,
1311 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1315 * Create a DPDK Rx queue.
1318 * Pointer to Ethernet device.
1322 * Number of descriptors to configure in queue.
1324 * NUMA socket on which memory must be allocated.
1327 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1329 struct mlx5_rxq_ctrl *
1330 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1331 unsigned int socket, const struct rte_eth_rxconf *conf,
1332 const struct rte_eth_rxseg_split *rx_seg, uint16_t n_seg)
1334 struct mlx5_priv *priv = dev->data->dev_private;
1335 struct mlx5_rxq_ctrl *tmpl;
1336 unsigned int mb_len = rte_pktmbuf_data_room_size(rx_seg[0].mp);
1337 struct mlx5_dev_config *config = &priv->config;
1338 uint64_t offloads = conf->offloads |
1339 dev->data->dev_conf.rxmode.offloads;
1340 unsigned int lro_on_queue = !!(offloads & DEV_RX_OFFLOAD_TCP_LRO);
1341 unsigned int max_rx_pktlen = lro_on_queue ?
1342 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1343 dev->data->mtu + (unsigned int)RTE_ETHER_HDR_LEN +
1345 unsigned int non_scatter_min_mbuf_size = max_rx_pktlen +
1346 RTE_PKTMBUF_HEADROOM;
1347 unsigned int max_lro_size = 0;
1348 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1349 const int mprq_en = mlx5_check_mprq_support(dev) > 0 && n_seg == 1 &&
1350 !rx_seg[0].offset && !rx_seg[0].length;
1351 unsigned int mprq_stride_nums = config->mprq.stride_num_n ?
1352 config->mprq.stride_num_n : MLX5_MPRQ_STRIDE_NUM_N;
1353 unsigned int mprq_stride_size = non_scatter_min_mbuf_size <=
1354 (1U << config->mprq.max_stride_size_n) ?
1355 log2above(non_scatter_min_mbuf_size) : MLX5_MPRQ_STRIDE_SIZE_N;
1356 unsigned int mprq_stride_cap = (config->mprq.stride_num_n ?
1357 (1U << config->mprq.stride_num_n) : (1U << mprq_stride_nums)) *
1358 (config->mprq.stride_size_n ?
1359 (1U << config->mprq.stride_size_n) : (1U << mprq_stride_size));
1361 * Always allocate extra slots, even if eventually
1362 * the vector Rx will not be used.
1364 uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1365 const struct rte_eth_rxseg_split *qs_seg = rx_seg;
1366 unsigned int tail_len;
1368 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
1369 sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *) +
1371 (desc >> mprq_stride_nums) * sizeof(struct mlx5_mprq_buf *),
1377 MLX5_ASSERT(n_seg && n_seg <= MLX5_MAX_RXQ_NSEG);
1379 * Build the array of actual buffer offsets and lengths.
1380 * Pad with the buffers from the last memory pool if
1381 * needed to handle max size packets, replace zero length
1382 * with the buffer length from the pool.
1384 tail_len = max_rx_pktlen;
1386 struct mlx5_eth_rxseg *hw_seg =
1387 &tmpl->rxq.rxseg[tmpl->rxq.rxseg_n];
1388 uint32_t buf_len, offset, seg_len;
1391 * For the buffers beyond descriptions offset is zero,
1392 * the first buffer contains head room.
1394 buf_len = rte_pktmbuf_data_room_size(qs_seg->mp);
1395 offset = (tmpl->rxq.rxseg_n >= n_seg ? 0 : qs_seg->offset) +
1396 (tmpl->rxq.rxseg_n ? 0 : RTE_PKTMBUF_HEADROOM);
1398 * For the buffers beyond descriptions the length is
1399 * pool buffer length, zero lengths are replaced with
1400 * pool buffer length either.
1402 seg_len = tmpl->rxq.rxseg_n >= n_seg ? buf_len :
1406 /* Check is done in long int, now overflows. */
1407 if (buf_len < seg_len + offset) {
1408 DRV_LOG(ERR, "port %u Rx queue %u: Split offset/length "
1409 "%u/%u can't be satisfied",
1410 dev->data->port_id, idx,
1411 qs_seg->length, qs_seg->offset);
1415 if (seg_len > tail_len)
1416 seg_len = buf_len - offset;
1417 if (++tmpl->rxq.rxseg_n > MLX5_MAX_RXQ_NSEG) {
1419 "port %u too many SGEs (%u) needed to handle"
1420 " requested maximum packet size %u, the maximum"
1421 " supported are %u", dev->data->port_id,
1422 tmpl->rxq.rxseg_n, max_rx_pktlen,
1424 rte_errno = ENOTSUP;
1427 /* Build the actual scattering element in the queue object. */
1428 hw_seg->mp = qs_seg->mp;
1429 MLX5_ASSERT(offset <= UINT16_MAX);
1430 MLX5_ASSERT(seg_len <= UINT16_MAX);
1431 hw_seg->offset = (uint16_t)offset;
1432 hw_seg->length = (uint16_t)seg_len;
1434 * Advance the segment descriptor, the padding is the based
1435 * on the attributes of the last descriptor.
1437 if (tmpl->rxq.rxseg_n < n_seg)
1439 tail_len -= RTE_MIN(tail_len, seg_len);
1440 } while (tail_len || !rte_is_power_of_2(tmpl->rxq.rxseg_n));
1441 MLX5_ASSERT(tmpl->rxq.rxseg_n &&
1442 tmpl->rxq.rxseg_n <= MLX5_MAX_RXQ_NSEG);
1443 if (tmpl->rxq.rxseg_n > 1 && !(offloads & DEV_RX_OFFLOAD_SCATTER)) {
1444 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1445 " configured and no enough mbuf space(%u) to contain "
1446 "the maximum RX packet length(%u) with head-room(%u)",
1447 dev->data->port_id, idx, mb_len, max_rx_pktlen,
1448 RTE_PKTMBUF_HEADROOM);
1452 tmpl->type = MLX5_RXQ_TYPE_STANDARD;
1453 if (mlx5_mr_ctrl_init(&tmpl->rxq.mr_ctrl,
1454 &priv->sh->cdev->mr_scache.dev_gen, socket)) {
1455 /* rte_errno is already set. */
1458 tmpl->socket = socket;
1459 if (dev->data->dev_conf.intr_conf.rxq)
1462 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1463 * following conditions are met:
1464 * - MPRQ is enabled.
1465 * - The number of descs is more than the number of strides.
1466 * - max_rx_pktlen plus overhead is less than the max size
1467 * of a stride or mprq_stride_size is specified by a user.
1468 * Need to make sure that there are enough strides to encap
1469 * the maximum packet size in case mprq_stride_size is set.
1470 * Otherwise, enable Rx scatter if necessary.
1472 if (mprq_en && desc > (1U << mprq_stride_nums) &&
1473 (non_scatter_min_mbuf_size <=
1474 (1U << config->mprq.max_stride_size_n) ||
1475 (config->mprq.stride_size_n &&
1476 non_scatter_min_mbuf_size <= mprq_stride_cap))) {
1477 /* TODO: Rx scatter isn't supported yet. */
1478 tmpl->rxq.sges_n = 0;
1479 /* Trim the number of descs needed. */
1480 desc >>= mprq_stride_nums;
1481 tmpl->rxq.strd_num_n = config->mprq.stride_num_n ?
1482 config->mprq.stride_num_n : mprq_stride_nums;
1483 tmpl->rxq.strd_sz_n = config->mprq.stride_size_n ?
1484 config->mprq.stride_size_n : mprq_stride_size;
1485 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1486 tmpl->rxq.strd_scatter_en =
1487 !!(offloads & DEV_RX_OFFLOAD_SCATTER);
1488 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1489 config->mprq.max_memcpy_len);
1490 max_lro_size = RTE_MIN(max_rx_pktlen,
1491 (1u << tmpl->rxq.strd_num_n) *
1492 (1u << tmpl->rxq.strd_sz_n));
1494 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1495 " strd_num_n = %u, strd_sz_n = %u",
1496 dev->data->port_id, idx,
1497 tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1498 } else if (tmpl->rxq.rxseg_n == 1) {
1499 MLX5_ASSERT(max_rx_pktlen <= first_mb_free_size);
1500 tmpl->rxq.sges_n = 0;
1501 max_lro_size = max_rx_pktlen;
1502 } else if (offloads & DEV_RX_OFFLOAD_SCATTER) {
1503 unsigned int sges_n;
1505 if (lro_on_queue && first_mb_free_size <
1506 MLX5_MAX_LRO_HEADER_FIX) {
1507 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1508 " to include the max header size(%u) for LRO",
1509 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1510 rte_errno = ENOTSUP;
1514 * Determine the number of SGEs needed for a full packet
1515 * and round it to the next power of two.
1517 sges_n = log2above(tmpl->rxq.rxseg_n);
1518 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1520 "port %u too many SGEs (%u) needed to handle"
1521 " requested maximum packet size %u, the maximum"
1522 " supported are %u", dev->data->port_id,
1523 1 << sges_n, max_rx_pktlen,
1524 1u << MLX5_MAX_LOG_RQ_SEGS);
1525 rte_errno = ENOTSUP;
1528 tmpl->rxq.sges_n = sges_n;
1529 max_lro_size = max_rx_pktlen;
1531 if (config->mprq.enabled && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1533 "port %u MPRQ is requested but cannot be enabled\n"
1534 " (requested: pkt_sz = %u, desc_num = %u,"
1535 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1536 " supported: min_rxqs_num = %u,"
1537 " min_stride_sz = %u, max_stride_sz = %u).",
1538 dev->data->port_id, non_scatter_min_mbuf_size,
1540 config->mprq.stride_size_n ?
1541 (1U << config->mprq.stride_size_n) :
1542 (1U << mprq_stride_size),
1543 config->mprq.stride_num_n ?
1544 (1U << config->mprq.stride_num_n) :
1545 (1U << mprq_stride_nums),
1546 config->mprq.min_rxqs_num,
1547 (1U << config->mprq.min_stride_size_n),
1548 (1U << config->mprq.max_stride_size_n));
1549 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1550 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1551 if (desc % (1 << tmpl->rxq.sges_n)) {
1553 "port %u number of Rx queue descriptors (%u) is not a"
1554 " multiple of SGEs per packet (%u)",
1557 1 << tmpl->rxq.sges_n);
1561 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1562 /* Toggle RX checksum offload if hardware supports it. */
1563 tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);
1564 /* Configure Rx timestamp. */
1565 tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);
1566 tmpl->rxq.timestamp_rx_flag = 0;
1567 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1568 &tmpl->rxq.timestamp_offset,
1569 &tmpl->rxq.timestamp_rx_flag) != 0) {
1570 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1573 /* Configure VLAN stripping. */
1574 tmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
1575 /* By default, FCS (CRC) is stripped by hardware. */
1576 tmpl->rxq.crc_present = 0;
1577 tmpl->rxq.lro = lro_on_queue;
1578 if (offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
1579 if (config->hw_fcs_strip) {
1581 * RQs used for LRO-enabled TIRs should not be
1582 * configured to scatter the FCS.
1586 "port %u CRC stripping has been "
1587 "disabled but will still be performed "
1588 "by hardware, because LRO is enabled",
1589 dev->data->port_id);
1591 tmpl->rxq.crc_present = 1;
1594 "port %u CRC stripping has been disabled but will"
1595 " still be performed by hardware, make sure MLNX_OFED"
1596 " and firmware are up to date",
1597 dev->data->port_id);
1601 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1602 " incoming frames to hide it",
1604 tmpl->rxq.crc_present ? "disabled" : "enabled",
1605 tmpl->rxq.crc_present << 2);
1607 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1608 (!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
1609 tmpl->rxq.port_id = dev->data->port_id;
1611 tmpl->rxq.mp = rx_seg[0].mp;
1612 tmpl->rxq.elts_n = log2above(desc);
1613 tmpl->rxq.rq_repl_thresh =
1614 MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
1616 (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
1617 tmpl->rxq.mprq_bufs =
1618 (struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
1620 tmpl->rxq.uar_lock_cq = &priv->sh->uar_lock_cq;
1622 tmpl->rxq.idx = idx;
1623 __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1624 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1627 mlx5_mr_btree_free(&tmpl->rxq.mr_ctrl.cache_bh);
1633 * Create a DPDK Rx hairpin queue.
1636 * Pointer to Ethernet device.
1640 * Number of descriptors to configure in queue.
1641 * @param hairpin_conf
1642 * The hairpin binding configuration.
1645 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1647 struct mlx5_rxq_ctrl *
1648 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1649 const struct rte_eth_hairpin_conf *hairpin_conf)
1651 struct mlx5_priv *priv = dev->data->dev_private;
1652 struct mlx5_rxq_ctrl *tmpl;
1654 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1660 tmpl->type = MLX5_RXQ_TYPE_HAIRPIN;
1661 tmpl->socket = SOCKET_ID_ANY;
1662 tmpl->rxq.rss_hash = 0;
1663 tmpl->rxq.port_id = dev->data->port_id;
1665 tmpl->rxq.mp = NULL;
1666 tmpl->rxq.elts_n = log2above(desc);
1667 tmpl->rxq.elts = NULL;
1668 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1669 tmpl->hairpin_conf = *hairpin_conf;
1670 tmpl->rxq.idx = idx;
1671 __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1672 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1680 * Pointer to Ethernet device.
1685 * A pointer to the queue if it exists, NULL otherwise.
1687 struct mlx5_rxq_ctrl *
1688 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1690 struct mlx5_priv *priv = dev->data->dev_private;
1691 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1692 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1695 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1696 __atomic_fetch_add(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED);
1702 * Release a Rx queue.
1705 * Pointer to Ethernet device.
1710 * 1 while a reference on it exists, 0 when freed.
1713 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1715 struct mlx5_priv *priv = dev->data->dev_private;
1716 struct mlx5_rxq_ctrl *rxq_ctrl;
1718 if (priv->rxqs == NULL || (*priv->rxqs)[idx] == NULL)
1720 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1721 if (__atomic_sub_fetch(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED) > 1)
1723 if (rxq_ctrl->obj) {
1724 priv->obj_ops.rxq_obj_release(rxq_ctrl->obj);
1725 LIST_REMOVE(rxq_ctrl->obj, next);
1726 mlx5_free(rxq_ctrl->obj);
1727 rxq_ctrl->obj = NULL;
1729 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) {
1730 rxq_free_elts(rxq_ctrl);
1731 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
1733 if (!__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED)) {
1734 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
1735 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1736 LIST_REMOVE(rxq_ctrl, next);
1737 mlx5_free(rxq_ctrl);
1738 (*priv->rxqs)[idx] = NULL;
1744 * Verify the Rx Queue list is empty
1747 * Pointer to Ethernet device.
1750 * The number of object not released.
1753 mlx5_rxq_verify(struct rte_eth_dev *dev)
1755 struct mlx5_priv *priv = dev->data->dev_private;
1756 struct mlx5_rxq_ctrl *rxq_ctrl;
1759 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1760 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1761 dev->data->port_id, rxq_ctrl->rxq.idx);
1768 * Get a Rx queue type.
1771 * Pointer to Ethernet device.
1776 * The Rx queue type.
1779 mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx)
1781 struct mlx5_priv *priv = dev->data->dev_private;
1782 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1784 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1785 rxq_ctrl = container_of((*priv->rxqs)[idx],
1786 struct mlx5_rxq_ctrl,
1788 return rxq_ctrl->type;
1790 return MLX5_RXQ_TYPE_UNDEFINED;
1794 * Get a Rx hairpin queue configuration.
1797 * Pointer to Ethernet device.
1802 * Pointer to the configuration if a hairpin RX queue, otherwise NULL.
1804 const struct rte_eth_hairpin_conf *
1805 mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)
1807 struct mlx5_priv *priv = dev->data->dev_private;
1808 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1810 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1811 rxq_ctrl = container_of((*priv->rxqs)[idx],
1812 struct mlx5_rxq_ctrl,
1814 if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
1815 return &rxq_ctrl->hairpin_conf;
1821 * Match queues listed in arguments to queues contained in indirection table
1825 * Pointer to indirection table to match.
1827 * Queues to match to ques in indirection table.
1829 * Number of queues in the array.
1832 * 1 if all queues in indirection table match 0 othrwise.
1835 mlx5_ind_table_obj_match_queues(const struct mlx5_ind_table_obj *ind_tbl,
1836 const uint16_t *queues, uint32_t queues_n)
1838 return (ind_tbl->queues_n == queues_n) &&
1839 (!memcmp(ind_tbl->queues, queues,
1840 ind_tbl->queues_n * sizeof(ind_tbl->queues[0])));
1844 * Get an indirection table.
1847 * Pointer to Ethernet device.
1849 * Queues entering in the indirection table.
1851 * Number of queues in the array.
1854 * An indirection table if found.
1856 struct mlx5_ind_table_obj *
1857 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
1860 struct mlx5_priv *priv = dev->data->dev_private;
1861 struct mlx5_ind_table_obj *ind_tbl;
1863 rte_rwlock_read_lock(&priv->ind_tbls_lock);
1864 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1865 if ((ind_tbl->queues_n == queues_n) &&
1866 (memcmp(ind_tbl->queues, queues,
1867 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1869 __atomic_fetch_add(&ind_tbl->refcnt, 1,
1874 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
1879 * Release an indirection table.
1882 * Pointer to Ethernet device.
1884 * Indirection table to release.
1886 * Indirection table for Standalone queue.
1889 * 1 while a reference on it exists, 0 when freed.
1892 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
1893 struct mlx5_ind_table_obj *ind_tbl,
1896 struct mlx5_priv *priv = dev->data->dev_private;
1897 unsigned int i, ret;
1899 rte_rwlock_write_lock(&priv->ind_tbls_lock);
1900 ret = __atomic_sub_fetch(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
1901 if (!ret && !standalone)
1902 LIST_REMOVE(ind_tbl, next);
1903 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
1906 priv->obj_ops.ind_table_destroy(ind_tbl);
1907 for (i = 0; i != ind_tbl->queues_n; ++i)
1908 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1914 * Verify the Rx Queue list is empty
1917 * Pointer to Ethernet device.
1920 * The number of object not released.
1923 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
1925 struct mlx5_priv *priv = dev->data->dev_private;
1926 struct mlx5_ind_table_obj *ind_tbl;
1929 rte_rwlock_read_lock(&priv->ind_tbls_lock);
1930 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1932 "port %u indirection table obj %p still referenced",
1933 dev->data->port_id, (void *)ind_tbl);
1936 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
1941 * Setup an indirection table structure fields.
1944 * Pointer to Ethernet device.
1946 * Indirection table to modify.
1949 * 0 on success, a negative errno value otherwise and rte_errno is set.
1952 mlx5_ind_table_obj_setup(struct rte_eth_dev *dev,
1953 struct mlx5_ind_table_obj *ind_tbl)
1955 struct mlx5_priv *priv = dev->data->dev_private;
1956 uint32_t queues_n = ind_tbl->queues_n;
1957 uint16_t *queues = ind_tbl->queues;
1960 const unsigned int n = rte_is_power_of_2(queues_n) ?
1961 log2above(queues_n) :
1962 log2above(priv->config.ind_table_max_size);
1964 for (i = 0; i != queues_n; ++i) {
1965 if (!mlx5_rxq_get(dev, queues[i])) {
1970 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
1973 __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
1977 for (j = 0; j < i; j++)
1978 mlx5_rxq_release(dev, ind_tbl->queues[j]);
1980 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
1981 dev->data->port_id);
1986 * Create an indirection table.
1989 * Pointer to Ethernet device.
1991 * Queues entering in the indirection table.
1993 * Number of queues in the array.
1995 * Indirection table for Standalone queue.
1998 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2000 static struct mlx5_ind_table_obj *
2001 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
2002 uint32_t queues_n, bool standalone)
2004 struct mlx5_priv *priv = dev->data->dev_private;
2005 struct mlx5_ind_table_obj *ind_tbl;
2008 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
2009 queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
2014 ind_tbl->queues_n = queues_n;
2015 ind_tbl->queues = (uint16_t *)(ind_tbl + 1);
2016 memcpy(ind_tbl->queues, queues, queues_n * sizeof(*queues));
2017 ret = mlx5_ind_table_obj_setup(dev, ind_tbl);
2023 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2024 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
2025 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2031 * Modify an indirection table.
2034 * Pointer to Ethernet device.
2036 * Indirection table to modify.
2038 * Queues replacement for the indirection table.
2040 * Number of queues in the array.
2042 * Indirection table for Standalone queue.
2045 * 0 on success, a negative errno value otherwise and rte_errno is set.
2048 mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,
2049 struct mlx5_ind_table_obj *ind_tbl,
2050 uint16_t *queues, const uint32_t queues_n,
2053 struct mlx5_priv *priv = dev->data->dev_private;
2056 const unsigned int n = rte_is_power_of_2(queues_n) ?
2057 log2above(queues_n) :
2058 log2above(priv->config.ind_table_max_size);
2060 MLX5_ASSERT(standalone);
2061 RTE_SET_USED(standalone);
2062 if (__atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED) > 1) {
2064 * Modification of indirection ntables having more than 1
2065 * reference unsupported. Intended for standalone indirection
2069 "Port %u cannot modify indirection table (refcnt> 1).",
2070 dev->data->port_id);
2074 for (i = 0; i != queues_n; ++i) {
2075 if (!mlx5_rxq_get(dev, queues[i])) {
2080 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2081 ret = priv->obj_ops.ind_table_modify(dev, n, queues, queues_n, ind_tbl);
2084 for (j = 0; j < ind_tbl->queues_n; j++)
2085 mlx5_rxq_release(dev, ind_tbl->queues[j]);
2086 ind_tbl->queues_n = queues_n;
2087 ind_tbl->queues = queues;
2091 for (j = 0; j < i; j++)
2092 mlx5_rxq_release(dev, queues[j]);
2094 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2095 dev->data->port_id);
2100 mlx5_hrxq_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
2103 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2104 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2105 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2107 return (hrxq->rss_key_len != rss_desc->key_len ||
2108 memcmp(hrxq->rss_key, rss_desc->key, rss_desc->key_len) ||
2109 hrxq->hash_fields != rss_desc->hash_fields ||
2110 hrxq->ind_table->queues_n != rss_desc->queue_num ||
2111 memcmp(hrxq->ind_table->queues, rss_desc->queue,
2112 rss_desc->queue_num * sizeof(rss_desc->queue[0])));
2116 * Modify an Rx Hash queue configuration.
2119 * Pointer to Ethernet device.
2121 * Index to Hash Rx queue to modify.
2123 * RSS key for the Rx hash queue.
2124 * @param rss_key_len
2126 * @param hash_fields
2127 * Verbs protocol hash field to make the RSS on.
2129 * Queues entering in hash queue. In case of empty hash_fields only the
2130 * first queue index will be taken for the indirection table.
2135 * 0 on success, a negative errno value otherwise and rte_errno is set.
2138 mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hrxq_idx,
2139 const uint8_t *rss_key, uint32_t rss_key_len,
2140 uint64_t hash_fields,
2141 const uint16_t *queues, uint32_t queues_n)
2144 struct mlx5_ind_table_obj *ind_tbl = NULL;
2145 struct mlx5_priv *priv = dev->data->dev_private;
2146 struct mlx5_hrxq *hrxq =
2147 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2155 if (hrxq->rss_key_len != rss_key_len) {
2156 /* rss_key_len is fixed size 40 byte & not supposed to change */
2160 queues_n = hash_fields ? queues_n : 1;
2161 if (mlx5_ind_table_obj_match_queues(hrxq->ind_table,
2162 queues, queues_n)) {
2163 ind_tbl = hrxq->ind_table;
2165 if (hrxq->standalone) {
2167 * Replacement of indirection table unsupported for
2168 * stanalone hrxq objects (used by shared RSS).
2170 rte_errno = ENOTSUP;
2173 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2175 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2182 MLX5_ASSERT(priv->obj_ops.hrxq_modify);
2183 ret = priv->obj_ops.hrxq_modify(dev, hrxq, rss_key,
2184 hash_fields, ind_tbl);
2189 if (ind_tbl != hrxq->ind_table) {
2190 MLX5_ASSERT(!hrxq->standalone);
2191 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2193 hrxq->ind_table = ind_tbl;
2195 hrxq->hash_fields = hash_fields;
2196 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2200 if (ind_tbl != hrxq->ind_table) {
2201 MLX5_ASSERT(!hrxq->standalone);
2202 mlx5_ind_table_obj_release(dev, ind_tbl, hrxq->standalone);
2209 __mlx5_hrxq_remove(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
2211 struct mlx5_priv *priv = dev->data->dev_private;
2213 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2214 mlx5_glue->destroy_flow_action(hrxq->action);
2216 priv->obj_ops.hrxq_destroy(hrxq);
2217 if (!hrxq->standalone) {
2218 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2221 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2225 * Release the hash Rx queue.
2228 * Pointer to Ethernet device.
2230 * Index to Hash Rx queue to release.
2233 * mlx5 list pointer.
2235 * Hash queue entry pointer.
2238 mlx5_hrxq_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2240 struct rte_eth_dev *dev = tool_ctx;
2241 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2243 __mlx5_hrxq_remove(dev, hrxq);
2246 static struct mlx5_hrxq *
2247 __mlx5_hrxq_create(struct rte_eth_dev *dev,
2248 struct mlx5_flow_rss_desc *rss_desc)
2250 struct mlx5_priv *priv = dev->data->dev_private;
2251 const uint8_t *rss_key = rss_desc->key;
2252 uint32_t rss_key_len = rss_desc->key_len;
2253 bool standalone = !!rss_desc->shared_rss;
2254 const uint16_t *queues =
2255 standalone ? rss_desc->const_q : rss_desc->queue;
2256 uint32_t queues_n = rss_desc->queue_num;
2257 struct mlx5_hrxq *hrxq = NULL;
2258 uint32_t hrxq_idx = 0;
2259 struct mlx5_ind_table_obj *ind_tbl = rss_desc->ind_tbl;
2262 queues_n = rss_desc->hash_fields ? queues_n : 1;
2264 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2266 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2270 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2273 hrxq->standalone = standalone;
2274 hrxq->idx = hrxq_idx;
2275 hrxq->ind_table = ind_tbl;
2276 hrxq->rss_key_len = rss_key_len;
2277 hrxq->hash_fields = rss_desc->hash_fields;
2278 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2279 ret = priv->obj_ops.hrxq_new(dev, hrxq, rss_desc->tunnel);
2284 if (!rss_desc->ind_tbl)
2285 mlx5_ind_table_obj_release(dev, ind_tbl, standalone);
2287 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2291 struct mlx5_list_entry *
2292 mlx5_hrxq_create_cb(void *tool_ctx, void *cb_ctx)
2294 struct rte_eth_dev *dev = tool_ctx;
2295 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2296 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2297 struct mlx5_hrxq *hrxq;
2299 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2300 return hrxq ? &hrxq->entry : NULL;
2303 struct mlx5_list_entry *
2304 mlx5_hrxq_clone_cb(void *tool_ctx, struct mlx5_list_entry *entry,
2305 void *cb_ctx __rte_unused)
2307 struct rte_eth_dev *dev = tool_ctx;
2308 struct mlx5_priv *priv = dev->data->dev_private;
2309 struct mlx5_hrxq *hrxq;
2310 uint32_t hrxq_idx = 0;
2312 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2315 memcpy(hrxq, entry, sizeof(*hrxq) + MLX5_RSS_HASH_KEY_LEN);
2316 hrxq->idx = hrxq_idx;
2317 return &hrxq->entry;
2321 mlx5_hrxq_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2323 struct rte_eth_dev *dev = tool_ctx;
2324 struct mlx5_priv *priv = dev->data->dev_private;
2325 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2327 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2331 * Get an Rx Hash queue.
2334 * Pointer to Ethernet device.
2336 * RSS configuration for the Rx hash queue.
2339 * An hash Rx queue index on success.
2341 uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,
2342 struct mlx5_flow_rss_desc *rss_desc)
2344 struct mlx5_priv *priv = dev->data->dev_private;
2345 struct mlx5_hrxq *hrxq;
2346 struct mlx5_list_entry *entry;
2347 struct mlx5_flow_cb_ctx ctx = {
2351 if (rss_desc->shared_rss) {
2352 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2354 entry = mlx5_list_register(priv->hrxqs, &ctx);
2357 hrxq = container_of(entry, typeof(*hrxq), entry);
2365 * Release the hash Rx queue.
2368 * Pointer to Ethernet device.
2370 * Index to Hash Rx queue to release.
2373 * 1 while a reference on it exists, 0 when freed.
2375 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
2377 struct mlx5_priv *priv = dev->data->dev_private;
2378 struct mlx5_hrxq *hrxq;
2380 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2383 if (!hrxq->standalone)
2384 return mlx5_list_unregister(priv->hrxqs, &hrxq->entry);
2385 __mlx5_hrxq_remove(dev, hrxq);
2390 * Create a drop Rx Hash queue.
2393 * Pointer to Ethernet device.
2396 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2399 mlx5_drop_action_create(struct rte_eth_dev *dev)
2401 struct mlx5_priv *priv = dev->data->dev_private;
2402 struct mlx5_hrxq *hrxq = NULL;
2405 if (priv->drop_queue.hrxq)
2406 return priv->drop_queue.hrxq;
2407 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
2410 "Port %u cannot allocate memory for drop queue.",
2411 dev->data->port_id);
2415 priv->drop_queue.hrxq = hrxq;
2416 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
2418 if (!hrxq->ind_table) {
2422 ret = priv->obj_ops.drop_action_create(dev);
2428 if (hrxq->ind_table)
2429 mlx5_free(hrxq->ind_table);
2430 priv->drop_queue.hrxq = NULL;
2437 * Release a drop hash Rx queue.
2440 * Pointer to Ethernet device.
2443 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
2445 struct mlx5_priv *priv = dev->data->dev_private;
2446 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2448 if (!priv->drop_queue.hrxq)
2450 priv->obj_ops.drop_action_destroy(dev);
2451 mlx5_free(priv->drop_queue.rxq);
2452 mlx5_free(hrxq->ind_table);
2454 priv->drop_queue.rxq = NULL;
2455 priv->drop_queue.hrxq = NULL;
2459 * Verify the Rx Queue list is empty
2462 * Pointer to Ethernet device.
2465 * The number of object not released.
2468 mlx5_hrxq_verify(struct rte_eth_dev *dev)
2470 struct mlx5_priv *priv = dev->data->dev_private;
2472 return mlx5_list_get_entry_num(priv->hrxqs);
2476 * Set the Rx queue timestamp conversion parameters
2479 * Pointer to the Ethernet device structure.
2482 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
2484 struct mlx5_priv *priv = dev->data->dev_private;
2485 struct mlx5_dev_ctx_shared *sh = priv->sh;
2486 struct mlx5_rxq_data *data;
2489 for (i = 0; i != priv->rxqs_n; ++i) {
2490 if (!(*priv->rxqs)[i])
2492 data = (*priv->rxqs)[i];
2494 data->rt_timestamp = priv->config.rt_timestamp;