1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
24 #include <mlx5_common_mr.h>
26 #include "mlx5_defs.h"
30 #include "mlx5_utils.h"
31 #include "mlx5_autoconf.h"
32 #include "mlx5_devx.h"
35 /* Default RSS hash key also used for ConnectX-3. */
36 uint8_t rss_hash_default_key[] = {
37 0x2c, 0xc6, 0x81, 0xd1,
38 0x5b, 0xdb, 0xf4, 0xf7,
39 0xfc, 0xa2, 0x83, 0x19,
40 0xdb, 0x1a, 0x3e, 0x94,
41 0x6b, 0x9e, 0x38, 0xd9,
42 0x2c, 0x9c, 0x03, 0xd1,
43 0xad, 0x99, 0x44, 0xa7,
44 0xd9, 0x56, 0x3d, 0x59,
45 0x06, 0x3c, 0x25, 0xf3,
46 0xfc, 0x1f, 0xdc, 0x2a,
49 /* Length of the default RSS hash key. */
50 static_assert(MLX5_RSS_HASH_KEY_LEN ==
51 (unsigned int)sizeof(rss_hash_default_key),
52 "wrong RSS default key size.");
55 * Calculate the number of CQEs in CQ for the Rx queue.
58 * Pointer to receive queue structure.
61 * Number of CQEs in CQ.
64 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
67 unsigned int wqe_n = 1 << rxq_data->elts_n;
69 if (mlx5_rxq_mprq_enabled(rxq_data))
70 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
77 * Allocate RX queue elements for Multi-Packet RQ.
80 * Pointer to RX queue structure.
83 * 0 on success, a negative errno value otherwise and rte_errno is set.
86 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
88 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
89 unsigned int wqe_n = 1 << rxq->elts_n;
93 /* Iterate on segments. */
94 for (i = 0; i <= wqe_n; ++i) {
95 struct mlx5_mprq_buf *buf;
97 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
98 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
103 (*rxq->mprq_bufs)[i] = buf;
105 rxq->mprq_repl = buf;
108 "port %u MPRQ queue %u allocated and configured %u segments",
109 rxq->port_id, rxq->idx, wqe_n);
112 err = rte_errno; /* Save rte_errno before cleanup. */
114 for (i = 0; (i != wqe_n); ++i) {
115 if ((*rxq->mprq_bufs)[i] != NULL)
116 rte_mempool_put(rxq->mprq_mp,
117 (*rxq->mprq_bufs)[i]);
118 (*rxq->mprq_bufs)[i] = NULL;
120 DRV_LOG(DEBUG, "port %u MPRQ queue %u failed, freed everything",
121 rxq->port_id, rxq->idx);
122 rte_errno = err; /* Restore rte_errno. */
127 * Allocate RX queue elements for Single-Packet RQ.
130 * Pointer to RX queue structure.
133 * 0 on success, negative errno value on failure.
136 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
138 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
139 unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
140 (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) :
141 (1 << rxq_ctrl->rxq.elts_n);
145 /* Iterate on segments. */
146 for (i = 0; (i != elts_n); ++i) {
147 struct mlx5_eth_rxseg *seg = &rxq_ctrl->rxq.rxseg[i % sges_n];
148 struct rte_mbuf *buf;
150 buf = rte_pktmbuf_alloc(seg->mp);
152 if (rxq_ctrl->share_group == 0)
153 DRV_LOG(ERR, "port %u queue %u empty mbuf pool",
154 RXQ_PORT_ID(rxq_ctrl),
157 DRV_LOG(ERR, "share group %u queue %u empty mbuf pool",
158 rxq_ctrl->share_group,
159 rxq_ctrl->share_qid);
163 /* Headroom is reserved by rte_pktmbuf_alloc(). */
164 MLX5_ASSERT(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
165 /* Buffer is supposed to be empty. */
166 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
167 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
168 MLX5_ASSERT(!buf->next);
169 SET_DATA_OFF(buf, seg->offset);
170 PORT(buf) = rxq_ctrl->rxq.port_id;
171 DATA_LEN(buf) = seg->length;
172 PKT_LEN(buf) = seg->length;
174 (*rxq_ctrl->rxq.elts)[i] = buf;
176 /* If Rx vector is activated. */
177 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
178 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
179 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
180 struct rte_pktmbuf_pool_private *priv =
181 (struct rte_pktmbuf_pool_private *)
182 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
185 /* Initialize default rearm_data for vPMD. */
186 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
187 rte_mbuf_refcnt_set(mbuf_init, 1);
188 mbuf_init->nb_segs = 1;
189 /* For shared queues port is provided in CQE */
190 mbuf_init->port = rxq->shared ? 0 : rxq->port_id;
191 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
192 mbuf_init->ol_flags = RTE_MBUF_F_EXTERNAL;
194 * prevent compiler reordering:
195 * rearm_data covers previous fields.
197 rte_compiler_barrier();
198 rxq->mbuf_initializer =
199 *(rte_xmm_t *)&mbuf_init->rearm_data;
200 /* Padding with a fake mbuf for vectorized Rx. */
201 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
202 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
204 if (rxq_ctrl->share_group == 0)
206 "port %u SPRQ queue %u allocated and configured %u segments (max %u packets)",
207 RXQ_PORT_ID(rxq_ctrl), rxq_ctrl->rxq.idx, elts_n,
208 elts_n / (1 << rxq_ctrl->rxq.sges_n));
211 "share group %u SPRQ queue %u allocated and configured %u segments (max %u packets)",
212 rxq_ctrl->share_group, rxq_ctrl->share_qid, elts_n,
213 elts_n / (1 << rxq_ctrl->rxq.sges_n));
216 err = rte_errno; /* Save rte_errno before cleanup. */
218 for (i = 0; (i != elts_n); ++i) {
219 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
220 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
221 (*rxq_ctrl->rxq.elts)[i] = NULL;
223 if (rxq_ctrl->share_group == 0)
224 DRV_LOG(DEBUG, "port %u SPRQ queue %u failed, freed everything",
225 RXQ_PORT_ID(rxq_ctrl), rxq_ctrl->rxq.idx);
227 DRV_LOG(DEBUG, "share group %u SPRQ queue %u failed, freed everything",
228 rxq_ctrl->share_group, rxq_ctrl->share_qid);
229 rte_errno = err; /* Restore rte_errno. */
234 * Allocate RX queue elements.
237 * Pointer to RX queue structure.
240 * 0 on success, negative errno value on failure.
243 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
248 * For MPRQ we need to allocate both MPRQ buffers
249 * for WQEs and simple mbufs for vector processing.
251 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
252 ret = rxq_alloc_elts_mprq(rxq_ctrl);
254 ret = rxq_alloc_elts_sprq(rxq_ctrl);
259 * Free RX queue elements for Multi-Packet RQ.
262 * Pointer to RX queue structure.
265 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
267 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
270 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing %d WRs",
271 rxq->port_id, rxq->idx, (1u << rxq->elts_n));
272 if (rxq->mprq_bufs == NULL)
274 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
275 if ((*rxq->mprq_bufs)[i] != NULL)
276 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
277 (*rxq->mprq_bufs)[i] = NULL;
279 if (rxq->mprq_repl != NULL) {
280 mlx5_mprq_buf_free(rxq->mprq_repl);
281 rxq->mprq_repl = NULL;
286 * Free RX queue elements for Single-Packet RQ.
289 * Pointer to RX queue structure.
292 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
294 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
295 const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
296 (1 << rxq->elts_n) * (1 << rxq->strd_num_n) :
298 const uint16_t q_mask = q_n - 1;
299 uint16_t elts_ci = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
300 rxq->elts_ci : rxq->rq_ci;
301 uint16_t used = q_n - (elts_ci - rxq->rq_pi);
304 if (rxq_ctrl->share_group == 0)
305 DRV_LOG(DEBUG, "port %u Rx queue %u freeing %d WRs",
306 RXQ_PORT_ID(rxq_ctrl), rxq->idx, q_n);
308 DRV_LOG(DEBUG, "share group %u Rx queue %u freeing %d WRs",
309 rxq_ctrl->share_group, rxq_ctrl->share_qid, q_n);
310 if (rxq->elts == NULL)
313 * Some mbuf in the Ring belongs to the application.
314 * They cannot be freed.
316 if (mlx5_rxq_check_vec_support(rxq) > 0) {
317 for (i = 0; i < used; ++i)
318 (*rxq->elts)[(elts_ci + i) & q_mask] = NULL;
319 rxq->rq_pi = elts_ci;
321 for (i = 0; i != q_n; ++i) {
322 if ((*rxq->elts)[i] != NULL)
323 rte_pktmbuf_free_seg((*rxq->elts)[i]);
324 (*rxq->elts)[i] = NULL;
329 * Free RX queue elements.
332 * Pointer to RX queue structure.
335 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
338 * For MPRQ we need to allocate both MPRQ buffers
339 * for WQEs and simple mbufs for vector processing.
341 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
342 rxq_free_elts_mprq(rxq_ctrl);
343 rxq_free_elts_sprq(rxq_ctrl);
347 * Returns the per-queue supported offloads.
350 * Pointer to Ethernet device.
353 * Supported Rx offloads.
356 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
358 struct mlx5_priv *priv = dev->data->dev_private;
359 struct mlx5_dev_config *config = &priv->config;
360 uint64_t offloads = (RTE_ETH_RX_OFFLOAD_SCATTER |
361 RTE_ETH_RX_OFFLOAD_TIMESTAMP |
362 RTE_ETH_RX_OFFLOAD_RSS_HASH);
364 if (!config->mprq.enabled)
365 offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
366 if (config->hw_fcs_strip)
367 offloads |= RTE_ETH_RX_OFFLOAD_KEEP_CRC;
369 offloads |= (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
370 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
371 RTE_ETH_RX_OFFLOAD_TCP_CKSUM);
372 if (config->hw_vlan_strip)
373 offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
374 if (MLX5_LRO_SUPPORTED(dev))
375 offloads |= RTE_ETH_RX_OFFLOAD_TCP_LRO;
381 * Returns the per-port supported offloads.
384 * Supported Rx offloads.
387 mlx5_get_rx_port_offloads(void)
389 uint64_t offloads = RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
395 * Verify if the queue can be released.
398 * Pointer to Ethernet device.
403 * 1 if the queue can be released
404 * 0 if the queue can not be released, there are references to it.
405 * Negative errno and rte_errno is set if queue doesn't exist.
408 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
410 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
416 return (__atomic_load_n(&rxq->refcnt, __ATOMIC_RELAXED) == 1);
419 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
421 rxq_sync_cq(struct mlx5_rxq_data *rxq)
423 const uint16_t cqe_n = 1 << rxq->cqe_n;
424 const uint16_t cqe_mask = cqe_n - 1;
425 volatile struct mlx5_cqe *cqe;
430 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
431 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
432 if (ret == MLX5_CQE_STATUS_HW_OWN)
434 if (ret == MLX5_CQE_STATUS_ERR) {
438 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
439 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
443 /* Compute the next non compressed CQE. */
444 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
447 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
448 for (i = 0; i < cqe_n; i++) {
449 cqe = &(*rxq->cqes)[i];
450 cqe->op_own = MLX5_CQE_INVALIDATE;
452 /* Resync CQE and WQE (WQ in RESET state). */
454 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
456 *rxq->rq_db = rte_cpu_to_be_32(0);
461 * Rx queue stop. Device queue goes to the RESET state,
462 * all involved mbufs are freed from WQ.
465 * Pointer to Ethernet device structure.
470 * 0 on success, a negative errno value otherwise and rte_errno is set.
473 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
475 struct mlx5_priv *priv = dev->data->dev_private;
476 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
477 struct mlx5_rxq_ctrl *rxq_ctrl = rxq->ctrl;
480 MLX5_ASSERT(rxq != NULL && rxq_ctrl != NULL);
481 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
482 ret = priv->obj_ops.rxq_obj_modify(rxq, MLX5_RXQ_MOD_RDY2RST);
484 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
489 /* Remove all processes CQEs. */
490 rxq_sync_cq(&rxq_ctrl->rxq);
491 /* Free all involved mbufs. */
492 rxq_free_elts(rxq_ctrl);
493 /* Set the actual queue state. */
494 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
499 * Rx queue stop. Device queue goes to the RESET state,
500 * all involved mbufs are freed from WQ.
503 * Pointer to Ethernet device structure.
508 * 0 on success, a negative errno value otherwise and rte_errno is set.
511 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
513 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
516 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
517 DRV_LOG(ERR, "Hairpin queue can't be stopped");
521 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
524 * Vectorized Rx burst requires the CQ and RQ indices
525 * synchronized, that might be broken on RQ restart
526 * and cause Rx malfunction, so queue stopping is
527 * not supported if vectorized Rx burst is engaged.
528 * The routine pointer depends on the process
529 * type, should perform check there.
531 if (pkt_burst == mlx5_rx_burst_vec) {
532 DRV_LOG(ERR, "Rx queue stop is not supported "
533 "for vectorized Rx");
537 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
538 ret = mlx5_mp_os_req_queue_control(dev, idx,
539 MLX5_MP_REQ_QUEUE_RX_STOP);
541 ret = mlx5_rx_queue_stop_primary(dev, idx);
547 * Rx queue start. Device queue goes to the ready state,
548 * all required mbufs are allocated and WQ is replenished.
551 * Pointer to Ethernet device structure.
556 * 0 on success, a negative errno value otherwise and rte_errno is set.
559 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
561 struct mlx5_priv *priv = dev->data->dev_private;
562 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
563 struct mlx5_rxq_data *rxq_data = &rxq->ctrl->rxq;
566 MLX5_ASSERT(rxq != NULL && rxq->ctrl != NULL);
567 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
568 /* Allocate needed buffers. */
569 ret = rxq_alloc_elts(rxq->ctrl);
571 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
576 *rxq_data->cq_db = rte_cpu_to_be_32(rxq_data->cq_ci);
578 /* Reset RQ consumer before moving queue to READY state. */
579 *rxq_data->rq_db = rte_cpu_to_be_32(0);
581 ret = priv->obj_ops.rxq_obj_modify(rxq, MLX5_RXQ_MOD_RST2RDY);
583 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
588 /* Reinitialize RQ - set WQEs. */
589 mlx5_rxq_initialize(rxq_data);
590 rxq_data->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
591 /* Set actual queue state. */
592 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
597 * Rx queue start. Device queue goes to the ready state,
598 * all required mbufs are allocated and WQ is replenished.
601 * Pointer to Ethernet device structure.
606 * 0 on success, a negative errno value otherwise and rte_errno is set.
609 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
613 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
614 DRV_LOG(ERR, "Hairpin queue can't be started");
618 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
620 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
621 ret = mlx5_mp_os_req_queue_control(dev, idx,
622 MLX5_MP_REQ_QUEUE_RX_START);
624 ret = mlx5_rx_queue_start_primary(dev, idx);
630 * Rx queue presetup checks.
633 * Pointer to Ethernet device structure.
637 * Number of descriptors to configure in queue.
638 * @param[out] rxq_ctrl
639 * Address of pointer to shared Rx queue control.
642 * 0 on success, a negative errno value otherwise and rte_errno is set.
645 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc,
646 struct mlx5_rxq_ctrl **rxq_ctrl)
648 struct mlx5_priv *priv = dev->data->dev_private;
649 struct mlx5_rxq_priv *rxq;
652 if (!rte_is_power_of_2(*desc)) {
653 *desc = 1 << log2above(*desc);
655 "port %u increased number of descriptors in Rx queue %u"
656 " to the next power of two (%d)",
657 dev->data->port_id, idx, *desc);
659 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
660 dev->data->port_id, idx, *desc);
661 if (idx >= priv->rxqs_n) {
662 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
663 dev->data->port_id, idx, priv->rxqs_n);
664 rte_errno = EOVERFLOW;
667 if (rxq_ctrl == NULL || *rxq_ctrl == NULL)
669 if (!(*rxq_ctrl)->rxq.shared) {
670 if (!mlx5_rxq_releasable(dev, idx)) {
671 DRV_LOG(ERR, "port %u unable to release queue index %u",
672 dev->data->port_id, idx);
676 mlx5_rxq_release(dev, idx);
678 if ((*rxq_ctrl)->obj != NULL)
679 /* Some port using shared Rx queue has been started. */
681 /* Release all owner RxQ to reconfigure Shared RxQ. */
683 rxq = LIST_FIRST(&(*rxq_ctrl)->owners);
684 LIST_REMOVE(rxq, owner_entry);
685 empty = LIST_EMPTY(&(*rxq_ctrl)->owners);
686 mlx5_rxq_release(ETH_DEV(rxq->priv), rxq->idx);
694 * Get the shared Rx queue object that matches group and queue index.
697 * Pointer to Ethernet device structure.
701 * Shared RX queue index.
704 * Shared RXQ object that matching, or NULL if not found.
706 static struct mlx5_rxq_ctrl *
707 mlx5_shared_rxq_get(struct rte_eth_dev *dev, uint32_t group, uint16_t share_qid)
709 struct mlx5_rxq_ctrl *rxq_ctrl;
710 struct mlx5_priv *priv = dev->data->dev_private;
712 LIST_FOREACH(rxq_ctrl, &priv->sh->shared_rxqs, share_entry) {
713 if (rxq_ctrl->share_group == group &&
714 rxq_ctrl->share_qid == share_qid)
721 * Check whether requested Rx queue configuration matches shared RXQ.
724 * Pointer to shared RXQ.
726 * Pointer to Ethernet device structure.
730 * Number of descriptors to configure in queue.
732 * NUMA socket on which memory must be allocated.
734 * Thresholds parameters.
736 * Memory pool for buffer allocations.
739 * 0 on success, a negative errno value otherwise and rte_errno is set.
742 mlx5_shared_rxq_match(struct mlx5_rxq_ctrl *rxq_ctrl, struct rte_eth_dev *dev,
743 uint16_t idx, uint16_t desc, unsigned int socket,
744 const struct rte_eth_rxconf *conf,
745 struct rte_mempool *mp)
747 struct mlx5_priv *spriv = LIST_FIRST(&rxq_ctrl->owners)->priv;
748 struct mlx5_priv *priv = dev->data->dev_private;
752 if (rxq_ctrl->socket != socket) {
753 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: socket mismatch",
754 dev->data->port_id, idx);
757 if (rxq_ctrl->rxq.elts_n != log2above(desc)) {
758 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: descriptor number mismatch",
759 dev->data->port_id, idx);
762 if (priv->mtu != spriv->mtu) {
763 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: mtu mismatch",
764 dev->data->port_id, idx);
767 if (priv->dev_data->dev_conf.intr_conf.rxq !=
768 spriv->dev_data->dev_conf.intr_conf.rxq) {
769 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: interrupt mismatch",
770 dev->data->port_id, idx);
773 if (mp != NULL && rxq_ctrl->rxq.mp != mp) {
774 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: mempool mismatch",
775 dev->data->port_id, idx);
777 } else if (mp == NULL) {
778 for (i = 0; i < conf->rx_nseg; i++) {
779 if (conf->rx_seg[i].split.mp !=
780 rxq_ctrl->rxq.rxseg[i].mp ||
781 conf->rx_seg[i].split.length !=
782 rxq_ctrl->rxq.rxseg[i].length) {
783 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: segment %u configuration mismatch",
784 dev->data->port_id, idx, i);
789 if (priv->config.hw_padding != spriv->config.hw_padding) {
790 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: padding mismatch",
791 dev->data->port_id, idx);
794 if (priv->config.cqe_comp != spriv->config.cqe_comp ||
795 (priv->config.cqe_comp &&
796 priv->config.cqe_comp_fmt != spriv->config.cqe_comp_fmt)) {
797 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: CQE compression mismatch",
798 dev->data->port_id, idx);
807 * Pointer to Ethernet device structure.
811 * Number of descriptors to configure in queue.
813 * NUMA socket on which memory must be allocated.
815 * Thresholds parameters.
817 * Memory pool for buffer allocations.
820 * 0 on success, a negative errno value otherwise and rte_errno is set.
823 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
824 unsigned int socket, const struct rte_eth_rxconf *conf,
825 struct rte_mempool *mp)
827 struct mlx5_priv *priv = dev->data->dev_private;
828 struct mlx5_rxq_priv *rxq;
829 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
830 struct rte_eth_rxseg_split *rx_seg =
831 (struct rte_eth_rxseg_split *)conf->rx_seg;
832 struct rte_eth_rxseg_split rx_single = {.mp = mp};
833 uint16_t n_seg = conf->rx_nseg;
835 uint64_t offloads = conf->offloads |
836 dev->data->dev_conf.rxmode.offloads;
840 * The parameters should be checked on rte_eth_dev layer.
841 * If mp is specified it means the compatible configuration
842 * without buffer split feature tuning.
848 /* The offloads should be checked on rte_eth_dev layer. */
849 MLX5_ASSERT(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
850 if (!(offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) {
851 DRV_LOG(ERR, "port %u queue index %u split "
852 "offload not configured",
853 dev->data->port_id, idx);
857 MLX5_ASSERT(n_seg < MLX5_MAX_RXQ_NSEG);
859 if (conf->share_group > 0) {
860 if (!priv->config.hca_attr.mem_rq_rmp) {
861 DRV_LOG(ERR, "port %u queue index %u shared Rx queue not supported by fw",
862 dev->data->port_id, idx);
866 if (priv->obj_ops.rxq_obj_new != devx_obj_ops.rxq_obj_new) {
867 DRV_LOG(ERR, "port %u queue index %u shared Rx queue needs DevX api",
868 dev->data->port_id, idx);
872 if (conf->share_qid >= priv->rxqs_n) {
873 DRV_LOG(ERR, "port %u shared Rx queue index %u > number of Rx queues %u",
874 dev->data->port_id, conf->share_qid,
879 if (priv->config.mprq.enabled) {
880 DRV_LOG(ERR, "port %u shared Rx queue index %u: not supported when MPRQ enabled",
881 dev->data->port_id, conf->share_qid);
885 /* Try to reuse shared RXQ. */
886 rxq_ctrl = mlx5_shared_rxq_get(dev, conf->share_group,
888 if (rxq_ctrl != NULL &&
889 !mlx5_shared_rxq_match(rxq_ctrl, dev, idx, desc, socket,
895 res = mlx5_rx_queue_pre_setup(dev, idx, &desc, &rxq_ctrl);
899 rxq = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*rxq), 0,
902 DRV_LOG(ERR, "port %u unable to allocate rx queue index %u private data",
903 dev->data->port_id, idx);
909 (*priv->rxq_privs)[idx] = rxq;
910 if (rxq_ctrl != NULL) {
911 /* Join owner list. */
912 LIST_INSERT_HEAD(&rxq_ctrl->owners, rxq, owner_entry);
913 rxq->ctrl = rxq_ctrl;
915 rxq_ctrl = mlx5_rxq_new(dev, rxq, desc, socket, conf, rx_seg,
917 if (rxq_ctrl == NULL) {
918 DRV_LOG(ERR, "port %u unable to allocate rx queue index %u",
919 dev->data->port_id, idx);
921 (*priv->rxq_privs)[idx] = NULL;
926 mlx5_rxq_ref(dev, idx);
927 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
928 dev->data->port_id, idx);
929 dev->data->rx_queues[idx] = &rxq_ctrl->rxq;
936 * Pointer to Ethernet device structure.
940 * Number of descriptors to configure in queue.
941 * @param hairpin_conf
942 * Hairpin configuration parameters.
945 * 0 on success, a negative errno value otherwise and rte_errno is set.
948 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
950 const struct rte_eth_hairpin_conf *hairpin_conf)
952 struct mlx5_priv *priv = dev->data->dev_private;
953 struct mlx5_rxq_priv *rxq;
954 struct mlx5_rxq_ctrl *rxq_ctrl;
957 res = mlx5_rx_queue_pre_setup(dev, idx, &desc, NULL);
960 if (hairpin_conf->peer_count != 1) {
962 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue index %u"
963 " peer count is %u", dev->data->port_id,
964 idx, hairpin_conf->peer_count);
967 if (hairpin_conf->peers[0].port == dev->data->port_id) {
968 if (hairpin_conf->peers[0].queue >= priv->txqs_n) {
970 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
971 " index %u, Tx %u is larger than %u",
972 dev->data->port_id, idx,
973 hairpin_conf->peers[0].queue, priv->txqs_n);
977 if (hairpin_conf->manual_bind == 0 ||
978 hairpin_conf->tx_explicit == 0) {
980 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
981 " index %u peer port %u with attributes %u %u",
982 dev->data->port_id, idx,
983 hairpin_conf->peers[0].port,
984 hairpin_conf->manual_bind,
985 hairpin_conf->tx_explicit);
989 rxq = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*rxq), 0,
992 DRV_LOG(ERR, "port %u unable to allocate hairpin rx queue index %u private data",
993 dev->data->port_id, idx);
999 (*priv->rxq_privs)[idx] = rxq;
1000 rxq_ctrl = mlx5_rxq_hairpin_new(dev, rxq, desc, hairpin_conf);
1002 DRV_LOG(ERR, "port %u unable to allocate hairpin queue index %u",
1003 dev->data->port_id, idx);
1005 (*priv->rxq_privs)[idx] = NULL;
1009 DRV_LOG(DEBUG, "port %u adding hairpin Rx queue %u to list",
1010 dev->data->port_id, idx);
1011 dev->data->rx_queues[idx] = &rxq_ctrl->rxq;
1016 * DPDK callback to release a RX queue.
1019 * Pointer to Ethernet device structure.
1021 * Receive queue index.
1024 mlx5_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
1026 struct mlx5_rxq_data *rxq = dev->data->rx_queues[qid];
1030 if (!mlx5_rxq_releasable(dev, qid))
1031 rte_panic("port %u Rx queue %u is still used by a flow and"
1032 " cannot be removed\n", dev->data->port_id, qid);
1033 mlx5_rxq_release(dev, qid);
1037 * Allocate queue vector and fill epoll fd list for Rx interrupts.
1040 * Pointer to Ethernet device.
1043 * 0 on success, a negative errno value otherwise and rte_errno is set.
1046 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
1048 struct mlx5_priv *priv = dev->data->dev_private;
1050 unsigned int rxqs_n = priv->rxqs_n;
1051 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
1052 unsigned int count = 0;
1053 struct rte_intr_handle *intr_handle = dev->intr_handle;
1055 if (!dev->data->dev_conf.intr_conf.rxq)
1057 mlx5_rx_intr_vec_disable(dev);
1058 if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
1060 "port %u failed to allocate memory for interrupt"
1061 " vector, Rx interrupts will not be supported",
1062 dev->data->port_id);
1067 if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))
1070 for (i = 0; i != n; ++i) {
1071 /* This rxq obj must not be released in this function. */
1072 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1073 struct mlx5_rxq_obj *rxq_obj = rxq ? rxq->ctrl->obj : NULL;
1076 /* Skip queues that cannot request interrupts. */
1077 if (!rxq_obj || (!rxq_obj->ibv_channel &&
1078 !rxq_obj->devx_channel)) {
1079 /* Use invalid intr_vec[] index to disable entry. */
1080 if (rte_intr_vec_list_index_set(intr_handle, i,
1081 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
1085 mlx5_rxq_ref(dev, i);
1086 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
1088 "port %u too many Rx queues for interrupt"
1089 " vector size (%d), Rx interrupts cannot be"
1091 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
1092 mlx5_rx_intr_vec_disable(dev);
1096 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
1100 "port %u failed to make Rx interrupt file"
1101 " descriptor %d non-blocking for queue index"
1103 dev->data->port_id, rxq_obj->fd, i);
1104 mlx5_rx_intr_vec_disable(dev);
1108 if (rte_intr_vec_list_index_set(intr_handle, i,
1109 RTE_INTR_VEC_RXTX_OFFSET + count))
1111 if (rte_intr_efds_index_set(intr_handle, count,
1117 mlx5_rx_intr_vec_disable(dev);
1118 else if (rte_intr_nb_efd_set(intr_handle, count))
1124 * Clean up Rx interrupts handler.
1127 * Pointer to Ethernet device.
1130 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
1132 struct mlx5_priv *priv = dev->data->dev_private;
1133 struct rte_intr_handle *intr_handle = dev->intr_handle;
1135 unsigned int rxqs_n = priv->rxqs_n;
1136 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
1138 if (!dev->data->dev_conf.intr_conf.rxq)
1140 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0)
1142 for (i = 0; i != n; ++i) {
1143 if (rte_intr_vec_list_index_get(intr_handle, i) ==
1144 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID)
1147 * Need to access directly the queue to release the reference
1148 * kept in mlx5_rx_intr_vec_enable().
1150 mlx5_rxq_deref(dev, i);
1153 rte_intr_free_epoll_fd(intr_handle);
1155 rte_intr_vec_list_free(intr_handle);
1157 rte_intr_nb_efd_set(intr_handle, 0);
1161 * MLX5 CQ notification .
1164 * Pointer to receive queue structure.
1166 * Sequence number per receive queue .
1169 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
1172 uint32_t doorbell_hi;
1174 void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
1176 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
1177 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
1178 doorbell = (uint64_t)doorbell_hi << 32;
1179 doorbell |= rxq->cqn;
1180 rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
1181 mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
1182 cq_db_reg, rxq->uar_lock_cq);
1186 * DPDK callback for Rx queue interrupt enable.
1189 * Pointer to Ethernet device structure.
1190 * @param rx_queue_id
1194 * 0 on success, a negative errno value otherwise and rte_errno is set.
1197 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1199 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, rx_queue_id);
1202 if (rxq->ctrl->irq) {
1203 if (!rxq->ctrl->obj)
1205 mlx5_arm_cq(&rxq->ctrl->rxq, rxq->ctrl->rxq.cq_arm_sn);
1214 * DPDK callback for Rx queue interrupt disable.
1217 * Pointer to Ethernet device structure.
1218 * @param rx_queue_id
1222 * 0 on success, a negative errno value otherwise and rte_errno is set.
1225 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1227 struct mlx5_priv *priv = dev->data->dev_private;
1228 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, rx_queue_id);
1235 if (!rxq->ctrl->obj)
1237 if (rxq->ctrl->irq) {
1238 ret = priv->obj_ops.rxq_event_get(rxq->ctrl->obj);
1241 rxq->ctrl->rxq.cq_arm_sn++;
1246 * The ret variable may be EAGAIN which means the get_event function was
1247 * called before receiving one.
1253 if (rte_errno != EAGAIN)
1254 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1255 dev->data->port_id, rx_queue_id);
1260 * Verify the Rx queue objects list is empty
1263 * Pointer to Ethernet device.
1266 * The number of objects not released.
1269 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1271 struct mlx5_priv *priv = dev->data->dev_private;
1273 struct mlx5_rxq_obj *rxq_obj;
1275 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1276 if (rxq_obj->rxq_ctrl->rxq.shared &&
1277 !LIST_EMPTY(&rxq_obj->rxq_ctrl->owners))
1279 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1280 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1287 * Callback function to initialize mbufs for Multi-Packet RQ.
1290 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1291 void *_m, unsigned int i __rte_unused)
1293 struct mlx5_mprq_buf *buf = _m;
1294 struct rte_mbuf_ext_shared_info *shinfo;
1295 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1298 memset(_m, 0, sizeof(*buf));
1300 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1301 for (j = 0; j != strd_n; ++j) {
1302 shinfo = &buf->shinfos[j];
1303 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1304 shinfo->fcb_opaque = buf;
1309 * Free mempool of Multi-Packet RQ.
1312 * Pointer to Ethernet device.
1315 * 0 on success, negative errno value on failure.
1318 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1320 struct mlx5_priv *priv = dev->data->dev_private;
1321 struct rte_mempool *mp = priv->mprq_mp;
1326 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1327 dev->data->port_id, mp->name);
1329 * If a buffer in the pool has been externally attached to a mbuf and it
1330 * is still in use by application, destroying the Rx queue can spoil
1331 * the packet. It is unlikely to happen but if application dynamically
1332 * creates and destroys with holding Rx packets, this can happen.
1334 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1335 * RQ isn't provided by application but managed by PMD.
1337 if (!rte_mempool_full(mp)) {
1339 "port %u mempool for Multi-Packet RQ is still in use",
1340 dev->data->port_id);
1344 rte_mempool_free(mp);
1345 /* Unset mempool for each Rx queue. */
1346 for (i = 0; i != priv->rxqs_n; ++i) {
1347 struct mlx5_rxq_data *rxq = mlx5_rxq_data_get(dev, i);
1351 rxq->mprq_mp = NULL;
1353 priv->mprq_mp = NULL;
1358 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1359 * mempool. If already allocated, reuse it if there're enough elements.
1360 * Otherwise, resize it.
1363 * Pointer to Ethernet device.
1366 * 0 on success, negative errno value on failure.
1369 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1371 struct mlx5_priv *priv = dev->data->dev_private;
1372 struct rte_mempool *mp = priv->mprq_mp;
1373 char name[RTE_MEMPOOL_NAMESIZE];
1374 unsigned int desc = 0;
1375 unsigned int buf_len;
1376 unsigned int obj_num;
1377 unsigned int obj_size;
1378 unsigned int strd_num_n = 0;
1379 unsigned int strd_sz_n = 0;
1381 unsigned int n_ibv = 0;
1384 if (!mlx5_mprq_enabled(dev))
1386 /* Count the total number of descriptors configured. */
1387 for (i = 0; i != priv->rxqs_n; ++i) {
1388 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
1389 struct mlx5_rxq_data *rxq;
1391 if (rxq_ctrl == NULL ||
1392 rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1394 rxq = &rxq_ctrl->rxq;
1396 desc += 1 << rxq->elts_n;
1397 /* Get the max number of strides. */
1398 if (strd_num_n < rxq->strd_num_n)
1399 strd_num_n = rxq->strd_num_n;
1400 /* Get the max size of a stride. */
1401 if (strd_sz_n < rxq->strd_sz_n)
1402 strd_sz_n = rxq->strd_sz_n;
1404 MLX5_ASSERT(strd_num_n && strd_sz_n);
1405 buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1406 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len + (1 << strd_num_n) *
1407 sizeof(struct rte_mbuf_ext_shared_info) + RTE_PKTMBUF_HEADROOM;
1409 * Received packets can be either memcpy'd or externally referenced. In
1410 * case that the packet is attached to an mbuf as an external buffer, as
1411 * it isn't possible to predict how the buffers will be queued by
1412 * application, there's no option to exactly pre-allocate needed buffers
1413 * in advance but to speculatively prepares enough buffers.
1415 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1416 * received packets to buffers provided by application (rxq->mp) until
1417 * this Mempool gets available again.
1420 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1422 * rte_mempool_create_empty() has sanity check to refuse large cache
1423 * size compared to the number of elements.
1424 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1425 * constant number 2 instead.
1427 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1428 /* Check a mempool is already allocated and if it can be resued. */
1429 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1430 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1431 dev->data->port_id, mp->name);
1434 } else if (mp != NULL) {
1435 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1436 dev->data->port_id, mp->name);
1438 * If failed to free, which means it may be still in use, no way
1439 * but to keep using the existing one. On buffer underrun,
1440 * packets will be memcpy'd instead of external buffer
1443 if (mlx5_mprq_free_mp(dev)) {
1444 if (mp->elt_size >= obj_size)
1450 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1451 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1452 0, NULL, NULL, mlx5_mprq_buf_init,
1453 (void *)((uintptr_t)1 << strd_num_n),
1454 dev->device->numa_node, 0);
1457 "port %u failed to allocate a mempool for"
1458 " Multi-Packet RQ, count=%u, size=%u",
1459 dev->data->port_id, obj_num, obj_size);
1463 ret = mlx5_mr_mempool_register(&priv->sh->cdev->mr_scache,
1464 priv->sh->cdev->pd, mp, &priv->mp_id);
1465 if (ret < 0 && rte_errno != EEXIST) {
1467 DRV_LOG(ERR, "port %u failed to register a mempool for Multi-Packet RQ",
1468 dev->data->port_id);
1469 rte_mempool_free(mp);
1475 /* Set mempool for each Rx queue. */
1476 for (i = 0; i != priv->rxqs_n; ++i) {
1477 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
1479 if (rxq_ctrl == NULL ||
1480 rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1482 rxq_ctrl->rxq.mprq_mp = mp;
1484 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1485 dev->data->port_id);
1489 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1490 sizeof(struct rte_vlan_hdr) * 2 + \
1491 sizeof(struct rte_ipv6_hdr)))
1492 #define MAX_TCP_OPTION_SIZE 40u
1493 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1494 sizeof(struct rte_tcp_hdr) + \
1495 MAX_TCP_OPTION_SIZE))
1498 * Adjust the maximum LRO massage size.
1501 * Pointer to Ethernet device.
1504 * @param max_lro_size
1505 * The maximum size for LRO packet.
1508 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1509 uint32_t max_lro_size)
1511 struct mlx5_priv *priv = dev->data->dev_private;
1513 if (priv->config.hca_attr.lro_max_msg_sz_mode ==
1514 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1515 MLX5_MAX_TCP_HDR_OFFSET)
1516 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1517 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1518 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1519 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1520 if (priv->max_lro_msg_size)
1521 priv->max_lro_msg_size =
1522 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1524 priv->max_lro_msg_size = max_lro_size;
1526 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1527 dev->data->port_id, idx,
1528 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1532 * Create a DPDK Rx queue.
1535 * Pointer to Ethernet device.
1537 * RX queue private data.
1539 * Number of descriptors to configure in queue.
1541 * NUMA socket on which memory must be allocated.
1544 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1546 struct mlx5_rxq_ctrl *
1547 mlx5_rxq_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,
1549 unsigned int socket, const struct rte_eth_rxconf *conf,
1550 const struct rte_eth_rxseg_split *rx_seg, uint16_t n_seg)
1552 uint16_t idx = rxq->idx;
1553 struct mlx5_priv *priv = dev->data->dev_private;
1554 struct mlx5_rxq_ctrl *tmpl;
1555 unsigned int mb_len = rte_pktmbuf_data_room_size(rx_seg[0].mp);
1556 struct mlx5_dev_config *config = &priv->config;
1557 uint64_t offloads = conf->offloads |
1558 dev->data->dev_conf.rxmode.offloads;
1559 unsigned int lro_on_queue = !!(offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO);
1560 unsigned int max_rx_pktlen = lro_on_queue ?
1561 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1562 dev->data->mtu + (unsigned int)RTE_ETHER_HDR_LEN +
1564 unsigned int non_scatter_min_mbuf_size = max_rx_pktlen +
1565 RTE_PKTMBUF_HEADROOM;
1566 unsigned int max_lro_size = 0;
1567 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1568 const int mprq_en = mlx5_check_mprq_support(dev) > 0 && n_seg == 1 &&
1569 !rx_seg[0].offset && !rx_seg[0].length;
1570 unsigned int mprq_stride_nums = config->mprq.stride_num_n ?
1571 config->mprq.stride_num_n : MLX5_MPRQ_STRIDE_NUM_N;
1572 unsigned int mprq_stride_size = non_scatter_min_mbuf_size <=
1573 (1U << config->mprq.max_stride_size_n) ?
1574 log2above(non_scatter_min_mbuf_size) : MLX5_MPRQ_STRIDE_SIZE_N;
1575 unsigned int mprq_stride_cap = (config->mprq.stride_num_n ?
1576 (1U << config->mprq.stride_num_n) : (1U << mprq_stride_nums)) *
1577 (config->mprq.stride_size_n ?
1578 (1U << config->mprq.stride_size_n) : (1U << mprq_stride_size));
1580 * Always allocate extra slots, even if eventually
1581 * the vector Rx will not be used.
1583 uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1584 const struct rte_eth_rxseg_split *qs_seg = rx_seg;
1585 unsigned int tail_len;
1587 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
1588 sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *) +
1590 (desc >> mprq_stride_nums) * sizeof(struct mlx5_mprq_buf *),
1596 LIST_INIT(&tmpl->owners);
1597 if (conf->share_group > 0) {
1598 tmpl->rxq.shared = 1;
1599 tmpl->share_group = conf->share_group;
1600 tmpl->share_qid = conf->share_qid;
1601 LIST_INSERT_HEAD(&priv->sh->shared_rxqs, tmpl, share_entry);
1604 LIST_INSERT_HEAD(&tmpl->owners, rxq, owner_entry);
1605 MLX5_ASSERT(n_seg && n_seg <= MLX5_MAX_RXQ_NSEG);
1607 * Build the array of actual buffer offsets and lengths.
1608 * Pad with the buffers from the last memory pool if
1609 * needed to handle max size packets, replace zero length
1610 * with the buffer length from the pool.
1612 tail_len = max_rx_pktlen;
1614 struct mlx5_eth_rxseg *hw_seg =
1615 &tmpl->rxq.rxseg[tmpl->rxq.rxseg_n];
1616 uint32_t buf_len, offset, seg_len;
1619 * For the buffers beyond descriptions offset is zero,
1620 * the first buffer contains head room.
1622 buf_len = rte_pktmbuf_data_room_size(qs_seg->mp);
1623 offset = (tmpl->rxq.rxseg_n >= n_seg ? 0 : qs_seg->offset) +
1624 (tmpl->rxq.rxseg_n ? 0 : RTE_PKTMBUF_HEADROOM);
1626 * For the buffers beyond descriptions the length is
1627 * pool buffer length, zero lengths are replaced with
1628 * pool buffer length either.
1630 seg_len = tmpl->rxq.rxseg_n >= n_seg ? buf_len :
1634 /* Check is done in long int, now overflows. */
1635 if (buf_len < seg_len + offset) {
1636 DRV_LOG(ERR, "port %u Rx queue %u: Split offset/length "
1637 "%u/%u can't be satisfied",
1638 dev->data->port_id, idx,
1639 qs_seg->length, qs_seg->offset);
1643 if (seg_len > tail_len)
1644 seg_len = buf_len - offset;
1645 if (++tmpl->rxq.rxseg_n > MLX5_MAX_RXQ_NSEG) {
1647 "port %u too many SGEs (%u) needed to handle"
1648 " requested maximum packet size %u, the maximum"
1649 " supported are %u", dev->data->port_id,
1650 tmpl->rxq.rxseg_n, max_rx_pktlen,
1652 rte_errno = ENOTSUP;
1655 /* Build the actual scattering element in the queue object. */
1656 hw_seg->mp = qs_seg->mp;
1657 MLX5_ASSERT(offset <= UINT16_MAX);
1658 MLX5_ASSERT(seg_len <= UINT16_MAX);
1659 hw_seg->offset = (uint16_t)offset;
1660 hw_seg->length = (uint16_t)seg_len;
1662 * Advance the segment descriptor, the padding is the based
1663 * on the attributes of the last descriptor.
1665 if (tmpl->rxq.rxseg_n < n_seg)
1667 tail_len -= RTE_MIN(tail_len, seg_len);
1668 } while (tail_len || !rte_is_power_of_2(tmpl->rxq.rxseg_n));
1669 MLX5_ASSERT(tmpl->rxq.rxseg_n &&
1670 tmpl->rxq.rxseg_n <= MLX5_MAX_RXQ_NSEG);
1671 if (tmpl->rxq.rxseg_n > 1 && !(offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) {
1672 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1673 " configured and no enough mbuf space(%u) to contain "
1674 "the maximum RX packet length(%u) with head-room(%u)",
1675 dev->data->port_id, idx, mb_len, max_rx_pktlen,
1676 RTE_PKTMBUF_HEADROOM);
1680 tmpl->type = MLX5_RXQ_TYPE_STANDARD;
1681 if (mlx5_mr_ctrl_init(&tmpl->rxq.mr_ctrl,
1682 &priv->sh->cdev->mr_scache.dev_gen, socket)) {
1683 /* rte_errno is already set. */
1686 tmpl->socket = socket;
1687 if (dev->data->dev_conf.intr_conf.rxq)
1690 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1691 * following conditions are met:
1692 * - MPRQ is enabled.
1693 * - The number of descs is more than the number of strides.
1694 * - max_rx_pktlen plus overhead is less than the max size
1695 * of a stride or mprq_stride_size is specified by a user.
1696 * Need to make sure that there are enough strides to encap
1697 * the maximum packet size in case mprq_stride_size is set.
1698 * Otherwise, enable Rx scatter if necessary.
1700 if (mprq_en && desc > (1U << mprq_stride_nums) &&
1701 (non_scatter_min_mbuf_size <=
1702 (1U << config->mprq.max_stride_size_n) ||
1703 (config->mprq.stride_size_n &&
1704 non_scatter_min_mbuf_size <= mprq_stride_cap))) {
1705 /* TODO: Rx scatter isn't supported yet. */
1706 tmpl->rxq.sges_n = 0;
1707 /* Trim the number of descs needed. */
1708 desc >>= mprq_stride_nums;
1709 tmpl->rxq.strd_num_n = config->mprq.stride_num_n ?
1710 config->mprq.stride_num_n : mprq_stride_nums;
1711 tmpl->rxq.strd_sz_n = config->mprq.stride_size_n ?
1712 config->mprq.stride_size_n : mprq_stride_size;
1713 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1714 tmpl->rxq.strd_scatter_en =
1715 !!(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
1716 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1717 config->mprq.max_memcpy_len);
1718 max_lro_size = RTE_MIN(max_rx_pktlen,
1719 (1u << tmpl->rxq.strd_num_n) *
1720 (1u << tmpl->rxq.strd_sz_n));
1722 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1723 " strd_num_n = %u, strd_sz_n = %u",
1724 dev->data->port_id, idx,
1725 tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1726 } else if (tmpl->rxq.rxseg_n == 1) {
1727 MLX5_ASSERT(max_rx_pktlen <= first_mb_free_size);
1728 tmpl->rxq.sges_n = 0;
1729 max_lro_size = max_rx_pktlen;
1730 } else if (offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
1731 unsigned int sges_n;
1733 if (lro_on_queue && first_mb_free_size <
1734 MLX5_MAX_LRO_HEADER_FIX) {
1735 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1736 " to include the max header size(%u) for LRO",
1737 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1738 rte_errno = ENOTSUP;
1742 * Determine the number of SGEs needed for a full packet
1743 * and round it to the next power of two.
1745 sges_n = log2above(tmpl->rxq.rxseg_n);
1746 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1748 "port %u too many SGEs (%u) needed to handle"
1749 " requested maximum packet size %u, the maximum"
1750 " supported are %u", dev->data->port_id,
1751 1 << sges_n, max_rx_pktlen,
1752 1u << MLX5_MAX_LOG_RQ_SEGS);
1753 rte_errno = ENOTSUP;
1756 tmpl->rxq.sges_n = sges_n;
1757 max_lro_size = max_rx_pktlen;
1759 if (config->mprq.enabled && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1761 "port %u MPRQ is requested but cannot be enabled\n"
1762 " (requested: pkt_sz = %u, desc_num = %u,"
1763 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1764 " supported: min_rxqs_num = %u,"
1765 " min_stride_sz = %u, max_stride_sz = %u).",
1766 dev->data->port_id, non_scatter_min_mbuf_size,
1768 config->mprq.stride_size_n ?
1769 (1U << config->mprq.stride_size_n) :
1770 (1U << mprq_stride_size),
1771 config->mprq.stride_num_n ?
1772 (1U << config->mprq.stride_num_n) :
1773 (1U << mprq_stride_nums),
1774 config->mprq.min_rxqs_num,
1775 (1U << config->mprq.min_stride_size_n),
1776 (1U << config->mprq.max_stride_size_n));
1777 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1778 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1779 if (desc % (1 << tmpl->rxq.sges_n)) {
1781 "port %u number of Rx queue descriptors (%u) is not a"
1782 " multiple of SGEs per packet (%u)",
1785 1 << tmpl->rxq.sges_n);
1789 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1790 /* Toggle RX checksum offload if hardware supports it. */
1791 tmpl->rxq.csum = !!(offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM);
1792 /* Configure Rx timestamp. */
1793 tmpl->rxq.hw_timestamp = !!(offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP);
1794 tmpl->rxq.timestamp_rx_flag = 0;
1795 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1796 &tmpl->rxq.timestamp_offset,
1797 &tmpl->rxq.timestamp_rx_flag) != 0) {
1798 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1801 /* Configure VLAN stripping. */
1802 tmpl->rxq.vlan_strip = !!(offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
1803 /* By default, FCS (CRC) is stripped by hardware. */
1804 tmpl->rxq.crc_present = 0;
1805 tmpl->rxq.lro = lro_on_queue;
1806 if (offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) {
1807 if (config->hw_fcs_strip) {
1809 * RQs used for LRO-enabled TIRs should not be
1810 * configured to scatter the FCS.
1814 "port %u CRC stripping has been "
1815 "disabled but will still be performed "
1816 "by hardware, because LRO is enabled",
1817 dev->data->port_id);
1819 tmpl->rxq.crc_present = 1;
1822 "port %u CRC stripping has been disabled but will"
1823 " still be performed by hardware, make sure MLNX_OFED"
1824 " and firmware are up to date",
1825 dev->data->port_id);
1829 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1830 " incoming frames to hide it",
1832 tmpl->rxq.crc_present ? "disabled" : "enabled",
1833 tmpl->rxq.crc_present << 2);
1835 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1836 (!!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS));
1837 tmpl->rxq.port_id = dev->data->port_id;
1838 tmpl->sh = priv->sh;
1839 tmpl->rxq.mp = rx_seg[0].mp;
1840 tmpl->rxq.elts_n = log2above(desc);
1841 tmpl->rxq.rq_repl_thresh =
1842 MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
1844 (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
1845 tmpl->rxq.mprq_bufs =
1846 (struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
1848 tmpl->rxq.uar_lock_cq = &priv->sh->uar_lock_cq;
1850 tmpl->rxq.idx = idx;
1851 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1854 mlx5_mr_btree_free(&tmpl->rxq.mr_ctrl.cache_bh);
1860 * Create a DPDK Rx hairpin queue.
1863 * Pointer to Ethernet device.
1867 * Number of descriptors to configure in queue.
1868 * @param hairpin_conf
1869 * The hairpin binding configuration.
1872 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1874 struct mlx5_rxq_ctrl *
1875 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,
1877 const struct rte_eth_hairpin_conf *hairpin_conf)
1879 uint16_t idx = rxq->idx;
1880 struct mlx5_priv *priv = dev->data->dev_private;
1881 struct mlx5_rxq_ctrl *tmpl;
1883 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1889 LIST_INIT(&tmpl->owners);
1891 LIST_INSERT_HEAD(&tmpl->owners, rxq, owner_entry);
1892 tmpl->type = MLX5_RXQ_TYPE_HAIRPIN;
1893 tmpl->socket = SOCKET_ID_ANY;
1894 tmpl->rxq.rss_hash = 0;
1895 tmpl->rxq.port_id = dev->data->port_id;
1896 tmpl->sh = priv->sh;
1897 tmpl->rxq.mp = NULL;
1898 tmpl->rxq.elts_n = log2above(desc);
1899 tmpl->rxq.elts = NULL;
1900 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1901 tmpl->rxq.idx = idx;
1902 rxq->hairpin_conf = *hairpin_conf;
1903 mlx5_rxq_ref(dev, idx);
1904 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1909 * Increase Rx queue reference count.
1912 * Pointer to Ethernet device.
1917 * A pointer to the queue if it exists, NULL otherwise.
1919 struct mlx5_rxq_priv *
1920 mlx5_rxq_ref(struct rte_eth_dev *dev, uint16_t idx)
1922 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
1925 __atomic_fetch_add(&rxq->refcnt, 1, __ATOMIC_RELAXED);
1930 * Dereference a Rx queue.
1933 * Pointer to Ethernet device.
1938 * Updated reference count.
1941 mlx5_rxq_deref(struct rte_eth_dev *dev, uint16_t idx)
1943 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
1947 return __atomic_sub_fetch(&rxq->refcnt, 1, __ATOMIC_RELAXED);
1954 * Pointer to Ethernet device.
1959 * A pointer to the queue if it exists, NULL otherwise.
1961 struct mlx5_rxq_priv *
1962 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1964 struct mlx5_priv *priv = dev->data->dev_private;
1966 MLX5_ASSERT(priv->rxq_privs != NULL);
1967 return (*priv->rxq_privs)[idx];
1971 * Get Rx queue shareable control.
1974 * Pointer to Ethernet device.
1979 * A pointer to the queue control if it exists, NULL otherwise.
1981 struct mlx5_rxq_ctrl *
1982 mlx5_rxq_ctrl_get(struct rte_eth_dev *dev, uint16_t idx)
1984 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
1986 return rxq == NULL ? NULL : rxq->ctrl;
1990 * Get Rx queue shareable data.
1993 * Pointer to Ethernet device.
1998 * A pointer to the queue data if it exists, NULL otherwise.
2000 struct mlx5_rxq_data *
2001 mlx5_rxq_data_get(struct rte_eth_dev *dev, uint16_t idx)
2003 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2005 return rxq == NULL ? NULL : &rxq->ctrl->rxq;
2009 * Release a Rx queue.
2012 * Pointer to Ethernet device.
2017 * 1 while a reference on it exists, 0 when freed.
2020 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
2022 struct mlx5_priv *priv = dev->data->dev_private;
2023 struct mlx5_rxq_priv *rxq;
2024 struct mlx5_rxq_ctrl *rxq_ctrl;
2027 if (priv->rxq_privs == NULL)
2029 rxq = mlx5_rxq_get(dev, idx);
2030 if (rxq == NULL || rxq->refcnt == 0)
2032 rxq_ctrl = rxq->ctrl;
2033 refcnt = mlx5_rxq_deref(dev, idx);
2036 } else if (refcnt == 1) { /* RxQ stopped. */
2037 priv->obj_ops.rxq_obj_release(rxq);
2038 if (!rxq_ctrl->started && rxq_ctrl->obj != NULL) {
2039 LIST_REMOVE(rxq_ctrl->obj, next);
2040 mlx5_free(rxq_ctrl->obj);
2041 rxq_ctrl->obj = NULL;
2043 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) {
2044 if (!rxq_ctrl->started)
2045 rxq_free_elts(rxq_ctrl);
2046 dev->data->rx_queue_state[idx] =
2047 RTE_ETH_QUEUE_STATE_STOPPED;
2049 } else { /* Refcnt zero, closing device. */
2050 LIST_REMOVE(rxq, owner_entry);
2051 if (LIST_EMPTY(&rxq_ctrl->owners)) {
2052 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
2054 (&rxq_ctrl->rxq.mr_ctrl.cache_bh);
2055 if (rxq_ctrl->rxq.shared)
2056 LIST_REMOVE(rxq_ctrl, share_entry);
2057 LIST_REMOVE(rxq_ctrl, next);
2058 mlx5_free(rxq_ctrl);
2060 dev->data->rx_queues[idx] = NULL;
2062 (*priv->rxq_privs)[idx] = NULL;
2068 * Verify the Rx Queue list is empty
2071 * Pointer to Ethernet device.
2074 * The number of object not released.
2077 mlx5_rxq_verify(struct rte_eth_dev *dev)
2079 struct mlx5_priv *priv = dev->data->dev_private;
2080 struct mlx5_rxq_ctrl *rxq_ctrl;
2083 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
2084 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
2085 dev->data->port_id, rxq_ctrl->rxq.idx);
2092 * Get a Rx queue type.
2095 * Pointer to Ethernet device.
2100 * The Rx queue type.
2103 mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx)
2105 struct mlx5_priv *priv = dev->data->dev_private;
2106 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
2108 if (idx < priv->rxqs_n && rxq_ctrl != NULL)
2109 return rxq_ctrl->type;
2110 return MLX5_RXQ_TYPE_UNDEFINED;
2114 * Get a Rx hairpin queue configuration.
2117 * Pointer to Ethernet device.
2122 * Pointer to the configuration if a hairpin RX queue, otherwise NULL.
2124 const struct rte_eth_hairpin_conf *
2125 mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)
2127 struct mlx5_priv *priv = dev->data->dev_private;
2128 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2130 if (idx < priv->rxqs_n && rxq != NULL) {
2131 if (rxq->ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
2132 return &rxq->hairpin_conf;
2138 * Match queues listed in arguments to queues contained in indirection table
2142 * Pointer to indirection table to match.
2144 * Queues to match to ques in indirection table.
2146 * Number of queues in the array.
2149 * 1 if all queues in indirection table match 0 othrwise.
2152 mlx5_ind_table_obj_match_queues(const struct mlx5_ind_table_obj *ind_tbl,
2153 const uint16_t *queues, uint32_t queues_n)
2155 return (ind_tbl->queues_n == queues_n) &&
2156 (!memcmp(ind_tbl->queues, queues,
2157 ind_tbl->queues_n * sizeof(ind_tbl->queues[0])));
2161 * Get an indirection table.
2164 * Pointer to Ethernet device.
2166 * Queues entering in the indirection table.
2168 * Number of queues in the array.
2171 * An indirection table if found.
2173 struct mlx5_ind_table_obj *
2174 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
2177 struct mlx5_priv *priv = dev->data->dev_private;
2178 struct mlx5_ind_table_obj *ind_tbl;
2180 rte_rwlock_read_lock(&priv->ind_tbls_lock);
2181 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
2182 if ((ind_tbl->queues_n == queues_n) &&
2183 (memcmp(ind_tbl->queues, queues,
2184 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
2186 __atomic_fetch_add(&ind_tbl->refcnt, 1,
2191 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
2196 * Release an indirection table.
2199 * Pointer to Ethernet device.
2201 * Indirection table to release.
2203 * Indirection table for Standalone queue.
2206 * 1 while a reference on it exists, 0 when freed.
2209 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
2210 struct mlx5_ind_table_obj *ind_tbl,
2213 struct mlx5_priv *priv = dev->data->dev_private;
2214 unsigned int i, ret;
2216 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2217 ret = __atomic_sub_fetch(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
2218 if (!ret && !standalone)
2219 LIST_REMOVE(ind_tbl, next);
2220 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2223 priv->obj_ops.ind_table_destroy(ind_tbl);
2224 for (i = 0; i != ind_tbl->queues_n; ++i)
2225 claim_nonzero(mlx5_rxq_deref(dev, ind_tbl->queues[i]));
2231 * Verify the Rx Queue list is empty
2234 * Pointer to Ethernet device.
2237 * The number of object not released.
2240 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
2242 struct mlx5_priv *priv = dev->data->dev_private;
2243 struct mlx5_ind_table_obj *ind_tbl;
2246 rte_rwlock_read_lock(&priv->ind_tbls_lock);
2247 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
2249 "port %u indirection table obj %p still referenced",
2250 dev->data->port_id, (void *)ind_tbl);
2253 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
2258 * Setup an indirection table structure fields.
2261 * Pointer to Ethernet device.
2263 * Indirection table to modify.
2266 * 0 on success, a negative errno value otherwise and rte_errno is set.
2269 mlx5_ind_table_obj_setup(struct rte_eth_dev *dev,
2270 struct mlx5_ind_table_obj *ind_tbl)
2272 struct mlx5_priv *priv = dev->data->dev_private;
2273 uint32_t queues_n = ind_tbl->queues_n;
2274 uint16_t *queues = ind_tbl->queues;
2277 const unsigned int n = rte_is_power_of_2(queues_n) ?
2278 log2above(queues_n) :
2279 log2above(priv->config.ind_table_max_size);
2281 for (i = 0; i != queues_n; ++i) {
2282 if (mlx5_rxq_ref(dev, queues[i]) == NULL) {
2287 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
2290 __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
2294 for (j = 0; j < i; j++)
2295 mlx5_rxq_deref(dev, ind_tbl->queues[j]);
2297 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2298 dev->data->port_id);
2303 * Create an indirection table.
2306 * Pointer to Ethernet device.
2308 * Queues entering in the indirection table.
2310 * Number of queues in the array.
2312 * Indirection table for Standalone queue.
2315 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2317 static struct mlx5_ind_table_obj *
2318 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
2319 uint32_t queues_n, bool standalone)
2321 struct mlx5_priv *priv = dev->data->dev_private;
2322 struct mlx5_ind_table_obj *ind_tbl;
2325 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
2326 queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
2331 ind_tbl->queues_n = queues_n;
2332 ind_tbl->queues = (uint16_t *)(ind_tbl + 1);
2333 memcpy(ind_tbl->queues, queues, queues_n * sizeof(*queues));
2334 ret = mlx5_ind_table_obj_setup(dev, ind_tbl);
2340 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2341 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
2342 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2348 mlx5_ind_table_obj_check_standalone(struct rte_eth_dev *dev __rte_unused,
2349 struct mlx5_ind_table_obj *ind_tbl)
2353 refcnt = __atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED);
2357 * Modification of indirection tables having more than 1
2358 * reference is unsupported.
2361 "Port %u cannot modify indirection table %p (refcnt %u > 1).",
2362 dev->data->port_id, (void *)ind_tbl, refcnt);
2368 * Modify an indirection table.
2371 * Pointer to Ethernet device.
2373 * Indirection table to modify.
2375 * Queues replacement for the indirection table.
2377 * Number of queues in the array.
2379 * Indirection table for Standalone queue.
2382 * 0 on success, a negative errno value otherwise and rte_errno is set.
2385 mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,
2386 struct mlx5_ind_table_obj *ind_tbl,
2387 uint16_t *queues, const uint32_t queues_n,
2390 struct mlx5_priv *priv = dev->data->dev_private;
2393 const unsigned int n = rte_is_power_of_2(queues_n) ?
2394 log2above(queues_n) :
2395 log2above(priv->config.ind_table_max_size);
2397 MLX5_ASSERT(standalone);
2398 RTE_SET_USED(standalone);
2399 if (mlx5_ind_table_obj_check_standalone(dev, ind_tbl) < 0)
2401 for (i = 0; i != queues_n; ++i) {
2402 if (!mlx5_rxq_get(dev, queues[i])) {
2407 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2408 ret = priv->obj_ops.ind_table_modify(dev, n, queues, queues_n, ind_tbl);
2411 ind_tbl->queues_n = queues_n;
2412 ind_tbl->queues = queues;
2417 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2418 dev->data->port_id);
2423 * Attach an indirection table to its queues.
2426 * Pointer to Ethernet device.
2428 * Indirection table to attach.
2431 * 0 on success, a negative errno value otherwise and rte_errno is set.
2434 mlx5_ind_table_obj_attach(struct rte_eth_dev *dev,
2435 struct mlx5_ind_table_obj *ind_tbl)
2440 ret = mlx5_ind_table_obj_modify(dev, ind_tbl, ind_tbl->queues,
2441 ind_tbl->queues_n, true);
2443 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2444 dev->data->port_id, (void *)ind_tbl);
2447 for (i = 0; i < ind_tbl->queues_n; i++)
2448 mlx5_rxq_get(dev, ind_tbl->queues[i]);
2453 * Detach an indirection table from its queues.
2456 * Pointer to Ethernet device.
2458 * Indirection table to detach.
2461 * 0 on success, a negative errno value otherwise and rte_errno is set.
2464 mlx5_ind_table_obj_detach(struct rte_eth_dev *dev,
2465 struct mlx5_ind_table_obj *ind_tbl)
2467 struct mlx5_priv *priv = dev->data->dev_private;
2468 const unsigned int n = rte_is_power_of_2(ind_tbl->queues_n) ?
2469 log2above(ind_tbl->queues_n) :
2470 log2above(priv->config.ind_table_max_size);
2474 ret = mlx5_ind_table_obj_check_standalone(dev, ind_tbl);
2477 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2478 ret = priv->obj_ops.ind_table_modify(dev, n, NULL, 0, ind_tbl);
2480 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2481 dev->data->port_id, (void *)ind_tbl);
2484 for (i = 0; i < ind_tbl->queues_n; i++)
2485 mlx5_rxq_release(dev, ind_tbl->queues[i]);
2490 mlx5_hrxq_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
2493 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2494 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2495 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2497 return (hrxq->rss_key_len != rss_desc->key_len ||
2498 memcmp(hrxq->rss_key, rss_desc->key, rss_desc->key_len) ||
2499 hrxq->hash_fields != rss_desc->hash_fields ||
2500 hrxq->ind_table->queues_n != rss_desc->queue_num ||
2501 memcmp(hrxq->ind_table->queues, rss_desc->queue,
2502 rss_desc->queue_num * sizeof(rss_desc->queue[0])));
2506 * Modify an Rx Hash queue configuration.
2509 * Pointer to Ethernet device.
2511 * Index to Hash Rx queue to modify.
2513 * RSS key for the Rx hash queue.
2514 * @param rss_key_len
2516 * @param hash_fields
2517 * Verbs protocol hash field to make the RSS on.
2519 * Queues entering in hash queue. In case of empty hash_fields only the
2520 * first queue index will be taken for the indirection table.
2525 * 0 on success, a negative errno value otherwise and rte_errno is set.
2528 mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hrxq_idx,
2529 const uint8_t *rss_key, uint32_t rss_key_len,
2530 uint64_t hash_fields,
2531 const uint16_t *queues, uint32_t queues_n)
2534 struct mlx5_ind_table_obj *ind_tbl = NULL;
2535 struct mlx5_priv *priv = dev->data->dev_private;
2536 struct mlx5_hrxq *hrxq =
2537 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2545 if (hrxq->rss_key_len != rss_key_len) {
2546 /* rss_key_len is fixed size 40 byte & not supposed to change */
2550 queues_n = hash_fields ? queues_n : 1;
2551 if (mlx5_ind_table_obj_match_queues(hrxq->ind_table,
2552 queues, queues_n)) {
2553 ind_tbl = hrxq->ind_table;
2555 if (hrxq->standalone) {
2557 * Replacement of indirection table unsupported for
2558 * stanalone hrxq objects (used by shared RSS).
2560 rte_errno = ENOTSUP;
2563 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2565 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2572 MLX5_ASSERT(priv->obj_ops.hrxq_modify);
2573 ret = priv->obj_ops.hrxq_modify(dev, hrxq, rss_key,
2574 hash_fields, ind_tbl);
2579 if (ind_tbl != hrxq->ind_table) {
2580 MLX5_ASSERT(!hrxq->standalone);
2581 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2583 hrxq->ind_table = ind_tbl;
2585 hrxq->hash_fields = hash_fields;
2586 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2590 if (ind_tbl != hrxq->ind_table) {
2591 MLX5_ASSERT(!hrxq->standalone);
2592 mlx5_ind_table_obj_release(dev, ind_tbl, hrxq->standalone);
2599 __mlx5_hrxq_remove(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
2601 struct mlx5_priv *priv = dev->data->dev_private;
2603 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2604 mlx5_glue->destroy_flow_action(hrxq->action);
2606 priv->obj_ops.hrxq_destroy(hrxq);
2607 if (!hrxq->standalone) {
2608 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2611 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2615 * Release the hash Rx queue.
2618 * Pointer to Ethernet device.
2620 * Index to Hash Rx queue to release.
2623 * mlx5 list pointer.
2625 * Hash queue entry pointer.
2628 mlx5_hrxq_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2630 struct rte_eth_dev *dev = tool_ctx;
2631 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2633 __mlx5_hrxq_remove(dev, hrxq);
2636 static struct mlx5_hrxq *
2637 __mlx5_hrxq_create(struct rte_eth_dev *dev,
2638 struct mlx5_flow_rss_desc *rss_desc)
2640 struct mlx5_priv *priv = dev->data->dev_private;
2641 const uint8_t *rss_key = rss_desc->key;
2642 uint32_t rss_key_len = rss_desc->key_len;
2643 bool standalone = !!rss_desc->shared_rss;
2644 const uint16_t *queues =
2645 standalone ? rss_desc->const_q : rss_desc->queue;
2646 uint32_t queues_n = rss_desc->queue_num;
2647 struct mlx5_hrxq *hrxq = NULL;
2648 uint32_t hrxq_idx = 0;
2649 struct mlx5_ind_table_obj *ind_tbl = rss_desc->ind_tbl;
2652 queues_n = rss_desc->hash_fields ? queues_n : 1;
2654 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2656 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2660 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2663 hrxq->standalone = standalone;
2664 hrxq->idx = hrxq_idx;
2665 hrxq->ind_table = ind_tbl;
2666 hrxq->rss_key_len = rss_key_len;
2667 hrxq->hash_fields = rss_desc->hash_fields;
2668 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2669 ret = priv->obj_ops.hrxq_new(dev, hrxq, rss_desc->tunnel);
2674 if (!rss_desc->ind_tbl)
2675 mlx5_ind_table_obj_release(dev, ind_tbl, standalone);
2677 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2681 struct mlx5_list_entry *
2682 mlx5_hrxq_create_cb(void *tool_ctx, void *cb_ctx)
2684 struct rte_eth_dev *dev = tool_ctx;
2685 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2686 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2687 struct mlx5_hrxq *hrxq;
2689 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2690 return hrxq ? &hrxq->entry : NULL;
2693 struct mlx5_list_entry *
2694 mlx5_hrxq_clone_cb(void *tool_ctx, struct mlx5_list_entry *entry,
2695 void *cb_ctx __rte_unused)
2697 struct rte_eth_dev *dev = tool_ctx;
2698 struct mlx5_priv *priv = dev->data->dev_private;
2699 struct mlx5_hrxq *hrxq;
2700 uint32_t hrxq_idx = 0;
2702 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2705 memcpy(hrxq, entry, sizeof(*hrxq) + MLX5_RSS_HASH_KEY_LEN);
2706 hrxq->idx = hrxq_idx;
2707 return &hrxq->entry;
2711 mlx5_hrxq_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2713 struct rte_eth_dev *dev = tool_ctx;
2714 struct mlx5_priv *priv = dev->data->dev_private;
2715 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2717 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2721 * Get an Rx Hash queue.
2724 * Pointer to Ethernet device.
2726 * RSS configuration for the Rx hash queue.
2729 * An hash Rx queue index on success.
2731 uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,
2732 struct mlx5_flow_rss_desc *rss_desc)
2734 struct mlx5_priv *priv = dev->data->dev_private;
2735 struct mlx5_hrxq *hrxq;
2736 struct mlx5_list_entry *entry;
2737 struct mlx5_flow_cb_ctx ctx = {
2741 if (rss_desc->shared_rss) {
2742 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2744 entry = mlx5_list_register(priv->hrxqs, &ctx);
2747 hrxq = container_of(entry, typeof(*hrxq), entry);
2755 * Release the hash Rx queue.
2758 * Pointer to Ethernet device.
2760 * Index to Hash Rx queue to release.
2763 * 1 while a reference on it exists, 0 when freed.
2765 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
2767 struct mlx5_priv *priv = dev->data->dev_private;
2768 struct mlx5_hrxq *hrxq;
2770 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2773 if (!hrxq->standalone)
2774 return mlx5_list_unregister(priv->hrxqs, &hrxq->entry);
2775 __mlx5_hrxq_remove(dev, hrxq);
2780 * Create a drop Rx Hash queue.
2783 * Pointer to Ethernet device.
2786 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2789 mlx5_drop_action_create(struct rte_eth_dev *dev)
2791 struct mlx5_priv *priv = dev->data->dev_private;
2792 struct mlx5_hrxq *hrxq = NULL;
2795 if (priv->drop_queue.hrxq)
2796 return priv->drop_queue.hrxq;
2797 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
2800 "Port %u cannot allocate memory for drop queue.",
2801 dev->data->port_id);
2805 priv->drop_queue.hrxq = hrxq;
2806 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
2808 if (!hrxq->ind_table) {
2812 ret = priv->obj_ops.drop_action_create(dev);
2818 if (hrxq->ind_table)
2819 mlx5_free(hrxq->ind_table);
2820 priv->drop_queue.hrxq = NULL;
2827 * Release a drop hash Rx queue.
2830 * Pointer to Ethernet device.
2833 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
2835 struct mlx5_priv *priv = dev->data->dev_private;
2836 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2838 if (!priv->drop_queue.hrxq)
2840 priv->obj_ops.drop_action_destroy(dev);
2841 mlx5_free(priv->drop_queue.rxq);
2842 mlx5_free(hrxq->ind_table);
2844 priv->drop_queue.rxq = NULL;
2845 priv->drop_queue.hrxq = NULL;
2849 * Verify the Rx Queue list is empty
2852 * Pointer to Ethernet device.
2855 * The number of object not released.
2858 mlx5_hrxq_verify(struct rte_eth_dev *dev)
2860 struct mlx5_priv *priv = dev->data->dev_private;
2862 return mlx5_list_get_entry_num(priv->hrxqs);
2866 * Set the Rx queue timestamp conversion parameters
2869 * Pointer to the Ethernet device structure.
2872 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
2874 struct mlx5_priv *priv = dev->data->dev_private;
2875 struct mlx5_dev_ctx_shared *sh = priv->sh;
2878 for (i = 0; i != priv->rxqs_n; ++i) {
2879 struct mlx5_rxq_data *data = mlx5_rxq_data_get(dev, i);
2884 data->rt_timestamp = priv->config.rt_timestamp;