1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
24 #include <mlx5_common_mr.h>
26 #include "mlx5_defs.h"
30 #include "mlx5_utils.h"
31 #include "mlx5_autoconf.h"
34 /* Default RSS hash key also used for ConnectX-3. */
35 uint8_t rss_hash_default_key[] = {
36 0x2c, 0xc6, 0x81, 0xd1,
37 0x5b, 0xdb, 0xf4, 0xf7,
38 0xfc, 0xa2, 0x83, 0x19,
39 0xdb, 0x1a, 0x3e, 0x94,
40 0x6b, 0x9e, 0x38, 0xd9,
41 0x2c, 0x9c, 0x03, 0xd1,
42 0xad, 0x99, 0x44, 0xa7,
43 0xd9, 0x56, 0x3d, 0x59,
44 0x06, 0x3c, 0x25, 0xf3,
45 0xfc, 0x1f, 0xdc, 0x2a,
48 /* Length of the default RSS hash key. */
49 static_assert(MLX5_RSS_HASH_KEY_LEN ==
50 (unsigned int)sizeof(rss_hash_default_key),
51 "wrong RSS default key size.");
54 * Calculate the number of CQEs in CQ for the Rx queue.
57 * Pointer to receive queue structure.
60 * Number of CQEs in CQ.
63 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
66 unsigned int wqe_n = 1 << rxq_data->elts_n;
68 if (mlx5_rxq_mprq_enabled(rxq_data))
69 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
76 * Allocate RX queue elements for Multi-Packet RQ.
79 * Pointer to RX queue structure.
82 * 0 on success, a negative errno value otherwise and rte_errno is set.
85 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
87 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
88 unsigned int wqe_n = 1 << rxq->elts_n;
92 /* Iterate on segments. */
93 for (i = 0; i <= wqe_n; ++i) {
94 struct mlx5_mprq_buf *buf;
96 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
97 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
102 (*rxq->mprq_bufs)[i] = buf;
104 rxq->mprq_repl = buf;
107 "port %u MPRQ queue %u allocated and configured %u segments",
108 rxq->port_id, rxq->idx, wqe_n);
111 err = rte_errno; /* Save rte_errno before cleanup. */
113 for (i = 0; (i != wqe_n); ++i) {
114 if ((*rxq->mprq_bufs)[i] != NULL)
115 rte_mempool_put(rxq->mprq_mp,
116 (*rxq->mprq_bufs)[i]);
117 (*rxq->mprq_bufs)[i] = NULL;
119 DRV_LOG(DEBUG, "port %u MPRQ queue %u failed, freed everything",
120 rxq->port_id, rxq->idx);
121 rte_errno = err; /* Restore rte_errno. */
126 * Allocate RX queue elements for Single-Packet RQ.
129 * Pointer to RX queue structure.
132 * 0 on success, negative errno value on failure.
135 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
137 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
138 unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
139 (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) :
140 (1 << rxq_ctrl->rxq.elts_n);
144 /* Iterate on segments. */
145 for (i = 0; (i != elts_n); ++i) {
146 struct mlx5_eth_rxseg *seg = &rxq_ctrl->rxq.rxseg[i % sges_n];
147 struct rte_mbuf *buf;
149 buf = rte_pktmbuf_alloc(seg->mp);
151 DRV_LOG(ERR, "port %u empty mbuf pool",
152 PORT_ID(rxq_ctrl->priv));
156 /* Headroom is reserved by rte_pktmbuf_alloc(). */
157 MLX5_ASSERT(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
158 /* Buffer is supposed to be empty. */
159 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
160 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
161 MLX5_ASSERT(!buf->next);
162 SET_DATA_OFF(buf, seg->offset);
163 PORT(buf) = rxq_ctrl->rxq.port_id;
164 DATA_LEN(buf) = seg->length;
165 PKT_LEN(buf) = seg->length;
167 (*rxq_ctrl->rxq.elts)[i] = buf;
169 /* If Rx vector is activated. */
170 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
171 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
172 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
173 struct rte_pktmbuf_pool_private *priv =
174 (struct rte_pktmbuf_pool_private *)
175 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
178 /* Initialize default rearm_data for vPMD. */
179 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
180 rte_mbuf_refcnt_set(mbuf_init, 1);
181 mbuf_init->nb_segs = 1;
182 mbuf_init->port = rxq->port_id;
183 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
184 mbuf_init->ol_flags = RTE_MBUF_F_EXTERNAL;
186 * prevent compiler reordering:
187 * rearm_data covers previous fields.
189 rte_compiler_barrier();
190 rxq->mbuf_initializer =
191 *(rte_xmm_t *)&mbuf_init->rearm_data;
192 /* Padding with a fake mbuf for vectorized Rx. */
193 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
194 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
197 "port %u SPRQ queue %u allocated and configured %u segments"
199 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
200 elts_n / (1 << rxq_ctrl->rxq.sges_n));
203 err = rte_errno; /* Save rte_errno before cleanup. */
205 for (i = 0; (i != elts_n); ++i) {
206 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
207 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
208 (*rxq_ctrl->rxq.elts)[i] = NULL;
210 DRV_LOG(DEBUG, "port %u SPRQ queue %u failed, freed everything",
211 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
212 rte_errno = err; /* Restore rte_errno. */
217 * Allocate RX queue elements.
220 * Pointer to RX queue structure.
223 * 0 on success, negative errno value on failure.
226 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
231 * For MPRQ we need to allocate both MPRQ buffers
232 * for WQEs and simple mbufs for vector processing.
234 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
235 ret = rxq_alloc_elts_mprq(rxq_ctrl);
237 ret = rxq_alloc_elts_sprq(rxq_ctrl);
242 * Free RX queue elements for Multi-Packet RQ.
245 * Pointer to RX queue structure.
248 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
250 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
253 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing %d WRs",
254 rxq->port_id, rxq->idx, (1u << rxq->elts_n));
255 if (rxq->mprq_bufs == NULL)
257 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
258 if ((*rxq->mprq_bufs)[i] != NULL)
259 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
260 (*rxq->mprq_bufs)[i] = NULL;
262 if (rxq->mprq_repl != NULL) {
263 mlx5_mprq_buf_free(rxq->mprq_repl);
264 rxq->mprq_repl = NULL;
269 * Free RX queue elements for Single-Packet RQ.
272 * Pointer to RX queue structure.
275 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
277 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
278 const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
279 (1 << rxq->elts_n) * (1 << rxq->strd_num_n) :
281 const uint16_t q_mask = q_n - 1;
282 uint16_t elts_ci = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
283 rxq->elts_ci : rxq->rq_ci;
284 uint16_t used = q_n - (elts_ci - rxq->rq_pi);
287 DRV_LOG(DEBUG, "port %u Rx queue %u freeing %d WRs",
288 PORT_ID(rxq_ctrl->priv), rxq->idx, q_n);
289 if (rxq->elts == NULL)
292 * Some mbuf in the Ring belongs to the application.
293 * They cannot be freed.
295 if (mlx5_rxq_check_vec_support(rxq) > 0) {
296 for (i = 0; i < used; ++i)
297 (*rxq->elts)[(elts_ci + i) & q_mask] = NULL;
298 rxq->rq_pi = elts_ci;
300 for (i = 0; i != q_n; ++i) {
301 if ((*rxq->elts)[i] != NULL)
302 rte_pktmbuf_free_seg((*rxq->elts)[i]);
303 (*rxq->elts)[i] = NULL;
308 * Free RX queue elements.
311 * Pointer to RX queue structure.
314 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
317 * For MPRQ we need to allocate both MPRQ buffers
318 * for WQEs and simple mbufs for vector processing.
320 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
321 rxq_free_elts_mprq(rxq_ctrl);
322 rxq_free_elts_sprq(rxq_ctrl);
326 * Returns the per-queue supported offloads.
329 * Pointer to Ethernet device.
332 * Supported Rx offloads.
335 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
337 struct mlx5_priv *priv = dev->data->dev_private;
338 struct mlx5_dev_config *config = &priv->config;
339 uint64_t offloads = (RTE_ETH_RX_OFFLOAD_SCATTER |
340 RTE_ETH_RX_OFFLOAD_TIMESTAMP |
341 RTE_ETH_RX_OFFLOAD_RSS_HASH);
343 if (!config->mprq.enabled)
344 offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
345 if (config->hw_fcs_strip)
346 offloads |= RTE_ETH_RX_OFFLOAD_KEEP_CRC;
348 offloads |= (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
349 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
350 RTE_ETH_RX_OFFLOAD_TCP_CKSUM);
351 if (config->hw_vlan_strip)
352 offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
353 if (MLX5_LRO_SUPPORTED(dev))
354 offloads |= RTE_ETH_RX_OFFLOAD_TCP_LRO;
360 * Returns the per-port supported offloads.
363 * Supported Rx offloads.
366 mlx5_get_rx_port_offloads(void)
368 uint64_t offloads = RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
374 * Verify if the queue can be released.
377 * Pointer to Ethernet device.
382 * 1 if the queue can be released
383 * 0 if the queue can not be released, there are references to it.
384 * Negative errno and rte_errno is set if queue doesn't exist.
387 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
389 struct mlx5_priv *priv = dev->data->dev_private;
390 struct mlx5_rxq_ctrl *rxq_ctrl;
392 if (!(*priv->rxqs)[idx]) {
396 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
397 return (__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED) == 1);
400 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
402 rxq_sync_cq(struct mlx5_rxq_data *rxq)
404 const uint16_t cqe_n = 1 << rxq->cqe_n;
405 const uint16_t cqe_mask = cqe_n - 1;
406 volatile struct mlx5_cqe *cqe;
411 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
412 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
413 if (ret == MLX5_CQE_STATUS_HW_OWN)
415 if (ret == MLX5_CQE_STATUS_ERR) {
419 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
420 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
424 /* Compute the next non compressed CQE. */
425 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
428 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
429 for (i = 0; i < cqe_n; i++) {
430 cqe = &(*rxq->cqes)[i];
431 cqe->op_own = MLX5_CQE_INVALIDATE;
433 /* Resync CQE and WQE (WQ in RESET state). */
435 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
437 *rxq->rq_db = rte_cpu_to_be_32(0);
442 * Rx queue stop. Device queue goes to the RESET state,
443 * all involved mbufs are freed from WQ.
446 * Pointer to Ethernet device structure.
451 * 0 on success, a negative errno value otherwise and rte_errno is set.
454 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
456 struct mlx5_priv *priv = dev->data->dev_private;
457 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
458 struct mlx5_rxq_ctrl *rxq_ctrl =
459 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
462 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
463 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RDY2RST);
465 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
470 /* Remove all processes CQEs. */
472 /* Free all involved mbufs. */
473 rxq_free_elts(rxq_ctrl);
474 /* Set the actual queue state. */
475 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
480 * Rx queue stop. Device queue goes to the RESET state,
481 * all involved mbufs are freed from WQ.
484 * Pointer to Ethernet device structure.
489 * 0 on success, a negative errno value otherwise and rte_errno is set.
492 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
494 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
497 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
498 DRV_LOG(ERR, "Hairpin queue can't be stopped");
502 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
505 * Vectorized Rx burst requires the CQ and RQ indices
506 * synchronized, that might be broken on RQ restart
507 * and cause Rx malfunction, so queue stopping is
508 * not supported if vectorized Rx burst is engaged.
509 * The routine pointer depends on the process
510 * type, should perform check there.
512 if (pkt_burst == mlx5_rx_burst_vec) {
513 DRV_LOG(ERR, "Rx queue stop is not supported "
514 "for vectorized Rx");
518 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
519 ret = mlx5_mp_os_req_queue_control(dev, idx,
520 MLX5_MP_REQ_QUEUE_RX_STOP);
522 ret = mlx5_rx_queue_stop_primary(dev, idx);
528 * Rx queue start. Device queue goes to the ready state,
529 * all required mbufs are allocated and WQ is replenished.
532 * Pointer to Ethernet device structure.
537 * 0 on success, a negative errno value otherwise and rte_errno is set.
540 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
542 struct mlx5_priv *priv = dev->data->dev_private;
543 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
544 struct mlx5_rxq_ctrl *rxq_ctrl =
545 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
548 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
549 /* Allocate needed buffers. */
550 ret = rxq_alloc_elts(rxq_ctrl);
552 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
557 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
559 /* Reset RQ consumer before moving queue to READY state. */
560 *rxq->rq_db = rte_cpu_to_be_32(0);
562 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RST2RDY);
564 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
569 /* Reinitialize RQ - set WQEs. */
570 mlx5_rxq_initialize(rxq);
571 rxq->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
572 /* Set actual queue state. */
573 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
578 * Rx queue start. Device queue goes to the ready state,
579 * all required mbufs are allocated and WQ is replenished.
582 * Pointer to Ethernet device structure.
587 * 0 on success, a negative errno value otherwise and rte_errno is set.
590 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
594 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
595 DRV_LOG(ERR, "Hairpin queue can't be started");
599 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
601 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
602 ret = mlx5_mp_os_req_queue_control(dev, idx,
603 MLX5_MP_REQ_QUEUE_RX_START);
605 ret = mlx5_rx_queue_start_primary(dev, idx);
611 * Rx queue presetup checks.
614 * Pointer to Ethernet device structure.
618 * Number of descriptors to configure in queue.
621 * 0 on success, a negative errno value otherwise and rte_errno is set.
624 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc)
626 struct mlx5_priv *priv = dev->data->dev_private;
628 if (!rte_is_power_of_2(*desc)) {
629 *desc = 1 << log2above(*desc);
631 "port %u increased number of descriptors in Rx queue %u"
632 " to the next power of two (%d)",
633 dev->data->port_id, idx, *desc);
635 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
636 dev->data->port_id, idx, *desc);
637 if (idx >= priv->rxqs_n) {
638 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
639 dev->data->port_id, idx, priv->rxqs_n);
640 rte_errno = EOVERFLOW;
643 if (!mlx5_rxq_releasable(dev, idx)) {
644 DRV_LOG(ERR, "port %u unable to release queue index %u",
645 dev->data->port_id, idx);
649 mlx5_rxq_release(dev, idx);
656 * Pointer to Ethernet device structure.
660 * Number of descriptors to configure in queue.
662 * NUMA socket on which memory must be allocated.
664 * Thresholds parameters.
666 * Memory pool for buffer allocations.
669 * 0 on success, a negative errno value otherwise and rte_errno is set.
672 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
673 unsigned int socket, const struct rte_eth_rxconf *conf,
674 struct rte_mempool *mp)
676 struct mlx5_priv *priv = dev->data->dev_private;
677 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
678 struct mlx5_rxq_ctrl *rxq_ctrl =
679 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
680 struct rte_eth_rxseg_split *rx_seg =
681 (struct rte_eth_rxseg_split *)conf->rx_seg;
682 struct rte_eth_rxseg_split rx_single = {.mp = mp};
683 uint16_t n_seg = conf->rx_nseg;
688 * The parameters should be checked on rte_eth_dev layer.
689 * If mp is specified it means the compatible configuration
690 * without buffer split feature tuning.
696 uint64_t offloads = conf->offloads |
697 dev->data->dev_conf.rxmode.offloads;
699 /* The offloads should be checked on rte_eth_dev layer. */
700 MLX5_ASSERT(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
701 if (!(offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) {
702 DRV_LOG(ERR, "port %u queue index %u split "
703 "offload not configured",
704 dev->data->port_id, idx);
708 MLX5_ASSERT(n_seg < MLX5_MAX_RXQ_NSEG);
710 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
713 rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, rx_seg, n_seg);
715 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
716 dev->data->port_id, idx);
720 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
721 dev->data->port_id, idx);
722 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
729 * Pointer to Ethernet device structure.
733 * Number of descriptors to configure in queue.
734 * @param hairpin_conf
735 * Hairpin configuration parameters.
738 * 0 on success, a negative errno value otherwise and rte_errno is set.
741 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
743 const struct rte_eth_hairpin_conf *hairpin_conf)
745 struct mlx5_priv *priv = dev->data->dev_private;
746 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
747 struct mlx5_rxq_ctrl *rxq_ctrl =
748 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
751 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
754 if (hairpin_conf->peer_count != 1) {
756 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue index %u"
757 " peer count is %u", dev->data->port_id,
758 idx, hairpin_conf->peer_count);
761 if (hairpin_conf->peers[0].port == dev->data->port_id) {
762 if (hairpin_conf->peers[0].queue >= priv->txqs_n) {
764 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
765 " index %u, Tx %u is larger than %u",
766 dev->data->port_id, idx,
767 hairpin_conf->peers[0].queue, priv->txqs_n);
771 if (hairpin_conf->manual_bind == 0 ||
772 hairpin_conf->tx_explicit == 0) {
774 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
775 " index %u peer port %u with attributes %u %u",
776 dev->data->port_id, idx,
777 hairpin_conf->peers[0].port,
778 hairpin_conf->manual_bind,
779 hairpin_conf->tx_explicit);
783 rxq_ctrl = mlx5_rxq_hairpin_new(dev, idx, desc, hairpin_conf);
785 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
786 dev->data->port_id, idx);
790 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
791 dev->data->port_id, idx);
792 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
797 * DPDK callback to release a RX queue.
800 * Pointer to Ethernet device structure.
802 * Receive queue index.
805 mlx5_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
807 struct mlx5_rxq_data *rxq = dev->data->rx_queues[qid];
811 if (!mlx5_rxq_releasable(dev, qid))
812 rte_panic("port %u Rx queue %u is still used by a flow and"
813 " cannot be removed\n", dev->data->port_id, qid);
814 mlx5_rxq_release(dev, qid);
818 * Allocate queue vector and fill epoll fd list for Rx interrupts.
821 * Pointer to Ethernet device.
824 * 0 on success, a negative errno value otherwise and rte_errno is set.
827 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
829 struct mlx5_priv *priv = dev->data->dev_private;
831 unsigned int rxqs_n = priv->rxqs_n;
832 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
833 unsigned int count = 0;
834 struct rte_intr_handle *intr_handle = dev->intr_handle;
836 if (!dev->data->dev_conf.intr_conf.rxq)
838 mlx5_rx_intr_vec_disable(dev);
839 if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
841 "port %u failed to allocate memory for interrupt"
842 " vector, Rx interrupts will not be supported",
848 if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))
851 for (i = 0; i != n; ++i) {
852 /* This rxq obj must not be released in this function. */
853 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
854 struct mlx5_rxq_obj *rxq_obj = rxq_ctrl ? rxq_ctrl->obj : NULL;
857 /* Skip queues that cannot request interrupts. */
858 if (!rxq_obj || (!rxq_obj->ibv_channel &&
859 !rxq_obj->devx_channel)) {
860 /* Use invalid intr_vec[] index to disable entry. */
861 if (rte_intr_vec_list_index_set(intr_handle, i,
862 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
864 /* Decrease the rxq_ctrl's refcnt */
866 mlx5_rxq_release(dev, i);
869 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
871 "port %u too many Rx queues for interrupt"
872 " vector size (%d), Rx interrupts cannot be"
874 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
875 mlx5_rx_intr_vec_disable(dev);
879 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
883 "port %u failed to make Rx interrupt file"
884 " descriptor %d non-blocking for queue index"
886 dev->data->port_id, rxq_obj->fd, i);
887 mlx5_rx_intr_vec_disable(dev);
891 if (rte_intr_vec_list_index_set(intr_handle, i,
892 RTE_INTR_VEC_RXTX_OFFSET + count))
894 if (rte_intr_efds_index_set(intr_handle, count,
900 mlx5_rx_intr_vec_disable(dev);
901 else if (rte_intr_nb_efd_set(intr_handle, count))
907 * Clean up Rx interrupts handler.
910 * Pointer to Ethernet device.
913 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
915 struct mlx5_priv *priv = dev->data->dev_private;
916 struct rte_intr_handle *intr_handle = dev->intr_handle;
918 unsigned int rxqs_n = priv->rxqs_n;
919 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
921 if (!dev->data->dev_conf.intr_conf.rxq)
923 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0)
925 for (i = 0; i != n; ++i) {
926 if (rte_intr_vec_list_index_get(intr_handle, i) ==
927 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID)
930 * Need to access directly the queue to release the reference
931 * kept in mlx5_rx_intr_vec_enable().
933 mlx5_rxq_release(dev, i);
936 rte_intr_free_epoll_fd(intr_handle);
938 rte_intr_vec_list_free(intr_handle);
940 rte_intr_nb_efd_set(intr_handle, 0);
944 * MLX5 CQ notification .
947 * Pointer to receive queue structure.
949 * Sequence number per receive queue .
952 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
955 uint32_t doorbell_hi;
957 void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
959 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
960 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
961 doorbell = (uint64_t)doorbell_hi << 32;
962 doorbell |= rxq->cqn;
963 rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
964 mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
965 cq_db_reg, rxq->uar_lock_cq);
969 * DPDK callback for Rx queue interrupt enable.
972 * Pointer to Ethernet device structure.
977 * 0 on success, a negative errno value otherwise and rte_errno is set.
980 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
982 struct mlx5_rxq_ctrl *rxq_ctrl;
984 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
988 if (!rxq_ctrl->obj) {
989 mlx5_rxq_release(dev, rx_queue_id);
992 mlx5_arm_cq(&rxq_ctrl->rxq, rxq_ctrl->rxq.cq_arm_sn);
994 mlx5_rxq_release(dev, rx_queue_id);
1002 * DPDK callback for Rx queue interrupt disable.
1005 * Pointer to Ethernet device structure.
1006 * @param rx_queue_id
1010 * 0 on success, a negative errno value otherwise and rte_errno is set.
1013 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1015 struct mlx5_priv *priv = dev->data->dev_private;
1016 struct mlx5_rxq_ctrl *rxq_ctrl;
1019 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
1026 if (rxq_ctrl->irq) {
1027 ret = priv->obj_ops.rxq_event_get(rxq_ctrl->obj);
1030 rxq_ctrl->rxq.cq_arm_sn++;
1032 mlx5_rxq_release(dev, rx_queue_id);
1036 * The ret variable may be EAGAIN which means the get_event function was
1037 * called before receiving one.
1043 ret = rte_errno; /* Save rte_errno before cleanup. */
1044 mlx5_rxq_release(dev, rx_queue_id);
1046 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1047 dev->data->port_id, rx_queue_id);
1048 rte_errno = ret; /* Restore rte_errno. */
1053 * Verify the Rx queue objects list is empty
1056 * Pointer to Ethernet device.
1059 * The number of objects not released.
1062 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1064 struct mlx5_priv *priv = dev->data->dev_private;
1066 struct mlx5_rxq_obj *rxq_obj;
1068 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1069 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1070 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1077 * Callback function to initialize mbufs for Multi-Packet RQ.
1080 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1081 void *_m, unsigned int i __rte_unused)
1083 struct mlx5_mprq_buf *buf = _m;
1084 struct rte_mbuf_ext_shared_info *shinfo;
1085 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1088 memset(_m, 0, sizeof(*buf));
1090 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1091 for (j = 0; j != strd_n; ++j) {
1092 shinfo = &buf->shinfos[j];
1093 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1094 shinfo->fcb_opaque = buf;
1099 * Free mempool of Multi-Packet RQ.
1102 * Pointer to Ethernet device.
1105 * 0 on success, negative errno value on failure.
1108 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1110 struct mlx5_priv *priv = dev->data->dev_private;
1111 struct rte_mempool *mp = priv->mprq_mp;
1116 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1117 dev->data->port_id, mp->name);
1119 * If a buffer in the pool has been externally attached to a mbuf and it
1120 * is still in use by application, destroying the Rx queue can spoil
1121 * the packet. It is unlikely to happen but if application dynamically
1122 * creates and destroys with holding Rx packets, this can happen.
1124 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1125 * RQ isn't provided by application but managed by PMD.
1127 if (!rte_mempool_full(mp)) {
1129 "port %u mempool for Multi-Packet RQ is still in use",
1130 dev->data->port_id);
1134 rte_mempool_free(mp);
1135 /* Unset mempool for each Rx queue. */
1136 for (i = 0; i != priv->rxqs_n; ++i) {
1137 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1141 rxq->mprq_mp = NULL;
1143 priv->mprq_mp = NULL;
1148 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1149 * mempool. If already allocated, reuse it if there're enough elements.
1150 * Otherwise, resize it.
1153 * Pointer to Ethernet device.
1156 * 0 on success, negative errno value on failure.
1159 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1161 struct mlx5_priv *priv = dev->data->dev_private;
1162 struct rte_mempool *mp = priv->mprq_mp;
1163 char name[RTE_MEMPOOL_NAMESIZE];
1164 unsigned int desc = 0;
1165 unsigned int buf_len;
1166 unsigned int obj_num;
1167 unsigned int obj_size;
1168 unsigned int strd_num_n = 0;
1169 unsigned int strd_sz_n = 0;
1171 unsigned int n_ibv = 0;
1174 if (!mlx5_mprq_enabled(dev))
1176 /* Count the total number of descriptors configured. */
1177 for (i = 0; i != priv->rxqs_n; ++i) {
1178 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1179 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1180 (rxq, struct mlx5_rxq_ctrl, rxq);
1182 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1185 desc += 1 << rxq->elts_n;
1186 /* Get the max number of strides. */
1187 if (strd_num_n < rxq->strd_num_n)
1188 strd_num_n = rxq->strd_num_n;
1189 /* Get the max size of a stride. */
1190 if (strd_sz_n < rxq->strd_sz_n)
1191 strd_sz_n = rxq->strd_sz_n;
1193 MLX5_ASSERT(strd_num_n && strd_sz_n);
1194 buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1195 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len + (1 << strd_num_n) *
1196 sizeof(struct rte_mbuf_ext_shared_info) + RTE_PKTMBUF_HEADROOM;
1198 * Received packets can be either memcpy'd or externally referenced. In
1199 * case that the packet is attached to an mbuf as an external buffer, as
1200 * it isn't possible to predict how the buffers will be queued by
1201 * application, there's no option to exactly pre-allocate needed buffers
1202 * in advance but to speculatively prepares enough buffers.
1204 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1205 * received packets to buffers provided by application (rxq->mp) until
1206 * this Mempool gets available again.
1209 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1211 * rte_mempool_create_empty() has sanity check to refuse large cache
1212 * size compared to the number of elements.
1213 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1214 * constant number 2 instead.
1216 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1217 /* Check a mempool is already allocated and if it can be resued. */
1218 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1219 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1220 dev->data->port_id, mp->name);
1223 } else if (mp != NULL) {
1224 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1225 dev->data->port_id, mp->name);
1227 * If failed to free, which means it may be still in use, no way
1228 * but to keep using the existing one. On buffer underrun,
1229 * packets will be memcpy'd instead of external buffer
1232 if (mlx5_mprq_free_mp(dev)) {
1233 if (mp->elt_size >= obj_size)
1239 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1240 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1241 0, NULL, NULL, mlx5_mprq_buf_init,
1242 (void *)((uintptr_t)1 << strd_num_n),
1243 dev->device->numa_node, 0);
1246 "port %u failed to allocate a mempool for"
1247 " Multi-Packet RQ, count=%u, size=%u",
1248 dev->data->port_id, obj_num, obj_size);
1252 ret = mlx5_mr_mempool_register(&priv->sh->cdev->mr_scache,
1253 priv->sh->cdev->pd, mp, &priv->mp_id);
1254 if (ret < 0 && rte_errno != EEXIST) {
1256 DRV_LOG(ERR, "port %u failed to register a mempool for Multi-Packet RQ",
1257 dev->data->port_id);
1258 rte_mempool_free(mp);
1264 /* Set mempool for each Rx queue. */
1265 for (i = 0; i != priv->rxqs_n; ++i) {
1266 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1267 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1268 (rxq, struct mlx5_rxq_ctrl, rxq);
1270 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1274 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1275 dev->data->port_id);
1279 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1280 sizeof(struct rte_vlan_hdr) * 2 + \
1281 sizeof(struct rte_ipv6_hdr)))
1282 #define MAX_TCP_OPTION_SIZE 40u
1283 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1284 sizeof(struct rte_tcp_hdr) + \
1285 MAX_TCP_OPTION_SIZE))
1288 * Adjust the maximum LRO massage size.
1291 * Pointer to Ethernet device.
1294 * @param max_lro_size
1295 * The maximum size for LRO packet.
1298 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1299 uint32_t max_lro_size)
1301 struct mlx5_priv *priv = dev->data->dev_private;
1303 if (priv->config.hca_attr.lro_max_msg_sz_mode ==
1304 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1305 MLX5_MAX_TCP_HDR_OFFSET)
1306 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1307 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1308 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1309 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1310 if (priv->max_lro_msg_size)
1311 priv->max_lro_msg_size =
1312 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1314 priv->max_lro_msg_size = max_lro_size;
1316 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1317 dev->data->port_id, idx,
1318 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1322 * Create a DPDK Rx queue.
1325 * Pointer to Ethernet device.
1329 * Number of descriptors to configure in queue.
1331 * NUMA socket on which memory must be allocated.
1334 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1336 struct mlx5_rxq_ctrl *
1337 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1338 unsigned int socket, const struct rte_eth_rxconf *conf,
1339 const struct rte_eth_rxseg_split *rx_seg, uint16_t n_seg)
1341 struct mlx5_priv *priv = dev->data->dev_private;
1342 struct mlx5_rxq_ctrl *tmpl;
1343 unsigned int mb_len = rte_pktmbuf_data_room_size(rx_seg[0].mp);
1344 struct mlx5_dev_config *config = &priv->config;
1345 uint64_t offloads = conf->offloads |
1346 dev->data->dev_conf.rxmode.offloads;
1347 unsigned int lro_on_queue = !!(offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO);
1348 unsigned int max_rx_pktlen = lro_on_queue ?
1349 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1350 dev->data->mtu + (unsigned int)RTE_ETHER_HDR_LEN +
1352 unsigned int non_scatter_min_mbuf_size = max_rx_pktlen +
1353 RTE_PKTMBUF_HEADROOM;
1354 unsigned int max_lro_size = 0;
1355 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1356 const int mprq_en = mlx5_check_mprq_support(dev) > 0 && n_seg == 1 &&
1357 !rx_seg[0].offset && !rx_seg[0].length;
1358 unsigned int mprq_stride_nums = config->mprq.stride_num_n ?
1359 config->mprq.stride_num_n : MLX5_MPRQ_STRIDE_NUM_N;
1360 unsigned int mprq_stride_size = non_scatter_min_mbuf_size <=
1361 (1U << config->mprq.max_stride_size_n) ?
1362 log2above(non_scatter_min_mbuf_size) : MLX5_MPRQ_STRIDE_SIZE_N;
1363 unsigned int mprq_stride_cap = (config->mprq.stride_num_n ?
1364 (1U << config->mprq.stride_num_n) : (1U << mprq_stride_nums)) *
1365 (config->mprq.stride_size_n ?
1366 (1U << config->mprq.stride_size_n) : (1U << mprq_stride_size));
1368 * Always allocate extra slots, even if eventually
1369 * the vector Rx will not be used.
1371 uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1372 const struct rte_eth_rxseg_split *qs_seg = rx_seg;
1373 unsigned int tail_len;
1375 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
1376 sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *) +
1378 (desc >> mprq_stride_nums) * sizeof(struct mlx5_mprq_buf *),
1384 MLX5_ASSERT(n_seg && n_seg <= MLX5_MAX_RXQ_NSEG);
1386 * Build the array of actual buffer offsets and lengths.
1387 * Pad with the buffers from the last memory pool if
1388 * needed to handle max size packets, replace zero length
1389 * with the buffer length from the pool.
1391 tail_len = max_rx_pktlen;
1393 struct mlx5_eth_rxseg *hw_seg =
1394 &tmpl->rxq.rxseg[tmpl->rxq.rxseg_n];
1395 uint32_t buf_len, offset, seg_len;
1398 * For the buffers beyond descriptions offset is zero,
1399 * the first buffer contains head room.
1401 buf_len = rte_pktmbuf_data_room_size(qs_seg->mp);
1402 offset = (tmpl->rxq.rxseg_n >= n_seg ? 0 : qs_seg->offset) +
1403 (tmpl->rxq.rxseg_n ? 0 : RTE_PKTMBUF_HEADROOM);
1405 * For the buffers beyond descriptions the length is
1406 * pool buffer length, zero lengths are replaced with
1407 * pool buffer length either.
1409 seg_len = tmpl->rxq.rxseg_n >= n_seg ? buf_len :
1413 /* Check is done in long int, now overflows. */
1414 if (buf_len < seg_len + offset) {
1415 DRV_LOG(ERR, "port %u Rx queue %u: Split offset/length "
1416 "%u/%u can't be satisfied",
1417 dev->data->port_id, idx,
1418 qs_seg->length, qs_seg->offset);
1422 if (seg_len > tail_len)
1423 seg_len = buf_len - offset;
1424 if (++tmpl->rxq.rxseg_n > MLX5_MAX_RXQ_NSEG) {
1426 "port %u too many SGEs (%u) needed to handle"
1427 " requested maximum packet size %u, the maximum"
1428 " supported are %u", dev->data->port_id,
1429 tmpl->rxq.rxseg_n, max_rx_pktlen,
1431 rte_errno = ENOTSUP;
1434 /* Build the actual scattering element in the queue object. */
1435 hw_seg->mp = qs_seg->mp;
1436 MLX5_ASSERT(offset <= UINT16_MAX);
1437 MLX5_ASSERT(seg_len <= UINT16_MAX);
1438 hw_seg->offset = (uint16_t)offset;
1439 hw_seg->length = (uint16_t)seg_len;
1441 * Advance the segment descriptor, the padding is the based
1442 * on the attributes of the last descriptor.
1444 if (tmpl->rxq.rxseg_n < n_seg)
1446 tail_len -= RTE_MIN(tail_len, seg_len);
1447 } while (tail_len || !rte_is_power_of_2(tmpl->rxq.rxseg_n));
1448 MLX5_ASSERT(tmpl->rxq.rxseg_n &&
1449 tmpl->rxq.rxseg_n <= MLX5_MAX_RXQ_NSEG);
1450 if (tmpl->rxq.rxseg_n > 1 && !(offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) {
1451 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1452 " configured and no enough mbuf space(%u) to contain "
1453 "the maximum RX packet length(%u) with head-room(%u)",
1454 dev->data->port_id, idx, mb_len, max_rx_pktlen,
1455 RTE_PKTMBUF_HEADROOM);
1459 tmpl->type = MLX5_RXQ_TYPE_STANDARD;
1460 if (mlx5_mr_ctrl_init(&tmpl->rxq.mr_ctrl,
1461 &priv->sh->cdev->mr_scache.dev_gen, socket)) {
1462 /* rte_errno is already set. */
1465 tmpl->socket = socket;
1466 if (dev->data->dev_conf.intr_conf.rxq)
1469 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1470 * following conditions are met:
1471 * - MPRQ is enabled.
1472 * - The number of descs is more than the number of strides.
1473 * - max_rx_pktlen plus overhead is less than the max size
1474 * of a stride or mprq_stride_size is specified by a user.
1475 * Need to make sure that there are enough strides to encap
1476 * the maximum packet size in case mprq_stride_size is set.
1477 * Otherwise, enable Rx scatter if necessary.
1479 if (mprq_en && desc > (1U << mprq_stride_nums) &&
1480 (non_scatter_min_mbuf_size <=
1481 (1U << config->mprq.max_stride_size_n) ||
1482 (config->mprq.stride_size_n &&
1483 non_scatter_min_mbuf_size <= mprq_stride_cap))) {
1484 /* TODO: Rx scatter isn't supported yet. */
1485 tmpl->rxq.sges_n = 0;
1486 /* Trim the number of descs needed. */
1487 desc >>= mprq_stride_nums;
1488 tmpl->rxq.strd_num_n = config->mprq.stride_num_n ?
1489 config->mprq.stride_num_n : mprq_stride_nums;
1490 tmpl->rxq.strd_sz_n = config->mprq.stride_size_n ?
1491 config->mprq.stride_size_n : mprq_stride_size;
1492 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1493 tmpl->rxq.strd_scatter_en =
1494 !!(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
1495 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1496 config->mprq.max_memcpy_len);
1497 max_lro_size = RTE_MIN(max_rx_pktlen,
1498 (1u << tmpl->rxq.strd_num_n) *
1499 (1u << tmpl->rxq.strd_sz_n));
1501 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1502 " strd_num_n = %u, strd_sz_n = %u",
1503 dev->data->port_id, idx,
1504 tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1505 } else if (tmpl->rxq.rxseg_n == 1) {
1506 MLX5_ASSERT(max_rx_pktlen <= first_mb_free_size);
1507 tmpl->rxq.sges_n = 0;
1508 max_lro_size = max_rx_pktlen;
1509 } else if (offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
1510 unsigned int sges_n;
1512 if (lro_on_queue && first_mb_free_size <
1513 MLX5_MAX_LRO_HEADER_FIX) {
1514 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1515 " to include the max header size(%u) for LRO",
1516 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1517 rte_errno = ENOTSUP;
1521 * Determine the number of SGEs needed for a full packet
1522 * and round it to the next power of two.
1524 sges_n = log2above(tmpl->rxq.rxseg_n);
1525 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1527 "port %u too many SGEs (%u) needed to handle"
1528 " requested maximum packet size %u, the maximum"
1529 " supported are %u", dev->data->port_id,
1530 1 << sges_n, max_rx_pktlen,
1531 1u << MLX5_MAX_LOG_RQ_SEGS);
1532 rte_errno = ENOTSUP;
1535 tmpl->rxq.sges_n = sges_n;
1536 max_lro_size = max_rx_pktlen;
1538 if (config->mprq.enabled && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1540 "port %u MPRQ is requested but cannot be enabled\n"
1541 " (requested: pkt_sz = %u, desc_num = %u,"
1542 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1543 " supported: min_rxqs_num = %u,"
1544 " min_stride_sz = %u, max_stride_sz = %u).",
1545 dev->data->port_id, non_scatter_min_mbuf_size,
1547 config->mprq.stride_size_n ?
1548 (1U << config->mprq.stride_size_n) :
1549 (1U << mprq_stride_size),
1550 config->mprq.stride_num_n ?
1551 (1U << config->mprq.stride_num_n) :
1552 (1U << mprq_stride_nums),
1553 config->mprq.min_rxqs_num,
1554 (1U << config->mprq.min_stride_size_n),
1555 (1U << config->mprq.max_stride_size_n));
1556 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1557 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1558 if (desc % (1 << tmpl->rxq.sges_n)) {
1560 "port %u number of Rx queue descriptors (%u) is not a"
1561 " multiple of SGEs per packet (%u)",
1564 1 << tmpl->rxq.sges_n);
1568 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1569 /* Toggle RX checksum offload if hardware supports it. */
1570 tmpl->rxq.csum = !!(offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM);
1571 /* Configure Rx timestamp. */
1572 tmpl->rxq.hw_timestamp = !!(offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP);
1573 tmpl->rxq.timestamp_rx_flag = 0;
1574 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1575 &tmpl->rxq.timestamp_offset,
1576 &tmpl->rxq.timestamp_rx_flag) != 0) {
1577 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1580 /* Configure VLAN stripping. */
1581 tmpl->rxq.vlan_strip = !!(offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
1582 /* By default, FCS (CRC) is stripped by hardware. */
1583 tmpl->rxq.crc_present = 0;
1584 tmpl->rxq.lro = lro_on_queue;
1585 if (offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) {
1586 if (config->hw_fcs_strip) {
1588 * RQs used for LRO-enabled TIRs should not be
1589 * configured to scatter the FCS.
1593 "port %u CRC stripping has been "
1594 "disabled but will still be performed "
1595 "by hardware, because LRO is enabled",
1596 dev->data->port_id);
1598 tmpl->rxq.crc_present = 1;
1601 "port %u CRC stripping has been disabled but will"
1602 " still be performed by hardware, make sure MLNX_OFED"
1603 " and firmware are up to date",
1604 dev->data->port_id);
1608 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1609 " incoming frames to hide it",
1611 tmpl->rxq.crc_present ? "disabled" : "enabled",
1612 tmpl->rxq.crc_present << 2);
1614 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1615 (!!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS));
1616 tmpl->rxq.port_id = dev->data->port_id;
1618 tmpl->rxq.mp = rx_seg[0].mp;
1619 tmpl->rxq.elts_n = log2above(desc);
1620 tmpl->rxq.rq_repl_thresh =
1621 MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
1623 (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
1624 tmpl->rxq.mprq_bufs =
1625 (struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
1627 tmpl->rxq.uar_lock_cq = &priv->sh->uar_lock_cq;
1629 tmpl->rxq.idx = idx;
1630 __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1631 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1634 mlx5_mr_btree_free(&tmpl->rxq.mr_ctrl.cache_bh);
1640 * Create a DPDK Rx hairpin queue.
1643 * Pointer to Ethernet device.
1647 * Number of descriptors to configure in queue.
1648 * @param hairpin_conf
1649 * The hairpin binding configuration.
1652 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1654 struct mlx5_rxq_ctrl *
1655 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1656 const struct rte_eth_hairpin_conf *hairpin_conf)
1658 struct mlx5_priv *priv = dev->data->dev_private;
1659 struct mlx5_rxq_ctrl *tmpl;
1661 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1667 tmpl->type = MLX5_RXQ_TYPE_HAIRPIN;
1668 tmpl->socket = SOCKET_ID_ANY;
1669 tmpl->rxq.rss_hash = 0;
1670 tmpl->rxq.port_id = dev->data->port_id;
1672 tmpl->rxq.mp = NULL;
1673 tmpl->rxq.elts_n = log2above(desc);
1674 tmpl->rxq.elts = NULL;
1675 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1676 tmpl->hairpin_conf = *hairpin_conf;
1677 tmpl->rxq.idx = idx;
1678 __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1679 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1687 * Pointer to Ethernet device.
1692 * A pointer to the queue if it exists, NULL otherwise.
1694 struct mlx5_rxq_ctrl *
1695 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1697 struct mlx5_priv *priv = dev->data->dev_private;
1698 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1699 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1702 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1703 __atomic_fetch_add(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED);
1709 * Release a Rx queue.
1712 * Pointer to Ethernet device.
1717 * 1 while a reference on it exists, 0 when freed.
1720 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1722 struct mlx5_priv *priv = dev->data->dev_private;
1723 struct mlx5_rxq_ctrl *rxq_ctrl;
1725 if (priv->rxqs == NULL || (*priv->rxqs)[idx] == NULL)
1727 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1728 if (__atomic_sub_fetch(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED) > 1)
1730 if (rxq_ctrl->obj) {
1731 priv->obj_ops.rxq_obj_release(rxq_ctrl->obj);
1732 LIST_REMOVE(rxq_ctrl->obj, next);
1733 mlx5_free(rxq_ctrl->obj);
1734 rxq_ctrl->obj = NULL;
1736 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) {
1737 rxq_free_elts(rxq_ctrl);
1738 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
1740 if (!__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED)) {
1741 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
1742 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1743 LIST_REMOVE(rxq_ctrl, next);
1744 mlx5_free(rxq_ctrl);
1745 (*priv->rxqs)[idx] = NULL;
1751 * Verify the Rx Queue list is empty
1754 * Pointer to Ethernet device.
1757 * The number of object not released.
1760 mlx5_rxq_verify(struct rte_eth_dev *dev)
1762 struct mlx5_priv *priv = dev->data->dev_private;
1763 struct mlx5_rxq_ctrl *rxq_ctrl;
1766 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1767 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1768 dev->data->port_id, rxq_ctrl->rxq.idx);
1775 * Get a Rx queue type.
1778 * Pointer to Ethernet device.
1783 * The Rx queue type.
1786 mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx)
1788 struct mlx5_priv *priv = dev->data->dev_private;
1789 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1791 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1792 rxq_ctrl = container_of((*priv->rxqs)[idx],
1793 struct mlx5_rxq_ctrl,
1795 return rxq_ctrl->type;
1797 return MLX5_RXQ_TYPE_UNDEFINED;
1801 * Get a Rx hairpin queue configuration.
1804 * Pointer to Ethernet device.
1809 * Pointer to the configuration if a hairpin RX queue, otherwise NULL.
1811 const struct rte_eth_hairpin_conf *
1812 mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)
1814 struct mlx5_priv *priv = dev->data->dev_private;
1815 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1817 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1818 rxq_ctrl = container_of((*priv->rxqs)[idx],
1819 struct mlx5_rxq_ctrl,
1821 if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
1822 return &rxq_ctrl->hairpin_conf;
1828 * Match queues listed in arguments to queues contained in indirection table
1832 * Pointer to indirection table to match.
1834 * Queues to match to ques in indirection table.
1836 * Number of queues in the array.
1839 * 1 if all queues in indirection table match 0 othrwise.
1842 mlx5_ind_table_obj_match_queues(const struct mlx5_ind_table_obj *ind_tbl,
1843 const uint16_t *queues, uint32_t queues_n)
1845 return (ind_tbl->queues_n == queues_n) &&
1846 (!memcmp(ind_tbl->queues, queues,
1847 ind_tbl->queues_n * sizeof(ind_tbl->queues[0])));
1851 * Get an indirection table.
1854 * Pointer to Ethernet device.
1856 * Queues entering in the indirection table.
1858 * Number of queues in the array.
1861 * An indirection table if found.
1863 struct mlx5_ind_table_obj *
1864 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
1867 struct mlx5_priv *priv = dev->data->dev_private;
1868 struct mlx5_ind_table_obj *ind_tbl;
1870 rte_rwlock_read_lock(&priv->ind_tbls_lock);
1871 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1872 if ((ind_tbl->queues_n == queues_n) &&
1873 (memcmp(ind_tbl->queues, queues,
1874 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1876 __atomic_fetch_add(&ind_tbl->refcnt, 1,
1881 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
1886 * Release an indirection table.
1889 * Pointer to Ethernet device.
1891 * Indirection table to release.
1893 * Indirection table for Standalone queue.
1896 * 1 while a reference on it exists, 0 when freed.
1899 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
1900 struct mlx5_ind_table_obj *ind_tbl,
1903 struct mlx5_priv *priv = dev->data->dev_private;
1904 unsigned int i, ret;
1906 rte_rwlock_write_lock(&priv->ind_tbls_lock);
1907 ret = __atomic_sub_fetch(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
1908 if (!ret && !standalone)
1909 LIST_REMOVE(ind_tbl, next);
1910 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
1913 priv->obj_ops.ind_table_destroy(ind_tbl);
1914 for (i = 0; i != ind_tbl->queues_n; ++i)
1915 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1921 * Verify the Rx Queue list is empty
1924 * Pointer to Ethernet device.
1927 * The number of object not released.
1930 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
1932 struct mlx5_priv *priv = dev->data->dev_private;
1933 struct mlx5_ind_table_obj *ind_tbl;
1936 rte_rwlock_read_lock(&priv->ind_tbls_lock);
1937 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1939 "port %u indirection table obj %p still referenced",
1940 dev->data->port_id, (void *)ind_tbl);
1943 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
1948 * Setup an indirection table structure fields.
1951 * Pointer to Ethernet device.
1953 * Indirection table to modify.
1956 * 0 on success, a negative errno value otherwise and rte_errno is set.
1959 mlx5_ind_table_obj_setup(struct rte_eth_dev *dev,
1960 struct mlx5_ind_table_obj *ind_tbl)
1962 struct mlx5_priv *priv = dev->data->dev_private;
1963 uint32_t queues_n = ind_tbl->queues_n;
1964 uint16_t *queues = ind_tbl->queues;
1967 const unsigned int n = rte_is_power_of_2(queues_n) ?
1968 log2above(queues_n) :
1969 log2above(priv->config.ind_table_max_size);
1971 for (i = 0; i != queues_n; ++i) {
1972 if (!mlx5_rxq_get(dev, queues[i])) {
1977 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
1980 __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
1984 for (j = 0; j < i; j++)
1985 mlx5_rxq_release(dev, ind_tbl->queues[j]);
1987 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
1988 dev->data->port_id);
1993 * Create an indirection table.
1996 * Pointer to Ethernet device.
1998 * Queues entering in the indirection table.
2000 * Number of queues in the array.
2002 * Indirection table for Standalone queue.
2005 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2007 static struct mlx5_ind_table_obj *
2008 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
2009 uint32_t queues_n, bool standalone)
2011 struct mlx5_priv *priv = dev->data->dev_private;
2012 struct mlx5_ind_table_obj *ind_tbl;
2015 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
2016 queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
2021 ind_tbl->queues_n = queues_n;
2022 ind_tbl->queues = (uint16_t *)(ind_tbl + 1);
2023 memcpy(ind_tbl->queues, queues, queues_n * sizeof(*queues));
2024 ret = mlx5_ind_table_obj_setup(dev, ind_tbl);
2030 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2031 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
2032 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2038 mlx5_ind_table_obj_check_standalone(struct rte_eth_dev *dev __rte_unused,
2039 struct mlx5_ind_table_obj *ind_tbl)
2043 refcnt = __atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED);
2047 * Modification of indirection tables having more than 1
2048 * reference is unsupported.
2051 "Port %u cannot modify indirection table %p (refcnt %u > 1).",
2052 dev->data->port_id, (void *)ind_tbl, refcnt);
2058 * Modify an indirection table.
2061 * Pointer to Ethernet device.
2063 * Indirection table to modify.
2065 * Queues replacement for the indirection table.
2067 * Number of queues in the array.
2069 * Indirection table for Standalone queue.
2072 * 0 on success, a negative errno value otherwise and rte_errno is set.
2075 mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,
2076 struct mlx5_ind_table_obj *ind_tbl,
2077 uint16_t *queues, const uint32_t queues_n,
2080 struct mlx5_priv *priv = dev->data->dev_private;
2083 const unsigned int n = rte_is_power_of_2(queues_n) ?
2084 log2above(queues_n) :
2085 log2above(priv->config.ind_table_max_size);
2087 MLX5_ASSERT(standalone);
2088 RTE_SET_USED(standalone);
2089 if (mlx5_ind_table_obj_check_standalone(dev, ind_tbl) < 0)
2091 for (i = 0; i != queues_n; ++i) {
2092 if (!mlx5_rxq_get(dev, queues[i])) {
2097 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2098 ret = priv->obj_ops.ind_table_modify(dev, n, queues, queues_n, ind_tbl);
2101 for (j = 0; j < ind_tbl->queues_n; j++)
2102 mlx5_rxq_release(dev, ind_tbl->queues[j]);
2103 ind_tbl->queues_n = queues_n;
2104 ind_tbl->queues = queues;
2108 for (j = 0; j < i; j++)
2109 mlx5_rxq_release(dev, queues[j]);
2111 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2112 dev->data->port_id);
2117 * Attach an indirection table to its queues.
2120 * Pointer to Ethernet device.
2122 * Indirection table to attach.
2125 * 0 on success, a negative errno value otherwise and rte_errno is set.
2128 mlx5_ind_table_obj_attach(struct rte_eth_dev *dev,
2129 struct mlx5_ind_table_obj *ind_tbl)
2134 ret = mlx5_ind_table_obj_modify(dev, ind_tbl, ind_tbl->queues,
2135 ind_tbl->queues_n, true);
2137 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2138 dev->data->port_id, (void *)ind_tbl);
2141 for (i = 0; i < ind_tbl->queues_n; i++)
2142 mlx5_rxq_get(dev, ind_tbl->queues[i]);
2147 * Detach an indirection table from its queues.
2150 * Pointer to Ethernet device.
2152 * Indirection table to detach.
2155 * 0 on success, a negative errno value otherwise and rte_errno is set.
2158 mlx5_ind_table_obj_detach(struct rte_eth_dev *dev,
2159 struct mlx5_ind_table_obj *ind_tbl)
2161 struct mlx5_priv *priv = dev->data->dev_private;
2162 const unsigned int n = rte_is_power_of_2(ind_tbl->queues_n) ?
2163 log2above(ind_tbl->queues_n) :
2164 log2above(priv->config.ind_table_max_size);
2168 ret = mlx5_ind_table_obj_check_standalone(dev, ind_tbl);
2171 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2172 ret = priv->obj_ops.ind_table_modify(dev, n, NULL, 0, ind_tbl);
2174 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2175 dev->data->port_id, (void *)ind_tbl);
2178 for (i = 0; i < ind_tbl->queues_n; i++)
2179 mlx5_rxq_release(dev, ind_tbl->queues[i]);
2184 mlx5_hrxq_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
2187 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2188 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2189 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2191 return (hrxq->rss_key_len != rss_desc->key_len ||
2192 memcmp(hrxq->rss_key, rss_desc->key, rss_desc->key_len) ||
2193 hrxq->hash_fields != rss_desc->hash_fields ||
2194 hrxq->ind_table->queues_n != rss_desc->queue_num ||
2195 memcmp(hrxq->ind_table->queues, rss_desc->queue,
2196 rss_desc->queue_num * sizeof(rss_desc->queue[0])));
2200 * Modify an Rx Hash queue configuration.
2203 * Pointer to Ethernet device.
2205 * Index to Hash Rx queue to modify.
2207 * RSS key for the Rx hash queue.
2208 * @param rss_key_len
2210 * @param hash_fields
2211 * Verbs protocol hash field to make the RSS on.
2213 * Queues entering in hash queue. In case of empty hash_fields only the
2214 * first queue index will be taken for the indirection table.
2219 * 0 on success, a negative errno value otherwise and rte_errno is set.
2222 mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hrxq_idx,
2223 const uint8_t *rss_key, uint32_t rss_key_len,
2224 uint64_t hash_fields,
2225 const uint16_t *queues, uint32_t queues_n)
2228 struct mlx5_ind_table_obj *ind_tbl = NULL;
2229 struct mlx5_priv *priv = dev->data->dev_private;
2230 struct mlx5_hrxq *hrxq =
2231 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2239 if (hrxq->rss_key_len != rss_key_len) {
2240 /* rss_key_len is fixed size 40 byte & not supposed to change */
2244 queues_n = hash_fields ? queues_n : 1;
2245 if (mlx5_ind_table_obj_match_queues(hrxq->ind_table,
2246 queues, queues_n)) {
2247 ind_tbl = hrxq->ind_table;
2249 if (hrxq->standalone) {
2251 * Replacement of indirection table unsupported for
2252 * stanalone hrxq objects (used by shared RSS).
2254 rte_errno = ENOTSUP;
2257 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2259 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2266 MLX5_ASSERT(priv->obj_ops.hrxq_modify);
2267 ret = priv->obj_ops.hrxq_modify(dev, hrxq, rss_key,
2268 hash_fields, ind_tbl);
2273 if (ind_tbl != hrxq->ind_table) {
2274 MLX5_ASSERT(!hrxq->standalone);
2275 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2277 hrxq->ind_table = ind_tbl;
2279 hrxq->hash_fields = hash_fields;
2280 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2284 if (ind_tbl != hrxq->ind_table) {
2285 MLX5_ASSERT(!hrxq->standalone);
2286 mlx5_ind_table_obj_release(dev, ind_tbl, hrxq->standalone);
2293 __mlx5_hrxq_remove(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
2295 struct mlx5_priv *priv = dev->data->dev_private;
2297 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2298 mlx5_glue->destroy_flow_action(hrxq->action);
2300 priv->obj_ops.hrxq_destroy(hrxq);
2301 if (!hrxq->standalone) {
2302 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2305 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2309 * Release the hash Rx queue.
2312 * Pointer to Ethernet device.
2314 * Index to Hash Rx queue to release.
2317 * mlx5 list pointer.
2319 * Hash queue entry pointer.
2322 mlx5_hrxq_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2324 struct rte_eth_dev *dev = tool_ctx;
2325 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2327 __mlx5_hrxq_remove(dev, hrxq);
2330 static struct mlx5_hrxq *
2331 __mlx5_hrxq_create(struct rte_eth_dev *dev,
2332 struct mlx5_flow_rss_desc *rss_desc)
2334 struct mlx5_priv *priv = dev->data->dev_private;
2335 const uint8_t *rss_key = rss_desc->key;
2336 uint32_t rss_key_len = rss_desc->key_len;
2337 bool standalone = !!rss_desc->shared_rss;
2338 const uint16_t *queues =
2339 standalone ? rss_desc->const_q : rss_desc->queue;
2340 uint32_t queues_n = rss_desc->queue_num;
2341 struct mlx5_hrxq *hrxq = NULL;
2342 uint32_t hrxq_idx = 0;
2343 struct mlx5_ind_table_obj *ind_tbl = rss_desc->ind_tbl;
2346 queues_n = rss_desc->hash_fields ? queues_n : 1;
2348 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2350 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2354 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2357 hrxq->standalone = standalone;
2358 hrxq->idx = hrxq_idx;
2359 hrxq->ind_table = ind_tbl;
2360 hrxq->rss_key_len = rss_key_len;
2361 hrxq->hash_fields = rss_desc->hash_fields;
2362 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2363 ret = priv->obj_ops.hrxq_new(dev, hrxq, rss_desc->tunnel);
2368 if (!rss_desc->ind_tbl)
2369 mlx5_ind_table_obj_release(dev, ind_tbl, standalone);
2371 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2375 struct mlx5_list_entry *
2376 mlx5_hrxq_create_cb(void *tool_ctx, void *cb_ctx)
2378 struct rte_eth_dev *dev = tool_ctx;
2379 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2380 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2381 struct mlx5_hrxq *hrxq;
2383 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2384 return hrxq ? &hrxq->entry : NULL;
2387 struct mlx5_list_entry *
2388 mlx5_hrxq_clone_cb(void *tool_ctx, struct mlx5_list_entry *entry,
2389 void *cb_ctx __rte_unused)
2391 struct rte_eth_dev *dev = tool_ctx;
2392 struct mlx5_priv *priv = dev->data->dev_private;
2393 struct mlx5_hrxq *hrxq;
2394 uint32_t hrxq_idx = 0;
2396 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2399 memcpy(hrxq, entry, sizeof(*hrxq) + MLX5_RSS_HASH_KEY_LEN);
2400 hrxq->idx = hrxq_idx;
2401 return &hrxq->entry;
2405 mlx5_hrxq_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2407 struct rte_eth_dev *dev = tool_ctx;
2408 struct mlx5_priv *priv = dev->data->dev_private;
2409 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2411 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2415 * Get an Rx Hash queue.
2418 * Pointer to Ethernet device.
2420 * RSS configuration for the Rx hash queue.
2423 * An hash Rx queue index on success.
2425 uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,
2426 struct mlx5_flow_rss_desc *rss_desc)
2428 struct mlx5_priv *priv = dev->data->dev_private;
2429 struct mlx5_hrxq *hrxq;
2430 struct mlx5_list_entry *entry;
2431 struct mlx5_flow_cb_ctx ctx = {
2435 if (rss_desc->shared_rss) {
2436 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2438 entry = mlx5_list_register(priv->hrxqs, &ctx);
2441 hrxq = container_of(entry, typeof(*hrxq), entry);
2449 * Release the hash Rx queue.
2452 * Pointer to Ethernet device.
2454 * Index to Hash Rx queue to release.
2457 * 1 while a reference on it exists, 0 when freed.
2459 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
2461 struct mlx5_priv *priv = dev->data->dev_private;
2462 struct mlx5_hrxq *hrxq;
2464 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2467 if (!hrxq->standalone)
2468 return mlx5_list_unregister(priv->hrxqs, &hrxq->entry);
2469 __mlx5_hrxq_remove(dev, hrxq);
2474 * Create a drop Rx Hash queue.
2477 * Pointer to Ethernet device.
2480 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2483 mlx5_drop_action_create(struct rte_eth_dev *dev)
2485 struct mlx5_priv *priv = dev->data->dev_private;
2486 struct mlx5_hrxq *hrxq = NULL;
2489 if (priv->drop_queue.hrxq)
2490 return priv->drop_queue.hrxq;
2491 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
2494 "Port %u cannot allocate memory for drop queue.",
2495 dev->data->port_id);
2499 priv->drop_queue.hrxq = hrxq;
2500 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
2502 if (!hrxq->ind_table) {
2506 ret = priv->obj_ops.drop_action_create(dev);
2512 if (hrxq->ind_table)
2513 mlx5_free(hrxq->ind_table);
2514 priv->drop_queue.hrxq = NULL;
2521 * Release a drop hash Rx queue.
2524 * Pointer to Ethernet device.
2527 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
2529 struct mlx5_priv *priv = dev->data->dev_private;
2530 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2532 if (!priv->drop_queue.hrxq)
2534 priv->obj_ops.drop_action_destroy(dev);
2535 mlx5_free(priv->drop_queue.rxq);
2536 mlx5_free(hrxq->ind_table);
2538 priv->drop_queue.rxq = NULL;
2539 priv->drop_queue.hrxq = NULL;
2543 * Verify the Rx Queue list is empty
2546 * Pointer to Ethernet device.
2549 * The number of object not released.
2552 mlx5_hrxq_verify(struct rte_eth_dev *dev)
2554 struct mlx5_priv *priv = dev->data->dev_private;
2556 return mlx5_list_get_entry_num(priv->hrxqs);
2560 * Set the Rx queue timestamp conversion parameters
2563 * Pointer to the Ethernet device structure.
2566 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
2568 struct mlx5_priv *priv = dev->data->dev_private;
2569 struct mlx5_dev_ctx_shared *sh = priv->sh;
2570 struct mlx5_rxq_data *data;
2573 for (i = 0; i != priv->rxqs_n; ++i) {
2574 if (!(*priv->rxqs)[i])
2576 data = (*priv->rxqs)[i];
2578 data->rt_timestamp = priv->config.rt_timestamp;