1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
24 #include <mlx5_common.h>
25 #include <mlx5_common_mr.h>
27 #include "mlx5_defs.h"
30 #include "mlx5_utils.h"
31 #include "mlx5_autoconf.h"
32 #include "mlx5_devx.h"
35 /* Default RSS hash key also used for ConnectX-3. */
36 uint8_t rss_hash_default_key[] = {
37 0x2c, 0xc6, 0x81, 0xd1,
38 0x5b, 0xdb, 0xf4, 0xf7,
39 0xfc, 0xa2, 0x83, 0x19,
40 0xdb, 0x1a, 0x3e, 0x94,
41 0x6b, 0x9e, 0x38, 0xd9,
42 0x2c, 0x9c, 0x03, 0xd1,
43 0xad, 0x99, 0x44, 0xa7,
44 0xd9, 0x56, 0x3d, 0x59,
45 0x06, 0x3c, 0x25, 0xf3,
46 0xfc, 0x1f, 0xdc, 0x2a,
49 /* Length of the default RSS hash key. */
50 static_assert(MLX5_RSS_HASH_KEY_LEN ==
51 (unsigned int)sizeof(rss_hash_default_key),
52 "wrong RSS default key size.");
55 * Calculate the number of CQEs in CQ for the Rx queue.
58 * Pointer to receive queue structure.
61 * Number of CQEs in CQ.
64 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
67 unsigned int wqe_n = 1 << rxq_data->elts_n;
69 if (mlx5_rxq_mprq_enabled(rxq_data))
70 cqe_n = wqe_n * RTE_BIT32(rxq_data->log_strd_num) - 1;
77 * Allocate RX queue elements for Multi-Packet RQ.
80 * Pointer to RX queue structure.
83 * 0 on success, a negative errno value otherwise and rte_errno is set.
86 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
88 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
89 unsigned int wqe_n = 1 << rxq->elts_n;
93 /* Iterate on segments. */
94 for (i = 0; i <= wqe_n; ++i) {
95 struct mlx5_mprq_buf *buf;
97 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
98 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
103 (*rxq->mprq_bufs)[i] = buf;
105 rxq->mprq_repl = buf;
108 "port %u MPRQ queue %u allocated and configured %u segments",
109 rxq->port_id, rxq->idx, wqe_n);
112 err = rte_errno; /* Save rte_errno before cleanup. */
114 for (i = 0; (i != wqe_n); ++i) {
115 if ((*rxq->mprq_bufs)[i] != NULL)
116 rte_mempool_put(rxq->mprq_mp,
117 (*rxq->mprq_bufs)[i]);
118 (*rxq->mprq_bufs)[i] = NULL;
120 DRV_LOG(DEBUG, "port %u MPRQ queue %u failed, freed everything",
121 rxq->port_id, rxq->idx);
122 rte_errno = err; /* Restore rte_errno. */
127 * Allocate RX queue elements for Single-Packet RQ.
130 * Pointer to RX queue structure.
133 * 0 on success, negative errno value on failure.
136 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
138 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
139 unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
140 RTE_BIT32(rxq_ctrl->rxq.elts_n) *
141 RTE_BIT32(rxq_ctrl->rxq.log_strd_num) :
142 RTE_BIT32(rxq_ctrl->rxq.elts_n);
143 bool has_vec_support = mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0;
147 /* Iterate on segments. */
148 for (i = 0; (i != elts_n); ++i) {
149 struct mlx5_eth_rxseg *seg = &rxq_ctrl->rxq.rxseg[i % sges_n];
150 struct rte_mbuf *buf;
152 buf = rte_pktmbuf_alloc(seg->mp);
154 if (rxq_ctrl->share_group == 0)
155 DRV_LOG(ERR, "port %u queue %u empty mbuf pool",
156 RXQ_PORT_ID(rxq_ctrl),
159 DRV_LOG(ERR, "share group %u queue %u empty mbuf pool",
160 rxq_ctrl->share_group,
161 rxq_ctrl->share_qid);
165 /* Only vectored Rx routines rely on headroom size. */
166 MLX5_ASSERT(!has_vec_support ||
167 DATA_OFF(buf) >= RTE_PKTMBUF_HEADROOM);
168 /* Buffer is supposed to be empty. */
169 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
170 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
171 MLX5_ASSERT(!buf->next);
172 SET_DATA_OFF(buf, seg->offset);
173 PORT(buf) = rxq_ctrl->rxq.port_id;
174 DATA_LEN(buf) = seg->length;
175 PKT_LEN(buf) = seg->length;
177 (*rxq_ctrl->rxq.elts)[i] = buf;
179 /* If Rx vector is activated. */
180 if (has_vec_support) {
181 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
182 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
183 struct rte_pktmbuf_pool_private *priv =
184 (struct rte_pktmbuf_pool_private *)
185 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
188 /* Initialize default rearm_data for vPMD. */
189 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
190 rte_mbuf_refcnt_set(mbuf_init, 1);
191 mbuf_init->nb_segs = 1;
192 /* For shared queues port is provided in CQE */
193 mbuf_init->port = rxq->shared ? 0 : rxq->port_id;
194 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
195 mbuf_init->ol_flags = RTE_MBUF_F_EXTERNAL;
197 * prevent compiler reordering:
198 * rearm_data covers previous fields.
200 rte_compiler_barrier();
201 rxq->mbuf_initializer =
202 *(rte_xmm_t *)&mbuf_init->rearm_data;
203 /* Padding with a fake mbuf for vectorized Rx. */
204 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
205 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
207 if (rxq_ctrl->share_group == 0)
209 "port %u SPRQ queue %u allocated and configured %u segments (max %u packets)",
210 RXQ_PORT_ID(rxq_ctrl), rxq_ctrl->rxq.idx, elts_n,
211 elts_n / (1 << rxq_ctrl->rxq.sges_n));
214 "share group %u SPRQ queue %u allocated and configured %u segments (max %u packets)",
215 rxq_ctrl->share_group, rxq_ctrl->share_qid, elts_n,
216 elts_n / (1 << rxq_ctrl->rxq.sges_n));
219 err = rte_errno; /* Save rte_errno before cleanup. */
221 for (i = 0; (i != elts_n); ++i) {
222 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
223 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
224 (*rxq_ctrl->rxq.elts)[i] = NULL;
226 if (rxq_ctrl->share_group == 0)
227 DRV_LOG(DEBUG, "port %u SPRQ queue %u failed, freed everything",
228 RXQ_PORT_ID(rxq_ctrl), rxq_ctrl->rxq.idx);
230 DRV_LOG(DEBUG, "share group %u SPRQ queue %u failed, freed everything",
231 rxq_ctrl->share_group, rxq_ctrl->share_qid);
232 rte_errno = err; /* Restore rte_errno. */
237 * Allocate RX queue elements.
240 * Pointer to RX queue structure.
243 * 0 on success, negative errno value on failure.
246 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
251 * For MPRQ we need to allocate both MPRQ buffers
252 * for WQEs and simple mbufs for vector processing.
254 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
255 ret = rxq_alloc_elts_mprq(rxq_ctrl);
257 ret = rxq_alloc_elts_sprq(rxq_ctrl);
262 * Free RX queue elements for Multi-Packet RQ.
265 * Pointer to RX queue structure.
268 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
270 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
273 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing %d WRs",
274 rxq->port_id, rxq->idx, (1u << rxq->elts_n));
275 if (rxq->mprq_bufs == NULL)
277 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
278 if ((*rxq->mprq_bufs)[i] != NULL)
279 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
280 (*rxq->mprq_bufs)[i] = NULL;
282 if (rxq->mprq_repl != NULL) {
283 mlx5_mprq_buf_free(rxq->mprq_repl);
284 rxq->mprq_repl = NULL;
289 * Free RX queue elements for Single-Packet RQ.
292 * Pointer to RX queue structure.
295 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
297 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
298 const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
299 RTE_BIT32(rxq->elts_n) * RTE_BIT32(rxq->log_strd_num) :
300 RTE_BIT32(rxq->elts_n);
301 const uint16_t q_mask = q_n - 1;
302 uint16_t elts_ci = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
303 rxq->elts_ci : rxq->rq_ci;
304 uint16_t used = q_n - (elts_ci - rxq->rq_pi);
307 if (rxq_ctrl->share_group == 0)
308 DRV_LOG(DEBUG, "port %u Rx queue %u freeing %d WRs",
309 RXQ_PORT_ID(rxq_ctrl), rxq->idx, q_n);
311 DRV_LOG(DEBUG, "share group %u Rx queue %u freeing %d WRs",
312 rxq_ctrl->share_group, rxq_ctrl->share_qid, q_n);
313 if (rxq->elts == NULL)
316 * Some mbuf in the Ring belongs to the application.
317 * They cannot be freed.
319 if (mlx5_rxq_check_vec_support(rxq) > 0) {
320 for (i = 0; i < used; ++i)
321 (*rxq->elts)[(elts_ci + i) & q_mask] = NULL;
322 rxq->rq_pi = elts_ci;
324 for (i = 0; i != q_n; ++i) {
325 if ((*rxq->elts)[i] != NULL)
326 rte_pktmbuf_free_seg((*rxq->elts)[i]);
327 (*rxq->elts)[i] = NULL;
332 * Free RX queue elements.
335 * Pointer to RX queue structure.
338 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
341 * For MPRQ we need to allocate both MPRQ buffers
342 * for WQEs and simple mbufs for vector processing.
344 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
345 rxq_free_elts_mprq(rxq_ctrl);
346 rxq_free_elts_sprq(rxq_ctrl);
350 * Returns the per-queue supported offloads.
353 * Pointer to Ethernet device.
356 * Supported Rx offloads.
359 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
361 struct mlx5_priv *priv = dev->data->dev_private;
362 struct mlx5_dev_config *config = &priv->config;
363 uint64_t offloads = (RTE_ETH_RX_OFFLOAD_SCATTER |
364 RTE_ETH_RX_OFFLOAD_TIMESTAMP |
365 RTE_ETH_RX_OFFLOAD_RSS_HASH);
367 if (!config->mprq.enabled)
368 offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
369 if (config->hw_fcs_strip)
370 offloads |= RTE_ETH_RX_OFFLOAD_KEEP_CRC;
372 offloads |= (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
373 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
374 RTE_ETH_RX_OFFLOAD_TCP_CKSUM);
375 if (config->hw_vlan_strip)
376 offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
377 if (MLX5_LRO_SUPPORTED(dev))
378 offloads |= RTE_ETH_RX_OFFLOAD_TCP_LRO;
384 * Returns the per-port supported offloads.
387 * Supported Rx offloads.
390 mlx5_get_rx_port_offloads(void)
392 uint64_t offloads = RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
398 * Verify if the queue can be released.
401 * Pointer to Ethernet device.
406 * 1 if the queue can be released
407 * 0 if the queue can not be released, there are references to it.
408 * Negative errno and rte_errno is set if queue doesn't exist.
411 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
413 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
419 return (__atomic_load_n(&rxq->refcnt, __ATOMIC_RELAXED) == 1);
422 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
424 rxq_sync_cq(struct mlx5_rxq_data *rxq)
426 const uint16_t cqe_n = 1 << rxq->cqe_n;
427 const uint16_t cqe_mask = cqe_n - 1;
428 volatile struct mlx5_cqe *cqe;
433 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
434 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
435 if (ret == MLX5_CQE_STATUS_HW_OWN)
437 if (ret == MLX5_CQE_STATUS_ERR) {
441 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
442 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
446 /* Compute the next non compressed CQE. */
447 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
450 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
451 for (i = 0; i < cqe_n; i++) {
452 cqe = &(*rxq->cqes)[i];
453 cqe->op_own = MLX5_CQE_INVALIDATE;
455 /* Resync CQE and WQE (WQ in RESET state). */
457 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
459 *rxq->rq_db = rte_cpu_to_be_32(0);
464 * Rx queue stop. Device queue goes to the RESET state,
465 * all involved mbufs are freed from WQ.
468 * Pointer to Ethernet device structure.
473 * 0 on success, a negative errno value otherwise and rte_errno is set.
476 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
478 struct mlx5_priv *priv = dev->data->dev_private;
479 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
480 struct mlx5_rxq_ctrl *rxq_ctrl = rxq->ctrl;
483 MLX5_ASSERT(rxq != NULL && rxq_ctrl != NULL);
484 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
485 ret = priv->obj_ops.rxq_obj_modify(rxq, MLX5_RXQ_MOD_RDY2RST);
487 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
492 /* Remove all processes CQEs. */
493 rxq_sync_cq(&rxq_ctrl->rxq);
494 /* Free all involved mbufs. */
495 rxq_free_elts(rxq_ctrl);
496 /* Set the actual queue state. */
497 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
502 * Rx queue stop. Device queue goes to the RESET state,
503 * all involved mbufs are freed from WQ.
506 * Pointer to Ethernet device structure.
511 * 0 on success, a negative errno value otherwise and rte_errno is set.
514 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
516 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
519 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
520 DRV_LOG(ERR, "Hairpin queue can't be stopped");
524 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
527 * Vectorized Rx burst requires the CQ and RQ indices
528 * synchronized, that might be broken on RQ restart
529 * and cause Rx malfunction, so queue stopping is
530 * not supported if vectorized Rx burst is engaged.
531 * The routine pointer depends on the process
532 * type, should perform check there.
534 if (pkt_burst == mlx5_rx_burst_vec) {
535 DRV_LOG(ERR, "Rx queue stop is not supported "
536 "for vectorized Rx");
540 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
541 ret = mlx5_mp_os_req_queue_control(dev, idx,
542 MLX5_MP_REQ_QUEUE_RX_STOP);
544 ret = mlx5_rx_queue_stop_primary(dev, idx);
550 * Rx queue start. Device queue goes to the ready state,
551 * all required mbufs are allocated and WQ is replenished.
554 * Pointer to Ethernet device structure.
559 * 0 on success, a negative errno value otherwise and rte_errno is set.
562 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
564 struct mlx5_priv *priv = dev->data->dev_private;
565 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
566 struct mlx5_rxq_data *rxq_data = &rxq->ctrl->rxq;
569 MLX5_ASSERT(rxq != NULL && rxq->ctrl != NULL);
570 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
571 /* Allocate needed buffers. */
572 ret = rxq_alloc_elts(rxq->ctrl);
574 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
579 *rxq_data->cq_db = rte_cpu_to_be_32(rxq_data->cq_ci);
581 /* Reset RQ consumer before moving queue to READY state. */
582 *rxq_data->rq_db = rte_cpu_to_be_32(0);
584 ret = priv->obj_ops.rxq_obj_modify(rxq, MLX5_RXQ_MOD_RST2RDY);
586 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
591 /* Reinitialize RQ - set WQEs. */
592 mlx5_rxq_initialize(rxq_data);
593 rxq_data->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
594 /* Set actual queue state. */
595 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
600 * Rx queue start. Device queue goes to the ready state,
601 * all required mbufs are allocated and WQ is replenished.
604 * Pointer to Ethernet device structure.
609 * 0 on success, a negative errno value otherwise and rte_errno is set.
612 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
616 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
617 DRV_LOG(ERR, "Hairpin queue can't be started");
621 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
623 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
624 ret = mlx5_mp_os_req_queue_control(dev, idx,
625 MLX5_MP_REQ_QUEUE_RX_START);
627 ret = mlx5_rx_queue_start_primary(dev, idx);
633 * Rx queue presetup checks.
636 * Pointer to Ethernet device structure.
640 * Number of descriptors to configure in queue.
641 * @param[out] rxq_ctrl
642 * Address of pointer to shared Rx queue control.
645 * 0 on success, a negative errno value otherwise and rte_errno is set.
648 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc,
649 struct mlx5_rxq_ctrl **rxq_ctrl)
651 struct mlx5_priv *priv = dev->data->dev_private;
652 struct mlx5_rxq_priv *rxq;
655 if (!rte_is_power_of_2(*desc)) {
656 *desc = 1 << log2above(*desc);
658 "port %u increased number of descriptors in Rx queue %u"
659 " to the next power of two (%d)",
660 dev->data->port_id, idx, *desc);
662 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
663 dev->data->port_id, idx, *desc);
664 if (idx >= priv->rxqs_n) {
665 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
666 dev->data->port_id, idx, priv->rxqs_n);
667 rte_errno = EOVERFLOW;
670 if (rxq_ctrl == NULL || *rxq_ctrl == NULL)
672 if (!(*rxq_ctrl)->rxq.shared) {
673 if (!mlx5_rxq_releasable(dev, idx)) {
674 DRV_LOG(ERR, "port %u unable to release queue index %u",
675 dev->data->port_id, idx);
679 mlx5_rxq_release(dev, idx);
681 if ((*rxq_ctrl)->obj != NULL)
682 /* Some port using shared Rx queue has been started. */
684 /* Release all owner RxQ to reconfigure Shared RxQ. */
686 rxq = LIST_FIRST(&(*rxq_ctrl)->owners);
687 LIST_REMOVE(rxq, owner_entry);
688 empty = LIST_EMPTY(&(*rxq_ctrl)->owners);
689 mlx5_rxq_release(ETH_DEV(rxq->priv), rxq->idx);
697 * Get the shared Rx queue object that matches group and queue index.
700 * Pointer to Ethernet device structure.
704 * Shared RX queue index.
707 * Shared RXQ object that matching, or NULL if not found.
709 static struct mlx5_rxq_ctrl *
710 mlx5_shared_rxq_get(struct rte_eth_dev *dev, uint32_t group, uint16_t share_qid)
712 struct mlx5_rxq_ctrl *rxq_ctrl;
713 struct mlx5_priv *priv = dev->data->dev_private;
715 LIST_FOREACH(rxq_ctrl, &priv->sh->shared_rxqs, share_entry) {
716 if (rxq_ctrl->share_group == group &&
717 rxq_ctrl->share_qid == share_qid)
724 * Check whether requested Rx queue configuration matches shared RXQ.
727 * Pointer to shared RXQ.
729 * Pointer to Ethernet device structure.
733 * Number of descriptors to configure in queue.
735 * NUMA socket on which memory must be allocated.
737 * Thresholds parameters.
739 * Memory pool for buffer allocations.
742 * 0 on success, a negative errno value otherwise and rte_errno is set.
745 mlx5_shared_rxq_match(struct mlx5_rxq_ctrl *rxq_ctrl, struct rte_eth_dev *dev,
746 uint16_t idx, uint16_t desc, unsigned int socket,
747 const struct rte_eth_rxconf *conf,
748 struct rte_mempool *mp)
750 struct mlx5_priv *spriv = LIST_FIRST(&rxq_ctrl->owners)->priv;
751 struct mlx5_priv *priv = dev->data->dev_private;
755 if (rxq_ctrl->socket != socket) {
756 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: socket mismatch",
757 dev->data->port_id, idx);
760 if (rxq_ctrl->rxq.elts_n != log2above(desc)) {
761 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: descriptor number mismatch",
762 dev->data->port_id, idx);
765 if (priv->mtu != spriv->mtu) {
766 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: mtu mismatch",
767 dev->data->port_id, idx);
770 if (priv->dev_data->dev_conf.intr_conf.rxq !=
771 spriv->dev_data->dev_conf.intr_conf.rxq) {
772 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: interrupt mismatch",
773 dev->data->port_id, idx);
776 if (mp != NULL && rxq_ctrl->rxq.mp != mp) {
777 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: mempool mismatch",
778 dev->data->port_id, idx);
780 } else if (mp == NULL) {
781 if (conf->rx_nseg != rxq_ctrl->rxseg_n) {
782 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: segment number mismatch",
783 dev->data->port_id, idx);
786 for (i = 0; i < conf->rx_nseg; i++) {
787 if (memcmp(&conf->rx_seg[i].split, &rxq_ctrl->rxseg[i],
788 sizeof(struct rte_eth_rxseg_split))) {
789 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: segment %u configuration mismatch",
790 dev->data->port_id, idx, i);
795 if (priv->config.hw_padding != spriv->config.hw_padding) {
796 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: padding mismatch",
797 dev->data->port_id, idx);
800 if (priv->config.cqe_comp != spriv->config.cqe_comp ||
801 (priv->config.cqe_comp &&
802 priv->config.cqe_comp_fmt != spriv->config.cqe_comp_fmt)) {
803 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: CQE compression mismatch",
804 dev->data->port_id, idx);
813 * Pointer to Ethernet device structure.
817 * Number of descriptors to configure in queue.
819 * NUMA socket on which memory must be allocated.
821 * Thresholds parameters.
823 * Memory pool for buffer allocations.
826 * 0 on success, a negative errno value otherwise and rte_errno is set.
829 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
830 unsigned int socket, const struct rte_eth_rxconf *conf,
831 struct rte_mempool *mp)
833 struct mlx5_priv *priv = dev->data->dev_private;
834 struct mlx5_rxq_priv *rxq;
835 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
836 struct rte_eth_rxseg_split *rx_seg =
837 (struct rte_eth_rxseg_split *)conf->rx_seg;
838 struct rte_eth_rxseg_split rx_single = {.mp = mp};
839 uint16_t n_seg = conf->rx_nseg;
841 uint64_t offloads = conf->offloads |
842 dev->data->dev_conf.rxmode.offloads;
846 * The parameters should be checked on rte_eth_dev layer.
847 * If mp is specified it means the compatible configuration
848 * without buffer split feature tuning.
854 /* The offloads should be checked on rte_eth_dev layer. */
855 MLX5_ASSERT(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
856 if (!(offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) {
857 DRV_LOG(ERR, "port %u queue index %u split "
858 "offload not configured",
859 dev->data->port_id, idx);
863 MLX5_ASSERT(n_seg < MLX5_MAX_RXQ_NSEG);
865 if (conf->share_group > 0) {
866 if (!priv->config.hca_attr.mem_rq_rmp) {
867 DRV_LOG(ERR, "port %u queue index %u shared Rx queue not supported by fw",
868 dev->data->port_id, idx);
872 if (priv->obj_ops.rxq_obj_new != devx_obj_ops.rxq_obj_new) {
873 DRV_LOG(ERR, "port %u queue index %u shared Rx queue needs DevX api",
874 dev->data->port_id, idx);
878 if (conf->share_qid >= priv->rxqs_n) {
879 DRV_LOG(ERR, "port %u shared Rx queue index %u > number of Rx queues %u",
880 dev->data->port_id, conf->share_qid,
885 if (priv->config.mprq.enabled) {
886 DRV_LOG(ERR, "port %u shared Rx queue index %u: not supported when MPRQ enabled",
887 dev->data->port_id, conf->share_qid);
891 /* Try to reuse shared RXQ. */
892 rxq_ctrl = mlx5_shared_rxq_get(dev, conf->share_group,
894 if (rxq_ctrl != NULL &&
895 !mlx5_shared_rxq_match(rxq_ctrl, dev, idx, desc, socket,
901 res = mlx5_rx_queue_pre_setup(dev, idx, &desc, &rxq_ctrl);
905 rxq = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*rxq), 0,
908 DRV_LOG(ERR, "port %u unable to allocate rx queue index %u private data",
909 dev->data->port_id, idx);
915 (*priv->rxq_privs)[idx] = rxq;
916 if (rxq_ctrl != NULL) {
917 /* Join owner list. */
918 LIST_INSERT_HEAD(&rxq_ctrl->owners, rxq, owner_entry);
919 rxq->ctrl = rxq_ctrl;
921 rxq_ctrl = mlx5_rxq_new(dev, rxq, desc, socket, conf, rx_seg,
923 if (rxq_ctrl == NULL) {
924 DRV_LOG(ERR, "port %u unable to allocate rx queue index %u",
925 dev->data->port_id, idx);
927 (*priv->rxq_privs)[idx] = NULL;
932 mlx5_rxq_ref(dev, idx);
933 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
934 dev->data->port_id, idx);
935 dev->data->rx_queues[idx] = &rxq_ctrl->rxq;
942 * Pointer to Ethernet device structure.
946 * Number of descriptors to configure in queue.
947 * @param hairpin_conf
948 * Hairpin configuration parameters.
951 * 0 on success, a negative errno value otherwise and rte_errno is set.
954 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
956 const struct rte_eth_hairpin_conf *hairpin_conf)
958 struct mlx5_priv *priv = dev->data->dev_private;
959 struct mlx5_rxq_priv *rxq;
960 struct mlx5_rxq_ctrl *rxq_ctrl;
963 res = mlx5_rx_queue_pre_setup(dev, idx, &desc, NULL);
966 if (hairpin_conf->peer_count != 1) {
968 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue index %u"
969 " peer count is %u", dev->data->port_id,
970 idx, hairpin_conf->peer_count);
973 if (hairpin_conf->peers[0].port == dev->data->port_id) {
974 if (hairpin_conf->peers[0].queue >= priv->txqs_n) {
976 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
977 " index %u, Tx %u is larger than %u",
978 dev->data->port_id, idx,
979 hairpin_conf->peers[0].queue, priv->txqs_n);
983 if (hairpin_conf->manual_bind == 0 ||
984 hairpin_conf->tx_explicit == 0) {
986 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
987 " index %u peer port %u with attributes %u %u",
988 dev->data->port_id, idx,
989 hairpin_conf->peers[0].port,
990 hairpin_conf->manual_bind,
991 hairpin_conf->tx_explicit);
995 rxq = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*rxq), 0,
998 DRV_LOG(ERR, "port %u unable to allocate hairpin rx queue index %u private data",
999 dev->data->port_id, idx);
1005 (*priv->rxq_privs)[idx] = rxq;
1006 rxq_ctrl = mlx5_rxq_hairpin_new(dev, rxq, desc, hairpin_conf);
1008 DRV_LOG(ERR, "port %u unable to allocate hairpin queue index %u",
1009 dev->data->port_id, idx);
1011 (*priv->rxq_privs)[idx] = NULL;
1015 DRV_LOG(DEBUG, "port %u adding hairpin Rx queue %u to list",
1016 dev->data->port_id, idx);
1017 dev->data->rx_queues[idx] = &rxq_ctrl->rxq;
1022 * DPDK callback to release a RX queue.
1025 * Pointer to Ethernet device structure.
1027 * Receive queue index.
1030 mlx5_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
1032 struct mlx5_rxq_data *rxq = dev->data->rx_queues[qid];
1036 if (!mlx5_rxq_releasable(dev, qid))
1037 rte_panic("port %u Rx queue %u is still used by a flow and"
1038 " cannot be removed\n", dev->data->port_id, qid);
1039 mlx5_rxq_release(dev, qid);
1043 * Allocate queue vector and fill epoll fd list for Rx interrupts.
1046 * Pointer to Ethernet device.
1049 * 0 on success, a negative errno value otherwise and rte_errno is set.
1052 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
1054 struct mlx5_priv *priv = dev->data->dev_private;
1056 unsigned int rxqs_n = priv->rxqs_n;
1057 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
1058 unsigned int count = 0;
1059 struct rte_intr_handle *intr_handle = dev->intr_handle;
1061 if (!dev->data->dev_conf.intr_conf.rxq)
1063 mlx5_rx_intr_vec_disable(dev);
1064 if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
1066 "port %u failed to allocate memory for interrupt"
1067 " vector, Rx interrupts will not be supported",
1068 dev->data->port_id);
1073 if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))
1076 for (i = 0; i != n; ++i) {
1077 /* This rxq obj must not be released in this function. */
1078 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1079 struct mlx5_rxq_obj *rxq_obj = rxq ? rxq->ctrl->obj : NULL;
1082 /* Skip queues that cannot request interrupts. */
1083 if (!rxq_obj || (!rxq_obj->ibv_channel &&
1084 !rxq_obj->devx_channel)) {
1085 /* Use invalid intr_vec[] index to disable entry. */
1086 if (rte_intr_vec_list_index_set(intr_handle, i,
1087 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
1091 mlx5_rxq_ref(dev, i);
1092 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
1094 "port %u too many Rx queues for interrupt"
1095 " vector size (%d), Rx interrupts cannot be"
1097 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
1098 mlx5_rx_intr_vec_disable(dev);
1102 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
1106 "port %u failed to make Rx interrupt file"
1107 " descriptor %d non-blocking for queue index"
1109 dev->data->port_id, rxq_obj->fd, i);
1110 mlx5_rx_intr_vec_disable(dev);
1114 if (rte_intr_vec_list_index_set(intr_handle, i,
1115 RTE_INTR_VEC_RXTX_OFFSET + count))
1117 if (rte_intr_efds_index_set(intr_handle, count,
1123 mlx5_rx_intr_vec_disable(dev);
1124 else if (rte_intr_nb_efd_set(intr_handle, count))
1130 * Clean up Rx interrupts handler.
1133 * Pointer to Ethernet device.
1136 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
1138 struct mlx5_priv *priv = dev->data->dev_private;
1139 struct rte_intr_handle *intr_handle = dev->intr_handle;
1141 unsigned int rxqs_n = priv->rxqs_n;
1142 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
1144 if (!dev->data->dev_conf.intr_conf.rxq)
1146 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0)
1148 for (i = 0; i != n; ++i) {
1149 if (rte_intr_vec_list_index_get(intr_handle, i) ==
1150 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID)
1153 * Need to access directly the queue to release the reference
1154 * kept in mlx5_rx_intr_vec_enable().
1156 mlx5_rxq_deref(dev, i);
1159 rte_intr_free_epoll_fd(intr_handle);
1161 rte_intr_vec_list_free(intr_handle);
1163 rte_intr_nb_efd_set(intr_handle, 0);
1167 * MLX5 CQ notification .
1170 * Pointer to receive queue structure.
1172 * Sequence number per receive queue .
1175 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
1178 uint32_t doorbell_hi;
1181 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
1182 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
1183 doorbell = (uint64_t)doorbell_hi << 32;
1184 doorbell |= rxq->cqn;
1185 mlx5_doorbell_ring(&rxq->uar_data, rte_cpu_to_be_64(doorbell),
1186 doorbell_hi, &rxq->cq_db[MLX5_CQ_ARM_DB], 0);
1190 * DPDK callback for Rx queue interrupt enable.
1193 * Pointer to Ethernet device structure.
1194 * @param rx_queue_id
1198 * 0 on success, a negative errno value otherwise and rte_errno is set.
1201 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1203 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, rx_queue_id);
1206 if (rxq->ctrl->irq) {
1207 if (!rxq->ctrl->obj)
1209 mlx5_arm_cq(&rxq->ctrl->rxq, rxq->ctrl->rxq.cq_arm_sn);
1218 * DPDK callback for Rx queue interrupt disable.
1221 * Pointer to Ethernet device structure.
1222 * @param rx_queue_id
1226 * 0 on success, a negative errno value otherwise and rte_errno is set.
1229 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1231 struct mlx5_priv *priv = dev->data->dev_private;
1232 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, rx_queue_id);
1239 if (!rxq->ctrl->obj)
1241 if (rxq->ctrl->irq) {
1242 ret = priv->obj_ops.rxq_event_get(rxq->ctrl->obj);
1245 rxq->ctrl->rxq.cq_arm_sn++;
1250 * The ret variable may be EAGAIN which means the get_event function was
1251 * called before receiving one.
1257 if (rte_errno != EAGAIN)
1258 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1259 dev->data->port_id, rx_queue_id);
1264 * Verify the Rx queue objects list is empty
1267 * Pointer to Ethernet device.
1270 * The number of objects not released.
1273 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1275 struct mlx5_priv *priv = dev->data->dev_private;
1277 struct mlx5_rxq_obj *rxq_obj;
1279 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1280 if (rxq_obj->rxq_ctrl == NULL)
1282 if (rxq_obj->rxq_ctrl->rxq.shared &&
1283 !LIST_EMPTY(&rxq_obj->rxq_ctrl->owners))
1285 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1286 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1293 * Callback function to initialize mbufs for Multi-Packet RQ.
1296 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1297 void *_m, unsigned int i __rte_unused)
1299 struct mlx5_mprq_buf *buf = _m;
1300 struct rte_mbuf_ext_shared_info *shinfo;
1301 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1304 memset(_m, 0, sizeof(*buf));
1306 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1307 for (j = 0; j != strd_n; ++j) {
1308 shinfo = &buf->shinfos[j];
1309 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1310 shinfo->fcb_opaque = buf;
1315 * Free mempool of Multi-Packet RQ.
1318 * Pointer to Ethernet device.
1321 * 0 on success, negative errno value on failure.
1324 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1326 struct mlx5_priv *priv = dev->data->dev_private;
1327 struct rte_mempool *mp = priv->mprq_mp;
1332 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1333 dev->data->port_id, mp->name);
1335 * If a buffer in the pool has been externally attached to a mbuf and it
1336 * is still in use by application, destroying the Rx queue can spoil
1337 * the packet. It is unlikely to happen but if application dynamically
1338 * creates and destroys with holding Rx packets, this can happen.
1340 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1341 * RQ isn't provided by application but managed by PMD.
1343 if (!rte_mempool_full(mp)) {
1345 "port %u mempool for Multi-Packet RQ is still in use",
1346 dev->data->port_id);
1350 rte_mempool_free(mp);
1351 /* Unset mempool for each Rx queue. */
1352 for (i = 0; i != priv->rxqs_n; ++i) {
1353 struct mlx5_rxq_data *rxq = mlx5_rxq_data_get(dev, i);
1357 rxq->mprq_mp = NULL;
1359 priv->mprq_mp = NULL;
1364 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1365 * mempool. If already allocated, reuse it if there're enough elements.
1366 * Otherwise, resize it.
1369 * Pointer to Ethernet device.
1372 * 0 on success, negative errno value on failure.
1375 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1377 struct mlx5_priv *priv = dev->data->dev_private;
1378 struct rte_mempool *mp = priv->mprq_mp;
1379 char name[RTE_MEMPOOL_NAMESIZE];
1380 unsigned int desc = 0;
1381 unsigned int buf_len;
1382 unsigned int obj_num;
1383 unsigned int obj_size;
1384 unsigned int log_strd_num = 0;
1385 unsigned int log_strd_sz = 0;
1387 unsigned int n_ibv = 0;
1390 if (!mlx5_mprq_enabled(dev))
1392 /* Count the total number of descriptors configured. */
1393 for (i = 0; i != priv->rxqs_n; ++i) {
1394 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
1395 struct mlx5_rxq_data *rxq;
1397 if (rxq_ctrl == NULL ||
1398 rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1400 rxq = &rxq_ctrl->rxq;
1402 desc += 1 << rxq->elts_n;
1403 /* Get the max number of strides. */
1404 if (log_strd_num < rxq->log_strd_num)
1405 log_strd_num = rxq->log_strd_num;
1406 /* Get the max size of a stride. */
1407 if (log_strd_sz < rxq->log_strd_sz)
1408 log_strd_sz = rxq->log_strd_sz;
1410 MLX5_ASSERT(log_strd_num && log_strd_sz);
1411 buf_len = RTE_BIT32(log_strd_num) * RTE_BIT32(log_strd_sz);
1412 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len +
1413 RTE_BIT32(log_strd_num) *
1414 sizeof(struct rte_mbuf_ext_shared_info) +
1415 RTE_PKTMBUF_HEADROOM;
1417 * Received packets can be either memcpy'd or externally referenced. In
1418 * case that the packet is attached to an mbuf as an external buffer, as
1419 * it isn't possible to predict how the buffers will be queued by
1420 * application, there's no option to exactly pre-allocate needed buffers
1421 * in advance but to speculatively prepares enough buffers.
1423 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1424 * received packets to buffers provided by application (rxq->mp) until
1425 * this Mempool gets available again.
1428 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1430 * rte_mempool_create_empty() has sanity check to refuse large cache
1431 * size compared to the number of elements.
1432 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1433 * constant number 2 instead.
1435 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1436 /* Check a mempool is already allocated and if it can be resued. */
1437 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1438 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1439 dev->data->port_id, mp->name);
1442 } else if (mp != NULL) {
1443 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1444 dev->data->port_id, mp->name);
1446 * If failed to free, which means it may be still in use, no way
1447 * but to keep using the existing one. On buffer underrun,
1448 * packets will be memcpy'd instead of external buffer
1451 if (mlx5_mprq_free_mp(dev)) {
1452 if (mp->elt_size >= obj_size)
1458 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1459 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1460 0, NULL, NULL, mlx5_mprq_buf_init,
1461 (void *)((uintptr_t)1 << log_strd_num),
1462 dev->device->numa_node, 0);
1465 "port %u failed to allocate a mempool for"
1466 " Multi-Packet RQ, count=%u, size=%u",
1467 dev->data->port_id, obj_num, obj_size);
1471 ret = mlx5_mr_mempool_register(priv->sh->cdev, mp, false);
1472 if (ret < 0 && rte_errno != EEXIST) {
1474 DRV_LOG(ERR, "port %u failed to register a mempool for Multi-Packet RQ",
1475 dev->data->port_id);
1476 rte_mempool_free(mp);
1482 /* Set mempool for each Rx queue. */
1483 for (i = 0; i != priv->rxqs_n; ++i) {
1484 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
1486 if (rxq_ctrl == NULL ||
1487 rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1489 rxq_ctrl->rxq.mprq_mp = mp;
1491 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1492 dev->data->port_id);
1496 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1497 sizeof(struct rte_vlan_hdr) * 2 + \
1498 sizeof(struct rte_ipv6_hdr)))
1499 #define MAX_TCP_OPTION_SIZE 40u
1500 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1501 sizeof(struct rte_tcp_hdr) + \
1502 MAX_TCP_OPTION_SIZE))
1505 * Adjust the maximum LRO massage size.
1508 * Pointer to Ethernet device.
1511 * @param max_lro_size
1512 * The maximum size for LRO packet.
1515 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1516 uint32_t max_lro_size)
1518 struct mlx5_priv *priv = dev->data->dev_private;
1520 if (priv->config.hca_attr.lro_max_msg_sz_mode ==
1521 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1522 MLX5_MAX_TCP_HDR_OFFSET)
1523 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1524 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1525 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1526 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1527 if (priv->max_lro_msg_size)
1528 priv->max_lro_msg_size =
1529 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1531 priv->max_lro_msg_size = max_lro_size;
1533 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1534 dev->data->port_id, idx,
1535 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1539 * Prepare both size and number of stride for Multi-Packet RQ.
1542 * Pointer to Ethernet device.
1546 * Number of descriptors to configure in queue.
1548 * Indicator if Rx segment enables, if so Multi-Packet RQ doesn't enable.
1549 * @param min_mbuf_size
1550 * Non scatter min mbuf size, max_rx_pktlen plus overhead.
1551 * @param actual_log_stride_num
1552 * Log number of strides to configure for this queue.
1553 * @param actual_log_stride_size
1554 * Log stride size to configure for this queue.
1557 * 0 if Multi-Packet RQ is supported, otherwise -1.
1560 mlx5_mprq_prepare(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1561 bool rx_seg_en, uint32_t min_mbuf_size,
1562 uint32_t *actual_log_stride_num,
1563 uint32_t *actual_log_stride_size)
1565 struct mlx5_priv *priv = dev->data->dev_private;
1566 struct mlx5_dev_config *config = &priv->config;
1567 uint32_t log_min_stride_num = config->mprq.log_min_stride_num;
1568 uint32_t log_max_stride_num = config->mprq.log_max_stride_num;
1569 uint32_t log_def_stride_num =
1570 RTE_MIN(RTE_MAX(MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM,
1571 log_min_stride_num),
1572 log_max_stride_num);
1573 uint32_t log_min_stride_size = config->mprq.log_min_stride_size;
1574 uint32_t log_max_stride_size = config->mprq.log_max_stride_size;
1575 uint32_t log_def_stride_size =
1576 RTE_MIN(RTE_MAX(MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE,
1577 log_min_stride_size),
1578 log_max_stride_size);
1579 uint32_t log_stride_wqe_size;
1581 if (mlx5_check_mprq_support(dev) != 1 || rx_seg_en)
1583 /* Checks if chosen number of strides is in supported range. */
1584 if (config->mprq.log_stride_num > log_max_stride_num ||
1585 config->mprq.log_stride_num < log_min_stride_num) {
1586 *actual_log_stride_num = log_def_stride_num;
1588 "Port %u Rx queue %u number of strides for Multi-Packet RQ is out of range, setting default value (%u)",
1589 dev->data->port_id, idx, RTE_BIT32(log_def_stride_num));
1591 *actual_log_stride_num = config->mprq.log_stride_num;
1593 if (config->mprq.log_stride_size) {
1594 /* Checks if chosen size of stride is in supported range. */
1595 if (config->mprq.log_stride_size > log_max_stride_size ||
1596 config->mprq.log_stride_size < log_min_stride_size) {
1597 *actual_log_stride_size = log_def_stride_size;
1599 "Port %u Rx queue %u size of a stride for Multi-Packet RQ is out of range, setting default value (%u)",
1600 dev->data->port_id, idx,
1601 RTE_BIT32(log_def_stride_size));
1603 *actual_log_stride_size = config->mprq.log_stride_size;
1606 if (min_mbuf_size <= RTE_BIT32(log_max_stride_size))
1607 *actual_log_stride_size = log2above(min_mbuf_size);
1611 log_stride_wqe_size = *actual_log_stride_num + *actual_log_stride_size;
1612 /* Check if WQE buffer size is supported by hardware. */
1613 if (log_stride_wqe_size < config->mprq.log_min_stride_wqe_size) {
1614 *actual_log_stride_num = log_def_stride_num;
1615 *actual_log_stride_size = log_def_stride_size;
1617 "Port %u Rx queue %u size of WQE buffer for Multi-Packet RQ is too small, setting default values (stride_num_n=%u, stride_size_n=%u)",
1618 dev->data->port_id, idx, RTE_BIT32(log_def_stride_num),
1619 RTE_BIT32(log_def_stride_size));
1620 log_stride_wqe_size = log_def_stride_num + log_def_stride_size;
1622 MLX5_ASSERT(log_stride_wqe_size >= config->mprq.log_min_stride_wqe_size);
1623 if (desc <= RTE_BIT32(*actual_log_stride_num))
1625 if (min_mbuf_size > RTE_BIT32(log_stride_wqe_size)) {
1626 DRV_LOG(WARNING, "Port %u Rx queue %u "
1627 "Multi-Packet RQ is unsupported, WQE buffer size (%u) "
1628 "is smaller than min mbuf size (%u)",
1629 dev->data->port_id, idx, RTE_BIT32(log_stride_wqe_size),
1633 DRV_LOG(DEBUG, "Port %u Rx queue %u "
1634 "Multi-Packet RQ is enabled strd_num_n = %u, strd_sz_n = %u",
1635 dev->data->port_id, idx, RTE_BIT32(*actual_log_stride_num),
1636 RTE_BIT32(*actual_log_stride_size));
1639 if (config->mprq.enabled)
1641 "Port %u MPRQ is requested but cannot be enabled\n"
1642 " (requested: pkt_sz = %u, desc_num = %u,"
1643 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1644 " supported: min_rxqs_num = %u, min_buf_wqe_sz = %u"
1645 " min_stride_sz = %u, max_stride_sz = %u).\n"
1646 "Rx segment is %senable.",
1647 dev->data->port_id, min_mbuf_size, desc, priv->rxqs_n,
1648 RTE_BIT32(config->mprq.log_stride_size),
1649 RTE_BIT32(config->mprq.log_stride_num),
1650 config->mprq.min_rxqs_num,
1651 RTE_BIT32(config->mprq.log_min_stride_wqe_size),
1652 RTE_BIT32(config->mprq.log_min_stride_size),
1653 RTE_BIT32(config->mprq.log_max_stride_size),
1654 rx_seg_en ? "" : "not ");
1659 * Create a DPDK Rx queue.
1662 * Pointer to Ethernet device.
1664 * RX queue private data.
1666 * Number of descriptors to configure in queue.
1668 * NUMA socket on which memory must be allocated.
1671 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1673 struct mlx5_rxq_ctrl *
1674 mlx5_rxq_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,
1676 unsigned int socket, const struct rte_eth_rxconf *conf,
1677 const struct rte_eth_rxseg_split *rx_seg, uint16_t n_seg)
1679 uint16_t idx = rxq->idx;
1680 struct mlx5_priv *priv = dev->data->dev_private;
1681 struct mlx5_rxq_ctrl *tmpl;
1682 unsigned int mb_len = rte_pktmbuf_data_room_size(rx_seg[0].mp);
1683 struct mlx5_dev_config *config = &priv->config;
1684 uint64_t offloads = conf->offloads |
1685 dev->data->dev_conf.rxmode.offloads;
1686 unsigned int lro_on_queue = !!(offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO);
1687 unsigned int max_rx_pktlen = lro_on_queue ?
1688 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1689 dev->data->mtu + (unsigned int)RTE_ETHER_HDR_LEN +
1691 unsigned int non_scatter_min_mbuf_size = max_rx_pktlen +
1692 RTE_PKTMBUF_HEADROOM;
1693 unsigned int max_lro_size = 0;
1694 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1695 uint32_t mprq_log_actual_stride_num = 0;
1696 uint32_t mprq_log_actual_stride_size = 0;
1697 bool rx_seg_en = n_seg != 1 || rx_seg[0].offset || rx_seg[0].length;
1698 const int mprq_en = !mlx5_mprq_prepare(dev, idx, desc, rx_seg_en,
1699 non_scatter_min_mbuf_size,
1700 &mprq_log_actual_stride_num,
1701 &mprq_log_actual_stride_size);
1703 * Always allocate extra slots, even if eventually
1704 * the vector Rx will not be used.
1706 uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1707 size_t alloc_size = sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *);
1708 const struct rte_eth_rxseg_split *qs_seg = rx_seg;
1709 unsigned int tail_len;
1712 /* Trim the number of descs needed. */
1713 desc >>= mprq_log_actual_stride_num;
1714 alloc_size += desc * sizeof(struct mlx5_mprq_buf *);
1716 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, alloc_size, 0, socket);
1721 LIST_INIT(&tmpl->owners);
1722 if (conf->share_group > 0) {
1723 tmpl->rxq.shared = 1;
1724 tmpl->share_group = conf->share_group;
1725 tmpl->share_qid = conf->share_qid;
1726 LIST_INSERT_HEAD(&priv->sh->shared_rxqs, tmpl, share_entry);
1729 LIST_INSERT_HEAD(&tmpl->owners, rxq, owner_entry);
1730 MLX5_ASSERT(n_seg && n_seg <= MLX5_MAX_RXQ_NSEG);
1732 * Save the original segment configuration in the shared queue
1733 * descriptor for the later check on the sibling queue creation.
1735 tmpl->rxseg_n = n_seg;
1736 rte_memcpy(tmpl->rxseg, qs_seg,
1737 sizeof(struct rte_eth_rxseg_split) * n_seg);
1739 * Build the array of actual buffer offsets and lengths.
1740 * Pad with the buffers from the last memory pool if
1741 * needed to handle max size packets, replace zero length
1742 * with the buffer length from the pool.
1744 tail_len = max_rx_pktlen;
1746 struct mlx5_eth_rxseg *hw_seg =
1747 &tmpl->rxq.rxseg[tmpl->rxq.rxseg_n];
1748 uint32_t buf_len, offset, seg_len;
1751 * For the buffers beyond descriptions offset is zero,
1752 * the first buffer contains head room.
1754 buf_len = rte_pktmbuf_data_room_size(qs_seg->mp);
1755 offset = (tmpl->rxq.rxseg_n >= n_seg ? 0 : qs_seg->offset) +
1756 (tmpl->rxq.rxseg_n ? 0 : RTE_PKTMBUF_HEADROOM);
1758 * For the buffers beyond descriptions the length is
1759 * pool buffer length, zero lengths are replaced with
1760 * pool buffer length either.
1762 seg_len = tmpl->rxq.rxseg_n >= n_seg ? buf_len :
1766 /* Check is done in long int, now overflows. */
1767 if (buf_len < seg_len + offset) {
1768 DRV_LOG(ERR, "port %u Rx queue %u: Split offset/length "
1769 "%u/%u can't be satisfied",
1770 dev->data->port_id, idx,
1771 qs_seg->length, qs_seg->offset);
1775 if (seg_len > tail_len)
1776 seg_len = buf_len - offset;
1777 if (++tmpl->rxq.rxseg_n > MLX5_MAX_RXQ_NSEG) {
1779 "port %u too many SGEs (%u) needed to handle"
1780 " requested maximum packet size %u, the maximum"
1781 " supported are %u", dev->data->port_id,
1782 tmpl->rxq.rxseg_n, max_rx_pktlen,
1784 rte_errno = ENOTSUP;
1787 /* Build the actual scattering element in the queue object. */
1788 hw_seg->mp = qs_seg->mp;
1789 MLX5_ASSERT(offset <= UINT16_MAX);
1790 MLX5_ASSERT(seg_len <= UINT16_MAX);
1791 hw_seg->offset = (uint16_t)offset;
1792 hw_seg->length = (uint16_t)seg_len;
1794 * Advance the segment descriptor, the padding is the based
1795 * on the attributes of the last descriptor.
1797 if (tmpl->rxq.rxseg_n < n_seg)
1799 tail_len -= RTE_MIN(tail_len, seg_len);
1800 } while (tail_len || !rte_is_power_of_2(tmpl->rxq.rxseg_n));
1801 MLX5_ASSERT(tmpl->rxq.rxseg_n &&
1802 tmpl->rxq.rxseg_n <= MLX5_MAX_RXQ_NSEG);
1803 if (tmpl->rxq.rxseg_n > 1 && !(offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) {
1804 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1805 " configured and no enough mbuf space(%u) to contain "
1806 "the maximum RX packet length(%u) with head-room(%u)",
1807 dev->data->port_id, idx, mb_len, max_rx_pktlen,
1808 RTE_PKTMBUF_HEADROOM);
1812 tmpl->type = MLX5_RXQ_TYPE_STANDARD;
1813 if (mlx5_mr_ctrl_init(&tmpl->rxq.mr_ctrl,
1814 &priv->sh->cdev->mr_scache.dev_gen, socket)) {
1815 /* rte_errno is already set. */
1818 tmpl->socket = socket;
1819 if (dev->data->dev_conf.intr_conf.rxq)
1822 /* TODO: Rx scatter isn't supported yet. */
1823 tmpl->rxq.sges_n = 0;
1824 tmpl->rxq.log_strd_num = mprq_log_actual_stride_num;
1825 tmpl->rxq.log_strd_sz = mprq_log_actual_stride_size;
1826 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1827 tmpl->rxq.strd_scatter_en =
1828 !!(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
1829 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1830 config->mprq.max_memcpy_len);
1831 max_lro_size = RTE_MIN(max_rx_pktlen,
1832 RTE_BIT32(tmpl->rxq.log_strd_num) *
1833 RTE_BIT32(tmpl->rxq.log_strd_sz));
1834 } else if (tmpl->rxq.rxseg_n == 1) {
1835 MLX5_ASSERT(max_rx_pktlen <= first_mb_free_size);
1836 tmpl->rxq.sges_n = 0;
1837 max_lro_size = max_rx_pktlen;
1838 } else if (offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
1839 unsigned int sges_n;
1841 if (lro_on_queue && first_mb_free_size <
1842 MLX5_MAX_LRO_HEADER_FIX) {
1843 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1844 " to include the max header size(%u) for LRO",
1845 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1846 rte_errno = ENOTSUP;
1850 * Determine the number of SGEs needed for a full packet
1851 * and round it to the next power of two.
1853 sges_n = log2above(tmpl->rxq.rxseg_n);
1854 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1856 "port %u too many SGEs (%u) needed to handle"
1857 " requested maximum packet size %u, the maximum"
1858 " supported are %u", dev->data->port_id,
1859 1 << sges_n, max_rx_pktlen,
1860 1u << MLX5_MAX_LOG_RQ_SEGS);
1861 rte_errno = ENOTSUP;
1864 tmpl->rxq.sges_n = sges_n;
1865 max_lro_size = max_rx_pktlen;
1867 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1868 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1869 if (desc % (1 << tmpl->rxq.sges_n)) {
1871 "port %u number of Rx queue descriptors (%u) is not a"
1872 " multiple of SGEs per packet (%u)",
1875 1 << tmpl->rxq.sges_n);
1879 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1880 /* Toggle RX checksum offload if hardware supports it. */
1881 tmpl->rxq.csum = !!(offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM);
1882 /* Configure Rx timestamp. */
1883 tmpl->rxq.hw_timestamp = !!(offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP);
1884 tmpl->rxq.timestamp_rx_flag = 0;
1885 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1886 &tmpl->rxq.timestamp_offset,
1887 &tmpl->rxq.timestamp_rx_flag) != 0) {
1888 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1891 /* Configure VLAN stripping. */
1892 tmpl->rxq.vlan_strip = !!(offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
1893 /* By default, FCS (CRC) is stripped by hardware. */
1894 tmpl->rxq.crc_present = 0;
1895 tmpl->rxq.lro = lro_on_queue;
1896 if (offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) {
1897 if (config->hw_fcs_strip) {
1899 * RQs used for LRO-enabled TIRs should not be
1900 * configured to scatter the FCS.
1904 "port %u CRC stripping has been "
1905 "disabled but will still be performed "
1906 "by hardware, because LRO is enabled",
1907 dev->data->port_id);
1909 tmpl->rxq.crc_present = 1;
1912 "port %u CRC stripping has been disabled but will"
1913 " still be performed by hardware, make sure MLNX_OFED"
1914 " and firmware are up to date",
1915 dev->data->port_id);
1919 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1920 " incoming frames to hide it",
1922 tmpl->rxq.crc_present ? "disabled" : "enabled",
1923 tmpl->rxq.crc_present << 2);
1924 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1925 (!!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS));
1927 tmpl->rxq.port_id = dev->data->port_id;
1928 tmpl->sh = priv->sh;
1929 tmpl->rxq.mp = rx_seg[0].mp;
1930 tmpl->rxq.elts_n = log2above(desc);
1931 tmpl->rxq.rq_repl_thresh = MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
1932 tmpl->rxq.elts = (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
1933 tmpl->rxq.mprq_bufs =
1934 (struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
1935 tmpl->rxq.idx = idx;
1936 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1939 mlx5_mr_btree_free(&tmpl->rxq.mr_ctrl.cache_bh);
1945 * Create a DPDK Rx hairpin queue.
1948 * Pointer to Ethernet device.
1952 * Number of descriptors to configure in queue.
1953 * @param hairpin_conf
1954 * The hairpin binding configuration.
1957 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1959 struct mlx5_rxq_ctrl *
1960 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,
1962 const struct rte_eth_hairpin_conf *hairpin_conf)
1964 uint16_t idx = rxq->idx;
1965 struct mlx5_priv *priv = dev->data->dev_private;
1966 struct mlx5_rxq_ctrl *tmpl;
1968 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1974 LIST_INIT(&tmpl->owners);
1976 LIST_INSERT_HEAD(&tmpl->owners, rxq, owner_entry);
1977 tmpl->type = MLX5_RXQ_TYPE_HAIRPIN;
1978 tmpl->socket = SOCKET_ID_ANY;
1979 tmpl->rxq.rss_hash = 0;
1980 tmpl->rxq.port_id = dev->data->port_id;
1981 tmpl->sh = priv->sh;
1982 tmpl->rxq.mp = NULL;
1983 tmpl->rxq.elts_n = log2above(desc);
1984 tmpl->rxq.elts = NULL;
1985 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1986 tmpl->rxq.idx = idx;
1987 rxq->hairpin_conf = *hairpin_conf;
1988 mlx5_rxq_ref(dev, idx);
1989 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1994 * Increase Rx queue reference count.
1997 * Pointer to Ethernet device.
2002 * A pointer to the queue if it exists, NULL otherwise.
2004 struct mlx5_rxq_priv *
2005 mlx5_rxq_ref(struct rte_eth_dev *dev, uint16_t idx)
2007 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2010 __atomic_fetch_add(&rxq->refcnt, 1, __ATOMIC_RELAXED);
2015 * Dereference a Rx queue.
2018 * Pointer to Ethernet device.
2023 * Updated reference count.
2026 mlx5_rxq_deref(struct rte_eth_dev *dev, uint16_t idx)
2028 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2032 return __atomic_sub_fetch(&rxq->refcnt, 1, __ATOMIC_RELAXED);
2039 * Pointer to Ethernet device.
2044 * A pointer to the queue if it exists, NULL otherwise.
2046 struct mlx5_rxq_priv *
2047 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
2049 struct mlx5_priv *priv = dev->data->dev_private;
2051 MLX5_ASSERT(priv->rxq_privs != NULL);
2052 return (*priv->rxq_privs)[idx];
2056 * Get Rx queue shareable control.
2059 * Pointer to Ethernet device.
2064 * A pointer to the queue control if it exists, NULL otherwise.
2066 struct mlx5_rxq_ctrl *
2067 mlx5_rxq_ctrl_get(struct rte_eth_dev *dev, uint16_t idx)
2069 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2071 return rxq == NULL ? NULL : rxq->ctrl;
2075 * Get Rx queue shareable data.
2078 * Pointer to Ethernet device.
2083 * A pointer to the queue data if it exists, NULL otherwise.
2085 struct mlx5_rxq_data *
2086 mlx5_rxq_data_get(struct rte_eth_dev *dev, uint16_t idx)
2088 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2090 return rxq == NULL ? NULL : &rxq->ctrl->rxq;
2094 * Release a Rx queue.
2097 * Pointer to Ethernet device.
2102 * 1 while a reference on it exists, 0 when freed.
2105 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
2107 struct mlx5_priv *priv = dev->data->dev_private;
2108 struct mlx5_rxq_priv *rxq;
2109 struct mlx5_rxq_ctrl *rxq_ctrl;
2112 if (priv->rxq_privs == NULL)
2114 rxq = mlx5_rxq_get(dev, idx);
2115 if (rxq == NULL || rxq->refcnt == 0)
2117 rxq_ctrl = rxq->ctrl;
2118 refcnt = mlx5_rxq_deref(dev, idx);
2121 } else if (refcnt == 1) { /* RxQ stopped. */
2122 priv->obj_ops.rxq_obj_release(rxq);
2123 if (!rxq_ctrl->started && rxq_ctrl->obj != NULL) {
2124 LIST_REMOVE(rxq_ctrl->obj, next);
2125 mlx5_free(rxq_ctrl->obj);
2126 rxq_ctrl->obj = NULL;
2128 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) {
2129 if (!rxq_ctrl->started)
2130 rxq_free_elts(rxq_ctrl);
2131 dev->data->rx_queue_state[idx] =
2132 RTE_ETH_QUEUE_STATE_STOPPED;
2134 } else { /* Refcnt zero, closing device. */
2135 LIST_REMOVE(rxq, owner_entry);
2136 if (LIST_EMPTY(&rxq_ctrl->owners)) {
2137 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
2139 (&rxq_ctrl->rxq.mr_ctrl.cache_bh);
2140 if (rxq_ctrl->rxq.shared)
2141 LIST_REMOVE(rxq_ctrl, share_entry);
2142 LIST_REMOVE(rxq_ctrl, next);
2143 mlx5_free(rxq_ctrl);
2145 dev->data->rx_queues[idx] = NULL;
2147 (*priv->rxq_privs)[idx] = NULL;
2153 * Verify the Rx Queue list is empty
2156 * Pointer to Ethernet device.
2159 * The number of object not released.
2162 mlx5_rxq_verify(struct rte_eth_dev *dev)
2164 struct mlx5_priv *priv = dev->data->dev_private;
2165 struct mlx5_rxq_ctrl *rxq_ctrl;
2168 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
2169 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
2170 dev->data->port_id, rxq_ctrl->rxq.idx);
2177 * Get a Rx queue type.
2180 * Pointer to Ethernet device.
2185 * The Rx queue type.
2188 mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx)
2190 struct mlx5_priv *priv = dev->data->dev_private;
2191 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
2193 if (idx < priv->rxqs_n && rxq_ctrl != NULL)
2194 return rxq_ctrl->type;
2195 return MLX5_RXQ_TYPE_UNDEFINED;
2199 * Get a Rx hairpin queue configuration.
2202 * Pointer to Ethernet device.
2207 * Pointer to the configuration if a hairpin RX queue, otherwise NULL.
2209 const struct rte_eth_hairpin_conf *
2210 mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)
2212 struct mlx5_priv *priv = dev->data->dev_private;
2213 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2215 if (idx < priv->rxqs_n && rxq != NULL) {
2216 if (rxq->ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
2217 return &rxq->hairpin_conf;
2223 * Match queues listed in arguments to queues contained in indirection table
2227 * Pointer to indirection table to match.
2229 * Queues to match to ques in indirection table.
2231 * Number of queues in the array.
2234 * 1 if all queues in indirection table match 0 otherwise.
2237 mlx5_ind_table_obj_match_queues(const struct mlx5_ind_table_obj *ind_tbl,
2238 const uint16_t *queues, uint32_t queues_n)
2240 return (ind_tbl->queues_n == queues_n) &&
2241 (!memcmp(ind_tbl->queues, queues,
2242 ind_tbl->queues_n * sizeof(ind_tbl->queues[0])));
2246 * Get an indirection table.
2249 * Pointer to Ethernet device.
2251 * Queues entering in the indirection table.
2253 * Number of queues in the array.
2256 * An indirection table if found.
2258 struct mlx5_ind_table_obj *
2259 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
2262 struct mlx5_priv *priv = dev->data->dev_private;
2263 struct mlx5_ind_table_obj *ind_tbl;
2265 rte_rwlock_read_lock(&priv->ind_tbls_lock);
2266 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
2267 if ((ind_tbl->queues_n == queues_n) &&
2268 (memcmp(ind_tbl->queues, queues,
2269 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
2271 __atomic_fetch_add(&ind_tbl->refcnt, 1,
2276 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
2281 * Release an indirection table.
2284 * Pointer to Ethernet device.
2286 * Indirection table to release.
2288 * Indirection table for Standalone queue.
2290 * If true, then dereference RX queues related to indirection table.
2291 * Otherwise, no additional action will be taken.
2294 * 1 while a reference on it exists, 0 when freed.
2297 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
2298 struct mlx5_ind_table_obj *ind_tbl,
2302 struct mlx5_priv *priv = dev->data->dev_private;
2303 unsigned int i, ret;
2305 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2306 ret = __atomic_sub_fetch(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
2307 if (!ret && !standalone)
2308 LIST_REMOVE(ind_tbl, next);
2309 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2312 priv->obj_ops.ind_table_destroy(ind_tbl);
2314 for (i = 0; i != ind_tbl->queues_n; ++i)
2315 claim_nonzero(mlx5_rxq_deref(dev, ind_tbl->queues[i]));
2322 * Verify the Rx Queue list is empty
2325 * Pointer to Ethernet device.
2328 * The number of object not released.
2331 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
2333 struct mlx5_priv *priv = dev->data->dev_private;
2334 struct mlx5_ind_table_obj *ind_tbl;
2337 rte_rwlock_read_lock(&priv->ind_tbls_lock);
2338 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
2340 "port %u indirection table obj %p still referenced",
2341 dev->data->port_id, (void *)ind_tbl);
2344 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
2349 * Setup an indirection table structure fields.
2352 * Pointer to Ethernet device.
2354 * Indirection table to modify.
2356 * Whether to increment RxQ reference counters.
2359 * 0 on success, a negative errno value otherwise and rte_errno is set.
2362 mlx5_ind_table_obj_setup(struct rte_eth_dev *dev,
2363 struct mlx5_ind_table_obj *ind_tbl,
2366 struct mlx5_priv *priv = dev->data->dev_private;
2367 uint32_t queues_n = ind_tbl->queues_n;
2368 uint16_t *queues = ind_tbl->queues;
2369 unsigned int i = 0, j;
2371 const unsigned int n = rte_is_power_of_2(queues_n) ?
2372 log2above(queues_n) :
2373 log2above(priv->config.ind_table_max_size);
2376 for (i = 0; i != queues_n; ++i) {
2377 if (mlx5_rxq_ref(dev, queues[i]) == NULL) {
2382 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
2385 __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
2390 for (j = 0; j < i; j++)
2391 mlx5_rxq_deref(dev, queues[j]);
2394 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2395 dev->data->port_id);
2400 * Create an indirection table.
2403 * Pointer to Ethernet device.
2405 * Queues entering in the indirection table.
2407 * Number of queues in the array.
2409 * Indirection table for Standalone queue.
2411 * Whether to increment RxQ reference counters.
2414 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2416 static struct mlx5_ind_table_obj *
2417 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
2418 uint32_t queues_n, bool standalone, bool ref_qs)
2420 struct mlx5_priv *priv = dev->data->dev_private;
2421 struct mlx5_ind_table_obj *ind_tbl;
2424 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
2425 queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
2430 ind_tbl->queues_n = queues_n;
2431 ind_tbl->queues = (uint16_t *)(ind_tbl + 1);
2432 memcpy(ind_tbl->queues, queues, queues_n * sizeof(*queues));
2433 ret = mlx5_ind_table_obj_setup(dev, ind_tbl, ref_qs);
2439 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2440 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
2441 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2447 mlx5_ind_table_obj_check_standalone(struct rte_eth_dev *dev __rte_unused,
2448 struct mlx5_ind_table_obj *ind_tbl)
2452 refcnt = __atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED);
2456 * Modification of indirection tables having more than 1
2457 * reference is unsupported.
2460 "Port %u cannot modify indirection table %p (refcnt %u > 1).",
2461 dev->data->port_id, (void *)ind_tbl, refcnt);
2467 * Modify an indirection table.
2470 * Pointer to Ethernet device.
2472 * Indirection table to modify.
2474 * Queues replacement for the indirection table.
2476 * Number of queues in the array.
2478 * Indirection table for Standalone queue.
2480 * Whether to increment new RxQ set reference counters.
2481 * @param deref_old_qs
2482 * Whether to decrement old RxQ set reference counters.
2485 * 0 on success, a negative errno value otherwise and rte_errno is set.
2488 mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,
2489 struct mlx5_ind_table_obj *ind_tbl,
2490 uint16_t *queues, const uint32_t queues_n,
2491 bool standalone, bool ref_new_qs, bool deref_old_qs)
2493 struct mlx5_priv *priv = dev->data->dev_private;
2494 unsigned int i = 0, j;
2496 const unsigned int n = rte_is_power_of_2(queues_n) ?
2497 log2above(queues_n) :
2498 log2above(priv->config.ind_table_max_size);
2500 MLX5_ASSERT(standalone);
2501 RTE_SET_USED(standalone);
2502 if (mlx5_ind_table_obj_check_standalone(dev, ind_tbl) < 0)
2505 for (i = 0; i != queues_n; ++i) {
2506 if (!mlx5_rxq_ref(dev, queues[i])) {
2511 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2512 ret = priv->obj_ops.ind_table_modify(dev, n, queues, queues_n, ind_tbl);
2516 for (i = 0; i < ind_tbl->queues_n; i++)
2517 claim_nonzero(mlx5_rxq_deref(dev, ind_tbl->queues[i]));
2518 ind_tbl->queues_n = queues_n;
2519 ind_tbl->queues = queues;
2524 for (j = 0; j < i; j++)
2525 mlx5_rxq_deref(dev, queues[j]);
2528 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2529 dev->data->port_id);
2534 * Attach an indirection table to its queues.
2537 * Pointer to Ethernet device.
2539 * Indirection table to attach.
2542 * 0 on success, a negative errno value otherwise and rte_errno is set.
2545 mlx5_ind_table_obj_attach(struct rte_eth_dev *dev,
2546 struct mlx5_ind_table_obj *ind_tbl)
2550 ret = mlx5_ind_table_obj_modify(dev, ind_tbl, ind_tbl->queues,
2552 true /* standalone */,
2553 true /* ref_new_qs */,
2554 false /* deref_old_qs */);
2556 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2557 dev->data->port_id, (void *)ind_tbl);
2562 * Detach an indirection table from its queues.
2565 * Pointer to Ethernet device.
2567 * Indirection table to detach.
2570 * 0 on success, a negative errno value otherwise and rte_errno is set.
2573 mlx5_ind_table_obj_detach(struct rte_eth_dev *dev,
2574 struct mlx5_ind_table_obj *ind_tbl)
2576 struct mlx5_priv *priv = dev->data->dev_private;
2577 const unsigned int n = rte_is_power_of_2(ind_tbl->queues_n) ?
2578 log2above(ind_tbl->queues_n) :
2579 log2above(priv->config.ind_table_max_size);
2583 ret = mlx5_ind_table_obj_check_standalone(dev, ind_tbl);
2586 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2587 ret = priv->obj_ops.ind_table_modify(dev, n, NULL, 0, ind_tbl);
2589 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2590 dev->data->port_id, (void *)ind_tbl);
2593 for (i = 0; i < ind_tbl->queues_n; i++)
2594 mlx5_rxq_release(dev, ind_tbl->queues[i]);
2599 mlx5_hrxq_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
2602 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2603 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2604 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2606 return (hrxq->rss_key_len != rss_desc->key_len ||
2607 memcmp(hrxq->rss_key, rss_desc->key, rss_desc->key_len) ||
2608 hrxq->hash_fields != rss_desc->hash_fields ||
2609 hrxq->ind_table->queues_n != rss_desc->queue_num ||
2610 memcmp(hrxq->ind_table->queues, rss_desc->queue,
2611 rss_desc->queue_num * sizeof(rss_desc->queue[0])));
2615 * Modify an Rx Hash queue configuration.
2618 * Pointer to Ethernet device.
2620 * Index to Hash Rx queue to modify.
2622 * RSS key for the Rx hash queue.
2623 * @param rss_key_len
2625 * @param hash_fields
2626 * Verbs protocol hash field to make the RSS on.
2628 * Queues entering in hash queue. In case of empty hash_fields only the
2629 * first queue index will be taken for the indirection table.
2634 * 0 on success, a negative errno value otherwise and rte_errno is set.
2637 mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hrxq_idx,
2638 const uint8_t *rss_key, uint32_t rss_key_len,
2639 uint64_t hash_fields,
2640 const uint16_t *queues, uint32_t queues_n)
2643 struct mlx5_ind_table_obj *ind_tbl = NULL;
2644 struct mlx5_priv *priv = dev->data->dev_private;
2645 struct mlx5_hrxq *hrxq =
2646 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2647 bool dev_started = !!dev->data->dev_started;
2655 if (hrxq->rss_key_len != rss_key_len) {
2656 /* rss_key_len is fixed size 40 byte & not supposed to change */
2660 queues_n = hash_fields ? queues_n : 1;
2661 if (mlx5_ind_table_obj_match_queues(hrxq->ind_table,
2662 queues, queues_n)) {
2663 ind_tbl = hrxq->ind_table;
2665 if (hrxq->standalone) {
2667 * Replacement of indirection table unsupported for
2668 * standalone hrxq objects (used by shared RSS).
2670 rte_errno = ENOTSUP;
2673 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2675 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2683 MLX5_ASSERT(priv->obj_ops.hrxq_modify);
2684 ret = priv->obj_ops.hrxq_modify(dev, hrxq, rss_key,
2685 hash_fields, ind_tbl);
2690 if (ind_tbl != hrxq->ind_table) {
2691 MLX5_ASSERT(!hrxq->standalone);
2692 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2693 hrxq->standalone, true);
2694 hrxq->ind_table = ind_tbl;
2696 hrxq->hash_fields = hash_fields;
2697 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2701 if (ind_tbl != hrxq->ind_table) {
2702 MLX5_ASSERT(!hrxq->standalone);
2703 mlx5_ind_table_obj_release(dev, ind_tbl, hrxq->standalone,
2711 __mlx5_hrxq_remove(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
2713 struct mlx5_priv *priv = dev->data->dev_private;
2715 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2716 mlx5_glue->destroy_flow_action(hrxq->action);
2718 priv->obj_ops.hrxq_destroy(hrxq);
2719 if (!hrxq->standalone) {
2720 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2721 hrxq->standalone, true);
2723 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2727 * Release the hash Rx queue.
2730 * Pointer to Ethernet device.
2732 * Index to Hash Rx queue to release.
2735 * mlx5 list pointer.
2737 * Hash queue entry pointer.
2740 mlx5_hrxq_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2742 struct rte_eth_dev *dev = tool_ctx;
2743 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2745 __mlx5_hrxq_remove(dev, hrxq);
2748 static struct mlx5_hrxq *
2749 __mlx5_hrxq_create(struct rte_eth_dev *dev,
2750 struct mlx5_flow_rss_desc *rss_desc)
2752 struct mlx5_priv *priv = dev->data->dev_private;
2753 const uint8_t *rss_key = rss_desc->key;
2754 uint32_t rss_key_len = rss_desc->key_len;
2755 bool standalone = !!rss_desc->shared_rss;
2756 const uint16_t *queues =
2757 standalone ? rss_desc->const_q : rss_desc->queue;
2758 uint32_t queues_n = rss_desc->queue_num;
2759 struct mlx5_hrxq *hrxq = NULL;
2760 uint32_t hrxq_idx = 0;
2761 struct mlx5_ind_table_obj *ind_tbl = rss_desc->ind_tbl;
2764 queues_n = rss_desc->hash_fields ? queues_n : 1;
2766 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2768 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2770 !!dev->data->dev_started);
2773 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2776 hrxq->standalone = standalone;
2777 hrxq->idx = hrxq_idx;
2778 hrxq->ind_table = ind_tbl;
2779 hrxq->rss_key_len = rss_key_len;
2780 hrxq->hash_fields = rss_desc->hash_fields;
2781 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2782 ret = priv->obj_ops.hrxq_new(dev, hrxq, rss_desc->tunnel);
2787 if (!rss_desc->ind_tbl)
2788 mlx5_ind_table_obj_release(dev, ind_tbl, standalone, true);
2790 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2794 struct mlx5_list_entry *
2795 mlx5_hrxq_create_cb(void *tool_ctx, void *cb_ctx)
2797 struct rte_eth_dev *dev = tool_ctx;
2798 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2799 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2800 struct mlx5_hrxq *hrxq;
2802 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2803 return hrxq ? &hrxq->entry : NULL;
2806 struct mlx5_list_entry *
2807 mlx5_hrxq_clone_cb(void *tool_ctx, struct mlx5_list_entry *entry,
2808 void *cb_ctx __rte_unused)
2810 struct rte_eth_dev *dev = tool_ctx;
2811 struct mlx5_priv *priv = dev->data->dev_private;
2812 struct mlx5_hrxq *hrxq;
2813 uint32_t hrxq_idx = 0;
2815 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2818 memcpy(hrxq, entry, sizeof(*hrxq) + MLX5_RSS_HASH_KEY_LEN);
2819 hrxq->idx = hrxq_idx;
2820 return &hrxq->entry;
2824 mlx5_hrxq_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2826 struct rte_eth_dev *dev = tool_ctx;
2827 struct mlx5_priv *priv = dev->data->dev_private;
2828 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2830 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2834 * Get an Rx Hash queue.
2837 * Pointer to Ethernet device.
2839 * RSS configuration for the Rx hash queue.
2842 * An hash Rx queue index on success.
2844 uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,
2845 struct mlx5_flow_rss_desc *rss_desc)
2847 struct mlx5_priv *priv = dev->data->dev_private;
2848 struct mlx5_hrxq *hrxq;
2849 struct mlx5_list_entry *entry;
2850 struct mlx5_flow_cb_ctx ctx = {
2854 if (rss_desc->shared_rss) {
2855 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2857 entry = mlx5_list_register(priv->hrxqs, &ctx);
2860 hrxq = container_of(entry, typeof(*hrxq), entry);
2868 * Release the hash Rx queue.
2871 * Pointer to Ethernet device.
2873 * Index to Hash Rx queue to release.
2876 * 1 while a reference on it exists, 0 when freed.
2878 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
2880 struct mlx5_priv *priv = dev->data->dev_private;
2881 struct mlx5_hrxq *hrxq;
2883 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2886 if (!hrxq->standalone)
2887 return mlx5_list_unregister(priv->hrxqs, &hrxq->entry);
2888 __mlx5_hrxq_remove(dev, hrxq);
2893 * Create a drop Rx Hash queue.
2896 * Pointer to Ethernet device.
2899 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2902 mlx5_drop_action_create(struct rte_eth_dev *dev)
2904 struct mlx5_priv *priv = dev->data->dev_private;
2905 struct mlx5_hrxq *hrxq = NULL;
2908 if (priv->drop_queue.hrxq)
2909 return priv->drop_queue.hrxq;
2910 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
2913 "Port %u cannot allocate memory for drop queue.",
2914 dev->data->port_id);
2918 priv->drop_queue.hrxq = hrxq;
2919 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
2921 if (!hrxq->ind_table) {
2925 ret = priv->obj_ops.drop_action_create(dev);
2931 if (hrxq->ind_table)
2932 mlx5_free(hrxq->ind_table);
2933 priv->drop_queue.hrxq = NULL;
2940 * Release a drop hash Rx queue.
2943 * Pointer to Ethernet device.
2946 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
2948 struct mlx5_priv *priv = dev->data->dev_private;
2949 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2951 if (!priv->drop_queue.hrxq)
2953 priv->obj_ops.drop_action_destroy(dev);
2954 mlx5_free(priv->drop_queue.rxq);
2955 mlx5_free(hrxq->ind_table);
2957 priv->drop_queue.rxq = NULL;
2958 priv->drop_queue.hrxq = NULL;
2962 * Verify the Rx Queue list is empty
2965 * Pointer to Ethernet device.
2968 * The number of object not released.
2971 mlx5_hrxq_verify(struct rte_eth_dev *dev)
2973 struct mlx5_priv *priv = dev->data->dev_private;
2975 return mlx5_list_get_entry_num(priv->hrxqs);
2979 * Set the Rx queue timestamp conversion parameters
2982 * Pointer to the Ethernet device structure.
2985 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
2987 struct mlx5_priv *priv = dev->data->dev_private;
2988 struct mlx5_dev_ctx_shared *sh = priv->sh;
2991 for (i = 0; i != priv->rxqs_n; ++i) {
2992 struct mlx5_rxq_data *data = mlx5_rxq_data_get(dev, i);
2997 data->rt_timestamp = priv->config.rt_timestamp;