1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
24 #include <mlx5_common_mr.h>
26 #include "mlx5_defs.h"
30 #include "mlx5_utils.h"
31 #include "mlx5_autoconf.h"
34 /* Default RSS hash key also used for ConnectX-3. */
35 uint8_t rss_hash_default_key[] = {
36 0x2c, 0xc6, 0x81, 0xd1,
37 0x5b, 0xdb, 0xf4, 0xf7,
38 0xfc, 0xa2, 0x83, 0x19,
39 0xdb, 0x1a, 0x3e, 0x94,
40 0x6b, 0x9e, 0x38, 0xd9,
41 0x2c, 0x9c, 0x03, 0xd1,
42 0xad, 0x99, 0x44, 0xa7,
43 0xd9, 0x56, 0x3d, 0x59,
44 0x06, 0x3c, 0x25, 0xf3,
45 0xfc, 0x1f, 0xdc, 0x2a,
48 /* Length of the default RSS hash key. */
49 static_assert(MLX5_RSS_HASH_KEY_LEN ==
50 (unsigned int)sizeof(rss_hash_default_key),
51 "wrong RSS default key size.");
54 * Calculate the number of CQEs in CQ for the Rx queue.
57 * Pointer to receive queue structure.
60 * Number of CQEs in CQ.
63 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
66 unsigned int wqe_n = 1 << rxq_data->elts_n;
68 if (mlx5_rxq_mprq_enabled(rxq_data))
69 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
76 * Allocate RX queue elements for Multi-Packet RQ.
79 * Pointer to RX queue structure.
82 * 0 on success, a negative errno value otherwise and rte_errno is set.
85 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
87 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
88 unsigned int wqe_n = 1 << rxq->elts_n;
92 /* Iterate on segments. */
93 for (i = 0; i <= wqe_n; ++i) {
94 struct mlx5_mprq_buf *buf;
96 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
97 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
102 (*rxq->mprq_bufs)[i] = buf;
104 rxq->mprq_repl = buf;
107 "port %u MPRQ queue %u allocated and configured %u segments",
108 rxq->port_id, rxq->idx, wqe_n);
111 err = rte_errno; /* Save rte_errno before cleanup. */
113 for (i = 0; (i != wqe_n); ++i) {
114 if ((*rxq->mprq_bufs)[i] != NULL)
115 rte_mempool_put(rxq->mprq_mp,
116 (*rxq->mprq_bufs)[i]);
117 (*rxq->mprq_bufs)[i] = NULL;
119 DRV_LOG(DEBUG, "port %u MPRQ queue %u failed, freed everything",
120 rxq->port_id, rxq->idx);
121 rte_errno = err; /* Restore rte_errno. */
126 * Allocate RX queue elements for Single-Packet RQ.
129 * Pointer to RX queue structure.
132 * 0 on success, errno value on failure.
135 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
137 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
138 unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
139 (1 << rxq_ctrl->rxq.elts_n) * (1 << rxq_ctrl->rxq.strd_num_n) :
140 (1 << rxq_ctrl->rxq.elts_n);
144 /* Iterate on segments. */
145 for (i = 0; (i != elts_n); ++i) {
146 struct mlx5_eth_rxseg *seg = &rxq_ctrl->rxq.rxseg[i % sges_n];
147 struct rte_mbuf *buf;
149 buf = rte_pktmbuf_alloc(seg->mp);
151 DRV_LOG(ERR, "port %u empty mbuf pool",
152 PORT_ID(rxq_ctrl->priv));
156 /* Headroom is reserved by rte_pktmbuf_alloc(). */
157 MLX5_ASSERT(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
158 /* Buffer is supposed to be empty. */
159 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
160 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
161 MLX5_ASSERT(!buf->next);
162 SET_DATA_OFF(buf, seg->offset);
163 PORT(buf) = rxq_ctrl->rxq.port_id;
164 DATA_LEN(buf) = seg->length;
165 PKT_LEN(buf) = seg->length;
167 (*rxq_ctrl->rxq.elts)[i] = buf;
169 /* If Rx vector is activated. */
170 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
171 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
172 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
173 struct rte_pktmbuf_pool_private *priv =
174 (struct rte_pktmbuf_pool_private *)
175 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
178 /* Initialize default rearm_data for vPMD. */
179 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
180 rte_mbuf_refcnt_set(mbuf_init, 1);
181 mbuf_init->nb_segs = 1;
182 mbuf_init->port = rxq->port_id;
183 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
184 mbuf_init->ol_flags = RTE_MBUF_F_EXTERNAL;
186 * prevent compiler reordering:
187 * rearm_data covers previous fields.
189 rte_compiler_barrier();
190 rxq->mbuf_initializer =
191 *(rte_xmm_t *)&mbuf_init->rearm_data;
192 /* Padding with a fake mbuf for vectorized Rx. */
193 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
194 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
197 "port %u SPRQ queue %u allocated and configured %u segments"
199 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
200 elts_n / (1 << rxq_ctrl->rxq.sges_n));
203 err = rte_errno; /* Save rte_errno before cleanup. */
205 for (i = 0; (i != elts_n); ++i) {
206 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
207 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
208 (*rxq_ctrl->rxq.elts)[i] = NULL;
210 DRV_LOG(DEBUG, "port %u SPRQ queue %u failed, freed everything",
211 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
212 rte_errno = err; /* Restore rte_errno. */
217 * Allocate RX queue elements.
220 * Pointer to RX queue structure.
223 * 0 on success, errno value on failure.
226 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
231 * For MPRQ we need to allocate both MPRQ buffers
232 * for WQEs and simple mbufs for vector processing.
234 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
235 ret = rxq_alloc_elts_mprq(rxq_ctrl);
236 return (ret || rxq_alloc_elts_sprq(rxq_ctrl));
240 * Free RX queue elements for Multi-Packet RQ.
243 * Pointer to RX queue structure.
246 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
248 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
251 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing %d WRs",
252 rxq->port_id, rxq->idx, (1u << rxq->elts_n));
253 if (rxq->mprq_bufs == NULL)
255 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
256 if ((*rxq->mprq_bufs)[i] != NULL)
257 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
258 (*rxq->mprq_bufs)[i] = NULL;
260 if (rxq->mprq_repl != NULL) {
261 mlx5_mprq_buf_free(rxq->mprq_repl);
262 rxq->mprq_repl = NULL;
267 * Free RX queue elements for Single-Packet RQ.
270 * Pointer to RX queue structure.
273 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
275 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
276 const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
277 (1 << rxq->elts_n) * (1 << rxq->strd_num_n) :
279 const uint16_t q_mask = q_n - 1;
280 uint16_t elts_ci = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
281 rxq->elts_ci : rxq->rq_ci;
282 uint16_t used = q_n - (elts_ci - rxq->rq_pi);
285 DRV_LOG(DEBUG, "port %u Rx queue %u freeing %d WRs",
286 PORT_ID(rxq_ctrl->priv), rxq->idx, q_n);
287 if (rxq->elts == NULL)
290 * Some mbuf in the Ring belongs to the application.
291 * They cannot be freed.
293 if (mlx5_rxq_check_vec_support(rxq) > 0) {
294 for (i = 0; i < used; ++i)
295 (*rxq->elts)[(elts_ci + i) & q_mask] = NULL;
296 rxq->rq_pi = elts_ci;
298 for (i = 0; i != q_n; ++i) {
299 if ((*rxq->elts)[i] != NULL)
300 rte_pktmbuf_free_seg((*rxq->elts)[i]);
301 (*rxq->elts)[i] = NULL;
306 * Free RX queue elements.
309 * Pointer to RX queue structure.
312 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
315 * For MPRQ we need to allocate both MPRQ buffers
316 * for WQEs and simple mbufs for vector processing.
318 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
319 rxq_free_elts_mprq(rxq_ctrl);
320 rxq_free_elts_sprq(rxq_ctrl);
324 * Returns the per-queue supported offloads.
327 * Pointer to Ethernet device.
330 * Supported Rx offloads.
333 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
335 struct mlx5_priv *priv = dev->data->dev_private;
336 struct mlx5_dev_config *config = &priv->config;
337 uint64_t offloads = (RTE_ETH_RX_OFFLOAD_SCATTER |
338 RTE_ETH_RX_OFFLOAD_TIMESTAMP |
339 RTE_ETH_RX_OFFLOAD_RSS_HASH);
341 if (!config->mprq.enabled)
342 offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
343 if (config->hw_fcs_strip)
344 offloads |= RTE_ETH_RX_OFFLOAD_KEEP_CRC;
346 offloads |= (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
347 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
348 RTE_ETH_RX_OFFLOAD_TCP_CKSUM);
349 if (config->hw_vlan_strip)
350 offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
351 if (MLX5_LRO_SUPPORTED(dev))
352 offloads |= RTE_ETH_RX_OFFLOAD_TCP_LRO;
358 * Returns the per-port supported offloads.
361 * Supported Rx offloads.
364 mlx5_get_rx_port_offloads(void)
366 uint64_t offloads = RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
372 * Verify if the queue can be released.
375 * Pointer to Ethernet device.
380 * 1 if the queue can be released
381 * 0 if the queue can not be released, there are references to it.
382 * Negative errno and rte_errno is set if queue doesn't exist.
385 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
387 struct mlx5_priv *priv = dev->data->dev_private;
388 struct mlx5_rxq_ctrl *rxq_ctrl;
390 if (!(*priv->rxqs)[idx]) {
394 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
395 return (__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED) == 1);
398 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
400 rxq_sync_cq(struct mlx5_rxq_data *rxq)
402 const uint16_t cqe_n = 1 << rxq->cqe_n;
403 const uint16_t cqe_mask = cqe_n - 1;
404 volatile struct mlx5_cqe *cqe;
409 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
410 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
411 if (ret == MLX5_CQE_STATUS_HW_OWN)
413 if (ret == MLX5_CQE_STATUS_ERR) {
417 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
418 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
422 /* Compute the next non compressed CQE. */
423 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
426 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
427 for (i = 0; i < cqe_n; i++) {
428 cqe = &(*rxq->cqes)[i];
429 cqe->op_own = MLX5_CQE_INVALIDATE;
431 /* Resync CQE and WQE (WQ in RESET state). */
433 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
435 *rxq->rq_db = rte_cpu_to_be_32(0);
440 * Rx queue stop. Device queue goes to the RESET state,
441 * all involved mbufs are freed from WQ.
444 * Pointer to Ethernet device structure.
449 * 0 on success, a negative errno value otherwise and rte_errno is set.
452 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
454 struct mlx5_priv *priv = dev->data->dev_private;
455 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
456 struct mlx5_rxq_ctrl *rxq_ctrl =
457 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
460 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
461 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RDY2RST);
463 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
468 /* Remove all processes CQEs. */
470 /* Free all involved mbufs. */
471 rxq_free_elts(rxq_ctrl);
472 /* Set the actual queue state. */
473 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
478 * Rx queue stop. Device queue goes to the RESET state,
479 * all involved mbufs are freed from WQ.
482 * Pointer to Ethernet device structure.
487 * 0 on success, a negative errno value otherwise and rte_errno is set.
490 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
492 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
495 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
496 DRV_LOG(ERR, "Hairpin queue can't be stopped");
500 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
503 * Vectorized Rx burst requires the CQ and RQ indices
504 * synchronized, that might be broken on RQ restart
505 * and cause Rx malfunction, so queue stopping is
506 * not supported if vectorized Rx burst is engaged.
507 * The routine pointer depends on the process
508 * type, should perform check there.
510 if (pkt_burst == mlx5_rx_burst_vec) {
511 DRV_LOG(ERR, "Rx queue stop is not supported "
512 "for vectorized Rx");
516 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
517 ret = mlx5_mp_os_req_queue_control(dev, idx,
518 MLX5_MP_REQ_QUEUE_RX_STOP);
520 ret = mlx5_rx_queue_stop_primary(dev, idx);
526 * Rx queue start. Device queue goes to the ready state,
527 * all required mbufs are allocated and WQ is replenished.
530 * Pointer to Ethernet device structure.
535 * 0 on success, a negative errno value otherwise and rte_errno is set.
538 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
540 struct mlx5_priv *priv = dev->data->dev_private;
541 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
542 struct mlx5_rxq_ctrl *rxq_ctrl =
543 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
546 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
547 /* Allocate needed buffers. */
548 ret = rxq_alloc_elts(rxq_ctrl);
550 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
555 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
557 /* Reset RQ consumer before moving queue to READY state. */
558 *rxq->rq_db = rte_cpu_to_be_32(0);
560 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RST2RDY);
562 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
567 /* Reinitialize RQ - set WQEs. */
568 mlx5_rxq_initialize(rxq);
569 rxq->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
570 /* Set actual queue state. */
571 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
576 * Rx queue start. Device queue goes to the ready state,
577 * all required mbufs are allocated and WQ is replenished.
580 * Pointer to Ethernet device structure.
585 * 0 on success, a negative errno value otherwise and rte_errno is set.
588 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
592 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
593 DRV_LOG(ERR, "Hairpin queue can't be started");
597 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
599 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
600 ret = mlx5_mp_os_req_queue_control(dev, idx,
601 MLX5_MP_REQ_QUEUE_RX_START);
603 ret = mlx5_rx_queue_start_primary(dev, idx);
609 * Rx queue presetup checks.
612 * Pointer to Ethernet device structure.
616 * Number of descriptors to configure in queue.
619 * 0 on success, a negative errno value otherwise and rte_errno is set.
622 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc)
624 struct mlx5_priv *priv = dev->data->dev_private;
626 if (!rte_is_power_of_2(*desc)) {
627 *desc = 1 << log2above(*desc);
629 "port %u increased number of descriptors in Rx queue %u"
630 " to the next power of two (%d)",
631 dev->data->port_id, idx, *desc);
633 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
634 dev->data->port_id, idx, *desc);
635 if (idx >= priv->rxqs_n) {
636 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
637 dev->data->port_id, idx, priv->rxqs_n);
638 rte_errno = EOVERFLOW;
641 if (!mlx5_rxq_releasable(dev, idx)) {
642 DRV_LOG(ERR, "port %u unable to release queue index %u",
643 dev->data->port_id, idx);
647 mlx5_rxq_release(dev, idx);
654 * Pointer to Ethernet device structure.
658 * Number of descriptors to configure in queue.
660 * NUMA socket on which memory must be allocated.
662 * Thresholds parameters.
664 * Memory pool for buffer allocations.
667 * 0 on success, a negative errno value otherwise and rte_errno is set.
670 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
671 unsigned int socket, const struct rte_eth_rxconf *conf,
672 struct rte_mempool *mp)
674 struct mlx5_priv *priv = dev->data->dev_private;
675 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
676 struct mlx5_rxq_ctrl *rxq_ctrl =
677 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
678 struct rte_eth_rxseg_split *rx_seg =
679 (struct rte_eth_rxseg_split *)conf->rx_seg;
680 struct rte_eth_rxseg_split rx_single = {.mp = mp};
681 uint16_t n_seg = conf->rx_nseg;
686 * The parameters should be checked on rte_eth_dev layer.
687 * If mp is specified it means the compatible configuration
688 * without buffer split feature tuning.
694 uint64_t offloads = conf->offloads |
695 dev->data->dev_conf.rxmode.offloads;
697 /* The offloads should be checked on rte_eth_dev layer. */
698 MLX5_ASSERT(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
699 if (!(offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) {
700 DRV_LOG(ERR, "port %u queue index %u split "
701 "offload not configured",
702 dev->data->port_id, idx);
706 MLX5_ASSERT(n_seg < MLX5_MAX_RXQ_NSEG);
708 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
711 rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, rx_seg, n_seg);
713 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
714 dev->data->port_id, idx);
718 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
719 dev->data->port_id, idx);
720 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
727 * Pointer to Ethernet device structure.
731 * Number of descriptors to configure in queue.
732 * @param hairpin_conf
733 * Hairpin configuration parameters.
736 * 0 on success, a negative errno value otherwise and rte_errno is set.
739 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
741 const struct rte_eth_hairpin_conf *hairpin_conf)
743 struct mlx5_priv *priv = dev->data->dev_private;
744 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
745 struct mlx5_rxq_ctrl *rxq_ctrl =
746 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
749 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
752 if (hairpin_conf->peer_count != 1) {
754 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue index %u"
755 " peer count is %u", dev->data->port_id,
756 idx, hairpin_conf->peer_count);
759 if (hairpin_conf->peers[0].port == dev->data->port_id) {
760 if (hairpin_conf->peers[0].queue >= priv->txqs_n) {
762 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
763 " index %u, Tx %u is larger than %u",
764 dev->data->port_id, idx,
765 hairpin_conf->peers[0].queue, priv->txqs_n);
769 if (hairpin_conf->manual_bind == 0 ||
770 hairpin_conf->tx_explicit == 0) {
772 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
773 " index %u peer port %u with attributes %u %u",
774 dev->data->port_id, idx,
775 hairpin_conf->peers[0].port,
776 hairpin_conf->manual_bind,
777 hairpin_conf->tx_explicit);
781 rxq_ctrl = mlx5_rxq_hairpin_new(dev, idx, desc, hairpin_conf);
783 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
784 dev->data->port_id, idx);
788 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
789 dev->data->port_id, idx);
790 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
795 * DPDK callback to release a RX queue.
798 * Pointer to Ethernet device structure.
800 * Receive queue index.
803 mlx5_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
805 struct mlx5_rxq_data *rxq = dev->data->rx_queues[qid];
809 if (!mlx5_rxq_releasable(dev, qid))
810 rte_panic("port %u Rx queue %u is still used by a flow and"
811 " cannot be removed\n", dev->data->port_id, qid);
812 mlx5_rxq_release(dev, qid);
816 * Allocate queue vector and fill epoll fd list for Rx interrupts.
819 * Pointer to Ethernet device.
822 * 0 on success, a negative errno value otherwise and rte_errno is set.
825 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
827 struct mlx5_priv *priv = dev->data->dev_private;
829 unsigned int rxqs_n = priv->rxqs_n;
830 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
831 unsigned int count = 0;
832 struct rte_intr_handle *intr_handle = dev->intr_handle;
834 if (!dev->data->dev_conf.intr_conf.rxq)
836 mlx5_rx_intr_vec_disable(dev);
837 if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
839 "port %u failed to allocate memory for interrupt"
840 " vector, Rx interrupts will not be supported",
846 if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))
849 for (i = 0; i != n; ++i) {
850 /* This rxq obj must not be released in this function. */
851 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
852 struct mlx5_rxq_obj *rxq_obj = rxq_ctrl ? rxq_ctrl->obj : NULL;
855 /* Skip queues that cannot request interrupts. */
856 if (!rxq_obj || (!rxq_obj->ibv_channel &&
857 !rxq_obj->devx_channel)) {
858 /* Use invalid intr_vec[] index to disable entry. */
859 if (rte_intr_vec_list_index_set(intr_handle, i,
860 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
862 /* Decrease the rxq_ctrl's refcnt */
864 mlx5_rxq_release(dev, i);
867 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
869 "port %u too many Rx queues for interrupt"
870 " vector size (%d), Rx interrupts cannot be"
872 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
873 mlx5_rx_intr_vec_disable(dev);
877 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
881 "port %u failed to make Rx interrupt file"
882 " descriptor %d non-blocking for queue index"
884 dev->data->port_id, rxq_obj->fd, i);
885 mlx5_rx_intr_vec_disable(dev);
889 if (rte_intr_vec_list_index_set(intr_handle, i,
890 RTE_INTR_VEC_RXTX_OFFSET + count))
892 if (rte_intr_efds_index_set(intr_handle, count,
898 mlx5_rx_intr_vec_disable(dev);
899 else if (rte_intr_nb_efd_set(intr_handle, count))
905 * Clean up Rx interrupts handler.
908 * Pointer to Ethernet device.
911 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
913 struct mlx5_priv *priv = dev->data->dev_private;
914 struct rte_intr_handle *intr_handle = dev->intr_handle;
916 unsigned int rxqs_n = priv->rxqs_n;
917 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
919 if (!dev->data->dev_conf.intr_conf.rxq)
921 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0)
923 for (i = 0; i != n; ++i) {
924 if (rte_intr_vec_list_index_get(intr_handle, i) ==
925 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID)
928 * Need to access directly the queue to release the reference
929 * kept in mlx5_rx_intr_vec_enable().
931 mlx5_rxq_release(dev, i);
934 rte_intr_free_epoll_fd(intr_handle);
936 rte_intr_vec_list_free(intr_handle);
938 rte_intr_nb_efd_set(intr_handle, 0);
942 * MLX5 CQ notification .
945 * Pointer to receive queue structure.
947 * Sequence number per receive queue .
950 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
953 uint32_t doorbell_hi;
955 void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
957 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
958 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
959 doorbell = (uint64_t)doorbell_hi << 32;
960 doorbell |= rxq->cqn;
961 rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
962 mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
963 cq_db_reg, rxq->uar_lock_cq);
967 * DPDK callback for Rx queue interrupt enable.
970 * Pointer to Ethernet device structure.
975 * 0 on success, a negative errno value otherwise and rte_errno is set.
978 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
980 struct mlx5_rxq_ctrl *rxq_ctrl;
982 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
986 if (!rxq_ctrl->obj) {
987 mlx5_rxq_release(dev, rx_queue_id);
990 mlx5_arm_cq(&rxq_ctrl->rxq, rxq_ctrl->rxq.cq_arm_sn);
992 mlx5_rxq_release(dev, rx_queue_id);
1000 * DPDK callback for Rx queue interrupt disable.
1003 * Pointer to Ethernet device structure.
1004 * @param rx_queue_id
1008 * 0 on success, a negative errno value otherwise and rte_errno is set.
1011 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1013 struct mlx5_priv *priv = dev->data->dev_private;
1014 struct mlx5_rxq_ctrl *rxq_ctrl;
1017 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
1024 if (rxq_ctrl->irq) {
1025 ret = priv->obj_ops.rxq_event_get(rxq_ctrl->obj);
1028 rxq_ctrl->rxq.cq_arm_sn++;
1030 mlx5_rxq_release(dev, rx_queue_id);
1034 * The ret variable may be EAGAIN which means the get_event function was
1035 * called before receiving one.
1041 ret = rte_errno; /* Save rte_errno before cleanup. */
1042 mlx5_rxq_release(dev, rx_queue_id);
1044 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1045 dev->data->port_id, rx_queue_id);
1046 rte_errno = ret; /* Restore rte_errno. */
1051 * Verify the Rx queue objects list is empty
1054 * Pointer to Ethernet device.
1057 * The number of objects not released.
1060 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1062 struct mlx5_priv *priv = dev->data->dev_private;
1064 struct mlx5_rxq_obj *rxq_obj;
1066 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1067 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1068 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1075 * Callback function to initialize mbufs for Multi-Packet RQ.
1078 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1079 void *_m, unsigned int i __rte_unused)
1081 struct mlx5_mprq_buf *buf = _m;
1082 struct rte_mbuf_ext_shared_info *shinfo;
1083 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1086 memset(_m, 0, sizeof(*buf));
1088 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1089 for (j = 0; j != strd_n; ++j) {
1090 shinfo = &buf->shinfos[j];
1091 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1092 shinfo->fcb_opaque = buf;
1097 * Free mempool of Multi-Packet RQ.
1100 * Pointer to Ethernet device.
1103 * 0 on success, negative errno value on failure.
1106 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1108 struct mlx5_priv *priv = dev->data->dev_private;
1109 struct rte_mempool *mp = priv->mprq_mp;
1114 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1115 dev->data->port_id, mp->name);
1117 * If a buffer in the pool has been externally attached to a mbuf and it
1118 * is still in use by application, destroying the Rx queue can spoil
1119 * the packet. It is unlikely to happen but if application dynamically
1120 * creates and destroys with holding Rx packets, this can happen.
1122 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1123 * RQ isn't provided by application but managed by PMD.
1125 if (!rte_mempool_full(mp)) {
1127 "port %u mempool for Multi-Packet RQ is still in use",
1128 dev->data->port_id);
1132 rte_mempool_free(mp);
1133 /* Unset mempool for each Rx queue. */
1134 for (i = 0; i != priv->rxqs_n; ++i) {
1135 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1139 rxq->mprq_mp = NULL;
1141 priv->mprq_mp = NULL;
1146 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1147 * mempool. If already allocated, reuse it if there're enough elements.
1148 * Otherwise, resize it.
1151 * Pointer to Ethernet device.
1154 * 0 on success, negative errno value on failure.
1157 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1159 struct mlx5_priv *priv = dev->data->dev_private;
1160 struct rte_mempool *mp = priv->mprq_mp;
1161 char name[RTE_MEMPOOL_NAMESIZE];
1162 unsigned int desc = 0;
1163 unsigned int buf_len;
1164 unsigned int obj_num;
1165 unsigned int obj_size;
1166 unsigned int strd_num_n = 0;
1167 unsigned int strd_sz_n = 0;
1169 unsigned int n_ibv = 0;
1172 if (!mlx5_mprq_enabled(dev))
1174 /* Count the total number of descriptors configured. */
1175 for (i = 0; i != priv->rxqs_n; ++i) {
1176 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1177 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1178 (rxq, struct mlx5_rxq_ctrl, rxq);
1180 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1183 desc += 1 << rxq->elts_n;
1184 /* Get the max number of strides. */
1185 if (strd_num_n < rxq->strd_num_n)
1186 strd_num_n = rxq->strd_num_n;
1187 /* Get the max size of a stride. */
1188 if (strd_sz_n < rxq->strd_sz_n)
1189 strd_sz_n = rxq->strd_sz_n;
1191 MLX5_ASSERT(strd_num_n && strd_sz_n);
1192 buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1193 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len + (1 << strd_num_n) *
1194 sizeof(struct rte_mbuf_ext_shared_info) + RTE_PKTMBUF_HEADROOM;
1196 * Received packets can be either memcpy'd or externally referenced. In
1197 * case that the packet is attached to an mbuf as an external buffer, as
1198 * it isn't possible to predict how the buffers will be queued by
1199 * application, there's no option to exactly pre-allocate needed buffers
1200 * in advance but to speculatively prepares enough buffers.
1202 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1203 * received packets to buffers provided by application (rxq->mp) until
1204 * this Mempool gets available again.
1207 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1209 * rte_mempool_create_empty() has sanity check to refuse large cache
1210 * size compared to the number of elements.
1211 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1212 * constant number 2 instead.
1214 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1215 /* Check a mempool is already allocated and if it can be resued. */
1216 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1217 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1218 dev->data->port_id, mp->name);
1221 } else if (mp != NULL) {
1222 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1223 dev->data->port_id, mp->name);
1225 * If failed to free, which means it may be still in use, no way
1226 * but to keep using the existing one. On buffer underrun,
1227 * packets will be memcpy'd instead of external buffer
1230 if (mlx5_mprq_free_mp(dev)) {
1231 if (mp->elt_size >= obj_size)
1237 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1238 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1239 0, NULL, NULL, mlx5_mprq_buf_init,
1240 (void *)((uintptr_t)1 << strd_num_n),
1241 dev->device->numa_node, 0);
1244 "port %u failed to allocate a mempool for"
1245 " Multi-Packet RQ, count=%u, size=%u",
1246 dev->data->port_id, obj_num, obj_size);
1250 ret = mlx5_mr_mempool_register(&priv->sh->cdev->mr_scache,
1251 priv->sh->cdev->pd, mp, &priv->mp_id);
1252 if (ret < 0 && rte_errno != EEXIST) {
1254 DRV_LOG(ERR, "port %u failed to register a mempool for Multi-Packet RQ",
1255 dev->data->port_id);
1256 rte_mempool_free(mp);
1262 /* Set mempool for each Rx queue. */
1263 for (i = 0; i != priv->rxqs_n; ++i) {
1264 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1265 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1266 (rxq, struct mlx5_rxq_ctrl, rxq);
1268 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1272 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1273 dev->data->port_id);
1277 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1278 sizeof(struct rte_vlan_hdr) * 2 + \
1279 sizeof(struct rte_ipv6_hdr)))
1280 #define MAX_TCP_OPTION_SIZE 40u
1281 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1282 sizeof(struct rte_tcp_hdr) + \
1283 MAX_TCP_OPTION_SIZE))
1286 * Adjust the maximum LRO massage size.
1289 * Pointer to Ethernet device.
1292 * @param max_lro_size
1293 * The maximum size for LRO packet.
1296 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1297 uint32_t max_lro_size)
1299 struct mlx5_priv *priv = dev->data->dev_private;
1301 if (priv->config.hca_attr.lro_max_msg_sz_mode ==
1302 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1303 MLX5_MAX_TCP_HDR_OFFSET)
1304 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1305 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1306 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1307 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1308 if (priv->max_lro_msg_size)
1309 priv->max_lro_msg_size =
1310 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1312 priv->max_lro_msg_size = max_lro_size;
1314 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1315 dev->data->port_id, idx,
1316 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1320 * Create a DPDK Rx queue.
1323 * Pointer to Ethernet device.
1327 * Number of descriptors to configure in queue.
1329 * NUMA socket on which memory must be allocated.
1332 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1334 struct mlx5_rxq_ctrl *
1335 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1336 unsigned int socket, const struct rte_eth_rxconf *conf,
1337 const struct rte_eth_rxseg_split *rx_seg, uint16_t n_seg)
1339 struct mlx5_priv *priv = dev->data->dev_private;
1340 struct mlx5_rxq_ctrl *tmpl;
1341 unsigned int mb_len = rte_pktmbuf_data_room_size(rx_seg[0].mp);
1342 struct mlx5_dev_config *config = &priv->config;
1343 uint64_t offloads = conf->offloads |
1344 dev->data->dev_conf.rxmode.offloads;
1345 unsigned int lro_on_queue = !!(offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO);
1346 unsigned int max_rx_pktlen = lro_on_queue ?
1347 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1348 dev->data->mtu + (unsigned int)RTE_ETHER_HDR_LEN +
1350 unsigned int non_scatter_min_mbuf_size = max_rx_pktlen +
1351 RTE_PKTMBUF_HEADROOM;
1352 unsigned int max_lro_size = 0;
1353 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1354 const int mprq_en = mlx5_check_mprq_support(dev) > 0 && n_seg == 1 &&
1355 !rx_seg[0].offset && !rx_seg[0].length;
1356 unsigned int mprq_stride_nums = config->mprq.stride_num_n ?
1357 config->mprq.stride_num_n : MLX5_MPRQ_STRIDE_NUM_N;
1358 unsigned int mprq_stride_size = non_scatter_min_mbuf_size <=
1359 (1U << config->mprq.max_stride_size_n) ?
1360 log2above(non_scatter_min_mbuf_size) : MLX5_MPRQ_STRIDE_SIZE_N;
1361 unsigned int mprq_stride_cap = (config->mprq.stride_num_n ?
1362 (1U << config->mprq.stride_num_n) : (1U << mprq_stride_nums)) *
1363 (config->mprq.stride_size_n ?
1364 (1U << config->mprq.stride_size_n) : (1U << mprq_stride_size));
1366 * Always allocate extra slots, even if eventually
1367 * the vector Rx will not be used.
1369 uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1370 const struct rte_eth_rxseg_split *qs_seg = rx_seg;
1371 unsigned int tail_len;
1373 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
1374 sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *) +
1376 (desc >> mprq_stride_nums) * sizeof(struct mlx5_mprq_buf *),
1382 MLX5_ASSERT(n_seg && n_seg <= MLX5_MAX_RXQ_NSEG);
1384 * Build the array of actual buffer offsets and lengths.
1385 * Pad with the buffers from the last memory pool if
1386 * needed to handle max size packets, replace zero length
1387 * with the buffer length from the pool.
1389 tail_len = max_rx_pktlen;
1391 struct mlx5_eth_rxseg *hw_seg =
1392 &tmpl->rxq.rxseg[tmpl->rxq.rxseg_n];
1393 uint32_t buf_len, offset, seg_len;
1396 * For the buffers beyond descriptions offset is zero,
1397 * the first buffer contains head room.
1399 buf_len = rte_pktmbuf_data_room_size(qs_seg->mp);
1400 offset = (tmpl->rxq.rxseg_n >= n_seg ? 0 : qs_seg->offset) +
1401 (tmpl->rxq.rxseg_n ? 0 : RTE_PKTMBUF_HEADROOM);
1403 * For the buffers beyond descriptions the length is
1404 * pool buffer length, zero lengths are replaced with
1405 * pool buffer length either.
1407 seg_len = tmpl->rxq.rxseg_n >= n_seg ? buf_len :
1411 /* Check is done in long int, now overflows. */
1412 if (buf_len < seg_len + offset) {
1413 DRV_LOG(ERR, "port %u Rx queue %u: Split offset/length "
1414 "%u/%u can't be satisfied",
1415 dev->data->port_id, idx,
1416 qs_seg->length, qs_seg->offset);
1420 if (seg_len > tail_len)
1421 seg_len = buf_len - offset;
1422 if (++tmpl->rxq.rxseg_n > MLX5_MAX_RXQ_NSEG) {
1424 "port %u too many SGEs (%u) needed to handle"
1425 " requested maximum packet size %u, the maximum"
1426 " supported are %u", dev->data->port_id,
1427 tmpl->rxq.rxseg_n, max_rx_pktlen,
1429 rte_errno = ENOTSUP;
1432 /* Build the actual scattering element in the queue object. */
1433 hw_seg->mp = qs_seg->mp;
1434 MLX5_ASSERT(offset <= UINT16_MAX);
1435 MLX5_ASSERT(seg_len <= UINT16_MAX);
1436 hw_seg->offset = (uint16_t)offset;
1437 hw_seg->length = (uint16_t)seg_len;
1439 * Advance the segment descriptor, the padding is the based
1440 * on the attributes of the last descriptor.
1442 if (tmpl->rxq.rxseg_n < n_seg)
1444 tail_len -= RTE_MIN(tail_len, seg_len);
1445 } while (tail_len || !rte_is_power_of_2(tmpl->rxq.rxseg_n));
1446 MLX5_ASSERT(tmpl->rxq.rxseg_n &&
1447 tmpl->rxq.rxseg_n <= MLX5_MAX_RXQ_NSEG);
1448 if (tmpl->rxq.rxseg_n > 1 && !(offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) {
1449 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1450 " configured and no enough mbuf space(%u) to contain "
1451 "the maximum RX packet length(%u) with head-room(%u)",
1452 dev->data->port_id, idx, mb_len, max_rx_pktlen,
1453 RTE_PKTMBUF_HEADROOM);
1457 tmpl->type = MLX5_RXQ_TYPE_STANDARD;
1458 if (mlx5_mr_ctrl_init(&tmpl->rxq.mr_ctrl,
1459 &priv->sh->cdev->mr_scache.dev_gen, socket)) {
1460 /* rte_errno is already set. */
1463 tmpl->socket = socket;
1464 if (dev->data->dev_conf.intr_conf.rxq)
1467 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1468 * following conditions are met:
1469 * - MPRQ is enabled.
1470 * - The number of descs is more than the number of strides.
1471 * - max_rx_pktlen plus overhead is less than the max size
1472 * of a stride or mprq_stride_size is specified by a user.
1473 * Need to make sure that there are enough strides to encap
1474 * the maximum packet size in case mprq_stride_size is set.
1475 * Otherwise, enable Rx scatter if necessary.
1477 if (mprq_en && desc > (1U << mprq_stride_nums) &&
1478 (non_scatter_min_mbuf_size <=
1479 (1U << config->mprq.max_stride_size_n) ||
1480 (config->mprq.stride_size_n &&
1481 non_scatter_min_mbuf_size <= mprq_stride_cap))) {
1482 /* TODO: Rx scatter isn't supported yet. */
1483 tmpl->rxq.sges_n = 0;
1484 /* Trim the number of descs needed. */
1485 desc >>= mprq_stride_nums;
1486 tmpl->rxq.strd_num_n = config->mprq.stride_num_n ?
1487 config->mprq.stride_num_n : mprq_stride_nums;
1488 tmpl->rxq.strd_sz_n = config->mprq.stride_size_n ?
1489 config->mprq.stride_size_n : mprq_stride_size;
1490 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1491 tmpl->rxq.strd_scatter_en =
1492 !!(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
1493 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1494 config->mprq.max_memcpy_len);
1495 max_lro_size = RTE_MIN(max_rx_pktlen,
1496 (1u << tmpl->rxq.strd_num_n) *
1497 (1u << tmpl->rxq.strd_sz_n));
1499 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1500 " strd_num_n = %u, strd_sz_n = %u",
1501 dev->data->port_id, idx,
1502 tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1503 } else if (tmpl->rxq.rxseg_n == 1) {
1504 MLX5_ASSERT(max_rx_pktlen <= first_mb_free_size);
1505 tmpl->rxq.sges_n = 0;
1506 max_lro_size = max_rx_pktlen;
1507 } else if (offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
1508 unsigned int sges_n;
1510 if (lro_on_queue && first_mb_free_size <
1511 MLX5_MAX_LRO_HEADER_FIX) {
1512 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1513 " to include the max header size(%u) for LRO",
1514 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1515 rte_errno = ENOTSUP;
1519 * Determine the number of SGEs needed for a full packet
1520 * and round it to the next power of two.
1522 sges_n = log2above(tmpl->rxq.rxseg_n);
1523 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1525 "port %u too many SGEs (%u) needed to handle"
1526 " requested maximum packet size %u, the maximum"
1527 " supported are %u", dev->data->port_id,
1528 1 << sges_n, max_rx_pktlen,
1529 1u << MLX5_MAX_LOG_RQ_SEGS);
1530 rte_errno = ENOTSUP;
1533 tmpl->rxq.sges_n = sges_n;
1534 max_lro_size = max_rx_pktlen;
1536 if (config->mprq.enabled && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1538 "port %u MPRQ is requested but cannot be enabled\n"
1539 " (requested: pkt_sz = %u, desc_num = %u,"
1540 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1541 " supported: min_rxqs_num = %u,"
1542 " min_stride_sz = %u, max_stride_sz = %u).",
1543 dev->data->port_id, non_scatter_min_mbuf_size,
1545 config->mprq.stride_size_n ?
1546 (1U << config->mprq.stride_size_n) :
1547 (1U << mprq_stride_size),
1548 config->mprq.stride_num_n ?
1549 (1U << config->mprq.stride_num_n) :
1550 (1U << mprq_stride_nums),
1551 config->mprq.min_rxqs_num,
1552 (1U << config->mprq.min_stride_size_n),
1553 (1U << config->mprq.max_stride_size_n));
1554 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1555 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1556 if (desc % (1 << tmpl->rxq.sges_n)) {
1558 "port %u number of Rx queue descriptors (%u) is not a"
1559 " multiple of SGEs per packet (%u)",
1562 1 << tmpl->rxq.sges_n);
1566 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1567 /* Toggle RX checksum offload if hardware supports it. */
1568 tmpl->rxq.csum = !!(offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM);
1569 /* Configure Rx timestamp. */
1570 tmpl->rxq.hw_timestamp = !!(offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP);
1571 tmpl->rxq.timestamp_rx_flag = 0;
1572 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1573 &tmpl->rxq.timestamp_offset,
1574 &tmpl->rxq.timestamp_rx_flag) != 0) {
1575 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1578 /* Configure VLAN stripping. */
1579 tmpl->rxq.vlan_strip = !!(offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
1580 /* By default, FCS (CRC) is stripped by hardware. */
1581 tmpl->rxq.crc_present = 0;
1582 tmpl->rxq.lro = lro_on_queue;
1583 if (offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) {
1584 if (config->hw_fcs_strip) {
1586 * RQs used for LRO-enabled TIRs should not be
1587 * configured to scatter the FCS.
1591 "port %u CRC stripping has been "
1592 "disabled but will still be performed "
1593 "by hardware, because LRO is enabled",
1594 dev->data->port_id);
1596 tmpl->rxq.crc_present = 1;
1599 "port %u CRC stripping has been disabled but will"
1600 " still be performed by hardware, make sure MLNX_OFED"
1601 " and firmware are up to date",
1602 dev->data->port_id);
1606 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1607 " incoming frames to hide it",
1609 tmpl->rxq.crc_present ? "disabled" : "enabled",
1610 tmpl->rxq.crc_present << 2);
1612 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1613 (!!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS));
1614 tmpl->rxq.port_id = dev->data->port_id;
1616 tmpl->rxq.mp = rx_seg[0].mp;
1617 tmpl->rxq.elts_n = log2above(desc);
1618 tmpl->rxq.rq_repl_thresh =
1619 MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
1621 (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
1622 tmpl->rxq.mprq_bufs =
1623 (struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
1625 tmpl->rxq.uar_lock_cq = &priv->sh->uar_lock_cq;
1627 tmpl->rxq.idx = idx;
1628 __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1629 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1632 mlx5_mr_btree_free(&tmpl->rxq.mr_ctrl.cache_bh);
1638 * Create a DPDK Rx hairpin queue.
1641 * Pointer to Ethernet device.
1645 * Number of descriptors to configure in queue.
1646 * @param hairpin_conf
1647 * The hairpin binding configuration.
1650 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1652 struct mlx5_rxq_ctrl *
1653 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1654 const struct rte_eth_hairpin_conf *hairpin_conf)
1656 struct mlx5_priv *priv = dev->data->dev_private;
1657 struct mlx5_rxq_ctrl *tmpl;
1659 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1665 tmpl->type = MLX5_RXQ_TYPE_HAIRPIN;
1666 tmpl->socket = SOCKET_ID_ANY;
1667 tmpl->rxq.rss_hash = 0;
1668 tmpl->rxq.port_id = dev->data->port_id;
1670 tmpl->rxq.mp = NULL;
1671 tmpl->rxq.elts_n = log2above(desc);
1672 tmpl->rxq.elts = NULL;
1673 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1674 tmpl->hairpin_conf = *hairpin_conf;
1675 tmpl->rxq.idx = idx;
1676 __atomic_fetch_add(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1677 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1685 * Pointer to Ethernet device.
1690 * A pointer to the queue if it exists, NULL otherwise.
1692 struct mlx5_rxq_ctrl *
1693 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1695 struct mlx5_priv *priv = dev->data->dev_private;
1696 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1697 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1700 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1701 __atomic_fetch_add(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED);
1707 * Release a Rx queue.
1710 * Pointer to Ethernet device.
1715 * 1 while a reference on it exists, 0 when freed.
1718 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1720 struct mlx5_priv *priv = dev->data->dev_private;
1721 struct mlx5_rxq_ctrl *rxq_ctrl;
1723 if (priv->rxqs == NULL || (*priv->rxqs)[idx] == NULL)
1725 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1726 if (__atomic_sub_fetch(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED) > 1)
1728 if (rxq_ctrl->obj) {
1729 priv->obj_ops.rxq_obj_release(rxq_ctrl->obj);
1730 LIST_REMOVE(rxq_ctrl->obj, next);
1731 mlx5_free(rxq_ctrl->obj);
1732 rxq_ctrl->obj = NULL;
1734 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) {
1735 rxq_free_elts(rxq_ctrl);
1736 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
1738 if (!__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED)) {
1739 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
1740 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1741 LIST_REMOVE(rxq_ctrl, next);
1742 mlx5_free(rxq_ctrl);
1743 (*priv->rxqs)[idx] = NULL;
1749 * Verify the Rx Queue list is empty
1752 * Pointer to Ethernet device.
1755 * The number of object not released.
1758 mlx5_rxq_verify(struct rte_eth_dev *dev)
1760 struct mlx5_priv *priv = dev->data->dev_private;
1761 struct mlx5_rxq_ctrl *rxq_ctrl;
1764 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1765 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1766 dev->data->port_id, rxq_ctrl->rxq.idx);
1773 * Get a Rx queue type.
1776 * Pointer to Ethernet device.
1781 * The Rx queue type.
1784 mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx)
1786 struct mlx5_priv *priv = dev->data->dev_private;
1787 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1789 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1790 rxq_ctrl = container_of((*priv->rxqs)[idx],
1791 struct mlx5_rxq_ctrl,
1793 return rxq_ctrl->type;
1795 return MLX5_RXQ_TYPE_UNDEFINED;
1799 * Get a Rx hairpin queue configuration.
1802 * Pointer to Ethernet device.
1807 * Pointer to the configuration if a hairpin RX queue, otherwise NULL.
1809 const struct rte_eth_hairpin_conf *
1810 mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)
1812 struct mlx5_priv *priv = dev->data->dev_private;
1813 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1815 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1816 rxq_ctrl = container_of((*priv->rxqs)[idx],
1817 struct mlx5_rxq_ctrl,
1819 if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
1820 return &rxq_ctrl->hairpin_conf;
1826 * Match queues listed in arguments to queues contained in indirection table
1830 * Pointer to indirection table to match.
1832 * Queues to match to ques in indirection table.
1834 * Number of queues in the array.
1837 * 1 if all queues in indirection table match 0 othrwise.
1840 mlx5_ind_table_obj_match_queues(const struct mlx5_ind_table_obj *ind_tbl,
1841 const uint16_t *queues, uint32_t queues_n)
1843 return (ind_tbl->queues_n == queues_n) &&
1844 (!memcmp(ind_tbl->queues, queues,
1845 ind_tbl->queues_n * sizeof(ind_tbl->queues[0])));
1849 * Get an indirection table.
1852 * Pointer to Ethernet device.
1854 * Queues entering in the indirection table.
1856 * Number of queues in the array.
1859 * An indirection table if found.
1861 struct mlx5_ind_table_obj *
1862 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
1865 struct mlx5_priv *priv = dev->data->dev_private;
1866 struct mlx5_ind_table_obj *ind_tbl;
1868 rte_rwlock_read_lock(&priv->ind_tbls_lock);
1869 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1870 if ((ind_tbl->queues_n == queues_n) &&
1871 (memcmp(ind_tbl->queues, queues,
1872 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1874 __atomic_fetch_add(&ind_tbl->refcnt, 1,
1879 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
1884 * Release an indirection table.
1887 * Pointer to Ethernet device.
1889 * Indirection table to release.
1891 * Indirection table for Standalone queue.
1894 * 1 while a reference on it exists, 0 when freed.
1897 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
1898 struct mlx5_ind_table_obj *ind_tbl,
1901 struct mlx5_priv *priv = dev->data->dev_private;
1902 unsigned int i, ret;
1904 rte_rwlock_write_lock(&priv->ind_tbls_lock);
1905 ret = __atomic_sub_fetch(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
1906 if (!ret && !standalone)
1907 LIST_REMOVE(ind_tbl, next);
1908 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
1911 priv->obj_ops.ind_table_destroy(ind_tbl);
1912 for (i = 0; i != ind_tbl->queues_n; ++i)
1913 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1919 * Verify the Rx Queue list is empty
1922 * Pointer to Ethernet device.
1925 * The number of object not released.
1928 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
1930 struct mlx5_priv *priv = dev->data->dev_private;
1931 struct mlx5_ind_table_obj *ind_tbl;
1934 rte_rwlock_read_lock(&priv->ind_tbls_lock);
1935 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1937 "port %u indirection table obj %p still referenced",
1938 dev->data->port_id, (void *)ind_tbl);
1941 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
1946 * Setup an indirection table structure fields.
1949 * Pointer to Ethernet device.
1951 * Indirection table to modify.
1954 * 0 on success, a negative errno value otherwise and rte_errno is set.
1957 mlx5_ind_table_obj_setup(struct rte_eth_dev *dev,
1958 struct mlx5_ind_table_obj *ind_tbl)
1960 struct mlx5_priv *priv = dev->data->dev_private;
1961 uint32_t queues_n = ind_tbl->queues_n;
1962 uint16_t *queues = ind_tbl->queues;
1965 const unsigned int n = rte_is_power_of_2(queues_n) ?
1966 log2above(queues_n) :
1967 log2above(priv->config.ind_table_max_size);
1969 for (i = 0; i != queues_n; ++i) {
1970 if (!mlx5_rxq_get(dev, queues[i])) {
1975 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
1978 __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
1982 for (j = 0; j < i; j++)
1983 mlx5_rxq_release(dev, ind_tbl->queues[j]);
1985 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
1986 dev->data->port_id);
1991 * Create an indirection table.
1994 * Pointer to Ethernet device.
1996 * Queues entering in the indirection table.
1998 * Number of queues in the array.
2000 * Indirection table for Standalone queue.
2003 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2005 static struct mlx5_ind_table_obj *
2006 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
2007 uint32_t queues_n, bool standalone)
2009 struct mlx5_priv *priv = dev->data->dev_private;
2010 struct mlx5_ind_table_obj *ind_tbl;
2013 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
2014 queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
2019 ind_tbl->queues_n = queues_n;
2020 ind_tbl->queues = (uint16_t *)(ind_tbl + 1);
2021 memcpy(ind_tbl->queues, queues, queues_n * sizeof(*queues));
2022 ret = mlx5_ind_table_obj_setup(dev, ind_tbl);
2028 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2029 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
2030 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2036 mlx5_ind_table_obj_check_standalone(struct rte_eth_dev *dev __rte_unused,
2037 struct mlx5_ind_table_obj *ind_tbl)
2041 refcnt = __atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED);
2045 * Modification of indirection tables having more than 1
2046 * reference is unsupported.
2049 "Port %u cannot modify indirection table %p (refcnt %u > 1).",
2050 dev->data->port_id, (void *)ind_tbl, refcnt);
2056 * Modify an indirection table.
2059 * Pointer to Ethernet device.
2061 * Indirection table to modify.
2063 * Queues replacement for the indirection table.
2065 * Number of queues in the array.
2067 * Indirection table for Standalone queue.
2070 * 0 on success, a negative errno value otherwise and rte_errno is set.
2073 mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,
2074 struct mlx5_ind_table_obj *ind_tbl,
2075 uint16_t *queues, const uint32_t queues_n,
2078 struct mlx5_priv *priv = dev->data->dev_private;
2081 const unsigned int n = rte_is_power_of_2(queues_n) ?
2082 log2above(queues_n) :
2083 log2above(priv->config.ind_table_max_size);
2085 MLX5_ASSERT(standalone);
2086 RTE_SET_USED(standalone);
2087 if (mlx5_ind_table_obj_check_standalone(dev, ind_tbl) < 0)
2089 for (i = 0; i != queues_n; ++i) {
2090 if (!mlx5_rxq_get(dev, queues[i])) {
2095 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2096 ret = priv->obj_ops.ind_table_modify(dev, n, queues, queues_n, ind_tbl);
2099 for (j = 0; j < ind_tbl->queues_n; j++)
2100 mlx5_rxq_release(dev, ind_tbl->queues[j]);
2101 ind_tbl->queues_n = queues_n;
2102 ind_tbl->queues = queues;
2106 for (j = 0; j < i; j++)
2107 mlx5_rxq_release(dev, queues[j]);
2109 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2110 dev->data->port_id);
2115 * Attach an indirection table to its queues.
2118 * Pointer to Ethernet device.
2120 * Indirection table to attach.
2123 * 0 on success, a negative errno value otherwise and rte_errno is set.
2126 mlx5_ind_table_obj_attach(struct rte_eth_dev *dev,
2127 struct mlx5_ind_table_obj *ind_tbl)
2132 ret = mlx5_ind_table_obj_modify(dev, ind_tbl, ind_tbl->queues,
2133 ind_tbl->queues_n, true);
2135 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2136 dev->data->port_id, (void *)ind_tbl);
2139 for (i = 0; i < ind_tbl->queues_n; i++)
2140 mlx5_rxq_get(dev, ind_tbl->queues[i]);
2145 * Detach an indirection table from its queues.
2148 * Pointer to Ethernet device.
2150 * Indirection table to detach.
2153 * 0 on success, a negative errno value otherwise and rte_errno is set.
2156 mlx5_ind_table_obj_detach(struct rte_eth_dev *dev,
2157 struct mlx5_ind_table_obj *ind_tbl)
2159 struct mlx5_priv *priv = dev->data->dev_private;
2160 const unsigned int n = rte_is_power_of_2(ind_tbl->queues_n) ?
2161 log2above(ind_tbl->queues_n) :
2162 log2above(priv->config.ind_table_max_size);
2166 ret = mlx5_ind_table_obj_check_standalone(dev, ind_tbl);
2169 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2170 ret = priv->obj_ops.ind_table_modify(dev, n, NULL, 0, ind_tbl);
2172 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2173 dev->data->port_id, (void *)ind_tbl);
2176 for (i = 0; i < ind_tbl->queues_n; i++)
2177 mlx5_rxq_release(dev, ind_tbl->queues[i]);
2182 mlx5_hrxq_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
2185 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2186 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2187 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2189 return (hrxq->rss_key_len != rss_desc->key_len ||
2190 memcmp(hrxq->rss_key, rss_desc->key, rss_desc->key_len) ||
2191 hrxq->hash_fields != rss_desc->hash_fields ||
2192 hrxq->ind_table->queues_n != rss_desc->queue_num ||
2193 memcmp(hrxq->ind_table->queues, rss_desc->queue,
2194 rss_desc->queue_num * sizeof(rss_desc->queue[0])));
2198 * Modify an Rx Hash queue configuration.
2201 * Pointer to Ethernet device.
2203 * Index to Hash Rx queue to modify.
2205 * RSS key for the Rx hash queue.
2206 * @param rss_key_len
2208 * @param hash_fields
2209 * Verbs protocol hash field to make the RSS on.
2211 * Queues entering in hash queue. In case of empty hash_fields only the
2212 * first queue index will be taken for the indirection table.
2217 * 0 on success, a negative errno value otherwise and rte_errno is set.
2220 mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hrxq_idx,
2221 const uint8_t *rss_key, uint32_t rss_key_len,
2222 uint64_t hash_fields,
2223 const uint16_t *queues, uint32_t queues_n)
2226 struct mlx5_ind_table_obj *ind_tbl = NULL;
2227 struct mlx5_priv *priv = dev->data->dev_private;
2228 struct mlx5_hrxq *hrxq =
2229 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2237 if (hrxq->rss_key_len != rss_key_len) {
2238 /* rss_key_len is fixed size 40 byte & not supposed to change */
2242 queues_n = hash_fields ? queues_n : 1;
2243 if (mlx5_ind_table_obj_match_queues(hrxq->ind_table,
2244 queues, queues_n)) {
2245 ind_tbl = hrxq->ind_table;
2247 if (hrxq->standalone) {
2249 * Replacement of indirection table unsupported for
2250 * stanalone hrxq objects (used by shared RSS).
2252 rte_errno = ENOTSUP;
2255 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2257 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2264 MLX5_ASSERT(priv->obj_ops.hrxq_modify);
2265 ret = priv->obj_ops.hrxq_modify(dev, hrxq, rss_key,
2266 hash_fields, ind_tbl);
2271 if (ind_tbl != hrxq->ind_table) {
2272 MLX5_ASSERT(!hrxq->standalone);
2273 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2275 hrxq->ind_table = ind_tbl;
2277 hrxq->hash_fields = hash_fields;
2278 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2282 if (ind_tbl != hrxq->ind_table) {
2283 MLX5_ASSERT(!hrxq->standalone);
2284 mlx5_ind_table_obj_release(dev, ind_tbl, hrxq->standalone);
2291 __mlx5_hrxq_remove(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
2293 struct mlx5_priv *priv = dev->data->dev_private;
2295 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2296 mlx5_glue->destroy_flow_action(hrxq->action);
2298 priv->obj_ops.hrxq_destroy(hrxq);
2299 if (!hrxq->standalone) {
2300 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2303 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2307 * Release the hash Rx queue.
2310 * Pointer to Ethernet device.
2312 * Index to Hash Rx queue to release.
2315 * mlx5 list pointer.
2317 * Hash queue entry pointer.
2320 mlx5_hrxq_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2322 struct rte_eth_dev *dev = tool_ctx;
2323 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2325 __mlx5_hrxq_remove(dev, hrxq);
2328 static struct mlx5_hrxq *
2329 __mlx5_hrxq_create(struct rte_eth_dev *dev,
2330 struct mlx5_flow_rss_desc *rss_desc)
2332 struct mlx5_priv *priv = dev->data->dev_private;
2333 const uint8_t *rss_key = rss_desc->key;
2334 uint32_t rss_key_len = rss_desc->key_len;
2335 bool standalone = !!rss_desc->shared_rss;
2336 const uint16_t *queues =
2337 standalone ? rss_desc->const_q : rss_desc->queue;
2338 uint32_t queues_n = rss_desc->queue_num;
2339 struct mlx5_hrxq *hrxq = NULL;
2340 uint32_t hrxq_idx = 0;
2341 struct mlx5_ind_table_obj *ind_tbl = rss_desc->ind_tbl;
2344 queues_n = rss_desc->hash_fields ? queues_n : 1;
2346 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2348 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2352 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2355 hrxq->standalone = standalone;
2356 hrxq->idx = hrxq_idx;
2357 hrxq->ind_table = ind_tbl;
2358 hrxq->rss_key_len = rss_key_len;
2359 hrxq->hash_fields = rss_desc->hash_fields;
2360 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2361 ret = priv->obj_ops.hrxq_new(dev, hrxq, rss_desc->tunnel);
2366 if (!rss_desc->ind_tbl)
2367 mlx5_ind_table_obj_release(dev, ind_tbl, standalone);
2369 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2373 struct mlx5_list_entry *
2374 mlx5_hrxq_create_cb(void *tool_ctx, void *cb_ctx)
2376 struct rte_eth_dev *dev = tool_ctx;
2377 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2378 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2379 struct mlx5_hrxq *hrxq;
2381 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2382 return hrxq ? &hrxq->entry : NULL;
2385 struct mlx5_list_entry *
2386 mlx5_hrxq_clone_cb(void *tool_ctx, struct mlx5_list_entry *entry,
2387 void *cb_ctx __rte_unused)
2389 struct rte_eth_dev *dev = tool_ctx;
2390 struct mlx5_priv *priv = dev->data->dev_private;
2391 struct mlx5_hrxq *hrxq;
2392 uint32_t hrxq_idx = 0;
2394 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2397 memcpy(hrxq, entry, sizeof(*hrxq) + MLX5_RSS_HASH_KEY_LEN);
2398 hrxq->idx = hrxq_idx;
2399 return &hrxq->entry;
2403 mlx5_hrxq_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2405 struct rte_eth_dev *dev = tool_ctx;
2406 struct mlx5_priv *priv = dev->data->dev_private;
2407 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2409 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2413 * Get an Rx Hash queue.
2416 * Pointer to Ethernet device.
2418 * RSS configuration for the Rx hash queue.
2421 * An hash Rx queue index on success.
2423 uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,
2424 struct mlx5_flow_rss_desc *rss_desc)
2426 struct mlx5_priv *priv = dev->data->dev_private;
2427 struct mlx5_hrxq *hrxq;
2428 struct mlx5_list_entry *entry;
2429 struct mlx5_flow_cb_ctx ctx = {
2433 if (rss_desc->shared_rss) {
2434 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2436 entry = mlx5_list_register(priv->hrxqs, &ctx);
2439 hrxq = container_of(entry, typeof(*hrxq), entry);
2447 * Release the hash Rx queue.
2450 * Pointer to Ethernet device.
2452 * Index to Hash Rx queue to release.
2455 * 1 while a reference on it exists, 0 when freed.
2457 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
2459 struct mlx5_priv *priv = dev->data->dev_private;
2460 struct mlx5_hrxq *hrxq;
2462 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2465 if (!hrxq->standalone)
2466 return mlx5_list_unregister(priv->hrxqs, &hrxq->entry);
2467 __mlx5_hrxq_remove(dev, hrxq);
2472 * Create a drop Rx Hash queue.
2475 * Pointer to Ethernet device.
2478 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2481 mlx5_drop_action_create(struct rte_eth_dev *dev)
2483 struct mlx5_priv *priv = dev->data->dev_private;
2484 struct mlx5_hrxq *hrxq = NULL;
2487 if (priv->drop_queue.hrxq)
2488 return priv->drop_queue.hrxq;
2489 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
2492 "Port %u cannot allocate memory for drop queue.",
2493 dev->data->port_id);
2497 priv->drop_queue.hrxq = hrxq;
2498 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
2500 if (!hrxq->ind_table) {
2504 ret = priv->obj_ops.drop_action_create(dev);
2510 if (hrxq->ind_table)
2511 mlx5_free(hrxq->ind_table);
2512 priv->drop_queue.hrxq = NULL;
2519 * Release a drop hash Rx queue.
2522 * Pointer to Ethernet device.
2525 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
2527 struct mlx5_priv *priv = dev->data->dev_private;
2528 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2530 if (!priv->drop_queue.hrxq)
2532 priv->obj_ops.drop_action_destroy(dev);
2533 mlx5_free(priv->drop_queue.rxq);
2534 mlx5_free(hrxq->ind_table);
2536 priv->drop_queue.rxq = NULL;
2537 priv->drop_queue.hrxq = NULL;
2541 * Verify the Rx Queue list is empty
2544 * Pointer to Ethernet device.
2547 * The number of object not released.
2550 mlx5_hrxq_verify(struct rte_eth_dev *dev)
2552 struct mlx5_priv *priv = dev->data->dev_private;
2554 return mlx5_list_get_entry_num(priv->hrxqs);
2558 * Set the Rx queue timestamp conversion parameters
2561 * Pointer to the Ethernet device structure.
2564 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
2566 struct mlx5_priv *priv = dev->data->dev_private;
2567 struct mlx5_dev_ctx_shared *sh = priv->sh;
2568 struct mlx5_rxq_data *data;
2571 for (i = 0; i != priv->rxqs_n; ++i) {
2572 if (!(*priv->rxqs)[i])
2574 data = (*priv->rxqs)[i];
2576 data->rt_timestamp = priv->config.rt_timestamp;