1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
24 #include <mlx5_common.h>
25 #include <mlx5_common_mr.h>
27 #include "mlx5_defs.h"
30 #include "mlx5_utils.h"
31 #include "mlx5_autoconf.h"
32 #include "mlx5_devx.h"
33 #include "rte_pmd_mlx5.h"
36 /* Default RSS hash key also used for ConnectX-3. */
37 uint8_t rss_hash_default_key[] = {
38 0x2c, 0xc6, 0x81, 0xd1,
39 0x5b, 0xdb, 0xf4, 0xf7,
40 0xfc, 0xa2, 0x83, 0x19,
41 0xdb, 0x1a, 0x3e, 0x94,
42 0x6b, 0x9e, 0x38, 0xd9,
43 0x2c, 0x9c, 0x03, 0xd1,
44 0xad, 0x99, 0x44, 0xa7,
45 0xd9, 0x56, 0x3d, 0x59,
46 0x06, 0x3c, 0x25, 0xf3,
47 0xfc, 0x1f, 0xdc, 0x2a,
50 /* Length of the default RSS hash key. */
51 static_assert(MLX5_RSS_HASH_KEY_LEN ==
52 (unsigned int)sizeof(rss_hash_default_key),
53 "wrong RSS default key size.");
56 * Calculate the number of CQEs in CQ for the Rx queue.
59 * Pointer to receive queue structure.
62 * Number of CQEs in CQ.
65 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
68 unsigned int wqe_n = 1 << rxq_data->elts_n;
70 if (mlx5_rxq_mprq_enabled(rxq_data))
71 cqe_n = wqe_n * RTE_BIT32(rxq_data->log_strd_num) - 1;
78 * Allocate RX queue elements for Multi-Packet RQ.
81 * Pointer to RX queue structure.
84 * 0 on success, a negative errno value otherwise and rte_errno is set.
87 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
89 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
90 unsigned int wqe_n = 1 << rxq->elts_n;
94 /* Iterate on segments. */
95 for (i = 0; i <= wqe_n; ++i) {
96 struct mlx5_mprq_buf *buf;
98 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
99 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
104 (*rxq->mprq_bufs)[i] = buf;
106 rxq->mprq_repl = buf;
109 "port %u MPRQ queue %u allocated and configured %u segments",
110 rxq->port_id, rxq->idx, wqe_n);
113 err = rte_errno; /* Save rte_errno before cleanup. */
115 for (i = 0; (i != wqe_n); ++i) {
116 if ((*rxq->mprq_bufs)[i] != NULL)
117 rte_mempool_put(rxq->mprq_mp,
118 (*rxq->mprq_bufs)[i]);
119 (*rxq->mprq_bufs)[i] = NULL;
121 DRV_LOG(DEBUG, "port %u MPRQ queue %u failed, freed everything",
122 rxq->port_id, rxq->idx);
123 rte_errno = err; /* Restore rte_errno. */
128 * Allocate RX queue elements for Single-Packet RQ.
131 * Pointer to RX queue structure.
134 * 0 on success, negative errno value on failure.
137 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
139 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
140 unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
141 RTE_BIT32(rxq_ctrl->rxq.elts_n) *
142 RTE_BIT32(rxq_ctrl->rxq.log_strd_num) :
143 RTE_BIT32(rxq_ctrl->rxq.elts_n);
144 bool has_vec_support = mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0;
148 /* Iterate on segments. */
149 for (i = 0; (i != elts_n); ++i) {
150 struct mlx5_eth_rxseg *seg = &rxq_ctrl->rxq.rxseg[i % sges_n];
151 struct rte_mbuf *buf;
153 buf = rte_pktmbuf_alloc(seg->mp);
155 if (rxq_ctrl->share_group == 0)
156 DRV_LOG(ERR, "port %u queue %u empty mbuf pool",
157 RXQ_PORT_ID(rxq_ctrl),
160 DRV_LOG(ERR, "share group %u queue %u empty mbuf pool",
161 rxq_ctrl->share_group,
162 rxq_ctrl->share_qid);
166 /* Only vectored Rx routines rely on headroom size. */
167 MLX5_ASSERT(!has_vec_support ||
168 DATA_OFF(buf) >= RTE_PKTMBUF_HEADROOM);
169 /* Buffer is supposed to be empty. */
170 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
171 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
172 MLX5_ASSERT(!buf->next);
173 SET_DATA_OFF(buf, seg->offset);
174 PORT(buf) = rxq_ctrl->rxq.port_id;
175 DATA_LEN(buf) = seg->length;
176 PKT_LEN(buf) = seg->length;
178 (*rxq_ctrl->rxq.elts)[i] = buf;
180 /* If Rx vector is activated. */
181 if (has_vec_support) {
182 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
183 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
184 struct rte_pktmbuf_pool_private *priv =
185 (struct rte_pktmbuf_pool_private *)
186 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
189 /* Initialize default rearm_data for vPMD. */
190 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
191 rte_mbuf_refcnt_set(mbuf_init, 1);
192 mbuf_init->nb_segs = 1;
193 /* For shared queues port is provided in CQE */
194 mbuf_init->port = rxq->shared ? 0 : rxq->port_id;
195 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
196 mbuf_init->ol_flags = RTE_MBUF_F_EXTERNAL;
198 * prevent compiler reordering:
199 * rearm_data covers previous fields.
201 rte_compiler_barrier();
202 rxq->mbuf_initializer =
203 *(rte_xmm_t *)&mbuf_init->rearm_data;
204 /* Padding with a fake mbuf for vectorized Rx. */
205 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
206 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
208 if (rxq_ctrl->share_group == 0)
210 "port %u SPRQ queue %u allocated and configured %u segments (max %u packets)",
211 RXQ_PORT_ID(rxq_ctrl), rxq_ctrl->rxq.idx, elts_n,
212 elts_n / (1 << rxq_ctrl->rxq.sges_n));
215 "share group %u SPRQ queue %u allocated and configured %u segments (max %u packets)",
216 rxq_ctrl->share_group, rxq_ctrl->share_qid, elts_n,
217 elts_n / (1 << rxq_ctrl->rxq.sges_n));
220 err = rte_errno; /* Save rte_errno before cleanup. */
222 for (i = 0; (i != elts_n); ++i) {
223 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
224 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
225 (*rxq_ctrl->rxq.elts)[i] = NULL;
227 if (rxq_ctrl->share_group == 0)
228 DRV_LOG(DEBUG, "port %u SPRQ queue %u failed, freed everything",
229 RXQ_PORT_ID(rxq_ctrl), rxq_ctrl->rxq.idx);
231 DRV_LOG(DEBUG, "share group %u SPRQ queue %u failed, freed everything",
232 rxq_ctrl->share_group, rxq_ctrl->share_qid);
233 rte_errno = err; /* Restore rte_errno. */
238 * Allocate RX queue elements.
241 * Pointer to RX queue structure.
244 * 0 on success, negative errno value on failure.
247 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
252 * For MPRQ we need to allocate both MPRQ buffers
253 * for WQEs and simple mbufs for vector processing.
255 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
256 ret = rxq_alloc_elts_mprq(rxq_ctrl);
258 ret = rxq_alloc_elts_sprq(rxq_ctrl);
263 * Free RX queue elements for Multi-Packet RQ.
266 * Pointer to RX queue structure.
269 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
271 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
274 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing %d WRs",
275 rxq->port_id, rxq->idx, (1u << rxq->elts_n));
276 if (rxq->mprq_bufs == NULL)
278 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
279 if ((*rxq->mprq_bufs)[i] != NULL)
280 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
281 (*rxq->mprq_bufs)[i] = NULL;
283 if (rxq->mprq_repl != NULL) {
284 mlx5_mprq_buf_free(rxq->mprq_repl);
285 rxq->mprq_repl = NULL;
290 * Free RX queue elements for Single-Packet RQ.
293 * Pointer to RX queue structure.
296 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
298 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
299 const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
300 RTE_BIT32(rxq->elts_n) * RTE_BIT32(rxq->log_strd_num) :
301 RTE_BIT32(rxq->elts_n);
302 const uint16_t q_mask = q_n - 1;
303 uint16_t elts_ci = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
304 rxq->elts_ci : rxq->rq_ci;
305 uint16_t used = q_n - (elts_ci - rxq->rq_pi);
308 if (rxq_ctrl->share_group == 0)
309 DRV_LOG(DEBUG, "port %u Rx queue %u freeing %d WRs",
310 RXQ_PORT_ID(rxq_ctrl), rxq->idx, q_n);
312 DRV_LOG(DEBUG, "share group %u Rx queue %u freeing %d WRs",
313 rxq_ctrl->share_group, rxq_ctrl->share_qid, q_n);
314 if (rxq->elts == NULL)
317 * Some mbuf in the Ring belongs to the application.
318 * They cannot be freed.
320 if (mlx5_rxq_check_vec_support(rxq) > 0) {
321 for (i = 0; i < used; ++i)
322 (*rxq->elts)[(elts_ci + i) & q_mask] = NULL;
323 rxq->rq_pi = elts_ci;
325 for (i = 0; i != q_n; ++i) {
326 if ((*rxq->elts)[i] != NULL)
327 rte_pktmbuf_free_seg((*rxq->elts)[i]);
328 (*rxq->elts)[i] = NULL;
333 * Free RX queue elements.
336 * Pointer to RX queue structure.
339 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
342 * For MPRQ we need to allocate both MPRQ buffers
343 * for WQEs and simple mbufs for vector processing.
345 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
346 rxq_free_elts_mprq(rxq_ctrl);
347 rxq_free_elts_sprq(rxq_ctrl);
351 * Returns the per-queue supported offloads.
354 * Pointer to Ethernet device.
357 * Supported Rx offloads.
360 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
362 struct mlx5_priv *priv = dev->data->dev_private;
363 uint64_t offloads = (RTE_ETH_RX_OFFLOAD_SCATTER |
364 RTE_ETH_RX_OFFLOAD_TIMESTAMP |
365 RTE_ETH_RX_OFFLOAD_RSS_HASH);
367 if (!priv->config.mprq.enabled)
368 offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
369 if (priv->sh->config.hw_fcs_strip)
370 offloads |= RTE_ETH_RX_OFFLOAD_KEEP_CRC;
371 if (priv->sh->dev_cap.hw_csum)
372 offloads |= (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
373 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
374 RTE_ETH_RX_OFFLOAD_TCP_CKSUM);
375 if (priv->sh->dev_cap.hw_vlan_strip)
376 offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
377 if (priv->sh->dev_cap.lro_supported)
378 offloads |= RTE_ETH_RX_OFFLOAD_TCP_LRO;
384 * Returns the per-port supported offloads.
387 * Supported Rx offloads.
390 mlx5_get_rx_port_offloads(void)
392 uint64_t offloads = RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
398 * Verify if the queue can be released.
401 * Pointer to Ethernet device.
406 * 1 if the queue can be released
407 * 0 if the queue can not be released, there are references to it.
408 * Negative errno and rte_errno is set if queue doesn't exist.
411 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
413 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
419 return (__atomic_load_n(&rxq->refcnt, __ATOMIC_RELAXED) == 1);
422 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
424 rxq_sync_cq(struct mlx5_rxq_data *rxq)
426 const uint16_t cqe_n = 1 << rxq->cqe_n;
427 const uint16_t cqe_mask = cqe_n - 1;
428 volatile struct mlx5_cqe *cqe;
433 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
434 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
435 if (ret == MLX5_CQE_STATUS_HW_OWN)
437 if (ret == MLX5_CQE_STATUS_ERR) {
441 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
442 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
446 /* Compute the next non compressed CQE. */
447 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
450 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
451 for (i = 0; i < cqe_n; i++) {
452 cqe = &(*rxq->cqes)[i];
453 cqe->op_own = MLX5_CQE_INVALIDATE;
455 /* Resync CQE and WQE (WQ in RESET state). */
457 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
459 *rxq->rq_db = rte_cpu_to_be_32(0);
464 * Rx queue stop. Device queue goes to the RESET state,
465 * all involved mbufs are freed from WQ.
468 * Pointer to Ethernet device structure.
473 * 0 on success, a negative errno value otherwise and rte_errno is set.
476 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
478 struct mlx5_priv *priv = dev->data->dev_private;
479 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
480 struct mlx5_rxq_ctrl *rxq_ctrl = rxq->ctrl;
483 MLX5_ASSERT(rxq != NULL && rxq_ctrl != NULL);
484 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
485 ret = priv->obj_ops.rxq_obj_modify(rxq, MLX5_RXQ_MOD_RDY2RST);
487 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
492 /* Remove all processes CQEs. */
493 rxq_sync_cq(&rxq_ctrl->rxq);
494 /* Free all involved mbufs. */
495 rxq_free_elts(rxq_ctrl);
496 /* Set the actual queue state. */
497 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
502 * Rx queue stop. Device queue goes to the RESET state,
503 * all involved mbufs are freed from WQ.
506 * Pointer to Ethernet device structure.
511 * 0 on success, a negative errno value otherwise and rte_errno is set.
514 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
516 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
519 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
520 DRV_LOG(ERR, "Hairpin queue can't be stopped");
524 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
527 * Vectorized Rx burst requires the CQ and RQ indices
528 * synchronized, that might be broken on RQ restart
529 * and cause Rx malfunction, so queue stopping is
530 * not supported if vectorized Rx burst is engaged.
531 * The routine pointer depends on the process
532 * type, should perform check there.
534 if (pkt_burst == mlx5_rx_burst_vec) {
535 DRV_LOG(ERR, "Rx queue stop is not supported "
536 "for vectorized Rx");
540 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
541 ret = mlx5_mp_os_req_queue_control(dev, idx,
542 MLX5_MP_REQ_QUEUE_RX_STOP);
544 ret = mlx5_rx_queue_stop_primary(dev, idx);
550 * Rx queue start. Device queue goes to the ready state,
551 * all required mbufs are allocated and WQ is replenished.
554 * Pointer to Ethernet device structure.
559 * 0 on success, a negative errno value otherwise and rte_errno is set.
562 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
564 struct mlx5_priv *priv = dev->data->dev_private;
565 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
566 struct mlx5_rxq_data *rxq_data = &rxq->ctrl->rxq;
569 MLX5_ASSERT(rxq != NULL && rxq->ctrl != NULL);
570 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
571 /* Allocate needed buffers. */
572 ret = rxq_alloc_elts(rxq->ctrl);
574 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
579 *rxq_data->cq_db = rte_cpu_to_be_32(rxq_data->cq_ci);
581 /* Reset RQ consumer before moving queue to READY state. */
582 *rxq_data->rq_db = rte_cpu_to_be_32(0);
584 ret = priv->obj_ops.rxq_obj_modify(rxq, MLX5_RXQ_MOD_RST2RDY);
586 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
591 /* Reinitialize RQ - set WQEs. */
592 mlx5_rxq_initialize(rxq_data);
593 rxq_data->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
594 /* Set actual queue state. */
595 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
600 * Rx queue start. Device queue goes to the ready state,
601 * all required mbufs are allocated and WQ is replenished.
604 * Pointer to Ethernet device structure.
609 * 0 on success, a negative errno value otherwise and rte_errno is set.
612 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
616 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
617 DRV_LOG(ERR, "Hairpin queue can't be started");
621 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
623 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
624 ret = mlx5_mp_os_req_queue_control(dev, idx,
625 MLX5_MP_REQ_QUEUE_RX_START);
627 ret = mlx5_rx_queue_start_primary(dev, idx);
633 * Rx queue presetup checks.
636 * Pointer to Ethernet device structure.
640 * Number of descriptors to configure in queue.
641 * @param[out] rxq_ctrl
642 * Address of pointer to shared Rx queue control.
645 * 0 on success, a negative errno value otherwise and rte_errno is set.
648 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc,
649 struct mlx5_rxq_ctrl **rxq_ctrl)
651 struct mlx5_priv *priv = dev->data->dev_private;
652 struct mlx5_rxq_priv *rxq;
655 if (!rte_is_power_of_2(*desc)) {
656 *desc = 1 << log2above(*desc);
658 "port %u increased number of descriptors in Rx queue %u"
659 " to the next power of two (%d)",
660 dev->data->port_id, idx, *desc);
662 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
663 dev->data->port_id, idx, *desc);
664 if (idx >= priv->rxqs_n) {
665 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
666 dev->data->port_id, idx, priv->rxqs_n);
667 rte_errno = EOVERFLOW;
670 if (rxq_ctrl == NULL || *rxq_ctrl == NULL)
672 if (!(*rxq_ctrl)->rxq.shared) {
673 if (!mlx5_rxq_releasable(dev, idx)) {
674 DRV_LOG(ERR, "port %u unable to release queue index %u",
675 dev->data->port_id, idx);
679 mlx5_rxq_release(dev, idx);
681 if ((*rxq_ctrl)->obj != NULL)
682 /* Some port using shared Rx queue has been started. */
684 /* Release all owner RxQ to reconfigure Shared RxQ. */
686 rxq = LIST_FIRST(&(*rxq_ctrl)->owners);
687 LIST_REMOVE(rxq, owner_entry);
688 empty = LIST_EMPTY(&(*rxq_ctrl)->owners);
689 mlx5_rxq_release(ETH_DEV(rxq->priv), rxq->idx);
697 * Get the shared Rx queue object that matches group and queue index.
700 * Pointer to Ethernet device structure.
704 * Shared RX queue index.
707 * Shared RXQ object that matching, or NULL if not found.
709 static struct mlx5_rxq_ctrl *
710 mlx5_shared_rxq_get(struct rte_eth_dev *dev, uint32_t group, uint16_t share_qid)
712 struct mlx5_rxq_ctrl *rxq_ctrl;
713 struct mlx5_priv *priv = dev->data->dev_private;
715 LIST_FOREACH(rxq_ctrl, &priv->sh->shared_rxqs, share_entry) {
716 if (rxq_ctrl->share_group == group &&
717 rxq_ctrl->share_qid == share_qid)
724 * Check whether requested Rx queue configuration matches shared RXQ.
727 * Pointer to shared RXQ.
729 * Pointer to Ethernet device structure.
733 * Number of descriptors to configure in queue.
735 * NUMA socket on which memory must be allocated.
737 * Thresholds parameters.
739 * Memory pool for buffer allocations.
742 * 0 on success, a negative errno value otherwise and rte_errno is set.
745 mlx5_shared_rxq_match(struct mlx5_rxq_ctrl *rxq_ctrl, struct rte_eth_dev *dev,
746 uint16_t idx, uint16_t desc, unsigned int socket,
747 const struct rte_eth_rxconf *conf,
748 struct rte_mempool *mp)
750 struct mlx5_priv *spriv = LIST_FIRST(&rxq_ctrl->owners)->priv;
751 struct mlx5_priv *priv = dev->data->dev_private;
755 if (rxq_ctrl->socket != socket) {
756 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: socket mismatch",
757 dev->data->port_id, idx);
760 if (rxq_ctrl->rxq.elts_n != log2above(desc)) {
761 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: descriptor number mismatch",
762 dev->data->port_id, idx);
765 if (priv->mtu != spriv->mtu) {
766 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: mtu mismatch",
767 dev->data->port_id, idx);
770 if (priv->dev_data->dev_conf.intr_conf.rxq !=
771 spriv->dev_data->dev_conf.intr_conf.rxq) {
772 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: interrupt mismatch",
773 dev->data->port_id, idx);
776 if (mp != NULL && rxq_ctrl->rxq.mp != mp) {
777 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: mempool mismatch",
778 dev->data->port_id, idx);
780 } else if (mp == NULL) {
781 if (conf->rx_nseg != rxq_ctrl->rxseg_n) {
782 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: segment number mismatch",
783 dev->data->port_id, idx);
786 for (i = 0; i < conf->rx_nseg; i++) {
787 if (memcmp(&conf->rx_seg[i].split, &rxq_ctrl->rxseg[i],
788 sizeof(struct rte_eth_rxseg_split))) {
789 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: segment %u configuration mismatch",
790 dev->data->port_id, idx, i);
795 if (priv->config.hw_padding != spriv->config.hw_padding) {
796 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: padding mismatch",
797 dev->data->port_id, idx);
800 if (priv->config.cqe_comp != spriv->config.cqe_comp ||
801 (priv->config.cqe_comp &&
802 priv->config.cqe_comp_fmt != spriv->config.cqe_comp_fmt)) {
803 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: CQE compression mismatch",
804 dev->data->port_id, idx);
813 * Pointer to Ethernet device structure.
817 * Number of descriptors to configure in queue.
819 * NUMA socket on which memory must be allocated.
821 * Thresholds parameters.
823 * Memory pool for buffer allocations.
826 * 0 on success, a negative errno value otherwise and rte_errno is set.
829 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
830 unsigned int socket, const struct rte_eth_rxconf *conf,
831 struct rte_mempool *mp)
833 struct mlx5_priv *priv = dev->data->dev_private;
834 struct mlx5_rxq_priv *rxq;
835 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
836 struct rte_eth_rxseg_split *rx_seg =
837 (struct rte_eth_rxseg_split *)conf->rx_seg;
838 struct rte_eth_rxseg_split rx_single = {.mp = mp};
839 uint16_t n_seg = conf->rx_nseg;
841 uint64_t offloads = conf->offloads |
842 dev->data->dev_conf.rxmode.offloads;
843 bool is_extmem = false;
847 * The parameters should be checked on rte_eth_dev layer.
848 * If mp is specified it means the compatible configuration
849 * without buffer split feature tuning.
853 is_extmem = rte_pktmbuf_priv_flags(mp) &
854 RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF;
857 /* The offloads should be checked on rte_eth_dev layer. */
858 MLX5_ASSERT(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
859 if (!(offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) {
860 DRV_LOG(ERR, "port %u queue index %u split "
861 "offload not configured",
862 dev->data->port_id, idx);
866 MLX5_ASSERT(n_seg < MLX5_MAX_RXQ_NSEG);
868 if (conf->share_group > 0) {
869 if (!priv->sh->cdev->config.hca_attr.mem_rq_rmp) {
870 DRV_LOG(ERR, "port %u queue index %u shared Rx queue not supported by fw",
871 dev->data->port_id, idx);
875 if (priv->obj_ops.rxq_obj_new != devx_obj_ops.rxq_obj_new) {
876 DRV_LOG(ERR, "port %u queue index %u shared Rx queue needs DevX api",
877 dev->data->port_id, idx);
881 if (conf->share_qid >= priv->rxqs_n) {
882 DRV_LOG(ERR, "port %u shared Rx queue index %u > number of Rx queues %u",
883 dev->data->port_id, conf->share_qid,
888 if (priv->config.mprq.enabled) {
889 DRV_LOG(ERR, "port %u shared Rx queue index %u: not supported when MPRQ enabled",
890 dev->data->port_id, conf->share_qid);
894 /* Try to reuse shared RXQ. */
895 rxq_ctrl = mlx5_shared_rxq_get(dev, conf->share_group,
897 if (rxq_ctrl != NULL &&
898 !mlx5_shared_rxq_match(rxq_ctrl, dev, idx, desc, socket,
904 res = mlx5_rx_queue_pre_setup(dev, idx, &desc, &rxq_ctrl);
908 rxq = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*rxq), 0,
911 DRV_LOG(ERR, "port %u unable to allocate rx queue index %u private data",
912 dev->data->port_id, idx);
916 if (rxq_ctrl == NULL) {
917 rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, rx_seg,
919 if (rxq_ctrl == NULL) {
920 DRV_LOG(ERR, "port %u unable to allocate rx queue index %u",
921 dev->data->port_id, idx);
929 (*priv->rxq_privs)[idx] = rxq;
930 /* Join owner list. */
931 LIST_INSERT_HEAD(&rxq_ctrl->owners, rxq, owner_entry);
932 rxq->ctrl = rxq_ctrl;
933 mlx5_rxq_ref(dev, idx);
934 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
935 dev->data->port_id, idx);
936 dev->data->rx_queues[idx] = &rxq_ctrl->rxq;
943 * Pointer to Ethernet device structure.
947 * Number of descriptors to configure in queue.
948 * @param hairpin_conf
949 * Hairpin configuration parameters.
952 * 0 on success, a negative errno value otherwise and rte_errno is set.
955 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
957 const struct rte_eth_hairpin_conf *hairpin_conf)
959 struct mlx5_priv *priv = dev->data->dev_private;
960 struct mlx5_rxq_priv *rxq;
961 struct mlx5_rxq_ctrl *rxq_ctrl;
964 res = mlx5_rx_queue_pre_setup(dev, idx, &desc, NULL);
967 if (hairpin_conf->peer_count != 1) {
969 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue index %u"
970 " peer count is %u", dev->data->port_id,
971 idx, hairpin_conf->peer_count);
974 if (hairpin_conf->peers[0].port == dev->data->port_id) {
975 if (hairpin_conf->peers[0].queue >= priv->txqs_n) {
977 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
978 " index %u, Tx %u is larger than %u",
979 dev->data->port_id, idx,
980 hairpin_conf->peers[0].queue, priv->txqs_n);
984 if (hairpin_conf->manual_bind == 0 ||
985 hairpin_conf->tx_explicit == 0) {
987 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
988 " index %u peer port %u with attributes %u %u",
989 dev->data->port_id, idx,
990 hairpin_conf->peers[0].port,
991 hairpin_conf->manual_bind,
992 hairpin_conf->tx_explicit);
996 rxq = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*rxq), 0,
999 DRV_LOG(ERR, "port %u unable to allocate hairpin rx queue index %u private data",
1000 dev->data->port_id, idx);
1006 (*priv->rxq_privs)[idx] = rxq;
1007 rxq_ctrl = mlx5_rxq_hairpin_new(dev, rxq, desc, hairpin_conf);
1009 DRV_LOG(ERR, "port %u unable to allocate hairpin queue index %u",
1010 dev->data->port_id, idx);
1012 (*priv->rxq_privs)[idx] = NULL;
1016 DRV_LOG(DEBUG, "port %u adding hairpin Rx queue %u to list",
1017 dev->data->port_id, idx);
1018 dev->data->rx_queues[idx] = &rxq_ctrl->rxq;
1023 * DPDK callback to release a RX queue.
1026 * Pointer to Ethernet device structure.
1028 * Receive queue index.
1031 mlx5_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
1033 struct mlx5_rxq_data *rxq = dev->data->rx_queues[qid];
1037 if (!mlx5_rxq_releasable(dev, qid))
1038 rte_panic("port %u Rx queue %u is still used by a flow and"
1039 " cannot be removed\n", dev->data->port_id, qid);
1040 mlx5_rxq_release(dev, qid);
1044 * Allocate queue vector and fill epoll fd list for Rx interrupts.
1047 * Pointer to Ethernet device.
1050 * 0 on success, a negative errno value otherwise and rte_errno is set.
1053 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
1055 struct mlx5_priv *priv = dev->data->dev_private;
1057 unsigned int rxqs_n = priv->rxqs_n;
1058 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
1059 unsigned int count = 0;
1060 struct rte_intr_handle *intr_handle = dev->intr_handle;
1062 if (!dev->data->dev_conf.intr_conf.rxq)
1064 mlx5_rx_intr_vec_disable(dev);
1065 if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
1067 "port %u failed to allocate memory for interrupt"
1068 " vector, Rx interrupts will not be supported",
1069 dev->data->port_id);
1074 if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))
1077 for (i = 0; i != n; ++i) {
1078 /* This rxq obj must not be released in this function. */
1079 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1080 struct mlx5_rxq_obj *rxq_obj = rxq ? rxq->ctrl->obj : NULL;
1083 /* Skip queues that cannot request interrupts. */
1084 if (!rxq_obj || (!rxq_obj->ibv_channel &&
1085 !rxq_obj->devx_channel)) {
1086 /* Use invalid intr_vec[] index to disable entry. */
1087 if (rte_intr_vec_list_index_set(intr_handle, i,
1088 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
1092 mlx5_rxq_ref(dev, i);
1093 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
1095 "port %u too many Rx queues for interrupt"
1096 " vector size (%d), Rx interrupts cannot be"
1098 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
1099 mlx5_rx_intr_vec_disable(dev);
1103 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
1107 "port %u failed to make Rx interrupt file"
1108 " descriptor %d non-blocking for queue index"
1110 dev->data->port_id, rxq_obj->fd, i);
1111 mlx5_rx_intr_vec_disable(dev);
1115 if (rte_intr_vec_list_index_set(intr_handle, i,
1116 RTE_INTR_VEC_RXTX_OFFSET + count))
1118 if (rte_intr_efds_index_set(intr_handle, count,
1124 mlx5_rx_intr_vec_disable(dev);
1125 else if (rte_intr_nb_efd_set(intr_handle, count))
1131 * Clean up Rx interrupts handler.
1134 * Pointer to Ethernet device.
1137 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
1139 struct mlx5_priv *priv = dev->data->dev_private;
1140 struct rte_intr_handle *intr_handle = dev->intr_handle;
1142 unsigned int rxqs_n = priv->rxqs_n;
1143 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
1145 if (!dev->data->dev_conf.intr_conf.rxq)
1147 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0)
1149 for (i = 0; i != n; ++i) {
1150 if (rte_intr_vec_list_index_get(intr_handle, i) ==
1151 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID)
1154 * Need to access directly the queue to release the reference
1155 * kept in mlx5_rx_intr_vec_enable().
1157 mlx5_rxq_deref(dev, i);
1160 rte_intr_free_epoll_fd(intr_handle);
1162 rte_intr_vec_list_free(intr_handle);
1164 rte_intr_nb_efd_set(intr_handle, 0);
1168 * MLX5 CQ notification .
1171 * Pointer to receive queue structure.
1173 * Sequence number per receive queue .
1176 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
1179 uint32_t doorbell_hi;
1182 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
1183 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
1184 doorbell = (uint64_t)doorbell_hi << 32;
1185 doorbell |= rxq->cqn;
1186 mlx5_doorbell_ring(&rxq->uar_data, rte_cpu_to_be_64(doorbell),
1187 doorbell_hi, &rxq->cq_db[MLX5_CQ_ARM_DB], 0);
1191 * DPDK callback for Rx queue interrupt enable.
1194 * Pointer to Ethernet device structure.
1195 * @param rx_queue_id
1199 * 0 on success, a negative errno value otherwise and rte_errno is set.
1202 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1204 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, rx_queue_id);
1207 if (rxq->ctrl->irq) {
1208 if (!rxq->ctrl->obj)
1210 mlx5_arm_cq(&rxq->ctrl->rxq, rxq->ctrl->rxq.cq_arm_sn);
1219 * DPDK callback for Rx queue interrupt disable.
1222 * Pointer to Ethernet device structure.
1223 * @param rx_queue_id
1227 * 0 on success, a negative errno value otherwise and rte_errno is set.
1230 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1232 struct mlx5_priv *priv = dev->data->dev_private;
1233 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, rx_queue_id);
1240 if (!rxq->ctrl->obj)
1242 if (rxq->ctrl->irq) {
1243 ret = priv->obj_ops.rxq_event_get(rxq->ctrl->obj);
1246 rxq->ctrl->rxq.cq_arm_sn++;
1251 * The ret variable may be EAGAIN which means the get_event function was
1252 * called before receiving one.
1258 if (rte_errno != EAGAIN)
1259 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1260 dev->data->port_id, rx_queue_id);
1265 * Verify the Rx queue objects list is empty
1268 * Pointer to Ethernet device.
1271 * The number of objects not released.
1274 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1276 struct mlx5_priv *priv = dev->data->dev_private;
1278 struct mlx5_rxq_obj *rxq_obj;
1280 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1281 if (rxq_obj->rxq_ctrl == NULL)
1283 if (rxq_obj->rxq_ctrl->rxq.shared &&
1284 !LIST_EMPTY(&rxq_obj->rxq_ctrl->owners))
1286 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1287 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1294 * Callback function to initialize mbufs for Multi-Packet RQ.
1297 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1298 void *_m, unsigned int i __rte_unused)
1300 struct mlx5_mprq_buf *buf = _m;
1301 struct rte_mbuf_ext_shared_info *shinfo;
1302 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1305 memset(_m, 0, sizeof(*buf));
1307 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1308 for (j = 0; j != strd_n; ++j) {
1309 shinfo = &buf->shinfos[j];
1310 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1311 shinfo->fcb_opaque = buf;
1316 * Free mempool of Multi-Packet RQ.
1319 * Pointer to Ethernet device.
1322 * 0 on success, negative errno value on failure.
1325 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1327 struct mlx5_priv *priv = dev->data->dev_private;
1328 struct rte_mempool *mp = priv->mprq_mp;
1333 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1334 dev->data->port_id, mp->name);
1336 * If a buffer in the pool has been externally attached to a mbuf and it
1337 * is still in use by application, destroying the Rx queue can spoil
1338 * the packet. It is unlikely to happen but if application dynamically
1339 * creates and destroys with holding Rx packets, this can happen.
1341 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1342 * RQ isn't provided by application but managed by PMD.
1344 if (!rte_mempool_full(mp)) {
1346 "port %u mempool for Multi-Packet RQ is still in use",
1347 dev->data->port_id);
1351 rte_mempool_free(mp);
1352 /* Unset mempool for each Rx queue. */
1353 for (i = 0; i != priv->rxqs_n; ++i) {
1354 struct mlx5_rxq_data *rxq = mlx5_rxq_data_get(dev, i);
1358 rxq->mprq_mp = NULL;
1360 priv->mprq_mp = NULL;
1365 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1366 * mempool. If already allocated, reuse it if there're enough elements.
1367 * Otherwise, resize it.
1370 * Pointer to Ethernet device.
1373 * 0 on success, negative errno value on failure.
1376 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1378 struct mlx5_priv *priv = dev->data->dev_private;
1379 struct rte_mempool *mp = priv->mprq_mp;
1380 char name[RTE_MEMPOOL_NAMESIZE];
1381 unsigned int desc = 0;
1382 unsigned int buf_len;
1383 unsigned int obj_num;
1384 unsigned int obj_size;
1385 unsigned int log_strd_num = 0;
1386 unsigned int log_strd_sz = 0;
1388 unsigned int n_ibv = 0;
1391 if (!mlx5_mprq_enabled(dev))
1393 /* Count the total number of descriptors configured. */
1394 for (i = 0; i != priv->rxqs_n; ++i) {
1395 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
1396 struct mlx5_rxq_data *rxq;
1398 if (rxq_ctrl == NULL || rxq_ctrl->is_hairpin)
1400 rxq = &rxq_ctrl->rxq;
1402 desc += 1 << rxq->elts_n;
1403 /* Get the max number of strides. */
1404 if (log_strd_num < rxq->log_strd_num)
1405 log_strd_num = rxq->log_strd_num;
1406 /* Get the max size of a stride. */
1407 if (log_strd_sz < rxq->log_strd_sz)
1408 log_strd_sz = rxq->log_strd_sz;
1410 MLX5_ASSERT(log_strd_num && log_strd_sz);
1411 buf_len = RTE_BIT32(log_strd_num) * RTE_BIT32(log_strd_sz);
1412 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len +
1413 RTE_BIT32(log_strd_num) *
1414 sizeof(struct rte_mbuf_ext_shared_info) +
1415 RTE_PKTMBUF_HEADROOM;
1417 * Received packets can be either memcpy'd or externally referenced. In
1418 * case that the packet is attached to an mbuf as an external buffer, as
1419 * it isn't possible to predict how the buffers will be queued by
1420 * application, there's no option to exactly pre-allocate needed buffers
1421 * in advance but to speculatively prepares enough buffers.
1423 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1424 * received packets to buffers provided by application (rxq->mp) until
1425 * this Mempool gets available again.
1428 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1430 * rte_mempool_create_empty() has sanity check to refuse large cache
1431 * size compared to the number of elements.
1432 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1433 * constant number 2 instead.
1435 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1436 /* Check a mempool is already allocated and if it can be resued. */
1437 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1438 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1439 dev->data->port_id, mp->name);
1442 } else if (mp != NULL) {
1443 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1444 dev->data->port_id, mp->name);
1446 * If failed to free, which means it may be still in use, no way
1447 * but to keep using the existing one. On buffer underrun,
1448 * packets will be memcpy'd instead of external buffer
1451 if (mlx5_mprq_free_mp(dev)) {
1452 if (mp->elt_size >= obj_size)
1458 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1459 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1460 0, NULL, NULL, mlx5_mprq_buf_init,
1461 (void *)((uintptr_t)1 << log_strd_num),
1462 dev->device->numa_node, 0);
1465 "port %u failed to allocate a mempool for"
1466 " Multi-Packet RQ, count=%u, size=%u",
1467 dev->data->port_id, obj_num, obj_size);
1471 ret = mlx5_mr_mempool_register(priv->sh->cdev, mp, false);
1472 if (ret < 0 && rte_errno != EEXIST) {
1474 DRV_LOG(ERR, "port %u failed to register a mempool for Multi-Packet RQ",
1475 dev->data->port_id);
1476 rte_mempool_free(mp);
1482 /* Set mempool for each Rx queue. */
1483 for (i = 0; i != priv->rxqs_n; ++i) {
1484 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
1486 if (rxq_ctrl == NULL || rxq_ctrl->is_hairpin)
1488 rxq_ctrl->rxq.mprq_mp = mp;
1490 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1491 dev->data->port_id);
1495 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1496 sizeof(struct rte_vlan_hdr) * 2 + \
1497 sizeof(struct rte_ipv6_hdr)))
1498 #define MAX_TCP_OPTION_SIZE 40u
1499 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1500 sizeof(struct rte_tcp_hdr) + \
1501 MAX_TCP_OPTION_SIZE))
1504 * Adjust the maximum LRO massage size.
1507 * Pointer to Ethernet device.
1510 * @param max_lro_size
1511 * The maximum size for LRO packet.
1514 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1515 uint32_t max_lro_size)
1517 struct mlx5_priv *priv = dev->data->dev_private;
1519 if (priv->sh->cdev->config.hca_attr.lro_max_msg_sz_mode ==
1520 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1521 MLX5_MAX_TCP_HDR_OFFSET)
1522 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1523 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1524 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1525 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1526 if (priv->max_lro_msg_size)
1527 priv->max_lro_msg_size =
1528 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1530 priv->max_lro_msg_size = max_lro_size;
1532 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1533 dev->data->port_id, idx,
1534 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1538 * Prepare both size and number of stride for Multi-Packet RQ.
1541 * Pointer to Ethernet device.
1545 * Number of descriptors to configure in queue.
1547 * Indicator if Rx segment enables, if so Multi-Packet RQ doesn't enable.
1548 * @param min_mbuf_size
1549 * Non scatter min mbuf size, max_rx_pktlen plus overhead.
1550 * @param actual_log_stride_num
1551 * Log number of strides to configure for this queue.
1552 * @param actual_log_stride_size
1553 * Log stride size to configure for this queue.
1555 * Is external pinned memory pool used.
1557 * 0 if Multi-Packet RQ is supported, otherwise -1.
1560 mlx5_mprq_prepare(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1561 bool rx_seg_en, uint32_t min_mbuf_size,
1562 uint32_t *actual_log_stride_num,
1563 uint32_t *actual_log_stride_size,
1566 struct mlx5_priv *priv = dev->data->dev_private;
1567 struct mlx5_port_config *config = &priv->config;
1568 struct mlx5_dev_cap *dev_cap = &priv->sh->dev_cap;
1569 uint32_t log_min_stride_num = dev_cap->mprq.log_min_stride_num;
1570 uint32_t log_max_stride_num = dev_cap->mprq.log_max_stride_num;
1571 uint32_t log_def_stride_num =
1572 RTE_MIN(RTE_MAX(MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM,
1573 log_min_stride_num),
1574 log_max_stride_num);
1575 uint32_t log_min_stride_size = dev_cap->mprq.log_min_stride_size;
1576 uint32_t log_max_stride_size = dev_cap->mprq.log_max_stride_size;
1577 uint32_t log_def_stride_size =
1578 RTE_MIN(RTE_MAX(MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE,
1579 log_min_stride_size),
1580 log_max_stride_size);
1581 uint32_t log_stride_wqe_size;
1583 if (mlx5_check_mprq_support(dev) != 1 || rx_seg_en || is_extmem)
1585 /* Checks if chosen number of strides is in supported range. */
1586 if (config->mprq.log_stride_num > log_max_stride_num ||
1587 config->mprq.log_stride_num < log_min_stride_num) {
1588 *actual_log_stride_num = log_def_stride_num;
1590 "Port %u Rx queue %u number of strides for Multi-Packet RQ is out of range, setting default value (%u)",
1591 dev->data->port_id, idx, RTE_BIT32(log_def_stride_num));
1593 *actual_log_stride_num = config->mprq.log_stride_num;
1595 if (config->mprq.log_stride_size) {
1596 /* Checks if chosen size of stride is in supported range. */
1597 if (config->mprq.log_stride_size > log_max_stride_size ||
1598 config->mprq.log_stride_size < log_min_stride_size) {
1599 *actual_log_stride_size = log_def_stride_size;
1601 "Port %u Rx queue %u size of a stride for Multi-Packet RQ is out of range, setting default value (%u)",
1602 dev->data->port_id, idx,
1603 RTE_BIT32(log_def_stride_size));
1605 *actual_log_stride_size = config->mprq.log_stride_size;
1608 if (min_mbuf_size <= RTE_BIT32(log_max_stride_size))
1609 *actual_log_stride_size = log2above(min_mbuf_size);
1613 log_stride_wqe_size = *actual_log_stride_num + *actual_log_stride_size;
1614 /* Check if WQE buffer size is supported by hardware. */
1615 if (log_stride_wqe_size < dev_cap->mprq.log_min_stride_wqe_size) {
1616 *actual_log_stride_num = log_def_stride_num;
1617 *actual_log_stride_size = log_def_stride_size;
1619 "Port %u Rx queue %u size of WQE buffer for Multi-Packet RQ is too small, setting default values (stride_num_n=%u, stride_size_n=%u)",
1620 dev->data->port_id, idx, RTE_BIT32(log_def_stride_num),
1621 RTE_BIT32(log_def_stride_size));
1622 log_stride_wqe_size = log_def_stride_num + log_def_stride_size;
1624 MLX5_ASSERT(log_stride_wqe_size >=
1625 dev_cap->mprq.log_min_stride_wqe_size);
1626 if (desc <= RTE_BIT32(*actual_log_stride_num))
1628 if (min_mbuf_size > RTE_BIT32(log_stride_wqe_size)) {
1629 DRV_LOG(WARNING, "Port %u Rx queue %u "
1630 "Multi-Packet RQ is unsupported, WQE buffer size (%u) "
1631 "is smaller than min mbuf size (%u)",
1632 dev->data->port_id, idx, RTE_BIT32(log_stride_wqe_size),
1636 DRV_LOG(DEBUG, "Port %u Rx queue %u "
1637 "Multi-Packet RQ is enabled strd_num_n = %u, strd_sz_n = %u",
1638 dev->data->port_id, idx, RTE_BIT32(*actual_log_stride_num),
1639 RTE_BIT32(*actual_log_stride_size));
1642 if (config->mprq.enabled)
1644 "Port %u MPRQ is requested but cannot be enabled\n"
1645 " (requested: pkt_sz = %u, desc_num = %u,"
1646 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1647 " supported: min_rxqs_num = %u, min_buf_wqe_sz = %u"
1648 " min_stride_sz = %u, max_stride_sz = %u).\n"
1649 "Rx segment is %senabled. External mempool is %sused.",
1650 dev->data->port_id, min_mbuf_size, desc, priv->rxqs_n,
1651 RTE_BIT32(config->mprq.log_stride_size),
1652 RTE_BIT32(config->mprq.log_stride_num),
1653 config->mprq.min_rxqs_num,
1654 RTE_BIT32(dev_cap->mprq.log_min_stride_wqe_size),
1655 RTE_BIT32(dev_cap->mprq.log_min_stride_size),
1656 RTE_BIT32(dev_cap->mprq.log_max_stride_size),
1657 rx_seg_en ? "" : "not ", is_extmem ? "" : "not ");
1662 * Create a DPDK Rx queue.
1665 * Pointer to Ethernet device.
1669 * Number of descriptors to configure in queue.
1671 * NUMA socket on which memory must be allocated.
1674 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1676 struct mlx5_rxq_ctrl *
1677 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1678 unsigned int socket, const struct rte_eth_rxconf *conf,
1679 const struct rte_eth_rxseg_split *rx_seg, uint16_t n_seg,
1682 struct mlx5_priv *priv = dev->data->dev_private;
1683 struct mlx5_rxq_ctrl *tmpl;
1684 unsigned int mb_len = rte_pktmbuf_data_room_size(rx_seg[0].mp);
1685 struct mlx5_port_config *config = &priv->config;
1686 uint64_t offloads = conf->offloads |
1687 dev->data->dev_conf.rxmode.offloads;
1688 unsigned int lro_on_queue = !!(offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO);
1689 unsigned int max_rx_pktlen = lro_on_queue ?
1690 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1691 dev->data->mtu + (unsigned int)RTE_ETHER_HDR_LEN +
1693 unsigned int non_scatter_min_mbuf_size = max_rx_pktlen +
1694 RTE_PKTMBUF_HEADROOM;
1695 unsigned int max_lro_size = 0;
1696 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1697 uint32_t mprq_log_actual_stride_num = 0;
1698 uint32_t mprq_log_actual_stride_size = 0;
1699 bool rx_seg_en = n_seg != 1 || rx_seg[0].offset || rx_seg[0].length;
1700 const int mprq_en = !mlx5_mprq_prepare(dev, idx, desc, rx_seg_en,
1701 non_scatter_min_mbuf_size,
1702 &mprq_log_actual_stride_num,
1703 &mprq_log_actual_stride_size,
1706 * Always allocate extra slots, even if eventually
1707 * the vector Rx will not be used.
1709 uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1710 size_t alloc_size = sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *);
1711 const struct rte_eth_rxseg_split *qs_seg = rx_seg;
1712 unsigned int tail_len;
1715 /* Trim the number of descs needed. */
1716 desc >>= mprq_log_actual_stride_num;
1717 alloc_size += desc * sizeof(struct mlx5_mprq_buf *);
1719 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, alloc_size, 0, socket);
1724 LIST_INIT(&tmpl->owners);
1725 MLX5_ASSERT(n_seg && n_seg <= MLX5_MAX_RXQ_NSEG);
1727 * Save the original segment configuration in the shared queue
1728 * descriptor for the later check on the sibling queue creation.
1730 tmpl->rxseg_n = n_seg;
1731 rte_memcpy(tmpl->rxseg, qs_seg,
1732 sizeof(struct rte_eth_rxseg_split) * n_seg);
1734 * Build the array of actual buffer offsets and lengths.
1735 * Pad with the buffers from the last memory pool if
1736 * needed to handle max size packets, replace zero length
1737 * with the buffer length from the pool.
1739 tail_len = max_rx_pktlen;
1741 struct mlx5_eth_rxseg *hw_seg =
1742 &tmpl->rxq.rxseg[tmpl->rxq.rxseg_n];
1743 uint32_t buf_len, offset, seg_len;
1746 * For the buffers beyond descriptions offset is zero,
1747 * the first buffer contains head room.
1749 buf_len = rte_pktmbuf_data_room_size(qs_seg->mp);
1750 offset = (tmpl->rxq.rxseg_n >= n_seg ? 0 : qs_seg->offset) +
1751 (tmpl->rxq.rxseg_n ? 0 : RTE_PKTMBUF_HEADROOM);
1753 * For the buffers beyond descriptions the length is
1754 * pool buffer length, zero lengths are replaced with
1755 * pool buffer length either.
1757 seg_len = tmpl->rxq.rxseg_n >= n_seg ? buf_len :
1761 /* Check is done in long int, now overflows. */
1762 if (buf_len < seg_len + offset) {
1763 DRV_LOG(ERR, "port %u Rx queue %u: Split offset/length "
1764 "%u/%u can't be satisfied",
1765 dev->data->port_id, idx,
1766 qs_seg->length, qs_seg->offset);
1770 if (seg_len > tail_len)
1771 seg_len = buf_len - offset;
1772 if (++tmpl->rxq.rxseg_n > MLX5_MAX_RXQ_NSEG) {
1774 "port %u too many SGEs (%u) needed to handle"
1775 " requested maximum packet size %u, the maximum"
1776 " supported are %u", dev->data->port_id,
1777 tmpl->rxq.rxseg_n, max_rx_pktlen,
1779 rte_errno = ENOTSUP;
1782 /* Build the actual scattering element in the queue object. */
1783 hw_seg->mp = qs_seg->mp;
1784 MLX5_ASSERT(offset <= UINT16_MAX);
1785 MLX5_ASSERT(seg_len <= UINT16_MAX);
1786 hw_seg->offset = (uint16_t)offset;
1787 hw_seg->length = (uint16_t)seg_len;
1789 * Advance the segment descriptor, the padding is the based
1790 * on the attributes of the last descriptor.
1792 if (tmpl->rxq.rxseg_n < n_seg)
1794 tail_len -= RTE_MIN(tail_len, seg_len);
1795 } while (tail_len || !rte_is_power_of_2(tmpl->rxq.rxseg_n));
1796 MLX5_ASSERT(tmpl->rxq.rxseg_n &&
1797 tmpl->rxq.rxseg_n <= MLX5_MAX_RXQ_NSEG);
1798 if (tmpl->rxq.rxseg_n > 1 && !(offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) {
1799 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1800 " configured and no enough mbuf space(%u) to contain "
1801 "the maximum RX packet length(%u) with head-room(%u)",
1802 dev->data->port_id, idx, mb_len, max_rx_pktlen,
1803 RTE_PKTMBUF_HEADROOM);
1807 tmpl->is_hairpin = false;
1808 if (mlx5_mr_ctrl_init(&tmpl->rxq.mr_ctrl,
1809 &priv->sh->cdev->mr_scache.dev_gen, socket)) {
1810 /* rte_errno is already set. */
1813 tmpl->socket = socket;
1814 if (dev->data->dev_conf.intr_conf.rxq)
1817 /* TODO: Rx scatter isn't supported yet. */
1818 tmpl->rxq.sges_n = 0;
1819 tmpl->rxq.log_strd_num = mprq_log_actual_stride_num;
1820 tmpl->rxq.log_strd_sz = mprq_log_actual_stride_size;
1821 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1822 tmpl->rxq.strd_scatter_en =
1823 !!(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
1824 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1825 config->mprq.max_memcpy_len);
1826 max_lro_size = RTE_MIN(max_rx_pktlen,
1827 RTE_BIT32(tmpl->rxq.log_strd_num) *
1828 RTE_BIT32(tmpl->rxq.log_strd_sz));
1829 } else if (tmpl->rxq.rxseg_n == 1) {
1830 MLX5_ASSERT(max_rx_pktlen <= first_mb_free_size);
1831 tmpl->rxq.sges_n = 0;
1832 max_lro_size = max_rx_pktlen;
1833 } else if (offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
1834 unsigned int sges_n;
1836 if (lro_on_queue && first_mb_free_size <
1837 MLX5_MAX_LRO_HEADER_FIX) {
1838 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1839 " to include the max header size(%u) for LRO",
1840 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1841 rte_errno = ENOTSUP;
1845 * Determine the number of SGEs needed for a full packet
1846 * and round it to the next power of two.
1848 sges_n = log2above(tmpl->rxq.rxseg_n);
1849 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1851 "port %u too many SGEs (%u) needed to handle"
1852 " requested maximum packet size %u, the maximum"
1853 " supported are %u", dev->data->port_id,
1854 1 << sges_n, max_rx_pktlen,
1855 1u << MLX5_MAX_LOG_RQ_SEGS);
1856 rte_errno = ENOTSUP;
1859 tmpl->rxq.sges_n = sges_n;
1860 max_lro_size = max_rx_pktlen;
1862 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1863 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1864 if (desc % (1 << tmpl->rxq.sges_n)) {
1866 "port %u number of Rx queue descriptors (%u) is not a"
1867 " multiple of SGEs per packet (%u)",
1870 1 << tmpl->rxq.sges_n);
1874 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1875 /* Toggle RX checksum offload if hardware supports it. */
1876 tmpl->rxq.csum = !!(offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM);
1877 /* Configure Rx timestamp. */
1878 tmpl->rxq.hw_timestamp = !!(offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP);
1879 tmpl->rxq.timestamp_rx_flag = 0;
1880 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1881 &tmpl->rxq.timestamp_offset,
1882 &tmpl->rxq.timestamp_rx_flag) != 0) {
1883 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1886 /* Configure VLAN stripping. */
1887 tmpl->rxq.vlan_strip = !!(offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
1888 /* By default, FCS (CRC) is stripped by hardware. */
1889 tmpl->rxq.crc_present = 0;
1890 tmpl->rxq.lro = lro_on_queue;
1891 if (offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) {
1892 if (priv->sh->config.hw_fcs_strip) {
1894 * RQs used for LRO-enabled TIRs should not be
1895 * configured to scatter the FCS.
1899 "port %u CRC stripping has been "
1900 "disabled but will still be performed "
1901 "by hardware, because LRO is enabled",
1902 dev->data->port_id);
1904 tmpl->rxq.crc_present = 1;
1907 "port %u CRC stripping has been disabled but will"
1908 " still be performed by hardware, make sure MLNX_OFED"
1909 " and firmware are up to date",
1910 dev->data->port_id);
1914 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1915 " incoming frames to hide it",
1917 tmpl->rxq.crc_present ? "disabled" : "enabled",
1918 tmpl->rxq.crc_present << 2);
1919 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1920 (!!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS));
1922 tmpl->rxq.port_id = dev->data->port_id;
1923 tmpl->sh = priv->sh;
1924 tmpl->rxq.mp = rx_seg[0].mp;
1925 tmpl->rxq.elts_n = log2above(desc);
1926 tmpl->rxq.rq_repl_thresh = MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
1927 tmpl->rxq.elts = (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
1928 tmpl->rxq.mprq_bufs =
1929 (struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
1930 tmpl->rxq.idx = idx;
1931 if (conf->share_group > 0) {
1932 tmpl->rxq.shared = 1;
1933 tmpl->share_group = conf->share_group;
1934 tmpl->share_qid = conf->share_qid;
1935 LIST_INSERT_HEAD(&priv->sh->shared_rxqs, tmpl, share_entry);
1937 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1940 mlx5_mr_btree_free(&tmpl->rxq.mr_ctrl.cache_bh);
1946 * Create a DPDK Rx hairpin queue.
1949 * Pointer to Ethernet device.
1953 * Number of descriptors to configure in queue.
1954 * @param hairpin_conf
1955 * The hairpin binding configuration.
1958 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1960 struct mlx5_rxq_ctrl *
1961 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,
1963 const struct rte_eth_hairpin_conf *hairpin_conf)
1965 uint16_t idx = rxq->idx;
1966 struct mlx5_priv *priv = dev->data->dev_private;
1967 struct mlx5_rxq_ctrl *tmpl;
1969 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1975 LIST_INIT(&tmpl->owners);
1977 LIST_INSERT_HEAD(&tmpl->owners, rxq, owner_entry);
1978 tmpl->is_hairpin = true;
1979 tmpl->socket = SOCKET_ID_ANY;
1980 tmpl->rxq.rss_hash = 0;
1981 tmpl->rxq.port_id = dev->data->port_id;
1982 tmpl->sh = priv->sh;
1983 tmpl->rxq.mp = NULL;
1984 tmpl->rxq.elts_n = log2above(desc);
1985 tmpl->rxq.elts = NULL;
1986 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1987 tmpl->rxq.idx = idx;
1988 rxq->hairpin_conf = *hairpin_conf;
1989 mlx5_rxq_ref(dev, idx);
1990 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1995 * Increase Rx queue reference count.
1998 * Pointer to Ethernet device.
2003 * A pointer to the queue if it exists, NULL otherwise.
2005 struct mlx5_rxq_priv *
2006 mlx5_rxq_ref(struct rte_eth_dev *dev, uint16_t idx)
2008 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2011 __atomic_fetch_add(&rxq->refcnt, 1, __ATOMIC_RELAXED);
2016 * Dereference a Rx queue.
2019 * Pointer to Ethernet device.
2024 * Updated reference count.
2027 mlx5_rxq_deref(struct rte_eth_dev *dev, uint16_t idx)
2029 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2033 return __atomic_sub_fetch(&rxq->refcnt, 1, __ATOMIC_RELAXED);
2040 * Pointer to Ethernet device.
2045 * A pointer to the queue if it exists, NULL otherwise.
2047 struct mlx5_rxq_priv *
2048 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
2050 struct mlx5_priv *priv = dev->data->dev_private;
2052 if (idx >= priv->rxqs_n)
2054 MLX5_ASSERT(priv->rxq_privs != NULL);
2055 return (*priv->rxq_privs)[idx];
2059 * Get Rx queue shareable control.
2062 * Pointer to Ethernet device.
2067 * A pointer to the queue control if it exists, NULL otherwise.
2069 struct mlx5_rxq_ctrl *
2070 mlx5_rxq_ctrl_get(struct rte_eth_dev *dev, uint16_t idx)
2072 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2074 return rxq == NULL ? NULL : rxq->ctrl;
2078 * Get Rx queue shareable data.
2081 * Pointer to Ethernet device.
2086 * A pointer to the queue data if it exists, NULL otherwise.
2088 struct mlx5_rxq_data *
2089 mlx5_rxq_data_get(struct rte_eth_dev *dev, uint16_t idx)
2091 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2093 return rxq == NULL ? NULL : &rxq->ctrl->rxq;
2097 * Increase an external Rx queue reference count.
2100 * Pointer to Ethernet device.
2102 * External RX queue index.
2105 * A pointer to the queue if it exists, NULL otherwise.
2107 struct mlx5_external_rxq *
2108 mlx5_ext_rxq_ref(struct rte_eth_dev *dev, uint16_t idx)
2110 struct mlx5_external_rxq *rxq = mlx5_ext_rxq_get(dev, idx);
2112 __atomic_fetch_add(&rxq->refcnt, 1, __ATOMIC_RELAXED);
2117 * Decrease an external Rx queue reference count.
2120 * Pointer to Ethernet device.
2122 * External RX queue index.
2125 * Updated reference count.
2128 mlx5_ext_rxq_deref(struct rte_eth_dev *dev, uint16_t idx)
2130 struct mlx5_external_rxq *rxq = mlx5_ext_rxq_get(dev, idx);
2132 return __atomic_sub_fetch(&rxq->refcnt, 1, __ATOMIC_RELAXED);
2136 * Get an external Rx queue.
2139 * Pointer to Ethernet device.
2141 * External Rx queue index.
2144 * A pointer to the queue if it exists, NULL otherwise.
2146 struct mlx5_external_rxq *
2147 mlx5_ext_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
2149 struct mlx5_priv *priv = dev->data->dev_private;
2151 MLX5_ASSERT(mlx5_is_external_rxq(dev, idx));
2152 return &priv->ext_rxqs[idx - MLX5_EXTERNAL_RX_QUEUE_ID_MIN];
2156 * Dereference a list of Rx queues.
2159 * Pointer to Ethernet device.
2161 * List of Rx queues to deref.
2163 * Number of queues in the array.
2166 mlx5_rxqs_deref(struct rte_eth_dev *dev, uint16_t *queues,
2167 const uint32_t queues_n)
2171 for (i = 0; i < queues_n; i++) {
2172 if (mlx5_is_external_rxq(dev, queues[i]))
2173 claim_nonzero(mlx5_ext_rxq_deref(dev, queues[i]));
2175 claim_nonzero(mlx5_rxq_deref(dev, queues[i]));
2180 * Increase reference count for list of Rx queues.
2183 * Pointer to Ethernet device.
2185 * List of Rx queues to ref.
2187 * Number of queues in the array.
2190 * 0 on success, a negative errno value otherwise and rte_errno is set.
2193 mlx5_rxqs_ref(struct rte_eth_dev *dev, uint16_t *queues,
2194 const uint32_t queues_n)
2198 for (i = 0; i != queues_n; ++i) {
2199 if (mlx5_is_external_rxq(dev, queues[i])) {
2200 if (mlx5_ext_rxq_ref(dev, queues[i]) == NULL)
2203 if (mlx5_rxq_ref(dev, queues[i]) == NULL)
2209 mlx5_rxqs_deref(dev, queues, i);
2215 * Release a Rx queue.
2218 * Pointer to Ethernet device.
2223 * 1 while a reference on it exists, 0 when freed.
2226 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
2228 struct mlx5_priv *priv = dev->data->dev_private;
2229 struct mlx5_rxq_priv *rxq;
2230 struct mlx5_rxq_ctrl *rxq_ctrl;
2233 if (priv->rxq_privs == NULL)
2235 rxq = mlx5_rxq_get(dev, idx);
2236 if (rxq == NULL || rxq->refcnt == 0)
2238 rxq_ctrl = rxq->ctrl;
2239 refcnt = mlx5_rxq_deref(dev, idx);
2242 } else if (refcnt == 1) { /* RxQ stopped. */
2243 priv->obj_ops.rxq_obj_release(rxq);
2244 if (!rxq_ctrl->started && rxq_ctrl->obj != NULL) {
2245 LIST_REMOVE(rxq_ctrl->obj, next);
2246 mlx5_free(rxq_ctrl->obj);
2247 rxq_ctrl->obj = NULL;
2249 if (!rxq_ctrl->is_hairpin) {
2250 if (!rxq_ctrl->started)
2251 rxq_free_elts(rxq_ctrl);
2252 dev->data->rx_queue_state[idx] =
2253 RTE_ETH_QUEUE_STATE_STOPPED;
2255 } else { /* Refcnt zero, closing device. */
2256 LIST_REMOVE(rxq, owner_entry);
2257 if (LIST_EMPTY(&rxq_ctrl->owners)) {
2258 if (!rxq_ctrl->is_hairpin)
2260 (&rxq_ctrl->rxq.mr_ctrl.cache_bh);
2261 if (rxq_ctrl->rxq.shared)
2262 LIST_REMOVE(rxq_ctrl, share_entry);
2263 LIST_REMOVE(rxq_ctrl, next);
2264 mlx5_free(rxq_ctrl);
2266 dev->data->rx_queues[idx] = NULL;
2268 (*priv->rxq_privs)[idx] = NULL;
2274 * Verify the Rx Queue list is empty
2277 * Pointer to Ethernet device.
2280 * The number of object not released.
2283 mlx5_rxq_verify(struct rte_eth_dev *dev)
2285 struct mlx5_priv *priv = dev->data->dev_private;
2286 struct mlx5_rxq_ctrl *rxq_ctrl;
2289 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
2290 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
2291 dev->data->port_id, rxq_ctrl->rxq.idx);
2298 * Verify the external Rx Queue list is empty.
2301 * Pointer to Ethernet device.
2304 * The number of object not released.
2307 mlx5_ext_rxq_verify(struct rte_eth_dev *dev)
2309 struct mlx5_priv *priv = dev->data->dev_private;
2310 struct mlx5_external_rxq *rxq;
2314 if (priv->ext_rxqs == NULL)
2317 for (i = MLX5_EXTERNAL_RX_QUEUE_ID_MIN; i <= UINT16_MAX ; ++i) {
2318 rxq = mlx5_ext_rxq_get(dev, i);
2319 if (rxq->refcnt < 2)
2321 DRV_LOG(DEBUG, "Port %u external RxQ %u still referenced.",
2322 dev->data->port_id, i);
2329 * Check whether RxQ type is Hairpin.
2332 * Pointer to Ethernet device.
2337 * True if Rx queue type is Hairpin, otherwise False.
2340 mlx5_rxq_is_hairpin(struct rte_eth_dev *dev, uint16_t idx)
2342 struct mlx5_rxq_ctrl *rxq_ctrl;
2344 if (mlx5_is_external_rxq(dev, idx))
2346 rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
2347 return (rxq_ctrl != NULL && rxq_ctrl->is_hairpin);
2351 * Get a Rx hairpin queue configuration.
2354 * Pointer to Ethernet device.
2359 * Pointer to the configuration if a hairpin RX queue, otherwise NULL.
2361 const struct rte_eth_hairpin_conf *
2362 mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)
2364 if (mlx5_rxq_is_hairpin(dev, idx)) {
2365 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2367 return rxq != NULL ? &rxq->hairpin_conf : NULL;
2373 * Match queues listed in arguments to queues contained in indirection table
2377 * Pointer to indirection table to match.
2379 * Queues to match to queues in indirection table.
2381 * Number of queues in the array.
2384 * 1 if all queues in indirection table match 0 otherwise.
2387 mlx5_ind_table_obj_match_queues(const struct mlx5_ind_table_obj *ind_tbl,
2388 const uint16_t *queues, uint32_t queues_n)
2390 return (ind_tbl->queues_n == queues_n) &&
2391 (!memcmp(ind_tbl->queues, queues,
2392 ind_tbl->queues_n * sizeof(ind_tbl->queues[0])));
2396 * Get an indirection table.
2399 * Pointer to Ethernet device.
2401 * Queues entering in the indirection table.
2403 * Number of queues in the array.
2406 * An indirection table if found.
2408 struct mlx5_ind_table_obj *
2409 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
2412 struct mlx5_priv *priv = dev->data->dev_private;
2413 struct mlx5_ind_table_obj *ind_tbl;
2415 rte_rwlock_read_lock(&priv->ind_tbls_lock);
2416 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
2417 if ((ind_tbl->queues_n == queues_n) &&
2418 (memcmp(ind_tbl->queues, queues,
2419 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
2421 __atomic_fetch_add(&ind_tbl->refcnt, 1,
2426 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
2431 * Release an indirection table.
2434 * Pointer to Ethernet device.
2436 * Indirection table to release.
2438 * If true, then dereference RX queues related to indirection table.
2439 * Otherwise, no additional action will be taken.
2442 * 1 while a reference on it exists, 0 when freed.
2445 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
2446 struct mlx5_ind_table_obj *ind_tbl,
2449 struct mlx5_priv *priv = dev->data->dev_private;
2452 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2453 ret = __atomic_sub_fetch(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
2455 LIST_REMOVE(ind_tbl, next);
2456 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2459 priv->obj_ops.ind_table_destroy(ind_tbl);
2461 mlx5_rxqs_deref(dev, ind_tbl->queues, ind_tbl->queues_n);
2467 * Verify the Rx Queue list is empty
2470 * Pointer to Ethernet device.
2473 * The number of object not released.
2476 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
2478 struct mlx5_priv *priv = dev->data->dev_private;
2479 struct mlx5_ind_table_obj *ind_tbl;
2482 rte_rwlock_read_lock(&priv->ind_tbls_lock);
2483 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
2485 "port %u indirection table obj %p still referenced",
2486 dev->data->port_id, (void *)ind_tbl);
2489 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
2494 * Setup an indirection table structure fields.
2497 * Pointer to Ethernet device.
2499 * Indirection table to modify.
2501 * Whether to increment RxQ reference counters.
2504 * 0 on success, a negative errno value otherwise and rte_errno is set.
2507 mlx5_ind_table_obj_setup(struct rte_eth_dev *dev,
2508 struct mlx5_ind_table_obj *ind_tbl,
2511 struct mlx5_priv *priv = dev->data->dev_private;
2512 uint32_t queues_n = ind_tbl->queues_n;
2514 const unsigned int n = rte_is_power_of_2(queues_n) ?
2515 log2above(queues_n) :
2516 log2above(priv->sh->dev_cap.ind_table_max_size);
2518 if (ref_qs && mlx5_rxqs_ref(dev, ind_tbl->queues, queues_n) < 0) {
2519 DRV_LOG(DEBUG, "Port %u invalid indirection table queues.",
2520 dev->data->port_id);
2523 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
2525 DRV_LOG(DEBUG, "Port %u cannot create a new indirection table.",
2526 dev->data->port_id);
2528 int err = rte_errno;
2530 mlx5_rxqs_deref(dev, ind_tbl->queues, queues_n);
2535 __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
2540 * Create an indirection table.
2543 * Pointer to Ethernet device.
2545 * Queues entering in the indirection table.
2547 * Number of queues in the array.
2549 * Indirection table for Standalone queue.
2551 * Whether to increment RxQ reference counters.
2554 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2556 struct mlx5_ind_table_obj *
2557 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
2558 uint32_t queues_n, bool standalone, bool ref_qs)
2560 struct mlx5_priv *priv = dev->data->dev_private;
2561 struct mlx5_ind_table_obj *ind_tbl;
2565 * Allocate maximum queues for shared action as queue number
2566 * maybe modified later.
2568 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
2569 (standalone ? priv->rxqs_n : queues_n) *
2570 sizeof(uint16_t), 0, SOCKET_ID_ANY);
2575 ind_tbl->queues_n = queues_n;
2576 ind_tbl->queues = (uint16_t *)(ind_tbl + 1);
2577 memcpy(ind_tbl->queues, queues, queues_n * sizeof(*queues));
2578 ret = mlx5_ind_table_obj_setup(dev, ind_tbl, ref_qs);
2583 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2585 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
2587 LIST_INSERT_HEAD(&priv->standalone_ind_tbls, ind_tbl, next);
2588 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2594 mlx5_ind_table_obj_check_standalone(struct rte_eth_dev *dev __rte_unused,
2595 struct mlx5_ind_table_obj *ind_tbl)
2599 refcnt = __atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED);
2603 * Modification of indirection tables having more than 1
2604 * reference is unsupported.
2607 "Port %u cannot modify indirection table %p (refcnt %u > 1).",
2608 dev->data->port_id, (void *)ind_tbl, refcnt);
2614 * Modify an indirection table.
2617 * Pointer to Ethernet device.
2619 * Indirection table to modify.
2621 * Queues replacement for the indirection table.
2623 * Number of queues in the array.
2625 * Indirection table for Standalone queue.
2627 * Whether to increment new RxQ set reference counters.
2628 * @param deref_old_qs
2629 * Whether to decrement old RxQ set reference counters.
2632 * 0 on success, a negative errno value otherwise and rte_errno is set.
2635 mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,
2636 struct mlx5_ind_table_obj *ind_tbl,
2637 uint16_t *queues, const uint32_t queues_n,
2638 bool standalone, bool ref_new_qs, bool deref_old_qs)
2640 struct mlx5_priv *priv = dev->data->dev_private;
2642 const unsigned int n = rte_is_power_of_2(queues_n) ?
2643 log2above(queues_n) :
2644 log2above(priv->sh->dev_cap.ind_table_max_size);
2646 MLX5_ASSERT(standalone);
2647 RTE_SET_USED(standalone);
2648 if (mlx5_ind_table_obj_check_standalone(dev, ind_tbl) < 0)
2650 if (ref_new_qs && mlx5_rxqs_ref(dev, queues, queues_n) < 0) {
2651 DRV_LOG(DEBUG, "Port %u invalid indirection table queues.",
2652 dev->data->port_id);
2655 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2656 ret = priv->obj_ops.ind_table_modify(dev, n, queues, queues_n, ind_tbl);
2658 DRV_LOG(DEBUG, "Port %u cannot modify indirection table.",
2659 dev->data->port_id);
2661 int err = rte_errno;
2663 mlx5_rxqs_deref(dev, queues, queues_n);
2669 mlx5_rxqs_deref(dev, ind_tbl->queues, ind_tbl->queues_n);
2670 ind_tbl->queues_n = queues_n;
2671 ind_tbl->queues = queues;
2676 * Attach an indirection table to its queues.
2679 * Pointer to Ethernet device.
2681 * Indirection table to attach.
2684 * 0 on success, a negative errno value otherwise and rte_errno is set.
2687 mlx5_ind_table_obj_attach(struct rte_eth_dev *dev,
2688 struct mlx5_ind_table_obj *ind_tbl)
2692 ret = mlx5_ind_table_obj_modify(dev, ind_tbl, ind_tbl->queues,
2694 true /* standalone */,
2695 true /* ref_new_qs */,
2696 false /* deref_old_qs */);
2698 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2699 dev->data->port_id, (void *)ind_tbl);
2704 * Detach an indirection table from its queues.
2707 * Pointer to Ethernet device.
2709 * Indirection table to detach.
2712 * 0 on success, a negative errno value otherwise and rte_errno is set.
2715 mlx5_ind_table_obj_detach(struct rte_eth_dev *dev,
2716 struct mlx5_ind_table_obj *ind_tbl)
2718 struct mlx5_priv *priv = dev->data->dev_private;
2719 const unsigned int n = rte_is_power_of_2(ind_tbl->queues_n) ?
2720 log2above(ind_tbl->queues_n) :
2721 log2above(priv->sh->dev_cap.ind_table_max_size);
2725 ret = mlx5_ind_table_obj_check_standalone(dev, ind_tbl);
2728 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2729 ret = priv->obj_ops.ind_table_modify(dev, n, NULL, 0, ind_tbl);
2731 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2732 dev->data->port_id, (void *)ind_tbl);
2735 for (i = 0; i < ind_tbl->queues_n; i++)
2736 mlx5_rxq_release(dev, ind_tbl->queues[i]);
2741 mlx5_hrxq_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
2744 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2745 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2746 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2748 return (hrxq->rss_key_len != rss_desc->key_len ||
2749 memcmp(hrxq->rss_key, rss_desc->key, rss_desc->key_len) ||
2750 hrxq->hws_flags != rss_desc->hws_flags ||
2751 hrxq->hash_fields != rss_desc->hash_fields ||
2752 hrxq->ind_table->queues_n != rss_desc->queue_num ||
2753 memcmp(hrxq->ind_table->queues, rss_desc->queue,
2754 rss_desc->queue_num * sizeof(rss_desc->queue[0])));
2758 * Modify an Rx Hash queue configuration.
2761 * Pointer to Ethernet device.
2763 * Index to Hash Rx queue to modify.
2765 * RSS key for the Rx hash queue.
2766 * @param rss_key_len
2768 * @param hash_fields
2769 * Verbs protocol hash field to make the RSS on.
2771 * Queues entering in hash queue. In case of empty hash_fields only the
2772 * first queue index will be taken for the indirection table.
2777 * 0 on success, a negative errno value otherwise and rte_errno is set.
2780 mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hrxq_idx,
2781 const uint8_t *rss_key, uint32_t rss_key_len,
2782 uint64_t hash_fields,
2783 const uint16_t *queues, uint32_t queues_n)
2786 struct mlx5_ind_table_obj *ind_tbl = NULL;
2787 struct mlx5_priv *priv = dev->data->dev_private;
2788 struct mlx5_hrxq *hrxq =
2789 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2790 bool dev_started = !!dev->data->dev_started;
2798 if (hrxq->rss_key_len != rss_key_len) {
2799 /* rss_key_len is fixed size 40 byte & not supposed to change */
2803 queues_n = hash_fields ? queues_n : 1;
2804 if (mlx5_ind_table_obj_match_queues(hrxq->ind_table,
2805 queues, queues_n)) {
2806 ind_tbl = hrxq->ind_table;
2808 if (hrxq->standalone) {
2810 * Replacement of indirection table unsupported for
2811 * standalone hrxq objects (used by shared RSS).
2813 rte_errno = ENOTSUP;
2816 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2818 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2826 MLX5_ASSERT(priv->obj_ops.hrxq_modify);
2827 ret = priv->obj_ops.hrxq_modify(dev, hrxq, rss_key,
2828 hash_fields, ind_tbl);
2833 if (ind_tbl != hrxq->ind_table) {
2834 MLX5_ASSERT(!hrxq->standalone);
2835 mlx5_ind_table_obj_release(dev, hrxq->ind_table, true);
2836 hrxq->ind_table = ind_tbl;
2838 hrxq->hash_fields = hash_fields;
2839 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2843 if (ind_tbl != hrxq->ind_table) {
2844 MLX5_ASSERT(!hrxq->standalone);
2845 mlx5_ind_table_obj_release(dev, ind_tbl, true);
2852 __mlx5_hrxq_remove(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
2854 struct mlx5_priv *priv = dev->data->dev_private;
2856 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2857 if (hrxq->hws_flags)
2858 mlx5dr_action_destroy(hrxq->action);
2860 mlx5_glue->destroy_flow_action(hrxq->action);
2862 priv->obj_ops.hrxq_destroy(hrxq);
2863 if (!hrxq->standalone) {
2864 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2866 (!!dev->data->dev_started) : true);
2868 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2872 * Release the hash Rx queue.
2875 * Pointer to Ethernet device.
2877 * Index to Hash Rx queue to release.
2880 * mlx5 list pointer.
2882 * Hash queue entry pointer.
2885 mlx5_hrxq_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2887 struct rte_eth_dev *dev = tool_ctx;
2888 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2890 __mlx5_hrxq_remove(dev, hrxq);
2893 static struct mlx5_hrxq *
2894 __mlx5_hrxq_create(struct rte_eth_dev *dev,
2895 struct mlx5_flow_rss_desc *rss_desc)
2897 struct mlx5_priv *priv = dev->data->dev_private;
2898 const uint8_t *rss_key = rss_desc->key;
2899 uint32_t rss_key_len = rss_desc->key_len;
2900 bool standalone = !!rss_desc->shared_rss;
2901 const uint16_t *queues =
2902 standalone ? rss_desc->const_q : rss_desc->queue;
2903 uint32_t queues_n = rss_desc->queue_num;
2904 struct mlx5_hrxq *hrxq = NULL;
2905 uint32_t hrxq_idx = 0;
2906 struct mlx5_ind_table_obj *ind_tbl = rss_desc->ind_tbl;
2909 queues_n = rss_desc->hash_fields ? queues_n : 1;
2910 if (!ind_tbl && !rss_desc->hws_flags)
2911 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2913 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2915 rss_desc->hws_flags,
2916 !!dev->data->dev_started);
2919 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2922 hrxq->standalone = standalone;
2923 hrxq->idx = hrxq_idx;
2924 hrxq->ind_table = ind_tbl;
2925 hrxq->rss_key_len = rss_key_len;
2926 hrxq->hash_fields = rss_desc->hash_fields;
2927 hrxq->hws_flags = rss_desc->hws_flags;
2928 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2929 ret = priv->obj_ops.hrxq_new(dev, hrxq, rss_desc->tunnel);
2934 if (!rss_desc->ind_tbl)
2935 mlx5_ind_table_obj_release(dev, ind_tbl, true);
2937 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2941 struct mlx5_list_entry *
2942 mlx5_hrxq_create_cb(void *tool_ctx, void *cb_ctx)
2944 struct rte_eth_dev *dev = tool_ctx;
2945 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2946 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2947 struct mlx5_hrxq *hrxq;
2949 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2950 return hrxq ? &hrxq->entry : NULL;
2953 struct mlx5_list_entry *
2954 mlx5_hrxq_clone_cb(void *tool_ctx, struct mlx5_list_entry *entry,
2955 void *cb_ctx __rte_unused)
2957 struct rte_eth_dev *dev = tool_ctx;
2958 struct mlx5_priv *priv = dev->data->dev_private;
2959 struct mlx5_hrxq *hrxq;
2960 uint32_t hrxq_idx = 0;
2962 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2965 memcpy(hrxq, entry, sizeof(*hrxq) + MLX5_RSS_HASH_KEY_LEN);
2966 hrxq->idx = hrxq_idx;
2967 return &hrxq->entry;
2971 mlx5_hrxq_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2973 struct rte_eth_dev *dev = tool_ctx;
2974 struct mlx5_priv *priv = dev->data->dev_private;
2975 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2977 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2981 * Get an Rx Hash queue.
2984 * Pointer to Ethernet device.
2986 * RSS configuration for the Rx hash queue.
2989 * An hash Rx queue on success.
2991 struct mlx5_hrxq *mlx5_hrxq_get(struct rte_eth_dev *dev,
2992 struct mlx5_flow_rss_desc *rss_desc)
2994 struct mlx5_priv *priv = dev->data->dev_private;
2995 struct mlx5_hrxq *hrxq = NULL;
2996 struct mlx5_list_entry *entry;
2997 struct mlx5_flow_cb_ctx ctx = {
3001 if (rss_desc->shared_rss) {
3002 hrxq = __mlx5_hrxq_create(dev, rss_desc);
3004 entry = mlx5_list_register(priv->hrxqs, &ctx);
3007 hrxq = container_of(entry, typeof(*hrxq), entry);
3013 * Release the hash Rx queue.
3016 * Pointer to Ethernet device.
3018 * Hash Rx queue to release.
3021 * 1 while a reference on it exists, 0 when freed.
3023 int mlx5_hrxq_obj_release(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
3025 struct mlx5_priv *priv = dev->data->dev_private;
3029 if (!hrxq->standalone)
3030 return mlx5_list_unregister(priv->hrxqs, &hrxq->entry);
3031 __mlx5_hrxq_remove(dev, hrxq);
3036 * Release the hash Rx queue with index.
3039 * Pointer to Ethernet device.
3041 * Index to Hash Rx queue to release.
3044 * 1 while a reference on it exists, 0 when freed.
3046 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
3048 struct mlx5_priv *priv = dev->data->dev_private;
3049 struct mlx5_hrxq *hrxq;
3051 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
3052 return mlx5_hrxq_obj_release(dev, hrxq);
3056 * Create a drop Rx Hash queue.
3059 * Pointer to Ethernet device.
3062 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
3065 mlx5_drop_action_create(struct rte_eth_dev *dev)
3067 struct mlx5_priv *priv = dev->data->dev_private;
3068 struct mlx5_hrxq *hrxq = NULL;
3071 if (priv->drop_queue.hrxq)
3072 return priv->drop_queue.hrxq;
3073 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
3076 "Port %u cannot allocate memory for drop queue.",
3077 dev->data->port_id);
3081 priv->drop_queue.hrxq = hrxq;
3082 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
3084 if (!hrxq->ind_table) {
3088 ret = priv->obj_ops.drop_action_create(dev);
3094 if (hrxq->ind_table)
3095 mlx5_free(hrxq->ind_table);
3096 priv->drop_queue.hrxq = NULL;
3103 * Release a drop hash Rx queue.
3106 * Pointer to Ethernet device.
3109 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
3111 struct mlx5_priv *priv = dev->data->dev_private;
3112 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
3114 if (!priv->drop_queue.hrxq)
3116 priv->obj_ops.drop_action_destroy(dev);
3117 mlx5_free(priv->drop_queue.rxq);
3118 mlx5_free(hrxq->ind_table);
3120 priv->drop_queue.rxq = NULL;
3121 priv->drop_queue.hrxq = NULL;
3125 * Verify the Rx Queue list is empty
3128 * Pointer to Ethernet device.
3131 * The number of object not released.
3134 mlx5_hrxq_verify(struct rte_eth_dev *dev)
3136 struct mlx5_priv *priv = dev->data->dev_private;
3138 return mlx5_list_get_entry_num(priv->hrxqs);
3142 * Set the Rx queue timestamp conversion parameters
3145 * Pointer to the Ethernet device structure.
3148 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
3150 struct mlx5_priv *priv = dev->data->dev_private;
3151 struct mlx5_dev_ctx_shared *sh = priv->sh;
3154 for (i = 0; i != priv->rxqs_n; ++i) {
3155 struct mlx5_rxq_data *data = mlx5_rxq_data_get(dev, i);
3160 data->rt_timestamp = sh->dev_cap.rt_timestamp;
3165 * Validate given external RxQ rte_plow index, and get pointer to concurrent
3166 * external RxQ object to map/unmap.
3168 * @param[in] port_id
3169 * The port identifier of the Ethernet device.
3170 * @param[in] dpdk_idx
3171 * Queue index in rte_flow.
3174 * Pointer to concurrent external RxQ on success,
3175 * NULL otherwise and rte_errno is set.
3177 static struct mlx5_external_rxq *
3178 mlx5_external_rx_queue_get_validate(uint16_t port_id, uint16_t dpdk_idx)
3180 struct rte_eth_dev *dev;
3181 struct mlx5_priv *priv;
3183 if (dpdk_idx < MLX5_EXTERNAL_RX_QUEUE_ID_MIN) {
3184 DRV_LOG(ERR, "Queue index %u should be in range: [%u, %u].",
3185 dpdk_idx, MLX5_EXTERNAL_RX_QUEUE_ID_MIN, UINT16_MAX);
3189 if (rte_eth_dev_is_valid_port(port_id) < 0) {
3190 DRV_LOG(ERR, "There is no Ethernet device for port %u.",
3195 dev = &rte_eth_devices[port_id];
3196 priv = dev->data->dev_private;
3197 if (!mlx5_imported_pd_and_ctx(priv->sh->cdev)) {
3198 DRV_LOG(ERR, "Port %u "
3199 "external RxQ isn't supported on local PD and CTX.",
3201 rte_errno = ENOTSUP;
3204 if (!mlx5_devx_obj_ops_en(priv->sh)) {
3206 "Port %u external RxQ isn't supported by Verbs API.",
3208 rte_errno = ENOTSUP;
3212 * When user configures remote PD and CTX and device creates RxQ by
3213 * DevX, external RxQs array is allocated.
3215 MLX5_ASSERT(priv->ext_rxqs != NULL);
3216 return &priv->ext_rxqs[dpdk_idx - MLX5_EXTERNAL_RX_QUEUE_ID_MIN];
3220 rte_pmd_mlx5_external_rx_queue_id_map(uint16_t port_id, uint16_t dpdk_idx,
3223 struct mlx5_external_rxq *ext_rxq;
3224 uint32_t unmapped = 0;
3226 ext_rxq = mlx5_external_rx_queue_get_validate(port_id, dpdk_idx);
3227 if (ext_rxq == NULL)
3229 if (!__atomic_compare_exchange_n(&ext_rxq->refcnt, &unmapped, 1, false,
3230 __ATOMIC_RELAXED, __ATOMIC_RELAXED)) {
3231 if (ext_rxq->hw_id != hw_idx) {
3232 DRV_LOG(ERR, "Port %u external RxQ index %u "
3233 "is already mapped to HW index (requesting is "
3234 "%u, existing is %u).",
3235 port_id, dpdk_idx, hw_idx, ext_rxq->hw_id);
3239 DRV_LOG(WARNING, "Port %u external RxQ index %u "
3240 "is already mapped to the requested HW index (%u)",
3241 port_id, dpdk_idx, hw_idx);
3244 ext_rxq->hw_id = hw_idx;
3245 DRV_LOG(DEBUG, "Port %u external RxQ index %u "
3246 "is successfully mapped to the requested HW index (%u)",
3247 port_id, dpdk_idx, hw_idx);
3253 rte_pmd_mlx5_external_rx_queue_id_unmap(uint16_t port_id, uint16_t dpdk_idx)
3255 struct mlx5_external_rxq *ext_rxq;
3256 uint32_t mapped = 1;
3258 ext_rxq = mlx5_external_rx_queue_get_validate(port_id, dpdk_idx);
3259 if (ext_rxq == NULL)
3261 if (ext_rxq->refcnt > 1) {
3262 DRV_LOG(ERR, "Port %u external RxQ index %u still referenced.",
3267 if (!__atomic_compare_exchange_n(&ext_rxq->refcnt, &mapped, 0, false,
3268 __ATOMIC_RELAXED, __ATOMIC_RELAXED)) {
3269 DRV_LOG(ERR, "Port %u external RxQ index %u doesn't exist.",
3275 "Port %u external RxQ index %u is successfully unmapped.",