1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
12 #include <sys/queue.h>
15 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
17 #pragma GCC diagnostic ignored "-Wpedantic"
19 #include <infiniband/verbs.h>
20 #include <infiniband/mlx5dv.h>
22 #pragma GCC diagnostic error "-Wpedantic"
26 #include <rte_malloc.h>
27 #include <rte_ethdev_driver.h>
28 #include <rte_common.h>
29 #include <rte_interrupts.h>
30 #include <rte_debug.h>
34 #include "mlx5_rxtx.h"
35 #include "mlx5_utils.h"
36 #include "mlx5_autoconf.h"
37 #include "mlx5_defs.h"
38 #include "mlx5_glue.h"
40 /* Default RSS hash key also used for ConnectX-3. */
41 uint8_t rss_hash_default_key[] = {
42 0x2c, 0xc6, 0x81, 0xd1,
43 0x5b, 0xdb, 0xf4, 0xf7,
44 0xfc, 0xa2, 0x83, 0x19,
45 0xdb, 0x1a, 0x3e, 0x94,
46 0x6b, 0x9e, 0x38, 0xd9,
47 0x2c, 0x9c, 0x03, 0xd1,
48 0xad, 0x99, 0x44, 0xa7,
49 0xd9, 0x56, 0x3d, 0x59,
50 0x06, 0x3c, 0x25, 0xf3,
51 0xfc, 0x1f, 0xdc, 0x2a,
54 /* Length of the default RSS hash key. */
55 static_assert(MLX5_RSS_HASH_KEY_LEN ==
56 (unsigned int)sizeof(rss_hash_default_key),
57 "wrong RSS default key size.");
60 * Check whether Multi-Packet RQ can be enabled for the device.
63 * Pointer to Ethernet device.
66 * 1 if supported, negative errno value if not.
69 mlx5_check_mprq_support(struct rte_eth_dev *dev)
71 struct mlx5_priv *priv = dev->data->dev_private;
73 if (priv->config.mprq.enabled &&
74 priv->rxqs_n >= priv->config.mprq.min_rxqs_num)
80 * Check whether Multi-Packet RQ is enabled for the Rx queue.
83 * Pointer to receive queue structure.
86 * 0 if disabled, otherwise enabled.
89 mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq)
91 return rxq->strd_num_n > 0;
95 * Check whether Multi-Packet RQ is enabled for the device.
98 * Pointer to Ethernet device.
101 * 0 if disabled, otherwise enabled.
104 mlx5_mprq_enabled(struct rte_eth_dev *dev)
106 struct mlx5_priv *priv = dev->data->dev_private;
110 if (mlx5_check_mprq_support(dev) < 0)
112 /* All the configured queues should be enabled. */
113 for (i = 0; i < priv->rxqs_n; ++i) {
114 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
118 if (mlx5_rxq_mprq_enabled(rxq))
121 /* Multi-Packet RQ can't be partially configured. */
122 assert(n == 0 || n == priv->rxqs_n);
123 return n == priv->rxqs_n;
127 * Allocate RX queue elements for Multi-Packet RQ.
130 * Pointer to RX queue structure.
133 * 0 on success, a negative errno value otherwise and rte_errno is set.
136 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
138 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
139 unsigned int wqe_n = 1 << rxq->elts_n;
143 /* Iterate on segments. */
144 for (i = 0; i <= wqe_n; ++i) {
145 struct mlx5_mprq_buf *buf;
147 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
148 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
153 (*rxq->mprq_bufs)[i] = buf;
155 rxq->mprq_repl = buf;
158 "port %u Rx queue %u allocated and configured %u segments",
159 rxq->port_id, rxq->idx, wqe_n);
162 err = rte_errno; /* Save rte_errno before cleanup. */
164 for (i = 0; (i != wqe_n); ++i) {
165 if ((*rxq->mprq_bufs)[i] != NULL)
166 rte_mempool_put(rxq->mprq_mp,
167 (*rxq->mprq_bufs)[i]);
168 (*rxq->mprq_bufs)[i] = NULL;
170 DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
171 rxq->port_id, rxq->idx);
172 rte_errno = err; /* Restore rte_errno. */
177 * Allocate RX queue elements for Single-Packet RQ.
180 * Pointer to RX queue structure.
183 * 0 on success, errno value on failure.
186 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
188 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
189 unsigned int elts_n = 1 << rxq_ctrl->rxq.elts_n;
193 /* Iterate on segments. */
194 for (i = 0; (i != elts_n); ++i) {
195 struct rte_mbuf *buf;
197 buf = rte_pktmbuf_alloc(rxq_ctrl->rxq.mp);
199 DRV_LOG(ERR, "port %u empty mbuf pool",
200 PORT_ID(rxq_ctrl->priv));
204 /* Headroom is reserved by rte_pktmbuf_alloc(). */
205 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
206 /* Buffer is supposed to be empty. */
207 assert(rte_pktmbuf_data_len(buf) == 0);
208 assert(rte_pktmbuf_pkt_len(buf) == 0);
210 /* Only the first segment keeps headroom. */
212 SET_DATA_OFF(buf, 0);
213 PORT(buf) = rxq_ctrl->rxq.port_id;
214 DATA_LEN(buf) = rte_pktmbuf_tailroom(buf);
215 PKT_LEN(buf) = DATA_LEN(buf);
217 (*rxq_ctrl->rxq.elts)[i] = buf;
219 /* If Rx vector is activated. */
220 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
221 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
222 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
225 /* Initialize default rearm_data for vPMD. */
226 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
227 rte_mbuf_refcnt_set(mbuf_init, 1);
228 mbuf_init->nb_segs = 1;
229 mbuf_init->port = rxq->port_id;
231 * prevent compiler reordering:
232 * rearm_data covers previous fields.
234 rte_compiler_barrier();
235 rxq->mbuf_initializer =
236 *(uint64_t *)&mbuf_init->rearm_data;
237 /* Padding with a fake mbuf for vectorized Rx. */
238 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
239 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
242 "port %u Rx queue %u allocated and configured %u segments"
244 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
245 elts_n / (1 << rxq_ctrl->rxq.sges_n));
248 err = rte_errno; /* Save rte_errno before cleanup. */
250 for (i = 0; (i != elts_n); ++i) {
251 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
252 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
253 (*rxq_ctrl->rxq.elts)[i] = NULL;
255 DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
256 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
257 rte_errno = err; /* Restore rte_errno. */
262 * Allocate RX queue elements.
265 * Pointer to RX queue structure.
268 * 0 on success, errno value on failure.
271 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
273 return mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
274 rxq_alloc_elts_mprq(rxq_ctrl) : rxq_alloc_elts_sprq(rxq_ctrl);
278 * Free RX queue elements for Multi-Packet RQ.
281 * Pointer to RX queue structure.
284 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
286 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
289 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing WRs",
290 rxq->port_id, rxq->idx);
291 if (rxq->mprq_bufs == NULL)
293 assert(mlx5_rxq_check_vec_support(rxq) < 0);
294 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
295 if ((*rxq->mprq_bufs)[i] != NULL)
296 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
297 (*rxq->mprq_bufs)[i] = NULL;
299 if (rxq->mprq_repl != NULL) {
300 mlx5_mprq_buf_free(rxq->mprq_repl);
301 rxq->mprq_repl = NULL;
306 * Free RX queue elements for Single-Packet RQ.
309 * Pointer to RX queue structure.
312 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
314 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
315 const uint16_t q_n = (1 << rxq->elts_n);
316 const uint16_t q_mask = q_n - 1;
317 uint16_t used = q_n - (rxq->rq_ci - rxq->rq_pi);
320 DRV_LOG(DEBUG, "port %u Rx queue %u freeing WRs",
321 PORT_ID(rxq_ctrl->priv), rxq->idx);
322 if (rxq->elts == NULL)
325 * Some mbuf in the Ring belongs to the application. They cannot be
328 if (mlx5_rxq_check_vec_support(rxq) > 0) {
329 for (i = 0; i < used; ++i)
330 (*rxq->elts)[(rxq->rq_ci + i) & q_mask] = NULL;
331 rxq->rq_pi = rxq->rq_ci;
333 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
334 if ((*rxq->elts)[i] != NULL)
335 rte_pktmbuf_free_seg((*rxq->elts)[i]);
336 (*rxq->elts)[i] = NULL;
341 * Free RX queue elements.
344 * Pointer to RX queue structure.
347 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
349 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
350 rxq_free_elts_mprq(rxq_ctrl);
352 rxq_free_elts_sprq(rxq_ctrl);
356 * Clean up a RX queue.
358 * Destroy objects, free allocated memory and reset the structure for reuse.
361 * Pointer to RX queue structure.
364 mlx5_rxq_cleanup(struct mlx5_rxq_ctrl *rxq_ctrl)
366 DRV_LOG(DEBUG, "port %u cleaning up Rx queue %u",
367 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
369 mlx5_rxq_ibv_release(rxq_ctrl->ibv);
370 memset(rxq_ctrl, 0, sizeof(*rxq_ctrl));
374 * Returns the per-queue supported offloads.
377 * Pointer to Ethernet device.
380 * Supported Rx offloads.
383 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
385 struct mlx5_priv *priv = dev->data->dev_private;
386 struct mlx5_dev_config *config = &priv->config;
387 uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
388 DEV_RX_OFFLOAD_TIMESTAMP |
389 DEV_RX_OFFLOAD_JUMBO_FRAME);
391 if (config->hw_fcs_strip)
392 offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
395 offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
396 DEV_RX_OFFLOAD_UDP_CKSUM |
397 DEV_RX_OFFLOAD_TCP_CKSUM);
398 if (config->hw_vlan_strip)
399 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
405 * Returns the per-port supported offloads.
408 * Supported Rx offloads.
411 mlx5_get_rx_port_offloads(void)
413 uint64_t offloads = DEV_RX_OFFLOAD_VLAN_FILTER;
421 * Pointer to Ethernet device structure.
425 * Number of descriptors to configure in queue.
427 * NUMA socket on which memory must be allocated.
429 * Thresholds parameters.
431 * Memory pool for buffer allocations.
434 * 0 on success, a negative errno value otherwise and rte_errno is set.
437 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
438 unsigned int socket, const struct rte_eth_rxconf *conf,
439 struct rte_mempool *mp)
441 struct mlx5_priv *priv = dev->data->dev_private;
442 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
443 struct mlx5_rxq_ctrl *rxq_ctrl =
444 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
446 if (!rte_is_power_of_2(desc)) {
447 desc = 1 << log2above(desc);
449 "port %u increased number of descriptors in Rx queue %u"
450 " to the next power of two (%d)",
451 dev->data->port_id, idx, desc);
453 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
454 dev->data->port_id, idx, desc);
455 if (idx >= priv->rxqs_n) {
456 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
457 dev->data->port_id, idx, priv->rxqs_n);
458 rte_errno = EOVERFLOW;
461 if (!mlx5_rxq_releasable(dev, idx)) {
462 DRV_LOG(ERR, "port %u unable to release queue index %u",
463 dev->data->port_id, idx);
467 mlx5_rxq_release(dev, idx);
468 rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, mp);
470 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
471 dev->data->port_id, idx);
475 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
476 dev->data->port_id, idx);
477 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
482 * DPDK callback to release a RX queue.
485 * Generic RX queue pointer.
488 mlx5_rx_queue_release(void *dpdk_rxq)
490 struct mlx5_rxq_data *rxq = (struct mlx5_rxq_data *)dpdk_rxq;
491 struct mlx5_rxq_ctrl *rxq_ctrl;
492 struct mlx5_priv *priv;
496 rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);
497 priv = rxq_ctrl->priv;
498 if (!mlx5_rxq_releasable(ETH_DEV(priv), rxq_ctrl->rxq.idx))
499 rte_panic("port %u Rx queue %u is still used by a flow and"
500 " cannot be removed\n",
501 PORT_ID(priv), rxq->idx);
502 mlx5_rxq_release(ETH_DEV(priv), rxq_ctrl->rxq.idx);
506 * Allocate queue vector and fill epoll fd list for Rx interrupts.
509 * Pointer to Ethernet device.
512 * 0 on success, a negative errno value otherwise and rte_errno is set.
515 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
517 struct mlx5_priv *priv = dev->data->dev_private;
519 unsigned int rxqs_n = priv->rxqs_n;
520 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
521 unsigned int count = 0;
522 struct rte_intr_handle *intr_handle = dev->intr_handle;
524 if (!dev->data->dev_conf.intr_conf.rxq)
526 mlx5_rx_intr_vec_disable(dev);
527 intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
528 if (intr_handle->intr_vec == NULL) {
530 "port %u failed to allocate memory for interrupt"
531 " vector, Rx interrupts will not be supported",
536 intr_handle->type = RTE_INTR_HANDLE_EXT;
537 for (i = 0; i != n; ++i) {
538 /* This rxq ibv must not be released in this function. */
539 struct mlx5_rxq_ibv *rxq_ibv = mlx5_rxq_ibv_get(dev, i);
544 /* Skip queues that cannot request interrupts. */
545 if (!rxq_ibv || !rxq_ibv->channel) {
546 /* Use invalid intr_vec[] index to disable entry. */
547 intr_handle->intr_vec[i] =
548 RTE_INTR_VEC_RXTX_OFFSET +
549 RTE_MAX_RXTX_INTR_VEC_ID;
552 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
554 "port %u too many Rx queues for interrupt"
555 " vector size (%d), Rx interrupts cannot be"
557 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
558 mlx5_rx_intr_vec_disable(dev);
562 fd = rxq_ibv->channel->fd;
563 flags = fcntl(fd, F_GETFL);
564 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
568 "port %u failed to make Rx interrupt file"
569 " descriptor %d non-blocking for queue index"
571 dev->data->port_id, fd, i);
572 mlx5_rx_intr_vec_disable(dev);
575 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
576 intr_handle->efds[count] = fd;
580 mlx5_rx_intr_vec_disable(dev);
582 intr_handle->nb_efd = count;
587 * Clean up Rx interrupts handler.
590 * Pointer to Ethernet device.
593 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
595 struct mlx5_priv *priv = dev->data->dev_private;
596 struct rte_intr_handle *intr_handle = dev->intr_handle;
598 unsigned int rxqs_n = priv->rxqs_n;
599 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
601 if (!dev->data->dev_conf.intr_conf.rxq)
603 if (!intr_handle->intr_vec)
605 for (i = 0; i != n; ++i) {
606 struct mlx5_rxq_ctrl *rxq_ctrl;
607 struct mlx5_rxq_data *rxq_data;
609 if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
610 RTE_MAX_RXTX_INTR_VEC_ID)
613 * Need to access directly the queue to release the reference
614 * kept in priv_rx_intr_vec_enable().
616 rxq_data = (*priv->rxqs)[i];
617 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
618 mlx5_rxq_ibv_release(rxq_ctrl->ibv);
621 rte_intr_free_epoll_fd(intr_handle);
622 if (intr_handle->intr_vec)
623 free(intr_handle->intr_vec);
624 intr_handle->nb_efd = 0;
625 intr_handle->intr_vec = NULL;
629 * MLX5 CQ notification .
632 * Pointer to receive queue structure.
634 * Sequence number per receive queue .
637 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
640 uint32_t doorbell_hi;
642 void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
644 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
645 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
646 doorbell = (uint64_t)doorbell_hi << 32;
647 doorbell |= rxq->cqn;
648 rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
649 mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
650 cq_db_reg, rxq->uar_lock_cq);
654 * DPDK callback for Rx queue interrupt enable.
657 * Pointer to Ethernet device structure.
662 * 0 on success, a negative errno value otherwise and rte_errno is set.
665 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
667 struct mlx5_priv *priv = dev->data->dev_private;
668 struct mlx5_rxq_data *rxq_data;
669 struct mlx5_rxq_ctrl *rxq_ctrl;
671 rxq_data = (*priv->rxqs)[rx_queue_id];
676 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
678 struct mlx5_rxq_ibv *rxq_ibv;
680 rxq_ibv = mlx5_rxq_ibv_get(dev, rx_queue_id);
685 mlx5_arm_cq(rxq_data, rxq_data->cq_arm_sn);
686 mlx5_rxq_ibv_release(rxq_ibv);
692 * DPDK callback for Rx queue interrupt disable.
695 * Pointer to Ethernet device structure.
700 * 0 on success, a negative errno value otherwise and rte_errno is set.
703 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
705 struct mlx5_priv *priv = dev->data->dev_private;
706 struct mlx5_rxq_data *rxq_data;
707 struct mlx5_rxq_ctrl *rxq_ctrl;
708 struct mlx5_rxq_ibv *rxq_ibv = NULL;
709 struct ibv_cq *ev_cq;
713 rxq_data = (*priv->rxqs)[rx_queue_id];
718 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
721 rxq_ibv = mlx5_rxq_ibv_get(dev, rx_queue_id);
726 ret = mlx5_glue->get_cq_event(rxq_ibv->channel, &ev_cq, &ev_ctx);
727 if (ret || ev_cq != rxq_ibv->cq) {
731 rxq_data->cq_arm_sn++;
732 mlx5_glue->ack_cq_events(rxq_ibv->cq, 1);
733 mlx5_rxq_ibv_release(rxq_ibv);
736 ret = rte_errno; /* Save rte_errno before cleanup. */
738 mlx5_rxq_ibv_release(rxq_ibv);
739 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
740 dev->data->port_id, rx_queue_id);
741 rte_errno = ret; /* Restore rte_errno. */
746 * Create the Rx queue Verbs object.
749 * Pointer to Ethernet device.
751 * Queue index in DPDK Rx queue array
754 * The Verbs object initialised, NULL otherwise and rte_errno is set.
756 struct mlx5_rxq_ibv *
757 mlx5_rxq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
759 struct mlx5_priv *priv = dev->data->dev_private;
760 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
761 struct mlx5_rxq_ctrl *rxq_ctrl =
762 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
763 struct ibv_wq_attr mod;
766 struct ibv_cq_init_attr_ex ibv;
767 struct mlx5dv_cq_init_attr mlx5;
770 struct ibv_wq_init_attr ibv;
771 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
772 struct mlx5dv_wq_init_attr mlx5;
775 struct ibv_cq_ex cq_attr;
778 unsigned int wqe_n = 1 << rxq_data->elts_n;
779 struct mlx5_rxq_ibv *tmpl;
780 struct mlx5dv_cq cq_info;
781 struct mlx5dv_rwq rwq;
784 struct mlx5dv_obj obj;
785 struct mlx5_dev_config *config = &priv->config;
786 const int mprq_en = mlx5_rxq_mprq_enabled(rxq_data);
789 assert(!rxq_ctrl->ibv);
790 priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_RX_QUEUE;
791 priv->verbs_alloc_ctx.obj = rxq_ctrl;
792 tmpl = rte_calloc_socket(__func__, 1, sizeof(*tmpl), 0,
796 "port %u Rx queue %u cannot allocate verbs resources",
797 dev->data->port_id, rxq_data->idx);
801 tmpl->rxq_ctrl = rxq_ctrl;
803 tmpl->channel = mlx5_glue->create_comp_channel(priv->sh->ctx);
804 if (!tmpl->channel) {
805 DRV_LOG(ERR, "port %u: comp channel creation failure",
812 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
815 attr.cq.ibv = (struct ibv_cq_init_attr_ex){
817 .channel = tmpl->channel,
820 attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
823 if (config->cqe_comp && !rxq_data->hw_timestamp) {
824 attr.cq.mlx5.comp_mask |=
825 MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
826 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
827 attr.cq.mlx5.cqe_comp_res_format =
828 mprq_en ? MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX :
829 MLX5DV_CQE_RES_FORMAT_HASH;
831 attr.cq.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
834 * For vectorized Rx, it must not be doubled in order to
835 * make cq_ci and rq_ci aligned.
837 if (mlx5_rxq_check_vec_support(rxq_data) < 0)
838 attr.cq.ibv.cqe *= 2;
839 } else if (config->cqe_comp && rxq_data->hw_timestamp) {
841 "port %u Rx CQE compression is disabled for HW"
845 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
846 if (config->cqe_pad) {
847 attr.cq.mlx5.comp_mask |= MLX5DV_CQ_INIT_ATTR_MASK_FLAGS;
848 attr.cq.mlx5.flags |= MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD;
851 tmpl->cq = mlx5_glue->cq_ex_to_cq
852 (mlx5_glue->dv_create_cq(priv->sh->ctx, &attr.cq.ibv,
854 if (tmpl->cq == NULL) {
855 DRV_LOG(ERR, "port %u Rx queue %u CQ creation failure",
856 dev->data->port_id, idx);
860 DRV_LOG(DEBUG, "port %u device_attr.max_qp_wr is %d",
861 dev->data->port_id, priv->sh->device_attr.orig_attr.max_qp_wr);
862 DRV_LOG(DEBUG, "port %u device_attr.max_sge is %d",
863 dev->data->port_id, priv->sh->device_attr.orig_attr.max_sge);
864 attr.wq.ibv = (struct ibv_wq_init_attr){
865 .wq_context = NULL, /* Could be useful in the future. */
866 .wq_type = IBV_WQT_RQ,
867 /* Max number of outstanding WRs. */
868 .max_wr = wqe_n >> rxq_data->sges_n,
869 /* Max number of scatter/gather elements in a WR. */
870 .max_sge = 1 << rxq_data->sges_n,
874 IBV_WQ_FLAGS_CVLAN_STRIPPING |
876 .create_flags = (rxq_data->vlan_strip ?
877 IBV_WQ_FLAGS_CVLAN_STRIPPING :
880 /* By default, FCS (CRC) is stripped by hardware. */
881 if (rxq_data->crc_present) {
882 attr.wq.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;
883 attr.wq.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
885 if (config->hw_padding) {
886 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
887 attr.wq.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;
888 attr.wq.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
889 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
890 attr.wq.ibv.create_flags |= IBV_WQ_FLAGS_PCI_WRITE_END_PADDING;
891 attr.wq.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
894 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
895 attr.wq.mlx5 = (struct mlx5dv_wq_init_attr){
899 struct mlx5dv_striding_rq_init_attr *mprq_attr =
900 &attr.wq.mlx5.striding_rq_attrs;
902 attr.wq.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;
903 *mprq_attr = (struct mlx5dv_striding_rq_init_attr){
904 .single_stride_log_num_of_bytes = rxq_data->strd_sz_n,
905 .single_wqe_log_num_of_strides = rxq_data->strd_num_n,
906 .two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,
909 tmpl->wq = mlx5_glue->dv_create_wq(priv->sh->ctx, &attr.wq.ibv,
912 tmpl->wq = mlx5_glue->create_wq(priv->sh->ctx, &attr.wq.ibv);
914 if (tmpl->wq == NULL) {
915 DRV_LOG(ERR, "port %u Rx queue %u WQ creation failure",
916 dev->data->port_id, idx);
921 * Make sure number of WRs*SGEs match expectations since a queue
922 * cannot allocate more than "desc" buffers.
924 if (attr.wq.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||
925 attr.wq.ibv.max_sge != (1u << rxq_data->sges_n)) {
927 "port %u Rx queue %u requested %u*%u but got %u*%u"
929 dev->data->port_id, idx,
930 wqe_n >> rxq_data->sges_n, (1 << rxq_data->sges_n),
931 attr.wq.ibv.max_wr, attr.wq.ibv.max_sge);
935 /* Change queue state to ready. */
936 mod = (struct ibv_wq_attr){
937 .attr_mask = IBV_WQ_ATTR_STATE,
938 .wq_state = IBV_WQS_RDY,
940 ret = mlx5_glue->modify_wq(tmpl->wq, &mod);
943 "port %u Rx queue %u WQ state to IBV_WQS_RDY failed",
944 dev->data->port_id, idx);
948 obj.cq.in = tmpl->cq;
949 obj.cq.out = &cq_info;
950 obj.rwq.in = tmpl->wq;
952 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_CQ | MLX5DV_OBJ_RWQ);
957 if (cq_info.cqe_size != RTE_CACHE_LINE_SIZE) {
959 "port %u wrong MLX5_CQE_SIZE environment variable"
960 " value: it should be set to %u",
961 dev->data->port_id, RTE_CACHE_LINE_SIZE);
965 /* Fill the rings. */
966 rxq_data->wqes = rwq.buf;
967 for (i = 0; (i != wqe_n); ++i) {
968 volatile struct mlx5_wqe_data_seg *scat;
973 struct mlx5_mprq_buf *buf = (*rxq_data->mprq_bufs)[i];
975 scat = &((volatile struct mlx5_wqe_mprq *)
976 rxq_data->wqes)[i].dseg;
977 addr = (uintptr_t)mlx5_mprq_buf_addr(buf);
978 byte_count = (1 << rxq_data->strd_sz_n) *
979 (1 << rxq_data->strd_num_n);
981 struct rte_mbuf *buf = (*rxq_data->elts)[i];
983 scat = &((volatile struct mlx5_wqe_data_seg *)
985 addr = rte_pktmbuf_mtod(buf, uintptr_t);
986 byte_count = DATA_LEN(buf);
988 /* scat->addr must be able to store a pointer. */
989 assert(sizeof(scat->addr) >= sizeof(uintptr_t));
990 *scat = (struct mlx5_wqe_data_seg){
991 .addr = rte_cpu_to_be_64(addr),
992 .byte_count = rte_cpu_to_be_32(byte_count),
993 .lkey = mlx5_rx_addr2mr(rxq_data, addr),
996 rxq_data->rq_db = rwq.dbrec;
997 rxq_data->cqe_n = log2above(cq_info.cqe_cnt);
999 rxq_data->consumed_strd = 0;
1000 rxq_data->rq_pi = 0;
1001 rxq_data->zip = (struct rxq_zip){
1004 rxq_data->cq_db = cq_info.dbrec;
1005 rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)cq_info.buf;
1006 rxq_data->cq_uar = cq_info.cq_uar;
1007 rxq_data->cqn = cq_info.cqn;
1008 rxq_data->cq_arm_sn = 0;
1009 /* Update doorbell counter. */
1010 rxq_data->rq_ci = wqe_n >> rxq_data->sges_n;
1012 *rxq_data->rq_db = rte_cpu_to_be_32(rxq_data->rq_ci);
1013 DRV_LOG(DEBUG, "port %u rxq %u updated with %p", dev->data->port_id,
1014 idx, (void *)&tmpl);
1015 rte_atomic32_inc(&tmpl->refcnt);
1016 LIST_INSERT_HEAD(&priv->rxqsibv, tmpl, next);
1017 priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1020 ret = rte_errno; /* Save rte_errno before cleanup. */
1022 claim_zero(mlx5_glue->destroy_wq(tmpl->wq));
1024 claim_zero(mlx5_glue->destroy_cq(tmpl->cq));
1026 claim_zero(mlx5_glue->destroy_comp_channel(tmpl->channel));
1027 priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1028 rte_errno = ret; /* Restore rte_errno. */
1033 * Get an Rx queue Verbs object.
1036 * Pointer to Ethernet device.
1038 * Queue index in DPDK Rx queue array
1041 * The Verbs object if it exists.
1043 struct mlx5_rxq_ibv *
1044 mlx5_rxq_ibv_get(struct rte_eth_dev *dev, uint16_t idx)
1046 struct mlx5_priv *priv = dev->data->dev_private;
1047 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1048 struct mlx5_rxq_ctrl *rxq_ctrl;
1050 if (idx >= priv->rxqs_n)
1054 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1055 if (rxq_ctrl->ibv) {
1056 rte_atomic32_inc(&rxq_ctrl->ibv->refcnt);
1058 return rxq_ctrl->ibv;
1062 * Release an Rx verbs queue object.
1065 * Verbs Rx queue object.
1068 * 1 while a reference on it exists, 0 when freed.
1071 mlx5_rxq_ibv_release(struct mlx5_rxq_ibv *rxq_ibv)
1074 assert(rxq_ibv->wq);
1075 assert(rxq_ibv->cq);
1076 if (rte_atomic32_dec_and_test(&rxq_ibv->refcnt)) {
1077 rxq_free_elts(rxq_ibv->rxq_ctrl);
1078 claim_zero(mlx5_glue->destroy_wq(rxq_ibv->wq));
1079 claim_zero(mlx5_glue->destroy_cq(rxq_ibv->cq));
1080 if (rxq_ibv->channel)
1081 claim_zero(mlx5_glue->destroy_comp_channel
1082 (rxq_ibv->channel));
1083 LIST_REMOVE(rxq_ibv, next);
1091 * Verify the Verbs Rx queue list is empty
1094 * Pointer to Ethernet device.
1097 * The number of object not released.
1100 mlx5_rxq_ibv_verify(struct rte_eth_dev *dev)
1102 struct mlx5_priv *priv = dev->data->dev_private;
1104 struct mlx5_rxq_ibv *rxq_ibv;
1106 LIST_FOREACH(rxq_ibv, &priv->rxqsibv, next) {
1107 DRV_LOG(DEBUG, "port %u Verbs Rx queue %u still referenced",
1108 dev->data->port_id, rxq_ibv->rxq_ctrl->rxq.idx);
1115 * Return true if a single reference exists on the object.
1118 * Verbs Rx queue object.
1121 mlx5_rxq_ibv_releasable(struct mlx5_rxq_ibv *rxq_ibv)
1124 return (rte_atomic32_read(&rxq_ibv->refcnt) == 1);
1128 * Callback function to initialize mbufs for Multi-Packet RQ.
1131 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg __rte_unused,
1132 void *_m, unsigned int i __rte_unused)
1134 struct mlx5_mprq_buf *buf = _m;
1136 memset(_m, 0, sizeof(*buf));
1138 rte_atomic16_set(&buf->refcnt, 1);
1142 * Free mempool of Multi-Packet RQ.
1145 * Pointer to Ethernet device.
1148 * 0 on success, negative errno value on failure.
1151 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1153 struct mlx5_priv *priv = dev->data->dev_private;
1154 struct rte_mempool *mp = priv->mprq_mp;
1159 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1160 dev->data->port_id, mp->name);
1162 * If a buffer in the pool has been externally attached to a mbuf and it
1163 * is still in use by application, destroying the Rx qeueue can spoil
1164 * the packet. It is unlikely to happen but if application dynamically
1165 * creates and destroys with holding Rx packets, this can happen.
1167 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1168 * RQ isn't provided by application but managed by PMD.
1170 if (!rte_mempool_full(mp)) {
1172 "port %u mempool for Multi-Packet RQ is still in use",
1173 dev->data->port_id);
1177 rte_mempool_free(mp);
1178 /* Unset mempool for each Rx queue. */
1179 for (i = 0; i != priv->rxqs_n; ++i) {
1180 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1184 rxq->mprq_mp = NULL;
1186 priv->mprq_mp = NULL;
1191 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1192 * mempool. If already allocated, reuse it if there're enough elements.
1193 * Otherwise, resize it.
1196 * Pointer to Ethernet device.
1199 * 0 on success, negative errno value on failure.
1202 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1204 struct mlx5_priv *priv = dev->data->dev_private;
1205 struct rte_mempool *mp = priv->mprq_mp;
1206 char name[RTE_MEMPOOL_NAMESIZE];
1207 unsigned int desc = 0;
1208 unsigned int buf_len;
1209 unsigned int obj_num;
1210 unsigned int obj_size;
1211 unsigned int strd_num_n = 0;
1212 unsigned int strd_sz_n = 0;
1215 if (!mlx5_mprq_enabled(dev))
1217 /* Count the total number of descriptors configured. */
1218 for (i = 0; i != priv->rxqs_n; ++i) {
1219 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1223 desc += 1 << rxq->elts_n;
1224 /* Get the max number of strides. */
1225 if (strd_num_n < rxq->strd_num_n)
1226 strd_num_n = rxq->strd_num_n;
1227 /* Get the max size of a stride. */
1228 if (strd_sz_n < rxq->strd_sz_n)
1229 strd_sz_n = rxq->strd_sz_n;
1231 assert(strd_num_n && strd_sz_n);
1232 buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1233 obj_size = buf_len + sizeof(struct mlx5_mprq_buf);
1235 * Received packets can be either memcpy'd or externally referenced. In
1236 * case that the packet is attached to an mbuf as an external buffer, as
1237 * it isn't possible to predict how the buffers will be queued by
1238 * application, there's no option to exactly pre-allocate needed buffers
1239 * in advance but to speculatively prepares enough buffers.
1241 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1242 * received packets to buffers provided by application (rxq->mp) until
1243 * this Mempool gets available again.
1246 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * priv->rxqs_n;
1248 * rte_mempool_create_empty() has sanity check to refuse large cache
1249 * size compared to the number of elements.
1250 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1251 * constant number 2 instead.
1253 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1254 /* Check a mempool is already allocated and if it can be resued. */
1255 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1256 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1257 dev->data->port_id, mp->name);
1260 } else if (mp != NULL) {
1261 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1262 dev->data->port_id, mp->name);
1264 * If failed to free, which means it may be still in use, no way
1265 * but to keep using the existing one. On buffer underrun,
1266 * packets will be memcpy'd instead of external buffer
1269 if (mlx5_mprq_free_mp(dev)) {
1270 if (mp->elt_size >= obj_size)
1276 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1277 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1278 0, NULL, NULL, mlx5_mprq_buf_init, NULL,
1279 dev->device->numa_node, 0);
1282 "port %u failed to allocate a mempool for"
1283 " Multi-Packet RQ, count=%u, size=%u",
1284 dev->data->port_id, obj_num, obj_size);
1290 /* Set mempool for each Rx queue. */
1291 for (i = 0; i != priv->rxqs_n; ++i) {
1292 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1298 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1299 dev->data->port_id);
1304 * Create a DPDK Rx queue.
1307 * Pointer to Ethernet device.
1311 * Number of descriptors to configure in queue.
1313 * NUMA socket on which memory must be allocated.
1316 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1318 struct mlx5_rxq_ctrl *
1319 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1320 unsigned int socket, const struct rte_eth_rxconf *conf,
1321 struct rte_mempool *mp)
1323 struct mlx5_priv *priv = dev->data->dev_private;
1324 struct mlx5_rxq_ctrl *tmpl;
1325 unsigned int mb_len = rte_pktmbuf_data_room_size(mp);
1326 unsigned int mprq_stride_size;
1327 struct mlx5_dev_config *config = &priv->config;
1329 * Always allocate extra slots, even if eventually
1330 * the vector Rx will not be used.
1333 desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1334 uint64_t offloads = conf->offloads |
1335 dev->data->dev_conf.rxmode.offloads;
1336 const int mprq_en = mlx5_check_mprq_support(dev) > 0;
1338 tmpl = rte_calloc_socket("RXQ", 1,
1340 desc_n * sizeof(struct rte_mbuf *),
1346 if (mlx5_mr_btree_init(&tmpl->rxq.mr_ctrl.cache_bh,
1347 MLX5_MR_BTREE_CACHE_N, socket)) {
1348 /* rte_errno is already set. */
1351 tmpl->socket = socket;
1352 if (dev->data->dev_conf.intr_conf.rxq)
1355 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1356 * following conditions are met:
1357 * - MPRQ is enabled.
1358 * - The number of descs is more than the number of strides.
1359 * - max_rx_pkt_len plus overhead is less than the max size of a
1361 * Otherwise, enable Rx scatter if necessary.
1363 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
1365 dev->data->dev_conf.rxmode.max_rx_pkt_len +
1366 sizeof(struct rte_mbuf_ext_shared_info) +
1367 RTE_PKTMBUF_HEADROOM;
1369 desc > (1U << config->mprq.stride_num_n) &&
1370 mprq_stride_size <= (1U << config->mprq.max_stride_size_n)) {
1371 /* TODO: Rx scatter isn't supported yet. */
1372 tmpl->rxq.sges_n = 0;
1373 /* Trim the number of descs needed. */
1374 desc >>= config->mprq.stride_num_n;
1375 tmpl->rxq.strd_num_n = config->mprq.stride_num_n;
1376 tmpl->rxq.strd_sz_n = RTE_MAX(log2above(mprq_stride_size),
1377 config->mprq.min_stride_size_n);
1378 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1379 tmpl->rxq.mprq_max_memcpy_len =
1380 RTE_MIN(mb_len - RTE_PKTMBUF_HEADROOM,
1381 config->mprq.max_memcpy_len);
1383 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1384 " strd_num_n = %u, strd_sz_n = %u",
1385 dev->data->port_id, idx,
1386 tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1387 } else if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
1388 (mb_len - RTE_PKTMBUF_HEADROOM)) {
1389 tmpl->rxq.sges_n = 0;
1390 } else if (offloads & DEV_RX_OFFLOAD_SCATTER) {
1392 RTE_PKTMBUF_HEADROOM +
1393 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1394 unsigned int sges_n;
1397 * Determine the number of SGEs needed for a full packet
1398 * and round it to the next power of two.
1400 sges_n = log2above((size / mb_len) + !!(size % mb_len));
1401 tmpl->rxq.sges_n = sges_n;
1402 /* Make sure rxq.sges_n did not overflow. */
1403 size = mb_len * (1 << tmpl->rxq.sges_n);
1404 size -= RTE_PKTMBUF_HEADROOM;
1405 if (size < dev->data->dev_conf.rxmode.max_rx_pkt_len) {
1407 "port %u too many SGEs (%u) needed to handle"
1408 " requested maximum packet size %u",
1411 dev->data->dev_conf.rxmode.max_rx_pkt_len);
1412 rte_errno = EOVERFLOW;
1417 "port %u the requested maximum Rx packet size (%u) is"
1418 " larger than a single mbuf (%u) and scattered mode has"
1419 " not been requested",
1421 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1422 mb_len - RTE_PKTMBUF_HEADROOM);
1424 if (mprq_en && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1426 "port %u MPRQ is requested but cannot be enabled"
1427 " (requested: desc = %u, stride_sz = %u,"
1428 " supported: min_stride_num = %u, max_stride_sz = %u).",
1429 dev->data->port_id, desc, mprq_stride_size,
1430 (1 << config->mprq.stride_num_n),
1431 (1 << config->mprq.max_stride_size_n));
1432 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1433 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1434 if (desc % (1 << tmpl->rxq.sges_n)) {
1436 "port %u number of Rx queue descriptors (%u) is not a"
1437 " multiple of SGEs per packet (%u)",
1440 1 << tmpl->rxq.sges_n);
1444 /* Toggle RX checksum offload if hardware supports it. */
1445 tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);
1446 tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);
1447 /* Configure VLAN stripping. */
1448 tmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
1449 /* By default, FCS (CRC) is stripped by hardware. */
1450 tmpl->rxq.crc_present = 0;
1451 if (offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
1452 if (config->hw_fcs_strip) {
1453 tmpl->rxq.crc_present = 1;
1456 "port %u CRC stripping has been disabled but will"
1457 " still be performed by hardware, make sure MLNX_OFED"
1458 " and firmware are up to date",
1459 dev->data->port_id);
1463 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1464 " incoming frames to hide it",
1466 tmpl->rxq.crc_present ? "disabled" : "enabled",
1467 tmpl->rxq.crc_present << 2);
1469 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1470 (!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
1471 tmpl->rxq.port_id = dev->data->port_id;
1474 tmpl->rxq.elts_n = log2above(desc);
1475 tmpl->rxq.rq_repl_thresh =
1476 MLX5_VPMD_RXQ_RPLNSH_THRESH(1 << tmpl->rxq.elts_n);
1478 (struct rte_mbuf *(*)[1 << tmpl->rxq.elts_n])(tmpl + 1);
1480 tmpl->rxq.uar_lock_cq = &priv->uar_lock_cq;
1482 tmpl->rxq.idx = idx;
1483 rte_atomic32_inc(&tmpl->refcnt);
1484 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1495 * Pointer to Ethernet device.
1500 * A pointer to the queue if it exists, NULL otherwise.
1502 struct mlx5_rxq_ctrl *
1503 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1505 struct mlx5_priv *priv = dev->data->dev_private;
1506 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1508 if ((*priv->rxqs)[idx]) {
1509 rxq_ctrl = container_of((*priv->rxqs)[idx],
1510 struct mlx5_rxq_ctrl,
1512 mlx5_rxq_ibv_get(dev, idx);
1513 rte_atomic32_inc(&rxq_ctrl->refcnt);
1519 * Release a Rx queue.
1522 * Pointer to Ethernet device.
1527 * 1 while a reference on it exists, 0 when freed.
1530 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1532 struct mlx5_priv *priv = dev->data->dev_private;
1533 struct mlx5_rxq_ctrl *rxq_ctrl;
1535 if (!(*priv->rxqs)[idx])
1537 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1538 assert(rxq_ctrl->priv);
1539 if (rxq_ctrl->ibv && !mlx5_rxq_ibv_release(rxq_ctrl->ibv))
1540 rxq_ctrl->ibv = NULL;
1541 if (rte_atomic32_dec_and_test(&rxq_ctrl->refcnt)) {
1542 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1543 LIST_REMOVE(rxq_ctrl, next);
1545 (*priv->rxqs)[idx] = NULL;
1552 * Verify if the queue can be released.
1555 * Pointer to Ethernet device.
1560 * 1 if the queue can be released, negative errno otherwise and rte_errno is
1564 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
1566 struct mlx5_priv *priv = dev->data->dev_private;
1567 struct mlx5_rxq_ctrl *rxq_ctrl;
1569 if (!(*priv->rxqs)[idx]) {
1573 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1574 return (rte_atomic32_read(&rxq_ctrl->refcnt) == 1);
1578 * Verify the Rx Queue list is empty
1581 * Pointer to Ethernet device.
1584 * The number of object not released.
1587 mlx5_rxq_verify(struct rte_eth_dev *dev)
1589 struct mlx5_priv *priv = dev->data->dev_private;
1590 struct mlx5_rxq_ctrl *rxq_ctrl;
1593 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1594 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1595 dev->data->port_id, rxq_ctrl->rxq.idx);
1602 * Create an indirection table.
1605 * Pointer to Ethernet device.
1607 * Queues entering in the indirection table.
1609 * Number of queues in the array.
1612 * The Verbs object initialised, NULL otherwise and rte_errno is set.
1614 struct mlx5_ind_table_ibv *
1615 mlx5_ind_table_ibv_new(struct rte_eth_dev *dev, const uint16_t *queues,
1618 struct mlx5_priv *priv = dev->data->dev_private;
1619 struct mlx5_ind_table_ibv *ind_tbl;
1620 const unsigned int wq_n = rte_is_power_of_2(queues_n) ?
1621 log2above(queues_n) :
1622 log2above(priv->config.ind_table_max_size);
1623 struct ibv_wq *wq[1 << wq_n];
1627 ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl) +
1628 queues_n * sizeof(uint16_t), 0);
1633 for (i = 0; i != queues_n; ++i) {
1634 struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
1638 wq[i] = rxq->ibv->wq;
1639 ind_tbl->queues[i] = queues[i];
1641 ind_tbl->queues_n = queues_n;
1642 /* Finalise indirection table. */
1643 for (j = 0; i != (unsigned int)(1 << wq_n); ++i, ++j)
1645 ind_tbl->ind_table = mlx5_glue->create_rwq_ind_table
1647 &(struct ibv_rwq_ind_table_init_attr){
1648 .log_ind_tbl_size = wq_n,
1652 if (!ind_tbl->ind_table) {
1656 rte_atomic32_inc(&ind_tbl->refcnt);
1657 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
1661 DEBUG("port %u cannot create indirection table", dev->data->port_id);
1666 * Get an indirection table.
1669 * Pointer to Ethernet device.
1671 * Queues entering in the indirection table.
1673 * Number of queues in the array.
1676 * An indirection table if found.
1678 struct mlx5_ind_table_ibv *
1679 mlx5_ind_table_ibv_get(struct rte_eth_dev *dev, const uint16_t *queues,
1682 struct mlx5_priv *priv = dev->data->dev_private;
1683 struct mlx5_ind_table_ibv *ind_tbl;
1685 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1686 if ((ind_tbl->queues_n == queues_n) &&
1687 (memcmp(ind_tbl->queues, queues,
1688 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1695 rte_atomic32_inc(&ind_tbl->refcnt);
1696 for (i = 0; i != ind_tbl->queues_n; ++i)
1697 mlx5_rxq_get(dev, ind_tbl->queues[i]);
1703 * Release an indirection table.
1706 * Pointer to Ethernet device.
1708 * Indirection table to release.
1711 * 1 while a reference on it exists, 0 when freed.
1714 mlx5_ind_table_ibv_release(struct rte_eth_dev *dev,
1715 struct mlx5_ind_table_ibv *ind_tbl)
1719 if (rte_atomic32_dec_and_test(&ind_tbl->refcnt))
1720 claim_zero(mlx5_glue->destroy_rwq_ind_table
1721 (ind_tbl->ind_table));
1722 for (i = 0; i != ind_tbl->queues_n; ++i)
1723 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1724 if (!rte_atomic32_read(&ind_tbl->refcnt)) {
1725 LIST_REMOVE(ind_tbl, next);
1733 * Verify the Rx Queue list is empty
1736 * Pointer to Ethernet device.
1739 * The number of object not released.
1742 mlx5_ind_table_ibv_verify(struct rte_eth_dev *dev)
1744 struct mlx5_priv *priv = dev->data->dev_private;
1745 struct mlx5_ind_table_ibv *ind_tbl;
1748 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1750 "port %u Verbs indirection table %p still referenced",
1751 dev->data->port_id, (void *)ind_tbl);
1758 * Create an Rx Hash queue.
1761 * Pointer to Ethernet device.
1763 * RSS key for the Rx hash queue.
1764 * @param rss_key_len
1766 * @param hash_fields
1767 * Verbs protocol hash field to make the RSS on.
1769 * Queues entering in hash queue. In case of empty hash_fields only the
1770 * first queue index will be taken for the indirection table.
1777 * The Verbs object initialised, NULL otherwise and rte_errno is set.
1780 mlx5_hrxq_new(struct rte_eth_dev *dev,
1781 const uint8_t *rss_key, uint32_t rss_key_len,
1782 uint64_t hash_fields,
1783 const uint16_t *queues, uint32_t queues_n,
1784 int tunnel __rte_unused)
1786 struct mlx5_priv *priv = dev->data->dev_private;
1787 struct mlx5_hrxq *hrxq;
1788 struct mlx5_ind_table_ibv *ind_tbl;
1790 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1791 struct mlx5dv_qp_init_attr qp_init_attr;
1795 queues_n = hash_fields ? queues_n : 1;
1796 ind_tbl = mlx5_ind_table_ibv_get(dev, queues, queues_n);
1798 ind_tbl = mlx5_ind_table_ibv_new(dev, queues, queues_n);
1803 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1804 memset(&qp_init_attr, 0, sizeof(qp_init_attr));
1806 qp_init_attr.comp_mask =
1807 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS;
1808 qp_init_attr.create_flags = MLX5DV_QP_CREATE_TUNNEL_OFFLOADS;
1810 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1811 if (dev->data->dev_conf.lpbk_mode) {
1812 /* Allow packet sent from NIC loop back w/o source MAC check. */
1813 qp_init_attr.comp_mask |=
1814 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS;
1815 qp_init_attr.create_flags |=
1816 MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC;
1819 qp = mlx5_glue->dv_create_qp
1821 &(struct ibv_qp_init_attr_ex){
1822 .qp_type = IBV_QPT_RAW_PACKET,
1824 IBV_QP_INIT_ATTR_PD |
1825 IBV_QP_INIT_ATTR_IND_TABLE |
1826 IBV_QP_INIT_ATTR_RX_HASH,
1827 .rx_hash_conf = (struct ibv_rx_hash_conf){
1828 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1829 .rx_hash_key_len = rss_key_len,
1830 .rx_hash_key = (void *)(uintptr_t)rss_key,
1831 .rx_hash_fields_mask = hash_fields,
1833 .rwq_ind_tbl = ind_tbl->ind_table,
1838 qp = mlx5_glue->create_qp_ex
1840 &(struct ibv_qp_init_attr_ex){
1841 .qp_type = IBV_QPT_RAW_PACKET,
1843 IBV_QP_INIT_ATTR_PD |
1844 IBV_QP_INIT_ATTR_IND_TABLE |
1845 IBV_QP_INIT_ATTR_RX_HASH,
1846 .rx_hash_conf = (struct ibv_rx_hash_conf){
1847 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1848 .rx_hash_key_len = rss_key_len,
1849 .rx_hash_key = (void *)(uintptr_t)rss_key,
1850 .rx_hash_fields_mask = hash_fields,
1852 .rwq_ind_tbl = ind_tbl->ind_table,
1860 hrxq = rte_calloc(__func__, 1, sizeof(*hrxq) + rss_key_len, 0);
1863 hrxq->ind_table = ind_tbl;
1865 hrxq->rss_key_len = rss_key_len;
1866 hrxq->hash_fields = hash_fields;
1867 memcpy(hrxq->rss_key, rss_key, rss_key_len);
1868 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1869 hrxq->action = mlx5_glue->dv_create_flow_action_dest_ibv_qp(hrxq->qp);
1870 if (!hrxq->action) {
1875 rte_atomic32_inc(&hrxq->refcnt);
1876 LIST_INSERT_HEAD(&priv->hrxqs, hrxq, next);
1879 err = rte_errno; /* Save rte_errno before cleanup. */
1880 mlx5_ind_table_ibv_release(dev, ind_tbl);
1882 claim_zero(mlx5_glue->destroy_qp(qp));
1883 rte_errno = err; /* Restore rte_errno. */
1888 * Get an Rx Hash queue.
1891 * Pointer to Ethernet device.
1893 * RSS configuration for the Rx hash queue.
1895 * Queues entering in hash queue. In case of empty hash_fields only the
1896 * first queue index will be taken for the indirection table.
1901 * An hash Rx queue on success.
1904 mlx5_hrxq_get(struct rte_eth_dev *dev,
1905 const uint8_t *rss_key, uint32_t rss_key_len,
1906 uint64_t hash_fields,
1907 const uint16_t *queues, uint32_t queues_n)
1909 struct mlx5_priv *priv = dev->data->dev_private;
1910 struct mlx5_hrxq *hrxq;
1912 queues_n = hash_fields ? queues_n : 1;
1913 LIST_FOREACH(hrxq, &priv->hrxqs, next) {
1914 struct mlx5_ind_table_ibv *ind_tbl;
1916 if (hrxq->rss_key_len != rss_key_len)
1918 if (memcmp(hrxq->rss_key, rss_key, rss_key_len))
1920 if (hrxq->hash_fields != hash_fields)
1922 ind_tbl = mlx5_ind_table_ibv_get(dev, queues, queues_n);
1925 if (ind_tbl != hrxq->ind_table) {
1926 mlx5_ind_table_ibv_release(dev, ind_tbl);
1929 rte_atomic32_inc(&hrxq->refcnt);
1936 * Release the hash Rx queue.
1939 * Pointer to Ethernet device.
1941 * Pointer to Hash Rx queue to release.
1944 * 1 while a reference on it exists, 0 when freed.
1947 mlx5_hrxq_release(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
1949 if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
1950 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1951 mlx5_glue->destroy_flow_action(hrxq->action);
1953 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
1954 mlx5_ind_table_ibv_release(dev, hrxq->ind_table);
1955 LIST_REMOVE(hrxq, next);
1959 claim_nonzero(mlx5_ind_table_ibv_release(dev, hrxq->ind_table));
1964 * Verify the Rx Queue list is empty
1967 * Pointer to Ethernet device.
1970 * The number of object not released.
1973 mlx5_hrxq_ibv_verify(struct rte_eth_dev *dev)
1975 struct mlx5_priv *priv = dev->data->dev_private;
1976 struct mlx5_hrxq *hrxq;
1979 LIST_FOREACH(hrxq, &priv->hrxqs, next) {
1981 "port %u Verbs hash Rx queue %p still referenced",
1982 dev->data->port_id, (void *)hrxq);
1989 * Create a drop Rx queue Verbs object.
1992 * Pointer to Ethernet device.
1995 * The Verbs object initialised, NULL otherwise and rte_errno is set.
1997 struct mlx5_rxq_ibv *
1998 mlx5_rxq_ibv_drop_new(struct rte_eth_dev *dev)
2000 struct mlx5_priv *priv = dev->data->dev_private;
2001 struct ibv_context *ctx = priv->sh->ctx;
2003 struct ibv_wq *wq = NULL;
2004 struct mlx5_rxq_ibv *rxq;
2006 if (priv->drop_queue.rxq)
2007 return priv->drop_queue.rxq;
2008 cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
2010 DEBUG("port %u cannot allocate CQ for drop queue",
2011 dev->data->port_id);
2015 wq = mlx5_glue->create_wq(ctx,
2016 &(struct ibv_wq_init_attr){
2017 .wq_type = IBV_WQT_RQ,
2024 DEBUG("port %u cannot allocate WQ for drop queue",
2025 dev->data->port_id);
2029 rxq = rte_calloc(__func__, 1, sizeof(*rxq), 0);
2031 DEBUG("port %u cannot allocate drop Rx queue memory",
2032 dev->data->port_id);
2038 priv->drop_queue.rxq = rxq;
2042 claim_zero(mlx5_glue->destroy_wq(wq));
2044 claim_zero(mlx5_glue->destroy_cq(cq));
2049 * Release a drop Rx queue Verbs object.
2052 * Pointer to Ethernet device.
2055 * The Verbs object initialised, NULL otherwise and rte_errno is set.
2058 mlx5_rxq_ibv_drop_release(struct rte_eth_dev *dev)
2060 struct mlx5_priv *priv = dev->data->dev_private;
2061 struct mlx5_rxq_ibv *rxq = priv->drop_queue.rxq;
2064 claim_zero(mlx5_glue->destroy_wq(rxq->wq));
2066 claim_zero(mlx5_glue->destroy_cq(rxq->cq));
2068 priv->drop_queue.rxq = NULL;
2072 * Create a drop indirection table.
2075 * Pointer to Ethernet device.
2078 * The Verbs object initialised, NULL otherwise and rte_errno is set.
2080 struct mlx5_ind_table_ibv *
2081 mlx5_ind_table_ibv_drop_new(struct rte_eth_dev *dev)
2083 struct mlx5_priv *priv = dev->data->dev_private;
2084 struct mlx5_ind_table_ibv *ind_tbl;
2085 struct mlx5_rxq_ibv *rxq;
2086 struct mlx5_ind_table_ibv tmpl;
2088 rxq = mlx5_rxq_ibv_drop_new(dev);
2091 tmpl.ind_table = mlx5_glue->create_rwq_ind_table
2093 &(struct ibv_rwq_ind_table_init_attr){
2094 .log_ind_tbl_size = 0,
2095 .ind_tbl = &rxq->wq,
2098 if (!tmpl.ind_table) {
2099 DEBUG("port %u cannot allocate indirection table for drop"
2101 dev->data->port_id);
2105 ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl), 0);
2110 ind_tbl->ind_table = tmpl.ind_table;
2113 mlx5_rxq_ibv_drop_release(dev);
2118 * Release a drop indirection table.
2121 * Pointer to Ethernet device.
2124 mlx5_ind_table_ibv_drop_release(struct rte_eth_dev *dev)
2126 struct mlx5_priv *priv = dev->data->dev_private;
2127 struct mlx5_ind_table_ibv *ind_tbl = priv->drop_queue.hrxq->ind_table;
2129 claim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table));
2130 mlx5_rxq_ibv_drop_release(dev);
2132 priv->drop_queue.hrxq->ind_table = NULL;
2136 * Create a drop Rx Hash queue.
2139 * Pointer to Ethernet device.
2142 * The Verbs object initialised, NULL otherwise and rte_errno is set.
2145 mlx5_hrxq_drop_new(struct rte_eth_dev *dev)
2147 struct mlx5_priv *priv = dev->data->dev_private;
2148 struct mlx5_ind_table_ibv *ind_tbl;
2150 struct mlx5_hrxq *hrxq;
2152 if (priv->drop_queue.hrxq) {
2153 rte_atomic32_inc(&priv->drop_queue.hrxq->refcnt);
2154 return priv->drop_queue.hrxq;
2156 ind_tbl = mlx5_ind_table_ibv_drop_new(dev);
2159 qp = mlx5_glue->create_qp_ex(priv->sh->ctx,
2160 &(struct ibv_qp_init_attr_ex){
2161 .qp_type = IBV_QPT_RAW_PACKET,
2163 IBV_QP_INIT_ATTR_PD |
2164 IBV_QP_INIT_ATTR_IND_TABLE |
2165 IBV_QP_INIT_ATTR_RX_HASH,
2166 .rx_hash_conf = (struct ibv_rx_hash_conf){
2168 IBV_RX_HASH_FUNC_TOEPLITZ,
2169 .rx_hash_key_len = MLX5_RSS_HASH_KEY_LEN,
2170 .rx_hash_key = rss_hash_default_key,
2171 .rx_hash_fields_mask = 0,
2173 .rwq_ind_tbl = ind_tbl->ind_table,
2177 DEBUG("port %u cannot allocate QP for drop queue",
2178 dev->data->port_id);
2182 hrxq = rte_calloc(__func__, 1, sizeof(*hrxq), 0);
2185 "port %u cannot allocate memory for drop queue",
2186 dev->data->port_id);
2190 hrxq->ind_table = ind_tbl;
2192 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2193 hrxq->action = mlx5_glue->dv_create_flow_action_dest_ibv_qp(hrxq->qp);
2194 if (!hrxq->action) {
2199 priv->drop_queue.hrxq = hrxq;
2200 rte_atomic32_set(&hrxq->refcnt, 1);
2204 mlx5_ind_table_ibv_drop_release(dev);
2209 * Release a drop hash Rx queue.
2212 * Pointer to Ethernet device.
2215 mlx5_hrxq_drop_release(struct rte_eth_dev *dev)
2217 struct mlx5_priv *priv = dev->data->dev_private;
2218 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2220 if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
2221 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2222 mlx5_glue->destroy_flow_action(hrxq->action);
2224 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
2225 mlx5_ind_table_ibv_drop_release(dev);
2227 priv->drop_queue.hrxq = NULL;