1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <rte_ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
25 #include "mlx5_defs.h"
27 #include "mlx5_rxtx.h"
28 #include "mlx5_utils.h"
29 #include "mlx5_autoconf.h"
32 /* Default RSS hash key also used for ConnectX-3. */
33 uint8_t rss_hash_default_key[] = {
34 0x2c, 0xc6, 0x81, 0xd1,
35 0x5b, 0xdb, 0xf4, 0xf7,
36 0xfc, 0xa2, 0x83, 0x19,
37 0xdb, 0x1a, 0x3e, 0x94,
38 0x6b, 0x9e, 0x38, 0xd9,
39 0x2c, 0x9c, 0x03, 0xd1,
40 0xad, 0x99, 0x44, 0xa7,
41 0xd9, 0x56, 0x3d, 0x59,
42 0x06, 0x3c, 0x25, 0xf3,
43 0xfc, 0x1f, 0xdc, 0x2a,
46 /* Length of the default RSS hash key. */
47 static_assert(MLX5_RSS_HASH_KEY_LEN ==
48 (unsigned int)sizeof(rss_hash_default_key),
49 "wrong RSS default key size.");
52 * Check whether Multi-Packet RQ can be enabled for the device.
55 * Pointer to Ethernet device.
58 * 1 if supported, negative errno value if not.
61 mlx5_check_mprq_support(struct rte_eth_dev *dev)
63 struct mlx5_priv *priv = dev->data->dev_private;
65 if (priv->config.mprq.enabled &&
66 priv->rxqs_n >= priv->config.mprq.min_rxqs_num)
72 * Check whether Multi-Packet RQ is enabled for the Rx queue.
75 * Pointer to receive queue structure.
78 * 0 if disabled, otherwise enabled.
81 mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq)
83 return rxq->strd_num_n > 0;
87 * Check whether Multi-Packet RQ is enabled for the device.
90 * Pointer to Ethernet device.
93 * 0 if disabled, otherwise enabled.
96 mlx5_mprq_enabled(struct rte_eth_dev *dev)
98 struct mlx5_priv *priv = dev->data->dev_private;
103 if (mlx5_check_mprq_support(dev) < 0)
105 /* All the configured queues should be enabled. */
106 for (i = 0; i < priv->rxqs_n; ++i) {
107 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
108 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
109 (rxq, struct mlx5_rxq_ctrl, rxq);
111 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
114 if (mlx5_rxq_mprq_enabled(rxq))
117 /* Multi-Packet RQ can't be partially configured. */
118 MLX5_ASSERT(n == 0 || n == n_ibv);
123 * Calculate the number of CQEs in CQ for the Rx queue.
126 * Pointer to receive queue structure.
129 * Number of CQEs in CQ.
132 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
135 unsigned int wqe_n = 1 << rxq_data->elts_n;
137 if (mlx5_rxq_mprq_enabled(rxq_data))
138 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
145 * Allocate RX queue elements for Multi-Packet RQ.
148 * Pointer to RX queue structure.
151 * 0 on success, a negative errno value otherwise and rte_errno is set.
154 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
156 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
157 unsigned int wqe_n = 1 << rxq->elts_n;
161 /* Iterate on segments. */
162 for (i = 0; i <= wqe_n; ++i) {
163 struct mlx5_mprq_buf *buf;
165 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
166 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
171 (*rxq->mprq_bufs)[i] = buf;
173 rxq->mprq_repl = buf;
176 "port %u Rx queue %u allocated and configured %u segments",
177 rxq->port_id, rxq->idx, wqe_n);
180 err = rte_errno; /* Save rte_errno before cleanup. */
182 for (i = 0; (i != wqe_n); ++i) {
183 if ((*rxq->mprq_bufs)[i] != NULL)
184 rte_mempool_put(rxq->mprq_mp,
185 (*rxq->mprq_bufs)[i]);
186 (*rxq->mprq_bufs)[i] = NULL;
188 DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
189 rxq->port_id, rxq->idx);
190 rte_errno = err; /* Restore rte_errno. */
195 * Allocate RX queue elements for Single-Packet RQ.
198 * Pointer to RX queue structure.
201 * 0 on success, errno value on failure.
204 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
206 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
207 unsigned int elts_n = 1 << rxq_ctrl->rxq.elts_n;
211 /* Iterate on segments. */
212 for (i = 0; (i != elts_n); ++i) {
213 struct rte_mbuf *buf;
215 buf = rte_pktmbuf_alloc(rxq_ctrl->rxq.mp);
217 DRV_LOG(ERR, "port %u empty mbuf pool",
218 PORT_ID(rxq_ctrl->priv));
222 /* Headroom is reserved by rte_pktmbuf_alloc(). */
223 MLX5_ASSERT(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
224 /* Buffer is supposed to be empty. */
225 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
226 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
227 MLX5_ASSERT(!buf->next);
228 /* Only the first segment keeps headroom. */
230 SET_DATA_OFF(buf, 0);
231 PORT(buf) = rxq_ctrl->rxq.port_id;
232 DATA_LEN(buf) = rte_pktmbuf_tailroom(buf);
233 PKT_LEN(buf) = DATA_LEN(buf);
235 (*rxq_ctrl->rxq.elts)[i] = buf;
237 /* If Rx vector is activated. */
238 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
239 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
240 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
241 struct rte_pktmbuf_pool_private *priv =
242 (struct rte_pktmbuf_pool_private *)
243 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
246 /* Initialize default rearm_data for vPMD. */
247 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
248 rte_mbuf_refcnt_set(mbuf_init, 1);
249 mbuf_init->nb_segs = 1;
250 mbuf_init->port = rxq->port_id;
251 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
252 mbuf_init->ol_flags = EXT_ATTACHED_MBUF;
254 * prevent compiler reordering:
255 * rearm_data covers previous fields.
257 rte_compiler_barrier();
258 rxq->mbuf_initializer =
259 *(rte_xmm_t *)&mbuf_init->rearm_data;
260 /* Padding with a fake mbuf for vectorized Rx. */
261 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
262 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
265 "port %u Rx queue %u allocated and configured %u segments"
267 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
268 elts_n / (1 << rxq_ctrl->rxq.sges_n));
271 err = rte_errno; /* Save rte_errno before cleanup. */
273 for (i = 0; (i != elts_n); ++i) {
274 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
275 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
276 (*rxq_ctrl->rxq.elts)[i] = NULL;
278 DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
279 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
280 rte_errno = err; /* Restore rte_errno. */
285 * Allocate RX queue elements.
288 * Pointer to RX queue structure.
291 * 0 on success, errno value on failure.
294 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
296 return mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
297 rxq_alloc_elts_mprq(rxq_ctrl) : rxq_alloc_elts_sprq(rxq_ctrl);
301 * Free RX queue elements for Multi-Packet RQ.
304 * Pointer to RX queue structure.
307 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
309 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
312 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing WRs",
313 rxq->port_id, rxq->idx);
314 if (rxq->mprq_bufs == NULL)
316 MLX5_ASSERT(mlx5_rxq_check_vec_support(rxq) < 0);
317 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
318 if ((*rxq->mprq_bufs)[i] != NULL)
319 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
320 (*rxq->mprq_bufs)[i] = NULL;
322 if (rxq->mprq_repl != NULL) {
323 mlx5_mprq_buf_free(rxq->mprq_repl);
324 rxq->mprq_repl = NULL;
329 * Free RX queue elements for Single-Packet RQ.
332 * Pointer to RX queue structure.
335 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
337 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
338 const uint16_t q_n = (1 << rxq->elts_n);
339 const uint16_t q_mask = q_n - 1;
340 uint16_t used = q_n - (rxq->rq_ci - rxq->rq_pi);
343 DRV_LOG(DEBUG, "port %u Rx queue %u freeing WRs",
344 PORT_ID(rxq_ctrl->priv), rxq->idx);
345 if (rxq->elts == NULL)
348 * Some mbuf in the Ring belongs to the application. They cannot be
351 if (mlx5_rxq_check_vec_support(rxq) > 0) {
352 for (i = 0; i < used; ++i)
353 (*rxq->elts)[(rxq->rq_ci + i) & q_mask] = NULL;
354 rxq->rq_pi = rxq->rq_ci;
356 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
357 if ((*rxq->elts)[i] != NULL)
358 rte_pktmbuf_free_seg((*rxq->elts)[i]);
359 (*rxq->elts)[i] = NULL;
364 * Free RX queue elements.
367 * Pointer to RX queue structure.
370 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
372 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
373 rxq_free_elts_mprq(rxq_ctrl);
375 rxq_free_elts_sprq(rxq_ctrl);
379 * Returns the per-queue supported offloads.
382 * Pointer to Ethernet device.
385 * Supported Rx offloads.
388 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
390 struct mlx5_priv *priv = dev->data->dev_private;
391 struct mlx5_dev_config *config = &priv->config;
392 uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
393 DEV_RX_OFFLOAD_TIMESTAMP |
394 DEV_RX_OFFLOAD_JUMBO_FRAME |
395 DEV_RX_OFFLOAD_RSS_HASH);
397 if (config->hw_fcs_strip)
398 offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
401 offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
402 DEV_RX_OFFLOAD_UDP_CKSUM |
403 DEV_RX_OFFLOAD_TCP_CKSUM);
404 if (config->hw_vlan_strip)
405 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
406 if (MLX5_LRO_SUPPORTED(dev))
407 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
413 * Returns the per-port supported offloads.
416 * Supported Rx offloads.
419 mlx5_get_rx_port_offloads(void)
421 uint64_t offloads = DEV_RX_OFFLOAD_VLAN_FILTER;
427 * Verify if the queue can be released.
430 * Pointer to Ethernet device.
435 * 1 if the queue can be released
436 * 0 if the queue can not be released, there are references to it.
437 * Negative errno and rte_errno is set if queue doesn't exist.
440 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
442 struct mlx5_priv *priv = dev->data->dev_private;
443 struct mlx5_rxq_ctrl *rxq_ctrl;
445 if (!(*priv->rxqs)[idx]) {
449 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
450 return (__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED) == 1);
454 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
456 rxq_sync_cq(struct mlx5_rxq_data *rxq)
458 const uint16_t cqe_n = 1 << rxq->cqe_n;
459 const uint16_t cqe_mask = cqe_n - 1;
460 volatile struct mlx5_cqe *cqe;
465 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
466 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
467 if (ret == MLX5_CQE_STATUS_HW_OWN)
469 if (ret == MLX5_CQE_STATUS_ERR) {
473 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
474 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
478 /* Compute the next non compressed CQE. */
479 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
482 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
483 for (i = 0; i < cqe_n; i++) {
484 cqe = &(*rxq->cqes)[i];
485 cqe->op_own = MLX5_CQE_INVALIDATE;
487 /* Resync CQE and WQE (WQ in RESET state). */
489 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
491 *rxq->rq_db = rte_cpu_to_be_32(0);
496 * Rx queue stop. Device queue goes to the RESET state,
497 * all involved mbufs are freed from WQ.
500 * Pointer to Ethernet device structure.
505 * 0 on success, a negative errno value otherwise and rte_errno is set.
508 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
510 struct mlx5_priv *priv = dev->data->dev_private;
511 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
512 struct mlx5_rxq_ctrl *rxq_ctrl =
513 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
516 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
517 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RDY2RST);
519 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
524 /* Remove all processes CQEs. */
526 /* Free all involved mbufs. */
527 rxq_free_elts(rxq_ctrl);
528 /* Set the actual queue state. */
529 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
534 * Rx queue stop. Device queue goes to the RESET state,
535 * all involved mbufs are freed from WQ.
538 * Pointer to Ethernet device structure.
543 * 0 on success, a negative errno value otherwise and rte_errno is set.
546 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
548 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
551 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
552 DRV_LOG(ERR, "Hairpin queue can't be stopped");
556 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
559 * Vectorized Rx burst requires the CQ and RQ indices
560 * synchronized, that might be broken on RQ restart
561 * and cause Rx malfunction, so queue stopping is
562 * not supported if vectorized Rx burst is engaged.
563 * The routine pointer depends on the process
564 * type, should perform check there.
566 if (pkt_burst == mlx5_rx_burst_vec) {
567 DRV_LOG(ERR, "Rx queue stop is not supported "
568 "for vectorized Rx");
572 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
573 ret = mlx5_mp_os_req_queue_control(dev, idx,
574 MLX5_MP_REQ_QUEUE_RX_STOP);
576 ret = mlx5_rx_queue_stop_primary(dev, idx);
582 * Rx queue start. Device queue goes to the ready state,
583 * all required mbufs are allocated and WQ is replenished.
586 * Pointer to Ethernet device structure.
591 * 0 on success, a negative errno value otherwise and rte_errno is set.
594 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
596 struct mlx5_priv *priv = dev->data->dev_private;
597 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
598 struct mlx5_rxq_ctrl *rxq_ctrl =
599 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
602 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
603 /* Allocate needed buffers. */
604 ret = rxq_alloc_elts(rxq_ctrl);
606 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
611 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
613 /* Reset RQ consumer before moving queue ro READY state. */
614 *rxq->rq_db = rte_cpu_to_be_32(0);
616 ret = priv->obj_ops.rxq_obj_modify(rxq_ctrl->obj, MLX5_RXQ_MOD_RST2RDY);
618 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
623 /* Reinitialize RQ - set WQEs. */
624 mlx5_rxq_initialize(rxq);
625 rxq->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
626 /* Set actual queue state. */
627 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
632 * Rx queue start. Device queue goes to the ready state,
633 * all required mbufs are allocated and WQ is replenished.
636 * Pointer to Ethernet device structure.
641 * 0 on success, a negative errno value otherwise and rte_errno is set.
644 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
648 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
649 DRV_LOG(ERR, "Hairpin queue can't be started");
653 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
655 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
656 ret = mlx5_mp_os_req_queue_control(dev, idx,
657 MLX5_MP_REQ_QUEUE_RX_START);
659 ret = mlx5_rx_queue_start_primary(dev, idx);
665 * Rx queue presetup checks.
668 * Pointer to Ethernet device structure.
672 * Number of descriptors to configure in queue.
675 * 0 on success, a negative errno value otherwise and rte_errno is set.
678 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc)
680 struct mlx5_priv *priv = dev->data->dev_private;
682 if (!rte_is_power_of_2(*desc)) {
683 *desc = 1 << log2above(*desc);
685 "port %u increased number of descriptors in Rx queue %u"
686 " to the next power of two (%d)",
687 dev->data->port_id, idx, *desc);
689 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
690 dev->data->port_id, idx, *desc);
691 if (idx >= priv->rxqs_n) {
692 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
693 dev->data->port_id, idx, priv->rxqs_n);
694 rte_errno = EOVERFLOW;
697 if (!mlx5_rxq_releasable(dev, idx)) {
698 DRV_LOG(ERR, "port %u unable to release queue index %u",
699 dev->data->port_id, idx);
703 mlx5_rxq_release(dev, idx);
710 * Pointer to Ethernet device structure.
714 * Number of descriptors to configure in queue.
716 * NUMA socket on which memory must be allocated.
718 * Thresholds parameters.
720 * Memory pool for buffer allocations.
723 * 0 on success, a negative errno value otherwise and rte_errno is set.
726 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
727 unsigned int socket, const struct rte_eth_rxconf *conf,
728 struct rte_mempool *mp)
730 struct mlx5_priv *priv = dev->data->dev_private;
731 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
732 struct mlx5_rxq_ctrl *rxq_ctrl =
733 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
736 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
739 rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, mp);
741 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
742 dev->data->port_id, idx);
746 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
747 dev->data->port_id, idx);
748 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
755 * Pointer to Ethernet device structure.
759 * Number of descriptors to configure in queue.
760 * @param hairpin_conf
761 * Hairpin configuration parameters.
764 * 0 on success, a negative errno value otherwise and rte_errno is set.
767 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
769 const struct rte_eth_hairpin_conf *hairpin_conf)
771 struct mlx5_priv *priv = dev->data->dev_private;
772 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
773 struct mlx5_rxq_ctrl *rxq_ctrl =
774 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
777 res = mlx5_rx_queue_pre_setup(dev, idx, &desc);
780 if (hairpin_conf->peer_count != 1 ||
781 hairpin_conf->peers[0].port != dev->data->port_id ||
782 hairpin_conf->peers[0].queue >= priv->txqs_n) {
783 DRV_LOG(ERR, "port %u unable to setup hairpin queue index %u "
784 " invalid hairpind configuration", dev->data->port_id,
789 rxq_ctrl = mlx5_rxq_hairpin_new(dev, idx, desc, hairpin_conf);
791 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
792 dev->data->port_id, idx);
796 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
797 dev->data->port_id, idx);
798 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
803 * DPDK callback to release a RX queue.
806 * Generic RX queue pointer.
809 mlx5_rx_queue_release(void *dpdk_rxq)
811 struct mlx5_rxq_data *rxq = (struct mlx5_rxq_data *)dpdk_rxq;
812 struct mlx5_rxq_ctrl *rxq_ctrl;
813 struct mlx5_priv *priv;
817 rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);
818 priv = rxq_ctrl->priv;
819 if (!mlx5_rxq_releasable(ETH_DEV(priv), rxq_ctrl->rxq.idx))
820 rte_panic("port %u Rx queue %u is still used by a flow and"
821 " cannot be removed\n",
822 PORT_ID(priv), rxq->idx);
823 mlx5_rxq_release(ETH_DEV(priv), rxq_ctrl->rxq.idx);
827 * Allocate queue vector and fill epoll fd list for Rx interrupts.
830 * Pointer to Ethernet device.
833 * 0 on success, a negative errno value otherwise and rte_errno is set.
836 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
838 struct mlx5_priv *priv = dev->data->dev_private;
840 unsigned int rxqs_n = priv->rxqs_n;
841 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
842 unsigned int count = 0;
843 struct rte_intr_handle *intr_handle = dev->intr_handle;
845 if (!dev->data->dev_conf.intr_conf.rxq)
847 mlx5_rx_intr_vec_disable(dev);
848 intr_handle->intr_vec = mlx5_malloc(0,
849 n * sizeof(intr_handle->intr_vec[0]),
851 if (intr_handle->intr_vec == NULL) {
853 "port %u failed to allocate memory for interrupt"
854 " vector, Rx interrupts will not be supported",
859 intr_handle->type = RTE_INTR_HANDLE_EXT;
860 for (i = 0; i != n; ++i) {
861 /* This rxq obj must not be released in this function. */
862 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
863 struct mlx5_rxq_obj *rxq_obj = rxq_ctrl ? rxq_ctrl->obj : NULL;
866 /* Skip queues that cannot request interrupts. */
867 if (!rxq_obj || (!rxq_obj->ibv_channel &&
868 !rxq_obj->devx_channel)) {
869 /* Use invalid intr_vec[] index to disable entry. */
870 intr_handle->intr_vec[i] =
871 RTE_INTR_VEC_RXTX_OFFSET +
872 RTE_MAX_RXTX_INTR_VEC_ID;
873 /* Decrease the rxq_ctrl's refcnt */
875 mlx5_rxq_release(dev, i);
878 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
880 "port %u too many Rx queues for interrupt"
881 " vector size (%d), Rx interrupts cannot be"
883 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
884 mlx5_rx_intr_vec_disable(dev);
888 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
892 "port %u failed to make Rx interrupt file"
893 " descriptor %d non-blocking for queue index"
895 dev->data->port_id, rxq_obj->fd, i);
896 mlx5_rx_intr_vec_disable(dev);
899 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
900 intr_handle->efds[count] = rxq_obj->fd;
904 mlx5_rx_intr_vec_disable(dev);
906 intr_handle->nb_efd = count;
911 * Clean up Rx interrupts handler.
914 * Pointer to Ethernet device.
917 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
919 struct mlx5_priv *priv = dev->data->dev_private;
920 struct rte_intr_handle *intr_handle = dev->intr_handle;
922 unsigned int rxqs_n = priv->rxqs_n;
923 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
925 if (!dev->data->dev_conf.intr_conf.rxq)
927 if (!intr_handle->intr_vec)
929 for (i = 0; i != n; ++i) {
930 if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
931 RTE_MAX_RXTX_INTR_VEC_ID)
934 * Need to access directly the queue to release the reference
935 * kept in mlx5_rx_intr_vec_enable().
937 mlx5_rxq_release(dev, i);
940 rte_intr_free_epoll_fd(intr_handle);
941 if (intr_handle->intr_vec)
942 mlx5_free(intr_handle->intr_vec);
943 intr_handle->nb_efd = 0;
944 intr_handle->intr_vec = NULL;
948 * MLX5 CQ notification .
951 * Pointer to receive queue structure.
953 * Sequence number per receive queue .
956 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
959 uint32_t doorbell_hi;
961 void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
963 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
964 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
965 doorbell = (uint64_t)doorbell_hi << 32;
966 doorbell |= rxq->cqn;
967 rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
968 mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
969 cq_db_reg, rxq->uar_lock_cq);
973 * DPDK callback for Rx queue interrupt enable.
976 * Pointer to Ethernet device structure.
981 * 0 on success, a negative errno value otherwise and rte_errno is set.
984 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
986 struct mlx5_rxq_ctrl *rxq_ctrl;
988 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
992 if (!rxq_ctrl->obj) {
993 mlx5_rxq_release(dev, rx_queue_id);
996 mlx5_arm_cq(&rxq_ctrl->rxq, rxq_ctrl->rxq.cq_arm_sn);
998 mlx5_rxq_release(dev, rx_queue_id);
1006 * DPDK callback for Rx queue interrupt disable.
1009 * Pointer to Ethernet device structure.
1010 * @param rx_queue_id
1014 * 0 on success, a negative errno value otherwise and rte_errno is set.
1017 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1019 struct mlx5_priv *priv = dev->data->dev_private;
1020 struct mlx5_rxq_ctrl *rxq_ctrl;
1023 rxq_ctrl = mlx5_rxq_get(dev, rx_queue_id);
1030 if (rxq_ctrl->irq) {
1031 ret = priv->obj_ops.rxq_event_get(rxq_ctrl->obj);
1034 rxq_ctrl->rxq.cq_arm_sn++;
1036 mlx5_rxq_release(dev, rx_queue_id);
1040 * The ret variable may be EAGAIN which means the get_event function was
1041 * called before receiving one.
1047 ret = rte_errno; /* Save rte_errno before cleanup. */
1048 mlx5_rxq_release(dev, rx_queue_id);
1050 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1051 dev->data->port_id, rx_queue_id);
1052 rte_errno = ret; /* Restore rte_errno. */
1057 * Verify the Rx queue objects list is empty
1060 * Pointer to Ethernet device.
1063 * The number of objects not released.
1066 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1068 struct mlx5_priv *priv = dev->data->dev_private;
1070 struct mlx5_rxq_obj *rxq_obj;
1072 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1073 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1074 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1081 * Callback function to initialize mbufs for Multi-Packet RQ.
1084 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1085 void *_m, unsigned int i __rte_unused)
1087 struct mlx5_mprq_buf *buf = _m;
1088 struct rte_mbuf_ext_shared_info *shinfo;
1089 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1092 memset(_m, 0, sizeof(*buf));
1094 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1095 for (j = 0; j != strd_n; ++j) {
1096 shinfo = &buf->shinfos[j];
1097 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1098 shinfo->fcb_opaque = buf;
1103 * Free mempool of Multi-Packet RQ.
1106 * Pointer to Ethernet device.
1109 * 0 on success, negative errno value on failure.
1112 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1114 struct mlx5_priv *priv = dev->data->dev_private;
1115 struct rte_mempool *mp = priv->mprq_mp;
1120 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1121 dev->data->port_id, mp->name);
1123 * If a buffer in the pool has been externally attached to a mbuf and it
1124 * is still in use by application, destroying the Rx queue can spoil
1125 * the packet. It is unlikely to happen but if application dynamically
1126 * creates and destroys with holding Rx packets, this can happen.
1128 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1129 * RQ isn't provided by application but managed by PMD.
1131 if (!rte_mempool_full(mp)) {
1133 "port %u mempool for Multi-Packet RQ is still in use",
1134 dev->data->port_id);
1138 rte_mempool_free(mp);
1139 /* Unset mempool for each Rx queue. */
1140 for (i = 0; i != priv->rxqs_n; ++i) {
1141 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1145 rxq->mprq_mp = NULL;
1147 priv->mprq_mp = NULL;
1152 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1153 * mempool. If already allocated, reuse it if there're enough elements.
1154 * Otherwise, resize it.
1157 * Pointer to Ethernet device.
1160 * 0 on success, negative errno value on failure.
1163 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1165 struct mlx5_priv *priv = dev->data->dev_private;
1166 struct rte_mempool *mp = priv->mprq_mp;
1167 char name[RTE_MEMPOOL_NAMESIZE];
1168 unsigned int desc = 0;
1169 unsigned int buf_len;
1170 unsigned int obj_num;
1171 unsigned int obj_size;
1172 unsigned int strd_num_n = 0;
1173 unsigned int strd_sz_n = 0;
1175 unsigned int n_ibv = 0;
1177 if (!mlx5_mprq_enabled(dev))
1179 /* Count the total number of descriptors configured. */
1180 for (i = 0; i != priv->rxqs_n; ++i) {
1181 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1182 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1183 (rxq, struct mlx5_rxq_ctrl, rxq);
1185 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1188 desc += 1 << rxq->elts_n;
1189 /* Get the max number of strides. */
1190 if (strd_num_n < rxq->strd_num_n)
1191 strd_num_n = rxq->strd_num_n;
1192 /* Get the max size of a stride. */
1193 if (strd_sz_n < rxq->strd_sz_n)
1194 strd_sz_n = rxq->strd_sz_n;
1196 MLX5_ASSERT(strd_num_n && strd_sz_n);
1197 buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1198 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len + (1 << strd_num_n) *
1199 sizeof(struct rte_mbuf_ext_shared_info) + RTE_PKTMBUF_HEADROOM;
1201 * Received packets can be either memcpy'd or externally referenced. In
1202 * case that the packet is attached to an mbuf as an external buffer, as
1203 * it isn't possible to predict how the buffers will be queued by
1204 * application, there's no option to exactly pre-allocate needed buffers
1205 * in advance but to speculatively prepares enough buffers.
1207 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1208 * received packets to buffers provided by application (rxq->mp) until
1209 * this Mempool gets available again.
1212 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1214 * rte_mempool_create_empty() has sanity check to refuse large cache
1215 * size compared to the number of elements.
1216 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1217 * constant number 2 instead.
1219 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1220 /* Check a mempool is already allocated and if it can be resued. */
1221 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1222 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1223 dev->data->port_id, mp->name);
1226 } else if (mp != NULL) {
1227 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1228 dev->data->port_id, mp->name);
1230 * If failed to free, which means it may be still in use, no way
1231 * but to keep using the existing one. On buffer underrun,
1232 * packets will be memcpy'd instead of external buffer
1235 if (mlx5_mprq_free_mp(dev)) {
1236 if (mp->elt_size >= obj_size)
1242 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1243 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1244 0, NULL, NULL, mlx5_mprq_buf_init,
1245 (void *)(uintptr_t)(1 << strd_num_n),
1246 dev->device->numa_node, 0);
1249 "port %u failed to allocate a mempool for"
1250 " Multi-Packet RQ, count=%u, size=%u",
1251 dev->data->port_id, obj_num, obj_size);
1257 /* Set mempool for each Rx queue. */
1258 for (i = 0; i != priv->rxqs_n; ++i) {
1259 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1260 struct mlx5_rxq_ctrl *rxq_ctrl = container_of
1261 (rxq, struct mlx5_rxq_ctrl, rxq);
1263 if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1267 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1268 dev->data->port_id);
1272 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1273 sizeof(struct rte_vlan_hdr) * 2 + \
1274 sizeof(struct rte_ipv6_hdr)))
1275 #define MAX_TCP_OPTION_SIZE 40u
1276 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1277 sizeof(struct rte_tcp_hdr) + \
1278 MAX_TCP_OPTION_SIZE))
1281 * Adjust the maximum LRO massage size.
1284 * Pointer to Ethernet device.
1287 * @param max_lro_size
1288 * The maximum size for LRO packet.
1291 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1292 uint32_t max_lro_size)
1294 struct mlx5_priv *priv = dev->data->dev_private;
1296 if (priv->config.hca_attr.lro_max_msg_sz_mode ==
1297 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1298 MLX5_MAX_TCP_HDR_OFFSET)
1299 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1300 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1301 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1302 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1303 if (priv->max_lro_msg_size)
1304 priv->max_lro_msg_size =
1305 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1307 priv->max_lro_msg_size = max_lro_size;
1309 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1310 dev->data->port_id, idx,
1311 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1315 * Create a DPDK Rx queue.
1318 * Pointer to Ethernet device.
1322 * Number of descriptors to configure in queue.
1324 * NUMA socket on which memory must be allocated.
1327 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1329 struct mlx5_rxq_ctrl *
1330 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1331 unsigned int socket, const struct rte_eth_rxconf *conf,
1332 struct rte_mempool *mp)
1334 struct mlx5_priv *priv = dev->data->dev_private;
1335 struct mlx5_rxq_ctrl *tmpl;
1336 unsigned int mb_len = rte_pktmbuf_data_room_size(mp);
1337 unsigned int mprq_stride_nums;
1338 unsigned int mprq_stride_size;
1339 unsigned int mprq_stride_cap;
1340 struct mlx5_dev_config *config = &priv->config;
1342 * Always allocate extra slots, even if eventually
1343 * the vector Rx will not be used.
1346 desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1347 uint64_t offloads = conf->offloads |
1348 dev->data->dev_conf.rxmode.offloads;
1349 unsigned int lro_on_queue = !!(offloads & DEV_RX_OFFLOAD_TCP_LRO);
1350 const int mprq_en = mlx5_check_mprq_support(dev) > 0;
1351 unsigned int max_rx_pkt_len = lro_on_queue ?
1352 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1353 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1354 unsigned int non_scatter_min_mbuf_size = max_rx_pkt_len +
1355 RTE_PKTMBUF_HEADROOM;
1356 unsigned int max_lro_size = 0;
1357 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1359 if (non_scatter_min_mbuf_size > mb_len && !(offloads &
1360 DEV_RX_OFFLOAD_SCATTER)) {
1361 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1362 " configured and no enough mbuf space(%u) to contain "
1363 "the maximum RX packet length(%u) with head-room(%u)",
1364 dev->data->port_id, idx, mb_len, max_rx_pkt_len,
1365 RTE_PKTMBUF_HEADROOM);
1369 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl) +
1370 desc_n * sizeof(struct rte_mbuf *), 0, socket);
1375 tmpl->type = MLX5_RXQ_TYPE_STANDARD;
1376 if (mlx5_mr_btree_init(&tmpl->rxq.mr_ctrl.cache_bh,
1377 MLX5_MR_BTREE_CACHE_N, socket)) {
1378 /* rte_errno is already set. */
1381 tmpl->socket = socket;
1382 if (dev->data->dev_conf.intr_conf.rxq)
1384 mprq_stride_nums = config->mprq.stride_num_n ?
1385 config->mprq.stride_num_n : MLX5_MPRQ_STRIDE_NUM_N;
1386 mprq_stride_size = non_scatter_min_mbuf_size <=
1387 (1U << config->mprq.max_stride_size_n) ?
1388 log2above(non_scatter_min_mbuf_size) : MLX5_MPRQ_STRIDE_SIZE_N;
1389 mprq_stride_cap = (config->mprq.stride_num_n ?
1390 (1U << config->mprq.stride_num_n) : (1U << mprq_stride_nums)) *
1391 (config->mprq.stride_size_n ?
1392 (1U << config->mprq.stride_size_n) : (1U << mprq_stride_size));
1394 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1395 * following conditions are met:
1396 * - MPRQ is enabled.
1397 * - The number of descs is more than the number of strides.
1398 * - max_rx_pkt_len plus overhead is less than the max size
1399 * of a stride or mprq_stride_size is specified by a user.
1400 * Need to nake sure that there are enough stides to encap
1401 * the maximum packet size in case mprq_stride_size is set.
1402 * Otherwise, enable Rx scatter if necessary.
1404 if (mprq_en && desc > (1U << mprq_stride_nums) &&
1405 (non_scatter_min_mbuf_size <=
1406 (1U << config->mprq.max_stride_size_n) ||
1407 (config->mprq.stride_size_n &&
1408 non_scatter_min_mbuf_size <= mprq_stride_cap))) {
1409 /* TODO: Rx scatter isn't supported yet. */
1410 tmpl->rxq.sges_n = 0;
1411 /* Trim the number of descs needed. */
1412 desc >>= mprq_stride_nums;
1413 tmpl->rxq.strd_num_n = config->mprq.stride_num_n ?
1414 config->mprq.stride_num_n : mprq_stride_nums;
1415 tmpl->rxq.strd_sz_n = config->mprq.stride_size_n ?
1416 config->mprq.stride_size_n : mprq_stride_size;
1417 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1418 tmpl->rxq.strd_scatter_en =
1419 !!(offloads & DEV_RX_OFFLOAD_SCATTER);
1420 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1421 config->mprq.max_memcpy_len);
1422 max_lro_size = RTE_MIN(max_rx_pkt_len,
1423 (1u << tmpl->rxq.strd_num_n) *
1424 (1u << tmpl->rxq.strd_sz_n));
1426 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1427 " strd_num_n = %u, strd_sz_n = %u",
1428 dev->data->port_id, idx,
1429 tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1430 } else if (max_rx_pkt_len <= first_mb_free_size) {
1431 tmpl->rxq.sges_n = 0;
1432 max_lro_size = max_rx_pkt_len;
1433 } else if (offloads & DEV_RX_OFFLOAD_SCATTER) {
1434 unsigned int size = non_scatter_min_mbuf_size;
1435 unsigned int sges_n;
1437 if (lro_on_queue && first_mb_free_size <
1438 MLX5_MAX_LRO_HEADER_FIX) {
1439 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1440 " to include the max header size(%u) for LRO",
1441 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1442 rte_errno = ENOTSUP;
1446 * Determine the number of SGEs needed for a full packet
1447 * and round it to the next power of two.
1449 sges_n = log2above((size / mb_len) + !!(size % mb_len));
1450 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1452 "port %u too many SGEs (%u) needed to handle"
1453 " requested maximum packet size %u, the maximum"
1454 " supported are %u", dev->data->port_id,
1455 1 << sges_n, max_rx_pkt_len,
1456 1u << MLX5_MAX_LOG_RQ_SEGS);
1457 rte_errno = ENOTSUP;
1460 tmpl->rxq.sges_n = sges_n;
1461 max_lro_size = max_rx_pkt_len;
1463 if (config->mprq.enabled && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1465 "port %u MPRQ is requested but cannot be enabled\n"
1466 " (requested: pkt_sz = %u, desc_num = %u,"
1467 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1468 " supported: min_rxqs_num = %u,"
1469 " min_stride_sz = %u, max_stride_sz = %u).",
1470 dev->data->port_id, non_scatter_min_mbuf_size,
1472 config->mprq.stride_size_n ?
1473 (1U << config->mprq.stride_size_n) :
1474 (1U << mprq_stride_size),
1475 config->mprq.stride_num_n ?
1476 (1U << config->mprq.stride_num_n) :
1477 (1U << mprq_stride_nums),
1478 config->mprq.min_rxqs_num,
1479 (1U << config->mprq.min_stride_size_n),
1480 (1U << config->mprq.max_stride_size_n));
1481 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1482 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1483 if (desc % (1 << tmpl->rxq.sges_n)) {
1485 "port %u number of Rx queue descriptors (%u) is not a"
1486 " multiple of SGEs per packet (%u)",
1489 1 << tmpl->rxq.sges_n);
1493 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1494 /* Toggle RX checksum offload if hardware supports it. */
1495 tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);
1496 /* Configure Rx timestamp. */
1497 tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);
1498 tmpl->rxq.timestamp_rx_flag = 0;
1499 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1500 &tmpl->rxq.timestamp_offset,
1501 &tmpl->rxq.timestamp_rx_flag) != 0) {
1502 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1505 /* Configure VLAN stripping. */
1506 tmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
1507 /* By default, FCS (CRC) is stripped by hardware. */
1508 tmpl->rxq.crc_present = 0;
1509 tmpl->rxq.lro = lro_on_queue;
1510 if (offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
1511 if (config->hw_fcs_strip) {
1513 * RQs used for LRO-enabled TIRs should not be
1514 * configured to scatter the FCS.
1518 "port %u CRC stripping has been "
1519 "disabled but will still be performed "
1520 "by hardware, because LRO is enabled",
1521 dev->data->port_id);
1523 tmpl->rxq.crc_present = 1;
1526 "port %u CRC stripping has been disabled but will"
1527 " still be performed by hardware, make sure MLNX_OFED"
1528 " and firmware are up to date",
1529 dev->data->port_id);
1533 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1534 " incoming frames to hide it",
1536 tmpl->rxq.crc_present ? "disabled" : "enabled",
1537 tmpl->rxq.crc_present << 2);
1539 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1540 (!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
1541 tmpl->rxq.port_id = dev->data->port_id;
1544 tmpl->rxq.elts_n = log2above(desc);
1545 tmpl->rxq.rq_repl_thresh =
1546 MLX5_VPMD_RXQ_RPLNSH_THRESH(1 << tmpl->rxq.elts_n);
1548 (struct rte_mbuf *(*)[1 << tmpl->rxq.elts_n])(tmpl + 1);
1550 tmpl->rxq.uar_lock_cq = &priv->sh->uar_lock_cq;
1552 tmpl->rxq.idx = idx;
1553 __atomic_add_fetch(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1554 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1562 * Create a DPDK Rx hairpin queue.
1565 * Pointer to Ethernet device.
1569 * Number of descriptors to configure in queue.
1570 * @param hairpin_conf
1571 * The hairpin binding configuration.
1574 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1576 struct mlx5_rxq_ctrl *
1577 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1578 const struct rte_eth_hairpin_conf *hairpin_conf)
1580 struct mlx5_priv *priv = dev->data->dev_private;
1581 struct mlx5_rxq_ctrl *tmpl;
1583 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1589 tmpl->type = MLX5_RXQ_TYPE_HAIRPIN;
1590 tmpl->socket = SOCKET_ID_ANY;
1591 tmpl->rxq.rss_hash = 0;
1592 tmpl->rxq.port_id = dev->data->port_id;
1594 tmpl->rxq.mp = NULL;
1595 tmpl->rxq.elts_n = log2above(desc);
1596 tmpl->rxq.elts = NULL;
1597 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1598 tmpl->hairpin_conf = *hairpin_conf;
1599 tmpl->rxq.idx = idx;
1600 __atomic_add_fetch(&tmpl->refcnt, 1, __ATOMIC_RELAXED);
1601 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1609 * Pointer to Ethernet device.
1614 * A pointer to the queue if it exists, NULL otherwise.
1616 struct mlx5_rxq_ctrl *
1617 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1619 struct mlx5_priv *priv = dev->data->dev_private;
1620 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1621 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1624 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1625 __atomic_add_fetch(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED);
1631 * Release a Rx queue.
1634 * Pointer to Ethernet device.
1639 * 1 while a reference on it exists, 0 when freed.
1642 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1644 struct mlx5_priv *priv = dev->data->dev_private;
1645 struct mlx5_rxq_ctrl *rxq_ctrl;
1647 if (!(*priv->rxqs)[idx])
1649 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1650 if (__atomic_sub_fetch(&rxq_ctrl->refcnt, 1, __ATOMIC_RELAXED) > 1)
1652 if (rxq_ctrl->obj) {
1653 priv->obj_ops.rxq_obj_release(rxq_ctrl->obj);
1654 LIST_REMOVE(rxq_ctrl->obj, next);
1655 mlx5_free(rxq_ctrl->obj);
1656 rxq_ctrl->obj = NULL;
1658 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
1659 rxq_free_elts(rxq_ctrl);
1660 if (!__atomic_load_n(&rxq_ctrl->refcnt, __ATOMIC_RELAXED)) {
1661 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
1662 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1663 LIST_REMOVE(rxq_ctrl, next);
1664 mlx5_free(rxq_ctrl);
1665 (*priv->rxqs)[idx] = NULL;
1671 * Verify the Rx Queue list is empty
1674 * Pointer to Ethernet device.
1677 * The number of object not released.
1680 mlx5_rxq_verify(struct rte_eth_dev *dev)
1682 struct mlx5_priv *priv = dev->data->dev_private;
1683 struct mlx5_rxq_ctrl *rxq_ctrl;
1686 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1687 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1688 dev->data->port_id, rxq_ctrl->rxq.idx);
1695 * Get a Rx queue type.
1698 * Pointer to Ethernet device.
1703 * The Rx queue type.
1706 mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx)
1708 struct mlx5_priv *priv = dev->data->dev_private;
1709 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1711 if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
1712 rxq_ctrl = container_of((*priv->rxqs)[idx],
1713 struct mlx5_rxq_ctrl,
1715 return rxq_ctrl->type;
1717 return MLX5_RXQ_TYPE_UNDEFINED;
1721 * Get an indirection table.
1724 * Pointer to Ethernet device.
1726 * Queues entering in the indirection table.
1728 * Number of queues in the array.
1731 * An indirection table if found.
1733 struct mlx5_ind_table_obj *
1734 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
1737 struct mlx5_priv *priv = dev->data->dev_private;
1738 struct mlx5_ind_table_obj *ind_tbl;
1740 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1741 if ((ind_tbl->queues_n == queues_n) &&
1742 (memcmp(ind_tbl->queues, queues,
1743 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1750 rte_atomic32_inc(&ind_tbl->refcnt);
1751 for (i = 0; i != ind_tbl->queues_n; ++i)
1752 mlx5_rxq_get(dev, ind_tbl->queues[i]);
1758 * Release an indirection table.
1761 * Pointer to Ethernet device.
1763 * Indirection table to release.
1766 * 1 while a reference on it exists, 0 when freed.
1769 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
1770 struct mlx5_ind_table_obj *ind_tbl)
1772 struct mlx5_priv *priv = dev->data->dev_private;
1775 if (rte_atomic32_dec_and_test(&ind_tbl->refcnt))
1776 priv->obj_ops.ind_table_destroy(ind_tbl);
1777 for (i = 0; i != ind_tbl->queues_n; ++i)
1778 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1779 if (!rte_atomic32_read(&ind_tbl->refcnt)) {
1780 LIST_REMOVE(ind_tbl, next);
1788 * Verify the Rx Queue list is empty
1791 * Pointer to Ethernet device.
1794 * The number of object not released.
1797 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
1799 struct mlx5_priv *priv = dev->data->dev_private;
1800 struct mlx5_ind_table_obj *ind_tbl;
1803 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1805 "port %u indirection table obj %p still referenced",
1806 dev->data->port_id, (void *)ind_tbl);
1813 * Create an indirection table.
1816 * Pointer to Ethernet device.
1818 * Queues entering in the indirection table.
1820 * Number of queues in the array.
1823 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
1825 static struct mlx5_ind_table_obj *
1826 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
1829 struct mlx5_priv *priv = dev->data->dev_private;
1830 struct mlx5_ind_table_obj *ind_tbl;
1831 const unsigned int n = rte_is_power_of_2(queues_n) ?
1832 log2above(queues_n) :
1833 log2above(priv->config.ind_table_max_size);
1837 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
1838 queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
1843 ind_tbl->queues_n = queues_n;
1844 for (i = 0; i != queues_n; ++i) {
1845 struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
1848 ind_tbl->queues[i] = queues[i];
1850 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
1853 rte_atomic32_inc(&ind_tbl->refcnt);
1854 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
1858 for (j = 0; j < i; j++)
1859 mlx5_rxq_release(dev, ind_tbl->queues[j]);
1862 DEBUG("Port %u cannot create indirection table.", dev->data->port_id);
1867 * Get an Rx Hash queue.
1870 * Pointer to Ethernet device.
1872 * RSS configuration for the Rx hash queue.
1874 * Queues entering in hash queue. In case of empty hash_fields only the
1875 * first queue index will be taken for the indirection table.
1880 * An hash Rx queue index on success.
1883 mlx5_hrxq_get(struct rte_eth_dev *dev,
1884 const uint8_t *rss_key, uint32_t rss_key_len,
1885 uint64_t hash_fields,
1886 const uint16_t *queues, uint32_t queues_n)
1888 struct mlx5_priv *priv = dev->data->dev_private;
1889 struct mlx5_hrxq *hrxq;
1892 queues_n = hash_fields ? queues_n : 1;
1893 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_HRXQ], priv->hrxqs, idx,
1895 struct mlx5_ind_table_obj *ind_tbl;
1897 if (hrxq->rss_key_len != rss_key_len)
1899 if (memcmp(hrxq->rss_key, rss_key, rss_key_len))
1901 if (hrxq->hash_fields != hash_fields)
1903 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
1906 if (ind_tbl != hrxq->ind_table) {
1907 mlx5_ind_table_obj_release(dev, ind_tbl);
1910 rte_atomic32_inc(&hrxq->refcnt);
1917 * Release the hash Rx queue.
1920 * Pointer to Ethernet device.
1922 * Index to Hash Rx queue to release.
1925 * 1 while a reference on it exists, 0 when freed.
1928 mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
1930 struct mlx5_priv *priv = dev->data->dev_private;
1931 struct mlx5_hrxq *hrxq;
1933 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
1936 if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
1937 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1938 mlx5_glue->destroy_flow_action(hrxq->action);
1940 priv->obj_ops.hrxq_destroy(hrxq);
1941 mlx5_ind_table_obj_release(dev, hrxq->ind_table);
1942 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_HRXQ], &priv->hrxqs,
1943 hrxq_idx, hrxq, next);
1944 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
1947 claim_nonzero(mlx5_ind_table_obj_release(dev, hrxq->ind_table));
1952 * Create an Rx Hash queue.
1955 * Pointer to Ethernet device.
1957 * RSS key for the Rx hash queue.
1958 * @param rss_key_len
1960 * @param hash_fields
1961 * Verbs protocol hash field to make the RSS on.
1963 * Queues entering in hash queue. In case of empty hash_fields only the
1964 * first queue index will be taken for the indirection table.
1971 * The DevX object initialized index, 0 otherwise and rte_errno is set.
1974 mlx5_hrxq_new(struct rte_eth_dev *dev,
1975 const uint8_t *rss_key, uint32_t rss_key_len,
1976 uint64_t hash_fields,
1977 const uint16_t *queues, uint32_t queues_n,
1978 int tunnel __rte_unused)
1980 struct mlx5_priv *priv = dev->data->dev_private;
1981 struct mlx5_hrxq *hrxq = NULL;
1982 uint32_t hrxq_idx = 0;
1983 struct mlx5_ind_table_obj *ind_tbl;
1986 queues_n = hash_fields ? queues_n : 1;
1987 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
1989 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n);
1994 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
1997 hrxq->ind_table = ind_tbl;
1998 hrxq->rss_key_len = rss_key_len;
1999 hrxq->hash_fields = hash_fields;
2000 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2001 ret = priv->obj_ops.hrxq_new(dev, hrxq, tunnel);
2006 rte_atomic32_inc(&hrxq->refcnt);
2007 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_HRXQ], &priv->hrxqs, hrxq_idx,
2011 ret = rte_errno; /* Save rte_errno before cleanup. */
2012 mlx5_ind_table_obj_release(dev, ind_tbl);
2014 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2015 rte_errno = ret; /* Restore rte_errno. */
2020 * Create a drop Rx Hash queue.
2023 * Pointer to Ethernet device.
2026 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2029 mlx5_drop_action_create(struct rte_eth_dev *dev)
2031 struct mlx5_priv *priv = dev->data->dev_private;
2032 struct mlx5_hrxq *hrxq = NULL;
2035 if (priv->drop_queue.hrxq) {
2036 rte_atomic32_inc(&priv->drop_queue.hrxq->refcnt);
2037 return priv->drop_queue.hrxq;
2039 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
2042 "Port %u cannot allocate memory for drop queue.",
2043 dev->data->port_id);
2047 priv->drop_queue.hrxq = hrxq;
2048 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
2050 if (!hrxq->ind_table) {
2054 ret = priv->obj_ops.drop_action_create(dev);
2057 rte_atomic32_set(&hrxq->refcnt, 1);
2061 if (hrxq->ind_table)
2062 mlx5_free(hrxq->ind_table);
2063 priv->drop_queue.hrxq = NULL;
2070 * Release a drop hash Rx queue.
2073 * Pointer to Ethernet device.
2076 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
2078 struct mlx5_priv *priv = dev->data->dev_private;
2079 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2081 if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
2082 priv->obj_ops.drop_action_destroy(dev);
2083 mlx5_free(priv->drop_queue.rxq);
2084 mlx5_free(hrxq->ind_table);
2086 priv->drop_queue.rxq = NULL;
2087 priv->drop_queue.hrxq = NULL;
2092 * Verify the Rx Queue list is empty
2095 * Pointer to Ethernet device.
2098 * The number of object not released.
2101 mlx5_hrxq_verify(struct rte_eth_dev *dev)
2103 struct mlx5_priv *priv = dev->data->dev_private;
2104 struct mlx5_hrxq *hrxq;
2108 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_HRXQ], priv->hrxqs, idx,
2111 "port %u hash Rx queue %p still referenced",
2112 dev->data->port_id, (void *)hrxq);
2119 * Set the Rx queue timestamp conversion parameters
2122 * Pointer to the Ethernet device structure.
2125 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
2127 struct mlx5_priv *priv = dev->data->dev_private;
2128 struct mlx5_dev_ctx_shared *sh = priv->sh;
2129 struct mlx5_rxq_data *data;
2132 for (i = 0; i != priv->rxqs_n; ++i) {
2133 if (!(*priv->rxqs)[i])
2135 data = (*priv->rxqs)[i];
2137 data->rt_timestamp = priv->config.rt_timestamp;