1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
11 #include <sys/queue.h>
14 #include <rte_malloc.h>
15 #include <ethdev_driver.h>
16 #include <rte_common.h>
17 #include <rte_interrupts.h>
18 #include <rte_debug.h>
20 #include <rte_eal_paging.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_malloc.h>
24 #include <mlx5_common.h>
25 #include <mlx5_common_mr.h>
27 #include "mlx5_defs.h"
30 #include "mlx5_utils.h"
31 #include "mlx5_autoconf.h"
32 #include "mlx5_devx.h"
35 /* Default RSS hash key also used for ConnectX-3. */
36 uint8_t rss_hash_default_key[] = {
37 0x2c, 0xc6, 0x81, 0xd1,
38 0x5b, 0xdb, 0xf4, 0xf7,
39 0xfc, 0xa2, 0x83, 0x19,
40 0xdb, 0x1a, 0x3e, 0x94,
41 0x6b, 0x9e, 0x38, 0xd9,
42 0x2c, 0x9c, 0x03, 0xd1,
43 0xad, 0x99, 0x44, 0xa7,
44 0xd9, 0x56, 0x3d, 0x59,
45 0x06, 0x3c, 0x25, 0xf3,
46 0xfc, 0x1f, 0xdc, 0x2a,
49 /* Length of the default RSS hash key. */
50 static_assert(MLX5_RSS_HASH_KEY_LEN ==
51 (unsigned int)sizeof(rss_hash_default_key),
52 "wrong RSS default key size.");
55 * Calculate the number of CQEs in CQ for the Rx queue.
58 * Pointer to receive queue structure.
61 * Number of CQEs in CQ.
64 mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data)
67 unsigned int wqe_n = 1 << rxq_data->elts_n;
69 if (mlx5_rxq_mprq_enabled(rxq_data))
70 cqe_n = wqe_n * RTE_BIT32(rxq_data->log_strd_num) - 1;
77 * Allocate RX queue elements for Multi-Packet RQ.
80 * Pointer to RX queue structure.
83 * 0 on success, a negative errno value otherwise and rte_errno is set.
86 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
88 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
89 unsigned int wqe_n = 1 << rxq->elts_n;
93 /* Iterate on segments. */
94 for (i = 0; i <= wqe_n; ++i) {
95 struct mlx5_mprq_buf *buf;
97 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
98 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
103 (*rxq->mprq_bufs)[i] = buf;
105 rxq->mprq_repl = buf;
108 "port %u MPRQ queue %u allocated and configured %u segments",
109 rxq->port_id, rxq->idx, wqe_n);
112 err = rte_errno; /* Save rte_errno before cleanup. */
114 for (i = 0; (i != wqe_n); ++i) {
115 if ((*rxq->mprq_bufs)[i] != NULL)
116 rte_mempool_put(rxq->mprq_mp,
117 (*rxq->mprq_bufs)[i]);
118 (*rxq->mprq_bufs)[i] = NULL;
120 DRV_LOG(DEBUG, "port %u MPRQ queue %u failed, freed everything",
121 rxq->port_id, rxq->idx);
122 rte_errno = err; /* Restore rte_errno. */
127 * Allocate RX queue elements for Single-Packet RQ.
130 * Pointer to RX queue structure.
133 * 0 on success, negative errno value on failure.
136 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
138 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
139 unsigned int elts_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
140 RTE_BIT32(rxq_ctrl->rxq.elts_n) *
141 RTE_BIT32(rxq_ctrl->rxq.log_strd_num) :
142 RTE_BIT32(rxq_ctrl->rxq.elts_n);
146 /* Iterate on segments. */
147 for (i = 0; (i != elts_n); ++i) {
148 struct mlx5_eth_rxseg *seg = &rxq_ctrl->rxq.rxseg[i % sges_n];
149 struct rte_mbuf *buf;
151 buf = rte_pktmbuf_alloc(seg->mp);
153 if (rxq_ctrl->share_group == 0)
154 DRV_LOG(ERR, "port %u queue %u empty mbuf pool",
155 RXQ_PORT_ID(rxq_ctrl),
158 DRV_LOG(ERR, "share group %u queue %u empty mbuf pool",
159 rxq_ctrl->share_group,
160 rxq_ctrl->share_qid);
164 /* Headroom is reserved by rte_pktmbuf_alloc(). */
165 MLX5_ASSERT(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
166 /* Buffer is supposed to be empty. */
167 MLX5_ASSERT(rte_pktmbuf_data_len(buf) == 0);
168 MLX5_ASSERT(rte_pktmbuf_pkt_len(buf) == 0);
169 MLX5_ASSERT(!buf->next);
170 SET_DATA_OFF(buf, seg->offset);
171 PORT(buf) = rxq_ctrl->rxq.port_id;
172 DATA_LEN(buf) = seg->length;
173 PKT_LEN(buf) = seg->length;
175 (*rxq_ctrl->rxq.elts)[i] = buf;
177 /* If Rx vector is activated. */
178 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
179 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
180 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
181 struct rte_pktmbuf_pool_private *priv =
182 (struct rte_pktmbuf_pool_private *)
183 rte_mempool_get_priv(rxq_ctrl->rxq.mp);
186 /* Initialize default rearm_data for vPMD. */
187 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
188 rte_mbuf_refcnt_set(mbuf_init, 1);
189 mbuf_init->nb_segs = 1;
190 /* For shared queues port is provided in CQE */
191 mbuf_init->port = rxq->shared ? 0 : rxq->port_id;
192 if (priv->flags & RTE_PKTMBUF_POOL_F_PINNED_EXT_BUF)
193 mbuf_init->ol_flags = RTE_MBUF_F_EXTERNAL;
195 * prevent compiler reordering:
196 * rearm_data covers previous fields.
198 rte_compiler_barrier();
199 rxq->mbuf_initializer =
200 *(rte_xmm_t *)&mbuf_init->rearm_data;
201 /* Padding with a fake mbuf for vectorized Rx. */
202 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
203 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
205 if (rxq_ctrl->share_group == 0)
207 "port %u SPRQ queue %u allocated and configured %u segments (max %u packets)",
208 RXQ_PORT_ID(rxq_ctrl), rxq_ctrl->rxq.idx, elts_n,
209 elts_n / (1 << rxq_ctrl->rxq.sges_n));
212 "share group %u SPRQ queue %u allocated and configured %u segments (max %u packets)",
213 rxq_ctrl->share_group, rxq_ctrl->share_qid, elts_n,
214 elts_n / (1 << rxq_ctrl->rxq.sges_n));
217 err = rte_errno; /* Save rte_errno before cleanup. */
219 for (i = 0; (i != elts_n); ++i) {
220 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
221 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
222 (*rxq_ctrl->rxq.elts)[i] = NULL;
224 if (rxq_ctrl->share_group == 0)
225 DRV_LOG(DEBUG, "port %u SPRQ queue %u failed, freed everything",
226 RXQ_PORT_ID(rxq_ctrl), rxq_ctrl->rxq.idx);
228 DRV_LOG(DEBUG, "share group %u SPRQ queue %u failed, freed everything",
229 rxq_ctrl->share_group, rxq_ctrl->share_qid);
230 rte_errno = err; /* Restore rte_errno. */
235 * Allocate RX queue elements.
238 * Pointer to RX queue structure.
241 * 0 on success, negative errno value on failure.
244 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
249 * For MPRQ we need to allocate both MPRQ buffers
250 * for WQEs and simple mbufs for vector processing.
252 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
253 ret = rxq_alloc_elts_mprq(rxq_ctrl);
255 ret = rxq_alloc_elts_sprq(rxq_ctrl);
260 * Free RX queue elements for Multi-Packet RQ.
263 * Pointer to RX queue structure.
266 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
268 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
271 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing %d WRs",
272 rxq->port_id, rxq->idx, (1u << rxq->elts_n));
273 if (rxq->mprq_bufs == NULL)
275 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
276 if ((*rxq->mprq_bufs)[i] != NULL)
277 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
278 (*rxq->mprq_bufs)[i] = NULL;
280 if (rxq->mprq_repl != NULL) {
281 mlx5_mprq_buf_free(rxq->mprq_repl);
282 rxq->mprq_repl = NULL;
287 * Free RX queue elements for Single-Packet RQ.
290 * Pointer to RX queue structure.
293 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
295 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
296 const uint16_t q_n = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
297 RTE_BIT32(rxq->elts_n) * RTE_BIT32(rxq->log_strd_num) :
298 RTE_BIT32(rxq->elts_n);
299 const uint16_t q_mask = q_n - 1;
300 uint16_t elts_ci = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
301 rxq->elts_ci : rxq->rq_ci;
302 uint16_t used = q_n - (elts_ci - rxq->rq_pi);
305 if (rxq_ctrl->share_group == 0)
306 DRV_LOG(DEBUG, "port %u Rx queue %u freeing %d WRs",
307 RXQ_PORT_ID(rxq_ctrl), rxq->idx, q_n);
309 DRV_LOG(DEBUG, "share group %u Rx queue %u freeing %d WRs",
310 rxq_ctrl->share_group, rxq_ctrl->share_qid, q_n);
311 if (rxq->elts == NULL)
314 * Some mbuf in the Ring belongs to the application.
315 * They cannot be freed.
317 if (mlx5_rxq_check_vec_support(rxq) > 0) {
318 for (i = 0; i < used; ++i)
319 (*rxq->elts)[(elts_ci + i) & q_mask] = NULL;
320 rxq->rq_pi = elts_ci;
322 for (i = 0; i != q_n; ++i) {
323 if ((*rxq->elts)[i] != NULL)
324 rte_pktmbuf_free_seg((*rxq->elts)[i]);
325 (*rxq->elts)[i] = NULL;
330 * Free RX queue elements.
333 * Pointer to RX queue structure.
336 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
339 * For MPRQ we need to allocate both MPRQ buffers
340 * for WQEs and simple mbufs for vector processing.
342 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
343 rxq_free_elts_mprq(rxq_ctrl);
344 rxq_free_elts_sprq(rxq_ctrl);
348 * Returns the per-queue supported offloads.
351 * Pointer to Ethernet device.
354 * Supported Rx offloads.
357 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
359 struct mlx5_priv *priv = dev->data->dev_private;
360 struct mlx5_dev_config *config = &priv->config;
361 uint64_t offloads = (RTE_ETH_RX_OFFLOAD_SCATTER |
362 RTE_ETH_RX_OFFLOAD_TIMESTAMP |
363 RTE_ETH_RX_OFFLOAD_RSS_HASH);
365 if (!config->mprq.enabled)
366 offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
367 if (config->hw_fcs_strip)
368 offloads |= RTE_ETH_RX_OFFLOAD_KEEP_CRC;
370 offloads |= (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
371 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
372 RTE_ETH_RX_OFFLOAD_TCP_CKSUM);
373 if (config->hw_vlan_strip)
374 offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
375 if (MLX5_LRO_SUPPORTED(dev))
376 offloads |= RTE_ETH_RX_OFFLOAD_TCP_LRO;
382 * Returns the per-port supported offloads.
385 * Supported Rx offloads.
388 mlx5_get_rx_port_offloads(void)
390 uint64_t offloads = RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
396 * Verify if the queue can be released.
399 * Pointer to Ethernet device.
404 * 1 if the queue can be released
405 * 0 if the queue can not be released, there are references to it.
406 * Negative errno and rte_errno is set if queue doesn't exist.
409 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
411 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
417 return (__atomic_load_n(&rxq->refcnt, __ATOMIC_RELAXED) == 1);
420 /* Fetches and drops all SW-owned and error CQEs to synchronize CQ. */
422 rxq_sync_cq(struct mlx5_rxq_data *rxq)
424 const uint16_t cqe_n = 1 << rxq->cqe_n;
425 const uint16_t cqe_mask = cqe_n - 1;
426 volatile struct mlx5_cqe *cqe;
431 cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask];
432 ret = check_cqe(cqe, cqe_n, rxq->cq_ci);
433 if (ret == MLX5_CQE_STATUS_HW_OWN)
435 if (ret == MLX5_CQE_STATUS_ERR) {
439 MLX5_ASSERT(ret == MLX5_CQE_STATUS_SW_OWN);
440 if (MLX5_CQE_FORMAT(cqe->op_own) != MLX5_COMPRESSED) {
444 /* Compute the next non compressed CQE. */
445 rxq->cq_ci += rte_be_to_cpu_32(cqe->byte_cnt);
448 /* Move all CQEs to HW ownership, including possible MiniCQEs. */
449 for (i = 0; i < cqe_n; i++) {
450 cqe = &(*rxq->cqes)[i];
451 cqe->op_own = MLX5_CQE_INVALIDATE;
453 /* Resync CQE and WQE (WQ in RESET state). */
455 *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
457 *rxq->rq_db = rte_cpu_to_be_32(0);
462 * Rx queue stop. Device queue goes to the RESET state,
463 * all involved mbufs are freed from WQ.
466 * Pointer to Ethernet device structure.
471 * 0 on success, a negative errno value otherwise and rte_errno is set.
474 mlx5_rx_queue_stop_primary(struct rte_eth_dev *dev, uint16_t idx)
476 struct mlx5_priv *priv = dev->data->dev_private;
477 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
478 struct mlx5_rxq_ctrl *rxq_ctrl = rxq->ctrl;
481 MLX5_ASSERT(rxq != NULL && rxq_ctrl != NULL);
482 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
483 ret = priv->obj_ops.rxq_obj_modify(rxq, MLX5_RXQ_MOD_RDY2RST);
485 DRV_LOG(ERR, "Cannot change Rx WQ state to RESET: %s",
490 /* Remove all processes CQEs. */
491 rxq_sync_cq(&rxq_ctrl->rxq);
492 /* Free all involved mbufs. */
493 rxq_free_elts(rxq_ctrl);
494 /* Set the actual queue state. */
495 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STOPPED;
500 * Rx queue stop. Device queue goes to the RESET state,
501 * all involved mbufs are freed from WQ.
504 * Pointer to Ethernet device structure.
509 * 0 on success, a negative errno value otherwise and rte_errno is set.
512 mlx5_rx_queue_stop(struct rte_eth_dev *dev, uint16_t idx)
514 eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
517 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
518 DRV_LOG(ERR, "Hairpin queue can't be stopped");
522 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STOPPED)
525 * Vectorized Rx burst requires the CQ and RQ indices
526 * synchronized, that might be broken on RQ restart
527 * and cause Rx malfunction, so queue stopping is
528 * not supported if vectorized Rx burst is engaged.
529 * The routine pointer depends on the process
530 * type, should perform check there.
532 if (pkt_burst == mlx5_rx_burst_vec) {
533 DRV_LOG(ERR, "Rx queue stop is not supported "
534 "for vectorized Rx");
538 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
539 ret = mlx5_mp_os_req_queue_control(dev, idx,
540 MLX5_MP_REQ_QUEUE_RX_STOP);
542 ret = mlx5_rx_queue_stop_primary(dev, idx);
548 * Rx queue start. Device queue goes to the ready state,
549 * all required mbufs are allocated and WQ is replenished.
552 * Pointer to Ethernet device structure.
557 * 0 on success, a negative errno value otherwise and rte_errno is set.
560 mlx5_rx_queue_start_primary(struct rte_eth_dev *dev, uint16_t idx)
562 struct mlx5_priv *priv = dev->data->dev_private;
563 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
564 struct mlx5_rxq_data *rxq_data = &rxq->ctrl->rxq;
567 MLX5_ASSERT(rxq != NULL && rxq->ctrl != NULL);
568 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
569 /* Allocate needed buffers. */
570 ret = rxq_alloc_elts(rxq->ctrl);
572 DRV_LOG(ERR, "Cannot reallocate buffers for Rx WQ");
577 *rxq_data->cq_db = rte_cpu_to_be_32(rxq_data->cq_ci);
579 /* Reset RQ consumer before moving queue to READY state. */
580 *rxq_data->rq_db = rte_cpu_to_be_32(0);
582 ret = priv->obj_ops.rxq_obj_modify(rxq, MLX5_RXQ_MOD_RST2RDY);
584 DRV_LOG(ERR, "Cannot change Rx WQ state to READY: %s",
589 /* Reinitialize RQ - set WQEs. */
590 mlx5_rxq_initialize(rxq_data);
591 rxq_data->err_state = MLX5_RXQ_ERR_STATE_NO_ERROR;
592 /* Set actual queue state. */
593 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
598 * Rx queue start. Device queue goes to the ready state,
599 * all required mbufs are allocated and WQ is replenished.
602 * Pointer to Ethernet device structure.
607 * 0 on success, a negative errno value otherwise and rte_errno is set.
610 mlx5_rx_queue_start(struct rte_eth_dev *dev, uint16_t idx)
614 if (rte_eth_dev_is_rx_hairpin_queue(dev, idx)) {
615 DRV_LOG(ERR, "Hairpin queue can't be started");
619 if (dev->data->rx_queue_state[idx] == RTE_ETH_QUEUE_STATE_STARTED)
621 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
622 ret = mlx5_mp_os_req_queue_control(dev, idx,
623 MLX5_MP_REQ_QUEUE_RX_START);
625 ret = mlx5_rx_queue_start_primary(dev, idx);
631 * Rx queue presetup checks.
634 * Pointer to Ethernet device structure.
638 * Number of descriptors to configure in queue.
639 * @param[out] rxq_ctrl
640 * Address of pointer to shared Rx queue control.
643 * 0 on success, a negative errno value otherwise and rte_errno is set.
646 mlx5_rx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc,
647 struct mlx5_rxq_ctrl **rxq_ctrl)
649 struct mlx5_priv *priv = dev->data->dev_private;
650 struct mlx5_rxq_priv *rxq;
653 if (!rte_is_power_of_2(*desc)) {
654 *desc = 1 << log2above(*desc);
656 "port %u increased number of descriptors in Rx queue %u"
657 " to the next power of two (%d)",
658 dev->data->port_id, idx, *desc);
660 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
661 dev->data->port_id, idx, *desc);
662 if (idx >= priv->rxqs_n) {
663 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
664 dev->data->port_id, idx, priv->rxqs_n);
665 rte_errno = EOVERFLOW;
668 if (rxq_ctrl == NULL || *rxq_ctrl == NULL)
670 if (!(*rxq_ctrl)->rxq.shared) {
671 if (!mlx5_rxq_releasable(dev, idx)) {
672 DRV_LOG(ERR, "port %u unable to release queue index %u",
673 dev->data->port_id, idx);
677 mlx5_rxq_release(dev, idx);
679 if ((*rxq_ctrl)->obj != NULL)
680 /* Some port using shared Rx queue has been started. */
682 /* Release all owner RxQ to reconfigure Shared RxQ. */
684 rxq = LIST_FIRST(&(*rxq_ctrl)->owners);
685 LIST_REMOVE(rxq, owner_entry);
686 empty = LIST_EMPTY(&(*rxq_ctrl)->owners);
687 mlx5_rxq_release(ETH_DEV(rxq->priv), rxq->idx);
695 * Get the shared Rx queue object that matches group and queue index.
698 * Pointer to Ethernet device structure.
702 * Shared RX queue index.
705 * Shared RXQ object that matching, or NULL if not found.
707 static struct mlx5_rxq_ctrl *
708 mlx5_shared_rxq_get(struct rte_eth_dev *dev, uint32_t group, uint16_t share_qid)
710 struct mlx5_rxq_ctrl *rxq_ctrl;
711 struct mlx5_priv *priv = dev->data->dev_private;
713 LIST_FOREACH(rxq_ctrl, &priv->sh->shared_rxqs, share_entry) {
714 if (rxq_ctrl->share_group == group &&
715 rxq_ctrl->share_qid == share_qid)
722 * Check whether requested Rx queue configuration matches shared RXQ.
725 * Pointer to shared RXQ.
727 * Pointer to Ethernet device structure.
731 * Number of descriptors to configure in queue.
733 * NUMA socket on which memory must be allocated.
735 * Thresholds parameters.
737 * Memory pool for buffer allocations.
740 * 0 on success, a negative errno value otherwise and rte_errno is set.
743 mlx5_shared_rxq_match(struct mlx5_rxq_ctrl *rxq_ctrl, struct rte_eth_dev *dev,
744 uint16_t idx, uint16_t desc, unsigned int socket,
745 const struct rte_eth_rxconf *conf,
746 struct rte_mempool *mp)
748 struct mlx5_priv *spriv = LIST_FIRST(&rxq_ctrl->owners)->priv;
749 struct mlx5_priv *priv = dev->data->dev_private;
753 if (rxq_ctrl->socket != socket) {
754 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: socket mismatch",
755 dev->data->port_id, idx);
758 if (rxq_ctrl->rxq.elts_n != log2above(desc)) {
759 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: descriptor number mismatch",
760 dev->data->port_id, idx);
763 if (priv->mtu != spriv->mtu) {
764 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: mtu mismatch",
765 dev->data->port_id, idx);
768 if (priv->dev_data->dev_conf.intr_conf.rxq !=
769 spriv->dev_data->dev_conf.intr_conf.rxq) {
770 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: interrupt mismatch",
771 dev->data->port_id, idx);
774 if (mp != NULL && rxq_ctrl->rxq.mp != mp) {
775 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: mempool mismatch",
776 dev->data->port_id, idx);
778 } else if (mp == NULL) {
779 if (conf->rx_nseg != rxq_ctrl->rxseg_n) {
780 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: segment number mismatch",
781 dev->data->port_id, idx);
784 for (i = 0; i < conf->rx_nseg; i++) {
785 if (memcmp(&conf->rx_seg[i].split, &rxq_ctrl->rxseg[i],
786 sizeof(struct rte_eth_rxseg_split))) {
787 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: segment %u configuration mismatch",
788 dev->data->port_id, idx, i);
793 if (priv->config.hw_padding != spriv->config.hw_padding) {
794 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: padding mismatch",
795 dev->data->port_id, idx);
798 if (priv->config.cqe_comp != spriv->config.cqe_comp ||
799 (priv->config.cqe_comp &&
800 priv->config.cqe_comp_fmt != spriv->config.cqe_comp_fmt)) {
801 DRV_LOG(ERR, "port %u queue index %u failed to join shared group: CQE compression mismatch",
802 dev->data->port_id, idx);
811 * Pointer to Ethernet device structure.
815 * Number of descriptors to configure in queue.
817 * NUMA socket on which memory must be allocated.
819 * Thresholds parameters.
821 * Memory pool for buffer allocations.
824 * 0 on success, a negative errno value otherwise and rte_errno is set.
827 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
828 unsigned int socket, const struct rte_eth_rxconf *conf,
829 struct rte_mempool *mp)
831 struct mlx5_priv *priv = dev->data->dev_private;
832 struct mlx5_rxq_priv *rxq;
833 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
834 struct rte_eth_rxseg_split *rx_seg =
835 (struct rte_eth_rxseg_split *)conf->rx_seg;
836 struct rte_eth_rxseg_split rx_single = {.mp = mp};
837 uint16_t n_seg = conf->rx_nseg;
839 uint64_t offloads = conf->offloads |
840 dev->data->dev_conf.rxmode.offloads;
844 * The parameters should be checked on rte_eth_dev layer.
845 * If mp is specified it means the compatible configuration
846 * without buffer split feature tuning.
852 /* The offloads should be checked on rte_eth_dev layer. */
853 MLX5_ASSERT(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
854 if (!(offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) {
855 DRV_LOG(ERR, "port %u queue index %u split "
856 "offload not configured",
857 dev->data->port_id, idx);
861 MLX5_ASSERT(n_seg < MLX5_MAX_RXQ_NSEG);
863 if (conf->share_group > 0) {
864 if (!priv->config.hca_attr.mem_rq_rmp) {
865 DRV_LOG(ERR, "port %u queue index %u shared Rx queue not supported by fw",
866 dev->data->port_id, idx);
870 if (priv->obj_ops.rxq_obj_new != devx_obj_ops.rxq_obj_new) {
871 DRV_LOG(ERR, "port %u queue index %u shared Rx queue needs DevX api",
872 dev->data->port_id, idx);
876 if (conf->share_qid >= priv->rxqs_n) {
877 DRV_LOG(ERR, "port %u shared Rx queue index %u > number of Rx queues %u",
878 dev->data->port_id, conf->share_qid,
883 if (priv->config.mprq.enabled) {
884 DRV_LOG(ERR, "port %u shared Rx queue index %u: not supported when MPRQ enabled",
885 dev->data->port_id, conf->share_qid);
889 /* Try to reuse shared RXQ. */
890 rxq_ctrl = mlx5_shared_rxq_get(dev, conf->share_group,
892 if (rxq_ctrl != NULL &&
893 !mlx5_shared_rxq_match(rxq_ctrl, dev, idx, desc, socket,
899 res = mlx5_rx_queue_pre_setup(dev, idx, &desc, &rxq_ctrl);
903 rxq = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*rxq), 0,
906 DRV_LOG(ERR, "port %u unable to allocate rx queue index %u private data",
907 dev->data->port_id, idx);
913 (*priv->rxq_privs)[idx] = rxq;
914 if (rxq_ctrl != NULL) {
915 /* Join owner list. */
916 LIST_INSERT_HEAD(&rxq_ctrl->owners, rxq, owner_entry);
917 rxq->ctrl = rxq_ctrl;
919 rxq_ctrl = mlx5_rxq_new(dev, rxq, desc, socket, conf, rx_seg,
921 if (rxq_ctrl == NULL) {
922 DRV_LOG(ERR, "port %u unable to allocate rx queue index %u",
923 dev->data->port_id, idx);
925 (*priv->rxq_privs)[idx] = NULL;
930 mlx5_rxq_ref(dev, idx);
931 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
932 dev->data->port_id, idx);
933 dev->data->rx_queues[idx] = &rxq_ctrl->rxq;
940 * Pointer to Ethernet device structure.
944 * Number of descriptors to configure in queue.
945 * @param hairpin_conf
946 * Hairpin configuration parameters.
949 * 0 on success, a negative errno value otherwise and rte_errno is set.
952 mlx5_rx_hairpin_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
954 const struct rte_eth_hairpin_conf *hairpin_conf)
956 struct mlx5_priv *priv = dev->data->dev_private;
957 struct mlx5_rxq_priv *rxq;
958 struct mlx5_rxq_ctrl *rxq_ctrl;
961 res = mlx5_rx_queue_pre_setup(dev, idx, &desc, NULL);
964 if (hairpin_conf->peer_count != 1) {
966 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue index %u"
967 " peer count is %u", dev->data->port_id,
968 idx, hairpin_conf->peer_count);
971 if (hairpin_conf->peers[0].port == dev->data->port_id) {
972 if (hairpin_conf->peers[0].queue >= priv->txqs_n) {
974 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
975 " index %u, Tx %u is larger than %u",
976 dev->data->port_id, idx,
977 hairpin_conf->peers[0].queue, priv->txqs_n);
981 if (hairpin_conf->manual_bind == 0 ||
982 hairpin_conf->tx_explicit == 0) {
984 DRV_LOG(ERR, "port %u unable to setup Rx hairpin queue"
985 " index %u peer port %u with attributes %u %u",
986 dev->data->port_id, idx,
987 hairpin_conf->peers[0].port,
988 hairpin_conf->manual_bind,
989 hairpin_conf->tx_explicit);
993 rxq = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*rxq), 0,
996 DRV_LOG(ERR, "port %u unable to allocate hairpin rx queue index %u private data",
997 dev->data->port_id, idx);
1003 (*priv->rxq_privs)[idx] = rxq;
1004 rxq_ctrl = mlx5_rxq_hairpin_new(dev, rxq, desc, hairpin_conf);
1006 DRV_LOG(ERR, "port %u unable to allocate hairpin queue index %u",
1007 dev->data->port_id, idx);
1009 (*priv->rxq_privs)[idx] = NULL;
1013 DRV_LOG(DEBUG, "port %u adding hairpin Rx queue %u to list",
1014 dev->data->port_id, idx);
1015 dev->data->rx_queues[idx] = &rxq_ctrl->rxq;
1020 * DPDK callback to release a RX queue.
1023 * Pointer to Ethernet device structure.
1025 * Receive queue index.
1028 mlx5_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
1030 struct mlx5_rxq_data *rxq = dev->data->rx_queues[qid];
1034 if (!mlx5_rxq_releasable(dev, qid))
1035 rte_panic("port %u Rx queue %u is still used by a flow and"
1036 " cannot be removed\n", dev->data->port_id, qid);
1037 mlx5_rxq_release(dev, qid);
1041 * Allocate queue vector and fill epoll fd list for Rx interrupts.
1044 * Pointer to Ethernet device.
1047 * 0 on success, a negative errno value otherwise and rte_errno is set.
1050 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
1052 struct mlx5_priv *priv = dev->data->dev_private;
1054 unsigned int rxqs_n = priv->rxqs_n;
1055 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
1056 unsigned int count = 0;
1057 struct rte_intr_handle *intr_handle = dev->intr_handle;
1059 if (!dev->data->dev_conf.intr_conf.rxq)
1061 mlx5_rx_intr_vec_disable(dev);
1062 if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {
1064 "port %u failed to allocate memory for interrupt"
1065 " vector, Rx interrupts will not be supported",
1066 dev->data->port_id);
1071 if (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))
1074 for (i = 0; i != n; ++i) {
1075 /* This rxq obj must not be released in this function. */
1076 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1077 struct mlx5_rxq_obj *rxq_obj = rxq ? rxq->ctrl->obj : NULL;
1080 /* Skip queues that cannot request interrupts. */
1081 if (!rxq_obj || (!rxq_obj->ibv_channel &&
1082 !rxq_obj->devx_channel)) {
1083 /* Use invalid intr_vec[] index to disable entry. */
1084 if (rte_intr_vec_list_index_set(intr_handle, i,
1085 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))
1089 mlx5_rxq_ref(dev, i);
1090 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
1092 "port %u too many Rx queues for interrupt"
1093 " vector size (%d), Rx interrupts cannot be"
1095 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
1096 mlx5_rx_intr_vec_disable(dev);
1100 rc = mlx5_os_set_nonblock_channel_fd(rxq_obj->fd);
1104 "port %u failed to make Rx interrupt file"
1105 " descriptor %d non-blocking for queue index"
1107 dev->data->port_id, rxq_obj->fd, i);
1108 mlx5_rx_intr_vec_disable(dev);
1112 if (rte_intr_vec_list_index_set(intr_handle, i,
1113 RTE_INTR_VEC_RXTX_OFFSET + count))
1115 if (rte_intr_efds_index_set(intr_handle, count,
1121 mlx5_rx_intr_vec_disable(dev);
1122 else if (rte_intr_nb_efd_set(intr_handle, count))
1128 * Clean up Rx interrupts handler.
1131 * Pointer to Ethernet device.
1134 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
1136 struct mlx5_priv *priv = dev->data->dev_private;
1137 struct rte_intr_handle *intr_handle = dev->intr_handle;
1139 unsigned int rxqs_n = priv->rxqs_n;
1140 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
1142 if (!dev->data->dev_conf.intr_conf.rxq)
1144 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0)
1146 for (i = 0; i != n; ++i) {
1147 if (rte_intr_vec_list_index_get(intr_handle, i) ==
1148 RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID)
1151 * Need to access directly the queue to release the reference
1152 * kept in mlx5_rx_intr_vec_enable().
1154 mlx5_rxq_deref(dev, i);
1157 rte_intr_free_epoll_fd(intr_handle);
1159 rte_intr_vec_list_free(intr_handle);
1161 rte_intr_nb_efd_set(intr_handle, 0);
1165 * MLX5 CQ notification .
1168 * Pointer to receive queue structure.
1170 * Sequence number per receive queue .
1173 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
1176 uint32_t doorbell_hi;
1179 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
1180 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
1181 doorbell = (uint64_t)doorbell_hi << 32;
1182 doorbell |= rxq->cqn;
1183 mlx5_doorbell_ring(&rxq->uar_data, rte_cpu_to_be_64(doorbell),
1184 doorbell_hi, &rxq->cq_db[MLX5_CQ_ARM_DB], 0);
1188 * DPDK callback for Rx queue interrupt enable.
1191 * Pointer to Ethernet device structure.
1192 * @param rx_queue_id
1196 * 0 on success, a negative errno value otherwise and rte_errno is set.
1199 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1201 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, rx_queue_id);
1204 if (rxq->ctrl->irq) {
1205 if (!rxq->ctrl->obj)
1207 mlx5_arm_cq(&rxq->ctrl->rxq, rxq->ctrl->rxq.cq_arm_sn);
1216 * DPDK callback for Rx queue interrupt disable.
1219 * Pointer to Ethernet device structure.
1220 * @param rx_queue_id
1224 * 0 on success, a negative errno value otherwise and rte_errno is set.
1227 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1229 struct mlx5_priv *priv = dev->data->dev_private;
1230 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, rx_queue_id);
1237 if (!rxq->ctrl->obj)
1239 if (rxq->ctrl->irq) {
1240 ret = priv->obj_ops.rxq_event_get(rxq->ctrl->obj);
1243 rxq->ctrl->rxq.cq_arm_sn++;
1248 * The ret variable may be EAGAIN which means the get_event function was
1249 * called before receiving one.
1255 if (rte_errno != EAGAIN)
1256 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
1257 dev->data->port_id, rx_queue_id);
1262 * Verify the Rx queue objects list is empty
1265 * Pointer to Ethernet device.
1268 * The number of objects not released.
1271 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1273 struct mlx5_priv *priv = dev->data->dev_private;
1275 struct mlx5_rxq_obj *rxq_obj;
1277 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1278 if (rxq_obj->rxq_ctrl == NULL)
1280 if (rxq_obj->rxq_ctrl->rxq.shared &&
1281 !LIST_EMPTY(&rxq_obj->rxq_ctrl->owners))
1283 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1284 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1291 * Callback function to initialize mbufs for Multi-Packet RQ.
1294 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg,
1295 void *_m, unsigned int i __rte_unused)
1297 struct mlx5_mprq_buf *buf = _m;
1298 struct rte_mbuf_ext_shared_info *shinfo;
1299 unsigned int strd_n = (unsigned int)(uintptr_t)opaque_arg;
1302 memset(_m, 0, sizeof(*buf));
1304 __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
1305 for (j = 0; j != strd_n; ++j) {
1306 shinfo = &buf->shinfos[j];
1307 shinfo->free_cb = mlx5_mprq_buf_free_cb;
1308 shinfo->fcb_opaque = buf;
1313 * Free mempool of Multi-Packet RQ.
1316 * Pointer to Ethernet device.
1319 * 0 on success, negative errno value on failure.
1322 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1324 struct mlx5_priv *priv = dev->data->dev_private;
1325 struct rte_mempool *mp = priv->mprq_mp;
1330 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1331 dev->data->port_id, mp->name);
1333 * If a buffer in the pool has been externally attached to a mbuf and it
1334 * is still in use by application, destroying the Rx queue can spoil
1335 * the packet. It is unlikely to happen but if application dynamically
1336 * creates and destroys with holding Rx packets, this can happen.
1338 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1339 * RQ isn't provided by application but managed by PMD.
1341 if (!rte_mempool_full(mp)) {
1343 "port %u mempool for Multi-Packet RQ is still in use",
1344 dev->data->port_id);
1348 rte_mempool_free(mp);
1349 /* Unset mempool for each Rx queue. */
1350 for (i = 0; i != priv->rxqs_n; ++i) {
1351 struct mlx5_rxq_data *rxq = mlx5_rxq_data_get(dev, i);
1355 rxq->mprq_mp = NULL;
1357 priv->mprq_mp = NULL;
1362 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1363 * mempool. If already allocated, reuse it if there're enough elements.
1364 * Otherwise, resize it.
1367 * Pointer to Ethernet device.
1370 * 0 on success, negative errno value on failure.
1373 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1375 struct mlx5_priv *priv = dev->data->dev_private;
1376 struct rte_mempool *mp = priv->mprq_mp;
1377 char name[RTE_MEMPOOL_NAMESIZE];
1378 unsigned int desc = 0;
1379 unsigned int buf_len;
1380 unsigned int obj_num;
1381 unsigned int obj_size;
1382 unsigned int log_strd_num = 0;
1383 unsigned int log_strd_sz = 0;
1385 unsigned int n_ibv = 0;
1388 if (!mlx5_mprq_enabled(dev))
1390 /* Count the total number of descriptors configured. */
1391 for (i = 0; i != priv->rxqs_n; ++i) {
1392 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
1393 struct mlx5_rxq_data *rxq;
1395 if (rxq_ctrl == NULL ||
1396 rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1398 rxq = &rxq_ctrl->rxq;
1400 desc += 1 << rxq->elts_n;
1401 /* Get the max number of strides. */
1402 if (log_strd_num < rxq->log_strd_num)
1403 log_strd_num = rxq->log_strd_num;
1404 /* Get the max size of a stride. */
1405 if (log_strd_sz < rxq->log_strd_sz)
1406 log_strd_sz = rxq->log_strd_sz;
1408 MLX5_ASSERT(log_strd_num && log_strd_sz);
1409 buf_len = RTE_BIT32(log_strd_num) * RTE_BIT32(log_strd_sz);
1410 obj_size = sizeof(struct mlx5_mprq_buf) + buf_len +
1411 RTE_BIT32(log_strd_num) *
1412 sizeof(struct rte_mbuf_ext_shared_info) +
1413 RTE_PKTMBUF_HEADROOM;
1415 * Received packets can be either memcpy'd or externally referenced. In
1416 * case that the packet is attached to an mbuf as an external buffer, as
1417 * it isn't possible to predict how the buffers will be queued by
1418 * application, there's no option to exactly pre-allocate needed buffers
1419 * in advance but to speculatively prepares enough buffers.
1421 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1422 * received packets to buffers provided by application (rxq->mp) until
1423 * this Mempool gets available again.
1426 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * n_ibv;
1428 * rte_mempool_create_empty() has sanity check to refuse large cache
1429 * size compared to the number of elements.
1430 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1431 * constant number 2 instead.
1433 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1434 /* Check a mempool is already allocated and if it can be resued. */
1435 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1436 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1437 dev->data->port_id, mp->name);
1440 } else if (mp != NULL) {
1441 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1442 dev->data->port_id, mp->name);
1444 * If failed to free, which means it may be still in use, no way
1445 * but to keep using the existing one. On buffer underrun,
1446 * packets will be memcpy'd instead of external buffer
1449 if (mlx5_mprq_free_mp(dev)) {
1450 if (mp->elt_size >= obj_size)
1456 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1457 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1458 0, NULL, NULL, mlx5_mprq_buf_init,
1459 (void *)((uintptr_t)1 << log_strd_num),
1460 dev->device->numa_node, 0);
1463 "port %u failed to allocate a mempool for"
1464 " Multi-Packet RQ, count=%u, size=%u",
1465 dev->data->port_id, obj_num, obj_size);
1469 ret = mlx5_mr_mempool_register(priv->sh->cdev, mp, false);
1470 if (ret < 0 && rte_errno != EEXIST) {
1472 DRV_LOG(ERR, "port %u failed to register a mempool for Multi-Packet RQ",
1473 dev->data->port_id);
1474 rte_mempool_free(mp);
1480 /* Set mempool for each Rx queue. */
1481 for (i = 0; i != priv->rxqs_n; ++i) {
1482 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i);
1484 if (rxq_ctrl == NULL ||
1485 rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD)
1487 rxq_ctrl->rxq.mprq_mp = mp;
1489 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1490 dev->data->port_id);
1494 #define MLX5_MAX_TCP_HDR_OFFSET ((unsigned int)(sizeof(struct rte_ether_hdr) + \
1495 sizeof(struct rte_vlan_hdr) * 2 + \
1496 sizeof(struct rte_ipv6_hdr)))
1497 #define MAX_TCP_OPTION_SIZE 40u
1498 #define MLX5_MAX_LRO_HEADER_FIX ((unsigned int)(MLX5_MAX_TCP_HDR_OFFSET + \
1499 sizeof(struct rte_tcp_hdr) + \
1500 MAX_TCP_OPTION_SIZE))
1503 * Adjust the maximum LRO massage size.
1506 * Pointer to Ethernet device.
1509 * @param max_lro_size
1510 * The maximum size for LRO packet.
1513 mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
1514 uint32_t max_lro_size)
1516 struct mlx5_priv *priv = dev->data->dev_private;
1518 if (priv->config.hca_attr.lro_max_msg_sz_mode ==
1519 MLX5_LRO_MAX_MSG_SIZE_START_FROM_L4 && max_lro_size >
1520 MLX5_MAX_TCP_HDR_OFFSET)
1521 max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
1522 max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
1523 MLX5_ASSERT(max_lro_size >= MLX5_LRO_SEG_CHUNK_SIZE);
1524 max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
1525 if (priv->max_lro_msg_size)
1526 priv->max_lro_msg_size =
1527 RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);
1529 priv->max_lro_msg_size = max_lro_size;
1531 "port %u Rx Queue %u max LRO message size adjusted to %u bytes",
1532 dev->data->port_id, idx,
1533 priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
1537 * Create a DPDK Rx queue.
1540 * Pointer to Ethernet device.
1542 * RX queue private data.
1544 * Number of descriptors to configure in queue.
1546 * NUMA socket on which memory must be allocated.
1549 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1551 struct mlx5_rxq_ctrl *
1552 mlx5_rxq_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,
1554 unsigned int socket, const struct rte_eth_rxconf *conf,
1555 const struct rte_eth_rxseg_split *rx_seg, uint16_t n_seg)
1557 uint16_t idx = rxq->idx;
1558 struct mlx5_priv *priv = dev->data->dev_private;
1559 struct mlx5_rxq_ctrl *tmpl;
1560 unsigned int mb_len = rte_pktmbuf_data_room_size(rx_seg[0].mp);
1561 struct mlx5_dev_config *config = &priv->config;
1562 uint64_t offloads = conf->offloads |
1563 dev->data->dev_conf.rxmode.offloads;
1564 unsigned int lro_on_queue = !!(offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO);
1565 unsigned int max_rx_pktlen = lro_on_queue ?
1566 dev->data->dev_conf.rxmode.max_lro_pkt_size :
1567 dev->data->mtu + (unsigned int)RTE_ETHER_HDR_LEN +
1569 unsigned int non_scatter_min_mbuf_size = max_rx_pktlen +
1570 RTE_PKTMBUF_HEADROOM;
1571 unsigned int max_lro_size = 0;
1572 unsigned int first_mb_free_size = mb_len - RTE_PKTMBUF_HEADROOM;
1573 const int mprq_en = mlx5_check_mprq_support(dev) > 0 && n_seg == 1 &&
1574 !rx_seg[0].offset && !rx_seg[0].length;
1575 unsigned int log_mprq_stride_nums = config->mprq.log_stride_num ?
1576 config->mprq.log_stride_num : MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM;
1577 unsigned int log_mprq_stride_size = non_scatter_min_mbuf_size <=
1578 RTE_BIT32(config->mprq.log_max_stride_size) ?
1579 log2above(non_scatter_min_mbuf_size) :
1580 MLX5_MPRQ_DEFAULT_LOG_STRIDE_SIZE;
1581 unsigned int mprq_stride_cap = (config->mprq.log_stride_num ?
1582 RTE_BIT32(config->mprq.log_stride_num) :
1583 RTE_BIT32(log_mprq_stride_nums)) *
1584 (config->mprq.log_stride_size ?
1585 RTE_BIT32(config->mprq.log_stride_size) :
1586 RTE_BIT32(log_mprq_stride_size));
1588 * Always allocate extra slots, even if eventually
1589 * the vector Rx will not be used.
1591 uint16_t desc_n = desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1592 const struct rte_eth_rxseg_split *qs_seg = rx_seg;
1593 unsigned int tail_len;
1595 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,
1596 sizeof(*tmpl) + desc_n * sizeof(struct rte_mbuf *) +
1598 (desc >> log_mprq_stride_nums) * sizeof(struct mlx5_mprq_buf *),
1604 LIST_INIT(&tmpl->owners);
1605 if (conf->share_group > 0) {
1606 tmpl->rxq.shared = 1;
1607 tmpl->share_group = conf->share_group;
1608 tmpl->share_qid = conf->share_qid;
1609 LIST_INSERT_HEAD(&priv->sh->shared_rxqs, tmpl, share_entry);
1612 LIST_INSERT_HEAD(&tmpl->owners, rxq, owner_entry);
1613 MLX5_ASSERT(n_seg && n_seg <= MLX5_MAX_RXQ_NSEG);
1615 * Save the original segment configuration in the shared queue
1616 * descriptor for the later check on the sibling queue creation.
1618 tmpl->rxseg_n = n_seg;
1619 rte_memcpy(tmpl->rxseg, qs_seg,
1620 sizeof(struct rte_eth_rxseg_split) * n_seg);
1622 * Build the array of actual buffer offsets and lengths.
1623 * Pad with the buffers from the last memory pool if
1624 * needed to handle max size packets, replace zero length
1625 * with the buffer length from the pool.
1627 tail_len = max_rx_pktlen;
1629 struct mlx5_eth_rxseg *hw_seg =
1630 &tmpl->rxq.rxseg[tmpl->rxq.rxseg_n];
1631 uint32_t buf_len, offset, seg_len;
1634 * For the buffers beyond descriptions offset is zero,
1635 * the first buffer contains head room.
1637 buf_len = rte_pktmbuf_data_room_size(qs_seg->mp);
1638 offset = (tmpl->rxq.rxseg_n >= n_seg ? 0 : qs_seg->offset) +
1639 (tmpl->rxq.rxseg_n ? 0 : RTE_PKTMBUF_HEADROOM);
1641 * For the buffers beyond descriptions the length is
1642 * pool buffer length, zero lengths are replaced with
1643 * pool buffer length either.
1645 seg_len = tmpl->rxq.rxseg_n >= n_seg ? buf_len :
1649 /* Check is done in long int, now overflows. */
1650 if (buf_len < seg_len + offset) {
1651 DRV_LOG(ERR, "port %u Rx queue %u: Split offset/length "
1652 "%u/%u can't be satisfied",
1653 dev->data->port_id, idx,
1654 qs_seg->length, qs_seg->offset);
1658 if (seg_len > tail_len)
1659 seg_len = buf_len - offset;
1660 if (++tmpl->rxq.rxseg_n > MLX5_MAX_RXQ_NSEG) {
1662 "port %u too many SGEs (%u) needed to handle"
1663 " requested maximum packet size %u, the maximum"
1664 " supported are %u", dev->data->port_id,
1665 tmpl->rxq.rxseg_n, max_rx_pktlen,
1667 rte_errno = ENOTSUP;
1670 /* Build the actual scattering element in the queue object. */
1671 hw_seg->mp = qs_seg->mp;
1672 MLX5_ASSERT(offset <= UINT16_MAX);
1673 MLX5_ASSERT(seg_len <= UINT16_MAX);
1674 hw_seg->offset = (uint16_t)offset;
1675 hw_seg->length = (uint16_t)seg_len;
1677 * Advance the segment descriptor, the padding is the based
1678 * on the attributes of the last descriptor.
1680 if (tmpl->rxq.rxseg_n < n_seg)
1682 tail_len -= RTE_MIN(tail_len, seg_len);
1683 } while (tail_len || !rte_is_power_of_2(tmpl->rxq.rxseg_n));
1684 MLX5_ASSERT(tmpl->rxq.rxseg_n &&
1685 tmpl->rxq.rxseg_n <= MLX5_MAX_RXQ_NSEG);
1686 if (tmpl->rxq.rxseg_n > 1 && !(offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) {
1687 DRV_LOG(ERR, "port %u Rx queue %u: Scatter offload is not"
1688 " configured and no enough mbuf space(%u) to contain "
1689 "the maximum RX packet length(%u) with head-room(%u)",
1690 dev->data->port_id, idx, mb_len, max_rx_pktlen,
1691 RTE_PKTMBUF_HEADROOM);
1695 tmpl->type = MLX5_RXQ_TYPE_STANDARD;
1696 if (mlx5_mr_ctrl_init(&tmpl->rxq.mr_ctrl,
1697 &priv->sh->cdev->mr_scache.dev_gen, socket)) {
1698 /* rte_errno is already set. */
1701 tmpl->socket = socket;
1702 if (dev->data->dev_conf.intr_conf.rxq)
1705 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1706 * following conditions are met:
1707 * - MPRQ is enabled.
1708 * - The number of descs is more than the number of strides.
1709 * - max_rx_pktlen plus overhead is less than the max size
1710 * of a stride or log_mprq_stride_size is specified by a user.
1711 * Need to make sure that there are enough strides to encap
1712 * the maximum packet size in case log_mprq_stride_size is set.
1713 * Otherwise, enable Rx scatter if necessary.
1715 if (mprq_en && desc > RTE_BIT32(log_mprq_stride_nums) &&
1716 (non_scatter_min_mbuf_size <=
1717 RTE_BIT32(config->mprq.log_max_stride_size) ||
1718 (config->mprq.log_stride_size &&
1719 non_scatter_min_mbuf_size <= mprq_stride_cap))) {
1720 /* TODO: Rx scatter isn't supported yet. */
1721 tmpl->rxq.sges_n = 0;
1722 /* Trim the number of descs needed. */
1723 desc >>= log_mprq_stride_nums;
1724 tmpl->rxq.log_strd_num = config->mprq.log_stride_num ?
1725 config->mprq.log_stride_num : log_mprq_stride_nums;
1726 tmpl->rxq.log_strd_sz = config->mprq.log_stride_size ?
1727 config->mprq.log_stride_size : log_mprq_stride_size;
1728 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1729 tmpl->rxq.strd_scatter_en =
1730 !!(offloads & RTE_ETH_RX_OFFLOAD_SCATTER);
1731 tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(first_mb_free_size,
1732 config->mprq.max_memcpy_len);
1733 max_lro_size = RTE_MIN(max_rx_pktlen,
1734 RTE_BIT32(tmpl->rxq.log_strd_num) *
1735 RTE_BIT32(tmpl->rxq.log_strd_sz));
1737 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1738 " strd_num_n = %u, strd_sz_n = %u",
1739 dev->data->port_id, idx,
1740 tmpl->rxq.log_strd_num, tmpl->rxq.log_strd_sz);
1741 } else if (tmpl->rxq.rxseg_n == 1) {
1742 MLX5_ASSERT(max_rx_pktlen <= first_mb_free_size);
1743 tmpl->rxq.sges_n = 0;
1744 max_lro_size = max_rx_pktlen;
1745 } else if (offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
1746 unsigned int sges_n;
1748 if (lro_on_queue && first_mb_free_size <
1749 MLX5_MAX_LRO_HEADER_FIX) {
1750 DRV_LOG(ERR, "Not enough space in the first segment(%u)"
1751 " to include the max header size(%u) for LRO",
1752 first_mb_free_size, MLX5_MAX_LRO_HEADER_FIX);
1753 rte_errno = ENOTSUP;
1757 * Determine the number of SGEs needed for a full packet
1758 * and round it to the next power of two.
1760 sges_n = log2above(tmpl->rxq.rxseg_n);
1761 if (sges_n > MLX5_MAX_LOG_RQ_SEGS) {
1763 "port %u too many SGEs (%u) needed to handle"
1764 " requested maximum packet size %u, the maximum"
1765 " supported are %u", dev->data->port_id,
1766 1 << sges_n, max_rx_pktlen,
1767 1u << MLX5_MAX_LOG_RQ_SEGS);
1768 rte_errno = ENOTSUP;
1771 tmpl->rxq.sges_n = sges_n;
1772 max_lro_size = max_rx_pktlen;
1774 if (config->mprq.enabled && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1776 "port %u MPRQ is requested but cannot be enabled\n"
1777 " (requested: pkt_sz = %u, desc_num = %u,"
1778 " rxq_num = %u, stride_sz = %u, stride_num = %u\n"
1779 " supported: min_rxqs_num = %u,"
1780 " min_stride_sz = %u, max_stride_sz = %u).",
1781 dev->data->port_id, non_scatter_min_mbuf_size,
1783 config->mprq.log_stride_size ?
1784 RTE_BIT32(config->mprq.log_stride_size) :
1785 RTE_BIT32(log_mprq_stride_size),
1786 config->mprq.log_stride_num ?
1787 RTE_BIT32(config->mprq.log_stride_num) :
1788 RTE_BIT32(log_mprq_stride_nums),
1789 config->mprq.min_rxqs_num,
1790 RTE_BIT32(config->mprq.log_min_stride_size),
1791 RTE_BIT32(config->mprq.log_max_stride_size));
1792 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1793 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1794 if (desc % (1 << tmpl->rxq.sges_n)) {
1796 "port %u number of Rx queue descriptors (%u) is not a"
1797 " multiple of SGEs per packet (%u)",
1800 1 << tmpl->rxq.sges_n);
1804 mlx5_max_lro_msg_size_adjust(dev, idx, max_lro_size);
1805 /* Toggle RX checksum offload if hardware supports it. */
1806 tmpl->rxq.csum = !!(offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM);
1807 /* Configure Rx timestamp. */
1808 tmpl->rxq.hw_timestamp = !!(offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP);
1809 tmpl->rxq.timestamp_rx_flag = 0;
1810 if (tmpl->rxq.hw_timestamp && rte_mbuf_dyn_rx_timestamp_register(
1811 &tmpl->rxq.timestamp_offset,
1812 &tmpl->rxq.timestamp_rx_flag) != 0) {
1813 DRV_LOG(ERR, "Cannot register Rx timestamp field/flag");
1816 /* Configure VLAN stripping. */
1817 tmpl->rxq.vlan_strip = !!(offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
1818 /* By default, FCS (CRC) is stripped by hardware. */
1819 tmpl->rxq.crc_present = 0;
1820 tmpl->rxq.lro = lro_on_queue;
1821 if (offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC) {
1822 if (config->hw_fcs_strip) {
1824 * RQs used for LRO-enabled TIRs should not be
1825 * configured to scatter the FCS.
1829 "port %u CRC stripping has been "
1830 "disabled but will still be performed "
1831 "by hardware, because LRO is enabled",
1832 dev->data->port_id);
1834 tmpl->rxq.crc_present = 1;
1837 "port %u CRC stripping has been disabled but will"
1838 " still be performed by hardware, make sure MLNX_OFED"
1839 " and firmware are up to date",
1840 dev->data->port_id);
1844 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1845 " incoming frames to hide it",
1847 tmpl->rxq.crc_present ? "disabled" : "enabled",
1848 tmpl->rxq.crc_present << 2);
1850 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1851 (!!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS));
1852 tmpl->rxq.port_id = dev->data->port_id;
1853 tmpl->sh = priv->sh;
1854 tmpl->rxq.mp = rx_seg[0].mp;
1855 tmpl->rxq.elts_n = log2above(desc);
1856 tmpl->rxq.rq_repl_thresh =
1857 MLX5_VPMD_RXQ_RPLNSH_THRESH(desc_n);
1859 (struct rte_mbuf *(*)[desc_n])(tmpl + 1);
1860 tmpl->rxq.mprq_bufs =
1861 (struct mlx5_mprq_buf *(*)[desc])(*tmpl->rxq.elts + desc_n);
1862 tmpl->rxq.idx = idx;
1863 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1866 mlx5_mr_btree_free(&tmpl->rxq.mr_ctrl.cache_bh);
1872 * Create a DPDK Rx hairpin queue.
1875 * Pointer to Ethernet device.
1879 * Number of descriptors to configure in queue.
1880 * @param hairpin_conf
1881 * The hairpin binding configuration.
1884 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1886 struct mlx5_rxq_ctrl *
1887 mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,
1889 const struct rte_eth_hairpin_conf *hairpin_conf)
1891 uint16_t idx = rxq->idx;
1892 struct mlx5_priv *priv = dev->data->dev_private;
1893 struct mlx5_rxq_ctrl *tmpl;
1895 tmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl), 0,
1901 LIST_INIT(&tmpl->owners);
1903 LIST_INSERT_HEAD(&tmpl->owners, rxq, owner_entry);
1904 tmpl->type = MLX5_RXQ_TYPE_HAIRPIN;
1905 tmpl->socket = SOCKET_ID_ANY;
1906 tmpl->rxq.rss_hash = 0;
1907 tmpl->rxq.port_id = dev->data->port_id;
1908 tmpl->sh = priv->sh;
1909 tmpl->rxq.mp = NULL;
1910 tmpl->rxq.elts_n = log2above(desc);
1911 tmpl->rxq.elts = NULL;
1912 tmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };
1913 tmpl->rxq.idx = idx;
1914 rxq->hairpin_conf = *hairpin_conf;
1915 mlx5_rxq_ref(dev, idx);
1916 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1921 * Increase Rx queue reference count.
1924 * Pointer to Ethernet device.
1929 * A pointer to the queue if it exists, NULL otherwise.
1931 struct mlx5_rxq_priv *
1932 mlx5_rxq_ref(struct rte_eth_dev *dev, uint16_t idx)
1934 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
1937 __atomic_fetch_add(&rxq->refcnt, 1, __ATOMIC_RELAXED);
1942 * Dereference a Rx queue.
1945 * Pointer to Ethernet device.
1950 * Updated reference count.
1953 mlx5_rxq_deref(struct rte_eth_dev *dev, uint16_t idx)
1955 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
1959 return __atomic_sub_fetch(&rxq->refcnt, 1, __ATOMIC_RELAXED);
1966 * Pointer to Ethernet device.
1971 * A pointer to the queue if it exists, NULL otherwise.
1973 struct mlx5_rxq_priv *
1974 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1976 struct mlx5_priv *priv = dev->data->dev_private;
1978 MLX5_ASSERT(priv->rxq_privs != NULL);
1979 return (*priv->rxq_privs)[idx];
1983 * Get Rx queue shareable control.
1986 * Pointer to Ethernet device.
1991 * A pointer to the queue control if it exists, NULL otherwise.
1993 struct mlx5_rxq_ctrl *
1994 mlx5_rxq_ctrl_get(struct rte_eth_dev *dev, uint16_t idx)
1996 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
1998 return rxq == NULL ? NULL : rxq->ctrl;
2002 * Get Rx queue shareable data.
2005 * Pointer to Ethernet device.
2010 * A pointer to the queue data if it exists, NULL otherwise.
2012 struct mlx5_rxq_data *
2013 mlx5_rxq_data_get(struct rte_eth_dev *dev, uint16_t idx)
2015 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2017 return rxq == NULL ? NULL : &rxq->ctrl->rxq;
2021 * Release a Rx queue.
2024 * Pointer to Ethernet device.
2029 * 1 while a reference on it exists, 0 when freed.
2032 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
2034 struct mlx5_priv *priv = dev->data->dev_private;
2035 struct mlx5_rxq_priv *rxq;
2036 struct mlx5_rxq_ctrl *rxq_ctrl;
2039 if (priv->rxq_privs == NULL)
2041 rxq = mlx5_rxq_get(dev, idx);
2042 if (rxq == NULL || rxq->refcnt == 0)
2044 rxq_ctrl = rxq->ctrl;
2045 refcnt = mlx5_rxq_deref(dev, idx);
2048 } else if (refcnt == 1) { /* RxQ stopped. */
2049 priv->obj_ops.rxq_obj_release(rxq);
2050 if (!rxq_ctrl->started && rxq_ctrl->obj != NULL) {
2051 LIST_REMOVE(rxq_ctrl->obj, next);
2052 mlx5_free(rxq_ctrl->obj);
2053 rxq_ctrl->obj = NULL;
2055 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) {
2056 if (!rxq_ctrl->started)
2057 rxq_free_elts(rxq_ctrl);
2058 dev->data->rx_queue_state[idx] =
2059 RTE_ETH_QUEUE_STATE_STOPPED;
2061 } else { /* Refcnt zero, closing device. */
2062 LIST_REMOVE(rxq, owner_entry);
2063 if (LIST_EMPTY(&rxq_ctrl->owners)) {
2064 if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
2066 (&rxq_ctrl->rxq.mr_ctrl.cache_bh);
2067 if (rxq_ctrl->rxq.shared)
2068 LIST_REMOVE(rxq_ctrl, share_entry);
2069 LIST_REMOVE(rxq_ctrl, next);
2070 mlx5_free(rxq_ctrl);
2072 dev->data->rx_queues[idx] = NULL;
2074 (*priv->rxq_privs)[idx] = NULL;
2080 * Verify the Rx Queue list is empty
2083 * Pointer to Ethernet device.
2086 * The number of object not released.
2089 mlx5_rxq_verify(struct rte_eth_dev *dev)
2091 struct mlx5_priv *priv = dev->data->dev_private;
2092 struct mlx5_rxq_ctrl *rxq_ctrl;
2095 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
2096 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
2097 dev->data->port_id, rxq_ctrl->rxq.idx);
2104 * Get a Rx queue type.
2107 * Pointer to Ethernet device.
2112 * The Rx queue type.
2115 mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx)
2117 struct mlx5_priv *priv = dev->data->dev_private;
2118 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
2120 if (idx < priv->rxqs_n && rxq_ctrl != NULL)
2121 return rxq_ctrl->type;
2122 return MLX5_RXQ_TYPE_UNDEFINED;
2126 * Get a Rx hairpin queue configuration.
2129 * Pointer to Ethernet device.
2134 * Pointer to the configuration if a hairpin RX queue, otherwise NULL.
2136 const struct rte_eth_hairpin_conf *
2137 mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)
2139 struct mlx5_priv *priv = dev->data->dev_private;
2140 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);
2142 if (idx < priv->rxqs_n && rxq != NULL) {
2143 if (rxq->ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
2144 return &rxq->hairpin_conf;
2150 * Match queues listed in arguments to queues contained in indirection table
2154 * Pointer to indirection table to match.
2156 * Queues to match to ques in indirection table.
2158 * Number of queues in the array.
2161 * 1 if all queues in indirection table match 0 otherwise.
2164 mlx5_ind_table_obj_match_queues(const struct mlx5_ind_table_obj *ind_tbl,
2165 const uint16_t *queues, uint32_t queues_n)
2167 return (ind_tbl->queues_n == queues_n) &&
2168 (!memcmp(ind_tbl->queues, queues,
2169 ind_tbl->queues_n * sizeof(ind_tbl->queues[0])));
2173 * Get an indirection table.
2176 * Pointer to Ethernet device.
2178 * Queues entering in the indirection table.
2180 * Number of queues in the array.
2183 * An indirection table if found.
2185 struct mlx5_ind_table_obj *
2186 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
2189 struct mlx5_priv *priv = dev->data->dev_private;
2190 struct mlx5_ind_table_obj *ind_tbl;
2192 rte_rwlock_read_lock(&priv->ind_tbls_lock);
2193 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
2194 if ((ind_tbl->queues_n == queues_n) &&
2195 (memcmp(ind_tbl->queues, queues,
2196 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
2198 __atomic_fetch_add(&ind_tbl->refcnt, 1,
2203 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
2208 * Release an indirection table.
2211 * Pointer to Ethernet device.
2213 * Indirection table to release.
2215 * Indirection table for Standalone queue.
2217 * If true, then dereference RX queues related to indirection table.
2218 * Otherwise, no additional action will be taken.
2221 * 1 while a reference on it exists, 0 when freed.
2224 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
2225 struct mlx5_ind_table_obj *ind_tbl,
2229 struct mlx5_priv *priv = dev->data->dev_private;
2230 unsigned int i, ret;
2232 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2233 ret = __atomic_sub_fetch(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
2234 if (!ret && !standalone)
2235 LIST_REMOVE(ind_tbl, next);
2236 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2239 priv->obj_ops.ind_table_destroy(ind_tbl);
2241 for (i = 0; i != ind_tbl->queues_n; ++i)
2242 claim_nonzero(mlx5_rxq_deref(dev, ind_tbl->queues[i]));
2249 * Verify the Rx Queue list is empty
2252 * Pointer to Ethernet device.
2255 * The number of object not released.
2258 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
2260 struct mlx5_priv *priv = dev->data->dev_private;
2261 struct mlx5_ind_table_obj *ind_tbl;
2264 rte_rwlock_read_lock(&priv->ind_tbls_lock);
2265 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
2267 "port %u indirection table obj %p still referenced",
2268 dev->data->port_id, (void *)ind_tbl);
2271 rte_rwlock_read_unlock(&priv->ind_tbls_lock);
2276 * Setup an indirection table structure fields.
2279 * Pointer to Ethernet device.
2281 * Indirection table to modify.
2283 * Whether to increment RxQ reference counters.
2286 * 0 on success, a negative errno value otherwise and rte_errno is set.
2289 mlx5_ind_table_obj_setup(struct rte_eth_dev *dev,
2290 struct mlx5_ind_table_obj *ind_tbl,
2293 struct mlx5_priv *priv = dev->data->dev_private;
2294 uint32_t queues_n = ind_tbl->queues_n;
2295 uint16_t *queues = ind_tbl->queues;
2296 unsigned int i = 0, j;
2298 const unsigned int n = rte_is_power_of_2(queues_n) ?
2299 log2above(queues_n) :
2300 log2above(priv->config.ind_table_max_size);
2303 for (i = 0; i != queues_n; ++i) {
2304 if (mlx5_rxq_ref(dev, queues[i]) == NULL) {
2309 ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl);
2312 __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED);
2317 for (j = 0; j < i; j++)
2318 mlx5_rxq_deref(dev, queues[j]);
2321 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2322 dev->data->port_id);
2327 * Create an indirection table.
2330 * Pointer to Ethernet device.
2332 * Queues entering in the indirection table.
2334 * Number of queues in the array.
2336 * Indirection table for Standalone queue.
2338 * Whether to increment RxQ reference counters.
2341 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2343 static struct mlx5_ind_table_obj *
2344 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
2345 uint32_t queues_n, bool standalone, bool ref_qs)
2347 struct mlx5_priv *priv = dev->data->dev_private;
2348 struct mlx5_ind_table_obj *ind_tbl;
2351 ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
2352 queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
2357 ind_tbl->queues_n = queues_n;
2358 ind_tbl->queues = (uint16_t *)(ind_tbl + 1);
2359 memcpy(ind_tbl->queues, queues, queues_n * sizeof(*queues));
2360 ret = mlx5_ind_table_obj_setup(dev, ind_tbl, ref_qs);
2366 rte_rwlock_write_lock(&priv->ind_tbls_lock);
2367 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
2368 rte_rwlock_write_unlock(&priv->ind_tbls_lock);
2374 mlx5_ind_table_obj_check_standalone(struct rte_eth_dev *dev __rte_unused,
2375 struct mlx5_ind_table_obj *ind_tbl)
2379 refcnt = __atomic_load_n(&ind_tbl->refcnt, __ATOMIC_RELAXED);
2383 * Modification of indirection tables having more than 1
2384 * reference is unsupported.
2387 "Port %u cannot modify indirection table %p (refcnt %u > 1).",
2388 dev->data->port_id, (void *)ind_tbl, refcnt);
2394 * Modify an indirection table.
2397 * Pointer to Ethernet device.
2399 * Indirection table to modify.
2401 * Queues replacement for the indirection table.
2403 * Number of queues in the array.
2405 * Indirection table for Standalone queue.
2407 * Whether to increment new RxQ set reference counters.
2408 * @param deref_old_qs
2409 * Whether to decrement old RxQ set reference counters.
2412 * 0 on success, a negative errno value otherwise and rte_errno is set.
2415 mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,
2416 struct mlx5_ind_table_obj *ind_tbl,
2417 uint16_t *queues, const uint32_t queues_n,
2418 bool standalone, bool ref_new_qs, bool deref_old_qs)
2420 struct mlx5_priv *priv = dev->data->dev_private;
2421 unsigned int i = 0, j;
2423 const unsigned int n = rte_is_power_of_2(queues_n) ?
2424 log2above(queues_n) :
2425 log2above(priv->config.ind_table_max_size);
2427 MLX5_ASSERT(standalone);
2428 RTE_SET_USED(standalone);
2429 if (mlx5_ind_table_obj_check_standalone(dev, ind_tbl) < 0)
2432 for (i = 0; i != queues_n; ++i) {
2433 if (!mlx5_rxq_ref(dev, queues[i])) {
2438 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2439 ret = priv->obj_ops.ind_table_modify(dev, n, queues, queues_n, ind_tbl);
2443 for (i = 0; i < ind_tbl->queues_n; i++)
2444 claim_nonzero(mlx5_rxq_deref(dev, ind_tbl->queues[i]));
2445 ind_tbl->queues_n = queues_n;
2446 ind_tbl->queues = queues;
2451 for (j = 0; j < i; j++)
2452 mlx5_rxq_deref(dev, queues[j]);
2455 DRV_LOG(DEBUG, "Port %u cannot setup indirection table.",
2456 dev->data->port_id);
2461 * Attach an indirection table to its queues.
2464 * Pointer to Ethernet device.
2466 * Indirection table to attach.
2469 * 0 on success, a negative errno value otherwise and rte_errno is set.
2472 mlx5_ind_table_obj_attach(struct rte_eth_dev *dev,
2473 struct mlx5_ind_table_obj *ind_tbl)
2477 ret = mlx5_ind_table_obj_modify(dev, ind_tbl, ind_tbl->queues,
2479 true /* standalone */,
2480 true /* ref_new_qs */,
2481 false /* deref_old_qs */);
2483 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2484 dev->data->port_id, (void *)ind_tbl);
2489 * Detach an indirection table from its queues.
2492 * Pointer to Ethernet device.
2494 * Indirection table to detach.
2497 * 0 on success, a negative errno value otherwise and rte_errno is set.
2500 mlx5_ind_table_obj_detach(struct rte_eth_dev *dev,
2501 struct mlx5_ind_table_obj *ind_tbl)
2503 struct mlx5_priv *priv = dev->data->dev_private;
2504 const unsigned int n = rte_is_power_of_2(ind_tbl->queues_n) ?
2505 log2above(ind_tbl->queues_n) :
2506 log2above(priv->config.ind_table_max_size);
2510 ret = mlx5_ind_table_obj_check_standalone(dev, ind_tbl);
2513 MLX5_ASSERT(priv->obj_ops.ind_table_modify);
2514 ret = priv->obj_ops.ind_table_modify(dev, n, NULL, 0, ind_tbl);
2516 DRV_LOG(ERR, "Port %u could not modify indirect table obj %p",
2517 dev->data->port_id, (void *)ind_tbl);
2520 for (i = 0; i < ind_tbl->queues_n; i++)
2521 mlx5_rxq_release(dev, ind_tbl->queues[i]);
2526 mlx5_hrxq_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
2529 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2530 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2531 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2533 return (hrxq->rss_key_len != rss_desc->key_len ||
2534 memcmp(hrxq->rss_key, rss_desc->key, rss_desc->key_len) ||
2535 hrxq->hash_fields != rss_desc->hash_fields ||
2536 hrxq->ind_table->queues_n != rss_desc->queue_num ||
2537 memcmp(hrxq->ind_table->queues, rss_desc->queue,
2538 rss_desc->queue_num * sizeof(rss_desc->queue[0])));
2542 * Modify an Rx Hash queue configuration.
2545 * Pointer to Ethernet device.
2547 * Index to Hash Rx queue to modify.
2549 * RSS key for the Rx hash queue.
2550 * @param rss_key_len
2552 * @param hash_fields
2553 * Verbs protocol hash field to make the RSS on.
2555 * Queues entering in hash queue. In case of empty hash_fields only the
2556 * first queue index will be taken for the indirection table.
2561 * 0 on success, a negative errno value otherwise and rte_errno is set.
2564 mlx5_hrxq_modify(struct rte_eth_dev *dev, uint32_t hrxq_idx,
2565 const uint8_t *rss_key, uint32_t rss_key_len,
2566 uint64_t hash_fields,
2567 const uint16_t *queues, uint32_t queues_n)
2570 struct mlx5_ind_table_obj *ind_tbl = NULL;
2571 struct mlx5_priv *priv = dev->data->dev_private;
2572 struct mlx5_hrxq *hrxq =
2573 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2574 bool dev_started = !!dev->data->dev_started;
2582 if (hrxq->rss_key_len != rss_key_len) {
2583 /* rss_key_len is fixed size 40 byte & not supposed to change */
2587 queues_n = hash_fields ? queues_n : 1;
2588 if (mlx5_ind_table_obj_match_queues(hrxq->ind_table,
2589 queues, queues_n)) {
2590 ind_tbl = hrxq->ind_table;
2592 if (hrxq->standalone) {
2594 * Replacement of indirection table unsupported for
2595 * standalone hrxq objects (used by shared RSS).
2597 rte_errno = ENOTSUP;
2600 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2602 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2610 MLX5_ASSERT(priv->obj_ops.hrxq_modify);
2611 ret = priv->obj_ops.hrxq_modify(dev, hrxq, rss_key,
2612 hash_fields, ind_tbl);
2617 if (ind_tbl != hrxq->ind_table) {
2618 MLX5_ASSERT(!hrxq->standalone);
2619 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2620 hrxq->standalone, true);
2621 hrxq->ind_table = ind_tbl;
2623 hrxq->hash_fields = hash_fields;
2624 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2628 if (ind_tbl != hrxq->ind_table) {
2629 MLX5_ASSERT(!hrxq->standalone);
2630 mlx5_ind_table_obj_release(dev, ind_tbl, hrxq->standalone,
2638 __mlx5_hrxq_remove(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
2640 struct mlx5_priv *priv = dev->data->dev_private;
2642 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2643 mlx5_glue->destroy_flow_action(hrxq->action);
2645 priv->obj_ops.hrxq_destroy(hrxq);
2646 if (!hrxq->standalone) {
2647 mlx5_ind_table_obj_release(dev, hrxq->ind_table,
2648 hrxq->standalone, true);
2650 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2654 * Release the hash Rx queue.
2657 * Pointer to Ethernet device.
2659 * Index to Hash Rx queue to release.
2662 * mlx5 list pointer.
2664 * Hash queue entry pointer.
2667 mlx5_hrxq_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2669 struct rte_eth_dev *dev = tool_ctx;
2670 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2672 __mlx5_hrxq_remove(dev, hrxq);
2675 static struct mlx5_hrxq *
2676 __mlx5_hrxq_create(struct rte_eth_dev *dev,
2677 struct mlx5_flow_rss_desc *rss_desc)
2679 struct mlx5_priv *priv = dev->data->dev_private;
2680 const uint8_t *rss_key = rss_desc->key;
2681 uint32_t rss_key_len = rss_desc->key_len;
2682 bool standalone = !!rss_desc->shared_rss;
2683 const uint16_t *queues =
2684 standalone ? rss_desc->const_q : rss_desc->queue;
2685 uint32_t queues_n = rss_desc->queue_num;
2686 struct mlx5_hrxq *hrxq = NULL;
2687 uint32_t hrxq_idx = 0;
2688 struct mlx5_ind_table_obj *ind_tbl = rss_desc->ind_tbl;
2691 queues_n = rss_desc->hash_fields ? queues_n : 1;
2693 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
2695 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n,
2697 !!dev->data->dev_started);
2700 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2703 hrxq->standalone = standalone;
2704 hrxq->idx = hrxq_idx;
2705 hrxq->ind_table = ind_tbl;
2706 hrxq->rss_key_len = rss_key_len;
2707 hrxq->hash_fields = rss_desc->hash_fields;
2708 memcpy(hrxq->rss_key, rss_key, rss_key_len);
2709 ret = priv->obj_ops.hrxq_new(dev, hrxq, rss_desc->tunnel);
2714 if (!rss_desc->ind_tbl)
2715 mlx5_ind_table_obj_release(dev, ind_tbl, standalone, true);
2717 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2721 struct mlx5_list_entry *
2722 mlx5_hrxq_create_cb(void *tool_ctx, void *cb_ctx)
2724 struct rte_eth_dev *dev = tool_ctx;
2725 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
2726 struct mlx5_flow_rss_desc *rss_desc = ctx->data;
2727 struct mlx5_hrxq *hrxq;
2729 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2730 return hrxq ? &hrxq->entry : NULL;
2733 struct mlx5_list_entry *
2734 mlx5_hrxq_clone_cb(void *tool_ctx, struct mlx5_list_entry *entry,
2735 void *cb_ctx __rte_unused)
2737 struct rte_eth_dev *dev = tool_ctx;
2738 struct mlx5_priv *priv = dev->data->dev_private;
2739 struct mlx5_hrxq *hrxq;
2740 uint32_t hrxq_idx = 0;
2742 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
2745 memcpy(hrxq, entry, sizeof(*hrxq) + MLX5_RSS_HASH_KEY_LEN);
2746 hrxq->idx = hrxq_idx;
2747 return &hrxq->entry;
2751 mlx5_hrxq_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
2753 struct rte_eth_dev *dev = tool_ctx;
2754 struct mlx5_priv *priv = dev->data->dev_private;
2755 struct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);
2757 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq->idx);
2761 * Get an Rx Hash queue.
2764 * Pointer to Ethernet device.
2766 * RSS configuration for the Rx hash queue.
2769 * An hash Rx queue index on success.
2771 uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,
2772 struct mlx5_flow_rss_desc *rss_desc)
2774 struct mlx5_priv *priv = dev->data->dev_private;
2775 struct mlx5_hrxq *hrxq;
2776 struct mlx5_list_entry *entry;
2777 struct mlx5_flow_cb_ctx ctx = {
2781 if (rss_desc->shared_rss) {
2782 hrxq = __mlx5_hrxq_create(dev, rss_desc);
2784 entry = mlx5_list_register(priv->hrxqs, &ctx);
2787 hrxq = container_of(entry, typeof(*hrxq), entry);
2795 * Release the hash Rx queue.
2798 * Pointer to Ethernet device.
2800 * Index to Hash Rx queue to release.
2803 * 1 while a reference on it exists, 0 when freed.
2805 int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)
2807 struct mlx5_priv *priv = dev->data->dev_private;
2808 struct mlx5_hrxq *hrxq;
2810 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
2813 if (!hrxq->standalone)
2814 return mlx5_list_unregister(priv->hrxqs, &hrxq->entry);
2815 __mlx5_hrxq_remove(dev, hrxq);
2820 * Create a drop Rx Hash queue.
2823 * Pointer to Ethernet device.
2826 * The Verbs/DevX object initialized, NULL otherwise and rte_errno is set.
2829 mlx5_drop_action_create(struct rte_eth_dev *dev)
2831 struct mlx5_priv *priv = dev->data->dev_private;
2832 struct mlx5_hrxq *hrxq = NULL;
2835 if (priv->drop_queue.hrxq)
2836 return priv->drop_queue.hrxq;
2837 hrxq = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq), 0, SOCKET_ID_ANY);
2840 "Port %u cannot allocate memory for drop queue.",
2841 dev->data->port_id);
2845 priv->drop_queue.hrxq = hrxq;
2846 hrxq->ind_table = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*hrxq->ind_table),
2848 if (!hrxq->ind_table) {
2852 ret = priv->obj_ops.drop_action_create(dev);
2858 if (hrxq->ind_table)
2859 mlx5_free(hrxq->ind_table);
2860 priv->drop_queue.hrxq = NULL;
2867 * Release a drop hash Rx queue.
2870 * Pointer to Ethernet device.
2873 mlx5_drop_action_destroy(struct rte_eth_dev *dev)
2875 struct mlx5_priv *priv = dev->data->dev_private;
2876 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2878 if (!priv->drop_queue.hrxq)
2880 priv->obj_ops.drop_action_destroy(dev);
2881 mlx5_free(priv->drop_queue.rxq);
2882 mlx5_free(hrxq->ind_table);
2884 priv->drop_queue.rxq = NULL;
2885 priv->drop_queue.hrxq = NULL;
2889 * Verify the Rx Queue list is empty
2892 * Pointer to Ethernet device.
2895 * The number of object not released.
2898 mlx5_hrxq_verify(struct rte_eth_dev *dev)
2900 struct mlx5_priv *priv = dev->data->dev_private;
2902 return mlx5_list_get_entry_num(priv->hrxqs);
2906 * Set the Rx queue timestamp conversion parameters
2909 * Pointer to the Ethernet device structure.
2912 mlx5_rxq_timestamp_set(struct rte_eth_dev *dev)
2914 struct mlx5_priv *priv = dev->data->dev_private;
2915 struct mlx5_dev_ctx_shared *sh = priv->sh;
2918 for (i = 0; i != priv->rxqs_n; ++i) {
2919 struct mlx5_rxq_data *data = mlx5_rxq_data_get(dev, i);
2924 data->rt_timestamp = priv->config.rt_timestamp;