drivers/net/mlx5/mlx5_rxq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <assert.h>
   8 #include <errno.h>
   9 #include <string.h>
  10 #include <stdint.h>
  11 #include <fcntl.h>
  12 #include <sys/queue.h>
  13
  14 /* Verbs header. */
  15 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  16 #ifdef PEDANTIC
  17 #pragma GCC diagnostic ignored "-Wpedantic"
  18 #endif
  19 #include <infiniband/verbs.h>
  20 #include <infiniband/mlx5dv.h>
  21 #ifdef PEDANTIC
  22 #pragma GCC diagnostic error "-Wpedantic"
  23 #endif
  24
  25 #include <rte_mbuf.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ethdev_driver.h>
  28 #include <rte_common.h>
  29 #include <rte_interrupts.h>
  30 #include <rte_debug.h>
  31 #include <rte_io.h>
  32
  33 #include "mlx5.h"
  34 #include "mlx5_rxtx.h"
  35 #include "mlx5_utils.h"
  36 #include "mlx5_autoconf.h"
  37 #include "mlx5_defs.h"
  38 #include "mlx5_glue.h"
  39
  40 /* Default RSS hash key also used for ConnectX-3. */
  41 uint8_t rss_hash_default_key[] = {
  42         0x2c, 0xc6, 0x81, 0xd1,
  43         0x5b, 0xdb, 0xf4, 0xf7,
  44         0xfc, 0xa2, 0x83, 0x19,
  45         0xdb, 0x1a, 0x3e, 0x94,
  46         0x6b, 0x9e, 0x38, 0xd9,
  47         0x2c, 0x9c, 0x03, 0xd1,
  48         0xad, 0x99, 0x44, 0xa7,
  49         0xd9, 0x56, 0x3d, 0x59,
  50         0x06, 0x3c, 0x25, 0xf3,
  51         0xfc, 0x1f, 0xdc, 0x2a,
  52 };
  53
  54 /* Length of the default RSS hash key. */
  55 static_assert(MLX5_RSS_HASH_KEY_LEN ==
  56               (unsigned int)sizeof(rss_hash_default_key),
  57               "wrong RSS default key size.");
  58
  59 /**
  60  * Check whether Multi-Packet RQ can be enabled for the device.
  61  *
  62  * @param dev
  63  *   Pointer to Ethernet device.
  64  *
  65  * @return
  66  *   1 if supported, negative errno value if not.
  67  */
  68 inline int
  69 mlx5_check_mprq_support(struct rte_eth_dev *dev)
  70 {
  71         struct mlx5_priv *priv = dev->data->dev_private;
  72
  73         if (priv->config.mprq.enabled &&
  74             priv->rxqs_n >= priv->config.mprq.min_rxqs_num)
  75                 return 1;
  76         return -ENOTSUP;
  77 }
  78
  79 /**
  80  * Check whether Multi-Packet RQ is enabled for the Rx queue.
  81  *
  82  *  @param rxq
  83  *     Pointer to receive queue structure.
  84  *
  85  * @return
  86  *   0 if disabled, otherwise enabled.
  87  */
  88 inline int
  89 mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq)
  90 {
  91         return rxq->strd_num_n > 0;
  92 }
  93
  94 /**
  95  * Check whether Multi-Packet RQ is enabled for the device.
  96  *
  97  * @param dev
  98  *   Pointer to Ethernet device.
  99  *
 100  * @return
 101  *   0 if disabled, otherwise enabled.
 102  */
 103 inline int
 104 mlx5_mprq_enabled(struct rte_eth_dev *dev)
 105 {
 106         struct mlx5_priv *priv = dev->data->dev_private;
 107         uint16_t i;
 108         uint16_t n = 0;
 109
 110         if (mlx5_check_mprq_support(dev) < 0)
 111                 return 0;
 112         /* All the configured queues should be enabled. */
 113         for (i = 0; i < priv->rxqs_n; ++i) {
 114                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
 115
 116                 if (!rxq)
 117                         continue;
 118                 if (mlx5_rxq_mprq_enabled(rxq))
 119                         ++n;
 120         }
 121         /* Multi-Packet RQ can't be partially configured. */
 122         assert(n == 0 || n == priv->rxqs_n);
 123         return n == priv->rxqs_n;
 124 }
 125
 126 /**
 127  * Allocate RX queue elements for Multi-Packet RQ.
 128  *
 129  * @param rxq_ctrl
 130  *   Pointer to RX queue structure.
 131  *
 132  * @return
 133  *   0 on success, a negative errno value otherwise and rte_errno is set.
 134  */
 135 static int
 136 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 137 {
 138         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 139         unsigned int wqe_n = 1 << rxq->elts_n;
 140         unsigned int i;
 141         int err;
 142
 143         /* Iterate on segments. */
 144         for (i = 0; i <= wqe_n; ++i) {
 145                 struct mlx5_mprq_buf *buf;
 146
 147                 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
 148                         DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
 149                         rte_errno = ENOMEM;
 150                         goto error;
 151                 }
 152                 if (i < wqe_n)
 153                         (*rxq->mprq_bufs)[i] = buf;
 154                 else
 155                         rxq->mprq_repl = buf;
 156         }
 157         DRV_LOG(DEBUG,
 158                 "port %u Rx queue %u allocated and configured %u segments",
 159                 rxq->port_id, rxq->idx, wqe_n);
 160         return 0;
 161 error:
 162         err = rte_errno; /* Save rte_errno before cleanup. */
 163         wqe_n = i;
 164         for (i = 0; (i != wqe_n); ++i) {
 165                 if ((*rxq->mprq_bufs)[i] != NULL)
 166                         rte_mempool_put(rxq->mprq_mp,
 167                                         (*rxq->mprq_bufs)[i]);
 168                 (*rxq->mprq_bufs)[i] = NULL;
 169         }
 170         DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
 171                 rxq->port_id, rxq->idx);
 172         rte_errno = err; /* Restore rte_errno. */
 173         return -rte_errno;
 174 }
 175
 176 /**
 177  * Allocate RX queue elements for Single-Packet RQ.
 178  *
 179  * @param rxq_ctrl
 180  *   Pointer to RX queue structure.
 181  *
 182  * @return
 183  *   0 on success, errno value on failure.
 184  */
 185 static int
 186 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 187 {
 188         const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
 189         unsigned int elts_n = 1 << rxq_ctrl->rxq.elts_n;
 190         unsigned int i;
 191         int err;
 192
 193         /* Iterate on segments. */
 194         for (i = 0; (i != elts_n); ++i) {
 195                 struct rte_mbuf *buf;
 196
 197                 buf = rte_pktmbuf_alloc(rxq_ctrl->rxq.mp);
 198                 if (buf == NULL) {
 199                         DRV_LOG(ERR, "port %u empty mbuf pool",
 200                                 PORT_ID(rxq_ctrl->priv));
 201                         rte_errno = ENOMEM;
 202                         goto error;
 203                 }
 204                 /* Headroom is reserved by rte_pktmbuf_alloc(). */
 205                 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
 206                 /* Buffer is supposed to be empty. */
 207                 assert(rte_pktmbuf_data_len(buf) == 0);
 208                 assert(rte_pktmbuf_pkt_len(buf) == 0);
 209                 assert(!buf->next);
 210                 /* Only the first segment keeps headroom. */
 211                 if (i % sges_n)
 212                         SET_DATA_OFF(buf, 0);
 213                 PORT(buf) = rxq_ctrl->rxq.port_id;
 214                 DATA_LEN(buf) = rte_pktmbuf_tailroom(buf);
 215                 PKT_LEN(buf) = DATA_LEN(buf);
 216                 NB_SEGS(buf) = 1;
 217                 (*rxq_ctrl->rxq.elts)[i] = buf;
 218         }
 219         /* If Rx vector is activated. */
 220         if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
 221                 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 222                 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
 223                 int j;
 224
 225                 /* Initialize default rearm_data for vPMD. */
 226                 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
 227                 rte_mbuf_refcnt_set(mbuf_init, 1);
 228                 mbuf_init->nb_segs = 1;
 229                 mbuf_init->port = rxq->port_id;
 230                 /*
 231                  * prevent compiler reordering:
 232                  * rearm_data covers previous fields.
 233                  */
 234                 rte_compiler_barrier();
 235                 rxq->mbuf_initializer =
 236                         *(uint64_t *)&mbuf_init->rearm_data;
 237                 /* Padding with a fake mbuf for vectorized Rx. */
 238                 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
 239                         (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
 240         }
 241         DRV_LOG(DEBUG,
 242                 "port %u Rx queue %u allocated and configured %u segments"
 243                 " (max %u packets)",
 244                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
 245                 elts_n / (1 << rxq_ctrl->rxq.sges_n));
 246         return 0;
 247 error:
 248         err = rte_errno; /* Save rte_errno before cleanup. */
 249         elts_n = i;
 250         for (i = 0; (i != elts_n); ++i) {
 251                 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
 252                         rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
 253                 (*rxq_ctrl->rxq.elts)[i] = NULL;
 254         }
 255         DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
 256                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
 257         rte_errno = err; /* Restore rte_errno. */
 258         return -rte_errno;
 259 }
 260
 261 /**
 262  * Allocate RX queue elements.
 263  *
 264  * @param rxq_ctrl
 265  *   Pointer to RX queue structure.
 266  *
 267  * @return
 268  *   0 on success, errno value on failure.
 269  */
 270 int
 271 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
 272 {
 273         return mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
 274                rxq_alloc_elts_mprq(rxq_ctrl) : rxq_alloc_elts_sprq(rxq_ctrl);
 275 }
 276
 277 /**
 278  * Free RX queue elements for Multi-Packet RQ.
 279  *
 280  * @param rxq_ctrl
 281  *   Pointer to RX queue structure.
 282  */
 283 static void
 284 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 285 {
 286         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 287         uint16_t i;
 288
 289         DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing WRs",
 290                 rxq->port_id, rxq->idx);
 291         if (rxq->mprq_bufs == NULL)
 292                 return;
 293         assert(mlx5_rxq_check_vec_support(rxq) < 0);
 294         for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
 295                 if ((*rxq->mprq_bufs)[i] != NULL)
 296                         mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
 297                 (*rxq->mprq_bufs)[i] = NULL;
 298         }
 299         if (rxq->mprq_repl != NULL) {
 300                 mlx5_mprq_buf_free(rxq->mprq_repl);
 301                 rxq->mprq_repl = NULL;
 302         }
 303 }
 304
 305 /**
 306  * Free RX queue elements for Single-Packet RQ.
 307  *
 308  * @param rxq_ctrl
 309  *   Pointer to RX queue structure.
 310  */
 311 static void
 312 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 313 {
 314         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 315         const uint16_t q_n = (1 << rxq->elts_n);
 316         const uint16_t q_mask = q_n - 1;
 317         uint16_t used = q_n - (rxq->rq_ci - rxq->rq_pi);
 318         uint16_t i;
 319
 320         DRV_LOG(DEBUG, "port %u Rx queue %u freeing WRs",
 321                 PORT_ID(rxq_ctrl->priv), rxq->idx);
 322         if (rxq->elts == NULL)
 323                 return;
 324         /**
 325          * Some mbuf in the Ring belongs to the application.  They cannot be
 326          * freed.
 327          */
 328         if (mlx5_rxq_check_vec_support(rxq) > 0) {
 329                 for (i = 0; i < used; ++i)
 330                         (*rxq->elts)[(rxq->rq_ci + i) & q_mask] = NULL;
 331                 rxq->rq_pi = rxq->rq_ci;
 332         }
 333         for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
 334                 if ((*rxq->elts)[i] != NULL)
 335                         rte_pktmbuf_free_seg((*rxq->elts)[i]);
 336                 (*rxq->elts)[i] = NULL;
 337         }
 338 }
 339
 340 /**
 341  * Free RX queue elements.
 342  *
 343  * @param rxq_ctrl
 344  *   Pointer to RX queue structure.
 345  */
 346 static void
 347 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
 348 {
 349         if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
 350                 rxq_free_elts_mprq(rxq_ctrl);
 351         else
 352                 rxq_free_elts_sprq(rxq_ctrl);
 353 }
 354
 355 /**
 356  * Returns the per-queue supported offloads.
 357  *
 358  * @param dev
 359  *   Pointer to Ethernet device.
 360  *
 361  * @return
 362  *   Supported Rx offloads.
 363  */
 364 uint64_t
 365 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
 366 {
 367         struct mlx5_priv *priv = dev->data->dev_private;
 368         struct mlx5_dev_config *config = &priv->config;
 369         uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
 370                              DEV_RX_OFFLOAD_TIMESTAMP |
 371                              DEV_RX_OFFLOAD_JUMBO_FRAME);
 372
 373         if (config->hw_fcs_strip)
 374                 offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
 375
 376         if (config->hw_csum)
 377                 offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
 378                              DEV_RX_OFFLOAD_UDP_CKSUM |
 379                              DEV_RX_OFFLOAD_TCP_CKSUM);
 380         if (config->hw_vlan_strip)
 381                 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
 382         return offloads;
 383 }
 384
 385
 386 /**
 387  * Returns the per-port supported offloads.
 388  *
 389  * @return
 390  *   Supported Rx offloads.
 391  */
 392 uint64_t
 393 mlx5_get_rx_port_offloads(void)
 394 {
 395         uint64_t offloads = DEV_RX_OFFLOAD_VLAN_FILTER;
 396
 397         return offloads;
 398 }
 399
 400 /**
 401  * Verify if the queue can be released.
 402  *
 403  * @param dev
 404  *   Pointer to Ethernet device.
 405  * @param idx
 406  *   RX queue index.
 407  *
 408  * @return
 409  *   1 if the queue can be released
 410  *   0 if the queue can not be released, there are references to it.
 411  *   Negative errno and rte_errno is set if queue doesn't exist.
 412  */
 413 static int
 414 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
 415 {
 416         struct mlx5_priv *priv = dev->data->dev_private;
 417         struct mlx5_rxq_ctrl *rxq_ctrl;
 418
 419         if (!(*priv->rxqs)[idx]) {
 420                 rte_errno = EINVAL;
 421                 return -rte_errno;
 422         }
 423         rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
 424         return (rte_atomic32_read(&rxq_ctrl->refcnt) == 1);
 425 }
 426
 427 /**
 428  *
 429  * @param dev
 430  *   Pointer to Ethernet device structure.
 431  * @param idx
 432  *   RX queue index.
 433  * @param desc
 434  *   Number of descriptors to configure in queue.
 435  * @param socket
 436  *   NUMA socket on which memory must be allocated.
 437  * @param[in] conf
 438  *   Thresholds parameters.
 439  * @param mp
 440  *   Memory pool for buffer allocations.
 441  *
 442  * @return
 443  *   0 on success, a negative errno value otherwise and rte_errno is set.
 444  */
 445 int
 446 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 447                     unsigned int socket, const struct rte_eth_rxconf *conf,
 448                     struct rte_mempool *mp)
 449 {
 450         struct mlx5_priv *priv = dev->data->dev_private;
 451         struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
 452         struct mlx5_rxq_ctrl *rxq_ctrl =
 453                 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
 454
 455         if (!rte_is_power_of_2(desc)) {
 456                 desc = 1 << log2above(desc);
 457                 DRV_LOG(WARNING,
 458                         "port %u increased number of descriptors in Rx queue %u"
 459                         " to the next power of two (%d)",
 460                         dev->data->port_id, idx, desc);
 461         }
 462         DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
 463                 dev->data->port_id, idx, desc);
 464         if (idx >= priv->rxqs_n) {
 465                 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
 466                         dev->data->port_id, idx, priv->rxqs_n);
 467                 rte_errno = EOVERFLOW;
 468                 return -rte_errno;
 469         }
 470         if (!mlx5_rxq_releasable(dev, idx)) {
 471                 DRV_LOG(ERR, "port %u unable to release queue index %u",
 472                         dev->data->port_id, idx);
 473                 rte_errno = EBUSY;
 474                 return -rte_errno;
 475         }
 476         mlx5_rxq_release(dev, idx);
 477         rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, mp);
 478         if (!rxq_ctrl) {
 479                 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
 480                         dev->data->port_id, idx);
 481                 rte_errno = ENOMEM;
 482                 return -rte_errno;
 483         }
 484         DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
 485                 dev->data->port_id, idx);
 486         (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
 487         return 0;
 488 }
 489
 490 /**
 491  * DPDK callback to release a RX queue.
 492  *
 493  * @param dpdk_rxq
 494  *   Generic RX queue pointer.
 495  */
 496 void
 497 mlx5_rx_queue_release(void *dpdk_rxq)
 498 {
 499         struct mlx5_rxq_data *rxq = (struct mlx5_rxq_data *)dpdk_rxq;
 500         struct mlx5_rxq_ctrl *rxq_ctrl;
 501         struct mlx5_priv *priv;
 502
 503         if (rxq == NULL)
 504                 return;
 505         rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);
 506         priv = rxq_ctrl->priv;
 507         if (!mlx5_rxq_releasable(ETH_DEV(priv), rxq_ctrl->rxq.idx))
 508                 rte_panic("port %u Rx queue %u is still used by a flow and"
 509                           " cannot be removed\n",
 510                           PORT_ID(priv), rxq->idx);
 511         mlx5_rxq_release(ETH_DEV(priv), rxq_ctrl->rxq.idx);
 512 }
 513
 514 /**
 515  * Get an Rx queue Verbs object.
 516  *
 517  * @param dev
 518  *   Pointer to Ethernet device.
 519  * @param idx
 520  *   Queue index in DPDK Rx queue array
 521  *
 522  * @return
 523  *   The Verbs object if it exists.
 524  */
 525 static struct mlx5_rxq_ibv *
 526 mlx5_rxq_ibv_get(struct rte_eth_dev *dev, uint16_t idx)
 527 {
 528         struct mlx5_priv *priv = dev->data->dev_private;
 529         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
 530         struct mlx5_rxq_ctrl *rxq_ctrl;
 531
 532         if (idx >= priv->rxqs_n)
 533                 return NULL;
 534         if (!rxq_data)
 535                 return NULL;
 536         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 537         if (rxq_ctrl->ibv)
 538                 rte_atomic32_inc(&rxq_ctrl->ibv->refcnt);
 539         return rxq_ctrl->ibv;
 540 }
 541
 542 /**
 543  * Release an Rx verbs queue object.
 544  *
 545  * @param rxq_ibv
 546  *   Verbs Rx queue object.
 547  *
 548  * @return
 549  *   1 while a reference on it exists, 0 when freed.
 550  */
 551 static int
 552 mlx5_rxq_ibv_release(struct mlx5_rxq_ibv *rxq_ibv)
 553 {
 554         assert(rxq_ibv);
 555         assert(rxq_ibv->wq);
 556         assert(rxq_ibv->cq);
 557         if (rte_atomic32_dec_and_test(&rxq_ibv->refcnt)) {
 558                 rxq_free_elts(rxq_ibv->rxq_ctrl);
 559                 claim_zero(mlx5_glue->destroy_wq(rxq_ibv->wq));
 560                 claim_zero(mlx5_glue->destroy_cq(rxq_ibv->cq));
 561                 if (rxq_ibv->channel)
 562                         claim_zero(mlx5_glue->destroy_comp_channel
 563                                    (rxq_ibv->channel));
 564                 LIST_REMOVE(rxq_ibv, next);
 565                 rte_free(rxq_ibv);
 566                 return 0;
 567         }
 568         return 1;
 569 }
 570
 571 /**
 572  * Allocate queue vector and fill epoll fd list for Rx interrupts.
 573  *
 574  * @param dev
 575  *   Pointer to Ethernet device.
 576  *
 577  * @return
 578  *   0 on success, a negative errno value otherwise and rte_errno is set.
 579  */
 580 int
 581 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
 582 {
 583         struct mlx5_priv *priv = dev->data->dev_private;
 584         unsigned int i;
 585         unsigned int rxqs_n = priv->rxqs_n;
 586         unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
 587         unsigned int count = 0;
 588         struct rte_intr_handle *intr_handle = dev->intr_handle;
 589
 590         if (!dev->data->dev_conf.intr_conf.rxq)
 591                 return 0;
 592         mlx5_rx_intr_vec_disable(dev);
 593         intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
 594         if (intr_handle->intr_vec == NULL) {
 595                 DRV_LOG(ERR,
 596                         "port %u failed to allocate memory for interrupt"
 597                         " vector, Rx interrupts will not be supported",
 598                         dev->data->port_id);
 599                 rte_errno = ENOMEM;
 600                 return -rte_errno;
 601         }
 602         intr_handle->type = RTE_INTR_HANDLE_EXT;
 603         for (i = 0; i != n; ++i) {
 604                 /* This rxq ibv must not be released in this function. */
 605                 struct mlx5_rxq_ibv *rxq_ibv = mlx5_rxq_ibv_get(dev, i);
 606                 int fd;
 607                 int flags;
 608                 int rc;
 609
 610                 /* Skip queues that cannot request interrupts. */
 611                 if (!rxq_ibv || !rxq_ibv->channel) {
 612                         /* Use invalid intr_vec[] index to disable entry. */
 613                         intr_handle->intr_vec[i] =
 614                                 RTE_INTR_VEC_RXTX_OFFSET +
 615                                 RTE_MAX_RXTX_INTR_VEC_ID;
 616                         continue;
 617                 }
 618                 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
 619                         DRV_LOG(ERR,
 620                                 "port %u too many Rx queues for interrupt"
 621                                 " vector size (%d), Rx interrupts cannot be"
 622                                 " enabled",
 623                                 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
 624                         mlx5_rx_intr_vec_disable(dev);
 625                         rte_errno = ENOMEM;
 626                         return -rte_errno;
 627                 }
 628                 fd = rxq_ibv->channel->fd;
 629                 flags = fcntl(fd, F_GETFL);
 630                 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 631                 if (rc < 0) {
 632                         rte_errno = errno;
 633                         DRV_LOG(ERR,
 634                                 "port %u failed to make Rx interrupt file"
 635                                 " descriptor %d non-blocking for queue index"
 636                                 " %d",
 637                                 dev->data->port_id, fd, i);
 638                         mlx5_rx_intr_vec_disable(dev);
 639                         return -rte_errno;
 640                 }
 641                 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
 642                 intr_handle->efds[count] = fd;
 643                 count++;
 644         }
 645         if (!count)
 646                 mlx5_rx_intr_vec_disable(dev);
 647         else
 648                 intr_handle->nb_efd = count;
 649         return 0;
 650 }
 651
 652 /**
 653  * Clean up Rx interrupts handler.
 654  *
 655  * @param dev
 656  *   Pointer to Ethernet device.
 657  */
 658 void
 659 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
 660 {
 661         struct mlx5_priv *priv = dev->data->dev_private;
 662         struct rte_intr_handle *intr_handle = dev->intr_handle;
 663         unsigned int i;
 664         unsigned int rxqs_n = priv->rxqs_n;
 665         unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
 666
 667         if (!dev->data->dev_conf.intr_conf.rxq)
 668                 return;
 669         if (!intr_handle->intr_vec)
 670                 goto free;
 671         for (i = 0; i != n; ++i) {
 672                 struct mlx5_rxq_ctrl *rxq_ctrl;
 673                 struct mlx5_rxq_data *rxq_data;
 674
 675                 if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
 676                     RTE_MAX_RXTX_INTR_VEC_ID)
 677                         continue;
 678                 /**
 679                  * Need to access directly the queue to release the reference
 680                  * kept in mlx5_rx_intr_vec_enable().
 681                  */
 682                 rxq_data = (*priv->rxqs)[i];
 683                 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 684                 if (rxq_ctrl->ibv)
 685                         mlx5_rxq_ibv_release(rxq_ctrl->ibv);
 686         }
 687 free:
 688         rte_intr_free_epoll_fd(intr_handle);
 689         if (intr_handle->intr_vec)
 690                 free(intr_handle->intr_vec);
 691         intr_handle->nb_efd = 0;
 692         intr_handle->intr_vec = NULL;
 693 }
 694
 695 /**
 696  *  MLX5 CQ notification .
 697  *
 698  *  @param rxq
 699  *     Pointer to receive queue structure.
 700  *  @param sq_n_rxq
 701  *     Sequence number per receive queue .
 702  */
 703 static inline void
 704 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
 705 {
 706         int sq_n = 0;
 707         uint32_t doorbell_hi;
 708         uint64_t doorbell;
 709         void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
 710
 711         sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
 712         doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
 713         doorbell = (uint64_t)doorbell_hi << 32;
 714         doorbell |=  rxq->cqn;
 715         rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
 716         mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
 717                          cq_db_reg, rxq->uar_lock_cq);
 718 }
 719
 720 /**
 721  * DPDK callback for Rx queue interrupt enable.
 722  *
 723  * @param dev
 724  *   Pointer to Ethernet device structure.
 725  * @param rx_queue_id
 726  *   Rx queue number.
 727  *
 728  * @return
 729  *   0 on success, a negative errno value otherwise and rte_errno is set.
 730  */
 731 int
 732 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 733 {
 734         struct mlx5_priv *priv = dev->data->dev_private;
 735         struct mlx5_rxq_data *rxq_data;
 736         struct mlx5_rxq_ctrl *rxq_ctrl;
 737
 738         rxq_data = (*priv->rxqs)[rx_queue_id];
 739         if (!rxq_data) {
 740                 rte_errno = EINVAL;
 741                 return -rte_errno;
 742         }
 743         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 744         if (rxq_ctrl->irq) {
 745                 struct mlx5_rxq_ibv *rxq_ibv;
 746
 747                 rxq_ibv = mlx5_rxq_ibv_get(dev, rx_queue_id);
 748                 if (!rxq_ibv) {
 749                         rte_errno = EINVAL;
 750                         return -rte_errno;
 751                 }
 752                 mlx5_arm_cq(rxq_data, rxq_data->cq_arm_sn);
 753                 mlx5_rxq_ibv_release(rxq_ibv);
 754         }
 755         return 0;
 756 }
 757
 758 /**
 759  * DPDK callback for Rx queue interrupt disable.
 760  *
 761  * @param dev
 762  *   Pointer to Ethernet device structure.
 763  * @param rx_queue_id
 764  *   Rx queue number.
 765  *
 766  * @return
 767  *   0 on success, a negative errno value otherwise and rte_errno is set.
 768  */
 769 int
 770 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 771 {
 772         struct mlx5_priv *priv = dev->data->dev_private;
 773         struct mlx5_rxq_data *rxq_data;
 774         struct mlx5_rxq_ctrl *rxq_ctrl;
 775         struct mlx5_rxq_ibv *rxq_ibv = NULL;
 776         struct ibv_cq *ev_cq;
 777         void *ev_ctx;
 778         int ret;
 779
 780         rxq_data = (*priv->rxqs)[rx_queue_id];
 781         if (!rxq_data) {
 782                 rte_errno = EINVAL;
 783                 return -rte_errno;
 784         }
 785         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 786         if (!rxq_ctrl->irq)
 787                 return 0;
 788         rxq_ibv = mlx5_rxq_ibv_get(dev, rx_queue_id);
 789         if (!rxq_ibv) {
 790                 rte_errno = EINVAL;
 791                 return -rte_errno;
 792         }
 793         ret = mlx5_glue->get_cq_event(rxq_ibv->channel, &ev_cq, &ev_ctx);
 794         if (ret || ev_cq != rxq_ibv->cq) {
 795                 rte_errno = EINVAL;
 796                 goto exit;
 797         }
 798         rxq_data->cq_arm_sn++;
 799         mlx5_glue->ack_cq_events(rxq_ibv->cq, 1);
 800         mlx5_rxq_ibv_release(rxq_ibv);
 801         return 0;
 802 exit:
 803         ret = rte_errno; /* Save rte_errno before cleanup. */
 804         if (rxq_ibv)
 805                 mlx5_rxq_ibv_release(rxq_ibv);
 806         DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
 807                 dev->data->port_id, rx_queue_id);
 808         rte_errno = ret; /* Restore rte_errno. */
 809         return -rte_errno;
 810 }
 811
 812 /**
 813  * Create the Rx queue Verbs object.
 814  *
 815  * @param dev
 816  *   Pointer to Ethernet device.
 817  * @param idx
 818  *   Queue index in DPDK Rx queue array
 819  *
 820  * @return
 821  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
 822  */
 823 struct mlx5_rxq_ibv *
 824 mlx5_rxq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
 825 {
 826         struct mlx5_priv *priv = dev->data->dev_private;
 827         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
 828         struct mlx5_rxq_ctrl *rxq_ctrl =
 829                 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 830         struct ibv_wq_attr mod;
 831         union {
 832                 struct {
 833                         struct ibv_cq_init_attr_ex ibv;
 834                         struct mlx5dv_cq_init_attr mlx5;
 835                 } cq;
 836                 struct {
 837                         struct ibv_wq_init_attr ibv;
 838 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 839                         struct mlx5dv_wq_init_attr mlx5;
 840 #endif
 841                 } wq;
 842         } attr;
 843         unsigned int cqe_n;
 844         unsigned int wqe_n = 1 << rxq_data->elts_n;
 845         struct mlx5_rxq_ibv *tmpl = NULL;
 846         struct mlx5dv_cq cq_info;
 847         struct mlx5dv_rwq rwq;
 848         int ret = 0;
 849         struct mlx5dv_obj obj;
 850         struct mlx5_dev_config *config = &priv->config;
 851         const int mprq_en = mlx5_rxq_mprq_enabled(rxq_data);
 852
 853         assert(rxq_data);
 854         assert(!rxq_ctrl->ibv);
 855         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_RX_QUEUE;
 856         priv->verbs_alloc_ctx.obj = rxq_ctrl;
 857         tmpl = rte_calloc_socket(__func__, 1, sizeof(*tmpl), 0,
 858                                  rxq_ctrl->socket);
 859         if (!tmpl) {
 860                 DRV_LOG(ERR,
 861                         "port %u Rx queue %u cannot allocate verbs resources",
 862                         dev->data->port_id, rxq_data->idx);
 863                 rte_errno = ENOMEM;
 864                 goto error;
 865         }
 866         tmpl->rxq_ctrl = rxq_ctrl;
 867         if (rxq_ctrl->irq) {
 868                 tmpl->channel = mlx5_glue->create_comp_channel(priv->sh->ctx);
 869                 if (!tmpl->channel) {
 870                         DRV_LOG(ERR, "port %u: comp channel creation failure",
 871                                 dev->data->port_id);
 872                         rte_errno = ENOMEM;
 873                         goto error;
 874                 }
 875         }
 876         if (mprq_en)
 877                 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
 878         else
 879                 cqe_n = wqe_n  - 1;
 880         attr.cq.ibv = (struct ibv_cq_init_attr_ex){
 881                 .cqe = cqe_n,
 882                 .channel = tmpl->channel,
 883                 .comp_mask = 0,
 884         };
 885         attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
 886                 .comp_mask = 0,
 887         };
 888         if (config->cqe_comp && !rxq_data->hw_timestamp) {
 889                 attr.cq.mlx5.comp_mask |=
 890                         MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
 891 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 892                 attr.cq.mlx5.cqe_comp_res_format =
 893                         mprq_en ? MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX :
 894                                   MLX5DV_CQE_RES_FORMAT_HASH;
 895 #else
 896                 attr.cq.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
 897 #endif
 898                 /*
 899                  * For vectorized Rx, it must not be doubled in order to
 900                  * make cq_ci and rq_ci aligned.
 901                  */
 902                 if (mlx5_rxq_check_vec_support(rxq_data) < 0)
 903                         attr.cq.ibv.cqe *= 2;
 904         } else if (config->cqe_comp && rxq_data->hw_timestamp) {
 905                 DRV_LOG(DEBUG,
 906                         "port %u Rx CQE compression is disabled for HW"
 907                         " timestamp",
 908                         dev->data->port_id);
 909         }
 910 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 911         if (config->cqe_pad) {
 912                 attr.cq.mlx5.comp_mask |= MLX5DV_CQ_INIT_ATTR_MASK_FLAGS;
 913                 attr.cq.mlx5.flags |= MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD;
 914         }
 915 #endif
 916         tmpl->cq = mlx5_glue->cq_ex_to_cq
 917                 (mlx5_glue->dv_create_cq(priv->sh->ctx, &attr.cq.ibv,
 918                                          &attr.cq.mlx5));
 919         if (tmpl->cq == NULL) {
 920                 DRV_LOG(ERR, "port %u Rx queue %u CQ creation failure",
 921                         dev->data->port_id, idx);
 922                 rte_errno = ENOMEM;
 923                 goto error;
 924         }
 925         DRV_LOG(DEBUG, "port %u device_attr.max_qp_wr is %d",
 926                 dev->data->port_id, priv->sh->device_attr.orig_attr.max_qp_wr);
 927         DRV_LOG(DEBUG, "port %u device_attr.max_sge is %d",
 928                 dev->data->port_id, priv->sh->device_attr.orig_attr.max_sge);
 929         attr.wq.ibv = (struct ibv_wq_init_attr){
 930                 .wq_context = NULL, /* Could be useful in the future. */
 931                 .wq_type = IBV_WQT_RQ,
 932                 /* Max number of outstanding WRs. */
 933                 .max_wr = wqe_n >> rxq_data->sges_n,
 934                 /* Max number of scatter/gather elements in a WR. */
 935                 .max_sge = 1 << rxq_data->sges_n,
 936                 .pd = priv->sh->pd,
 937                 .cq = tmpl->cq,
 938                 .comp_mask =
 939                         IBV_WQ_FLAGS_CVLAN_STRIPPING |
 940                         0,
 941                 .create_flags = (rxq_data->vlan_strip ?
 942                                  IBV_WQ_FLAGS_CVLAN_STRIPPING :
 943                                  0),
 944         };
 945         /* By default, FCS (CRC) is stripped by hardware. */
 946         if (rxq_data->crc_present) {
 947                 attr.wq.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;
 948                 attr.wq.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 949         }
 950         if (config->hw_padding) {
 951 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
 952                 attr.wq.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;
 953                 attr.wq.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 954 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
 955                 attr.wq.ibv.create_flags |= IBV_WQ_FLAGS_PCI_WRITE_END_PADDING;
 956                 attr.wq.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 957 #endif
 958         }
 959 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 960         attr.wq.mlx5 = (struct mlx5dv_wq_init_attr){
 961                 .comp_mask = 0,
 962         };
 963         if (mprq_en) {
 964                 struct mlx5dv_striding_rq_init_attr *mprq_attr =
 965                         &attr.wq.mlx5.striding_rq_attrs;
 966
 967                 attr.wq.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;
 968                 *mprq_attr = (struct mlx5dv_striding_rq_init_attr){
 969                         .single_stride_log_num_of_bytes = rxq_data->strd_sz_n,
 970                         .single_wqe_log_num_of_strides = rxq_data->strd_num_n,
 971                         .two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,
 972                 };
 973         }
 974         tmpl->wq = mlx5_glue->dv_create_wq(priv->sh->ctx, &attr.wq.ibv,
 975                                            &attr.wq.mlx5);
 976 #else
 977         tmpl->wq = mlx5_glue->create_wq(priv->sh->ctx, &attr.wq.ibv);
 978 #endif
 979         if (tmpl->wq == NULL) {
 980                 DRV_LOG(ERR, "port %u Rx queue %u WQ creation failure",
 981                         dev->data->port_id, idx);
 982                 rte_errno = ENOMEM;
 983                 goto error;
 984         }
 985         /*
 986          * Make sure number of WRs*SGEs match expectations since a queue
 987          * cannot allocate more than "desc" buffers.
 988          */
 989         if (attr.wq.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||
 990             attr.wq.ibv.max_sge != (1u << rxq_data->sges_n)) {
 991                 DRV_LOG(ERR,
 992                         "port %u Rx queue %u requested %u*%u but got %u*%u"
 993                         " WRs*SGEs",
 994                         dev->data->port_id, idx,
 995                         wqe_n >> rxq_data->sges_n, (1 << rxq_data->sges_n),
 996                         attr.wq.ibv.max_wr, attr.wq.ibv.max_sge);
 997                 rte_errno = EINVAL;
 998                 goto error;
 999         }
1000         /* Change queue state to ready. */
1001         mod = (struct ibv_wq_attr){
1002                 .attr_mask = IBV_WQ_ATTR_STATE,
1003                 .wq_state = IBV_WQS_RDY,
1004         };
1005         ret = mlx5_glue->modify_wq(tmpl->wq, &mod);
1006         if (ret) {
1007                 DRV_LOG(ERR,
1008                         "port %u Rx queue %u WQ state to IBV_WQS_RDY failed",
1009                         dev->data->port_id, idx);
1010                 rte_errno = ret;
1011                 goto error;
1012         }
1013         obj.cq.in = tmpl->cq;
1014         obj.cq.out = &cq_info;
1015         obj.rwq.in = tmpl->wq;
1016         obj.rwq.out = &rwq;
1017         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_CQ | MLX5DV_OBJ_RWQ);
1018         if (ret) {
1019                 rte_errno = ret;
1020                 goto error;
1021         }
1022         if (cq_info.cqe_size != RTE_CACHE_LINE_SIZE) {
1023                 DRV_LOG(ERR,
1024                         "port %u wrong MLX5_CQE_SIZE environment variable"
1025                         " value: it should be set to %u",
1026                         dev->data->port_id, RTE_CACHE_LINE_SIZE);
1027                 rte_errno = EINVAL;
1028                 goto error;
1029         }
1030         /* Fill the rings. */
1031         rxq_data->wqes = rwq.buf;
1032         rxq_data->rq_db = rwq.dbrec;
1033         rxq_data->cqe_n = log2above(cq_info.cqe_cnt);
1034         rxq_data->cq_db = cq_info.dbrec;
1035         rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)cq_info.buf;
1036         rxq_data->cq_uar = cq_info.cq_uar;
1037         rxq_data->cqn = cq_info.cqn;
1038         rxq_data->cq_arm_sn = 0;
1039         mlx5_rxq_initialize(rxq_data);
1040         rxq_data->cq_ci = 0;
1041         DRV_LOG(DEBUG, "port %u rxq %u updated with %p", dev->data->port_id,
1042                 idx, (void *)&tmpl);
1043         rte_atomic32_inc(&tmpl->refcnt);
1044         LIST_INSERT_HEAD(&priv->rxqsibv, tmpl, next);
1045         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1046         return tmpl;
1047 error:
1048         if (tmpl) {
1049                 ret = rte_errno; /* Save rte_errno before cleanup. */
1050                 if (tmpl->wq)
1051                         claim_zero(mlx5_glue->destroy_wq(tmpl->wq));
1052                 if (tmpl->cq)
1053                         claim_zero(mlx5_glue->destroy_cq(tmpl->cq));
1054                 if (tmpl->channel)
1055                         claim_zero(mlx5_glue->destroy_comp_channel
1056                                                         (tmpl->channel));
1057                 rte_free(tmpl);
1058                 rte_errno = ret; /* Restore rte_errno. */
1059         }
1060         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1061         return NULL;
1062 }
1063
1064 /**
1065  * Verify the Verbs Rx queue list is empty
1066  *
1067  * @param dev
1068  *   Pointer to Ethernet device.
1069  *
1070  * @return
1071  *   The number of object not released.
1072  */
1073 int
1074 mlx5_rxq_ibv_verify(struct rte_eth_dev *dev)
1075 {
1076         struct mlx5_priv *priv = dev->data->dev_private;
1077         int ret = 0;
1078         struct mlx5_rxq_ibv *rxq_ibv;
1079
1080         LIST_FOREACH(rxq_ibv, &priv->rxqsibv, next) {
1081                 DRV_LOG(DEBUG, "port %u Verbs Rx queue %u still referenced",
1082                         dev->data->port_id, rxq_ibv->rxq_ctrl->rxq.idx);
1083                 ++ret;
1084         }
1085         return ret;
1086 }
1087
1088 /**
1089  * Callback function to initialize mbufs for Multi-Packet RQ.
1090  */
1091 static inline void
1092 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg __rte_unused,
1093                     void *_m, unsigned int i __rte_unused)
1094 {
1095         struct mlx5_mprq_buf *buf = _m;
1096
1097         memset(_m, 0, sizeof(*buf));
1098         buf->mp = mp;
1099         rte_atomic16_set(&buf->refcnt, 1);
1100 }
1101
1102 /**
1103  * Free mempool of Multi-Packet RQ.
1104  *
1105  * @param dev
1106  *   Pointer to Ethernet device.
1107  *
1108  * @return
1109  *   0 on success, negative errno value on failure.
1110  */
1111 int
1112 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1113 {
1114         struct mlx5_priv *priv = dev->data->dev_private;
1115         struct rte_mempool *mp = priv->mprq_mp;
1116         unsigned int i;
1117
1118         if (mp == NULL)
1119                 return 0;
1120         DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1121                 dev->data->port_id, mp->name);
1122         /*
1123          * If a buffer in the pool has been externally attached to a mbuf and it
1124          * is still in use by application, destroying the Rx queue can spoil
1125          * the packet. It is unlikely to happen but if application dynamically
1126          * creates and destroys with holding Rx packets, this can happen.
1127          *
1128          * TODO: It is unavoidable for now because the mempool for Multi-Packet
1129          * RQ isn't provided by application but managed by PMD.
1130          */
1131         if (!rte_mempool_full(mp)) {
1132                 DRV_LOG(ERR,
1133                         "port %u mempool for Multi-Packet RQ is still in use",
1134                         dev->data->port_id);
1135                 rte_errno = EBUSY;
1136                 return -rte_errno;
1137         }
1138         rte_mempool_free(mp);
1139         /* Unset mempool for each Rx queue. */
1140         for (i = 0; i != priv->rxqs_n; ++i) {
1141                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1142
1143                 if (rxq == NULL)
1144                         continue;
1145                 rxq->mprq_mp = NULL;
1146         }
1147         priv->mprq_mp = NULL;
1148         return 0;
1149 }
1150
1151 /**
1152  * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1153  * mempool. If already allocated, reuse it if there're enough elements.
1154  * Otherwise, resize it.
1155  *
1156  * @param dev
1157  *   Pointer to Ethernet device.
1158  *
1159  * @return
1160  *   0 on success, negative errno value on failure.
1161  */
1162 int
1163 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1164 {
1165         struct mlx5_priv *priv = dev->data->dev_private;
1166         struct rte_mempool *mp = priv->mprq_mp;
1167         char name[RTE_MEMPOOL_NAMESIZE];
1168         unsigned int desc = 0;
1169         unsigned int buf_len;
1170         unsigned int obj_num;
1171         unsigned int obj_size;
1172         unsigned int strd_num_n = 0;
1173         unsigned int strd_sz_n = 0;
1174         unsigned int i;
1175
1176         if (!mlx5_mprq_enabled(dev))
1177                 return 0;
1178         /* Count the total number of descriptors configured. */
1179         for (i = 0; i != priv->rxqs_n; ++i) {
1180                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1181
1182                 if (rxq == NULL)
1183                         continue;
1184                 desc += 1 << rxq->elts_n;
1185                 /* Get the max number of strides. */
1186                 if (strd_num_n < rxq->strd_num_n)
1187                         strd_num_n = rxq->strd_num_n;
1188                 /* Get the max size of a stride. */
1189                 if (strd_sz_n < rxq->strd_sz_n)
1190                         strd_sz_n = rxq->strd_sz_n;
1191         }
1192         assert(strd_num_n && strd_sz_n);
1193         buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1194         obj_size = buf_len + sizeof(struct mlx5_mprq_buf);
1195         /*
1196          * Received packets can be either memcpy'd or externally referenced. In
1197          * case that the packet is attached to an mbuf as an external buffer, as
1198          * it isn't possible to predict how the buffers will be queued by
1199          * application, there's no option to exactly pre-allocate needed buffers
1200          * in advance but to speculatively prepares enough buffers.
1201          *
1202          * In the data path, if this Mempool is depleted, PMD will try to memcpy
1203          * received packets to buffers provided by application (rxq->mp) until
1204          * this Mempool gets available again.
1205          */
1206         desc *= 4;
1207         obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * priv->rxqs_n;
1208         /*
1209          * rte_mempool_create_empty() has sanity check to refuse large cache
1210          * size compared to the number of elements.
1211          * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1212          * constant number 2 instead.
1213          */
1214         obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1215         /* Check a mempool is already allocated and if it can be resued. */
1216         if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1217                 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1218                         dev->data->port_id, mp->name);
1219                 /* Reuse. */
1220                 goto exit;
1221         } else if (mp != NULL) {
1222                 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1223                         dev->data->port_id, mp->name);
1224                 /*
1225                  * If failed to free, which means it may be still in use, no way
1226                  * but to keep using the existing one. On buffer underrun,
1227                  * packets will be memcpy'd instead of external buffer
1228                  * attachment.
1229                  */
1230                 if (mlx5_mprq_free_mp(dev)) {
1231                         if (mp->elt_size >= obj_size)
1232                                 goto exit;
1233                         else
1234                                 return -rte_errno;
1235                 }
1236         }
1237         snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1238         mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1239                                 0, NULL, NULL, mlx5_mprq_buf_init, NULL,
1240                                 dev->device->numa_node, 0);
1241         if (mp == NULL) {
1242                 DRV_LOG(ERR,
1243                         "port %u failed to allocate a mempool for"
1244                         " Multi-Packet RQ, count=%u, size=%u",
1245                         dev->data->port_id, obj_num, obj_size);
1246                 rte_errno = ENOMEM;
1247                 return -rte_errno;
1248         }
1249         priv->mprq_mp = mp;
1250 exit:
1251         /* Set mempool for each Rx queue. */
1252         for (i = 0; i != priv->rxqs_n; ++i) {
1253                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1254
1255                 if (rxq == NULL)
1256                         continue;
1257                 rxq->mprq_mp = mp;
1258         }
1259         DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1260                 dev->data->port_id);
1261         return 0;
1262 }
1263
1264 /**
1265  * Create a DPDK Rx queue.
1266  *
1267  * @param dev
1268  *   Pointer to Ethernet device.
1269  * @param idx
1270  *   RX queue index.
1271  * @param desc
1272  *   Number of descriptors to configure in queue.
1273  * @param socket
1274  *   NUMA socket on which memory must be allocated.
1275  *
1276  * @return
1277  *   A DPDK queue object on success, NULL otherwise and rte_errno is set.
1278  */
1279 struct mlx5_rxq_ctrl *
1280 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1281              unsigned int socket, const struct rte_eth_rxconf *conf,
1282              struct rte_mempool *mp)
1283 {
1284         struct mlx5_priv *priv = dev->data->dev_private;
1285         struct mlx5_rxq_ctrl *tmpl;
1286         unsigned int mb_len = rte_pktmbuf_data_room_size(mp);
1287         unsigned int mprq_stride_size;
1288         struct mlx5_dev_config *config = &priv->config;
1289         /*
1290          * Always allocate extra slots, even if eventually
1291          * the vector Rx will not be used.
1292          */
1293         uint16_t desc_n =
1294                 desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1295         uint64_t offloads = conf->offloads |
1296                            dev->data->dev_conf.rxmode.offloads;
1297         const int mprq_en = mlx5_check_mprq_support(dev) > 0;
1298
1299         tmpl = rte_calloc_socket("RXQ", 1,
1300                                  sizeof(*tmpl) +
1301                                  desc_n * sizeof(struct rte_mbuf *),
1302                                  0, socket);
1303         if (!tmpl) {
1304                 rte_errno = ENOMEM;
1305                 return NULL;
1306         }
1307         if (mlx5_mr_btree_init(&tmpl->rxq.mr_ctrl.cache_bh,
1308                                MLX5_MR_BTREE_CACHE_N, socket)) {
1309                 /* rte_errno is already set. */
1310                 goto error;
1311         }
1312         tmpl->socket = socket;
1313         if (dev->data->dev_conf.intr_conf.rxq)
1314                 tmpl->irq = 1;
1315         /*
1316          * This Rx queue can be configured as a Multi-Packet RQ if all of the
1317          * following conditions are met:
1318          *  - MPRQ is enabled.
1319          *  - The number of descs is more than the number of strides.
1320          *  - max_rx_pkt_len plus overhead is less than the max size of a
1321          *    stride.
1322          *  Otherwise, enable Rx scatter if necessary.
1323          */
1324         assert(mb_len >= RTE_PKTMBUF_HEADROOM);
1325         mprq_stride_size =
1326                 dev->data->dev_conf.rxmode.max_rx_pkt_len +
1327                 sizeof(struct rte_mbuf_ext_shared_info) +
1328                 RTE_PKTMBUF_HEADROOM;
1329         if (mprq_en &&
1330             desc > (1U << config->mprq.stride_num_n) &&
1331             mprq_stride_size <= (1U << config->mprq.max_stride_size_n)) {
1332                 /* TODO: Rx scatter isn't supported yet. */
1333                 tmpl->rxq.sges_n = 0;
1334                 /* Trim the number of descs needed. */
1335                 desc >>= config->mprq.stride_num_n;
1336                 tmpl->rxq.strd_num_n = config->mprq.stride_num_n;
1337                 tmpl->rxq.strd_sz_n = RTE_MAX(log2above(mprq_stride_size),
1338                                               config->mprq.min_stride_size_n);
1339                 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1340                 tmpl->rxq.mprq_max_memcpy_len =
1341                         RTE_MIN(mb_len - RTE_PKTMBUF_HEADROOM,
1342                                 config->mprq.max_memcpy_len);
1343                 DRV_LOG(DEBUG,
1344                         "port %u Rx queue %u: Multi-Packet RQ is enabled"
1345                         " strd_num_n = %u, strd_sz_n = %u",
1346                         dev->data->port_id, idx,
1347                         tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1348         } else if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
1349                    (mb_len - RTE_PKTMBUF_HEADROOM)) {
1350                 tmpl->rxq.sges_n = 0;
1351         } else if (offloads & DEV_RX_OFFLOAD_SCATTER) {
1352                 unsigned int size =
1353                         RTE_PKTMBUF_HEADROOM +
1354                         dev->data->dev_conf.rxmode.max_rx_pkt_len;
1355                 unsigned int sges_n;
1356
1357                 /*
1358                  * Determine the number of SGEs needed for a full packet
1359                  * and round it to the next power of two.
1360                  */
1361                 sges_n = log2above((size / mb_len) + !!(size % mb_len));
1362                 tmpl->rxq.sges_n = sges_n;
1363                 /* Make sure rxq.sges_n did not overflow. */
1364                 size = mb_len * (1 << tmpl->rxq.sges_n);
1365                 size -= RTE_PKTMBUF_HEADROOM;
1366                 if (size < dev->data->dev_conf.rxmode.max_rx_pkt_len) {
1367                         DRV_LOG(ERR,
1368                                 "port %u too many SGEs (%u) needed to handle"
1369                                 " requested maximum packet size %u",
1370                                 dev->data->port_id,
1371                                 1 << sges_n,
1372                                 dev->data->dev_conf.rxmode.max_rx_pkt_len);
1373                         rte_errno = EOVERFLOW;
1374                         goto error;
1375                 }
1376         } else {
1377                 DRV_LOG(WARNING,
1378                         "port %u the requested maximum Rx packet size (%u) is"
1379                         " larger than a single mbuf (%u) and scattered mode has"
1380                         " not been requested",
1381                         dev->data->port_id,
1382                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
1383                         mb_len - RTE_PKTMBUF_HEADROOM);
1384         }
1385         if (mprq_en && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1386                 DRV_LOG(WARNING,
1387                         "port %u MPRQ is requested but cannot be enabled"
1388                         " (requested: desc = %u, stride_sz = %u,"
1389                         " supported: min_stride_num = %u, max_stride_sz = %u).",
1390                         dev->data->port_id, desc, mprq_stride_size,
1391                         (1 << config->mprq.stride_num_n),
1392                         (1 << config->mprq.max_stride_size_n));
1393         DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1394                 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1395         if (desc % (1 << tmpl->rxq.sges_n)) {
1396                 DRV_LOG(ERR,
1397                         "port %u number of Rx queue descriptors (%u) is not a"
1398                         " multiple of SGEs per packet (%u)",
1399                         dev->data->port_id,
1400                         desc,
1401                         1 << tmpl->rxq.sges_n);
1402                 rte_errno = EINVAL;
1403                 goto error;
1404         }
1405         /* Toggle RX checksum offload if hardware supports it. */
1406         tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);
1407         tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);
1408         /* Configure VLAN stripping. */
1409         tmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
1410         /* By default, FCS (CRC) is stripped by hardware. */
1411         tmpl->rxq.crc_present = 0;
1412         if (offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
1413                 if (config->hw_fcs_strip) {
1414                         tmpl->rxq.crc_present = 1;
1415                 } else {
1416                         DRV_LOG(WARNING,
1417                                 "port %u CRC stripping has been disabled but will"
1418                                 " still be performed by hardware, make sure MLNX_OFED"
1419                                 " and firmware are up to date",
1420                                 dev->data->port_id);
1421                 }
1422         }
1423         DRV_LOG(DEBUG,
1424                 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1425                 " incoming frames to hide it",
1426                 dev->data->port_id,
1427                 tmpl->rxq.crc_present ? "disabled" : "enabled",
1428                 tmpl->rxq.crc_present << 2);
1429         /* Save port ID. */
1430         tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1431                 (!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
1432         tmpl->rxq.port_id = dev->data->port_id;
1433         tmpl->priv = priv;
1434         tmpl->rxq.mp = mp;
1435         tmpl->rxq.elts_n = log2above(desc);
1436         tmpl->rxq.rq_repl_thresh =
1437                 MLX5_VPMD_RXQ_RPLNSH_THRESH(1 << tmpl->rxq.elts_n);
1438         tmpl->rxq.elts =
1439                 (struct rte_mbuf *(*)[1 << tmpl->rxq.elts_n])(tmpl + 1);
1440 #ifndef RTE_ARCH_64
1441         tmpl->rxq.uar_lock_cq = &priv->uar_lock_cq;
1442 #endif
1443         tmpl->rxq.idx = idx;
1444         rte_atomic32_inc(&tmpl->refcnt);
1445         LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1446         return tmpl;
1447 error:
1448         rte_free(tmpl);
1449         return NULL;
1450 }
1451
1452 /**
1453  * Get a Rx queue.
1454  *
1455  * @param dev
1456  *   Pointer to Ethernet device.
1457  * @param idx
1458  *   RX queue index.
1459  *
1460  * @return
1461  *   A pointer to the queue if it exists, NULL otherwise.
1462  */
1463 struct mlx5_rxq_ctrl *
1464 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1465 {
1466         struct mlx5_priv *priv = dev->data->dev_private;
1467         struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1468
1469         if ((*priv->rxqs)[idx]) {
1470                 rxq_ctrl = container_of((*priv->rxqs)[idx],
1471                                         struct mlx5_rxq_ctrl,
1472                                         rxq);
1473                 mlx5_rxq_ibv_get(dev, idx);
1474                 rte_atomic32_inc(&rxq_ctrl->refcnt);
1475         }
1476         return rxq_ctrl;
1477 }
1478
1479 /**
1480  * Release a Rx queue.
1481  *
1482  * @param dev
1483  *   Pointer to Ethernet device.
1484  * @param idx
1485  *   RX queue index.
1486  *
1487  * @return
1488  *   1 while a reference on it exists, 0 when freed.
1489  */
1490 int
1491 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1492 {
1493         struct mlx5_priv *priv = dev->data->dev_private;
1494         struct mlx5_rxq_ctrl *rxq_ctrl;
1495
1496         if (!(*priv->rxqs)[idx])
1497                 return 0;
1498         rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1499         assert(rxq_ctrl->priv);
1500         if (rxq_ctrl->ibv && !mlx5_rxq_ibv_release(rxq_ctrl->ibv))
1501                 rxq_ctrl->ibv = NULL;
1502         if (rte_atomic32_dec_and_test(&rxq_ctrl->refcnt)) {
1503                 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1504                 LIST_REMOVE(rxq_ctrl, next);
1505                 rte_free(rxq_ctrl);
1506                 (*priv->rxqs)[idx] = NULL;
1507                 return 0;
1508         }
1509         return 1;
1510 }
1511
1512 /**
1513  * Verify the Rx Queue list is empty
1514  *
1515  * @param dev
1516  *   Pointer to Ethernet device.
1517  *
1518  * @return
1519  *   The number of object not released.
1520  */
1521 int
1522 mlx5_rxq_verify(struct rte_eth_dev *dev)
1523 {
1524         struct mlx5_priv *priv = dev->data->dev_private;
1525         struct mlx5_rxq_ctrl *rxq_ctrl;
1526         int ret = 0;
1527
1528         LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1529                 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1530                         dev->data->port_id, rxq_ctrl->rxq.idx);
1531                 ++ret;
1532         }
1533         return ret;
1534 }
1535
1536 /**
1537  * Create an indirection table.
1538  *
1539  * @param dev
1540  *   Pointer to Ethernet device.
1541  * @param queues
1542  *   Queues entering in the indirection table.
1543  * @param queues_n
1544  *   Number of queues in the array.
1545  *
1546  * @return
1547  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
1548  */
1549 static struct mlx5_ind_table_ibv *
1550 mlx5_ind_table_ibv_new(struct rte_eth_dev *dev, const uint16_t *queues,
1551                        uint32_t queues_n)
1552 {
1553         struct mlx5_priv *priv = dev->data->dev_private;
1554         struct mlx5_ind_table_ibv *ind_tbl;
1555         const unsigned int wq_n = rte_is_power_of_2(queues_n) ?
1556                 log2above(queues_n) :
1557                 log2above(priv->config.ind_table_max_size);
1558         struct ibv_wq *wq[1 << wq_n];
1559         unsigned int i;
1560         unsigned int j;
1561
1562         ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl) +
1563                              queues_n * sizeof(uint16_t), 0);
1564         if (!ind_tbl) {
1565                 rte_errno = ENOMEM;
1566                 return NULL;
1567         }
1568         for (i = 0; i != queues_n; ++i) {
1569                 struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
1570
1571                 if (!rxq)
1572                         goto error;
1573                 wq[i] = rxq->ibv->wq;
1574                 ind_tbl->queues[i] = queues[i];
1575         }
1576         ind_tbl->queues_n = queues_n;
1577         /* Finalise indirection table. */
1578         for (j = 0; i != (unsigned int)(1 << wq_n); ++i, ++j)
1579                 wq[i] = wq[j];
1580         ind_tbl->ind_table = mlx5_glue->create_rwq_ind_table
1581                 (priv->sh->ctx,
1582                  &(struct ibv_rwq_ind_table_init_attr){
1583                         .log_ind_tbl_size = wq_n,
1584                         .ind_tbl = wq,
1585                         .comp_mask = 0,
1586                  });
1587         if (!ind_tbl->ind_table) {
1588                 rte_errno = errno;
1589                 goto error;
1590         }
1591         rte_atomic32_inc(&ind_tbl->refcnt);
1592         LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
1593         return ind_tbl;
1594 error:
1595         rte_free(ind_tbl);
1596         DEBUG("port %u cannot create indirection table", dev->data->port_id);
1597         return NULL;
1598 }
1599
1600 /**
1601  * Get an indirection table.
1602  *
1603  * @param dev
1604  *   Pointer to Ethernet device.
1605  * @param queues
1606  *   Queues entering in the indirection table.
1607  * @param queues_n
1608  *   Number of queues in the array.
1609  *
1610  * @return
1611  *   An indirection table if found.
1612  */
1613 static struct mlx5_ind_table_ibv *
1614 mlx5_ind_table_ibv_get(struct rte_eth_dev *dev, const uint16_t *queues,
1615                        uint32_t queues_n)
1616 {
1617         struct mlx5_priv *priv = dev->data->dev_private;
1618         struct mlx5_ind_table_ibv *ind_tbl;
1619
1620         LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1621                 if ((ind_tbl->queues_n == queues_n) &&
1622                     (memcmp(ind_tbl->queues, queues,
1623                             ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1624                      == 0))
1625                         break;
1626         }
1627         if (ind_tbl) {
1628                 unsigned int i;
1629
1630                 rte_atomic32_inc(&ind_tbl->refcnt);
1631                 for (i = 0; i != ind_tbl->queues_n; ++i)
1632                         mlx5_rxq_get(dev, ind_tbl->queues[i]);
1633         }
1634         return ind_tbl;
1635 }
1636
1637 /**
1638  * Release an indirection table.
1639  *
1640  * @param dev
1641  *   Pointer to Ethernet device.
1642  * @param ind_table
1643  *   Indirection table to release.
1644  *
1645  * @return
1646  *   1 while a reference on it exists, 0 when freed.
1647  */
1648 static int
1649 mlx5_ind_table_ibv_release(struct rte_eth_dev *dev,
1650                            struct mlx5_ind_table_ibv *ind_tbl)
1651 {
1652         unsigned int i;
1653
1654         if (rte_atomic32_dec_and_test(&ind_tbl->refcnt))
1655                 claim_zero(mlx5_glue->destroy_rwq_ind_table
1656                            (ind_tbl->ind_table));
1657         for (i = 0; i != ind_tbl->queues_n; ++i)
1658                 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1659         if (!rte_atomic32_read(&ind_tbl->refcnt)) {
1660                 LIST_REMOVE(ind_tbl, next);
1661                 rte_free(ind_tbl);
1662                 return 0;
1663         }
1664         return 1;
1665 }
1666
1667 /**
1668  * Verify the Rx Queue list is empty
1669  *
1670  * @param dev
1671  *   Pointer to Ethernet device.
1672  *
1673  * @return
1674  *   The number of object not released.
1675  */
1676 int
1677 mlx5_ind_table_ibv_verify(struct rte_eth_dev *dev)
1678 {
1679         struct mlx5_priv *priv = dev->data->dev_private;
1680         struct mlx5_ind_table_ibv *ind_tbl;
1681         int ret = 0;
1682
1683         LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1684                 DRV_LOG(DEBUG,
1685                         "port %u Verbs indirection table %p still referenced",
1686                         dev->data->port_id, (void *)ind_tbl);
1687                 ++ret;
1688         }
1689         return ret;
1690 }
1691
1692 /**
1693  * Create an Rx Hash queue.
1694  *
1695  * @param dev
1696  *   Pointer to Ethernet device.
1697  * @param rss_key
1698  *   RSS key for the Rx hash queue.
1699  * @param rss_key_len
1700  *   RSS key length.
1701  * @param hash_fields
1702  *   Verbs protocol hash field to make the RSS on.
1703  * @param queues
1704  *   Queues entering in hash queue. In case of empty hash_fields only the
1705  *   first queue index will be taken for the indirection table.
1706  * @param queues_n
1707  *   Number of queues.
1708  * @param tunnel
1709  *   Tunnel type.
1710  *
1711  * @return
1712  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
1713  */
1714 struct mlx5_hrxq *
1715 mlx5_hrxq_new(struct rte_eth_dev *dev,
1716               const uint8_t *rss_key, uint32_t rss_key_len,
1717               uint64_t hash_fields,
1718               const uint16_t *queues, uint32_t queues_n,
1719               int tunnel __rte_unused)
1720 {
1721         struct mlx5_priv *priv = dev->data->dev_private;
1722         struct mlx5_hrxq *hrxq;
1723         struct mlx5_ind_table_ibv *ind_tbl;
1724         struct ibv_qp *qp;
1725 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1726         struct mlx5dv_qp_init_attr qp_init_attr;
1727 #endif
1728         int err;
1729
1730         queues_n = hash_fields ? queues_n : 1;
1731         ind_tbl = mlx5_ind_table_ibv_get(dev, queues, queues_n);
1732         if (!ind_tbl)
1733                 ind_tbl = mlx5_ind_table_ibv_new(dev, queues, queues_n);
1734         if (!ind_tbl) {
1735                 rte_errno = ENOMEM;
1736                 return NULL;
1737         }
1738 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1739         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
1740         if (tunnel) {
1741                 qp_init_attr.comp_mask =
1742                                 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS;
1743                 qp_init_attr.create_flags = MLX5DV_QP_CREATE_TUNNEL_OFFLOADS;
1744         }
1745 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1746         if (dev->data->dev_conf.lpbk_mode) {
1747                 /* Allow packet sent from NIC loop back w/o source MAC check. */
1748                 qp_init_attr.comp_mask |=
1749                                 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS;
1750                 qp_init_attr.create_flags |=
1751                                 MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC;
1752         }
1753 #endif
1754         qp = mlx5_glue->dv_create_qp
1755                 (priv->sh->ctx,
1756                  &(struct ibv_qp_init_attr_ex){
1757                         .qp_type = IBV_QPT_RAW_PACKET,
1758                         .comp_mask =
1759                                 IBV_QP_INIT_ATTR_PD |
1760                                 IBV_QP_INIT_ATTR_IND_TABLE |
1761                                 IBV_QP_INIT_ATTR_RX_HASH,
1762                         .rx_hash_conf = (struct ibv_rx_hash_conf){
1763                                 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1764                                 .rx_hash_key_len = rss_key_len,
1765                                 .rx_hash_key = (void *)(uintptr_t)rss_key,
1766                                 .rx_hash_fields_mask = hash_fields,
1767                         },
1768                         .rwq_ind_tbl = ind_tbl->ind_table,
1769                         .pd = priv->sh->pd,
1770                  },
1771                  &qp_init_attr);
1772 #else
1773         qp = mlx5_glue->create_qp_ex
1774                 (priv->sh->ctx,
1775                  &(struct ibv_qp_init_attr_ex){
1776                         .qp_type = IBV_QPT_RAW_PACKET,
1777                         .comp_mask =
1778                                 IBV_QP_INIT_ATTR_PD |
1779                                 IBV_QP_INIT_ATTR_IND_TABLE |
1780                                 IBV_QP_INIT_ATTR_RX_HASH,
1781                         .rx_hash_conf = (struct ibv_rx_hash_conf){
1782                                 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1783                                 .rx_hash_key_len = rss_key_len,
1784                                 .rx_hash_key = (void *)(uintptr_t)rss_key,
1785                                 .rx_hash_fields_mask = hash_fields,
1786                         },
1787                         .rwq_ind_tbl = ind_tbl->ind_table,
1788                         .pd = priv->sh->pd,
1789                  });
1790 #endif
1791         if (!qp) {
1792                 rte_errno = errno;
1793                 goto error;
1794         }
1795         hrxq = rte_calloc(__func__, 1, sizeof(*hrxq) + rss_key_len, 0);
1796         if (!hrxq)
1797                 goto error;
1798         hrxq->ind_table = ind_tbl;
1799         hrxq->qp = qp;
1800         hrxq->rss_key_len = rss_key_len;
1801         hrxq->hash_fields = hash_fields;
1802         memcpy(hrxq->rss_key, rss_key, rss_key_len);
1803 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1804         hrxq->action = mlx5_glue->dv_create_flow_action_dest_ibv_qp(hrxq->qp);
1805         if (!hrxq->action) {
1806                 rte_errno = errno;
1807                 goto error;
1808         }
1809 #endif
1810         rte_atomic32_inc(&hrxq->refcnt);
1811         LIST_INSERT_HEAD(&priv->hrxqs, hrxq, next);
1812         return hrxq;
1813 error:
1814         err = rte_errno; /* Save rte_errno before cleanup. */
1815         mlx5_ind_table_ibv_release(dev, ind_tbl);
1816         if (qp)
1817                 claim_zero(mlx5_glue->destroy_qp(qp));
1818         rte_errno = err; /* Restore rte_errno. */
1819         return NULL;
1820 }
1821
1822 /**
1823  * Get an Rx Hash queue.
1824  *
1825  * @param dev
1826  *   Pointer to Ethernet device.
1827  * @param rss_conf
1828  *   RSS configuration for the Rx hash queue.
1829  * @param queues
1830  *   Queues entering in hash queue. In case of empty hash_fields only the
1831  *   first queue index will be taken for the indirection table.
1832  * @param queues_n
1833  *   Number of queues.
1834  *
1835  * @return
1836  *   An hash Rx queue on success.
1837  */
1838 struct mlx5_hrxq *
1839 mlx5_hrxq_get(struct rte_eth_dev *dev,
1840               const uint8_t *rss_key, uint32_t rss_key_len,
1841               uint64_t hash_fields,
1842               const uint16_t *queues, uint32_t queues_n)
1843 {
1844         struct mlx5_priv *priv = dev->data->dev_private;
1845         struct mlx5_hrxq *hrxq;
1846
1847         queues_n = hash_fields ? queues_n : 1;
1848         LIST_FOREACH(hrxq, &priv->hrxqs, next) {
1849                 struct mlx5_ind_table_ibv *ind_tbl;
1850
1851                 if (hrxq->rss_key_len != rss_key_len)
1852                         continue;
1853                 if (memcmp(hrxq->rss_key, rss_key, rss_key_len))
1854                         continue;
1855                 if (hrxq->hash_fields != hash_fields)
1856                         continue;
1857                 ind_tbl = mlx5_ind_table_ibv_get(dev, queues, queues_n);
1858                 if (!ind_tbl)
1859                         continue;
1860                 if (ind_tbl != hrxq->ind_table) {
1861                         mlx5_ind_table_ibv_release(dev, ind_tbl);
1862                         continue;
1863                 }
1864                 rte_atomic32_inc(&hrxq->refcnt);
1865                 return hrxq;
1866         }
1867         return NULL;
1868 }
1869
1870 /**
1871  * Release the hash Rx queue.
1872  *
1873  * @param dev
1874  *   Pointer to Ethernet device.
1875  * @param hrxq
1876  *   Pointer to Hash Rx queue to release.
1877  *
1878  * @return
1879  *   1 while a reference on it exists, 0 when freed.
1880  */
1881 int
1882 mlx5_hrxq_release(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
1883 {
1884         if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
1885 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1886                 mlx5_glue->destroy_flow_action(hrxq->action);
1887 #endif
1888                 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
1889                 mlx5_ind_table_ibv_release(dev, hrxq->ind_table);
1890                 LIST_REMOVE(hrxq, next);
1891                 rte_free(hrxq);
1892                 return 0;
1893         }
1894         claim_nonzero(mlx5_ind_table_ibv_release(dev, hrxq->ind_table));
1895         return 1;
1896 }
1897
1898 /**
1899  * Verify the Rx Queue list is empty
1900  *
1901  * @param dev
1902  *   Pointer to Ethernet device.
1903  *
1904  * @return
1905  *   The number of object not released.
1906  */
1907 int
1908 mlx5_hrxq_ibv_verify(struct rte_eth_dev *dev)
1909 {
1910         struct mlx5_priv *priv = dev->data->dev_private;
1911         struct mlx5_hrxq *hrxq;
1912         int ret = 0;
1913
1914         LIST_FOREACH(hrxq, &priv->hrxqs, next) {
1915                 DRV_LOG(DEBUG,
1916                         "port %u Verbs hash Rx queue %p still referenced",
1917                         dev->data->port_id, (void *)hrxq);
1918                 ++ret;
1919         }
1920         return ret;
1921 }
1922
1923 /**
1924  * Create a drop Rx queue Verbs object.
1925  *
1926  * @param dev
1927  *   Pointer to Ethernet device.
1928  *
1929  * @return
1930  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
1931  */
1932 static struct mlx5_rxq_ibv *
1933 mlx5_rxq_ibv_drop_new(struct rte_eth_dev *dev)
1934 {
1935         struct mlx5_priv *priv = dev->data->dev_private;
1936         struct ibv_context *ctx = priv->sh->ctx;
1937         struct ibv_cq *cq;
1938         struct ibv_wq *wq = NULL;
1939         struct mlx5_rxq_ibv *rxq;
1940
1941         if (priv->drop_queue.rxq)
1942                 return priv->drop_queue.rxq;
1943         cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
1944         if (!cq) {
1945                 DEBUG("port %u cannot allocate CQ for drop queue",
1946                       dev->data->port_id);
1947                 rte_errno = errno;
1948                 goto error;
1949         }
1950         wq = mlx5_glue->create_wq(ctx,
1951                  &(struct ibv_wq_init_attr){
1952                         .wq_type = IBV_WQT_RQ,
1953                         .max_wr = 1,
1954                         .max_sge = 1,
1955                         .pd = priv->sh->pd,
1956                         .cq = cq,
1957                  });
1958         if (!wq) {
1959                 DEBUG("port %u cannot allocate WQ for drop queue",
1960                       dev->data->port_id);
1961                 rte_errno = errno;
1962                 goto error;
1963         }
1964         rxq = rte_calloc(__func__, 1, sizeof(*rxq), 0);
1965         if (!rxq) {
1966                 DEBUG("port %u cannot allocate drop Rx queue memory",
1967                       dev->data->port_id);
1968                 rte_errno = ENOMEM;
1969                 goto error;
1970         }
1971         rxq->cq = cq;
1972         rxq->wq = wq;
1973         priv->drop_queue.rxq = rxq;
1974         return rxq;
1975 error:
1976         if (wq)
1977                 claim_zero(mlx5_glue->destroy_wq(wq));
1978         if (cq)
1979                 claim_zero(mlx5_glue->destroy_cq(cq));
1980         return NULL;
1981 }
1982
1983 /**
1984  * Release a drop Rx queue Verbs object.
1985  *
1986  * @param dev
1987  *   Pointer to Ethernet device.
1988  *
1989  * @return
1990  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
1991  */
1992 static void
1993 mlx5_rxq_ibv_drop_release(struct rte_eth_dev *dev)
1994 {
1995         struct mlx5_priv *priv = dev->data->dev_private;
1996         struct mlx5_rxq_ibv *rxq = priv->drop_queue.rxq;
1997
1998         if (rxq->wq)
1999                 claim_zero(mlx5_glue->destroy_wq(rxq->wq));
2000         if (rxq->cq)
2001                 claim_zero(mlx5_glue->destroy_cq(rxq->cq));
2002         rte_free(rxq);
2003         priv->drop_queue.rxq = NULL;
2004 }
2005
2006 /**
2007  * Create a drop indirection table.
2008  *
2009  * @param dev
2010  *   Pointer to Ethernet device.
2011  *
2012  * @return
2013  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
2014  */
2015 static struct mlx5_ind_table_ibv *
2016 mlx5_ind_table_ibv_drop_new(struct rte_eth_dev *dev)
2017 {
2018         struct mlx5_priv *priv = dev->data->dev_private;
2019         struct mlx5_ind_table_ibv *ind_tbl;
2020         struct mlx5_rxq_ibv *rxq;
2021         struct mlx5_ind_table_ibv tmpl;
2022
2023         rxq = mlx5_rxq_ibv_drop_new(dev);
2024         if (!rxq)
2025                 return NULL;
2026         tmpl.ind_table = mlx5_glue->create_rwq_ind_table
2027                 (priv->sh->ctx,
2028                  &(struct ibv_rwq_ind_table_init_attr){
2029                         .log_ind_tbl_size = 0,
2030                         .ind_tbl = &rxq->wq,
2031                         .comp_mask = 0,
2032                  });
2033         if (!tmpl.ind_table) {
2034                 DEBUG("port %u cannot allocate indirection table for drop"
2035                       " queue",
2036                       dev->data->port_id);
2037                 rte_errno = errno;
2038                 goto error;
2039         }
2040         ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl), 0);
2041         if (!ind_tbl) {
2042                 rte_errno = ENOMEM;
2043                 goto error;
2044         }
2045         ind_tbl->ind_table = tmpl.ind_table;
2046         return ind_tbl;
2047 error:
2048         mlx5_rxq_ibv_drop_release(dev);
2049         return NULL;
2050 }
2051
2052 /**
2053  * Release a drop indirection table.
2054  *
2055  * @param dev
2056  *   Pointer to Ethernet device.
2057  */
2058 static void
2059 mlx5_ind_table_ibv_drop_release(struct rte_eth_dev *dev)
2060 {
2061         struct mlx5_priv *priv = dev->data->dev_private;
2062         struct mlx5_ind_table_ibv *ind_tbl = priv->drop_queue.hrxq->ind_table;
2063
2064         claim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table));
2065         mlx5_rxq_ibv_drop_release(dev);
2066         rte_free(ind_tbl);
2067         priv->drop_queue.hrxq->ind_table = NULL;
2068 }
2069
2070 /**
2071  * Create a drop Rx Hash queue.
2072  *
2073  * @param dev
2074  *   Pointer to Ethernet device.
2075  *
2076  * @return
2077  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
2078  */
2079 struct mlx5_hrxq *
2080 mlx5_hrxq_drop_new(struct rte_eth_dev *dev)
2081 {
2082         struct mlx5_priv *priv = dev->data->dev_private;
2083         struct mlx5_ind_table_ibv *ind_tbl;
2084         struct ibv_qp *qp;
2085         struct mlx5_hrxq *hrxq;
2086
2087         if (priv->drop_queue.hrxq) {
2088                 rte_atomic32_inc(&priv->drop_queue.hrxq->refcnt);
2089                 return priv->drop_queue.hrxq;
2090         }
2091         ind_tbl = mlx5_ind_table_ibv_drop_new(dev);
2092         if (!ind_tbl)
2093                 return NULL;
2094         qp = mlx5_glue->create_qp_ex(priv->sh->ctx,
2095                  &(struct ibv_qp_init_attr_ex){
2096                         .qp_type = IBV_QPT_RAW_PACKET,
2097                         .comp_mask =
2098                                 IBV_QP_INIT_ATTR_PD |
2099                                 IBV_QP_INIT_ATTR_IND_TABLE |
2100                                 IBV_QP_INIT_ATTR_RX_HASH,
2101                         .rx_hash_conf = (struct ibv_rx_hash_conf){
2102                                 .rx_hash_function =
2103                                         IBV_RX_HASH_FUNC_TOEPLITZ,
2104                                 .rx_hash_key_len = MLX5_RSS_HASH_KEY_LEN,
2105                                 .rx_hash_key = rss_hash_default_key,
2106                                 .rx_hash_fields_mask = 0,
2107                                 },
2108                         .rwq_ind_tbl = ind_tbl->ind_table,
2109                         .pd = priv->sh->pd
2110                  });
2111         if (!qp) {
2112                 DEBUG("port %u cannot allocate QP for drop queue",
2113                       dev->data->port_id);
2114                 rte_errno = errno;
2115                 goto error;
2116         }
2117         hrxq = rte_calloc(__func__, 1, sizeof(*hrxq), 0);
2118         if (!hrxq) {
2119                 DRV_LOG(WARNING,
2120                         "port %u cannot allocate memory for drop queue",
2121                         dev->data->port_id);
2122                 rte_errno = ENOMEM;
2123                 goto error;
2124         }
2125         hrxq->ind_table = ind_tbl;
2126         hrxq->qp = qp;
2127 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2128         hrxq->action = mlx5_glue->dv_create_flow_action_dest_ibv_qp(hrxq->qp);
2129         if (!hrxq->action) {
2130                 rte_errno = errno;
2131                 goto error;
2132         }
2133 #endif
2134         priv->drop_queue.hrxq = hrxq;
2135         rte_atomic32_set(&hrxq->refcnt, 1);
2136         return hrxq;
2137 error:
2138         if (ind_tbl)
2139                 mlx5_ind_table_ibv_drop_release(dev);
2140         return NULL;
2141 }
2142
2143 /**
2144  * Release a drop hash Rx queue.
2145  *
2146  * @param dev
2147  *   Pointer to Ethernet device.
2148  */
2149 void
2150 mlx5_hrxq_drop_release(struct rte_eth_dev *dev)
2151 {
2152         struct mlx5_priv *priv = dev->data->dev_private;
2153         struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2154
2155         if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
2156 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2157                 mlx5_glue->destroy_flow_action(hrxq->action);
2158 #endif
2159                 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
2160                 mlx5_ind_table_ibv_drop_release(dev);
2161                 rte_free(hrxq);
2162                 priv->drop_queue.hrxq = NULL;
2163         }
2164 }