1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
12 #include <sys/queue.h>
15 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
17 #pragma GCC diagnostic ignored "-Wpedantic"
19 #include <infiniband/verbs.h>
20 #include <infiniband/mlx5dv.h>
22 #pragma GCC diagnostic error "-Wpedantic"
26 #include <rte_malloc.h>
27 #include <rte_ethdev_driver.h>
28 #include <rte_common.h>
29 #include <rte_interrupts.h>
30 #include <rte_debug.h>
34 #include "mlx5_rxtx.h"
35 #include "mlx5_utils.h"
36 #include "mlx5_autoconf.h"
37 #include "mlx5_defs.h"
38 #include "mlx5_glue.h"
40 /* Default RSS hash key also used for ConnectX-3. */
41 uint8_t rss_hash_default_key[] = {
42 0x2c, 0xc6, 0x81, 0xd1,
43 0x5b, 0xdb, 0xf4, 0xf7,
44 0xfc, 0xa2, 0x83, 0x19,
45 0xdb, 0x1a, 0x3e, 0x94,
46 0x6b, 0x9e, 0x38, 0xd9,
47 0x2c, 0x9c, 0x03, 0xd1,
48 0xad, 0x99, 0x44, 0xa7,
49 0xd9, 0x56, 0x3d, 0x59,
50 0x06, 0x3c, 0x25, 0xf3,
51 0xfc, 0x1f, 0xdc, 0x2a,
54 /* Length of the default RSS hash key. */
55 static_assert(MLX5_RSS_HASH_KEY_LEN ==
56 (unsigned int)sizeof(rss_hash_default_key),
57 "wrong RSS default key size.");
60 * Check whether Multi-Packet RQ can be enabled for the device.
63 * Pointer to Ethernet device.
66 * 1 if supported, negative errno value if not.
69 mlx5_check_mprq_support(struct rte_eth_dev *dev)
71 struct mlx5_priv *priv = dev->data->dev_private;
73 if (priv->config.mprq.enabled &&
74 priv->rxqs_n >= priv->config.mprq.min_rxqs_num)
80 * Check whether Multi-Packet RQ is enabled for the Rx queue.
83 * Pointer to receive queue structure.
86 * 0 if disabled, otherwise enabled.
89 mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq)
91 return rxq->strd_num_n > 0;
95 * Check whether Multi-Packet RQ is enabled for the device.
96 * MPRQ can be enabled explicitly, or implicitly by enabling LRO.
99 * Pointer to Ethernet device.
102 * 0 if disabled, otherwise enabled.
105 mlx5_mprq_enabled(struct rte_eth_dev *dev)
107 struct mlx5_priv *priv = dev->data->dev_private;
111 if (mlx5_check_mprq_support(dev) < 0)
113 /* All the configured queues should be enabled. */
114 for (i = 0; i < priv->rxqs_n; ++i) {
115 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
119 if (mlx5_rxq_mprq_enabled(rxq))
122 /* Multi-Packet RQ can't be partially configured. */
123 assert(n == 0 || n == priv->rxqs_n);
124 return n == priv->rxqs_n;
128 * Check whether LRO is supported and enabled for the device.
131 * Pointer to Ethernet device.
134 * 0 if disabled, 1 if enabled.
137 mlx5_lro_on(struct rte_eth_dev *dev)
139 return (MLX5_LRO_SUPPORTED(dev) && MLX5_LRO_ENABLED(dev));
143 * Allocate RX queue elements for Multi-Packet RQ.
146 * Pointer to RX queue structure.
149 * 0 on success, a negative errno value otherwise and rte_errno is set.
152 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
154 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
155 unsigned int wqe_n = 1 << rxq->elts_n;
159 /* Iterate on segments. */
160 for (i = 0; i <= wqe_n; ++i) {
161 struct mlx5_mprq_buf *buf;
163 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
164 DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
169 (*rxq->mprq_bufs)[i] = buf;
171 rxq->mprq_repl = buf;
174 "port %u Rx queue %u allocated and configured %u segments",
175 rxq->port_id, rxq->idx, wqe_n);
178 err = rte_errno; /* Save rte_errno before cleanup. */
180 for (i = 0; (i != wqe_n); ++i) {
181 if ((*rxq->mprq_bufs)[i] != NULL)
182 rte_mempool_put(rxq->mprq_mp,
183 (*rxq->mprq_bufs)[i]);
184 (*rxq->mprq_bufs)[i] = NULL;
186 DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
187 rxq->port_id, rxq->idx);
188 rte_errno = err; /* Restore rte_errno. */
193 * Allocate RX queue elements for Single-Packet RQ.
196 * Pointer to RX queue structure.
199 * 0 on success, errno value on failure.
202 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
204 const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
205 unsigned int elts_n = 1 << rxq_ctrl->rxq.elts_n;
209 /* Iterate on segments. */
210 for (i = 0; (i != elts_n); ++i) {
211 struct rte_mbuf *buf;
213 buf = rte_pktmbuf_alloc(rxq_ctrl->rxq.mp);
215 DRV_LOG(ERR, "port %u empty mbuf pool",
216 PORT_ID(rxq_ctrl->priv));
220 /* Headroom is reserved by rte_pktmbuf_alloc(). */
221 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
222 /* Buffer is supposed to be empty. */
223 assert(rte_pktmbuf_data_len(buf) == 0);
224 assert(rte_pktmbuf_pkt_len(buf) == 0);
226 /* Only the first segment keeps headroom. */
228 SET_DATA_OFF(buf, 0);
229 PORT(buf) = rxq_ctrl->rxq.port_id;
230 DATA_LEN(buf) = rte_pktmbuf_tailroom(buf);
231 PKT_LEN(buf) = DATA_LEN(buf);
233 (*rxq_ctrl->rxq.elts)[i] = buf;
235 /* If Rx vector is activated. */
236 if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
237 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
238 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
241 /* Initialize default rearm_data for vPMD. */
242 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
243 rte_mbuf_refcnt_set(mbuf_init, 1);
244 mbuf_init->nb_segs = 1;
245 mbuf_init->port = rxq->port_id;
247 * prevent compiler reordering:
248 * rearm_data covers previous fields.
250 rte_compiler_barrier();
251 rxq->mbuf_initializer =
252 *(uint64_t *)&mbuf_init->rearm_data;
253 /* Padding with a fake mbuf for vectorized Rx. */
254 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
255 (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
258 "port %u Rx queue %u allocated and configured %u segments"
260 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
261 elts_n / (1 << rxq_ctrl->rxq.sges_n));
264 err = rte_errno; /* Save rte_errno before cleanup. */
266 for (i = 0; (i != elts_n); ++i) {
267 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
268 rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
269 (*rxq_ctrl->rxq.elts)[i] = NULL;
271 DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
272 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
273 rte_errno = err; /* Restore rte_errno. */
278 * Allocate RX queue elements.
281 * Pointer to RX queue structure.
284 * 0 on success, errno value on failure.
287 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
289 return mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
290 rxq_alloc_elts_mprq(rxq_ctrl) : rxq_alloc_elts_sprq(rxq_ctrl);
294 * Free RX queue elements for Multi-Packet RQ.
297 * Pointer to RX queue structure.
300 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
302 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
305 DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing WRs",
306 rxq->port_id, rxq->idx);
307 if (rxq->mprq_bufs == NULL)
309 assert(mlx5_rxq_check_vec_support(rxq) < 0);
310 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
311 if ((*rxq->mprq_bufs)[i] != NULL)
312 mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
313 (*rxq->mprq_bufs)[i] = NULL;
315 if (rxq->mprq_repl != NULL) {
316 mlx5_mprq_buf_free(rxq->mprq_repl);
317 rxq->mprq_repl = NULL;
322 * Free RX queue elements for Single-Packet RQ.
325 * Pointer to RX queue structure.
328 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
330 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
331 const uint16_t q_n = (1 << rxq->elts_n);
332 const uint16_t q_mask = q_n - 1;
333 uint16_t used = q_n - (rxq->rq_ci - rxq->rq_pi);
336 DRV_LOG(DEBUG, "port %u Rx queue %u freeing WRs",
337 PORT_ID(rxq_ctrl->priv), rxq->idx);
338 if (rxq->elts == NULL)
341 * Some mbuf in the Ring belongs to the application. They cannot be
344 if (mlx5_rxq_check_vec_support(rxq) > 0) {
345 for (i = 0; i < used; ++i)
346 (*rxq->elts)[(rxq->rq_ci + i) & q_mask] = NULL;
347 rxq->rq_pi = rxq->rq_ci;
349 for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
350 if ((*rxq->elts)[i] != NULL)
351 rte_pktmbuf_free_seg((*rxq->elts)[i]);
352 (*rxq->elts)[i] = NULL;
357 * Free RX queue elements.
360 * Pointer to RX queue structure.
363 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
365 if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
366 rxq_free_elts_mprq(rxq_ctrl);
368 rxq_free_elts_sprq(rxq_ctrl);
372 * Returns the per-queue supported offloads.
375 * Pointer to Ethernet device.
378 * Supported Rx offloads.
381 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
383 struct mlx5_priv *priv = dev->data->dev_private;
384 struct mlx5_dev_config *config = &priv->config;
385 uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
386 DEV_RX_OFFLOAD_TIMESTAMP |
387 DEV_RX_OFFLOAD_JUMBO_FRAME);
389 if (config->hw_fcs_strip)
390 offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
393 offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
394 DEV_RX_OFFLOAD_UDP_CKSUM |
395 DEV_RX_OFFLOAD_TCP_CKSUM);
396 if (config->hw_vlan_strip)
397 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
403 * Returns the per-port supported offloads.
406 * Pointer to Ethernet device.
409 * Supported Rx offloads.
412 mlx5_get_rx_port_offloads(struct rte_eth_dev *dev)
414 uint64_t offloads = DEV_RX_OFFLOAD_VLAN_FILTER;
416 if (MLX5_LRO_SUPPORTED(dev))
417 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
422 * Verify if the queue can be released.
425 * Pointer to Ethernet device.
430 * 1 if the queue can be released
431 * 0 if the queue can not be released, there are references to it.
432 * Negative errno and rte_errno is set if queue doesn't exist.
435 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
437 struct mlx5_priv *priv = dev->data->dev_private;
438 struct mlx5_rxq_ctrl *rxq_ctrl;
440 if (!(*priv->rxqs)[idx]) {
444 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
445 return (rte_atomic32_read(&rxq_ctrl->refcnt) == 1);
451 * Pointer to Ethernet device structure.
455 * Number of descriptors to configure in queue.
457 * NUMA socket on which memory must be allocated.
459 * Thresholds parameters.
461 * Memory pool for buffer allocations.
464 * 0 on success, a negative errno value otherwise and rte_errno is set.
467 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
468 unsigned int socket, const struct rte_eth_rxconf *conf,
469 struct rte_mempool *mp)
471 struct mlx5_priv *priv = dev->data->dev_private;
472 struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
473 struct mlx5_rxq_ctrl *rxq_ctrl =
474 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
476 if (!rte_is_power_of_2(desc)) {
477 desc = 1 << log2above(desc);
479 "port %u increased number of descriptors in Rx queue %u"
480 " to the next power of two (%d)",
481 dev->data->port_id, idx, desc);
483 DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
484 dev->data->port_id, idx, desc);
485 if (idx >= priv->rxqs_n) {
486 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
487 dev->data->port_id, idx, priv->rxqs_n);
488 rte_errno = EOVERFLOW;
491 if (!mlx5_rxq_releasable(dev, idx)) {
492 DRV_LOG(ERR, "port %u unable to release queue index %u",
493 dev->data->port_id, idx);
497 mlx5_rxq_release(dev, idx);
498 rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, mp);
500 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
501 dev->data->port_id, idx);
505 DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
506 dev->data->port_id, idx);
507 (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
512 * DPDK callback to release a RX queue.
515 * Generic RX queue pointer.
518 mlx5_rx_queue_release(void *dpdk_rxq)
520 struct mlx5_rxq_data *rxq = (struct mlx5_rxq_data *)dpdk_rxq;
521 struct mlx5_rxq_ctrl *rxq_ctrl;
522 struct mlx5_priv *priv;
526 rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);
527 priv = rxq_ctrl->priv;
528 if (!mlx5_rxq_releasable(ETH_DEV(priv), rxq_ctrl->rxq.idx))
529 rte_panic("port %u Rx queue %u is still used by a flow and"
530 " cannot be removed\n",
531 PORT_ID(priv), rxq->idx);
532 mlx5_rxq_release(ETH_DEV(priv), rxq_ctrl->rxq.idx);
536 * Get an Rx queue Verbs/DevX object.
539 * Pointer to Ethernet device.
541 * Queue index in DPDK Rx queue array
544 * The Verbs/DevX object if it exists.
546 static struct mlx5_rxq_obj *
547 mlx5_rxq_obj_get(struct rte_eth_dev *dev, uint16_t idx)
549 struct mlx5_priv *priv = dev->data->dev_private;
550 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
551 struct mlx5_rxq_ctrl *rxq_ctrl;
553 if (idx >= priv->rxqs_n)
557 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
559 rte_atomic32_inc(&rxq_ctrl->obj->refcnt);
560 return rxq_ctrl->obj;
564 * Release an Rx verbs/DevX queue object.
567 * Verbs/DevX Rx queue object.
570 * 1 while a reference on it exists, 0 when freed.
573 mlx5_rxq_obj_release(struct mlx5_rxq_obj *rxq_obj)
578 if (rte_atomic32_dec_and_test(&rxq_obj->refcnt)) {
579 rxq_free_elts(rxq_obj->rxq_ctrl);
580 claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq));
581 claim_zero(mlx5_glue->destroy_cq(rxq_obj->cq));
582 if (rxq_obj->channel)
583 claim_zero(mlx5_glue->destroy_comp_channel
585 LIST_REMOVE(rxq_obj, next);
593 * Allocate queue vector and fill epoll fd list for Rx interrupts.
596 * Pointer to Ethernet device.
599 * 0 on success, a negative errno value otherwise and rte_errno is set.
602 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
604 struct mlx5_priv *priv = dev->data->dev_private;
606 unsigned int rxqs_n = priv->rxqs_n;
607 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
608 unsigned int count = 0;
609 struct rte_intr_handle *intr_handle = dev->intr_handle;
611 if (!dev->data->dev_conf.intr_conf.rxq)
613 mlx5_rx_intr_vec_disable(dev);
614 intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
615 if (intr_handle->intr_vec == NULL) {
617 "port %u failed to allocate memory for interrupt"
618 " vector, Rx interrupts will not be supported",
623 intr_handle->type = RTE_INTR_HANDLE_EXT;
624 for (i = 0; i != n; ++i) {
625 /* This rxq obj must not be released in this function. */
626 struct mlx5_rxq_obj *rxq_obj = mlx5_rxq_obj_get(dev, i);
631 /* Skip queues that cannot request interrupts. */
632 if (!rxq_obj || !rxq_obj->channel) {
633 /* Use invalid intr_vec[] index to disable entry. */
634 intr_handle->intr_vec[i] =
635 RTE_INTR_VEC_RXTX_OFFSET +
636 RTE_MAX_RXTX_INTR_VEC_ID;
639 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
641 "port %u too many Rx queues for interrupt"
642 " vector size (%d), Rx interrupts cannot be"
644 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
645 mlx5_rx_intr_vec_disable(dev);
649 fd = rxq_obj->channel->fd;
650 flags = fcntl(fd, F_GETFL);
651 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
655 "port %u failed to make Rx interrupt file"
656 " descriptor %d non-blocking for queue index"
658 dev->data->port_id, fd, i);
659 mlx5_rx_intr_vec_disable(dev);
662 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
663 intr_handle->efds[count] = fd;
667 mlx5_rx_intr_vec_disable(dev);
669 intr_handle->nb_efd = count;
674 * Clean up Rx interrupts handler.
677 * Pointer to Ethernet device.
680 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
682 struct mlx5_priv *priv = dev->data->dev_private;
683 struct rte_intr_handle *intr_handle = dev->intr_handle;
685 unsigned int rxqs_n = priv->rxqs_n;
686 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
688 if (!dev->data->dev_conf.intr_conf.rxq)
690 if (!intr_handle->intr_vec)
692 for (i = 0; i != n; ++i) {
693 struct mlx5_rxq_ctrl *rxq_ctrl;
694 struct mlx5_rxq_data *rxq_data;
696 if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
697 RTE_MAX_RXTX_INTR_VEC_ID)
700 * Need to access directly the queue to release the reference
701 * kept in mlx5_rx_intr_vec_enable().
703 rxq_data = (*priv->rxqs)[i];
704 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
706 mlx5_rxq_obj_release(rxq_ctrl->obj);
709 rte_intr_free_epoll_fd(intr_handle);
710 if (intr_handle->intr_vec)
711 free(intr_handle->intr_vec);
712 intr_handle->nb_efd = 0;
713 intr_handle->intr_vec = NULL;
717 * MLX5 CQ notification .
720 * Pointer to receive queue structure.
722 * Sequence number per receive queue .
725 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
728 uint32_t doorbell_hi;
730 void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
732 sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
733 doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
734 doorbell = (uint64_t)doorbell_hi << 32;
735 doorbell |= rxq->cqn;
736 rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
737 mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
738 cq_db_reg, rxq->uar_lock_cq);
742 * DPDK callback for Rx queue interrupt enable.
745 * Pointer to Ethernet device structure.
750 * 0 on success, a negative errno value otherwise and rte_errno is set.
753 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
755 struct mlx5_priv *priv = dev->data->dev_private;
756 struct mlx5_rxq_data *rxq_data;
757 struct mlx5_rxq_ctrl *rxq_ctrl;
759 rxq_data = (*priv->rxqs)[rx_queue_id];
764 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
766 struct mlx5_rxq_obj *rxq_obj;
768 rxq_obj = mlx5_rxq_obj_get(dev, rx_queue_id);
773 mlx5_arm_cq(rxq_data, rxq_data->cq_arm_sn);
774 mlx5_rxq_obj_release(rxq_obj);
780 * DPDK callback for Rx queue interrupt disable.
783 * Pointer to Ethernet device structure.
788 * 0 on success, a negative errno value otherwise and rte_errno is set.
791 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
793 struct mlx5_priv *priv = dev->data->dev_private;
794 struct mlx5_rxq_data *rxq_data;
795 struct mlx5_rxq_ctrl *rxq_ctrl;
796 struct mlx5_rxq_obj *rxq_obj = NULL;
797 struct ibv_cq *ev_cq;
801 rxq_data = (*priv->rxqs)[rx_queue_id];
806 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
809 rxq_obj = mlx5_rxq_obj_get(dev, rx_queue_id);
814 ret = mlx5_glue->get_cq_event(rxq_obj->channel, &ev_cq, &ev_ctx);
815 if (ret || ev_cq != rxq_obj->cq) {
819 rxq_data->cq_arm_sn++;
820 mlx5_glue->ack_cq_events(rxq_obj->cq, 1);
821 mlx5_rxq_obj_release(rxq_obj);
824 ret = rte_errno; /* Save rte_errno before cleanup. */
826 mlx5_rxq_obj_release(rxq_obj);
827 DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
828 dev->data->port_id, rx_queue_id);
829 rte_errno = ret; /* Restore rte_errno. */
834 * Create a CQ Verbs object.
837 * Pointer to Ethernet device.
839 * Pointer to device private data.
841 * Pointer to Rx queue data.
843 * Number of CQEs in CQ.
845 * Pointer to Rx queue object data.
848 * The Verbs object initialised, NULL otherwise and rte_errno is set.
850 static struct ibv_cq *
851 mlx5_ibv_cq_new(struct rte_eth_dev *dev, struct mlx5_priv *priv,
852 struct mlx5_rxq_data *rxq_data,
853 unsigned int cqe_n, struct mlx5_rxq_obj *rxq_obj)
856 struct ibv_cq_init_attr_ex ibv;
857 struct mlx5dv_cq_init_attr mlx5;
860 cq_attr.ibv = (struct ibv_cq_init_attr_ex){
862 .channel = rxq_obj->channel,
865 cq_attr.mlx5 = (struct mlx5dv_cq_init_attr){
868 if (priv->config.cqe_comp && !rxq_data->hw_timestamp) {
869 cq_attr.mlx5.comp_mask |=
870 MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
871 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
872 cq_attr.mlx5.cqe_comp_res_format =
873 mlx5_rxq_mprq_enabled(rxq_data) ?
874 MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX :
875 MLX5DV_CQE_RES_FORMAT_HASH;
877 cq_attr.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
880 * For vectorized Rx, it must not be doubled in order to
881 * make cq_ci and rq_ci aligned.
883 if (mlx5_rxq_check_vec_support(rxq_data) < 0)
884 cq_attr.ibv.cqe *= 2;
885 } else if (priv->config.cqe_comp && rxq_data->hw_timestamp) {
887 "port %u Rx CQE compression is disabled for HW"
891 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
892 if (priv->config.cqe_pad) {
893 cq_attr.mlx5.comp_mask |= MLX5DV_CQ_INIT_ATTR_MASK_FLAGS;
894 cq_attr.mlx5.flags |= MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD;
897 return mlx5_glue->cq_ex_to_cq(mlx5_glue->dv_create_cq(priv->sh->ctx,
903 * Create a WQ Verbs object.
906 * Pointer to Ethernet device.
908 * Pointer to device private data.
910 * Pointer to Rx queue data.
912 * Queue index in DPDK Rx queue array
914 * Number of WQEs in WQ.
916 * Pointer to Rx queue object data.
919 * The Verbs object initialised, NULL otherwise and rte_errno is set.
921 static struct ibv_wq *
922 mlx5_ibv_wq_new(struct rte_eth_dev *dev, struct mlx5_priv *priv,
923 struct mlx5_rxq_data *rxq_data, uint16_t idx,
924 unsigned int wqe_n, struct mlx5_rxq_obj *rxq_obj)
927 struct ibv_wq_init_attr ibv;
928 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
929 struct mlx5dv_wq_init_attr mlx5;
933 wq_attr.ibv = (struct ibv_wq_init_attr){
934 .wq_context = NULL, /* Could be useful in the future. */
935 .wq_type = IBV_WQT_RQ,
936 /* Max number of outstanding WRs. */
937 .max_wr = wqe_n >> rxq_data->sges_n,
938 /* Max number of scatter/gather elements in a WR. */
939 .max_sge = 1 << rxq_data->sges_n,
942 .comp_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING | 0,
943 .create_flags = (rxq_data->vlan_strip ?
944 IBV_WQ_FLAGS_CVLAN_STRIPPING : 0),
946 /* By default, FCS (CRC) is stripped by hardware. */
947 if (rxq_data->crc_present) {
948 wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;
949 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
951 if (priv->config.hw_padding) {
952 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
953 wq_attr.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;
954 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
955 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
956 wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_PCI_WRITE_END_PADDING;
957 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
960 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
961 wq_attr.mlx5 = (struct mlx5dv_wq_init_attr){
964 if (mlx5_rxq_mprq_enabled(rxq_data)) {
965 struct mlx5dv_striding_rq_init_attr *mprq_attr =
966 &wq_attr.mlx5.striding_rq_attrs;
968 wq_attr.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;
969 *mprq_attr = (struct mlx5dv_striding_rq_init_attr){
970 .single_stride_log_num_of_bytes = rxq_data->strd_sz_n,
971 .single_wqe_log_num_of_strides = rxq_data->strd_num_n,
972 .two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,
975 rxq_obj->wq = mlx5_glue->dv_create_wq(priv->sh->ctx, &wq_attr.ibv,
978 rxq_obj->wq = mlx5_glue->create_wq(priv->sh->ctx, &wq_attr.ibv);
982 * Make sure number of WRs*SGEs match expectations since a queue
983 * cannot allocate more than "desc" buffers.
985 if (wq_attr.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||
986 wq_attr.ibv.max_sge != (1u << rxq_data->sges_n)) {
988 "port %u Rx queue %u requested %u*%u but got"
990 dev->data->port_id, idx,
991 wqe_n >> rxq_data->sges_n,
992 (1 << rxq_data->sges_n),
993 wq_attr.ibv.max_wr, wq_attr.ibv.max_sge);
994 claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq));
1003 * Create the Rx queue Verbs/DevX object.
1006 * Pointer to Ethernet device.
1008 * Queue index in DPDK Rx queue array
1011 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
1013 struct mlx5_rxq_obj *
1014 mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
1016 struct mlx5_priv *priv = dev->data->dev_private;
1017 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1018 struct mlx5_rxq_ctrl *rxq_ctrl =
1019 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1020 struct ibv_wq_attr mod;
1022 unsigned int wqe_n = 1 << rxq_data->elts_n;
1023 struct mlx5_rxq_obj *tmpl = NULL;
1024 struct mlx5dv_cq cq_info;
1025 struct mlx5dv_rwq rwq;
1027 struct mlx5dv_obj obj;
1030 assert(!rxq_ctrl->obj);
1031 priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_RX_QUEUE;
1032 priv->verbs_alloc_ctx.obj = rxq_ctrl;
1033 tmpl = rte_calloc_socket(__func__, 1, sizeof(*tmpl), 0,
1037 "port %u Rx queue %u cannot allocate verbs resources",
1038 dev->data->port_id, rxq_data->idx);
1042 tmpl->rxq_ctrl = rxq_ctrl;
1043 if (rxq_ctrl->irq) {
1044 tmpl->channel = mlx5_glue->create_comp_channel(priv->sh->ctx);
1045 if (!tmpl->channel) {
1046 DRV_LOG(ERR, "port %u: comp channel creation failure",
1047 dev->data->port_id);
1052 if (mlx5_rxq_mprq_enabled(rxq_data))
1053 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
1056 tmpl->cq = mlx5_ibv_cq_new(dev, priv, rxq_data, cqe_n, tmpl);
1058 DRV_LOG(ERR, "port %u Rx queue %u CQ creation failure",
1059 dev->data->port_id, idx);
1063 DRV_LOG(DEBUG, "port %u device_attr.max_qp_wr is %d",
1064 dev->data->port_id, priv->sh->device_attr.orig_attr.max_qp_wr);
1065 DRV_LOG(DEBUG, "port %u device_attr.max_sge is %d",
1066 dev->data->port_id, priv->sh->device_attr.orig_attr.max_sge);
1067 tmpl->wq = mlx5_ibv_wq_new(dev, priv, rxq_data, idx, wqe_n, tmpl);
1069 DRV_LOG(ERR, "port %u Rx queue %u WQ creation failure",
1070 dev->data->port_id, idx);
1074 /* Change queue state to ready. */
1075 mod = (struct ibv_wq_attr){
1076 .attr_mask = IBV_WQ_ATTR_STATE,
1077 .wq_state = IBV_WQS_RDY,
1079 ret = mlx5_glue->modify_wq(tmpl->wq, &mod);
1082 "port %u Rx queue %u WQ state to IBV_WQS_RDY failed",
1083 dev->data->port_id, idx);
1087 obj.cq.in = tmpl->cq;
1088 obj.cq.out = &cq_info;
1089 obj.rwq.in = tmpl->wq;
1091 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_CQ | MLX5DV_OBJ_RWQ);
1096 if (cq_info.cqe_size != RTE_CACHE_LINE_SIZE) {
1098 "port %u wrong MLX5_CQE_SIZE environment variable"
1099 " value: it should be set to %u",
1100 dev->data->port_id, RTE_CACHE_LINE_SIZE);
1104 /* Fill the rings. */
1105 rxq_data->wqes = rwq.buf;
1106 rxq_data->rq_db = rwq.dbrec;
1107 rxq_data->cqe_n = log2above(cq_info.cqe_cnt);
1108 rxq_data->cq_db = cq_info.dbrec;
1109 rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)cq_info.buf;
1110 rxq_data->cq_uar = cq_info.cq_uar;
1111 rxq_data->cqn = cq_info.cqn;
1112 rxq_data->cq_arm_sn = 0;
1113 mlx5_rxq_initialize(rxq_data);
1114 rxq_data->cq_ci = 0;
1115 DRV_LOG(DEBUG, "port %u rxq %u updated with %p", dev->data->port_id,
1116 idx, (void *)&tmpl);
1117 rte_atomic32_inc(&tmpl->refcnt);
1118 LIST_INSERT_HEAD(&priv->rxqsobj, tmpl, next);
1119 priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1123 ret = rte_errno; /* Save rte_errno before cleanup. */
1125 claim_zero(mlx5_glue->destroy_wq(tmpl->wq));
1127 claim_zero(mlx5_glue->destroy_cq(tmpl->cq));
1129 claim_zero(mlx5_glue->destroy_comp_channel
1132 rte_errno = ret; /* Restore rte_errno. */
1134 priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1139 * Verify the Rx queue objects list is empty
1142 * Pointer to Ethernet device.
1145 * The number of objects not released.
1148 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1150 struct mlx5_priv *priv = dev->data->dev_private;
1152 struct mlx5_rxq_obj *rxq_obj;
1154 LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1155 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1156 dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1163 * Callback function to initialize mbufs for Multi-Packet RQ.
1166 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg __rte_unused,
1167 void *_m, unsigned int i __rte_unused)
1169 struct mlx5_mprq_buf *buf = _m;
1171 memset(_m, 0, sizeof(*buf));
1173 rte_atomic16_set(&buf->refcnt, 1);
1177 * Free mempool of Multi-Packet RQ.
1180 * Pointer to Ethernet device.
1183 * 0 on success, negative errno value on failure.
1186 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1188 struct mlx5_priv *priv = dev->data->dev_private;
1189 struct rte_mempool *mp = priv->mprq_mp;
1194 DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1195 dev->data->port_id, mp->name);
1197 * If a buffer in the pool has been externally attached to a mbuf and it
1198 * is still in use by application, destroying the Rx queue can spoil
1199 * the packet. It is unlikely to happen but if application dynamically
1200 * creates and destroys with holding Rx packets, this can happen.
1202 * TODO: It is unavoidable for now because the mempool for Multi-Packet
1203 * RQ isn't provided by application but managed by PMD.
1205 if (!rte_mempool_full(mp)) {
1207 "port %u mempool for Multi-Packet RQ is still in use",
1208 dev->data->port_id);
1212 rte_mempool_free(mp);
1213 /* Unset mempool for each Rx queue. */
1214 for (i = 0; i != priv->rxqs_n; ++i) {
1215 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1219 rxq->mprq_mp = NULL;
1221 priv->mprq_mp = NULL;
1226 * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1227 * mempool. If already allocated, reuse it if there're enough elements.
1228 * Otherwise, resize it.
1231 * Pointer to Ethernet device.
1234 * 0 on success, negative errno value on failure.
1237 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1239 struct mlx5_priv *priv = dev->data->dev_private;
1240 struct rte_mempool *mp = priv->mprq_mp;
1241 char name[RTE_MEMPOOL_NAMESIZE];
1242 unsigned int desc = 0;
1243 unsigned int buf_len;
1244 unsigned int obj_num;
1245 unsigned int obj_size;
1246 unsigned int strd_num_n = 0;
1247 unsigned int strd_sz_n = 0;
1250 if (!mlx5_mprq_enabled(dev))
1252 /* Count the total number of descriptors configured. */
1253 for (i = 0; i != priv->rxqs_n; ++i) {
1254 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1258 desc += 1 << rxq->elts_n;
1259 /* Get the max number of strides. */
1260 if (strd_num_n < rxq->strd_num_n)
1261 strd_num_n = rxq->strd_num_n;
1262 /* Get the max size of a stride. */
1263 if (strd_sz_n < rxq->strd_sz_n)
1264 strd_sz_n = rxq->strd_sz_n;
1266 assert(strd_num_n && strd_sz_n);
1267 buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1268 obj_size = buf_len + sizeof(struct mlx5_mprq_buf);
1270 * Received packets can be either memcpy'd or externally referenced. In
1271 * case that the packet is attached to an mbuf as an external buffer, as
1272 * it isn't possible to predict how the buffers will be queued by
1273 * application, there's no option to exactly pre-allocate needed buffers
1274 * in advance but to speculatively prepares enough buffers.
1276 * In the data path, if this Mempool is depleted, PMD will try to memcpy
1277 * received packets to buffers provided by application (rxq->mp) until
1278 * this Mempool gets available again.
1281 obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * priv->rxqs_n;
1283 * rte_mempool_create_empty() has sanity check to refuse large cache
1284 * size compared to the number of elements.
1285 * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1286 * constant number 2 instead.
1288 obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1289 /* Check a mempool is already allocated and if it can be resued. */
1290 if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1291 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1292 dev->data->port_id, mp->name);
1295 } else if (mp != NULL) {
1296 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1297 dev->data->port_id, mp->name);
1299 * If failed to free, which means it may be still in use, no way
1300 * but to keep using the existing one. On buffer underrun,
1301 * packets will be memcpy'd instead of external buffer
1304 if (mlx5_mprq_free_mp(dev)) {
1305 if (mp->elt_size >= obj_size)
1311 snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1312 mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1313 0, NULL, NULL, mlx5_mprq_buf_init, NULL,
1314 dev->device->numa_node, 0);
1317 "port %u failed to allocate a mempool for"
1318 " Multi-Packet RQ, count=%u, size=%u",
1319 dev->data->port_id, obj_num, obj_size);
1325 /* Set mempool for each Rx queue. */
1326 for (i = 0; i != priv->rxqs_n; ++i) {
1327 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1333 DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1334 dev->data->port_id);
1339 * Create a DPDK Rx queue.
1342 * Pointer to Ethernet device.
1346 * Number of descriptors to configure in queue.
1348 * NUMA socket on which memory must be allocated.
1351 * A DPDK queue object on success, NULL otherwise and rte_errno is set.
1353 struct mlx5_rxq_ctrl *
1354 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1355 unsigned int socket, const struct rte_eth_rxconf *conf,
1356 struct rte_mempool *mp)
1358 struct mlx5_priv *priv = dev->data->dev_private;
1359 struct mlx5_rxq_ctrl *tmpl;
1360 unsigned int mb_len = rte_pktmbuf_data_room_size(mp);
1361 unsigned int mprq_stride_size;
1362 struct mlx5_dev_config *config = &priv->config;
1364 * Always allocate extra slots, even if eventually
1365 * the vector Rx will not be used.
1368 desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1369 uint64_t offloads = conf->offloads |
1370 dev->data->dev_conf.rxmode.offloads;
1371 const int mprq_en = mlx5_check_mprq_support(dev) > 0;
1373 tmpl = rte_calloc_socket("RXQ", 1,
1375 desc_n * sizeof(struct rte_mbuf *),
1381 if (mlx5_mr_btree_init(&tmpl->rxq.mr_ctrl.cache_bh,
1382 MLX5_MR_BTREE_CACHE_N, socket)) {
1383 /* rte_errno is already set. */
1386 tmpl->socket = socket;
1387 if (dev->data->dev_conf.intr_conf.rxq)
1390 * This Rx queue can be configured as a Multi-Packet RQ if all of the
1391 * following conditions are met:
1392 * - MPRQ is enabled.
1393 * - The number of descs is more than the number of strides.
1394 * - max_rx_pkt_len plus overhead is less than the max size of a
1396 * Otherwise, enable Rx scatter if necessary.
1398 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
1400 dev->data->dev_conf.rxmode.max_rx_pkt_len +
1401 sizeof(struct rte_mbuf_ext_shared_info) +
1402 RTE_PKTMBUF_HEADROOM;
1404 desc > (1U << config->mprq.stride_num_n) &&
1405 mprq_stride_size <= (1U << config->mprq.max_stride_size_n)) {
1406 /* TODO: Rx scatter isn't supported yet. */
1407 tmpl->rxq.sges_n = 0;
1408 /* Trim the number of descs needed. */
1409 desc >>= config->mprq.stride_num_n;
1410 tmpl->rxq.strd_num_n = config->mprq.stride_num_n;
1411 tmpl->rxq.strd_sz_n = RTE_MAX(log2above(mprq_stride_size),
1412 config->mprq.min_stride_size_n);
1413 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1414 tmpl->rxq.mprq_max_memcpy_len =
1415 RTE_MIN(mb_len - RTE_PKTMBUF_HEADROOM,
1416 config->mprq.max_memcpy_len);
1418 "port %u Rx queue %u: Multi-Packet RQ is enabled"
1419 " strd_num_n = %u, strd_sz_n = %u",
1420 dev->data->port_id, idx,
1421 tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1422 } else if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
1423 (mb_len - RTE_PKTMBUF_HEADROOM)) {
1424 tmpl->rxq.sges_n = 0;
1425 } else if (offloads & DEV_RX_OFFLOAD_SCATTER) {
1427 RTE_PKTMBUF_HEADROOM +
1428 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1429 unsigned int sges_n;
1432 * Determine the number of SGEs needed for a full packet
1433 * and round it to the next power of two.
1435 sges_n = log2above((size / mb_len) + !!(size % mb_len));
1436 tmpl->rxq.sges_n = sges_n;
1437 /* Make sure rxq.sges_n did not overflow. */
1438 size = mb_len * (1 << tmpl->rxq.sges_n);
1439 size -= RTE_PKTMBUF_HEADROOM;
1440 if (size < dev->data->dev_conf.rxmode.max_rx_pkt_len) {
1442 "port %u too many SGEs (%u) needed to handle"
1443 " requested maximum packet size %u",
1446 dev->data->dev_conf.rxmode.max_rx_pkt_len);
1447 rte_errno = EOVERFLOW;
1452 "port %u the requested maximum Rx packet size (%u) is"
1453 " larger than a single mbuf (%u) and scattered mode has"
1454 " not been requested",
1456 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1457 mb_len - RTE_PKTMBUF_HEADROOM);
1459 if (mprq_en && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1461 "port %u MPRQ is requested but cannot be enabled"
1462 " (requested: desc = %u, stride_sz = %u,"
1463 " supported: min_stride_num = %u, max_stride_sz = %u).",
1464 dev->data->port_id, desc, mprq_stride_size,
1465 (1 << config->mprq.stride_num_n),
1466 (1 << config->mprq.max_stride_size_n));
1467 DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1468 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1469 if (desc % (1 << tmpl->rxq.sges_n)) {
1471 "port %u number of Rx queue descriptors (%u) is not a"
1472 " multiple of SGEs per packet (%u)",
1475 1 << tmpl->rxq.sges_n);
1479 /* Toggle RX checksum offload if hardware supports it. */
1480 tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);
1481 tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);
1482 /* Configure VLAN stripping. */
1483 tmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
1484 /* By default, FCS (CRC) is stripped by hardware. */
1485 tmpl->rxq.crc_present = 0;
1486 if (offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
1487 if (config->hw_fcs_strip) {
1489 * RQs used for LRO-enabled TIRs should not be
1490 * configured to scatter the FCS.
1492 if (mlx5_lro_on(dev))
1494 "port %u CRC stripping has been "
1495 "disabled but will still be performed "
1496 "by hardware, because LRO is enabled",
1497 dev->data->port_id);
1499 tmpl->rxq.crc_present = 1;
1502 "port %u CRC stripping has been disabled but will"
1503 " still be performed by hardware, make sure MLNX_OFED"
1504 " and firmware are up to date",
1505 dev->data->port_id);
1509 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1510 " incoming frames to hide it",
1512 tmpl->rxq.crc_present ? "disabled" : "enabled",
1513 tmpl->rxq.crc_present << 2);
1515 tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1516 (!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
1517 tmpl->rxq.port_id = dev->data->port_id;
1520 tmpl->rxq.elts_n = log2above(desc);
1521 tmpl->rxq.rq_repl_thresh =
1522 MLX5_VPMD_RXQ_RPLNSH_THRESH(1 << tmpl->rxq.elts_n);
1524 (struct rte_mbuf *(*)[1 << tmpl->rxq.elts_n])(tmpl + 1);
1526 tmpl->rxq.uar_lock_cq = &priv->uar_lock_cq;
1528 tmpl->rxq.idx = idx;
1529 rte_atomic32_inc(&tmpl->refcnt);
1530 LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1541 * Pointer to Ethernet device.
1546 * A pointer to the queue if it exists, NULL otherwise.
1548 struct mlx5_rxq_ctrl *
1549 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1551 struct mlx5_priv *priv = dev->data->dev_private;
1552 struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1554 if ((*priv->rxqs)[idx]) {
1555 rxq_ctrl = container_of((*priv->rxqs)[idx],
1556 struct mlx5_rxq_ctrl,
1558 mlx5_rxq_obj_get(dev, idx);
1559 rte_atomic32_inc(&rxq_ctrl->refcnt);
1565 * Release a Rx queue.
1568 * Pointer to Ethernet device.
1573 * 1 while a reference on it exists, 0 when freed.
1576 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1578 struct mlx5_priv *priv = dev->data->dev_private;
1579 struct mlx5_rxq_ctrl *rxq_ctrl;
1581 if (!(*priv->rxqs)[idx])
1583 rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1584 assert(rxq_ctrl->priv);
1585 if (rxq_ctrl->obj && !mlx5_rxq_obj_release(rxq_ctrl->obj))
1586 rxq_ctrl->obj = NULL;
1587 if (rte_atomic32_dec_and_test(&rxq_ctrl->refcnt)) {
1588 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1589 LIST_REMOVE(rxq_ctrl, next);
1591 (*priv->rxqs)[idx] = NULL;
1598 * Verify the Rx Queue list is empty
1601 * Pointer to Ethernet device.
1604 * The number of object not released.
1607 mlx5_rxq_verify(struct rte_eth_dev *dev)
1609 struct mlx5_priv *priv = dev->data->dev_private;
1610 struct mlx5_rxq_ctrl *rxq_ctrl;
1613 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1614 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1615 dev->data->port_id, rxq_ctrl->rxq.idx);
1622 * Create an indirection table.
1625 * Pointer to Ethernet device.
1627 * Queues entering in the indirection table.
1629 * Number of queues in the array.
1632 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
1634 static struct mlx5_ind_table_obj *
1635 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
1638 struct mlx5_priv *priv = dev->data->dev_private;
1639 struct mlx5_ind_table_obj *ind_tbl;
1640 const unsigned int wq_n = rte_is_power_of_2(queues_n) ?
1641 log2above(queues_n) :
1642 log2above(priv->config.ind_table_max_size);
1643 struct ibv_wq *wq[1 << wq_n];
1647 ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl) +
1648 queues_n * sizeof(uint16_t), 0);
1653 for (i = 0; i != queues_n; ++i) {
1654 struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
1658 wq[i] = rxq->obj->wq;
1659 ind_tbl->queues[i] = queues[i];
1661 ind_tbl->queues_n = queues_n;
1662 /* Finalise indirection table. */
1663 for (j = 0; i != (unsigned int)(1 << wq_n); ++i, ++j)
1665 ind_tbl->ind_table = mlx5_glue->create_rwq_ind_table
1667 &(struct ibv_rwq_ind_table_init_attr){
1668 .log_ind_tbl_size = wq_n,
1672 if (!ind_tbl->ind_table) {
1676 rte_atomic32_inc(&ind_tbl->refcnt);
1677 LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
1681 DEBUG("port %u cannot create indirection table", dev->data->port_id);
1686 * Get an indirection table.
1689 * Pointer to Ethernet device.
1691 * Queues entering in the indirection table.
1693 * Number of queues in the array.
1696 * An indirection table if found.
1698 static struct mlx5_ind_table_obj *
1699 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
1702 struct mlx5_priv *priv = dev->data->dev_private;
1703 struct mlx5_ind_table_obj *ind_tbl;
1705 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1706 if ((ind_tbl->queues_n == queues_n) &&
1707 (memcmp(ind_tbl->queues, queues,
1708 ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1715 rte_atomic32_inc(&ind_tbl->refcnt);
1716 for (i = 0; i != ind_tbl->queues_n; ++i)
1717 mlx5_rxq_get(dev, ind_tbl->queues[i]);
1723 * Release an indirection table.
1726 * Pointer to Ethernet device.
1728 * Indirection table to release.
1731 * 1 while a reference on it exists, 0 when freed.
1734 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
1735 struct mlx5_ind_table_obj *ind_tbl)
1739 if (rte_atomic32_dec_and_test(&ind_tbl->refcnt))
1740 claim_zero(mlx5_glue->destroy_rwq_ind_table
1741 (ind_tbl->ind_table));
1742 for (i = 0; i != ind_tbl->queues_n; ++i)
1743 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1744 if (!rte_atomic32_read(&ind_tbl->refcnt)) {
1745 LIST_REMOVE(ind_tbl, next);
1753 * Verify the Rx Queue list is empty
1756 * Pointer to Ethernet device.
1759 * The number of object not released.
1762 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
1764 struct mlx5_priv *priv = dev->data->dev_private;
1765 struct mlx5_ind_table_obj *ind_tbl;
1768 LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1770 "port %u indirection table obj %p still referenced",
1771 dev->data->port_id, (void *)ind_tbl);
1778 * Create an Rx Hash queue.
1781 * Pointer to Ethernet device.
1783 * RSS key for the Rx hash queue.
1784 * @param rss_key_len
1786 * @param hash_fields
1787 * Verbs protocol hash field to make the RSS on.
1789 * Queues entering in hash queue. In case of empty hash_fields only the
1790 * first queue index will be taken for the indirection table.
1797 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
1800 mlx5_hrxq_new(struct rte_eth_dev *dev,
1801 const uint8_t *rss_key, uint32_t rss_key_len,
1802 uint64_t hash_fields,
1803 const uint16_t *queues, uint32_t queues_n,
1804 int tunnel __rte_unused)
1806 struct mlx5_priv *priv = dev->data->dev_private;
1807 struct mlx5_hrxq *hrxq;
1808 struct mlx5_ind_table_obj *ind_tbl;
1810 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1811 struct mlx5dv_qp_init_attr qp_init_attr;
1815 queues_n = hash_fields ? queues_n : 1;
1816 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
1818 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n);
1823 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1824 memset(&qp_init_attr, 0, sizeof(qp_init_attr));
1826 qp_init_attr.comp_mask =
1827 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS;
1828 qp_init_attr.create_flags = MLX5DV_QP_CREATE_TUNNEL_OFFLOADS;
1830 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1831 if (dev->data->dev_conf.lpbk_mode) {
1832 /* Allow packet sent from NIC loop back w/o source MAC check. */
1833 qp_init_attr.comp_mask |=
1834 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS;
1835 qp_init_attr.create_flags |=
1836 MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC;
1839 qp = mlx5_glue->dv_create_qp
1841 &(struct ibv_qp_init_attr_ex){
1842 .qp_type = IBV_QPT_RAW_PACKET,
1844 IBV_QP_INIT_ATTR_PD |
1845 IBV_QP_INIT_ATTR_IND_TABLE |
1846 IBV_QP_INIT_ATTR_RX_HASH,
1847 .rx_hash_conf = (struct ibv_rx_hash_conf){
1848 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1849 .rx_hash_key_len = rss_key_len,
1850 .rx_hash_key = (void *)(uintptr_t)rss_key,
1851 .rx_hash_fields_mask = hash_fields,
1853 .rwq_ind_tbl = ind_tbl->ind_table,
1858 qp = mlx5_glue->create_qp_ex
1860 &(struct ibv_qp_init_attr_ex){
1861 .qp_type = IBV_QPT_RAW_PACKET,
1863 IBV_QP_INIT_ATTR_PD |
1864 IBV_QP_INIT_ATTR_IND_TABLE |
1865 IBV_QP_INIT_ATTR_RX_HASH,
1866 .rx_hash_conf = (struct ibv_rx_hash_conf){
1867 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1868 .rx_hash_key_len = rss_key_len,
1869 .rx_hash_key = (void *)(uintptr_t)rss_key,
1870 .rx_hash_fields_mask = hash_fields,
1872 .rwq_ind_tbl = ind_tbl->ind_table,
1880 hrxq = rte_calloc(__func__, 1, sizeof(*hrxq) + rss_key_len, 0);
1883 hrxq->ind_table = ind_tbl;
1885 hrxq->rss_key_len = rss_key_len;
1886 hrxq->hash_fields = hash_fields;
1887 memcpy(hrxq->rss_key, rss_key, rss_key_len);
1888 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1889 hrxq->action = mlx5_glue->dv_create_flow_action_dest_ibv_qp(hrxq->qp);
1890 if (!hrxq->action) {
1895 rte_atomic32_inc(&hrxq->refcnt);
1896 LIST_INSERT_HEAD(&priv->hrxqs, hrxq, next);
1899 err = rte_errno; /* Save rte_errno before cleanup. */
1900 mlx5_ind_table_obj_release(dev, ind_tbl);
1902 claim_zero(mlx5_glue->destroy_qp(qp));
1903 rte_errno = err; /* Restore rte_errno. */
1908 * Get an Rx Hash queue.
1911 * Pointer to Ethernet device.
1913 * RSS configuration for the Rx hash queue.
1915 * Queues entering in hash queue. In case of empty hash_fields only the
1916 * first queue index will be taken for the indirection table.
1921 * An hash Rx queue on success.
1924 mlx5_hrxq_get(struct rte_eth_dev *dev,
1925 const uint8_t *rss_key, uint32_t rss_key_len,
1926 uint64_t hash_fields,
1927 const uint16_t *queues, uint32_t queues_n)
1929 struct mlx5_priv *priv = dev->data->dev_private;
1930 struct mlx5_hrxq *hrxq;
1932 queues_n = hash_fields ? queues_n : 1;
1933 LIST_FOREACH(hrxq, &priv->hrxqs, next) {
1934 struct mlx5_ind_table_obj *ind_tbl;
1936 if (hrxq->rss_key_len != rss_key_len)
1938 if (memcmp(hrxq->rss_key, rss_key, rss_key_len))
1940 if (hrxq->hash_fields != hash_fields)
1942 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
1945 if (ind_tbl != hrxq->ind_table) {
1946 mlx5_ind_table_obj_release(dev, ind_tbl);
1949 rte_atomic32_inc(&hrxq->refcnt);
1956 * Release the hash Rx queue.
1959 * Pointer to Ethernet device.
1961 * Pointer to Hash Rx queue to release.
1964 * 1 while a reference on it exists, 0 when freed.
1967 mlx5_hrxq_release(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
1969 if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
1970 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1971 mlx5_glue->destroy_flow_action(hrxq->action);
1973 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
1974 mlx5_ind_table_obj_release(dev, hrxq->ind_table);
1975 LIST_REMOVE(hrxq, next);
1979 claim_nonzero(mlx5_ind_table_obj_release(dev, hrxq->ind_table));
1984 * Verify the Rx Queue list is empty
1987 * Pointer to Ethernet device.
1990 * The number of object not released.
1993 mlx5_hrxq_verify(struct rte_eth_dev *dev)
1995 struct mlx5_priv *priv = dev->data->dev_private;
1996 struct mlx5_hrxq *hrxq;
1999 LIST_FOREACH(hrxq, &priv->hrxqs, next) {
2001 "port %u hash Rx queue %p still referenced",
2002 dev->data->port_id, (void *)hrxq);
2009 * Create a drop Rx queue Verbs/DevX object.
2012 * Pointer to Ethernet device.
2015 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
2017 static struct mlx5_rxq_obj *
2018 mlx5_rxq_obj_drop_new(struct rte_eth_dev *dev)
2020 struct mlx5_priv *priv = dev->data->dev_private;
2021 struct ibv_context *ctx = priv->sh->ctx;
2023 struct ibv_wq *wq = NULL;
2024 struct mlx5_rxq_obj *rxq;
2026 if (priv->drop_queue.rxq)
2027 return priv->drop_queue.rxq;
2028 cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
2030 DEBUG("port %u cannot allocate CQ for drop queue",
2031 dev->data->port_id);
2035 wq = mlx5_glue->create_wq(ctx,
2036 &(struct ibv_wq_init_attr){
2037 .wq_type = IBV_WQT_RQ,
2044 DEBUG("port %u cannot allocate WQ for drop queue",
2045 dev->data->port_id);
2049 rxq = rte_calloc(__func__, 1, sizeof(*rxq), 0);
2051 DEBUG("port %u cannot allocate drop Rx queue memory",
2052 dev->data->port_id);
2058 priv->drop_queue.rxq = rxq;
2062 claim_zero(mlx5_glue->destroy_wq(wq));
2064 claim_zero(mlx5_glue->destroy_cq(cq));
2069 * Release a drop Rx queue Verbs/DevX object.
2072 * Pointer to Ethernet device.
2075 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
2078 mlx5_rxq_obj_drop_release(struct rte_eth_dev *dev)
2080 struct mlx5_priv *priv = dev->data->dev_private;
2081 struct mlx5_rxq_obj *rxq = priv->drop_queue.rxq;
2084 claim_zero(mlx5_glue->destroy_wq(rxq->wq));
2086 claim_zero(mlx5_glue->destroy_cq(rxq->cq));
2088 priv->drop_queue.rxq = NULL;
2092 * Create a drop indirection table.
2095 * Pointer to Ethernet device.
2098 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
2100 static struct mlx5_ind_table_obj *
2101 mlx5_ind_table_obj_drop_new(struct rte_eth_dev *dev)
2103 struct mlx5_priv *priv = dev->data->dev_private;
2104 struct mlx5_ind_table_obj *ind_tbl;
2105 struct mlx5_rxq_obj *rxq;
2106 struct mlx5_ind_table_obj tmpl;
2108 rxq = mlx5_rxq_obj_drop_new(dev);
2111 tmpl.ind_table = mlx5_glue->create_rwq_ind_table
2113 &(struct ibv_rwq_ind_table_init_attr){
2114 .log_ind_tbl_size = 0,
2115 .ind_tbl = &rxq->wq,
2118 if (!tmpl.ind_table) {
2119 DEBUG("port %u cannot allocate indirection table for drop"
2121 dev->data->port_id);
2125 ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl), 0);
2130 ind_tbl->ind_table = tmpl.ind_table;
2133 mlx5_rxq_obj_drop_release(dev);
2138 * Release a drop indirection table.
2141 * Pointer to Ethernet device.
2144 mlx5_ind_table_obj_drop_release(struct rte_eth_dev *dev)
2146 struct mlx5_priv *priv = dev->data->dev_private;
2147 struct mlx5_ind_table_obj *ind_tbl = priv->drop_queue.hrxq->ind_table;
2149 claim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table));
2150 mlx5_rxq_obj_drop_release(dev);
2152 priv->drop_queue.hrxq->ind_table = NULL;
2156 * Create a drop Rx Hash queue.
2159 * Pointer to Ethernet device.
2162 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
2165 mlx5_hrxq_drop_new(struct rte_eth_dev *dev)
2167 struct mlx5_priv *priv = dev->data->dev_private;
2168 struct mlx5_ind_table_obj *ind_tbl;
2170 struct mlx5_hrxq *hrxq;
2172 if (priv->drop_queue.hrxq) {
2173 rte_atomic32_inc(&priv->drop_queue.hrxq->refcnt);
2174 return priv->drop_queue.hrxq;
2176 ind_tbl = mlx5_ind_table_obj_drop_new(dev);
2179 qp = mlx5_glue->create_qp_ex(priv->sh->ctx,
2180 &(struct ibv_qp_init_attr_ex){
2181 .qp_type = IBV_QPT_RAW_PACKET,
2183 IBV_QP_INIT_ATTR_PD |
2184 IBV_QP_INIT_ATTR_IND_TABLE |
2185 IBV_QP_INIT_ATTR_RX_HASH,
2186 .rx_hash_conf = (struct ibv_rx_hash_conf){
2188 IBV_RX_HASH_FUNC_TOEPLITZ,
2189 .rx_hash_key_len = MLX5_RSS_HASH_KEY_LEN,
2190 .rx_hash_key = rss_hash_default_key,
2191 .rx_hash_fields_mask = 0,
2193 .rwq_ind_tbl = ind_tbl->ind_table,
2197 DEBUG("port %u cannot allocate QP for drop queue",
2198 dev->data->port_id);
2202 hrxq = rte_calloc(__func__, 1, sizeof(*hrxq), 0);
2205 "port %u cannot allocate memory for drop queue",
2206 dev->data->port_id);
2210 hrxq->ind_table = ind_tbl;
2212 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2213 hrxq->action = mlx5_glue->dv_create_flow_action_dest_ibv_qp(hrxq->qp);
2214 if (!hrxq->action) {
2219 priv->drop_queue.hrxq = hrxq;
2220 rte_atomic32_set(&hrxq->refcnt, 1);
2224 mlx5_ind_table_obj_drop_release(dev);
2229 * Release a drop hash Rx queue.
2232 * Pointer to Ethernet device.
2235 mlx5_hrxq_drop_release(struct rte_eth_dev *dev)
2237 struct mlx5_priv *priv = dev->data->dev_private;
2238 struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2240 if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
2241 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2242 mlx5_glue->destroy_flow_action(hrxq->action);
2244 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
2245 mlx5_ind_table_obj_drop_release(dev);
2247 priv->drop_queue.hrxq = NULL;