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34 #ifndef RTE_PMD_MLX5_RXTX_H_
35 #define RTE_PMD_MLX5_RXTX_H_
40 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
42 #pragma GCC diagnostic ignored "-pedantic"
44 #include <infiniband/verbs.h>
46 #pragma GCC diagnostic error "-pedantic"
49 /* DPDK headers don't like -pedantic. */
51 #pragma GCC diagnostic ignored "-pedantic"
54 #include <rte_mempool.h>
56 #pragma GCC diagnostic error "-pedantic"
59 #include "mlx5_utils.h"
61 #include "mlx5_defs.h"
65 struct ibv_recv_wr wr; /* Work Request. */
66 struct ibv_sge sge; /* Scatter/Gather Element. */
67 /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
72 /* RX queue descriptor. */
74 struct priv *priv; /* Back pointer to private data. */
75 struct rte_mempool *mp; /* Memory Pool for allocations. */
76 struct ibv_mr *mr; /* Memory Region (for mp). */
77 struct ibv_cq *cq; /* Completion Queue. */
78 struct ibv_qp *qp; /* Queue Pair. */
79 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
80 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
81 /* MAC flow steering rules. */
82 struct ibv_flow *mac_flow[MLX5_MAX_MAC_ADDRESSES];
83 unsigned int port_id; /* Port ID for incoming packets. */
84 unsigned int elts_n; /* (*elts)[] length. */
85 unsigned int elts_head; /* Current index in (*elts)[]. */
87 struct rxq_elt (*no_sp)[]; /* RX elements. */
89 uint32_t mb_len; /* Length of a mp-issued mbuf. */
90 unsigned int socket; /* CPU socket ID for allocations. */
91 struct ibv_exp_res_domain *rd; /* Resource Domain. */
99 /* Linear buffer type. It is used when transmitting buffers with too many
100 * segments that do not fit the hardware queue (see max_send_sge).
101 * Extra segments are copied (linearized) in such buffers, replacing the
102 * last SGE during TX.
103 * The size is arbitrary but large enough to hold a jumbo frame with
104 * 8 segments considering mbuf.buf_len is about 2048 bytes. */
105 typedef uint8_t linear_t[16384];
107 /* TX queue descriptor. */
109 struct priv *priv; /* Back pointer to private data. */
111 struct rte_mempool *mp; /* Cached Memory Pool. */
112 struct ibv_mr *mr; /* Memory Region (for mp). */
113 uint32_t lkey; /* mr->lkey */
114 } mp2mr[MLX5_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
115 struct ibv_cq *cq; /* Completion Queue. */
116 struct ibv_qp *qp; /* Queue Pair. */
117 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
118 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
119 #if MLX5_PMD_MAX_INLINE > 0
120 uint32_t max_inline; /* Max inline send size <= MLX5_PMD_MAX_INLINE. */
122 unsigned int elts_n; /* (*elts)[] length. */
123 struct txq_elt (*elts)[]; /* TX elements. */
124 unsigned int elts_head; /* Current index in (*elts)[]. */
125 unsigned int elts_tail; /* First element awaiting completion. */
126 unsigned int elts_comp; /* Number of completion requests. */
127 unsigned int elts_comp_cd; /* Countdown for next completion request. */
128 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
129 linear_t (*elts_linear)[]; /* Linearized buffers. */
130 struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
131 unsigned int socket; /* CPU socket ID for allocations. */
132 struct ibv_exp_res_domain *rd; /* Resource Domain. */
137 void rxq_cleanup(struct rxq *);
138 int rxq_setup(struct rte_eth_dev *, struct rxq *, uint16_t, unsigned int,
139 const struct rte_eth_rxconf *, struct rte_mempool *);
140 int mlx5_rx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int,
141 const struct rte_eth_rxconf *, struct rte_mempool *);
142 void mlx5_rx_queue_release(void *);
146 void txq_cleanup(struct txq *);
147 int mlx5_tx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int,
148 const struct rte_eth_txconf *);
149 void mlx5_tx_queue_release(void *);
153 uint16_t mlx5_tx_burst(void *, struct rte_mbuf **, uint16_t);
154 uint16_t mlx5_rx_burst(void *, struct rte_mbuf **, uint16_t);
155 uint16_t removed_tx_burst(void *, struct rte_mbuf **, uint16_t);
156 uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
158 #endif /* RTE_PMD_MLX5_RXTX_H_ */