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34 #ifndef RTE_PMD_MLX5_RXTX_H_
35 #define RTE_PMD_MLX5_RXTX_H_
41 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
43 #pragma GCC diagnostic ignored "-pedantic"
45 #include <infiniband/verbs.h>
47 #pragma GCC diagnostic error "-pedantic"
50 /* DPDK headers don't like -pedantic. */
52 #pragma GCC diagnostic ignored "-pedantic"
55 #include <rte_mempool.h>
57 #pragma GCC diagnostic error "-pedantic"
60 #include "mlx5_utils.h"
62 #include "mlx5_autoconf.h"
63 #include "mlx5_defs.h"
65 struct mlx5_rxq_stats {
66 unsigned int idx; /**< Mapping index. */
67 #ifdef MLX5_PMD_SOFT_COUNTERS
68 uint64_t ipackets; /**< Total of successfully received packets. */
69 uint64_t ibytes; /**< Total of successfully received bytes. */
71 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
72 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
75 struct mlx5_txq_stats {
76 unsigned int idx; /**< Mapping index. */
77 #ifdef MLX5_PMD_SOFT_COUNTERS
78 uint64_t opackets; /**< Total of successfully sent packets. */
79 uint64_t obytes; /**< Total of successfully sent bytes. */
81 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
86 struct ibv_sge sge; /* Scatter/Gather Element. */
87 struct rte_mbuf *buf; /* SGE buffer. */
90 /* Flow director queue structure. */
92 struct ibv_qp *qp; /* Associated RX QP. */
93 struct ibv_exp_rwq_ind_table *ind_table; /* Indirection table. */
98 /* RX queue descriptor. */
100 struct priv *priv; /* Back pointer to private data. */
101 struct rte_mempool *mp; /* Memory Pool for allocations. */
102 struct ibv_cq *cq; /* Completion Queue. */
103 struct ibv_exp_wq *wq; /* Work Queue. */
104 int32_t (*poll)(); /* Verbs poll function. */
105 int32_t (*recv)(); /* Verbs receive function. */
106 unsigned int port_id; /* Port ID for incoming packets. */
107 unsigned int elts_n; /* (*elts)[] length. */
108 unsigned int elts_head; /* Current index in (*elts)[]. */
109 unsigned int csum:1; /* Enable checksum offloading. */
110 unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
111 unsigned int vlan_strip:1; /* Enable VLAN stripping. */
112 unsigned int crc_present:1; /* CRC must be subtracted. */
113 struct rxq_elt (*elts)[]; /* RX elements. */
114 struct mlx5_rxq_stats stats; /* RX queue counters. */
115 } __rte_cache_aligned;
117 /* RX queue control descriptor. */
119 struct ibv_exp_res_domain *rd; /* Resource Domain. */
120 struct fdir_queue fdir_queue; /* Flow director queue. */
121 struct ibv_mr *mr; /* Memory Region (for mp). */
122 struct ibv_exp_wq_family *if_wq; /* WQ burst interface. */
123 struct ibv_exp_cq_family_v1 *if_cq; /* CQ interface. */
124 unsigned int socket; /* CPU socket ID for allocations. */
125 struct rxq rxq; /* Data path structure. */
128 /* Hash RX queue types. */
139 /* Flow structure with Ethernet specification. It is packed to prevent padding
140 * between attr and spec as this layout is expected by libibverbs. */
141 struct flow_attr_spec_eth {
142 struct ibv_exp_flow_attr attr;
143 struct ibv_exp_flow_spec_eth spec;
144 } __attribute__((packed));
146 /* Define a struct flow_attr_spec_eth object as an array of at least
147 * "size" bytes. Room after the first index is normally used to store
148 * extra flow specifications. */
149 #define FLOW_ATTR_SPEC_ETH(name, size) \
150 struct flow_attr_spec_eth name \
151 [((size) / sizeof(struct flow_attr_spec_eth)) + \
152 !!((size) % sizeof(struct flow_attr_spec_eth))]
154 /* Initialization data for hash RX queue. */
155 struct hash_rxq_init {
156 uint64_t hash_fields; /* Fields that participate in the hash. */
157 uint64_t dpdk_rss_hf; /* Matching DPDK RSS hash fields. */
158 unsigned int flow_priority; /* Flow priority to use. */
161 enum ibv_exp_flow_spec_type type;
164 struct ibv_exp_flow_spec_tcp_udp tcp_udp;
165 struct ibv_exp_flow_spec_ipv4 ipv4;
166 struct ibv_exp_flow_spec_ipv6 ipv6;
167 struct ibv_exp_flow_spec_eth eth;
168 } flow_spec; /* Flow specification template. */
169 const struct hash_rxq_init *underlayer; /* Pointer to underlayer. */
172 /* Initialization data for indirection table. */
173 struct ind_table_init {
174 unsigned int max_size; /* Maximum number of WQs. */
175 /* Hash RX queues using this table. */
176 unsigned int hash_types;
177 unsigned int hash_types_n;
180 /* Initialization data for special flows. */
181 struct special_flow_init {
182 uint8_t dst_mac_val[6];
183 uint8_t dst_mac_mask[6];
184 unsigned int hash_types;
185 unsigned int per_vlan:1;
188 enum hash_rxq_flow_type {
189 HASH_RXQ_FLOW_TYPE_PROMISC,
190 HASH_RXQ_FLOW_TYPE_ALLMULTI,
191 HASH_RXQ_FLOW_TYPE_BROADCAST,
192 HASH_RXQ_FLOW_TYPE_IPV6MULTI,
193 HASH_RXQ_FLOW_TYPE_MAC,
197 static inline const char *
198 hash_rxq_flow_type_str(enum hash_rxq_flow_type flow_type)
201 case HASH_RXQ_FLOW_TYPE_PROMISC:
202 return "promiscuous";
203 case HASH_RXQ_FLOW_TYPE_ALLMULTI:
204 return "allmulticast";
205 case HASH_RXQ_FLOW_TYPE_BROADCAST:
207 case HASH_RXQ_FLOW_TYPE_IPV6MULTI:
208 return "IPv6 multicast";
209 case HASH_RXQ_FLOW_TYPE_MAC:
217 struct priv *priv; /* Back pointer to private data. */
218 struct ibv_qp *qp; /* Hash RX QP. */
219 enum hash_rxq_type type; /* Hash RX queue type. */
220 /* MAC flow steering rules, one per VLAN ID. */
221 struct ibv_exp_flow *mac_flow
222 [MLX5_MAX_MAC_ADDRESSES][MLX5_MAX_VLAN_IDS];
223 struct ibv_exp_flow *special_flow
224 [MLX5_MAX_SPECIAL_FLOWS][MLX5_MAX_VLAN_IDS];
229 struct rte_mbuf *buf;
232 /* TX queue descriptor. */
234 struct priv *priv; /* Back pointer to private data. */
235 int32_t (*poll_cnt)(struct ibv_cq *cq, uint32_t max);
236 int (*send_pending)();
237 #ifdef HAVE_VERBS_VLAN_INSERTION
238 int (*send_pending_vlan)();
240 int (*send_flush)(struct ibv_qp *qp);
241 struct ibv_cq *cq; /* Completion Queue. */
242 struct ibv_qp *qp; /* Queue Pair. */
243 struct txq_elt (*elts)[]; /* TX elements. */
244 unsigned int elts_n; /* (*elts)[] length. */
245 unsigned int elts_head; /* Current index in (*elts)[]. */
246 unsigned int elts_tail; /* First element awaiting completion. */
247 unsigned int elts_comp; /* Number of completion requests. */
248 unsigned int elts_comp_cd; /* Countdown for next completion request. */
249 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
251 const struct rte_mempool *mp; /* Cached Memory Pool. */
252 struct ibv_mr *mr; /* Memory Region (for mp). */
253 uint32_t lkey; /* mr->lkey */
254 } mp2mr[MLX5_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
255 struct mlx5_txq_stats stats; /* TX queue counters. */
256 } __rte_cache_aligned;
258 /* TX queue control descriptor. */
260 #ifdef HAVE_VERBS_VLAN_INSERTION
261 struct ibv_exp_qp_burst_family_v1 *if_qp; /* QP burst interface. */
263 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
265 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
266 struct ibv_exp_res_domain *rd; /* Resource Domain. */
267 unsigned int socket; /* CPU socket ID for allocations. */
268 struct txq txq; /* Data path structure. */
273 extern const struct hash_rxq_init hash_rxq_init[];
274 extern const unsigned int hash_rxq_init_n;
276 extern uint8_t rss_hash_default_key[];
277 extern const size_t rss_hash_default_key_len;
279 size_t priv_flow_attr(struct priv *, struct ibv_exp_flow_attr *,
280 size_t, enum hash_rxq_type);
281 int priv_create_hash_rxqs(struct priv *);
282 void priv_destroy_hash_rxqs(struct priv *);
283 int priv_allow_flow_type(struct priv *, enum hash_rxq_flow_type);
284 int priv_rehash_flows(struct priv *);
285 void rxq_cleanup(struct rxq_ctrl *);
286 int rxq_rehash(struct rte_eth_dev *, struct rxq_ctrl *);
287 int rxq_setup(struct rte_eth_dev *, struct rxq_ctrl *, uint16_t, unsigned int,
288 const struct rte_eth_rxconf *, struct rte_mempool *);
289 int mlx5_rx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int,
290 const struct rte_eth_rxconf *, struct rte_mempool *);
291 void mlx5_rx_queue_release(void *);
292 uint16_t mlx5_rx_burst_secondary_setup(void *, struct rte_mbuf **, uint16_t);
296 void txq_cleanup(struct txq_ctrl *);
297 int txq_setup(struct rte_eth_dev *, struct txq_ctrl *, uint16_t, unsigned int,
298 const struct rte_eth_txconf *);
299 int mlx5_tx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int,
300 const struct rte_eth_txconf *);
301 void mlx5_tx_queue_release(void *);
302 uint16_t mlx5_tx_burst_secondary_setup(void *, struct rte_mbuf **, uint16_t);
306 uint16_t mlx5_tx_burst(void *, struct rte_mbuf **, uint16_t);
307 uint16_t mlx5_rx_burst(void *, struct rte_mbuf **, uint16_t);
308 uint16_t removed_tx_burst(void *, struct rte_mbuf **, uint16_t);
309 uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
313 struct ibv_mr *mlx5_mp2mr(struct ibv_pd *, struct rte_mempool *);
314 void txq_mp2mr_iter(struct rte_mempool *, void *);
315 uint32_t txq_mp2mr_reg(struct txq *, struct rte_mempool *, unsigned int);
317 #endif /* RTE_PMD_MLX5_RXTX_H_ */