4 * Copyright 2017 6WIND S.A.
5 * Copyright 2017 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
42 #pragma GCC diagnostic ignored "-Wpedantic"
44 #include <infiniband/verbs.h>
45 #include <infiniband/mlx5dv.h>
47 #pragma GCC diagnostic error "-Wpedantic"
51 #include <rte_mempool.h>
52 #include <rte_prefetch.h>
55 #include "mlx5_utils.h"
56 #include "mlx5_rxtx.h"
57 #include "mlx5_rxtx_vec.h"
58 #include "mlx5_autoconf.h"
59 #include "mlx5_defs.h"
62 #if defined RTE_ARCH_X86_64
63 #include "mlx5_rxtx_vec_sse.h"
64 #elif defined RTE_ARCH_ARM64
65 #include "mlx5_rxtx_vec_neon.h"
67 #error "This should not be compiled if SIMD instructions are not supported."
71 * Count the number of packets having same ol_flags and calculate cs_flags.
74 * Pointer to TX queue structure.
76 * Pointer to array of packets.
80 * Pointer of flags to be returned.
83 * Number of packets having same ol_flags.
85 static inline unsigned int
86 txq_calc_offload(struct mlx5_txq_data *txq, struct rte_mbuf **pkts,
87 uint16_t pkts_n, uint8_t *cs_flags)
90 const uint64_t ol_mask =
91 PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM |
92 PKT_TX_UDP_CKSUM | PKT_TX_TUNNEL_GRE |
93 PKT_TX_TUNNEL_VXLAN | PKT_TX_OUTER_IP_CKSUM;
97 /* Count the number of packets having same ol_flags. */
98 for (pos = 1; pos < pkts_n; ++pos)
99 if ((pkts[pos]->ol_flags ^ pkts[0]->ol_flags) & ol_mask)
101 *cs_flags = txq_ol_cksum_to_cs(txq, pkts[0]);
106 * DPDK callback for vectorized TX.
109 * Generic pointer to TX queue structure.
111 * Packets to transmit.
113 * Number of packets in array.
116 * Number of packets successfully transmitted (<= pkts_n).
119 mlx5_tx_burst_raw_vec(void *dpdk_txq, struct rte_mbuf **pkts,
122 struct mlx5_txq_data *txq = (struct mlx5_txq_data *)dpdk_txq;
125 while (pkts_n > nb_tx) {
129 n = RTE_MIN((uint16_t)(pkts_n - nb_tx), MLX5_VPMD_TX_MAX_BURST);
130 ret = txq_burst_v(txq, &pkts[nb_tx], n, 0);
139 * DPDK callback for vectorized TX with multi-seg packets and offload.
142 * Generic pointer to TX queue structure.
144 * Packets to transmit.
146 * Number of packets in array.
149 * Number of packets successfully transmitted (<= pkts_n).
152 mlx5_tx_burst_vec(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
154 struct mlx5_txq_data *txq = (struct mlx5_txq_data *)dpdk_txq;
157 while (pkts_n > nb_tx) {
158 uint8_t cs_flags = 0;
162 /* Transmit multi-seg packets in the head of pkts list. */
163 if (!(txq->flags & ETH_TXQ_FLAGS_NOMULTSEGS) &&
164 NB_SEGS(pkts[nb_tx]) > 1)
165 nb_tx += txq_scatter_v(txq,
168 n = RTE_MIN((uint16_t)(pkts_n - nb_tx), MLX5_VPMD_TX_MAX_BURST);
169 if (!(txq->flags & ETH_TXQ_FLAGS_NOMULTSEGS))
170 n = txq_count_contig_single_seg(&pkts[nb_tx], n);
171 if (!(txq->flags & ETH_TXQ_FLAGS_NOOFFLOADS))
172 n = txq_calc_offload(txq, &pkts[nb_tx], n, &cs_flags);
173 ret = txq_burst_v(txq, &pkts[nb_tx], n, cs_flags);
182 * Skip error packets.
185 * Pointer to RX queue structure.
187 * Array to store received packets.
189 * Maximum number of packets in array.
192 * Number of packets successfully received (<= pkts_n).
195 rxq_handle_pending_error(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts,
200 #ifdef MLX5_PMD_SOFT_COUNTERS
201 uint32_t err_bytes = 0;
204 for (i = 0; i < pkts_n; ++i) {
205 struct rte_mbuf *pkt = pkts[i];
207 if (pkt->packet_type == RTE_PTYPE_ALL_MASK) {
208 #ifdef MLX5_PMD_SOFT_COUNTERS
209 err_bytes += PKT_LEN(pkt);
211 rte_pktmbuf_free_seg(pkt);
216 rxq->stats.idropped += (pkts_n - n);
217 #ifdef MLX5_PMD_SOFT_COUNTERS
218 /* Correct counters of errored completions. */
219 rxq->stats.ipackets -= (pkts_n - n);
220 rxq->stats.ibytes -= err_bytes;
222 rxq->pending_err = 0;
227 * DPDK callback for vectorized RX.
230 * Generic pointer to RX queue structure.
232 * Array to store received packets.
234 * Maximum number of packets in array.
237 * Number of packets successfully received (<= pkts_n).
240 mlx5_rx_burst_vec(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
242 struct mlx5_rxq_data *rxq = dpdk_rxq;
245 nb_rx = rxq_burst_v(rxq, pkts, pkts_n);
246 if (unlikely(rxq->pending_err))
247 nb_rx = rxq_handle_pending_error(rxq, pkts, nb_rx);
252 * Check Tx queue flags are set for raw vectorized Tx.
255 * Pointer to private structure.
258 * 1 if supported, negative errno value if not.
260 int __attribute__((cold))
261 priv_check_raw_vec_tx_support(struct priv *priv)
265 /* All the configured queues should support. */
266 for (i = 0; i < priv->txqs_n; ++i) {
267 struct mlx5_txq_data *txq = (*priv->txqs)[i];
269 if (!(txq->flags & ETH_TXQ_FLAGS_NOMULTSEGS) ||
270 !(txq->flags & ETH_TXQ_FLAGS_NOOFFLOADS))
273 if (i != priv->txqs_n)
279 * Check a device can support vectorized TX.
282 * Pointer to private structure.
285 * 1 if supported, negative errno value if not.
287 int __attribute__((cold))
288 priv_check_vec_tx_support(struct priv *priv)
290 if (!priv->tx_vec_en ||
291 priv->txqs_n > MLX5_VPMD_MIN_TXQS ||
292 priv->mps != MLX5_MPW_ENHANCED ||
299 * Check a RX queue can support vectorized RX.
302 * Pointer to RX queue.
305 * 1 if supported, negative errno value if not.
307 int __attribute__((cold))
308 rxq_check_vec_support(struct mlx5_rxq_data *rxq)
310 struct mlx5_rxq_ctrl *ctrl =
311 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
313 if (!ctrl->priv->rx_vec_en || rxq->sges_n != 0)
319 * Check a device can support vectorized RX.
322 * Pointer to private structure.
325 * 1 if supported, negative errno value if not.
327 int __attribute__((cold))
328 priv_check_vec_rx_support(struct priv *priv)
332 if (!priv->rx_vec_en)
334 /* All the configured queues should support. */
335 for (i = 0; i < priv->rxqs_n; ++i) {
336 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
340 if (rxq_check_vec_support(rxq) < 0)
343 if (i != priv->rxqs_n)