net/dpaa: support FMCless mode
[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx_vec_sse.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2017 6WIND S.A.
3  * Copyright 2017 Mellanox Technologies, Ltd
4  */
5
6 #ifndef RTE_PMD_MLX5_RXTX_VEC_SSE_H_
7 #define RTE_PMD_MLX5_RXTX_VEC_SSE_H_
8
9 #include <stdint.h>
10 #include <string.h>
11 #include <stdlib.h>
12 #include <smmintrin.h>
13
14 #include <rte_mbuf.h>
15 #include <rte_mempool.h>
16 #include <rte_prefetch.h>
17
18 #include <mlx5_prm.h>
19
20 #include "mlx5_defs.h"
21 #include "mlx5.h"
22 #include "mlx5_utils.h"
23 #include "mlx5_rxtx.h"
24 #include "mlx5_rxtx_vec.h"
25 #include "mlx5_autoconf.h"
26
27 #ifndef __INTEL_COMPILER
28 #pragma GCC diagnostic ignored "-Wcast-qual"
29 #endif
30
31 /**
32  * Store free buffers to RX SW ring.
33  *
34  * @param rxq
35  *   Pointer to RX queue structure.
36  * @param pkts
37  *   Pointer to array of packets to be stored.
38  * @param pkts_n
39  *   Number of packets to be stored.
40  */
41 static inline void
42 rxq_copy_mbuf_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t n)
43 {
44         const uint16_t q_mask = (1 << rxq->elts_n) - 1;
45         struct rte_mbuf **elts = &(*rxq->elts)[rxq->rq_pi & q_mask];
46         unsigned int pos;
47         uint16_t p = n & -2;
48
49         for (pos = 0; pos < p; pos += 2) {
50                 __m128i mbp;
51
52                 mbp = _mm_loadu_si128((__m128i *)&elts[pos]);
53                 _mm_storeu_si128((__m128i *)&pkts[pos], mbp);
54         }
55         if (n & 1)
56                 pkts[pos] = elts[pos];
57 }
58
59 /**
60  * Decompress a compressed completion and fill in mbufs in RX SW ring with data
61  * extracted from the title completion descriptor.
62  *
63  * @param rxq
64  *   Pointer to RX queue structure.
65  * @param cq
66  *   Pointer to completion array having a compressed completion at first.
67  * @param elts
68  *   Pointer to SW ring to be filled. The first mbuf has to be pre-built from
69  *   the title completion descriptor to be copied to the rest of mbufs.
70  *
71  * @return
72  *   Number of mini-CQEs successfully decompressed.
73  */
74 static inline uint16_t
75 rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
76                     struct rte_mbuf **elts)
77 {
78         volatile struct mlx5_mini_cqe8 *mcq = (void *)(cq + 1);
79         struct rte_mbuf *t_pkt = elts[0]; /* Title packet is pre-built. */
80         unsigned int pos;
81         unsigned int i;
82         unsigned int inv = 0;
83         /* Mask to shuffle from extracted mini CQE to mbuf. */
84         const __m128i shuf_mask1 =
85                 _mm_set_epi8(0,  1,  2,  3, /* rss, bswap32 */
86                             -1, -1,         /* skip vlan_tci */
87                              6,  7,         /* data_len, bswap16 */
88                             -1, -1,  6,  7, /* pkt_len, bswap16 */
89                             -1, -1, -1, -1  /* skip packet_type */);
90         const __m128i shuf_mask2 =
91                 _mm_set_epi8(8,  9, 10, 11, /* rss, bswap32 */
92                             -1, -1,         /* skip vlan_tci */
93                             14, 15,         /* data_len, bswap16 */
94                             -1, -1, 14, 15, /* pkt_len, bswap16 */
95                             -1, -1, -1, -1  /* skip packet_type */);
96         /* Restore the compressed count. Must be 16 bits. */
97         const uint16_t mcqe_n = t_pkt->data_len +
98                                 (rxq->crc_present * RTE_ETHER_CRC_LEN);
99         const __m128i rearm =
100                 _mm_loadu_si128((__m128i *)&t_pkt->rearm_data);
101         const __m128i rxdf =
102                 _mm_loadu_si128((__m128i *)&t_pkt->rx_descriptor_fields1);
103         const __m128i crc_adj =
104                 _mm_set_epi16(0, 0, 0,
105                               rxq->crc_present * RTE_ETHER_CRC_LEN,
106                               0,
107                               rxq->crc_present * RTE_ETHER_CRC_LEN,
108                               0, 0);
109         const uint32_t flow_tag = t_pkt->hash.fdir.hi;
110 #ifdef MLX5_PMD_SOFT_COUNTERS
111         const __m128i zero = _mm_setzero_si128();
112         const __m128i ones = _mm_cmpeq_epi32(zero, zero);
113         uint32_t rcvd_byte = 0;
114         /* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */
115         const __m128i len_shuf_mask =
116                 _mm_set_epi8(-1, -1, -1, -1,
117                              -1, -1, -1, -1,
118                              14, 15,  6,  7,
119                              10, 11,  2,  3);
120 #endif
121         /*
122          * A. load mCQEs into a 128bit register.
123          * B. store rearm data to mbuf.
124          * C. combine data from mCQEs with rx_descriptor_fields1.
125          * D. store rx_descriptor_fields1.
126          * E. store flow tag (rte_flow mark).
127          */
128         for (pos = 0; pos < mcqe_n; ) {
129                 __m128i mcqe1, mcqe2;
130                 __m128i rxdf1, rxdf2;
131 #ifdef MLX5_PMD_SOFT_COUNTERS
132                 __m128i byte_cnt, invalid_mask;
133 #endif
134
135                 for (i = 0; i < MLX5_VPMD_DESCS_PER_LOOP; ++i)
136                         if (likely(pos + i < mcqe_n))
137                                 rte_prefetch0((void *)(cq + pos + i));
138                 /* A.1 load mCQEs into a 128bit register. */
139                 mcqe1 = _mm_loadu_si128((__m128i *)&mcq[pos % 8]);
140                 mcqe2 = _mm_loadu_si128((__m128i *)&mcq[pos % 8 + 2]);
141                 /* B.1 store rearm data to mbuf. */
142                 _mm_storeu_si128((__m128i *)&elts[pos]->rearm_data, rearm);
143                 _mm_storeu_si128((__m128i *)&elts[pos + 1]->rearm_data, rearm);
144                 /* C.1 combine data from mCQEs with rx_descriptor_fields1. */
145                 rxdf1 = _mm_shuffle_epi8(mcqe1, shuf_mask1);
146                 rxdf2 = _mm_shuffle_epi8(mcqe1, shuf_mask2);
147                 rxdf1 = _mm_sub_epi16(rxdf1, crc_adj);
148                 rxdf2 = _mm_sub_epi16(rxdf2, crc_adj);
149                 rxdf1 = _mm_blend_epi16(rxdf1, rxdf, 0x23);
150                 rxdf2 = _mm_blend_epi16(rxdf2, rxdf, 0x23);
151                 /* D.1 store rx_descriptor_fields1. */
152                 _mm_storeu_si128((__m128i *)
153                                   &elts[pos]->rx_descriptor_fields1,
154                                  rxdf1);
155                 _mm_storeu_si128((__m128i *)
156                                   &elts[pos + 1]->rx_descriptor_fields1,
157                                  rxdf2);
158                 /* B.1 store rearm data to mbuf. */
159                 _mm_storeu_si128((__m128i *)&elts[pos + 2]->rearm_data, rearm);
160                 _mm_storeu_si128((__m128i *)&elts[pos + 3]->rearm_data, rearm);
161                 /* C.1 combine data from mCQEs with rx_descriptor_fields1. */
162                 rxdf1 = _mm_shuffle_epi8(mcqe2, shuf_mask1);
163                 rxdf2 = _mm_shuffle_epi8(mcqe2, shuf_mask2);
164                 rxdf1 = _mm_sub_epi16(rxdf1, crc_adj);
165                 rxdf2 = _mm_sub_epi16(rxdf2, crc_adj);
166                 rxdf1 = _mm_blend_epi16(rxdf1, rxdf, 0x23);
167                 rxdf2 = _mm_blend_epi16(rxdf2, rxdf, 0x23);
168                 /* D.1 store rx_descriptor_fields1. */
169                 _mm_storeu_si128((__m128i *)
170                                   &elts[pos + 2]->rx_descriptor_fields1,
171                                  rxdf1);
172                 _mm_storeu_si128((__m128i *)
173                                   &elts[pos + 3]->rx_descriptor_fields1,
174                                  rxdf2);
175 #ifdef MLX5_PMD_SOFT_COUNTERS
176                 invalid_mask = _mm_set_epi64x(0,
177                                               (mcqe_n - pos) *
178                                               sizeof(uint16_t) * 8);
179                 invalid_mask = _mm_sll_epi64(ones, invalid_mask);
180                 mcqe1 = _mm_srli_si128(mcqe1, 4);
181                 byte_cnt = _mm_blend_epi16(mcqe1, mcqe2, 0xcc);
182                 byte_cnt = _mm_shuffle_epi8(byte_cnt, len_shuf_mask);
183                 byte_cnt = _mm_andnot_si128(invalid_mask, byte_cnt);
184                 byte_cnt = _mm_hadd_epi16(byte_cnt, zero);
185                 rcvd_byte += _mm_cvtsi128_si64(_mm_hadd_epi16(byte_cnt, zero));
186 #endif
187                 if (rxq->mark) {
188                         /* E.1 store flow tag (rte_flow mark). */
189                         elts[pos]->hash.fdir.hi = flow_tag;
190                         elts[pos + 1]->hash.fdir.hi = flow_tag;
191                         elts[pos + 2]->hash.fdir.hi = flow_tag;
192                         elts[pos + 3]->hash.fdir.hi = flow_tag;
193                 }
194                 if (rxq->dynf_meta) {
195                         int32_t offs = rxq->flow_meta_offset;
196                         const uint32_t meta =
197                                 *RTE_MBUF_DYNFIELD(t_pkt, offs, uint32_t *);
198
199                         /* Check if title packet has valid metadata. */
200                         if (meta) {
201                                 MLX5_ASSERT(t_pkt->ol_flags &
202                                             rxq->flow_meta_mask);
203                                 *RTE_MBUF_DYNFIELD(elts[pos], offs,
204                                                         uint32_t *) = meta;
205                                 *RTE_MBUF_DYNFIELD(elts[pos + 1], offs,
206                                                         uint32_t *) = meta;
207                                 *RTE_MBUF_DYNFIELD(elts[pos + 2], offs,
208                                                         uint32_t *) = meta;
209                                 *RTE_MBUF_DYNFIELD(elts[pos + 3], offs,
210                                                         uint32_t *) = meta;
211                         }
212                 }
213                 pos += MLX5_VPMD_DESCS_PER_LOOP;
214                 /* Move to next CQE and invalidate consumed CQEs. */
215                 if (!(pos & 0x7) && pos < mcqe_n) {
216                         if (pos + 8 < mcqe_n)
217                                 rte_prefetch0((void *)(cq + pos + 8));
218                         mcq = (void *)(cq + pos);
219                         for (i = 0; i < 8; ++i)
220                                 cq[inv++].op_own = MLX5_CQE_INVALIDATE;
221                 }
222         }
223         /* Invalidate the rest of CQEs. */
224         for (; inv < mcqe_n; ++inv)
225                 cq[inv].op_own = MLX5_CQE_INVALIDATE;
226 #ifdef MLX5_PMD_SOFT_COUNTERS
227         rxq->stats.ipackets += mcqe_n;
228         rxq->stats.ibytes += rcvd_byte;
229 #endif
230         rxq->cq_ci += mcqe_n;
231         return mcqe_n;
232 }
233
234 /**
235  * Calculate packet type and offload flag for mbuf and store it.
236  *
237  * @param rxq
238  *   Pointer to RX queue structure.
239  * @param cqes[4]
240  *   Array of four 16bytes completions extracted from the original completion
241  *   descriptor.
242  * @param op_err
243  *   Opcode vector having responder error status. Each field is 4B.
244  * @param pkts
245  *   Pointer to array of packets to be filled.
246  */
247 static inline void
248 rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, __m128i cqes[4],
249                          __m128i op_err, struct rte_mbuf **pkts)
250 {
251         __m128i pinfo0, pinfo1;
252         __m128i pinfo, ptype;
253         __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
254                                           rxq->hw_timestamp * PKT_RX_TIMESTAMP);
255         __m128i cv_flags;
256         const __m128i zero = _mm_setzero_si128();
257         const __m128i ptype_mask =
258                 _mm_set_epi32(0xfd06, 0xfd06, 0xfd06, 0xfd06);
259         const __m128i ptype_ol_mask =
260                 _mm_set_epi32(0x106, 0x106, 0x106, 0x106);
261         const __m128i pinfo_mask =
262                 _mm_set_epi32(0x3, 0x3, 0x3, 0x3);
263         const __m128i cv_flag_sel =
264                 _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0,
265                              (uint8_t)((PKT_RX_IP_CKSUM_GOOD |
266                                         PKT_RX_L4_CKSUM_GOOD) >> 1),
267                              0,
268                              (uint8_t)(PKT_RX_L4_CKSUM_GOOD >> 1),
269                              0,
270                              (uint8_t)(PKT_RX_IP_CKSUM_GOOD >> 1),
271                              (uint8_t)(PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED),
272                              0);
273         const __m128i cv_mask =
274                 _mm_set_epi32(PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |
275                               PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED,
276                               PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |
277                               PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED,
278                               PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |
279                               PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED,
280                               PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |
281                               PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED);
282         const __m128i mbuf_init =
283                 _mm_load_si128((__m128i *)&rxq->mbuf_initializer);
284         __m128i rearm0, rearm1, rearm2, rearm3;
285         uint8_t pt_idx0, pt_idx1, pt_idx2, pt_idx3;
286
287         /* Extract pkt_info field. */
288         pinfo0 = _mm_unpacklo_epi32(cqes[0], cqes[1]);
289         pinfo1 = _mm_unpacklo_epi32(cqes[2], cqes[3]);
290         pinfo = _mm_unpacklo_epi64(pinfo0, pinfo1);
291         /* Extract hdr_type_etc field. */
292         pinfo0 = _mm_unpackhi_epi32(cqes[0], cqes[1]);
293         pinfo1 = _mm_unpackhi_epi32(cqes[2], cqes[3]);
294         ptype = _mm_unpacklo_epi64(pinfo0, pinfo1);
295         if (rxq->mark) {
296                 const __m128i pinfo_ft_mask =
297                         _mm_set_epi32(0xffffff00, 0xffffff00,
298                                       0xffffff00, 0xffffff00);
299                 const __m128i fdir_flags = _mm_set1_epi32(PKT_RX_FDIR);
300                 __m128i fdir_id_flags = _mm_set1_epi32(PKT_RX_FDIR_ID);
301                 __m128i flow_tag, invalid_mask;
302
303                 flow_tag = _mm_and_si128(pinfo, pinfo_ft_mask);
304                 /* Check if flow tag is non-zero then set PKT_RX_FDIR. */
305                 invalid_mask = _mm_cmpeq_epi32(flow_tag, zero);
306                 ol_flags = _mm_or_si128(ol_flags,
307                                         _mm_andnot_si128(invalid_mask,
308                                                          fdir_flags));
309                 /* Mask out invalid entries. */
310                 fdir_id_flags = _mm_andnot_si128(invalid_mask, fdir_id_flags);
311                 /* Check if flow tag MLX5_FLOW_MARK_DEFAULT. */
312                 ol_flags = _mm_or_si128(ol_flags,
313                                         _mm_andnot_si128(
314                                                 _mm_cmpeq_epi32(flow_tag,
315                                                                 pinfo_ft_mask),
316                                                 fdir_id_flags));
317         }
318         /*
319          * Merge the two fields to generate the following:
320          * bit[1]     = l3_ok
321          * bit[2]     = l4_ok
322          * bit[8]     = cv
323          * bit[11:10] = l3_hdr_type
324          * bit[14:12] = l4_hdr_type
325          * bit[15]    = ip_frag
326          * bit[16]    = tunneled
327          * bit[17]    = outer_l3_type
328          */
329         ptype = _mm_and_si128(ptype, ptype_mask);
330         pinfo = _mm_and_si128(pinfo, pinfo_mask);
331         pinfo = _mm_slli_epi32(pinfo, 16);
332         /* Make pinfo has merged fields for ol_flags calculation. */
333         pinfo = _mm_or_si128(ptype, pinfo);
334         ptype = _mm_srli_epi32(pinfo, 10);
335         ptype = _mm_packs_epi32(ptype, zero);
336         /* Errored packets will have RTE_PTYPE_ALL_MASK. */
337         op_err = _mm_srli_epi16(op_err, 8);
338         ptype = _mm_or_si128(ptype, op_err);
339         pt_idx0 = _mm_extract_epi8(ptype, 0);
340         pt_idx1 = _mm_extract_epi8(ptype, 2);
341         pt_idx2 = _mm_extract_epi8(ptype, 4);
342         pt_idx3 = _mm_extract_epi8(ptype, 6);
343         pkts[0]->packet_type = mlx5_ptype_table[pt_idx0] |
344                                !!(pt_idx0 & (1 << 6)) * rxq->tunnel;
345         pkts[1]->packet_type = mlx5_ptype_table[pt_idx1] |
346                                !!(pt_idx1 & (1 << 6)) * rxq->tunnel;
347         pkts[2]->packet_type = mlx5_ptype_table[pt_idx2] |
348                                !!(pt_idx2 & (1 << 6)) * rxq->tunnel;
349         pkts[3]->packet_type = mlx5_ptype_table[pt_idx3] |
350                                !!(pt_idx3 & (1 << 6)) * rxq->tunnel;
351         /* Fill flags for checksum and VLAN. */
352         pinfo = _mm_and_si128(pinfo, ptype_ol_mask);
353         pinfo = _mm_shuffle_epi8(cv_flag_sel, pinfo);
354         /* Locate checksum flags at byte[2:1] and merge with VLAN flags. */
355         cv_flags = _mm_slli_epi32(pinfo, 9);
356         cv_flags = _mm_or_si128(pinfo, cv_flags);
357         /* Move back flags to start from byte[0]. */
358         cv_flags = _mm_srli_epi32(cv_flags, 8);
359         /* Mask out garbage bits. */
360         cv_flags = _mm_and_si128(cv_flags, cv_mask);
361         /* Merge to ol_flags. */
362         ol_flags = _mm_or_si128(ol_flags, cv_flags);
363         /* Merge mbuf_init and ol_flags. */
364         rearm0 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(ol_flags, 8), 0x30);
365         rearm1 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(ol_flags, 4), 0x30);
366         rearm2 = _mm_blend_epi16(mbuf_init, ol_flags, 0x30);
367         rearm3 = _mm_blend_epi16(mbuf_init, _mm_srli_si128(ol_flags, 4), 0x30);
368         /* Write 8B rearm_data and 8B ol_flags. */
369         _mm_store_si128((__m128i *)&pkts[0]->rearm_data, rearm0);
370         _mm_store_si128((__m128i *)&pkts[1]->rearm_data, rearm1);
371         _mm_store_si128((__m128i *)&pkts[2]->rearm_data, rearm2);
372         _mm_store_si128((__m128i *)&pkts[3]->rearm_data, rearm3);
373 }
374
375 /**
376  * Receive burst of packets. An errored completion also consumes a mbuf, but the
377  * packet_type is set to be RTE_PTYPE_ALL_MASK. Marked mbufs should be freed
378  * before returning to application.
379  *
380  * @param rxq
381  *   Pointer to RX queue structure.
382  * @param[out] pkts
383  *   Array to store received packets.
384  * @param pkts_n
385  *   Maximum number of packets in array.
386  * @param[out] err
387  *   Pointer to a flag. Set non-zero value if pkts array has at least one error
388  *   packet to handle.
389  * @param[out] no_cq
390  *   Pointer to a boolean. Set true if no new CQE seen.
391  *
392  * @return
393  *   Number of packets received including errors (<= pkts_n).
394  */
395 static inline uint16_t
396 rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n,
397             uint64_t *err, bool *no_cq)
398 {
399         const uint16_t q_n = 1 << rxq->cqe_n;
400         const uint16_t q_mask = q_n - 1;
401         volatile struct mlx5_cqe *cq;
402         struct rte_mbuf **elts;
403         unsigned int pos;
404         uint64_t n;
405         uint16_t repl_n;
406         uint64_t comp_idx = MLX5_VPMD_DESCS_PER_LOOP;
407         uint16_t nocmp_n = 0;
408         uint16_t rcvd_pkt = 0;
409         unsigned int cq_idx = rxq->cq_ci & q_mask;
410         unsigned int elts_idx;
411         unsigned int ownership = !!(rxq->cq_ci & (q_mask + 1));
412         const __m128i owner_check =
413                 _mm_set_epi64x(0x0100000001000000LL, 0x0100000001000000LL);
414         const __m128i opcode_check =
415                 _mm_set_epi64x(0xf0000000f0000000LL, 0xf0000000f0000000LL);
416         const __m128i format_check =
417                 _mm_set_epi64x(0x0c0000000c000000LL, 0x0c0000000c000000LL);
418         const __m128i resp_err_check =
419                 _mm_set_epi64x(0xe0000000e0000000LL, 0xe0000000e0000000LL);
420 #ifdef MLX5_PMD_SOFT_COUNTERS
421         uint32_t rcvd_byte = 0;
422         /* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */
423         const __m128i len_shuf_mask =
424                 _mm_set_epi8(-1, -1, -1, -1,
425                              -1, -1, -1, -1,
426                              12, 13,  8,  9,
427                               4,  5,  0,  1);
428 #endif
429         /* Mask to shuffle from extracted CQE to mbuf. */
430         const __m128i shuf_mask =
431                 _mm_set_epi8(-1,  3,  2,  1, /* fdir.hi */
432                              12, 13, 14, 15, /* rss, bswap32 */
433                              10, 11,         /* vlan_tci, bswap16 */
434                               4,  5,         /* data_len, bswap16 */
435                              -1, -1,         /* zero out 2nd half of pkt_len */
436                               4,  5          /* pkt_len, bswap16 */);
437         /* Mask to blend from the last Qword to the first DQword. */
438         const __m128i blend_mask =
439                 _mm_set_epi8(-1, -1, -1, -1,
440                              -1, -1, -1, -1,
441                               0,  0,  0,  0,
442                               0,  0,  0, -1);
443         const __m128i zero = _mm_setzero_si128();
444         const __m128i ones = _mm_cmpeq_epi32(zero, zero);
445         const __m128i crc_adj =
446                 _mm_set_epi16(0, 0, 0, 0, 0,
447                               rxq->crc_present * RTE_ETHER_CRC_LEN,
448                               0,
449                               rxq->crc_present * RTE_ETHER_CRC_LEN);
450         const __m128i flow_mark_adj = _mm_set_epi32(rxq->mark * (-1), 0, 0, 0);
451
452         MLX5_ASSERT(rxq->sges_n == 0);
453         MLX5_ASSERT(rxq->cqe_n == rxq->elts_n);
454         cq = &(*rxq->cqes)[cq_idx];
455         rte_prefetch0(cq);
456         rte_prefetch0(cq + 1);
457         rte_prefetch0(cq + 2);
458         rte_prefetch0(cq + 3);
459         pkts_n = RTE_MIN(pkts_n, MLX5_VPMD_RX_MAX_BURST);
460         repl_n = q_n - (rxq->rq_ci - rxq->rq_pi);
461         if (repl_n >= rxq->rq_repl_thresh)
462                 mlx5_rx_replenish_bulk_mbuf(rxq, repl_n);
463         /* See if there're unreturned mbufs from compressed CQE. */
464         rcvd_pkt = rxq->decompressed;
465         if (rcvd_pkt > 0) {
466                 rcvd_pkt = RTE_MIN(rcvd_pkt, pkts_n);
467                 rxq_copy_mbuf_v(rxq, pkts, rcvd_pkt);
468                 rxq->rq_pi += rcvd_pkt;
469                 rxq->decompressed -= rcvd_pkt;
470                 pkts += rcvd_pkt;
471         }
472         elts_idx = rxq->rq_pi & q_mask;
473         elts = &(*rxq->elts)[elts_idx];
474         /* Not to overflow pkts array. */
475         pkts_n = RTE_ALIGN_FLOOR(pkts_n - rcvd_pkt, MLX5_VPMD_DESCS_PER_LOOP);
476         /* Not to cross queue end. */
477         pkts_n = RTE_MIN(pkts_n, q_n - elts_idx);
478         pkts_n = RTE_MIN(pkts_n, q_n - cq_idx);
479         if (!pkts_n) {
480                 *no_cq = !rcvd_pkt;
481                 return rcvd_pkt;
482         }
483         /* At this point, there shouldn't be any remained packets. */
484         MLX5_ASSERT(rxq->decompressed == 0);
485         /*
486          * A. load first Qword (8bytes) in one loop.
487          * B. copy 4 mbuf pointers from elts ring to returing pkts.
488          * C. load remained CQE data and extract necessary fields.
489          *    Final 16bytes cqes[] extracted from original 64bytes CQE has the
490          *    following structure:
491          *        struct {
492          *          uint8_t  pkt_info;
493          *          uint8_t  flow_tag[3];
494          *          uint16_t byte_cnt;
495          *          uint8_t  rsvd4;
496          *          uint8_t  op_own;
497          *          uint16_t hdr_type_etc;
498          *          uint16_t vlan_info;
499          *          uint32_t rx_has_res;
500          *        } c;
501          * D. fill in mbuf.
502          * E. get valid CQEs.
503          * F. find compressed CQE.
504          */
505         for (pos = 0;
506              pos < pkts_n;
507              pos += MLX5_VPMD_DESCS_PER_LOOP) {
508                 __m128i cqes[MLX5_VPMD_DESCS_PER_LOOP];
509                 __m128i cqe_tmp1, cqe_tmp2;
510                 __m128i pkt_mb0, pkt_mb1, pkt_mb2, pkt_mb3;
511                 __m128i op_own, op_own_tmp1, op_own_tmp2;
512                 __m128i opcode, owner_mask, invalid_mask;
513                 __m128i comp_mask;
514                 __m128i mask;
515 #ifdef MLX5_PMD_SOFT_COUNTERS
516                 __m128i byte_cnt;
517 #endif
518                 __m128i mbp1, mbp2;
519                 __m128i p = _mm_set_epi16(0, 0, 0, 0, 3, 2, 1, 0);
520                 unsigned int p1, p2, p3;
521
522                 /* Prefetch next 4 CQEs. */
523                 if (pkts_n - pos >= 2 * MLX5_VPMD_DESCS_PER_LOOP) {
524                         rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP]);
525                         rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 1]);
526                         rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 2]);
527                         rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 3]);
528                 }
529                 /* A.0 do not cross the end of CQ. */
530                 mask = _mm_set_epi64x(0, (pkts_n - pos) * sizeof(uint16_t) * 8);
531                 mask = _mm_sll_epi64(ones, mask);
532                 p = _mm_andnot_si128(mask, p);
533                 /* A.1 load cqes. */
534                 p3 = _mm_extract_epi16(p, 3);
535                 cqes[3] = _mm_loadl_epi64((__m128i *)
536                                            &cq[pos + p3].sop_drop_qpn);
537                 rte_compiler_barrier();
538                 p2 = _mm_extract_epi16(p, 2);
539                 cqes[2] = _mm_loadl_epi64((__m128i *)
540                                            &cq[pos + p2].sop_drop_qpn);
541                 rte_compiler_barrier();
542                 /* B.1 load mbuf pointers. */
543                 mbp1 = _mm_loadu_si128((__m128i *)&elts[pos]);
544                 mbp2 = _mm_loadu_si128((__m128i *)&elts[pos + 2]);
545                 /* A.1 load a block having op_own. */
546                 p1 = _mm_extract_epi16(p, 1);
547                 cqes[1] = _mm_loadl_epi64((__m128i *)
548                                            &cq[pos + p1].sop_drop_qpn);
549                 rte_compiler_barrier();
550                 cqes[0] = _mm_loadl_epi64((__m128i *)
551                                            &cq[pos].sop_drop_qpn);
552                 /* B.2 copy mbuf pointers. */
553                 _mm_storeu_si128((__m128i *)&pkts[pos], mbp1);
554                 _mm_storeu_si128((__m128i *)&pkts[pos + 2], mbp2);
555                 rte_cio_rmb();
556                 /* C.1 load remained CQE data and extract necessary fields. */
557                 cqe_tmp2 = _mm_load_si128((__m128i *)&cq[pos + p3]);
558                 cqe_tmp1 = _mm_load_si128((__m128i *)&cq[pos + p2]);
559                 cqes[3] = _mm_blendv_epi8(cqes[3], cqe_tmp2, blend_mask);
560                 cqes[2] = _mm_blendv_epi8(cqes[2], cqe_tmp1, blend_mask);
561                 cqe_tmp2 = _mm_loadu_si128((__m128i *)&cq[pos + p3].csum);
562                 cqe_tmp1 = _mm_loadu_si128((__m128i *)&cq[pos + p2].csum);
563                 cqes[3] = _mm_blend_epi16(cqes[3], cqe_tmp2, 0x30);
564                 cqes[2] = _mm_blend_epi16(cqes[2], cqe_tmp1, 0x30);
565                 cqe_tmp2 = _mm_loadl_epi64((__m128i *)&cq[pos + p3].rsvd4[2]);
566                 cqe_tmp1 = _mm_loadl_epi64((__m128i *)&cq[pos + p2].rsvd4[2]);
567                 cqes[3] = _mm_blend_epi16(cqes[3], cqe_tmp2, 0x04);
568                 cqes[2] = _mm_blend_epi16(cqes[2], cqe_tmp1, 0x04);
569                 /* C.2 generate final structure for mbuf with swapping bytes. */
570                 pkt_mb3 = _mm_shuffle_epi8(cqes[3], shuf_mask);
571                 pkt_mb2 = _mm_shuffle_epi8(cqes[2], shuf_mask);
572                 /* C.3 adjust CRC length. */
573                 pkt_mb3 = _mm_sub_epi16(pkt_mb3, crc_adj);
574                 pkt_mb2 = _mm_sub_epi16(pkt_mb2, crc_adj);
575                 /* C.4 adjust flow mark. */
576                 pkt_mb3 = _mm_add_epi32(pkt_mb3, flow_mark_adj);
577                 pkt_mb2 = _mm_add_epi32(pkt_mb2, flow_mark_adj);
578                 /* D.1 fill in mbuf - rx_descriptor_fields1. */
579                 _mm_storeu_si128((void *)&pkts[pos + 3]->pkt_len, pkt_mb3);
580                 _mm_storeu_si128((void *)&pkts[pos + 2]->pkt_len, pkt_mb2);
581                 /* E.1 extract op_own field. */
582                 op_own_tmp2 = _mm_unpacklo_epi32(cqes[2], cqes[3]);
583                 /* C.1 load remained CQE data and extract necessary fields. */
584                 cqe_tmp2 = _mm_load_si128((__m128i *)&cq[pos + p1]);
585                 cqe_tmp1 = _mm_load_si128((__m128i *)&cq[pos]);
586                 cqes[1] = _mm_blendv_epi8(cqes[1], cqe_tmp2, blend_mask);
587                 cqes[0] = _mm_blendv_epi8(cqes[0], cqe_tmp1, blend_mask);
588                 cqe_tmp2 = _mm_loadu_si128((__m128i *)&cq[pos + p1].csum);
589                 cqe_tmp1 = _mm_loadu_si128((__m128i *)&cq[pos].csum);
590                 cqes[1] = _mm_blend_epi16(cqes[1], cqe_tmp2, 0x30);
591                 cqes[0] = _mm_blend_epi16(cqes[0], cqe_tmp1, 0x30);
592                 cqe_tmp2 = _mm_loadl_epi64((__m128i *)&cq[pos + p1].rsvd4[2]);
593                 cqe_tmp1 = _mm_loadl_epi64((__m128i *)&cq[pos].rsvd4[2]);
594                 cqes[1] = _mm_blend_epi16(cqes[1], cqe_tmp2, 0x04);
595                 cqes[0] = _mm_blend_epi16(cqes[0], cqe_tmp1, 0x04);
596                 /* C.2 generate final structure for mbuf with swapping bytes. */
597                 pkt_mb1 = _mm_shuffle_epi8(cqes[1], shuf_mask);
598                 pkt_mb0 = _mm_shuffle_epi8(cqes[0], shuf_mask);
599                 /* C.3 adjust CRC length. */
600                 pkt_mb1 = _mm_sub_epi16(pkt_mb1, crc_adj);
601                 pkt_mb0 = _mm_sub_epi16(pkt_mb0, crc_adj);
602                 /* C.4 adjust flow mark. */
603                 pkt_mb1 = _mm_add_epi32(pkt_mb1, flow_mark_adj);
604                 pkt_mb0 = _mm_add_epi32(pkt_mb0, flow_mark_adj);
605                 /* E.1 extract op_own byte. */
606                 op_own_tmp1 = _mm_unpacklo_epi32(cqes[0], cqes[1]);
607                 op_own = _mm_unpackhi_epi64(op_own_tmp1, op_own_tmp2);
608                 /* D.1 fill in mbuf - rx_descriptor_fields1. */
609                 _mm_storeu_si128((void *)&pkts[pos + 1]->pkt_len, pkt_mb1);
610                 _mm_storeu_si128((void *)&pkts[pos]->pkt_len, pkt_mb0);
611                 /* E.2 flip owner bit to mark CQEs from last round. */
612                 owner_mask = _mm_and_si128(op_own, owner_check);
613                 if (ownership)
614                         owner_mask = _mm_xor_si128(owner_mask, owner_check);
615                 owner_mask = _mm_cmpeq_epi32(owner_mask, owner_check);
616                 owner_mask = _mm_packs_epi32(owner_mask, zero);
617                 /* E.3 get mask for invalidated CQEs. */
618                 opcode = _mm_and_si128(op_own, opcode_check);
619                 invalid_mask = _mm_cmpeq_epi32(opcode_check, opcode);
620                 invalid_mask = _mm_packs_epi32(invalid_mask, zero);
621                 /* E.4 mask out beyond boundary. */
622                 invalid_mask = _mm_or_si128(invalid_mask, mask);
623                 /* E.5 merge invalid_mask with invalid owner. */
624                 invalid_mask = _mm_or_si128(invalid_mask, owner_mask);
625                 /* F.1 find compressed CQE format. */
626                 comp_mask = _mm_and_si128(op_own, format_check);
627                 comp_mask = _mm_cmpeq_epi32(comp_mask, format_check);
628                 comp_mask = _mm_packs_epi32(comp_mask, zero);
629                 /* F.2 mask out invalid entries. */
630                 comp_mask = _mm_andnot_si128(invalid_mask, comp_mask);
631                 comp_idx = _mm_cvtsi128_si64(comp_mask);
632                 /* F.3 get the first compressed CQE. */
633                 comp_idx = comp_idx ?
634                                 __builtin_ctzll(comp_idx) /
635                                         (sizeof(uint16_t) * 8) :
636                                 MLX5_VPMD_DESCS_PER_LOOP;
637                 /* E.6 mask out entries after the compressed CQE. */
638                 mask = _mm_set_epi64x(0, comp_idx * sizeof(uint16_t) * 8);
639                 mask = _mm_sll_epi64(ones, mask);
640                 invalid_mask = _mm_or_si128(invalid_mask, mask);
641                 /* E.7 count non-compressed valid CQEs. */
642                 n = _mm_cvtsi128_si64(invalid_mask);
643                 n = n ? __builtin_ctzll(n) / (sizeof(uint16_t) * 8) :
644                         MLX5_VPMD_DESCS_PER_LOOP;
645                 nocmp_n += n;
646                 /* D.2 get the final invalid mask. */
647                 mask = _mm_set_epi64x(0, n * sizeof(uint16_t) * 8);
648                 mask = _mm_sll_epi64(ones, mask);
649                 invalid_mask = _mm_or_si128(invalid_mask, mask);
650                 /* D.3 check error in opcode. */
651                 opcode = _mm_cmpeq_epi32(resp_err_check, opcode);
652                 opcode = _mm_packs_epi32(opcode, zero);
653                 opcode = _mm_andnot_si128(invalid_mask, opcode);
654                 /* D.4 mark if any error is set */
655                 *err |= _mm_cvtsi128_si64(opcode);
656                 /* D.5 fill in mbuf - rearm_data and packet_type. */
657                 rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
658                 if (rxq->hw_timestamp) {
659                         if (rxq->rt_timestamp) {
660                                 struct mlx5_dev_ctx_shared *sh = rxq->sh;
661                                 uint64_t ts;
662
663                                 ts = rte_be_to_cpu_64(cq[pos].timestamp);
664                                 pkts[pos]->timestamp =
665                                         mlx5_txpp_convert_rx_ts(sh, ts);
666                                 ts = rte_be_to_cpu_64(cq[pos + p1].timestamp);
667                                 pkts[pos + 1]->timestamp =
668                                         mlx5_txpp_convert_rx_ts(sh, ts);
669                                 ts = rte_be_to_cpu_64(cq[pos + p2].timestamp);
670                                 pkts[pos + 2]->timestamp =
671                                         mlx5_txpp_convert_rx_ts(sh, ts);
672                                 ts = rte_be_to_cpu_64(cq[pos + p3].timestamp);
673                                 pkts[pos + 3]->timestamp =
674                                         mlx5_txpp_convert_rx_ts(sh, ts);
675                         } else {
676                                 pkts[pos]->timestamp = rte_be_to_cpu_64
677                                                 (cq[pos].timestamp);
678                                 pkts[pos + 1]->timestamp = rte_be_to_cpu_64
679                                                 (cq[pos + p1].timestamp);
680                                 pkts[pos + 2]->timestamp = rte_be_to_cpu_64
681                                                 (cq[pos + p2].timestamp);
682                                 pkts[pos + 3]->timestamp = rte_be_to_cpu_64
683                                                 (cq[pos + p3].timestamp);
684                         }
685                 }
686                 if (rxq->dynf_meta) {
687                         /* This code is subject for futher optimization. */
688                         int32_t offs = rxq->flow_meta_offset;
689
690                         *RTE_MBUF_DYNFIELD(pkts[pos], offs, uint32_t *) =
691                                 cq[pos].flow_table_metadata;
692                         *RTE_MBUF_DYNFIELD(pkts[pos + 1], offs, uint32_t *) =
693                                 cq[pos + p1].flow_table_metadata;
694                         *RTE_MBUF_DYNFIELD(pkts[pos + 2], offs, uint32_t *) =
695                                 cq[pos + p2].flow_table_metadata;
696                         *RTE_MBUF_DYNFIELD(pkts[pos + 3], offs, uint32_t *) =
697                                 cq[pos + p3].flow_table_metadata;
698                         if (*RTE_MBUF_DYNFIELD(pkts[pos], offs, uint32_t *))
699                                 pkts[pos]->ol_flags |= rxq->flow_meta_mask;
700                         if (*RTE_MBUF_DYNFIELD(pkts[pos + 1], offs, uint32_t *))
701                                 pkts[pos + 1]->ol_flags |= rxq->flow_meta_mask;
702                         if (*RTE_MBUF_DYNFIELD(pkts[pos + 2], offs, uint32_t *))
703                                 pkts[pos + 2]->ol_flags |= rxq->flow_meta_mask;
704                         if (*RTE_MBUF_DYNFIELD(pkts[pos + 3], offs, uint32_t *))
705                                 pkts[pos + 3]->ol_flags |= rxq->flow_meta_mask;
706                 }
707 #ifdef MLX5_PMD_SOFT_COUNTERS
708                 /* Add up received bytes count. */
709                 byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
710                 byte_cnt = _mm_andnot_si128(invalid_mask, byte_cnt);
711                 byte_cnt = _mm_hadd_epi16(byte_cnt, zero);
712                 rcvd_byte += _mm_cvtsi128_si64(_mm_hadd_epi16(byte_cnt, zero));
713 #endif
714                 /*
715                  * Break the loop unless more valid CQE is expected, or if
716                  * there's a compressed CQE.
717                  */
718                 if (n != MLX5_VPMD_DESCS_PER_LOOP)
719                         break;
720         }
721         /* If no new CQE seen, return without updating cq_db. */
722         if (unlikely(!nocmp_n && comp_idx == MLX5_VPMD_DESCS_PER_LOOP)) {
723                 *no_cq = true;
724                 return rcvd_pkt;
725         }
726         /* Update the consumer indexes for non-compressed CQEs. */
727         MLX5_ASSERT(nocmp_n <= pkts_n);
728         rxq->cq_ci += nocmp_n;
729         rxq->rq_pi += nocmp_n;
730         rcvd_pkt += nocmp_n;
731 #ifdef MLX5_PMD_SOFT_COUNTERS
732         rxq->stats.ipackets += nocmp_n;
733         rxq->stats.ibytes += rcvd_byte;
734 #endif
735         /* Decompress the last CQE if compressed. */
736         if (comp_idx < MLX5_VPMD_DESCS_PER_LOOP && comp_idx == n) {
737                 MLX5_ASSERT(comp_idx == (nocmp_n % MLX5_VPMD_DESCS_PER_LOOP));
738                 rxq->decompressed = rxq_cq_decompress_v(rxq, &cq[nocmp_n],
739                                                         &elts[nocmp_n]);
740                 /* Return more packets if needed. */
741                 if (nocmp_n < pkts_n) {
742                         uint16_t n = rxq->decompressed;
743
744                         n = RTE_MIN(n, pkts_n - nocmp_n);
745                         rxq_copy_mbuf_v(rxq, &pkts[nocmp_n], n);
746                         rxq->rq_pi += n;
747                         rcvd_pkt += n;
748                         rxq->decompressed -= n;
749                 }
750         }
751         rte_compiler_barrier();
752         *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
753         *no_cq = !rcvd_pkt;
754         return rcvd_pkt;
755 }
756
757 #endif /* RTE_PMD_MLX5_RXTX_VEC_SSE_H_ */