drivers/net/mlx5/mlx5_rxtx_vec_sse.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2017 6WIND S.A.
   3  * Copyright 2017 Mellanox Technologies, Ltd
   4  */
   5
   6 #ifndef RTE_PMD_MLX5_RXTX_VEC_SSE_H_
   7 #define RTE_PMD_MLX5_RXTX_VEC_SSE_H_
   8
   9 #include <assert.h>
  10 #include <stdint.h>
  11 #include <string.h>
  12 #include <stdlib.h>
  13 #include <smmintrin.h>
  14
  15 #include <rte_mbuf.h>
  16 #include <rte_mempool.h>
  17 #include <rte_prefetch.h>
  18
  19 #include "mlx5.h"
  20 #include "mlx5_utils.h"
  21 #include "mlx5_rxtx.h"
  22 #include "mlx5_rxtx_vec.h"
  23 #include "mlx5_autoconf.h"
  24 #include "mlx5_defs.h"
  25 #include "mlx5_prm.h"
  26
  27 #ifndef __INTEL_COMPILER
  28 #pragma GCC diagnostic ignored "-Wcast-qual"
  29 #endif
  30
  31 /**
  32  * Store free buffers to RX SW ring.
  33  *
  34  * @param rxq
  35  *   Pointer to RX queue structure.
  36  * @param pkts
  37  *   Pointer to array of packets to be stored.
  38  * @param pkts_n
  39  *   Number of packets to be stored.
  40  */
  41 static inline void
  42 rxq_copy_mbuf_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t n)
  43 {
  44         const uint16_t q_mask = (1 << rxq->elts_n) - 1;
  45         struct rte_mbuf **elts = &(*rxq->elts)[rxq->rq_pi & q_mask];
  46         unsigned int pos;
  47         uint16_t p = n & -2;
  48
  49         for (pos = 0; pos < p; pos += 2) {
  50                 __m128i mbp;
  51
  52                 mbp = _mm_loadu_si128((__m128i *)&elts[pos]);
  53                 _mm_storeu_si128((__m128i *)&pkts[pos], mbp);
  54         }
  55         if (n & 1)
  56                 pkts[pos] = elts[pos];
  57 }
  58
  59 /**
  60  * Decompress a compressed completion and fill in mbufs in RX SW ring with data
  61  * extracted from the title completion descriptor.
  62  *
  63  * @param rxq
  64  *   Pointer to RX queue structure.
  65  * @param cq
  66  *   Pointer to completion array having a compressed completion at first.
  67  * @param elts
  68  *   Pointer to SW ring to be filled. The first mbuf has to be pre-built from
  69  *   the title completion descriptor to be copied to the rest of mbufs.
  70  *
  71  * @return
  72  *   Number of mini-CQEs successfully decompressed.
  73  */
  74 static inline uint16_t
  75 rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
  76                     struct rte_mbuf **elts)
  77 {
  78         volatile struct mlx5_mini_cqe8 *mcq = (void *)(cq + 1);
  79         struct rte_mbuf *t_pkt = elts[0]; /* Title packet is pre-built. */
  80         unsigned int pos;
  81         unsigned int i;
  82         unsigned int inv = 0;
  83         /* Mask to shuffle from extracted mini CQE to mbuf. */
  84         const __m128i shuf_mask1 =
  85                 _mm_set_epi8(0,  1,  2,  3, /* rss, bswap32 */
  86                             -1, -1,         /* skip vlan_tci */
  87                              6,  7,         /* data_len, bswap16 */
  88                             -1, -1,  6,  7, /* pkt_len, bswap16 */
  89                             -1, -1, -1, -1  /* skip packet_type */);
  90         const __m128i shuf_mask2 =
  91                 _mm_set_epi8(8,  9, 10, 11, /* rss, bswap32 */
  92                             -1, -1,         /* skip vlan_tci */
  93                             14, 15,         /* data_len, bswap16 */
  94                             -1, -1, 14, 15, /* pkt_len, bswap16 */
  95                             -1, -1, -1, -1  /* skip packet_type */);
  96         /* Restore the compressed count. Must be 16 bits. */
  97         const uint16_t mcqe_n = t_pkt->data_len +
  98                                 (rxq->crc_present * RTE_ETHER_CRC_LEN);
  99         const __m128i rearm =
 100                 _mm_loadu_si128((__m128i *)&t_pkt->rearm_data);
 101         const __m128i rxdf =
 102                 _mm_loadu_si128((__m128i *)&t_pkt->rx_descriptor_fields1);
 103         const __m128i crc_adj =
 104                 _mm_set_epi16(0, 0, 0,
 105                               rxq->crc_present * RTE_ETHER_CRC_LEN,
 106                               0,
 107                               rxq->crc_present * RTE_ETHER_CRC_LEN,
 108                               0, 0);
 109         const uint32_t flow_tag = t_pkt->hash.fdir.hi;
 110 #ifdef MLX5_PMD_SOFT_COUNTERS
 111         const __m128i zero = _mm_setzero_si128();
 112         const __m128i ones = _mm_cmpeq_epi32(zero, zero);
 113         uint32_t rcvd_byte = 0;
 114         /* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */
 115         const __m128i len_shuf_mask =
 116                 _mm_set_epi8(-1, -1, -1, -1,
 117                              -1, -1, -1, -1,
 118                              14, 15,  6,  7,
 119                              10, 11,  2,  3);
 120 #endif
 121
 122         /*
 123          * A. load mCQEs into a 128bit register.
 124          * B. store rearm data to mbuf.
 125          * C. combine data from mCQEs with rx_descriptor_fields1.
 126          * D. store rx_descriptor_fields1.
 127          * E. store flow tag (rte_flow mark).
 128          */
 129         for (pos = 0; pos < mcqe_n; ) {
 130                 __m128i mcqe1, mcqe2;
 131                 __m128i rxdf1, rxdf2;
 132 #ifdef MLX5_PMD_SOFT_COUNTERS
 133                 __m128i byte_cnt, invalid_mask;
 134 #endif
 135
 136                 if (!(pos & 0x7) && pos + 8 < mcqe_n)
 137                         rte_prefetch0((void *)(cq + pos + 8));
 138                 /* A.1 load mCQEs into a 128bit register. */
 139                 mcqe1 = _mm_loadu_si128((__m128i *)&mcq[pos % 8]);
 140                 mcqe2 = _mm_loadu_si128((__m128i *)&mcq[pos % 8 + 2]);
 141                 /* B.1 store rearm data to mbuf. */
 142                 _mm_storeu_si128((__m128i *)&elts[pos]->rearm_data, rearm);
 143                 _mm_storeu_si128((__m128i *)&elts[pos + 1]->rearm_data, rearm);
 144                 /* C.1 combine data from mCQEs with rx_descriptor_fields1. */
 145                 rxdf1 = _mm_shuffle_epi8(mcqe1, shuf_mask1);
 146                 rxdf2 = _mm_shuffle_epi8(mcqe1, shuf_mask2);
 147                 rxdf1 = _mm_sub_epi16(rxdf1, crc_adj);
 148                 rxdf2 = _mm_sub_epi16(rxdf2, crc_adj);
 149                 rxdf1 = _mm_blend_epi16(rxdf1, rxdf, 0x23);
 150                 rxdf2 = _mm_blend_epi16(rxdf2, rxdf, 0x23);
 151                 /* D.1 store rx_descriptor_fields1. */
 152                 _mm_storeu_si128((__m128i *)
 153                                   &elts[pos]->rx_descriptor_fields1,
 154                                  rxdf1);
 155                 _mm_storeu_si128((__m128i *)
 156                                   &elts[pos + 1]->rx_descriptor_fields1,
 157                                  rxdf2);
 158                 /* B.1 store rearm data to mbuf. */
 159                 _mm_storeu_si128((__m128i *)&elts[pos + 2]->rearm_data, rearm);
 160                 _mm_storeu_si128((__m128i *)&elts[pos + 3]->rearm_data, rearm);
 161                 /* C.1 combine data from mCQEs with rx_descriptor_fields1. */
 162                 rxdf1 = _mm_shuffle_epi8(mcqe2, shuf_mask1);
 163                 rxdf2 = _mm_shuffle_epi8(mcqe2, shuf_mask2);
 164                 rxdf1 = _mm_sub_epi16(rxdf1, crc_adj);
 165                 rxdf2 = _mm_sub_epi16(rxdf2, crc_adj);
 166                 rxdf1 = _mm_blend_epi16(rxdf1, rxdf, 0x23);
 167                 rxdf2 = _mm_blend_epi16(rxdf2, rxdf, 0x23);
 168                 /* D.1 store rx_descriptor_fields1. */
 169                 _mm_storeu_si128((__m128i *)
 170                                   &elts[pos + 2]->rx_descriptor_fields1,
 171                                  rxdf1);
 172                 _mm_storeu_si128((__m128i *)
 173                                   &elts[pos + 3]->rx_descriptor_fields1,
 174                                  rxdf2);
 175 #ifdef MLX5_PMD_SOFT_COUNTERS
 176                 invalid_mask = _mm_set_epi64x(0,
 177                                               (mcqe_n - pos) *
 178                                               sizeof(uint16_t) * 8);
 179                 invalid_mask = _mm_sll_epi64(ones, invalid_mask);
 180                 mcqe1 = _mm_srli_si128(mcqe1, 4);
 181                 byte_cnt = _mm_blend_epi16(mcqe1, mcqe2, 0xcc);
 182                 byte_cnt = _mm_shuffle_epi8(byte_cnt, len_shuf_mask);
 183                 byte_cnt = _mm_andnot_si128(invalid_mask, byte_cnt);
 184                 byte_cnt = _mm_hadd_epi16(byte_cnt, zero);
 185                 rcvd_byte += _mm_cvtsi128_si64(_mm_hadd_epi16(byte_cnt, zero));
 186 #endif
 187                 if (rxq->mark) {
 188                         /* E.1 store flow tag (rte_flow mark). */
 189                         elts[pos]->hash.fdir.hi = flow_tag;
 190                         elts[pos + 1]->hash.fdir.hi = flow_tag;
 191                         elts[pos + 2]->hash.fdir.hi = flow_tag;
 192                         elts[pos + 3]->hash.fdir.hi = flow_tag;
 193                 }
 194                 pos += MLX5_VPMD_DESCS_PER_LOOP;
 195                 /* Move to next CQE and invalidate consumed CQEs. */
 196                 if (!(pos & 0x7) && pos < mcqe_n) {
 197                         mcq = (void *)(cq + pos);
 198                         for (i = 0; i < 8; ++i)
 199                                 cq[inv++].op_own = MLX5_CQE_INVALIDATE;
 200                 }
 201         }
 202         /* Invalidate the rest of CQEs. */
 203         for (; inv < mcqe_n; ++inv)
 204                 cq[inv].op_own = MLX5_CQE_INVALIDATE;
 205 #ifdef MLX5_PMD_SOFT_COUNTERS
 206         rxq->stats.ipackets += mcqe_n;
 207         rxq->stats.ibytes += rcvd_byte;
 208 #endif
 209         rxq->cq_ci += mcqe_n;
 210         return mcqe_n;
 211 }
 212
 213 /**
 214  * Calculate packet type and offload flag for mbuf and store it.
 215  *
 216  * @param rxq
 217  *   Pointer to RX queue structure.
 218  * @param cqes[4]
 219  *   Array of four 16bytes completions extracted from the original completion
 220  *   descriptor.
 221  * @param op_err
 222  *   Opcode vector having responder error status. Each field is 4B.
 223  * @param pkts
 224  *   Pointer to array of packets to be filled.
 225  */
 226 static inline void
 227 rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, __m128i cqes[4],
 228                          __m128i op_err, struct rte_mbuf **pkts)
 229 {
 230         __m128i pinfo0, pinfo1;
 231         __m128i pinfo, ptype;
 232         __m128i ol_flags = _mm_set1_epi32(rxq->rss_hash * PKT_RX_RSS_HASH |
 233                                           rxq->hw_timestamp * PKT_RX_TIMESTAMP);
 234         __m128i cv_flags;
 235         const __m128i zero = _mm_setzero_si128();
 236         const __m128i ptype_mask =
 237                 _mm_set_epi32(0xfd06, 0xfd06, 0xfd06, 0xfd06);
 238         const __m128i ptype_ol_mask =
 239                 _mm_set_epi32(0x106, 0x106, 0x106, 0x106);
 240         const __m128i pinfo_mask =
 241                 _mm_set_epi32(0x3, 0x3, 0x3, 0x3);
 242         const __m128i cv_flag_sel =
 243                 _mm_set_epi8(0, 0, 0, 0, 0, 0, 0, 0, 0,
 244                              (uint8_t)((PKT_RX_IP_CKSUM_GOOD |
 245                                         PKT_RX_L4_CKSUM_GOOD) >> 1),
 246                              0,
 247                              (uint8_t)(PKT_RX_L4_CKSUM_GOOD >> 1),
 248                              0,
 249                              (uint8_t)(PKT_RX_IP_CKSUM_GOOD >> 1),
 250                              (uint8_t)(PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED),
 251                              0);
 252         const __m128i cv_mask =
 253                 _mm_set_epi32(PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |
 254                               PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED,
 255                               PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |
 256                               PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED,
 257                               PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |
 258                               PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED,
 259                               PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD |
 260                               PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED);
 261         const __m128i mbuf_init =
 262                 _mm_loadl_epi64((__m128i *)&rxq->mbuf_initializer);
 263         __m128i rearm0, rearm1, rearm2, rearm3;
 264         uint8_t pt_idx0, pt_idx1, pt_idx2, pt_idx3;
 265
 266         /* Extract pkt_info field. */
 267         pinfo0 = _mm_unpacklo_epi32(cqes[0], cqes[1]);
 268         pinfo1 = _mm_unpacklo_epi32(cqes[2], cqes[3]);
 269         pinfo = _mm_unpacklo_epi64(pinfo0, pinfo1);
 270         /* Extract hdr_type_etc field. */
 271         pinfo0 = _mm_unpackhi_epi32(cqes[0], cqes[1]);
 272         pinfo1 = _mm_unpackhi_epi32(cqes[2], cqes[3]);
 273         ptype = _mm_unpacklo_epi64(pinfo0, pinfo1);
 274         if (rxq->mark) {
 275                 const __m128i pinfo_ft_mask =
 276                         _mm_set_epi32(0xffffff00, 0xffffff00,
 277                                       0xffffff00, 0xffffff00);
 278                 const __m128i fdir_flags = _mm_set1_epi32(PKT_RX_FDIR);
 279                 __m128i fdir_id_flags = _mm_set1_epi32(PKT_RX_FDIR_ID);
 280                 __m128i flow_tag, invalid_mask;
 281
 282                 flow_tag = _mm_and_si128(pinfo, pinfo_ft_mask);
 283                 /* Check if flow tag is non-zero then set PKT_RX_FDIR. */
 284                 invalid_mask = _mm_cmpeq_epi32(flow_tag, zero);
 285                 ol_flags = _mm_or_si128(ol_flags,
 286                                         _mm_andnot_si128(invalid_mask,
 287                                                          fdir_flags));
 288                 /* Mask out invalid entries. */
 289                 fdir_id_flags = _mm_andnot_si128(invalid_mask, fdir_id_flags);
 290                 /* Check if flow tag MLX5_FLOW_MARK_DEFAULT. */
 291                 ol_flags = _mm_or_si128(ol_flags,
 292                                         _mm_andnot_si128(
 293                                                 _mm_cmpeq_epi32(flow_tag,
 294                                                                 pinfo_ft_mask),
 295                                                 fdir_id_flags));
 296         }
 297         /*
 298          * Merge the two fields to generate the following:
 299          * bit[1]     = l3_ok
 300          * bit[2]     = l4_ok
 301          * bit[8]     = cv
 302          * bit[11:10] = l3_hdr_type
 303          * bit[14:12] = l4_hdr_type
 304          * bit[15]    = ip_frag
 305          * bit[16]    = tunneled
 306          * bit[17]    = outer_l3_type
 307          */
 308         ptype = _mm_and_si128(ptype, ptype_mask);
 309         pinfo = _mm_and_si128(pinfo, pinfo_mask);
 310         pinfo = _mm_slli_epi32(pinfo, 16);
 311         /* Make pinfo has merged fields for ol_flags calculation. */
 312         pinfo = _mm_or_si128(ptype, pinfo);
 313         ptype = _mm_srli_epi32(pinfo, 10);
 314         ptype = _mm_packs_epi32(ptype, zero);
 315         /* Errored packets will have RTE_PTYPE_ALL_MASK. */
 316         op_err = _mm_srli_epi16(op_err, 8);
 317         ptype = _mm_or_si128(ptype, op_err);
 318         pt_idx0 = _mm_extract_epi8(ptype, 0);
 319         pt_idx1 = _mm_extract_epi8(ptype, 2);
 320         pt_idx2 = _mm_extract_epi8(ptype, 4);
 321         pt_idx3 = _mm_extract_epi8(ptype, 6);
 322         pkts[0]->packet_type = mlx5_ptype_table[pt_idx0] |
 323                                !!(pt_idx0 & (1 << 6)) * rxq->tunnel;
 324         pkts[1]->packet_type = mlx5_ptype_table[pt_idx1] |
 325                                !!(pt_idx1 & (1 << 6)) * rxq->tunnel;
 326         pkts[2]->packet_type = mlx5_ptype_table[pt_idx2] |
 327                                !!(pt_idx2 & (1 << 6)) * rxq->tunnel;
 328         pkts[3]->packet_type = mlx5_ptype_table[pt_idx3] |
 329                                !!(pt_idx3 & (1 << 6)) * rxq->tunnel;
 330         /* Fill flags for checksum and VLAN. */
 331         pinfo = _mm_and_si128(pinfo, ptype_ol_mask);
 332         pinfo = _mm_shuffle_epi8(cv_flag_sel, pinfo);
 333         /* Locate checksum flags at byte[2:1] and merge with VLAN flags. */
 334         cv_flags = _mm_slli_epi32(pinfo, 9);
 335         cv_flags = _mm_or_si128(pinfo, cv_flags);
 336         /* Move back flags to start from byte[0]. */
 337         cv_flags = _mm_srli_epi32(cv_flags, 8);
 338         /* Mask out garbage bits. */
 339         cv_flags = _mm_and_si128(cv_flags, cv_mask);
 340         /* Merge to ol_flags. */
 341         ol_flags = _mm_or_si128(ol_flags, cv_flags);
 342         /* Merge mbuf_init and ol_flags. */
 343         rearm0 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(ol_flags, 8), 0x30);
 344         rearm1 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(ol_flags, 4), 0x30);
 345         rearm2 = _mm_blend_epi16(mbuf_init, ol_flags, 0x30);
 346         rearm3 = _mm_blend_epi16(mbuf_init, _mm_srli_si128(ol_flags, 4), 0x30);
 347         /* Write 8B rearm_data and 8B ol_flags. */
 348         _mm_store_si128((__m128i *)&pkts[0]->rearm_data, rearm0);
 349         _mm_store_si128((__m128i *)&pkts[1]->rearm_data, rearm1);
 350         _mm_store_si128((__m128i *)&pkts[2]->rearm_data, rearm2);
 351         _mm_store_si128((__m128i *)&pkts[3]->rearm_data, rearm3);
 352 }
 353
 354 /**
 355  * Receive burst of packets. An errored completion also consumes a mbuf, but the
 356  * packet_type is set to be RTE_PTYPE_ALL_MASK. Marked mbufs should be freed
 357  * before returning to application.
 358  *
 359  * @param rxq
 360  *   Pointer to RX queue structure.
 361  * @param[out] pkts
 362  *   Array to store received packets.
 363  * @param pkts_n
 364  *   Maximum number of packets in array.
 365  * @param[out] err
 366  *   Pointer to a flag. Set non-zero value if pkts array has at least one error
 367  *   packet to handle.
 368  *
 369  * @return
 370  *   Number of packets received including errors (<= pkts_n).
 371  */
 372 static inline uint16_t
 373 rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n,
 374             uint64_t *err)
 375 {
 376         const uint16_t q_n = 1 << rxq->cqe_n;
 377         const uint16_t q_mask = q_n - 1;
 378         volatile struct mlx5_cqe *cq;
 379         struct rte_mbuf **elts;
 380         unsigned int pos;
 381         uint64_t n;
 382         uint16_t repl_n;
 383         uint64_t comp_idx = MLX5_VPMD_DESCS_PER_LOOP;
 384         uint16_t nocmp_n = 0;
 385         uint16_t rcvd_pkt = 0;
 386         unsigned int cq_idx = rxq->cq_ci & q_mask;
 387         unsigned int elts_idx;
 388         unsigned int ownership = !!(rxq->cq_ci & (q_mask + 1));
 389         const __m128i owner_check =
 390                 _mm_set_epi64x(0x0100000001000000LL, 0x0100000001000000LL);
 391         const __m128i opcode_check =
 392                 _mm_set_epi64x(0xf0000000f0000000LL, 0xf0000000f0000000LL);
 393         const __m128i format_check =
 394                 _mm_set_epi64x(0x0c0000000c000000LL, 0x0c0000000c000000LL);
 395         const __m128i resp_err_check =
 396                 _mm_set_epi64x(0xe0000000e0000000LL, 0xe0000000e0000000LL);
 397 #ifdef MLX5_PMD_SOFT_COUNTERS
 398         uint32_t rcvd_byte = 0;
 399         /* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */
 400         const __m128i len_shuf_mask =
 401                 _mm_set_epi8(-1, -1, -1, -1,
 402                              -1, -1, -1, -1,
 403                              12, 13,  8,  9,
 404                               4,  5,  0,  1);
 405 #endif
 406         /* Mask to shuffle from extracted CQE to mbuf. */
 407         const __m128i shuf_mask =
 408                 _mm_set_epi8(-1,  3,  2,  1, /* fdir.hi */
 409                              12, 13, 14, 15, /* rss, bswap32 */
 410                              10, 11,         /* vlan_tci, bswap16 */
 411                               4,  5,         /* data_len, bswap16 */
 412                              -1, -1,         /* zero out 2nd half of pkt_len */
 413                               4,  5          /* pkt_len, bswap16 */);
 414         /* Mask to blend from the last Qword to the first DQword. */
 415         const __m128i blend_mask =
 416                 _mm_set_epi8(-1, -1, -1, -1,
 417                              -1, -1, -1, -1,
 418                               0,  0,  0,  0,
 419                               0,  0,  0, -1);
 420         const __m128i zero = _mm_setzero_si128();
 421         const __m128i ones = _mm_cmpeq_epi32(zero, zero);
 422         const __m128i crc_adj =
 423                 _mm_set_epi16(0, 0, 0, 0, 0,
 424                               rxq->crc_present * RTE_ETHER_CRC_LEN,
 425                               0,
 426                               rxq->crc_present * RTE_ETHER_CRC_LEN);
 427         const __m128i flow_mark_adj = _mm_set_epi32(rxq->mark * (-1), 0, 0, 0);
 428
 429         assert(rxq->sges_n == 0);
 430         assert(rxq->cqe_n == rxq->elts_n);
 431         cq = &(*rxq->cqes)[cq_idx];
 432         rte_prefetch0(cq);
 433         rte_prefetch0(cq + 1);
 434         rte_prefetch0(cq + 2);
 435         rte_prefetch0(cq + 3);
 436         pkts_n = RTE_MIN(pkts_n, MLX5_VPMD_RX_MAX_BURST);
 437         repl_n = q_n - (rxq->rq_ci - rxq->rq_pi);
 438         if (repl_n >= rxq->rq_repl_thresh)
 439                 mlx5_rx_replenish_bulk_mbuf(rxq, repl_n);
 440         /* See if there're unreturned mbufs from compressed CQE. */
 441         rcvd_pkt = rxq->decompressed;
 442         if (rcvd_pkt > 0) {
 443                 rcvd_pkt = RTE_MIN(rcvd_pkt, pkts_n);
 444                 rxq_copy_mbuf_v(rxq, pkts, rcvd_pkt);
 445                 rxq->rq_pi += rcvd_pkt;
 446                 rxq->decompressed -= rcvd_pkt;
 447                 pkts += rcvd_pkt;
 448         }
 449         elts_idx = rxq->rq_pi & q_mask;
 450         elts = &(*rxq->elts)[elts_idx];
 451         /* Not to overflow pkts array. */
 452         pkts_n = RTE_ALIGN_FLOOR(pkts_n - rcvd_pkt, MLX5_VPMD_DESCS_PER_LOOP);
 453         /* Not to cross queue end. */
 454         pkts_n = RTE_MIN(pkts_n, q_n - elts_idx);
 455         pkts_n = RTE_MIN(pkts_n, q_n - cq_idx);
 456         if (!pkts_n)
 457                 return rcvd_pkt;
 458         /* At this point, there shouldn't be any remained packets. */
 459         assert(rxq->decompressed == 0);
 460         /*
 461          * A. load first Qword (8bytes) in one loop.
 462          * B. copy 4 mbuf pointers from elts ring to returing pkts.
 463          * C. load remained CQE data and extract necessary fields.
 464          *    Final 16bytes cqes[] extracted from original 64bytes CQE has the
 465          *    following structure:
 466          *        struct {
 467          *          uint8_t  pkt_info;
 468          *          uint8_t  flow_tag[3];
 469          *          uint16_t byte_cnt;
 470          *          uint8_t  rsvd4;
 471          *          uint8_t  op_own;
 472          *          uint16_t hdr_type_etc;
 473          *          uint16_t vlan_info;
 474          *          uint32_t rx_has_res;
 475          *        } c;
 476          * D. fill in mbuf.
 477          * E. get valid CQEs.
 478          * F. find compressed CQE.
 479          */
 480         for (pos = 0;
 481              pos < pkts_n;
 482              pos += MLX5_VPMD_DESCS_PER_LOOP) {
 483                 __m128i cqes[MLX5_VPMD_DESCS_PER_LOOP];
 484                 __m128i cqe_tmp1, cqe_tmp2;
 485                 __m128i pkt_mb0, pkt_mb1, pkt_mb2, pkt_mb3;
 486                 __m128i op_own, op_own_tmp1, op_own_tmp2;
 487                 __m128i opcode, owner_mask, invalid_mask;
 488                 __m128i comp_mask;
 489                 __m128i mask;
 490 #ifdef MLX5_PMD_SOFT_COUNTERS
 491                 __m128i byte_cnt;
 492 #endif
 493                 __m128i mbp1, mbp2;
 494                 __m128i p = _mm_set_epi16(0, 0, 0, 0, 3, 2, 1, 0);
 495                 unsigned int p1, p2, p3;
 496
 497                 /* Prefetch next 4 CQEs. */
 498                 if (pkts_n - pos >= 2 * MLX5_VPMD_DESCS_PER_LOOP) {
 499                         rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP]);
 500                         rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 1]);
 501                         rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 2]);
 502                         rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 3]);
 503                 }
 504                 /* A.0 do not cross the end of CQ. */
 505                 mask = _mm_set_epi64x(0, (pkts_n - pos) * sizeof(uint16_t) * 8);
 506                 mask = _mm_sll_epi64(ones, mask);
 507                 p = _mm_andnot_si128(mask, p);
 508                 /* A.1 load cqes. */
 509                 p3 = _mm_extract_epi16(p, 3);
 510                 cqes[3] = _mm_loadl_epi64((__m128i *)
 511                                            &cq[pos + p3].sop_drop_qpn);
 512                 rte_compiler_barrier();
 513                 p2 = _mm_extract_epi16(p, 2);
 514                 cqes[2] = _mm_loadl_epi64((__m128i *)
 515                                            &cq[pos + p2].sop_drop_qpn);
 516                 rte_compiler_barrier();
 517                 /* B.1 load mbuf pointers. */
 518                 mbp1 = _mm_loadu_si128((__m128i *)&elts[pos]);
 519                 mbp2 = _mm_loadu_si128((__m128i *)&elts[pos + 2]);
 520                 /* A.1 load a block having op_own. */
 521                 p1 = _mm_extract_epi16(p, 1);
 522                 cqes[1] = _mm_loadl_epi64((__m128i *)
 523                                            &cq[pos + p1].sop_drop_qpn);
 524                 rte_compiler_barrier();
 525                 cqes[0] = _mm_loadl_epi64((__m128i *)
 526                                            &cq[pos].sop_drop_qpn);
 527                 /* B.2 copy mbuf pointers. */
 528                 _mm_storeu_si128((__m128i *)&pkts[pos], mbp1);
 529                 _mm_storeu_si128((__m128i *)&pkts[pos + 2], mbp2);
 530                 rte_cio_rmb();
 531                 /* C.1 load remained CQE data and extract necessary fields. */
 532                 cqe_tmp2 = _mm_load_si128((__m128i *)&cq[pos + p3]);
 533                 cqe_tmp1 = _mm_load_si128((__m128i *)&cq[pos + p2]);
 534                 cqes[3] = _mm_blendv_epi8(cqes[3], cqe_tmp2, blend_mask);
 535                 cqes[2] = _mm_blendv_epi8(cqes[2], cqe_tmp1, blend_mask);
 536                 cqe_tmp2 = _mm_loadu_si128((__m128i *)&cq[pos + p3].csum);
 537                 cqe_tmp1 = _mm_loadu_si128((__m128i *)&cq[pos + p2].csum);
 538                 cqes[3] = _mm_blend_epi16(cqes[3], cqe_tmp2, 0x30);
 539                 cqes[2] = _mm_blend_epi16(cqes[2], cqe_tmp1, 0x30);
 540                 cqe_tmp2 = _mm_loadl_epi64((__m128i *)&cq[pos + p3].rsvd3[9]);
 541                 cqe_tmp1 = _mm_loadl_epi64((__m128i *)&cq[pos + p2].rsvd3[9]);
 542                 cqes[3] = _mm_blend_epi16(cqes[3], cqe_tmp2, 0x04);
 543                 cqes[2] = _mm_blend_epi16(cqes[2], cqe_tmp1, 0x04);
 544                 /* C.2 generate final structure for mbuf with swapping bytes. */
 545                 pkt_mb3 = _mm_shuffle_epi8(cqes[3], shuf_mask);
 546                 pkt_mb2 = _mm_shuffle_epi8(cqes[2], shuf_mask);
 547                 /* C.3 adjust CRC length. */
 548                 pkt_mb3 = _mm_sub_epi16(pkt_mb3, crc_adj);
 549                 pkt_mb2 = _mm_sub_epi16(pkt_mb2, crc_adj);
 550                 /* C.4 adjust flow mark. */
 551                 pkt_mb3 = _mm_add_epi32(pkt_mb3, flow_mark_adj);
 552                 pkt_mb2 = _mm_add_epi32(pkt_mb2, flow_mark_adj);
 553                 /* D.1 fill in mbuf - rx_descriptor_fields1. */
 554                 _mm_storeu_si128((void *)&pkts[pos + 3]->pkt_len, pkt_mb3);
 555                 _mm_storeu_si128((void *)&pkts[pos + 2]->pkt_len, pkt_mb2);
 556                 /* E.1 extract op_own field. */
 557                 op_own_tmp2 = _mm_unpacklo_epi32(cqes[2], cqes[3]);
 558                 /* C.1 load remained CQE data and extract necessary fields. */
 559                 cqe_tmp2 = _mm_load_si128((__m128i *)&cq[pos + p1]);
 560                 cqe_tmp1 = _mm_load_si128((__m128i *)&cq[pos]);
 561                 cqes[1] = _mm_blendv_epi8(cqes[1], cqe_tmp2, blend_mask);
 562                 cqes[0] = _mm_blendv_epi8(cqes[0], cqe_tmp1, blend_mask);
 563                 cqe_tmp2 = _mm_loadu_si128((__m128i *)&cq[pos + p1].csum);
 564                 cqe_tmp1 = _mm_loadu_si128((__m128i *)&cq[pos].csum);
 565                 cqes[1] = _mm_blend_epi16(cqes[1], cqe_tmp2, 0x30);
 566                 cqes[0] = _mm_blend_epi16(cqes[0], cqe_tmp1, 0x30);
 567                 cqe_tmp2 = _mm_loadl_epi64((__m128i *)&cq[pos + p1].rsvd3[9]);
 568                 cqe_tmp1 = _mm_loadl_epi64((__m128i *)&cq[pos].rsvd3[9]);
 569                 cqes[1] = _mm_blend_epi16(cqes[1], cqe_tmp2, 0x04);
 570                 cqes[0] = _mm_blend_epi16(cqes[0], cqe_tmp1, 0x04);
 571                 /* C.2 generate final structure for mbuf with swapping bytes. */
 572                 pkt_mb1 = _mm_shuffle_epi8(cqes[1], shuf_mask);
 573                 pkt_mb0 = _mm_shuffle_epi8(cqes[0], shuf_mask);
 574                 /* C.3 adjust CRC length. */
 575                 pkt_mb1 = _mm_sub_epi16(pkt_mb1, crc_adj);
 576                 pkt_mb0 = _mm_sub_epi16(pkt_mb0, crc_adj);
 577                 /* C.4 adjust flow mark. */
 578                 pkt_mb1 = _mm_add_epi32(pkt_mb1, flow_mark_adj);
 579                 pkt_mb0 = _mm_add_epi32(pkt_mb0, flow_mark_adj);
 580                 /* E.1 extract op_own byte. */
 581                 op_own_tmp1 = _mm_unpacklo_epi32(cqes[0], cqes[1]);
 582                 op_own = _mm_unpackhi_epi64(op_own_tmp1, op_own_tmp2);
 583                 /* D.1 fill in mbuf - rx_descriptor_fields1. */
 584                 _mm_storeu_si128((void *)&pkts[pos + 1]->pkt_len, pkt_mb1);
 585                 _mm_storeu_si128((void *)&pkts[pos]->pkt_len, pkt_mb0);
 586                 /* E.2 flip owner bit to mark CQEs from last round. */
 587                 owner_mask = _mm_and_si128(op_own, owner_check);
 588                 if (ownership)
 589                         owner_mask = _mm_xor_si128(owner_mask, owner_check);
 590                 owner_mask = _mm_cmpeq_epi32(owner_mask, owner_check);
 591                 owner_mask = _mm_packs_epi32(owner_mask, zero);
 592                 /* E.3 get mask for invalidated CQEs. */
 593                 opcode = _mm_and_si128(op_own, opcode_check);
 594                 invalid_mask = _mm_cmpeq_epi32(opcode_check, opcode);
 595                 invalid_mask = _mm_packs_epi32(invalid_mask, zero);
 596                 /* E.4 mask out beyond boundary. */
 597                 invalid_mask = _mm_or_si128(invalid_mask, mask);
 598                 /* E.5 merge invalid_mask with invalid owner. */
 599                 invalid_mask = _mm_or_si128(invalid_mask, owner_mask);
 600                 /* F.1 find compressed CQE format. */
 601                 comp_mask = _mm_and_si128(op_own, format_check);
 602                 comp_mask = _mm_cmpeq_epi32(comp_mask, format_check);
 603                 comp_mask = _mm_packs_epi32(comp_mask, zero);
 604                 /* F.2 mask out invalid entries. */
 605                 comp_mask = _mm_andnot_si128(invalid_mask, comp_mask);
 606                 comp_idx = _mm_cvtsi128_si64(comp_mask);
 607                 /* F.3 get the first compressed CQE. */
 608                 comp_idx = comp_idx ?
 609                                 __builtin_ctzll(comp_idx) /
 610                                         (sizeof(uint16_t) * 8) :
 611                                 MLX5_VPMD_DESCS_PER_LOOP;
 612                 /* E.6 mask out entries after the compressed CQE. */
 613                 mask = _mm_set_epi64x(0, comp_idx * sizeof(uint16_t) * 8);
 614                 mask = _mm_sll_epi64(ones, mask);
 615                 invalid_mask = _mm_or_si128(invalid_mask, mask);
 616                 /* E.7 count non-compressed valid CQEs. */
 617                 n = _mm_cvtsi128_si64(invalid_mask);
 618                 n = n ? __builtin_ctzll(n) / (sizeof(uint16_t) * 8) :
 619                         MLX5_VPMD_DESCS_PER_LOOP;
 620                 nocmp_n += n;
 621                 /* D.2 get the final invalid mask. */
 622                 mask = _mm_set_epi64x(0, n * sizeof(uint16_t) * 8);
 623                 mask = _mm_sll_epi64(ones, mask);
 624                 invalid_mask = _mm_or_si128(invalid_mask, mask);
 625                 /* D.3 check error in opcode. */
 626                 opcode = _mm_cmpeq_epi32(resp_err_check, opcode);
 627                 opcode = _mm_packs_epi32(opcode, zero);
 628                 opcode = _mm_andnot_si128(invalid_mask, opcode);
 629                 /* D.4 mark if any error is set */
 630                 *err |= _mm_cvtsi128_si64(opcode);
 631                 /* D.5 fill in mbuf - rearm_data and packet_type. */
 632                 rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]);
 633                 if (rxq->hw_timestamp) {
 634                         pkts[pos]->timestamp =
 635                                 rte_be_to_cpu_64(cq[pos].timestamp);
 636                         pkts[pos + 1]->timestamp =
 637                                 rte_be_to_cpu_64(cq[pos + p1].timestamp);
 638                         pkts[pos + 2]->timestamp =
 639                                 rte_be_to_cpu_64(cq[pos + p2].timestamp);
 640                         pkts[pos + 3]->timestamp =
 641                                 rte_be_to_cpu_64(cq[pos + p3].timestamp);
 642                 }
 643 #ifdef MLX5_PMD_SOFT_COUNTERS
 644                 /* Add up received bytes count. */
 645                 byte_cnt = _mm_shuffle_epi8(op_own, len_shuf_mask);
 646                 byte_cnt = _mm_andnot_si128(invalid_mask, byte_cnt);
 647                 byte_cnt = _mm_hadd_epi16(byte_cnt, zero);
 648                 rcvd_byte += _mm_cvtsi128_si64(_mm_hadd_epi16(byte_cnt, zero));
 649 #endif
 650                 /*
 651                  * Break the loop unless more valid CQE is expected, or if
 652                  * there's a compressed CQE.
 653                  */
 654                 if (n != MLX5_VPMD_DESCS_PER_LOOP)
 655                         break;
 656         }
 657         /* If no new CQE seen, return without updating cq_db. */
 658         if (unlikely(!nocmp_n && comp_idx == MLX5_VPMD_DESCS_PER_LOOP))
 659                 return rcvd_pkt;
 660         /* Update the consumer indexes for non-compressed CQEs. */
 661         assert(nocmp_n <= pkts_n);
 662         rxq->cq_ci += nocmp_n;
 663         rxq->rq_pi += nocmp_n;
 664         rcvd_pkt += nocmp_n;
 665 #ifdef MLX5_PMD_SOFT_COUNTERS
 666         rxq->stats.ipackets += nocmp_n;
 667         rxq->stats.ibytes += rcvd_byte;
 668 #endif
 669         /* Decompress the last CQE if compressed. */
 670         if (comp_idx < MLX5_VPMD_DESCS_PER_LOOP && comp_idx == n) {
 671                 assert(comp_idx == (nocmp_n % MLX5_VPMD_DESCS_PER_LOOP));
 672                 rxq->decompressed = rxq_cq_decompress_v(rxq, &cq[nocmp_n],
 673                                                         &elts[nocmp_n]);
 674                 /* Return more packets if needed. */
 675                 if (nocmp_n < pkts_n) {
 676                         uint16_t n = rxq->decompressed;
 677
 678                         n = RTE_MIN(n, pkts_n - nocmp_n);
 679                         rxq_copy_mbuf_v(rxq, &pkts[nocmp_n], n);
 680                         rxq->rq_pi += n;
 681                         rcvd_pkt += n;
 682                         rxq->decompressed -= n;
 683                 }
 684         }
 685         rte_compiler_barrier();
 686         *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci);
 687         return rcvd_pkt;
 688 }
 689
 690 #endif /* RTE_PMD_MLX5_RXTX_VEC_SSE_H_ */