1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
9 #include <rte_ethdev_driver.h>
10 #include <rte_interrupts.h>
11 #include <rte_alarm.h>
14 #include "mlx5_rxtx.h"
15 #include "mlx5_utils.h"
18 * Stop traffic on Tx queues.
21 * Pointer to Ethernet device structure.
24 mlx5_txq_stop(struct rte_eth_dev *dev)
26 struct mlx5_priv *priv = dev->data->dev_private;
29 for (i = 0; i != priv->txqs_n; ++i)
30 mlx5_txq_release(dev, i);
34 * Start traffic on Tx queues.
37 * Pointer to Ethernet device structure.
40 * 0 on success, a negative errno value otherwise and rte_errno is set.
43 mlx5_txq_start(struct rte_eth_dev *dev)
45 struct mlx5_priv *priv = dev->data->dev_private;
49 for (i = 0; i != priv->txqs_n; ++i) {
50 struct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i);
54 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
55 txq_ctrl->obj = mlx5_txq_obj_new
56 (dev, i, MLX5_TXQ_OBJ_TYPE_DEVX_HAIRPIN);
58 txq_alloc_elts(txq_ctrl);
59 txq_ctrl->obj = mlx5_txq_obj_new
60 (dev, i, MLX5_TXQ_OBJ_TYPE_IBV);
69 ret = rte_errno; /* Save rte_errno before cleanup. */
71 mlx5_txq_release(dev, i);
73 rte_errno = ret; /* Restore rte_errno. */
78 * Stop traffic on Rx queues.
81 * Pointer to Ethernet device structure.
84 mlx5_rxq_stop(struct rte_eth_dev *dev)
86 struct mlx5_priv *priv = dev->data->dev_private;
89 for (i = 0; i != priv->rxqs_n; ++i)
90 mlx5_rxq_release(dev, i);
94 * Start traffic on Rx queues.
97 * Pointer to Ethernet device structure.
100 * 0 on success, a negative errno value otherwise and rte_errno is set.
103 mlx5_rxq_start(struct rte_eth_dev *dev)
105 struct mlx5_priv *priv = dev->data->dev_private;
108 enum mlx5_rxq_obj_type obj_type = MLX5_RXQ_OBJ_TYPE_IBV;
109 struct mlx5_rxq_data *rxq = NULL;
111 for (i = 0; i < priv->rxqs_n; ++i) {
112 rxq = (*priv->rxqs)[i];
114 if (rxq && rxq->lro) {
115 obj_type = MLX5_RXQ_OBJ_TYPE_DEVX_RQ;
119 /* Allocate/reuse/resize mempool for Multi-Packet RQ. */
120 if (mlx5_mprq_alloc_mp(dev)) {
121 /* Should not release Rx queues but return immediately. */
124 for (i = 0; i != priv->rxqs_n; ++i) {
125 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
126 struct rte_mempool *mp;
130 if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN) {
131 rxq_ctrl->obj = mlx5_rxq_obj_new
132 (dev, i, MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN);
137 /* Pre-register Rx mempool. */
138 mp = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
139 rxq_ctrl->rxq.mprq_mp : rxq_ctrl->rxq.mp;
141 "port %u Rx queue %u registering"
142 " mp %s having %u chunks",
143 dev->data->port_id, rxq_ctrl->rxq.idx,
144 mp->name, mp->nb_mem_chunks);
145 mlx5_mr_update_mp(dev, &rxq_ctrl->rxq.mr_ctrl, mp);
146 ret = rxq_alloc_elts(rxq_ctrl);
149 rxq_ctrl->obj = mlx5_rxq_obj_new(dev, i, obj_type);
152 if (obj_type == MLX5_RXQ_OBJ_TYPE_IBV)
153 rxq_ctrl->wqn = rxq_ctrl->obj->wq->wq_num;
154 else if (obj_type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ)
155 rxq_ctrl->wqn = rxq_ctrl->obj->rq->id;
159 ret = rte_errno; /* Save rte_errno before cleanup. */
161 mlx5_rxq_release(dev, i);
163 rte_errno = ret; /* Restore rte_errno. */
168 * Binds Tx queues to Rx queues for hairpin.
170 * Binds Tx queues to the target Rx queues.
173 * Pointer to Ethernet device structure.
176 * 0 on success, a negative errno value otherwise and rte_errno is set.
179 mlx5_hairpin_bind(struct rte_eth_dev *dev)
181 struct mlx5_priv *priv = dev->data->dev_private;
182 struct mlx5_devx_modify_sq_attr sq_attr = { 0 };
183 struct mlx5_devx_modify_rq_attr rq_attr = { 0 };
184 struct mlx5_txq_ctrl *txq_ctrl;
185 struct mlx5_rxq_ctrl *rxq_ctrl;
186 struct mlx5_devx_obj *sq;
187 struct mlx5_devx_obj *rq;
191 for (i = 0; i != priv->txqs_n; ++i) {
192 txq_ctrl = mlx5_txq_get(dev, i);
195 if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
196 mlx5_txq_release(dev, i);
199 if (!txq_ctrl->obj) {
201 DRV_LOG(ERR, "port %u no txq object found: %d",
202 dev->data->port_id, i);
203 mlx5_txq_release(dev, i);
206 sq = txq_ctrl->obj->sq;
207 rxq_ctrl = mlx5_rxq_get(dev,
208 txq_ctrl->hairpin_conf.peers[0].queue);
210 mlx5_txq_release(dev, i);
212 DRV_LOG(ERR, "port %u no rxq object found: %d",
214 txq_ctrl->hairpin_conf.peers[0].queue);
217 if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN ||
218 rxq_ctrl->hairpin_conf.peers[0].queue != i) {
220 DRV_LOG(ERR, "port %u Tx queue %d can't be binded to "
221 "Rx queue %d", dev->data->port_id,
222 i, txq_ctrl->hairpin_conf.peers[0].queue);
225 rq = rxq_ctrl->obj->rq;
228 DRV_LOG(ERR, "port %u hairpin no matching rxq: %d",
230 txq_ctrl->hairpin_conf.peers[0].queue);
233 sq_attr.state = MLX5_SQC_STATE_RDY;
234 sq_attr.sq_state = MLX5_SQC_STATE_RST;
235 sq_attr.hairpin_peer_rq = rq->id;
236 sq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id;
237 ret = mlx5_devx_cmd_modify_sq(sq, &sq_attr);
240 rq_attr.state = MLX5_SQC_STATE_RDY;
241 rq_attr.rq_state = MLX5_SQC_STATE_RST;
242 rq_attr.hairpin_peer_sq = sq->id;
243 rq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id;
244 ret = mlx5_devx_cmd_modify_rq(rq, &rq_attr);
247 mlx5_txq_release(dev, i);
248 mlx5_rxq_release(dev, txq_ctrl->hairpin_conf.peers[0].queue);
252 mlx5_txq_release(dev, i);
253 mlx5_rxq_release(dev, txq_ctrl->hairpin_conf.peers[0].queue);
258 * DPDK callback to start the device.
260 * Simulate device start by attaching all configured flows.
263 * Pointer to Ethernet device structure.
266 * 0 on success, a negative errno value otherwise and rte_errno is set.
269 mlx5_dev_start(struct rte_eth_dev *dev)
271 struct mlx5_priv *priv = dev->data->dev_private;
274 DRV_LOG(DEBUG, "port %u starting device", dev->data->port_id);
275 ret = mlx5_dev_configure_rss_reta(dev);
277 DRV_LOG(ERR, "port %u reta config failed: %s",
278 dev->data->port_id, strerror(rte_errno));
281 ret = mlx5_txq_start(dev);
283 DRV_LOG(ERR, "port %u Tx queue allocation failed: %s",
284 dev->data->port_id, strerror(rte_errno));
287 ret = mlx5_rxq_start(dev);
289 DRV_LOG(ERR, "port %u Rx queue allocation failed: %s",
290 dev->data->port_id, strerror(rte_errno));
294 ret = mlx5_hairpin_bind(dev);
296 DRV_LOG(ERR, "port %u hairpin binding failed: %s",
297 dev->data->port_id, strerror(rte_errno));
301 dev->data->dev_started = 1;
302 ret = mlx5_rx_intr_vec_enable(dev);
304 DRV_LOG(ERR, "port %u Rx interrupt vector creation failed",
308 mlx5_stats_init(dev);
309 ret = mlx5_traffic_enable(dev);
311 DRV_LOG(DEBUG, "port %u failed to set defaults flows",
315 ret = mlx5_flow_start(dev, &priv->flows);
317 DRV_LOG(DEBUG, "port %u failed to set flows",
322 dev->tx_pkt_burst = mlx5_select_tx_function(dev);
323 dev->rx_pkt_burst = mlx5_select_rx_function(dev);
324 /* Enable datapath on secondary process. */
325 mlx5_mp_req_start_rxtx(dev);
326 mlx5_dev_interrupt_handler_install(dev);
329 ret = rte_errno; /* Save rte_errno before cleanup. */
331 dev->data->dev_started = 0;
332 mlx5_flow_stop(dev, &priv->flows);
333 mlx5_traffic_disable(dev);
336 rte_errno = ret; /* Restore rte_errno. */
341 * DPDK callback to stop the device.
343 * Simulate device stop by detaching all configured flows.
346 * Pointer to Ethernet device structure.
349 mlx5_dev_stop(struct rte_eth_dev *dev)
351 struct mlx5_priv *priv = dev->data->dev_private;
353 dev->data->dev_started = 0;
354 /* Prevent crashes when queues are still in use. */
355 dev->rx_pkt_burst = removed_rx_burst;
356 dev->tx_pkt_burst = removed_tx_burst;
358 /* Disable datapath on secondary process. */
359 mlx5_mp_req_stop_rxtx(dev);
360 usleep(1000 * priv->rxqs_n);
361 DRV_LOG(DEBUG, "port %u stopping device", dev->data->port_id);
362 mlx5_flow_stop(dev, &priv->flows);
363 mlx5_traffic_disable(dev);
364 mlx5_rx_intr_vec_disable(dev);
365 mlx5_dev_interrupt_handler_uninstall(dev);
371 * Enable traffic flows configured by control plane
374 * Pointer to Ethernet device private data.
376 * Pointer to Ethernet device structure.
379 * 0 on success, a negative errno value otherwise and rte_errno is set.
382 mlx5_traffic_enable(struct rte_eth_dev *dev)
384 struct mlx5_priv *priv = dev->data->dev_private;
385 struct rte_flow_item_eth bcast = {
386 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
388 struct rte_flow_item_eth ipv6_multi_spec = {
389 .dst.addr_bytes = "\x33\x33\x00\x00\x00\x00",
391 struct rte_flow_item_eth ipv6_multi_mask = {
392 .dst.addr_bytes = "\xff\xff\x00\x00\x00\x00",
394 struct rte_flow_item_eth unicast = {
395 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
397 struct rte_flow_item_eth unicast_mask = {
398 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
400 const unsigned int vlan_filter_n = priv->vlan_filter_n;
401 const struct rte_ether_addr cmp = {
402 .addr_bytes = "\x00\x00\x00\x00\x00\x00",
409 * Hairpin txq default flow should be created no matter if it is
410 * isolation mode. Or else all the packets to be sent will be sent
411 * out directly without the TX flow actions, e.g. encapsulation.
413 for (i = 0; i != priv->txqs_n; ++i) {
414 struct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i);
417 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
418 ret = mlx5_ctrl_flow_source_queue(dev, i);
420 mlx5_txq_release(dev, i);
424 mlx5_txq_release(dev, i);
426 if (priv->config.dv_esw_en && !priv->config.vf)
427 if (!mlx5_flow_create_esw_table_zero_flow(dev))
431 if (dev->data->promiscuous) {
432 struct rte_flow_item_eth promisc = {
433 .dst.addr_bytes = "\x00\x00\x00\x00\x00\x00",
434 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
438 ret = mlx5_ctrl_flow(dev, &promisc, &promisc);
442 if (dev->data->all_multicast) {
443 struct rte_flow_item_eth multicast = {
444 .dst.addr_bytes = "\x01\x00\x00\x00\x00\x00",
445 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
449 ret = mlx5_ctrl_flow(dev, &multicast, &multicast);
453 /* Add broadcast/multicast flows. */
454 for (i = 0; i != vlan_filter_n; ++i) {
455 uint16_t vlan = priv->vlan_filter[i];
457 struct rte_flow_item_vlan vlan_spec = {
458 .tci = rte_cpu_to_be_16(vlan),
460 struct rte_flow_item_vlan vlan_mask =
461 rte_flow_item_vlan_mask;
463 ret = mlx5_ctrl_flow_vlan(dev, &bcast, &bcast,
464 &vlan_spec, &vlan_mask);
467 ret = mlx5_ctrl_flow_vlan(dev, &ipv6_multi_spec,
469 &vlan_spec, &vlan_mask);
473 if (!vlan_filter_n) {
474 ret = mlx5_ctrl_flow(dev, &bcast, &bcast);
477 ret = mlx5_ctrl_flow(dev, &ipv6_multi_spec,
483 /* Add MAC address flows. */
484 for (i = 0; i != MLX5_MAX_MAC_ADDRESSES; ++i) {
485 struct rte_ether_addr *mac = &dev->data->mac_addrs[i];
487 if (!memcmp(mac, &cmp, sizeof(*mac)))
489 memcpy(&unicast.dst.addr_bytes,
492 for (j = 0; j != vlan_filter_n; ++j) {
493 uint16_t vlan = priv->vlan_filter[j];
495 struct rte_flow_item_vlan vlan_spec = {
496 .tci = rte_cpu_to_be_16(vlan),
498 struct rte_flow_item_vlan vlan_mask =
499 rte_flow_item_vlan_mask;
501 ret = mlx5_ctrl_flow_vlan(dev, &unicast,
508 if (!vlan_filter_n) {
509 ret = mlx5_ctrl_flow(dev, &unicast, &unicast_mask);
516 ret = rte_errno; /* Save rte_errno before cleanup. */
517 mlx5_flow_list_flush(dev, &priv->ctrl_flows);
518 rte_errno = ret; /* Restore rte_errno. */
524 * Disable traffic flows configured by control plane
527 * Pointer to Ethernet device private data.
530 mlx5_traffic_disable(struct rte_eth_dev *dev)
532 struct mlx5_priv *priv = dev->data->dev_private;
534 mlx5_flow_list_flush(dev, &priv->ctrl_flows);
538 * Restart traffic flows configured by control plane
541 * Pointer to Ethernet device private data.
544 * 0 on success, a negative errno value otherwise and rte_errno is set.
547 mlx5_traffic_restart(struct rte_eth_dev *dev)
549 if (dev->data->dev_started) {
550 mlx5_traffic_disable(dev);
551 return mlx5_traffic_enable(dev);