1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
9 #include <rte_ethdev_driver.h>
10 #include <rte_interrupts.h>
11 #include <rte_alarm.h>
14 #include "mlx5_rxtx.h"
15 #include "mlx5_utils.h"
18 * Stop traffic on Tx queues.
21 * Pointer to Ethernet device structure.
24 mlx5_txq_stop(struct rte_eth_dev *dev)
26 struct mlx5_priv *priv = dev->data->dev_private;
29 for (i = 0; i != priv->txqs_n; ++i)
30 mlx5_txq_release(dev, i);
34 * Start traffic on Tx queues.
37 * Pointer to Ethernet device structure.
40 * 0 on success, a negative errno value otherwise and rte_errno is set.
43 mlx5_txq_start(struct rte_eth_dev *dev)
45 struct mlx5_priv *priv = dev->data->dev_private;
49 for (i = 0; i != priv->txqs_n; ++i) {
50 struct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i);
54 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
55 txq_ctrl->obj = mlx5_txq_obj_new
56 (dev, i, MLX5_TXQ_OBJ_TYPE_DEVX_HAIRPIN);
58 txq_alloc_elts(txq_ctrl);
59 txq_ctrl->obj = mlx5_txq_obj_new
60 (dev, i, MLX5_TXQ_OBJ_TYPE_IBV);
69 ret = rte_errno; /* Save rte_errno before cleanup. */
71 mlx5_txq_release(dev, i);
73 rte_errno = ret; /* Restore rte_errno. */
78 * Stop traffic on Rx queues.
81 * Pointer to Ethernet device structure.
84 mlx5_rxq_stop(struct rte_eth_dev *dev)
86 struct mlx5_priv *priv = dev->data->dev_private;
89 for (i = 0; i != priv->rxqs_n; ++i)
90 mlx5_rxq_release(dev, i);
94 * Start traffic on Rx queues.
97 * Pointer to Ethernet device structure.
100 * 0 on success, a negative errno value otherwise and rte_errno is set.
103 mlx5_rxq_start(struct rte_eth_dev *dev)
105 struct mlx5_priv *priv = dev->data->dev_private;
108 enum mlx5_rxq_obj_type obj_type = MLX5_RXQ_OBJ_TYPE_IBV;
110 for (i = 0; i < priv->rxqs_n; ++i) {
111 if ((*priv->rxqs)[i]->lro) {
112 obj_type = MLX5_RXQ_OBJ_TYPE_DEVX_RQ;
116 /* Allocate/reuse/resize mempool for Multi-Packet RQ. */
117 if (mlx5_mprq_alloc_mp(dev)) {
118 /* Should not release Rx queues but return immediately. */
121 for (i = 0; i != priv->rxqs_n; ++i) {
122 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);
123 struct rte_mempool *mp;
127 if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN) {
128 rxq_ctrl->obj = mlx5_rxq_obj_new
129 (dev, i, MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN);
134 /* Pre-register Rx mempool. */
135 mp = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
136 rxq_ctrl->rxq.mprq_mp : rxq_ctrl->rxq.mp;
138 "port %u Rx queue %u registering"
139 " mp %s having %u chunks",
140 dev->data->port_id, rxq_ctrl->rxq.idx,
141 mp->name, mp->nb_mem_chunks);
142 mlx5_mr_update_mp(dev, &rxq_ctrl->rxq.mr_ctrl, mp);
143 ret = rxq_alloc_elts(rxq_ctrl);
146 rxq_ctrl->obj = mlx5_rxq_obj_new(dev, i, obj_type);
149 if (obj_type == MLX5_RXQ_OBJ_TYPE_IBV)
150 rxq_ctrl->wqn = rxq_ctrl->obj->wq->wq_num;
151 else if (obj_type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ)
152 rxq_ctrl->wqn = rxq_ctrl->obj->rq->id;
156 ret = rte_errno; /* Save rte_errno before cleanup. */
158 mlx5_rxq_release(dev, i);
160 rte_errno = ret; /* Restore rte_errno. */
165 * Binds Tx queues to Rx queues for hairpin.
167 * Binds Tx queues to the target Rx queues.
170 * Pointer to Ethernet device structure.
173 * 0 on success, a negative errno value otherwise and rte_errno is set.
176 mlx5_hairpin_bind(struct rte_eth_dev *dev)
178 struct mlx5_priv *priv = dev->data->dev_private;
179 struct mlx5_devx_modify_sq_attr sq_attr = { 0 };
180 struct mlx5_devx_modify_rq_attr rq_attr = { 0 };
181 struct mlx5_txq_ctrl *txq_ctrl;
182 struct mlx5_rxq_ctrl *rxq_ctrl;
183 struct mlx5_devx_obj *sq;
184 struct mlx5_devx_obj *rq;
188 for (i = 0; i != priv->txqs_n; ++i) {
189 txq_ctrl = mlx5_txq_get(dev, i);
192 if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
193 mlx5_txq_release(dev, i);
196 if (!txq_ctrl->obj) {
198 DRV_LOG(ERR, "port %u no txq object found: %d",
199 dev->data->port_id, i);
200 mlx5_txq_release(dev, i);
203 sq = txq_ctrl->obj->sq;
204 rxq_ctrl = mlx5_rxq_get(dev,
205 txq_ctrl->hairpin_conf.peers[0].queue);
207 mlx5_txq_release(dev, i);
209 DRV_LOG(ERR, "port %u no rxq object found: %d",
211 txq_ctrl->hairpin_conf.peers[0].queue);
214 if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN ||
215 rxq_ctrl->hairpin_conf.peers[0].queue != i) {
217 DRV_LOG(ERR, "port %u Tx queue %d can't be binded to "
218 "Rx queue %d", dev->data->port_id,
219 i, txq_ctrl->hairpin_conf.peers[0].queue);
222 rq = rxq_ctrl->obj->rq;
225 DRV_LOG(ERR, "port %u hairpin no matching rxq: %d",
227 txq_ctrl->hairpin_conf.peers[0].queue);
230 sq_attr.state = MLX5_SQC_STATE_RDY;
231 sq_attr.sq_state = MLX5_SQC_STATE_RST;
232 sq_attr.hairpin_peer_rq = rq->id;
233 sq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id;
234 ret = mlx5_devx_cmd_modify_sq(sq, &sq_attr);
237 rq_attr.state = MLX5_SQC_STATE_RDY;
238 rq_attr.rq_state = MLX5_SQC_STATE_RST;
239 rq_attr.hairpin_peer_sq = sq->id;
240 rq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id;
241 ret = mlx5_devx_cmd_modify_rq(rq, &rq_attr);
244 mlx5_txq_release(dev, i);
245 mlx5_rxq_release(dev, txq_ctrl->hairpin_conf.peers[0].queue);
249 mlx5_txq_release(dev, i);
250 mlx5_rxq_release(dev, txq_ctrl->hairpin_conf.peers[0].queue);
255 * DPDK callback to start the device.
257 * Simulate device start by attaching all configured flows.
260 * Pointer to Ethernet device structure.
263 * 0 on success, a negative errno value otherwise and rte_errno is set.
266 mlx5_dev_start(struct rte_eth_dev *dev)
268 struct mlx5_priv *priv = dev->data->dev_private;
271 DRV_LOG(DEBUG, "port %u starting device", dev->data->port_id);
272 ret = mlx5_dev_configure_rss_reta(dev);
274 DRV_LOG(ERR, "port %u reta config failed: %s",
275 dev->data->port_id, strerror(rte_errno));
278 ret = mlx5_txq_start(dev);
280 DRV_LOG(ERR, "port %u Tx queue allocation failed: %s",
281 dev->data->port_id, strerror(rte_errno));
284 ret = mlx5_rxq_start(dev);
286 DRV_LOG(ERR, "port %u Rx queue allocation failed: %s",
287 dev->data->port_id, strerror(rte_errno));
291 ret = mlx5_hairpin_bind(dev);
293 DRV_LOG(ERR, "port %u hairpin binding failed: %s",
294 dev->data->port_id, strerror(rte_errno));
298 dev->data->dev_started = 1;
299 ret = mlx5_rx_intr_vec_enable(dev);
301 DRV_LOG(ERR, "port %u Rx interrupt vector creation failed",
305 mlx5_stats_init(dev);
306 ret = mlx5_traffic_enable(dev);
308 DRV_LOG(DEBUG, "port %u failed to set defaults flows",
312 ret = mlx5_flow_start(dev, &priv->flows);
314 DRV_LOG(DEBUG, "port %u failed to set flows",
319 dev->tx_pkt_burst = mlx5_select_tx_function(dev);
320 dev->rx_pkt_burst = mlx5_select_rx_function(dev);
321 /* Enable datapath on secondary process. */
322 mlx5_mp_req_start_rxtx(dev);
323 mlx5_dev_interrupt_handler_install(dev);
326 ret = rte_errno; /* Save rte_errno before cleanup. */
328 dev->data->dev_started = 0;
329 mlx5_flow_stop(dev, &priv->flows);
330 mlx5_traffic_disable(dev);
333 rte_errno = ret; /* Restore rte_errno. */
338 * DPDK callback to stop the device.
340 * Simulate device stop by detaching all configured flows.
343 * Pointer to Ethernet device structure.
346 mlx5_dev_stop(struct rte_eth_dev *dev)
348 struct mlx5_priv *priv = dev->data->dev_private;
350 dev->data->dev_started = 0;
351 /* Prevent crashes when queues are still in use. */
352 dev->rx_pkt_burst = removed_rx_burst;
353 dev->tx_pkt_burst = removed_tx_burst;
355 /* Disable datapath on secondary process. */
356 mlx5_mp_req_stop_rxtx(dev);
357 usleep(1000 * priv->rxqs_n);
358 DRV_LOG(DEBUG, "port %u stopping device", dev->data->port_id);
359 mlx5_flow_stop(dev, &priv->flows);
360 mlx5_traffic_disable(dev);
361 mlx5_rx_intr_vec_disable(dev);
362 mlx5_dev_interrupt_handler_uninstall(dev);
368 * Enable traffic flows configured by control plane
371 * Pointer to Ethernet device private data.
373 * Pointer to Ethernet device structure.
376 * 0 on success, a negative errno value otherwise and rte_errno is set.
379 mlx5_traffic_enable(struct rte_eth_dev *dev)
381 struct mlx5_priv *priv = dev->data->dev_private;
382 struct rte_flow_item_eth bcast = {
383 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
385 struct rte_flow_item_eth ipv6_multi_spec = {
386 .dst.addr_bytes = "\x33\x33\x00\x00\x00\x00",
388 struct rte_flow_item_eth ipv6_multi_mask = {
389 .dst.addr_bytes = "\xff\xff\x00\x00\x00\x00",
391 struct rte_flow_item_eth unicast = {
392 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
394 struct rte_flow_item_eth unicast_mask = {
395 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
397 const unsigned int vlan_filter_n = priv->vlan_filter_n;
398 const struct rte_ether_addr cmp = {
399 .addr_bytes = "\x00\x00\x00\x00\x00\x00",
405 if (priv->config.dv_esw_en && !priv->config.vf)
406 if (!mlx5_flow_create_esw_table_zero_flow(dev))
410 if (dev->data->promiscuous) {
411 struct rte_flow_item_eth promisc = {
412 .dst.addr_bytes = "\x00\x00\x00\x00\x00\x00",
413 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
417 ret = mlx5_ctrl_flow(dev, &promisc, &promisc);
421 if (dev->data->all_multicast) {
422 struct rte_flow_item_eth multicast = {
423 .dst.addr_bytes = "\x01\x00\x00\x00\x00\x00",
424 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
428 ret = mlx5_ctrl_flow(dev, &multicast, &multicast);
432 /* Add broadcast/multicast flows. */
433 for (i = 0; i != vlan_filter_n; ++i) {
434 uint16_t vlan = priv->vlan_filter[i];
436 struct rte_flow_item_vlan vlan_spec = {
437 .tci = rte_cpu_to_be_16(vlan),
439 struct rte_flow_item_vlan vlan_mask =
440 rte_flow_item_vlan_mask;
442 ret = mlx5_ctrl_flow_vlan(dev, &bcast, &bcast,
443 &vlan_spec, &vlan_mask);
446 ret = mlx5_ctrl_flow_vlan(dev, &ipv6_multi_spec,
448 &vlan_spec, &vlan_mask);
452 if (!vlan_filter_n) {
453 ret = mlx5_ctrl_flow(dev, &bcast, &bcast);
456 ret = mlx5_ctrl_flow(dev, &ipv6_multi_spec,
462 /* Add MAC address flows. */
463 for (i = 0; i != MLX5_MAX_MAC_ADDRESSES; ++i) {
464 struct rte_ether_addr *mac = &dev->data->mac_addrs[i];
466 if (!memcmp(mac, &cmp, sizeof(*mac)))
468 memcpy(&unicast.dst.addr_bytes,
471 for (j = 0; j != vlan_filter_n; ++j) {
472 uint16_t vlan = priv->vlan_filter[j];
474 struct rte_flow_item_vlan vlan_spec = {
475 .tci = rte_cpu_to_be_16(vlan),
477 struct rte_flow_item_vlan vlan_mask =
478 rte_flow_item_vlan_mask;
480 ret = mlx5_ctrl_flow_vlan(dev, &unicast,
487 if (!vlan_filter_n) {
488 ret = mlx5_ctrl_flow(dev, &unicast, &unicast_mask);
495 ret = rte_errno; /* Save rte_errno before cleanup. */
496 mlx5_flow_list_flush(dev, &priv->ctrl_flows);
497 rte_errno = ret; /* Restore rte_errno. */
503 * Disable traffic flows configured by control plane
506 * Pointer to Ethernet device private data.
509 mlx5_traffic_disable(struct rte_eth_dev *dev)
511 struct mlx5_priv *priv = dev->data->dev_private;
513 mlx5_flow_list_flush(dev, &priv->ctrl_flows);
517 * Restart traffic flows configured by control plane
520 * Pointer to Ethernet device private data.
523 * 0 on success, a negative errno value otherwise and rte_errno is set.
526 mlx5_traffic_restart(struct rte_eth_dev *dev)
528 if (dev->data->dev_started) {
529 mlx5_traffic_disable(dev);
530 return mlx5_traffic_enable(dev);