4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
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41 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
43 #pragma GCC diagnostic ignored "-pedantic"
45 #include <infiniband/verbs.h>
47 #pragma GCC diagnostic error "-pedantic"
50 /* DPDK headers don't like -pedantic. */
52 #pragma GCC diagnostic ignored "-pedantic"
55 #include <rte_malloc.h>
56 #include <rte_ethdev.h>
57 #include <rte_common.h>
59 #pragma GCC diagnostic error "-pedantic"
62 #include "mlx5_utils.h"
64 #include "mlx5_rxtx.h"
65 #include "mlx5_autoconf.h"
66 #include "mlx5_defs.h"
69 * Allocate TX queue elements.
72 * Pointer to TX queue structure.
74 * Number of elements to allocate.
77 * 0 on success, errno value on failure.
80 txq_alloc_elts(struct txq_ctrl *txq_ctrl, unsigned int elts_n)
83 struct txq_elt (*elts)[elts_n] =
84 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq_ctrl->socket);
88 ERROR("%p: can't allocate packets array", (void *)txq_ctrl);
92 for (i = 0; (i != elts_n); ++i) {
93 struct txq_elt *elt = &(*elts)[i];
97 DEBUG("%p: allocated and configured %u WRs", (void *)txq_ctrl, elts_n);
98 txq_ctrl->txq.elts_n = elts_n;
99 txq_ctrl->txq.elts = elts;
100 txq_ctrl->txq.elts_head = 0;
101 txq_ctrl->txq.elts_tail = 0;
102 txq_ctrl->txq.elts_comp = 0;
103 /* Request send completion every MLX5_PMD_TX_PER_COMP_REQ packets or
104 * at least 4 times per ring. */
105 txq_ctrl->txq.elts_comp_cd_init =
106 ((MLX5_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
107 MLX5_PMD_TX_PER_COMP_REQ : (elts_n / 4));
108 txq_ctrl->txq.elts_comp_cd = txq_ctrl->txq.elts_comp_cd_init;
114 DEBUG("%p: failed, freed everything", (void *)txq_ctrl);
120 * Free TX queue elements.
123 * Pointer to TX queue structure.
126 txq_free_elts(struct txq_ctrl *txq_ctrl)
128 unsigned int elts_n = txq_ctrl->txq.elts_n;
129 unsigned int elts_head = txq_ctrl->txq.elts_head;
130 unsigned int elts_tail = txq_ctrl->txq.elts_tail;
131 struct txq_elt (*elts)[elts_n] = txq_ctrl->txq.elts;
133 DEBUG("%p: freeing WRs", (void *)txq_ctrl);
134 txq_ctrl->txq.elts_n = 0;
135 txq_ctrl->txq.elts_head = 0;
136 txq_ctrl->txq.elts_tail = 0;
137 txq_ctrl->txq.elts_comp = 0;
138 txq_ctrl->txq.elts_comp_cd = 0;
139 txq_ctrl->txq.elts_comp_cd_init = 0;
140 txq_ctrl->txq.elts = NULL;
144 while (elts_tail != elts_head) {
145 struct txq_elt *elt = &(*elts)[elts_tail];
147 assert(elt->buf != NULL);
148 rte_pktmbuf_free(elt->buf);
151 memset(elt, 0x77, sizeof(*elt));
153 if (++elts_tail == elts_n)
160 * Clean up a TX queue.
162 * Destroy objects, free allocated memory and reset the structure for reuse.
165 * Pointer to TX queue structure.
168 txq_cleanup(struct txq_ctrl *txq_ctrl)
170 struct ibv_exp_release_intf_params params;
173 DEBUG("cleaning up %p", (void *)txq_ctrl);
174 txq_free_elts(txq_ctrl);
175 txq_ctrl->txq.poll_cnt = NULL;
176 txq_ctrl->txq.send_flush = NULL;
177 if (txq_ctrl->if_qp != NULL) {
178 assert(txq_ctrl->txq.priv != NULL);
179 assert(txq_ctrl->txq.priv->ctx != NULL);
180 assert(txq_ctrl->txq.qp != NULL);
181 params = (struct ibv_exp_release_intf_params){
184 claim_zero(ibv_exp_release_intf(txq_ctrl->txq.priv->ctx,
188 if (txq_ctrl->if_cq != NULL) {
189 assert(txq_ctrl->txq.priv != NULL);
190 assert(txq_ctrl->txq.priv->ctx != NULL);
191 assert(txq_ctrl->txq.cq != NULL);
192 params = (struct ibv_exp_release_intf_params){
195 claim_zero(ibv_exp_release_intf(txq_ctrl->txq.priv->ctx,
199 if (txq_ctrl->txq.qp != NULL)
200 claim_zero(ibv_destroy_qp(txq_ctrl->txq.qp));
201 if (txq_ctrl->txq.cq != NULL)
202 claim_zero(ibv_destroy_cq(txq_ctrl->txq.cq));
203 if (txq_ctrl->rd != NULL) {
204 struct ibv_exp_destroy_res_domain_attr attr = {
208 assert(txq_ctrl->txq.priv != NULL);
209 assert(txq_ctrl->txq.priv->ctx != NULL);
210 claim_zero(ibv_exp_destroy_res_domain(txq_ctrl->txq.priv->ctx,
214 for (i = 0; (i != RTE_DIM(txq_ctrl->txq.mp2mr)); ++i) {
215 if (txq_ctrl->txq.mp2mr[i].mp == NULL)
217 assert(txq_ctrl->txq.mp2mr[i].mr != NULL);
218 claim_zero(ibv_dereg_mr(txq_ctrl->txq.mp2mr[i].mr));
220 memset(txq_ctrl, 0, sizeof(*txq_ctrl));
224 * Configure a TX queue.
227 * Pointer to Ethernet device structure.
229 * Pointer to TX queue structure.
231 * Number of descriptors to configure in queue.
233 * NUMA socket on which memory must be allocated.
235 * Thresholds parameters.
238 * 0 on success, errno value on failure.
241 txq_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl, uint16_t desc,
242 unsigned int socket, const struct rte_eth_txconf *conf)
244 struct priv *priv = mlx5_get_priv(dev);
245 struct txq_ctrl tmpl = {
252 struct ibv_exp_query_intf_params params;
253 struct ibv_exp_qp_init_attr init;
254 struct ibv_exp_res_domain_init_attr rd;
255 struct ibv_exp_cq_init_attr cq;
256 struct ibv_exp_qp_attr mod;
258 enum ibv_exp_query_intf_status status;
261 (void)conf; /* Thresholds configuration (ignored). */
263 ERROR("%p: invalid number of TX descriptors", (void *)dev);
266 /* MRs will be registered in mp2mr[] later. */
267 attr.rd = (struct ibv_exp_res_domain_init_attr){
268 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
269 IBV_EXP_RES_DOMAIN_MSG_MODEL),
270 .thread_model = IBV_EXP_THREAD_SINGLE,
271 .msg_model = IBV_EXP_MSG_HIGH_BW,
273 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
274 if (tmpl.rd == NULL) {
276 ERROR("%p: RD creation failure: %s",
277 (void *)dev, strerror(ret));
280 attr.cq = (struct ibv_exp_cq_init_attr){
281 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
282 .res_domain = tmpl.rd,
284 tmpl.txq.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0,
286 if (tmpl.txq.cq == NULL) {
288 ERROR("%p: CQ creation failure: %s",
289 (void *)dev, strerror(ret));
292 DEBUG("priv->device_attr.max_qp_wr is %d",
293 priv->device_attr.max_qp_wr);
294 DEBUG("priv->device_attr.max_sge is %d",
295 priv->device_attr.max_sge);
296 attr.init = (struct ibv_exp_qp_init_attr){
297 /* CQ to be associated with the send queue. */
298 .send_cq = tmpl.txq.cq,
299 /* CQ to be associated with the receive queue. */
300 .recv_cq = tmpl.txq.cq,
302 /* Max number of outstanding WRs. */
303 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
304 priv->device_attr.max_qp_wr :
306 /* Max number of scatter/gather elements in a WR. */
309 .qp_type = IBV_QPT_RAW_PACKET,
310 /* Do *NOT* enable this, completions events are managed per
314 .res_domain = tmpl.rd,
315 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
316 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
318 tmpl.txq.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
319 if (tmpl.txq.qp == NULL) {
320 ret = (errno ? errno : EINVAL);
321 ERROR("%p: QP creation failure: %s",
322 (void *)dev, strerror(ret));
325 attr.mod = (struct ibv_exp_qp_attr){
326 /* Move the QP to this state. */
327 .qp_state = IBV_QPS_INIT,
328 /* Primary port number. */
329 .port_num = priv->port
331 ret = ibv_exp_modify_qp(tmpl.txq.qp, &attr.mod,
332 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
334 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
335 (void *)dev, strerror(ret));
338 ret = txq_alloc_elts(&tmpl, desc);
340 ERROR("%p: TXQ allocation failed: %s",
341 (void *)dev, strerror(ret));
344 attr.mod = (struct ibv_exp_qp_attr){
345 .qp_state = IBV_QPS_RTR
347 ret = ibv_exp_modify_qp(tmpl.txq.qp, &attr.mod, IBV_EXP_QP_STATE);
349 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
350 (void *)dev, strerror(ret));
353 attr.mod.qp_state = IBV_QPS_RTS;
354 ret = ibv_exp_modify_qp(tmpl.txq.qp, &attr.mod, IBV_EXP_QP_STATE);
356 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
357 (void *)dev, strerror(ret));
360 attr.params = (struct ibv_exp_query_intf_params){
361 .intf_scope = IBV_EXP_INTF_GLOBAL,
362 .intf = IBV_EXP_INTF_CQ,
365 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
366 if (tmpl.if_cq == NULL) {
368 ERROR("%p: CQ interface family query failed with status %d",
369 (void *)dev, status);
372 attr.params = (struct ibv_exp_query_intf_params){
373 .intf_scope = IBV_EXP_INTF_GLOBAL,
374 .intf = IBV_EXP_INTF_QP_BURST,
376 #ifdef HAVE_VERBS_VLAN_INSERTION
379 /* Enable multi-packet send if supported. */
382 IBV_EXP_QP_BURST_CREATE_ENABLE_MULTI_PACKET_SEND_WR :
385 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
386 if (tmpl.if_qp == NULL) {
388 ERROR("%p: QP interface family query failed with status %d",
389 (void *)dev, status);
392 /* Clean up txq in case we're reinitializing it. */
393 DEBUG("%p: cleaning-up old txq just in case", (void *)txq_ctrl);
394 txq_cleanup(txq_ctrl);
396 txq_ctrl->txq.poll_cnt = txq_ctrl->if_cq->poll_cnt;
397 txq_ctrl->txq.send_pending = txq_ctrl->if_qp->send_pending;
398 #ifdef HAVE_VERBS_VLAN_INSERTION
399 txq_ctrl->txq.send_pending_vlan = txq_ctrl->if_qp->send_pending_vlan;
401 txq_ctrl->txq.send_flush = txq_ctrl->if_qp->send_flush;
402 DEBUG("%p: txq updated with %p", (void *)txq_ctrl, (void *)&tmpl);
403 /* Pre-register known mempools. */
404 rte_mempool_walk(txq_mp2mr_iter, txq_ctrl);
414 * DPDK callback to configure a TX queue.
417 * Pointer to Ethernet device structure.
421 * Number of descriptors to configure in queue.
423 * NUMA socket on which memory must be allocated.
425 * Thresholds parameters.
428 * 0 on success, negative errno value on failure.
431 mlx5_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
432 unsigned int socket, const struct rte_eth_txconf *conf)
434 struct priv *priv = dev->data->dev_private;
435 struct txq *txq = (*priv->txqs)[idx];
436 struct txq_ctrl *txq_ctrl;
439 if (mlx5_is_secondary())
440 return -E_RTE_SECONDARY;
444 txq_ctrl = container_of(txq, struct txq_ctrl, txq);
445 DEBUG("%p: configuring queue %u for %u descriptors",
446 (void *)dev, idx, desc);
447 if (idx >= priv->txqs_n) {
448 ERROR("%p: queue index out of range (%u >= %u)",
449 (void *)dev, idx, priv->txqs_n);
454 DEBUG("%p: reusing already allocated queue index %u (%p)",
455 (void *)dev, idx, (void *)txq);
460 (*priv->txqs)[idx] = NULL;
461 txq_cleanup(txq_ctrl);
463 txq_ctrl = rte_calloc_socket("TXQ", 1, sizeof(*txq_ctrl),
465 if (txq_ctrl == NULL) {
466 ERROR("%p: unable to allocate queue index %u",
472 ret = txq_setup(dev, txq_ctrl, desc, socket, conf);
476 txq_ctrl->txq.stats.idx = idx;
477 DEBUG("%p: adding TX queue %p to list",
478 (void *)dev, (void *)txq_ctrl);
479 (*priv->txqs)[idx] = &txq_ctrl->txq;
480 /* Update send callback. */
481 dev->tx_pkt_burst = mlx5_tx_burst;
488 * DPDK callback to release a TX queue.
491 * Generic TX queue pointer.
494 mlx5_tx_queue_release(void *dpdk_txq)
496 struct txq *txq = (struct txq *)dpdk_txq;
497 struct txq_ctrl *txq_ctrl;
501 if (mlx5_is_secondary())
506 txq_ctrl = container_of(txq, struct txq_ctrl, txq);
509 for (i = 0; (i != priv->txqs_n); ++i)
510 if ((*priv->txqs)[i] == txq) {
511 DEBUG("%p: removing TX queue %p from list",
512 (void *)priv->dev, (void *)txq_ctrl);
513 (*priv->txqs)[i] = NULL;
516 txq_cleanup(txq_ctrl);
522 * DPDK callback for TX in secondary processes.
524 * This function configures all queues from primary process information
525 * if necessary before reverting to the normal TX burst callback.
528 * Generic pointer to TX queue structure.
530 * Packets to transmit.
532 * Number of packets in array.
535 * Number of packets successfully transmitted (<= pkts_n).
538 mlx5_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
541 struct txq *txq = dpdk_txq;
542 struct priv *priv = mlx5_secondary_data_setup(txq->priv);
543 struct priv *primary_priv;
549 mlx5_secondary_data[priv->dev->data->port_id].primary_priv;
550 /* Look for queue index in both private structures. */
551 for (index = 0; index != priv->txqs_n; ++index)
552 if (((*primary_priv->txqs)[index] == txq) ||
553 ((*priv->txqs)[index] == txq))
555 if (index == priv->txqs_n)
557 txq = (*priv->txqs)[index];
558 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);