4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
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41 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
43 #pragma GCC diagnostic ignored "-pedantic"
45 #include <infiniband/verbs.h>
47 #pragma GCC diagnostic error "-pedantic"
50 /* DPDK headers don't like -pedantic. */
52 #pragma GCC diagnostic ignored "-pedantic"
55 #include <rte_malloc.h>
56 #include <rte_ethdev.h>
57 #include <rte_common.h>
59 #pragma GCC diagnostic error "-pedantic"
62 #include "mlx5_utils.h"
64 #include "mlx5_rxtx.h"
65 #include "mlx5_autoconf.h"
66 #include "mlx5_defs.h"
69 * Allocate TX queue elements.
72 * Pointer to TX queue structure.
74 * Number of elements to allocate.
77 * 0 on success, errno value on failure.
80 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
83 struct txq_elt (*elts)[elts_n] =
84 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
88 ERROR("%p: can't allocate packets array", (void *)txq);
92 for (i = 0; (i != elts_n); ++i) {
93 struct txq_elt *elt = &(*elts)[i];
97 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
103 /* Request send completion every MLX5_PMD_TX_PER_COMP_REQ packets or
104 * at least 4 times per ring. */
105 txq->elts_comp_cd_init =
106 ((MLX5_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
107 MLX5_PMD_TX_PER_COMP_REQ : (elts_n / 4));
108 txq->elts_comp_cd = txq->elts_comp_cd_init;
114 DEBUG("%p: failed, freed everything", (void *)txq);
120 * Free TX queue elements.
123 * Pointer to TX queue structure.
126 txq_free_elts(struct txq *txq)
128 unsigned int elts_n = txq->elts_n;
129 unsigned int elts_head = txq->elts_head;
130 unsigned int elts_tail = txq->elts_tail;
131 struct txq_elt (*elts)[elts_n] = txq->elts;
133 DEBUG("%p: freeing WRs", (void *)txq);
138 txq->elts_comp_cd = 0;
139 txq->elts_comp_cd_init = 0;
144 while (elts_tail != elts_head) {
145 struct txq_elt *elt = &(*elts)[elts_tail];
147 assert(elt->buf != NULL);
148 rte_pktmbuf_free(elt->buf);
151 memset(elt, 0x77, sizeof(*elt));
153 if (++elts_tail == elts_n)
160 * Clean up a TX queue.
162 * Destroy objects, free allocated memory and reset the structure for reuse.
165 * Pointer to TX queue structure.
168 txq_cleanup(struct txq *txq)
170 struct ibv_exp_release_intf_params params;
173 DEBUG("cleaning up %p", (void *)txq);
175 txq->poll_cnt = NULL;
176 #if MLX5_PMD_MAX_INLINE > 0
177 txq->send_pending_inline = NULL;
179 txq->send_flush = NULL;
180 if (txq->if_qp != NULL) {
181 assert(txq->priv != NULL);
182 assert(txq->priv->ctx != NULL);
183 assert(txq->qp != NULL);
184 params = (struct ibv_exp_release_intf_params){
187 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
191 if (txq->if_cq != NULL) {
192 assert(txq->priv != NULL);
193 assert(txq->priv->ctx != NULL);
194 assert(txq->cq != NULL);
195 params = (struct ibv_exp_release_intf_params){
198 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
203 claim_zero(ibv_destroy_qp(txq->qp));
205 claim_zero(ibv_destroy_cq(txq->cq));
206 if (txq->rd != NULL) {
207 struct ibv_exp_destroy_res_domain_attr attr = {
211 assert(txq->priv != NULL);
212 assert(txq->priv->ctx != NULL);
213 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
217 for (i = 0; (i != RTE_DIM(txq->mp2mr)); ++i) {
218 if (txq->mp2mr[i].mp == NULL)
220 assert(txq->mp2mr[i].mr != NULL);
221 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
223 memset(txq, 0, sizeof(*txq));
227 * Configure a TX queue.
230 * Pointer to Ethernet device structure.
232 * Pointer to TX queue structure.
234 * Number of descriptors to configure in queue.
236 * NUMA socket on which memory must be allocated.
238 * Thresholds parameters.
241 * 0 on success, errno value on failure.
244 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
245 unsigned int socket, const struct rte_eth_txconf *conf)
247 struct priv *priv = mlx5_get_priv(dev);
253 struct ibv_exp_query_intf_params params;
254 struct ibv_exp_qp_init_attr init;
255 struct ibv_exp_res_domain_init_attr rd;
256 struct ibv_exp_cq_init_attr cq;
257 struct ibv_exp_qp_attr mod;
259 enum ibv_exp_query_intf_status status;
262 (void)conf; /* Thresholds configuration (ignored). */
264 ERROR("%p: invalid number of TX descriptors", (void *)dev);
267 /* MRs will be registered in mp2mr[] later. */
268 attr.rd = (struct ibv_exp_res_domain_init_attr){
269 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
270 IBV_EXP_RES_DOMAIN_MSG_MODEL),
271 .thread_model = IBV_EXP_THREAD_SINGLE,
272 .msg_model = IBV_EXP_MSG_HIGH_BW,
274 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
275 if (tmpl.rd == NULL) {
277 ERROR("%p: RD creation failure: %s",
278 (void *)dev, strerror(ret));
281 attr.cq = (struct ibv_exp_cq_init_attr){
282 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
283 .res_domain = tmpl.rd,
285 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
286 if (tmpl.cq == NULL) {
288 ERROR("%p: CQ creation failure: %s",
289 (void *)dev, strerror(ret));
292 DEBUG("priv->device_attr.max_qp_wr is %d",
293 priv->device_attr.max_qp_wr);
294 DEBUG("priv->device_attr.max_sge is %d",
295 priv->device_attr.max_sge);
296 attr.init = (struct ibv_exp_qp_init_attr){
297 /* CQ to be associated with the send queue. */
299 /* CQ to be associated with the receive queue. */
302 /* Max number of outstanding WRs. */
303 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
304 priv->device_attr.max_qp_wr :
306 /* Max number of scatter/gather elements in a WR. */
308 #if MLX5_PMD_MAX_INLINE > 0
309 .max_inline_data = MLX5_PMD_MAX_INLINE,
312 .qp_type = IBV_QPT_RAW_PACKET,
313 /* Do *NOT* enable this, completions events are managed per
317 .res_domain = tmpl.rd,
318 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
319 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
321 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
322 if (tmpl.qp == NULL) {
323 ret = (errno ? errno : EINVAL);
324 ERROR("%p: QP creation failure: %s",
325 (void *)dev, strerror(ret));
328 #if MLX5_PMD_MAX_INLINE > 0
329 /* ibv_create_qp() updates this value. */
330 tmpl.max_inline = attr.init.cap.max_inline_data;
332 attr.mod = (struct ibv_exp_qp_attr){
333 /* Move the QP to this state. */
334 .qp_state = IBV_QPS_INIT,
335 /* Primary port number. */
336 .port_num = priv->port
338 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
339 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
341 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
342 (void *)dev, strerror(ret));
345 ret = txq_alloc_elts(&tmpl, desc);
347 ERROR("%p: TXQ allocation failed: %s",
348 (void *)dev, strerror(ret));
351 attr.mod = (struct ibv_exp_qp_attr){
352 .qp_state = IBV_QPS_RTR
354 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
356 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
357 (void *)dev, strerror(ret));
360 attr.mod.qp_state = IBV_QPS_RTS;
361 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
363 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
364 (void *)dev, strerror(ret));
367 attr.params = (struct ibv_exp_query_intf_params){
368 .intf_scope = IBV_EXP_INTF_GLOBAL,
369 .intf = IBV_EXP_INTF_CQ,
372 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
373 if (tmpl.if_cq == NULL) {
375 ERROR("%p: CQ interface family query failed with status %d",
376 (void *)dev, status);
379 attr.params = (struct ibv_exp_query_intf_params){
380 .intf_scope = IBV_EXP_INTF_GLOBAL,
381 .intf = IBV_EXP_INTF_QP_BURST,
383 #ifdef HAVE_VERBS_VLAN_INSERTION
386 #ifdef HAVE_EXP_QP_BURST_CREATE_ENABLE_MULTI_PACKET_SEND_WR
387 /* Enable multi-packet send if supported. */
390 IBV_EXP_QP_BURST_CREATE_ENABLE_MULTI_PACKET_SEND_WR :
394 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
395 if (tmpl.if_qp == NULL) {
397 ERROR("%p: QP interface family query failed with status %d",
398 (void *)dev, status);
401 /* Clean up txq in case we're reinitializing it. */
402 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
405 txq->poll_cnt = txq->if_cq->poll_cnt;
406 #if MLX5_PMD_MAX_INLINE > 0
407 txq->send_pending_inline = txq->if_qp->send_pending_inline;
408 #ifdef HAVE_VERBS_VLAN_INSERTION
409 txq->send_pending_inline_vlan = txq->if_qp->send_pending_inline_vlan;
412 txq->send_pending = txq->if_qp->send_pending;
413 #ifdef HAVE_VERBS_VLAN_INSERTION
414 txq->send_pending_vlan = txq->if_qp->send_pending_vlan;
416 txq->send_flush = txq->if_qp->send_flush;
417 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
418 /* Pre-register known mempools. */
419 rte_mempool_walk(txq_mp2mr_iter, txq);
429 * DPDK callback to configure a TX queue.
432 * Pointer to Ethernet device structure.
436 * Number of descriptors to configure in queue.
438 * NUMA socket on which memory must be allocated.
440 * Thresholds parameters.
443 * 0 on success, negative errno value on failure.
446 mlx5_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
447 unsigned int socket, const struct rte_eth_txconf *conf)
449 struct priv *priv = dev->data->dev_private;
450 struct txq *txq = (*priv->txqs)[idx];
453 if (mlx5_is_secondary())
454 return -E_RTE_SECONDARY;
457 DEBUG("%p: configuring queue %u for %u descriptors",
458 (void *)dev, idx, desc);
459 if (idx >= priv->txqs_n) {
460 ERROR("%p: queue index out of range (%u >= %u)",
461 (void *)dev, idx, priv->txqs_n);
466 DEBUG("%p: reusing already allocated queue index %u (%p)",
467 (void *)dev, idx, (void *)txq);
472 (*priv->txqs)[idx] = NULL;
475 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
477 ERROR("%p: unable to allocate queue index %u",
483 ret = txq_setup(dev, txq, desc, socket, conf);
487 txq->stats.idx = idx;
488 DEBUG("%p: adding TX queue %p to list",
489 (void *)dev, (void *)txq);
490 (*priv->txqs)[idx] = txq;
491 /* Update send callback. */
492 dev->tx_pkt_burst = mlx5_tx_burst;
499 * DPDK callback to release a TX queue.
502 * Generic TX queue pointer.
505 mlx5_tx_queue_release(void *dpdk_txq)
507 struct txq *txq = (struct txq *)dpdk_txq;
511 if (mlx5_is_secondary())
518 for (i = 0; (i != priv->txqs_n); ++i)
519 if ((*priv->txqs)[i] == txq) {
520 DEBUG("%p: removing TX queue %p from list",
521 (void *)priv->dev, (void *)txq);
522 (*priv->txqs)[i] = NULL;
531 * DPDK callback for TX in secondary processes.
533 * This function configures all queues from primary process information
534 * if necessary before reverting to the normal TX burst callback.
537 * Generic pointer to TX queue structure.
539 * Packets to transmit.
541 * Number of packets in array.
544 * Number of packets successfully transmitted (<= pkts_n).
547 mlx5_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
550 struct txq *txq = dpdk_txq;
551 struct priv *priv = mlx5_secondary_data_setup(txq->priv);
552 struct priv *primary_priv;
558 mlx5_secondary_data[priv->dev->data->port_id].primary_priv;
559 /* Look for queue index in both private structures. */
560 for (index = 0; index != priv->txqs_n; ++index)
561 if (((*primary_priv->txqs)[index] == txq) ||
562 ((*priv->txqs)[index] == txq))
564 if (index == priv->txqs_n)
566 txq = (*priv->txqs)[index];
567 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);