4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
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41 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
43 #pragma GCC diagnostic ignored "-pedantic"
45 #include <infiniband/verbs.h>
47 #pragma GCC diagnostic error "-pedantic"
50 /* DPDK headers don't like -pedantic. */
52 #pragma GCC diagnostic ignored "-pedantic"
55 #include <rte_malloc.h>
56 #include <rte_ethdev.h>
57 #include <rte_common.h>
59 #pragma GCC diagnostic error "-pedantic"
62 #include "mlx5_utils.h"
64 #include "mlx5_rxtx.h"
65 #include "mlx5_autoconf.h"
66 #include "mlx5_defs.h"
69 * Allocate TX queue elements.
72 * Pointer to TX queue structure.
74 * Number of elements to allocate.
77 * 0 on success, errno value on failure.
80 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
83 struct txq_elt (*elts)[elts_n] =
84 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
88 ERROR("%p: can't allocate packets array", (void *)txq);
92 for (i = 0; (i != elts_n); ++i) {
93 struct txq_elt *elt = &(*elts)[i];
97 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
103 /* Request send completion every MLX5_PMD_TX_PER_COMP_REQ packets or
104 * at least 4 times per ring. */
105 txq->elts_comp_cd_init =
106 ((MLX5_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
107 MLX5_PMD_TX_PER_COMP_REQ : (elts_n / 4));
108 txq->elts_comp_cd = txq->elts_comp_cd_init;
114 DEBUG("%p: failed, freed everything", (void *)txq);
120 * Free TX queue elements.
123 * Pointer to TX queue structure.
126 txq_free_elts(struct txq *txq)
128 unsigned int elts_n = txq->elts_n;
129 unsigned int elts_head = txq->elts_head;
130 unsigned int elts_tail = txq->elts_tail;
131 struct txq_elt (*elts)[elts_n] = txq->elts;
133 DEBUG("%p: freeing WRs", (void *)txq);
138 txq->elts_comp_cd = 0;
139 txq->elts_comp_cd_init = 0;
144 while (elts_tail != elts_head) {
145 struct txq_elt *elt = &(*elts)[elts_tail];
147 assert(elt->buf != NULL);
148 rte_pktmbuf_free(elt->buf);
151 memset(elt, 0x77, sizeof(*elt));
153 if (++elts_tail == elts_n)
160 * Clean up a TX queue.
162 * Destroy objects, free allocated memory and reset the structure for reuse.
165 * Pointer to TX queue structure.
168 txq_cleanup(struct txq *txq)
170 struct ibv_exp_release_intf_params params;
173 DEBUG("cleaning up %p", (void *)txq);
175 txq->poll_cnt = NULL;
176 #if MLX5_PMD_MAX_INLINE > 0
177 txq->send_pending_inline = NULL;
179 txq->send_flush = NULL;
180 if (txq->if_qp != NULL) {
181 assert(txq->priv != NULL);
182 assert(txq->priv->ctx != NULL);
183 assert(txq->qp != NULL);
184 params = (struct ibv_exp_release_intf_params){
187 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
191 if (txq->if_cq != NULL) {
192 assert(txq->priv != NULL);
193 assert(txq->priv->ctx != NULL);
194 assert(txq->cq != NULL);
195 params = (struct ibv_exp_release_intf_params){
198 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
203 claim_zero(ibv_destroy_qp(txq->qp));
205 claim_zero(ibv_destroy_cq(txq->cq));
206 if (txq->rd != NULL) {
207 struct ibv_exp_destroy_res_domain_attr attr = {
211 assert(txq->priv != NULL);
212 assert(txq->priv->ctx != NULL);
213 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
217 for (i = 0; (i != RTE_DIM(txq->mp2mr)); ++i) {
218 if (txq->mp2mr[i].mp == NULL)
220 assert(txq->mp2mr[i].mr != NULL);
221 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
223 memset(txq, 0, sizeof(*txq));
227 * Configure a TX queue.
230 * Pointer to Ethernet device structure.
232 * Pointer to TX queue structure.
234 * Number of descriptors to configure in queue.
236 * NUMA socket on which memory must be allocated.
238 * Thresholds parameters.
241 * 0 on success, errno value on failure.
244 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
245 unsigned int socket, const struct rte_eth_txconf *conf)
247 struct priv *priv = mlx5_get_priv(dev);
253 struct ibv_exp_query_intf_params params;
254 struct ibv_exp_qp_init_attr init;
255 struct ibv_exp_res_domain_init_attr rd;
256 struct ibv_exp_cq_init_attr cq;
257 struct ibv_exp_qp_attr mod;
259 enum ibv_exp_query_intf_status status;
262 (void)conf; /* Thresholds configuration (ignored). */
264 ERROR("%p: invalid number of TX descriptors", (void *)dev);
267 if (MLX5_PMD_SGE_WR_N > 1) {
268 ERROR("%p: TX gather is not supported", (void *)dev);
271 /* MRs will be registered in mp2mr[] later. */
272 attr.rd = (struct ibv_exp_res_domain_init_attr){
273 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
274 IBV_EXP_RES_DOMAIN_MSG_MODEL),
275 .thread_model = IBV_EXP_THREAD_SINGLE,
276 .msg_model = IBV_EXP_MSG_HIGH_BW,
278 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
279 if (tmpl.rd == NULL) {
281 ERROR("%p: RD creation failure: %s",
282 (void *)dev, strerror(ret));
285 attr.cq = (struct ibv_exp_cq_init_attr){
286 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
287 .res_domain = tmpl.rd,
289 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
290 if (tmpl.cq == NULL) {
292 ERROR("%p: CQ creation failure: %s",
293 (void *)dev, strerror(ret));
296 DEBUG("priv->device_attr.max_qp_wr is %d",
297 priv->device_attr.max_qp_wr);
298 DEBUG("priv->device_attr.max_sge is %d",
299 priv->device_attr.max_sge);
300 attr.init = (struct ibv_exp_qp_init_attr){
301 /* CQ to be associated with the send queue. */
303 /* CQ to be associated with the receive queue. */
306 /* Max number of outstanding WRs. */
307 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
308 priv->device_attr.max_qp_wr :
310 /* Max number of scatter/gather elements in a WR. */
312 #if MLX5_PMD_MAX_INLINE > 0
313 .max_inline_data = MLX5_PMD_MAX_INLINE,
316 .qp_type = IBV_QPT_RAW_PACKET,
317 /* Do *NOT* enable this, completions events are managed per
321 .res_domain = tmpl.rd,
322 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
323 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
325 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
326 if (tmpl.qp == NULL) {
327 ret = (errno ? errno : EINVAL);
328 ERROR("%p: QP creation failure: %s",
329 (void *)dev, strerror(ret));
332 #if MLX5_PMD_MAX_INLINE > 0
333 /* ibv_create_qp() updates this value. */
334 tmpl.max_inline = attr.init.cap.max_inline_data;
336 attr.mod = (struct ibv_exp_qp_attr){
337 /* Move the QP to this state. */
338 .qp_state = IBV_QPS_INIT,
339 /* Primary port number. */
340 .port_num = priv->port
342 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
343 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
345 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
346 (void *)dev, strerror(ret));
349 ret = txq_alloc_elts(&tmpl, desc);
351 ERROR("%p: TXQ allocation failed: %s",
352 (void *)dev, strerror(ret));
355 attr.mod = (struct ibv_exp_qp_attr){
356 .qp_state = IBV_QPS_RTR
358 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
360 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
361 (void *)dev, strerror(ret));
364 attr.mod.qp_state = IBV_QPS_RTS;
365 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
367 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
368 (void *)dev, strerror(ret));
371 attr.params = (struct ibv_exp_query_intf_params){
372 .intf_scope = IBV_EXP_INTF_GLOBAL,
373 .intf = IBV_EXP_INTF_CQ,
376 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
377 if (tmpl.if_cq == NULL) {
379 ERROR("%p: CQ interface family query failed with status %d",
380 (void *)dev, status);
383 attr.params = (struct ibv_exp_query_intf_params){
384 .intf_scope = IBV_EXP_INTF_GLOBAL,
385 .intf = IBV_EXP_INTF_QP_BURST,
387 #ifdef HAVE_VERBS_VLAN_INSERTION
390 #ifdef HAVE_EXP_QP_BURST_CREATE_ENABLE_MULTI_PACKET_SEND_WR
391 /* Enable multi-packet send if supported. */
394 IBV_EXP_QP_BURST_CREATE_ENABLE_MULTI_PACKET_SEND_WR :
398 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
399 if (tmpl.if_qp == NULL) {
401 ERROR("%p: QP interface family query failed with status %d",
402 (void *)dev, status);
405 /* Clean up txq in case we're reinitializing it. */
406 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
409 txq->poll_cnt = txq->if_cq->poll_cnt;
410 #if MLX5_PMD_MAX_INLINE > 0
411 txq->send_pending_inline = txq->if_qp->send_pending_inline;
412 #ifdef HAVE_VERBS_VLAN_INSERTION
413 txq->send_pending_inline_vlan = txq->if_qp->send_pending_inline_vlan;
416 txq->send_pending = txq->if_qp->send_pending;
417 #ifdef HAVE_VERBS_VLAN_INSERTION
418 txq->send_pending_vlan = txq->if_qp->send_pending_vlan;
420 txq->send_flush = txq->if_qp->send_flush;
421 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
422 /* Pre-register known mempools. */
423 rte_mempool_walk(txq_mp2mr_iter, txq);
433 * DPDK callback to configure a TX queue.
436 * Pointer to Ethernet device structure.
440 * Number of descriptors to configure in queue.
442 * NUMA socket on which memory must be allocated.
444 * Thresholds parameters.
447 * 0 on success, negative errno value on failure.
450 mlx5_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
451 unsigned int socket, const struct rte_eth_txconf *conf)
453 struct priv *priv = dev->data->dev_private;
454 struct txq *txq = (*priv->txqs)[idx];
457 if (mlx5_is_secondary())
458 return -E_RTE_SECONDARY;
461 DEBUG("%p: configuring queue %u for %u descriptors",
462 (void *)dev, idx, desc);
463 if (idx >= priv->txqs_n) {
464 ERROR("%p: queue index out of range (%u >= %u)",
465 (void *)dev, idx, priv->txqs_n);
470 DEBUG("%p: reusing already allocated queue index %u (%p)",
471 (void *)dev, idx, (void *)txq);
476 (*priv->txqs)[idx] = NULL;
479 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
481 ERROR("%p: unable to allocate queue index %u",
487 ret = txq_setup(dev, txq, desc, socket, conf);
491 txq->stats.idx = idx;
492 DEBUG("%p: adding TX queue %p to list",
493 (void *)dev, (void *)txq);
494 (*priv->txqs)[idx] = txq;
495 /* Update send callback. */
496 dev->tx_pkt_burst = mlx5_tx_burst;
503 * DPDK callback to release a TX queue.
506 * Generic TX queue pointer.
509 mlx5_tx_queue_release(void *dpdk_txq)
511 struct txq *txq = (struct txq *)dpdk_txq;
515 if (mlx5_is_secondary())
522 for (i = 0; (i != priv->txqs_n); ++i)
523 if ((*priv->txqs)[i] == txq) {
524 DEBUG("%p: removing TX queue %p from list",
525 (void *)priv->dev, (void *)txq);
526 (*priv->txqs)[i] = NULL;
535 * DPDK callback for TX in secondary processes.
537 * This function configures all queues from primary process information
538 * if necessary before reverting to the normal TX burst callback.
541 * Generic pointer to TX queue structure.
543 * Packets to transmit.
545 * Number of packets in array.
548 * Number of packets successfully transmitted (<= pkts_n).
551 mlx5_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
554 struct txq *txq = dpdk_txq;
555 struct priv *priv = mlx5_secondary_data_setup(txq->priv);
556 struct priv *primary_priv;
562 mlx5_secondary_data[priv->dev->data->port_id].primary_priv;
563 /* Look for queue index in both private structures. */
564 for (index = 0; index != priv->txqs_n; ++index)
565 if (((*primary_priv->txqs)[index] == txq) ||
566 ((*priv->txqs)[index] == txq))
568 if (index == priv->txqs_n)
570 txq = (*priv->txqs)[index];
571 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);