1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
11 #include <rte_windows.h>
12 #include <ethdev_pci.h>
14 #include <mlx5_glue.h>
15 #include <mlx5_devx_cmds.h>
16 #include <mlx5_common.h>
17 #include <mlx5_common_mp.h>
18 #include <mlx5_common_mr.h>
19 #include <mlx5_malloc.h>
21 #include "mlx5_defs.h"
23 #include "mlx5_common_os.h"
24 #include "mlx5_utils.h"
25 #include "mlx5_rxtx.h"
28 #include "mlx5_autoconf.h"
29 #include "mlx5_flow.h"
30 #include "mlx5_devx.h"
32 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
34 /* Spinlock for mlx5_shared_data allocation. */
35 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
37 /* rte flow indexed pool configuration. */
38 static struct mlx5_indexed_pool_config icfg[] = {
40 .size = sizeof(struct rte_flow),
44 .malloc = mlx5_malloc,
47 .type = "ctl_flow_ipool",
50 .size = sizeof(struct rte_flow),
56 .malloc = mlx5_malloc,
58 .per_core_cache = 1 << 14,
59 .type = "rte_flow_ipool",
62 .size = sizeof(struct rte_flow),
68 .malloc = mlx5_malloc,
71 .type = "mcp_flow_ipool",
76 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
78 struct mlx5_priv *priv = dev->data->dev_private;
79 void *ctx = priv->sh->cdev->ctx;
81 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
82 if (!priv->q_counters) {
83 DRV_LOG(ERR, "Port %d queue counter object cannot be created "
84 "by DevX - imissed counter will be unavailable",
88 priv->counter_set_id = priv->q_counters->id;
92 * Initialize shared data between primary and secondary process.
94 * A memzone is reserved by primary process and secondary processes attach to
98 * 0 on success, a negative errno value otherwise and rte_errno is set.
101 mlx5_init_shared_data(void)
103 const struct rte_memzone *mz;
106 rte_spinlock_lock(&mlx5_shared_data_lock);
107 if (mlx5_shared_data == NULL) {
108 /* Allocate shared memory. */
109 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
110 sizeof(*mlx5_shared_data),
114 "Cannot allocate mlx5 shared data");
118 mlx5_shared_data = mz->addr;
119 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
120 rte_spinlock_init(&mlx5_shared_data->lock);
123 rte_spinlock_unlock(&mlx5_shared_data_lock);
128 * PMD global initialization.
130 * Independent from individual device, this function initializes global
131 * per-PMD data structures distinguishing primary and secondary processes.
132 * Hence, each initialization is called once per a process.
135 * 0 on success, a negative errno value otherwise and rte_errno is set.
140 if (mlx5_init_shared_data())
146 * Get mlx5 device attributes.
149 * Pointer to mlx5 device.
152 * Pointer to mlx5 device attributes.
155 * 0 on success, a negative errno value otherwise and rte_errno is set.
158 mlx5_os_get_dev_attr(struct mlx5_common_device *cdev,
159 struct mlx5_dev_attr *device_attr)
161 struct mlx5_context *mlx5_ctx;
162 void *pv_iseg = NULL;
165 if (!cdev || !cdev->ctx) {
169 mlx5_ctx = (struct mlx5_context *)cdev->ctx;
170 memset(device_attr, 0, sizeof(*device_attr));
171 device_attr->max_cq = 1 << cdev->config.hca_attr.log_max_cq;
172 device_attr->max_qp = 1 << cdev->config.hca_attr.log_max_qp;
173 device_attr->max_qp_wr = 1 << cdev->config.hca_attr.log_max_qp_sz;
174 device_attr->max_cqe = 1 << cdev->config.hca_attr.log_max_cq_sz;
175 device_attr->max_mr = 1 << cdev->config.hca_attr.log_max_mrw_sz;
176 device_attr->max_pd = 1 << cdev->config.hca_attr.log_max_pd;
177 device_attr->max_srq = 1 << cdev->config.hca_attr.log_max_srq;
178 device_attr->max_srq_wr = 1 << cdev->config.hca_attr.log_max_srq_sz;
179 device_attr->max_tso = 1 << cdev->config.hca_attr.max_lso_cap;
180 if (cdev->config.hca_attr.rss_ind_tbl_cap) {
181 device_attr->max_rwq_indirection_table_size =
182 1 << cdev->config.hca_attr.rss_ind_tbl_cap;
184 device_attr->sw_parsing_offloads =
185 mlx5_get_supported_sw_parsing_offloads(&cdev->config.hca_attr);
186 device_attr->tunnel_offloads_caps =
187 mlx5_get_supported_tunneling_offloads(&cdev->config.hca_attr);
188 pv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg);
189 if (pv_iseg == NULL) {
190 DRV_LOG(ERR, "Failed to get device hca_iseg");
194 snprintf(device_attr->fw_ver, 64, "%x.%x.%04x",
195 MLX5_GET(initial_seg, pv_iseg, fw_rev_major),
196 MLX5_GET(initial_seg, pv_iseg, fw_rev_minor),
197 MLX5_GET(initial_seg, pv_iseg, fw_rev_subminor));
202 * Initialize DR related data within private structure.
203 * Routine checks the reference counter and does actual
204 * resources creation/initialization only if counter is zero.
207 * Pointer to the private device data structure.
210 * Zero on success, positive error code otherwise.
213 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
215 struct mlx5_dev_ctx_shared *sh = priv->sh;
219 err = mlx5_alloc_table_hash_list(priv);
221 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse",
222 (void *)sh->flow_tbls);
226 * Destroy DR related data within private structure.
229 * Pointer to the private device data structure.
232 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
234 mlx5_free_table_hash_list(priv);
238 * Set the completion channel file descriptor interrupt as non-blocking.
239 * Currently it has no support under Windows.
242 * Pointer to RQ channel object, which includes the channel fd
245 * The file descriptor (representing the interrupt) used in this channel.
248 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
251 mlx5_os_set_nonblock_channel_fd(int fd)
254 DRV_LOG(WARNING, "%s: is not supported", __func__);
259 * DV flow counter mode detect and config.
262 * Pointer to rte_eth_dev structure.
266 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
268 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
269 struct mlx5_priv *priv = dev->data->dev_private;
270 struct mlx5_dev_ctx_shared *sh = priv->sh;
271 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
274 #ifndef HAVE_IBV_DEVX_ASYNC
278 if (!sh->devx || !priv->config.dv_flow_en ||
279 !hca_attr->flow_counters_dump ||
280 !(hca_attr->flow_counter_bulk_alloc_bitmap & 0x4) ||
281 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
285 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
286 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
287 hca_attr->flow_counters_dump,
288 hca_attr->flow_counter_bulk_alloc_bitmap);
289 /* Initialize fallback mode only on the port initializes sh. */
291 sh->cmng.counter_fallback = fallback;
292 else if (fallback != sh->cmng.counter_fallback)
293 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
294 "with others:%d.", PORT_ID(priv), fallback);
299 * Spawn an Ethernet device from DevX information.
302 * Backing DPDK device.
304 * Verbs device parameters (name, port, switch_info) to spawn.
306 * Device configuration parameters.
309 * A valid Ethernet device object on success, NULL otherwise and rte_errno
310 * is set. The following errors are defined:
312 * EEXIST: device is already spawned
314 static struct rte_eth_dev *
315 mlx5_dev_spawn(struct rte_device *dpdk_dev,
316 struct mlx5_dev_spawn_data *spawn,
317 struct mlx5_dev_config *config)
319 const struct mlx5_switch_info *switch_info = &spawn->info;
320 struct mlx5_dev_ctx_shared *sh = NULL;
321 struct mlx5_dev_attr device_attr;
322 struct mlx5_hca_attr *hca_attr;
323 struct rte_eth_dev *eth_dev = NULL;
324 struct mlx5_priv *priv = NULL;
326 struct rte_ether_addr mac;
327 char name[RTE_ETH_NAME_MAX_LEN];
328 int own_domain_id = 0;
332 /* Build device name. */
333 strlcpy(name, dpdk_dev->name, sizeof(name));
334 /* check if the device is already spawned */
335 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
339 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
340 /* Process parameters. */
341 err = mlx5_args(config, dpdk_dev->devargs);
344 DRV_LOG(ERR, "failed to process device arguments: %s",
345 strerror(rte_errno));
348 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
351 /* Update final values for devargs before check sibling config. */
352 config->dv_esw_en = 0;
353 if (!config->dv_flow_en) {
354 DRV_LOG(ERR, "Windows flow mode must be DV flow enable.");
358 if (!config->dv_esw_en &&
359 config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
361 "Metadata mode %u is not supported (no E-Switch).",
362 config->dv_xmeta_en);
363 config->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
365 /* Check sibling device configurations. */
366 err = mlx5_dev_check_sibling_config(sh, config, dpdk_dev);
369 /* Initialize the shutdown event in mlx5_dev_spawn to
370 * support mlx5_is_removed for Windows.
372 err = mlx5_glue->devx_init_showdown_event(sh->cdev->ctx);
374 DRV_LOG(ERR, "failed to init showdown event: %s",
378 DRV_LOG(DEBUG, "MPW isn't supported");
379 mlx5_os_get_dev_attr(sh->cdev, &device_attr);
380 config->swp = device_attr.sw_parsing_offloads &
381 (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
382 MLX5_SW_PARSING_TSO_CAP);
383 config->ind_table_max_size =
384 sh->device_attr.max_rwq_indirection_table_size;
385 config->tunnel_en = device_attr.tunnel_offloads_caps &
386 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
387 MLX5_TUNNELED_OFFLOADS_GRE_CAP |
388 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
389 if (config->tunnel_en) {
390 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
392 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
394 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
396 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""
399 DRV_LOG(DEBUG, "tunnel offloading is not supported");
401 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is no supported");
403 /* Allocate private eth device data. */
404 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
406 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
408 DRV_LOG(ERR, "priv allocation failure");
413 priv->dev_port = spawn->phys_port;
414 priv->pci_dev = spawn->pci_dev;
415 priv->mtu = RTE_ETHER_MTU;
416 priv->mp_id.port_id = port_id;
417 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
418 priv->representor = !!switch_info->representor;
419 priv->master = !!switch_info->master;
420 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
421 priv->vport_meta_tag = 0;
422 priv->vport_meta_mask = 0;
423 priv->pf_bond = spawn->pf_bond;
425 /* representor_id field keeps the unmodified VF index. */
426 priv->representor_id = -1;
428 * Look for sibling devices in order to reuse their switch domain
429 * if any, otherwise allocate one.
431 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
432 const struct mlx5_priv *opriv =
433 rte_eth_devices[port_id].data->dev_private;
436 opriv->sh != priv->sh ||
438 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
440 priv->domain_id = opriv->domain_id;
443 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
444 err = rte_eth_switch_domain_alloc(&priv->domain_id);
447 DRV_LOG(ERR, "unable to allocate switch domain: %s",
448 strerror(rte_errno));
453 DRV_LOG(DEBUG, "counters are not supported");
454 config->ind_table_max_size =
455 sh->device_attr.max_rwq_indirection_table_size;
457 * Remove this check once DPDK supports larger/variable
458 * indirection tables.
460 if (config->ind_table_max_size > (unsigned int)RTE_ETH_RSS_RETA_SIZE_512)
461 config->ind_table_max_size = RTE_ETH_RSS_RETA_SIZE_512;
462 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
463 config->ind_table_max_size);
464 if (config->hw_padding) {
465 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
466 config->hw_padding = 0;
468 config->tso = (sh->device_attr.max_tso > 0);
470 config->tso_max_payload_sz = sh->device_attr.max_tso;
471 DRV_LOG(DEBUG, "%sMPS is %s.",
472 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
473 config->mps == MLX5_MPW ? "legacy " : "",
474 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
475 if (config->cqe_comp) {
476 DRV_LOG(WARNING, "Rx CQE compression isn't supported.");
477 config->cqe_comp = 0;
480 hca_attr = &sh->cdev->config.hca_attr;
481 config->hw_csum = hca_attr->csum_cap;
482 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
483 (config->hw_csum ? "" : "not "));
484 config->hw_vlan_strip = hca_attr->vlan_cap;
485 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
486 (config->hw_vlan_strip ? "" : "not "));
487 config->hw_fcs_strip = hca_attr->scatter_fcs;
490 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
492 err = hca_attr->access_register_user ?
493 mlx5_devx_cmd_register_read
494 (sh->cdev->ctx, MLX5_REGISTER_ID_MTUTC, 0,
495 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
499 /* MTUTC register is read successfully. */
500 ts_mode = MLX5_GET(register_mtutc, reg,
502 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
503 config->rt_timestamp = 1;
505 /* Kernel does not support register reading. */
506 if (hca_attr->dev_freq_khz == (NS_PER_S / MS_PER_S))
507 config->rt_timestamp = 1;
510 if (config->mprq.enabled) {
511 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
512 config->mprq.enabled = 0;
514 if (config->max_dump_files_num == 0)
515 config->max_dump_files_num = 128;
516 eth_dev = rte_eth_dev_allocate(name);
517 if (eth_dev == NULL) {
518 DRV_LOG(ERR, "can not allocate rte ethdev");
522 if (priv->representor) {
523 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
524 eth_dev->data->representor_id = priv->representor_id;
525 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
526 struct mlx5_priv *opriv =
527 rte_eth_devices[port_id].data->dev_private;
530 opriv->domain_id == priv->domain_id &&
531 opriv->sh == priv->sh) {
532 eth_dev->data->backer_port_id = port_id;
536 if (port_id >= RTE_MAX_ETHPORTS)
537 eth_dev->data->backer_port_id = eth_dev->data->port_id;
540 * Store associated network device interface index. This index
541 * is permanent throughout the lifetime of device. So, we may store
542 * the ifindex here and use the cached value further.
544 MLX5_ASSERT(spawn->ifindex);
545 priv->if_index = spawn->ifindex;
546 eth_dev->data->dev_private = priv;
547 priv->dev_data = eth_dev->data;
548 eth_dev->data->mac_addrs = priv->mac;
549 eth_dev->device = dpdk_dev;
550 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
551 /* Configure the first MAC address by default. */
552 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
554 "port %u cannot get MAC address, is mlx5_en"
555 " loaded? (errno: %s).",
556 eth_dev->data->port_id, strerror(rte_errno));
561 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
562 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
563 #ifdef RTE_LIBRTE_MLX5_DEBUG
565 char ifname[MLX5_NAMESIZE];
567 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
568 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
569 eth_dev->data->port_id, ifname);
571 DRV_LOG(DEBUG, "port %u ifname is unknown.",
572 eth_dev->data->port_id);
575 /* Get actual MTU if possible. */
576 err = mlx5_get_mtu(eth_dev, &priv->mtu);
581 DRV_LOG(DEBUG, "port %u MTU is %u.", eth_dev->data->port_id,
583 /* Initialize burst functions to prevent crashes before link-up. */
584 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
585 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
586 eth_dev->dev_ops = &mlx5_dev_ops;
587 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
588 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
589 eth_dev->rx_queue_count = mlx5_rx_queue_count;
590 /* Register MAC address. */
591 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
592 priv->ctrl_flows = 0;
593 TAILQ_INIT(&priv->flow_meters);
594 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
595 if (!priv->mtr_profile_tbl)
597 /* Bring Ethernet device up. */
598 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up.",
599 eth_dev->data->port_id);
600 /* nl calls are unsupported - set to -1 not to fail on release */
601 priv->nl_socket_rdma = -1;
602 priv->nl_socket_route = -1;
603 mlx5_set_link_up(eth_dev);
605 * Even though the interrupt handler is not installed yet,
606 * interrupts will still trigger on the async_fd from
607 * Verbs context returned by ibv_open_device().
609 mlx5_link_update(eth_dev, 0);
610 /* Detect minimal data bytes to inline. */
611 mlx5_set_min_inline(spawn, config);
612 /* Store device configuration on private structure. */
613 priv->config = *config;
614 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
615 icfg[i].release_mem_en = !!config->reclaim_mode;
616 if (config->reclaim_mode)
617 icfg[i].per_core_cache = 0;
618 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
622 /* Create context for virtual machine VLAN workaround. */
623 priv->vmwa_context = NULL;
624 if (config->dv_flow_en) {
625 err = mlx5_alloc_shared_dr(priv);
629 /* No supported flow priority number detection. */
630 priv->sh->flow_max_priority = -1;
631 mlx5_set_metadata_mask(eth_dev);
632 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
633 !priv->sh->dv_regc0_mask) {
634 DRV_LOG(ERR, "metadata mode %u is not supported "
635 "(no metadata reg_c[0] is available).",
636 priv->config.dv_xmeta_en);
640 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
641 mlx5_hrxq_create_cb, mlx5_hrxq_match_cb,
642 mlx5_hrxq_remove_cb, mlx5_hrxq_clone_cb,
643 mlx5_hrxq_clone_free_cb);
644 /* Query availability of metadata reg_c's. */
645 if (!priv->sh->metadata_regc_check_flag) {
646 err = mlx5_flow_discover_mreg_c(eth_dev);
652 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
654 "port %u extensive metadata register is not supported.",
655 eth_dev->data->port_id);
656 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
657 DRV_LOG(ERR, "metadata mode %u is not supported "
658 "(no metadata registers available).",
659 priv->config.dv_xmeta_en);
665 priv->obj_ops = devx_obj_ops;
667 DRV_LOG(ERR, "Windows flow must be DevX.");
671 mlx5_flow_counter_mode_config(eth_dev);
672 mlx5_queue_counter_id_prepare(eth_dev);
676 if (priv->mtr_profile_tbl)
677 mlx5_l3t_destroy(priv->mtr_profile_tbl);
679 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
682 eth_dev->data->dev_private = NULL;
684 if (eth_dev != NULL) {
685 /* mac_addrs must not be freed alone because part of
688 eth_dev->data->mac_addrs = NULL;
689 rte_eth_dev_release_port(eth_dev);
692 mlx5_free_shared_dev_ctx(sh);
693 MLX5_ASSERT(err > 0);
699 * This function should share events between multiple ports of single IB
700 * device. Currently it has no support under Windows.
703 * Pointer to mlx5_dev_ctx_shared object.
706 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
709 DRV_LOG(WARNING, "%s: is not supported", __func__);
713 * This function should share events between multiple ports of single IB
714 * device. Currently it has no support under Windows.
717 * Pointer to mlx5_dev_ctx_shared object.
720 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
723 DRV_LOG(WARNING, "%s: is not supported", __func__);
727 * Read statistics by a named counter.
730 * Pointer to the private device data structure.
731 * @param[in] ctr_name
732 * Pointer to the name of the statistic counter to read
734 * Pointer to read statistic value.
736 * 0 on success and stat is valid, non-zero if failed to read the value
737 * or counter is not supported.
742 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
745 if (priv->q_counters != NULL && strcmp(ctr_name, "out_of_buffer") == 0)
746 return mlx5_devx_cmd_queue_counter_query
747 (priv->q_counters, 0, (uint32_t *)stat);
748 DRV_LOG(WARNING, "%s: is not supported for the %s counter",
754 * Flush device MAC addresses
755 * Currently it has no support under Windows.
758 * Pointer to Ethernet device structure.
762 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
765 DRV_LOG(WARNING, "%s: is not supported", __func__);
769 * Remove a MAC address from device
770 * Currently it has no support under Windows.
773 * Pointer to Ethernet device structure.
778 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
782 DRV_LOG(WARNING, "%s: is not supported", __func__);
786 * Adds a MAC address to the device
787 * Currently it has no support under Windows.
790 * Pointer to Ethernet device structure.
792 * MAC address to register.
797 * 0 on success, a negative errno value otherwise
800 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
804 struct rte_ether_addr lmac;
806 if (mlx5_get_mac(dev, &lmac.addr_bytes)) {
808 "port %u cannot get MAC address, is mlx5_en"
809 " loaded? (errno: %s)",
810 dev->data->port_id, strerror(rte_errno));
813 if (!rte_is_same_ether_addr(&lmac, mac)) {
815 "adding new mac address to device is unsupported");
822 * Modify a VF MAC address
823 * Currently it has no support under Windows.
826 * Pointer to device private data.
828 * MAC address to modify into.
830 * Net device interface index
835 * 0 on success, a negative errno value otherwise
838 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
839 unsigned int iface_idx,
840 struct rte_ether_addr *mac_addr,
847 DRV_LOG(WARNING, "%s: is not supported", __func__);
852 * Set device promiscuous mode
853 * Currently it has no support under Windows.
856 * Pointer to Ethernet device structure.
858 * 0 - promiscuous is disabled, otherwise - enabled
861 * 0 on success, a negative error value otherwise
864 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
868 DRV_LOG(WARNING, "%s: is not supported", __func__);
873 * Set device allmulti mode
876 * Pointer to Ethernet device structure.
878 * 0 - all multicase is disabled, otherwise - enabled
881 * 0 on success, a negative error value otherwise
884 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
888 DRV_LOG(WARNING, "%s: is not supported", __func__);
893 * DPDK callback to register a PCI device.
895 * This function spawns Ethernet devices out of a given device.
898 * Pointer to the common device.
901 * 0 on success, a negative errno value otherwise and rte_errno is set.
904 mlx5_os_net_probe(struct mlx5_common_device *cdev)
906 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
907 struct mlx5_dev_spawn_data spawn = {
911 .phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx),
914 .ifindex = -1, /* Spawn will assign */
915 .info = (struct mlx5_switch_info){
916 .name_type = MLX5_PHYS_PORT_NAME_TYPE_UPLINK,
919 struct mlx5_dev_config dev_config = {
921 .txq_inline_max = MLX5_ARG_UNSET,
922 .txq_inline_min = MLX5_ARG_UNSET,
923 .txq_inline_mpw = MLX5_ARG_UNSET,
924 .txqs_inline = MLX5_ARG_UNSET,
926 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
927 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
930 .log_hp_size = MLX5_ARG_UNSET,
935 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
936 DRV_LOG(ERR, "Secondary process is not supported on Windows.");
939 ret = mlx5_init_once();
941 DRV_LOG(ERR, "unable to init PMD global data: %s",
942 strerror(rte_errno));
945 /* Device specific configuration. */
946 switch (pci_dev->id.device_id) {
947 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
948 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
949 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
950 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
951 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
952 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
953 case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
960 spawn.eth_dev = mlx5_dev_spawn(cdev->dev, &spawn, &dev_config);
963 restore = spawn.eth_dev->data->dev_flags;
964 rte_eth_copy_pci_info(spawn.eth_dev, pci_dev);
965 /* Restore non-PCI flags cleared by the above call. */
966 spawn.eth_dev->data->dev_flags |= restore;
967 rte_eth_dev_probing_finish(spawn.eth_dev);
972 * Cleanup resources when the last device is closed.
975 mlx5_os_net_cleanup(void)
979 const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};