1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
11 #include <rte_windows.h>
12 #include <ethdev_pci.h>
14 #include <mlx5_glue.h>
15 #include <mlx5_devx_cmds.h>
16 #include <mlx5_common.h>
17 #include <mlx5_common_mp.h>
18 #include <mlx5_common_mr.h>
19 #include <mlx5_malloc.h>
21 #include "mlx5_defs.h"
23 #include "mlx5_common_os.h"
24 #include "mlx5_utils.h"
25 #include "mlx5_rxtx.h"
28 #include "mlx5_autoconf.h"
30 #include "mlx5_flow.h"
31 #include "mlx5_devx.h"
33 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
35 /* Spinlock for mlx5_shared_data allocation. */
36 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
38 /* rte flow indexed pool configuration. */
39 static struct mlx5_indexed_pool_config icfg[] = {
41 .size = sizeof(struct rte_flow),
45 .malloc = mlx5_malloc,
48 .type = "ctl_flow_ipool",
51 .size = sizeof(struct rte_flow),
57 .malloc = mlx5_malloc,
59 .per_core_cache = 1 << 14,
60 .type = "rte_flow_ipool",
63 .size = sizeof(struct rte_flow),
69 .malloc = mlx5_malloc,
72 .type = "mcp_flow_ipool",
77 * Initialize shared data between primary and secondary process.
79 * A memzone is reserved by primary process and secondary processes attach to
83 * 0 on success, a negative errno value otherwise and rte_errno is set.
86 mlx5_init_shared_data(void)
88 const struct rte_memzone *mz;
91 rte_spinlock_lock(&mlx5_shared_data_lock);
92 if (mlx5_shared_data == NULL) {
93 /* Allocate shared memory. */
94 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
95 sizeof(*mlx5_shared_data),
99 "Cannot allocate mlx5 shared data");
103 mlx5_shared_data = mz->addr;
104 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
105 rte_spinlock_init(&mlx5_shared_data->lock);
108 rte_spinlock_unlock(&mlx5_shared_data_lock);
113 * PMD global initialization.
115 * Independent from individual device, this function initializes global
116 * per-PMD data structures distinguishing primary and secondary processes.
117 * Hence, each initialization is called once per a process.
120 * 0 on success, a negative errno value otherwise and rte_errno is set.
125 if (mlx5_init_shared_data())
131 * Get mlx5 device attributes.
134 * Pointer to device context.
137 * Pointer to mlx5 device attributes.
140 * 0 on success, non zero error number otherwise
143 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
145 struct mlx5_context *mlx5_ctx;
146 struct mlx5_hca_attr hca_attr;
147 void *pv_iseg = NULL;
153 mlx5_ctx = (struct mlx5_context *)ctx;
154 memset(device_attr, 0, sizeof(*device_attr));
155 err = mlx5_devx_cmd_query_hca_attr(mlx5_ctx, &hca_attr);
157 DRV_LOG(ERR, "Failed to get device hca_cap");
160 device_attr->max_cq = 1 << hca_attr.log_max_cq;
161 device_attr->max_qp = 1 << hca_attr.log_max_qp;
162 device_attr->max_qp_wr = 1 << hca_attr.log_max_qp_sz;
163 device_attr->max_cqe = 1 << hca_attr.log_max_cq_sz;
164 device_attr->max_mr = 1 << hca_attr.log_max_mrw_sz;
165 device_attr->max_pd = 1 << hca_attr.log_max_pd;
166 device_attr->max_srq = 1 << hca_attr.log_max_srq;
167 device_attr->max_srq_wr = 1 << hca_attr.log_max_srq_sz;
168 if (hca_attr.rss_ind_tbl_cap) {
169 device_attr->max_rwq_indirection_table_size =
170 1 << hca_attr.rss_ind_tbl_cap;
172 pv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg);
173 if (pv_iseg == NULL) {
174 DRV_LOG(ERR, "Failed to get device hca_iseg");
178 snprintf(device_attr->fw_ver, 64, "%x.%x.%04x",
179 MLX5_GET(initial_seg, pv_iseg, fw_rev_major),
180 MLX5_GET(initial_seg, pv_iseg, fw_rev_minor),
181 MLX5_GET(initial_seg, pv_iseg, fw_rev_subminor));
187 * Initialize DR related data within private structure.
188 * Routine checks the reference counter and does actual
189 * resources creation/initialization only if counter is zero.
192 * Pointer to the private device data structure.
195 * Zero on success, positive error code otherwise.
198 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
200 struct mlx5_dev_ctx_shared *sh = priv->sh;
204 err = mlx5_alloc_table_hash_list(priv);
206 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse",
207 (void *)sh->flow_tbls);
211 * Destroy DR related data within private structure.
214 * Pointer to the private device data structure.
217 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
219 mlx5_free_table_hash_list(priv);
223 * Set the completion channel file descriptor interrupt as non-blocking.
224 * Currently it has no support under Windows.
227 * Pointer to RQ channel object, which includes the channel fd
230 * The file descriptor (representing the intetrrupt) used in this channel.
233 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
236 mlx5_os_set_nonblock_channel_fd(int fd)
239 DRV_LOG(WARNING, "%s: is not supported", __func__);
244 * Function API open device under Windows
246 * This function calls the Windows glue APIs to open a device.
249 * Pointer to the device attributes (name, port, etc).
251 * Pointer to device configuration structure.
253 * Pointer to shared context structure.
256 * 0 on success, a positive error value otherwise.
259 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
260 const struct mlx5_dev_config *config,
261 struct mlx5_dev_ctx_shared *sh)
263 RTE_SET_USED(config);
265 struct mlx5_context *mlx5_ctx;
267 pthread_mutex_init(&sh->txpp.mutex, NULL);
268 /* Set numa node from pci probe */
269 sh->numa_node = spawn->pci_dev->device.numa_node;
271 /* Try to open device with DevX */
273 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
275 DRV_LOG(ERR, "open_device failed");
280 mlx5_ctx = (struct mlx5_context *)sh->ctx;
281 err = mlx5_glue->query_device(spawn->phys_dev, &mlx5_ctx->mlx5_dev);
283 DRV_LOG(ERR, "Failed to query device context fields.");
288 * DV flow counter mode detect and config.
291 * Pointer to rte_eth_dev structure.
295 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
297 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
298 struct mlx5_priv *priv = dev->data->dev_private;
299 struct mlx5_dev_ctx_shared *sh = priv->sh;
302 #ifndef HAVE_IBV_DEVX_ASYNC
306 if (!priv->config.devx || !priv->config.dv_flow_en ||
307 !priv->config.hca_attr.flow_counters_dump ||
308 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
309 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
313 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
314 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
315 priv->config.hca_attr.flow_counters_dump,
316 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
317 /* Initialize fallback mode only on the port initializes sh. */
319 sh->cmng.counter_fallback = fallback;
320 else if (fallback != sh->cmng.counter_fallback)
321 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
322 "with others:%d.", PORT_ID(priv), fallback);
327 * Spawn an Ethernet device from Verbs information.
330 * Backing DPDK device.
332 * Verbs device parameters (name, port, switch_info) to spawn.
334 * Device configuration parameters.
337 * A valid Ethernet device object on success, NULL otherwise and rte_errno
338 * is set. The following errors are defined:
340 * EEXIST: device is already spawned
342 static struct rte_eth_dev *
343 mlx5_dev_spawn(struct rte_device *dpdk_dev,
344 struct mlx5_dev_spawn_data *spawn,
345 struct mlx5_dev_config *config)
347 const struct mlx5_switch_info *switch_info = &spawn->info;
348 struct mlx5_dev_ctx_shared *sh = NULL;
349 struct mlx5_dev_attr device_attr;
350 struct rte_eth_dev *eth_dev = NULL;
351 struct mlx5_priv *priv = NULL;
353 unsigned int cqe_comp;
354 struct rte_ether_addr mac;
355 char name[RTE_ETH_NAME_MAX_LEN];
356 int own_domain_id = 0;
360 /* Build device name. */
361 strlcpy(name, dpdk_dev->name, sizeof(name));
362 /* check if the device is already spawned */
363 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
367 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
369 * Some parameters are needed in advance to create device context. We
370 * process the devargs here to get ones, and later process devargs
371 * again to override some hardware settings.
373 err = mlx5_args(config, dpdk_dev->devargs);
376 DRV_LOG(ERR, "failed to process device arguments: %s",
377 strerror(rte_errno));
380 mlx5_malloc_mem_select(config->sys_mem_en);
381 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
384 config->devx = sh->devx;
385 /* Initialize the shutdown event in mlx5_dev_spawn to
386 * support mlx5_is_removed for Windows.
388 err = mlx5_glue->devx_init_showdown_event(sh->ctx);
390 DRV_LOG(ERR, "failed to init showdown event: %s",
394 DRV_LOG(DEBUG, "MPW isn't supported");
395 mlx5_os_get_dev_attr(sh->ctx, &device_attr);
397 config->ind_table_max_size =
398 sh->device_attr.max_rwq_indirection_table_size;
400 config->cqe_comp = cqe_comp;
401 DRV_LOG(DEBUG, "tunnel offloading is not supported");
402 config->tunnel_en = 0;
403 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is no supported");
405 /* Allocate private eth device data. */
406 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
408 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
410 DRV_LOG(ERR, "priv allocation failure");
415 priv->dev_port = spawn->phys_port;
416 priv->pci_dev = spawn->pci_dev;
417 priv->mtu = RTE_ETHER_MTU;
418 priv->mp_id.port_id = port_id;
419 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
420 priv->representor = !!switch_info->representor;
421 priv->master = !!switch_info->master;
422 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
423 priv->vport_meta_tag = 0;
424 priv->vport_meta_mask = 0;
425 priv->pf_bond = spawn->pf_bond;
427 /* representor_id field keeps the unmodified VF index. */
428 priv->representor_id = -1;
430 * Look for sibling devices in order to reuse their switch domain
431 * if any, otherwise allocate one.
433 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
434 const struct mlx5_priv *opriv =
435 rte_eth_devices[port_id].data->dev_private;
438 opriv->sh != priv->sh ||
440 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
442 priv->domain_id = opriv->domain_id;
445 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
446 err = rte_eth_switch_domain_alloc(&priv->domain_id);
449 DRV_LOG(ERR, "unable to allocate switch domain: %s",
450 strerror(rte_errno));
455 /* Override some values set by hardware configuration. */
456 mlx5_args(config, dpdk_dev->devargs);
457 err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev);
460 DRV_LOG(DEBUG, "counters are not supported");
461 config->ind_table_max_size =
462 sh->device_attr.max_rwq_indirection_table_size;
464 * Remove this check once DPDK supports larger/variable
465 * indirection tables.
467 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
468 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
469 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
470 config->ind_table_max_size);
471 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
472 (config->hw_vlan_strip ? "" : "not "));
473 if (config->hw_padding) {
474 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
475 config->hw_padding = 0;
478 config->tso_max_payload_sz = sh->device_attr.max_tso;
479 DRV_LOG(DEBUG, "%sMPS is %s.",
480 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
481 config->mps == MLX5_MPW ? "legacy " : "",
482 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
483 if (config->cqe_comp && !cqe_comp) {
484 DRV_LOG(WARNING, "Rx CQE compression isn't supported.");
485 config->cqe_comp = 0;
488 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
493 /* Check relax ordering support. */
494 sh->cmng.relaxed_ordering_read = 0;
495 sh->cmng.relaxed_ordering_write = 0;
496 if (!haswell_broadwell_cpu) {
497 sh->cmng.relaxed_ordering_write =
498 config->hca_attr.relaxed_ordering_write;
499 sh->cmng.relaxed_ordering_read =
500 config->hca_attr.relaxed_ordering_read;
502 config->hw_csum = config->hca_attr.csum_cap;
503 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
504 (config->hw_csum ? "" : "not "));
507 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
509 err = config->hca_attr.access_register_user ?
510 mlx5_devx_cmd_register_read
511 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
512 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
516 /* MTUTC register is read successfully. */
517 ts_mode = MLX5_GET(register_mtutc, reg,
519 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
520 config->rt_timestamp = 1;
522 /* Kernel does not support register reading. */
523 if (config->hca_attr.dev_freq_khz ==
524 (NS_PER_S / MS_PER_S))
525 config->rt_timestamp = 1;
527 sh->rq_ts_format = config->hca_attr.rq_ts_format;
528 sh->sq_ts_format = config->hca_attr.sq_ts_format;
529 sh->qp_ts_format = config->hca_attr.qp_ts_format;
531 if (config->mprq.enabled) {
532 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
533 config->mprq.enabled = 0;
535 if (config->max_dump_files_num == 0)
536 config->max_dump_files_num = 128;
537 eth_dev = rte_eth_dev_allocate(name);
538 if (eth_dev == NULL) {
539 DRV_LOG(ERR, "can not allocate rte ethdev");
543 if (priv->representor) {
544 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
545 eth_dev->data->representor_id = priv->representor_id;
548 * Store associated network device interface index. This index
549 * is permanent throughout the lifetime of device. So, we may store
550 * the ifindex here and use the cached value further.
552 MLX5_ASSERT(spawn->ifindex);
553 priv->if_index = spawn->ifindex;
554 eth_dev->data->dev_private = priv;
555 priv->dev_data = eth_dev->data;
556 eth_dev->data->mac_addrs = priv->mac;
557 eth_dev->device = dpdk_dev;
558 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
559 /* Configure the first MAC address by default. */
560 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
562 "port %u cannot get MAC address, is mlx5_en"
563 " loaded? (errno: %s).",
564 eth_dev->data->port_id, strerror(rte_errno));
569 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
570 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
571 #ifdef RTE_LIBRTE_MLX5_DEBUG
573 char ifname[MLX5_NAMESIZE];
575 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
576 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
577 eth_dev->data->port_id, ifname);
579 DRV_LOG(DEBUG, "port %u ifname is unknown.",
580 eth_dev->data->port_id);
583 /* Get actual MTU if possible. */
584 err = mlx5_get_mtu(eth_dev, &priv->mtu);
589 DRV_LOG(DEBUG, "port %u MTU is %u.", eth_dev->data->port_id,
591 /* Initialize burst functions to prevent crashes before link-up. */
592 eth_dev->rx_pkt_burst = removed_rx_burst;
593 eth_dev->tx_pkt_burst = removed_tx_burst;
594 eth_dev->dev_ops = &mlx5_dev_ops;
595 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
596 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
597 eth_dev->rx_queue_count = mlx5_rx_queue_count;
598 /* Register MAC address. */
599 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
600 priv->ctrl_flows = 0;
601 TAILQ_INIT(&priv->flow_meters);
602 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
603 if (!priv->mtr_profile_tbl)
605 /* Bring Ethernet device up. */
606 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up.",
607 eth_dev->data->port_id);
608 /* nl calls are unsupported - set to -1 not to fail on release */
609 priv->nl_socket_rdma = -1;
610 priv->nl_socket_route = -1;
611 mlx5_set_link_up(eth_dev);
613 * Even though the interrupt handler is not installed yet,
614 * interrupts will still trigger on the async_fd from
615 * Verbs context returned by ibv_open_device().
617 mlx5_link_update(eth_dev, 0);
618 config->dv_esw_en = 0;
619 /* Detect minimal data bytes to inline. */
620 mlx5_set_min_inline(spawn, config);
621 /* Store device configuration on private structure. */
622 priv->config = *config;
623 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
624 icfg[i].release_mem_en = !!config->reclaim_mode;
625 if (config->reclaim_mode)
626 icfg[i].per_core_cache = 0;
627 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
631 /* Create context for virtual machine VLAN workaround. */
632 priv->vmwa_context = NULL;
633 if (config->dv_flow_en) {
634 err = mlx5_alloc_shared_dr(priv);
638 /* No supported flow priority number detection. */
639 priv->config.flow_prio = -1;
640 if (!priv->config.dv_esw_en &&
641 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
642 DRV_LOG(WARNING, "metadata mode %u is not supported "
643 "(no E-Switch)", priv->config.dv_xmeta_en);
644 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
646 mlx5_set_metadata_mask(eth_dev);
647 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
648 !priv->sh->dv_regc0_mask) {
649 DRV_LOG(ERR, "metadata mode %u is not supported "
650 "(no metadata reg_c[0] is available).",
651 priv->config.dv_xmeta_en);
655 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
656 mlx5_hrxq_create_cb, mlx5_hrxq_match_cb,
657 mlx5_hrxq_remove_cb, mlx5_hrxq_clone_cb,
658 mlx5_hrxq_clone_free_cb);
659 /* Query availability of metadata reg_c's. */
660 err = mlx5_flow_discover_mreg_c(eth_dev);
665 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
667 "port %u extensive metadata register is not supported.",
668 eth_dev->data->port_id);
669 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
670 DRV_LOG(ERR, "metadata mode %u is not supported "
671 "(no metadata registers available).",
672 priv->config.dv_xmeta_en);
677 if (config->devx && config->dv_flow_en) {
678 priv->obj_ops = devx_obj_ops;
680 DRV_LOG(ERR, "Flow mode %u is not supported "
681 "(Windows flow must be DevX with DV flow enabled).",
682 priv->config.dv_flow_en);
686 mlx5_flow_counter_mode_config(eth_dev);
690 if (priv->mtr_profile_tbl)
691 mlx5_l3t_destroy(priv->mtr_profile_tbl);
693 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
696 eth_dev->data->dev_private = NULL;
698 if (eth_dev != NULL) {
699 /* mac_addrs must not be freed alone because part of
702 eth_dev->data->mac_addrs = NULL;
703 rte_eth_dev_release_port(eth_dev);
706 mlx5_free_shared_dev_ctx(sh);
707 MLX5_ASSERT(err > 0);
713 * This function should share events between multiple ports of single IB
714 * device. Currently it has no support under Windows.
717 * Pointer to mlx5_dev_ctx_shared object.
720 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
723 DRV_LOG(WARNING, "%s: is not supported", __func__);
727 * This function should share events between multiple ports of single IB
728 * device. Currently it has no support under Windows.
731 * Pointer to mlx5_dev_ctx_shared object.
734 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
737 DRV_LOG(WARNING, "%s: is not supported", __func__);
741 * Read statistics by a named counter.
744 * Pointer to the private device data structure.
745 * @param[in] ctr_name
746 * Pointer to the name of the statistic counter to read
748 * Pointer to read statistic value.
750 * 0 on success and stat is valud, 1 if failed to read the value
755 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
759 RTE_SET_USED(ctr_name);
761 DRV_LOG(WARNING, "%s: is not supported", __func__);
766 * Flush device MAC addresses
767 * Currently it has no support under Windows.
770 * Pointer to Ethernet device structure.
774 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
777 DRV_LOG(WARNING, "%s: is not supported", __func__);
781 * Remove a MAC address from device
782 * Currently it has no support under Windows.
785 * Pointer to Ethernet device structure.
790 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
794 DRV_LOG(WARNING, "%s: is not supported", __func__);
798 * Adds a MAC address to the device
799 * Currently it has no support under Windows.
802 * Pointer to Ethernet device structure.
804 * MAC address to register.
809 * 0 on success, a negative errno value otherwise
812 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
816 struct rte_ether_addr lmac;
818 if (mlx5_get_mac(dev, &lmac.addr_bytes)) {
820 "port %u cannot get MAC address, is mlx5_en"
821 " loaded? (errno: %s)",
822 dev->data->port_id, strerror(rte_errno));
825 if (!rte_is_same_ether_addr(&lmac, mac)) {
827 "adding new mac address to device is unsupported");
834 * Modify a VF MAC address
835 * Currently it has no support under Windows.
838 * Pointer to device private data.
840 * MAC address to modify into.
842 * Net device interface index
847 * 0 on success, a negative errno value otherwise
850 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
851 unsigned int iface_idx,
852 struct rte_ether_addr *mac_addr,
859 DRV_LOG(WARNING, "%s: is not supported", __func__);
864 * Set device promiscuous mode
865 * Currently it has no support under Windows.
868 * Pointer to Ethernet device structure.
870 * 0 - promiscuous is disabled, otherwise - enabled
873 * 0 on success, a negative error value otherwise
876 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
880 DRV_LOG(WARNING, "%s: is not supported", __func__);
885 * Set device allmulti mode
888 * Pointer to Ethernet device structure.
890 * 0 - all multicase is disabled, otherwise - enabled
893 * 0 on success, a negative error value otherwise
896 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
900 DRV_LOG(WARNING, "%s: is not supported", __func__);
905 * Detect if a devx_device_bdf object has identical DBDF values to the
906 * rte_pci_addr found in bus/pci probing
908 * @param[in] devx_bdf
909 * Pointer to the devx_device_bdf structure.
911 * Pointer to the rte_pci_addr structure.
914 * 1 on Device match, 0 on mismatch.
917 mlx5_match_devx_bdf_to_addr(struct devx_device_bdf *devx_bdf,
918 struct rte_pci_addr *addr)
920 if (addr->domain != (devx_bdf->bus_id >> 8) ||
921 addr->bus != (devx_bdf->bus_id & 0xff) ||
922 addr->devid != devx_bdf->dev_id ||
923 addr->function != devx_bdf->fnc_id) {
930 * Detect if a devx_device_bdf object matches the rte_pci_addr
931 * found in bus/pci probing
932 * Compare both the Native/PF BDF and the raw_bdf representing a VF BDF.
934 * @param[in] devx_bdf
935 * Pointer to the devx_device_bdf structure.
937 * Pointer to the rte_pci_addr structure.
940 * 1 on Device match, 0 on mismatch, rte_errno code on failure.
943 mlx5_match_devx_devices_to_addr(struct devx_device_bdf *devx_bdf,
944 struct rte_pci_addr *addr)
947 struct devx_device mlx5_dev;
949 if (mlx5_match_devx_bdf_to_addr(devx_bdf, addr))
952 * Didn't match on Native/PF BDF, could still
953 * Match a VF BDF, check it next
955 err = mlx5_glue->query_device(devx_bdf, &mlx5_dev);
957 DRV_LOG(ERR, "query_device failed");
961 if (mlx5_match_devx_bdf_to_addr(&mlx5_dev.raw_bdf, addr))
967 * DPDK callback to register a PCI device.
969 * This function spawns Ethernet devices out of a given device.
972 * Pointer to the generic device.
975 * 0 on success, a negative errno value otherwise and rte_errno is set.
978 mlx5_os_net_probe(struct rte_device *dev)
980 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev);
981 struct devx_device_bdf *devx_bdf_devs, *orig_devx_bdf_devs;
983 * Number of found IB Devices matching with requested PCI BDF.
984 * nd != 1 means there are multiple IB devices over the same
985 * PCI device and we have representors and master.
989 * Number of found IB device Ports. nd = 1 and np = 1..n means
990 * we have the single multiport IB device, and there may be
991 * representors attached to some of found ports.
992 * Currently not supported.
993 * unsigned int np = 0;
997 * Number of DPDK ethernet devices to Spawn - either over
998 * multiple IB devices or multiple ports of single IB device.
999 * Actually this is the number of iterations to spawn.
1001 unsigned int ns = 0;
1004 * < 0 - no bonding device (single one)
1005 * >= 0 - bonding device (value is slave PF index)
1008 struct mlx5_dev_spawn_data *list = NULL;
1009 struct mlx5_dev_config dev_config;
1010 unsigned int dev_config_vf;
1014 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1015 DRV_LOG(ERR, "Secondary process is not supported on Windows.");
1018 ret = mlx5_init_once();
1020 DRV_LOG(ERR, "unable to init PMD global data: %s",
1021 strerror(rte_errno));
1025 devx_bdf_devs = mlx5_glue->get_device_list(&ret);
1026 orig_devx_bdf_devs = devx_bdf_devs;
1027 if (!devx_bdf_devs) {
1028 rte_errno = errno ? errno : ENOSYS;
1029 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1033 * First scan the list of all Infiniband devices to find
1034 * matching ones, gathering into the list.
1036 struct devx_device_bdf *devx_bdf_match[ret + 1];
1039 err = mlx5_match_devx_devices_to_addr(devx_bdf_devs,
1049 devx_bdf_match[nd++] = devx_bdf_devs;
1051 devx_bdf_match[nd] = NULL;
1053 /* No device matches, just complain and bail out. */
1055 "no DevX device matches PCI device " PCI_PRI_FMT ","
1056 " is DevX Configured?",
1057 pci_dev->addr.domain, pci_dev->addr.bus,
1058 pci_dev->addr.devid, pci_dev->addr.function);
1064 * Now we can determine the maximal
1065 * amount of devices to be spawned.
1067 list = mlx5_malloc(MLX5_MEM_ZERO,
1068 sizeof(struct mlx5_dev_spawn_data),
1069 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1071 DRV_LOG(ERR, "spawn data array allocation failure");
1076 memset(&list[ns].info, 0, sizeof(list[ns].info));
1077 list[ns].max_port = 1;
1078 list[ns].phys_port = 1;
1079 list[ns].phys_dev = devx_bdf_match[ns];
1080 list[ns].eth_dev = NULL;
1081 list[ns].pci_dev = pci_dev;
1082 list[ns].pf_bond = bd;
1083 list[ns].ifindex = -1; /* Spawn will assign */
1085 (struct mlx5_switch_info){
1088 .name_type = MLX5_PHYS_PORT_NAME_TYPE_UPLINK,
1092 /* Device specific configuration. */
1093 switch (pci_dev->id.device_id) {
1094 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1095 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1096 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1097 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1098 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1099 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1100 case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
1107 /* Default configuration. */
1108 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
1109 dev_config.vf = dev_config_vf;
1111 dev_config.dbnc = MLX5_ARG_UNSET;
1112 dev_config.rx_vec_en = 1;
1113 dev_config.txq_inline_max = MLX5_ARG_UNSET;
1114 dev_config.txq_inline_min = MLX5_ARG_UNSET;
1115 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
1116 dev_config.txqs_inline = MLX5_ARG_UNSET;
1117 dev_config.vf_nl_en = 0;
1118 dev_config.mr_ext_memseg_en = 1;
1119 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1120 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1121 dev_config.dv_esw_en = 0;
1122 dev_config.dv_flow_en = 1;
1123 dev_config.decap_en = 0;
1124 dev_config.log_hp_size = MLX5_ARG_UNSET;
1125 list[ns].numa_node = pci_dev->device.numa_node;
1126 list[ns].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1129 if (!list[ns].eth_dev)
1131 restore = list[ns].eth_dev->data->dev_flags;
1132 rte_eth_copy_pci_info(list[ns].eth_dev, pci_dev);
1133 /* Restore non-PCI flags cleared by the above call. */
1134 list[ns].eth_dev->data->dev_flags |= restore;
1135 rte_eth_dev_probing_finish(list[ns].eth_dev);
1139 * Do the routine cleanup:
1140 * - free allocated spawn data array
1141 * - free the device list
1145 MLX5_ASSERT(orig_devx_bdf_devs);
1146 mlx5_glue->free_device_list(orig_devx_bdf_devs);
1151 * Set the reg_mr and dereg_mr call backs
1153 * @param reg_mr_cb[out]
1154 * Pointer to reg_mr func
1155 * @param dereg_mr_cb[out]
1156 * Pointer to dereg_mr func
1160 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
1161 mlx5_dereg_mr_t *dereg_mr_cb)
1163 *reg_mr_cb = mlx5_os_reg_mr;
1164 *dereg_mr_cb = mlx5_os_dereg_mr;
1168 * Extract pdn of PD object using DevX
1171 * Pointer to the DevX PD object.
1173 * Pointer to the PD object number variable.
1176 * 0 on success, error value otherwise.
1179 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1184 *pdn = ((struct mlx5_pd *)pd)->pdn;
1188 const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};