drivers/net/mlx5/windows/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2020 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <errno.h>
   6 #include <stdalign.h>
   7 #include <stddef.h>
   8 #include <stdint.h>
   9 #include <stdlib.h>
  10
  11 #include <rte_windows.h>
  12 #include <ethdev_pci.h>
  13
  14 #include <mlx5_glue.h>
  15 #include <mlx5_devx_cmds.h>
  16 #include <mlx5_common.h>
  17 #include <mlx5_common_mp.h>
  18 #include <mlx5_common_mr.h>
  19 #include <mlx5_malloc.h>
  20
  21 #include "mlx5_defs.h"
  22 #include "mlx5.h"
  23 #include "mlx5_common_os.h"
  24 #include "mlx5_utils.h"
  25 #include "mlx5_rxtx.h"
  26 #include "mlx5_rx.h"
  27 #include "mlx5_tx.h"
  28 #include "mlx5_autoconf.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_devx.h"
  31
  32 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  33
  34 /* Spinlock for mlx5_shared_data allocation. */
  35 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  36
  37 /* rte flow indexed pool configuration. */
  38 static struct mlx5_indexed_pool_config icfg[] = {
  39         {
  40                 .size = sizeof(struct rte_flow),
  41                 .trunk_size = 64,
  42                 .need_lock = 1,
  43                 .release_mem_en = 0,
  44                 .malloc = mlx5_malloc,
  45                 .free = mlx5_free,
  46                 .per_core_cache = 0,
  47                 .type = "ctl_flow_ipool",
  48         },
  49         {
  50                 .size = sizeof(struct rte_flow),
  51                 .trunk_size = 64,
  52                 .grow_trunk = 3,
  53                 .grow_shift = 2,
  54                 .need_lock = 1,
  55                 .release_mem_en = 0,
  56                 .malloc = mlx5_malloc,
  57                 .free = mlx5_free,
  58                 .per_core_cache = 1 << 14,
  59                 .type = "rte_flow_ipool",
  60         },
  61         {
  62                 .size = sizeof(struct rte_flow),
  63                 .trunk_size = 64,
  64                 .grow_trunk = 3,
  65                 .grow_shift = 2,
  66                 .need_lock = 1,
  67                 .release_mem_en = 0,
  68                 .malloc = mlx5_malloc,
  69                 .free = mlx5_free,
  70                 .per_core_cache = 0,
  71                 .type = "mcp_flow_ipool",
  72         },
  73 };
  74
  75 static void
  76 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
  77 {
  78         struct mlx5_priv *priv = dev->data->dev_private;
  79         void *ctx = priv->sh->cdev->ctx;
  80
  81         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
  82         if (!priv->q_counters) {
  83                 DRV_LOG(ERR, "Port %d queue counter object cannot be created "
  84                         "by DevX - imissed counter will be unavailable",
  85                         dev->data->port_id);
  86                 return;
  87         }
  88         priv->counter_set_id = priv->q_counters->id;
  89 }
  90
  91 /**
  92  * Initialize shared data between primary and secondary process.
  93  *
  94  * A memzone is reserved by primary process and secondary processes attach to
  95  * the memzone.
  96  *
  97  * @return
  98  *   0 on success, a negative errno value otherwise and rte_errno is set.
  99  */
 100 static int
 101 mlx5_init_shared_data(void)
 102 {
 103         const struct rte_memzone *mz;
 104         int ret = 0;
 105
 106         rte_spinlock_lock(&mlx5_shared_data_lock);
 107         if (mlx5_shared_data == NULL) {
 108                 /* Allocate shared memory. */
 109                 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 110                                          sizeof(*mlx5_shared_data),
 111                                          SOCKET_ID_ANY, 0);
 112                 if (mz == NULL) {
 113                         DRV_LOG(ERR,
 114                                 "Cannot allocate mlx5 shared data");
 115                         ret = -rte_errno;
 116                         goto error;
 117                 }
 118                 mlx5_shared_data = mz->addr;
 119                 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 120                 rte_spinlock_init(&mlx5_shared_data->lock);
 121         }
 122 error:
 123         rte_spinlock_unlock(&mlx5_shared_data_lock);
 124         return ret;
 125 }
 126
 127 /**
 128  * PMD global initialization.
 129  *
 130  * Independent from individual device, this function initializes global
 131  * per-PMD data structures distinguishing primary and secondary processes.
 132  * Hence, each initialization is called once per a process.
 133  *
 134  * @return
 135  *   0 on success, a negative errno value otherwise and rte_errno is set.
 136  */
 137 static int
 138 mlx5_init_once(void)
 139 {
 140         if (mlx5_init_shared_data())
 141                 return -rte_errno;
 142         return 0;
 143 }
 144
 145 /**
 146  * Get mlx5 device capabilities.
 147  *
 148  * @param sh
 149  *   Pointer to shared device context.
 150  *
 151  * @return
 152  *   0 on success, a negative errno value otherwise and rte_errno is set.
 153  */
 154 int
 155 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
 156 {
 157         struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
 158         struct mlx5_context *mlx5_ctx = sh->cdev->ctx;
 159         void *pv_iseg = NULL;
 160         u32 cb_iseg = 0;
 161
 162         MLX5_ASSERT(sh->cdev->config.devx);
 163         MLX5_ASSERT(mlx5_dev_is_pci(sh->cdev->dev));
 164         pv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg);
 165         if (pv_iseg == NULL) {
 166                 DRV_LOG(ERR, "Failed to get device hca_iseg.");
 167                 rte_errno = errno;
 168                 return -rte_errno;
 169         }
 170         memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
 171         sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(sh->cdev->dev));
 172         sh->dev_cap.max_cq = 1 << hca_attr->log_max_cq;
 173         sh->dev_cap.max_qp = 1 << hca_attr->log_max_qp;
 174         sh->dev_cap.max_qp_wr = 1 << hca_attr->log_max_qp_sz;
 175         sh->dev_cap.dv_flow_en = 1;
 176         sh->dev_cap.mps = MLX5_MPW_DISABLED;
 177         DRV_LOG(DEBUG, "MPW isn't supported.");
 178         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is no supported.");
 179         sh->dev_cap.hw_csum = hca_attr->csum_cap;
 180         DRV_LOG(DEBUG, "Checksum offloading is %ssupported.",
 181                 (sh->dev_cap.hw_csum ? "" : "not "));
 182         sh->dev_cap.hw_vlan_strip = hca_attr->vlan_cap;
 183         DRV_LOG(DEBUG, "VLAN stripping is %ssupported.",
 184                 (sh->dev_cap.hw_vlan_strip ? "" : "not "));
 185         sh->dev_cap.hw_fcs_strip = hca_attr->scatter_fcs;
 186         sh->dev_cap.tso = ((1 << hca_attr->max_lso_cap) > 0);
 187         if (sh->dev_cap.tso)
 188                 sh->dev_cap.tso_max_payload_sz = 1 << hca_attr->max_lso_cap;
 189         DRV_LOG(DEBUG, "Counters are not supported.");
 190         if (hca_attr->rss_ind_tbl_cap) {
 191                 /*
 192                  * DPDK doesn't support larger/variable indirection tables.
 193                  * Once DPDK supports it, take max size from device attr.
 194                  */
 195                 sh->dev_cap.ind_table_max_size =
 196                         RTE_MIN(1 << hca_attr->rss_ind_tbl_cap,
 197                                 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512);
 198                 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u",
 199                         sh->dev_cap.ind_table_max_size);
 200         }
 201         sh->dev_cap.swp = mlx5_get_supported_sw_parsing_offloads(hca_attr);
 202         sh->dev_cap.tunnel_en = mlx5_get_supported_tunneling_offloads(hca_attr);
 203         if (sh->dev_cap.tunnel_en) {
 204                 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s",
 205                         sh->dev_cap.tunnel_en &
 206                         MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
 207                         sh->dev_cap.tunnel_en &
 208                         MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
 209                         sh->dev_cap.tunnel_en &
 210                         MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : "");
 211         } else {
 212                 DRV_LOG(DEBUG, "Tunnel offloading is not supported.");
 213         }
 214         snprintf(sh->dev_cap.fw_ver, 64, "%x.%x.%04x",
 215                  MLX5_GET(initial_seg, pv_iseg, fw_rev_major),
 216                  MLX5_GET(initial_seg, pv_iseg, fw_rev_minor),
 217                  MLX5_GET(initial_seg, pv_iseg, fw_rev_subminor));
 218         DRV_LOG(DEBUG, "Packet pacing is not supported.");
 219         mlx5_rt_timestamp_config(sh, hca_attr);
 220         return 0;
 221 }
 222
 223 /**
 224  * Initialize DR related data within private structure.
 225  * Routine checks the reference counter and does actual
 226  * resources creation/initialization only if counter is zero.
 227  *
 228  * @param[in] priv
 229  *   Pointer to the private device data structure.
 230  *
 231  * @return
 232  *   Zero on success, positive error code otherwise.
 233  */
 234 static int
 235 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 236 {
 237         struct mlx5_dev_ctx_shared *sh = priv->sh;
 238         int err = 0;
 239
 240         if (!sh->flow_tbls)
 241                 err = mlx5_alloc_table_hash_list(priv);
 242         else
 243                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse",
 244                         (void *)sh->flow_tbls);
 245         return err;
 246 }
 247 /**
 248  * Destroy DR related data within private structure.
 249  *
 250  * @param[in] priv
 251  *   Pointer to the private device data structure.
 252  */
 253 void
 254 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 255 {
 256         mlx5_free_table_hash_list(priv);
 257 }
 258
 259 /**
 260  * Set the completion channel file descriptor interrupt as non-blocking.
 261  * Currently it has no support under Windows.
 262  *
 263  * @param[in] rxq_obj
 264  *   Pointer to RQ channel object, which includes the channel fd
 265  *
 266  * @param[out] fd
 267  *   The file descriptor (representing the interrupt) used in this channel.
 268  *
 269  * @return
 270  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 271  */
 272 int
 273 mlx5_os_set_nonblock_channel_fd(int fd)
 274 {
 275         (void)fd;
 276         DRV_LOG(WARNING, "%s: is not supported", __func__);
 277         return -ENOTSUP;
 278 }
 279
 280 /**
 281  * Spawn an Ethernet device from DevX information.
 282  *
 283  * @param dpdk_dev
 284  *   Backing DPDK device.
 285  * @param spawn
 286  *   Verbs device parameters (name, port, switch_info) to spawn.
 287  * @param config
 288  *   Device configuration parameters.
 289  *
 290  * @return
 291  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 292  *   is set. The following errors are defined:
 293  *
 294  *   EEXIST: device is already spawned
 295  */
 296 static struct rte_eth_dev *
 297 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 298                struct mlx5_dev_spawn_data *spawn,
 299                struct mlx5_dev_config *config)
 300 {
 301         const struct mlx5_switch_info *switch_info = &spawn->info;
 302         struct mlx5_dev_ctx_shared *sh = NULL;
 303         struct rte_eth_dev *eth_dev = NULL;
 304         struct mlx5_priv *priv = NULL;
 305         int err = 0;
 306         struct rte_ether_addr mac;
 307         char name[RTE_ETH_NAME_MAX_LEN];
 308         int own_domain_id = 0;
 309         uint16_t port_id;
 310         int i;
 311
 312         /* Build device name. */
 313         strlcpy(name, dpdk_dev->name, sizeof(name));
 314         /* check if the device is already spawned */
 315         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 316                 rte_errno = EEXIST;
 317                 return NULL;
 318         }
 319         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 320         /* Process parameters. */
 321         err = mlx5_args(config, dpdk_dev->devargs);
 322         if (err) {
 323                 err = rte_errno;
 324                 DRV_LOG(ERR, "failed to process device arguments: %s",
 325                         strerror(rte_errno));
 326                 goto error;
 327         }
 328         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 329         if (!sh)
 330                 return NULL;
 331         /* Update final values for devargs before check sibling config. */
 332         config->dv_esw_en = 0;
 333         if (!config->dv_flow_en) {
 334                 DRV_LOG(ERR, "Windows flow mode must be DV flow enable.");
 335                 err = ENOTSUP;
 336                 goto error;
 337         }
 338         if (!config->dv_esw_en &&
 339             config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
 340                 DRV_LOG(WARNING,
 341                         "Metadata mode %u is not supported (no E-Switch).",
 342                         config->dv_xmeta_en);
 343                 config->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
 344         }
 345         /* Check sibling device configurations. */
 346         err = mlx5_dev_check_sibling_config(sh, config, dpdk_dev);
 347         if (err)
 348                 goto error;
 349         /* Initialize the shutdown event in mlx5_dev_spawn to
 350          * support mlx5_is_removed for Windows.
 351          */
 352         err = mlx5_glue->devx_init_showdown_event(sh->cdev->ctx);
 353         if (err) {
 354                 DRV_LOG(ERR, "failed to init showdown event: %s",
 355                         strerror(errno));
 356                 goto error;
 357         }
 358         /* Allocate private eth device data. */
 359         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 360                            sizeof(*priv),
 361                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 362         if (priv == NULL) {
 363                 DRV_LOG(ERR, "priv allocation failure");
 364                 err = ENOMEM;
 365                 goto error;
 366         }
 367         priv->sh = sh;
 368         priv->dev_port = spawn->phys_port;
 369         priv->pci_dev = spawn->pci_dev;
 370         priv->mtu = RTE_ETHER_MTU;
 371         priv->mp_id.port_id = port_id;
 372         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 373         priv->representor = !!switch_info->representor;
 374         priv->master = !!switch_info->master;
 375         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 376         priv->vport_meta_tag = 0;
 377         priv->vport_meta_mask = 0;
 378         priv->pf_bond = spawn->pf_bond;
 379         priv->vport_id = -1;
 380         /* representor_id field keeps the unmodified VF index. */
 381         priv->representor_id = -1;
 382         /*
 383          * Look for sibling devices in order to reuse their switch domain
 384          * if any, otherwise allocate one.
 385          */
 386         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
 387                 const struct mlx5_priv *opriv =
 388                         rte_eth_devices[port_id].data->dev_private;
 389
 390                 if (!opriv ||
 391                     opriv->sh != priv->sh ||
 392                         opriv->domain_id ==
 393                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 394                         continue;
 395                 priv->domain_id = opriv->domain_id;
 396                 break;
 397         }
 398         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 399                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
 400                 if (err) {
 401                         err = rte_errno;
 402                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
 403                                 strerror(rte_errno));
 404                         goto error;
 405                 }
 406                 own_domain_id = 1;
 407         }
 408         if (config->hw_padding) {
 409                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
 410                 config->hw_padding = 0;
 411         }
 412         DRV_LOG(DEBUG, "%sMPS is %s.",
 413                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
 414                 config->mps == MLX5_MPW ? "legacy " : "",
 415                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
 416         if (config->cqe_comp) {
 417                 DRV_LOG(WARNING, "Rx CQE compression isn't supported.");
 418                 config->cqe_comp = 0;
 419         }
 420         config->hw_fcs_strip = sh->dev_cap.hw_fcs_strip;
 421         if (config->mprq.enabled) {
 422                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
 423                 config->mprq.enabled = 0;
 424         }
 425         if (config->max_dump_files_num == 0)
 426                 config->max_dump_files_num = 128;
 427         eth_dev = rte_eth_dev_allocate(name);
 428         if (eth_dev == NULL) {
 429                 DRV_LOG(ERR, "can not allocate rte ethdev");
 430                 err = ENOMEM;
 431                 goto error;
 432         }
 433         if (priv->representor) {
 434                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
 435                 eth_dev->data->representor_id = priv->representor_id;
 436                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
 437                         struct mlx5_priv *opriv =
 438                                 rte_eth_devices[port_id].data->dev_private;
 439                         if (opriv &&
 440                             opriv->master &&
 441                             opriv->domain_id == priv->domain_id &&
 442                             opriv->sh == priv->sh) {
 443                                 eth_dev->data->backer_port_id = port_id;
 444                                 break;
 445                         }
 446                 }
 447                 if (port_id >= RTE_MAX_ETHPORTS)
 448                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
 449         }
 450         /*
 451          * Store associated network device interface index. This index
 452          * is permanent throughout the lifetime of device. So, we may store
 453          * the ifindex here and use the cached value further.
 454          */
 455         MLX5_ASSERT(spawn->ifindex);
 456         priv->if_index = spawn->ifindex;
 457         eth_dev->data->dev_private = priv;
 458         priv->dev_data = eth_dev->data;
 459         eth_dev->data->mac_addrs = priv->mac;
 460         eth_dev->device = dpdk_dev;
 461         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
 462         /* Configure the first MAC address by default. */
 463         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
 464                 DRV_LOG(ERR,
 465                         "port %u cannot get MAC address, is mlx5_en"
 466                         " loaded? (errno: %s).",
 467                         eth_dev->data->port_id, strerror(rte_errno));
 468                 err = ENODEV;
 469                 goto error;
 470         }
 471         DRV_LOG(INFO,
 472                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
 473                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
 474 #ifdef RTE_LIBRTE_MLX5_DEBUG
 475         {
 476                 char ifname[MLX5_NAMESIZE];
 477
 478                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
 479                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
 480                                 eth_dev->data->port_id, ifname);
 481                 else
 482                         DRV_LOG(DEBUG, "port %u ifname is unknown.",
 483                                 eth_dev->data->port_id);
 484         }
 485 #endif
 486         /* Get actual MTU if possible. */
 487         err = mlx5_get_mtu(eth_dev, &priv->mtu);
 488         if (err) {
 489                 err = rte_errno;
 490                 goto error;
 491         }
 492         DRV_LOG(DEBUG, "port %u MTU is %u.", eth_dev->data->port_id,
 493                 priv->mtu);
 494         /* Initialize burst functions to prevent crashes before link-up. */
 495         eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
 496         eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
 497         eth_dev->dev_ops = &mlx5_dev_ops;
 498         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 499         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 500         eth_dev->rx_queue_count = mlx5_rx_queue_count;
 501         /* Register MAC address. */
 502         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
 503         priv->ctrl_flows = 0;
 504         TAILQ_INIT(&priv->flow_meters);
 505         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
 506         if (!priv->mtr_profile_tbl)
 507                 goto error;
 508         /* Bring Ethernet device up. */
 509         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up.",
 510                 eth_dev->data->port_id);
 511         /* nl calls are unsupported - set to -1 not to fail on release */
 512         priv->nl_socket_rdma = -1;
 513         priv->nl_socket_route = -1;
 514         mlx5_set_link_up(eth_dev);
 515         /*
 516          * Even though the interrupt handler is not installed yet,
 517          * interrupts will still trigger on the async_fd from
 518          * Verbs context returned by ibv_open_device().
 519          */
 520         mlx5_link_update(eth_dev, 0);
 521         /* Detect minimal data bytes to inline. */
 522         mlx5_set_min_inline(spawn, config);
 523         /* Store device configuration on private structure. */
 524         priv->config = *config;
 525         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
 526                 icfg[i].release_mem_en = !!config->reclaim_mode;
 527                 if (config->reclaim_mode)
 528                         icfg[i].per_core_cache = 0;
 529                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
 530                 if (!priv->flows[i])
 531                         goto error;
 532         }
 533         /* Create context for virtual machine VLAN workaround. */
 534         priv->vmwa_context = NULL;
 535         if (config->dv_flow_en) {
 536                 err = mlx5_alloc_shared_dr(priv);
 537                 if (err)
 538                         goto error;
 539         }
 540         /* No supported flow priority number detection. */
 541         priv->sh->flow_max_priority = -1;
 542         mlx5_set_metadata_mask(eth_dev);
 543         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 544             !priv->sh->dv_regc0_mask) {
 545                 DRV_LOG(ERR, "metadata mode %u is not supported "
 546                              "(no metadata reg_c[0] is available).",
 547                              priv->config.dv_xmeta_en);
 548                         err = ENOTSUP;
 549                         goto error;
 550         }
 551         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
 552                 mlx5_hrxq_create_cb, mlx5_hrxq_match_cb,
 553                 mlx5_hrxq_remove_cb, mlx5_hrxq_clone_cb,
 554                 mlx5_hrxq_clone_free_cb);
 555         /* Query availability of metadata reg_c's. */
 556         if (!priv->sh->metadata_regc_check_flag) {
 557                 err = mlx5_flow_discover_mreg_c(eth_dev);
 558                 if (err < 0) {
 559                         err = -err;
 560                         goto error;
 561                 }
 562         }
 563         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
 564                 DRV_LOG(DEBUG,
 565                         "port %u extensive metadata register is not supported.",
 566                         eth_dev->data->port_id);
 567                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
 568                         DRV_LOG(ERR, "metadata mode %u is not supported "
 569                                      "(no metadata registers available).",
 570                                      priv->config.dv_xmeta_en);
 571                         err = ENOTSUP;
 572                         goto error;
 573                 }
 574         }
 575         if (sh->cdev->config.devx) {
 576                 priv->obj_ops = devx_obj_ops;
 577         } else {
 578                 DRV_LOG(ERR, "Windows flow must be DevX.");
 579                 err = ENOTSUP;
 580                 goto error;
 581         }
 582         mlx5_flow_counter_mode_config(eth_dev);
 583         mlx5_queue_counter_id_prepare(eth_dev);
 584         return eth_dev;
 585 error:
 586         if (priv) {
 587                 if (priv->mtr_profile_tbl)
 588                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
 589                 if (own_domain_id)
 590                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 591                 mlx5_free(priv);
 592                 if (eth_dev != NULL)
 593                         eth_dev->data->dev_private = NULL;
 594         }
 595         if (eth_dev != NULL) {
 596                 /* mac_addrs must not be freed alone because part of
 597                  * dev_private
 598                  **/
 599                 eth_dev->data->mac_addrs = NULL;
 600                 rte_eth_dev_release_port(eth_dev);
 601         }
 602         if (sh)
 603                 mlx5_free_shared_dev_ctx(sh);
 604         MLX5_ASSERT(err > 0);
 605         rte_errno = err;
 606         return NULL;
 607 }
 608
 609 /**
 610  * This function should share events between multiple ports of single IB
 611  * device.  Currently it has no support under Windows.
 612  *
 613  * @param sh
 614  *   Pointer to mlx5_dev_ctx_shared object.
 615  */
 616 void
 617 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
 618 {
 619         (void)sh;
 620         DRV_LOG(WARNING, "%s: is not supported", __func__);
 621 }
 622
 623 /**
 624  * This function should share events between multiple ports of single IB
 625  * device.  Currently it has no support under Windows.
 626  *
 627  * @param dev
 628  *   Pointer to mlx5_dev_ctx_shared object.
 629  */
 630 void
 631 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
 632 {
 633         (void)sh;
 634         DRV_LOG(WARNING, "%s: is not supported", __func__);
 635 }
 636
 637 /**
 638  * Read statistics by a named counter.
 639  *
 640  * @param[in] priv
 641  *   Pointer to the private device data structure.
 642  * @param[in] ctr_name
 643  *   Pointer to the name of the statistic counter to read
 644  * @param[out] stat
 645  *   Pointer to read statistic value.
 646  * @return
 647  *   0 on success and stat is valid, non-zero if failed to read the value
 648  *   or counter is not supported.
 649  *   rte_errno is set.
 650  *
 651  */
 652 int
 653 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
 654                       uint64_t *stat)
 655 {
 656         if (priv->q_counters != NULL && strcmp(ctr_name, "out_of_buffer") == 0)
 657                 return mlx5_devx_cmd_queue_counter_query
 658                                 (priv->q_counters, 0, (uint32_t *)stat);
 659         DRV_LOG(WARNING, "%s: is not supported for the %s counter",
 660                 __func__, ctr_name);
 661         return -ENOTSUP;
 662 }
 663
 664 /**
 665  * Flush device MAC addresses
 666  * Currently it has no support under Windows.
 667  *
 668  * @param dev
 669  *   Pointer to Ethernet device structure.
 670  *
 671  */
 672 void
 673 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
 674 {
 675         (void)dev;
 676         DRV_LOG(WARNING, "%s: is not supported", __func__);
 677 }
 678
 679 /**
 680  * Remove a MAC address from device
 681  * Currently it has no support under Windows.
 682  *
 683  * @param dev
 684  *   Pointer to Ethernet device structure.
 685  * @param index
 686  *   MAC address index.
 687  */
 688 void
 689 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
 690 {
 691         (void)dev;
 692         (void)(index);
 693         DRV_LOG(WARNING, "%s: is not supported", __func__);
 694 }
 695
 696 /**
 697  * Adds a MAC address to the device
 698  * Currently it has no support under Windows.
 699  *
 700  * @param dev
 701  *   Pointer to Ethernet device structure.
 702  * @param mac_addr
 703  *   MAC address to register.
 704  * @param index
 705  *   MAC address index.
 706  *
 707  * @return
 708  *   0 on success, a negative errno value otherwise
 709  */
 710 int
 711 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
 712                      uint32_t index)
 713 {
 714         (void)index;
 715         struct rte_ether_addr lmac;
 716
 717         if (mlx5_get_mac(dev, &lmac.addr_bytes)) {
 718                 DRV_LOG(ERR,
 719                         "port %u cannot get MAC address, is mlx5_en"
 720                         " loaded? (errno: %s)",
 721                         dev->data->port_id, strerror(rte_errno));
 722                 return rte_errno;
 723         }
 724         if (!rte_is_same_ether_addr(&lmac, mac)) {
 725                 DRV_LOG(ERR,
 726                         "adding new mac address to device is unsupported");
 727                 return -ENOTSUP;
 728         }
 729         return 0;
 730 }
 731
 732 /**
 733  * Modify a VF MAC address
 734  * Currently it has no support under Windows.
 735  *
 736  * @param priv
 737  *   Pointer to device private data.
 738  * @param mac_addr
 739  *   MAC address to modify into.
 740  * @param iface_idx
 741  *   Net device interface index
 742  * @param vf_index
 743  *   VF index
 744  *
 745  * @return
 746  *   0 on success, a negative errno value otherwise
 747  */
 748 int
 749 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
 750                            unsigned int iface_idx,
 751                            struct rte_ether_addr *mac_addr,
 752                            int vf_index)
 753 {
 754         (void)priv;
 755         (void)iface_idx;
 756         (void)mac_addr;
 757         (void)vf_index;
 758         DRV_LOG(WARNING, "%s: is not supported", __func__);
 759         return -ENOTSUP;
 760 }
 761
 762 /**
 763  * Set device promiscuous mode
 764  * Currently it has no support under Windows.
 765  *
 766  * @param dev
 767  *   Pointer to Ethernet device structure.
 768  * @param enable
 769  *   0 - promiscuous is disabled, otherwise - enabled
 770  *
 771  * @return
 772  *   0 on success, a negative error value otherwise
 773  */
 774 int
 775 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
 776 {
 777         (void)dev;
 778         (void)enable;
 779         DRV_LOG(WARNING, "%s: is not supported", __func__);
 780         return -ENOTSUP;
 781 }
 782
 783 /**
 784  * Set device allmulti mode
 785  *
 786  * @param dev
 787  *   Pointer to Ethernet device structure.
 788  * @param enable
 789  *   0 - all multicase is disabled, otherwise - enabled
 790  *
 791  * @return
 792  *   0 on success, a negative error value otherwise
 793  */
 794 int
 795 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
 796 {
 797         (void)dev;
 798         (void)enable;
 799         DRV_LOG(WARNING, "%s: is not supported", __func__);
 800         return -ENOTSUP;
 801 }
 802
 803 /**
 804  * DPDK callback to register a PCI device.
 805  *
 806  * This function spawns Ethernet devices out of a given device.
 807  *
 808  * @param[in] dev
 809  *   Pointer to the common device.
 810  *
 811  * @return
 812  *   0 on success, a negative errno value otherwise and rte_errno is set.
 813  */
 814 int
 815 mlx5_os_net_probe(struct mlx5_common_device *cdev)
 816 {
 817         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
 818         struct mlx5_dev_spawn_data spawn = {
 819                 .pf_bond = -1,
 820                 .max_port = 1,
 821                 .phys_port = 1,
 822                 .phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx),
 823                 .pci_dev = pci_dev,
 824                 .cdev = cdev,
 825                 .ifindex = -1, /* Spawn will assign */
 826                 .info = (struct mlx5_switch_info){
 827                         .name_type = MLX5_PHYS_PORT_NAME_TYPE_UPLINK,
 828                 },
 829         };
 830         struct mlx5_dev_config dev_config = {
 831                 .rx_vec_en = 1,
 832                 .txq_inline_max = MLX5_ARG_UNSET,
 833                 .txq_inline_min = MLX5_ARG_UNSET,
 834                 .txq_inline_mpw = MLX5_ARG_UNSET,
 835                 .txqs_inline = MLX5_ARG_UNSET,
 836                 .mprq = {
 837                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
 838                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
 839                 },
 840                 .dv_flow_en = 1,
 841                 .log_hp_size = MLX5_ARG_UNSET,
 842         };
 843         int ret;
 844         uint32_t restore;
 845
 846         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 847                 DRV_LOG(ERR, "Secondary process is not supported on Windows.");
 848                 return -ENOTSUP;
 849         }
 850         ret = mlx5_init_once();
 851         if (ret) {
 852                 DRV_LOG(ERR, "unable to init PMD global data: %s",
 853                         strerror(rte_errno));
 854                 return -rte_errno;
 855         }
 856         spawn.eth_dev = mlx5_dev_spawn(cdev->dev, &spawn, &dev_config);
 857         if (!spawn.eth_dev)
 858                 return -rte_errno;
 859         restore = spawn.eth_dev->data->dev_flags;
 860         rte_eth_copy_pci_info(spawn.eth_dev, pci_dev);
 861         /* Restore non-PCI flags cleared by the above call. */
 862         spawn.eth_dev->data->dev_flags |= restore;
 863         rte_eth_dev_probing_finish(spawn.eth_dev);
 864         return 0;
 865 }
 866
 867 /**
 868  * Cleanup resources when the last device is closed.
 869  */
 870 void
 871 mlx5_os_net_cleanup(void)
 872 {
 873 }
 874
 875 const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};