1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
11 #include <rte_windows.h>
12 #include <ethdev_pci.h>
14 #include <mlx5_glue.h>
15 #include <mlx5_devx_cmds.h>
16 #include <mlx5_common.h>
17 #include <mlx5_common_mp.h>
18 #include <mlx5_common_mr.h>
19 #include <mlx5_malloc.h>
21 #include "mlx5_defs.h"
23 #include "mlx5_common_os.h"
24 #include "mlx5_utils.h"
25 #include "mlx5_rxtx.h"
28 #include "mlx5_autoconf.h"
29 #include "mlx5_flow.h"
30 #include "mlx5_devx.h"
32 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
34 /* Spinlock for mlx5_shared_data allocation. */
35 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
37 /* rte flow indexed pool configuration. */
38 static struct mlx5_indexed_pool_config icfg[] = {
40 .size = sizeof(struct rte_flow),
44 .malloc = mlx5_malloc,
47 .type = "ctl_flow_ipool",
50 .size = sizeof(struct rte_flow),
56 .malloc = mlx5_malloc,
58 .per_core_cache = 1 << 14,
59 .type = "rte_flow_ipool",
62 .size = sizeof(struct rte_flow),
68 .malloc = mlx5_malloc,
71 .type = "mcp_flow_ipool",
76 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
78 struct mlx5_priv *priv = dev->data->dev_private;
79 void *ctx = priv->sh->cdev->ctx;
81 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
82 if (!priv->q_counters) {
83 DRV_LOG(ERR, "Port %d queue counter object cannot be created "
84 "by DevX - imissed counter will be unavailable",
88 priv->counter_set_id = priv->q_counters->id;
92 * Initialize shared data between primary and secondary process.
94 * A memzone is reserved by primary process and secondary processes attach to
98 * 0 on success, a negative errno value otherwise and rte_errno is set.
101 mlx5_init_shared_data(void)
103 const struct rte_memzone *mz;
106 rte_spinlock_lock(&mlx5_shared_data_lock);
107 if (mlx5_shared_data == NULL) {
108 /* Allocate shared memory. */
109 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
110 sizeof(*mlx5_shared_data),
114 "Cannot allocate mlx5 shared data");
118 mlx5_shared_data = mz->addr;
119 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
120 rte_spinlock_init(&mlx5_shared_data->lock);
123 rte_spinlock_unlock(&mlx5_shared_data_lock);
128 * PMD global initialization.
130 * Independent from individual device, this function initializes global
131 * per-PMD data structures distinguishing primary and secondary processes.
132 * Hence, each initialization is called once per a process.
135 * 0 on success, a negative errno value otherwise and rte_errno is set.
140 if (mlx5_init_shared_data())
146 * Get mlx5 device capabilities.
149 * Pointer to shared device context.
152 * 0 on success, a negative errno value otherwise and rte_errno is set.
155 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
157 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
158 struct mlx5_context *mlx5_ctx = sh->cdev->ctx;
159 void *pv_iseg = NULL;
162 MLX5_ASSERT(sh->cdev->config.devx);
163 MLX5_ASSERT(mlx5_dev_is_pci(sh->cdev->dev));
164 pv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg);
165 if (pv_iseg == NULL) {
166 DRV_LOG(ERR, "Failed to get device hca_iseg.");
170 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
171 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(sh->cdev->dev));
172 sh->dev_cap.max_cq = 1 << hca_attr->log_max_cq;
173 sh->dev_cap.max_qp = 1 << hca_attr->log_max_qp;
174 sh->dev_cap.max_qp_wr = 1 << hca_attr->log_max_qp_sz;
175 sh->dev_cap.dv_flow_en = 1;
176 sh->dev_cap.mps = MLX5_MPW_DISABLED;
177 DRV_LOG(DEBUG, "MPW isn't supported.");
178 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is no supported.");
179 sh->dev_cap.hw_csum = hca_attr->csum_cap;
180 DRV_LOG(DEBUG, "Checksum offloading is %ssupported.",
181 (sh->dev_cap.hw_csum ? "" : "not "));
182 sh->dev_cap.hw_vlan_strip = hca_attr->vlan_cap;
183 DRV_LOG(DEBUG, "VLAN stripping is %ssupported.",
184 (sh->dev_cap.hw_vlan_strip ? "" : "not "));
185 sh->dev_cap.hw_fcs_strip = hca_attr->scatter_fcs;
186 sh->dev_cap.tso = ((1 << hca_attr->max_lso_cap) > 0);
188 sh->dev_cap.tso_max_payload_sz = 1 << hca_attr->max_lso_cap;
189 DRV_LOG(DEBUG, "Counters are not supported.");
190 if (hca_attr->rss_ind_tbl_cap) {
192 * DPDK doesn't support larger/variable indirection tables.
193 * Once DPDK supports it, take max size from device attr.
195 sh->dev_cap.ind_table_max_size =
196 RTE_MIN(1 << hca_attr->rss_ind_tbl_cap,
197 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512);
198 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u",
199 sh->dev_cap.ind_table_max_size);
201 sh->dev_cap.swp = mlx5_get_supported_sw_parsing_offloads(hca_attr);
202 sh->dev_cap.tunnel_en = mlx5_get_supported_tunneling_offloads(hca_attr);
203 if (sh->dev_cap.tunnel_en) {
204 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s",
205 sh->dev_cap.tunnel_en &
206 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
207 sh->dev_cap.tunnel_en &
208 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
209 sh->dev_cap.tunnel_en &
210 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : "");
212 DRV_LOG(DEBUG, "Tunnel offloading is not supported.");
214 snprintf(sh->dev_cap.fw_ver, 64, "%x.%x.%04x",
215 MLX5_GET(initial_seg, pv_iseg, fw_rev_major),
216 MLX5_GET(initial_seg, pv_iseg, fw_rev_minor),
217 MLX5_GET(initial_seg, pv_iseg, fw_rev_subminor));
218 DRV_LOG(DEBUG, "Packet pacing is not supported.");
219 mlx5_rt_timestamp_config(sh, hca_attr);
224 * Initialize DR related data within private structure.
225 * Routine checks the reference counter and does actual
226 * resources creation/initialization only if counter is zero.
229 * Pointer to the private device data structure.
232 * Zero on success, positive error code otherwise.
235 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
237 struct mlx5_dev_ctx_shared *sh = priv->sh;
241 err = mlx5_alloc_table_hash_list(priv);
243 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse",
244 (void *)sh->flow_tbls);
248 * Destroy DR related data within private structure.
251 * Pointer to the private device data structure.
254 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
256 mlx5_free_table_hash_list(priv);
260 * Set the completion channel file descriptor interrupt as non-blocking.
261 * Currently it has no support under Windows.
264 * Pointer to RQ channel object, which includes the channel fd
267 * The file descriptor (representing the interrupt) used in this channel.
270 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
273 mlx5_os_set_nonblock_channel_fd(int fd)
276 DRV_LOG(WARNING, "%s: is not supported", __func__);
281 * Spawn an Ethernet device from DevX information.
284 * Backing DPDK device.
286 * Verbs device parameters (name, port, switch_info) to spawn.
289 * A valid Ethernet device object on success, NULL otherwise and rte_errno
290 * is set. The following errors are defined:
292 * EEXIST: device is already spawned
294 static struct rte_eth_dev *
295 mlx5_dev_spawn(struct rte_device *dpdk_dev,
296 struct mlx5_dev_spawn_data *spawn)
298 const struct mlx5_switch_info *switch_info = &spawn->info;
299 struct mlx5_dev_ctx_shared *sh = NULL;
300 struct rte_eth_dev *eth_dev = NULL;
301 struct mlx5_priv *priv = NULL;
303 struct rte_ether_addr mac;
304 char name[RTE_ETH_NAME_MAX_LEN];
305 int own_domain_id = 0;
309 /* Build device name. */
310 strlcpy(name, dpdk_dev->name, sizeof(name));
311 /* check if the device is already spawned */
312 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
316 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
317 sh = mlx5_alloc_shared_dev_ctx(spawn);
320 if (!sh->config.dv_flow_en) {
321 DRV_LOG(ERR, "Windows flow mode must be DV flow enable.");
325 if (sh->config.vf_nl_en) {
326 DRV_LOG(DEBUG, "VF netlink isn't supported.");
327 sh->config.vf_nl_en = 0;
329 /* Initialize the shutdown event in mlx5_dev_spawn to
330 * support mlx5_is_removed for Windows.
332 err = mlx5_glue->devx_init_showdown_event(sh->cdev->ctx);
334 DRV_LOG(ERR, "failed to init showdown event: %s",
338 /* Allocate private eth device data. */
339 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
341 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
343 DRV_LOG(ERR, "priv allocation failure");
348 priv->dev_port = spawn->phys_port;
349 priv->pci_dev = spawn->pci_dev;
350 priv->mtu = RTE_ETHER_MTU;
351 priv->mp_id.port_id = port_id;
352 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
353 priv->representor = !!switch_info->representor;
354 priv->master = !!switch_info->master;
355 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
356 priv->vport_meta_tag = 0;
357 priv->vport_meta_mask = 0;
358 priv->pf_bond = spawn->pf_bond;
360 /* representor_id field keeps the unmodified VF index. */
361 priv->representor_id = -1;
363 * Look for sibling devices in order to reuse their switch domain
364 * if any, otherwise allocate one.
366 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
367 const struct mlx5_priv *opriv =
368 rte_eth_devices[port_id].data->dev_private;
371 opriv->sh != priv->sh ||
373 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
375 priv->domain_id = opriv->domain_id;
378 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
379 err = rte_eth_switch_domain_alloc(&priv->domain_id);
382 DRV_LOG(ERR, "unable to allocate switch domain: %s",
383 strerror(rte_errno));
388 /* Process parameters and store port configuration on priv structure. */
389 err = mlx5_port_args_config(priv, dpdk_dev->devargs, &priv->config);
392 DRV_LOG(ERR, "Failed to process port configure: %s",
393 strerror(rte_errno));
396 eth_dev = rte_eth_dev_allocate(name);
397 if (eth_dev == NULL) {
398 DRV_LOG(ERR, "can not allocate rte ethdev");
402 if (priv->representor) {
403 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
404 eth_dev->data->representor_id = priv->representor_id;
405 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
406 struct mlx5_priv *opriv =
407 rte_eth_devices[port_id].data->dev_private;
410 opriv->domain_id == priv->domain_id &&
411 opriv->sh == priv->sh) {
412 eth_dev->data->backer_port_id = port_id;
416 if (port_id >= RTE_MAX_ETHPORTS)
417 eth_dev->data->backer_port_id = eth_dev->data->port_id;
420 * Store associated network device interface index. This index
421 * is permanent throughout the lifetime of device. So, we may store
422 * the ifindex here and use the cached value further.
424 MLX5_ASSERT(spawn->ifindex);
425 priv->if_index = spawn->ifindex;
426 eth_dev->data->dev_private = priv;
427 priv->dev_data = eth_dev->data;
428 eth_dev->data->mac_addrs = priv->mac;
429 eth_dev->device = dpdk_dev;
430 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
431 /* Configure the first MAC address by default. */
432 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
434 "port %u cannot get MAC address, is mlx5_en"
435 " loaded? (errno: %s).",
436 eth_dev->data->port_id, strerror(rte_errno));
441 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
442 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
443 #ifdef RTE_LIBRTE_MLX5_DEBUG
445 char ifname[MLX5_NAMESIZE];
447 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
448 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
449 eth_dev->data->port_id, ifname);
451 DRV_LOG(DEBUG, "port %u ifname is unknown.",
452 eth_dev->data->port_id);
455 /* Get actual MTU if possible. */
456 err = mlx5_get_mtu(eth_dev, &priv->mtu);
461 DRV_LOG(DEBUG, "port %u MTU is %u.", eth_dev->data->port_id,
463 /* Initialize burst functions to prevent crashes before link-up. */
464 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
465 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
466 eth_dev->dev_ops = &mlx5_dev_ops;
467 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
468 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
469 eth_dev->rx_queue_count = mlx5_rx_queue_count;
470 /* Register MAC address. */
471 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
472 priv->ctrl_flows = 0;
473 TAILQ_INIT(&priv->flow_meters);
474 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
475 if (!priv->mtr_profile_tbl)
477 /* Bring Ethernet device up. */
478 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up.",
479 eth_dev->data->port_id);
480 /* nl calls are unsupported - set to -1 not to fail on release */
481 priv->nl_socket_rdma = -1;
482 priv->nl_socket_route = -1;
483 mlx5_set_link_up(eth_dev);
485 * Even though the interrupt handler is not installed yet,
486 * interrupts will still trigger on the async_fd from
487 * Verbs context returned by ibv_open_device().
489 mlx5_link_update(eth_dev, 0);
490 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
491 icfg[i].release_mem_en = !!sh->config.reclaim_mode;
492 if (sh->config.reclaim_mode)
493 icfg[i].per_core_cache = 0;
494 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
498 /* Create context for virtual machine VLAN workaround. */
499 priv->vmwa_context = NULL;
500 if (sh->config.dv_flow_en) {
501 err = mlx5_alloc_shared_dr(priv);
505 /* No supported flow priority number detection. */
506 priv->sh->flow_max_priority = -1;
507 mlx5_set_metadata_mask(eth_dev);
508 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
509 !priv->sh->dv_regc0_mask) {
510 DRV_LOG(ERR, "metadata mode %u is not supported "
511 "(no metadata reg_c[0] is available).",
512 sh->config.dv_xmeta_en);
516 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
517 mlx5_hrxq_create_cb, mlx5_hrxq_match_cb,
518 mlx5_hrxq_remove_cb, mlx5_hrxq_clone_cb,
519 mlx5_hrxq_clone_free_cb);
520 /* Query availability of metadata reg_c's. */
521 if (!priv->sh->metadata_regc_check_flag) {
522 err = mlx5_flow_discover_mreg_c(eth_dev);
528 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
530 "port %u extensive metadata register is not supported.",
531 eth_dev->data->port_id);
532 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
533 DRV_LOG(ERR, "metadata mode %u is not supported "
534 "(no metadata registers available).",
535 sh->config.dv_xmeta_en);
540 if (sh->cdev->config.devx) {
541 priv->obj_ops = devx_obj_ops;
543 DRV_LOG(ERR, "Windows flow must be DevX.");
547 mlx5_flow_counter_mode_config(eth_dev);
548 mlx5_queue_counter_id_prepare(eth_dev);
552 if (priv->mtr_profile_tbl)
553 mlx5_l3t_destroy(priv->mtr_profile_tbl);
555 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
558 eth_dev->data->dev_private = NULL;
560 if (eth_dev != NULL) {
561 /* mac_addrs must not be freed alone because part of
564 eth_dev->data->mac_addrs = NULL;
565 rte_eth_dev_release_port(eth_dev);
568 mlx5_free_shared_dev_ctx(sh);
569 MLX5_ASSERT(err > 0);
575 * This function should share events between multiple ports of single IB
576 * device. Currently it has no support under Windows.
579 * Pointer to mlx5_dev_ctx_shared object.
582 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
585 DRV_LOG(WARNING, "%s: is not supported", __func__);
589 * This function should share events between multiple ports of single IB
590 * device. Currently it has no support under Windows.
593 * Pointer to mlx5_dev_ctx_shared object.
596 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
599 DRV_LOG(WARNING, "%s: is not supported", __func__);
603 * Read statistics by a named counter.
606 * Pointer to the private device data structure.
607 * @param[in] ctr_name
608 * Pointer to the name of the statistic counter to read
610 * Pointer to read statistic value.
612 * 0 on success and stat is valid, non-zero if failed to read the value
613 * or counter is not supported.
618 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
621 if (priv->q_counters != NULL && strcmp(ctr_name, "out_of_buffer") == 0)
622 return mlx5_devx_cmd_queue_counter_query
623 (priv->q_counters, 0, (uint32_t *)stat);
624 DRV_LOG(WARNING, "%s: is not supported for the %s counter",
630 * Flush device MAC addresses
631 * Currently it has no support under Windows.
634 * Pointer to Ethernet device structure.
638 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
641 DRV_LOG(WARNING, "%s: is not supported", __func__);
645 * Remove a MAC address from device
646 * Currently it has no support under Windows.
649 * Pointer to Ethernet device structure.
654 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
658 DRV_LOG(WARNING, "%s: is not supported", __func__);
662 * Adds a MAC address to the device
663 * Currently it has no support under Windows.
666 * Pointer to Ethernet device structure.
668 * MAC address to register.
673 * 0 on success, a negative errno value otherwise
676 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
680 struct rte_ether_addr lmac;
682 if (mlx5_get_mac(dev, &lmac.addr_bytes)) {
684 "port %u cannot get MAC address, is mlx5_en"
685 " loaded? (errno: %s)",
686 dev->data->port_id, strerror(rte_errno));
689 if (!rte_is_same_ether_addr(&lmac, mac)) {
691 "adding new mac address to device is unsupported");
698 * Modify a VF MAC address
699 * Currently it has no support under Windows.
702 * Pointer to device private data.
704 * MAC address to modify into.
706 * Net device interface index
711 * 0 on success, a negative errno value otherwise
714 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
715 unsigned int iface_idx,
716 struct rte_ether_addr *mac_addr,
723 DRV_LOG(WARNING, "%s: is not supported", __func__);
728 * Set device promiscuous mode
729 * Currently it has no support under Windows.
732 * Pointer to Ethernet device structure.
734 * 0 - promiscuous is disabled, otherwise - enabled
737 * 0 on success, a negative error value otherwise
740 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
744 DRV_LOG(WARNING, "%s: is not supported", __func__);
749 * Set device allmulti mode
752 * Pointer to Ethernet device structure.
754 * 0 - all multicase is disabled, otherwise - enabled
757 * 0 on success, a negative error value otherwise
760 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
764 DRV_LOG(WARNING, "%s: is not supported", __func__);
769 * DPDK callback to register a PCI device.
771 * This function spawns Ethernet devices out of a given device.
774 * Pointer to the common device.
777 * 0 on success, a negative errno value otherwise and rte_errno is set.
780 mlx5_os_net_probe(struct mlx5_common_device *cdev)
782 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
783 struct mlx5_dev_spawn_data spawn = {
787 .phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx),
790 .ifindex = -1, /* Spawn will assign */
791 .info = (struct mlx5_switch_info){
792 .name_type = MLX5_PHYS_PORT_NAME_TYPE_UPLINK,
798 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
799 DRV_LOG(ERR, "Secondary process is not supported on Windows.");
802 ret = mlx5_init_once();
804 DRV_LOG(ERR, "unable to init PMD global data: %s",
805 strerror(rte_errno));
808 spawn.eth_dev = mlx5_dev_spawn(cdev->dev, &spawn);
811 restore = spawn.eth_dev->data->dev_flags;
812 rte_eth_copy_pci_info(spawn.eth_dev, pci_dev);
813 /* Restore non-PCI flags cleared by the above call. */
814 spawn.eth_dev->data->dev_flags |= restore;
815 rte_eth_dev_probing_finish(spawn.eth_dev);
820 * Cleanup resources when the last device is closed.
823 mlx5_os_net_cleanup(void)
827 const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};