1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
11 #include <rte_windows.h>
12 #include <ethdev_pci.h>
14 #include <mlx5_glue.h>
15 #include <mlx5_devx_cmds.h>
16 #include <mlx5_common.h>
17 #include <mlx5_common_mp.h>
18 #include <mlx5_common_mr.h>
19 #include <mlx5_malloc.h>
21 #include "mlx5_defs.h"
23 #include "mlx5_common_os.h"
24 #include "mlx5_utils.h"
25 #include "mlx5_rxtx.h"
28 #include "mlx5_autoconf.h"
29 #include "mlx5_flow.h"
30 #include "mlx5_devx.h"
32 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
34 /* Spinlock for mlx5_shared_data allocation. */
35 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
37 /* rte flow indexed pool configuration. */
38 static struct mlx5_indexed_pool_config icfg[] = {
40 .size = sizeof(struct rte_flow),
44 .malloc = mlx5_malloc,
47 .type = "ctl_flow_ipool",
50 .size = sizeof(struct rte_flow),
56 .malloc = mlx5_malloc,
58 .per_core_cache = 1 << 14,
59 .type = "rte_flow_ipool",
62 .size = sizeof(struct rte_flow),
68 .malloc = mlx5_malloc,
71 .type = "mcp_flow_ipool",
76 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
78 struct mlx5_priv *priv = dev->data->dev_private;
79 void *ctx = priv->sh->cdev->ctx;
81 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
82 if (!priv->q_counters) {
83 DRV_LOG(ERR, "Port %d queue counter object cannot be created "
84 "by DevX - imissed counter will be unavailable",
88 priv->counter_set_id = priv->q_counters->id;
92 * Initialize shared data between primary and secondary process.
94 * A memzone is reserved by primary process and secondary processes attach to
98 * 0 on success, a negative errno value otherwise and rte_errno is set.
101 mlx5_init_shared_data(void)
103 const struct rte_memzone *mz;
106 rte_spinlock_lock(&mlx5_shared_data_lock);
107 if (mlx5_shared_data == NULL) {
108 /* Allocate shared memory. */
109 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
110 sizeof(*mlx5_shared_data),
114 "Cannot allocate mlx5 shared data");
118 mlx5_shared_data = mz->addr;
119 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
120 rte_spinlock_init(&mlx5_shared_data->lock);
123 rte_spinlock_unlock(&mlx5_shared_data_lock);
128 * PMD global initialization.
130 * Independent from individual device, this function initializes global
131 * per-PMD data structures distinguishing primary and secondary processes.
132 * Hence, each initialization is called once per a process.
135 * 0 on success, a negative errno value otherwise and rte_errno is set.
140 if (mlx5_init_shared_data())
146 * Get mlx5 device capabilities.
149 * Pointer to shared device context.
152 * 0 on success, a negative errno value otherwise and rte_errno is set.
155 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
157 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
158 struct mlx5_context *mlx5_ctx = sh->cdev->ctx;
159 void *pv_iseg = NULL;
162 pv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg);
163 if (pv_iseg == NULL) {
164 DRV_LOG(ERR, "Failed to get device hca_iseg.");
168 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
169 sh->dev_cap.max_cq = 1 << hca_attr->log_max_cq;
170 sh->dev_cap.max_qp = 1 << hca_attr->log_max_qp;
171 sh->dev_cap.max_qp_wr = 1 << hca_attr->log_max_qp_sz;
172 sh->dev_cap.max_tso = 1 << hca_attr->max_lso_cap;
173 if (hca_attr->rss_ind_tbl_cap) {
174 sh->dev_cap.max_rwq_indirection_table_size =
175 1 << hca_attr->rss_ind_tbl_cap;
177 sh->dev_cap.sw_parsing_offloads =
178 mlx5_get_supported_sw_parsing_offloads(hca_attr);
179 sh->dev_cap.tunnel_offloads_caps =
180 mlx5_get_supported_tunneling_offloads(hca_attr);
181 snprintf(sh->dev_cap.fw_ver, 64, "%x.%x.%04x",
182 MLX5_GET(initial_seg, pv_iseg, fw_rev_major),
183 MLX5_GET(initial_seg, pv_iseg, fw_rev_minor),
184 MLX5_GET(initial_seg, pv_iseg, fw_rev_subminor));
189 * Initialize DR related data within private structure.
190 * Routine checks the reference counter and does actual
191 * resources creation/initialization only if counter is zero.
194 * Pointer to the private device data structure.
197 * Zero on success, positive error code otherwise.
200 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
202 struct mlx5_dev_ctx_shared *sh = priv->sh;
206 err = mlx5_alloc_table_hash_list(priv);
208 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse",
209 (void *)sh->flow_tbls);
213 * Destroy DR related data within private structure.
216 * Pointer to the private device data structure.
219 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
221 mlx5_free_table_hash_list(priv);
225 * Set the completion channel file descriptor interrupt as non-blocking.
226 * Currently it has no support under Windows.
229 * Pointer to RQ channel object, which includes the channel fd
232 * The file descriptor (representing the interrupt) used in this channel.
235 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
238 mlx5_os_set_nonblock_channel_fd(int fd)
241 DRV_LOG(WARNING, "%s: is not supported", __func__);
246 * Spawn an Ethernet device from DevX information.
249 * Backing DPDK device.
251 * Verbs device parameters (name, port, switch_info) to spawn.
253 * Device configuration parameters.
256 * A valid Ethernet device object on success, NULL otherwise and rte_errno
257 * is set. The following errors are defined:
259 * EEXIST: device is already spawned
261 static struct rte_eth_dev *
262 mlx5_dev_spawn(struct rte_device *dpdk_dev,
263 struct mlx5_dev_spawn_data *spawn,
264 struct mlx5_dev_config *config)
266 const struct mlx5_switch_info *switch_info = &spawn->info;
267 struct mlx5_dev_ctx_shared *sh = NULL;
268 struct mlx5_hca_attr *hca_attr;
269 struct rte_eth_dev *eth_dev = NULL;
270 struct mlx5_priv *priv = NULL;
272 struct rte_ether_addr mac;
273 char name[RTE_ETH_NAME_MAX_LEN];
274 int own_domain_id = 0;
278 /* Build device name. */
279 strlcpy(name, dpdk_dev->name, sizeof(name));
280 /* check if the device is already spawned */
281 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
285 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
286 /* Process parameters. */
287 err = mlx5_args(config, dpdk_dev->devargs);
290 DRV_LOG(ERR, "failed to process device arguments: %s",
291 strerror(rte_errno));
294 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
297 /* Update final values for devargs before check sibling config. */
298 config->dv_esw_en = 0;
299 if (!config->dv_flow_en) {
300 DRV_LOG(ERR, "Windows flow mode must be DV flow enable.");
304 if (!config->dv_esw_en &&
305 config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
307 "Metadata mode %u is not supported (no E-Switch).",
308 config->dv_xmeta_en);
309 config->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
311 /* Check sibling device configurations. */
312 err = mlx5_dev_check_sibling_config(sh, config, dpdk_dev);
315 /* Initialize the shutdown event in mlx5_dev_spawn to
316 * support mlx5_is_removed for Windows.
318 err = mlx5_glue->devx_init_showdown_event(sh->cdev->ctx);
320 DRV_LOG(ERR, "failed to init showdown event: %s",
324 DRV_LOG(DEBUG, "MPW isn't supported");
325 config->swp = sh->dev_cap.sw_parsing_offloads &
326 (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
327 MLX5_SW_PARSING_TSO_CAP);
328 config->ind_table_max_size =
329 sh->dev_cap.max_rwq_indirection_table_size;
330 config->tunnel_en = sh->dev_cap.tunnel_offloads_caps &
331 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
332 MLX5_TUNNELED_OFFLOADS_GRE_CAP |
333 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
334 if (config->tunnel_en) {
335 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
337 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
339 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
341 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""
344 DRV_LOG(DEBUG, "tunnel offloading is not supported");
346 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is no supported");
348 /* Allocate private eth device data. */
349 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
351 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
353 DRV_LOG(ERR, "priv allocation failure");
358 priv->dev_port = spawn->phys_port;
359 priv->pci_dev = spawn->pci_dev;
360 priv->mtu = RTE_ETHER_MTU;
361 priv->mp_id.port_id = port_id;
362 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
363 priv->representor = !!switch_info->representor;
364 priv->master = !!switch_info->master;
365 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
366 priv->vport_meta_tag = 0;
367 priv->vport_meta_mask = 0;
368 priv->pf_bond = spawn->pf_bond;
370 /* representor_id field keeps the unmodified VF index. */
371 priv->representor_id = -1;
373 * Look for sibling devices in order to reuse their switch domain
374 * if any, otherwise allocate one.
376 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
377 const struct mlx5_priv *opriv =
378 rte_eth_devices[port_id].data->dev_private;
381 opriv->sh != priv->sh ||
383 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
385 priv->domain_id = opriv->domain_id;
388 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
389 err = rte_eth_switch_domain_alloc(&priv->domain_id);
392 DRV_LOG(ERR, "unable to allocate switch domain: %s",
393 strerror(rte_errno));
398 DRV_LOG(DEBUG, "counters are not supported");
399 config->ind_table_max_size =
400 sh->dev_cap.max_rwq_indirection_table_size;
402 * Remove this check once DPDK supports larger/variable
403 * indirection tables.
405 if (config->ind_table_max_size > (unsigned int)RTE_ETH_RSS_RETA_SIZE_512)
406 config->ind_table_max_size = RTE_ETH_RSS_RETA_SIZE_512;
407 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
408 config->ind_table_max_size);
409 if (config->hw_padding) {
410 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
411 config->hw_padding = 0;
413 config->tso = (sh->dev_cap.max_tso > 0);
415 config->tso_max_payload_sz = sh->dev_cap.max_tso;
416 DRV_LOG(DEBUG, "%sMPS is %s.",
417 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
418 config->mps == MLX5_MPW ? "legacy " : "",
419 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
420 if (config->cqe_comp) {
421 DRV_LOG(WARNING, "Rx CQE compression isn't supported.");
422 config->cqe_comp = 0;
424 if (sh->cdev->config.devx) {
425 hca_attr = &sh->cdev->config.hca_attr;
426 config->hw_csum = hca_attr->csum_cap;
427 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
428 (config->hw_csum ? "" : "not "));
429 config->hw_vlan_strip = hca_attr->vlan_cap;
430 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
431 (config->hw_vlan_strip ? "" : "not "));
432 config->hw_fcs_strip = hca_attr->scatter_fcs;
433 mlx5_rt_timestamp_config(sh, config, hca_attr);
435 if (config->mprq.enabled) {
436 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
437 config->mprq.enabled = 0;
439 if (config->max_dump_files_num == 0)
440 config->max_dump_files_num = 128;
441 eth_dev = rte_eth_dev_allocate(name);
442 if (eth_dev == NULL) {
443 DRV_LOG(ERR, "can not allocate rte ethdev");
447 if (priv->representor) {
448 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
449 eth_dev->data->representor_id = priv->representor_id;
450 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
451 struct mlx5_priv *opriv =
452 rte_eth_devices[port_id].data->dev_private;
455 opriv->domain_id == priv->domain_id &&
456 opriv->sh == priv->sh) {
457 eth_dev->data->backer_port_id = port_id;
461 if (port_id >= RTE_MAX_ETHPORTS)
462 eth_dev->data->backer_port_id = eth_dev->data->port_id;
465 * Store associated network device interface index. This index
466 * is permanent throughout the lifetime of device. So, we may store
467 * the ifindex here and use the cached value further.
469 MLX5_ASSERT(spawn->ifindex);
470 priv->if_index = spawn->ifindex;
471 eth_dev->data->dev_private = priv;
472 priv->dev_data = eth_dev->data;
473 eth_dev->data->mac_addrs = priv->mac;
474 eth_dev->device = dpdk_dev;
475 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
476 /* Configure the first MAC address by default. */
477 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
479 "port %u cannot get MAC address, is mlx5_en"
480 " loaded? (errno: %s).",
481 eth_dev->data->port_id, strerror(rte_errno));
486 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
487 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
488 #ifdef RTE_LIBRTE_MLX5_DEBUG
490 char ifname[MLX5_NAMESIZE];
492 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
493 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
494 eth_dev->data->port_id, ifname);
496 DRV_LOG(DEBUG, "port %u ifname is unknown.",
497 eth_dev->data->port_id);
500 /* Get actual MTU if possible. */
501 err = mlx5_get_mtu(eth_dev, &priv->mtu);
506 DRV_LOG(DEBUG, "port %u MTU is %u.", eth_dev->data->port_id,
508 /* Initialize burst functions to prevent crashes before link-up. */
509 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
510 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
511 eth_dev->dev_ops = &mlx5_dev_ops;
512 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
513 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
514 eth_dev->rx_queue_count = mlx5_rx_queue_count;
515 /* Register MAC address. */
516 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
517 priv->ctrl_flows = 0;
518 TAILQ_INIT(&priv->flow_meters);
519 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
520 if (!priv->mtr_profile_tbl)
522 /* Bring Ethernet device up. */
523 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up.",
524 eth_dev->data->port_id);
525 /* nl calls are unsupported - set to -1 not to fail on release */
526 priv->nl_socket_rdma = -1;
527 priv->nl_socket_route = -1;
528 mlx5_set_link_up(eth_dev);
530 * Even though the interrupt handler is not installed yet,
531 * interrupts will still trigger on the async_fd from
532 * Verbs context returned by ibv_open_device().
534 mlx5_link_update(eth_dev, 0);
535 /* Detect minimal data bytes to inline. */
536 mlx5_set_min_inline(spawn, config);
537 /* Store device configuration on private structure. */
538 priv->config = *config;
539 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
540 icfg[i].release_mem_en = !!config->reclaim_mode;
541 if (config->reclaim_mode)
542 icfg[i].per_core_cache = 0;
543 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
547 /* Create context for virtual machine VLAN workaround. */
548 priv->vmwa_context = NULL;
549 if (config->dv_flow_en) {
550 err = mlx5_alloc_shared_dr(priv);
554 /* No supported flow priority number detection. */
555 priv->sh->flow_max_priority = -1;
556 mlx5_set_metadata_mask(eth_dev);
557 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
558 !priv->sh->dv_regc0_mask) {
559 DRV_LOG(ERR, "metadata mode %u is not supported "
560 "(no metadata reg_c[0] is available).",
561 priv->config.dv_xmeta_en);
565 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
566 mlx5_hrxq_create_cb, mlx5_hrxq_match_cb,
567 mlx5_hrxq_remove_cb, mlx5_hrxq_clone_cb,
568 mlx5_hrxq_clone_free_cb);
569 /* Query availability of metadata reg_c's. */
570 if (!priv->sh->metadata_regc_check_flag) {
571 err = mlx5_flow_discover_mreg_c(eth_dev);
577 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
579 "port %u extensive metadata register is not supported.",
580 eth_dev->data->port_id);
581 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
582 DRV_LOG(ERR, "metadata mode %u is not supported "
583 "(no metadata registers available).",
584 priv->config.dv_xmeta_en);
589 if (sh->cdev->config.devx) {
590 priv->obj_ops = devx_obj_ops;
592 DRV_LOG(ERR, "Windows flow must be DevX.");
596 mlx5_flow_counter_mode_config(eth_dev);
597 mlx5_queue_counter_id_prepare(eth_dev);
601 if (priv->mtr_profile_tbl)
602 mlx5_l3t_destroy(priv->mtr_profile_tbl);
604 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
607 eth_dev->data->dev_private = NULL;
609 if (eth_dev != NULL) {
610 /* mac_addrs must not be freed alone because part of
613 eth_dev->data->mac_addrs = NULL;
614 rte_eth_dev_release_port(eth_dev);
617 mlx5_free_shared_dev_ctx(sh);
618 MLX5_ASSERT(err > 0);
624 * This function should share events between multiple ports of single IB
625 * device. Currently it has no support under Windows.
628 * Pointer to mlx5_dev_ctx_shared object.
631 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
634 DRV_LOG(WARNING, "%s: is not supported", __func__);
638 * This function should share events between multiple ports of single IB
639 * device. Currently it has no support under Windows.
642 * Pointer to mlx5_dev_ctx_shared object.
645 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
648 DRV_LOG(WARNING, "%s: is not supported", __func__);
652 * Read statistics by a named counter.
655 * Pointer to the private device data structure.
656 * @param[in] ctr_name
657 * Pointer to the name of the statistic counter to read
659 * Pointer to read statistic value.
661 * 0 on success and stat is valid, non-zero if failed to read the value
662 * or counter is not supported.
667 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
670 if (priv->q_counters != NULL && strcmp(ctr_name, "out_of_buffer") == 0)
671 return mlx5_devx_cmd_queue_counter_query
672 (priv->q_counters, 0, (uint32_t *)stat);
673 DRV_LOG(WARNING, "%s: is not supported for the %s counter",
679 * Flush device MAC addresses
680 * Currently it has no support under Windows.
683 * Pointer to Ethernet device structure.
687 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
690 DRV_LOG(WARNING, "%s: is not supported", __func__);
694 * Remove a MAC address from device
695 * Currently it has no support under Windows.
698 * Pointer to Ethernet device structure.
703 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
707 DRV_LOG(WARNING, "%s: is not supported", __func__);
711 * Adds a MAC address to the device
712 * Currently it has no support under Windows.
715 * Pointer to Ethernet device structure.
717 * MAC address to register.
722 * 0 on success, a negative errno value otherwise
725 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
729 struct rte_ether_addr lmac;
731 if (mlx5_get_mac(dev, &lmac.addr_bytes)) {
733 "port %u cannot get MAC address, is mlx5_en"
734 " loaded? (errno: %s)",
735 dev->data->port_id, strerror(rte_errno));
738 if (!rte_is_same_ether_addr(&lmac, mac)) {
740 "adding new mac address to device is unsupported");
747 * Modify a VF MAC address
748 * Currently it has no support under Windows.
751 * Pointer to device private data.
753 * MAC address to modify into.
755 * Net device interface index
760 * 0 on success, a negative errno value otherwise
763 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
764 unsigned int iface_idx,
765 struct rte_ether_addr *mac_addr,
772 DRV_LOG(WARNING, "%s: is not supported", __func__);
777 * Set device promiscuous mode
778 * Currently it has no support under Windows.
781 * Pointer to Ethernet device structure.
783 * 0 - promiscuous is disabled, otherwise - enabled
786 * 0 on success, a negative error value otherwise
789 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
793 DRV_LOG(WARNING, "%s: is not supported", __func__);
798 * Set device allmulti mode
801 * Pointer to Ethernet device structure.
803 * 0 - all multicase is disabled, otherwise - enabled
806 * 0 on success, a negative error value otherwise
809 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
813 DRV_LOG(WARNING, "%s: is not supported", __func__);
818 * DPDK callback to register a PCI device.
820 * This function spawns Ethernet devices out of a given device.
823 * Pointer to the common device.
826 * 0 on success, a negative errno value otherwise and rte_errno is set.
829 mlx5_os_net_probe(struct mlx5_common_device *cdev)
831 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
832 struct mlx5_dev_spawn_data spawn = {
836 .phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx),
839 .ifindex = -1, /* Spawn will assign */
840 .info = (struct mlx5_switch_info){
841 .name_type = MLX5_PHYS_PORT_NAME_TYPE_UPLINK,
844 struct mlx5_dev_config dev_config = {
846 .txq_inline_max = MLX5_ARG_UNSET,
847 .txq_inline_min = MLX5_ARG_UNSET,
848 .txq_inline_mpw = MLX5_ARG_UNSET,
849 .txqs_inline = MLX5_ARG_UNSET,
851 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
852 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
855 .log_hp_size = MLX5_ARG_UNSET,
856 .vf = mlx5_dev_is_vf_pci(pci_dev),
861 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
862 DRV_LOG(ERR, "Secondary process is not supported on Windows.");
865 ret = mlx5_init_once();
867 DRV_LOG(ERR, "unable to init PMD global data: %s",
868 strerror(rte_errno));
871 spawn.eth_dev = mlx5_dev_spawn(cdev->dev, &spawn, &dev_config);
874 restore = spawn.eth_dev->data->dev_flags;
875 rte_eth_copy_pci_info(spawn.eth_dev, pci_dev);
876 /* Restore non-PCI flags cleared by the above call. */
877 spawn.eth_dev->data->dev_flags |= restore;
878 rte_eth_dev_probing_finish(spawn.eth_dev);
883 * Cleanup resources when the last device is closed.
886 mlx5_os_net_cleanup(void)
890 const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};