drivers/net/mlx5/windows/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2020 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <errno.h>
   6 #include <stdalign.h>
   7 #include <stddef.h>
   8 #include <stdint.h>
   9 #include <stdlib.h>
  10
  11 #include <rte_windows.h>
  12 #include <ethdev_pci.h>
  13
  14 #include <mlx5_glue.h>
  15 #include <mlx5_devx_cmds.h>
  16 #include <mlx5_common.h>
  17 #include <mlx5_common_mp.h>
  18 #include <mlx5_common_mr.h>
  19 #include <mlx5_malloc.h>
  20
  21 #include "mlx5_defs.h"
  22 #include "mlx5.h"
  23 #include "mlx5_common_os.h"
  24 #include "mlx5_utils.h"
  25 #include "mlx5_rxtx.h"
  26 #include "mlx5_rx.h"
  27 #include "mlx5_tx.h"
  28 #include "mlx5_autoconf.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_devx.h"
  31
  32 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  33
  34 /* Spinlock for mlx5_shared_data allocation. */
  35 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  36
  37 /* rte flow indexed pool configuration. */
  38 static struct mlx5_indexed_pool_config icfg[] = {
  39         {
  40                 .size = sizeof(struct rte_flow),
  41                 .trunk_size = 64,
  42                 .need_lock = 1,
  43                 .release_mem_en = 0,
  44                 .malloc = mlx5_malloc,
  45                 .free = mlx5_free,
  46                 .per_core_cache = 0,
  47                 .type = "ctl_flow_ipool",
  48         },
  49         {
  50                 .size = sizeof(struct rte_flow),
  51                 .trunk_size = 64,
  52                 .grow_trunk = 3,
  53                 .grow_shift = 2,
  54                 .need_lock = 1,
  55                 .release_mem_en = 0,
  56                 .malloc = mlx5_malloc,
  57                 .free = mlx5_free,
  58                 .per_core_cache = 1 << 14,
  59                 .type = "rte_flow_ipool",
  60         },
  61         {
  62                 .size = sizeof(struct rte_flow),
  63                 .trunk_size = 64,
  64                 .grow_trunk = 3,
  65                 .grow_shift = 2,
  66                 .need_lock = 1,
  67                 .release_mem_en = 0,
  68                 .malloc = mlx5_malloc,
  69                 .free = mlx5_free,
  70                 .per_core_cache = 0,
  71                 .type = "mcp_flow_ipool",
  72         },
  73 };
  74
  75 static void
  76 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
  77 {
  78         struct mlx5_priv *priv = dev->data->dev_private;
  79         void *ctx = priv->sh->cdev->ctx;
  80
  81         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
  82         if (!priv->q_counters) {
  83                 DRV_LOG(ERR, "Port %d queue counter object cannot be created "
  84                         "by DevX - imissed counter will be unavailable",
  85                         dev->data->port_id);
  86                 return;
  87         }
  88         priv->counter_set_id = priv->q_counters->id;
  89 }
  90
  91 /**
  92  * Initialize shared data between primary and secondary process.
  93  *
  94  * A memzone is reserved by primary process and secondary processes attach to
  95  * the memzone.
  96  *
  97  * @return
  98  *   0 on success, a negative errno value otherwise and rte_errno is set.
  99  */
 100 static int
 101 mlx5_init_shared_data(void)
 102 {
 103         const struct rte_memzone *mz;
 104         int ret = 0;
 105
 106         rte_spinlock_lock(&mlx5_shared_data_lock);
 107         if (mlx5_shared_data == NULL) {
 108                 /* Allocate shared memory. */
 109                 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 110                                          sizeof(*mlx5_shared_data),
 111                                          SOCKET_ID_ANY, 0);
 112                 if (mz == NULL) {
 113                         DRV_LOG(ERR,
 114                                 "Cannot allocate mlx5 shared data");
 115                         ret = -rte_errno;
 116                         goto error;
 117                 }
 118                 mlx5_shared_data = mz->addr;
 119                 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 120                 rte_spinlock_init(&mlx5_shared_data->lock);
 121         }
 122 error:
 123         rte_spinlock_unlock(&mlx5_shared_data_lock);
 124         return ret;
 125 }
 126
 127 /**
 128  * PMD global initialization.
 129  *
 130  * Independent from individual device, this function initializes global
 131  * per-PMD data structures distinguishing primary and secondary processes.
 132  * Hence, each initialization is called once per a process.
 133  *
 134  * @return
 135  *   0 on success, a negative errno value otherwise and rte_errno is set.
 136  */
 137 static int
 138 mlx5_init_once(void)
 139 {
 140         if (mlx5_init_shared_data())
 141                 return -rte_errno;
 142         return 0;
 143 }
 144
 145 /**
 146  * Get mlx5 device attributes.
 147  *
 148  * @param cdev
 149  *   Pointer to mlx5 device.
 150  *
 151  * @param device_attr
 152  *   Pointer to mlx5 device attributes.
 153  *
 154  * @return
 155  *   0 on success, a negative errno value otherwise and rte_errno is set.
 156  */
 157 int
 158 mlx5_os_get_dev_attr(struct mlx5_common_device *cdev,
 159                      struct mlx5_dev_attr *device_attr)
 160 {
 161         struct mlx5_context *mlx5_ctx;
 162         void *pv_iseg = NULL;
 163         u32 cb_iseg = 0;
 164
 165         if (!cdev || !cdev->ctx) {
 166                 rte_errno = EINVAL;
 167                 return -rte_errno;
 168         }
 169         mlx5_ctx = (struct mlx5_context *)cdev->ctx;
 170         memset(device_attr, 0, sizeof(*device_attr));
 171         device_attr->max_cq = 1 << cdev->config.hca_attr.log_max_cq;
 172         device_attr->max_qp = 1 << cdev->config.hca_attr.log_max_qp;
 173         device_attr->max_qp_wr = 1 << cdev->config.hca_attr.log_max_qp_sz;
 174         device_attr->max_cqe = 1 << cdev->config.hca_attr.log_max_cq_sz;
 175         device_attr->max_mr = 1 << cdev->config.hca_attr.log_max_mrw_sz;
 176         device_attr->max_pd = 1 << cdev->config.hca_attr.log_max_pd;
 177         device_attr->max_srq = 1 << cdev->config.hca_attr.log_max_srq;
 178         device_attr->max_srq_wr = 1 << cdev->config.hca_attr.log_max_srq_sz;
 179         device_attr->max_tso = 1 << cdev->config.hca_attr.max_lso_cap;
 180         if (cdev->config.hca_attr.rss_ind_tbl_cap) {
 181                 device_attr->max_rwq_indirection_table_size =
 182                         1 << cdev->config.hca_attr.rss_ind_tbl_cap;
 183         }
 184         device_attr->sw_parsing_offloads =
 185                 mlx5_get_supported_sw_parsing_offloads(&cdev->config.hca_attr);
 186         device_attr->tunnel_offloads_caps =
 187                 mlx5_get_supported_tunneling_offloads(&cdev->config.hca_attr);
 188         pv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg);
 189         if (pv_iseg == NULL) {
 190                 DRV_LOG(ERR, "Failed to get device hca_iseg");
 191                 rte_errno = errno;
 192                 return -rte_errno;
 193         }
 194         snprintf(device_attr->fw_ver, 64, "%x.%x.%04x",
 195                  MLX5_GET(initial_seg, pv_iseg, fw_rev_major),
 196                  MLX5_GET(initial_seg, pv_iseg, fw_rev_minor),
 197                  MLX5_GET(initial_seg, pv_iseg, fw_rev_subminor));
 198         return 0;
 199 }
 200
 201 /**
 202  * Initialize DR related data within private structure.
 203  * Routine checks the reference counter and does actual
 204  * resources creation/initialization only if counter is zero.
 205  *
 206  * @param[in] priv
 207  *   Pointer to the private device data structure.
 208  *
 209  * @return
 210  *   Zero on success, positive error code otherwise.
 211  */
 212 static int
 213 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 214 {
 215         struct mlx5_dev_ctx_shared *sh = priv->sh;
 216         int err = 0;
 217
 218         if (!sh->flow_tbls)
 219                 err = mlx5_alloc_table_hash_list(priv);
 220         else
 221                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse",
 222                         (void *)sh->flow_tbls);
 223         return err;
 224 }
 225 /**
 226  * Destroy DR related data within private structure.
 227  *
 228  * @param[in] priv
 229  *   Pointer to the private device data structure.
 230  */
 231 void
 232 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 233 {
 234         mlx5_free_table_hash_list(priv);
 235 }
 236
 237 /**
 238  * Set the completion channel file descriptor interrupt as non-blocking.
 239  * Currently it has no support under Windows.
 240  *
 241  * @param[in] rxq_obj
 242  *   Pointer to RQ channel object, which includes the channel fd
 243  *
 244  * @param[out] fd
 245  *   The file descriptor (representing the interrupt) used in this channel.
 246  *
 247  * @return
 248  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 249  */
 250 int
 251 mlx5_os_set_nonblock_channel_fd(int fd)
 252 {
 253         (void)fd;
 254         DRV_LOG(WARNING, "%s: is not supported", __func__);
 255         return -ENOTSUP;
 256 }
 257
 258 /**
 259  * Spawn an Ethernet device from DevX information.
 260  *
 261  * @param dpdk_dev
 262  *   Backing DPDK device.
 263  * @param spawn
 264  *   Verbs device parameters (name, port, switch_info) to spawn.
 265  * @param config
 266  *   Device configuration parameters.
 267  *
 268  * @return
 269  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 270  *   is set. The following errors are defined:
 271  *
 272  *   EEXIST: device is already spawned
 273  */
 274 static struct rte_eth_dev *
 275 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 276                struct mlx5_dev_spawn_data *spawn,
 277                struct mlx5_dev_config *config)
 278 {
 279         const struct mlx5_switch_info *switch_info = &spawn->info;
 280         struct mlx5_dev_ctx_shared *sh = NULL;
 281         struct mlx5_hca_attr *hca_attr;
 282         struct rte_eth_dev *eth_dev = NULL;
 283         struct mlx5_priv *priv = NULL;
 284         int err = 0;
 285         struct rte_ether_addr mac;
 286         char name[RTE_ETH_NAME_MAX_LEN];
 287         int own_domain_id = 0;
 288         uint16_t port_id;
 289         int i;
 290
 291         /* Build device name. */
 292         strlcpy(name, dpdk_dev->name, sizeof(name));
 293         /* check if the device is already spawned */
 294         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 295                 rte_errno = EEXIST;
 296                 return NULL;
 297         }
 298         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 299         /* Process parameters. */
 300         err = mlx5_args(config, dpdk_dev->devargs);
 301         if (err) {
 302                 err = rte_errno;
 303                 DRV_LOG(ERR, "failed to process device arguments: %s",
 304                         strerror(rte_errno));
 305                 goto error;
 306         }
 307         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 308         if (!sh)
 309                 return NULL;
 310         /* Update final values for devargs before check sibling config. */
 311         config->dv_esw_en = 0;
 312         if (!config->dv_flow_en) {
 313                 DRV_LOG(ERR, "Windows flow mode must be DV flow enable.");
 314                 err = ENOTSUP;
 315                 goto error;
 316         }
 317         if (!config->dv_esw_en &&
 318             config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
 319                 DRV_LOG(WARNING,
 320                         "Metadata mode %u is not supported (no E-Switch).",
 321                         config->dv_xmeta_en);
 322                 config->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
 323         }
 324         /* Check sibling device configurations. */
 325         err = mlx5_dev_check_sibling_config(sh, config, dpdk_dev);
 326         if (err)
 327                 goto error;
 328         /* Initialize the shutdown event in mlx5_dev_spawn to
 329          * support mlx5_is_removed for Windows.
 330          */
 331         err = mlx5_glue->devx_init_showdown_event(sh->cdev->ctx);
 332         if (err) {
 333                 DRV_LOG(ERR, "failed to init showdown event: %s",
 334                         strerror(errno));
 335                 goto error;
 336         }
 337         DRV_LOG(DEBUG, "MPW isn't supported");
 338         config->swp = sh->device_attr.sw_parsing_offloads &
 339                 (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
 340                  MLX5_SW_PARSING_TSO_CAP);
 341         config->ind_table_max_size =
 342                 sh->device_attr.max_rwq_indirection_table_size;
 343         config->tunnel_en = sh->device_attr.tunnel_offloads_caps &
 344                 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
 345                  MLX5_TUNNELED_OFFLOADS_GRE_CAP |
 346                  MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
 347         if (config->tunnel_en) {
 348                 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
 349                 config->tunnel_en &
 350                 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
 351                 config->tunnel_en &
 352                 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
 353                 config->tunnel_en &
 354                 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""
 355                 );
 356         } else {
 357                 DRV_LOG(DEBUG, "tunnel offloading is not supported");
 358         }
 359         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is no supported");
 360         config->mpls_en = 0;
 361         /* Allocate private eth device data. */
 362         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 363                            sizeof(*priv),
 364                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 365         if (priv == NULL) {
 366                 DRV_LOG(ERR, "priv allocation failure");
 367                 err = ENOMEM;
 368                 goto error;
 369         }
 370         priv->sh = sh;
 371         priv->dev_port = spawn->phys_port;
 372         priv->pci_dev = spawn->pci_dev;
 373         priv->mtu = RTE_ETHER_MTU;
 374         priv->mp_id.port_id = port_id;
 375         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 376         priv->representor = !!switch_info->representor;
 377         priv->master = !!switch_info->master;
 378         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 379         priv->vport_meta_tag = 0;
 380         priv->vport_meta_mask = 0;
 381         priv->pf_bond = spawn->pf_bond;
 382         priv->vport_id = -1;
 383         /* representor_id field keeps the unmodified VF index. */
 384         priv->representor_id = -1;
 385         /*
 386          * Look for sibling devices in order to reuse their switch domain
 387          * if any, otherwise allocate one.
 388          */
 389         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
 390                 const struct mlx5_priv *opriv =
 391                         rte_eth_devices[port_id].data->dev_private;
 392
 393                 if (!opriv ||
 394                     opriv->sh != priv->sh ||
 395                         opriv->domain_id ==
 396                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 397                         continue;
 398                 priv->domain_id = opriv->domain_id;
 399                 break;
 400         }
 401         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 402                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
 403                 if (err) {
 404                         err = rte_errno;
 405                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
 406                                 strerror(rte_errno));
 407                         goto error;
 408                 }
 409                 own_domain_id = 1;
 410         }
 411         DRV_LOG(DEBUG, "counters are not supported");
 412         config->ind_table_max_size =
 413                 sh->device_attr.max_rwq_indirection_table_size;
 414         /*
 415          * Remove this check once DPDK supports larger/variable
 416          * indirection tables.
 417          */
 418         if (config->ind_table_max_size > (unsigned int)RTE_ETH_RSS_RETA_SIZE_512)
 419                 config->ind_table_max_size = RTE_ETH_RSS_RETA_SIZE_512;
 420         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
 421                 config->ind_table_max_size);
 422         if (config->hw_padding) {
 423                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
 424                 config->hw_padding = 0;
 425         }
 426         config->tso = (sh->device_attr.max_tso > 0);
 427         if (config->tso)
 428                 config->tso_max_payload_sz = sh->device_attr.max_tso;
 429         DRV_LOG(DEBUG, "%sMPS is %s.",
 430                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
 431                 config->mps == MLX5_MPW ? "legacy " : "",
 432                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
 433         if (config->cqe_comp) {
 434                 DRV_LOG(WARNING, "Rx CQE compression isn't supported.");
 435                 config->cqe_comp = 0;
 436         }
 437         if (sh->cdev->config.devx) {
 438                 hca_attr = &sh->cdev->config.hca_attr;
 439                 config->hw_csum = hca_attr->csum_cap;
 440                 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
 441                         (config->hw_csum ? "" : "not "));
 442                 config->hw_vlan_strip = hca_attr->vlan_cap;
 443                 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
 444                         (config->hw_vlan_strip ? "" : "not "));
 445                 config->hw_fcs_strip = hca_attr->scatter_fcs;
 446                 mlx5_rt_timestamp_config(sh, config, hca_attr);
 447         }
 448         if (config->mprq.enabled) {
 449                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
 450                 config->mprq.enabled = 0;
 451         }
 452         if (config->max_dump_files_num == 0)
 453                 config->max_dump_files_num = 128;
 454         eth_dev = rte_eth_dev_allocate(name);
 455         if (eth_dev == NULL) {
 456                 DRV_LOG(ERR, "can not allocate rte ethdev");
 457                 err = ENOMEM;
 458                 goto error;
 459         }
 460         if (priv->representor) {
 461                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
 462                 eth_dev->data->representor_id = priv->representor_id;
 463                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
 464                         struct mlx5_priv *opriv =
 465                                 rte_eth_devices[port_id].data->dev_private;
 466                         if (opriv &&
 467                             opriv->master &&
 468                             opriv->domain_id == priv->domain_id &&
 469                             opriv->sh == priv->sh) {
 470                                 eth_dev->data->backer_port_id = port_id;
 471                                 break;
 472                         }
 473                 }
 474                 if (port_id >= RTE_MAX_ETHPORTS)
 475                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
 476         }
 477         /*
 478          * Store associated network device interface index. This index
 479          * is permanent throughout the lifetime of device. So, we may store
 480          * the ifindex here and use the cached value further.
 481          */
 482         MLX5_ASSERT(spawn->ifindex);
 483         priv->if_index = spawn->ifindex;
 484         eth_dev->data->dev_private = priv;
 485         priv->dev_data = eth_dev->data;
 486         eth_dev->data->mac_addrs = priv->mac;
 487         eth_dev->device = dpdk_dev;
 488         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
 489         /* Configure the first MAC address by default. */
 490         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
 491                 DRV_LOG(ERR,
 492                         "port %u cannot get MAC address, is mlx5_en"
 493                         " loaded? (errno: %s).",
 494                         eth_dev->data->port_id, strerror(rte_errno));
 495                 err = ENODEV;
 496                 goto error;
 497         }
 498         DRV_LOG(INFO,
 499                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
 500                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
 501 #ifdef RTE_LIBRTE_MLX5_DEBUG
 502         {
 503                 char ifname[MLX5_NAMESIZE];
 504
 505                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
 506                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
 507                                 eth_dev->data->port_id, ifname);
 508                 else
 509                         DRV_LOG(DEBUG, "port %u ifname is unknown.",
 510                                 eth_dev->data->port_id);
 511         }
 512 #endif
 513         /* Get actual MTU if possible. */
 514         err = mlx5_get_mtu(eth_dev, &priv->mtu);
 515         if (err) {
 516                 err = rte_errno;
 517                 goto error;
 518         }
 519         DRV_LOG(DEBUG, "port %u MTU is %u.", eth_dev->data->port_id,
 520                 priv->mtu);
 521         /* Initialize burst functions to prevent crashes before link-up. */
 522         eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
 523         eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
 524         eth_dev->dev_ops = &mlx5_dev_ops;
 525         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 526         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 527         eth_dev->rx_queue_count = mlx5_rx_queue_count;
 528         /* Register MAC address. */
 529         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
 530         priv->ctrl_flows = 0;
 531         TAILQ_INIT(&priv->flow_meters);
 532         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
 533         if (!priv->mtr_profile_tbl)
 534                 goto error;
 535         /* Bring Ethernet device up. */
 536         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up.",
 537                 eth_dev->data->port_id);
 538         /* nl calls are unsupported - set to -1 not to fail on release */
 539         priv->nl_socket_rdma = -1;
 540         priv->nl_socket_route = -1;
 541         mlx5_set_link_up(eth_dev);
 542         /*
 543          * Even though the interrupt handler is not installed yet,
 544          * interrupts will still trigger on the async_fd from
 545          * Verbs context returned by ibv_open_device().
 546          */
 547         mlx5_link_update(eth_dev, 0);
 548         /* Detect minimal data bytes to inline. */
 549         mlx5_set_min_inline(spawn, config);
 550         /* Store device configuration on private structure. */
 551         priv->config = *config;
 552         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
 553                 icfg[i].release_mem_en = !!config->reclaim_mode;
 554                 if (config->reclaim_mode)
 555                         icfg[i].per_core_cache = 0;
 556                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
 557                 if (!priv->flows[i])
 558                         goto error;
 559         }
 560         /* Create context for virtual machine VLAN workaround. */
 561         priv->vmwa_context = NULL;
 562         if (config->dv_flow_en) {
 563                 err = mlx5_alloc_shared_dr(priv);
 564                 if (err)
 565                         goto error;
 566         }
 567         /* No supported flow priority number detection. */
 568         priv->sh->flow_max_priority = -1;
 569         mlx5_set_metadata_mask(eth_dev);
 570         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 571             !priv->sh->dv_regc0_mask) {
 572                 DRV_LOG(ERR, "metadata mode %u is not supported "
 573                              "(no metadata reg_c[0] is available).",
 574                              priv->config.dv_xmeta_en);
 575                         err = ENOTSUP;
 576                         goto error;
 577         }
 578         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
 579                 mlx5_hrxq_create_cb, mlx5_hrxq_match_cb,
 580                 mlx5_hrxq_remove_cb, mlx5_hrxq_clone_cb,
 581                 mlx5_hrxq_clone_free_cb);
 582         /* Query availability of metadata reg_c's. */
 583         if (!priv->sh->metadata_regc_check_flag) {
 584                 err = mlx5_flow_discover_mreg_c(eth_dev);
 585                 if (err < 0) {
 586                         err = -err;
 587                         goto error;
 588                 }
 589         }
 590         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
 591                 DRV_LOG(DEBUG,
 592                         "port %u extensive metadata register is not supported.",
 593                         eth_dev->data->port_id);
 594                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
 595                         DRV_LOG(ERR, "metadata mode %u is not supported "
 596                                      "(no metadata registers available).",
 597                                      priv->config.dv_xmeta_en);
 598                         err = ENOTSUP;
 599                         goto error;
 600                 }
 601         }
 602         if (sh->cdev->config.devx) {
 603                 priv->obj_ops = devx_obj_ops;
 604         } else {
 605                 DRV_LOG(ERR, "Windows flow must be DevX.");
 606                 err = ENOTSUP;
 607                 goto error;
 608         }
 609         mlx5_flow_counter_mode_config(eth_dev);
 610         mlx5_queue_counter_id_prepare(eth_dev);
 611         return eth_dev;
 612 error:
 613         if (priv) {
 614                 if (priv->mtr_profile_tbl)
 615                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
 616                 if (own_domain_id)
 617                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 618                 mlx5_free(priv);
 619                 if (eth_dev != NULL)
 620                         eth_dev->data->dev_private = NULL;
 621         }
 622         if (eth_dev != NULL) {
 623                 /* mac_addrs must not be freed alone because part of
 624                  * dev_private
 625                  **/
 626                 eth_dev->data->mac_addrs = NULL;
 627                 rte_eth_dev_release_port(eth_dev);
 628         }
 629         if (sh)
 630                 mlx5_free_shared_dev_ctx(sh);
 631         MLX5_ASSERT(err > 0);
 632         rte_errno = err;
 633         return NULL;
 634 }
 635
 636 /**
 637  * This function should share events between multiple ports of single IB
 638  * device.  Currently it has no support under Windows.
 639  *
 640  * @param sh
 641  *   Pointer to mlx5_dev_ctx_shared object.
 642  */
 643 void
 644 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
 645 {
 646         (void)sh;
 647         DRV_LOG(WARNING, "%s: is not supported", __func__);
 648 }
 649
 650 /**
 651  * This function should share events between multiple ports of single IB
 652  * device.  Currently it has no support under Windows.
 653  *
 654  * @param dev
 655  *   Pointer to mlx5_dev_ctx_shared object.
 656  */
 657 void
 658 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
 659 {
 660         (void)sh;
 661         DRV_LOG(WARNING, "%s: is not supported", __func__);
 662 }
 663
 664 /**
 665  * Read statistics by a named counter.
 666  *
 667  * @param[in] priv
 668  *   Pointer to the private device data structure.
 669  * @param[in] ctr_name
 670  *   Pointer to the name of the statistic counter to read
 671  * @param[out] stat
 672  *   Pointer to read statistic value.
 673  * @return
 674  *   0 on success and stat is valid, non-zero if failed to read the value
 675  *   or counter is not supported.
 676  *   rte_errno is set.
 677  *
 678  */
 679 int
 680 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
 681                       uint64_t *stat)
 682 {
 683         if (priv->q_counters != NULL && strcmp(ctr_name, "out_of_buffer") == 0)
 684                 return mlx5_devx_cmd_queue_counter_query
 685                                 (priv->q_counters, 0, (uint32_t *)stat);
 686         DRV_LOG(WARNING, "%s: is not supported for the %s counter",
 687                 __func__, ctr_name);
 688         return -ENOTSUP;
 689 }
 690
 691 /**
 692  * Flush device MAC addresses
 693  * Currently it has no support under Windows.
 694  *
 695  * @param dev
 696  *   Pointer to Ethernet device structure.
 697  *
 698  */
 699 void
 700 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
 701 {
 702         (void)dev;
 703         DRV_LOG(WARNING, "%s: is not supported", __func__);
 704 }
 705
 706 /**
 707  * Remove a MAC address from device
 708  * Currently it has no support under Windows.
 709  *
 710  * @param dev
 711  *   Pointer to Ethernet device structure.
 712  * @param index
 713  *   MAC address index.
 714  */
 715 void
 716 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
 717 {
 718         (void)dev;
 719         (void)(index);
 720         DRV_LOG(WARNING, "%s: is not supported", __func__);
 721 }
 722
 723 /**
 724  * Adds a MAC address to the device
 725  * Currently it has no support under Windows.
 726  *
 727  * @param dev
 728  *   Pointer to Ethernet device structure.
 729  * @param mac_addr
 730  *   MAC address to register.
 731  * @param index
 732  *   MAC address index.
 733  *
 734  * @return
 735  *   0 on success, a negative errno value otherwise
 736  */
 737 int
 738 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
 739                      uint32_t index)
 740 {
 741         (void)index;
 742         struct rte_ether_addr lmac;
 743
 744         if (mlx5_get_mac(dev, &lmac.addr_bytes)) {
 745                 DRV_LOG(ERR,
 746                         "port %u cannot get MAC address, is mlx5_en"
 747                         " loaded? (errno: %s)",
 748                         dev->data->port_id, strerror(rte_errno));
 749                 return rte_errno;
 750         }
 751         if (!rte_is_same_ether_addr(&lmac, mac)) {
 752                 DRV_LOG(ERR,
 753                         "adding new mac address to device is unsupported");
 754                 return -ENOTSUP;
 755         }
 756         return 0;
 757 }
 758
 759 /**
 760  * Modify a VF MAC address
 761  * Currently it has no support under Windows.
 762  *
 763  * @param priv
 764  *   Pointer to device private data.
 765  * @param mac_addr
 766  *   MAC address to modify into.
 767  * @param iface_idx
 768  *   Net device interface index
 769  * @param vf_index
 770  *   VF index
 771  *
 772  * @return
 773  *   0 on success, a negative errno value otherwise
 774  */
 775 int
 776 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
 777                            unsigned int iface_idx,
 778                            struct rte_ether_addr *mac_addr,
 779                            int vf_index)
 780 {
 781         (void)priv;
 782         (void)iface_idx;
 783         (void)mac_addr;
 784         (void)vf_index;
 785         DRV_LOG(WARNING, "%s: is not supported", __func__);
 786         return -ENOTSUP;
 787 }
 788
 789 /**
 790  * Set device promiscuous mode
 791  * Currently it has no support under Windows.
 792  *
 793  * @param dev
 794  *   Pointer to Ethernet device structure.
 795  * @param enable
 796  *   0 - promiscuous is disabled, otherwise - enabled
 797  *
 798  * @return
 799  *   0 on success, a negative error value otherwise
 800  */
 801 int
 802 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
 803 {
 804         (void)dev;
 805         (void)enable;
 806         DRV_LOG(WARNING, "%s: is not supported", __func__);
 807         return -ENOTSUP;
 808 }
 809
 810 /**
 811  * Set device allmulti mode
 812  *
 813  * @param dev
 814  *   Pointer to Ethernet device structure.
 815  * @param enable
 816  *   0 - all multicase is disabled, otherwise - enabled
 817  *
 818  * @return
 819  *   0 on success, a negative error value otherwise
 820  */
 821 int
 822 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
 823 {
 824         (void)dev;
 825         (void)enable;
 826         DRV_LOG(WARNING, "%s: is not supported", __func__);
 827         return -ENOTSUP;
 828 }
 829
 830 /**
 831  * DPDK callback to register a PCI device.
 832  *
 833  * This function spawns Ethernet devices out of a given device.
 834  *
 835  * @param[in] dev
 836  *   Pointer to the common device.
 837  *
 838  * @return
 839  *   0 on success, a negative errno value otherwise and rte_errno is set.
 840  */
 841 int
 842 mlx5_os_net_probe(struct mlx5_common_device *cdev)
 843 {
 844         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
 845         struct mlx5_dev_spawn_data spawn = {
 846                 .pf_bond = -1,
 847                 .max_port = 1,
 848                 .phys_port = 1,
 849                 .phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx),
 850                 .pci_dev = pci_dev,
 851                 .cdev = cdev,
 852                 .ifindex = -1, /* Spawn will assign */
 853                 .info = (struct mlx5_switch_info){
 854                         .name_type = MLX5_PHYS_PORT_NAME_TYPE_UPLINK,
 855                 },
 856         };
 857         struct mlx5_dev_config dev_config = {
 858                 .rx_vec_en = 1,
 859                 .txq_inline_max = MLX5_ARG_UNSET,
 860                 .txq_inline_min = MLX5_ARG_UNSET,
 861                 .txq_inline_mpw = MLX5_ARG_UNSET,
 862                 .txqs_inline = MLX5_ARG_UNSET,
 863                 .mprq = {
 864                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
 865                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
 866                 },
 867                 .dv_flow_en = 1,
 868                 .log_hp_size = MLX5_ARG_UNSET,
 869                 .vf = mlx5_dev_is_vf_pci(pci_dev),
 870         };
 871         int ret;
 872         uint32_t restore;
 873
 874         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 875                 DRV_LOG(ERR, "Secondary process is not supported on Windows.");
 876                 return -ENOTSUP;
 877         }
 878         ret = mlx5_init_once();
 879         if (ret) {
 880                 DRV_LOG(ERR, "unable to init PMD global data: %s",
 881                         strerror(rte_errno));
 882                 return -rte_errno;
 883         }
 884         spawn.eth_dev = mlx5_dev_spawn(cdev->dev, &spawn, &dev_config);
 885         if (!spawn.eth_dev)
 886                 return -rte_errno;
 887         restore = spawn.eth_dev->data->dev_flags;
 888         rte_eth_copy_pci_info(spawn.eth_dev, pci_dev);
 889         /* Restore non-PCI flags cleared by the above call. */
 890         spawn.eth_dev->data->dev_flags |= restore;
 891         rte_eth_dev_probing_finish(spawn.eth_dev);
 892         return 0;
 893 }
 894
 895 /**
 896  * Cleanup resources when the last device is closed.
 897  */
 898 void
 899 mlx5_os_net_cleanup(void)
 900 {
 901 }
 902
 903 const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};