1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
11 #include <rte_windows.h>
12 #include <ethdev_pci.h>
14 #include <mlx5_glue.h>
15 #include <mlx5_devx_cmds.h>
16 #include <mlx5_common.h>
17 #include <mlx5_common_mp.h>
18 #include <mlx5_common_mr.h>
19 #include <mlx5_malloc.h>
21 #include "mlx5_defs.h"
23 #include "mlx5_common_os.h"
24 #include "mlx5_utils.h"
25 #include "mlx5_rxtx.h"
28 #include "mlx5_autoconf.h"
30 #include "mlx5_flow.h"
31 #include "mlx5_devx.h"
33 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
35 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
37 /* Spinlock for mlx5_shared_data allocation. */
38 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
41 * Initialize shared data between primary and secondary process.
43 * A memzone is reserved by primary process and secondary processes attach to
47 * 0 on success, a negative errno value otherwise and rte_errno is set.
50 mlx5_init_shared_data(void)
52 const struct rte_memzone *mz;
55 rte_spinlock_lock(&mlx5_shared_data_lock);
56 if (mlx5_shared_data == NULL) {
57 /* Allocate shared memory. */
58 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
59 sizeof(*mlx5_shared_data),
63 "Cannot allocate mlx5 shared data");
67 mlx5_shared_data = mz->addr;
68 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
69 rte_spinlock_init(&mlx5_shared_data->lock);
72 rte_spinlock_unlock(&mlx5_shared_data_lock);
77 * PMD global initialization.
79 * Independent from individual device, this function initializes global
80 * per-PMD data structures distinguishing primary and secondary processes.
81 * Hence, each initialization is called once per a process.
84 * 0 on success, a negative errno value otherwise and rte_errno is set.
89 if (mlx5_init_shared_data())
95 * Get mlx5 device attributes.
98 * Pointer to device context.
101 * Pointer to mlx5 device attributes.
104 * 0 on success, non zero error number otherwise
107 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
109 struct mlx5_context *mlx5_ctx;
110 struct mlx5_hca_attr hca_attr;
111 void *pv_iseg = NULL;
117 mlx5_ctx = (struct mlx5_context *)ctx;
118 memset(device_attr, 0, sizeof(*device_attr));
119 err = mlx5_devx_cmd_query_hca_attr(mlx5_ctx, &hca_attr);
121 DRV_LOG(ERR, "Failed to get device hca_cap");
124 device_attr->max_cq = 1 << hca_attr.log_max_cq;
125 device_attr->max_qp = 1 << hca_attr.log_max_qp;
126 device_attr->max_qp_wr = 1 << hca_attr.log_max_qp_sz;
127 device_attr->max_cqe = 1 << hca_attr.log_max_cq_sz;
128 device_attr->max_mr = 1 << hca_attr.log_max_mrw_sz;
129 device_attr->max_pd = 1 << hca_attr.log_max_pd;
130 device_attr->max_srq = 1 << hca_attr.log_max_srq;
131 device_attr->max_srq_wr = 1 << hca_attr.log_max_srq_sz;
132 if (hca_attr.rss_ind_tbl_cap) {
133 device_attr->max_rwq_indirection_table_size =
134 1 << hca_attr.rss_ind_tbl_cap;
136 pv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg);
137 if (pv_iseg == NULL) {
138 DRV_LOG(ERR, "Failed to get device hca_iseg");
142 snprintf(device_attr->fw_ver, 64, "%x.%x.%04x",
143 MLX5_GET(initial_seg, pv_iseg, fw_rev_major),
144 MLX5_GET(initial_seg, pv_iseg, fw_rev_minor),
145 MLX5_GET(initial_seg, pv_iseg, fw_rev_subminor));
151 * Initialize DR related data within private structure.
152 * Routine checks the reference counter and does actual
153 * resources creation/initialization only if counter is zero.
156 * Pointer to the private device data structure.
159 * Zero on success, positive error code otherwise.
162 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
164 struct mlx5_dev_ctx_shared *sh = priv->sh;
168 err = mlx5_alloc_table_hash_list(priv);
170 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse",
171 (void *)sh->flow_tbls);
175 * Destroy DR related data within private structure.
178 * Pointer to the private device data structure.
181 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
183 mlx5_free_table_hash_list(priv);
187 * Set the completion channel file descriptor interrupt as non-blocking.
188 * Currently it has no support under Windows.
191 * Pointer to RQ channel object, which includes the channel fd
194 * The file descriptor (representing the intetrrupt) used in this channel.
197 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
200 mlx5_os_set_nonblock_channel_fd(int fd)
203 DRV_LOG(WARNING, "%s: is not supported", __func__);
208 * Function API open device under Windows
210 * This function calls the Windows glue APIs to open a device.
213 * Pointer to the device attributes (name, port, etc).
215 * Pointer to device configuration structure.
217 * Pointer to shared context structure.
220 * 0 on success, a positive error value otherwise.
223 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
224 const struct mlx5_dev_config *config,
225 struct mlx5_dev_ctx_shared *sh)
227 RTE_SET_USED(config);
229 struct mlx5_context *mlx5_ctx;
231 pthread_mutex_init(&sh->txpp.mutex, NULL);
232 /* Set numa node from pci probe */
233 sh->numa_node = spawn->pci_dev->device.numa_node;
235 /* Try to open device with DevX */
237 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
239 DRV_LOG(ERR, "open_device failed");
244 mlx5_ctx = (struct mlx5_context *)sh->ctx;
245 err = mlx5_glue->query_device(spawn->phys_dev, &mlx5_ctx->mlx5_dev);
247 DRV_LOG(ERR, "Failed to query device context fields.");
252 * DV flow counter mode detect and config.
255 * Pointer to rte_eth_dev structure.
259 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
261 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
262 struct mlx5_priv *priv = dev->data->dev_private;
263 struct mlx5_dev_ctx_shared *sh = priv->sh;
266 #ifndef HAVE_IBV_DEVX_ASYNC
270 if (!priv->config.devx || !priv->config.dv_flow_en ||
271 !priv->config.hca_attr.flow_counters_dump ||
272 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
273 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
277 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
278 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
279 priv->config.hca_attr.flow_counters_dump,
280 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
281 /* Initialize fallback mode only on the port initializes sh. */
283 sh->cmng.counter_fallback = fallback;
284 else if (fallback != sh->cmng.counter_fallback)
285 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
286 "with others:%d.", PORT_ID(priv), fallback);
291 * Spawn an Ethernet device from Verbs information.
294 * Backing DPDK device.
296 * Verbs device parameters (name, port, switch_info) to spawn.
298 * Device configuration parameters.
301 * A valid Ethernet device object on success, NULL otherwise and rte_errno
302 * is set. The following errors are defined:
304 * EEXIST: device is already spawned
306 static struct rte_eth_dev *
307 mlx5_dev_spawn(struct rte_device *dpdk_dev,
308 struct mlx5_dev_spawn_data *spawn,
309 struct mlx5_dev_config *config)
311 const struct mlx5_switch_info *switch_info = &spawn->info;
312 struct mlx5_dev_ctx_shared *sh = NULL;
313 struct mlx5_dev_attr device_attr;
314 struct rte_eth_dev *eth_dev = NULL;
315 struct mlx5_priv *priv = NULL;
317 unsigned int cqe_comp;
318 struct rte_ether_addr mac;
319 char name[RTE_ETH_NAME_MAX_LEN];
320 int own_domain_id = 0;
323 /* Build device name. */
324 strlcpy(name, dpdk_dev->name, sizeof(name));
325 /* check if the device is already spawned */
326 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
330 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
332 * Some parameters are needed in advance to create device context. We
333 * process the devargs here to get ones, and later process devargs
334 * again to override some hardware settings.
336 err = mlx5_args(config, dpdk_dev->devargs);
339 DRV_LOG(ERR, "failed to process device arguments: %s",
340 strerror(rte_errno));
343 mlx5_malloc_mem_select(config->sys_mem_en);
344 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
347 config->devx = sh->devx;
348 /* Initialize the shutdown event in mlx5_dev_spawn to
349 * support mlx5_is_removed for Windows.
351 err = mlx5_glue->devx_init_showdown_event(sh->ctx);
353 DRV_LOG(ERR, "failed to init showdown event: %s",
357 DRV_LOG(DEBUG, "MPW isn't supported");
358 mlx5_os_get_dev_attr(sh->ctx, &device_attr);
360 config->ind_table_max_size =
361 sh->device_attr.max_rwq_indirection_table_size;
363 config->cqe_comp = cqe_comp;
364 DRV_LOG(DEBUG, "tunnel offloading is not supported");
365 config->tunnel_en = 0;
366 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is no supported");
368 /* Allocate private eth device data. */
369 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
371 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
373 DRV_LOG(ERR, "priv allocation failure");
378 priv->dev_port = spawn->phys_port;
379 priv->pci_dev = spawn->pci_dev;
380 priv->mtu = RTE_ETHER_MTU;
381 priv->mp_id.port_id = port_id;
382 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
383 priv->representor = !!switch_info->representor;
384 priv->master = !!switch_info->master;
385 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
386 priv->vport_meta_tag = 0;
387 priv->vport_meta_mask = 0;
388 priv->pf_bond = spawn->pf_bond;
390 /* representor_id field keeps the unmodified VF index. */
391 priv->representor_id = -1;
393 * Look for sibling devices in order to reuse their switch domain
394 * if any, otherwise allocate one.
396 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
397 const struct mlx5_priv *opriv =
398 rte_eth_devices[port_id].data->dev_private;
401 opriv->sh != priv->sh ||
403 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
405 priv->domain_id = opriv->domain_id;
408 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
409 err = rte_eth_switch_domain_alloc(&priv->domain_id);
412 DRV_LOG(ERR, "unable to allocate switch domain: %s",
413 strerror(rte_errno));
418 /* Override some values set by hardware configuration. */
419 mlx5_args(config, dpdk_dev->devargs);
420 err = mlx5_dev_check_sibling_config(priv, config);
423 DRV_LOG(DEBUG, "counters are not supported");
424 config->ind_table_max_size =
425 sh->device_attr.max_rwq_indirection_table_size;
427 * Remove this check once DPDK supports larger/variable
428 * indirection tables.
430 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
431 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
432 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
433 config->ind_table_max_size);
434 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
435 (config->hw_vlan_strip ? "" : "not "));
436 if (config->hw_padding) {
437 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
438 config->hw_padding = 0;
441 config->tso_max_payload_sz = sh->device_attr.max_tso;
442 DRV_LOG(DEBUG, "%sMPS is %s.",
443 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
444 config->mps == MLX5_MPW ? "legacy " : "",
445 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
446 if (config->cqe_comp && !cqe_comp) {
447 DRV_LOG(WARNING, "Rx CQE compression isn't supported.");
448 config->cqe_comp = 0;
451 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
456 /* Check relax ordering support. */
457 sh->cmng.relaxed_ordering_read = 0;
458 sh->cmng.relaxed_ordering_write = 0;
459 if (!haswell_broadwell_cpu) {
460 sh->cmng.relaxed_ordering_write =
461 config->hca_attr.relaxed_ordering_write;
462 sh->cmng.relaxed_ordering_read =
463 config->hca_attr.relaxed_ordering_read;
465 config->hw_csum = config->hca_attr.csum_cap;
466 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
467 (config->hw_csum ? "" : "not "));
470 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
472 err = config->hca_attr.access_register_user ?
473 mlx5_devx_cmd_register_read
474 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
475 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
479 /* MTUTC register is read successfully. */
480 ts_mode = MLX5_GET(register_mtutc, reg,
482 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
483 config->rt_timestamp = 1;
485 /* Kernel does not support register reading. */
486 if (config->hca_attr.dev_freq_khz ==
487 (NS_PER_S / MS_PER_S))
488 config->rt_timestamp = 1;
490 sh->rq_ts_format = config->hca_attr.rq_ts_format;
491 sh->sq_ts_format = config->hca_attr.sq_ts_format;
492 sh->qp_ts_format = config->hca_attr.qp_ts_format;
494 if (config->mprq.enabled) {
495 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
496 config->mprq.enabled = 0;
498 if (config->max_dump_files_num == 0)
499 config->max_dump_files_num = 128;
500 eth_dev = rte_eth_dev_allocate(name);
501 if (eth_dev == NULL) {
502 DRV_LOG(ERR, "can not allocate rte ethdev");
506 if (priv->representor) {
507 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
508 eth_dev->data->representor_id = priv->representor_id;
511 * Store associated network device interface index. This index
512 * is permanent throughout the lifetime of device. So, we may store
513 * the ifindex here and use the cached value further.
515 MLX5_ASSERT(spawn->ifindex);
516 priv->if_index = spawn->ifindex;
517 eth_dev->data->dev_private = priv;
518 priv->dev_data = eth_dev->data;
519 eth_dev->data->mac_addrs = priv->mac;
520 eth_dev->device = dpdk_dev;
521 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
522 /* Configure the first MAC address by default. */
523 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
525 "port %u cannot get MAC address, is mlx5_en"
526 " loaded? (errno: %s).",
527 eth_dev->data->port_id, strerror(rte_errno));
532 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
533 eth_dev->data->port_id,
534 mac.addr_bytes[0], mac.addr_bytes[1],
535 mac.addr_bytes[2], mac.addr_bytes[3],
536 mac.addr_bytes[4], mac.addr_bytes[5]);
537 #ifdef RTE_LIBRTE_MLX5_DEBUG
539 char ifname[MLX5_NAMESIZE];
541 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
542 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
543 eth_dev->data->port_id, ifname);
545 DRV_LOG(DEBUG, "port %u ifname is unknown.",
546 eth_dev->data->port_id);
549 /* Get actual MTU if possible. */
550 err = mlx5_get_mtu(eth_dev, &priv->mtu);
555 DRV_LOG(DEBUG, "port %u MTU is %u.", eth_dev->data->port_id,
557 /* Initialize burst functions to prevent crashes before link-up. */
558 eth_dev->rx_pkt_burst = removed_rx_burst;
559 eth_dev->tx_pkt_burst = removed_tx_burst;
560 eth_dev->dev_ops = &mlx5_dev_ops;
561 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
562 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
563 eth_dev->rx_queue_count = mlx5_rx_queue_count;
564 /* Register MAC address. */
565 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
566 priv->ctrl_flows = 0;
567 TAILQ_INIT(&priv->flow_meters);
568 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
569 if (!priv->mtr_profile_tbl)
571 /* Bring Ethernet device up. */
572 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up.",
573 eth_dev->data->port_id);
574 /* nl calls are unsupported - set to -1 not to fail on release */
575 priv->nl_socket_rdma = -1;
576 priv->nl_socket_route = -1;
577 mlx5_set_link_up(eth_dev);
579 * Even though the interrupt handler is not installed yet,
580 * interrupts will still trigger on the async_fd from
581 * Verbs context returned by ibv_open_device().
583 mlx5_link_update(eth_dev, 0);
584 config->dv_esw_en = 0;
585 /* Detect minimal data bytes to inline. */
586 mlx5_set_min_inline(spawn, config);
587 /* Store device configuration on private structure. */
588 priv->config = *config;
589 /* Create context for virtual machine VLAN workaround. */
590 priv->vmwa_context = NULL;
591 if (config->dv_flow_en) {
592 err = mlx5_alloc_shared_dr(priv);
596 /* No supported flow priority number detection. */
597 priv->config.flow_prio = -1;
598 if (!priv->config.dv_esw_en &&
599 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
600 DRV_LOG(WARNING, "metadata mode %u is not supported "
601 "(no E-Switch)", priv->config.dv_xmeta_en);
602 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
604 mlx5_set_metadata_mask(eth_dev);
605 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
606 !priv->sh->dv_regc0_mask) {
607 DRV_LOG(ERR, "metadata mode %u is not supported "
608 "(no metadata reg_c[0] is available).",
609 priv->config.dv_xmeta_en);
613 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
614 mlx5_hrxq_create_cb, mlx5_hrxq_match_cb,
615 mlx5_hrxq_remove_cb, mlx5_hrxq_clone_cb,
616 mlx5_hrxq_clone_free_cb);
617 /* Query availability of metadata reg_c's. */
618 err = mlx5_flow_discover_mreg_c(eth_dev);
623 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
625 "port %u extensive metadata register is not supported.",
626 eth_dev->data->port_id);
627 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
628 DRV_LOG(ERR, "metadata mode %u is not supported "
629 "(no metadata registers available).",
630 priv->config.dv_xmeta_en);
635 if (config->devx && config->dv_flow_en) {
636 priv->obj_ops = devx_obj_ops;
638 DRV_LOG(ERR, "Flow mode %u is not supported "
639 "(Windows flow must be DevX with DV flow enabled).",
640 priv->config.dv_flow_en);
644 mlx5_flow_counter_mode_config(eth_dev);
648 if (priv->mtr_profile_tbl)
649 mlx5_l3t_destroy(priv->mtr_profile_tbl);
651 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
654 eth_dev->data->dev_private = NULL;
656 if (eth_dev != NULL) {
657 /* mac_addrs must not be freed alone because part of
660 eth_dev->data->mac_addrs = NULL;
661 rte_eth_dev_release_port(eth_dev);
664 mlx5_free_shared_dev_ctx(sh);
665 MLX5_ASSERT(err > 0);
671 * This function should share events between multiple ports of single IB
672 * device. Currently it has no support under Windows.
675 * Pointer to mlx5_dev_ctx_shared object.
678 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
681 DRV_LOG(WARNING, "%s: is not supported", __func__);
685 * This function should share events between multiple ports of single IB
686 * device. Currently it has no support under Windows.
689 * Pointer to mlx5_dev_ctx_shared object.
692 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
695 DRV_LOG(WARNING, "%s: is not supported", __func__);
699 * Read statistics by a named counter.
702 * Pointer to the private device data structure.
703 * @param[in] ctr_name
704 * Pointer to the name of the statistic counter to read
706 * Pointer to read statistic value.
708 * 0 on success and stat is valud, 1 if failed to read the value
713 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
717 RTE_SET_USED(ctr_name);
719 DRV_LOG(WARNING, "%s: is not supported", __func__);
724 * Flush device MAC addresses
725 * Currently it has no support under Windows.
728 * Pointer to Ethernet device structure.
732 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
735 DRV_LOG(WARNING, "%s: is not supported", __func__);
739 * Remove a MAC address from device
740 * Currently it has no support under Windows.
743 * Pointer to Ethernet device structure.
748 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
752 DRV_LOG(WARNING, "%s: is not supported", __func__);
756 * Adds a MAC address to the device
757 * Currently it has no support under Windows.
760 * Pointer to Ethernet device structure.
762 * MAC address to register.
767 * 0 on success, a negative errno value otherwise
770 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
774 struct rte_ether_addr lmac;
776 if (mlx5_get_mac(dev, &lmac.addr_bytes)) {
778 "port %u cannot get MAC address, is mlx5_en"
779 " loaded? (errno: %s)",
780 dev->data->port_id, strerror(rte_errno));
783 if (!rte_is_same_ether_addr(&lmac, mac)) {
785 "adding new mac address to device is unsupported");
792 * Modify a VF MAC address
793 * Currently it has no support under Windows.
796 * Pointer to device private data.
798 * MAC address to modify into.
800 * Net device interface index
805 * 0 on success, a negative errno value otherwise
808 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
809 unsigned int iface_idx,
810 struct rte_ether_addr *mac_addr,
817 DRV_LOG(WARNING, "%s: is not supported", __func__);
822 * Set device promiscuous mode
823 * Currently it has no support under Windows.
826 * Pointer to Ethernet device structure.
828 * 0 - promiscuous is disabled, otherwise - enabled
831 * 0 on success, a negative error value otherwise
834 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
838 DRV_LOG(WARNING, "%s: is not supported", __func__);
843 * Set device allmulti mode
846 * Pointer to Ethernet device structure.
848 * 0 - all multicase is disabled, otherwise - enabled
851 * 0 on success, a negative error value otherwise
854 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
858 DRV_LOG(WARNING, "%s: is not supported", __func__);
863 * Detect if a devx_device_bdf object has identical DBDF values to the
864 * rte_pci_addr found in bus/pci probing
866 * @param[in] devx_bdf
867 * Pointer to the devx_device_bdf structure.
869 * Pointer to the rte_pci_addr structure.
872 * 1 on Device match, 0 on mismatch.
875 mlx5_match_devx_bdf_to_addr(struct devx_device_bdf *devx_bdf,
876 struct rte_pci_addr *addr)
878 if (addr->domain != (devx_bdf->bus_id >> 8) ||
879 addr->bus != (devx_bdf->bus_id & 0xff) ||
880 addr->devid != devx_bdf->dev_id ||
881 addr->function != devx_bdf->fnc_id) {
888 * Detect if a devx_device_bdf object matches the rte_pci_addr
889 * found in bus/pci probing
890 * Compare both the Native/PF BDF and the raw_bdf representing a VF BDF.
892 * @param[in] devx_bdf
893 * Pointer to the devx_device_bdf structure.
895 * Pointer to the rte_pci_addr structure.
898 * 1 on Device match, 0 on mismatch, rte_errno code on failure.
901 mlx5_match_devx_devices_to_addr(struct devx_device_bdf *devx_bdf,
902 struct rte_pci_addr *addr)
905 struct devx_device mlx5_dev;
907 if (mlx5_match_devx_bdf_to_addr(devx_bdf, addr))
910 * Didn't match on Native/PF BDF, could still
911 * Match a VF BDF, check it next
913 err = mlx5_glue->query_device(devx_bdf, &mlx5_dev);
915 DRV_LOG(ERR, "query_device failed");
919 if (mlx5_match_devx_bdf_to_addr(&mlx5_dev.raw_bdf, addr))
925 * DPDK callback to register a PCI device.
927 * This function spawns Ethernet devices out of a given PCI device.
930 * PCI driver structure (mlx5_driver).
932 * PCI device information.
935 * 0 on success, a negative errno value otherwise and rte_errno is set.
938 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
939 struct rte_pci_device *pci_dev)
941 struct devx_device_bdf *devx_bdf_devs, *orig_devx_bdf_devs;
943 * Number of found IB Devices matching with requested PCI BDF.
944 * nd != 1 means there are multiple IB devices over the same
945 * PCI device and we have representors and master.
949 * Number of found IB device Ports. nd = 1 and np = 1..n means
950 * we have the single multiport IB device, and there may be
951 * representors attached to some of found ports.
952 * Currently not supported.
953 * unsigned int np = 0;
957 * Number of DPDK ethernet devices to Spawn - either over
958 * multiple IB devices or multiple ports of single IB device.
959 * Actually this is the number of iterations to spawn.
964 * < 0 - no bonding device (single one)
965 * >= 0 - bonding device (value is slave PF index)
968 struct mlx5_dev_spawn_data *list = NULL;
969 struct mlx5_dev_config dev_config;
970 unsigned int dev_config_vf;
974 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
975 DRV_LOG(ERR, "Secondary process is not supported on Windows.");
978 ret = mlx5_init_once();
980 DRV_LOG(ERR, "unable to init PMD global data: %s",
981 strerror(rte_errno));
985 devx_bdf_devs = mlx5_glue->get_device_list(&ret);
986 orig_devx_bdf_devs = devx_bdf_devs;
987 if (!devx_bdf_devs) {
988 rte_errno = errno ? errno : ENOSYS;
989 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
993 * First scan the list of all Infiniband devices to find
994 * matching ones, gathering into the list.
996 struct devx_device_bdf *devx_bdf_match[ret + 1];
999 err = mlx5_match_devx_devices_to_addr(devx_bdf_devs,
1009 devx_bdf_match[nd++] = devx_bdf_devs;
1011 devx_bdf_match[nd] = NULL;
1013 /* No device matches, just complain and bail out. */
1015 "no DevX device matches PCI device " PCI_PRI_FMT ","
1016 " is DevX Configured?",
1017 pci_dev->addr.domain, pci_dev->addr.bus,
1018 pci_dev->addr.devid, pci_dev->addr.function);
1024 * Now we can determine the maximal
1025 * amount of devices to be spawned.
1027 list = mlx5_malloc(MLX5_MEM_ZERO,
1028 sizeof(struct mlx5_dev_spawn_data),
1029 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1031 DRV_LOG(ERR, "spawn data array allocation failure");
1036 memset(&list[ns].info, 0, sizeof(list[ns].info));
1037 list[ns].max_port = 1;
1038 list[ns].phys_port = 1;
1039 list[ns].phys_dev = devx_bdf_match[ns];
1040 list[ns].eth_dev = NULL;
1041 list[ns].pci_dev = pci_dev;
1042 list[ns].pf_bond = bd;
1043 list[ns].ifindex = -1; /* Spawn will assign */
1045 (struct mlx5_switch_info){
1048 .name_type = MLX5_PHYS_PORT_NAME_TYPE_UPLINK,
1052 /* Device specific configuration. */
1053 switch (pci_dev->id.device_id) {
1054 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1055 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1056 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1057 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1058 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1059 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1060 case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
1067 /* Default configuration. */
1068 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
1069 dev_config.vf = dev_config_vf;
1071 dev_config.dbnc = MLX5_ARG_UNSET;
1072 dev_config.rx_vec_en = 1;
1073 dev_config.txq_inline_max = MLX5_ARG_UNSET;
1074 dev_config.txq_inline_min = MLX5_ARG_UNSET;
1075 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
1076 dev_config.txqs_inline = MLX5_ARG_UNSET;
1077 dev_config.vf_nl_en = 0;
1078 dev_config.mr_ext_memseg_en = 1;
1079 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1080 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1081 dev_config.dv_esw_en = 0;
1082 dev_config.dv_flow_en = 1;
1083 dev_config.decap_en = 0;
1084 dev_config.log_hp_size = MLX5_ARG_UNSET;
1085 list[ns].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1088 if (!list[ns].eth_dev)
1090 restore = list[ns].eth_dev->data->dev_flags;
1091 rte_eth_copy_pci_info(list[ns].eth_dev, pci_dev);
1092 /* Restore non-PCI flags cleared by the above call. */
1093 list[ns].eth_dev->data->dev_flags |= restore;
1094 rte_eth_dev_probing_finish(list[ns].eth_dev);
1098 * Do the routine cleanup:
1099 * - free allocated spawn data array
1100 * - free the device list
1104 MLX5_ASSERT(orig_devx_bdf_devs);
1105 mlx5_glue->free_device_list(orig_devx_bdf_devs);
1110 * Set the reg_mr and dereg_mr call backs
1112 * @param reg_mr_cb[out]
1113 * Pointer to reg_mr func
1114 * @param dereg_mr_cb[out]
1115 * Pointer to dereg_mr func
1119 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
1120 mlx5_dereg_mr_t *dereg_mr_cb)
1122 *reg_mr_cb = mlx5_os_reg_mr;
1123 *dereg_mr_cb = mlx5_os_dereg_mr;
1127 * Extract pdn of PD object using DevX
1130 * Pointer to the DevX PD object.
1132 * Pointer to the PD object number variable.
1135 * 0 on success, error value otherwise.
1138 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1143 *pdn = ((struct mlx5_pd *)pd)->pdn;
1147 const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};