1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
11 #include <rte_windows.h>
12 #include <ethdev_pci.h>
14 #include <mlx5_glue.h>
15 #include <mlx5_devx_cmds.h>
16 #include <mlx5_common.h>
17 #include <mlx5_common_mp.h>
18 #include <mlx5_common_mr.h>
19 #include <mlx5_malloc.h>
21 #include "mlx5_defs.h"
23 #include "mlx5_common_os.h"
24 #include "mlx5_utils.h"
25 #include "mlx5_rxtx.h"
28 #include "mlx5_autoconf.h"
30 #include "mlx5_flow.h"
31 #include "mlx5_devx.h"
33 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
35 /* Spinlock for mlx5_shared_data allocation. */
36 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
39 * Initialize shared data between primary and secondary process.
41 * A memzone is reserved by primary process and secondary processes attach to
45 * 0 on success, a negative errno value otherwise and rte_errno is set.
48 mlx5_init_shared_data(void)
50 const struct rte_memzone *mz;
53 rte_spinlock_lock(&mlx5_shared_data_lock);
54 if (mlx5_shared_data == NULL) {
55 /* Allocate shared memory. */
56 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
57 sizeof(*mlx5_shared_data),
61 "Cannot allocate mlx5 shared data");
65 mlx5_shared_data = mz->addr;
66 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
67 rte_spinlock_init(&mlx5_shared_data->lock);
70 rte_spinlock_unlock(&mlx5_shared_data_lock);
75 * PMD global initialization.
77 * Independent from individual device, this function initializes global
78 * per-PMD data structures distinguishing primary and secondary processes.
79 * Hence, each initialization is called once per a process.
82 * 0 on success, a negative errno value otherwise and rte_errno is set.
87 if (mlx5_init_shared_data())
93 * Get mlx5 device attributes.
96 * Pointer to device context.
99 * Pointer to mlx5 device attributes.
102 * 0 on success, non zero error number otherwise
105 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
107 struct mlx5_context *mlx5_ctx;
108 struct mlx5_hca_attr hca_attr;
109 void *pv_iseg = NULL;
115 mlx5_ctx = (struct mlx5_context *)ctx;
116 memset(device_attr, 0, sizeof(*device_attr));
117 err = mlx5_devx_cmd_query_hca_attr(mlx5_ctx, &hca_attr);
119 DRV_LOG(ERR, "Failed to get device hca_cap");
122 device_attr->max_cq = 1 << hca_attr.log_max_cq;
123 device_attr->max_qp = 1 << hca_attr.log_max_qp;
124 device_attr->max_qp_wr = 1 << hca_attr.log_max_qp_sz;
125 device_attr->max_cqe = 1 << hca_attr.log_max_cq_sz;
126 device_attr->max_mr = 1 << hca_attr.log_max_mrw_sz;
127 device_attr->max_pd = 1 << hca_attr.log_max_pd;
128 device_attr->max_srq = 1 << hca_attr.log_max_srq;
129 device_attr->max_srq_wr = 1 << hca_attr.log_max_srq_sz;
130 if (hca_attr.rss_ind_tbl_cap) {
131 device_attr->max_rwq_indirection_table_size =
132 1 << hca_attr.rss_ind_tbl_cap;
134 pv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg);
135 if (pv_iseg == NULL) {
136 DRV_LOG(ERR, "Failed to get device hca_iseg");
140 snprintf(device_attr->fw_ver, 64, "%x.%x.%04x",
141 MLX5_GET(initial_seg, pv_iseg, fw_rev_major),
142 MLX5_GET(initial_seg, pv_iseg, fw_rev_minor),
143 MLX5_GET(initial_seg, pv_iseg, fw_rev_subminor));
149 * Initialize DR related data within private structure.
150 * Routine checks the reference counter and does actual
151 * resources creation/initialization only if counter is zero.
154 * Pointer to the private device data structure.
157 * Zero on success, positive error code otherwise.
160 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
162 struct mlx5_dev_ctx_shared *sh = priv->sh;
166 err = mlx5_alloc_table_hash_list(priv);
168 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse",
169 (void *)sh->flow_tbls);
173 * Destroy DR related data within private structure.
176 * Pointer to the private device data structure.
179 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
181 mlx5_free_table_hash_list(priv);
185 * Set the completion channel file descriptor interrupt as non-blocking.
186 * Currently it has no support under Windows.
189 * Pointer to RQ channel object, which includes the channel fd
192 * The file descriptor (representing the intetrrupt) used in this channel.
195 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
198 mlx5_os_set_nonblock_channel_fd(int fd)
201 DRV_LOG(WARNING, "%s: is not supported", __func__);
206 * Function API open device under Windows
208 * This function calls the Windows glue APIs to open a device.
211 * Pointer to the device attributes (name, port, etc).
213 * Pointer to device configuration structure.
215 * Pointer to shared context structure.
218 * 0 on success, a positive error value otherwise.
221 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
222 const struct mlx5_dev_config *config,
223 struct mlx5_dev_ctx_shared *sh)
225 RTE_SET_USED(config);
227 struct mlx5_context *mlx5_ctx;
229 pthread_mutex_init(&sh->txpp.mutex, NULL);
230 /* Set numa node from pci probe */
231 sh->numa_node = spawn->pci_dev->device.numa_node;
233 /* Try to open device with DevX */
235 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
237 DRV_LOG(ERR, "open_device failed");
242 mlx5_ctx = (struct mlx5_context *)sh->ctx;
243 err = mlx5_glue->query_device(spawn->phys_dev, &mlx5_ctx->mlx5_dev);
245 DRV_LOG(ERR, "Failed to query device context fields.");
250 * DV flow counter mode detect and config.
253 * Pointer to rte_eth_dev structure.
257 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
259 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
260 struct mlx5_priv *priv = dev->data->dev_private;
261 struct mlx5_dev_ctx_shared *sh = priv->sh;
264 #ifndef HAVE_IBV_DEVX_ASYNC
268 if (!priv->config.devx || !priv->config.dv_flow_en ||
269 !priv->config.hca_attr.flow_counters_dump ||
270 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
271 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
275 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
276 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
277 priv->config.hca_attr.flow_counters_dump,
278 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
279 /* Initialize fallback mode only on the port initializes sh. */
281 sh->cmng.counter_fallback = fallback;
282 else if (fallback != sh->cmng.counter_fallback)
283 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
284 "with others:%d.", PORT_ID(priv), fallback);
289 * Spawn an Ethernet device from Verbs information.
292 * Backing DPDK device.
294 * Verbs device parameters (name, port, switch_info) to spawn.
296 * Device configuration parameters.
299 * A valid Ethernet device object on success, NULL otherwise and rte_errno
300 * is set. The following errors are defined:
302 * EEXIST: device is already spawned
304 static struct rte_eth_dev *
305 mlx5_dev_spawn(struct rte_device *dpdk_dev,
306 struct mlx5_dev_spawn_data *spawn,
307 struct mlx5_dev_config *config)
309 const struct mlx5_switch_info *switch_info = &spawn->info;
310 struct mlx5_dev_ctx_shared *sh = NULL;
311 struct mlx5_dev_attr device_attr;
312 struct rte_eth_dev *eth_dev = NULL;
313 struct mlx5_priv *priv = NULL;
315 unsigned int cqe_comp;
316 struct rte_ether_addr mac;
317 char name[RTE_ETH_NAME_MAX_LEN];
318 int own_domain_id = 0;
321 /* Build device name. */
322 strlcpy(name, dpdk_dev->name, sizeof(name));
323 /* check if the device is already spawned */
324 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
328 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
330 * Some parameters are needed in advance to create device context. We
331 * process the devargs here to get ones, and later process devargs
332 * again to override some hardware settings.
334 err = mlx5_args(config, dpdk_dev->devargs);
337 DRV_LOG(ERR, "failed to process device arguments: %s",
338 strerror(rte_errno));
341 mlx5_malloc_mem_select(config->sys_mem_en);
342 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
345 config->devx = sh->devx;
346 /* Initialize the shutdown event in mlx5_dev_spawn to
347 * support mlx5_is_removed for Windows.
349 err = mlx5_glue->devx_init_showdown_event(sh->ctx);
351 DRV_LOG(ERR, "failed to init showdown event: %s",
355 DRV_LOG(DEBUG, "MPW isn't supported");
356 mlx5_os_get_dev_attr(sh->ctx, &device_attr);
358 config->ind_table_max_size =
359 sh->device_attr.max_rwq_indirection_table_size;
361 config->cqe_comp = cqe_comp;
362 DRV_LOG(DEBUG, "tunnel offloading is not supported");
363 config->tunnel_en = 0;
364 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is no supported");
366 /* Allocate private eth device data. */
367 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
369 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
371 DRV_LOG(ERR, "priv allocation failure");
376 priv->dev_port = spawn->phys_port;
377 priv->pci_dev = spawn->pci_dev;
378 priv->mtu = RTE_ETHER_MTU;
379 priv->mp_id.port_id = port_id;
380 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
381 priv->representor = !!switch_info->representor;
382 priv->master = !!switch_info->master;
383 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
384 priv->vport_meta_tag = 0;
385 priv->vport_meta_mask = 0;
386 priv->pf_bond = spawn->pf_bond;
388 /* representor_id field keeps the unmodified VF index. */
389 priv->representor_id = -1;
391 * Look for sibling devices in order to reuse their switch domain
392 * if any, otherwise allocate one.
394 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
395 const struct mlx5_priv *opriv =
396 rte_eth_devices[port_id].data->dev_private;
399 opriv->sh != priv->sh ||
401 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
403 priv->domain_id = opriv->domain_id;
406 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
407 err = rte_eth_switch_domain_alloc(&priv->domain_id);
410 DRV_LOG(ERR, "unable to allocate switch domain: %s",
411 strerror(rte_errno));
416 /* Override some values set by hardware configuration. */
417 mlx5_args(config, dpdk_dev->devargs);
418 err = mlx5_dev_check_sibling_config(priv, config);
421 DRV_LOG(DEBUG, "counters are not supported");
422 config->ind_table_max_size =
423 sh->device_attr.max_rwq_indirection_table_size;
425 * Remove this check once DPDK supports larger/variable
426 * indirection tables.
428 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
429 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
430 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
431 config->ind_table_max_size);
432 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
433 (config->hw_vlan_strip ? "" : "not "));
434 if (config->hw_padding) {
435 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
436 config->hw_padding = 0;
439 config->tso_max_payload_sz = sh->device_attr.max_tso;
440 DRV_LOG(DEBUG, "%sMPS is %s.",
441 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
442 config->mps == MLX5_MPW ? "legacy " : "",
443 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
444 if (config->cqe_comp && !cqe_comp) {
445 DRV_LOG(WARNING, "Rx CQE compression isn't supported.");
446 config->cqe_comp = 0;
449 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
454 /* Check relax ordering support. */
455 sh->cmng.relaxed_ordering_read = 0;
456 sh->cmng.relaxed_ordering_write = 0;
457 if (!haswell_broadwell_cpu) {
458 sh->cmng.relaxed_ordering_write =
459 config->hca_attr.relaxed_ordering_write;
460 sh->cmng.relaxed_ordering_read =
461 config->hca_attr.relaxed_ordering_read;
463 config->hw_csum = config->hca_attr.csum_cap;
464 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
465 (config->hw_csum ? "" : "not "));
468 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
470 err = config->hca_attr.access_register_user ?
471 mlx5_devx_cmd_register_read
472 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
473 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
477 /* MTUTC register is read successfully. */
478 ts_mode = MLX5_GET(register_mtutc, reg,
480 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
481 config->rt_timestamp = 1;
483 /* Kernel does not support register reading. */
484 if (config->hca_attr.dev_freq_khz ==
485 (NS_PER_S / MS_PER_S))
486 config->rt_timestamp = 1;
488 sh->rq_ts_format = config->hca_attr.rq_ts_format;
489 sh->sq_ts_format = config->hca_attr.sq_ts_format;
490 sh->qp_ts_format = config->hca_attr.qp_ts_format;
492 if (config->mprq.enabled) {
493 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
494 config->mprq.enabled = 0;
496 if (config->max_dump_files_num == 0)
497 config->max_dump_files_num = 128;
498 eth_dev = rte_eth_dev_allocate(name);
499 if (eth_dev == NULL) {
500 DRV_LOG(ERR, "can not allocate rte ethdev");
504 if (priv->representor) {
505 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
506 eth_dev->data->representor_id = priv->representor_id;
509 * Store associated network device interface index. This index
510 * is permanent throughout the lifetime of device. So, we may store
511 * the ifindex here and use the cached value further.
513 MLX5_ASSERT(spawn->ifindex);
514 priv->if_index = spawn->ifindex;
515 eth_dev->data->dev_private = priv;
516 priv->dev_data = eth_dev->data;
517 eth_dev->data->mac_addrs = priv->mac;
518 eth_dev->device = dpdk_dev;
519 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
520 /* Configure the first MAC address by default. */
521 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
523 "port %u cannot get MAC address, is mlx5_en"
524 " loaded? (errno: %s).",
525 eth_dev->data->port_id, strerror(rte_errno));
530 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
531 eth_dev->data->port_id,
532 mac.addr_bytes[0], mac.addr_bytes[1],
533 mac.addr_bytes[2], mac.addr_bytes[3],
534 mac.addr_bytes[4], mac.addr_bytes[5]);
535 #ifdef RTE_LIBRTE_MLX5_DEBUG
537 char ifname[MLX5_NAMESIZE];
539 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
540 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
541 eth_dev->data->port_id, ifname);
543 DRV_LOG(DEBUG, "port %u ifname is unknown.",
544 eth_dev->data->port_id);
547 /* Get actual MTU if possible. */
548 err = mlx5_get_mtu(eth_dev, &priv->mtu);
553 DRV_LOG(DEBUG, "port %u MTU is %u.", eth_dev->data->port_id,
555 /* Initialize burst functions to prevent crashes before link-up. */
556 eth_dev->rx_pkt_burst = removed_rx_burst;
557 eth_dev->tx_pkt_burst = removed_tx_burst;
558 eth_dev->dev_ops = &mlx5_dev_ops;
559 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
560 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
561 eth_dev->rx_queue_count = mlx5_rx_queue_count;
562 /* Register MAC address. */
563 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
564 priv->ctrl_flows = 0;
565 TAILQ_INIT(&priv->flow_meters);
566 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
567 if (!priv->mtr_profile_tbl)
569 /* Bring Ethernet device up. */
570 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up.",
571 eth_dev->data->port_id);
572 /* nl calls are unsupported - set to -1 not to fail on release */
573 priv->nl_socket_rdma = -1;
574 priv->nl_socket_route = -1;
575 mlx5_set_link_up(eth_dev);
577 * Even though the interrupt handler is not installed yet,
578 * interrupts will still trigger on the async_fd from
579 * Verbs context returned by ibv_open_device().
581 mlx5_link_update(eth_dev, 0);
582 config->dv_esw_en = 0;
583 /* Detect minimal data bytes to inline. */
584 mlx5_set_min_inline(spawn, config);
585 /* Store device configuration on private structure. */
586 priv->config = *config;
587 /* Create context for virtual machine VLAN workaround. */
588 priv->vmwa_context = NULL;
589 if (config->dv_flow_en) {
590 err = mlx5_alloc_shared_dr(priv);
594 /* No supported flow priority number detection. */
595 priv->config.flow_prio = -1;
596 if (!priv->config.dv_esw_en &&
597 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
598 DRV_LOG(WARNING, "metadata mode %u is not supported "
599 "(no E-Switch)", priv->config.dv_xmeta_en);
600 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
602 mlx5_set_metadata_mask(eth_dev);
603 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
604 !priv->sh->dv_regc0_mask) {
605 DRV_LOG(ERR, "metadata mode %u is not supported "
606 "(no metadata reg_c[0] is available).",
607 priv->config.dv_xmeta_en);
611 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
612 mlx5_hrxq_create_cb, mlx5_hrxq_match_cb,
613 mlx5_hrxq_remove_cb, mlx5_hrxq_clone_cb,
614 mlx5_hrxq_clone_free_cb);
615 /* Query availability of metadata reg_c's. */
616 err = mlx5_flow_discover_mreg_c(eth_dev);
621 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
623 "port %u extensive metadata register is not supported.",
624 eth_dev->data->port_id);
625 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
626 DRV_LOG(ERR, "metadata mode %u is not supported "
627 "(no metadata registers available).",
628 priv->config.dv_xmeta_en);
633 if (config->devx && config->dv_flow_en) {
634 priv->obj_ops = devx_obj_ops;
636 DRV_LOG(ERR, "Flow mode %u is not supported "
637 "(Windows flow must be DevX with DV flow enabled).",
638 priv->config.dv_flow_en);
642 mlx5_flow_counter_mode_config(eth_dev);
646 if (priv->mtr_profile_tbl)
647 mlx5_l3t_destroy(priv->mtr_profile_tbl);
649 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
652 eth_dev->data->dev_private = NULL;
654 if (eth_dev != NULL) {
655 /* mac_addrs must not be freed alone because part of
658 eth_dev->data->mac_addrs = NULL;
659 rte_eth_dev_release_port(eth_dev);
662 mlx5_free_shared_dev_ctx(sh);
663 MLX5_ASSERT(err > 0);
669 * This function should share events between multiple ports of single IB
670 * device. Currently it has no support under Windows.
673 * Pointer to mlx5_dev_ctx_shared object.
676 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
679 DRV_LOG(WARNING, "%s: is not supported", __func__);
683 * This function should share events between multiple ports of single IB
684 * device. Currently it has no support under Windows.
687 * Pointer to mlx5_dev_ctx_shared object.
690 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
693 DRV_LOG(WARNING, "%s: is not supported", __func__);
697 * Read statistics by a named counter.
700 * Pointer to the private device data structure.
701 * @param[in] ctr_name
702 * Pointer to the name of the statistic counter to read
704 * Pointer to read statistic value.
706 * 0 on success and stat is valud, 1 if failed to read the value
711 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
715 RTE_SET_USED(ctr_name);
717 DRV_LOG(WARNING, "%s: is not supported", __func__);
722 * Flush device MAC addresses
723 * Currently it has no support under Windows.
726 * Pointer to Ethernet device structure.
730 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
733 DRV_LOG(WARNING, "%s: is not supported", __func__);
737 * Remove a MAC address from device
738 * Currently it has no support under Windows.
741 * Pointer to Ethernet device structure.
746 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
750 DRV_LOG(WARNING, "%s: is not supported", __func__);
754 * Adds a MAC address to the device
755 * Currently it has no support under Windows.
758 * Pointer to Ethernet device structure.
760 * MAC address to register.
765 * 0 on success, a negative errno value otherwise
768 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
772 struct rte_ether_addr lmac;
774 if (mlx5_get_mac(dev, &lmac.addr_bytes)) {
776 "port %u cannot get MAC address, is mlx5_en"
777 " loaded? (errno: %s)",
778 dev->data->port_id, strerror(rte_errno));
781 if (!rte_is_same_ether_addr(&lmac, mac)) {
783 "adding new mac address to device is unsupported");
790 * Modify a VF MAC address
791 * Currently it has no support under Windows.
794 * Pointer to device private data.
796 * MAC address to modify into.
798 * Net device interface index
803 * 0 on success, a negative errno value otherwise
806 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
807 unsigned int iface_idx,
808 struct rte_ether_addr *mac_addr,
815 DRV_LOG(WARNING, "%s: is not supported", __func__);
820 * Set device promiscuous mode
821 * Currently it has no support under Windows.
824 * Pointer to Ethernet device structure.
826 * 0 - promiscuous is disabled, otherwise - enabled
829 * 0 on success, a negative error value otherwise
832 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
836 DRV_LOG(WARNING, "%s: is not supported", __func__);
841 * Set device allmulti mode
844 * Pointer to Ethernet device structure.
846 * 0 - all multicase is disabled, otherwise - enabled
849 * 0 on success, a negative error value otherwise
852 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
856 DRV_LOG(WARNING, "%s: is not supported", __func__);
861 * Detect if a devx_device_bdf object has identical DBDF values to the
862 * rte_pci_addr found in bus/pci probing
864 * @param[in] devx_bdf
865 * Pointer to the devx_device_bdf structure.
867 * Pointer to the rte_pci_addr structure.
870 * 1 on Device match, 0 on mismatch.
873 mlx5_match_devx_bdf_to_addr(struct devx_device_bdf *devx_bdf,
874 struct rte_pci_addr *addr)
876 if (addr->domain != (devx_bdf->bus_id >> 8) ||
877 addr->bus != (devx_bdf->bus_id & 0xff) ||
878 addr->devid != devx_bdf->dev_id ||
879 addr->function != devx_bdf->fnc_id) {
886 * Detect if a devx_device_bdf object matches the rte_pci_addr
887 * found in bus/pci probing
888 * Compare both the Native/PF BDF and the raw_bdf representing a VF BDF.
890 * @param[in] devx_bdf
891 * Pointer to the devx_device_bdf structure.
893 * Pointer to the rte_pci_addr structure.
896 * 1 on Device match, 0 on mismatch, rte_errno code on failure.
899 mlx5_match_devx_devices_to_addr(struct devx_device_bdf *devx_bdf,
900 struct rte_pci_addr *addr)
903 struct devx_device mlx5_dev;
905 if (mlx5_match_devx_bdf_to_addr(devx_bdf, addr))
908 * Didn't match on Native/PF BDF, could still
909 * Match a VF BDF, check it next
911 err = mlx5_glue->query_device(devx_bdf, &mlx5_dev);
913 DRV_LOG(ERR, "query_device failed");
917 if (mlx5_match_devx_bdf_to_addr(&mlx5_dev.raw_bdf, addr))
923 * DPDK callback to register a PCI device.
925 * This function spawns Ethernet devices out of a given PCI device.
928 * PCI driver structure (mlx5_driver).
930 * PCI device information.
933 * 0 on success, a negative errno value otherwise and rte_errno is set.
936 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
937 struct rte_pci_device *pci_dev)
939 struct devx_device_bdf *devx_bdf_devs, *orig_devx_bdf_devs;
941 * Number of found IB Devices matching with requested PCI BDF.
942 * nd != 1 means there are multiple IB devices over the same
943 * PCI device and we have representors and master.
947 * Number of found IB device Ports. nd = 1 and np = 1..n means
948 * we have the single multiport IB device, and there may be
949 * representors attached to some of found ports.
950 * Currently not supported.
951 * unsigned int np = 0;
955 * Number of DPDK ethernet devices to Spawn - either over
956 * multiple IB devices or multiple ports of single IB device.
957 * Actually this is the number of iterations to spawn.
962 * < 0 - no bonding device (single one)
963 * >= 0 - bonding device (value is slave PF index)
966 struct mlx5_dev_spawn_data *list = NULL;
967 struct mlx5_dev_config dev_config;
968 unsigned int dev_config_vf;
972 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
973 DRV_LOG(ERR, "Secondary process is not supported on Windows.");
976 ret = mlx5_init_once();
978 DRV_LOG(ERR, "unable to init PMD global data: %s",
979 strerror(rte_errno));
983 devx_bdf_devs = mlx5_glue->get_device_list(&ret);
984 orig_devx_bdf_devs = devx_bdf_devs;
985 if (!devx_bdf_devs) {
986 rte_errno = errno ? errno : ENOSYS;
987 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
991 * First scan the list of all Infiniband devices to find
992 * matching ones, gathering into the list.
994 struct devx_device_bdf *devx_bdf_match[ret + 1];
997 err = mlx5_match_devx_devices_to_addr(devx_bdf_devs,
1007 devx_bdf_match[nd++] = devx_bdf_devs;
1009 devx_bdf_match[nd] = NULL;
1011 /* No device matches, just complain and bail out. */
1013 "no DevX device matches PCI device " PCI_PRI_FMT ","
1014 " is DevX Configured?",
1015 pci_dev->addr.domain, pci_dev->addr.bus,
1016 pci_dev->addr.devid, pci_dev->addr.function);
1022 * Now we can determine the maximal
1023 * amount of devices to be spawned.
1025 list = mlx5_malloc(MLX5_MEM_ZERO,
1026 sizeof(struct mlx5_dev_spawn_data),
1027 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1029 DRV_LOG(ERR, "spawn data array allocation failure");
1034 memset(&list[ns].info, 0, sizeof(list[ns].info));
1035 list[ns].max_port = 1;
1036 list[ns].phys_port = 1;
1037 list[ns].phys_dev = devx_bdf_match[ns];
1038 list[ns].eth_dev = NULL;
1039 list[ns].pci_dev = pci_dev;
1040 list[ns].pf_bond = bd;
1041 list[ns].ifindex = -1; /* Spawn will assign */
1043 (struct mlx5_switch_info){
1046 .name_type = MLX5_PHYS_PORT_NAME_TYPE_UPLINK,
1050 /* Device specific configuration. */
1051 switch (pci_dev->id.device_id) {
1052 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1053 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1054 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1055 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1056 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1057 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1058 case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
1065 /* Default configuration. */
1066 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
1067 dev_config.vf = dev_config_vf;
1069 dev_config.dbnc = MLX5_ARG_UNSET;
1070 dev_config.rx_vec_en = 1;
1071 dev_config.txq_inline_max = MLX5_ARG_UNSET;
1072 dev_config.txq_inline_min = MLX5_ARG_UNSET;
1073 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
1074 dev_config.txqs_inline = MLX5_ARG_UNSET;
1075 dev_config.vf_nl_en = 0;
1076 dev_config.mr_ext_memseg_en = 1;
1077 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1078 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1079 dev_config.dv_esw_en = 0;
1080 dev_config.dv_flow_en = 1;
1081 dev_config.decap_en = 0;
1082 dev_config.log_hp_size = MLX5_ARG_UNSET;
1083 list[ns].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1086 if (!list[ns].eth_dev)
1088 restore = list[ns].eth_dev->data->dev_flags;
1089 rte_eth_copy_pci_info(list[ns].eth_dev, pci_dev);
1090 /* Restore non-PCI flags cleared by the above call. */
1091 list[ns].eth_dev->data->dev_flags |= restore;
1092 rte_eth_dev_probing_finish(list[ns].eth_dev);
1096 * Do the routine cleanup:
1097 * - free allocated spawn data array
1098 * - free the device list
1102 MLX5_ASSERT(orig_devx_bdf_devs);
1103 mlx5_glue->free_device_list(orig_devx_bdf_devs);
1108 * Set the reg_mr and dereg_mr call backs
1110 * @param reg_mr_cb[out]
1111 * Pointer to reg_mr func
1112 * @param dereg_mr_cb[out]
1113 * Pointer to dereg_mr func
1117 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
1118 mlx5_dereg_mr_t *dereg_mr_cb)
1120 *reg_mr_cb = mlx5_os_reg_mr;
1121 *dereg_mr_cb = mlx5_os_dereg_mr;
1125 * Extract pdn of PD object using DevX
1128 * Pointer to the DevX PD object.
1130 * Pointer to the PD object number variable.
1133 * 0 on success, error value otherwise.
1136 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1141 *pdn = ((struct mlx5_pd *)pd)->pdn;
1145 const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};