drivers/net/mvpp2/mrvl_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017-2021 Marvell International Ltd.
   3  * Copyright(c) 2017-2021 Semihalf.
   4  * All rights reserved.
   5  */
   6
   7 #include <rte_string_fns.h>
   8 #include <ethdev_driver.h>
   9 #include <rte_kvargs.h>
  10 #include <rte_log.h>
  11 #include <rte_malloc.h>
  12 #include <rte_bus_vdev.h>
  13
  14 #include <fcntl.h>
  15 #include <linux/ethtool.h>
  16 #include <linux/sockios.h>
  17 #include <net/if.h>
  18 #include <net/if_arp.h>
  19 #include <sys/ioctl.h>
  20 #include <sys/socket.h>
  21 #include <sys/stat.h>
  22 #include <sys/types.h>
  23
  24 #include <rte_mvep_common.h>
  25 #include "mrvl_ethdev.h"
  26 #include "mrvl_qos.h"
  27 #include "mrvl_flow.h"
  28 #include "mrvl_mtr.h"
  29 #include "mrvl_tm.h"
  30
  31 /* bitmask with reserved hifs */
  32 #define MRVL_MUSDK_HIFS_RESERVED 0x0F
  33 /* bitmask with reserved bpools */
  34 #define MRVL_MUSDK_BPOOLS_RESERVED 0x07
  35 /* bitmask with reserved kernel RSS tables */
  36 #define MRVL_MUSDK_RSS_RESERVED 0x0F
  37 /* maximum number of available hifs */
  38 #define MRVL_MUSDK_HIFS_MAX 9
  39
  40 /* prefetch shift */
  41 #define MRVL_MUSDK_PREFETCH_SHIFT 2
  42
  43 /* TCAM has 25 entries reserved for uc/mc filter entries */
  44 #define MRVL_MAC_ADDRS_MAX 25
  45 #define MRVL_MATCH_LEN 16
  46 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE)
  47 /* Maximum allowable packet size */
  48 #define MRVL_PKT_SIZE_MAX (10240 - MV_MH_SIZE)
  49
  50 #define MRVL_IFACE_NAME_ARG "iface"
  51 #define MRVL_CFG_ARG "cfg"
  52
  53 #define MRVL_BURST_SIZE 64
  54
  55 #define MRVL_ARP_LENGTH 28
  56
  57 #define MRVL_COOKIE_ADDR_INVALID ~0ULL
  58 #define MRVL_COOKIE_HIGH_ADDR_MASK 0xffffff0000000000
  59
  60 /** Port Rx offload capabilities */
  61 #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
  62                           DEV_RX_OFFLOAD_JUMBO_FRAME | \
  63                           DEV_RX_OFFLOAD_CHECKSUM)
  64
  65 /** Port Tx offloads capabilities */
  66 #define MRVL_TX_OFFLOAD_CHECKSUM (DEV_TX_OFFLOAD_IPV4_CKSUM | \
  67                                   DEV_TX_OFFLOAD_UDP_CKSUM  | \
  68                                   DEV_TX_OFFLOAD_TCP_CKSUM)
  69 #define MRVL_TX_OFFLOADS (MRVL_TX_OFFLOAD_CHECKSUM | \
  70                           DEV_TX_OFFLOAD_MULTI_SEGS)
  71
  72 #define MRVL_TX_PKT_OFFLOADS (PKT_TX_IP_CKSUM | \
  73                               PKT_TX_TCP_CKSUM | \
  74                               PKT_TX_UDP_CKSUM)
  75
  76 static const char * const valid_args[] = {
  77         MRVL_IFACE_NAME_ARG,
  78         MRVL_CFG_ARG,
  79         NULL
  80 };
  81
  82 static int used_hifs = MRVL_MUSDK_HIFS_RESERVED;
  83 static struct pp2_hif *hifs[RTE_MAX_LCORE];
  84 static int used_bpools[PP2_NUM_PKT_PROC] = {
  85         [0 ... PP2_NUM_PKT_PROC - 1] = MRVL_MUSDK_BPOOLS_RESERVED
  86 };
  87
  88 static struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
  89 static int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
  90 static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
  91
  92 struct mrvl_ifnames {
  93         const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];
  94         int idx;
  95 };
  96
  97 /*
  98  * To use buffer harvesting based on loopback port shadow queue structure
  99  * was introduced for buffers information bookkeeping.
 100  *
 101  * Before sending the packet, related buffer information (pp2_buff_inf) is
 102  * stored in shadow queue. After packet is transmitted no longer used
 103  * packet buffer is released back to it's original hardware pool,
 104  * on condition it originated from interface.
 105  * In case it  was generated by application itself i.e: mbuf->port field is
 106  * 0xff then its released to software mempool.
 107  */
 108 struct mrvl_shadow_txq {
 109         int head;           /* write index - used when sending buffers */
 110         int tail;           /* read index - used when releasing buffers */
 111         u16 size;           /* queue occupied size */
 112         u16 num_to_release; /* number of descriptors sent, that can be
 113                              * released
 114                              */
 115         struct buff_release_entry ent[MRVL_PP2_TX_SHADOWQ_SIZE]; /* q entries */
 116 };
 117
 118 struct mrvl_rxq {
 119         struct mrvl_priv *priv;
 120         struct rte_mempool *mp;
 121         int queue_id;
 122         int port_id;
 123         int cksum_enabled;
 124         uint64_t bytes_recv;
 125         uint64_t drop_mac;
 126 };
 127
 128 struct mrvl_txq {
 129         struct mrvl_priv *priv;
 130         int queue_id;
 131         int port_id;
 132         uint64_t bytes_sent;
 133         struct mrvl_shadow_txq shadow_txqs[RTE_MAX_LCORE];
 134         int tx_deferred_start;
 135 };
 136
 137 static int mrvl_lcore_first;
 138 static int mrvl_lcore_last;
 139 static int mrvl_dev_num;
 140
 141 static int mrvl_fill_bpool(struct mrvl_rxq *rxq, int num);
 142 static inline void mrvl_free_sent_buffers(struct pp2_ppio *ppio,
 143                         struct pp2_hif *hif, unsigned int core_id,
 144                         struct mrvl_shadow_txq *sq, int qid, int force);
 145
 146 static uint16_t mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 147                                   uint16_t nb_pkts);
 148 static uint16_t mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 149                                      uint16_t nb_pkts);
 150 static int rte_pmd_mrvl_remove(struct rte_vdev_device *vdev);
 151 static void mrvl_deinit_pp2(void);
 152 static void mrvl_deinit_hifs(void);
 153
 154 static int
 155 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
 156                   uint32_t index, uint32_t vmdq __rte_unused);
 157 static int
 158 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr);
 159 static int
 160 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);
 161 static int mrvl_promiscuous_enable(struct rte_eth_dev *dev);
 162 static int mrvl_allmulticast_enable(struct rte_eth_dev *dev);
 163
 164 #define MRVL_XSTATS_TBL_ENTRY(name) { \
 165         #name, offsetof(struct pp2_ppio_statistics, name),      \
 166         sizeof(((struct pp2_ppio_statistics *)0)->name)         \
 167 }
 168
 169 /* Table with xstats data */
 170 static struct {
 171         const char *name;
 172         unsigned int offset;
 173         unsigned int size;
 174 } mrvl_xstats_tbl[] = {
 175         MRVL_XSTATS_TBL_ENTRY(rx_bytes),
 176         MRVL_XSTATS_TBL_ENTRY(rx_packets),
 177         MRVL_XSTATS_TBL_ENTRY(rx_unicast_packets),
 178         MRVL_XSTATS_TBL_ENTRY(rx_errors),
 179         MRVL_XSTATS_TBL_ENTRY(rx_fullq_dropped),
 180         MRVL_XSTATS_TBL_ENTRY(rx_bm_dropped),
 181         MRVL_XSTATS_TBL_ENTRY(rx_early_dropped),
 182         MRVL_XSTATS_TBL_ENTRY(rx_fifo_dropped),
 183         MRVL_XSTATS_TBL_ENTRY(rx_cls_dropped),
 184         MRVL_XSTATS_TBL_ENTRY(tx_bytes),
 185         MRVL_XSTATS_TBL_ENTRY(tx_packets),
 186         MRVL_XSTATS_TBL_ENTRY(tx_unicast_packets),
 187         MRVL_XSTATS_TBL_ENTRY(tx_errors)
 188 };
 189
 190 static inline void
 191 mrvl_fill_shadowq(struct mrvl_shadow_txq *sq, struct rte_mbuf *buf)
 192 {
 193         sq->ent[sq->head].buff.cookie = (uint64_t)buf;
 194         sq->ent[sq->head].buff.addr = buf ?
 195                 rte_mbuf_data_iova_default(buf) : 0;
 196
 197         sq->ent[sq->head].bpool =
 198                 (unlikely(!buf || buf->port >= RTE_MAX_ETHPORTS ||
 199                  buf->refcnt > 1)) ? NULL :
 200                  mrvl_port_to_bpool_lookup[buf->port];
 201
 202         sq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;
 203         sq->size++;
 204 }
 205
 206 static inline void
 207 mrvl_fill_desc(struct pp2_ppio_desc *desc, struct rte_mbuf *buf)
 208 {
 209         pp2_ppio_outq_desc_reset(desc);
 210         pp2_ppio_outq_desc_set_phys_addr(desc, rte_pktmbuf_iova(buf));
 211         pp2_ppio_outq_desc_set_pkt_offset(desc, 0);
 212         pp2_ppio_outq_desc_set_pkt_len(desc, rte_pktmbuf_data_len(buf));
 213 }
 214
 215 static inline int
 216 mrvl_get_bpool_size(int pp2_id, int pool_id)
 217 {
 218         int i;
 219         int size = 0;
 220
 221         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++)
 222                 size += mrvl_port_bpool_size[pp2_id][pool_id][i];
 223
 224         return size;
 225 }
 226
 227 static inline int
 228 mrvl_reserve_bit(int *bitmap, int max)
 229 {
 230         int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
 231
 232         if (n >= max)
 233                 return -1;
 234
 235         *bitmap |= 1 << n;
 236
 237         return n;
 238 }
 239
 240 static int
 241 mrvl_init_hif(int core_id)
 242 {
 243         struct pp2_hif_params params;
 244         char match[MRVL_MATCH_LEN];
 245         int ret;
 246
 247         ret = mrvl_reserve_bit(&used_hifs, MRVL_MUSDK_HIFS_MAX);
 248         if (ret < 0) {
 249                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 250                 return ret;
 251         }
 252
 253         snprintf(match, sizeof(match), "hif-%d", ret);
 254         memset(&params, 0, sizeof(params));
 255         params.match = match;
 256         params.out_size = MRVL_PP2_AGGR_TXQD_MAX;
 257         ret = pp2_hif_init(&params, &hifs[core_id]);
 258         if (ret) {
 259                 MRVL_LOG(ERR, "Failed to initialize hif %d", core_id);
 260                 return ret;
 261         }
 262
 263         return 0;
 264 }
 265
 266 static inline struct pp2_hif*
 267 mrvl_get_hif(struct mrvl_priv *priv, int core_id)
 268 {
 269         int ret;
 270
 271         if (likely(hifs[core_id] != NULL))
 272                 return hifs[core_id];
 273
 274         rte_spinlock_lock(&priv->lock);
 275
 276         ret = mrvl_init_hif(core_id);
 277         if (ret < 0) {
 278                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 279                 goto out;
 280         }
 281
 282         if (core_id < mrvl_lcore_first)
 283                 mrvl_lcore_first = core_id;
 284
 285         if (core_id > mrvl_lcore_last)
 286                 mrvl_lcore_last = core_id;
 287 out:
 288         rte_spinlock_unlock(&priv->lock);
 289
 290         return hifs[core_id];
 291 }
 292
 293 /**
 294  * Set tx burst function according to offload flag
 295  *
 296  * @param dev
 297  *   Pointer to Ethernet device structure.
 298  */
 299 static void
 300 mrvl_set_tx_function(struct rte_eth_dev *dev)
 301 {
 302         struct mrvl_priv *priv = dev->data->dev_private;
 303
 304         /* Use a simple Tx queue (no offloads, no multi segs) if possible */
 305         if (priv->multiseg) {
 306                 RTE_LOG(INFO, PMD, "Using multi-segment tx callback\n");
 307                 dev->tx_pkt_burst = mrvl_tx_sg_pkt_burst;
 308         } else {
 309                 RTE_LOG(INFO, PMD, "Using single-segment tx callback\n");
 310                 dev->tx_pkt_burst = mrvl_tx_pkt_burst;
 311         }
 312 }
 313
 314 /**
 315  * Configure rss based on dpdk rss configuration.
 316  *
 317  * @param priv
 318  *   Pointer to private structure.
 319  * @param rss_conf
 320  *   Pointer to RSS configuration.
 321  *
 322  * @return
 323  *   0 on success, negative error value otherwise.
 324  */
 325 static int
 326 mrvl_configure_rss(struct mrvl_priv *priv, struct rte_eth_rss_conf *rss_conf)
 327 {
 328         if (rss_conf->rss_key)
 329                 MRVL_LOG(WARNING, "Changing hash key is not supported");
 330
 331         if (rss_conf->rss_hf == 0) {
 332                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 333         } else if (rss_conf->rss_hf & ETH_RSS_IPV4) {
 334                 priv->ppio_params.inqs_params.hash_type =
 335                         PP2_PPIO_HASH_T_2_TUPLE;
 336         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
 337                 priv->ppio_params.inqs_params.hash_type =
 338                         PP2_PPIO_HASH_T_5_TUPLE;
 339                 priv->rss_hf_tcp = 1;
 340         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
 341                 priv->ppio_params.inqs_params.hash_type =
 342                         PP2_PPIO_HASH_T_5_TUPLE;
 343                 priv->rss_hf_tcp = 0;
 344         } else {
 345                 return -EINVAL;
 346         }
 347
 348         return 0;
 349 }
 350
 351 /**
 352  * Ethernet device configuration.
 353  *
 354  * Prepare the driver for a given number of TX and RX queues and
 355  * configure RSS.
 356  *
 357  * @param dev
 358  *   Pointer to Ethernet device structure.
 359  *
 360  * @return
 361  *   0 on success, negative error value otherwise.
 362  */
 363 static int
 364 mrvl_dev_configure(struct rte_eth_dev *dev)
 365 {
 366         struct mrvl_priv *priv = dev->data->dev_private;
 367         int ret;
 368
 369         if (priv->ppio) {
 370                 MRVL_LOG(INFO, "Device reconfiguration is not supported");
 371                 return -EINVAL;
 372         }
 373
 374         if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE &&
 375             dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
 376                 MRVL_LOG(INFO, "Unsupported rx multi queue mode %d",
 377                         dev->data->dev_conf.rxmode.mq_mode);
 378                 return -EINVAL;
 379         }
 380
 381         if (dev->data->dev_conf.rxmode.split_hdr_size) {
 382                 MRVL_LOG(INFO, "Split headers not supported");
 383                 return -EINVAL;
 384         }
 385
 386         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
 387                 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
 388                                  MRVL_PP2_ETH_HDRS_LEN;
 389
 390         if (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
 391                 priv->multiseg = 1;
 392
 393         ret = mrvl_configure_rxqs(priv, dev->data->port_id,
 394                                   dev->data->nb_rx_queues);
 395         if (ret < 0)
 396                 return ret;
 397
 398         ret = mrvl_configure_txqs(priv, dev->data->port_id,
 399                                   dev->data->nb_tx_queues);
 400         if (ret < 0)
 401                 return ret;
 402
 403         priv->ppio_params.outqs_params.num_outqs = dev->data->nb_tx_queues;
 404         priv->ppio_params.maintain_stats = 1;
 405         priv->nb_rx_queues = dev->data->nb_rx_queues;
 406
 407         ret = mrvl_tm_init(dev);
 408         if (ret < 0)
 409                 return ret;
 410
 411         if (dev->data->nb_rx_queues == 1 &&
 412             dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 413                 MRVL_LOG(WARNING, "Disabling hash for 1 rx queue");
 414                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 415
 416                 return 0;
 417         }
 418
 419         return mrvl_configure_rss(priv,
 420                         &dev->data->dev_conf.rx_adv_conf.rss_conf);
 421 }
 422
 423 /**
 424  * DPDK callback to change the MTU.
 425  *
 426  * Setting the MTU affects hardware MRU (packets larger than the MRU
 427  * will be dropped).
 428  *
 429  * @param dev
 430  *   Pointer to Ethernet device structure.
 431  * @param mtu
 432  *   New MTU.
 433  *
 434  * @return
 435  *   0 on success, negative error value otherwise.
 436  */
 437 static int
 438 mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 439 {
 440         struct mrvl_priv *priv = dev->data->dev_private;
 441         uint16_t mru;
 442         uint16_t mbuf_data_size = 0; /* SW buffer size */
 443         int ret;
 444
 445         mru = MRVL_PP2_MTU_TO_MRU(mtu);
 446         /*
 447          * min_rx_buf_size is equal to mbuf data size
 448          * if pmd didn't set it differently
 449          */
 450         mbuf_data_size = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
 451         /* Prevent PMD from:
 452          * - setting mru greater than the mbuf size resulting in
 453          * hw and sw buffer size mismatch
 454          * - setting mtu that requires the support of scattered packets
 455          * when this feature has not been enabled/supported so far
 456          * (TODO check scattered_rx flag here once scattered RX is supported).
 457          */
 458         if (mru - RTE_ETHER_CRC_LEN + MRVL_PKT_OFFS > mbuf_data_size) {
 459                 mru = mbuf_data_size + RTE_ETHER_CRC_LEN - MRVL_PKT_OFFS;
 460                 mtu = MRVL_PP2_MRU_TO_MTU(mru);
 461                 MRVL_LOG(WARNING, "MTU too big, max MTU possible limitted "
 462                         "by current mbuf size: %u. Set MTU to %u, MRU to %u",
 463                         mbuf_data_size, mtu, mru);
 464         }
 465
 466         if (mtu < RTE_ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX) {
 467                 MRVL_LOG(ERR, "Invalid MTU [%u] or MRU [%u]", mtu, mru);
 468                 return -EINVAL;
 469         }
 470
 471         dev->data->mtu = mtu;
 472         dev->data->dev_conf.rxmode.max_rx_pkt_len = mru - MV_MH_SIZE;
 473
 474         if (!priv->ppio)
 475                 return 0;
 476
 477         ret = pp2_ppio_set_mru(priv->ppio, mru);
 478         if (ret) {
 479                 MRVL_LOG(ERR, "Failed to change MRU");
 480                 return ret;
 481         }
 482
 483         ret = pp2_ppio_set_mtu(priv->ppio, mtu);
 484         if (ret) {
 485                 MRVL_LOG(ERR, "Failed to change MTU");
 486                 return ret;
 487         }
 488
 489         return 0;
 490 }
 491
 492 /**
 493  * DPDK callback to bring the link up.
 494  *
 495  * @param dev
 496  *   Pointer to Ethernet device structure.
 497  *
 498  * @return
 499  *   0 on success, negative error value otherwise.
 500  */
 501 static int
 502 mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 503 {
 504         struct mrvl_priv *priv = dev->data->dev_private;
 505         int ret;
 506
 507         if (!priv->ppio) {
 508                 dev->data->dev_link.link_status = ETH_LINK_UP;
 509                 return 0;
 510         }
 511
 512         ret = pp2_ppio_enable(priv->ppio);
 513         if (ret)
 514                 return ret;
 515
 516         /*
 517          * mtu/mru can be updated if pp2_ppio_enable() was called at least once
 518          * as pp2_ppio_enable() changes port->t_mode from default 0 to
 519          * PP2_TRAFFIC_INGRESS_EGRESS.
 520          *
 521          * Set mtu to default DPDK value here.
 522          */
 523         ret = mrvl_mtu_set(dev, dev->data->mtu);
 524         if (ret) {
 525                 pp2_ppio_disable(priv->ppio);
 526                 return ret;
 527         }
 528
 529         dev->data->dev_link.link_status = ETH_LINK_UP;
 530         return 0;
 531 }
 532
 533 /**
 534  * DPDK callback to bring the link down.
 535  *
 536  * @param dev
 537  *   Pointer to Ethernet device structure.
 538  *
 539  * @return
 540  *   0 on success, negative error value otherwise.
 541  */
 542 static int
 543 mrvl_dev_set_link_down(struct rte_eth_dev *dev)
 544 {
 545         struct mrvl_priv *priv = dev->data->dev_private;
 546         int ret;
 547
 548         if (!priv->ppio) {
 549                 dev->data->dev_link.link_status = ETH_LINK_DOWN;
 550                 return 0;
 551         }
 552         ret = pp2_ppio_disable(priv->ppio);
 553         if (ret)
 554                 return ret;
 555
 556         dev->data->dev_link.link_status = ETH_LINK_DOWN;
 557         return 0;
 558 }
 559
 560 /**
 561  * DPDK callback to start tx queue.
 562  *
 563  * @param dev
 564  *   Pointer to Ethernet device structure.
 565  * @param queue_id
 566  *   Transmit queue index.
 567  *
 568  * @return
 569  *   0 on success, negative error value otherwise.
 570  */
 571 static int
 572 mrvl_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id)
 573 {
 574         struct mrvl_priv *priv = dev->data->dev_private;
 575         int ret;
 576
 577         if (!priv)
 578                 return -EPERM;
 579
 580         /* passing 1 enables given tx queue */
 581         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 1);
 582         if (ret) {
 583                 MRVL_LOG(ERR, "Failed to start txq %d", queue_id);
 584                 return ret;
 585         }
 586
 587         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 588
 589         return 0;
 590 }
 591
 592 /**
 593  * DPDK callback to stop tx queue.
 594  *
 595  * @param dev
 596  *   Pointer to Ethernet device structure.
 597  * @param queue_id
 598  *   Transmit queue index.
 599  *
 600  * @return
 601  *   0 on success, negative error value otherwise.
 602  */
 603 static int
 604 mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id)
 605 {
 606         struct mrvl_priv *priv = dev->data->dev_private;
 607         int ret;
 608
 609         if (!priv->ppio)
 610                 return -EPERM;
 611
 612         /* passing 0 disables given tx queue */
 613         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 0);
 614         if (ret) {
 615                 MRVL_LOG(ERR, "Failed to stop txq %d", queue_id);
 616                 return ret;
 617         }
 618
 619         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 620
 621         return 0;
 622 }
 623
 624 /**
 625  * Populate VLAN Filter configuration.
 626  *
 627  * @param dev
 628  *   Pointer to Ethernet device structure.
 629  * @param on
 630  *   Toggle filter.
 631  *
 632  * @return
 633  *   0 on success, negative error value otherwise.
 634  */
 635 static int mrvl_populate_vlan_table(struct rte_eth_dev *dev, int on)
 636 {
 637         uint32_t j;
 638         int ret;
 639         struct rte_vlan_filter_conf *vfc;
 640
 641         vfc = &dev->data->vlan_filter_conf;
 642         for (j = 0; j < RTE_DIM(vfc->ids); j++) {
 643                 uint64_t vlan;
 644                 uint64_t vbit;
 645                 uint64_t ids = vfc->ids[j];
 646
 647                 if (ids == 0)
 648                         continue;
 649
 650                 while (ids) {
 651                         vlan = 64 * j;
 652                         /* count trailing zeroes */
 653                         vbit = ~ids & (ids - 1);
 654                         /* clear least significant bit set */
 655                         ids ^= (ids ^ (ids - 1)) ^ vbit;
 656                         for (; vbit; vlan++)
 657                                 vbit >>= 1;
 658                         ret = mrvl_vlan_filter_set(dev, vlan, on);
 659                         if (ret) {
 660                                 MRVL_LOG(ERR, "Failed to setup VLAN filter\n");
 661                                 return ret;
 662                         }
 663                 }
 664         }
 665
 666         return 0;
 667 }
 668
 669 /**
 670  * DPDK callback to start the device.
 671  *
 672  * @param dev
 673  *   Pointer to Ethernet device structure.
 674  *
 675  * @return
 676  *   0 on success, negative errno value on failure.
 677  */
 678 static int
 679 mrvl_dev_start(struct rte_eth_dev *dev)
 680 {
 681         struct mrvl_priv *priv = dev->data->dev_private;
 682         char match[MRVL_MATCH_LEN];
 683         int ret = 0, i, def_init_size;
 684         struct rte_ether_addr *mac_addr;
 685
 686         if (priv->ppio)
 687                 return mrvl_dev_set_link_up(dev);
 688
 689         snprintf(match, sizeof(match), "ppio-%d:%d",
 690                  priv->pp_id, priv->ppio_id);
 691         priv->ppio_params.match = match;
 692
 693         /*
 694          * Calculate the minimum bpool size for refill feature as follows:
 695          * 2 default burst sizes multiply by number of rx queues.
 696          * If the bpool size will be below this value, new buffers will
 697          * be added to the pool.
 698          */
 699         priv->bpool_min_size = priv->nb_rx_queues * MRVL_BURST_SIZE * 2;
 700
 701         /* In case initial bpool size configured in queues setup is
 702          * smaller than minimum size add more buffers
 703          */
 704         def_init_size = priv->bpool_min_size + MRVL_BURST_SIZE * 2;
 705         if (priv->bpool_init_size < def_init_size) {
 706                 int buffs_to_add = def_init_size - priv->bpool_init_size;
 707
 708                 priv->bpool_init_size += buffs_to_add;
 709                 ret = mrvl_fill_bpool(dev->data->rx_queues[0], buffs_to_add);
 710                 if (ret)
 711                         MRVL_LOG(ERR, "Failed to add buffers to bpool");
 712         }
 713
 714         /*
 715          * Calculate the maximum bpool size for refill feature as follows:
 716          * maximum number of descriptors in rx queue multiply by number
 717          * of rx queues plus minimum bpool size.
 718          * In case the bpool size will exceed this value, superfluous buffers
 719          * will be removed
 720          */
 721         priv->bpool_max_size = (priv->nb_rx_queues * MRVL_PP2_RXD_MAX) +
 722                                 priv->bpool_min_size;
 723
 724         ret = pp2_ppio_init(&priv->ppio_params, &priv->ppio);
 725         if (ret) {
 726                 MRVL_LOG(ERR, "Failed to init ppio");
 727                 return ret;
 728         }
 729
 730         /*
 731          * In case there are some some stale uc/mc mac addresses flush them
 732          * here. It cannot be done during mrvl_dev_close() as port information
 733          * is already gone at that point (due to pp2_ppio_deinit() in
 734          * mrvl_dev_stop()).
 735          */
 736         if (!priv->uc_mc_flushed) {
 737                 ret = pp2_ppio_flush_mac_addrs(priv->ppio, 1, 1);
 738                 if (ret) {
 739                         MRVL_LOG(ERR,
 740                                 "Failed to flush uc/mc filter list");
 741                         goto out;
 742                 }
 743                 priv->uc_mc_flushed = 1;
 744         }
 745
 746         ret = mrvl_mtu_set(dev, dev->data->mtu);
 747         if (ret)
 748                 MRVL_LOG(ERR, "Failed to set MTU to %d", dev->data->mtu);
 749
 750         if (!rte_is_zero_ether_addr(&dev->data->mac_addrs[0]))
 751                 mrvl_mac_addr_set(dev, &dev->data->mac_addrs[0]);
 752
 753         for (i = 1; i < MRVL_MAC_ADDRS_MAX; i++) {
 754                 mac_addr = &dev->data->mac_addrs[i];
 755
 756                 /* skip zero address */
 757                 if (rte_is_zero_ether_addr(mac_addr))
 758                         continue;
 759
 760                 mrvl_mac_addr_add(dev, mac_addr, i, 0);
 761         }
 762
 763         if (dev->data->all_multicast == 1)
 764                 mrvl_allmulticast_enable(dev);
 765
 766         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_FILTER) {
 767                 ret = mrvl_populate_vlan_table(dev, 1);
 768                 if (ret) {
 769                         MRVL_LOG(ERR, "Failed to populate VLAN table");
 770                         goto out;
 771                 }
 772         }
 773
 774         /* For default QoS config, don't start classifier. */
 775         if (mrvl_qos_cfg  &&
 776             mrvl_qos_cfg->port[dev->data->port_id].use_global_defaults == 0) {
 777                 ret = mrvl_start_qos_mapping(priv);
 778                 if (ret) {
 779                         MRVL_LOG(ERR, "Failed to setup QoS mapping");
 780                         goto out;
 781                 }
 782         }
 783
 784         ret = pp2_ppio_set_loopback(priv->ppio, dev->data->dev_conf.lpbk_mode);
 785         if (ret) {
 786                 MRVL_LOG(ERR, "Failed to set loopback");
 787                 goto out;
 788         }
 789
 790         if (dev->data->promiscuous == 1)
 791                 mrvl_promiscuous_enable(dev);
 792
 793         if (dev->data->dev_link.link_status == ETH_LINK_UP) {
 794                 ret = mrvl_dev_set_link_up(dev);
 795                 if (ret) {
 796                         MRVL_LOG(ERR, "Failed to set link up");
 797                         dev->data->dev_link.link_status = ETH_LINK_DOWN;
 798                         goto out;
 799                 }
 800         }
 801
 802         /* start tx queues */
 803         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 804                 struct mrvl_txq *txq = dev->data->tx_queues[i];
 805
 806                 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
 807
 808                 if (!txq->tx_deferred_start)
 809                         continue;
 810
 811                 /*
 812                  * All txqs are started by default. Stop them
 813                  * so that tx_deferred_start works as expected.
 814                  */
 815                 ret = mrvl_tx_queue_stop(dev, i);
 816                 if (ret)
 817                         goto out;
 818         }
 819
 820         mrvl_flow_init(dev);
 821         mrvl_mtr_init(dev);
 822         mrvl_set_tx_function(dev);
 823
 824         return 0;
 825 out:
 826         MRVL_LOG(ERR, "Failed to start device");
 827         pp2_ppio_deinit(priv->ppio);
 828         return ret;
 829 }
 830
 831 /**
 832  * Flush receive queues.
 833  *
 834  * @param dev
 835  *   Pointer to Ethernet device structure.
 836  */
 837 static void
 838 mrvl_flush_rx_queues(struct rte_eth_dev *dev)
 839 {
 840         int i;
 841
 842         MRVL_LOG(INFO, "Flushing rx queues");
 843         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 844                 int ret, num;
 845
 846                 do {
 847                         struct mrvl_rxq *q = dev->data->rx_queues[i];
 848                         struct pp2_ppio_desc descs[MRVL_PP2_RXD_MAX];
 849
 850                         num = MRVL_PP2_RXD_MAX;
 851                         ret = pp2_ppio_recv(q->priv->ppio,
 852                                             q->priv->rxq_map[q->queue_id].tc,
 853                                             q->priv->rxq_map[q->queue_id].inq,
 854                                             descs, (uint16_t *)&num);
 855                 } while (ret == 0 && num);
 856         }
 857 }
 858
 859 /**
 860  * Flush transmit shadow queues.
 861  *
 862  * @param dev
 863  *   Pointer to Ethernet device structure.
 864  */
 865 static void
 866 mrvl_flush_tx_shadow_queues(struct rte_eth_dev *dev)
 867 {
 868         int i, j;
 869         struct mrvl_txq *txq;
 870
 871         MRVL_LOG(INFO, "Flushing tx shadow queues");
 872         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 873                 txq = (struct mrvl_txq *)dev->data->tx_queues[i];
 874
 875                 for (j = 0; j < RTE_MAX_LCORE; j++) {
 876                         struct mrvl_shadow_txq *sq;
 877
 878                         if (!hifs[j])
 879                                 continue;
 880
 881                         sq = &txq->shadow_txqs[j];
 882                         mrvl_free_sent_buffers(txq->priv->ppio,
 883                                 hifs[j], j, sq, txq->queue_id, 1);
 884                         while (sq->tail != sq->head) {
 885                                 uint64_t addr = cookie_addr_high |
 886                                         sq->ent[sq->tail].buff.cookie;
 887                                 rte_pktmbuf_free(
 888                                         (struct rte_mbuf *)addr);
 889                                 sq->tail = (sq->tail + 1) &
 890                                             MRVL_PP2_TX_SHADOWQ_MASK;
 891                         }
 892                         memset(sq, 0, sizeof(*sq));
 893                 }
 894         }
 895 }
 896
 897 /**
 898  * Flush hardware bpool (buffer-pool).
 899  *
 900  * @param dev
 901  *   Pointer to Ethernet device structure.
 902  */
 903 static void
 904 mrvl_flush_bpool(struct rte_eth_dev *dev)
 905 {
 906         struct mrvl_priv *priv = dev->data->dev_private;
 907         struct pp2_hif *hif;
 908         uint32_t num;
 909         int ret;
 910         unsigned int core_id = rte_lcore_id();
 911
 912         if (core_id == LCORE_ID_ANY)
 913                 core_id = rte_get_main_lcore();
 914
 915         hif = mrvl_get_hif(priv, core_id);
 916
 917         ret = pp2_bpool_get_num_buffs(priv->bpool, &num);
 918         if (ret) {
 919                 MRVL_LOG(ERR, "Failed to get bpool buffers number");
 920                 return;
 921         }
 922
 923         while (num--) {
 924                 struct pp2_buff_inf inf;
 925                 uint64_t addr;
 926
 927                 ret = pp2_bpool_get_buff(hif, priv->bpool, &inf);
 928                 if (ret)
 929                         break;
 930
 931                 addr = cookie_addr_high | inf.cookie;
 932                 rte_pktmbuf_free((struct rte_mbuf *)addr);
 933         }
 934 }
 935
 936 /**
 937  * DPDK callback to stop the device.
 938  *
 939  * @param dev
 940  *   Pointer to Ethernet device structure.
 941  */
 942 static int
 943 mrvl_dev_stop(struct rte_eth_dev *dev)
 944 {
 945         return mrvl_dev_set_link_down(dev);
 946 }
 947
 948 /**
 949  * DPDK callback to close the device.
 950  *
 951  * @param dev
 952  *   Pointer to Ethernet device structure.
 953  */
 954 static int
 955 mrvl_dev_close(struct rte_eth_dev *dev)
 956 {
 957         struct mrvl_priv *priv = dev->data->dev_private;
 958         size_t i;
 959
 960         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 961                 return 0;
 962
 963         mrvl_flush_rx_queues(dev);
 964         mrvl_flush_tx_shadow_queues(dev);
 965         mrvl_flow_deinit(dev);
 966         mrvl_mtr_deinit(dev);
 967
 968         for (i = 0; i < priv->ppio_params.inqs_params.num_tcs; ++i) {
 969                 struct pp2_ppio_tc_params *tc_params =
 970                         &priv->ppio_params.inqs_params.tcs_params[i];
 971
 972                 if (tc_params->inqs_params) {
 973                         rte_free(tc_params->inqs_params);
 974                         tc_params->inqs_params = NULL;
 975                 }
 976         }
 977
 978         if (priv->cls_tbl) {
 979                 pp2_cls_tbl_deinit(priv->cls_tbl);
 980                 priv->cls_tbl = NULL;
 981         }
 982
 983         if (priv->qos_tbl) {
 984                 pp2_cls_qos_tbl_deinit(priv->qos_tbl);
 985                 priv->qos_tbl = NULL;
 986         }
 987
 988         mrvl_flush_bpool(dev);
 989         mrvl_tm_deinit(dev);
 990
 991         if (priv->ppio) {
 992                 pp2_ppio_deinit(priv->ppio);
 993                 priv->ppio = NULL;
 994         }
 995
 996         /* policer must be released after ppio deinitialization */
 997         if (priv->default_policer) {
 998                 pp2_cls_plcr_deinit(priv->default_policer);
 999                 priv->default_policer = NULL;
1000         }
1001
1002
1003         if (priv->bpool) {
1004                 pp2_bpool_deinit(priv->bpool);
1005                 used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
1006                 priv->bpool = NULL;
1007         }
1008
1009         mrvl_dev_num--;
1010
1011         if (mrvl_dev_num == 0) {
1012                 MRVL_LOG(INFO, "Perform MUSDK deinit");
1013                 mrvl_deinit_hifs();
1014                 mrvl_deinit_pp2();
1015                 rte_mvep_deinit(MVEP_MOD_T_PP2);
1016         }
1017
1018         return 0;
1019 }
1020
1021 /**
1022  * DPDK callback to retrieve physical link information.
1023  *
1024  * @param dev
1025  *   Pointer to Ethernet device structure.
1026  * @param wait_to_complete
1027  *   Wait for request completion (ignored).
1028  *
1029  * @return
1030  *   0 on success, negative error value otherwise.
1031  */
1032 static int
1033 mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
1034 {
1035         /*
1036          * TODO
1037          * once MUSDK provides necessary API use it here
1038          */
1039         struct mrvl_priv *priv = dev->data->dev_private;
1040         struct ethtool_cmd edata;
1041         struct ifreq req;
1042         int ret, fd, link_up;
1043
1044         if (!priv->ppio)
1045                 return -EPERM;
1046
1047         edata.cmd = ETHTOOL_GSET;
1048
1049         strcpy(req.ifr_name, dev->data->name);
1050         req.ifr_data = (void *)&edata;
1051
1052         fd = socket(AF_INET, SOCK_DGRAM, 0);
1053         if (fd == -1)
1054                 return -EFAULT;
1055
1056         ret = ioctl(fd, SIOCETHTOOL, &req);
1057         if (ret == -1) {
1058                 close(fd);
1059                 return -EFAULT;
1060         }
1061
1062         close(fd);
1063
1064         switch (ethtool_cmd_speed(&edata)) {
1065         case SPEED_10:
1066                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10M;
1067                 break;
1068         case SPEED_100:
1069                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_100M;
1070                 break;
1071         case SPEED_1000:
1072                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G;
1073                 break;
1074         case SPEED_10000:
1075                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G;
1076                 break;
1077         default:
1078                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_NONE;
1079         }
1080
1081         dev->data->dev_link.link_duplex = edata.duplex ? ETH_LINK_FULL_DUPLEX :
1082                                                          ETH_LINK_HALF_DUPLEX;
1083         dev->data->dev_link.link_autoneg = edata.autoneg ? ETH_LINK_AUTONEG :
1084                                                            ETH_LINK_FIXED;
1085         pp2_ppio_get_link_state(priv->ppio, &link_up);
1086         dev->data->dev_link.link_status = link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
1087
1088         return 0;
1089 }
1090
1091 /**
1092  * DPDK callback to enable promiscuous mode.
1093  *
1094  * @param dev
1095  *   Pointer to Ethernet device structure.
1096  *
1097  * @return
1098  *   0 on success, negative error value otherwise.
1099  */
1100 static int
1101 mrvl_promiscuous_enable(struct rte_eth_dev *dev)
1102 {
1103         struct mrvl_priv *priv = dev->data->dev_private;
1104         int ret;
1105
1106         if (priv->isolated)
1107                 return -ENOTSUP;
1108
1109         if (!priv->ppio)
1110                 return 0;
1111
1112         ret = pp2_ppio_set_promisc(priv->ppio, 1);
1113         if (ret) {
1114                 MRVL_LOG(ERR, "Failed to enable promiscuous mode");
1115                 return -EAGAIN;
1116         }
1117
1118         return 0;
1119 }
1120
1121 /**
1122  * DPDK callback to enable allmulti mode.
1123  *
1124  * @param dev
1125  *   Pointer to Ethernet device structure.
1126  *
1127  * @return
1128  *   0 on success, negative error value otherwise.
1129  */
1130 static int
1131 mrvl_allmulticast_enable(struct rte_eth_dev *dev)
1132 {
1133         struct mrvl_priv *priv = dev->data->dev_private;
1134         int ret;
1135
1136         if (priv->isolated)
1137                 return -ENOTSUP;
1138
1139         if (!priv->ppio)
1140                 return 0;
1141
1142         ret = pp2_ppio_set_mc_promisc(priv->ppio, 1);
1143         if (ret) {
1144                 MRVL_LOG(ERR, "Failed enable all-multicast mode");
1145                 return -EAGAIN;
1146         }
1147
1148         return 0;
1149 }
1150
1151 /**
1152  * DPDK callback to disable promiscuous mode.
1153  *
1154  * @param dev
1155  *   Pointer to Ethernet device structure.
1156  *
1157  * @return
1158  *   0 on success, negative error value otherwise.
1159  */
1160 static int
1161 mrvl_promiscuous_disable(struct rte_eth_dev *dev)
1162 {
1163         struct mrvl_priv *priv = dev->data->dev_private;
1164         int ret;
1165
1166         if (priv->isolated)
1167                 return -ENOTSUP;
1168
1169         if (!priv->ppio)
1170                 return 0;
1171
1172         ret = pp2_ppio_set_promisc(priv->ppio, 0);
1173         if (ret) {
1174                 MRVL_LOG(ERR, "Failed to disable promiscuous mode");
1175                 return -EAGAIN;
1176         }
1177
1178         return 0;
1179 }
1180
1181 /**
1182  * DPDK callback to disable allmulticast mode.
1183  *
1184  * @param dev
1185  *   Pointer to Ethernet device structure.
1186  *
1187  * @return
1188  *   0 on success, negative error value otherwise.
1189  */
1190 static int
1191 mrvl_allmulticast_disable(struct rte_eth_dev *dev)
1192 {
1193         struct mrvl_priv *priv = dev->data->dev_private;
1194         int ret;
1195
1196         if (priv->isolated)
1197                 return -ENOTSUP;
1198
1199         if (!priv->ppio)
1200                 return 0;
1201
1202         ret = pp2_ppio_set_mc_promisc(priv->ppio, 0);
1203         if (ret) {
1204                 MRVL_LOG(ERR, "Failed to disable all-multicast mode");
1205                 return -EAGAIN;
1206         }
1207
1208         return 0;
1209 }
1210
1211 /**
1212  * DPDK callback to remove a MAC address.
1213  *
1214  * @param dev
1215  *   Pointer to Ethernet device structure.
1216  * @param index
1217  *   MAC address index.
1218  */
1219 static void
1220 mrvl_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
1221 {
1222         struct mrvl_priv *priv = dev->data->dev_private;
1223         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1224         int ret;
1225
1226         if (priv->isolated)
1227                 return;
1228
1229         if (!priv->ppio)
1230                 return;
1231
1232         ret = pp2_ppio_remove_mac_addr(priv->ppio,
1233                                        dev->data->mac_addrs[index].addr_bytes);
1234         if (ret) {
1235                 rte_ether_format_addr(buf, sizeof(buf),
1236                                   &dev->data->mac_addrs[index]);
1237                 MRVL_LOG(ERR, "Failed to remove mac %s", buf);
1238         }
1239 }
1240
1241 /**
1242  * DPDK callback to add a MAC address.
1243  *
1244  * @param dev
1245  *   Pointer to Ethernet device structure.
1246  * @param mac_addr
1247  *   MAC address to register.
1248  * @param index
1249  *   MAC address index.
1250  * @param vmdq
1251  *   VMDq pool index to associate address with (unused).
1252  *
1253  * @return
1254  *   0 on success, negative error value otherwise.
1255  */
1256 static int
1257 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
1258                   uint32_t index, uint32_t vmdq __rte_unused)
1259 {
1260         struct mrvl_priv *priv = dev->data->dev_private;
1261         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1262         int ret;
1263
1264         if (priv->isolated)
1265                 return -ENOTSUP;
1266
1267         if (!priv->ppio)
1268                 return 0;
1269
1270         if (index == 0)
1271                 /* For setting index 0, mrvl_mac_addr_set() should be used.*/
1272                 return -1;
1273
1274         /*
1275          * Maximum number of uc addresses can be tuned via kernel module mvpp2x
1276          * parameter uc_filter_max. Maximum number of mc addresses is then
1277          * MRVL_MAC_ADDRS_MAX - uc_filter_max. Currently it defaults to 4 and
1278          * 21 respectively.
1279          *
1280          * If more than uc_filter_max uc addresses were added to filter list
1281          * then NIC will switch to promiscuous mode automatically.
1282          *
1283          * If more than MRVL_MAC_ADDRS_MAX - uc_filter_max number mc addresses
1284          * were added to filter list then NIC will switch to all-multicast mode
1285          * automatically.
1286          */
1287         ret = pp2_ppio_add_mac_addr(priv->ppio, mac_addr->addr_bytes);
1288         if (ret) {
1289                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1290                 MRVL_LOG(ERR, "Failed to add mac %s", buf);
1291                 return -1;
1292         }
1293
1294         return 0;
1295 }
1296
1297 /**
1298  * DPDK callback to set the primary MAC address.
1299  *
1300  * @param dev
1301  *   Pointer to Ethernet device structure.
1302  * @param mac_addr
1303  *   MAC address to register.
1304  *
1305  * @return
1306  *   0 on success, negative error value otherwise.
1307  */
1308 static int
1309 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr)
1310 {
1311         struct mrvl_priv *priv = dev->data->dev_private;
1312         int ret;
1313
1314         if (priv->isolated)
1315                 return -ENOTSUP;
1316
1317         if (!priv->ppio)
1318                 return 0;
1319
1320         ret = pp2_ppio_set_mac_addr(priv->ppio, mac_addr->addr_bytes);
1321         if (ret) {
1322                 char buf[RTE_ETHER_ADDR_FMT_SIZE];
1323                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1324                 MRVL_LOG(ERR, "Failed to set mac to %s", buf);
1325         }
1326
1327         return ret;
1328 }
1329
1330 /**
1331  * DPDK callback to get device statistics.
1332  *
1333  * @param dev
1334  *   Pointer to Ethernet device structure.
1335  * @param stats
1336  *   Stats structure output buffer.
1337  *
1338  * @return
1339  *   0 on success, negative error value otherwise.
1340  */
1341 static int
1342 mrvl_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1343 {
1344         struct mrvl_priv *priv = dev->data->dev_private;
1345         struct pp2_ppio_statistics ppio_stats;
1346         uint64_t drop_mac = 0;
1347         unsigned int i, idx, ret;
1348
1349         if (!priv->ppio)
1350                 return -EPERM;
1351
1352         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1353                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1354                 struct pp2_ppio_inq_statistics rx_stats;
1355
1356                 if (!rxq)
1357                         continue;
1358
1359                 idx = rxq->queue_id;
1360                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1361                         MRVL_LOG(ERR,
1362                                 "rx queue %d stats out of range (0 - %d)",
1363                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1364                         continue;
1365                 }
1366
1367                 ret = pp2_ppio_inq_get_statistics(priv->ppio,
1368                                                   priv->rxq_map[idx].tc,
1369                                                   priv->rxq_map[idx].inq,
1370                                                   &rx_stats, 0);
1371                 if (unlikely(ret)) {
1372                         MRVL_LOG(ERR,
1373                                 "Failed to update rx queue %d stats", idx);
1374                         break;
1375                 }
1376
1377                 stats->q_ibytes[idx] = rxq->bytes_recv;
1378                 stats->q_ipackets[idx] = rx_stats.enq_desc - rxq->drop_mac;
1379                 stats->q_errors[idx] = rx_stats.drop_early +
1380                                        rx_stats.drop_fullq +
1381                                        rx_stats.drop_bm +
1382                                        rxq->drop_mac;
1383                 stats->ibytes += rxq->bytes_recv;
1384                 drop_mac += rxq->drop_mac;
1385         }
1386
1387         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1388                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1389                 struct pp2_ppio_outq_statistics tx_stats;
1390
1391                 if (!txq)
1392                         continue;
1393
1394                 idx = txq->queue_id;
1395                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1396                         MRVL_LOG(ERR,
1397                                 "tx queue %d stats out of range (0 - %d)",
1398                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1399                 }
1400
1401                 ret = pp2_ppio_outq_get_statistics(priv->ppio, idx,
1402                                                    &tx_stats, 0);
1403                 if (unlikely(ret)) {
1404                         MRVL_LOG(ERR,
1405                                 "Failed to update tx queue %d stats", idx);
1406                         break;
1407                 }
1408
1409                 stats->q_opackets[idx] = tx_stats.deq_desc;
1410                 stats->q_obytes[idx] = txq->bytes_sent;
1411                 stats->obytes += txq->bytes_sent;
1412         }
1413
1414         ret = pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1415         if (unlikely(ret)) {
1416                 MRVL_LOG(ERR, "Failed to update port statistics");
1417                 return ret;
1418         }
1419
1420         stats->ipackets += ppio_stats.rx_packets - drop_mac;
1421         stats->opackets += ppio_stats.tx_packets;
1422         stats->imissed += ppio_stats.rx_fullq_dropped +
1423                           ppio_stats.rx_bm_dropped +
1424                           ppio_stats.rx_early_dropped +
1425                           ppio_stats.rx_fifo_dropped +
1426                           ppio_stats.rx_cls_dropped;
1427         stats->ierrors = drop_mac;
1428
1429         return 0;
1430 }
1431
1432 /**
1433  * DPDK callback to clear device statistics.
1434  *
1435  * @param dev
1436  *   Pointer to Ethernet device structure.
1437  *
1438  * @return
1439  *   0 on success, negative error value otherwise.
1440  */
1441 static int
1442 mrvl_stats_reset(struct rte_eth_dev *dev)
1443 {
1444         struct mrvl_priv *priv = dev->data->dev_private;
1445         int i;
1446
1447         if (!priv->ppio)
1448                 return 0;
1449
1450         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1451                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1452
1453                 pp2_ppio_inq_get_statistics(priv->ppio, priv->rxq_map[i].tc,
1454                                             priv->rxq_map[i].inq, NULL, 1);
1455                 rxq->bytes_recv = 0;
1456                 rxq->drop_mac = 0;
1457         }
1458
1459         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1460                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1461
1462                 pp2_ppio_outq_get_statistics(priv->ppio, i, NULL, 1);
1463                 txq->bytes_sent = 0;
1464         }
1465
1466         return pp2_ppio_get_statistics(priv->ppio, NULL, 1);
1467 }
1468
1469 /**
1470  * DPDK callback to get extended statistics.
1471  *
1472  * @param dev
1473  *   Pointer to Ethernet device structure.
1474  * @param stats
1475  *   Pointer to xstats table.
1476  * @param n
1477  *   Number of entries in xstats table.
1478  * @return
1479  *   Negative value on error, number of read xstats otherwise.
1480  */
1481 static int
1482 mrvl_xstats_get(struct rte_eth_dev *dev,
1483                 struct rte_eth_xstat *stats, unsigned int n)
1484 {
1485         struct mrvl_priv *priv = dev->data->dev_private;
1486         struct pp2_ppio_statistics ppio_stats;
1487         unsigned int i;
1488
1489         if (!stats)
1490                 return 0;
1491
1492         pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1493         for (i = 0; i < n && i < RTE_DIM(mrvl_xstats_tbl); i++) {
1494                 uint64_t val;
1495
1496                 if (mrvl_xstats_tbl[i].size == sizeof(uint32_t))
1497                         val = *(uint32_t *)((uint8_t *)&ppio_stats +
1498                                             mrvl_xstats_tbl[i].offset);
1499                 else if (mrvl_xstats_tbl[i].size == sizeof(uint64_t))
1500                         val = *(uint64_t *)((uint8_t *)&ppio_stats +
1501                                             mrvl_xstats_tbl[i].offset);
1502                 else
1503                         return -EINVAL;
1504
1505                 stats[i].id = i;
1506                 stats[i].value = val;
1507         }
1508
1509         return n;
1510 }
1511
1512 /**
1513  * DPDK callback to reset extended statistics.
1514  *
1515  * @param dev
1516  *   Pointer to Ethernet device structure.
1517  *
1518  * @return
1519  *   0 on success, negative error value otherwise.
1520  */
1521 static int
1522 mrvl_xstats_reset(struct rte_eth_dev *dev)
1523 {
1524         return mrvl_stats_reset(dev);
1525 }
1526
1527 /**
1528  * DPDK callback to get extended statistics names.
1529  *
1530  * @param dev (unused)
1531  *   Pointer to Ethernet device structure.
1532  * @param xstats_names
1533  *   Pointer to xstats names table.
1534  * @param size
1535  *   Size of the xstats names table.
1536  * @return
1537  *   Number of read names.
1538  */
1539 static int
1540 mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
1541                       struct rte_eth_xstat_name *xstats_names,
1542                       unsigned int size)
1543 {
1544         unsigned int i;
1545
1546         if (!xstats_names)
1547                 return RTE_DIM(mrvl_xstats_tbl);
1548
1549         for (i = 0; i < size && i < RTE_DIM(mrvl_xstats_tbl); i++)
1550                 strlcpy(xstats_names[i].name, mrvl_xstats_tbl[i].name,
1551                         RTE_ETH_XSTATS_NAME_SIZE);
1552
1553         return size;
1554 }
1555
1556 /**
1557  * DPDK callback to get information about the device.
1558  *
1559  * @param dev
1560  *   Pointer to Ethernet device structure (unused).
1561  * @param info
1562  *   Info structure output buffer.
1563  */
1564 static int
1565 mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
1566                    struct rte_eth_dev_info *info)
1567 {
1568         info->speed_capa = ETH_LINK_SPEED_10M |
1569                            ETH_LINK_SPEED_100M |
1570                            ETH_LINK_SPEED_1G |
1571                            ETH_LINK_SPEED_10G;
1572
1573         info->max_rx_queues = MRVL_PP2_RXQ_MAX;
1574         info->max_tx_queues = MRVL_PP2_TXQ_MAX;
1575         info->max_mac_addrs = MRVL_MAC_ADDRS_MAX;
1576
1577         info->rx_desc_lim.nb_max = MRVL_PP2_RXD_MAX;
1578         info->rx_desc_lim.nb_min = MRVL_PP2_RXD_MIN;
1579         info->rx_desc_lim.nb_align = MRVL_PP2_RXD_ALIGN;
1580
1581         info->tx_desc_lim.nb_max = MRVL_PP2_TXD_MAX;
1582         info->tx_desc_lim.nb_min = MRVL_PP2_TXD_MIN;
1583         info->tx_desc_lim.nb_align = MRVL_PP2_TXD_ALIGN;
1584
1585         info->rx_offload_capa = MRVL_RX_OFFLOADS;
1586         info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
1587
1588         info->tx_offload_capa = MRVL_TX_OFFLOADS;
1589         info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
1590
1591         info->flow_type_rss_offloads = ETH_RSS_IPV4 |
1592                                        ETH_RSS_NONFRAG_IPV4_TCP |
1593                                        ETH_RSS_NONFRAG_IPV4_UDP;
1594
1595         /* By default packets are dropped if no descriptors are available */
1596         info->default_rxconf.rx_drop_en = 1;
1597
1598         info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
1599
1600         return 0;
1601 }
1602
1603 /**
1604  * Return supported packet types.
1605  *
1606  * @param dev
1607  *   Pointer to Ethernet device structure (unused).
1608  *
1609  * @return
1610  *   Const pointer to the table with supported packet types.
1611  */
1612 static const uint32_t *
1613 mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
1614 {
1615         static const uint32_t ptypes[] = {
1616                 RTE_PTYPE_L2_ETHER,
1617                 RTE_PTYPE_L2_ETHER_VLAN,
1618                 RTE_PTYPE_L2_ETHER_QINQ,
1619                 RTE_PTYPE_L3_IPV4,
1620                 RTE_PTYPE_L3_IPV4_EXT,
1621                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
1622                 RTE_PTYPE_L3_IPV6,
1623                 RTE_PTYPE_L3_IPV6_EXT,
1624                 RTE_PTYPE_L2_ETHER_ARP,
1625                 RTE_PTYPE_L4_TCP,
1626                 RTE_PTYPE_L4_UDP
1627         };
1628
1629         return ptypes;
1630 }
1631
1632 /**
1633  * DPDK callback to get information about specific receive queue.
1634  *
1635  * @param dev
1636  *   Pointer to Ethernet device structure.
1637  * @param rx_queue_id
1638  *   Receive queue index.
1639  * @param qinfo
1640  *   Receive queue information structure.
1641  */
1642 static void mrvl_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1643                               struct rte_eth_rxq_info *qinfo)
1644 {
1645         struct mrvl_rxq *q = dev->data->rx_queues[rx_queue_id];
1646         struct mrvl_priv *priv = dev->data->dev_private;
1647         int inq = priv->rxq_map[rx_queue_id].inq;
1648         int tc = priv->rxq_map[rx_queue_id].tc;
1649         struct pp2_ppio_tc_params *tc_params =
1650                 &priv->ppio_params.inqs_params.tcs_params[tc];
1651
1652         qinfo->mp = q->mp;
1653         qinfo->nb_desc = tc_params->inqs_params[inq].size;
1654 }
1655
1656 /**
1657  * DPDK callback to get information about specific transmit queue.
1658  *
1659  * @param dev
1660  *   Pointer to Ethernet device structure.
1661  * @param tx_queue_id
1662  *   Transmit queue index.
1663  * @param qinfo
1664  *   Transmit queue information structure.
1665  */
1666 static void mrvl_txq_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1667                               struct rte_eth_txq_info *qinfo)
1668 {
1669         struct mrvl_priv *priv = dev->data->dev_private;
1670         struct mrvl_txq *txq = dev->data->tx_queues[tx_queue_id];
1671
1672         qinfo->nb_desc =
1673                 priv->ppio_params.outqs_params.outqs_params[tx_queue_id].size;
1674         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1675 }
1676
1677 /**
1678  * DPDK callback to Configure a VLAN filter.
1679  *
1680  * @param dev
1681  *   Pointer to Ethernet device structure.
1682  * @param vlan_id
1683  *   VLAN ID to filter.
1684  * @param on
1685  *   Toggle filter.
1686  *
1687  * @return
1688  *   0 on success, negative error value otherwise.
1689  */
1690 static int
1691 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1692 {
1693         struct mrvl_priv *priv = dev->data->dev_private;
1694
1695         if (priv->isolated)
1696                 return -ENOTSUP;
1697
1698         if (!priv->ppio)
1699                 return 0;
1700
1701         return on ? pp2_ppio_add_vlan(priv->ppio, vlan_id) :
1702                     pp2_ppio_remove_vlan(priv->ppio, vlan_id);
1703 }
1704
1705 /**
1706  * DPDK callback to Configure VLAN offload.
1707  *
1708  * @param dev
1709  *   Pointer to Ethernet device structure.
1710  * @param mask
1711  *   VLAN offload mask.
1712  *
1713  * @return
1714  *   0 on success, negative error value otherwise.
1715  */
1716 static int mrvl_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1717 {
1718         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1719         int ret;
1720
1721         if (mask & ETH_VLAN_STRIP_MASK)
1722                 MRVL_LOG(ERR, "VLAN stripping is not supported\n");
1723
1724         if (mask & ETH_VLAN_FILTER_MASK) {
1725                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1726                         ret = mrvl_populate_vlan_table(dev, 1);
1727                 else
1728                         ret = mrvl_populate_vlan_table(dev, 0);
1729
1730                 if (ret)
1731                         return ret;
1732         }
1733
1734         if (mask & ETH_VLAN_EXTEND_MASK)
1735                 MRVL_LOG(ERR, "Extend VLAN not supported\n");
1736
1737         return 0;
1738 }
1739
1740 /**
1741  * Release buffers to hardware bpool (buffer-pool)
1742  *
1743  * @param rxq
1744  *   Receive queue pointer.
1745  * @param num
1746  *   Number of buffers to release to bpool.
1747  *
1748  * @return
1749  *   0 on success, negative error value otherwise.
1750  */
1751 static int
1752 mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
1753 {
1754         struct buff_release_entry entries[num];
1755         struct rte_mbuf *mbufs[num];
1756         int i, ret;
1757         unsigned int core_id;
1758         struct pp2_hif *hif;
1759         struct pp2_bpool *bpool;
1760
1761         core_id = rte_lcore_id();
1762         if (core_id == LCORE_ID_ANY)
1763                 core_id = rte_get_main_lcore();
1764
1765         hif = mrvl_get_hif(rxq->priv, core_id);
1766         if (!hif)
1767                 return -1;
1768
1769         bpool = rxq->priv->bpool;
1770
1771         ret = rte_pktmbuf_alloc_bulk(rxq->mp, mbufs, num);
1772         if (ret)
1773                 return ret;
1774
1775         if (cookie_addr_high == MRVL_COOKIE_ADDR_INVALID)
1776                 cookie_addr_high =
1777                         (uint64_t)mbufs[0] & MRVL_COOKIE_HIGH_ADDR_MASK;
1778
1779         for (i = 0; i < num; i++) {
1780                 if (((uint64_t)mbufs[i] & MRVL_COOKIE_HIGH_ADDR_MASK)
1781                         != cookie_addr_high) {
1782                         MRVL_LOG(ERR,
1783                                 "mbuf virtual addr high is out of range "
1784                                 "0x%x instead of 0x%x\n",
1785                                 (uint32_t)((uint64_t)mbufs[i] >> 32),
1786                                 (uint32_t)(cookie_addr_high >> 32));
1787                         goto out;
1788                 }
1789
1790                 entries[i].buff.addr =
1791                         rte_mbuf_data_iova_default(mbufs[i]);
1792                 entries[i].buff.cookie = (uintptr_t)mbufs[i];
1793                 entries[i].bpool = bpool;
1794         }
1795
1796         pp2_bpool_put_buffs(hif, entries, (uint16_t *)&i);
1797         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] += i;
1798
1799         if (i != num)
1800                 goto out;
1801
1802         return 0;
1803 out:
1804         for (; i < num; i++)
1805                 rte_pktmbuf_free(mbufs[i]);
1806
1807         return -1;
1808 }
1809
1810 /**
1811  * DPDK callback to configure the receive queue.
1812  *
1813  * @param dev
1814  *   Pointer to Ethernet device structure.
1815  * @param idx
1816  *   RX queue index.
1817  * @param desc
1818  *   Number of descriptors to configure in queue.
1819  * @param socket
1820  *   NUMA socket on which memory must be allocated.
1821  * @param conf
1822  *   Thresholds parameters.
1823  * @param mp
1824  *   Memory pool for buffer allocations.
1825  *
1826  * @return
1827  *   0 on success, negative error value otherwise.
1828  */
1829 static int
1830 mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1831                     unsigned int socket,
1832                     const struct rte_eth_rxconf *conf,
1833                     struct rte_mempool *mp)
1834 {
1835         struct mrvl_priv *priv = dev->data->dev_private;
1836         struct mrvl_rxq *rxq;
1837         uint32_t frame_size, buf_size = rte_pktmbuf_data_room_size(mp);
1838         uint32_t max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1839         int ret, tc, inq;
1840         uint64_t offloads;
1841
1842         offloads = conf->offloads | dev->data->dev_conf.rxmode.offloads;
1843
1844         if (priv->rxq_map[idx].tc == MRVL_UNKNOWN_TC) {
1845                 /*
1846                  * Unknown TC mapping, mapping will not have a correct queue.
1847                  */
1848                 MRVL_LOG(ERR, "Unknown TC mapping for queue %hu eth%hhu",
1849                         idx, priv->ppio_id);
1850                 return -EFAULT;
1851         }
1852
1853         frame_size = buf_size - RTE_PKTMBUF_HEADROOM -
1854                      MRVL_PKT_EFFEC_OFFS + RTE_ETHER_CRC_LEN;
1855         if (frame_size < max_rx_pkt_len) {
1856                 MRVL_LOG(WARNING,
1857                         "Mbuf size must be increased to %u bytes to hold up "
1858                         "to %u bytes of data.",
1859                         buf_size + max_rx_pkt_len - frame_size,
1860                         max_rx_pkt_len);
1861                 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1862                 MRVL_LOG(INFO, "Setting max rx pkt len to %u",
1863                         dev->data->dev_conf.rxmode.max_rx_pkt_len);
1864         }
1865
1866         if (dev->data->rx_queues[idx]) {
1867                 rte_free(dev->data->rx_queues[idx]);
1868                 dev->data->rx_queues[idx] = NULL;
1869         }
1870
1871         rxq = rte_zmalloc_socket("rxq", sizeof(*rxq), 0, socket);
1872         if (!rxq)
1873                 return -ENOMEM;
1874
1875         rxq->priv = priv;
1876         rxq->mp = mp;
1877         rxq->cksum_enabled = offloads & DEV_RX_OFFLOAD_IPV4_CKSUM;
1878         rxq->queue_id = idx;
1879         rxq->port_id = dev->data->port_id;
1880         mrvl_port_to_bpool_lookup[rxq->port_id] = priv->bpool;
1881
1882         tc = priv->rxq_map[rxq->queue_id].tc,
1883         inq = priv->rxq_map[rxq->queue_id].inq;
1884         priv->ppio_params.inqs_params.tcs_params[tc].inqs_params[inq].size =
1885                 desc;
1886
1887         ret = mrvl_fill_bpool(rxq, desc);
1888         if (ret) {
1889                 rte_free(rxq);
1890                 return ret;
1891         }
1892
1893         priv->bpool_init_size += desc;
1894
1895         dev->data->rx_queues[idx] = rxq;
1896
1897         return 0;
1898 }
1899
1900 /**
1901  * DPDK callback to release the receive queue.
1902  *
1903  * @param rxq
1904  *   Generic receive queue pointer.
1905  */
1906 static void
1907 mrvl_rx_queue_release(void *rxq)
1908 {
1909         struct mrvl_rxq *q = rxq;
1910         struct pp2_ppio_tc_params *tc_params;
1911         int i, num, tc, inq;
1912         struct pp2_hif *hif;
1913         unsigned int core_id = rte_lcore_id();
1914
1915         if (core_id == LCORE_ID_ANY)
1916                 core_id = rte_get_main_lcore();
1917
1918         if (!q)
1919                 return;
1920
1921         hif = mrvl_get_hif(q->priv, core_id);
1922
1923         if (!hif)
1924                 return;
1925
1926         tc = q->priv->rxq_map[q->queue_id].tc;
1927         inq = q->priv->rxq_map[q->queue_id].inq;
1928         tc_params = &q->priv->ppio_params.inqs_params.tcs_params[tc];
1929         num = tc_params->inqs_params[inq].size;
1930         for (i = 0; i < num; i++) {
1931                 struct pp2_buff_inf inf;
1932                 uint64_t addr;
1933
1934                 pp2_bpool_get_buff(hif, q->priv->bpool, &inf);
1935                 addr = cookie_addr_high | inf.cookie;
1936                 rte_pktmbuf_free((struct rte_mbuf *)addr);
1937         }
1938
1939         rte_free(q);
1940 }
1941
1942 /**
1943  * DPDK callback to configure the transmit queue.
1944  *
1945  * @param dev
1946  *   Pointer to Ethernet device structure.
1947  * @param idx
1948  *   Transmit queue index.
1949  * @param desc
1950  *   Number of descriptors to configure in the queue.
1951  * @param socket
1952  *   NUMA socket on which memory must be allocated.
1953  * @param conf
1954  *   Tx queue configuration parameters.
1955  *
1956  * @return
1957  *   0 on success, negative error value otherwise.
1958  */
1959 static int
1960 mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1961                     unsigned int socket,
1962                     const struct rte_eth_txconf *conf)
1963 {
1964         struct mrvl_priv *priv = dev->data->dev_private;
1965         struct mrvl_txq *txq;
1966
1967         if (dev->data->tx_queues[idx]) {
1968                 rte_free(dev->data->tx_queues[idx]);
1969                 dev->data->tx_queues[idx] = NULL;
1970         }
1971
1972         txq = rte_zmalloc_socket("txq", sizeof(*txq), 0, socket);
1973         if (!txq)
1974                 return -ENOMEM;
1975
1976         txq->priv = priv;
1977         txq->queue_id = idx;
1978         txq->port_id = dev->data->port_id;
1979         txq->tx_deferred_start = conf->tx_deferred_start;
1980         dev->data->tx_queues[idx] = txq;
1981
1982         priv->ppio_params.outqs_params.outqs_params[idx].size = desc;
1983
1984         return 0;
1985 }
1986
1987 /**
1988  * DPDK callback to release the transmit queue.
1989  *
1990  * @param txq
1991  *   Generic transmit queue pointer.
1992  */
1993 static void
1994 mrvl_tx_queue_release(void *txq)
1995 {
1996         struct mrvl_txq *q = txq;
1997
1998         if (!q)
1999                 return;
2000
2001         rte_free(q);
2002 }
2003
2004 /**
2005  * DPDK callback to get flow control configuration.
2006  *
2007  * @param dev
2008  *  Pointer to Ethernet device structure.
2009  * @param fc_conf
2010  *  Pointer to the flow control configuration.
2011  *
2012  * @return
2013  *  0 on success, negative error value otherwise.
2014  */
2015 static int
2016 mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
2017 {
2018         struct mrvl_priv *priv = dev->data->dev_private;
2019         int ret, en;
2020
2021         if (!priv)
2022                 return -EPERM;
2023
2024         ret = pp2_ppio_get_rx_pause(priv->ppio, &en);
2025         if (ret) {
2026                 MRVL_LOG(ERR, "Failed to read rx pause state");
2027                 return ret;
2028         }
2029
2030         fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
2031
2032         return 0;
2033 }
2034
2035 /**
2036  * DPDK callback to set flow control configuration.
2037  *
2038  * @param dev
2039  *  Pointer to Ethernet device structure.
2040  * @param fc_conf
2041  *  Pointer to the flow control configuration.
2042  *
2043  * @return
2044  *  0 on success, negative error value otherwise.
2045  */
2046 static int
2047 mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
2048 {
2049         struct mrvl_priv *priv = dev->data->dev_private;
2050
2051         if (!priv)
2052                 return -EPERM;
2053
2054         if (fc_conf->high_water ||
2055             fc_conf->low_water ||
2056             fc_conf->pause_time ||
2057             fc_conf->mac_ctrl_frame_fwd ||
2058             fc_conf->autoneg) {
2059                 MRVL_LOG(ERR, "Flowctrl parameter is not supported");
2060
2061                 return -EINVAL;
2062         }
2063
2064         if (fc_conf->mode == RTE_FC_NONE ||
2065             fc_conf->mode == RTE_FC_RX_PAUSE) {
2066                 int ret, en;
2067
2068                 en = fc_conf->mode == RTE_FC_NONE ? 0 : 1;
2069                 ret = pp2_ppio_set_rx_pause(priv->ppio, en);
2070                 if (ret)
2071                         MRVL_LOG(ERR,
2072                                 "Failed to change flowctrl on RX side");
2073
2074                 return ret;
2075         }
2076
2077         return 0;
2078 }
2079
2080 /**
2081  * Update RSS hash configuration
2082  *
2083  * @param dev
2084  *   Pointer to Ethernet device structure.
2085  * @param rss_conf
2086  *   Pointer to RSS configuration.
2087  *
2088  * @return
2089  *   0 on success, negative error value otherwise.
2090  */
2091 static int
2092 mrvl_rss_hash_update(struct rte_eth_dev *dev,
2093                      struct rte_eth_rss_conf *rss_conf)
2094 {
2095         struct mrvl_priv *priv = dev->data->dev_private;
2096
2097         if (priv->isolated)
2098                 return -ENOTSUP;
2099
2100         return mrvl_configure_rss(priv, rss_conf);
2101 }
2102
2103 /**
2104  * DPDK callback to get RSS hash configuration.
2105  *
2106  * @param dev
2107  *   Pointer to Ethernet device structure.
2108  * @rss_conf
2109  *   Pointer to RSS configuration.
2110  *
2111  * @return
2112  *   Always 0.
2113  */
2114 static int
2115 mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
2116                        struct rte_eth_rss_conf *rss_conf)
2117 {
2118         struct mrvl_priv *priv = dev->data->dev_private;
2119         enum pp2_ppio_hash_type hash_type =
2120                 priv->ppio_params.inqs_params.hash_type;
2121
2122         rss_conf->rss_key = NULL;
2123
2124         if (hash_type == PP2_PPIO_HASH_T_NONE)
2125                 rss_conf->rss_hf = 0;
2126         else if (hash_type == PP2_PPIO_HASH_T_2_TUPLE)
2127                 rss_conf->rss_hf = ETH_RSS_IPV4;
2128         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && priv->rss_hf_tcp)
2129                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_TCP;
2130         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && !priv->rss_hf_tcp)
2131                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_UDP;
2132
2133         return 0;
2134 }
2135
2136 /**
2137  * DPDK callback to get rte_flow callbacks.
2138  *
2139  * @param dev
2140  *   Pointer to the device structure.
2141  * @param filer_type
2142  *   Flow filter type.
2143  * @param filter_op
2144  *   Flow filter operation.
2145  * @param arg
2146  *   Pointer to pass the flow ops.
2147  *
2148  * @return
2149  *   0 on success, negative error value otherwise.
2150  */
2151 static int
2152 mrvl_eth_filter_ctrl(struct rte_eth_dev *dev __rte_unused,
2153                      enum rte_filter_type filter_type,
2154                      enum rte_filter_op filter_op, void *arg)
2155 {
2156         switch (filter_type) {
2157         case RTE_ETH_FILTER_GENERIC:
2158                 if (filter_op != RTE_ETH_FILTER_GET)
2159                         return -EINVAL;
2160                 *(const void **)arg = &mrvl_flow_ops;
2161                 return 0;
2162         default:
2163                 MRVL_LOG(WARNING, "Filter type (%d) not supported",
2164                                 filter_type);
2165                 return -EINVAL;
2166         }
2167 }
2168
2169 /**
2170  * DPDK callback to get rte_mtr callbacks.
2171  *
2172  * @param dev
2173  *   Pointer to the device structure.
2174  * @param ops
2175  *   Pointer to pass the mtr ops.
2176  *
2177  * @return
2178  *   Always 0.
2179  */
2180 static int
2181 mrvl_mtr_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2182 {
2183         *(const void **)ops = &mrvl_mtr_ops;
2184
2185         return 0;
2186 }
2187
2188 /**
2189  * DPDK callback to get rte_tm callbacks.
2190  *
2191  * @param dev
2192  *   Pointer to the device structure.
2193  * @param ops
2194  *   Pointer to pass the tm ops.
2195  *
2196  * @return
2197  *   Always 0.
2198  */
2199 static int
2200 mrvl_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2201 {
2202         *(const void **)ops = &mrvl_tm_ops;
2203
2204         return 0;
2205 }
2206
2207 static const struct eth_dev_ops mrvl_ops = {
2208         .dev_configure = mrvl_dev_configure,
2209         .dev_start = mrvl_dev_start,
2210         .dev_stop = mrvl_dev_stop,
2211         .dev_set_link_up = mrvl_dev_set_link_up,
2212         .dev_set_link_down = mrvl_dev_set_link_down,
2213         .dev_close = mrvl_dev_close,
2214         .link_update = mrvl_link_update,
2215         .promiscuous_enable = mrvl_promiscuous_enable,
2216         .allmulticast_enable = mrvl_allmulticast_enable,
2217         .promiscuous_disable = mrvl_promiscuous_disable,
2218         .allmulticast_disable = mrvl_allmulticast_disable,
2219         .mac_addr_remove = mrvl_mac_addr_remove,
2220         .mac_addr_add = mrvl_mac_addr_add,
2221         .mac_addr_set = mrvl_mac_addr_set,
2222         .mtu_set = mrvl_mtu_set,
2223         .stats_get = mrvl_stats_get,
2224         .stats_reset = mrvl_stats_reset,
2225         .xstats_get = mrvl_xstats_get,
2226         .xstats_reset = mrvl_xstats_reset,
2227         .xstats_get_names = mrvl_xstats_get_names,
2228         .dev_infos_get = mrvl_dev_infos_get,
2229         .dev_supported_ptypes_get = mrvl_dev_supported_ptypes_get,
2230         .rxq_info_get = mrvl_rxq_info_get,
2231         .txq_info_get = mrvl_txq_info_get,
2232         .vlan_filter_set = mrvl_vlan_filter_set,
2233         .vlan_offload_set = mrvl_vlan_offload_set,
2234         .tx_queue_start = mrvl_tx_queue_start,
2235         .tx_queue_stop = mrvl_tx_queue_stop,
2236         .rx_queue_setup = mrvl_rx_queue_setup,
2237         .rx_queue_release = mrvl_rx_queue_release,
2238         .tx_queue_setup = mrvl_tx_queue_setup,
2239         .tx_queue_release = mrvl_tx_queue_release,
2240         .flow_ctrl_get = mrvl_flow_ctrl_get,
2241         .flow_ctrl_set = mrvl_flow_ctrl_set,
2242         .rss_hash_update = mrvl_rss_hash_update,
2243         .rss_hash_conf_get = mrvl_rss_hash_conf_get,
2244         .filter_ctrl = mrvl_eth_filter_ctrl,
2245         .mtr_ops_get = mrvl_mtr_ops_get,
2246         .tm_ops_get = mrvl_tm_ops_get,
2247 };
2248
2249 /**
2250  * Return packet type information and l3/l4 offsets.
2251  *
2252  * @param desc
2253  *   Pointer to the received packet descriptor.
2254  * @param l3_offset
2255  *   l3 packet offset.
2256  * @param l4_offset
2257  *   l4 packet offset.
2258  *
2259  * @return
2260  *   Packet type information.
2261  */
2262 static inline uint64_t
2263 mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
2264                                     uint8_t *l3_offset, uint8_t *l4_offset)
2265 {
2266         enum pp2_inq_l3_type l3_type;
2267         enum pp2_inq_l4_type l4_type;
2268         enum pp2_inq_vlan_tag vlan_tag;
2269         uint64_t packet_type;
2270
2271         pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset);
2272         pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset);
2273         pp2_ppio_inq_desc_get_vlan_tag(desc, &vlan_tag);
2274
2275         packet_type = RTE_PTYPE_L2_ETHER;
2276
2277         switch (vlan_tag) {
2278         case PP2_INQ_VLAN_TAG_SINGLE:
2279                 packet_type |= RTE_PTYPE_L2_ETHER_VLAN;
2280                 break;
2281         case PP2_INQ_VLAN_TAG_DOUBLE:
2282         case PP2_INQ_VLAN_TAG_TRIPLE:
2283                 packet_type |= RTE_PTYPE_L2_ETHER_QINQ;
2284                 break;
2285         default:
2286                 break;
2287         }
2288
2289         switch (l3_type) {
2290         case PP2_INQ_L3_TYPE_IPV4_NO_OPTS:
2291                 packet_type |= RTE_PTYPE_L3_IPV4;
2292                 break;
2293         case PP2_INQ_L3_TYPE_IPV4_OK:
2294                 packet_type |= RTE_PTYPE_L3_IPV4_EXT;
2295                 break;
2296         case PP2_INQ_L3_TYPE_IPV4_TTL_ZERO:
2297                 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
2298                 break;
2299         case PP2_INQ_L3_TYPE_IPV6_NO_EXT:
2300                 packet_type |= RTE_PTYPE_L3_IPV6;
2301                 break;
2302         case PP2_INQ_L3_TYPE_IPV6_EXT:
2303                 packet_type |= RTE_PTYPE_L3_IPV6_EXT;
2304                 break;
2305         case PP2_INQ_L3_TYPE_ARP:
2306                 packet_type |= RTE_PTYPE_L2_ETHER_ARP;
2307                 /*
2308                  * In case of ARP l4_offset is set to wrong value.
2309                  * Set it to proper one so that later on mbuf->l3_len can be
2310                  * calculated subtracting l4_offset and l3_offset.
2311                  */
2312                 *l4_offset = *l3_offset + MRVL_ARP_LENGTH;
2313                 break;
2314         default:
2315                 break;
2316         }
2317
2318         switch (l4_type) {
2319         case PP2_INQ_L4_TYPE_TCP:
2320                 packet_type |= RTE_PTYPE_L4_TCP;
2321                 break;
2322         case PP2_INQ_L4_TYPE_UDP:
2323                 packet_type |= RTE_PTYPE_L4_UDP;
2324                 break;
2325         default:
2326                 break;
2327         }
2328
2329         return packet_type;
2330 }
2331
2332 /**
2333  * Get offload information from the received packet descriptor.
2334  *
2335  * @param desc
2336  *   Pointer to the received packet descriptor.
2337  *
2338  * @return
2339  *   Mbuf offload flags.
2340  */
2341 static inline uint64_t
2342 mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
2343 {
2344         uint64_t flags;
2345         enum pp2_inq_desc_status status;
2346
2347         status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
2348         if (unlikely(status != PP2_DESC_ERR_OK))
2349                 flags = PKT_RX_IP_CKSUM_BAD;
2350         else
2351                 flags = PKT_RX_IP_CKSUM_GOOD;
2352
2353         status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
2354         if (unlikely(status != PP2_DESC_ERR_OK))
2355                 flags |= PKT_RX_L4_CKSUM_BAD;
2356         else
2357                 flags |= PKT_RX_L4_CKSUM_GOOD;
2358
2359         return flags;
2360 }
2361
2362 /**
2363  * DPDK callback for receive.
2364  *
2365  * @param rxq
2366  *   Generic pointer to the receive queue.
2367  * @param rx_pkts
2368  *   Array to store received packets.
2369  * @param nb_pkts
2370  *   Maximum number of packets in array.
2371  *
2372  * @return
2373  *   Number of packets successfully received.
2374  */
2375 static uint16_t
2376 mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
2377 {
2378         struct mrvl_rxq *q = rxq;
2379         struct pp2_ppio_desc descs[nb_pkts];
2380         struct pp2_bpool *bpool;
2381         int i, ret, rx_done = 0;
2382         int num;
2383         struct pp2_hif *hif;
2384         unsigned int core_id = rte_lcore_id();
2385
2386         hif = mrvl_get_hif(q->priv, core_id);
2387
2388         if (unlikely(!q->priv->ppio || !hif))
2389                 return 0;
2390
2391         bpool = q->priv->bpool;
2392
2393         ret = pp2_ppio_recv(q->priv->ppio, q->priv->rxq_map[q->queue_id].tc,
2394                             q->priv->rxq_map[q->queue_id].inq, descs, &nb_pkts);
2395         if (unlikely(ret < 0))
2396                 return 0;
2397
2398         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] -= nb_pkts;
2399
2400         for (i = 0; i < nb_pkts; i++) {
2401                 struct rte_mbuf *mbuf;
2402                 uint8_t l3_offset, l4_offset;
2403                 enum pp2_inq_desc_status status;
2404                 uint64_t addr;
2405
2406                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2407                         struct pp2_ppio_desc *pref_desc;
2408                         u64 pref_addr;
2409
2410                         pref_desc = &descs[i + MRVL_MUSDK_PREFETCH_SHIFT];
2411                         pref_addr = cookie_addr_high |
2412                                     pp2_ppio_inq_desc_get_cookie(pref_desc);
2413                         rte_mbuf_prefetch_part1((struct rte_mbuf *)(pref_addr));
2414                         rte_mbuf_prefetch_part2((struct rte_mbuf *)(pref_addr));
2415                 }
2416
2417                 addr = cookie_addr_high |
2418                        pp2_ppio_inq_desc_get_cookie(&descs[i]);
2419                 mbuf = (struct rte_mbuf *)addr;
2420                 rte_pktmbuf_reset(mbuf);
2421
2422                 /* drop packet in case of mac, overrun or resource error */
2423                 status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
2424                 if (unlikely(status != PP2_DESC_ERR_OK)) {
2425                         struct pp2_buff_inf binf = {
2426                                 .addr = rte_mbuf_data_iova_default(mbuf),
2427                                 .cookie = (uint64_t)mbuf,
2428                         };
2429
2430                         pp2_bpool_put_buff(hif, bpool, &binf);
2431                         mrvl_port_bpool_size
2432                                 [bpool->pp2_id][bpool->id][core_id]++;
2433                         q->drop_mac++;
2434                         continue;
2435                 }
2436
2437                 mbuf->data_off += MRVL_PKT_EFFEC_OFFS;
2438                 mbuf->pkt_len = pp2_ppio_inq_desc_get_pkt_len(&descs[i]);
2439                 mbuf->data_len = mbuf->pkt_len;
2440                 mbuf->port = q->port_id;
2441                 mbuf->packet_type =
2442                         mrvl_desc_to_packet_type_and_offset(&descs[i],
2443                                                             &l3_offset,
2444                                                             &l4_offset);
2445                 mbuf->l2_len = l3_offset;
2446                 mbuf->l3_len = l4_offset - l3_offset;
2447
2448                 if (likely(q->cksum_enabled))
2449                         mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
2450
2451                 rx_pkts[rx_done++] = mbuf;
2452                 q->bytes_recv += mbuf->pkt_len;
2453         }
2454
2455         if (rte_spinlock_trylock(&q->priv->lock) == 1) {
2456                 num = mrvl_get_bpool_size(bpool->pp2_id, bpool->id);
2457
2458                 if (unlikely(num <= q->priv->bpool_min_size ||
2459                              (!rx_done && num < q->priv->bpool_init_size))) {
2460                         mrvl_fill_bpool(q, MRVL_BURST_SIZE);
2461                 } else if (unlikely(num > q->priv->bpool_max_size)) {
2462                         int i;
2463                         int pkt_to_remove = num - q->priv->bpool_init_size;
2464                         struct rte_mbuf *mbuf;
2465                         struct pp2_buff_inf buff;
2466
2467                         for (i = 0; i < pkt_to_remove; i++) {
2468                                 ret = pp2_bpool_get_buff(hif, bpool, &buff);
2469                                 if (ret)
2470                                         break;
2471                                 mbuf = (struct rte_mbuf *)
2472                                         (cookie_addr_high | buff.cookie);
2473                                 rte_pktmbuf_free(mbuf);
2474                         }
2475                         mrvl_port_bpool_size
2476                                 [bpool->pp2_id][bpool->id][core_id] -= i;
2477                 }
2478                 rte_spinlock_unlock(&q->priv->lock);
2479         }
2480
2481         return rx_done;
2482 }
2483
2484 /**
2485  * Prepare offload information.
2486  *
2487  * @param ol_flags
2488  *   Offload flags.
2489  * @param l3_type
2490  *   Pointer to the pp2_ouq_l3_type structure.
2491  * @param l4_type
2492  *   Pointer to the pp2_outq_l4_type structure.
2493  * @param gen_l3_cksum
2494  *   Will be set to 1 in case l3 checksum is computed.
2495  * @param l4_cksum
2496  *   Will be set to 1 in case l4 checksum is computed.
2497  */
2498 static inline void
2499 mrvl_prepare_proto_info(uint64_t ol_flags,
2500                         enum pp2_outq_l3_type *l3_type,
2501                         enum pp2_outq_l4_type *l4_type,
2502                         int *gen_l3_cksum,
2503                         int *gen_l4_cksum)
2504 {
2505         /*
2506          * Based on ol_flags prepare information
2507          * for pp2_ppio_outq_desc_set_proto_info() which setups descriptor
2508          * for offloading.
2509          * in most of the checksum cases ipv4 must be set, so this is the
2510          * default value
2511          */
2512         *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
2513         *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
2514
2515         if (ol_flags & PKT_TX_IPV6) {
2516                 *l3_type = PP2_OUTQ_L3_TYPE_IPV6;
2517                 /* no checksum for ipv6 header */
2518                 *gen_l3_cksum = 0;
2519         }
2520
2521         if ((ol_flags & PKT_TX_L4_MASK) == PKT_TX_TCP_CKSUM) {
2522                 *l4_type = PP2_OUTQ_L4_TYPE_TCP;
2523                 *gen_l4_cksum = 1;
2524         } else if ((ol_flags & PKT_TX_L4_MASK) ==  PKT_TX_UDP_CKSUM) {
2525                 *l4_type = PP2_OUTQ_L4_TYPE_UDP;
2526                 *gen_l4_cksum = 1;
2527         } else {
2528                 *l4_type = PP2_OUTQ_L4_TYPE_OTHER;
2529                 /* no checksum for other type */
2530                 *gen_l4_cksum = 0;
2531         }
2532 }
2533
2534 /**
2535  * Release already sent buffers to bpool (buffer-pool).
2536  *
2537  * @param ppio
2538  *   Pointer to the port structure.
2539  * @param hif
2540  *   Pointer to the MUSDK hardware interface.
2541  * @param sq
2542  *   Pointer to the shadow queue.
2543  * @param qid
2544  *   Queue id number.
2545  * @param force
2546  *   Force releasing packets.
2547  */
2548 static inline void
2549 mrvl_free_sent_buffers(struct pp2_ppio *ppio, struct pp2_hif *hif,
2550                        unsigned int core_id, struct mrvl_shadow_txq *sq,
2551                        int qid, int force)
2552 {
2553         struct buff_release_entry *entry;
2554         uint16_t nb_done = 0, num = 0, skip_bufs = 0;
2555         int i;
2556
2557         pp2_ppio_get_num_outq_done(ppio, hif, qid, &nb_done);
2558
2559         sq->num_to_release += nb_done;
2560
2561         if (likely(!force &&
2562                    sq->num_to_release < MRVL_PP2_BUF_RELEASE_BURST_SIZE))
2563                 return;
2564
2565         nb_done = sq->num_to_release;
2566         sq->num_to_release = 0;
2567
2568         for (i = 0; i < nb_done; i++) {
2569                 entry = &sq->ent[sq->tail + num];
2570                 if (unlikely(!entry->buff.addr)) {
2571                         MRVL_LOG(ERR,
2572                                 "Shadow memory @%d: cookie(%lx), pa(%lx)!",
2573                                 sq->tail, (u64)entry->buff.cookie,
2574                                 (u64)entry->buff.addr);
2575                         skip_bufs = 1;
2576                         goto skip;
2577                 }
2578
2579                 if (unlikely(!entry->bpool)) {
2580                         struct rte_mbuf *mbuf;
2581
2582                         mbuf = (struct rte_mbuf *)entry->buff.cookie;
2583                         rte_pktmbuf_free(mbuf);
2584                         skip_bufs = 1;
2585                         goto skip;
2586                 }
2587
2588                 mrvl_port_bpool_size
2589                         [entry->bpool->pp2_id][entry->bpool->id][core_id]++;
2590                 num++;
2591                 if (unlikely(sq->tail + num == MRVL_PP2_TX_SHADOWQ_SIZE))
2592                         goto skip;
2593                 continue;
2594 skip:
2595                 if (likely(num))
2596                         pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2597                 num += skip_bufs;
2598                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2599                 sq->size -= num;
2600                 num = 0;
2601                 skip_bufs = 0;
2602         }
2603
2604         if (likely(num)) {
2605                 pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2606                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2607                 sq->size -= num;
2608         }
2609 }
2610
2611 /**
2612  * DPDK callback for transmit.
2613  *
2614  * @param txq
2615  *   Generic pointer transmit queue.
2616  * @param tx_pkts
2617  *   Packets to transmit.
2618  * @param nb_pkts
2619  *   Number of packets in array.
2620  *
2621  * @return
2622  *   Number of packets successfully transmitted.
2623  */
2624 static uint16_t
2625 mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
2626 {
2627         struct mrvl_txq *q = txq;
2628         struct mrvl_shadow_txq *sq;
2629         struct pp2_hif *hif;
2630         struct pp2_ppio_desc descs[nb_pkts];
2631         unsigned int core_id = rte_lcore_id();
2632         int i, bytes_sent = 0;
2633         uint16_t num, sq_free_size;
2634         uint64_t addr;
2635
2636         hif = mrvl_get_hif(q->priv, core_id);
2637         sq = &q->shadow_txqs[core_id];
2638
2639         if (unlikely(!q->priv->ppio || !hif))
2640                 return 0;
2641
2642         if (sq->size)
2643                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2644                                        sq, q->queue_id, 0);
2645
2646         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2647         if (unlikely(nb_pkts > sq_free_size))
2648                 nb_pkts = sq_free_size;
2649
2650         for (i = 0; i < nb_pkts; i++) {
2651                 struct rte_mbuf *mbuf = tx_pkts[i];
2652                 int gen_l3_cksum, gen_l4_cksum;
2653                 enum pp2_outq_l3_type l3_type;
2654                 enum pp2_outq_l4_type l4_type;
2655
2656                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2657                         struct rte_mbuf *pref_pkt_hdr;
2658
2659                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2660                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2661                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2662                 }
2663
2664                 mrvl_fill_shadowq(sq, mbuf);
2665                 mrvl_fill_desc(&descs[i], mbuf);
2666
2667                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2668                 /*
2669                  * in case unsupported ol_flags were passed
2670                  * do not update descriptor offload information
2671                  */
2672                 if (!(mbuf->ol_flags & MRVL_TX_PKT_OFFLOADS))
2673                         continue;
2674                 mrvl_prepare_proto_info(mbuf->ol_flags, &l3_type, &l4_type,
2675                                         &gen_l3_cksum, &gen_l4_cksum);
2676
2677                 pp2_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type,
2678                                                   mbuf->l2_len,
2679                                                   mbuf->l2_len + mbuf->l3_len,
2680                                                   gen_l3_cksum, gen_l4_cksum);
2681         }
2682
2683         num = nb_pkts;
2684         pp2_ppio_send(q->priv->ppio, hif, q->queue_id, descs, &nb_pkts);
2685         /* number of packets that were not sent */
2686         if (unlikely(num > nb_pkts)) {
2687                 for (i = nb_pkts; i < num; i++) {
2688                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2689                                 MRVL_PP2_TX_SHADOWQ_MASK;
2690                         addr = sq->ent[sq->head].buff.cookie;
2691                         bytes_sent -=
2692                                 rte_pktmbuf_pkt_len((struct rte_mbuf *)addr);
2693                 }
2694                 sq->size -= num - nb_pkts;
2695         }
2696
2697         q->bytes_sent += bytes_sent;
2698
2699         return nb_pkts;
2700 }
2701
2702 /** DPDK callback for S/G transmit.
2703  *
2704  * @param txq
2705  *   Generic pointer transmit queue.
2706  * @param tx_pkts
2707  *   Packets to transmit.
2708  * @param nb_pkts
2709  *   Number of packets in array.
2710  *
2711  * @return
2712  *   Number of packets successfully transmitted.
2713  */
2714 static uint16_t
2715 mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
2716                      uint16_t nb_pkts)
2717 {
2718         struct mrvl_txq *q = txq;
2719         struct mrvl_shadow_txq *sq;
2720         struct pp2_hif *hif;
2721         struct pp2_ppio_desc descs[nb_pkts * PP2_PPIO_DESC_NUM_FRAGS];
2722         struct pp2_ppio_sg_pkts pkts;
2723         uint8_t frags[nb_pkts];
2724         unsigned int core_id = rte_lcore_id();
2725         int i, j, bytes_sent = 0;
2726         int tail, tail_first;
2727         uint16_t num, sq_free_size;
2728         uint16_t nb_segs, total_descs = 0;
2729         uint64_t addr;
2730
2731         hif = mrvl_get_hif(q->priv, core_id);
2732         sq = &q->shadow_txqs[core_id];
2733         pkts.frags = frags;
2734         pkts.num = 0;
2735
2736         if (unlikely(!q->priv->ppio || !hif))
2737                 return 0;
2738
2739         if (sq->size)
2740                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2741                                        sq, q->queue_id, 0);
2742
2743         /* Save shadow queue free size */
2744         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2745
2746         tail = 0;
2747         for (i = 0; i < nb_pkts; i++) {
2748                 struct rte_mbuf *mbuf = tx_pkts[i];
2749                 struct rte_mbuf *seg = NULL;
2750                 int gen_l3_cksum, gen_l4_cksum;
2751                 enum pp2_outq_l3_type l3_type;
2752                 enum pp2_outq_l4_type l4_type;
2753
2754                 nb_segs = mbuf->nb_segs;
2755                 tail_first = tail;
2756                 total_descs += nb_segs;
2757
2758                 /*
2759                  * Check if total_descs does not exceed
2760                  * shadow queue free size
2761                  */
2762                 if (unlikely(total_descs > sq_free_size)) {
2763                         total_descs -= nb_segs;
2764                         break;
2765                 }
2766
2767                 /* Check if nb_segs does not exceed the max nb of desc per
2768                  * fragmented packet
2769                  */
2770                 if (nb_segs > PP2_PPIO_DESC_NUM_FRAGS) {
2771                         total_descs -= nb_segs;
2772                         RTE_LOG(ERR, PMD,
2773                                 "Too many segments. Packet won't be sent.\n");
2774                         break;
2775                 }
2776
2777                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2778                         struct rte_mbuf *pref_pkt_hdr;
2779
2780                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2781                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2782                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2783                 }
2784
2785                 pkts.frags[pkts.num] = nb_segs;
2786                 pkts.num++;
2787
2788                 seg = mbuf;
2789                 for (j = 0; j < nb_segs - 1; j++) {
2790                         /* For the subsequent segments, set shadow queue
2791                          * buffer to NULL
2792                          */
2793                         mrvl_fill_shadowq(sq, NULL);
2794                         mrvl_fill_desc(&descs[tail], seg);
2795
2796                         tail++;
2797                         seg = seg->next;
2798                 }
2799                 /* Put first mbuf info in last shadow queue entry */
2800                 mrvl_fill_shadowq(sq, mbuf);
2801                 /* Update descriptor with last segment */
2802                 mrvl_fill_desc(&descs[tail++], seg);
2803
2804                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2805                 /* In case unsupported ol_flags were passed
2806                  * do not update descriptor offload information
2807                  */
2808                 if (!(mbuf->ol_flags & MRVL_TX_PKT_OFFLOADS))
2809                         continue;
2810                 mrvl_prepare_proto_info(mbuf->ol_flags, &l3_type, &l4_type,
2811                                         &gen_l3_cksum, &gen_l4_cksum);
2812
2813                 pp2_ppio_outq_desc_set_proto_info(&descs[tail_first], l3_type,
2814                                                   l4_type, mbuf->l2_len,
2815                                                   mbuf->l2_len + mbuf->l3_len,
2816                                                   gen_l3_cksum, gen_l4_cksum);
2817         }
2818
2819         num = total_descs;
2820         pp2_ppio_send_sg(q->priv->ppio, hif, q->queue_id, descs,
2821                          &total_descs, &pkts);
2822         /* number of packets that were not sent */
2823         if (unlikely(num > total_descs)) {
2824                 for (i = total_descs; i < num; i++) {
2825                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2826                                 MRVL_PP2_TX_SHADOWQ_MASK;
2827
2828                         addr = sq->ent[sq->head].buff.cookie;
2829                         if (addr)
2830                                 bytes_sent -=
2831                                         rte_pktmbuf_pkt_len((struct rte_mbuf *)
2832                                                 (cookie_addr_high | addr));
2833                 }
2834                 sq->size -= num - total_descs;
2835                 nb_pkts = pkts.num;
2836         }
2837
2838         q->bytes_sent += bytes_sent;
2839
2840         return nb_pkts;
2841 }
2842
2843 /**
2844  * Initialize packet processor.
2845  *
2846  * @return
2847  *   0 on success, negative error value otherwise.
2848  */
2849 static int
2850 mrvl_init_pp2(void)
2851 {
2852         struct pp2_init_params init_params;
2853
2854         memset(&init_params, 0, sizeof(init_params));
2855         init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
2856         init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
2857         init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
2858
2859         return pp2_init(&init_params);
2860 }
2861
2862 /**
2863  * Deinitialize packet processor.
2864  *
2865  * @return
2866  *   0 on success, negative error value otherwise.
2867  */
2868 static void
2869 mrvl_deinit_pp2(void)
2870 {
2871         pp2_deinit();
2872 }
2873
2874 /**
2875  * Create private device structure.
2876  *
2877  * @param dev_name
2878  *   Pointer to the port name passed in the initialization parameters.
2879  *
2880  * @return
2881  *   Pointer to the newly allocated private device structure.
2882  */
2883 static struct mrvl_priv *
2884 mrvl_priv_create(const char *dev_name)
2885 {
2886         struct pp2_bpool_params bpool_params;
2887         char match[MRVL_MATCH_LEN];
2888         struct mrvl_priv *priv;
2889         int ret, bpool_bit;
2890
2891         priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
2892         if (!priv)
2893                 return NULL;
2894
2895         ret = pp2_netdev_get_ppio_info((char *)(uintptr_t)dev_name,
2896                                        &priv->pp_id, &priv->ppio_id);
2897         if (ret)
2898                 goto out_free_priv;
2899
2900         bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
2901                                      PP2_BPOOL_NUM_POOLS);
2902         if (bpool_bit < 0)
2903                 goto out_free_priv;
2904         priv->bpool_bit = bpool_bit;
2905
2906         snprintf(match, sizeof(match), "pool-%d:%d", priv->pp_id,
2907                  priv->bpool_bit);
2908         memset(&bpool_params, 0, sizeof(bpool_params));
2909         bpool_params.match = match;
2910         bpool_params.buff_len = MRVL_PKT_SIZE_MAX + MRVL_PKT_EFFEC_OFFS;
2911         ret = pp2_bpool_init(&bpool_params, &priv->bpool);
2912         if (ret)
2913                 goto out_clear_bpool_bit;
2914
2915         priv->ppio_params.type = PP2_PPIO_T_NIC;
2916         rte_spinlock_init(&priv->lock);
2917
2918         return priv;
2919 out_clear_bpool_bit:
2920         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2921 out_free_priv:
2922         rte_free(priv);
2923         return NULL;
2924 }
2925
2926 /**
2927  * Create device representing Ethernet port.
2928  *
2929  * @param name
2930  *   Pointer to the port's name.
2931  *
2932  * @return
2933  *   0 on success, negative error value otherwise.
2934  */
2935 static int
2936 mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)
2937 {
2938         int ret, fd = socket(AF_INET, SOCK_DGRAM, 0);
2939         struct rte_eth_dev *eth_dev;
2940         struct mrvl_priv *priv;
2941         struct ifreq req;
2942
2943         eth_dev = rte_eth_dev_allocate(name);
2944         if (!eth_dev)
2945                 return -ENOMEM;
2946
2947         priv = mrvl_priv_create(name);
2948         if (!priv) {
2949                 ret = -ENOMEM;
2950                 goto out_free;
2951         }
2952         eth_dev->data->dev_private = priv;
2953
2954         eth_dev->data->mac_addrs =
2955                 rte_zmalloc("mac_addrs",
2956                             RTE_ETHER_ADDR_LEN * MRVL_MAC_ADDRS_MAX, 0);
2957         if (!eth_dev->data->mac_addrs) {
2958                 MRVL_LOG(ERR, "Failed to allocate space for eth addrs");
2959                 ret = -ENOMEM;
2960                 goto out_free;
2961         }
2962
2963         memset(&req, 0, sizeof(req));
2964         strcpy(req.ifr_name, name);
2965         ret = ioctl(fd, SIOCGIFHWADDR, &req);
2966         if (ret)
2967                 goto out_free;
2968
2969         memcpy(eth_dev->data->mac_addrs[0].addr_bytes,
2970                req.ifr_addr.sa_data, RTE_ETHER_ADDR_LEN);
2971
2972         eth_dev->device = &vdev->device;
2973         eth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;
2974         mrvl_set_tx_function(eth_dev);
2975         eth_dev->dev_ops = &mrvl_ops;
2976         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
2977
2978         eth_dev->data->dev_link.link_status = ETH_LINK_UP;
2979
2980         rte_eth_dev_probing_finish(eth_dev);
2981         return 0;
2982 out_free:
2983         rte_eth_dev_release_port(eth_dev);
2984
2985         return ret;
2986 }
2987
2988 /**
2989  * Callback used by rte_kvargs_process() during argument parsing.
2990  *
2991  * @param key
2992  *   Pointer to the parsed key (unused).
2993  * @param value
2994  *   Pointer to the parsed value.
2995  * @param extra_args
2996  *   Pointer to the extra arguments which contains address of the
2997  *   table of pointers to parsed interface names.
2998  *
2999  * @return
3000  *   Always 0.
3001  */
3002 static int
3003 mrvl_get_ifnames(const char *key __rte_unused, const char *value,
3004                  void *extra_args)
3005 {
3006         struct mrvl_ifnames *ifnames = extra_args;
3007
3008         ifnames->names[ifnames->idx++] = value;
3009
3010         return 0;
3011 }
3012
3013 /**
3014  * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
3015  */
3016 static void
3017 mrvl_deinit_hifs(void)
3018 {
3019         int i;
3020
3021         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
3022                 if (hifs[i])
3023                         pp2_hif_deinit(hifs[i]);
3024         }
3025         used_hifs = MRVL_MUSDK_HIFS_RESERVED;
3026         memset(hifs, 0, sizeof(hifs));
3027 }
3028
3029 /**
3030  * DPDK callback to register the virtual device.
3031  *
3032  * @param vdev
3033  *   Pointer to the virtual device.
3034  *
3035  * @return
3036  *   0 on success, negative error value otherwise.
3037  */
3038 static int
3039 rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
3040 {
3041         struct rte_kvargs *kvlist;
3042         struct mrvl_ifnames ifnames;
3043         int ret = -EINVAL;
3044         uint32_t i, ifnum, cfgnum;
3045         const char *params;
3046
3047         params = rte_vdev_device_args(vdev);
3048         if (!params)
3049                 return -EINVAL;
3050
3051         kvlist = rte_kvargs_parse(params, valid_args);
3052         if (!kvlist)
3053                 return -EINVAL;
3054
3055         ifnum = rte_kvargs_count(kvlist, MRVL_IFACE_NAME_ARG);
3056         if (ifnum > RTE_DIM(ifnames.names))
3057                 goto out_free_kvlist;
3058
3059         ifnames.idx = 0;
3060         rte_kvargs_process(kvlist, MRVL_IFACE_NAME_ARG,
3061                            mrvl_get_ifnames, &ifnames);
3062
3063
3064         /*
3065          * The below system initialization should be done only once,
3066          * on the first provided configuration file
3067          */
3068         if (!mrvl_qos_cfg) {
3069                 cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
3070                 MRVL_LOG(INFO, "Parsing config file!");
3071                 if (cfgnum > 1) {
3072                         MRVL_LOG(ERR, "Cannot handle more than one config file!");
3073                         goto out_free_kvlist;
3074                 } else if (cfgnum == 1) {
3075                         rte_kvargs_process(kvlist, MRVL_CFG_ARG,
3076                                            mrvl_get_qoscfg, &mrvl_qos_cfg);
3077                 }
3078         }
3079
3080         if (mrvl_dev_num)
3081                 goto init_devices;
3082
3083         MRVL_LOG(INFO, "Perform MUSDK initializations");
3084
3085         ret = rte_mvep_init(MVEP_MOD_T_PP2, kvlist);
3086         if (ret)
3087                 goto out_free_kvlist;
3088
3089         ret = mrvl_init_pp2();
3090         if (ret) {
3091                 MRVL_LOG(ERR, "Failed to init PP!");
3092                 rte_mvep_deinit(MVEP_MOD_T_PP2);
3093                 goto out_free_kvlist;
3094         }
3095
3096         memset(mrvl_port_bpool_size, 0, sizeof(mrvl_port_bpool_size));
3097         memset(mrvl_port_to_bpool_lookup, 0, sizeof(mrvl_port_to_bpool_lookup));
3098
3099         mrvl_lcore_first = RTE_MAX_LCORE;
3100         mrvl_lcore_last = 0;
3101
3102 init_devices:
3103         for (i = 0; i < ifnum; i++) {
3104                 MRVL_LOG(INFO, "Creating %s", ifnames.names[i]);
3105                 ret = mrvl_eth_dev_create(vdev, ifnames.names[i]);
3106                 if (ret)
3107                         goto out_cleanup;
3108                 mrvl_dev_num++;
3109         }
3110
3111         rte_kvargs_free(kvlist);
3112
3113         return 0;
3114 out_cleanup:
3115         rte_pmd_mrvl_remove(vdev);
3116
3117 out_free_kvlist:
3118         rte_kvargs_free(kvlist);
3119
3120         return ret;
3121 }
3122
3123 /**
3124  * DPDK callback to remove virtual device.
3125  *
3126  * @param vdev
3127  *   Pointer to the removed virtual device.
3128  *
3129  * @return
3130  *   0 on success, negative error value otherwise.
3131  */
3132 static int
3133 rte_pmd_mrvl_remove(struct rte_vdev_device *vdev)
3134 {
3135         uint16_t port_id;
3136         int ret = 0;
3137
3138         RTE_ETH_FOREACH_DEV(port_id) {
3139                 if (rte_eth_devices[port_id].device != &vdev->device)
3140                         continue;
3141                 ret |= rte_eth_dev_close(port_id);
3142         }
3143
3144         return ret == 0 ? 0 : -EIO;
3145 }
3146
3147 static struct rte_vdev_driver pmd_mrvl_drv = {
3148         .probe = rte_pmd_mrvl_probe,
3149         .remove = rte_pmd_mrvl_remove,
3150 };
3151
3152 RTE_PMD_REGISTER_VDEV(net_mvpp2, pmd_mrvl_drv);
3153 RTE_PMD_REGISTER_ALIAS(net_mvpp2, eth_mvpp2);
3154 RTE_LOG_REGISTER(mrvl_logtype, pmd.net.mvpp2, NOTICE);