drivers/net/mvpp2/mrvl_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017-2021 Marvell International Ltd.
   3  * Copyright(c) 2017-2021 Semihalf.
   4  * All rights reserved.
   5  */
   6
   7 #include <rte_string_fns.h>
   8 #include <ethdev_driver.h>
   9 #include <rte_kvargs.h>
  10 #include <rte_log.h>
  11 #include <rte_malloc.h>
  12 #include <rte_bus_vdev.h>
  13
  14 #include <fcntl.h>
  15 #include <linux/ethtool.h>
  16 #include <linux/sockios.h>
  17 #include <net/if.h>
  18 #include <net/if_arp.h>
  19 #include <sys/ioctl.h>
  20 #include <sys/socket.h>
  21 #include <sys/stat.h>
  22 #include <sys/types.h>
  23
  24 #include <rte_mvep_common.h>
  25 #include "mrvl_ethdev.h"
  26 #include "mrvl_qos.h"
  27 #include "mrvl_flow.h"
  28 #include "mrvl_mtr.h"
  29 #include "mrvl_tm.h"
  30
  31 /* bitmask with reserved hifs */
  32 #define MRVL_MUSDK_HIFS_RESERVED 0x0F
  33 /* bitmask with reserved bpools */
  34 #define MRVL_MUSDK_BPOOLS_RESERVED 0x07
  35 /* bitmask with reserved kernel RSS tables */
  36 #define MRVL_MUSDK_RSS_RESERVED 0x0F
  37 /* maximum number of available hifs */
  38 #define MRVL_MUSDK_HIFS_MAX 9
  39
  40 /* prefetch shift */
  41 #define MRVL_MUSDK_PREFETCH_SHIFT 2
  42
  43 /* TCAM has 25 entries reserved for uc/mc filter entries */
  44 #define MRVL_MAC_ADDRS_MAX 25
  45 #define MRVL_MATCH_LEN 16
  46 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE)
  47 /* Maximum allowable packet size */
  48 #define MRVL_PKT_SIZE_MAX (10240 - MV_MH_SIZE)
  49
  50 #define MRVL_IFACE_NAME_ARG "iface"
  51 #define MRVL_CFG_ARG "cfg"
  52
  53 #define MRVL_BURST_SIZE 64
  54
  55 #define MRVL_ARP_LENGTH 28
  56
  57 #define MRVL_COOKIE_ADDR_INVALID ~0ULL
  58 #define MRVL_COOKIE_HIGH_ADDR_MASK 0xffffff0000000000
  59
  60 /** Port Rx offload capabilities */
  61 #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
  62                           DEV_RX_OFFLOAD_JUMBO_FRAME | \
  63                           DEV_RX_OFFLOAD_CHECKSUM)
  64
  65 /** Port Tx offloads capabilities */
  66 #define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \
  67                           DEV_TX_OFFLOAD_UDP_CKSUM | \
  68                           DEV_TX_OFFLOAD_TCP_CKSUM | \
  69                           DEV_TX_OFFLOAD_MULTI_SEGS)
  70
  71 static const char * const valid_args[] = {
  72         MRVL_IFACE_NAME_ARG,
  73         MRVL_CFG_ARG,
  74         NULL
  75 };
  76
  77 static int used_hifs = MRVL_MUSDK_HIFS_RESERVED;
  78 static struct pp2_hif *hifs[RTE_MAX_LCORE];
  79 static int used_bpools[PP2_NUM_PKT_PROC] = {
  80         [0 ... PP2_NUM_PKT_PROC - 1] = MRVL_MUSDK_BPOOLS_RESERVED
  81 };
  82
  83 static struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
  84 static int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
  85 static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
  86
  87 struct mrvl_ifnames {
  88         const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];
  89         int idx;
  90 };
  91
  92 /*
  93  * To use buffer harvesting based on loopback port shadow queue structure
  94  * was introduced for buffers information bookkeeping.
  95  *
  96  * Before sending the packet, related buffer information (pp2_buff_inf) is
  97  * stored in shadow queue. After packet is transmitted no longer used
  98  * packet buffer is released back to it's original hardware pool,
  99  * on condition it originated from interface.
 100  * In case it  was generated by application itself i.e: mbuf->port field is
 101  * 0xff then its released to software mempool.
 102  */
 103 struct mrvl_shadow_txq {
 104         int head;           /* write index - used when sending buffers */
 105         int tail;           /* read index - used when releasing buffers */
 106         u16 size;           /* queue occupied size */
 107         u16 num_to_release; /* number of descriptors sent, that can be
 108                              * released
 109                              */
 110         struct buff_release_entry ent[MRVL_PP2_TX_SHADOWQ_SIZE]; /* q entries */
 111 };
 112
 113 struct mrvl_rxq {
 114         struct mrvl_priv *priv;
 115         struct rte_mempool *mp;
 116         int queue_id;
 117         int port_id;
 118         int cksum_enabled;
 119         uint64_t bytes_recv;
 120         uint64_t drop_mac;
 121 };
 122
 123 struct mrvl_txq {
 124         struct mrvl_priv *priv;
 125         int queue_id;
 126         int port_id;
 127         uint64_t bytes_sent;
 128         struct mrvl_shadow_txq shadow_txqs[RTE_MAX_LCORE];
 129         int tx_deferred_start;
 130 };
 131
 132 static int mrvl_lcore_first;
 133 static int mrvl_lcore_last;
 134 static int mrvl_dev_num;
 135
 136 static int mrvl_fill_bpool(struct mrvl_rxq *rxq, int num);
 137 static inline void mrvl_free_sent_buffers(struct pp2_ppio *ppio,
 138                         struct pp2_hif *hif, unsigned int core_id,
 139                         struct mrvl_shadow_txq *sq, int qid, int force);
 140
 141 static uint16_t mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 142                                   uint16_t nb_pkts);
 143 static uint16_t mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
 144                                      uint16_t nb_pkts);
 145 static int rte_pmd_mrvl_remove(struct rte_vdev_device *vdev);
 146 static void mrvl_deinit_pp2(void);
 147 static void mrvl_deinit_hifs(void);
 148
 149 static int
 150 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
 151                   uint32_t index, uint32_t vmdq __rte_unused);
 152 static int
 153 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr);
 154 static int
 155 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);
 156 static int mrvl_promiscuous_enable(struct rte_eth_dev *dev);
 157 static int mrvl_allmulticast_enable(struct rte_eth_dev *dev);
 158
 159 #define MRVL_XSTATS_TBL_ENTRY(name) { \
 160         #name, offsetof(struct pp2_ppio_statistics, name),      \
 161         sizeof(((struct pp2_ppio_statistics *)0)->name)         \
 162 }
 163
 164 /* Table with xstats data */
 165 static struct {
 166         const char *name;
 167         unsigned int offset;
 168         unsigned int size;
 169 } mrvl_xstats_tbl[] = {
 170         MRVL_XSTATS_TBL_ENTRY(rx_bytes),
 171         MRVL_XSTATS_TBL_ENTRY(rx_packets),
 172         MRVL_XSTATS_TBL_ENTRY(rx_unicast_packets),
 173         MRVL_XSTATS_TBL_ENTRY(rx_errors),
 174         MRVL_XSTATS_TBL_ENTRY(rx_fullq_dropped),
 175         MRVL_XSTATS_TBL_ENTRY(rx_bm_dropped),
 176         MRVL_XSTATS_TBL_ENTRY(rx_early_dropped),
 177         MRVL_XSTATS_TBL_ENTRY(rx_fifo_dropped),
 178         MRVL_XSTATS_TBL_ENTRY(rx_cls_dropped),
 179         MRVL_XSTATS_TBL_ENTRY(tx_bytes),
 180         MRVL_XSTATS_TBL_ENTRY(tx_packets),
 181         MRVL_XSTATS_TBL_ENTRY(tx_unicast_packets),
 182         MRVL_XSTATS_TBL_ENTRY(tx_errors)
 183 };
 184
 185 static inline void
 186 mrvl_fill_shadowq(struct mrvl_shadow_txq *sq, struct rte_mbuf *buf)
 187 {
 188         sq->ent[sq->head].buff.cookie = (uint64_t)buf;
 189         sq->ent[sq->head].buff.addr = buf ?
 190                 rte_mbuf_data_iova_default(buf) : 0;
 191
 192         sq->ent[sq->head].bpool =
 193                 (unlikely(!buf || buf->port >= RTE_MAX_ETHPORTS ||
 194                  buf->refcnt > 1)) ? NULL :
 195                  mrvl_port_to_bpool_lookup[buf->port];
 196
 197         sq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;
 198         sq->size++;
 199 }
 200
 201 static inline void
 202 mrvl_fill_desc(struct pp2_ppio_desc *desc, struct rte_mbuf *buf)
 203 {
 204         pp2_ppio_outq_desc_reset(desc);
 205         pp2_ppio_outq_desc_set_phys_addr(desc, rte_pktmbuf_iova(buf));
 206         pp2_ppio_outq_desc_set_pkt_offset(desc, 0);
 207         pp2_ppio_outq_desc_set_pkt_len(desc, rte_pktmbuf_data_len(buf));
 208 }
 209
 210 static inline int
 211 mrvl_get_bpool_size(int pp2_id, int pool_id)
 212 {
 213         int i;
 214         int size = 0;
 215
 216         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++)
 217                 size += mrvl_port_bpool_size[pp2_id][pool_id][i];
 218
 219         return size;
 220 }
 221
 222 static inline int
 223 mrvl_reserve_bit(int *bitmap, int max)
 224 {
 225         int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
 226
 227         if (n >= max)
 228                 return -1;
 229
 230         *bitmap |= 1 << n;
 231
 232         return n;
 233 }
 234
 235 static int
 236 mrvl_init_hif(int core_id)
 237 {
 238         struct pp2_hif_params params;
 239         char match[MRVL_MATCH_LEN];
 240         int ret;
 241
 242         ret = mrvl_reserve_bit(&used_hifs, MRVL_MUSDK_HIFS_MAX);
 243         if (ret < 0) {
 244                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 245                 return ret;
 246         }
 247
 248         snprintf(match, sizeof(match), "hif-%d", ret);
 249         memset(&params, 0, sizeof(params));
 250         params.match = match;
 251         params.out_size = MRVL_PP2_AGGR_TXQD_MAX;
 252         ret = pp2_hif_init(&params, &hifs[core_id]);
 253         if (ret) {
 254                 MRVL_LOG(ERR, "Failed to initialize hif %d", core_id);
 255                 return ret;
 256         }
 257
 258         return 0;
 259 }
 260
 261 static inline struct pp2_hif*
 262 mrvl_get_hif(struct mrvl_priv *priv, int core_id)
 263 {
 264         int ret;
 265
 266         if (likely(hifs[core_id] != NULL))
 267                 return hifs[core_id];
 268
 269         rte_spinlock_lock(&priv->lock);
 270
 271         ret = mrvl_init_hif(core_id);
 272         if (ret < 0) {
 273                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 274                 goto out;
 275         }
 276
 277         if (core_id < mrvl_lcore_first)
 278                 mrvl_lcore_first = core_id;
 279
 280         if (core_id > mrvl_lcore_last)
 281                 mrvl_lcore_last = core_id;
 282 out:
 283         rte_spinlock_unlock(&priv->lock);
 284
 285         return hifs[core_id];
 286 }
 287
 288 /**
 289  * Set tx burst function according to offload flag
 290  *
 291  * @param dev
 292  *   Pointer to Ethernet device structure.
 293  */
 294 static void
 295 mrvl_set_tx_function(struct rte_eth_dev *dev)
 296 {
 297         struct mrvl_priv *priv = dev->data->dev_private;
 298
 299         /* Use a simple Tx queue (no offloads, no multi segs) if possible */
 300         if (priv->multiseg) {
 301                 RTE_LOG(INFO, PMD, "Using multi-segment tx callback\n");
 302                 dev->tx_pkt_burst = mrvl_tx_sg_pkt_burst;
 303         } else {
 304                 RTE_LOG(INFO, PMD, "Using single-segment tx callback\n");
 305                 dev->tx_pkt_burst = mrvl_tx_pkt_burst;
 306         }
 307 }
 308
 309 /**
 310  * Configure rss based on dpdk rss configuration.
 311  *
 312  * @param priv
 313  *   Pointer to private structure.
 314  * @param rss_conf
 315  *   Pointer to RSS configuration.
 316  *
 317  * @return
 318  *   0 on success, negative error value otherwise.
 319  */
 320 static int
 321 mrvl_configure_rss(struct mrvl_priv *priv, struct rte_eth_rss_conf *rss_conf)
 322 {
 323         if (rss_conf->rss_key)
 324                 MRVL_LOG(WARNING, "Changing hash key is not supported");
 325
 326         if (rss_conf->rss_hf == 0) {
 327                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 328         } else if (rss_conf->rss_hf & ETH_RSS_IPV4) {
 329                 priv->ppio_params.inqs_params.hash_type =
 330                         PP2_PPIO_HASH_T_2_TUPLE;
 331         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
 332                 priv->ppio_params.inqs_params.hash_type =
 333                         PP2_PPIO_HASH_T_5_TUPLE;
 334                 priv->rss_hf_tcp = 1;
 335         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
 336                 priv->ppio_params.inqs_params.hash_type =
 337                         PP2_PPIO_HASH_T_5_TUPLE;
 338                 priv->rss_hf_tcp = 0;
 339         } else {
 340                 return -EINVAL;
 341         }
 342
 343         return 0;
 344 }
 345
 346 /**
 347  * Ethernet device configuration.
 348  *
 349  * Prepare the driver for a given number of TX and RX queues and
 350  * configure RSS.
 351  *
 352  * @param dev
 353  *   Pointer to Ethernet device structure.
 354  *
 355  * @return
 356  *   0 on success, negative error value otherwise.
 357  */
 358 static int
 359 mrvl_dev_configure(struct rte_eth_dev *dev)
 360 {
 361         struct mrvl_priv *priv = dev->data->dev_private;
 362         int ret;
 363
 364         if (priv->ppio) {
 365                 MRVL_LOG(INFO, "Device reconfiguration is not supported");
 366                 return -EINVAL;
 367         }
 368
 369         if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE &&
 370             dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
 371                 MRVL_LOG(INFO, "Unsupported rx multi queue mode %d",
 372                         dev->data->dev_conf.rxmode.mq_mode);
 373                 return -EINVAL;
 374         }
 375
 376         if (dev->data->dev_conf.rxmode.split_hdr_size) {
 377                 MRVL_LOG(INFO, "Split headers not supported");
 378                 return -EINVAL;
 379         }
 380
 381         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
 382                 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
 383                                  MRVL_PP2_ETH_HDRS_LEN;
 384
 385         if (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
 386                 priv->multiseg = 1;
 387
 388         ret = mrvl_configure_rxqs(priv, dev->data->port_id,
 389                                   dev->data->nb_rx_queues);
 390         if (ret < 0)
 391                 return ret;
 392
 393         ret = mrvl_configure_txqs(priv, dev->data->port_id,
 394                                   dev->data->nb_tx_queues);
 395         if (ret < 0)
 396                 return ret;
 397
 398         priv->ppio_params.outqs_params.num_outqs = dev->data->nb_tx_queues;
 399         priv->ppio_params.maintain_stats = 1;
 400         priv->nb_rx_queues = dev->data->nb_rx_queues;
 401
 402         ret = mrvl_tm_init(dev);
 403         if (ret < 0)
 404                 return ret;
 405
 406         if (dev->data->nb_rx_queues == 1 &&
 407             dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 408                 MRVL_LOG(WARNING, "Disabling hash for 1 rx queue");
 409                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 410
 411                 return 0;
 412         }
 413
 414         return mrvl_configure_rss(priv,
 415                         &dev->data->dev_conf.rx_adv_conf.rss_conf);
 416 }
 417
 418 /**
 419  * DPDK callback to change the MTU.
 420  *
 421  * Setting the MTU affects hardware MRU (packets larger than the MRU
 422  * will be dropped).
 423  *
 424  * @param dev
 425  *   Pointer to Ethernet device structure.
 426  * @param mtu
 427  *   New MTU.
 428  *
 429  * @return
 430  *   0 on success, negative error value otherwise.
 431  */
 432 static int
 433 mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 434 {
 435         struct mrvl_priv *priv = dev->data->dev_private;
 436         uint16_t mru;
 437         uint16_t mbuf_data_size = 0; /* SW buffer size */
 438         int ret;
 439
 440         mru = MRVL_PP2_MTU_TO_MRU(mtu);
 441         /*
 442          * min_rx_buf_size is equal to mbuf data size
 443          * if pmd didn't set it differently
 444          */
 445         mbuf_data_size = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
 446         /* Prevent PMD from:
 447          * - setting mru greater than the mbuf size resulting in
 448          * hw and sw buffer size mismatch
 449          * - setting mtu that requires the support of scattered packets
 450          * when this feature has not been enabled/supported so far
 451          * (TODO check scattered_rx flag here once scattered RX is supported).
 452          */
 453         if (mru - RTE_ETHER_CRC_LEN + MRVL_PKT_OFFS > mbuf_data_size) {
 454                 mru = mbuf_data_size + RTE_ETHER_CRC_LEN - MRVL_PKT_OFFS;
 455                 mtu = MRVL_PP2_MRU_TO_MTU(mru);
 456                 MRVL_LOG(WARNING, "MTU too big, max MTU possible limitted "
 457                         "by current mbuf size: %u. Set MTU to %u, MRU to %u",
 458                         mbuf_data_size, mtu, mru);
 459         }
 460
 461         if (mtu < RTE_ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX) {
 462                 MRVL_LOG(ERR, "Invalid MTU [%u] or MRU [%u]", mtu, mru);
 463                 return -EINVAL;
 464         }
 465
 466         dev->data->mtu = mtu;
 467         dev->data->dev_conf.rxmode.max_rx_pkt_len = mru - MV_MH_SIZE;
 468
 469         if (!priv->ppio)
 470                 return 0;
 471
 472         ret = pp2_ppio_set_mru(priv->ppio, mru);
 473         if (ret) {
 474                 MRVL_LOG(ERR, "Failed to change MRU");
 475                 return ret;
 476         }
 477
 478         ret = pp2_ppio_set_mtu(priv->ppio, mtu);
 479         if (ret) {
 480                 MRVL_LOG(ERR, "Failed to change MTU");
 481                 return ret;
 482         }
 483
 484         return 0;
 485 }
 486
 487 /**
 488  * DPDK callback to bring the link up.
 489  *
 490  * @param dev
 491  *   Pointer to Ethernet device structure.
 492  *
 493  * @return
 494  *   0 on success, negative error value otherwise.
 495  */
 496 static int
 497 mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 498 {
 499         struct mrvl_priv *priv = dev->data->dev_private;
 500         int ret;
 501
 502         if (!priv->ppio) {
 503                 dev->data->dev_link.link_status = ETH_LINK_UP;
 504                 return 0;
 505         }
 506
 507         ret = pp2_ppio_enable(priv->ppio);
 508         if (ret)
 509                 return ret;
 510
 511         /*
 512          * mtu/mru can be updated if pp2_ppio_enable() was called at least once
 513          * as pp2_ppio_enable() changes port->t_mode from default 0 to
 514          * PP2_TRAFFIC_INGRESS_EGRESS.
 515          *
 516          * Set mtu to default DPDK value here.
 517          */
 518         ret = mrvl_mtu_set(dev, dev->data->mtu);
 519         if (ret) {
 520                 pp2_ppio_disable(priv->ppio);
 521                 return ret;
 522         }
 523
 524         dev->data->dev_link.link_status = ETH_LINK_UP;
 525         return 0;
 526 }
 527
 528 /**
 529  * DPDK callback to bring the link down.
 530  *
 531  * @param dev
 532  *   Pointer to Ethernet device structure.
 533  *
 534  * @return
 535  *   0 on success, negative error value otherwise.
 536  */
 537 static int
 538 mrvl_dev_set_link_down(struct rte_eth_dev *dev)
 539 {
 540         struct mrvl_priv *priv = dev->data->dev_private;
 541         int ret;
 542
 543         if (!priv->ppio) {
 544                 dev->data->dev_link.link_status = ETH_LINK_DOWN;
 545                 return 0;
 546         }
 547         ret = pp2_ppio_disable(priv->ppio);
 548         if (ret)
 549                 return ret;
 550
 551         dev->data->dev_link.link_status = ETH_LINK_DOWN;
 552         return 0;
 553 }
 554
 555 /**
 556  * DPDK callback to start tx queue.
 557  *
 558  * @param dev
 559  *   Pointer to Ethernet device structure.
 560  * @param queue_id
 561  *   Transmit queue index.
 562  *
 563  * @return
 564  *   0 on success, negative error value otherwise.
 565  */
 566 static int
 567 mrvl_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id)
 568 {
 569         struct mrvl_priv *priv = dev->data->dev_private;
 570         int ret;
 571
 572         if (!priv)
 573                 return -EPERM;
 574
 575         /* passing 1 enables given tx queue */
 576         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 1);
 577         if (ret) {
 578                 MRVL_LOG(ERR, "Failed to start txq %d", queue_id);
 579                 return ret;
 580         }
 581
 582         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 583
 584         return 0;
 585 }
 586
 587 /**
 588  * DPDK callback to stop tx queue.
 589  *
 590  * @param dev
 591  *   Pointer to Ethernet device structure.
 592  * @param queue_id
 593  *   Transmit queue index.
 594  *
 595  * @return
 596  *   0 on success, negative error value otherwise.
 597  */
 598 static int
 599 mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id)
 600 {
 601         struct mrvl_priv *priv = dev->data->dev_private;
 602         int ret;
 603
 604         if (!priv->ppio)
 605                 return -EPERM;
 606
 607         /* passing 0 disables given tx queue */
 608         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 0);
 609         if (ret) {
 610                 MRVL_LOG(ERR, "Failed to stop txq %d", queue_id);
 611                 return ret;
 612         }
 613
 614         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 615
 616         return 0;
 617 }
 618
 619 /**
 620  * Populate VLAN Filter configuration.
 621  *
 622  * @param dev
 623  *   Pointer to Ethernet device structure.
 624  * @param on
 625  *   Toggle filter.
 626  *
 627  * @return
 628  *   0 on success, negative error value otherwise.
 629  */
 630 static int mrvl_populate_vlan_table(struct rte_eth_dev *dev, int on)
 631 {
 632         uint32_t j;
 633         int ret;
 634         struct rte_vlan_filter_conf *vfc;
 635
 636         vfc = &dev->data->vlan_filter_conf;
 637         for (j = 0; j < RTE_DIM(vfc->ids); j++) {
 638                 uint64_t vlan;
 639                 uint64_t vbit;
 640                 uint64_t ids = vfc->ids[j];
 641
 642                 if (ids == 0)
 643                         continue;
 644
 645                 while (ids) {
 646                         vlan = 64 * j;
 647                         /* count trailing zeroes */
 648                         vbit = ~ids & (ids - 1);
 649                         /* clear least significant bit set */
 650                         ids ^= (ids ^ (ids - 1)) ^ vbit;
 651                         for (; vbit; vlan++)
 652                                 vbit >>= 1;
 653                         ret = mrvl_vlan_filter_set(dev, vlan, on);
 654                         if (ret) {
 655                                 MRVL_LOG(ERR, "Failed to setup VLAN filter\n");
 656                                 return ret;
 657                         }
 658                 }
 659         }
 660
 661         return 0;
 662 }
 663
 664 /**
 665  * DPDK callback to start the device.
 666  *
 667  * @param dev
 668  *   Pointer to Ethernet device structure.
 669  *
 670  * @return
 671  *   0 on success, negative errno value on failure.
 672  */
 673 static int
 674 mrvl_dev_start(struct rte_eth_dev *dev)
 675 {
 676         struct mrvl_priv *priv = dev->data->dev_private;
 677         char match[MRVL_MATCH_LEN];
 678         int ret = 0, i, def_init_size;
 679         struct rte_ether_addr *mac_addr;
 680
 681         if (priv->ppio)
 682                 return mrvl_dev_set_link_up(dev);
 683
 684         snprintf(match, sizeof(match), "ppio-%d:%d",
 685                  priv->pp_id, priv->ppio_id);
 686         priv->ppio_params.match = match;
 687
 688         /*
 689          * Calculate the minimum bpool size for refill feature as follows:
 690          * 2 default burst sizes multiply by number of rx queues.
 691          * If the bpool size will be below this value, new buffers will
 692          * be added to the pool.
 693          */
 694         priv->bpool_min_size = priv->nb_rx_queues * MRVL_BURST_SIZE * 2;
 695
 696         /* In case initial bpool size configured in queues setup is
 697          * smaller than minimum size add more buffers
 698          */
 699         def_init_size = priv->bpool_min_size + MRVL_BURST_SIZE * 2;
 700         if (priv->bpool_init_size < def_init_size) {
 701                 int buffs_to_add = def_init_size - priv->bpool_init_size;
 702
 703                 priv->bpool_init_size += buffs_to_add;
 704                 ret = mrvl_fill_bpool(dev->data->rx_queues[0], buffs_to_add);
 705                 if (ret)
 706                         MRVL_LOG(ERR, "Failed to add buffers to bpool");
 707         }
 708
 709         /*
 710          * Calculate the maximum bpool size for refill feature as follows:
 711          * maximum number of descriptors in rx queue multiply by number
 712          * of rx queues plus minimum bpool size.
 713          * In case the bpool size will exceed this value, superfluous buffers
 714          * will be removed
 715          */
 716         priv->bpool_max_size = (priv->nb_rx_queues * MRVL_PP2_RXD_MAX) +
 717                                 priv->bpool_min_size;
 718
 719         ret = pp2_ppio_init(&priv->ppio_params, &priv->ppio);
 720         if (ret) {
 721                 MRVL_LOG(ERR, "Failed to init ppio");
 722                 return ret;
 723         }
 724
 725         /*
 726          * In case there are some some stale uc/mc mac addresses flush them
 727          * here. It cannot be done during mrvl_dev_close() as port information
 728          * is already gone at that point (due to pp2_ppio_deinit() in
 729          * mrvl_dev_stop()).
 730          */
 731         if (!priv->uc_mc_flushed) {
 732                 ret = pp2_ppio_flush_mac_addrs(priv->ppio, 1, 1);
 733                 if (ret) {
 734                         MRVL_LOG(ERR,
 735                                 "Failed to flush uc/mc filter list");
 736                         goto out;
 737                 }
 738                 priv->uc_mc_flushed = 1;
 739         }
 740
 741         ret = mrvl_mtu_set(dev, dev->data->mtu);
 742         if (ret)
 743                 MRVL_LOG(ERR, "Failed to set MTU to %d", dev->data->mtu);
 744
 745         if (!rte_is_zero_ether_addr(&dev->data->mac_addrs[0]))
 746                 mrvl_mac_addr_set(dev, &dev->data->mac_addrs[0]);
 747
 748         for (i = 1; i < MRVL_MAC_ADDRS_MAX; i++) {
 749                 mac_addr = &dev->data->mac_addrs[i];
 750
 751                 /* skip zero address */
 752                 if (rte_is_zero_ether_addr(mac_addr))
 753                         continue;
 754
 755                 mrvl_mac_addr_add(dev, mac_addr, i, 0);
 756         }
 757
 758         if (dev->data->all_multicast == 1)
 759                 mrvl_allmulticast_enable(dev);
 760
 761         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_FILTER) {
 762                 ret = mrvl_populate_vlan_table(dev, 1);
 763                 if (ret) {
 764                         MRVL_LOG(ERR, "Failed to populate VLAN table");
 765                         goto out;
 766                 }
 767         }
 768
 769         /* For default QoS config, don't start classifier. */
 770         if (mrvl_qos_cfg  &&
 771             mrvl_qos_cfg->port[dev->data->port_id].use_global_defaults == 0) {
 772                 ret = mrvl_start_qos_mapping(priv);
 773                 if (ret) {
 774                         MRVL_LOG(ERR, "Failed to setup QoS mapping");
 775                         goto out;
 776                 }
 777         }
 778
 779         ret = pp2_ppio_set_loopback(priv->ppio, dev->data->dev_conf.lpbk_mode);
 780         if (ret) {
 781                 MRVL_LOG(ERR, "Failed to set loopback");
 782                 goto out;
 783         }
 784
 785         if (dev->data->promiscuous == 1)
 786                 mrvl_promiscuous_enable(dev);
 787
 788         if (dev->data->dev_link.link_status == ETH_LINK_UP) {
 789                 ret = mrvl_dev_set_link_up(dev);
 790                 if (ret) {
 791                         MRVL_LOG(ERR, "Failed to set link up");
 792                         dev->data->dev_link.link_status = ETH_LINK_DOWN;
 793                         goto out;
 794                 }
 795         }
 796
 797         /* start tx queues */
 798         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 799                 struct mrvl_txq *txq = dev->data->tx_queues[i];
 800
 801                 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
 802
 803                 if (!txq->tx_deferred_start)
 804                         continue;
 805
 806                 /*
 807                  * All txqs are started by default. Stop them
 808                  * so that tx_deferred_start works as expected.
 809                  */
 810                 ret = mrvl_tx_queue_stop(dev, i);
 811                 if (ret)
 812                         goto out;
 813         }
 814
 815         mrvl_flow_init(dev);
 816         mrvl_mtr_init(dev);
 817         mrvl_set_tx_function(dev);
 818
 819         return 0;
 820 out:
 821         MRVL_LOG(ERR, "Failed to start device");
 822         pp2_ppio_deinit(priv->ppio);
 823         return ret;
 824 }
 825
 826 /**
 827  * Flush receive queues.
 828  *
 829  * @param dev
 830  *   Pointer to Ethernet device structure.
 831  */
 832 static void
 833 mrvl_flush_rx_queues(struct rte_eth_dev *dev)
 834 {
 835         int i;
 836
 837         MRVL_LOG(INFO, "Flushing rx queues");
 838         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 839                 int ret, num;
 840
 841                 do {
 842                         struct mrvl_rxq *q = dev->data->rx_queues[i];
 843                         struct pp2_ppio_desc descs[MRVL_PP2_RXD_MAX];
 844
 845                         num = MRVL_PP2_RXD_MAX;
 846                         ret = pp2_ppio_recv(q->priv->ppio,
 847                                             q->priv->rxq_map[q->queue_id].tc,
 848                                             q->priv->rxq_map[q->queue_id].inq,
 849                                             descs, (uint16_t *)&num);
 850                 } while (ret == 0 && num);
 851         }
 852 }
 853
 854 /**
 855  * Flush transmit shadow queues.
 856  *
 857  * @param dev
 858  *   Pointer to Ethernet device structure.
 859  */
 860 static void
 861 mrvl_flush_tx_shadow_queues(struct rte_eth_dev *dev)
 862 {
 863         int i, j;
 864         struct mrvl_txq *txq;
 865
 866         MRVL_LOG(INFO, "Flushing tx shadow queues");
 867         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 868                 txq = (struct mrvl_txq *)dev->data->tx_queues[i];
 869
 870                 for (j = 0; j < RTE_MAX_LCORE; j++) {
 871                         struct mrvl_shadow_txq *sq;
 872
 873                         if (!hifs[j])
 874                                 continue;
 875
 876                         sq = &txq->shadow_txqs[j];
 877                         mrvl_free_sent_buffers(txq->priv->ppio,
 878                                 hifs[j], j, sq, txq->queue_id, 1);
 879                         while (sq->tail != sq->head) {
 880                                 uint64_t addr = cookie_addr_high |
 881                                         sq->ent[sq->tail].buff.cookie;
 882                                 rte_pktmbuf_free(
 883                                         (struct rte_mbuf *)addr);
 884                                 sq->tail = (sq->tail + 1) &
 885                                             MRVL_PP2_TX_SHADOWQ_MASK;
 886                         }
 887                         memset(sq, 0, sizeof(*sq));
 888                 }
 889         }
 890 }
 891
 892 /**
 893  * Flush hardware bpool (buffer-pool).
 894  *
 895  * @param dev
 896  *   Pointer to Ethernet device structure.
 897  */
 898 static void
 899 mrvl_flush_bpool(struct rte_eth_dev *dev)
 900 {
 901         struct mrvl_priv *priv = dev->data->dev_private;
 902         struct pp2_hif *hif;
 903         uint32_t num;
 904         int ret;
 905         unsigned int core_id = rte_lcore_id();
 906
 907         if (core_id == LCORE_ID_ANY)
 908                 core_id = rte_get_main_lcore();
 909
 910         hif = mrvl_get_hif(priv, core_id);
 911
 912         ret = pp2_bpool_get_num_buffs(priv->bpool, &num);
 913         if (ret) {
 914                 MRVL_LOG(ERR, "Failed to get bpool buffers number");
 915                 return;
 916         }
 917
 918         while (num--) {
 919                 struct pp2_buff_inf inf;
 920                 uint64_t addr;
 921
 922                 ret = pp2_bpool_get_buff(hif, priv->bpool, &inf);
 923                 if (ret)
 924                         break;
 925
 926                 addr = cookie_addr_high | inf.cookie;
 927                 rte_pktmbuf_free((struct rte_mbuf *)addr);
 928         }
 929 }
 930
 931 /**
 932  * DPDK callback to stop the device.
 933  *
 934  * @param dev
 935  *   Pointer to Ethernet device structure.
 936  */
 937 static int
 938 mrvl_dev_stop(struct rte_eth_dev *dev)
 939 {
 940         return mrvl_dev_set_link_down(dev);
 941 }
 942
 943 /**
 944  * DPDK callback to close the device.
 945  *
 946  * @param dev
 947  *   Pointer to Ethernet device structure.
 948  */
 949 static int
 950 mrvl_dev_close(struct rte_eth_dev *dev)
 951 {
 952         struct mrvl_priv *priv = dev->data->dev_private;
 953         size_t i;
 954
 955         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 956                 return 0;
 957
 958         mrvl_flush_rx_queues(dev);
 959         mrvl_flush_tx_shadow_queues(dev);
 960         mrvl_flow_deinit(dev);
 961         mrvl_mtr_deinit(dev);
 962
 963         for (i = 0; i < priv->ppio_params.inqs_params.num_tcs; ++i) {
 964                 struct pp2_ppio_tc_params *tc_params =
 965                         &priv->ppio_params.inqs_params.tcs_params[i];
 966
 967                 if (tc_params->inqs_params) {
 968                         rte_free(tc_params->inqs_params);
 969                         tc_params->inqs_params = NULL;
 970                 }
 971         }
 972
 973         if (priv->cls_tbl) {
 974                 pp2_cls_tbl_deinit(priv->cls_tbl);
 975                 priv->cls_tbl = NULL;
 976         }
 977
 978         if (priv->qos_tbl) {
 979                 pp2_cls_qos_tbl_deinit(priv->qos_tbl);
 980                 priv->qos_tbl = NULL;
 981         }
 982
 983         mrvl_flush_bpool(dev);
 984         mrvl_tm_deinit(dev);
 985
 986         if (priv->ppio) {
 987                 pp2_ppio_deinit(priv->ppio);
 988                 priv->ppio = NULL;
 989         }
 990
 991         /* policer must be released after ppio deinitialization */
 992         if (priv->default_policer) {
 993                 pp2_cls_plcr_deinit(priv->default_policer);
 994                 priv->default_policer = NULL;
 995         }
 996
 997
 998         if (priv->bpool) {
 999                 pp2_bpool_deinit(priv->bpool);
1000                 used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
1001                 priv->bpool = NULL;
1002         }
1003
1004         mrvl_dev_num--;
1005
1006         if (mrvl_dev_num == 0) {
1007                 MRVL_LOG(INFO, "Perform MUSDK deinit");
1008                 mrvl_deinit_hifs();
1009                 mrvl_deinit_pp2();
1010                 rte_mvep_deinit(MVEP_MOD_T_PP2);
1011         }
1012
1013         return 0;
1014 }
1015
1016 /**
1017  * DPDK callback to retrieve physical link information.
1018  *
1019  * @param dev
1020  *   Pointer to Ethernet device structure.
1021  * @param wait_to_complete
1022  *   Wait for request completion (ignored).
1023  *
1024  * @return
1025  *   0 on success, negative error value otherwise.
1026  */
1027 static int
1028 mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
1029 {
1030         /*
1031          * TODO
1032          * once MUSDK provides necessary API use it here
1033          */
1034         struct mrvl_priv *priv = dev->data->dev_private;
1035         struct ethtool_cmd edata;
1036         struct ifreq req;
1037         int ret, fd, link_up;
1038
1039         if (!priv->ppio)
1040                 return -EPERM;
1041
1042         edata.cmd = ETHTOOL_GSET;
1043
1044         strcpy(req.ifr_name, dev->data->name);
1045         req.ifr_data = (void *)&edata;
1046
1047         fd = socket(AF_INET, SOCK_DGRAM, 0);
1048         if (fd == -1)
1049                 return -EFAULT;
1050
1051         ret = ioctl(fd, SIOCETHTOOL, &req);
1052         if (ret == -1) {
1053                 close(fd);
1054                 return -EFAULT;
1055         }
1056
1057         close(fd);
1058
1059         switch (ethtool_cmd_speed(&edata)) {
1060         case SPEED_10:
1061                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10M;
1062                 break;
1063         case SPEED_100:
1064                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_100M;
1065                 break;
1066         case SPEED_1000:
1067                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G;
1068                 break;
1069         case SPEED_10000:
1070                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G;
1071                 break;
1072         default:
1073                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_NONE;
1074         }
1075
1076         dev->data->dev_link.link_duplex = edata.duplex ? ETH_LINK_FULL_DUPLEX :
1077                                                          ETH_LINK_HALF_DUPLEX;
1078         dev->data->dev_link.link_autoneg = edata.autoneg ? ETH_LINK_AUTONEG :
1079                                                            ETH_LINK_FIXED;
1080         pp2_ppio_get_link_state(priv->ppio, &link_up);
1081         dev->data->dev_link.link_status = link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
1082
1083         return 0;
1084 }
1085
1086 /**
1087  * DPDK callback to enable promiscuous mode.
1088  *
1089  * @param dev
1090  *   Pointer to Ethernet device structure.
1091  *
1092  * @return
1093  *   0 on success, negative error value otherwise.
1094  */
1095 static int
1096 mrvl_promiscuous_enable(struct rte_eth_dev *dev)
1097 {
1098         struct mrvl_priv *priv = dev->data->dev_private;
1099         int ret;
1100
1101         if (priv->isolated)
1102                 return -ENOTSUP;
1103
1104         if (!priv->ppio)
1105                 return 0;
1106
1107         ret = pp2_ppio_set_promisc(priv->ppio, 1);
1108         if (ret) {
1109                 MRVL_LOG(ERR, "Failed to enable promiscuous mode");
1110                 return -EAGAIN;
1111         }
1112
1113         return 0;
1114 }
1115
1116 /**
1117  * DPDK callback to enable allmulti mode.
1118  *
1119  * @param dev
1120  *   Pointer to Ethernet device structure.
1121  *
1122  * @return
1123  *   0 on success, negative error value otherwise.
1124  */
1125 static int
1126 mrvl_allmulticast_enable(struct rte_eth_dev *dev)
1127 {
1128         struct mrvl_priv *priv = dev->data->dev_private;
1129         int ret;
1130
1131         if (priv->isolated)
1132                 return -ENOTSUP;
1133
1134         if (!priv->ppio)
1135                 return 0;
1136
1137         ret = pp2_ppio_set_mc_promisc(priv->ppio, 1);
1138         if (ret) {
1139                 MRVL_LOG(ERR, "Failed enable all-multicast mode");
1140                 return -EAGAIN;
1141         }
1142
1143         return 0;
1144 }
1145
1146 /**
1147  * DPDK callback to disable promiscuous mode.
1148  *
1149  * @param dev
1150  *   Pointer to Ethernet device structure.
1151  *
1152  * @return
1153  *   0 on success, negative error value otherwise.
1154  */
1155 static int
1156 mrvl_promiscuous_disable(struct rte_eth_dev *dev)
1157 {
1158         struct mrvl_priv *priv = dev->data->dev_private;
1159         int ret;
1160
1161         if (priv->isolated)
1162                 return -ENOTSUP;
1163
1164         if (!priv->ppio)
1165                 return 0;
1166
1167         ret = pp2_ppio_set_promisc(priv->ppio, 0);
1168         if (ret) {
1169                 MRVL_LOG(ERR, "Failed to disable promiscuous mode");
1170                 return -EAGAIN;
1171         }
1172
1173         return 0;
1174 }
1175
1176 /**
1177  * DPDK callback to disable allmulticast mode.
1178  *
1179  * @param dev
1180  *   Pointer to Ethernet device structure.
1181  *
1182  * @return
1183  *   0 on success, negative error value otherwise.
1184  */
1185 static int
1186 mrvl_allmulticast_disable(struct rte_eth_dev *dev)
1187 {
1188         struct mrvl_priv *priv = dev->data->dev_private;
1189         int ret;
1190
1191         if (priv->isolated)
1192                 return -ENOTSUP;
1193
1194         if (!priv->ppio)
1195                 return 0;
1196
1197         ret = pp2_ppio_set_mc_promisc(priv->ppio, 0);
1198         if (ret) {
1199                 MRVL_LOG(ERR, "Failed to disable all-multicast mode");
1200                 return -EAGAIN;
1201         }
1202
1203         return 0;
1204 }
1205
1206 /**
1207  * DPDK callback to remove a MAC address.
1208  *
1209  * @param dev
1210  *   Pointer to Ethernet device structure.
1211  * @param index
1212  *   MAC address index.
1213  */
1214 static void
1215 mrvl_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
1216 {
1217         struct mrvl_priv *priv = dev->data->dev_private;
1218         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1219         int ret;
1220
1221         if (priv->isolated)
1222                 return;
1223
1224         if (!priv->ppio)
1225                 return;
1226
1227         ret = pp2_ppio_remove_mac_addr(priv->ppio,
1228                                        dev->data->mac_addrs[index].addr_bytes);
1229         if (ret) {
1230                 rte_ether_format_addr(buf, sizeof(buf),
1231                                   &dev->data->mac_addrs[index]);
1232                 MRVL_LOG(ERR, "Failed to remove mac %s", buf);
1233         }
1234 }
1235
1236 /**
1237  * DPDK callback to add a MAC address.
1238  *
1239  * @param dev
1240  *   Pointer to Ethernet device structure.
1241  * @param mac_addr
1242  *   MAC address to register.
1243  * @param index
1244  *   MAC address index.
1245  * @param vmdq
1246  *   VMDq pool index to associate address with (unused).
1247  *
1248  * @return
1249  *   0 on success, negative error value otherwise.
1250  */
1251 static int
1252 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
1253                   uint32_t index, uint32_t vmdq __rte_unused)
1254 {
1255         struct mrvl_priv *priv = dev->data->dev_private;
1256         char buf[RTE_ETHER_ADDR_FMT_SIZE];
1257         int ret;
1258
1259         if (priv->isolated)
1260                 return -ENOTSUP;
1261
1262         if (!priv->ppio)
1263                 return 0;
1264
1265         if (index == 0)
1266                 /* For setting index 0, mrvl_mac_addr_set() should be used.*/
1267                 return -1;
1268
1269         /*
1270          * Maximum number of uc addresses can be tuned via kernel module mvpp2x
1271          * parameter uc_filter_max. Maximum number of mc addresses is then
1272          * MRVL_MAC_ADDRS_MAX - uc_filter_max. Currently it defaults to 4 and
1273          * 21 respectively.
1274          *
1275          * If more than uc_filter_max uc addresses were added to filter list
1276          * then NIC will switch to promiscuous mode automatically.
1277          *
1278          * If more than MRVL_MAC_ADDRS_MAX - uc_filter_max number mc addresses
1279          * were added to filter list then NIC will switch to all-multicast mode
1280          * automatically.
1281          */
1282         ret = pp2_ppio_add_mac_addr(priv->ppio, mac_addr->addr_bytes);
1283         if (ret) {
1284                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1285                 MRVL_LOG(ERR, "Failed to add mac %s", buf);
1286                 return -1;
1287         }
1288
1289         return 0;
1290 }
1291
1292 /**
1293  * DPDK callback to set the primary MAC address.
1294  *
1295  * @param dev
1296  *   Pointer to Ethernet device structure.
1297  * @param mac_addr
1298  *   MAC address to register.
1299  *
1300  * @return
1301  *   0 on success, negative error value otherwise.
1302  */
1303 static int
1304 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr)
1305 {
1306         struct mrvl_priv *priv = dev->data->dev_private;
1307         int ret;
1308
1309         if (priv->isolated)
1310                 return -ENOTSUP;
1311
1312         if (!priv->ppio)
1313                 return 0;
1314
1315         ret = pp2_ppio_set_mac_addr(priv->ppio, mac_addr->addr_bytes);
1316         if (ret) {
1317                 char buf[RTE_ETHER_ADDR_FMT_SIZE];
1318                 rte_ether_format_addr(buf, sizeof(buf), mac_addr);
1319                 MRVL_LOG(ERR, "Failed to set mac to %s", buf);
1320         }
1321
1322         return ret;
1323 }
1324
1325 /**
1326  * DPDK callback to get device statistics.
1327  *
1328  * @param dev
1329  *   Pointer to Ethernet device structure.
1330  * @param stats
1331  *   Stats structure output buffer.
1332  *
1333  * @return
1334  *   0 on success, negative error value otherwise.
1335  */
1336 static int
1337 mrvl_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1338 {
1339         struct mrvl_priv *priv = dev->data->dev_private;
1340         struct pp2_ppio_statistics ppio_stats;
1341         uint64_t drop_mac = 0;
1342         unsigned int i, idx, ret;
1343
1344         if (!priv->ppio)
1345                 return -EPERM;
1346
1347         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1348                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1349                 struct pp2_ppio_inq_statistics rx_stats;
1350
1351                 if (!rxq)
1352                         continue;
1353
1354                 idx = rxq->queue_id;
1355                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1356                         MRVL_LOG(ERR,
1357                                 "rx queue %d stats out of range (0 - %d)",
1358                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1359                         continue;
1360                 }
1361
1362                 ret = pp2_ppio_inq_get_statistics(priv->ppio,
1363                                                   priv->rxq_map[idx].tc,
1364                                                   priv->rxq_map[idx].inq,
1365                                                   &rx_stats, 0);
1366                 if (unlikely(ret)) {
1367                         MRVL_LOG(ERR,
1368                                 "Failed to update rx queue %d stats", idx);
1369                         break;
1370                 }
1371
1372                 stats->q_ibytes[idx] = rxq->bytes_recv;
1373                 stats->q_ipackets[idx] = rx_stats.enq_desc - rxq->drop_mac;
1374                 stats->q_errors[idx] = rx_stats.drop_early +
1375                                        rx_stats.drop_fullq +
1376                                        rx_stats.drop_bm +
1377                                        rxq->drop_mac;
1378                 stats->ibytes += rxq->bytes_recv;
1379                 drop_mac += rxq->drop_mac;
1380         }
1381
1382         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1383                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1384                 struct pp2_ppio_outq_statistics tx_stats;
1385
1386                 if (!txq)
1387                         continue;
1388
1389                 idx = txq->queue_id;
1390                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1391                         MRVL_LOG(ERR,
1392                                 "tx queue %d stats out of range (0 - %d)",
1393                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1394                 }
1395
1396                 ret = pp2_ppio_outq_get_statistics(priv->ppio, idx,
1397                                                    &tx_stats, 0);
1398                 if (unlikely(ret)) {
1399                         MRVL_LOG(ERR,
1400                                 "Failed to update tx queue %d stats", idx);
1401                         break;
1402                 }
1403
1404                 stats->q_opackets[idx] = tx_stats.deq_desc;
1405                 stats->q_obytes[idx] = txq->bytes_sent;
1406                 stats->obytes += txq->bytes_sent;
1407         }
1408
1409         ret = pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1410         if (unlikely(ret)) {
1411                 MRVL_LOG(ERR, "Failed to update port statistics");
1412                 return ret;
1413         }
1414
1415         stats->ipackets += ppio_stats.rx_packets - drop_mac;
1416         stats->opackets += ppio_stats.tx_packets;
1417         stats->imissed += ppio_stats.rx_fullq_dropped +
1418                           ppio_stats.rx_bm_dropped +
1419                           ppio_stats.rx_early_dropped +
1420                           ppio_stats.rx_fifo_dropped +
1421                           ppio_stats.rx_cls_dropped;
1422         stats->ierrors = drop_mac;
1423
1424         return 0;
1425 }
1426
1427 /**
1428  * DPDK callback to clear device statistics.
1429  *
1430  * @param dev
1431  *   Pointer to Ethernet device structure.
1432  *
1433  * @return
1434  *   0 on success, negative error value otherwise.
1435  */
1436 static int
1437 mrvl_stats_reset(struct rte_eth_dev *dev)
1438 {
1439         struct mrvl_priv *priv = dev->data->dev_private;
1440         int i;
1441
1442         if (!priv->ppio)
1443                 return 0;
1444
1445         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1446                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1447
1448                 pp2_ppio_inq_get_statistics(priv->ppio, priv->rxq_map[i].tc,
1449                                             priv->rxq_map[i].inq, NULL, 1);
1450                 rxq->bytes_recv = 0;
1451                 rxq->drop_mac = 0;
1452         }
1453
1454         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1455                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1456
1457                 pp2_ppio_outq_get_statistics(priv->ppio, i, NULL, 1);
1458                 txq->bytes_sent = 0;
1459         }
1460
1461         return pp2_ppio_get_statistics(priv->ppio, NULL, 1);
1462 }
1463
1464 /**
1465  * DPDK callback to get extended statistics.
1466  *
1467  * @param dev
1468  *   Pointer to Ethernet device structure.
1469  * @param stats
1470  *   Pointer to xstats table.
1471  * @param n
1472  *   Number of entries in xstats table.
1473  * @return
1474  *   Negative value on error, number of read xstats otherwise.
1475  */
1476 static int
1477 mrvl_xstats_get(struct rte_eth_dev *dev,
1478                 struct rte_eth_xstat *stats, unsigned int n)
1479 {
1480         struct mrvl_priv *priv = dev->data->dev_private;
1481         struct pp2_ppio_statistics ppio_stats;
1482         unsigned int i;
1483
1484         if (!stats)
1485                 return 0;
1486
1487         pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1488         for (i = 0; i < n && i < RTE_DIM(mrvl_xstats_tbl); i++) {
1489                 uint64_t val;
1490
1491                 if (mrvl_xstats_tbl[i].size == sizeof(uint32_t))
1492                         val = *(uint32_t *)((uint8_t *)&ppio_stats +
1493                                             mrvl_xstats_tbl[i].offset);
1494                 else if (mrvl_xstats_tbl[i].size == sizeof(uint64_t))
1495                         val = *(uint64_t *)((uint8_t *)&ppio_stats +
1496                                             mrvl_xstats_tbl[i].offset);
1497                 else
1498                         return -EINVAL;
1499
1500                 stats[i].id = i;
1501                 stats[i].value = val;
1502         }
1503
1504         return n;
1505 }
1506
1507 /**
1508  * DPDK callback to reset extended statistics.
1509  *
1510  * @param dev
1511  *   Pointer to Ethernet device structure.
1512  *
1513  * @return
1514  *   0 on success, negative error value otherwise.
1515  */
1516 static int
1517 mrvl_xstats_reset(struct rte_eth_dev *dev)
1518 {
1519         return mrvl_stats_reset(dev);
1520 }
1521
1522 /**
1523  * DPDK callback to get extended statistics names.
1524  *
1525  * @param dev (unused)
1526  *   Pointer to Ethernet device structure.
1527  * @param xstats_names
1528  *   Pointer to xstats names table.
1529  * @param size
1530  *   Size of the xstats names table.
1531  * @return
1532  *   Number of read names.
1533  */
1534 static int
1535 mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
1536                       struct rte_eth_xstat_name *xstats_names,
1537                       unsigned int size)
1538 {
1539         unsigned int i;
1540
1541         if (!xstats_names)
1542                 return RTE_DIM(mrvl_xstats_tbl);
1543
1544         for (i = 0; i < size && i < RTE_DIM(mrvl_xstats_tbl); i++)
1545                 strlcpy(xstats_names[i].name, mrvl_xstats_tbl[i].name,
1546                         RTE_ETH_XSTATS_NAME_SIZE);
1547
1548         return size;
1549 }
1550
1551 /**
1552  * DPDK callback to get information about the device.
1553  *
1554  * @param dev
1555  *   Pointer to Ethernet device structure (unused).
1556  * @param info
1557  *   Info structure output buffer.
1558  */
1559 static int
1560 mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
1561                    struct rte_eth_dev_info *info)
1562 {
1563         info->speed_capa = ETH_LINK_SPEED_10M |
1564                            ETH_LINK_SPEED_100M |
1565                            ETH_LINK_SPEED_1G |
1566                            ETH_LINK_SPEED_10G;
1567
1568         info->max_rx_queues = MRVL_PP2_RXQ_MAX;
1569         info->max_tx_queues = MRVL_PP2_TXQ_MAX;
1570         info->max_mac_addrs = MRVL_MAC_ADDRS_MAX;
1571
1572         info->rx_desc_lim.nb_max = MRVL_PP2_RXD_MAX;
1573         info->rx_desc_lim.nb_min = MRVL_PP2_RXD_MIN;
1574         info->rx_desc_lim.nb_align = MRVL_PP2_RXD_ALIGN;
1575
1576         info->tx_desc_lim.nb_max = MRVL_PP2_TXD_MAX;
1577         info->tx_desc_lim.nb_min = MRVL_PP2_TXD_MIN;
1578         info->tx_desc_lim.nb_align = MRVL_PP2_TXD_ALIGN;
1579
1580         info->rx_offload_capa = MRVL_RX_OFFLOADS;
1581         info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
1582
1583         info->tx_offload_capa = MRVL_TX_OFFLOADS;
1584         info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
1585
1586         info->flow_type_rss_offloads = ETH_RSS_IPV4 |
1587                                        ETH_RSS_NONFRAG_IPV4_TCP |
1588                                        ETH_RSS_NONFRAG_IPV4_UDP;
1589
1590         /* By default packets are dropped if no descriptors are available */
1591         info->default_rxconf.rx_drop_en = 1;
1592
1593         info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
1594
1595         return 0;
1596 }
1597
1598 /**
1599  * Return supported packet types.
1600  *
1601  * @param dev
1602  *   Pointer to Ethernet device structure (unused).
1603  *
1604  * @return
1605  *   Const pointer to the table with supported packet types.
1606  */
1607 static const uint32_t *
1608 mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
1609 {
1610         static const uint32_t ptypes[] = {
1611                 RTE_PTYPE_L2_ETHER,
1612                 RTE_PTYPE_L2_ETHER_VLAN,
1613                 RTE_PTYPE_L2_ETHER_QINQ,
1614                 RTE_PTYPE_L3_IPV4,
1615                 RTE_PTYPE_L3_IPV4_EXT,
1616                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
1617                 RTE_PTYPE_L3_IPV6,
1618                 RTE_PTYPE_L3_IPV6_EXT,
1619                 RTE_PTYPE_L2_ETHER_ARP,
1620                 RTE_PTYPE_L4_TCP,
1621                 RTE_PTYPE_L4_UDP
1622         };
1623
1624         return ptypes;
1625 }
1626
1627 /**
1628  * DPDK callback to get information about specific receive queue.
1629  *
1630  * @param dev
1631  *   Pointer to Ethernet device structure.
1632  * @param rx_queue_id
1633  *   Receive queue index.
1634  * @param qinfo
1635  *   Receive queue information structure.
1636  */
1637 static void mrvl_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1638                               struct rte_eth_rxq_info *qinfo)
1639 {
1640         struct mrvl_rxq *q = dev->data->rx_queues[rx_queue_id];
1641         struct mrvl_priv *priv = dev->data->dev_private;
1642         int inq = priv->rxq_map[rx_queue_id].inq;
1643         int tc = priv->rxq_map[rx_queue_id].tc;
1644         struct pp2_ppio_tc_params *tc_params =
1645                 &priv->ppio_params.inqs_params.tcs_params[tc];
1646
1647         qinfo->mp = q->mp;
1648         qinfo->nb_desc = tc_params->inqs_params[inq].size;
1649 }
1650
1651 /**
1652  * DPDK callback to get information about specific transmit queue.
1653  *
1654  * @param dev
1655  *   Pointer to Ethernet device structure.
1656  * @param tx_queue_id
1657  *   Transmit queue index.
1658  * @param qinfo
1659  *   Transmit queue information structure.
1660  */
1661 static void mrvl_txq_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1662                               struct rte_eth_txq_info *qinfo)
1663 {
1664         struct mrvl_priv *priv = dev->data->dev_private;
1665         struct mrvl_txq *txq = dev->data->tx_queues[tx_queue_id];
1666
1667         qinfo->nb_desc =
1668                 priv->ppio_params.outqs_params.outqs_params[tx_queue_id].size;
1669         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1670 }
1671
1672 /**
1673  * DPDK callback to Configure a VLAN filter.
1674  *
1675  * @param dev
1676  *   Pointer to Ethernet device structure.
1677  * @param vlan_id
1678  *   VLAN ID to filter.
1679  * @param on
1680  *   Toggle filter.
1681  *
1682  * @return
1683  *   0 on success, negative error value otherwise.
1684  */
1685 static int
1686 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1687 {
1688         struct mrvl_priv *priv = dev->data->dev_private;
1689
1690         if (priv->isolated)
1691                 return -ENOTSUP;
1692
1693         if (!priv->ppio)
1694                 return 0;
1695
1696         return on ? pp2_ppio_add_vlan(priv->ppio, vlan_id) :
1697                     pp2_ppio_remove_vlan(priv->ppio, vlan_id);
1698 }
1699
1700 /**
1701  * DPDK callback to Configure VLAN offload.
1702  *
1703  * @param dev
1704  *   Pointer to Ethernet device structure.
1705  * @param mask
1706  *   VLAN offload mask.
1707  *
1708  * @return
1709  *   0 on success, negative error value otherwise.
1710  */
1711 static int mrvl_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1712 {
1713         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1714         int ret;
1715
1716         if (mask & ETH_VLAN_STRIP_MASK)
1717                 MRVL_LOG(ERR, "VLAN stripping is not supported\n");
1718
1719         if (mask & ETH_VLAN_FILTER_MASK) {
1720                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1721                         ret = mrvl_populate_vlan_table(dev, 1);
1722                 else
1723                         ret = mrvl_populate_vlan_table(dev, 0);
1724
1725                 if (ret)
1726                         return ret;
1727         }
1728
1729         if (mask & ETH_VLAN_EXTEND_MASK)
1730                 MRVL_LOG(ERR, "Extend VLAN not supported\n");
1731
1732         return 0;
1733 }
1734
1735 /**
1736  * Release buffers to hardware bpool (buffer-pool)
1737  *
1738  * @param rxq
1739  *   Receive queue pointer.
1740  * @param num
1741  *   Number of buffers to release to bpool.
1742  *
1743  * @return
1744  *   0 on success, negative error value otherwise.
1745  */
1746 static int
1747 mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
1748 {
1749         struct buff_release_entry entries[num];
1750         struct rte_mbuf *mbufs[num];
1751         int i, ret;
1752         unsigned int core_id;
1753         struct pp2_hif *hif;
1754         struct pp2_bpool *bpool;
1755
1756         core_id = rte_lcore_id();
1757         if (core_id == LCORE_ID_ANY)
1758                 core_id = rte_get_main_lcore();
1759
1760         hif = mrvl_get_hif(rxq->priv, core_id);
1761         if (!hif)
1762                 return -1;
1763
1764         bpool = rxq->priv->bpool;
1765
1766         ret = rte_pktmbuf_alloc_bulk(rxq->mp, mbufs, num);
1767         if (ret)
1768                 return ret;
1769
1770         if (cookie_addr_high == MRVL_COOKIE_ADDR_INVALID)
1771                 cookie_addr_high =
1772                         (uint64_t)mbufs[0] & MRVL_COOKIE_HIGH_ADDR_MASK;
1773
1774         for (i = 0; i < num; i++) {
1775                 if (((uint64_t)mbufs[i] & MRVL_COOKIE_HIGH_ADDR_MASK)
1776                         != cookie_addr_high) {
1777                         MRVL_LOG(ERR,
1778                                 "mbuf virtual addr high is out of range "
1779                                 "0x%x instead of 0x%x\n",
1780                                 (uint32_t)((uint64_t)mbufs[i] >> 32),
1781                                 (uint32_t)(cookie_addr_high >> 32));
1782                         goto out;
1783                 }
1784
1785                 entries[i].buff.addr =
1786                         rte_mbuf_data_iova_default(mbufs[i]);
1787                 entries[i].buff.cookie = (uintptr_t)mbufs[i];
1788                 entries[i].bpool = bpool;
1789         }
1790
1791         pp2_bpool_put_buffs(hif, entries, (uint16_t *)&i);
1792         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] += i;
1793
1794         if (i != num)
1795                 goto out;
1796
1797         return 0;
1798 out:
1799         for (; i < num; i++)
1800                 rte_pktmbuf_free(mbufs[i]);
1801
1802         return -1;
1803 }
1804
1805 /**
1806  * DPDK callback to configure the receive queue.
1807  *
1808  * @param dev
1809  *   Pointer to Ethernet device structure.
1810  * @param idx
1811  *   RX queue index.
1812  * @param desc
1813  *   Number of descriptors to configure in queue.
1814  * @param socket
1815  *   NUMA socket on which memory must be allocated.
1816  * @param conf
1817  *   Thresholds parameters.
1818  * @param mp
1819  *   Memory pool for buffer allocations.
1820  *
1821  * @return
1822  *   0 on success, negative error value otherwise.
1823  */
1824 static int
1825 mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1826                     unsigned int socket,
1827                     const struct rte_eth_rxconf *conf,
1828                     struct rte_mempool *mp)
1829 {
1830         struct mrvl_priv *priv = dev->data->dev_private;
1831         struct mrvl_rxq *rxq;
1832         uint32_t frame_size, buf_size = rte_pktmbuf_data_room_size(mp);
1833         uint32_t max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1834         int ret, tc, inq;
1835         uint64_t offloads;
1836
1837         offloads = conf->offloads | dev->data->dev_conf.rxmode.offloads;
1838
1839         if (priv->rxq_map[idx].tc == MRVL_UNKNOWN_TC) {
1840                 /*
1841                  * Unknown TC mapping, mapping will not have a correct queue.
1842                  */
1843                 MRVL_LOG(ERR, "Unknown TC mapping for queue %hu eth%hhu",
1844                         idx, priv->ppio_id);
1845                 return -EFAULT;
1846         }
1847
1848         frame_size = buf_size - RTE_PKTMBUF_HEADROOM -
1849                      MRVL_PKT_EFFEC_OFFS + RTE_ETHER_CRC_LEN;
1850         if (frame_size < max_rx_pkt_len) {
1851                 MRVL_LOG(WARNING,
1852                         "Mbuf size must be increased to %u bytes to hold up "
1853                         "to %u bytes of data.",
1854                         buf_size + max_rx_pkt_len - frame_size,
1855                         max_rx_pkt_len);
1856                 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1857                 MRVL_LOG(INFO, "Setting max rx pkt len to %u",
1858                         dev->data->dev_conf.rxmode.max_rx_pkt_len);
1859         }
1860
1861         if (dev->data->rx_queues[idx]) {
1862                 rte_free(dev->data->rx_queues[idx]);
1863                 dev->data->rx_queues[idx] = NULL;
1864         }
1865
1866         rxq = rte_zmalloc_socket("rxq", sizeof(*rxq), 0, socket);
1867         if (!rxq)
1868                 return -ENOMEM;
1869
1870         rxq->priv = priv;
1871         rxq->mp = mp;
1872         rxq->cksum_enabled = offloads & DEV_RX_OFFLOAD_IPV4_CKSUM;
1873         rxq->queue_id = idx;
1874         rxq->port_id = dev->data->port_id;
1875         mrvl_port_to_bpool_lookup[rxq->port_id] = priv->bpool;
1876
1877         tc = priv->rxq_map[rxq->queue_id].tc,
1878         inq = priv->rxq_map[rxq->queue_id].inq;
1879         priv->ppio_params.inqs_params.tcs_params[tc].inqs_params[inq].size =
1880                 desc;
1881
1882         ret = mrvl_fill_bpool(rxq, desc);
1883         if (ret) {
1884                 rte_free(rxq);
1885                 return ret;
1886         }
1887
1888         priv->bpool_init_size += desc;
1889
1890         dev->data->rx_queues[idx] = rxq;
1891
1892         return 0;
1893 }
1894
1895 /**
1896  * DPDK callback to release the receive queue.
1897  *
1898  * @param rxq
1899  *   Generic receive queue pointer.
1900  */
1901 static void
1902 mrvl_rx_queue_release(void *rxq)
1903 {
1904         struct mrvl_rxq *q = rxq;
1905         struct pp2_ppio_tc_params *tc_params;
1906         int i, num, tc, inq;
1907         struct pp2_hif *hif;
1908         unsigned int core_id = rte_lcore_id();
1909
1910         if (core_id == LCORE_ID_ANY)
1911                 core_id = rte_get_main_lcore();
1912
1913         if (!q)
1914                 return;
1915
1916         hif = mrvl_get_hif(q->priv, core_id);
1917
1918         if (!hif)
1919                 return;
1920
1921         tc = q->priv->rxq_map[q->queue_id].tc;
1922         inq = q->priv->rxq_map[q->queue_id].inq;
1923         tc_params = &q->priv->ppio_params.inqs_params.tcs_params[tc];
1924         num = tc_params->inqs_params[inq].size;
1925         for (i = 0; i < num; i++) {
1926                 struct pp2_buff_inf inf;
1927                 uint64_t addr;
1928
1929                 pp2_bpool_get_buff(hif, q->priv->bpool, &inf);
1930                 addr = cookie_addr_high | inf.cookie;
1931                 rte_pktmbuf_free((struct rte_mbuf *)addr);
1932         }
1933
1934         rte_free(q);
1935 }
1936
1937 /**
1938  * DPDK callback to configure the transmit queue.
1939  *
1940  * @param dev
1941  *   Pointer to Ethernet device structure.
1942  * @param idx
1943  *   Transmit queue index.
1944  * @param desc
1945  *   Number of descriptors to configure in the queue.
1946  * @param socket
1947  *   NUMA socket on which memory must be allocated.
1948  * @param conf
1949  *   Tx queue configuration parameters.
1950  *
1951  * @return
1952  *   0 on success, negative error value otherwise.
1953  */
1954 static int
1955 mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1956                     unsigned int socket,
1957                     const struct rte_eth_txconf *conf)
1958 {
1959         struct mrvl_priv *priv = dev->data->dev_private;
1960         struct mrvl_txq *txq;
1961
1962         if (dev->data->tx_queues[idx]) {
1963                 rte_free(dev->data->tx_queues[idx]);
1964                 dev->data->tx_queues[idx] = NULL;
1965         }
1966
1967         txq = rte_zmalloc_socket("txq", sizeof(*txq), 0, socket);
1968         if (!txq)
1969                 return -ENOMEM;
1970
1971         txq->priv = priv;
1972         txq->queue_id = idx;
1973         txq->port_id = dev->data->port_id;
1974         txq->tx_deferred_start = conf->tx_deferred_start;
1975         dev->data->tx_queues[idx] = txq;
1976
1977         priv->ppio_params.outqs_params.outqs_params[idx].size = desc;
1978
1979         return 0;
1980 }
1981
1982 /**
1983  * DPDK callback to release the transmit queue.
1984  *
1985  * @param txq
1986  *   Generic transmit queue pointer.
1987  */
1988 static void
1989 mrvl_tx_queue_release(void *txq)
1990 {
1991         struct mrvl_txq *q = txq;
1992
1993         if (!q)
1994                 return;
1995
1996         rte_free(q);
1997 }
1998
1999 /**
2000  * DPDK callback to get flow control configuration.
2001  *
2002  * @param dev
2003  *  Pointer to Ethernet device structure.
2004  * @param fc_conf
2005  *  Pointer to the flow control configuration.
2006  *
2007  * @return
2008  *  0 on success, negative error value otherwise.
2009  */
2010 static int
2011 mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
2012 {
2013         struct mrvl_priv *priv = dev->data->dev_private;
2014         int ret, en;
2015
2016         if (!priv)
2017                 return -EPERM;
2018
2019         ret = pp2_ppio_get_rx_pause(priv->ppio, &en);
2020         if (ret) {
2021                 MRVL_LOG(ERR, "Failed to read rx pause state");
2022                 return ret;
2023         }
2024
2025         fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
2026
2027         return 0;
2028 }
2029
2030 /**
2031  * DPDK callback to set flow control configuration.
2032  *
2033  * @param dev
2034  *  Pointer to Ethernet device structure.
2035  * @param fc_conf
2036  *  Pointer to the flow control configuration.
2037  *
2038  * @return
2039  *  0 on success, negative error value otherwise.
2040  */
2041 static int
2042 mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
2043 {
2044         struct mrvl_priv *priv = dev->data->dev_private;
2045
2046         if (!priv)
2047                 return -EPERM;
2048
2049         if (fc_conf->high_water ||
2050             fc_conf->low_water ||
2051             fc_conf->pause_time ||
2052             fc_conf->mac_ctrl_frame_fwd ||
2053             fc_conf->autoneg) {
2054                 MRVL_LOG(ERR, "Flowctrl parameter is not supported");
2055
2056                 return -EINVAL;
2057         }
2058
2059         if (fc_conf->mode == RTE_FC_NONE ||
2060             fc_conf->mode == RTE_FC_RX_PAUSE) {
2061                 int ret, en;
2062
2063                 en = fc_conf->mode == RTE_FC_NONE ? 0 : 1;
2064                 ret = pp2_ppio_set_rx_pause(priv->ppio, en);
2065                 if (ret)
2066                         MRVL_LOG(ERR,
2067                                 "Failed to change flowctrl on RX side");
2068
2069                 return ret;
2070         }
2071
2072         return 0;
2073 }
2074
2075 /**
2076  * Update RSS hash configuration
2077  *
2078  * @param dev
2079  *   Pointer to Ethernet device structure.
2080  * @param rss_conf
2081  *   Pointer to RSS configuration.
2082  *
2083  * @return
2084  *   0 on success, negative error value otherwise.
2085  */
2086 static int
2087 mrvl_rss_hash_update(struct rte_eth_dev *dev,
2088                      struct rte_eth_rss_conf *rss_conf)
2089 {
2090         struct mrvl_priv *priv = dev->data->dev_private;
2091
2092         if (priv->isolated)
2093                 return -ENOTSUP;
2094
2095         return mrvl_configure_rss(priv, rss_conf);
2096 }
2097
2098 /**
2099  * DPDK callback to get RSS hash configuration.
2100  *
2101  * @param dev
2102  *   Pointer to Ethernet device structure.
2103  * @rss_conf
2104  *   Pointer to RSS configuration.
2105  *
2106  * @return
2107  *   Always 0.
2108  */
2109 static int
2110 mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
2111                        struct rte_eth_rss_conf *rss_conf)
2112 {
2113         struct mrvl_priv *priv = dev->data->dev_private;
2114         enum pp2_ppio_hash_type hash_type =
2115                 priv->ppio_params.inqs_params.hash_type;
2116
2117         rss_conf->rss_key = NULL;
2118
2119         if (hash_type == PP2_PPIO_HASH_T_NONE)
2120                 rss_conf->rss_hf = 0;
2121         else if (hash_type == PP2_PPIO_HASH_T_2_TUPLE)
2122                 rss_conf->rss_hf = ETH_RSS_IPV4;
2123         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && priv->rss_hf_tcp)
2124                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_TCP;
2125         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && !priv->rss_hf_tcp)
2126                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_UDP;
2127
2128         return 0;
2129 }
2130
2131 /**
2132  * DPDK callback to get rte_flow callbacks.
2133  *
2134  * @param dev
2135  *   Pointer to the device structure.
2136  * @param filer_type
2137  *   Flow filter type.
2138  * @param filter_op
2139  *   Flow filter operation.
2140  * @param arg
2141  *   Pointer to pass the flow ops.
2142  *
2143  * @return
2144  *   0 on success, negative error value otherwise.
2145  */
2146 static int
2147 mrvl_eth_filter_ctrl(struct rte_eth_dev *dev __rte_unused,
2148                      enum rte_filter_type filter_type,
2149                      enum rte_filter_op filter_op, void *arg)
2150 {
2151         switch (filter_type) {
2152         case RTE_ETH_FILTER_GENERIC:
2153                 if (filter_op != RTE_ETH_FILTER_GET)
2154                         return -EINVAL;
2155                 *(const void **)arg = &mrvl_flow_ops;
2156                 return 0;
2157         default:
2158                 MRVL_LOG(WARNING, "Filter type (%d) not supported",
2159                                 filter_type);
2160                 return -EINVAL;
2161         }
2162 }
2163
2164 /**
2165  * DPDK callback to get rte_mtr callbacks.
2166  *
2167  * @param dev
2168  *   Pointer to the device structure.
2169  * @param ops
2170  *   Pointer to pass the mtr ops.
2171  *
2172  * @return
2173  *   Always 0.
2174  */
2175 static int
2176 mrvl_mtr_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2177 {
2178         *(const void **)ops = &mrvl_mtr_ops;
2179
2180         return 0;
2181 }
2182
2183 /**
2184  * DPDK callback to get rte_tm callbacks.
2185  *
2186  * @param dev
2187  *   Pointer to the device structure.
2188  * @param ops
2189  *   Pointer to pass the tm ops.
2190  *
2191  * @return
2192  *   Always 0.
2193  */
2194 static int
2195 mrvl_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *ops)
2196 {
2197         *(const void **)ops = &mrvl_tm_ops;
2198
2199         return 0;
2200 }
2201
2202 static const struct eth_dev_ops mrvl_ops = {
2203         .dev_configure = mrvl_dev_configure,
2204         .dev_start = mrvl_dev_start,
2205         .dev_stop = mrvl_dev_stop,
2206         .dev_set_link_up = mrvl_dev_set_link_up,
2207         .dev_set_link_down = mrvl_dev_set_link_down,
2208         .dev_close = mrvl_dev_close,
2209         .link_update = mrvl_link_update,
2210         .promiscuous_enable = mrvl_promiscuous_enable,
2211         .allmulticast_enable = mrvl_allmulticast_enable,
2212         .promiscuous_disable = mrvl_promiscuous_disable,
2213         .allmulticast_disable = mrvl_allmulticast_disable,
2214         .mac_addr_remove = mrvl_mac_addr_remove,
2215         .mac_addr_add = mrvl_mac_addr_add,
2216         .mac_addr_set = mrvl_mac_addr_set,
2217         .mtu_set = mrvl_mtu_set,
2218         .stats_get = mrvl_stats_get,
2219         .stats_reset = mrvl_stats_reset,
2220         .xstats_get = mrvl_xstats_get,
2221         .xstats_reset = mrvl_xstats_reset,
2222         .xstats_get_names = mrvl_xstats_get_names,
2223         .dev_infos_get = mrvl_dev_infos_get,
2224         .dev_supported_ptypes_get = mrvl_dev_supported_ptypes_get,
2225         .rxq_info_get = mrvl_rxq_info_get,
2226         .txq_info_get = mrvl_txq_info_get,
2227         .vlan_filter_set = mrvl_vlan_filter_set,
2228         .vlan_offload_set = mrvl_vlan_offload_set,
2229         .tx_queue_start = mrvl_tx_queue_start,
2230         .tx_queue_stop = mrvl_tx_queue_stop,
2231         .rx_queue_setup = mrvl_rx_queue_setup,
2232         .rx_queue_release = mrvl_rx_queue_release,
2233         .tx_queue_setup = mrvl_tx_queue_setup,
2234         .tx_queue_release = mrvl_tx_queue_release,
2235         .flow_ctrl_get = mrvl_flow_ctrl_get,
2236         .flow_ctrl_set = mrvl_flow_ctrl_set,
2237         .rss_hash_update = mrvl_rss_hash_update,
2238         .rss_hash_conf_get = mrvl_rss_hash_conf_get,
2239         .filter_ctrl = mrvl_eth_filter_ctrl,
2240         .mtr_ops_get = mrvl_mtr_ops_get,
2241         .tm_ops_get = mrvl_tm_ops_get,
2242 };
2243
2244 /**
2245  * Return packet type information and l3/l4 offsets.
2246  *
2247  * @param desc
2248  *   Pointer to the received packet descriptor.
2249  * @param l3_offset
2250  *   l3 packet offset.
2251  * @param l4_offset
2252  *   l4 packet offset.
2253  *
2254  * @return
2255  *   Packet type information.
2256  */
2257 static inline uint64_t
2258 mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
2259                                     uint8_t *l3_offset, uint8_t *l4_offset)
2260 {
2261         enum pp2_inq_l3_type l3_type;
2262         enum pp2_inq_l4_type l4_type;
2263         enum pp2_inq_vlan_tag vlan_tag;
2264         uint64_t packet_type;
2265
2266         pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset);
2267         pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset);
2268         pp2_ppio_inq_desc_get_vlan_tag(desc, &vlan_tag);
2269
2270         packet_type = RTE_PTYPE_L2_ETHER;
2271
2272         switch (vlan_tag) {
2273         case PP2_INQ_VLAN_TAG_SINGLE:
2274                 packet_type |= RTE_PTYPE_L2_ETHER_VLAN;
2275                 break;
2276         case PP2_INQ_VLAN_TAG_DOUBLE:
2277         case PP2_INQ_VLAN_TAG_TRIPLE:
2278                 packet_type |= RTE_PTYPE_L2_ETHER_QINQ;
2279                 break;
2280         default:
2281                 break;
2282         }
2283
2284         switch (l3_type) {
2285         case PP2_INQ_L3_TYPE_IPV4_NO_OPTS:
2286                 packet_type |= RTE_PTYPE_L3_IPV4;
2287                 break;
2288         case PP2_INQ_L3_TYPE_IPV4_OK:
2289                 packet_type |= RTE_PTYPE_L3_IPV4_EXT;
2290                 break;
2291         case PP2_INQ_L3_TYPE_IPV4_TTL_ZERO:
2292                 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
2293                 break;
2294         case PP2_INQ_L3_TYPE_IPV6_NO_EXT:
2295                 packet_type |= RTE_PTYPE_L3_IPV6;
2296                 break;
2297         case PP2_INQ_L3_TYPE_IPV6_EXT:
2298                 packet_type |= RTE_PTYPE_L3_IPV6_EXT;
2299                 break;
2300         case PP2_INQ_L3_TYPE_ARP:
2301                 packet_type |= RTE_PTYPE_L2_ETHER_ARP;
2302                 /*
2303                  * In case of ARP l4_offset is set to wrong value.
2304                  * Set it to proper one so that later on mbuf->l3_len can be
2305                  * calculated subtracting l4_offset and l3_offset.
2306                  */
2307                 *l4_offset = *l3_offset + MRVL_ARP_LENGTH;
2308                 break;
2309         default:
2310                 break;
2311         }
2312
2313         switch (l4_type) {
2314         case PP2_INQ_L4_TYPE_TCP:
2315                 packet_type |= RTE_PTYPE_L4_TCP;
2316                 break;
2317         case PP2_INQ_L4_TYPE_UDP:
2318                 packet_type |= RTE_PTYPE_L4_UDP;
2319                 break;
2320         default:
2321                 break;
2322         }
2323
2324         return packet_type;
2325 }
2326
2327 /**
2328  * Get offload information from the received packet descriptor.
2329  *
2330  * @param desc
2331  *   Pointer to the received packet descriptor.
2332  *
2333  * @return
2334  *   Mbuf offload flags.
2335  */
2336 static inline uint64_t
2337 mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
2338 {
2339         uint64_t flags;
2340         enum pp2_inq_desc_status status;
2341
2342         status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
2343         if (unlikely(status != PP2_DESC_ERR_OK))
2344                 flags = PKT_RX_IP_CKSUM_BAD;
2345         else
2346                 flags = PKT_RX_IP_CKSUM_GOOD;
2347
2348         status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
2349         if (unlikely(status != PP2_DESC_ERR_OK))
2350                 flags |= PKT_RX_L4_CKSUM_BAD;
2351         else
2352                 flags |= PKT_RX_L4_CKSUM_GOOD;
2353
2354         return flags;
2355 }
2356
2357 /**
2358  * DPDK callback for receive.
2359  *
2360  * @param rxq
2361  *   Generic pointer to the receive queue.
2362  * @param rx_pkts
2363  *   Array to store received packets.
2364  * @param nb_pkts
2365  *   Maximum number of packets in array.
2366  *
2367  * @return
2368  *   Number of packets successfully received.
2369  */
2370 static uint16_t
2371 mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
2372 {
2373         struct mrvl_rxq *q = rxq;
2374         struct pp2_ppio_desc descs[nb_pkts];
2375         struct pp2_bpool *bpool;
2376         int i, ret, rx_done = 0;
2377         int num;
2378         struct pp2_hif *hif;
2379         unsigned int core_id = rte_lcore_id();
2380
2381         hif = mrvl_get_hif(q->priv, core_id);
2382
2383         if (unlikely(!q->priv->ppio || !hif))
2384                 return 0;
2385
2386         bpool = q->priv->bpool;
2387
2388         ret = pp2_ppio_recv(q->priv->ppio, q->priv->rxq_map[q->queue_id].tc,
2389                             q->priv->rxq_map[q->queue_id].inq, descs, &nb_pkts);
2390         if (unlikely(ret < 0))
2391                 return 0;
2392
2393         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] -= nb_pkts;
2394
2395         for (i = 0; i < nb_pkts; i++) {
2396                 struct rte_mbuf *mbuf;
2397                 uint8_t l3_offset, l4_offset;
2398                 enum pp2_inq_desc_status status;
2399                 uint64_t addr;
2400
2401                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2402                         struct pp2_ppio_desc *pref_desc;
2403                         u64 pref_addr;
2404
2405                         pref_desc = &descs[i + MRVL_MUSDK_PREFETCH_SHIFT];
2406                         pref_addr = cookie_addr_high |
2407                                     pp2_ppio_inq_desc_get_cookie(pref_desc);
2408                         rte_mbuf_prefetch_part1((struct rte_mbuf *)(pref_addr));
2409                         rte_mbuf_prefetch_part2((struct rte_mbuf *)(pref_addr));
2410                 }
2411
2412                 addr = cookie_addr_high |
2413                        pp2_ppio_inq_desc_get_cookie(&descs[i]);
2414                 mbuf = (struct rte_mbuf *)addr;
2415                 rte_pktmbuf_reset(mbuf);
2416
2417                 /* drop packet in case of mac, overrun or resource error */
2418                 status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
2419                 if (unlikely(status != PP2_DESC_ERR_OK)) {
2420                         struct pp2_buff_inf binf = {
2421                                 .addr = rte_mbuf_data_iova_default(mbuf),
2422                                 .cookie = (uint64_t)mbuf,
2423                         };
2424
2425                         pp2_bpool_put_buff(hif, bpool, &binf);
2426                         mrvl_port_bpool_size
2427                                 [bpool->pp2_id][bpool->id][core_id]++;
2428                         q->drop_mac++;
2429                         continue;
2430                 }
2431
2432                 mbuf->data_off += MRVL_PKT_EFFEC_OFFS;
2433                 mbuf->pkt_len = pp2_ppio_inq_desc_get_pkt_len(&descs[i]);
2434                 mbuf->data_len = mbuf->pkt_len;
2435                 mbuf->port = q->port_id;
2436                 mbuf->packet_type =
2437                         mrvl_desc_to_packet_type_and_offset(&descs[i],
2438                                                             &l3_offset,
2439                                                             &l4_offset);
2440                 mbuf->l2_len = l3_offset;
2441                 mbuf->l3_len = l4_offset - l3_offset;
2442
2443                 if (likely(q->cksum_enabled))
2444                         mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
2445
2446                 rx_pkts[rx_done++] = mbuf;
2447                 q->bytes_recv += mbuf->pkt_len;
2448         }
2449
2450         if (rte_spinlock_trylock(&q->priv->lock) == 1) {
2451                 num = mrvl_get_bpool_size(bpool->pp2_id, bpool->id);
2452
2453                 if (unlikely(num <= q->priv->bpool_min_size ||
2454                              (!rx_done && num < q->priv->bpool_init_size))) {
2455                         mrvl_fill_bpool(q, MRVL_BURST_SIZE);
2456                 } else if (unlikely(num > q->priv->bpool_max_size)) {
2457                         int i;
2458                         int pkt_to_remove = num - q->priv->bpool_init_size;
2459                         struct rte_mbuf *mbuf;
2460                         struct pp2_buff_inf buff;
2461
2462                         for (i = 0; i < pkt_to_remove; i++) {
2463                                 ret = pp2_bpool_get_buff(hif, bpool, &buff);
2464                                 if (ret)
2465                                         break;
2466                                 mbuf = (struct rte_mbuf *)
2467                                         (cookie_addr_high | buff.cookie);
2468                                 rte_pktmbuf_free(mbuf);
2469                         }
2470                         mrvl_port_bpool_size
2471                                 [bpool->pp2_id][bpool->id][core_id] -= i;
2472                 }
2473                 rte_spinlock_unlock(&q->priv->lock);
2474         }
2475
2476         return rx_done;
2477 }
2478
2479 /**
2480  * Prepare offload information.
2481  *
2482  * @param ol_flags
2483  *   Offload flags.
2484  * @param packet_type
2485  *   Packet type bitfield.
2486  * @param l3_type
2487  *   Pointer to the pp2_ouq_l3_type structure.
2488  * @param l4_type
2489  *   Pointer to the pp2_outq_l4_type structure.
2490  * @param gen_l3_cksum
2491  *   Will be set to 1 in case l3 checksum is computed.
2492  * @param l4_cksum
2493  *   Will be set to 1 in case l4 checksum is computed.
2494  *
2495  * @return
2496  *   0 on success, negative error value otherwise.
2497  */
2498 static inline int
2499 mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type,
2500                         enum pp2_outq_l3_type *l3_type,
2501                         enum pp2_outq_l4_type *l4_type,
2502                         int *gen_l3_cksum,
2503                         int *gen_l4_cksum)
2504 {
2505         /*
2506          * Based on ol_flags prepare information
2507          * for pp2_ppio_outq_desc_set_proto_info() which setups descriptor
2508          * for offloading.
2509          */
2510         if (ol_flags & PKT_TX_IPV4) {
2511                 *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
2512                 *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
2513         } else if (ol_flags & PKT_TX_IPV6) {
2514                 *l3_type = PP2_OUTQ_L3_TYPE_IPV6;
2515                 /* no checksum for ipv6 header */
2516                 *gen_l3_cksum = 0;
2517         } else {
2518                 /* if something different then stop processing */
2519                 return -1;
2520         }
2521
2522         ol_flags &= PKT_TX_L4_MASK;
2523         if ((packet_type & RTE_PTYPE_L4_TCP) &&
2524             ol_flags == PKT_TX_TCP_CKSUM) {
2525                 *l4_type = PP2_OUTQ_L4_TYPE_TCP;
2526                 *gen_l4_cksum = 1;
2527         } else if ((packet_type & RTE_PTYPE_L4_UDP) &&
2528                    ol_flags == PKT_TX_UDP_CKSUM) {
2529                 *l4_type = PP2_OUTQ_L4_TYPE_UDP;
2530                 *gen_l4_cksum = 1;
2531         } else {
2532                 *l4_type = PP2_OUTQ_L4_TYPE_OTHER;
2533                 /* no checksum for other type */
2534                 *gen_l4_cksum = 0;
2535         }
2536
2537         return 0;
2538 }
2539
2540 /**
2541  * Release already sent buffers to bpool (buffer-pool).
2542  *
2543  * @param ppio
2544  *   Pointer to the port structure.
2545  * @param hif
2546  *   Pointer to the MUSDK hardware interface.
2547  * @param sq
2548  *   Pointer to the shadow queue.
2549  * @param qid
2550  *   Queue id number.
2551  * @param force
2552  *   Force releasing packets.
2553  */
2554 static inline void
2555 mrvl_free_sent_buffers(struct pp2_ppio *ppio, struct pp2_hif *hif,
2556                        unsigned int core_id, struct mrvl_shadow_txq *sq,
2557                        int qid, int force)
2558 {
2559         struct buff_release_entry *entry;
2560         uint16_t nb_done = 0, num = 0, skip_bufs = 0;
2561         int i;
2562
2563         pp2_ppio_get_num_outq_done(ppio, hif, qid, &nb_done);
2564
2565         sq->num_to_release += nb_done;
2566
2567         if (likely(!force &&
2568                    sq->num_to_release < MRVL_PP2_BUF_RELEASE_BURST_SIZE))
2569                 return;
2570
2571         nb_done = sq->num_to_release;
2572         sq->num_to_release = 0;
2573
2574         for (i = 0; i < nb_done; i++) {
2575                 entry = &sq->ent[sq->tail + num];
2576                 if (unlikely(!entry->buff.addr)) {
2577                         MRVL_LOG(ERR,
2578                                 "Shadow memory @%d: cookie(%lx), pa(%lx)!",
2579                                 sq->tail, (u64)entry->buff.cookie,
2580                                 (u64)entry->buff.addr);
2581                         skip_bufs = 1;
2582                         goto skip;
2583                 }
2584
2585                 if (unlikely(!entry->bpool)) {
2586                         struct rte_mbuf *mbuf;
2587
2588                         mbuf = (struct rte_mbuf *)entry->buff.cookie;
2589                         rte_pktmbuf_free(mbuf);
2590                         skip_bufs = 1;
2591                         goto skip;
2592                 }
2593
2594                 mrvl_port_bpool_size
2595                         [entry->bpool->pp2_id][entry->bpool->id][core_id]++;
2596                 num++;
2597                 if (unlikely(sq->tail + num == MRVL_PP2_TX_SHADOWQ_SIZE))
2598                         goto skip;
2599                 continue;
2600 skip:
2601                 if (likely(num))
2602                         pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2603                 num += skip_bufs;
2604                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2605                 sq->size -= num;
2606                 num = 0;
2607                 skip_bufs = 0;
2608         }
2609
2610         if (likely(num)) {
2611                 pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2612                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2613                 sq->size -= num;
2614         }
2615 }
2616
2617 /**
2618  * DPDK callback for transmit.
2619  *
2620  * @param txq
2621  *   Generic pointer transmit queue.
2622  * @param tx_pkts
2623  *   Packets to transmit.
2624  * @param nb_pkts
2625  *   Number of packets in array.
2626  *
2627  * @return
2628  *   Number of packets successfully transmitted.
2629  */
2630 static uint16_t
2631 mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
2632 {
2633         struct mrvl_txq *q = txq;
2634         struct mrvl_shadow_txq *sq;
2635         struct pp2_hif *hif;
2636         struct pp2_ppio_desc descs[nb_pkts];
2637         unsigned int core_id = rte_lcore_id();
2638         int i, ret, bytes_sent = 0;
2639         uint16_t num, sq_free_size;
2640         uint64_t addr;
2641
2642         hif = mrvl_get_hif(q->priv, core_id);
2643         sq = &q->shadow_txqs[core_id];
2644
2645         if (unlikely(!q->priv->ppio || !hif))
2646                 return 0;
2647
2648         if (sq->size)
2649                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2650                                        sq, q->queue_id, 0);
2651
2652         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2653         if (unlikely(nb_pkts > sq_free_size))
2654                 nb_pkts = sq_free_size;
2655
2656         for (i = 0; i < nb_pkts; i++) {
2657                 struct rte_mbuf *mbuf = tx_pkts[i];
2658                 int gen_l3_cksum, gen_l4_cksum;
2659                 enum pp2_outq_l3_type l3_type;
2660                 enum pp2_outq_l4_type l4_type;
2661
2662                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2663                         struct rte_mbuf *pref_pkt_hdr;
2664
2665                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2666                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2667                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2668                 }
2669
2670                 mrvl_fill_shadowq(sq, mbuf);
2671                 mrvl_fill_desc(&descs[i], mbuf);
2672
2673                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2674                 /*
2675                  * in case unsupported ol_flags were passed
2676                  * do not update descriptor offload information
2677                  */
2678                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2679                                               &l3_type, &l4_type, &gen_l3_cksum,
2680                                               &gen_l4_cksum);
2681                 if (unlikely(ret))
2682                         continue;
2683
2684                 pp2_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type,
2685                                                   mbuf->l2_len,
2686                                                   mbuf->l2_len + mbuf->l3_len,
2687                                                   gen_l3_cksum, gen_l4_cksum);
2688         }
2689
2690         num = nb_pkts;
2691         pp2_ppio_send(q->priv->ppio, hif, q->queue_id, descs, &nb_pkts);
2692         /* number of packets that were not sent */
2693         if (unlikely(num > nb_pkts)) {
2694                 for (i = nb_pkts; i < num; i++) {
2695                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2696                                 MRVL_PP2_TX_SHADOWQ_MASK;
2697                         addr = sq->ent[sq->head].buff.cookie;
2698                         bytes_sent -=
2699                                 rte_pktmbuf_pkt_len((struct rte_mbuf *)addr);
2700                 }
2701                 sq->size -= num - nb_pkts;
2702         }
2703
2704         q->bytes_sent += bytes_sent;
2705
2706         return nb_pkts;
2707 }
2708
2709 /** DPDK callback for S/G transmit.
2710  *
2711  * @param txq
2712  *   Generic pointer transmit queue.
2713  * @param tx_pkts
2714  *   Packets to transmit.
2715  * @param nb_pkts
2716  *   Number of packets in array.
2717  *
2718  * @return
2719  *   Number of packets successfully transmitted.
2720  */
2721 static uint16_t
2722 mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
2723                      uint16_t nb_pkts)
2724 {
2725         struct mrvl_txq *q = txq;
2726         struct mrvl_shadow_txq *sq;
2727         struct pp2_hif *hif;
2728         struct pp2_ppio_desc descs[nb_pkts * PP2_PPIO_DESC_NUM_FRAGS];
2729         struct pp2_ppio_sg_pkts pkts;
2730         uint8_t frags[nb_pkts];
2731         unsigned int core_id = rte_lcore_id();
2732         int i, j, ret, bytes_sent = 0;
2733         int tail, tail_first;
2734         uint16_t num, sq_free_size;
2735         uint16_t nb_segs, total_descs = 0;
2736         uint64_t addr;
2737
2738         hif = mrvl_get_hif(q->priv, core_id);
2739         sq = &q->shadow_txqs[core_id];
2740         pkts.frags = frags;
2741         pkts.num = 0;
2742
2743         if (unlikely(!q->priv->ppio || !hif))
2744                 return 0;
2745
2746         if (sq->size)
2747                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2748                                        sq, q->queue_id, 0);
2749
2750         /* Save shadow queue free size */
2751         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2752
2753         tail = 0;
2754         for (i = 0; i < nb_pkts; i++) {
2755                 struct rte_mbuf *mbuf = tx_pkts[i];
2756                 struct rte_mbuf *seg = NULL;
2757                 int gen_l3_cksum, gen_l4_cksum;
2758                 enum pp2_outq_l3_type l3_type;
2759                 enum pp2_outq_l4_type l4_type;
2760
2761                 nb_segs = mbuf->nb_segs;
2762                 tail_first = tail;
2763                 total_descs += nb_segs;
2764
2765                 /*
2766                  * Check if total_descs does not exceed
2767                  * shadow queue free size
2768                  */
2769                 if (unlikely(total_descs > sq_free_size)) {
2770                         total_descs -= nb_segs;
2771                         break;
2772                 }
2773
2774                 /* Check if nb_segs does not exceed the max nb of desc per
2775                  * fragmented packet
2776                  */
2777                 if (nb_segs > PP2_PPIO_DESC_NUM_FRAGS) {
2778                         total_descs -= nb_segs;
2779                         RTE_LOG(ERR, PMD,
2780                                 "Too many segments. Packet won't be sent.\n");
2781                         break;
2782                 }
2783
2784                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2785                         struct rte_mbuf *pref_pkt_hdr;
2786
2787                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2788                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2789                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2790                 }
2791
2792                 pkts.frags[pkts.num] = nb_segs;
2793                 pkts.num++;
2794
2795                 seg = mbuf;
2796                 for (j = 0; j < nb_segs - 1; j++) {
2797                         /* For the subsequent segments, set shadow queue
2798                          * buffer to NULL
2799                          */
2800                         mrvl_fill_shadowq(sq, NULL);
2801                         mrvl_fill_desc(&descs[tail], seg);
2802
2803                         tail++;
2804                         seg = seg->next;
2805                 }
2806                 /* Put first mbuf info in last shadow queue entry */
2807                 mrvl_fill_shadowq(sq, mbuf);
2808                 /* Update descriptor with last segment */
2809                 mrvl_fill_desc(&descs[tail++], seg);
2810
2811                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2812                 /* In case unsupported ol_flags were passed
2813                  * do not update descriptor offload information
2814                  */
2815                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2816                                               &l3_type, &l4_type, &gen_l3_cksum,
2817                                               &gen_l4_cksum);
2818                 if (unlikely(ret))
2819                         continue;
2820
2821                 pp2_ppio_outq_desc_set_proto_info(&descs[tail_first], l3_type,
2822                                                   l4_type, mbuf->l2_len,
2823                                                   mbuf->l2_len + mbuf->l3_len,
2824                                                   gen_l3_cksum, gen_l4_cksum);
2825         }
2826
2827         num = total_descs;
2828         pp2_ppio_send_sg(q->priv->ppio, hif, q->queue_id, descs,
2829                          &total_descs, &pkts);
2830         /* number of packets that were not sent */
2831         if (unlikely(num > total_descs)) {
2832                 for (i = total_descs; i < num; i++) {
2833                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2834                                 MRVL_PP2_TX_SHADOWQ_MASK;
2835
2836                         addr = sq->ent[sq->head].buff.cookie;
2837                         if (addr)
2838                                 bytes_sent -=
2839                                         rte_pktmbuf_pkt_len((struct rte_mbuf *)
2840                                                 (cookie_addr_high | addr));
2841                 }
2842                 sq->size -= num - total_descs;
2843                 nb_pkts = pkts.num;
2844         }
2845
2846         q->bytes_sent += bytes_sent;
2847
2848         return nb_pkts;
2849 }
2850
2851 /**
2852  * Initialize packet processor.
2853  *
2854  * @return
2855  *   0 on success, negative error value otherwise.
2856  */
2857 static int
2858 mrvl_init_pp2(void)
2859 {
2860         struct pp2_init_params init_params;
2861
2862         memset(&init_params, 0, sizeof(init_params));
2863         init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
2864         init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
2865         init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
2866
2867         return pp2_init(&init_params);
2868 }
2869
2870 /**
2871  * Deinitialize packet processor.
2872  *
2873  * @return
2874  *   0 on success, negative error value otherwise.
2875  */
2876 static void
2877 mrvl_deinit_pp2(void)
2878 {
2879         pp2_deinit();
2880 }
2881
2882 /**
2883  * Create private device structure.
2884  *
2885  * @param dev_name
2886  *   Pointer to the port name passed in the initialization parameters.
2887  *
2888  * @return
2889  *   Pointer to the newly allocated private device structure.
2890  */
2891 static struct mrvl_priv *
2892 mrvl_priv_create(const char *dev_name)
2893 {
2894         struct pp2_bpool_params bpool_params;
2895         char match[MRVL_MATCH_LEN];
2896         struct mrvl_priv *priv;
2897         int ret, bpool_bit;
2898
2899         priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
2900         if (!priv)
2901                 return NULL;
2902
2903         ret = pp2_netdev_get_ppio_info((char *)(uintptr_t)dev_name,
2904                                        &priv->pp_id, &priv->ppio_id);
2905         if (ret)
2906                 goto out_free_priv;
2907
2908         bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
2909                                      PP2_BPOOL_NUM_POOLS);
2910         if (bpool_bit < 0)
2911                 goto out_free_priv;
2912         priv->bpool_bit = bpool_bit;
2913
2914         snprintf(match, sizeof(match), "pool-%d:%d", priv->pp_id,
2915                  priv->bpool_bit);
2916         memset(&bpool_params, 0, sizeof(bpool_params));
2917         bpool_params.match = match;
2918         bpool_params.buff_len = MRVL_PKT_SIZE_MAX + MRVL_PKT_EFFEC_OFFS;
2919         ret = pp2_bpool_init(&bpool_params, &priv->bpool);
2920         if (ret)
2921                 goto out_clear_bpool_bit;
2922
2923         priv->ppio_params.type = PP2_PPIO_T_NIC;
2924         rte_spinlock_init(&priv->lock);
2925
2926         return priv;
2927 out_clear_bpool_bit:
2928         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2929 out_free_priv:
2930         rte_free(priv);
2931         return NULL;
2932 }
2933
2934 /**
2935  * Create device representing Ethernet port.
2936  *
2937  * @param name
2938  *   Pointer to the port's name.
2939  *
2940  * @return
2941  *   0 on success, negative error value otherwise.
2942  */
2943 static int
2944 mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)
2945 {
2946         int ret, fd = socket(AF_INET, SOCK_DGRAM, 0);
2947         struct rte_eth_dev *eth_dev;
2948         struct mrvl_priv *priv;
2949         struct ifreq req;
2950
2951         eth_dev = rte_eth_dev_allocate(name);
2952         if (!eth_dev)
2953                 return -ENOMEM;
2954
2955         priv = mrvl_priv_create(name);
2956         if (!priv) {
2957                 ret = -ENOMEM;
2958                 goto out_free;
2959         }
2960         eth_dev->data->dev_private = priv;
2961
2962         eth_dev->data->mac_addrs =
2963                 rte_zmalloc("mac_addrs",
2964                             RTE_ETHER_ADDR_LEN * MRVL_MAC_ADDRS_MAX, 0);
2965         if (!eth_dev->data->mac_addrs) {
2966                 MRVL_LOG(ERR, "Failed to allocate space for eth addrs");
2967                 ret = -ENOMEM;
2968                 goto out_free;
2969         }
2970
2971         memset(&req, 0, sizeof(req));
2972         strcpy(req.ifr_name, name);
2973         ret = ioctl(fd, SIOCGIFHWADDR, &req);
2974         if (ret)
2975                 goto out_free;
2976
2977         memcpy(eth_dev->data->mac_addrs[0].addr_bytes,
2978                req.ifr_addr.sa_data, RTE_ETHER_ADDR_LEN);
2979
2980         eth_dev->device = &vdev->device;
2981         eth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;
2982         mrvl_set_tx_function(eth_dev);
2983         eth_dev->dev_ops = &mrvl_ops;
2984         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
2985
2986         eth_dev->data->dev_link.link_status = ETH_LINK_UP;
2987
2988         rte_eth_dev_probing_finish(eth_dev);
2989         return 0;
2990 out_free:
2991         rte_eth_dev_release_port(eth_dev);
2992
2993         return ret;
2994 }
2995
2996 /**
2997  * Callback used by rte_kvargs_process() during argument parsing.
2998  *
2999  * @param key
3000  *   Pointer to the parsed key (unused).
3001  * @param value
3002  *   Pointer to the parsed value.
3003  * @param extra_args
3004  *   Pointer to the extra arguments which contains address of the
3005  *   table of pointers to parsed interface names.
3006  *
3007  * @return
3008  *   Always 0.
3009  */
3010 static int
3011 mrvl_get_ifnames(const char *key __rte_unused, const char *value,
3012                  void *extra_args)
3013 {
3014         struct mrvl_ifnames *ifnames = extra_args;
3015
3016         ifnames->names[ifnames->idx++] = value;
3017
3018         return 0;
3019 }
3020
3021 /**
3022  * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
3023  */
3024 static void
3025 mrvl_deinit_hifs(void)
3026 {
3027         int i;
3028
3029         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
3030                 if (hifs[i])
3031                         pp2_hif_deinit(hifs[i]);
3032         }
3033         used_hifs = MRVL_MUSDK_HIFS_RESERVED;
3034         memset(hifs, 0, sizeof(hifs));
3035 }
3036
3037 /**
3038  * DPDK callback to register the virtual device.
3039  *
3040  * @param vdev
3041  *   Pointer to the virtual device.
3042  *
3043  * @return
3044  *   0 on success, negative error value otherwise.
3045  */
3046 static int
3047 rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
3048 {
3049         struct rte_kvargs *kvlist;
3050         struct mrvl_ifnames ifnames;
3051         int ret = -EINVAL;
3052         uint32_t i, ifnum, cfgnum;
3053         const char *params;
3054
3055         params = rte_vdev_device_args(vdev);
3056         if (!params)
3057                 return -EINVAL;
3058
3059         kvlist = rte_kvargs_parse(params, valid_args);
3060         if (!kvlist)
3061                 return -EINVAL;
3062
3063         ifnum = rte_kvargs_count(kvlist, MRVL_IFACE_NAME_ARG);
3064         if (ifnum > RTE_DIM(ifnames.names))
3065                 goto out_free_kvlist;
3066
3067         ifnames.idx = 0;
3068         rte_kvargs_process(kvlist, MRVL_IFACE_NAME_ARG,
3069                            mrvl_get_ifnames, &ifnames);
3070
3071
3072         /*
3073          * The below system initialization should be done only once,
3074          * on the first provided configuration file
3075          */
3076         if (!mrvl_qos_cfg) {
3077                 cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
3078                 MRVL_LOG(INFO, "Parsing config file!");
3079                 if (cfgnum > 1) {
3080                         MRVL_LOG(ERR, "Cannot handle more than one config file!");
3081                         goto out_free_kvlist;
3082                 } else if (cfgnum == 1) {
3083                         rte_kvargs_process(kvlist, MRVL_CFG_ARG,
3084                                            mrvl_get_qoscfg, &mrvl_qos_cfg);
3085                 }
3086         }
3087
3088         if (mrvl_dev_num)
3089                 goto init_devices;
3090
3091         MRVL_LOG(INFO, "Perform MUSDK initializations");
3092
3093         ret = rte_mvep_init(MVEP_MOD_T_PP2, kvlist);
3094         if (ret)
3095                 goto out_free_kvlist;
3096
3097         ret = mrvl_init_pp2();
3098         if (ret) {
3099                 MRVL_LOG(ERR, "Failed to init PP!");
3100                 rte_mvep_deinit(MVEP_MOD_T_PP2);
3101                 goto out_free_kvlist;
3102         }
3103
3104         memset(mrvl_port_bpool_size, 0, sizeof(mrvl_port_bpool_size));
3105         memset(mrvl_port_to_bpool_lookup, 0, sizeof(mrvl_port_to_bpool_lookup));
3106
3107         mrvl_lcore_first = RTE_MAX_LCORE;
3108         mrvl_lcore_last = 0;
3109
3110 init_devices:
3111         for (i = 0; i < ifnum; i++) {
3112                 MRVL_LOG(INFO, "Creating %s", ifnames.names[i]);
3113                 ret = mrvl_eth_dev_create(vdev, ifnames.names[i]);
3114                 if (ret)
3115                         goto out_cleanup;
3116                 mrvl_dev_num++;
3117         }
3118
3119         rte_kvargs_free(kvlist);
3120
3121         return 0;
3122 out_cleanup:
3123         rte_pmd_mrvl_remove(vdev);
3124
3125 out_free_kvlist:
3126         rte_kvargs_free(kvlist);
3127
3128         return ret;
3129 }
3130
3131 /**
3132  * DPDK callback to remove virtual device.
3133  *
3134  * @param vdev
3135  *   Pointer to the removed virtual device.
3136  *
3137  * @return
3138  *   0 on success, negative error value otherwise.
3139  */
3140 static int
3141 rte_pmd_mrvl_remove(struct rte_vdev_device *vdev)
3142 {
3143         uint16_t port_id;
3144         int ret = 0;
3145
3146         RTE_ETH_FOREACH_DEV(port_id) {
3147                 if (rte_eth_devices[port_id].device != &vdev->device)
3148                         continue;
3149                 ret |= rte_eth_dev_close(port_id);
3150         }
3151
3152         return ret == 0 ? 0 : -EIO;
3153 }
3154
3155 static struct rte_vdev_driver pmd_mrvl_drv = {
3156         .probe = rte_pmd_mrvl_probe,
3157         .remove = rte_pmd_mrvl_remove,
3158 };
3159
3160 RTE_PMD_REGISTER_VDEV(net_mvpp2, pmd_mrvl_drv);
3161 RTE_PMD_REGISTER_ALIAS(net_mvpp2, eth_mvpp2);
3162 RTE_LOG_REGISTER(mrvl_logtype, pmd.net.mvpp2, NOTICE);